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25
Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
28
License along with the GNU C Library; if not, write to the Free
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Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
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MA 02110-1301, USA. */
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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/* You have to define the following before including this file:
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UDItype __umulsidi3 (USItype, USItype);
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#if defined (__arm__) && !defined (__thumb__) && W_TYPE_SIZE == 32
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#if defined (__arm__) && (defined (__thumb2__) || !defined (__thumb__)) \
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#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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__asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
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: "=r" ((USItype) (sh)), \
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"rI" ((USItype) (bh)), \
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"r" ((USItype) (al)), \
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"rI" ((USItype) (bl)) __CLOBBER_CC)
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#define umul_ppmm(xh, xl, a, b) \
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{register USItype __t0, __t1, __t2; \
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__asm__ ("%@ Inlined umul_ppmm\n" \
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# if defined(__ARM_ARCH_2__) || defined(__ARM_ARCH_2A__) \
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|| defined(__ARM_ARCH_3__)
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# define umul_ppmm(xh, xl, a, b) \
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register USItype __t0, __t1, __t2; \
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__asm__ ("%@ Inlined umul_ppmm\n" \
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" mov %2, %5, lsr #16\n" \
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" mov %0, %6, lsr #16\n" \
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" bic %3, %5, %2, lsl #16\n" \
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"=r" ((USItype) (xl)), \
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"=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
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: "r" ((USItype) (a)), \
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"r" ((USItype) (b)) __CLOBBER_CC );}
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#define UDIV_TIME 100
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"r" ((USItype) (b)) __CLOBBER_CC ); \
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# define UMUL_TIME 20
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# define umul_ppmm(xh, xl, a, b) \
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/* Generate umull, under compiler control. */ \
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register UDItype __t0 = (UDItype)(USItype)(a) * (USItype)(b); \
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(xl) = (USItype)__t0; \
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(xh) = (USItype)(__t0 >> 32); \
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# define UDIV_TIME 100
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#endif /* __arm__ */
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#if defined(__arm__)
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/* Let gcc decide how best to implement count_leading_zeros. */
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#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
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#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctz (X))
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#define COUNT_LEADING_ZEROS_0 32
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#if defined (__AVR__)
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#if W_TYPE_SIZE == 16
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#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
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#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctz (X))
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#define COUNT_LEADING_ZEROS_0 16
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#endif /* W_TYPE_SIZE == 16 */
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#if W_TYPE_SIZE == 32
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#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clzl (X))
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#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctzl (X))
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#define COUNT_LEADING_ZEROS_0 32
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#endif /* W_TYPE_SIZE == 32 */
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#if W_TYPE_SIZE == 64
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#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clzll (X))
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#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctzll (X))
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#define COUNT_LEADING_ZEROS_0 64
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#endif /* W_TYPE_SIZE == 64 */
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#endif /* defined (__AVR__) */
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#if defined (__CRIS__) && __CRIS_arch_version >= 3
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#define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clz (X))
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#if __CRIS_arch_version >= 8
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: "0" ((UDItype) (n0)), \
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"1" ((UDItype) (n1)), \
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"rm" ((UDItype) (dv)))
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#define count_leading_zeros(count, x) ((count) = __builtin_clzl (x))
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#define count_trailing_zeros(count, x) ((count) = __builtin_ctzl (x))
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#define count_leading_zeros(count, x) ((count) = __builtin_clzll (x))
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#define count_trailing_zeros(count, x) ((count) = __builtin_ctzll (x))
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#define UMUL_TIME 40
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#define UDIV_TIME 40
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#endif /* x86_64 */
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"rJ" ((USItype) (al)), \
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"rI" ((USItype) (bl)) \
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#if defined (__sparc_v9__)
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#define umul_ppmm(w1, w0, u, v) \
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register USItype __g1 asm ("g1"); \
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__asm__ ("umul\t%2,%3,%1\n\t" \
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"srlx\t%1, 32, %0" \
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: "=r" ((USItype) (w1)), \
1138
: "r" ((USItype) (u)), \
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"r" ((USItype) (v))); \
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#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
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__asm__ ("mov\t%2,%%y\n\t" \
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"udiv\t%3,%4,%0\n\t" \
1145
"umul\t%0,%4,%1\n\t" \
1147
: "=&r" ((USItype) (__q)), \
1148
"=&r" ((USItype) (__r)) \
1149
: "r" ((USItype) (__n1)), \
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"r" ((USItype) (__n0)), \
1151
"r" ((USItype) (__d)))
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#if defined (__sparc_v8__)
1094
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#define umul_ppmm(w1, w0, u, v) \
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__asm__ ("umul %2,%3,%1;rd %%y,%0" \
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#define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */
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#endif /* __sparclite__ */
1257
1317
#endif /* __sparc_v8__ */
1318
#endif /* __sparc_v9__ */
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#endif /* sparc32 */
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#if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
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&& W_TYPE_SIZE == 64
1262
1323
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1263
__asm__ ("addcc %r4,%5,%1\n\t" \
1264
"add %r2,%3,%0\n\t" \
1265
"bcs,a,pn %%xcc, 1f\n\t" \
1268
: "=r" ((UDItype)(sh)), \
1269
"=&r" ((UDItype)(sl)) \
1270
: "%rJ" ((UDItype)(ah)), \
1271
"rI" ((UDItype)(bh)), \
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"%rJ" ((UDItype)(al)), \
1273
"rI" ((UDItype)(bl)) \
1325
UDItype __carry = 0; \
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__asm__ ("addcc\t%r5,%6,%1\n\t" \
1327
"add\t%r3,%4,%0\n\t" \
1328
"movcs\t%%xcc, 1, %2\n\t" \
1330
: "=r" ((UDItype)(sh)), \
1331
"=&r" ((UDItype)(sl)), \
1333
: "%rJ" ((UDItype)(ah)), \
1334
"rI" ((UDItype)(bh)), \
1335
"%rJ" ((UDItype)(al)), \
1336
"rI" ((UDItype)(bl)) \
1276
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1277
__asm__ ("subcc %r4,%5,%1\n\t" \
1278
"sub %r2,%3,%0\n\t" \
1279
"bcs,a,pn %%xcc, 1f\n\t" \
1280
"sub %0, 1, %0\n\t" \
1282
: "=r" ((UDItype)(sh)), \
1283
"=&r" ((UDItype)(sl)) \
1284
: "rJ" ((UDItype)(ah)), \
1285
"rI" ((UDItype)(bh)), \
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"rJ" ((UDItype)(al)), \
1287
"rI" ((UDItype)(bl)) \
1340
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1342
UDItype __carry = 0; \
1343
__asm__ ("subcc\t%r5,%6,%1\n\t" \
1344
"sub\t%r3,%4,%0\n\t" \
1345
"movcs\t%%xcc, 1, %2\n\t" \
1347
: "=r" ((UDItype)(sh)), \
1348
"=&r" ((UDItype)(sl)), \
1350
: "%rJ" ((UDItype)(ah)), \
1351
"rI" ((UDItype)(bh)), \
1352
"%rJ" ((UDItype)(al)), \
1353
"rI" ((UDItype)(bl)) \
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#define umul_ppmm(wh, wl, u, v) \
1369
1436
#endif /* __vax__ */
1439
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1443
__asm__ ("addu .l1 %1, %2, %0" \
1444
: "=a" (__ll) : "a" (al), "a" (bl)); \
1445
(sl) = (USItype)__ll; \
1446
(sh) = ((USItype)(__ll >> 32)) + (ah) + (bh); \
1450
#ifdef _TMS320C6400_PLUS
1451
#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
1452
#define umul_ppmm(w1, w0, u, v) \
1454
UDItype __x = (UDItype) (USItype) (u) * (USItype) (v); \
1455
(w1) = (USItype) (__x >> 32); \
1456
(w0) = (USItype) (__x); \
1458
#endif /* _TMS320C6400_PLUS */
1460
#define count_leading_zeros(count, x) ((count) = __builtin_clz (x))
1462
#define count_trailing_zeros(count, x) ((count) = __builtin_ctz (x))
1465
#define UDIV_TIME 40
1466
#endif /* _TMS320C6X */
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#if defined (__xtensa__) && W_TYPE_SIZE == 32
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/* This code is not Xtensa-configuration-specific, so rely on the compiler
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1470
to expand builtin functions depending on what configuration features