1
//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3
// The LLVM Compiler Infrastructure
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
8
//===----------------------------------------------------------------------===//
10
// This pass eliminates machine instruction PHI nodes by inserting copy
11
// instructions. This destroys SSA information, but is the desired input for
12
// some register allocators.
14
//===----------------------------------------------------------------------===//
16
#define DEBUG_TYPE "phielim"
17
#include "PHIElimination.h"
18
#include "llvm/CodeGen/LiveVariables.h"
19
#include "llvm/CodeGen/Passes.h"
20
#include "llvm/CodeGen/MachineDominators.h"
21
#include "llvm/CodeGen/MachineInstr.h"
22
#include "llvm/CodeGen/MachineInstrBuilder.h"
23
#include "llvm/CodeGen/MachineRegisterInfo.h"
24
#include "llvm/Target/TargetInstrInfo.h"
25
#include "llvm/Function.h"
26
#include "llvm/Target/TargetMachine.h"
27
#include "llvm/ADT/SmallPtrSet.h"
28
#include "llvm/ADT/STLExtras.h"
29
#include "llvm/ADT/Statistic.h"
30
#include "llvm/Support/CommandLine.h"
31
#include "llvm/Support/Compiler.h"
32
#include "llvm/Support/Debug.h"
37
STATISTIC(NumAtomic, "Number of atomic phis lowered");
38
STATISTIC(NumSplits, "Number of critical edges split on demand");
39
STATISTIC(NumReused, "Number of reused lowered phis");
41
char PHIElimination::ID = 0;
42
static RegisterPass<PHIElimination>
43
X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
45
const PassInfo *const llvm::PHIEliminationID = &X;
47
void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
48
AU.addPreserved<LiveVariables>();
49
AU.addPreserved<MachineDominatorTree>();
50
// rdar://7401784 This would be nice:
51
// AU.addPreservedID(MachineLoopInfoID);
52
MachineFunctionPass::getAnalysisUsage(AU);
55
bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &Fn) {
56
MRI = &Fn.getRegInfo();
60
// Split critical edges to help the coalescer
61
if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>())
62
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
63
Changed |= SplitPHIEdges(Fn, *I, *LV);
65
// Populate VRegPHIUseCount
68
// Eliminate PHI instructions by inserting copies into predecessor blocks.
69
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
70
Changed |= EliminatePHINodes(Fn, *I);
72
// Remove dead IMPLICIT_DEF instructions.
73
for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(),
74
E = ImpDefs.end(); I != E; ++I) {
75
MachineInstr *DefMI = *I;
76
unsigned DefReg = DefMI->getOperand(0).getReg();
77
if (MRI->use_empty(DefReg))
78
DefMI->eraseFromParent();
81
// Clean up the lowered PHI instructions.
82
for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end();
84
Fn.DeleteMachineInstr(I->first);
88
VRegPHIUseCount.clear();
92
/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
93
/// predecessor basic blocks.
95
bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF,
96
MachineBasicBlock &MBB) {
97
if (MBB.empty() || !MBB.front().isPHI())
98
return false; // Quick exit for basic blocks without PHIs.
100
// Get an iterator to the first instruction after the last PHI node (this may
101
// also be the end of the basic block).
102
MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
104
while (MBB.front().isPHI())
105
LowerAtomicPHINode(MBB, AfterPHIsIt);
110
/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
111
/// are implicit_def's.
112
static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
113
const MachineRegisterInfo *MRI) {
114
for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
115
unsigned SrcReg = MPhi->getOperand(i).getReg();
116
const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
117
if (!DefMI || !DefMI->isImplicitDef())
123
// FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg
124
// when following the CFG edge to SuccMBB. This needs to be after any def of
125
// SrcReg, but before any subsequent point where control flow might jump out of
127
MachineBasicBlock::iterator
128
llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB,
129
MachineBasicBlock &SuccMBB,
131
// Handle the trivial case trivially.
135
// Usually, we just want to insert the copy before the first terminator
136
// instruction. However, for the edge going to a landing pad, we must insert
137
// the copy before the call/invoke instruction.
138
if (!SuccMBB.isLandingPad())
139
return MBB.getFirstTerminator();
141
// Discover any defs/uses in this basic block.
142
SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
143
for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
144
RE = MRI->reg_end(); RI != RE; ++RI) {
145
MachineInstr *DefUseMI = &*RI;
146
if (DefUseMI->getParent() == &MBB)
147
DefUsesInMBB.insert(DefUseMI);
150
MachineBasicBlock::iterator InsertPoint;
151
if (DefUsesInMBB.empty()) {
152
// No defs. Insert the copy at the start of the basic block.
153
InsertPoint = MBB.begin();
154
} else if (DefUsesInMBB.size() == 1) {
155
// Insert the copy immediately after the def/use.
156
InsertPoint = *DefUsesInMBB.begin();
159
// Insert the copy immediately after the last def/use.
160
InsertPoint = MBB.end();
161
while (!DefUsesInMBB.count(&*--InsertPoint)) {}
165
// Make sure the copy goes after any phi nodes however.
166
return SkipPHIsAndLabels(MBB, InsertPoint);
169
/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
170
/// under the assuption that it needs to be lowered in a way that supports
171
/// atomic execution of PHIs. This lowering method is always correct all of the
174
void llvm::PHIElimination::LowerAtomicPHINode(
175
MachineBasicBlock &MBB,
176
MachineBasicBlock::iterator AfterPHIsIt) {
178
// Unlink the PHI node from the basic block, but don't delete the PHI yet.
179
MachineInstr *MPhi = MBB.remove(MBB.begin());
181
unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
182
unsigned DestReg = MPhi->getOperand(0).getReg();
183
bool isDead = MPhi->getOperand(0).isDead();
185
// Create a new register for the incoming PHI arguments.
186
MachineFunction &MF = *MBB.getParent();
187
const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
188
unsigned IncomingReg = 0;
189
bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI?
191
// Insert a register to register copy at the top of the current block (but
192
// after any remaining phi nodes) which copies the new incoming register
193
// into the phi node destination.
194
const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
195
if (isSourceDefinedByImplicitDef(MPhi, MRI))
196
// If all sources of a PHI node are implicit_def, just emit an
197
// implicit_def instead of a copy.
198
BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
199
TII->get(TargetOpcode::IMPLICIT_DEF), DestReg);
201
// Can we reuse an earlier PHI node? This only happens for critical edges,
202
// typically those created by tail duplication.
203
unsigned &entry = LoweredPHIs[MPhi];
205
// An identical PHI node was already lowered. Reuse the incoming register.
207
reusedIncoming = true;
209
DEBUG(dbgs() << "Reusing %reg" << IncomingReg << " for " << *MPhi);
211
entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
213
TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
216
// Update live variable information if there is any.
217
LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
219
MachineInstr *PHICopy = prior(AfterPHIsIt);
222
LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg);
224
// Increment use count of the newly created virtual register.
226
LV->setPHIJoin(IncomingReg);
228
// When we are reusing the incoming register, it may already have been
229
// killed in this block. The old kill will also have been inserted at
230
// AfterPHIsIt, so it appears before the current PHICopy.
232
if (MachineInstr *OldKill = VI.findKill(&MBB)) {
233
DEBUG(dbgs() << "Remove old kill from " << *OldKill);
234
LV->removeVirtualRegisterKilled(IncomingReg, OldKill);
238
// Add information to LiveVariables to know that the incoming value is
239
// killed. Note that because the value is defined in several places (once
240
// each for each incoming block), the "def" block and instruction fields
241
// for the VarInfo is not filled in.
242
LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
245
// Since we are going to be deleting the PHI node, if it is the last use of
246
// any registers, or if the value itself is dead, we need to move this
247
// information over to the new copy we just inserted.
248
LV->removeVirtualRegistersKilled(MPhi);
250
// If the result is dead, update LV.
252
LV->addVirtualRegisterDead(DestReg, PHICopy);
253
LV->removeVirtualRegisterDead(DestReg, MPhi);
257
// Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
258
for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
259
--VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(),
260
MPhi->getOperand(i).getReg())];
262
// Now loop over all of the incoming arguments, changing them to copy into the
263
// IncomingReg register in the corresponding predecessor basic block.
264
SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
265
for (int i = NumSrcs - 1; i >= 0; --i) {
266
unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
267
assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
268
"Machine PHI Operands must all be virtual registers!");
270
// Get the MachineBasicBlock equivalent of the BasicBlock that is the source
272
MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
274
// If source is defined by an implicit def, there is no need to insert a
276
MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
277
if (DefMI->isImplicitDef()) {
278
ImpDefs.insert(DefMI);
282
// Check to make sure we haven't already emitted the copy for this block.
283
// This can happen because PHI nodes may have multiple entries for the same
285
if (!MBBsInsertedInto.insert(&opBlock))
286
continue; // If the copy has already been emitted, we're done.
288
// Find a safe location to insert the copy, this may be the first terminator
289
// in the block (or end()).
290
MachineBasicBlock::iterator InsertPos =
291
FindCopyInsertPoint(opBlock, MBB, SrcReg);
294
if (!reusedIncoming && IncomingReg)
295
TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
297
// Now update live variable information if we have it. Otherwise we're done
300
// We want to be able to insert a kill of the register if this PHI (aka, the
301
// copy we just inserted) is the last use of the source value. Live
302
// variable analysis conservatively handles this by saying that the value is
303
// live until the end of the block the PHI entry lives in. If the value
304
// really is dead at the PHI copy, there will be no successor blocks which
305
// have the value live-in.
307
// Also check to see if this register is in use by another PHI node which
308
// has not yet been eliminated. If so, it will be killed at an appropriate
311
// Is it used by any PHI instructions in this block?
312
bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)];
314
// Okay, if we now know that the value is not live out of the block, we can
315
// add a kill marker in this block saying that it kills the incoming value!
316
if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) {
317
// In our final twist, we have to decide which instruction kills the
318
// register. In most cases this is the copy, however, the first
319
// terminator instruction at the end of the block may also use the value.
320
// In this case, we should mark *it* as being the killing block, not the
322
MachineBasicBlock::iterator KillInst;
323
MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
324
if (Term != opBlock.end() && Term->readsRegister(SrcReg)) {
327
// Check that no other terminators use values.
329
for (MachineBasicBlock::iterator TI = llvm::next(Term);
330
TI != opBlock.end(); ++TI) {
331
assert(!TI->readsRegister(SrcReg) &&
332
"Terminator instructions cannot use virtual registers unless"
333
"they are the first terminator in a block!");
336
} else if (reusedIncoming || !IncomingReg) {
337
// We may have to rewind a bit if we didn't insert a copy this time.
339
while (KillInst != opBlock.begin())
340
if ((--KillInst)->readsRegister(SrcReg))
343
// We just inserted this copy.
344
KillInst = prior(InsertPos);
346
assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction");
348
// Finally, mark it killed.
349
LV->addVirtualRegisterKilled(SrcReg, KillInst);
351
// This vreg no longer lives all of the way through opBlock.
352
unsigned opBlockNum = opBlock.getNumber();
353
LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum);
357
// Really delete the PHI instruction now, if it is not in the LoweredPHIs map.
358
if (reusedIncoming || !IncomingReg)
359
MF.DeleteMachineInstr(MPhi);
362
/// analyzePHINodes - Gather information about the PHI nodes in here. In
363
/// particular, we want to map the number of uses of a virtual register which is
364
/// used in a PHI node. We map that to the BB the vreg is coming from. This is
365
/// used later to determine when the vreg is killed in the BB.
367
void llvm::PHIElimination::analyzePHINodes(const MachineFunction& Fn) {
368
for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
370
for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
371
BBI != BBE && BBI->isPHI(); ++BBI)
372
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
373
++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(),
374
BBI->getOperand(i).getReg())];
377
bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF,
378
MachineBasicBlock &MBB,
380
if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad())
381
return false; // Quick exit for basic blocks without PHIs.
383
for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
384
BBI != BBE && BBI->isPHI(); ++BBI) {
385
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
386
unsigned Reg = BBI->getOperand(i).getReg();
387
MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB();
388
// We break edges when registers are live out from the predecessor block
389
// (not considering PHI nodes). If the register is live in to this block
390
// anyway, we would gain nothing from splitting.
391
if (!LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB))
392
SplitCriticalEdge(PreMBB, &MBB);
398
MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A,
399
MachineBasicBlock *B) {
400
assert(A && B && "Missing MBB end point");
402
MachineFunction *MF = A->getParent();
404
// We may need to update A's terminator, but we can't do that if AnalyzeBranch
405
// fails. If A uses a jump table, we won't touch it.
406
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
407
MachineBasicBlock *TBB = 0, *FBB = 0;
408
SmallVector<MachineOperand, 4> Cond;
409
if (TII->AnalyzeBranch(*A, TBB, FBB, Cond))
414
MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
415
MF->insert(llvm::next(MachineFunction::iterator(A)), NMBB);
416
DEBUG(dbgs() << "PHIElimination splitting critical edge:"
417
" BB#" << A->getNumber()
418
<< " -- BB#" << NMBB->getNumber()
419
<< " -- BB#" << B->getNumber() << '\n');
421
A->ReplaceUsesOfBlockWith(B, NMBB);
422
A->updateTerminator();
424
// Insert unconditional "jump B" instruction in NMBB if necessary.
425
NMBB->addSuccessor(B);
426
if (!NMBB->isLayoutSuccessor(B)) {
428
MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond);
431
// Fix PHI nodes in B so they refer to NMBB instead of A
432
for (MachineBasicBlock::iterator i = B->begin(), e = B->end();
433
i != e && i->isPHI(); ++i)
434
for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
435
if (i->getOperand(ni+1).getMBB() == A)
436
i->getOperand(ni+1).setMBB(NMBB);
438
if (LiveVariables *LV=getAnalysisIfAvailable<LiveVariables>())
439
LV->addNewBlock(NMBB, A, B);
441
if (MachineDominatorTree *MDT=getAnalysisIfAvailable<MachineDominatorTree>())
442
MDT->addNewBlock(NMBB, A);
added
removed
libclamav/c++/llvm/lib/CodeGen/PHIElimination.cpp
