1
; RUN: llc < %s -march=ppc32
2
; ModuleID = 'Atomics.c'
3
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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target triple = "powerpc-apple-darwin9"
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@sc = common global i8 0 ; <i8*> [#uses=52]
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@uc = common global i8 0 ; <i8*> [#uses=100]
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@ss = common global i16 0 ; <i16*> [#uses=15]
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@us = common global i16 0 ; <i16*> [#uses=15]
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@si = common global i32 0 ; <i32*> [#uses=15]
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@ui = common global i32 0 ; <i32*> [#uses=23]
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@sl = common global i32 0 ; <i32*> [#uses=15]
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@ul = common global i32 0 ; <i32*> [#uses=15]
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@sll = common global i64 0, align 8 ; <i64*> [#uses=1]
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@ull = common global i64 0, align 8 ; <i64*> [#uses=1]
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define void @test_op_ignore() nounwind {
18
call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=0]
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call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=0]
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
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call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=0]
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
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call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=0]
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=0]
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bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=0]
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %10, i32 1 ) ; <i32>:11 [#uses=0]
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %12, i32 1 ) ; <i32>:13 [#uses=0]
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call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:14 [#uses=0]
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call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:15 [#uses=0]
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
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call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 1 ) ; <i16>:17 [#uses=0]
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
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call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 1 ) ; <i16>:19 [#uses=0]
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 1 ) ; <i32>:21 [#uses=0]
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bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 1 ) ; <i32>:23 [#uses=0]
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:24 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 1 ) ; <i32>:25 [#uses=0]
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:26 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 1 ) ; <i32>:27 [#uses=0]
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call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:28 [#uses=0]
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call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:29 [#uses=0]
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
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call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 1 ) ; <i16>:31 [#uses=0]
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
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call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 1 ) ; <i16>:33 [#uses=0]
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
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call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 1 ) ; <i32>:35 [#uses=0]
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bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
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call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 1 ) ; <i32>:37 [#uses=0]
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:38 [#uses=1]
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call i32 @llvm.atomic.load.or.i32.p0i32( i32* %38, i32 1 ) ; <i32>:39 [#uses=0]
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
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call i32 @llvm.atomic.load.or.i32.p0i32( i32* %40, i32 1 ) ; <i32>:41 [#uses=0]
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call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:42 [#uses=0]
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call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:43 [#uses=0]
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
63
call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 1 ) ; <i16>:45 [#uses=0]
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
65
call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 1 ) ; <i16>:47 [#uses=0]
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
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call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 1 ) ; <i32>:49 [#uses=0]
68
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
69
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 1 ) ; <i32>:51 [#uses=0]
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:52 [#uses=1]
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call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %52, i32 1 ) ; <i32>:53 [#uses=0]
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:54 [#uses=1]
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call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %54, i32 1 ) ; <i32>:55 [#uses=0]
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call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:56 [#uses=0]
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call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:57 [#uses=0]
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
77
call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 1 ) ; <i16>:59 [#uses=0]
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
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call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 1 ) ; <i16>:61 [#uses=0]
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
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call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 1 ) ; <i32>:63 [#uses=0]
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bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
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call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 1 ) ; <i32>:65 [#uses=0]
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:66 [#uses=1]
85
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %66, i32 1 ) ; <i32>:67 [#uses=0]
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:68 [#uses=1]
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call i32 @llvm.atomic.load.and.i32.p0i32( i32* %68, i32 1 ) ; <i32>:69 [#uses=0]
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call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:70 [#uses=0]
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call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:71 [#uses=0]
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
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call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 1 ) ; <i16>:73 [#uses=0]
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
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call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 1 ) ; <i16>:75 [#uses=0]
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
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call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 1 ) ; <i32>:77 [#uses=0]
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bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
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call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 1 ) ; <i32>:79 [#uses=0]
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:80 [#uses=1]
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call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %80, i32 1 ) ; <i32>:81 [#uses=0]
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:82 [#uses=1]
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call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %82, i32 1 ) ; <i32>:83 [#uses=0]
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return: ; preds = %entry
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declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) nounwind
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declare i16 @llvm.atomic.load.add.i16.p0i16(i16*, i16) nounwind
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declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
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declare i8 @llvm.atomic.load.sub.i8.p0i8(i8*, i8) nounwind
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declare i16 @llvm.atomic.load.sub.i16.p0i16(i16*, i16) nounwind
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declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
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declare i8 @llvm.atomic.load.or.i8.p0i8(i8*, i8) nounwind
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declare i16 @llvm.atomic.load.or.i16.p0i16(i16*, i16) nounwind
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declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
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declare i8 @llvm.atomic.load.xor.i8.p0i8(i8*, i8) nounwind
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declare i16 @llvm.atomic.load.xor.i16.p0i16(i16*, i16) nounwind
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declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
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declare i8 @llvm.atomic.load.and.i8.p0i8(i8*, i8) nounwind
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declare i16 @llvm.atomic.load.and.i16.p0i16(i16*, i16) nounwind
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declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
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declare i8 @llvm.atomic.load.nand.i8.p0i8(i8*, i8) nounwind
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declare i16 @llvm.atomic.load.nand.i16.p0i16(i16*, i16) nounwind
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declare i32 @llvm.atomic.load.nand.i32.p0i32(i32*, i32) nounwind
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define void @test_fetch_and_op() nounwind {
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call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:0 [#uses=1]
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store i8 %0, i8* @sc, align 1
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call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:1 [#uses=1]
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store i8 %1, i8* @uc, align 1
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
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call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 11 ) ; <i16>:3 [#uses=1]
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store i16 %3, i16* @ss, align 2
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
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call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 11 ) ; <i16>:5 [#uses=1]
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store i16 %5, i16* @us, align 2
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 11 ) ; <i32>:7 [#uses=1]
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store i32 %7, i32* @si, align 4
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bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 11 ) ; <i32>:9 [#uses=1]
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store i32 %9, i32* @ui, align 4
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %10, i32 11 ) ; <i32>:11 [#uses=1]
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store i32 %11, i32* @sl, align 4
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
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call i32 @llvm.atomic.load.add.i32.p0i32( i32* %12, i32 11 ) ; <i32>:13 [#uses=1]
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store i32 %13, i32* @ul, align 4
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call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:14 [#uses=1]
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store i8 %14, i8* @sc, align 1
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call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:15 [#uses=1]
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store i8 %15, i8* @uc, align 1
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
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call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 11 ) ; <i16>:17 [#uses=1]
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store i16 %17, i16* @ss, align 2
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
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call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 11 ) ; <i16>:19 [#uses=1]
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store i16 %19, i16* @us, align 2
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bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 11 ) ; <i32>:21 [#uses=1]
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store i32 %21, i32* @si, align 4
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bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 11 ) ; <i32>:23 [#uses=1]
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store i32 %23, i32* @ui, align 4
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bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:24 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 11 ) ; <i32>:25 [#uses=1]
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store i32 %25, i32* @sl, align 4
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bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:26 [#uses=1]
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call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 11 ) ; <i32>:27 [#uses=1]
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store i32 %27, i32* @ul, align 4
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call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:28 [#uses=1]
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store i8 %28, i8* @sc, align 1
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call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:29 [#uses=1]
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store i8 %29, i8* @uc, align 1
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bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
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call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 11 ) ; <i16>:31 [#uses=1]
196
store i16 %31, i16* @ss, align 2
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bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
198
call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 11 ) ; <i16>:33 [#uses=1]
199
store i16 %33, i16* @us, align 2
200
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
201
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 11 ) ; <i32>:35 [#uses=1]
202
store i32 %35, i32* @si, align 4
203
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
204
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 11 ) ; <i32>:37 [#uses=1]
205
store i32 %37, i32* @ui, align 4
206
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:38 [#uses=1]
207
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %38, i32 11 ) ; <i32>:39 [#uses=1]
208
store i32 %39, i32* @sl, align 4
209
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
210
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %40, i32 11 ) ; <i32>:41 [#uses=1]
211
store i32 %41, i32* @ul, align 4
212
call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:42 [#uses=1]
213
store i8 %42, i8* @sc, align 1
214
call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:43 [#uses=1]
215
store i8 %43, i8* @uc, align 1
216
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
217
call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 11 ) ; <i16>:45 [#uses=1]
218
store i16 %45, i16* @ss, align 2
219
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
220
call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 11 ) ; <i16>:47 [#uses=1]
221
store i16 %47, i16* @us, align 2
222
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
223
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 11 ) ; <i32>:49 [#uses=1]
224
store i32 %49, i32* @si, align 4
225
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
226
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 11 ) ; <i32>:51 [#uses=1]
227
store i32 %51, i32* @ui, align 4
228
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:52 [#uses=1]
229
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %52, i32 11 ) ; <i32>:53 [#uses=1]
230
store i32 %53, i32* @sl, align 4
231
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:54 [#uses=1]
232
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %54, i32 11 ) ; <i32>:55 [#uses=1]
233
store i32 %55, i32* @ul, align 4
234
call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:56 [#uses=1]
235
store i8 %56, i8* @sc, align 1
236
call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:57 [#uses=1]
237
store i8 %57, i8* @uc, align 1
238
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
239
call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 11 ) ; <i16>:59 [#uses=1]
240
store i16 %59, i16* @ss, align 2
241
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
242
call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 11 ) ; <i16>:61 [#uses=1]
243
store i16 %61, i16* @us, align 2
244
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
245
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 11 ) ; <i32>:63 [#uses=1]
246
store i32 %63, i32* @si, align 4
247
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
248
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 11 ) ; <i32>:65 [#uses=1]
249
store i32 %65, i32* @ui, align 4
250
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:66 [#uses=1]
251
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %66, i32 11 ) ; <i32>:67 [#uses=1]
252
store i32 %67, i32* @sl, align 4
253
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:68 [#uses=1]
254
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %68, i32 11 ) ; <i32>:69 [#uses=1]
255
store i32 %69, i32* @ul, align 4
256
call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:70 [#uses=1]
257
store i8 %70, i8* @sc, align 1
258
call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:71 [#uses=1]
259
store i8 %71, i8* @uc, align 1
260
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
261
call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 11 ) ; <i16>:73 [#uses=1]
262
store i16 %73, i16* @ss, align 2
263
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
264
call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 11 ) ; <i16>:75 [#uses=1]
265
store i16 %75, i16* @us, align 2
266
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
267
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 11 ) ; <i32>:77 [#uses=1]
268
store i32 %77, i32* @si, align 4
269
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
270
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 11 ) ; <i32>:79 [#uses=1]
271
store i32 %79, i32* @ui, align 4
272
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:80 [#uses=1]
273
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %80, i32 11 ) ; <i32>:81 [#uses=1]
274
store i32 %81, i32* @sl, align 4
275
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:82 [#uses=1]
276
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %82, i32 11 ) ; <i32>:83 [#uses=1]
277
store i32 %83, i32* @ul, align 4
280
return: ; preds = %entry
284
define void @test_op_and_fetch() nounwind {
286
load i8* @uc, align 1 ; <i8>:0 [#uses=2]
287
call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 %0 ) ; <i8>:1 [#uses=1]
288
add i8 %1, %0 ; <i8>:2 [#uses=1]
289
store i8 %2, i8* @sc, align 1
290
load i8* @uc, align 1 ; <i8>:3 [#uses=2]
291
call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 %3 ) ; <i8>:4 [#uses=1]
292
add i8 %4, %3 ; <i8>:5 [#uses=1]
293
store i8 %5, i8* @uc, align 1
294
load i8* @uc, align 1 ; <i8>:6 [#uses=1]
295
zext i8 %6 to i16 ; <i16>:7 [#uses=2]
296
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:8 [#uses=1]
297
call i16 @llvm.atomic.load.add.i16.p0i16( i16* %8, i16 %7 ) ; <i16>:9 [#uses=1]
298
add i16 %9, %7 ; <i16>:10 [#uses=1]
299
store i16 %10, i16* @ss, align 2
300
load i8* @uc, align 1 ; <i8>:11 [#uses=1]
301
zext i8 %11 to i16 ; <i16>:12 [#uses=2]
302
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:13 [#uses=1]
303
call i16 @llvm.atomic.load.add.i16.p0i16( i16* %13, i16 %12 ) ; <i16>:14 [#uses=1]
304
add i16 %14, %12 ; <i16>:15 [#uses=1]
305
store i16 %15, i16* @us, align 2
306
load i8* @uc, align 1 ; <i8>:16 [#uses=1]
307
zext i8 %16 to i32 ; <i32>:17 [#uses=2]
308
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:18 [#uses=1]
309
call i32 @llvm.atomic.load.add.i32.p0i32( i32* %18, i32 %17 ) ; <i32>:19 [#uses=1]
310
add i32 %19, %17 ; <i32>:20 [#uses=1]
311
store i32 %20, i32* @si, align 4
312
load i8* @uc, align 1 ; <i8>:21 [#uses=1]
313
zext i8 %21 to i32 ; <i32>:22 [#uses=2]
314
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:23 [#uses=1]
315
call i32 @llvm.atomic.load.add.i32.p0i32( i32* %23, i32 %22 ) ; <i32>:24 [#uses=1]
316
add i32 %24, %22 ; <i32>:25 [#uses=1]
317
store i32 %25, i32* @ui, align 4
318
load i8* @uc, align 1 ; <i8>:26 [#uses=1]
319
zext i8 %26 to i32 ; <i32>:27 [#uses=2]
320
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:28 [#uses=1]
321
call i32 @llvm.atomic.load.add.i32.p0i32( i32* %28, i32 %27 ) ; <i32>:29 [#uses=1]
322
add i32 %29, %27 ; <i32>:30 [#uses=1]
323
store i32 %30, i32* @sl, align 4
324
load i8* @uc, align 1 ; <i8>:31 [#uses=1]
325
zext i8 %31 to i32 ; <i32>:32 [#uses=2]
326
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:33 [#uses=1]
327
call i32 @llvm.atomic.load.add.i32.p0i32( i32* %33, i32 %32 ) ; <i32>:34 [#uses=1]
328
add i32 %34, %32 ; <i32>:35 [#uses=1]
329
store i32 %35, i32* @ul, align 4
330
load i8* @uc, align 1 ; <i8>:36 [#uses=2]
331
call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 %36 ) ; <i8>:37 [#uses=1]
332
sub i8 %37, %36 ; <i8>:38 [#uses=1]
333
store i8 %38, i8* @sc, align 1
334
load i8* @uc, align 1 ; <i8>:39 [#uses=2]
335
call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 %39 ) ; <i8>:40 [#uses=1]
336
sub i8 %40, %39 ; <i8>:41 [#uses=1]
337
store i8 %41, i8* @uc, align 1
338
load i8* @uc, align 1 ; <i8>:42 [#uses=1]
339
zext i8 %42 to i16 ; <i16>:43 [#uses=2]
340
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
341
call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %44, i16 %43 ) ; <i16>:45 [#uses=1]
342
sub i16 %45, %43 ; <i16>:46 [#uses=1]
343
store i16 %46, i16* @ss, align 2
344
load i8* @uc, align 1 ; <i8>:47 [#uses=1]
345
zext i8 %47 to i16 ; <i16>:48 [#uses=2]
346
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:49 [#uses=1]
347
call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %49, i16 %48 ) ; <i16>:50 [#uses=1]
348
sub i16 %50, %48 ; <i16>:51 [#uses=1]
349
store i16 %51, i16* @us, align 2
350
load i8* @uc, align 1 ; <i8>:52 [#uses=1]
351
zext i8 %52 to i32 ; <i32>:53 [#uses=2]
352
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:54 [#uses=1]
353
call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %54, i32 %53 ) ; <i32>:55 [#uses=1]
354
sub i32 %55, %53 ; <i32>:56 [#uses=1]
355
store i32 %56, i32* @si, align 4
356
load i8* @uc, align 1 ; <i8>:57 [#uses=1]
357
zext i8 %57 to i32 ; <i32>:58 [#uses=2]
358
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:59 [#uses=1]
359
call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %59, i32 %58 ) ; <i32>:60 [#uses=1]
360
sub i32 %60, %58 ; <i32>:61 [#uses=1]
361
store i32 %61, i32* @ui, align 4
362
load i8* @uc, align 1 ; <i8>:62 [#uses=1]
363
zext i8 %62 to i32 ; <i32>:63 [#uses=2]
364
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:64 [#uses=1]
365
call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %64, i32 %63 ) ; <i32>:65 [#uses=1]
366
sub i32 %65, %63 ; <i32>:66 [#uses=1]
367
store i32 %66, i32* @sl, align 4
368
load i8* @uc, align 1 ; <i8>:67 [#uses=1]
369
zext i8 %67 to i32 ; <i32>:68 [#uses=2]
370
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:69 [#uses=1]
371
call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %69, i32 %68 ) ; <i32>:70 [#uses=1]
372
sub i32 %70, %68 ; <i32>:71 [#uses=1]
373
store i32 %71, i32* @ul, align 4
374
load i8* @uc, align 1 ; <i8>:72 [#uses=2]
375
call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 %72 ) ; <i8>:73 [#uses=1]
376
or i8 %73, %72 ; <i8>:74 [#uses=1]
377
store i8 %74, i8* @sc, align 1
378
load i8* @uc, align 1 ; <i8>:75 [#uses=2]
379
call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 %75 ) ; <i8>:76 [#uses=1]
380
or i8 %76, %75 ; <i8>:77 [#uses=1]
381
store i8 %77, i8* @uc, align 1
382
load i8* @uc, align 1 ; <i8>:78 [#uses=1]
383
zext i8 %78 to i16 ; <i16>:79 [#uses=2]
384
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:80 [#uses=1]
385
call i16 @llvm.atomic.load.or.i16.p0i16( i16* %80, i16 %79 ) ; <i16>:81 [#uses=1]
386
or i16 %81, %79 ; <i16>:82 [#uses=1]
387
store i16 %82, i16* @ss, align 2
388
load i8* @uc, align 1 ; <i8>:83 [#uses=1]
389
zext i8 %83 to i16 ; <i16>:84 [#uses=2]
390
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:85 [#uses=1]
391
call i16 @llvm.atomic.load.or.i16.p0i16( i16* %85, i16 %84 ) ; <i16>:86 [#uses=1]
392
or i16 %86, %84 ; <i16>:87 [#uses=1]
393
store i16 %87, i16* @us, align 2
394
load i8* @uc, align 1 ; <i8>:88 [#uses=1]
395
zext i8 %88 to i32 ; <i32>:89 [#uses=2]
396
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:90 [#uses=1]
397
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %90, i32 %89 ) ; <i32>:91 [#uses=1]
398
or i32 %91, %89 ; <i32>:92 [#uses=1]
399
store i32 %92, i32* @si, align 4
400
load i8* @uc, align 1 ; <i8>:93 [#uses=1]
401
zext i8 %93 to i32 ; <i32>:94 [#uses=2]
402
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:95 [#uses=1]
403
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %95, i32 %94 ) ; <i32>:96 [#uses=1]
404
or i32 %96, %94 ; <i32>:97 [#uses=1]
405
store i32 %97, i32* @ui, align 4
406
load i8* @uc, align 1 ; <i8>:98 [#uses=1]
407
zext i8 %98 to i32 ; <i32>:99 [#uses=2]
408
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:100 [#uses=1]
409
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %100, i32 %99 ) ; <i32>:101 [#uses=1]
410
or i32 %101, %99 ; <i32>:102 [#uses=1]
411
store i32 %102, i32* @sl, align 4
412
load i8* @uc, align 1 ; <i8>:103 [#uses=1]
413
zext i8 %103 to i32 ; <i32>:104 [#uses=2]
414
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:105 [#uses=1]
415
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %105, i32 %104 ) ; <i32>:106 [#uses=1]
416
or i32 %106, %104 ; <i32>:107 [#uses=1]
417
store i32 %107, i32* @ul, align 4
418
load i8* @uc, align 1 ; <i8>:108 [#uses=2]
419
call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 %108 ) ; <i8>:109 [#uses=1]
420
xor i8 %109, %108 ; <i8>:110 [#uses=1]
421
store i8 %110, i8* @sc, align 1
422
load i8* @uc, align 1 ; <i8>:111 [#uses=2]
423
call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 %111 ) ; <i8>:112 [#uses=1]
424
xor i8 %112, %111 ; <i8>:113 [#uses=1]
425
store i8 %113, i8* @uc, align 1
426
load i8* @uc, align 1 ; <i8>:114 [#uses=1]
427
zext i8 %114 to i16 ; <i16>:115 [#uses=2]
428
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:116 [#uses=1]
429
call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %116, i16 %115 ) ; <i16>:117 [#uses=1]
430
xor i16 %117, %115 ; <i16>:118 [#uses=1]
431
store i16 %118, i16* @ss, align 2
432
load i8* @uc, align 1 ; <i8>:119 [#uses=1]
433
zext i8 %119 to i16 ; <i16>:120 [#uses=2]
434
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:121 [#uses=1]
435
call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %121, i16 %120 ) ; <i16>:122 [#uses=1]
436
xor i16 %122, %120 ; <i16>:123 [#uses=1]
437
store i16 %123, i16* @us, align 2
438
load i8* @uc, align 1 ; <i8>:124 [#uses=1]
439
zext i8 %124 to i32 ; <i32>:125 [#uses=2]
440
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:126 [#uses=1]
441
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %126, i32 %125 ) ; <i32>:127 [#uses=1]
442
xor i32 %127, %125 ; <i32>:128 [#uses=1]
443
store i32 %128, i32* @si, align 4
444
load i8* @uc, align 1 ; <i8>:129 [#uses=1]
445
zext i8 %129 to i32 ; <i32>:130 [#uses=2]
446
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:131 [#uses=1]
447
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %131, i32 %130 ) ; <i32>:132 [#uses=1]
448
xor i32 %132, %130 ; <i32>:133 [#uses=1]
449
store i32 %133, i32* @ui, align 4
450
load i8* @uc, align 1 ; <i8>:134 [#uses=1]
451
zext i8 %134 to i32 ; <i32>:135 [#uses=2]
452
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:136 [#uses=1]
453
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %136, i32 %135 ) ; <i32>:137 [#uses=1]
454
xor i32 %137, %135 ; <i32>:138 [#uses=1]
455
store i32 %138, i32* @sl, align 4
456
load i8* @uc, align 1 ; <i8>:139 [#uses=1]
457
zext i8 %139 to i32 ; <i32>:140 [#uses=2]
458
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:141 [#uses=1]
459
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %141, i32 %140 ) ; <i32>:142 [#uses=1]
460
xor i32 %142, %140 ; <i32>:143 [#uses=1]
461
store i32 %143, i32* @ul, align 4
462
load i8* @uc, align 1 ; <i8>:144 [#uses=2]
463
call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 %144 ) ; <i8>:145 [#uses=1]
464
and i8 %145, %144 ; <i8>:146 [#uses=1]
465
store i8 %146, i8* @sc, align 1
466
load i8* @uc, align 1 ; <i8>:147 [#uses=2]
467
call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 %147 ) ; <i8>:148 [#uses=1]
468
and i8 %148, %147 ; <i8>:149 [#uses=1]
469
store i8 %149, i8* @uc, align 1
470
load i8* @uc, align 1 ; <i8>:150 [#uses=1]
471
zext i8 %150 to i16 ; <i16>:151 [#uses=2]
472
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:152 [#uses=1]
473
call i16 @llvm.atomic.load.and.i16.p0i16( i16* %152, i16 %151 ) ; <i16>:153 [#uses=1]
474
and i16 %153, %151 ; <i16>:154 [#uses=1]
475
store i16 %154, i16* @ss, align 2
476
load i8* @uc, align 1 ; <i8>:155 [#uses=1]
477
zext i8 %155 to i16 ; <i16>:156 [#uses=2]
478
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:157 [#uses=1]
479
call i16 @llvm.atomic.load.and.i16.p0i16( i16* %157, i16 %156 ) ; <i16>:158 [#uses=1]
480
and i16 %158, %156 ; <i16>:159 [#uses=1]
481
store i16 %159, i16* @us, align 2
482
load i8* @uc, align 1 ; <i8>:160 [#uses=1]
483
zext i8 %160 to i32 ; <i32>:161 [#uses=2]
484
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:162 [#uses=1]
485
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %162, i32 %161 ) ; <i32>:163 [#uses=1]
486
and i32 %163, %161 ; <i32>:164 [#uses=1]
487
store i32 %164, i32* @si, align 4
488
load i8* @uc, align 1 ; <i8>:165 [#uses=1]
489
zext i8 %165 to i32 ; <i32>:166 [#uses=2]
490
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:167 [#uses=1]
491
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %167, i32 %166 ) ; <i32>:168 [#uses=1]
492
and i32 %168, %166 ; <i32>:169 [#uses=1]
493
store i32 %169, i32* @ui, align 4
494
load i8* @uc, align 1 ; <i8>:170 [#uses=1]
495
zext i8 %170 to i32 ; <i32>:171 [#uses=2]
496
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:172 [#uses=1]
497
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %172, i32 %171 ) ; <i32>:173 [#uses=1]
498
and i32 %173, %171 ; <i32>:174 [#uses=1]
499
store i32 %174, i32* @sl, align 4
500
load i8* @uc, align 1 ; <i8>:175 [#uses=1]
501
zext i8 %175 to i32 ; <i32>:176 [#uses=2]
502
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:177 [#uses=1]
503
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %177, i32 %176 ) ; <i32>:178 [#uses=1]
504
and i32 %178, %176 ; <i32>:179 [#uses=1]
505
store i32 %179, i32* @ul, align 4
506
load i8* @uc, align 1 ; <i8>:180 [#uses=2]
507
call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 %180 ) ; <i8>:181 [#uses=1]
508
xor i8 %181, -1 ; <i8>:182 [#uses=1]
509
and i8 %182, %180 ; <i8>:183 [#uses=1]
510
store i8 %183, i8* @sc, align 1
511
load i8* @uc, align 1 ; <i8>:184 [#uses=2]
512
call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 %184 ) ; <i8>:185 [#uses=1]
513
xor i8 %185, -1 ; <i8>:186 [#uses=1]
514
and i8 %186, %184 ; <i8>:187 [#uses=1]
515
store i8 %187, i8* @uc, align 1
516
load i8* @uc, align 1 ; <i8>:188 [#uses=1]
517
zext i8 %188 to i16 ; <i16>:189 [#uses=2]
518
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:190 [#uses=1]
519
call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %190, i16 %189 ) ; <i16>:191 [#uses=1]
520
xor i16 %191, -1 ; <i16>:192 [#uses=1]
521
and i16 %192, %189 ; <i16>:193 [#uses=1]
522
store i16 %193, i16* @ss, align 2
523
load i8* @uc, align 1 ; <i8>:194 [#uses=1]
524
zext i8 %194 to i16 ; <i16>:195 [#uses=2]
525
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:196 [#uses=1]
526
call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %196, i16 %195 ) ; <i16>:197 [#uses=1]
527
xor i16 %197, -1 ; <i16>:198 [#uses=1]
528
and i16 %198, %195 ; <i16>:199 [#uses=1]
529
store i16 %199, i16* @us, align 2
530
load i8* @uc, align 1 ; <i8>:200 [#uses=1]
531
zext i8 %200 to i32 ; <i32>:201 [#uses=2]
532
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:202 [#uses=1]
533
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %202, i32 %201 ) ; <i32>:203 [#uses=1]
534
xor i32 %203, -1 ; <i32>:204 [#uses=1]
535
and i32 %204, %201 ; <i32>:205 [#uses=1]
536
store i32 %205, i32* @si, align 4
537
load i8* @uc, align 1 ; <i8>:206 [#uses=1]
538
zext i8 %206 to i32 ; <i32>:207 [#uses=2]
539
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:208 [#uses=1]
540
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %208, i32 %207 ) ; <i32>:209 [#uses=1]
541
xor i32 %209, -1 ; <i32>:210 [#uses=1]
542
and i32 %210, %207 ; <i32>:211 [#uses=1]
543
store i32 %211, i32* @ui, align 4
544
load i8* @uc, align 1 ; <i8>:212 [#uses=1]
545
zext i8 %212 to i32 ; <i32>:213 [#uses=2]
546
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:214 [#uses=1]
547
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %214, i32 %213 ) ; <i32>:215 [#uses=1]
548
xor i32 %215, -1 ; <i32>:216 [#uses=1]
549
and i32 %216, %213 ; <i32>:217 [#uses=1]
550
store i32 %217, i32* @sl, align 4
551
load i8* @uc, align 1 ; <i8>:218 [#uses=1]
552
zext i8 %218 to i32 ; <i32>:219 [#uses=2]
553
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:220 [#uses=1]
554
call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %220, i32 %219 ) ; <i32>:221 [#uses=1]
555
xor i32 %221, -1 ; <i32>:222 [#uses=1]
556
and i32 %222, %219 ; <i32>:223 [#uses=1]
557
store i32 %223, i32* @ul, align 4
560
return: ; preds = %entry
564
define void @test_compare_and_swap() nounwind {
566
load i8* @uc, align 1 ; <i8>:0 [#uses=1]
567
load i8* @sc, align 1 ; <i8>:1 [#uses=1]
568
call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %0, i8 %1 ) ; <i8>:2 [#uses=1]
569
store i8 %2, i8* @sc, align 1
570
load i8* @uc, align 1 ; <i8>:3 [#uses=1]
571
load i8* @sc, align 1 ; <i8>:4 [#uses=1]
572
call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %3, i8 %4 ) ; <i8>:5 [#uses=1]
573
store i8 %5, i8* @uc, align 1
574
load i8* @uc, align 1 ; <i8>:6 [#uses=1]
575
zext i8 %6 to i16 ; <i16>:7 [#uses=1]
576
load i8* @sc, align 1 ; <i8>:8 [#uses=1]
577
sext i8 %8 to i16 ; <i16>:9 [#uses=1]
578
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:10 [#uses=1]
579
call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %10, i16 %7, i16 %9 ) ; <i16>:11 [#uses=1]
580
store i16 %11, i16* @ss, align 2
581
load i8* @uc, align 1 ; <i8>:12 [#uses=1]
582
zext i8 %12 to i16 ; <i16>:13 [#uses=1]
583
load i8* @sc, align 1 ; <i8>:14 [#uses=1]
584
sext i8 %14 to i16 ; <i16>:15 [#uses=1]
585
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:16 [#uses=1]
586
call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %16, i16 %13, i16 %15 ) ; <i16>:17 [#uses=1]
587
store i16 %17, i16* @us, align 2
588
load i8* @uc, align 1 ; <i8>:18 [#uses=1]
589
zext i8 %18 to i32 ; <i32>:19 [#uses=1]
590
load i8* @sc, align 1 ; <i8>:20 [#uses=1]
591
sext i8 %20 to i32 ; <i32>:21 [#uses=1]
592
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:22 [#uses=1]
593
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %22, i32 %19, i32 %21 ) ; <i32>:23 [#uses=1]
594
store i32 %23, i32* @si, align 4
595
load i8* @uc, align 1 ; <i8>:24 [#uses=1]
596
zext i8 %24 to i32 ; <i32>:25 [#uses=1]
597
load i8* @sc, align 1 ; <i8>:26 [#uses=1]
598
sext i8 %26 to i32 ; <i32>:27 [#uses=1]
599
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:28 [#uses=1]
600
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %28, i32 %25, i32 %27 ) ; <i32>:29 [#uses=1]
601
store i32 %29, i32* @ui, align 4
602
load i8* @uc, align 1 ; <i8>:30 [#uses=1]
603
zext i8 %30 to i32 ; <i32>:31 [#uses=1]
604
load i8* @sc, align 1 ; <i8>:32 [#uses=1]
605
sext i8 %32 to i32 ; <i32>:33 [#uses=1]
606
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:34 [#uses=1]
607
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %34, i32 %31, i32 %33 ) ; <i32>:35 [#uses=1]
608
store i32 %35, i32* @sl, align 4
609
load i8* @uc, align 1 ; <i8>:36 [#uses=1]
610
zext i8 %36 to i32 ; <i32>:37 [#uses=1]
611
load i8* @sc, align 1 ; <i8>:38 [#uses=1]
612
sext i8 %38 to i32 ; <i32>:39 [#uses=1]
613
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
614
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %40, i32 %37, i32 %39 ) ; <i32>:41 [#uses=1]
615
store i32 %41, i32* @ul, align 4
616
load i8* @uc, align 1 ; <i8>:42 [#uses=2]
617
load i8* @sc, align 1 ; <i8>:43 [#uses=1]
618
call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %42, i8 %43 ) ; <i8>:44 [#uses=1]
619
icmp eq i8 %44, %42 ; <i1>:45 [#uses=1]
620
zext i1 %45 to i32 ; <i32>:46 [#uses=1]
621
store i32 %46, i32* @ui, align 4
622
load i8* @uc, align 1 ; <i8>:47 [#uses=2]
623
load i8* @sc, align 1 ; <i8>:48 [#uses=1]
624
call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %47, i8 %48 ) ; <i8>:49 [#uses=1]
625
icmp eq i8 %49, %47 ; <i1>:50 [#uses=1]
626
zext i1 %50 to i32 ; <i32>:51 [#uses=1]
627
store i32 %51, i32* @ui, align 4
628
load i8* @uc, align 1 ; <i8>:52 [#uses=1]
629
zext i8 %52 to i16 ; <i16>:53 [#uses=2]
630
load i8* @sc, align 1 ; <i8>:54 [#uses=1]
631
sext i8 %54 to i16 ; <i16>:55 [#uses=1]
632
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:56 [#uses=1]
633
call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %56, i16 %53, i16 %55 ) ; <i16>:57 [#uses=1]
634
icmp eq i16 %57, %53 ; <i1>:58 [#uses=1]
635
zext i1 %58 to i32 ; <i32>:59 [#uses=1]
636
store i32 %59, i32* @ui, align 4
637
load i8* @uc, align 1 ; <i8>:60 [#uses=1]
638
zext i8 %60 to i16 ; <i16>:61 [#uses=2]
639
load i8* @sc, align 1 ; <i8>:62 [#uses=1]
640
sext i8 %62 to i16 ; <i16>:63 [#uses=1]
641
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:64 [#uses=1]
642
call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %64, i16 %61, i16 %63 ) ; <i16>:65 [#uses=1]
643
icmp eq i16 %65, %61 ; <i1>:66 [#uses=1]
644
zext i1 %66 to i32 ; <i32>:67 [#uses=1]
645
store i32 %67, i32* @ui, align 4
646
load i8* @uc, align 1 ; <i8>:68 [#uses=1]
647
zext i8 %68 to i32 ; <i32>:69 [#uses=2]
648
load i8* @sc, align 1 ; <i8>:70 [#uses=1]
649
sext i8 %70 to i32 ; <i32>:71 [#uses=1]
650
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:72 [#uses=1]
651
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %72, i32 %69, i32 %71 ) ; <i32>:73 [#uses=1]
652
icmp eq i32 %73, %69 ; <i1>:74 [#uses=1]
653
zext i1 %74 to i32 ; <i32>:75 [#uses=1]
654
store i32 %75, i32* @ui, align 4
655
load i8* @uc, align 1 ; <i8>:76 [#uses=1]
656
zext i8 %76 to i32 ; <i32>:77 [#uses=2]
657
load i8* @sc, align 1 ; <i8>:78 [#uses=1]
658
sext i8 %78 to i32 ; <i32>:79 [#uses=1]
659
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:80 [#uses=1]
660
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %80, i32 %77, i32 %79 ) ; <i32>:81 [#uses=1]
661
icmp eq i32 %81, %77 ; <i1>:82 [#uses=1]
662
zext i1 %82 to i32 ; <i32>:83 [#uses=1]
663
store i32 %83, i32* @ui, align 4
664
load i8* @uc, align 1 ; <i8>:84 [#uses=1]
665
zext i8 %84 to i32 ; <i32>:85 [#uses=2]
666
load i8* @sc, align 1 ; <i8>:86 [#uses=1]
667
sext i8 %86 to i32 ; <i32>:87 [#uses=1]
668
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:88 [#uses=1]
669
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %88, i32 %85, i32 %87 ) ; <i32>:89 [#uses=1]
670
icmp eq i32 %89, %85 ; <i1>:90 [#uses=1]
671
zext i1 %90 to i32 ; <i32>:91 [#uses=1]
672
store i32 %91, i32* @ui, align 4
673
load i8* @uc, align 1 ; <i8>:92 [#uses=1]
674
zext i8 %92 to i32 ; <i32>:93 [#uses=2]
675
load i8* @sc, align 1 ; <i8>:94 [#uses=1]
676
sext i8 %94 to i32 ; <i32>:95 [#uses=1]
677
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:96 [#uses=1]
678
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %96, i32 %93, i32 %95 ) ; <i32>:97 [#uses=1]
679
icmp eq i32 %97, %93 ; <i1>:98 [#uses=1]
680
zext i1 %98 to i32 ; <i32>:99 [#uses=1]
681
store i32 %99, i32* @ui, align 4
684
return: ; preds = %entry
688
declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8*, i8, i8) nounwind
690
declare i16 @llvm.atomic.cmp.swap.i16.p0i16(i16*, i16, i16) nounwind
692
declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
694
define void @test_lock() nounwind {
696
call i8 @llvm.atomic.swap.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=1]
697
store i8 %0, i8* @sc, align 1
698
call i8 @llvm.atomic.swap.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=1]
699
store i8 %1, i8* @uc, align 1
700
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
701
call i16 @llvm.atomic.swap.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=1]
702
store i16 %3, i16* @ss, align 2
703
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
704
call i16 @llvm.atomic.swap.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=1]
705
store i16 %5, i16* @us, align 2
706
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
707
call i32 @llvm.atomic.swap.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=1]
708
store i32 %7, i32* @si, align 4
709
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
710
call i32 @llvm.atomic.swap.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=1]
711
store i32 %9, i32* @ui, align 4
712
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
713
call i32 @llvm.atomic.swap.i32.p0i32( i32* %10, i32 1 ) ; <i32>:11 [#uses=1]
714
store i32 %11, i32* @sl, align 4
715
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
716
call i32 @llvm.atomic.swap.i32.p0i32( i32* %12, i32 1 ) ; <i32>:13 [#uses=1]
717
store i32 %13, i32* @ul, align 4
718
call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true, i1 false )
719
volatile store i8 0, i8* @sc, align 1
720
volatile store i8 0, i8* @uc, align 1
721
bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:14 [#uses=1]
722
volatile store i16 0, i16* %14, align 2
723
bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:15 [#uses=1]
724
volatile store i16 0, i16* %15, align 2
725
bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:16 [#uses=1]
726
volatile store i32 0, i32* %16, align 4
727
bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:17 [#uses=1]
728
volatile store i32 0, i32* %17, align 4
729
bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:18 [#uses=1]
730
volatile store i32 0, i32* %18, align 4
731
bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:19 [#uses=1]
732
volatile store i32 0, i32* %19, align 4
733
bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:20 [#uses=1]
734
volatile store i64 0, i64* %20, align 8
735
bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:21 [#uses=1]
736
volatile store i64 0, i64* %21, align 8
739
return: ; preds = %entry
743
declare i8 @llvm.atomic.swap.i8.p0i8(i8*, i8) nounwind
745
declare i16 @llvm.atomic.swap.i16.p0i16(i16*, i16) nounwind
747
declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
749
declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
added
removed
libclamav/c++/llvm/test/CodeGen/PowerPC/Atomics-32.ll
