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* Copyright 2004 Free Software Foundation, Inc.
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* This file is part of GNU Radio
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* GNU Radio is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3, or (at your option)
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* GNU Radio is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with GNU Radio; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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#include <usrp1_source_base.h>
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#include <gr_io_signature.h>
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#include <usrp_standard.h>
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static const int OUTPUT_MULTIPLE_BYTES = 4 * 1024;
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usrp1_source_base::usrp1_source_base (const std::string &name,
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gr_io_signature_sptr output_signature,
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unsigned int decim_rate,
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const std::string fpga_filename,
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const std::string firmware_filename
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) throw (std::runtime_error)
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: gr_sync_block (name,
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gr_make_io_signature (0, 0, 0),
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d_usrp = usrp_standard_rx::make (which_board, decim_rate,
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throw std::runtime_error ("can't open usrp1");
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// All calls to d_usrp->read must be multiples of 512 bytes.
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// We jack this up to 4k to reduce overhead.
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set_output_multiple (OUTPUT_MULTIPLE_BYTES / output_signature->sizeof_stream_item (0));
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usrp1_source_base::~usrp1_source_base ()
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usrp1_source_base::sizeof_basic_sample() const
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return usrp_standard_rx::format_width(d_usrp->format()) / 8;
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usrp1_source_base::start()
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return d_usrp->start();
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usrp1_source_base::stop()
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return d_usrp->stop();
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usrp1_source_base::work (int noutput_items,
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gr_vector_const_void_star &input_items,
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gr_vector_void_star &output_items)
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static const int BUFSIZE = 4 * OUTPUT_MULTIPLE_BYTES;
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unsigned char buf[BUFSIZE];
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int output_items_produced;
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while (output_index < noutput_items){
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int nbytes = ninput_bytes_reqd_for_noutput_items (noutput_items - output_index);
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nbytes = std::min (nbytes, BUFSIZE);
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int result_nbytes = d_usrp->read (buf, nbytes, &overrun);
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// fprintf (stderr, "usrp1_source: overrun\n");
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fputs ("uO", stderr);
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if (result_nbytes < 0) // We've got a problem. Usually board unplugged or powered down.
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return -1; // Indicate we're done.
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if (result_nbytes != nbytes){ // not really an error, but unexpected
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fprintf (stderr, "usrp1_source: short read. Expected %d, got %d\n",
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nbytes, result_nbytes);
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copy_from_usrp_buffer (output_items,
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noutput_items - output_index, // output_items_available
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output_items_produced, // [out]
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result_nbytes, // usrp_buffer_length
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bytes_read); // [out]
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assert (output_index + output_items_produced <= noutput_items);
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assert (bytes_read == result_nbytes);
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output_index += output_items_produced;
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return noutput_items;
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usrp1_source_base::set_decim_rate (unsigned int rate)
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return d_usrp->set_decim_rate (rate);
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usrp1_source_base::set_nchannels (int nchan)
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return d_usrp->set_nchannels (nchan);
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usrp1_source_base::set_mux (int mux)
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return d_usrp->set_mux (mux);
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usrp1_source_base::set_rx_freq (int channel, double freq)
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return d_usrp->set_rx_freq (channel, freq);
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usrp1_source_base::fpga_master_clock_freq() const
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return d_usrp->fpga_master_clock_freq();
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usrp1_source_base::converter_rate() const
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return d_usrp->converter_rate();
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usrp1_source_base::decim_rate () const
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return d_usrp->decim_rate ();
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usrp1_source_base::nchannels () const
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return d_usrp->nchannels ();
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usrp1_source_base::mux () const
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return d_usrp->mux ();
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usrp1_source_base::rx_freq (int channel) const
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return d_usrp->rx_freq (channel);
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usrp1_source_base::set_fpga_mode (int mode)
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return d_usrp->set_fpga_mode (mode);
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usrp1_source_base::set_ddc_phase (int channel, int phase)
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return d_usrp->set_ddc_phase(channel, phase);
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usrp1_source_base::set_dc_offset_cl_enable(int bits, int mask)
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return d_usrp->set_dc_offset_cl_enable(bits, mask);
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usrp1_source_base::set_verbose (bool verbose)
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d_usrp->set_verbose (verbose);
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usrp1_source_base::write_aux_dac (int which_dboard, int which_dac, int value)
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return d_usrp->write_aux_dac (which_dboard, which_dac, value);
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usrp1_source_base::read_aux_adc (int which_dboard, int which_adc)
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return d_usrp->read_aux_adc (which_dboard, which_adc);
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usrp1_source_base::write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf)
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return d_usrp->write_eeprom (i2c_addr, eeprom_offset, buf);
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usrp1_source_base::read_eeprom (int i2c_addr, int eeprom_offset, int len)
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return d_usrp->read_eeprom (i2c_addr, eeprom_offset, len);
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usrp1_source_base::write_i2c (int i2c_addr, const std::string buf)
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return d_usrp->write_i2c (i2c_addr, buf);
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usrp1_source_base::read_i2c (int i2c_addr, int len)
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return d_usrp->read_i2c (i2c_addr, len);
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usrp1_source_base::set_pga (int which, double gain)
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return d_usrp->set_pga (which, gain);
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usrp1_source_base::pga (int which) const
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return d_usrp->pga (which);
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usrp1_source_base::pga_min () const
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return d_usrp->pga_min ();
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usrp1_source_base::pga_max () const
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return d_usrp->pga_max ();
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usrp1_source_base::pga_db_per_step () const
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return d_usrp->pga_db_per_step ();
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usrp1_source_base::daughterboard_id (int which) const
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return d_usrp->daughterboard_id (which);
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usrp1_source_base::set_adc_offset (int which, int offset)
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return d_usrp->set_adc_offset (which, offset);
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usrp1_source_base::set_dac_offset (int which, int offset, int offset_pin)
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return d_usrp->set_dac_offset (which, offset, offset_pin);
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usrp1_source_base::set_adc_buffer_bypass (int which, bool bypass)
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return d_usrp->set_adc_buffer_bypass (which, bypass);
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usrp1_source_base::serial_number()
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return d_usrp->serial_number();
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usrp1_source_base::_write_oe (int which_dboard, int value, int mask)
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return d_usrp->_write_oe (which_dboard, value, mask);
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usrp1_source_base::write_io (int which_dboard, int value, int mask)
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return d_usrp->write_io (which_dboard, value, mask);
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usrp1_source_base::read_io (int which_dboard)
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return d_usrp->read_io (which_dboard);
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// internal routines...
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usrp1_source_base::_write_fpga_reg (int regno, int value)
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return d_usrp->_write_fpga_reg (regno, value);
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usrp1_source_base::_write_fpga_reg_masked (int regno, int value, int mask)
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return d_usrp->_write_fpga_reg_masked (regno, value, mask);
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usrp1_source_base::_read_fpga_reg (int regno)
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return d_usrp->_read_fpga_reg (regno);
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usrp1_source_base::_write_9862 (int which_codec, int regno, unsigned char value)
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return d_usrp->_write_9862 (which_codec, regno, value);
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usrp1_source_base::_read_9862 (int which_codec, int regno) const
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return d_usrp->_read_9862 (which_codec, regno);
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usrp1_source_base::_write_spi (int optional_header, int enables,
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int format, std::string buf)
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return d_usrp->_write_spi (optional_header, enables, format, buf);
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usrp1_source_base::_read_spi (int optional_header, int enables, int format, int len)
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return d_usrp->_read_spi (optional_header, enables, format, len);
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usrp1_source_base::set_format(unsigned int format)
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return d_usrp->set_format(format);
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usrp1_source_base::format() const
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return d_usrp->format();
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usrp1_source_base::make_format(int width, int shift, bool want_q, bool bypass_halfband)
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return usrp_standard_rx::make_format(width, shift, want_q, bypass_halfband);
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usrp1_source_base::format_width(unsigned int format)
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return usrp_standard_rx::format_width(format);
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usrp1_source_base::format_shift(unsigned int format)
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return usrp_standard_rx::format_shift(format);
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usrp1_source_base::format_want_q(unsigned int format)
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return usrp_standard_rx::format_want_q(format);
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usrp1_source_base::format_bypass_halfband(unsigned int format)
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return usrp_standard_rx::format_bypass_halfband(format);