2
* Copyright 2007 Free Software Foundation, Inc.
4
* This program is free software: you can redistribute it and/or modify
5
* it under the terms of the GNU General Public License as published by
6
* the Free Software Foundation, either version 3 of the License, or
7
* (at your option) any later version.
9
* This program is distributed in the hope that it will be useful,
10
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
* GNU General Public License for more details.
14
* You should have received a copy of the GNU General Public License
15
* along with this program. If not, see <http://www.gnu.org/licenses/>.
19
#include "memory_map.h"
25
#include "buffer_pool.h"
33
#include "usrp2_i2c_addr.h"
35
//#include "nonstdio.h"
37
unsigned char u2_hw_rev_major;
38
unsigned char u2_hw_rev_minor;
43
bool ok = eeprom_read(I2C_ADDR_MBOARD, MBOARD_REV_LSB, &u2_hw_rev_minor, 1);
44
ok &= eeprom_read(I2C_ADDR_MBOARD, MBOARD_REV_MSB, &u2_hw_rev_major, 1);
48
* We ought to arrange for this to be called before main, but for now,
49
* we require that the user's main call u2_init as the first thing...
54
// Set GPIOs to inputs, disable GPIO streaming
55
hal_gpio_set_ddr(GPIO_TX_BANK, 0x0000, 0xffff);
56
hal_gpio_set_ddr(GPIO_RX_BANK, 0x0000, 0xffff);
58
hal_gpio_write(GPIO_TX_BANK, 0x0000, 0xffff); // init s/w output value to zero
59
hal_gpio_write(GPIO_RX_BANK, 0x0000, 0xffff);
61
dsp_rx_regs->gpio_stream_enable = 0; // I, Q LSBs come from DSP
65
// init spi, so that we can switch over to the high-speed clock
68
// init i2c so we can read our rev
72
// set up the default clocks
75
// clocks_enable_test_clk(true,1);
78
output_regs->adc_ctrl = ADC_CTRL_ON;
81
ad9777_write_reg(0, R0_1R);
82
ad9777_write_reg(1, R1_INTERP_4X | R1_REAL_MIX);
83
ad9777_write_reg(2, 0);
84
ad9777_write_reg(3, R3_PLL_DIV_1);
85
ad9777_write_reg(4, R4_PLL_ON | R4_CP_AUTO);
86
ad9777_write_reg(5, R5_I_FINE_GAIN(0));
87
ad9777_write_reg(6, R6_I_COARSE_GAIN(0xf));
88
ad9777_write_reg(7, 0); // I dac offset
89
ad9777_write_reg(8, 0);
90
ad9777_write_reg(9, R9_Q_FINE_GAIN(0));
91
ad9777_write_reg(10, R10_Q_COARSE_GAIN(0xf));
92
ad9777_write_reg(11, 0); // Q dac offset
93
ad9777_write_reg(12, 0);
95
// Initial values for tx and rx mux registers
96
dsp_tx_regs->tx_mux = 0x10;
97
dsp_rx_regs->rx_mux = 0x44444444;
100
output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN);
102
pic_init(); // progammable interrupt controller
103
bp_init(); // buffer pool
104
lsadc_init(); // low-speed ADCs
105
lsdac_init(); // low-speed DACs
106
db_init(); // daughterboard init
110
// flash all leds to let us know board is alive
111
hal_set_leds(0x0, 0x1f);
113
hal_set_leds(0x1f, 0x1f);
115
hal_set_leds(0x1, 0x1f); // Leave the first one on
118
// test register readback
120
vv = ad9777_read_reg(0);
121
printf("ad9777 reg[0] = 0x%x\n", vv);
123
for (rr = 0x04; rr <= 0x0d; rr++){
124
vv = ad9510_read_reg(rr);
125
printf("ad9510 reg[0x%x] = 0x%x\n", rr, vv);