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* Copyright 2009 Free Software Foundation, Inc.
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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#include <memory_map.h>
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#define min(X,Y) ((X) < (Y) ? (X) : (Y))
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#define max(X,Y) ((X) > (Y) ? (X) : (Y))
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#define abs(X) ((X) < (0) ? ((-1)*(X)) : (X))
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#define REFCLK_DIVISOR 25 // Gives a 4 MHz clock
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#define REFCLK_FREQ U2_DOUBLE_TO_FXPT_FREQ(MASTER_CLK_RATE/REFCLK_DIVISOR)
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#define REFCLK_FREQ_INT u2_fxpt_freq_round_to_int(REFCLK_FREQ)
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#define DACFULLSCALE 3.3
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bool db_dbsrx_init(struct db_base *db);
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bool db_dbsrx_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
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bool db_dbsrx_set_gain(struct db_base *db, u2_fxpt_gain_t gain);
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struct db_dbsrx_common {
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struct db_dbsrx_dummy {
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struct db_dbsrx_common common;
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struct db_dbsrx_common common;
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struct db_dbsrx db_dbsrx = {
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.base.output_enables = 0x0000,
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.base.used_pins = 0x0000,
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.base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(500e6),
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.base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2.6e9),
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.base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
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.base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX+BBGAINMAX),
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.base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(1),
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.base.is_quadrature = true,
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.base.i_and_q_swapped = false,
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.base.spectrum_inverted = false,
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.base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
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.base.init = db_dbsrx_init,
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.base.set_freq = db_dbsrx_set_freq,
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.base.set_gain = db_dbsrx_set_gain,
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.base.set_tx_enable = 0,
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.base.atr_mask = 0x0000,
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//.base.atr_tx_delay =
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//.base.atr_rx_delay =
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db_dbsrx_init(struct db_base *dbb){
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struct db_dbsrx_dummy *db = (struct db_dbsrx_dummy *) dbb;
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db->base.set_gain(dbb, (db->base.gain_max + db->base.gain_min)/2);
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clocks_enable_rx_dboard(true, REFCLK_DIVISOR); // Gives 4 MHz clock
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/**************************************************
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**************************************************/
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unsigned char readback[2];
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i2c_read(I2C_ADDR, readback, 2*sizeof(unsigned char));
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int adc_val = (readback[0] >> 2)&7;
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//printf("READBACK[0] %d, [1] %d\n",readback[0],readback[1]);
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//printf("ADC: %d\n",adc_val);
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_write_reg (int regno, int v){
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//regno is in [0,5], v is value to write to register"""
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unsigned char args[2];
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args[0] = (unsigned char)regno;
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args[1] = (unsigned char)v;
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i2c_write(I2C_ADDR, args, 2*sizeof(unsigned char));
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//printf("Reg %d, Val %x\n",regno,v);
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static void _send_reg_0(struct db_dbsrx_dummy *db){
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_write_reg(0,(db->common.d_div2<<7) + (db->common.d_n>>8));
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static void _send_reg_1(struct db_dbsrx_dummy *db){
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_write_reg(1,db->common.d_n & 255);
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static void _send_reg_2(struct db_dbsrx_dummy *db){
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_write_reg(2,db->common.d_osc + (db->common.d_cp<<3) + (db->common.d_r_reg<<5));
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static void _send_reg_3(struct db_dbsrx_dummy *db){
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_write_reg(3,db->common.d_fdac);
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static void _send_reg_4(struct db_dbsrx_dummy *db){
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_write_reg(4,db->common.d_m + (db->common.d_dl<<5) + (db->common.d_ade<<6) + (db->common.d_adl<<7));
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static void _send_reg_5(struct db_dbsrx_dummy *db){
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_write_reg(5,db->common.d_gc2 + (db->common.d_diag<<5));
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/**************************************************
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* Helpers for setting the freq
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**************************************************/
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_set_div2(struct db_dbsrx_dummy *db, int div2){
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db->common.d_div2 = div2;
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// FIXME How do we handle ADE and ADL properly?
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_set_ade(struct db_dbsrx_dummy *db, int ade){
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db->common.d_ade = ade;
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_set_r(struct db_dbsrx_dummy *db, int r){
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db->common.d_r_reg = r;
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_set_n(struct db_dbsrx_dummy *db, int n){
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_set_osc(struct db_dbsrx_dummy *db, int osc){
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db->common.d_osc = osc;
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_set_cp(struct db_dbsrx_dummy *db, int cp){
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db->common.d_cp = cp;
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/**************************************************
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**************************************************/
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db_dbsrx_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc){
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struct db_dbsrx_dummy *db = (struct db_dbsrx_dummy *) dbb;
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if(!(freq>=db->base.freq_min && freq<=db->base.freq_max)) {
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u2_fxpt_freq_t vcofreq;
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if(freq < U2_DOUBLE_TO_FXPT_FREQ(1150e6)) {
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int rmin = max(2, u2_fxpt_freq_round_to_int(REFCLK_FREQ/2e6)); //TODO? remove max()
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//int rmax = min(128, u2_fxpt_freq_round_to_int(REFCLK_FREQ/500e3)); //TODO? remove min()
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u2_fxpt_freq_t best_delta = U2_DOUBLE_TO_FXPT_FREQ(10e6);
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u2_fxpt_freq_t delta;
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while ((r_reg<7) && ((2<<r_reg) < rmin)) {
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//printf ("r_reg = %d, r = %d\n",r_reg,2<<r_reg);
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n = u2_fxpt_freq_round_to_int(freq/REFCLK_FREQ_INT*(2<<r_reg));
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//printf("LOOP: r_reg %d, best_r %d, best_n %d, best_delta %d\n",
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//r_reg,best_r,best_n,u2_fxpt_freq_round_to_int(best_delta));
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//printf("N: %d\n",n);
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delta = abs(n*REFCLK_FREQ/(2<<r_reg) - freq);
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if(delta < best_delta) {
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if(best_delta < U2_DOUBLE_TO_FXPT_FREQ(75e3)) {
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//printf("BEST R: %d Best Delta %d Best N %d\n",
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// best_r,u2_fxpt_freq_round_to_int(best_delta),best_n);
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if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(2433e6))
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else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(2711e6))
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else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(3025e6))
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else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(3341e6))
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else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(3727e6))
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else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(4143e6))
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else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(4493e6))
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//printf("Initial VCO choice %d\n",vco);
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while(adc_val == 0 || adc_val == 7) {
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adc_val = _read_adc();
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//printf("adc %d\n",adc_val);
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else if(adc_val == 7) {
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if(adc_val == 1 || adc_val == 2) {
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else if(adc_val == 3 || adc_val == 4) {
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//printf("Final VCO choice %d\n",vco);
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*dc = db->common.d_n * REFCLK_FREQ / (2<<db->common.d_r_reg);
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/**************************************************
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* Helpers for setting the gain
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**************************************************/
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_set_gc2(struct db_dbsrx_dummy *db, int gc2){
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db->common.d_gc2 = gc2;
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/**************************************************
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**************************************************/
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db_dbsrx_set_gain(struct db_base *dbb, u2_fxpt_gain_t gain){
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struct db_dbsrx_dummy *db = (struct db_dbsrx_dummy *) dbb;
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u2_fxpt_gain_t rfgain, bbgain;
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if(!(gain >= db->base.gain_min && gain <= db->base.gain_max)) {
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if(gain < U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX)) {
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rfgain = U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX);
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bbgain = gain - U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX);
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int rf_gain_slope_q8 = 256 * 4096 * (VMAXGAIN-VMINGAIN) / RFGAINMAX / DACFULLSCALE;
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int rf_gain_offset_q8 = 128 * 256 * 4096 * VMINGAIN / DACFULLSCALE;
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int rfdac = (rfgain*rf_gain_slope_q8 + rf_gain_offset_q8)>>15;
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//printf("Set RF Gain %d, %d\n",rfgain,rfdac);
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lsdac_write_rx(1,rfdac);
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int bb_gain_slope_q8 = 256*(0-31)/(BBGAINMAX-0);
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int gc2 = u2_fxpt_gain_round_to_int((bb_gain_slope_q8 * bbgain)>>8) + 31;
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//printf("Set BB Gain: %d, gc2 %d\n",bbgain,gc2);
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/**************************************************
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* Helpers for setting the bw
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**************************************************/
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_set_m(struct db_dbsrx_dummy *db, int m){
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_set_fdac(struct db_dbsrx_dummy *db, int fdac){
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db->common.d_fdac = fdac;