← Back to branch summary

~ubuntu-branches/ubuntu/wily/openocd/wily

« back to all changes in this revision

Viewing changes to src/flash/orion_nand.c

  • Committer: Bazaar Package Importer
  • Author(s): Uwe Hermann
  • Date: 2009-11-25 12:20:04 UTC
  • mfrom: (1.2.5 upstream)
  • Revision ID: james.westby@ubuntu.com-20091125122004-4cnrzqw7v9qu064n
Tags: 0.3.1-1
http://bugs.debian.org/554598
http://bugs.debian.org/537740
http://bugs.debian.org/555553
* New upstream release (Closes: #554598, #537740).
* Add sh4 (instead of sh) to the list of architectures (Closes: #555553).
* Standards-Version: 3.8.3 (no changes required).
* debian/watch: Add file.
* debian/docs: Updates, some files were removed, some added.

Show diffs side-by-side

added added

removed removed

Lines of Context:
src/flash/orion_nand.c
26
26
#include "config.h"
27
27
#endif
28
28
 
29
 
#include "nand.h"
 
29
#include "arm_nandio.h"
30
30
#include "armv4_5.h"
31
 
#include "binarybuffer.h"
32
31
 
33
32
 
34
33
typedef struct orion_nand_controller_s
35
34
{
36
35
        struct target_s *target;
37
 
        working_area_t *copy_area;
 
36
 
 
37
        struct arm_nand_data    io;
38
38
 
39
39
        uint32_t                cmd;
40
40
        uint32_t                addr;
99
99
static int orion_nand_fast_block_write(struct nand_device_s *device, uint8_t *data, int size)
100
100
{
101
101
        orion_nand_controller_t *hw = device->controller_priv;
102
 
        target_t *target = hw->target;
103
 
        armv4_5_algorithm_t algo;
104
 
        reg_param_t reg_params[3];
105
 
        uint32_t target_buf;
106
102
        int retval;
107
103
 
108
 
        static const uint32_t code[] = {
109
 
                0xe4d13001,     /* ldrb r3, [r1], #1    */
110
 
                0xe5c03000,     /* strb r3, [r0]        */
111
 
                0xe2522001,     /* subs r2, r2, #1      */
112
 
                0x1afffffb,     /* bne  0               */
113
 
                0xeafffffe,     /* b    .               */
114
 
        };
115
 
        int code_size = sizeof(code);
116
 
 
117
 
        if (!hw->copy_area) {
118
 
                uint8_t code_buf[code_size];
119
 
                int i;
120
 
 
121
 
                /* make sure we have a working area */
122
 
                if (target_alloc_working_area(target,
123
 
                                              code_size + device->page_size,
124
 
                                              &hw->copy_area) != ERROR_OK)
125
 
                {
126
 
                        return orion_nand_slow_block_write(device, data, size);
127
 
                }
128
 
 
129
 
                /* copy target instructions to target endianness */
130
 
                for (i = 0; i < code_size/4; i++)
131
 
                        target_buffer_set_u32(target, code_buf + i*4, code[i]);
132
 
 
133
 
                /* write code to working area */
134
 
                retval = target_write_memory(target,
135
 
                                        hw->copy_area->address,
136
 
                                        4, code_size/4, code_buf);
137
 
                if (retval != ERROR_OK)
138
 
                        return retval;
139
 
        }
140
 
 
141
 
        /* copy data to target's memory */
142
 
        target_buf = hw->copy_area->address + code_size;
143
 
        retval = target_bulk_write_memory(target, target_buf, size/4, data);
144
 
        if (retval == ERROR_OK && size & 3) {
145
 
                retval = target_write_memory(target,
146
 
                                        target_buf + (size & ~3),
147
 
                                        1, size & 3, data + (size & ~3));
148
 
        }
149
 
        if (retval != ERROR_OK)
150
 
                return retval;
151
 
 
152
 
        algo.common_magic = ARMV4_5_COMMON_MAGIC;
153
 
        algo.core_mode = ARMV4_5_MODE_SVC;
154
 
        algo.core_state = ARMV4_5_STATE_ARM;
155
 
 
156
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
157
 
        init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
158
 
        init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
159
 
 
160
 
        buf_set_u32(reg_params[0].value, 0, 32, hw->data);
161
 
        buf_set_u32(reg_params[1].value, 0, 32, target_buf);
162
 
        buf_set_u32(reg_params[2].value, 0, 32, size);
163
 
 
164
 
        retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
165
 
                                        hw->copy_area->address,
166
 
                                        hw->copy_area->address + code_size - 4,
167
 
                                        1000, &algo);
168
 
        if (retval != ERROR_OK)
169
 
                LOG_ERROR("error executing hosted NAND write");
170
 
 
171
 
        destroy_reg_param(&reg_params[0]);
172
 
        destroy_reg_param(&reg_params[1]);
173
 
        destroy_reg_param(&reg_params[2]);
 
104
        hw->io.chunk_size = device->page_size;
 
105
 
 
106
        retval = arm_nandwrite(&hw->io, data, size);
 
107
        if (retval == ERROR_NAND_NO_BUFFER)
 
108
                retval = orion_nand_slow_block_write(device, data, size);
 
109
 
174
110
        return retval;
175
111
}
176
112
 
198
134
        uint8_t ale, cle;
199
135
 
200
136
        if (argc != 3) {
201
 
                LOG_ERROR("arguments must be: <target_number> <NAND_address>\n");
 
137
                LOG_ERROR("arguments must be: <target_id> <NAND_address>\n");
202
138
                return ERROR_NAND_DEVICE_INVALID;
203
139
        }
204
140
 
224
160
        hw->cmd = base + (1 << cle);
225
161
        hw->addr = base + (1 << ale);
226
162
 
 
163
        hw->io.target = hw->target;
 
164
        hw->io.data = hw->data;
 
165
 
227
166
        return ERROR_OK;
228
167
}
229
168