~ubuntu-branches/debian/sid/gcc-4.8/sid : revision 78

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# DP: updates from the 4.8 branch upto 20140424 (r209749).

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last_updated()

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{

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cat > ${dir}LAST_UPDATED <<EOF

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Thu Apr 24 16:38:34 CEST 2014

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Thu Apr 24 14:38:34 UTC 2014 (revision 209749)

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EOF

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}

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LANG=C svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_8_2_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch \

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| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \

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| awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0'

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Index: libitm/configure

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===================================================================

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--- a/src/libitm/configure (.../tags/gcc_4_8_2_release)

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+++ b/src/libitm/configure (.../branches/gcc-4_8-branch)

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@@ -7270,7 +7270,7 @@

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rm -rf conftest*

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;;

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-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

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+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

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s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

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# Find out which ABI we are using.

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echo 'int i;' > conftest.$ac_ext

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@@ -7295,7 +7295,10 @@

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;;

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esac

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;;

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- ppc64-*linux*|powerpc64-*linux*)

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+ powerpc64le-*linux*)

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+ LD="${LD-ld} -m elf32lppclinux"

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+ ;;

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+ powerpc64-*linux*)

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LD="${LD-ld} -m elf32ppclinux"

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;;

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s390x-*linux*)

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@@ -7314,7 +7317,10 @@

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x86_64-*linux*)

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LD="${LD-ld} -m elf_x86_64"

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;;

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- ppc*-*linux*|powerpc*-*linux*)

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+ powerpcle-*linux*)

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+ LD="${LD-ld} -m elf64lppc"

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+ ;;

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+ powerpc-*linux*)

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LD="${LD-ld} -m elf64ppc"

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;;

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s390*-*linux*|s390*-*tpf*)

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@@ -11779,7 +11785,7 @@

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lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

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lt_status=$lt_dlunknown

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cat > conftest.$ac_ext <<_LT_EOF

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-#line 11782 "configure"

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+#line 11788 "configure"

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#include "confdefs.h"

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#if HAVE_DLFCN_H

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@@ -11885,7 +11891,7 @@

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lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

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lt_status=$lt_dlunknown

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cat > conftest.$ac_ext <<_LT_EOF

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-#line 11888 "configure"

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+#line 11894 "configure"

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#include "confdefs.h"

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#if HAVE_DLFCN_H

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@@ -17362,6 +17368,43 @@

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fi

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;;

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+esac

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+

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+case "${target_cpu}" in

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+powerpc*)

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+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking if the assembler supports HTM" >&5

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+$as_echo_n "checking if the assembler supports HTM... " >&6; }

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+if test "${libitm_cv_as_htm+set}" = set; then :

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+ $as_echo_n "(cached) " >&6

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+else

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+

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+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext

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+/* end confdefs.h. */

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+

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+int

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+main ()

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+{

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+asm("tbegin. 0; tend. 0");

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+ ;

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+ return 0;

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+}

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+_ACEOF

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+if ac_fn_c_try_compile "$LINENO"; then :

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+ libitm_cv_as_htm=yes

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+else

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+ libitm_cv_as_htm=no

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+fi

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+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext

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+

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+fi

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+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libitm_cv_as_htm" >&5

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+$as_echo "$libitm_cv_as_htm" >&6; }

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+ if test x$libitm_cv_as_htm = xyes; then

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+

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+$as_echo "#define HAVE_AS_HTM 1" >>confdefs.h

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+

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+ fi

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+ ;;

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s390*)

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{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if the assembler supports HTM" >&5

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$as_echo_n "checking if the assembler supports HTM... " >&6; }

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@@ -17399,7 +17442,6 @@

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fi

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;;

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esac

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-LIBITM_CHECK_AS_HTM

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{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether weak refs work like ELF" >&5

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Index: libitm/configure.tgt

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===================================================================

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--- a/src/libitm/configure.tgt (.../tags/gcc_4_8_2_release)

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+++ b/src/libitm/configure.tgt (.../branches/gcc-4_8-branch)

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@@ -47,7 +47,10 @@

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# work out any special compilation flags as necessary.

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case "${target_cpu}" in

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alpha*) ARCH=alpha ;;

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- rs6000 | powerpc*) ARCH=powerpc ;;

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+ rs6000 | powerpc*)

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+ XCFLAGS="${XCFLAGS} -mhtm"

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+ ARCH=powerpc

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+ ;;

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arm*) ARCH=arm ;;

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138

Index: libitm/ChangeLog

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===================================================================

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--- a/src/libitm/ChangeLog (.../tags/gcc_4_8_2_release)

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+++ b/src/libitm/ChangeLog (.../branches/gcc-4_8-branch)

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@@ -1,3 +1,62 @@

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+2014-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

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+

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+ * acinclude.m4: Move s390* case from RTM to HTM check.

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+ * configure: Regenerate.

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+

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+2014-04-09 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

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+

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+ * config/generic/asmcfi.h: Also check for

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+ __GCC_HAVE_DWARF2_CFI_ASM.

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+

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+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

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+

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+ Backport from mainline r204808:

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+

157

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

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+

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+ * config/powerpc/sjlj.S [__powerpc64__ && _CALL_ELF == 2]:

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+ (FUNC): Define ELFv2 variant.

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+ (END): Likewise.

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+ (HIDDEN): Likewise.

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+ (CALL): Likewise.

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+ (BASE): Likewise.

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+ (LR_SAVE): Likewise.

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+

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+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

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+

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+ Power8 HTM Support

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+ Backport from mainline

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+ * acinclude.m4 (LIBITM_CHECK_AS_HTM): New.

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+ * configure: Rebuild.

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+ * configure.tgt (target_cpu): Add -mhtm to XCFLAGS.

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+ * config/powerpc/target.h: Include sys/auxv.h and htmintrin.h.

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+ (USE_HTM_FASTPATH): Define.

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+ (_TBEGIN_STARTED, _TBEGIN_INDETERMINATE, _TBEGIN_PERSISTENT)

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+ (_HTM_RETRIES) New macros.

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+ (htm_abort, htm_abort_should_retry, htm_available, htm_begin, htm_init)

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+ (htm_begin_success, htm_commit, htm_transaction_active): New functions.

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+

181

+2014-03-26 Jakub Jelinek <jakub@redhat.com>

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+

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+ * config/linux/futex_bits.h: Include errno.h.

184

+ (sys_futex0): If syscall returns -1, return -errno rather than

185

+ -1.

186

+

187

+2014-03-03 Peter Bergner <bergner@vnet.ibm.com>

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+

189

+ Backport from mainline

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+ 2013-06-20 Torvald Riegel <triegel@redhat.com>

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+

192

+ * query.cc (_ITM_inTransaction): Abort when using the HTM fastpath.

193

+ (_ITM_getTransactionId): Same.

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+ * config/x86/target.h (htm_transaction_active): New.

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+

196

+ 2013-06-20 Torvald Riegel <triegel@redhat.com>

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+

198

+ PR libitm/57643

199

+ * beginend.cc (gtm_thread::begin_transaction): Handle reentrancy in

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+ the HTM fastpath.

201

+

202

2013-10-16 Release Manager

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204

* GCC 4.8.2 released.

205

@@ -8,13 +67,12 @@

206

2013-08-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

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208

* configure.tgt: Add -msoft-float to XCFLAGS.

209

-

210

211

2013-08-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

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213

* config/s390/sjlj.S: Add file missing from last commit.

214

* config/s390/target.h: Likewise.

215

-

216

+

217

2013-08-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

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219

Backports from mainline:

220

Index: libitm/query.cc

221

===================================================================

222

--- a/src/libitm/query.cc (.../tags/gcc_4_8_2_release)

223

+++ b/src/libitm/query.cc (.../branches/gcc-4_8-branch)

224

@@ -43,6 +43,15 @@

225

_ITM_howExecuting ITM_REGPARM

226

_ITM_inTransaction (void)

227

{

228

+#if defined(USE_HTM_FASTPATH)

229

+ // If we use the HTM fastpath, we cannot reliably detect whether we are

230

+ // in a transaction because this function can be called outside of

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+ // a transaction and thus we can't deduce this by looking at just the serial

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+ // lock. This function isn't used in practice currently, so the easiest

233

+ // way to handle it is to just abort.

234

+ if (htm_fastpath && htm_transaction_active())

235

+ htm_abort();

236

+#endif

237

struct gtm_thread *tx = gtm_thr();

238

if (tx && (tx->nesting > 0))

239

{

240

@@ -58,6 +67,11 @@

241

_ITM_transactionId_t ITM_REGPARM

242

_ITM_getTransactionId (void)

243

{

244

+#if defined(USE_HTM_FASTPATH)

245

+ // See ITM_inTransaction.

246

+ if (htm_fastpath && htm_transaction_active())

247

+ htm_abort();

248

+#endif

249

struct gtm_thread *tx = gtm_thr();

250

return (tx && (tx->nesting > 0)) ? tx->id : _ITM_noTransactionId;

251

}

252

Index: libitm/beginend.cc

253

===================================================================

254

--- a/src/libitm/beginend.cc (.../tags/gcc_4_8_2_release)

255

+++ b/src/libitm/beginend.cc (.../branches/gcc-4_8-branch)

256

@@ -197,6 +197,8 @@

257

// We are executing a transaction now.

258

// Monitor the writer flag in the serial-mode lock, and abort

259

// if there is an active or waiting serial-mode transaction.

260

+ // Note that this can also happen due to an enclosing

261

+ // serial-mode transaction; we handle this case below.

262

if (unlikely(serial_lock.is_write_locked()))

263

htm_abort();

264

else

265

@@ -219,6 +221,14 @@

266

tx = new gtm_thread();

267

set_gtm_thr(tx);

268

}

269

+ // Check whether there is an enclosing serial-mode transaction;

270

+ // if so, we just continue as a nested transaction and don't

271

+ // try to use the HTM fastpath. This case can happen when an

272

+ // outermost relaxed transaction calls unsafe code that starts

273

+ // a transaction.

274

+ if (tx->nesting > 0)

275

+ break;

276

+ // Another thread is running a serial-mode transaction. Wait.

277

serial_lock.read_lock(tx);

278

serial_lock.read_unlock(tx);

279

// TODO We should probably reset the retry count t here, unless

280

Index: libitm/config/linux/futex_bits.h

281

===================================================================

282

--- a/src/libitm/config/linux/futex_bits.h (.../tags/gcc_4_8_2_release)

283

+++ b/src/libitm/config/linux/futex_bits.h (.../branches/gcc-4_8-branch)

284

@@ -31,9 +31,13 @@

285

286

#include <unistd.h>

287

#include <sys/syscall.h>

288

+#include <errno.h>

289

290

static inline long

291

sys_futex0 (std::atomic<int> *addr, long op, long val)

292

{

293

- return syscall (SYS_futex, (int*) addr, op, val, 0);

294

+ long res = syscall (SYS_futex, (int*) addr, op, val, 0);

295

+ if (__builtin_expect (res == -1, 0))

296

+ return -errno;

297

+ return res;

298

}

299

Index: libitm/config/powerpc/sjlj.S

300

===================================================================

301

--- a/src/libitm/config/powerpc/sjlj.S (.../tags/gcc_4_8_2_release)

302

+++ b/src/libitm/config/powerpc/sjlj.S (.../branches/gcc-4_8-branch)

303

@@ -26,8 +26,27 @@

304

305

#include "asmcfi.h"

306

307

-#if defined(__powerpc64__) && defined(__ELF__)

308

+#if defined(__powerpc64__) && _CALL_ELF == 2

309

.macro FUNC name

310

+ .globl \name

311

+ .type \name, @function

312

+\name:

313

+0: addis 2,12,(.TOC.-0b)@ha

314

+ addi 2,2,(.TOC.-0b)@l

315

+ .localentry \name, . - \name

316

+.endm

317

+.macro END name

318

+ .size \name, . - \name

319

+.endm

320

+.macro HIDDEN name

321

+ .hidden \name

322

+.endm

323

+.macro CALL name

324

+ bl \name

325

+ nop

326

+.endm

327

+#elif defined(__powerpc64__) && defined(__ELF__)

328

+.macro FUNC name

329

.globl \name, .\name

330

.section ".opd","aw"

331

.align 3

332

@@ -117,6 +136,9 @@

333

#if defined(_CALL_AIXDESC)

334

# define BASE 6*WS

335

# define LR_SAVE 2*WS

336

+#elif _CALL_ELF == 2

337

+# define BASE 6*WS

338

+# define LR_SAVE 2*WS

339

#elif defined(_CALL_SYSV)

340

# define BASE 2*WS

341

# define LR_SAVE 1*WS

342

Index: libitm/config/powerpc/target.h

343

===================================================================

344

--- a/src/libitm/config/powerpc/target.h (.../tags/gcc_4_8_2_release)

345

+++ b/src/libitm/config/powerpc/target.h (.../branches/gcc-4_8-branch)

346

@@ -22,6 +22,10 @@

347

see the files COPYING3 and COPYING.RUNTIME respectively. If not, see

348

<http://www.gnu.org/licenses/>. */

349

350

+#ifdef HAVE_SYS_AUXV_H

351

+#include <sys/auxv.h>

352

+#endif

353

+

354

namespace GTM HIDDEN {

355

356

typedef int v128 __attribute__((vector_size(16), may_alias, aligned(16)));

357

@@ -55,4 +59,82 @@

358

__asm volatile ("" : : : "memory");

359

}

360

361

+// Use HTM if it is supported by the system.

362

+// See gtm_thread::begin_transaction for how these functions are used.

363

+#if defined (__linux__) \

364

+ && defined (HAVE_AS_HTM) \

365

+ && defined (HAVE_GETAUXVAL) \

366

+ && defined (AT_HWCAP2) \

367

+ && defined (PPC_FEATURE2_HAS_HTM)

368

+

369

+#include <htmintrin.h>

370

+

371

+#define USE_HTM_FASTPATH

372

+

373

+#define _TBEGIN_STARTED 0

374

+#define _TBEGIN_INDETERMINATE 1

375

+#define _TBEGIN_PERSISTENT 2

376

+

377

+/* Number of retries for transient failures. */

378

+#define _HTM_RETRIES 10

379

+

380

+static inline bool

381

+htm_available (void)

382

+{

383

+ return (getauxval (AT_HWCAP2) & PPC_FEATURE2_HAS_HTM) ? true : false;

384

+}

385

+

386

+static inline uint32_t

387

+htm_init (void)

388

+{

389

+ // Maximum number of times we try to execute a transaction

390

+ // as a HW transaction.

391

+ return htm_available () ? _HTM_RETRIES : 0;

392

+}

393

+

394

+static inline uint32_t

395

+htm_begin (void)

396

+{

397

+ if (__builtin_expect (__builtin_tbegin (0), 1))

398

+ return _TBEGIN_STARTED;

399

+

400

+ if (_TEXASRU_FAILURE_PERSISTENT (__builtin_get_texasru ()))

401

+ return _TBEGIN_PERSISTENT;

402

+

403

+ return _TBEGIN_INDETERMINATE;

404

+}

405

+

406

+static inline bool

407

+htm_begin_success (uint32_t begin_ret)

408

+{

409

+ return begin_ret == _TBEGIN_STARTED;

410

+}

411

+

412

+static inline void

413

+htm_commit (void)

414

+{

415

+ __builtin_tend (0);

416

+}

417

+

418

+static inline void

419

+htm_abort (void)

420

+{

421

+ __builtin_tabort (0);

422

+}

423

+

424

+static inline bool

425

+htm_abort_should_retry (uint32_t begin_ret)

426

+{

427

+ return begin_ret != _TBEGIN_PERSISTENT;

428

+}

429

+

430

+/* Returns true iff a hardware transaction is currently being executed. */

431

+static inline bool

432

+htm_transaction_active (void)

433

+{

434

+ return (_HTM_STATE (__builtin_ttest ()) == _HTM_TRANSACTIONAL);

435

+}

436

+

437

+#endif

438

+

439

} // namespace GTM

440

Index: libitm/config/x86/target.h

441

===================================================================

442

--- a/src/libitm/config/x86/target.h (.../tags/gcc_4_8_2_release)

443

+++ b/src/libitm/config/x86/target.h (.../branches/gcc-4_8-branch)

444

@@ -125,6 +125,13 @@

445

{

446

return begin_ret & _XABORT_RETRY;

447

}

448

+

449

+/* Returns true iff a hardware transaction is currently being executed. */

450

+static inline bool

451

+htm_transaction_active ()

452

+{

453

+ return _xtest() != 0;

454

+}

455

#endif

456

457

458

Index: libitm/config/generic/asmcfi.h

459

===================================================================

460

--- a/src/libitm/config/generic/asmcfi.h (.../tags/gcc_4_8_2_release)

461

+++ b/src/libitm/config/generic/asmcfi.h (.../branches/gcc-4_8-branch)

462

@@ -24,7 +24,7 @@

463

464

#include "config.h"

465

466

-#ifdef HAVE_AS_CFI_PSEUDO_OP

467

+#if defined(HAVE_AS_CFI_PSEUDO_OP) && defined(__GCC_HAVE_DWARF2_CFI_ASM)

468

469

#define cfi_startproc .cfi_startproc

470

#define cfi_endproc .cfi_endproc

471

@@ -50,4 +50,4 @@

472

#define cfi_restore(r)

473

#define cfi_undefined(r)

474

475

-#endif /* HAVE_AS_CFI_PSEUDO_OP */

476

+#endif /* HAVE_AS_CFI_PSEUDO_OP && __GCC_HAVE_DWARF2_CFI_ASM */

477

Index: libitm/acinclude.m4

478

===================================================================

479

--- a/src/libitm/acinclude.m4 (.../tags/gcc_4_8_2_release)

480

+++ b/src/libitm/acinclude.m4 (.../branches/gcc-4_8-branch)

481

@@ -121,12 +121,26 @@

482

AC_DEFINE(HAVE_AS_RTM, 1, [Define to 1 if the assembler supports RTM.])

483

fi

484

;;

485

+esac])

486

+

487

+dnl Check if as supports HTM instructions.

488

+AC_DEFUN([LIBITM_CHECK_AS_HTM], [

489

+case "${target_cpu}" in

490

+powerpc*)

491

+ AC_CACHE_CHECK([if the assembler supports HTM], libitm_cv_as_htm, [

492

+ AC_TRY_COMPILE([], [asm("tbegin. 0; tend. 0");],

493

+ [libitm_cv_as_htm=yes], [libitm_cv_as_htm=no])

494

+ ])

495

+ if test x$libitm_cv_as_htm = xyes; then

496

+ AC_DEFINE(HAVE_AS_HTM, 1, [Define to 1 if the assembler supports HTM.])

497

+ fi

498

+ ;;

499

s390*)

500

AC_CACHE_CHECK([if the assembler supports HTM], libitm_cv_as_htm, [

501

save_CFLAGS="$CFLAGS"

502

CFLAGS="$CFLAGS -march=zEC12"

503

AC_TRY_COMPILE([], [asm("tbegin 0,0; tend");],

504

- [libitm_cv_as_htm=yes], [libitm_cv_as_htm=no])

505

+ [libitm_cv_as_htm=yes], [libitm_cv_as_htm=no])

506

CFLAGS="$save_CFLAGS"])

507

if test x$libitm_cv_as_htm = xyes; then

508

AC_DEFINE(HAVE_AS_HTM, 1, [Define to 1 if the assembler supports HTM.])

509

Index: libtool.m4

510

===================================================================

511

--- a/src/libtool.m4 (.../tags/gcc_4_8_2_release)

512

+++ b/src/libtool.m4 (.../branches/gcc-4_8-branch)

513

@@ -1220,7 +1220,7 @@

514

rm -rf conftest*

515

;;

516

517

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

518

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

519

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

520

# Find out which ABI we are using.

521

echo 'int i;' > conftest.$ac_ext

522

@@ -1241,7 +1241,10 @@

523

;;

524

esac

525

;;

526

- ppc64-*linux*|powerpc64-*linux*)

527

+ powerpc64le-*linux*)

528

+ LD="${LD-ld} -m elf32lppclinux"

529

+ ;;

530

+ powerpc64-*linux*)

531

LD="${LD-ld} -m elf32ppclinux"

532

;;

533

s390x-*linux*)

534

@@ -1260,7 +1263,10 @@

535

x86_64-*linux*)

536

LD="${LD-ld} -m elf_x86_64"

537

;;

538

- ppc*-*linux*|powerpc*-*linux*)

539

+ powerpcle-*linux*)

540

+ LD="${LD-ld} -m elf64lppc"

541

+ ;;

542

+ powerpc-*linux*)

543

LD="${LD-ld} -m elf64ppc"

544

;;

545

s390*-*linux*|s390*-*tpf*)

546

Index: libgomp/configure

547

===================================================================

548

--- a/src/libgomp/configure (.../tags/gcc_4_8_2_release)

549

+++ b/src/libgomp/configure (.../branches/gcc-4_8-branch)

550

@@ -6580,7 +6580,7 @@

551

rm -rf conftest*

552

;;

553

554

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

555

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

556

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

557

# Find out which ABI we are using.

558

echo 'int i;' > conftest.$ac_ext

559

@@ -6605,7 +6605,10 @@

560

;;

561

esac

562

;;

563

- ppc64-*linux*|powerpc64-*linux*)

564

+ powerpc64le-*linux*)

565

+ LD="${LD-ld} -m elf32lppclinux"

566

+ ;;

567

+ powerpc64-*linux*)

568

LD="${LD-ld} -m elf32ppclinux"

569

;;

570

s390x-*linux*)

571

@@ -6624,7 +6627,10 @@

572

x86_64-*linux*)

573

LD="${LD-ld} -m elf_x86_64"

574

;;

575

- ppc*-*linux*|powerpc*-*linux*)

576

+ powerpcle-*linux*)

577

+ LD="${LD-ld} -m elf64lppc"

578

+ ;;

579

+ powerpc-*linux*)

580

LD="${LD-ld} -m elf64ppc"

581

;;

582

s390*-*linux*|s390*-*tpf*)

583

@@ -11088,7 +11094,7 @@

584

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

585

lt_status=$lt_dlunknown

586

cat > conftest.$ac_ext <<_LT_EOF

587

-#line 11091 "configure"

588

+#line 11097 "configure"

589

#include "confdefs.h"

590

591

#if HAVE_DLFCN_H

592

@@ -11194,7 +11200,7 @@

593

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

594

lt_status=$lt_dlunknown

595

cat > conftest.$ac_ext <<_LT_EOF

596

-#line 11197 "configure"

597

+#line 11203 "configure"

598

#include "confdefs.h"

599

600

#if HAVE_DLFCN_H

601

Index: libgomp/ChangeLog

602

===================================================================

603

--- a/src/libgomp/ChangeLog (.../tags/gcc_4_8_2_release)

604

+++ b/src/libgomp/ChangeLog (.../branches/gcc-4_8-branch)

605

@@ -1,3 +1,21 @@

606

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

607

+

608

+ Backport from mainline

609

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

610

+

611

+ * configure: Regenerate.

612

+

613

+2014-04-02 Richard Henderson <rth@redhat.com>

614

+

615

+ * config/linux/futex.h (futex_wait): Get error value from errno.

616

+ (futex_wake): Likewise.

617

+

618

+2013-12-12 Jakub Jelinek <jakub@redhat.com>

619

+

620

+ PR libgomp/59467

621

+ * testsuite/libgomp.fortran/crayptr2.f90: Add private (d) clause to

622

+ !$omp parallel.

623

+

624

2013-10-16 Release Manager

625

626

* GCC 4.8.2 released.

627

Index: libgomp/testsuite/libgomp.fortran/crayptr2.f90

628

===================================================================

629

--- a/src/libgomp/testsuite/libgomp.fortran/crayptr2.f90 (.../tags/gcc_4_8_2_release)

630

+++ b/src/libgomp/testsuite/libgomp.fortran/crayptr2.f90 (.../branches/gcc-4_8-branch)

631

@@ -12,7 +12,7 @@

632

b = 2

633

c = 3

634

l = .false.

635

-!$omp parallel num_threads (3) reduction (.or.:l)

636

+!$omp parallel num_threads (3) reduction (.or.:l) private (d)

637

if (omp_get_thread_num () .eq. 0) then

638

ip = loc (a)

639

elseif (omp_get_thread_num () .eq. 1) then

640

Index: libgomp/config/linux/futex.h

641

===================================================================

642

--- a/src/libgomp/config/linux/futex.h (.../tags/gcc_4_8_2_release)

643

+++ b/src/libgomp/config/linux/futex.h (.../branches/gcc-4_8-branch)

644

@@ -41,8 +41,8 @@

645

static inline void

646

futex_wait (int *addr, int val)

647

{

648

- long err = syscall (SYS_futex, addr, gomp_futex_wait, val, NULL);

649

- if (__builtin_expect (err == -ENOSYS, 0))

650

+ int err = syscall (SYS_futex, addr, gomp_futex_wait, val, NULL);

651

+ if (__builtin_expect (err < 0 && errno == ENOSYS, 0))

652

{

653

gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;

654

gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;

655

@@ -53,8 +53,8 @@

656

static inline void

657

futex_wake (int *addr, int count)

658

{

659

- long err = syscall (SYS_futex, addr, gomp_futex_wake, count);

660

- if (__builtin_expect (err == -ENOSYS, 0))

661

+ int err = syscall (SYS_futex, addr, gomp_futex_wake, count);

662

+ if (__builtin_expect (err < 0 && errno == ENOSYS, 0))

663

{

664

gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;

665

gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;

666

Index: libquadmath/configure

667

===================================================================

668

--- a/src/libquadmath/configure (.../tags/gcc_4_8_2_release)

669

+++ b/src/libquadmath/configure (.../branches/gcc-4_8-branch)

670

@@ -6248,7 +6248,7 @@

671

rm -rf conftest*

672

;;

673

674

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

675

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

676

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

677

# Find out which ABI we are using.

678

echo 'int i;' > conftest.$ac_ext

679

@@ -6273,7 +6273,10 @@

680

;;

681

esac

682

;;

683

- ppc64-*linux*|powerpc64-*linux*)

684

+ powerpc64le-*linux*)

685

+ LD="${LD-ld} -m elf32lppclinux"

686

+ ;;

687

+ powerpc64-*linux*)

688

LD="${LD-ld} -m elf32ppclinux"

689

;;

690

s390x-*linux*)

691

@@ -6292,7 +6295,10 @@

692

x86_64-*linux*)

693

LD="${LD-ld} -m elf_x86_64"

694

;;

695

- ppc*-*linux*|powerpc*-*linux*)

696

+ powerpcle-*linux*)

697

+ LD="${LD-ld} -m elf64lppc"

698

+ ;;

699

+ powerpc-*linux*)

700

LD="${LD-ld} -m elf64ppc"

701

;;

702

s390*-*linux*|s390*-*tpf*)

703

@@ -10521,7 +10527,7 @@

704

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

705

lt_status=$lt_dlunknown

706

cat > conftest.$ac_ext <<_LT_EOF

707

-#line 10524 "configure"

708

+#line 10530 "configure"

709

#include "confdefs.h"

710

711

#if HAVE_DLFCN_H

712

@@ -10627,7 +10633,7 @@

713

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

714

lt_status=$lt_dlunknown

715

cat > conftest.$ac_ext <<_LT_EOF

716

-#line 10630 "configure"

717

+#line 10636 "configure"

718

#include "confdefs.h"

719

720

#if HAVE_DLFCN_H

721

Index: libquadmath/ChangeLog

722

===================================================================

723

--- a/src/libquadmath/ChangeLog (.../tags/gcc_4_8_2_release)

724

+++ b/src/libquadmath/ChangeLog (.../branches/gcc-4_8-branch)

725

@@ -1,3 +1,10 @@

726

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

727

+

728

+ Backport from mainline

729

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

730

+

731

+ * configure: Regenerate.

732

+

733

2013-10-16 Release Manager

734

735

* GCC 4.8.2 released.

736

Index: libsanitizer/configure

737

===================================================================

738

--- a/src/libsanitizer/configure (.../tags/gcc_4_8_2_release)

739

+++ b/src/libsanitizer/configure (.../branches/gcc-4_8-branch)

740

@@ -6604,7 +6604,7 @@

741

rm -rf conftest*

742

;;

743

744

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

745

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

746

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

747

# Find out which ABI we are using.

748

echo 'int i;' > conftest.$ac_ext

749

@@ -6629,7 +6629,10 @@

750

;;

751

esac

752

;;

753

- ppc64-*linux*|powerpc64-*linux*)

754

+ powerpc64le-*linux*)

755

+ LD="${LD-ld} -m elf32lppclinux"

756

+ ;;

757

+ powerpc64-*linux*)

758

LD="${LD-ld} -m elf32ppclinux"

759

;;

760

s390x-*linux*)

761

@@ -6648,7 +6651,10 @@

762

x86_64-*linux*)

763

LD="${LD-ld} -m elf_x86_64"

764

;;

765

- ppc*-*linux*|powerpc*-*linux*)

766

+ powerpcle-*linux*)

767

+ LD="${LD-ld} -m elf64lppc"

768

+ ;;

769

+ powerpc-*linux*)

770

LD="${LD-ld} -m elf64ppc"

771

;;

772

s390*-*linux*|s390*-*tpf*)

773

@@ -11111,7 +11117,7 @@

774

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

775

lt_status=$lt_dlunknown

776

cat > conftest.$ac_ext <<_LT_EOF

777

-#line 11114 "configure"

778

+#line 11120 "configure"

779

#include "confdefs.h"

780

781

#if HAVE_DLFCN_H

782

@@ -11217,7 +11223,7 @@

783

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

784

lt_status=$lt_dlunknown

785

cat > conftest.$ac_ext <<_LT_EOF

786

-#line 11220 "configure"

787

+#line 11226 "configure"

788

#include "confdefs.h"

789

790

#if HAVE_DLFCN_H

791

Index: libsanitizer/ChangeLog

792

===================================================================

793

--- a/src/libsanitizer/ChangeLog (.../tags/gcc_4_8_2_release)

794

+++ b/src/libsanitizer/ChangeLog (.../branches/gcc-4_8-branch)

795

@@ -1,3 +1,17 @@

796

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

797

+

798

+ Backport from mainline r208290

799

+ 2014-03-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

800

+

801

+ * configure.tgt: Unsupported for little endian PowerPC for now.

802

+

803

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

804

+

805

+ Backport from mainline

806

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

807

+

808

+ * configure: Regenerate.

809

+

810

2013-10-16 Release Manager

811

812

* GCC 4.8.2 released.

813

Index: libsanitizer/configure.tgt

814

===================================================================

815

--- a/src/libsanitizer/configure.tgt (.../tags/gcc_4_8_2_release)

816

+++ b/src/libsanitizer/configure.tgt (.../branches/gcc-4_8-branch)

817

@@ -25,6 +25,9 @@

818

TSAN_SUPPORTED=yes

819

fi

820

;;

821

+ powerpc*le-*-linux*)

822

+ UNSUPPORTED=1

823

+ ;;

824

powerpc*-*-linux*)

825

;;

826

sparc*-*-linux*)

827

Index: zlib/configure

828

===================================================================

829

--- a/src/zlib/configure (.../tags/gcc_4_8_2_release)

830

+++ b/src/zlib/configure (.../branches/gcc-4_8-branch)

831

@@ -5853,7 +5853,7 @@

832

rm -rf conftest*

833

;;

834

835

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

836

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

837

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

838

# Find out which ABI we are using.

839

echo 'int i;' > conftest.$ac_ext

840

@@ -5878,7 +5878,10 @@

841

;;

842

esac

843

;;

844

- ppc64-*linux*|powerpc64-*linux*)

845

+ powerpc64le-*linux*)

846

+ LD="${LD-ld} -m elf32lppclinux"

847

+ ;;

848

+ powerpc64-*linux*)

849

LD="${LD-ld} -m elf32ppclinux"

850

;;

851

s390x-*linux*)

852

@@ -5897,7 +5900,10 @@

853

x86_64-*linux*)

854

LD="${LD-ld} -m elf_x86_64"

855

;;

856

- ppc*-*linux*|powerpc*-*linux*)

857

+ powerpcle-*linux*)

858

+ LD="${LD-ld} -m elf64lppc"

859

+ ;;

860

+ powerpc-*linux*)

861

LD="${LD-ld} -m elf64ppc"

862

;;

863

s390*-*linux*|s390*-*tpf*)

864

@@ -10394,7 +10400,7 @@

865

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

866

lt_status=$lt_dlunknown

867

cat > conftest.$ac_ext <<_LT_EOF

868

-#line 10397 "configure"

869

+#line 10403 "configure"

870

#include "confdefs.h"

871

872

#if HAVE_DLFCN_H

873

@@ -10500,7 +10506,7 @@

874

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

875

lt_status=$lt_dlunknown

876

cat > conftest.$ac_ext <<_LT_EOF

877

-#line 10503 "configure"

878

+#line 10509 "configure"

879

#include "confdefs.h"

880

881

#if HAVE_DLFCN_H

882

Index: zlib/ChangeLog

883

===================================================================

884

--- a/src/zlib/ChangeLog (.../tags/gcc_4_8_2_release)

885

+++ b/src/zlib/ChangeLog (.../branches/gcc-4_8-branch)

886

@@ -1,3 +1,10 @@

887

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

888

+

889

+ Backport from mainline

890

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

891

+

892

+ * configure: Regenerate.

893

+

894

2013-10-16 Release Manager

895

896

* GCC 4.8.2 released.

897

Index: libstdc++-v3/configure

898

===================================================================

899

--- a/src/libstdc++-v3/configure (.../tags/gcc_4_8_2_release)

900

+++ b/src/libstdc++-v3/configure (.../branches/gcc-4_8-branch)

901

@@ -7111,7 +7111,7 @@

902

rm -rf conftest*

903

;;

904

905

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

906

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

907

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

908

# Find out which ABI we are using.

909

echo 'int i;' > conftest.$ac_ext

910

@@ -7136,7 +7136,10 @@

911

;;

912

esac

913

;;

914

- ppc64-*linux*|powerpc64-*linux*)

915

+ powerpc64le-*linux*)

916

+ LD="${LD-ld} -m elf32lppclinux"

917

+ ;;

918

+ powerpc64-*linux*)

919

LD="${LD-ld} -m elf32ppclinux"

920

;;

921

s390x-*linux*)

922

@@ -7155,7 +7158,10 @@

923

x86_64-*linux*)

924

LD="${LD-ld} -m elf_x86_64"

925

;;

926

- ppc*-*linux*|powerpc*-*linux*)

927

+ powerpcle-*linux*)

928

+ LD="${LD-ld} -m elf64lppc"

929

+ ;;

930

+ powerpc-*linux*)

931

LD="${LD-ld} -m elf64ppc"

932

;;

933

s390*-*linux*|s390*-*tpf*)

934

@@ -11513,7 +11519,7 @@

935

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

936

lt_status=$lt_dlunknown

937

cat > conftest.$ac_ext <<_LT_EOF

938

-#line 11516 "configure"

939

+#line 11522 "configure"

940

#include "confdefs.h"

941

942

#if HAVE_DLFCN_H

943

@@ -11619,7 +11625,7 @@

944

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

945

lt_status=$lt_dlunknown

946

cat > conftest.$ac_ext <<_LT_EOF

947

-#line 11622 "configure"

948

+#line 11628 "configure"

949

#include "confdefs.h"

950

951

#if HAVE_DLFCN_H

952

@@ -15033,7 +15039,7 @@

953

#

954

# Fake what AC_TRY_COMPILE does. XXX Look at redoing this new-style.

955

cat > conftest.$ac_ext << EOF

956

-#line 15036 "configure"

957

+#line 15042 "configure"

958

struct S { ~S(); };

959

void bar();

960

void foo()

961

@@ -15383,7 +15389,7 @@

962

# Fake what AC_TRY_COMPILE does.

963

964

cat > conftest.$ac_ext << EOF

965

-#line 15386 "configure"

966

+#line 15392 "configure"

967

int main()

968

{

969

typedef bool atomic_type;

970

@@ -15418,7 +15424,7 @@

971

rm -f conftest*

972

973

cat > conftest.$ac_ext << EOF

974

-#line 15421 "configure"

975

+#line 15427 "configure"

976

int main()

977

{

978

typedef short atomic_type;

979

@@ -15453,7 +15459,7 @@

980

rm -f conftest*

981

982

cat > conftest.$ac_ext << EOF

983

-#line 15456 "configure"

984

+#line 15462 "configure"

985

int main()

986

{

987

// NB: _Atomic_word not necessarily int.

988

@@ -15489,7 +15495,7 @@

989

rm -f conftest*

990

991

cat > conftest.$ac_ext << EOF

992

-#line 15492 "configure"

993

+#line 15498 "configure"

994

int main()

995

{

996

typedef long long atomic_type;

997

@@ -15568,7 +15574,7 @@

998

# unnecessary for this test.

999

1000

cat > conftest.$ac_ext << EOF

1001

-#line 15571 "configure"

1002

+#line 15577 "configure"

1003

int main()

1004

{

1005

_Decimal32 d1;

1006

@@ -15610,7 +15616,7 @@

1007

# unnecessary for this test.

1008

1009

cat > conftest.$ac_ext << EOF

1010

-#line 15613 "configure"

1011

+#line 15619 "configure"

1012

template<typename T1, typename T2>

1013

struct same

1014

{ typedef T2 type; };

1015

@@ -15644,7 +15650,7 @@

1016

rm -f conftest*

1017

1018

cat > conftest.$ac_ext << EOF

1019

-#line 15647 "configure"

1020

+#line 15653 "configure"

1021

template<typename T1, typename T2>

1022

struct same

1023

{ typedef T2 type; };

1024

@@ -71573,7 +71579,7 @@

1025

fi

1026

1027

# For libtool versioning info, format is CURRENT:REVISION:AGE

1028

-libtool_VERSION=6:18:0

1029

+libtool_VERSION=6:19:0

1030

1031

# Everything parsed; figure out what files and settings to use.

1032

case $enable_symvers in

1033

Index: libstdc++-v3/scripts/extract_symvers.in

1034

===================================================================

1035

--- a/src/libstdc++-v3/scripts/extract_symvers.in (.../tags/gcc_4_8_2_release)

1036

+++ b/src/libstdc++-v3/scripts/extract_symvers.in (.../branches/gcc-4_8-branch)

1037

@@ -53,6 +53,7 @@

1038

# present on Solaris.

1039

${readelf} ${lib} |\

1040

sed -e 's/ \[<other>: [A-Fa-f0-9]*\] //' -e '/\.dynsym/,/^$/p;d' |\

1041

+ sed -e 's/ \[<localentry>: [0-9]*\] //' |\

1042

egrep -v ' (LOCAL|UND) ' |\

1043

1044

sed -e 's/ <processor specific>: / <processor_specific>:_/g' |\

1045

Index: libstdc++-v3/src/c++11/thread.cc

1046

===================================================================

1047

--- a/src/libstdc++-v3/src/c++11/thread.cc (.../tags/gcc_4_8_2_release)

1048

+++ b/src/libstdc++-v3/src/c++11/thread.cc (.../branches/gcc-4_8-branch)

1049

@@ -183,7 +183,7 @@

1050

::usleep(__us);

1051

}

1052

# else

1053

- ::sleep(__s.count() + (__ns >= 1000000));

1054

+ ::sleep(__s.count() + (__ns.count() >= 1000000));

1055

# endif

1056

#elif defined(_GLIBCXX_HAVE_WIN32_SLEEP)

1057

unsigned long ms = __ns.count() / 1000000;

1058

Index: libstdc++-v3/doc/xml/manual/abi.xml

1059

===================================================================

1060

--- a/src/libstdc++-v3/doc/xml/manual/abi.xml (.../tags/gcc_4_8_2_release)

1061

+++ b/src/libstdc++-v3/doc/xml/manual/abi.xml (.../branches/gcc-4_8-branch)

1062

@@ -203,6 +203,7 @@

1063

1064

1065

1066

+ <listitem><para>GCC 4.8.0: GCC_4.8.0</para></listitem>

1067

</itemizedlist>

1068

</listitem>

1069

1070

@@ -261,6 +262,7 @@

1071

<listitem><para>GCC 4.6.1: libstdc++.so.6.0.16</para></listitem>

1072

<listitem><para>GCC 4.7.0: libstdc++.so.6.0.17</para></listitem>

1073

<listitem><para>GCC 4.8.0: libstdc++.so.6.0.18</para></listitem>

1074

+ <listitem><para>GCC 4.8.3: libstdc++.so.6.0.19</para></listitem>

1075

</itemizedlist>

1076

<para>

1077

Note 1: Error should be libstdc++.so.3.0.3.

1078

@@ -324,6 +326,7 @@

1079

<listitem><para>GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5</para></listitem>

1080

<listitem><para>GCC 4.7.0: GLIBCXX_3.4.17, CXXABI_1.3.6</para></listitem>

1081

<listitem><para>GCC 4.8.0: GLIBCXX_3.4.18, CXXABI_1.3.7</para></listitem>

1082

+ <listitem><para>GCC 4.8.3: GLIBCXX_3.4.19, CXXABI_1.3.7</para></listitem>

1083

</itemizedlist>

1084

</listitem>

1085

1086

Index: libstdc++-v3/doc/xml/manual/status_cxx2011.xml

1087

===================================================================

1088

--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml (.../tags/gcc_4_8_2_release)

1089

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1090

@@ -877,10 +877,11 @@

1091

1092

</row>

1093

<row>

1094

+ <?dbhtml bgcolor="#B0B0B0" ?>

1095

1096

<entry>Other transformations</entry>

1097

- <entry>Y</entry>

1098

- <entry/>

1099

+ <entry>Partial</entry>

1100

+ <entry>Missing <code>aligned_union</code>.</entry>

1101

</row>

1102

<row>

1103

1104

Index: libstdc++-v3/doc/xml/manual/spine.xml

1105

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1106

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1107

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1108

@@ -20,6 +20,7 @@

1109

1110

1111

1112

+ <year>2013</year>

1113

1114

1115

</holder>

1116

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1117

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1123

\ No newline at end of file

1124

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library" /><link rel="prev" href="manual/backwards.html" title="Backwards Compatibility" /><link rel="next" href="api.html" title="The GNU C++ Library API Reference" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="article"><a href="api.html">The GNU C++ Library API Reference</a></span></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Backwards Compatibility </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> The GNU C++ Library API Reference</td></tr></table></div></body></html>

1125

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1127

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1130

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1131

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1133

\ No newline at end of file

1134

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library" /><link rel="prev" href="api.html" title="The GNU C++ Library API Reference" /><link rel="next" href="faq.html" title="Frequently Asked Questions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="article"><a href="faq.html">Frequently Asked Questions</a></span></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library API Reference </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> Frequently Asked Questions</td></tr></table></div></body></html>

1135

\ No newline at end of file

1136

Index: libstdc++-v3/doc/html/faq.html

1137

===================================================================

1138

--- a/src/libstdc++-v3/doc/html/faq.html (.../tags/gcc_4_8_2_release)

1139

+++ b/src/libstdc++-v3/doc/html/faq.html (.../branches/gcc-4_8-branch)

1140

@@ -1,9 +1,9 @@

1141

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1142

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Frequently Asked Questions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="bk03.html" title="" /><link rel="prev" href="bk03.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Frequently Asked Questions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bk03.html">Prev</a> </td><th width="60%" align="center"></th><td width="20%" align="right"> </td></tr></table><hr /></div><div class="article"><div class="titlepage"><div><div><h1 class="title"><a id="faq"></a>Frequently Asked Questions</h1></div><div><p class="copyright">Copyright ©

1143

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Frequently Asked Questions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="bk03.html" title="" /><link rel="prev" href="bk03.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Frequently Asked Questions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bk03.html">Prev</a> </td><th width="60%" align="center"></th><td width="20%" align="right"> </td></tr></table><hr /></div><div class="article"><div class="titlepage"><div><div><h1 class="title"><a id="faq"></a>Frequently Asked Questions</h1></div><div><p class="copyright">Copyright ©

1144

2008, 2010

1145

1146

1147

- </p></div></div><hr /></div><div class="qandaset"><a id="idp1581728"></a><dl><dt></dt><dd><dl><dt>1.1. <a href="faq.html#faq.what">

1148

+ </p></div></div><hr /></div><div class="qandaset"><a id="idm270011560848"></a><dl><dt></dt><dd><dl><dt>1.1. <a href="faq.html#faq.what">

1149

What is libstdc++?

1150

</a></dt><dt>1.2. <a href="faq.html#faq.why">

1151

Why should I use libstdc++?

1152

Index: libstdc++-v3/doc/html/index.html

1153

===================================================================

1154

--- a/src/libstdc++-v3/doc/html/index.html (.../tags/gcc_4_8_2_release)

1155

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1156

@@ -1,5 +1,5 @@

1157

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1158

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="description" content="Short Contents Copyright (C) 2008-2013 FSF Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts. This is the top level of the libstdc++ documentation set. The documentation is divided into the following three sections. Manual Frequently Asked Questions API and Source Documentation" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="next" href="manual/index.html" title="The GNU C++ Library Manual" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library</th></tr><tr><td width="20%" align="left"> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="manual/index.html">Next</a></td></tr></table><hr /></div><div class="set" lang="en" xml:lang="en"><div class="titlepage"><div><div><h1 class="title"><a id="set-index"></a>The GNU C++ Library</h1></div><div><div class="abstract"><a id="contents"></a><p class="title"><strong>Short Contents</strong></p><p>

1159

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="description" content="Short Contents Copyright (C) 2008-2013 FSF Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts. This is the top level of the libstdc++ documentation set. The documentation is divided into the following three sections. Manual Frequently Asked Questions API and Source Documentation" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="next" href="manual/index.html" title="The GNU C++ Library Manual" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library</th></tr><tr><td width="20%" align="left"> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="manual/index.html">Next</a></td></tr></table><hr /></div><div class="set" lang="en" xml:lang="en"><div class="titlepage"><div><div><h1 class="title"><a id="set-index"></a>The GNU C++ Library</h1></div><div><div class="abstract"><a id="contents"></a><p class="title"><strong>Short Contents</strong></p><p>

1160

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<a class="link" href="http://www.fsf.org/" target="_top">FSF

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1165

<a class="link" href="api.html" title="The GNU C++ Library API Reference">API and Source Documentation</a>

1166

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1167

- </p></div></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="book"><a href="manual/index.html">The GNU C++ Library Manual</a></span></dt><dd><dl><dt><span class="part"><a href="manual/intro.html">I.

1168

+ </p></div></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="book"><a href="manual/index.html">The GNU C++ Library Manual</a></span></dt><dd><dl><dt><span class="part"><a href="manual/intro.html">I.

1169

Introduction

1170

1171

</a></span></dt><dd><dl><dt><span class="chapter"><a href="manual/status.html">1. Status</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="manual/status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="manual/status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="manual/status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="manual/status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="manual/license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="manual/license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="manual/license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="manual/bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="manual/bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="manual/bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="manual/setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="manual/setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="manual/configure.html">Configure</a></span></dt><dt><span class="section"><a href="manual/make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="manual/using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="manual/using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="manual/using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="manual/using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="manual/using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="manual/using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> 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Support

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Iterators

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Standard Contents

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Iterators

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- <a id="idp16156992" class="indexterm"></a>

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-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="iterators.html#std.iterators.predefined">Predefined</a></span></dt><dd><dl><dt><span class="section"><a href="iterators.html#iterators.predefined.vs_pointers">Iterators vs. Pointers</a></span></dt><dt><span class="section"><a href="iterators.html#iterators.predefined.end">One Past the End</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.iterators.predefined"></a>Predefined</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="iterators.predefined.vs_pointers"></a>Iterators vs. Pointers</h3></div></div></div><p>

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+ <a id="idm269999374096" class="indexterm"></a>

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+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="iterators.html#std.iterators.predefined">Predefined</a></span></dt><dd><dl><dt><span class="section"><a href="iterators.html#iterators.predefined.vs_pointers">Iterators vs. Pointers</a></span></dt><dt><span class="section"><a href="iterators.html#iterators.predefined.end">One Past the End</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.iterators.predefined"></a>Predefined</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="iterators.predefined.vs_pointers"></a>Iterators vs. Pointers</h3></div></div></div><p>

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The following

1239

FAQ <a class="link" href="../faq.html#faq.iterator_as_pod" title="7.1.">entry</a> points out that

1240

iterators are not implemented as pointers. They are a generalization

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1249

Let's start by describing how the data on a freelist is laid out in memory.

1250

This is the first two blocks in freelist for thread id 3 in bin 3 (8 bytes):

1251

</p><pre class="programlisting">

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Extensions

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</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.intro"></a>Intro</h2></div></div></div><p>

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The mt allocator [hereinafter referred to simply as "the allocator"]

1277

is a fixed size (power of two) allocator that was initially

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Configure</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, configure, options" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="setup.html" title="Chapter 2. Setup" /><link rel="prev" href="setup.html" title="Chapter 2. Setup" /><link rel="next" href="make.html" title="Make" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Configure</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="setup.html">Prev</a> </td><th width="60%" align="center">Chapter 2. Setup</th><td width="20%" align="right"> <a accesskey="n" href="make.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.configure"></a>Configure</h2></div></div></div><p>

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When configuring libstdc++, you'll have to configure the entire

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<span class="emphasis"><em>gccsrcdir</em></span> directory. Consider using the

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toplevel gcc configuration option

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Index: libstdc++-v3/doc/html/manual/status.html

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===================================================================

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 1. Status</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="intro.html" title="Part I. Introduction" /><link rel="next" href="license.html" title="License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 1. Status</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="intro.html">Prev</a> </td><th width="60%" align="center">Part I.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 1. Status</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="intro.html" title="Part I. Introduction" /><link rel="next" href="license.html" title="License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 1. Status</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="intro.html">Prev</a> </td><th width="60%" align="center">Part I.

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Introduction

1309

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-</th><td width="20%" align="right"> <a accesskey="n" href="license.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.status"></a>Chapter 1. Status</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.iso"></a>Implementation Status</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="status.iso.1998"></a>C++ 1998/2003</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="iso.1998.status"></a>Implementation Status</h4></div></div></div><p>

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+</th><td width="20%" align="right"> <a accesskey="n" href="license.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.status"></a>Chapter 1. Status</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.iso"></a>Implementation Status</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="status.iso.1998"></a>C++ 1998/2003</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="iso.1998.status"></a>Implementation Status</h4></div></div></div><p>

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This status table is based on the table of contents of ISO/IEC 14882:2003.

1313

</p><p>

1314

This page describes the C++ support in mainline GCC SVN, not in any

1315

particular release.

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-</p><div class="table"><a id="idp452240"></a><p class="title"><strong>Table 1.1. C++ 1998/2003 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 1998/2003 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

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+</p><div class="table"><a id="idm270008034928"></a><p class="title"><strong>Table 1.1. C++ 1998/2003 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 1998/2003 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

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</td><td colspan="3" align="left">

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<span class="emphasis"><em>Language support</em></span>

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</p><p>

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This page describes the C++11 support in mainline GCC SVN, not in any

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-</p><div class="table"><a id="idp8670848"></a><p class="title"><strong>Table 1.2. C++ 2011 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 2011 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

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+</p><div class="table"><a id="idm270007982624"></a><p class="title"><strong>Table 1.2. C++ 2011 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 2011 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

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</td><td colspan="3" align="left">

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<span class="emphasis"><em>Language support</em></span>

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@@ -183,7 +183,7 @@

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is_trivially_copy_constructible, is_trivially_move_constructible,

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is_trivially_assignable, is_trivially_default_assignable,

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is_trivially_copy_assignable, is_trivially_move_assignable

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- </td></tr><tr><td align="left">20.9.5</td><td align="left">Type property queries</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.6</td><td align="left">Relationships between types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7</td><td align="left">Transformations between types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.9.7.1</td><td align="left">Const-volatile modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.2</td><td align="left">Reference modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.3</td><td align="left">Sign modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.4</td><td align="left">Array modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.5</td><td align="left">Pointer modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.6</td><td align="left">Other transformations</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10</td><td align="left">Compile-time rational arithmetic</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.2</td><td align="left">Header <code class="code"><ratio></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.3</td><td align="left">Class template <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.4</td><td align="left">Arithmetic on <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.5</td><td align="left">Comparison of <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.6</td><td align="left">SI types for <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11</td><td align="left">Time utilities</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.3</td><td align="left">Clock requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4</td><td align="left">Time-related traits</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.4.1</td><td align="left"><code class="code">treat_as_floating_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.2</td><td align="left"><code class="code">duration_values</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.3</td><td align="left">Specializations of <code class="code">common_type</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.11.5</td><td align="left">Class template <code class="code">duration</code></td><td align="left">Partial</td><td align="left">Missing constexpr for non-member arithmetic operations</td></tr><tr><td align="left">20.11.6</td><td align="left">Class template <code class="code">time_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7</td><td align="left">Clocks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.7.1</td><td align="left">Class <code class="code">system_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.2</td><td align="left">Class <code class="code">steady_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.3</td><td align="left">Class <code class="code">high_resolution_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.8</td><td align="left">Date and time functions</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12</td><td align="left">Scoped allocator adaptor</td><td align="left">Partial</td><td align="left"> </td></tr><tr><td align="left">20.12.1</td><td align="left">Header <code class="code"><scoped_allocator></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.12.2</td><td align="left">Scoped allocator adaptor member types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.12.3</td><td align="left">Scoped allocator adaptor constructors</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12.4</td><td align="left">Scoped allocator adaptor members</td><td align="left">Partial</td><td align="left">OUTERMOST is not recursive.</td></tr><tr><td align="left">20.12.5</td><td align="left">Scoped allocator operators</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.13</td><td align="left">Class <code class="code">type_index</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">

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+ </td></tr><tr><td align="left">20.9.5</td><td align="left">Type property queries</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.6</td><td align="left">Relationships between types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7</td><td align="left">Transformations between types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.9.7.1</td><td align="left">Const-volatile modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.2</td><td align="left">Reference modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.3</td><td align="left">Sign modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.4</td><td align="left">Array modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.5</td><td align="left">Pointer modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.9.7.6</td><td align="left">Other transformations</td><td align="left">Partial</td><td align="left">Missing <code class="code">aligned_union</code>.</td></tr><tr><td align="left">20.10</td><td align="left">Compile-time rational arithmetic</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.2</td><td align="left">Header <code class="code"><ratio></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.3</td><td align="left">Class template <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.4</td><td align="left">Arithmetic on <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.5</td><td align="left">Comparison of <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.6</td><td align="left">SI types for <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11</td><td align="left">Time utilities</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.3</td><td align="left">Clock requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4</td><td align="left">Time-related traits</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.4.1</td><td align="left"><code class="code">treat_as_floating_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.2</td><td align="left"><code class="code">duration_values</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.3</td><td align="left">Specializations of <code class="code">common_type</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.11.5</td><td align="left">Class template <code class="code">duration</code></td><td align="left">Partial</td><td align="left">Missing constexpr for non-member arithmetic operations</td></tr><tr><td align="left">20.11.6</td><td align="left">Class template <code class="code">time_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7</td><td align="left">Clocks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.7.1</td><td align="left">Class <code class="code">system_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.2</td><td align="left">Class <code class="code">steady_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.3</td><td align="left">Class <code class="code">high_resolution_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.8</td><td align="left">Date and time functions</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12</td><td align="left">Scoped allocator adaptor</td><td align="left">Partial</td><td align="left"> </td></tr><tr><td align="left">20.12.1</td><td align="left">Header <code class="code"><scoped_allocator></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.12.2</td><td align="left">Scoped allocator adaptor member types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.12.3</td><td align="left">Scoped allocator adaptor constructors</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12.4</td><td align="left">Scoped allocator adaptor members</td><td align="left">Partial</td><td align="left">OUTERMOST is not recursive.</td></tr><tr><td align="left">20.12.5</td><td align="left">Scoped allocator operators</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.13</td><td align="left">Class <code class="code">type_index</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">

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</td><td colspan="3" align="left">

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<span class="emphasis"><em>Strings</em></span>

1339

@@ -302,7 +302,7 @@

1340

</p><p>

1341

This page describes the TR1 support in mainline GCC SVN, not in any particular

1342

release.

1343

-</p><div class="table"><a id="idp7483200"></a><p class="title"><strong>Table 1.3. C++ TR1 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR1 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left"><span class="emphasis"><em>2</em></span></td><td colspan="3" align="left"><span class="emphasis"><em>General Utilities</em></span></td></tr><tr><td align="left">2.1</td><td align="left">Reference wrappers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.1</td><td align="left">Additions to header <code class="code"><functional></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2</td><td align="left">Class template <code class="code">reference_wrapper</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.2.1</td><td align="left"><code class="code">reference_wrapper</code> construct/copy/destroy</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.2</td><td align="left"><code class="code">reference_wrapper</code> assignment</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.3</td><td align="left"><code class="code">reference_wrapper</code> access</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.4</td><td align="left"><code class="code">reference_wrapper</code> invocation</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.5</td><td align="left"><code class="code">reference_wrapper</code> helper functions</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2</td><td align="left">Smart pointers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.2.1</td><td align="left">Additions to header <code class="code"><memory></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.2</td><td align="left">Class <code class="code">bad_weak_ptr</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.3</td><td align="left">Class template <code class="code">shared_ptr</code></td><td align="left"> </td><td align="left">

1344

+</p><div class="table"><a id="idm270006687472"></a><p class="title"><strong>Table 1.3. C++ TR1 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR1 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left"><span class="emphasis"><em>2</em></span></td><td colspan="3" align="left"><span class="emphasis"><em>General Utilities</em></span></td></tr><tr><td align="left">2.1</td><td align="left">Reference wrappers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.1</td><td align="left">Additions to header <code class="code"><functional></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2</td><td align="left">Class template <code class="code">reference_wrapper</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.2.1</td><td align="left"><code class="code">reference_wrapper</code> construct/copy/destroy</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.2</td><td align="left"><code class="code">reference_wrapper</code> assignment</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.3</td><td align="left"><code class="code">reference_wrapper</code> access</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.4</td><td align="left"><code class="code">reference_wrapper</code> invocation</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.5</td><td align="left"><code class="code">reference_wrapper</code> helper functions</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2</td><td align="left">Smart pointers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.2.1</td><td align="left">Additions to header <code class="code"><memory></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.2</td><td align="left">Class <code class="code">bad_weak_ptr</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.3</td><td align="left">Class template <code class="code">shared_ptr</code></td><td align="left"> </td><td align="left">

1345

<p>

1346

Uses code from

1347

<a class="link" href="http://www.boost.org/libs/smart_ptr/shared_ptr.htm" target="_top">boost::shared_ptr</a>.

1348

@@ -323,7 +323,7 @@

1349

</p><p>

1350

This page describes the TR 24733 support in mainline GCC SVN, not in any

1351

particular release.

1352

-</p><div class="table"><a id="idp12559072"></a><p class="title"><strong>Table 1.4. C++ TR 24733 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR 24733 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1353

+</p><div class="table"><a id="idm270002960368"></a><p class="title"><strong>Table 1.4. C++ TR 24733 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR 24733 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1354

1355

</td><td colspan="3" align="left">

1356

<span class="emphasis"><em>Introduction</em></span>

1357

Index: libstdc++-v3/doc/html/manual/profile_mode_devel.html

1358

===================================================================

1359

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_devel.html (.../tags/gcc_4_8_2_release)

1360

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_devel.html (.../branches/gcc-4_8-branch)

1361

@@ -1,5 +1,5 @@

1362

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1363

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Developer Information</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_impl.html" title="Implementation Issues" /><link rel="next" href="profile_mode_diagnostics.html" title="Diagnostics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Developer Information</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_diagnostics.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.developer"></a>Developer Information</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.developer.bigpic"></a>Big Picture</h3></div></div></div><p>The profile mode headers are included with

1364

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Developer Information</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_impl.html" title="Implementation Issues" /><link rel="next" href="profile_mode_diagnostics.html" title="Diagnostics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Developer Information</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_diagnostics.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.developer"></a>Developer Information</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.developer.bigpic"></a>Big Picture</h3></div></div></div><p>The profile mode headers are included with

1365

<code class="code">-D_GLIBCXX_PROFILE</code> through preprocessor directives in

1366

<code class="code">include/std/*</code>.

1367

</p><p>Instrumented implementations are provided in

1368

Index: libstdc++-v3/doc/html/manual/debug_mode_design.html

1369

===================================================================

1370

--- a/src/libstdc++-v3/doc/html/manual/debug_mode_design.html (.../tags/gcc_4_8_2_release)

1371

+++ b/src/libstdc++-v3/doc/html/manual/debug_mode_design.html (.../branches/gcc-4_8-branch)

1372

@@ -1,5 +1,5 @@

1373

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1374

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_using.html" title="Using" /><link rel="next" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.design"></a>Design</h2></div></div></div><p>

1375

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_using.html" title="Using" /><link rel="next" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.design"></a>Design</h2></div></div></div><p>

1376

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="debug_mode.design.goals"></a>Goals</h3></div></div></div><p>

1377

</p><p> The libstdc++ debug mode replaces unsafe (but efficient) standard

1378

containers and iterators with semantically equivalent safe standard

1379

@@ -391,7 +391,7 @@

1380

</p><p> There are several existing implementations of debug modes for C++

1381

standard library implementations, although none of them directly

1382

supports debugging for programs using libstdc++. The existing

1383

- implementations include:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><a class="link" href="http://www.mathcs.sjsu.edu/faculty/horstman/safestl.html" target="_top">SafeSTL</a>:

1384

+ implementations include:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><a class="link" href="http://www.cs.sjsu.edu/faculty/horstman/safestl.html" target="_top">SafeSTL</a>:

1385

SafeSTL was the original debugging version of the Standard Template

1386

Library (STL), implemented by Cay S. Horstmann on top of the

1387

Hewlett-Packard STL. Though it inspired much work in this area, it

1388

Index: libstdc++-v3/doc/html/manual/policy_data_structures_design.html

1389

===================================================================

1390

--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_design.html (.../tags/gcc_4_8_2_release)

1391

+++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_design.html (.../branches/gcc-4_8-branch)

1392

@@ -1,5 +1,5 @@

1393

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1394

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_using.html" title="Using" /><link rel="next" href="policy_based_data_structures_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_using.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_based_data_structures_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.design"></a>Design</h2></div></div></div><p></p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.design.concepts"></a>Concepts</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.design.concepts.null_type"></a>Null Policy Classes</h4></div></div></div><p>

1395

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_using.html" title="Using" /><link rel="next" href="policy_based_data_structures_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_using.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_based_data_structures_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.design"></a>Design</h2></div></div></div><p></p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.design.concepts"></a>Concepts</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.design.concepts.null_type"></a>Null Policy Classes</h4></div></div></div><p>

1396

Associative containers are typically parametrized by various

1397

policies. For example, a hash-based associative container is

1398

parametrized by a hash-functor, transforming each key into an

1399

@@ -170,7 +170,7 @@

1400

naturally; collision-chaining hash tables (label B) store

1401

equivalent-key values in the same bucket, the bucket can be

1402

arranged so that equivalent-key values are consecutive.

1403

- </p><div class="figure"><a id="idp18000448"></a><p class="title"><strong>Figure 22.8. Non-unique Mapping Standard Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_1.png" align="middle" alt="Non-unique Mapping Standard Containers" /></div></div></div><br class="figure-break" /><p>

1404

+ </p><div class="figure"><a id="idm269997530416"></a><p class="title"><strong>Figure 22.8. Non-unique Mapping Standard Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_1.png" align="middle" alt="Non-unique Mapping Standard Containers" /></div></div></div><br class="figure-break" /><p>

1405

Put differently, the standards' non-unique mapping

1406

associative-containers are associative containers that map

1407

primary keys to linked lists that are embedded into the

1408

@@ -252,7 +252,7 @@

1409

first graphic above. Labels A and B, respectively. Each shaded

1410

box represents some size-type or secondary

1411

associative-container.

1412

- </p><div class="figure"><a id="idp18023952"></a><p class="title"><strong>Figure 22.10. Non-unique Mapping Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_3.png" align="middle" alt="Non-unique Mapping Containers" /></div></div></div><br class="figure-break" /><p>

1413

+ </p><div class="figure"><a id="idm269997506912"></a><p class="title"><strong>Figure 22.10. Non-unique Mapping Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_3.png" align="middle" alt="Non-unique Mapping Containers" /></div></div></div><br class="figure-break" /><p>

1414

In the first example above, then, one would use an associative

1415

container mapping each user to an associative container which

1416

maps each application id to a start time (see

1417

@@ -305,7 +305,7 @@

1418

shows invariants for order-preserving containers: point-type

1419

iterators are synonymous with range-type iterators.

1420

Orthogonally, <span class="emphasis"><em>C</em></span>shows invariants for "set"

1421

- containers: iterators are synonymous with const iterators.</p><div class="figure"><a id="idp18043824"></a><p class="title"><strong>Figure 22.11. Point Iterator Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterator_hierarchy.png" align="middle" alt="Point Iterator Hierarchy" /></div></div></div><br class="figure-break" /><p>Note that point-type iterators in self-organizing containers

1422

+ containers: iterators are synonymous with const iterators.</p><div class="figure"><a id="idm269997487104"></a><p class="title"><strong>Figure 22.11. Point Iterator Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterator_hierarchy.png" align="middle" alt="Point Iterator Hierarchy" /></div></div></div><br class="figure-break" /><p>Note that point-type iterators in self-organizing containers

1423

(hash-based associative containers) lack movement

1424

operators, such as <code class="literal">operator++</code> - in fact, this

1425

is the reason why this library differentiates from the standard C++ librarys

1426

@@ -344,7 +344,7 @@

1427

to the question of whether point-type iterators and range-type

1428

iterators are valid. The graphic below shows tags corresponding to

1429

different types of invalidation guarantees.

1430

- </p><div class="figure"><a id="idp18057168"></a><p class="title"><strong>Figure 22.12. Invalidation Guarantee Tags Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_tag_hierarchy.png" align="middle" alt="Invalidation Guarantee Tags Hierarchy" /></div></div></div><br class="figure-break" /><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>

1431

+ </p><div class="figure"><a id="idm269997473760"></a><p class="title"><strong>Figure 22.12. Invalidation Guarantee Tags Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_tag_hierarchy.png" align="middle" alt="Invalidation Guarantee Tags Hierarchy" /></div></div></div><br class="figure-break" /><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>

1432

<code class="classname">basic_invalidation_guarantee</code>

1433

corresponds to a basic guarantee that a point-type iterator,

1434

a found pointer, or a found reference, remains valid as long

1435

@@ -428,7 +428,7 @@

1436

</p><p>

1437

This library contains a container tag hierarchy corresponding to the

1438

diagram below.

1439

- </p><div class="figure"><a id="idp18087392"></a><p class="title"><strong>Figure 22.13. Container Tag Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_container_tag_hierarchy.png" align="middle" alt="Container Tag Hierarchy" /></div></div></div><br class="figure-break" /><p>

1440

+ </p><div class="figure"><a id="idm269997443664"></a><p class="title"><strong>Figure 22.13. Container Tag Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_container_tag_hierarchy.png" align="middle" alt="Container Tag Hierarchy" /></div></div></div><br class="figure-break" /><p>

1441

Given any container <span class="type">Cntnr</span>, the tag of

1442

the underlying data structure can be found via <code class="literal">typename

1443

Cntnr::container_category</code>.

1444

@@ -487,7 +487,7 @@

1445

collision-chaining container, except for the following.</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p><code class="classname">Comb_Probe_Fn</code> describes how to transform a probe

1446

sequence into a sequence of positions within the table.</p></li><li class="listitem"><p><code class="classname">Probe_Fn</code> describes a probe sequence policy.</p></li></ol></div><p>Some of the default template values depend on the values of

1447

other parameters, and are explained below.</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="container.hash.details"></a>Details</h5></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.hash.details.hash_policies"></a>Hash Policies</h6></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="details.hash_policies.general"></a>General</h6></div></div></div><p>Following is an explanation of some functions which hashing

1448

- involves. The graphic below illustrates the discussion.</p><div class="figure"><a id="idp18127536"></a><p class="title"><strong>Figure 22.14. Hash functions, ranged-hash functions, and

1449

+ involves. The graphic below illustrates the discussion.</p><div class="figure"><a id="idm269997403584"></a><p class="title"><strong>Figure 22.14. Hash functions, ranged-hash functions, and

1450

range-hashing functions</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_ranged_hash_range_hashing_fns.png" align="middle" alt="Hash functions, ranged-hash functions, and range-hashing functions" /></div></div></div><br class="figure-break" /><p>Let U be a domain (e.g., the integers, or the

1451

strings of 3 characters). A hash-table algorithm needs to map

1452

elements of U "uniformly" into the range [0,..., m -

1453

@@ -504,7 +504,7 @@

1454

Z<sub>+</sub>,</p><p>which maps a non-negative hash value, and a non-negative

1455

range upper-bound into a non-negative integral in the range

1456

between 0 (inclusive) and the range upper bound (exclusive),

1457

- i.e., for any r in Z<sub>+</sub>,</p><p>0 ≤ g(r, m) ≤ m - 1</p><p>The resulting ranged-hash function, is</p><div class="equation"><a id="idp18141344"></a><p class="title"><strong>Equation 22.1. Ranged Hash Function</strong></p><div class="equation-contents"><span class="mathphrase">

1458

+ i.e., for any r in Z<sub>+</sub>,</p><p>0 ≤ g(r, m) ≤ m - 1</p><p>The resulting ranged-hash function, is</p><div class="equation"><a id="idm269997389776"></a><p class="title"><strong>Equation 22.1. Ranged Hash Function</strong></p><div class="equation-contents"><span class="mathphrase">

1459

f(u , m) = g(h(u), m)

1460

</span></div></div><br class="equation-break" /><p>From the above, it is obvious that given g and

1461

h, f can always be composed (however the converse

1462

@@ -524,7 +524,7 @@

1463

transforming the sequence of hash values into a sequence of

1464

positions.</p></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="details.hash_policies.range"></a>Range Hashing</h6></div></div></div><p>Some common choices for range-hashing functions are the

1465

division, multiplication, and middle-square methods (<a class="xref" href="policy_data_structures.html#biblio.knuth98sorting" title="The Art of Computer Programming - Sorting and Searching">[biblio.knuth98sorting]</a>), defined

1466

- as</p><div class="equation"><a id="idp18147232"></a><p class="title"><strong>Equation 22.2. Range-Hashing, Division Method</strong></p><div class="equation-contents"><span class="mathphrase">

1467

+ as</p><div class="equation"><a id="idm269997383888"></a><p class="title"><strong>Equation 22.2. Range-Hashing, Division Method</strong></p><div class="equation-contents"><span class="mathphrase">

1468

g(r, m) = r mod m

1469

</span></div></div><br class="equation-break" /><p>g(r, m) = ⌈ u/v ( a r mod v ) ⌉</p><p>and</p><p>g(r, m) = ⌈ u/v ( r<sup>2</sup> mod v ) ⌉</p><p>respectively, for some positive integrals u and

1470

v (typically powers of 2), and some a. Each of

1471

@@ -535,9 +535,9 @@

1472

implement using the low

1473

level % (modulo) operation (for any m), or the

1474

low level & (bit-mask) operation (for the case where

1475

- m is a power of 2), i.e.,</p><div class="equation"><a id="idp18151744"></a><p class="title"><strong>Equation 22.3. Division via Prime Modulo</strong></p><div class="equation-contents"><span class="mathphrase">

1476

+ m is a power of 2), i.e.,</p><div class="equation"><a id="idm269997379376"></a><p class="title"><strong>Equation 22.3. Division via Prime Modulo</strong></p><div class="equation-contents"><span class="mathphrase">

1477

g(r, m) = r % m

1478

- </span></div></div><br class="equation-break" /><p>and</p><div class="equation"><a id="idp18153568"></a><p class="title"><strong>Equation 22.4. Division via Bit Mask</strong></p><div class="equation-contents"><span class="mathphrase">

1479

+ </span></div></div><br class="equation-break" /><p>and</p><div class="equation"><a id="idm269997377552"></a><p class="title"><strong>Equation 22.4. Division via Bit Mask</strong></p><div class="equation-contents"><span class="mathphrase">

1480

g(r, m) = r & m - 1, (with m =

1481

2<sup>k</sup> for some k)

1482

</span></div></div><br class="equation-break" /><p>respectively.</p><p>The % (modulo) implementation has the advantage that for

1483

@@ -563,7 +563,7 @@

1484

s = [ s<sub>0</sub>,..., s<sub>t - 1</sub>]

1485

</p><p>be a string of t characters, each of which is from

1486

domain S. Consider the following ranged-hash

1487

- function:</p><div class="equation"><a id="idp18163200"></a><p class="title"><strong>Equation 22.5.

1488

+ function:</p><div class="equation"><a id="idm269997367984"></a><p class="title"><strong>Equation 22.5.

1489

A Standard String Hash Function

1490

</strong></p><div class="equation-contents"><span class="mathphrase">

1491

f<sub>1</sub>(s, m) = ∑ <sub>i =

1492

@@ -575,7 +575,7 @@

1493

of a long DNA sequence (and so S = {'A', 'C', 'G',

1494

'T'}). In this case, scanning the entire string might be

1495

prohibitively expensive. A possible alternative might be to use

1496

- only the first k characters of the string, where</p><p>|S|<sup>k</sup> ≥ m ,</p><p>i.e., using the hash function</p><div class="equation"><a id="idp18169344"></a><p class="title"><strong>Equation 22.6.

1497

+ only the first k characters of the string, where</p><p>|S|<sup>k</sup> ≥ m ,</p><p>i.e., using the hash function</p><div class="equation"><a id="idm269997361840"></a><p class="title"><strong>Equation 22.6.

1498

Only k String DNA Hash

1499

</strong></p><div class="equation-contents"><span class="mathphrase">

1500

f<sub>2</sub>(s, m) = ∑ <sub>i

1501

@@ -606,12 +606,12 @@

1502

the container transforms the key into a non-negative integral

1503

using the hash functor (points B and C), and transforms the

1504

result into a position using the combining functor (points D

1505

- and E).</p><div class="figure"><a id="idp18191968"></a><p class="title"><strong>Figure 22.15. Insert hash sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram.png" align="middle" alt="Insert hash sequence diagram" /></div></div></div><br class="figure-break" /><p>If <code class="classname">cc_hash_table</code>'s

1506

+ and E).</p><div class="figure"><a id="idm269997339216"></a><p class="title"><strong>Figure 22.15. Insert hash sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram.png" align="middle" alt="Insert hash sequence diagram" /></div></div></div><br class="figure-break" /><p>If <code class="classname">cc_hash_table</code>'s

1507

hash-functor, <code class="classname">Hash_Fn</code> is instantiated by <code class="classname">null_type</code> , then <code class="classname">Comb_Hash_Fn</code> is taken to be

1508

a ranged-hash function. The graphic below shows an <code class="function">insert</code> sequence

1509

diagram. The user inserts an element (point A), the container

1510

transforms the key into a position using the combining functor

1511

- (points B and C).</p><div class="figure"><a id="idp18199024"></a><p class="title"><strong>Figure 22.16. Insert hash sequence diagram with a null policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram2.png" align="middle" alt="Insert hash sequence diagram with a null policy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="hash_policies.implementation.probe"></a>

1512

+ (points B and C).</p><div class="figure"><a id="idm269997332160"></a><p class="title"><strong>Figure 22.16. Insert hash sequence diagram with a null policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram2.png" align="middle" alt="Insert hash sequence diagram with a null policy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="hash_policies.implementation.probe"></a>

1513

Probing tables

1514

</h6></div></div></div><p><code class="classname">gp_hash_table</code> is parametrized by

1515

<code class="classname">Hash_Fn</code>, <code class="classname">Probe_Fn</code>,

1516

@@ -634,7 +634,7 @@

1517

a linear probe and a quadratic probe function,

1518

respectively.</p></li></ol></div><p>

1519

The graphic below shows the relationships.

1520

- </p><div class="figure"><a id="idp18215840"></a><p class="title"><strong>Figure 22.17. Hash policy class diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_policy_cd.png" align="middle" alt="Hash policy class diagram" /></div></div></div><br class="figure-break" /></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.hash.details.resize_policies"></a>Resize Policies</h6></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="resize_policies.general"></a>General</h6></div></div></div><p>Hash-tables, as opposed to trees, do not naturally grow or

1521

+ </p><div class="figure"><a id="idm269997315408"></a><p class="title"><strong>Figure 22.17. Hash policy class diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_policy_cd.png" align="middle" alt="Hash policy class diagram" /></div></div></div><br class="figure-break" /></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.hash.details.resize_policies"></a>Resize Policies</h6></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="resize_policies.general"></a>General</h6></div></div></div><p>Hash-tables, as opposed to trees, do not naturally grow or

1522

shrink. It is necessary to specify policies to determine how

1523

and when a hash table should change its size. Usually, resize

1524

policies can be decomposed into orthogonal policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>A size policy indicating how a hash table

1525

@@ -667,10 +667,10 @@

1526

and some load factor be denoted by Α. We would like to

1527

calculate the minimal length of k, such that if there were Α

1528

m elements in the hash table, a probe sequence of length k would

1529

- be found with probability at most 1/m.</p><div class="figure"><a id="idp18234944"></a><p class="title"><strong>Figure 22.18. Balls and bins</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_balls_and_bins.png" align="middle" alt="Balls and bins" /></div></div></div><br class="figure-break" /><p>Denote the probability that a probe sequence of length

1530

+ be found with probability at most 1/m.</p><div class="figure"><a id="idm269997296368"></a><p class="title"><strong>Figure 22.18. Balls and bins</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_balls_and_bins.png" align="middle" alt="Balls and bins" /></div></div></div><br class="figure-break" /><p>Denote the probability that a probe sequence of length

1531

k appears in bin i by p<sub>i</sub>, the

1532

length of the probe sequence of bin i by

1533

- l<sub>i</sub>, and assume uniform distribution. Then</p><div class="equation"><a id="idp18240448"></a><p class="title"><strong>Equation 22.7.

1534

+ l<sub>i</sub>, and assume uniform distribution. Then</p><div class="equation"><a id="idm269997290864"></a><p class="title"><strong>Equation 22.7.

1535

Probability of Probe Sequence of Length k

1536

</strong></p><div class="equation-contents"><span class="mathphrase">

1537

p<sub>1</sub> =

1538

@@ -684,7 +684,7 @@

1539

l<sub>i</sub> are negatively-dependent

1540

(<a class="xref" href="policy_data_structures.html#biblio.dubhashi98neg" title="Balls and bins: A study in negative dependence">[biblio.dubhashi98neg]</a>)

1541

. Let

1542

- I(.) denote the indicator function. Then</p><div class="equation"><a id="idp18247216"></a><p class="title"><strong>Equation 22.8.

1543

+ I(.) denote the indicator function. Then</p><div class="equation"><a id="idm269997284096"></a><p class="title"><strong>Equation 22.8.

1544

Probability Probe Sequence in Some Bin

1545

</strong></p><div class="equation-contents"><span class="mathphrase">

1546

P( exists<sub>i</sub> l<sub>i</sub> ≥ k ) =

1547

@@ -723,7 +723,7 @@

1548

a resize is needed, and if so, what is the new size (points D

1549

to G); following the resize, it notifies the policy that a

1550

resize has completed (point H); finally, the element is

1551

- inserted, and the policy notified (point I).</p><div class="figure"><a id="idp18265728"></a><p class="title"><strong>Figure 22.19. Insert resize sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram1.png" align="middle" alt="Insert resize sequence diagram" /></div></div></div><br class="figure-break" /><p>In practice, a resize policy can be usually orthogonally

1552

+ inserted, and the policy notified (point I).</p><div class="figure"><a id="idm269997265648"></a><p class="title"><strong>Figure 22.19. Insert resize sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram1.png" align="middle" alt="Insert resize sequence diagram" /></div></div></div><br class="figure-break" /><p>In practice, a resize policy can be usually orthogonally

1553

decomposed to a size policy and a trigger policy. Consequently,

1554

the library contains a single class for instantiating a resize

1555

policy: <code class="classname">hash_standard_resize_policy</code>

1556

@@ -732,8 +732,8 @@

1557

both, and acts as a standard delegate (<a class="xref" href="policy_data_structures.html#biblio.gof" title="Design Patterns - Elements of Reusable Object-Oriented Software">[biblio.gof]</a>)

1558

to these policies.</p><p>The two graphics immediately below show sequence diagrams

1559

illustrating the interaction between the standard resize policy

1560

- and its trigger and size policies, respectively.</p><div class="figure"><a id="idp18273504"></a><p class="title"><strong>Figure 22.20. Standard resize policy trigger sequence

1561

- diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram2.png" align="middle" alt="Standard resize policy trigger sequence diagram" /></div></div></div><br class="figure-break" /><div class="figure"><a id="idp18277664"></a><p class="title"><strong>Figure 22.21. Standard resize policy size sequence

1562

+ and its trigger and size policies, respectively.</p><div class="figure"><a id="idm269997257872"></a><p class="title"><strong>Figure 22.20. Standard resize policy trigger sequence

1563

+ diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram2.png" align="middle" alt="Standard resize policy trigger sequence diagram" /></div></div></div><br class="figure-break" /><div class="figure"><a id="idm269997253712"></a><p class="title"><strong>Figure 22.21. Standard resize policy size sequence

1564

diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram3.png" align="middle" alt="Standard resize policy size sequence diagram" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="resize_policies.impl.predefined"></a>Predefined Policies</h6></div></div></div><p>The library includes the following

1565

instantiations of size and trigger policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p><code class="classname">hash_load_check_resize_trigger</code>

1566

implements a load check trigger policy.</p></li><li class="listitem"><p><code class="classname">cc_hash_max_collision_check_resize_trigger</code>

1567

@@ -876,7 +876,7 @@

1568

each node, and maintains node invariants (see <a class="xref" href="policy_data_structures.html#biblio.clrs2001" title="Introduction to Algorithms, 2nd edition">[biblio.clrs2001]</a>.) The first stores in

1569

each node the size of the sub-tree rooted at the node; the

1570

second stores at each node the maximal endpoint of the

1571

- intervals at the sub-tree rooted at the node.</p><div class="figure"><a id="idp18355696"></a><p class="title"><strong>Figure 22.22. Tree node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invariants.png" align="middle" alt="Tree node invariants" /></div></div></div><br class="figure-break" /><p>Supporting such trees is difficult for a number of

1572

+ intervals at the sub-tree rooted at the node.</p><div class="figure"><a id="idm269997175616"></a><p class="title"><strong>Figure 22.22. Tree node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invariants.png" align="middle" alt="Tree node invariants" /></div></div></div><br class="figure-break" /><p>Supporting such trees is difficult for a number of

1573

reasons:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>There must be a way to specify what a node's metadata

1574

should be (if any).</p></li><li class="listitem"><p>Various operations can invalidate node

1575

invariants. The graphic below shows how a right rotation,

1576

@@ -890,7 +890,7 @@

1577

metadata.</p></li><li class="listitem"><p>It is not feasible to know in advance which methods trees

1578

can support. Besides the usual <code class="classname">find</code> method, the

1579

first tree can support a <code class="classname">find_by_order</code> method, while

1580

- the second can support an <code class="classname">overlaps</code> method.</p></li></ol></div><div class="figure"><a id="idp18365136"></a><p class="title"><strong>Figure 22.23. Tree node invalidation</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invalidations.png" align="middle" alt="Tree node invalidation" /></div></div></div><br class="figure-break" /><p>These problems are solved by a combination of two means:

1581

+ the second can support an <code class="classname">overlaps</code> method.</p></li></ol></div><div class="figure"><a id="idm269997166176"></a><p class="title"><strong>Figure 22.23. Tree node invalidation</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invalidations.png" align="middle" alt="Tree node invalidation" /></div></div></div><br class="figure-break" /><p>These problems are solved by a combination of two means:

1582

node iterators, and template-template node updater

1583

parameters.</p><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.tree.node.iterators"></a>Node Iterators</h6></div></div></div><p>Each tree-based container defines two additional iterator

1584

types, <code class="classname">const_node_iterator</code>

1585

@@ -919,7 +919,7 @@

1586

<code class="classname">node_update</code> class, and publicly subclasses

1587

<code class="classname">node_update</code>. The graphic below shows this

1588

scheme, as well as some predefined policies (which are explained

1589

- below).</p><div class="figure"><a id="idp18378304"></a><p class="title"><strong>Figure 22.24. A tree and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_updator_policy_cd.png" align="middle" alt="A tree and its update policy" /></div></div></div><br class="figure-break" /><p><code class="classname">node_update</code> (an instantiation of

1590

+ below).</p><div class="figure"><a id="idm269997153072"></a><p class="title"><strong>Figure 22.24. A tree and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_updator_policy_cd.png" align="middle" alt="A tree and its update policy" /></div></div></div><br class="figure-break" /><p><code class="classname">node_update</code> (an instantiation of

1591

<code class="classname">Node_Update</code>) must define <code class="classname">metadata_type</code> as

1592

the type of metadata it requires. For order statistics,

1593

e.g., <code class="classname">metadata_type</code> might be <code class="classname">size_t</code>.

1594

@@ -938,7 +938,7 @@

1595

<code class="classname">nd_it</code>. For example, say node x in the

1596

graphic below label A has an invalid invariant, but its' children,

1597

y and z have valid invariants. After the invocation, all three

1598

- nodes should have valid invariants, as in label B.</p><div class="figure"><a id="idp18389968"></a><p class="title"><strong>Figure 22.25. Restoring node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_restoring_node_invariants.png" align="middle" alt="Restoring node invariants" /></div></div></div><br class="figure-break" /><p>When a tree operation might invalidate some node invariant,

1599

+ nodes should have valid invariants, as in label B.</p><div class="figure"><a id="idm269997141408"></a><p class="title"><strong>Figure 22.25. Restoring node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_restoring_node_invariants.png" align="middle" alt="Restoring node invariants" /></div></div></div><br class="figure-break" /><p>When a tree operation might invalidate some node invariant,

1600

it invokes this method in its <code class="classname">node_update</code> base to

1601

restore the invariant. For example, the graphic below shows

1602

an <code class="function">insert</code> operation (point A); the tree performs some

1603

@@ -946,7 +946,7 @@

1604

C, and D). (It is well known that any <code class="function">insert</code>,

1605

<code class="function">erase</code>, <code class="function">split</code> or <code class="function">join</code>, can restore

1606

all node invariants by a small number of node invariant updates (<a class="xref" href="policy_data_structures.html#biblio.clrs2001" title="Introduction to Algorithms, 2nd edition">[biblio.clrs2001]</a>)

1607

- .</p><div class="figure"><a id="idp18398144"></a><p class="title"><strong>Figure 22.26. Insert update sequence</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_update_seq_diagram.png" align="middle" alt="Insert update sequence" /></div></div></div><br class="figure-break" /><p>To complete the description of the scheme, three questions

1608

+ .</p><div class="figure"><a id="idm269997133232"></a><p class="title"><strong>Figure 22.26. Insert update sequence</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_update_seq_diagram.png" align="middle" alt="Insert update sequence" /></div></div></div><br class="figure-break" /><p>To complete the description of the scheme, three questions

1609

need to be answered:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>How can a tree which supports order statistics define a

1610

method such as <code class="classname">find_by_order</code>?</p></li><li class="listitem"><p>How can the node updater base access methods of the

1611

tree?</p></li><li class="listitem"><p>How can the following cyclic dependency be resolved?

1612

@@ -988,7 +988,7 @@

1613

node's metadata (this is halting reducible). In the graphic

1614

below, assume the shaded node is inserted. The tree would have

1615

to traverse the useless path shown to the root, applying

1616

- redundant updates all the way.</p></li></ol></div><div class="figure"><a id="idp18420400"></a><p class="title"><strong>Figure 22.27. Useless update path</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_rationale_null_node_updator.png" align="middle" alt="Useless update path" /></div></div></div><br class="figure-break" /><p>A null policy class, <code class="classname">null_node_update</code>

1617

+ redundant updates all the way.</p></li></ol></div><div class="figure"><a id="idm269997110976"></a><p class="title"><strong>Figure 22.27. Useless update path</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_rationale_null_node_updator.png" align="middle" alt="Useless update path" /></div></div></div><br class="figure-break" /><p>A null policy class, <code class="classname">null_node_update</code>

1618

solves both these problems. The tree detects that node

1619

invariants are irrelevant, and defines all accordingly.</p></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.tree.details.split"></a>Split and Join</h6></div></div></div><p>Tree-based containers support split and join methods.

1620

It is possible to split a tree so that it passes

1621

@@ -1071,7 +1071,7 @@

1622

sub-tree with leafs "a" and "as". The maximal common prefix is

1623

"a". The internal node contains, consequently, to const

1624

iterators, one pointing to <code class="varname">'a'</code>, and the other to

1625

- <code class="varname">'s'</code>.</p><div class="figure"><a id="idp18465088"></a><p class="title"><strong>Figure 22.28. A PATRICIA trie</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_pat_trie.png" align="middle" alt="A PATRICIA trie" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.trie.details.node"></a>Node Invariants</h6></div></div></div><p>Trie-based containers support node invariants, as do

1626

+ <code class="varname">'s'</code>.</p><div class="figure"><a id="idm269997066288"></a><p class="title"><strong>Figure 22.28. A PATRICIA trie</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_pat_trie.png" align="middle" alt="A PATRICIA trie" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.trie.details.node"></a>Node Invariants</h6></div></div></div><p>Trie-based containers support node invariants, as do

1627

tree-based containers. There are two minor

1628

differences, though, which, unfortunately, thwart sharing them

1629

sharing the same node-updating policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>A trie's <code class="classname">Node_Update</code> template-template

1630

@@ -1080,7 +1080,7 @@

1631

parametrized by <code class="classname">Cmp_Fn</code>.</p></li><li class="listitem"><p>Tree-based containers store values in all nodes, while

1632

trie-based containers (at least in this implementation) store

1633

values in leafs.</p></li></ol></div><p>The graphic below shows the scheme, as well as some predefined

1634

- policies (which are explained below).</p><div class="figure"><a id="idp18475584"></a><p class="title"><strong>Figure 22.29. A trie and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_trie_node_updator_policy_cd.png" align="middle" alt="A trie and its update policy" /></div></div></div><br class="figure-break" /><p>This library offers the following pre-defined trie node

1635

+ policies (which are explained below).</p><div class="figure"><a id="idm269997055856"></a><p class="title"><strong>Figure 22.29. A trie and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_trie_node_updator_policy_cd.png" align="middle" alt="A trie and its update policy" /></div></div></div><br class="figure-break" /><p>This library offers the following pre-defined trie node

1636

updating policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>

1637

<code class="classname">trie_order_statistics_node_update</code>

1638

supports order statistics.

1639

@@ -1128,7 +1128,7 @@

1640

simple list of integer keys. If we search for the integer 6, we

1641

are paying an overhead: the link with key 6 is only the fifth

1642

link; if it were the first link, it could be accessed

1643

- faster.</p><div class="figure"><a id="idp18506160"></a><p class="title"><strong>Figure 22.30. A simple list</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_simple_list.png" align="middle" alt="A simple list" /></div></div></div><br class="figure-break" /><p>List-update algorithms reorder lists as elements are

1644

+ faster.</p><div class="figure"><a id="idm269997025344"></a><p class="title"><strong>Figure 22.30. A simple list</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_simple_list.png" align="middle" alt="A simple list" /></div></div></div><br class="figure-break" /><p>List-update algorithms reorder lists as elements are

1645

accessed. They try to determine, by the access history, which

1646

keys to move to the front of the list. Some of these algorithms

1647

require adding some metadata alongside each entry.</p><p>For example, in the graphic below label A shows the counter

1648

@@ -1138,7 +1138,7 @@

1649

predetermined value, say 10, as shown in label C, the count is set

1650

to 0 and the node is moved to the front of the list, as in label

1651

D.

1652

- </p><div class="figure"><a id="idp18511744"></a><p class="title"><strong>Figure 22.31. The counter algorithm</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_list_update.png" align="middle" alt="The counter algorithm" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.list.details.policies"></a>Policies</h6></div></div></div><p>this library allows instantiating lists with policies

1653

+ </p><div class="figure"><a id="idm269997019760"></a><p class="title"><strong>Figure 22.31. The counter algorithm</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_list_update.png" align="middle" alt="The counter algorithm" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.list.details.policies"></a>Policies</h6></div></div></div><p>this library allows instantiating lists with policies

1654

implementing any algorithm moving nodes to the front of the

1655

list (policies implementing algorithms interchanging nodes are

1656

unsupported).</p><p>Associative containers based on lists are parametrized by a

1657

@@ -1310,7 +1310,7 @@

1658

sequence; the second uses a tree (or forest of trees), which is

1659

typically less structured than an associative container's tree;

1660

the third simply uses an associative container. These are

1661

- shown in the graphic below, in labels A1 and A2, label B, and label C.</p><div class="figure"><a id="idp18575568"></a><p class="title"><strong>Figure 22.32. Underlying Priority-Queue Data-Structures.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_different_underlying_dss.png" align="middle" alt="Underlying Priority-Queue Data-Structures." /></div></div></div><br class="figure-break" /><p>Roughly speaking, any value that is both pushed and popped

1662

+ shown in the graphic below, in labels A1 and A2, label B, and label C.</p><div class="figure"><a id="idm269996955920"></a><p class="title"><strong>Figure 22.32. Underlying Priority-Queue Data-Structures.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_different_underlying_dss.png" align="middle" alt="Underlying Priority-Queue Data-Structures." /></div></div></div><br class="figure-break" /><p>Roughly speaking, any value that is both pushed and popped

1663

from a priority queue must incur a logarithmic expense (in the

1664

amortized sense). Any priority queue implementation that would

1665

avoid this, would violate known bounds on comparison-based

1666

@@ -1390,7 +1390,7 @@

1667

container <code class="classname">Cntnr</code>, the tag of the underlying

1668

data structure can be found via <code class="classname">typename

1669

Cntnr::container_category</code>; this is one of the possible tags shown in the graphic below.

1670

- </p><div class="figure"><a id="idp18610544"></a><p class="title"><strong>Figure 22.33. Priority-Queue Data-Structure Tags.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_tag_hierarchy.png" align="middle" alt="Priority-Queue Data-Structure Tags." /></div></div></div><br class="figure-break" /><p>Additionally, a traits mechanism can be used to query a

1671

+ </p><div class="figure"><a id="idm269996920880"></a><p class="title"><strong>Figure 22.33. Priority-Queue Data-Structure Tags.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_tag_hierarchy.png" align="middle" alt="Priority-Queue Data-Structure Tags." /></div></div></div><br class="figure-break" /><p>Additionally, a traits mechanism can be used to query a

1672

container type for its attributes. Given any container

1673

<code class="classname">Cntnr</code>, then </p><pre class="programlisting">__gnu_pbds::container_traits<Cntnr></pre><p>

1674

is a traits class identifying the properties of the

1675

Index: libstdc++-v3/doc/html/manual/using.html

1676

===================================================================

1677

--- a/src/libstdc++-v3/doc/html/manual/using.html (.../tags/gcc_4_8_2_release)

1678

+++ b/src/libstdc++-v3/doc/html/manual/using.html (.../branches/gcc-4_8-branch)

1679

@@ -1,8 +1,8 @@

1680

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 3. Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="make.html" title="Make" /><link rel="next" href="using_headers.html" title="Headers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 3. Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="make.html">Prev</a> </td><th width="60%" align="center">Part I.

1682

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 3. Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="make.html" title="Make" /><link rel="next" href="using_headers.html" title="Headers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 3. Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="make.html">Prev</a> </td><th width="60%" align="center">Part I.

1683

Introduction

1684

1685

-</th><td width="20%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.using"></a>Chapter 3. Using</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.flags"></a>Command Options</h2></div></div></div><p>

1686

+</th><td width="20%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.using"></a>Chapter 3. Using</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.flags"></a>Command Options</h2></div></div></div><p>

1687

The set of features available in the GNU C++ library is shaped

1688

by

1689

several <a class="link" href="http://gcc.gnu.org/onlinedocs/gcc-4.3.2/gcc/Invoking-GCC.html" target="_top">GCC

1690

@@ -10,5 +10,5 @@

1691

enumerated and detailed in the table below.

1692

</p><p>

1693

By default, <span class="command"><strong>g++</strong></span> is equivalent to <span class="command"><strong>g++ -std=gnu++98</strong></span>. The standard library also defaults to this dialect.

1694

- </p><div class="table"><a id="idp13051936"></a><p class="title"><strong>Table 3.1. C++ Command Options</strong></p><div class="table-contents"><table summary="C++ Command Options" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Option Flags</th><th align="left">Description</th></tr></thead><tbody><tr><td align="left"><code class="literal">-std=c++98</code></td><td align="left">Use the 1998 ISO C++ standard plus amendments.</td></tr><tr><td align="left"><code class="literal">-std=gnu++98</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-std=c++11</code></td><td align="left">Use the 2011 ISO C++ standard.</td></tr><tr><td align="left"><code class="literal">-std=gnu++11</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-fexceptions</code></td><td align="left">See <a class="link" href="using_exceptions.html#intro.using.exception.no" title="Doing without">exception-free dialect</a></td></tr><tr><td align="left"><code class="literal">-frtti</code></td><td align="left">As above, but RTTI-free dialect.</td></tr><tr><td align="left"><code class="literal">-pthread</code> or <code class="literal">-pthreads</code></td><td align="left">For ISO C++11 <thread>, <future>,

1695

+ </p><div class="table"><a id="idm270002481088"></a><p class="title"><strong>Table 3.1. C++ Command Options</strong></p><div class="table-contents"><table summary="C++ Command Options" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Option Flags</th><th align="left">Description</th></tr></thead><tbody><tr><td align="left"><code class="literal">-std=c++98</code></td><td align="left">Use the 1998 ISO C++ standard plus amendments.</td></tr><tr><td align="left"><code class="literal">-std=gnu++98</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-std=c++11</code></td><td align="left">Use the 2011 ISO C++ standard.</td></tr><tr><td align="left"><code class="literal">-std=gnu++11</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-fexceptions</code></td><td align="left">See <a class="link" href="using_exceptions.html#intro.using.exception.no" title="Doing without">exception-free dialect</a></td></tr><tr><td align="left"><code class="literal">-frtti</code></td><td align="left">As above, but RTTI-free dialect.</td></tr><tr><td align="left"><code class="literal">-pthread</code> or <code class="literal">-pthreads</code></td><td align="left">For ISO C++11 <thread>, <future>,

1696

<mutex>, or <condition_variable>.</td></tr><tr><td align="left"><code class="literal">-fopenmp</code></td><td align="left">For <a class="link" href="parallel_mode.html" title="Chapter 18. Parallel Mode">parallel</a> mode.</td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="make.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="intro.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Make </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Headers</td></tr></table></div></body></html>

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation Issues</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_cost_model.html" title="Empirical Cost Model" /><link rel="next" href="profile_mode_devel.html" title="Developer Information" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation Issues</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_cost_model.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_devel.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.implementation"></a>Implementation Issues</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.implementation.stack"></a>Stack Traces</h3></div></div></div><p>

1706

Accurate stack traces are needed during profiling since we group events by

1707

call context and dynamic instance. Without accurate traces, diagnostics

1708

may be hard to interpret. For instance, when giving advice to the user

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 23. HP/SGI Extensions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="policy_data_structures_ack.html" title="Acknowledgments" /><link rel="next" href="ext_sgi.html" title="Deprecated" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 23. HP/SGI Extensions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_ack.html">Prev</a> </td><th width="60%" align="center">Part III.

1717

Extensions

1718

1719

-</th><td width="20%" align="right"> <a accesskey="n" href="ext_sgi.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers"></a>Chapter 23. HP/SGI Extensions</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="ext_containers.html#manual.ext.containers.sgi">Backwards Compatibility</a></span></dt><dt><span class="section"><a href="ext_sgi.html">Deprecated</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.sgi"></a>Backwards Compatibility</h2></div></div></div><p>A few extensions and nods to backwards-compatibility have

1720

+</th><td width="20%" align="right"> <a accesskey="n" href="ext_sgi.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers"></a>Chapter 23. HP/SGI Extensions</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="ext_containers.html#manual.ext.containers.sgi">Backwards Compatibility</a></span></dt><dt><span class="section"><a href="ext_sgi.html">Deprecated</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.sgi"></a>Backwards Compatibility</h2></div></div></div><p>A few extensions and nods to backwards-compatibility have

1721

been made with containers. Those dealing with older SGI-style

1722

allocators are dealt with elsewhere. The remaining ones all deal

1723

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1728

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1729

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1730

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Use</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency_impl.html" title="Implementation" /><link rel="next" href="appendix.html" title="Part IV. Appendices" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Use</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="appendix.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.use"></a>Use</h2></div></div></div><p>Typical usage of the last two constructs is demonstrated as follows:

1731

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Use</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency_impl.html" title="Implementation" /><link rel="next" href="appendix.html" title="Part IV. Appendices" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Use</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="appendix.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.use"></a>Use</h2></div></div></div><p>Typical usage of the last two constructs is demonstrated as follows:

1732

</p><pre class="programlisting">

1733

#include <ext/concurrence.h>

1734

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 28. Input and Output</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_iterators.html" title="Chapter 27. Iterators" /><link rel="next" href="ext_demangling.html" title="Chapter 29. Demangling" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 28. Input and Output</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_iterators.html">Prev</a> </td><th width="60%" align="center">Part III.

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Extensions

1744

1745

-</th><td width="20%" align="right"> <a accesskey="n" href="ext_demangling.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.io"></a>Chapter 28. Input and Output</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="ext_io.html#manual.ext.io.filebuf_derived">Derived filebufs</a></span></dt></dl></div><p>

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+</th><td width="20%" align="right"> <a accesskey="n" href="ext_demangling.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.io"></a>Chapter 28. Input and Output</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="ext_io.html#manual.ext.io.filebuf_derived">Derived filebufs</a></span></dt></dl></div><p>

1747

Extensions allowing <code class="code">filebuf</code>s to be constructed from

1748

"C" types like FILE*s and file descriptors.

1749

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.io.filebuf_derived"></a>Derived filebufs</h2></div></div></div><p>The v2 library included non-standard extensions to construct

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Termination</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="support.html" title="Chapter 4. Support" /><link rel="prev" href="dynamic_memory.html" title="Dynamic Memory" /><link rel="next" href="diagnostics.html" title="Chapter 5. Diagnostics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Termination</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="dynamic_memory.html">Prev</a> </td><th width="60%" align="center">Chapter 4.

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Support

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Macros</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_headers.html" title="Headers" /><link rel="next" href="using_namespaces.html" title="Namespaces" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Macros</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_headers.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_namespaces.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.macros"></a>Macros</h2></div></div></div><p>

1769

All library macros begin with <code class="code">_GLIBCXX_</code>.

1770

</p><p>

1771

Furthermore, all pre-processor macros, switches, and

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Concurrency

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Standard Contents

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</th><td width="20%" align="right"> <a accesskey="n" href="extensions.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.concurrency"></a>Chapter 15.

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Concurrency

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-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="concurrency.html#std.concurrency.api">API Reference</a></span></dt></dl></div><p>

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+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="concurrency.html#std.concurrency.api">API Reference</a></span></dt></dl></div><p>

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Facilities for concurrent operation, and control thereof.

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</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.concurrency.api"></a>API Reference</h2></div></div></div><p>

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All items are declared in one of four standard header files.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 24. Utilities</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_sgi.html" title="Deprecated" /><link rel="next" href="ext_algorithms.html" title="Chapter 25. Algorithms" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 24. Utilities</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_sgi.html">Prev</a> </td><th width="60%" align="center">Part III.

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Extensions

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</th><td width="20%" align="right"> <a accesskey="n" href="ext_algorithms.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.util"></a>Chapter 24. Utilities</h2></div></div></div><p>

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Extensions

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-</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_using.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers.pbds"></a>Chapter 22. Policy-Based Data Structures</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues">Performance Issues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.associative">Associative</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.priority_queue">Priority Que</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation">Goals</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.associative">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.iterators">Iterators</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.functions">Functional</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.priority_queue">Priority Queues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.binary_heap">Binary Heaps</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="section"><a href="policy_data_structures_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.organization">Organization</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial">Tutorial</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.basic">Basic Use</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.configuring">

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+</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_using.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers.pbds"></a>Chapter 22. Policy-Based Data Structures</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="policy_data_structures.html#pbds.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues">Performance Issues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.associative">Associative</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.priority_queue">Priority Que</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation">Goals</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.associative">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.iterators">Iterators</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.functions">Functional</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.priority_queue">Priority Queues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.binary_heap">Binary Heaps</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="section"><a href="policy_data_structures_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.organization">Organization</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial">Tutorial</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.basic">Basic Use</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.configuring">

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Configuring via Template Parameters

1818

</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.traits">

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Querying Container Attributes

1820

@@ -248,7 +248,7 @@

1821

these invariants, one must supply some policy that is aware

1822

of these changes. Without this, it would be better to use a

1823

linked list (in itself very efficient for these purposes).

1824

- </p></li></ol></div><div class="figure"><a id="idp17613296"></a><p class="title"><strong>Figure 22.1. Node Invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_node_invariants.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="motivation.associative.underlying"></a>Underlying Data Structures</h5></div></div></div><p>

1825

+ </p></li></ol></div><div class="figure"><a id="idm269997917584"></a><p class="title"><strong>Figure 22.1. Node Invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_node_invariants.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="motivation.associative.underlying"></a>Underlying Data Structures</h5></div></div></div><p>

1826

The standard C++ library contains associative containers based on

1827

red-black trees and collision-chaining hash tables. These are

1828

very useful, but they are not ideal for all types of

1829

@@ -256,7 +256,7 @@

1830

</p><p>

1831

The figure below shows the different underlying data structures

1832

currently supported in this library.

1833

- </p><div class="figure"><a id="idp17619952"></a><p class="title"><strong>Figure 22.2. Underlying Associative Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_1.png" align="middle" alt="Underlying Associative Data Structures" /></div></div></div><br class="figure-break" /><p>

1834

+ </p><div class="figure"><a id="idm269997910864"></a><p class="title"><strong>Figure 22.2. Underlying Associative Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_1.png" align="middle" alt="Underlying Associative Data Structures" /></div></div></div><br class="figure-break" /><p>

1835

A shows a collision-chaining hash-table, B shows a probing

1836

hash-table, C shows a red-black tree, D shows a splay tree, E shows

1837

a tree based on an ordered vector(implicit in the order of the

1838

@@ -375,7 +375,7 @@

1839

no guarantee that the elements traversed will coincide with the

1840

<span class="emphasis"><em>logical</em></span> elements between 1 and 5, as in

1841

label B.

1842

- </p><div class="figure"><a id="idp17651648"></a><p class="title"><strong>Figure 22.3. Range Iteration in Different Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_1.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /><p>

1843

+ </p><div class="figure"><a id="idm269997879168"></a><p class="title"><strong>Figure 22.3. Range Iteration in Different Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_1.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /><p>

1844

In our opinion, this problem is not caused just because

1845

red-black trees are order preserving while

1846

collision-chaining hash tables are (generally) not - it

1847

@@ -426,7 +426,7 @@

1848

list, as in the graphic below, label B. Here the iterators are as

1849

light as can be, but the hash-table's operations are more

1850

complicated.

1851

- </p><div class="figure"><a id="idp17666528"></a><p class="title"><strong>Figure 22.4. Point Iteration in Hash Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_2.png" align="middle" alt="Point Iteration in Hash Data Structures" /></div></div></div><br class="figure-break" /><p>

1852

+ </p><div class="figure"><a id="idm269997864256"></a><p class="title"><strong>Figure 22.4. Point Iteration in Hash Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_2.png" align="middle" alt="Point Iteration in Hash Data Structures" /></div></div></div><br class="figure-break" /><p>

1853

It should be noted that containers based on collision-chaining

1854

hash-tables are not the only ones with this type of behavior;

1855

many other self-organizing data structures display it as well.

1856

@@ -442,7 +442,7 @@

1857

container. The graphic below shows three cases: A1 and A2 show

1858

a red-black tree; B1 and B2 show a probing hash-table; C1 and C2

1859

show a collision-chaining hash table.

1860

- </p><div class="figure"><a id="idp17675840"></a><p class="title"><strong>Figure 22.5. Effect of erase in different underlying data structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_guarantee_erase.png" align="middle" alt="Effect of erase in different underlying data structures" /></div></div></div><br class="figure-break" /><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>

1861

+ </p><div class="figure"><a id="idm269997855056"></a><p class="title"><strong>Figure 22.5. Effect of erase in different underlying data structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_guarantee_erase.png" align="middle" alt="Effect of erase in different underlying data structures" /></div></div></div><br class="figure-break" /><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>

1862

Erasing 5 from A1 yields A2. Clearly, an iterator to 3 can

1863

be de-referenced and incremented. The sequence of iterators

1864

changed, but in a way that is well-defined by the interface.

1865

@@ -678,7 +678,7 @@

1866

typically less structured than an associative container's tree;

1867

the third simply uses an associative container. These are

1868

shown in the figure below with labels A1 and A2, B, and C.

1869

- </p><div class="figure"><a id="idp17743424"></a><p class="title"><strong>Figure 22.6. Underlying Priority Queue Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_2.png" align="middle" alt="Underlying Priority Queue Data Structures" /></div></div></div><br class="figure-break" /><p>

1870

+ </p><div class="figure"><a id="idm269997787392"></a><p class="title"><strong>Figure 22.6. Underlying Priority Queue Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_2.png" align="middle" alt="Underlying Priority Queue Data Structures" /></div></div></div><br class="figure-break" /><p>

1871

No single implementation can completely replace any of the

1872

others. Some have better <code class="function">push</code>

1873

and <code class="function">pop</code> amortized performance, some have

1874

@@ -1098,7 +1098,7 @@

1875

</span>. </span><span class="publisher"><span class="publishername">

1876

Proceedings of International Conference on Very Large Data Bases

1877

. </span></span></p></div><div class="biblioentry"><a id="biblio.maverik_lowerbounds"></a><p>[biblio.maverik_lowerbounds] <span class="title"><em>

1878

- <a class="link" href="http://magic.aladdin.cs.cmu.edu/2005/08/01/deamortization-part-2-binomial-heaps" target="_top">

1879

+ <a class="link" href="http://magic.aladdin.cs.cmu.edu/2005/08/01/deamortization-part-2-binomial-heaps/" target="_top">

1880

Deamortization - Part 2: Binomial Heaps

1881

</a>

1882

</em>. </span><span class="date">

1883

@@ -1190,7 +1190,7 @@

1884

</span>. </span><span class="publisher"><span class="publishername">

1885

Addison-Wesley Publishing Company

1886

. </span></span></p></div><div class="biblioentry"><a id="biblio.nelson96stlpq"></a><p>[biblio.nelson96stlpq] <span class="title"><em>

1887

- <a class="link" href="http://www.dogma.net/markn/articles/pq_stl/priority.htm" target="_top">Priority Queues and the STL

1888

+ <a class="link" href="http://marknelson.us/1996/01/01/priority-queues/" target="_top">Priority Queues and the STL

1889

</a>

1890

</em>. </span><span class="date">

1891

January 1996

1892

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 27. Iterators</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_numerics.html" title="Chapter 26. Numerics" /><link rel="next" href="ext_io.html" title="Chapter 28. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 27. Iterators</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_numerics.html">Prev</a> </td><th width="60%" align="center">Part III.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 27. Iterators</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_numerics.html" title="Chapter 26. Numerics" /><link rel="next" href="ext_io.html" title="Chapter 28. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 27. Iterators</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_numerics.html">Prev</a> </td><th width="60%" align="center">Part III.

1900

Extensions

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1902

</th><td width="20%" align="right"> <a accesskey="n" href="ext_io.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.iterators"></a>Chapter 27. Iterators</h2></div></div></div><p>24.3.2 describes <code class="code">struct iterator</code>, which didn't exist in the

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /><link rel="prev" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /><link rel="next" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bitmap_allocator.html">Prev</a> </td><th width="60%" align="center">Chapter 21. The bitmap_allocator</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.bitmap.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="bitmap.impl.free_list_store"></a>Free List Store</h3></div></div></div><p>

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The Free List Store (referred to as FLS for the remaining part of this

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document) is the Global memory pool that is shared by all instances of

1913

the bitmapped allocator instantiated for any type. This maintains a

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1915

</p><p>

1916

Consider a block of size 64 ints. In memory, it would look like this:

1917

(assume a 32-bit system where, size_t is a 32-bit entity).

1918

- </p><div class="table"><a id="idp17500848"></a><p class="title"><strong>Table 21.1. Bitmap Allocator Memory Map</strong></p><div class="table-contents"><table summary="Bitmap Allocator Memory Map" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left">268</td><td align="left">0</td><td align="left">4294967295</td><td align="left">4294967295</td><td align="left">Data -> Space for 64 ints</td></tr></tbody></table></div></div><br class="table-break" /><p>

1919

+ </p><div class="table"><a id="idm269998030352"></a><p class="title"><strong>Table 21.1. Bitmap Allocator Memory Map</strong></p><div class="table-contents"><table summary="Bitmap Allocator Memory Map" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left">268</td><td align="left">0</td><td align="left">4294967295</td><td align="left">4294967295</td><td align="left">Data -> Space for 64 ints</td></tr></tbody></table></div></div><br class="table-break" /><p>

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The first Column(268) represents the size of the Block in bytes as

1921

seen by the Bitmap Allocator. Internally, a global free list is

1922

used to keep track of the free blocks used and given back by the

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix A. Contributing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix.html" title="Part IV. Appendices" /><link rel="next" href="source_organization.html" title="Directory Layout and Source Conventions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix A.

1931

Contributing

1932

1933

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Appendices

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</th><td width="20%" align="right"> <a accesskey="n" href="source_organization.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.contrib"></a>

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Contributing

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-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></div><p>

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+ <a id="idm269993657472" class="indexterm"></a>

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+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></div><p>

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The GNU C++ Library follows an open development model. Active

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contributors are assigned maintainer-ship responsibility, and given

1944

write access to the source repository. First time contributors

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@@ -36,7 +36,7 @@

1946

for this group is quite useful.

1947

</p></li><li class="listitem"><p>

1948

Peruse

1949

- the <a class="link" href="http://www.gnu.org/prep/standards" target="_top">GNU

1950

+ the <a class="link" href="http://www.gnu.org/prep/standards/" target="_top">GNU

1951

Coding Standards</a>, and chuckle when you hit the part

1952

about <span class="quote">“<span class="quote">Using Languages Other Than C</span>”</span>.

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</p></li><li class="listitem"><p>

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Testing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_design.html" title="Design" /><link rel="next" href="profile_mode.html" title="Chapter 19. Profile Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Testing</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_design.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.test"></a>Testing</h2></div></div></div><p>

1962

Both the normal conformance and regression tests and the

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supplemental performance tests work.

1964

</p><p>

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 19. Profile Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="parallel_mode_test.html" title="Testing" /><link rel="next" href="profile_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 19. Profile Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_test.html">Prev</a> </td><th width="60%" align="center">Part III.

1973

Extensions

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1975

-</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_design.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.profile_mode"></a>Chapter 19. Profile Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.using">Using the Profile Mode</a></span></dt><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.tuning">Tuning the Profile Mode</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.wrapper">Wrapper Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.instrumentation">Instrumentation</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.rtlib">Run Time Behavior</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.analysis">Analysis and Diagnostics</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.cost-model">Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.reports">Reports</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.testing">Testing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_api.html">Extensions for Custom Containers</a></span></dt><dt><span class="section"><a href="profile_mode_cost_model.html">Empirical Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html">Implementation Issues</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stack">Stack Traces</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.symbols">Symbolization of Instruction Addresses</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.concurrency">Concurrency</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stdlib-in-proflib">Using the Standard Library in the Instrumentation Implementation</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.malloc-hooks">Malloc Hooks</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.construction-destruction">Construction and Destruction of Global Objects</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_devel.html">Developer Information</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.bigpic">Big Picture</a></span></dt><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.howto">How To Add A Diagnostic</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html">Diagnostics</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.template">Diagnostic Template</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers">Containers</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small">Hashtable Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large">Hashtable Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash">Inefficient Hash</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_small">Vector Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_large">Vector Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_hashtable">Vector to Hashtable</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_to_vector">Hashtable to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_list">Vector to List</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_vector">List to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_slist">List to Forward List (Slist)</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.assoc_ord_to_unord">Ordered to Unordered Associative Container</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms">Algorithms</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms.sort">Sort Algorithm Performance</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality">Data Locality</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.sw_prefetch">Need Software Prefetch</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.linked">Linked Structure Locality</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread">Multithreaded Data Access</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.ddtest">Data Dependence Violations at Container Level</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.false_share">False Sharing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.statistics">Statistics</a></span></dt></dl></dd><dt><span class="bibliography"><a href="profile_mode.html#profile_mode.biblio">Bibliography</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.intro"></a>Intro</h2></div></div></div><p>

1976

+</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_design.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.profile_mode"></a>Chapter 19. Profile Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.using">Using the Profile Mode</a></span></dt><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.tuning">Tuning the Profile Mode</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.wrapper">Wrapper Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.instrumentation">Instrumentation</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.rtlib">Run Time Behavior</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.analysis">Analysis and Diagnostics</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.cost-model">Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.reports">Reports</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.testing">Testing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_api.html">Extensions for Custom Containers</a></span></dt><dt><span class="section"><a href="profile_mode_cost_model.html">Empirical Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html">Implementation Issues</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stack">Stack Traces</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.symbols">Symbolization of Instruction Addresses</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.concurrency">Concurrency</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stdlib-in-proflib">Using the Standard Library in the Instrumentation Implementation</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.malloc-hooks">Malloc Hooks</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.construction-destruction">Construction and Destruction of Global Objects</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_devel.html">Developer Information</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.bigpic">Big Picture</a></span></dt><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.howto">How To Add A Diagnostic</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html">Diagnostics</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.template">Diagnostic Template</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers">Containers</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small">Hashtable Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large">Hashtable Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash">Inefficient Hash</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_small">Vector Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_large">Vector Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_hashtable">Vector to Hashtable</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_to_vector">Hashtable to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_list">Vector to List</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_vector">List to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_slist">List to Forward List (Slist)</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.assoc_ord_to_unord">Ordered to Unordered Associative Container</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms">Algorithms</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms.sort">Sort Algorithm Performance</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality">Data Locality</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.sw_prefetch">Need Software Prefetch</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.linked">Linked Structure Locality</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread">Multithreaded Data Access</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.ddtest">Data Dependence Violations at Container Level</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.false_share">False Sharing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.statistics">Statistics</a></span></dt></dl></dd><dt><span class="bibliography"><a href="profile_mode.html#profile_mode.biblio">Bibliography</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.intro"></a>Intro</h2></div></div></div><p>

1977

<span class="emphasis"><em>Goal: </em></span>Give performance improvement advice based on

1978

recognition of suboptimal usage patterns of the standard library.

1979

</p><p>

1980

@@ -137,7 +137,7 @@

1981

call context.

1982

(Environment variable not supported.)

1983

</p></li></ul></div><p>

1984

- </p></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="profile_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idp17395456"></a><p><span class="citetitle"><em class="citetitle">

1985

+ </p></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="profile_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idm269998135936"></a><p><span class="citetitle"><em class="citetitle">

1986

Perflint: A Context Sensitive Performance Advisor for C++ Programs

1987

</em>. </span><span class="author"><span class="firstname">Lixia</span> <span class="surname">Liu</span>. </span><span class="author"><span class="firstname">Silvius</span> <span class="surname">Rus</span>. </span><span class="copyright">Copyright © 2009 . </span><span class="publisher"><span class="publishername">

1988

Proceedings of the 2009 International Symposium on Code Generation

1989

Index: libstdc++-v3/doc/html/manual/stringstreams.html

1990

===================================================================

1991

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1994

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1995

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory Based Streams</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="streambufs.html" title="Stream Buffers" /><link rel="next" href="fstreams.html" title="File Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory Based Streams</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="streambufs.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

1996

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory Based Streams</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="streambufs.html" title="Stream Buffers" /><link rel="next" href="fstreams.html" title="File Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory Based Streams</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="streambufs.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

1997

Input and Output

1998

1999

</th><td width="20%" align="right"> <a accesskey="n" href="fstreams.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.memstreams"></a>Memory Based Streams</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.io.memstreams.compat"></a>Compatibility With strstream</h3></div></div></div><p>

2000

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2001

===================================================================

2002

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2006

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Traits</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="memory.html" title="Memory" /><link rel="next" href="strings.html" title="Chapter 7. Strings" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Traits</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="memory.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2007

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Traits</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="memory.html" title="Memory" /><link rel="next" href="strings.html" title="Chapter 7. Strings" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Traits</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="memory.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2008

Utilities

2009

2010

</th><td width="20%" align="right"> <a accesskey="n" href="strings.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.traits"></a>Traits</h2></div></div></div><p>

2011

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2012

===================================================================

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2014

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2015

@@ -1,10 +1,9 @@

2016

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2017

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Acknowledgments</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_based_data_structures_test.html" title="Testing" /><link rel="next" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Acknowledgments</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_based_data_structures_test.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="ext_containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.ack"></a>Acknowledgments</h2></div></div></div><p>

2018

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Acknowledgments</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_based_data_structures_test.html" title="Testing" /><link rel="next" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Acknowledgments</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_based_data_structures_test.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="ext_containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.ack"></a>Acknowledgments</h2></div></div></div><p>

2019

Written by Ami Tavory and Vladimir Dreizin (IBM Haifa Research

2020

Laboratories), and Benjamin Kosnik (Red Hat).

2021

</p><p>

2022

- This library was partially written at

2023

- <a class="link" href="http://www.haifa.il.ibm.com/" target="_top">IBM's Haifa Research Labs</a>.

2024

+ This library was partially written at IBM's Haifa Research Labs.

2025

It is based heavily on policy-based design and uses many useful

2026

techniques from Modern C++ Design: Generic Programming and Design

2027

Patterns Applied by Andrei Alexandrescu.

2028

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2030

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2033

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2034

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Associative</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="containers.html" title="Chapter 9. Containers" /><link rel="next" href="unordered_associative.html" title="Unordered Associative" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Associative</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="containers.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2035

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Associative</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="containers.html" title="Chapter 9. Containers" /><link rel="next" href="unordered_associative.html" title="Unordered Associative" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Associative</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="containers.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2036

Containers

2037

2038

</th><td width="20%" align="right"> <a accesskey="n" href="unordered_associative.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.associative"></a>Associative</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.associative.insert_hints"></a>Insertion Hints</h3></div></div></div><p>

2039

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Extensions

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contains all the higher-level

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the concurrence layer consists largely of types. All types are defined within <code class="code">namespace __gnu_cxx</code>.

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Support

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Standard Contents

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This part deals with the functions called and objects created

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Extensions

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+</th><td width="20%" align="right"> <a accesskey="n" href="bitmap_allocator_impl.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.allocator.bitmap"></a>Chapter 21. The bitmap_allocator</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="bitmap_allocator.html#allocator.bitmap.design">Design</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.free_list_store">Free List Store</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block">Super Block</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block_data">Super Block Data Layout</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.max_wasted">Maximum Wasted Percentage</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.allocate"><code class="function">allocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.deallocate"><code class="function">deallocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.questions">Questions</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.1">1</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.2">2</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.3">3</a></span></dt></dl></dd><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.locality">Locality</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.grow_policy">Overhead and Grow Policy</a></span></dt></dl></dd></dl></div><p>

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</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.bitmap.design"></a>Design</h2></div></div></div><p>

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As this name suggests, this allocator uses a bit-map to keep track

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and one for the documentation.

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Numerics

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Standard Contents

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+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="numerics.html#std.numerics.complex">Complex</a></span></dt><dd><dl><dt><span class="section"><a href="numerics.html#numerics.complex.processing">complex Processing</a></span></dt></dl></dd><dt><span class="section"><a href="generalized_numeric_operations.html">Generalized Operations</a></span></dt><dt><span class="section"><a href="numerics_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="numerics_and_c.html#numerics.c.array">Numerics vs. Arrays</a></span></dt><dt><span class="section"><a href="numerics_and_c.html#numerics.c.c99">C99</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.numerics.complex"></a>Complex</h2></div></div></div><p>

2121

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="numerics.complex.processing"></a>complex Processing</h3></div></div></div><p>

2122

</p><p>Using <code class="code">complex<></code> becomes even more comple- er, sorry,

2123

<span class="emphasis"><em>complicated</em></span>, with the not-quite-gratuitously-incompatible

2124

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2125

===================================================================

2126

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2127

+++ b/src/libstdc++-v3/doc/html/manual/using_exceptions.html (.../branches/gcc-4_8-branch)

2128

@@ -1,5 +1,5 @@

2129

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2130

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Exceptions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, exception, error, exception neutrality, exception safety, exception propagation, -fno-exceptions" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_concurrency.html" title="Concurrency" /><link rel="next" href="debug.html" title="Debugging Support" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Exceptions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="debug.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.exceptions"></a>Exceptions</h2></div></div></div><p>

2131

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Exceptions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, exception, error, exception neutrality, exception safety, exception propagation, -fno-exceptions" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_concurrency.html" title="Concurrency" /><link rel="next" href="debug.html" title="Debugging Support" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Exceptions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="debug.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.exceptions"></a>Exceptions</h2></div></div></div><p>

2132

The C++ language provides language support for stack unwinding

2133

with <code class="literal">try</code> and <code class="literal">catch</code> blocks and

2134

the <code class="literal">throw</code> keyword.

2135

@@ -265,7 +265,7 @@

2136

}

2137

catch(...)

2138

{ this->_M_setstate(ios_base::badbit); }

2139

-</pre></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="using.exceptions.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idp13644000"></a><p><span class="title"><em>

2140

+</pre></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="using.exceptions.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idm270001889024"></a><p><span class="title"><em>

2141

2142

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

2143

</a>

2144

@@ -274,39 +274,39 @@

2145

2146

The Open Group/The Institute of Electrical and Electronics

2147

Engineers, Inc.

2148

- . </span></p></div><div class="biblioentry"><a id="idp13647696"></a><p><span class="title"><em>

2149

+ . </span></p></div><div class="biblioentry"><a id="idm270001885328"></a><p><span class="title"><em>

2150

2151

Error and Exception Handling

2152

</a>

2153

</em>. </span><span class="author"><span class="firstname">David</span> <span class="surname">Abrahams </span>. </span><span class="publisher"><span class="publishername">

2154

Boost

2155

- . </span></span></p></div><div class="biblioentry"><a id="idp13651392"></a><p><span class="title"><em>

2156

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001881632"></a><p><span class="title"><em>

2157

2158

Exception-Safety in Generic Components

2159

</a>

2160

</em>. </span><span class="author"><span class="firstname">David</span> <span class="surname">Abrahams</span>. </span><span class="publisher"><span class="publishername">

2161

Boost

2162

- . </span></span></p></div><div class="biblioentry"><a id="idp13655104"></a><p><span class="title"><em>

2163

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001877920"></a><p><span class="title"><em>

2164

2165

Standard Library Exception Policy

2166

</a>

2167

</em>. </span><span class="author"><span class="firstname">Matt</span> <span class="surname">Austern</span>. </span><span class="publisher"><span class="publishername">

2168

WG21 N1077

2169

- . </span></span></p></div><div class="biblioentry"><a id="idp13658816"></a><p><span class="title"><em>

2170

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001874208"></a><p><span class="title"><em>

2171

2172

ia64 c++ abi exception handling

2173

</a>

2174

</em>. </span><span class="author"><span class="firstname">Richard</span> <span class="surname">Henderson</span>. </span><span class="publisher"><span class="publishername">

2175

GNU

2176

- . </span></span></p></div><div class="biblioentry"><a id="idp13662512"></a><p><span class="title"><em>

2177

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001870512"></a><p><span class="title"><em>

2178

2179

Appendix E: Standard-Library Exception Safety

2180

</a>

2181

- </em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span></p></div><div class="biblioentry"><a id="idp13665328"></a><p><span class="citetitle"><em class="citetitle">

2182

+ </em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span></p></div><div class="biblioentry"><a id="idm270001867696"></a><p><span class="citetitle"><em class="citetitle">

2183

Exceptional C++

2184

</em>. </span><span class="pagenums">

2185

Exception-Safety Issues and Techniques

2186

- . </span><span class="author"><span class="firstname">Herb</span> <span class="surname">Sutter</span>. </span></p></div><div class="biblioentry"><a id="idp13667712"></a><p><span class="title"><em>

2187

+ . </span><span class="author"><span class="firstname">Herb</span> <span class="surname">Sutter</span>. </span></p></div><div class="biblioentry"><a id="idm270001865312"></a><p><span class="title"><em>

2188

2189

GCC Bug 25191: exception_defines.h #defines try/catch

2190

</a>

2191

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2192

===================================================================

2193

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2194

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2195

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2196

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2197

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Testing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_design.html" title="Design" /><link rel="next" href="policy_data_structures_ack.html" title="Acknowledgments" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Testing</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_design.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_ack.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.test"></a>Testing</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.test.regression"></a>Regression</h3></div></div></div><p>The library contains a single comprehensive regression test.

2198

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Testing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_design.html" title="Design" /><link rel="next" href="policy_data_structures_ack.html" title="Acknowledgments" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Testing</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_design.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_ack.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.test"></a>Testing</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.test.regression"></a>Regression</h3></div></div></div><p>The library contains a single comprehensive regression test.

2199

For a given container type in this library, the test creates

2200

an object of the container type and an object of the

2201

corresponding standard type (e.g., <code class="classname">std::set</code>). It

2202

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2203

===================================================================

2204

--- a/src/libstdc++-v3/doc/html/manual/parallel_mode_design.html (.../tags/gcc_4_8_2_release)

2205

+++ b/src/libstdc++-v3/doc/html/manual/parallel_mode_design.html (.../branches/gcc-4_8-branch)

2206

@@ -1,5 +1,5 @@

2207

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2208

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_using.html" title="Using" /><link rel="next" href="parallel_mode_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.design"></a>Design</h2></div></div></div><p>

2209

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_using.html" title="Using" /><link rel="next" href="parallel_mode_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.design"></a>Design</h2></div></div></div><p>

2210

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="parallel_mode.design.intro"></a>Interface Basics</h3></div></div></div><p>

2211

All parallel algorithms are intended to have signatures that are

2212

equivalent to the ISO C++ algorithms replaced. For instance, the

2213

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2214

===================================================================

2215

--- a/src/libstdc++-v3/doc/html/manual/abi.html (.../tags/gcc_4_8_2_release)

2216

+++ b/src/libstdc++-v3/doc/html/manual/abi.html (.../branches/gcc-4_8-branch)

2217

@@ -1,5 +1,5 @@

2218

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2219

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>ABI Policy and Guidelines</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, ABI, version, dynamic, shared, compatibility" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="test.html" title="Test" /><link rel="next" href="api.html" title="API Evolution and Deprecation History" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">ABI Policy and Guidelines</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="test.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2220

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>ABI Policy and Guidelines</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, ABI, version, dynamic, shared, compatibility" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="test.html" title="Test" /><link rel="next" href="api.html" title="API Evolution and Deprecation History" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">ABI Policy and Guidelines</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="test.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2221

Porting and Maintenance

2222

2223

</th><td width="20%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.abi"></a>ABI Policy and Guidelines</h2></div></div></div><p>

2224

@@ -493,39 +493,39 @@

2225

2226

C++ ABI Summary

2227

</a>

2228

- </em>. </span></p></div><div class="biblioentry"><a id="idp22945936"></a><p><span class="title"><em>

2229

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992586624"></a><p><span class="title"><em>

2230

2231

Intel Compilers for Linux Compatibility with the GNU Compilers

2232

</a>

2233

- </em>. </span></p></div><div class="biblioentry"><a id="idp22947792"></a><p><span class="title"><em>

2234

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992584768"></a><p><span class="title"><em>

2235

2236

Linker and Libraries Guide (document 819-0690)

2237

</a>

2238

- </em>. </span></p></div><div class="biblioentry"><a id="idp22949632"></a><p><span class="title"><em>

2239

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992582928"></a><p><span class="title"><em>

2240

2241

Sun Studio 11: C++ Migration Guide (document 819-3689)

2242

</a>

2243

- </em>. </span></p></div><div class="biblioentry"><a id="idp22951488"></a><p><span class="title"><em>

2244

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992581072"></a><p><span class="title"><em>

2245

2246

How to Write Shared Libraries

2247

</a>

2248

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span></p></div><div class="biblioentry"><a id="idp22954928"></a><p><span class="title"><em>

2249

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span></p></div><div class="biblioentry"><a id="idm269992577632"></a><p><span class="title"><em>

2250

2251

C++ ABI for the ARM Architecture

2252

</a>

2253

- </em>. </span></p></div><div class="biblioentry"><a id="idp22956736"></a><p><span class="title"><em>

2254

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992575824"></a><p><span class="title"><em>

2255

2256

Dynamic Shared Objects: Survey and Issues

2257

</a>

2258

</em>. </span><span class="subtitle">

2259

ISO C++ J16/06-0046

2260

- . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idp22960032"></a><p><span class="title"><em>

2261

+ . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idm269992572528"></a><p><span class="title"><em>

2262

2263

Versioning With Namespaces

2264

</a>

2265

</em>. </span><span class="subtitle">

2266

ISO C++ J16/06-0083

2267

- . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idp22963312"></a><p><span class="title"><em>

2268

+ . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idm269992569248"></a><p><span class="title"><em>

2269

2270

Binary Compatibility of Shared Libraries Implemented in C++

2271

on GNU/Linux Systems

2272

Index: libstdc++-v3/doc/html/manual/intro.html

2273

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2274

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2275

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2276

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2277

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2278

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-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="chapter"><a href="status.html">1. Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></dd></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="index.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="index.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="status.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library Manual </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Chapter 1. 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Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></dd></dl></div></div><div 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Facilities for atomic operations.

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Porting to New Hardware or Operating Systems</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, internals" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="documentation_hacking.html" title="Writing and Generating Documentation" /><link rel="next" href="test.html" title="Test" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Porting to New Hardware or Operating Systems</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="documentation_hacking.html">Prev</a> </td><th width="60%" align="center">Appendix B.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Porting to New Hardware or Operating Systems</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, internals" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="documentation_hacking.html" title="Writing and Generating Documentation" /><link rel="next" href="test.html" title="Test" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Porting to New Hardware or Operating Systems</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="documentation_hacking.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2331

Porting and Maintenance

2332

2333

</th><td width="20%" align="right"> <a accesskey="n" href="test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.internals"></a>Porting to New Hardware or Operating Systems</h2></div></div></div><p>

2334

Index: libstdc++-v3/doc/html/manual/policy_data_structures_using.html

2335

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2336

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="next" href="policy_data_structures_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.prereq"></a>Prerequisites</h3></div></div></div><p>The library contains only header files, and does not require any

2341

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="next" href="policy_data_structures_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.prereq"></a>Prerequisites</h3></div></div></div><p>The library contains only header files, and does not require any

2342

other libraries except the standard C++ library . All classes are

2343

defined in namespace <code class="code">__gnu_pbds</code>. The library internally

2344

uses macros beginning with <code class="code">PB_DS</code>, but

2345

@@ -61,7 +61,7 @@

2346

In addition, there are the following diagnostics classes,

2347

used to report errors specific to this library's data

2348

structures.

2349

- </p><div class="figure"><a id="idp17806128"></a><p class="title"><strong>Figure 22.7. Exception Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_exception_hierarchy.png" align="middle" alt="Exception Hierarchy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.tutorial"></a>Tutorial</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.using.tutorial.basic"></a>Basic Use</h4></div></div></div><p>

2350

+ </p><div class="figure"><a id="idm269997724688"></a><p class="title"><strong>Figure 22.7. Exception Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_exception_hierarchy.png" align="middle" alt="Exception Hierarchy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.tutorial"></a>Tutorial</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.using.tutorial.basic"></a>Basic Use</h4></div></div></div><p>

2351

For the most part, the policy-based containers containers in

2352

namespace <code class="literal">__gnu_pbds</code> have the same interface as

2353

the equivalent containers in the standard C++ library, except for

2354

Index: libstdc++-v3/doc/html/manual/bugs.html

2355

===================================================================

2356

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2357

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2358

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2359

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2360

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Bugs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="status.html" title="Chapter 1. Status" /><link rel="prev" href="license.html" title="License" /><link rel="next" href="setup.html" title="Chapter 2. Setup" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Bugs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="license.html">Prev</a> </td><th width="60%" align="center">Chapter 1. Status</th><td width="20%" align="right"> <a accesskey="n" href="setup.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.bugs"></a>Bugs</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.status.bugs.impl"></a>Implementation Bugs</h3></div></div></div><p>

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Bugs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="status.html" title="Chapter 1. Status" /><link rel="prev" href="license.html" title="License" /><link rel="next" href="setup.html" title="Chapter 2. Setup" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Bugs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="license.html">Prev</a> </td><th width="60%" align="center">Chapter 1. Status</th><td width="20%" align="right"> <a accesskey="n" href="setup.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.bugs"></a>Bugs</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.status.bugs.impl"></a>Implementation Bugs</h3></div></div></div><p>

2362

Information on known bugs, details on efforts to fix them, and

2363

fixed bugs are all available as part of the <a class="link" href="http://gcc.gnu.org/bugs/" target="_top">GCC bug tracking system</a>,

2364

with the category set to <code class="literal">libstdc++</code>.

2365

Index: libstdc++-v3/doc/html/manual/parallel_mode_using.html

2366

===================================================================

2367

--- a/src/libstdc++-v3/doc/html/manual/parallel_mode_using.html (.../tags/gcc_4_8_2_release)

2368

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2369

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2370

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2371

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_semantics.html" title="Semantics" /><link rel="next" href="parallel_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="parallel_mode.using.prereq_flags"></a>Prerequisite Compiler Flags</h3></div></div></div><p>

2372

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_semantics.html" title="Semantics" /><link rel="next" href="parallel_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="parallel_mode.using.prereq_flags"></a>Prerequisite Compiler Flags</h3></div></div></div><p>

2373

Any use of parallel functionality requires additional compiler

2374

and runtime support, in particular support for OpenMP. Adding this support is

2375

not difficult: just compile your application with the compiler

2376

@@ -62,4 +62,4 @@

2377

flags for atomic operations.)

2378

</p><p> The following table provides the names and headers of all the

2379

parallel algorithms that can be used in a similar manner:

2380

-</p><div class="table"><a id="idp16725920"></a><p class="title"><strong>Table 18.1. Parallel Algorithms</strong></p><div class="table-contents"><table summary="Parallel Algorithms" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Algorithm</th><th align="left">Header</th><th align="left">Parallel algorithm</th><th align="left">Parallel header</th></tr></thead><tbody><tr><td align="left"><code class="function">std::accumulate</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::accumulate</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_difference</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_difference</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::inner_product</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::inner_product</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::partial_sum</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::partial_sum</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::equal</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::equal</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_first_of</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_first_of</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::for_each</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::for_each</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::lexicographical_compare</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::lexicographical_compare</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::mismatch</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::mismatch</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::transform</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::transform</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::max_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::max_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::merge</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::merge</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::min_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::min_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::nth_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::nth_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partial_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partial_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partition</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partition</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::random_shuffle</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::random_shuffle</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_union</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_union</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_intersection</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_intersection</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_symmetric_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_symmetric_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::stable_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::stable_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::unique_copy</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::unique_copy</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="parallel_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

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+</p><div class="table"><a id="idm269998805216"></a><p class="title"><strong>Table 18.1. Parallel Algorithms</strong></p><div class="table-contents"><table summary="Parallel Algorithms" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Algorithm</th><th align="left">Header</th><th align="left">Parallel algorithm</th><th align="left">Parallel header</th></tr></thead><tbody><tr><td align="left"><code class="function">std::accumulate</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::accumulate</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_difference</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_difference</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::inner_product</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::inner_product</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::partial_sum</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::partial_sum</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::equal</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::equal</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_first_of</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_first_of</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::for_each</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::for_each</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::lexicographical_compare</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::lexicographical_compare</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::mismatch</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::mismatch</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::transform</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::transform</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::max_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::max_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::merge</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::merge</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::min_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::min_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::nth_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::nth_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partial_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partial_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partition</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partition</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::random_shuffle</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::random_shuffle</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_union</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_union</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_intersection</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_intersection</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_symmetric_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_symmetric_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::stable_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::stable_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::unique_copy</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::unique_copy</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="parallel_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

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+</a></span></dt><dd><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270001611968">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idm270001608416">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm270001595120">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270000019344">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999996832">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idm269999989536">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999974912">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm269999958496">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idm269999954912">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="strings.html">7.

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</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="localization.html">8.

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Localization

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-</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idp15778336">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

2434

+</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idm269999753024">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

2435

Containers

2436

2437

</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="iterators.html">10.

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2439

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2440

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2441

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2442

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2443

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2444

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part IV. Appendices</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="ext_concurrency_use.html" title="Use" /><link rel="next" href="appendix_contributing.html" title="Appendix A. Contributing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part IV.

2445

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part IV. Appendices</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="ext_concurrency_use.html" title="Use" /><link rel="next" href="appendix_contributing.html" title="Appendix A. Contributing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part IV.

2446

Appendices

2447

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency_use.html">Prev</a> </td><th width="60%" align="center">The GNU C++ Library Manual</th><td width="20%" align="right"> <a accesskey="n" href="appendix_contributing.html">Next</a></td></tr></table><hr /></div><div class="part"><div class="titlepage"><div><div><h1 class="title"><a id="appendix"></a>Part IV.

2448

Appendices

2449

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="appendix"><a href="appendix_contributing.html">A.

2450

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="appendix"><a href="appendix_contributing.html">A.

2451

Contributing

2452

2453

</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></dd><dt><span class="appendix"><a href="appendix_porting.html">B.

2454

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2455

===================================================================

2456

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2457

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2458

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2459

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2460

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="pairs.html" title="Pairs" /><link rel="next" href="traits.html" title="Traits" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="pairs.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2461

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="pairs.html" title="Pairs" /><link rel="next" href="traits.html" title="Traits" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="pairs.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2462

Utilities

2463

2464

</th><td width="20%" align="right"> <a accesskey="n" href="traits.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.memory"></a>Memory</h2></div></div></div><p>

2465

@@ -92,7 +92,7 @@

2466

or loading and unloading shared objects in memory. As such, using

2467

caching allocators on systems that do not support

2468

<code class="function">abi::__cxa_atexit</code> is not recommended.

2469

- </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp13920976"></a>Interface Design</h5></div></div></div><p>

2470

+ </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm270001611968"></a>Interface Design</h5></div></div></div><p>

2471

The only allocator interface that

2472

is supported is the standard C++ interface. As such, all STL

2473

containers have been adjusted, and all external allocators have

2474

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2475

</p><p>

2476

The base class that <code class="classname">allocator</code> is derived from

2477

may not be user-configurable.

2478

-</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp13924528"></a>Selecting Default Allocation Policy</h5></div></div></div><p>

2479

+</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm270001608416"></a>Selecting Default Allocation Policy</h5></div></div></div><p>

2480

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2481

maximum utility, without excessively penalizing some behavior. In

2482

fact, it's difficult just deciding which typical actions to measure

2483

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2484

The current default choice for

2485

<code class="classname">allocator</code> is

2486

<code class="classname">__gnu_cxx::new_allocator</code>.

2487

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp13937824"></a>Disabling Memory Caching</h5></div></div></div><p>

2488

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2489

In use, <code class="classname">allocator</code> may allocate and

2490

deallocate using implementation-specific strategies and

2491

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2492

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2493

of the used and unused memory locations. It has its own

2494

<a class="link" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator">chapter</a>

2495

in the documentation.

2496

- </p></li></ol></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp13992848"></a><p><span class="citetitle"><em class="citetitle">

2497

+ </p></li></ol></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm270000084224"></a><p><span class="citetitle"><em class="citetitle">

2498

ISO/IEC 14882:1998 Programming languages - C++

2499

</em>. </span>

2500

isoc++_1998

2501

- <span class="pagenums">20.4 Memory. </span></p></div><div class="biblioentry"><a id="idp13994688"></a><p><span class="title"><em>

2502

- <a class="link" href="http://www.drdobbs.com/cpp/184403759" target="_top">

2503

+ <span class="pagenums">20.4 Memory. </span></p></div><div class="biblioentry"><a id="idm270000082384"></a><p><span class="title"><em>

2504

+ <a class="link" href="http://www.drdobbs.com/the-standard-librarian-what-are-allocato/184403759" target="_top">

2505

The Standard Librarian: What Are Allocators Good For?

2506

</a>

2507

</em>. </span><span class="author"><span class="firstname">Matt</span> <span class="surname">Austern</span>. </span><span class="publisher"><span class="publishername">

2508

C/C++ Users Journal

2509

- . </span></span></p></div><div class="biblioentry"><a id="idp13998416"></a><p><span class="title"><em>

2510

+ . </span></span></p></div><div class="biblioentry"><a id="idm270000078608"></a><p><span class="title"><em>

2511

2512

The Hoard Memory Allocator

2513

</a>

2514

- </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span></p></div><div class="biblioentry"><a id="idp14001184"></a><p><span class="title"><em>

2515

+ </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span></p></div><div class="biblioentry"><a id="idm270000075840"></a><p><span class="title"><em>

2516

2517

Reconsidering Custom Memory Allocation

2518

</a>

2519

- </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span><span class="author"><span class="firstname">Ben</span> <span class="surname">Zorn</span>. </span><span class="author"><span class="firstname">Kathryn</span> <span class="surname">McKinley</span>. </span><span class="copyright">Copyright © 2002 OOPSLA. </span></p></div><div class="biblioentry"><a id="idp14007344"></a><p><span class="title"><em>

2520

+ </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span><span class="author"><span class="firstname">Ben</span> <span class="surname">Zorn</span>. </span><span class="author"><span class="firstname">Kathryn</span> <span class="surname">McKinley</span>. </span><span class="copyright">Copyright © 2002 OOPSLA. </span></p></div><div class="biblioentry"><a id="idm270000069680"></a><p><span class="title"><em>

2521

2522

Allocator Types

2523

</a>

2524

</em>. </span><span class="author"><span class="firstname">Klaus</span> <span class="surname">Kreft</span>. </span><span class="author"><span class="firstname">Angelika</span> <span class="surname">Langer</span>. </span><span class="publisher"><span class="publishername">

2525

C/C++ Users Journal

2526

- . </span></span></p></div><div class="biblioentry"><a id="idp14012080"></a><p><span class="citetitle"><em class="citetitle">The C++ Programming Language</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 . </span><span class="pagenums">19.4 Allocators. </span><span class="publisher"><span class="publishername">

2527

+ . </span></span></p></div><div class="biblioentry"><a id="idm270000064944"></a><p><span class="citetitle"><em class="citetitle">The C++ Programming Language</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 . </span><span class="pagenums">19.4 Allocators. </span><span class="publisher"><span class="publishername">

2528

Addison Wesley

2529

- . </span></span></p></div><div class="biblioentry"><a id="idp14016512"></a><p><span class="citetitle"><em class="citetitle">Yalloc: A Recycling C++ Allocator</em>. </span><span class="author"><span class="firstname">Felix</span> <span class="surname">Yen</span>. </span></p></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.util.memory.auto_ptr"></a>auto_ptr</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="auto_ptr.limitations"></a>Limitations</h4></div></div></div><p>Explaining all of the fun and delicious things that can

2530

+ . </span></span></p></div><div class="biblioentry"><a id="idm270000060512"></a><p><span class="citetitle"><em class="citetitle">Yalloc: A Recycling C++ Allocator</em>. </span><span class="author"><span class="firstname">Felix</span> <span class="surname">Yen</span>. </span></p></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.util.memory.auto_ptr"></a>auto_ptr</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="auto_ptr.limitations"></a>Limitations</h4></div></div></div><p>Explaining all of the fun and delicious things that can

2531

happen with misuse of the <code class="classname">auto_ptr</code> class

2532

template (called <acronym class="acronym">AP</acronym> here) would take some

2533

time. Suffice it to say that the use of <acronym class="acronym">AP</acronym>

2534

@@ -445,7 +445,7 @@

2535

Derived classes override those functions to destroy resources in a context

2536

where the correct dynamic type is known. This is an application of the

2537

technique known as type erasure.

2538

- </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15512272"></a>Class Hierarchy</h5></div></div></div><p>

2539

+ </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm270000019344"></a>Class Hierarchy</h5></div></div></div><p>

2540

A <code class="classname">shared_ptr<T></code> contains a pointer of

2541

type <span class="type">T*</span> and an object of type

2542

<code class="classname">__shared_count</code>. The shared_count contains a

2543

@@ -492,9 +492,9 @@

2544

aliasing constructor, make_shared & allocate_shared. Additionally,

2545

the constructors taking <code class="classname">auto_ptr</code> parameters are

2546

deprecated in C++11 mode.

2547

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15534784"></a>Thread Safety</h5></div></div></div><p>

2548

+ </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999996832"></a>Thread Safety</h5></div></div></div><p>

2549

The

2550

-<a class="link" href="http://boost.org/libs/smart_ptr/shared_ptr.htm#ThreadSafety" target="_top">Thread

2551

+<a class="link" href="http://www.boost.org/libs/smart_ptr/shared_ptr.htm#ThreadSafety" target="_top">Thread

2552

Safety</a> section of the Boost shared_ptr documentation says "shared_ptr

2553

objects offer the same level of thread safety as built-in types."

2554

The implementation must ensure that concurrent updates to separate shared_ptr

2555

@@ -537,7 +537,7 @@

2556

shared_ptr in libstdc++ the compiler and library are fixed, which

2557

makes things much simpler: we have an atomic CAS or we don't, see Lock

2558

Policy below for details.

2559

-</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15542080"></a>Selecting Lock Policy</h5></div></div></div><p>

2560

+</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999989536"></a>Selecting Lock Policy</h5></div></div></div><p>

2561

</p><p>

2562

There is a single <code class="classname">_Sp_counted_base</code> class,

2563

which is a template parameterized on the enum

2564

@@ -578,7 +578,7 @@

2565

<code class="filename">ext/atomicity.h</code>, which detect if the program

2566

is multi-threaded. If only one thread of execution exists in

2567

the program then less expensive non-atomic operations are used.

2568

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15556704"></a>Related functions and classes</h5></div></div></div><div class="variablelist"><dl class="variablelist"><dt><span class="term"><code class="code">dynamic_pointer_cast</code>, <code class="code">static_pointer_cast</code>,

2569

+ </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999974912"></a>Related functions and classes</h5></div></div></div><div class="variablelist"><dl class="variablelist"><dt><span class="term"><code class="code">dynamic_pointer_cast</code>, <code class="code">static_pointer_cast</code>,

2570

<code class="code">const_pointer_cast</code></span></dt><dd><p>

2571

As noted in N2351, these functions can be implemented non-intrusively using

2572

the alias constructor. However the aliasing constructor is only available

2573

@@ -611,13 +611,13 @@

2574

As well as the extra constructors, this implementation also needs some

2575

members of _Sp_counted_deleter to be protected where they could otherwise

2576

be private.

2577

- </p></dd></dl></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.using"></a>Use</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15573056"></a>Examples</h5></div></div></div><p>

2578

+ </p></dd></dl></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.using"></a>Use</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999958496"></a>Examples</h5></div></div></div><p>

2579

Examples of use can be found in the testsuite, under

2580

<code class="filename">testsuite/tr1/2_general_utilities/shared_ptr</code>,

2581

<code class="filename">testsuite/20_util/shared_ptr</code>

2582

and

2583

<code class="filename">testsuite/20_util/weak_ptr</code>.

2584

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15576640"></a>Unresolved Issues</h5></div></div></div><p>

2585

+ </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999954912"></a>Unresolved Issues</h5></div></div></div><p>

2586

The <span class="emphasis"><em><code class="classname">shared_ptr</code> atomic access</em></span>

2587

clause in the C++11 standard is not implemented in GCC.

2588

</p><p>

2589

@@ -658,25 +658,25 @@

2590

code to work with, Peter Dimov in particular for his help and

2591

invaluable advice on thread safety. Phillip Jordan and Paolo

2592

Carlini for the lock policy implementation.

2593

- </p></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15587936"></a><p><span class="title"><em>

2594

+ </p></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999943680"></a><p><span class="title"><em>

2595

2596

Improving shared_ptr for C++0x, Revision 2

2597

</a>

2598

</em>. </span><span class="subtitle">

2599

N2351

2600

- . </span></p></div><div class="biblioentry"><a id="idp15590224"></a><p><span class="title"><em>

2601

+ . </span></p></div><div class="biblioentry"><a id="idm269999941392"></a><p><span class="title"><em>

2602

2603

C++ Standard Library Active Issues List

2604

</a>

2605

</em>. </span><span class="subtitle">

2606

N2456

2607

- . </span></p></div><div class="biblioentry"><a id="idp15592512"></a><p><span class="title"><em>

2608

+ . </span></p></div><div class="biblioentry"><a id="idm269999939104"></a><p><span class="title"><em>

2609

2610

Working Draft, Standard for Programming Language C++

2611

</a>

2612

</em>. </span><span class="subtitle">

2613

N2461

2614

- . </span></p></div><div class="biblioentry"><a id="idp15594816"></a><p><span class="title"><em>

2615

+ . </span></p></div><div class="biblioentry"><a id="idm269999936800"></a><p><span class="title"><em>

2616

2617

Boost C++ Libraries documentation, shared_ptr

2618

</a>

2619

Index: libstdc++-v3/doc/html/manual/api.html

2620

===================================================================

2621

--- a/src/libstdc++-v3/doc/html/manual/api.html (.../tags/gcc_4_8_2_release)

2622

+++ b/src/libstdc++-v3/doc/html/manual/api.html (.../branches/gcc-4_8-branch)

2623

@@ -1,5 +1,5 @@

2624

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2625

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>API Evolution and Deprecation History</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, api, evolution, deprecation, history" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="abi.html" title="ABI Policy and Guidelines" /><link rel="next" href="backwards.html" title="Backwards Compatibility" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">API Evolution and Deprecation History</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="abi.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2626

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>API Evolution and Deprecation History</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, api, evolution, deprecation, history" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="abi.html" title="ABI Policy and Guidelines" /><link rel="next" href="backwards.html" title="Backwards Compatibility" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">API Evolution and Deprecation History</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="abi.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2627

Porting and Maintenance

2628

2629

</th><td width="20%" align="right"> <a accesskey="n" href="backwards.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.api"></a>API Evolution and Deprecation History</h2></div></div></div><p>

2630

@@ -77,11 +77,11 @@

2631

<span class="type">__alloc</span> to select an underlying allocator that

2632

satisfied memory allocation requests. The selection of this

2633

underlying allocator was not user-configurable.

2634

- </p><div class="table"><a id="idp23030528"></a><p class="title"><strong>Table B.6. Extension Allocators</strong></p><div class="table-contents"><table summary="Extension Allocators" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Allocator (3.4)</th><th align="left">Header (3.4)</th><th align="left">Allocator (3.[0-3])</th><th align="left">Header (3.[0-3])</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::new_allocator<T></code></td><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="classname">std::__new_alloc</code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::malloc_allocator<T></code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="classname">std::__malloc_alloc_template<int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::debug_allocator<T></code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="classname">std::debug_alloc<T></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__pool_alloc<T></code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="classname">std::__default_alloc_template<bool,int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__mt_alloc<T></code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left"><code class="classname">__gnu_cxx::bitmap_allocator<T></code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr></tbody></table></div></div><br class="table-break" /><p> Releases after gcc-3.4 have continued to add to the collection

2635

+ </p><div class="table"><a id="idm269992502096"></a><p class="title"><strong>Table B.6. Extension Allocators</strong></p><div class="table-contents"><table summary="Extension Allocators" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Allocator (3.4)</th><th align="left">Header (3.4)</th><th align="left">Allocator (3.[0-3])</th><th align="left">Header (3.[0-3])</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::new_allocator<T></code></td><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="classname">std::__new_alloc</code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::malloc_allocator<T></code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="classname">std::__malloc_alloc_template<int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::debug_allocator<T></code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="classname">std::debug_alloc<T></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__pool_alloc<T></code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="classname">std::__default_alloc_template<bool,int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__mt_alloc<T></code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left"><code class="classname">__gnu_cxx::bitmap_allocator<T></code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr></tbody></table></div></div><br class="table-break" /><p> Releases after gcc-3.4 have continued to add to the collection

2636

of available allocators. All of these new allocators are

2637

standard-style. The following table includes details, along with

2638

the first released version of GCC that included the extension allocator.

2639

- </p><div class="table"><a id="idp23058160"></a><p class="title"><strong>Table B.7. Extension Allocators Continued</strong></p><div class="table-contents"><table summary="Extension Allocators Continued" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /></colgroup><thead><tr><th align="left">Allocator</th><th align="left">Include</th><th align="left">Version</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::array_allocator<T></code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left">4.0.0</td></tr><tr><td align="left"><code class="classname">__gnu_cxx::throw_allocator<T></code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left">4.2.0</td></tr></tbody></table></div></div><br class="table-break" /><p>

2640

+ </p><div class="table"><a id="idm269992474464"></a><p class="title"><strong>Table B.7. Extension Allocators Continued</strong></p><div class="table-contents"><table summary="Extension Allocators Continued" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /></colgroup><thead><tr><th align="left">Allocator</th><th align="left">Include</th><th align="left">Version</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::array_allocator<T></code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left">4.0.0</td></tr><tr><td align="left"><code class="classname">__gnu_cxx::throw_allocator<T></code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left">4.2.0</td></tr></tbody></table></div></div><br class="table-break" /><p>

2641

Debug mode first appears.

2642

</p><p>

2643

Precompiled header support <acronym class="acronym">PCH</acronym> support.

2644

Index: libstdc++-v3/doc/html/manual/source_organization.html

2645

===================================================================

2646

--- a/src/libstdc++-v3/doc/html/manual/source_organization.html (.../tags/gcc_4_8_2_release)

2647

+++ b/src/libstdc++-v3/doc/html/manual/source_organization.html (.../branches/gcc-4_8-branch)

2648

@@ -1,5 +1,5 @@

2649

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2650

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Directory Layout and Source Conventions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="next" href="source_code_style.html" title="Coding Style" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Directory Layout and Source Conventions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_contributing.html">Prev</a> </td><th width="60%" align="center">Appendix A.

2651

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Directory Layout and Source Conventions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="next" href="source_code_style.html" title="Coding Style" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Directory Layout and Source Conventions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_contributing.html">Prev</a> </td><th width="60%" align="center">Appendix A.

2652

Contributing

2653

2654

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2655

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2656

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2660

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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2662

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>File Based Streams</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="stringstreams.html" title="Memory Based Streams" /><link rel="next" href="io_and_c.html" title="Interacting with C" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">File Based Streams</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="stringstreams.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2663

Input and Output

2664

2665

</th><td width="20%" align="right"> <a accesskey="n" href="io_and_c.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.filestreams"></a>File Based Streams</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.io.filestreams.copying_a_file"></a>Copying a File</h3></div></div></div><p>

2666

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2667

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2668

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2670

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2671

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2672

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2673

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 29. Demangling</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_io.html" title="Chapter 28. Input and Output" /><link rel="next" href="ext_concurrency.html" title="Chapter 30. Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 29. Demangling</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_io.html">Prev</a> </td><th width="60%" align="center">Part III.

2674

Extensions

2675

2676

</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.demangle"></a>Chapter 29. Demangling</h2></div></div></div><p>

2677

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2678

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2679

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2681

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2682

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2683

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="extensions.html" title="Part III. Extensions" /><link rel="next" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="extensions.html">Prev</a> </td><th width="60%" align="center">Part III.

2684

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="extensions.html" title="Part III. Extensions" /><link rel="next" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="extensions.html">Prev</a> </td><th width="60%" align="center">Part III.

2685

Extensions

2686

2687

-</th><td width="20%" align="right"> <a accesskey="n" href="ext_compile_checks.html">Next</a></td></tr></table><hr /></div><div class="preface"><div class="titlepage"><div><div><h1 class="title"><a id="idp16425920"></a></h1></div></div></div><p>

2688

+</th><td width="20%" align="right"> <a accesskey="n" href="ext_compile_checks.html">Next</a></td></tr></table><hr /></div><div class="preface"><div class="titlepage"><div><div><h1 class="title"><a id="idm269999105296"></a></h1></div></div></div><p>

2689

Here we will make an attempt at describing the non-Standard

2690

extensions to the library. Some of these are from older versions of

2691

standard library components, namely SGI's STL, and some of these are

2692

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2693

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2694

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2695

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2696

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2697

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2698

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2699

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Concept Checking</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="diagnostics.html" title="Chapter 5. Diagnostics" /><link rel="prev" href="diagnostics.html" title="Chapter 5. Diagnostics" /><link rel="next" href="utilities.html" title="Chapter 6. Utilities" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Concept Checking</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="diagnostics.html">Prev</a> </td><th width="60%" align="center">Chapter 5.

2700

Diagnostics

2701

2702

</th><td width="20%" align="right"> <a accesskey="n" href="utilities.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.diagnostics.concept_checking"></a>Concept Checking</h2></div></div></div><p>

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2704

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2705

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2707

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2708

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2709

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2710

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Multiple Thread Example</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_ex_single.html" title="Single Thread Example" /><link rel="next" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Multiple Thread Example</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_ex_single.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="bitmap_allocator.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.example_multi"></a>Multiple Thread Example</h2></div></div></div><p>

2711

In the ST example we never used the thread_id variable present in each block.

2712

Let's start by explaining the purpose of this in a MT application.

2713

</p><p>

2714

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2715

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2716

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2717

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2718

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2719

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2721

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 16. Compile Time Checks</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_preface.html" title="" /><link rel="next" href="debug_mode.html" title="Chapter 17. Debug Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 16. Compile Time Checks</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_preface.html">Prev</a> </td><th width="60%" align="center">Part III.

2722

Extensions

2723

2724

</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.compile_checks"></a>Chapter 16. Compile Time Checks</h2></div></div></div><p>

2725

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2726

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2727

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2732

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2733

Strings

2734

2735

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2736

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2737

Standard Contents

2738

</th><td width="20%" align="right"> <a accesskey="n" href="localization.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.strings"></a>Chapter 7.

2739

Strings

2740

- <a id="idp15603440" class="indexterm"></a>

2741

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.strings.string"></a>String Classes</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="strings.string.simple"></a>Simple Transformations</h3></div></div></div><p>

2742

+ <a id="idm269999928112" class="indexterm"></a>

2743

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.strings.string"></a>String Classes</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="strings.string.simple"></a>Simple Transformations</h3></div></div></div><p>

2744

Here are Standard, simple, and portable ways to perform common

2745

transformations on a <code class="code">string</code> instance, such as

2746

"convert to all upper case." The word transformations

2747

Index: libstdc++-v3/doc/html/manual/containers_and_c.html

2748

===================================================================

2749

--- a/src/libstdc++-v3/doc/html/manual/containers_and_c.html (.../tags/gcc_4_8_2_release)

2750

+++ b/src/libstdc++-v3/doc/html/manual/containers_and_c.html (.../branches/gcc-4_8-branch)

2751

@@ -1,5 +1,5 @@

2752

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2753

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="unordered_associative.html" title="Unordered Associative" /><link rel="next" href="iterators.html" title="Chapter 10. Iterators" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="unordered_associative.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2754

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="unordered_associative.html" title="Unordered Associative" /><link rel="next" href="iterators.html" title="Chapter 10. Iterators" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="unordered_associative.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2755

Containers

2756

2757

</th><td width="20%" align="right"> <a accesskey="n" href="iterators.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.c"></a>Interacting with C</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.c.vs_array"></a>Containers vs. Arrays</h3></div></div></div><p>

2758

Index: libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html

2759

===================================================================

2760

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html (.../tags/gcc_4_8_2_release)

2761

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html (.../branches/gcc-4_8-branch)

2762

@@ -1,5 +1,5 @@

2763

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2764

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_devel.html" title="Developer Information" /><link rel="next" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Diagnostics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_devel.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.diagnostics"></a>Diagnostics</h2></div></div></div><p>

2765

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_devel.html" title="Developer Information" /><link rel="next" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Diagnostics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_devel.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.diagnostics"></a>Diagnostics</h2></div></div></div><p>

2766

The table below presents all the diagnostics we intend to implement.

2767

Each diagnostic has a corresponding compile time switch

2768

<code class="code">-D_GLIBCXX_PROFILE_<diagnostic></code>.

2769

@@ -17,7 +17,7 @@

2770

A high accuracy means that the diagnostic is unlikely to be wrong.

2771

These grades are not perfect. They are just meant to guide users with

2772

specific needs or time budgets.

2773

- </p><div class="table"><a id="idp17088912"></a><p class="title"><strong>Table 19.2. Profile Diagnostics</strong></p><div class="table-contents"><table summary="Profile Diagnostics" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /><col align="left" class="c6" /><col align="left" class="c7" /></colgroup><thead><tr><th align="left">Group</th><th align="left">Flag</th><th align="left">Benefit</th><th align="left">Cost</th><th align="left">Freq.</th><th align="left">Implemented</th><td class="auto-generated"> </td></tr></thead><tbody><tr><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers" title="Containers">

2774

+ </p><div class="table"><a id="idm269998442544"></a><p class="title"><strong>Table 19.2. Profile Diagnostics</strong></p><div class="table-contents"><table summary="Profile Diagnostics" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /><col align="left" class="c6" /><col align="left" class="c7" /></colgroup><thead><tr><th align="left">Group</th><th align="left">Flag</th><th align="left">Benefit</th><th align="left">Cost</th><th align="left">Freq.</th><th align="left">Implemented</th><td class="auto-generated"> </td></tr></thead><tbody><tr><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers" title="Containers">

2775

CONTAINERS</a></td><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small" title="Hashtable Too Small">

2776

HASHTABLE_TOO_SMALL</a></td><td align="left">10</td><td align="left">1</td><td align="left"> </td><td align="left">10</td><td align="left">yes</td></tr><tr><td align="left"> </td><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large" title="Hashtable Too Large">

2777

HASHTABLE_TOO_LARGE</a></td><td align="left">5</td><td align="left">1</td><td align="left"> </td><td align="left">10</td><td align="left">yes</td></tr><tr><td align="left"> </td><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash" title="Inefficient Hash">

2778

@@ -374,7 +374,7 @@

2779

Quick Sort for a particular call context.

2780

</p></li><li class="listitem"><p><span class="emphasis"><em>Fundamentals:</em></span>

2781

See papers:

2782

- <a class="link" href="http://portal.acm.org/citation.cfm?doid=1065944.1065981" target="_top">

2783

+ <a class="link" href="https://dl.acm.org/citation.cfm?doid=1065944.1065981" target="_top">

2784

A framework for adaptive algorithm selection in STAPL</a> and

2785

2786

Optimizing Sorting with Machine Learning Algorithms</a>.

2787

@@ -500,7 +500,7 @@

2788

Keep a shadow for each container. Record iterator dereferences and

2789

container member accesses. Issue advice for elements referenced by

2790

multiple threads.

2791

- See paper: <a class="link" href="http://portal.acm.org/citation.cfm?id=207110.207148" target="_top">

2792

+ See paper: <a class="link" href="https://dl.acm.org/citation.cfm?id=207110.207148" target="_top">

2793

The LRPD test: speculative run-time parallelization of loops with

2794

privatization and reduction parallelization</a>.

2795

</p></li><li class="listitem"><p><span class="emphasis"><em>Cost model:</em></span>

2796

Index: libstdc++-v3/doc/html/manual/ext_concurrency_impl.html

2797

===================================================================

2798

--- a/src/libstdc++-v3/doc/html/manual/ext_concurrency_impl.html (.../tags/gcc_4_8_2_release)

2799

+++ b/src/libstdc++-v3/doc/html/manual/ext_concurrency_impl.html (.../branches/gcc-4_8-branch)

2800

@@ -1,5 +1,5 @@

2801

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2802

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="next" href="ext_concurrency_use.html" title="Use" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency_use.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.concurrency.impl.atomic_fallbacks"></a>Using Builtin Atomic Functions</h3></div></div></div><p>The functions for atomic operations described above are either

2803

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="next" href="ext_concurrency_use.html" title="Use" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency_use.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.concurrency.impl.atomic_fallbacks"></a>Using Builtin Atomic Functions</h3></div></div></div><p>The functions for atomic operations described above are either

2804

implemented via compiler intrinsics (if the underlying host is

2805

capable) or by library fallbacks.</p><p>Compiler intrinsics (builtins) are always preferred. However, as

2806

the compiler builtins for atomics are not universally implemented,

2807

Index: libstdc++-v3/doc/html/manual/io_and_c.html

2808

===================================================================

2809

--- a/src/libstdc++-v3/doc/html/manual/io_and_c.html (.../tags/gcc_4_8_2_release)

2810

+++ b/src/libstdc++-v3/doc/html/manual/io_and_c.html (.../branches/gcc-4_8-branch)

2811

@@ -1,5 +1,5 @@

2812

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2813

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="fstreams.html" title="File Based Streams" /><link rel="next" href="atomics.html" title="Chapter 14. Atomics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="fstreams.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2814

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="fstreams.html" title="File Based Streams" /><link rel="next" href="atomics.html" title="Chapter 14. Atomics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="fstreams.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2815

Input and Output

2816

2817

</th><td width="20%" align="right"> <a accesskey="n" href="atomics.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.c"></a>Interacting with C</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.io.c.FILE"></a>Using FILE* and file descriptors</h3></div></div></div><p>

2818

Index: libstdc++-v3/doc/html/manual/documentation_hacking.html

2819

===================================================================

2820

--- a/src/libstdc++-v3/doc/html/manual/documentation_hacking.html (.../tags/gcc_4_8_2_release)

2821

+++ b/src/libstdc++-v3/doc/html/manual/documentation_hacking.html (.../branches/gcc-4_8-branch)

2822

@@ -1,5 +1,5 @@

2823

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2824

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Writing and Generating Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, documentation, style, docbook, doxygen" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="next" href="internals.html" title="Porting to New Hardware or Operating Systems" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Writing and Generating Documentation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_porting.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2825

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Writing and Generating Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, documentation, style, docbook, doxygen" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="next" href="internals.html" title="Porting to New Hardware or Operating Systems" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Writing and Generating Documentation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_porting.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2826

Porting and Maintenance

2827

2828

</th><td width="20%" align="right"> <a accesskey="n" href="internals.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.doc"></a>Writing and Generating Documentation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.intro"></a>Introduction</h3></div></div></div><p>

2829

@@ -112,7 +112,7 @@

2830

supported, and are always aliased to dummy rules. These

2831

unsupported formats are: <span class="emphasis"><em>info</em></span>,

2832

<span class="emphasis"><em>ps</em></span>, and <span class="emphasis"><em>dvi</em></span>.

2833

- </p></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.doxygen"></a>Doxygen</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="doxygen.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idp22162432"></a><p class="title"><strong>Table B.1. Doxygen Prerequisites</strong></p><div class="table-contents"><table summary="Doxygen Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">coreutils</td><td align="center">8.5</td><td align="center">all</td></tr><tr><td align="center">bash</td><td align="center">4.1</td><td align="center">all</td></tr><tr><td align="center">doxygen</td><td align="center">1.7.6.1</td><td align="center">all</td></tr><tr><td align="center">graphviz</td><td align="center">2.26</td><td align="center">graphical hierarchies</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2834

+ </p></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.doxygen"></a>Doxygen</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="doxygen.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idm269993370272"></a><p class="title"><strong>Table B.1. Doxygen Prerequisites</strong></p><div class="table-contents"><table summary="Doxygen Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">coreutils</td><td align="center">8.5</td><td align="center">all</td></tr><tr><td align="center">bash</td><td align="center">4.1</td><td align="center">all</td></tr><tr><td align="center">doxygen</td><td align="center">1.7.6.1</td><td align="center">all</td></tr><tr><td align="center">graphviz</td><td align="center">2.26</td><td align="center">graphical hierarchies</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2835

Prerequisite tools are Bash 2.0 or later,

2836

<a class="link" href="http://www.doxygen.org/" target="_top">Doxygen</a>, and

2837

the <a class="link" href="http://www.gnu.org/software/coreutils/" target="_top">GNU

2838

@@ -232,9 +232,8 @@

2839

member functions.

2840

</p><p>

2841

Some commentary to accompany

2842

- the first list in the <a class="link" href="http://www.stack.nl/~dimitri/doxygen/docblocks.html" target="_top">Special

2843

- Documentation Blocks</a> section of

2844

- the Doxygen manual:

2845

+ the first list in the <a class="link" href="http://www.stack.nl/~dimitri/doxygen/manual/docblocks.html" target="_top">Special

2846

+ Documentation Blocks</a> section of the Doxygen manual:

2847

</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>For longer comments, use the Javadoc style...</p></li><li class="listitem"><p>

2848

...not the Qt style. The intermediate *'s are preferred.

2849

</p></li><li class="listitem"><p>

2850

@@ -310,7 +309,7 @@

2851

writing Doxygen comments. Single and double quotes, and

2852

separators in filenames are two common trouble spots. When in

2853

doubt, consult the following table.

2854

- </p><div class="table"><a id="idp22238096"></a><p class="title"><strong>Table B.2. HTML to Doxygen Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Doxygen Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Doxygen</th></tr></thead><tbody><tr><td align="left">\</td><td align="left">\\</td></tr><tr><td align="left">"</td><td align="left">\"</td></tr><tr><td align="left">'</td><td align="left">\'</td></tr><tr><td align="left"><i></td><td align="left">@a word</td></tr><tr><td align="left"><b></td><td align="left">@b word</td></tr><tr><td align="left"><code></td><td align="left">@c word</td></tr><tr><td align="left"><em></td><td align="left">@a word</td></tr><tr><td align="left"><em></td><td align="left"><em>two words or more</em></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.docbook"></a>Docbook</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="docbook.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idp22257536"></a><p class="title"><strong>Table B.3. Docbook Prerequisites</strong></p><div class="table-contents"><table summary="Docbook Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">docbook5-style-xsl</td><td align="center">1.76.1</td><td align="center">all</td></tr><tr><td align="center">xsltproc</td><td align="center">1.1.26</td><td align="center">all</td></tr><tr><td align="center">xmllint</td><td align="center">2.7.7</td><td align="center">validation</td></tr><tr><td align="center">dblatex</td><td align="center">0.3</td><td align="center">pdf output</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr><tr><td align="center">docbook2X</td><td align="center">0.8.8</td><td align="center">info output</td></tr><tr><td align="center">epub3 stylesheets</td><td align="center">b3</td><td align="center">epub output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2855

+ </p><div class="table"><a id="idm269993294592"></a><p class="title"><strong>Table B.2. HTML to Doxygen Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Doxygen Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Doxygen</th></tr></thead><tbody><tr><td align="left">\</td><td align="left">\\</td></tr><tr><td align="left">"</td><td align="left">\"</td></tr><tr><td align="left">'</td><td align="left">\'</td></tr><tr><td align="left"><i></td><td align="left">@a word</td></tr><tr><td align="left"><b></td><td align="left">@b word</td></tr><tr><td align="left"><code></td><td align="left">@c word</td></tr><tr><td align="left"><em></td><td align="left">@a word</td></tr><tr><td align="left"><em></td><td align="left"><em>two words or more</em></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.docbook"></a>Docbook</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="docbook.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idm269993275152"></a><p class="title"><strong>Table B.3. Docbook Prerequisites</strong></p><div class="table-contents"><table summary="Docbook Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">docbook5-style-xsl</td><td align="center">1.76.1</td><td align="center">all</td></tr><tr><td align="center">xsltproc</td><td align="center">1.1.26</td><td align="center">all</td></tr><tr><td align="center">xmllint</td><td align="center">2.7.7</td><td align="center">validation</td></tr><tr><td align="center">dblatex</td><td align="center">0.3</td><td align="center">pdf output</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr><tr><td align="center">docbook2X</td><td align="center">0.8.8</td><td align="center">info output</td></tr><tr><td align="center">epub3 stylesheets</td><td align="center">b3</td><td align="center">epub output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2856

Editing the DocBook sources requires an XML editor. Many

2857

exist: some notable options

2858

include <span class="command"><strong>emacs</strong></span>, <span class="application">Kate</span>,

2859

@@ -520,11 +519,11 @@

2860

<a class="link" href="http://www.docbook.org/tdg/en/html/part2.html" target="_top">online</a>.

2861

An incomplete reference for HTML to Docbook conversion is

2862

detailed in the table below.

2863

- </p><div class="table"><a id="idp22335040"></a><p class="title"><strong>Table B.4. HTML to Docbook XML Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Docbook XML Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Docbook</th></tr></thead><tbody><tr><td align="left"><p></td><td align="left"><para></td></tr><tr><td align="left"><pre></td><td align="left"><computeroutput>, <programlisting>,

2864

+ </p><div class="table"><a id="idm269993197520"></a><p class="title"><strong>Table B.4. HTML to Docbook XML Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Docbook XML Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Docbook</th></tr></thead><tbody><tr><td align="left"><p></td><td align="left"><para></td></tr><tr><td align="left"><pre></td><td align="left"><computeroutput>, <programlisting>,

2865

2866

And examples of detailed markup for which there are no real HTML

2867

equivalents are listed in the table below.

2868

-</p><div class="table"><a id="idp22359184"></a><p class="title"><strong>Table B.5. Docbook XML Element Use</strong></p><div class="table-contents"><table summary="Docbook XML Element Use" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Element</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><structname></td><td align="left"><structname>char_traits</structname></td></tr><tr><td align="left"><classname></td><td align="left"><classname>string</classname></td></tr><tr><td align="left"><function></td><td align="left">

2869

+</p><div class="table"><a id="idm269993173376"></a><p class="title"><strong>Table B.5. Docbook XML Element Use</strong></p><div class="table-contents"><table summary="Docbook XML Element Use" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Element</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><structname></td><td align="left"><structname>char_traits</structname></td></tr><tr><td align="left"><classname></td><td align="left"><classname>string</classname></td></tr><tr><td align="left"><function></td><td align="left">

2870

<p><function>clear()</function></p>

2871

<p><function>fs.clear()</function></p>

2872

</td></tr><tr><td align="left"><type></td><td align="left"><type>long long</type></td></tr><tr><td align="left"><varname></td><td align="left"><varname>fs</varname></td></tr><tr><td align="left"><literal></td><td align="left">

2873

Index: libstdc++-v3/doc/html/manual/extensions.html

2874

===================================================================

2875

--- a/src/libstdc++-v3/doc/html/manual/extensions.html (.../tags/gcc_4_8_2_release)

2876

+++ b/src/libstdc++-v3/doc/html/manual/extensions.html (.../branches/gcc-4_8-branch)

2877

@@ -1,11 +1,11 @@

2878

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2879

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part III. Extensions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="io_and_c.html" title="Interacting with C" /><link rel="next" href="ext_preface.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part III.

2880

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part III. Extensions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="io_and_c.html" title="Interacting with C" /><link rel="next" href="ext_preface.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part III.

2881

Extensions

2882

2883

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="io_and_c.html">Prev</a> </td><th width="60%" align="center">The GNU C++ Library Manual</th><td width="20%" align="right"> <a accesskey="n" href="ext_preface.html">Next</a></td></tr></table><hr /></div><div class="part"><div class="titlepage"><div><div><h1 class="title"><a id="manual.ext"></a>Part III.

2884

Extensions

2885

- <a id="idp16423680" class="indexterm"></a>

2886

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="preface"><a href="ext_preface.html"></a></span></dt><dt><span class="chapter"><a href="ext_compile_checks.html">16. Compile Time Checks</a></span></dt><dt><span class="chapter"><a href="debug_mode.html">17. Debug Mode</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

2887

+ <a id="idm269999107536" class="indexterm"></a>

2888

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="preface"><a href="ext_preface.html"></a></span></dt><dt><span class="chapter"><a href="ext_compile_checks.html">16. Compile Time Checks</a></span></dt><dt><span class="chapter"><a href="debug_mode.html">17. Debug Mode</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

2889

debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.alt">Alternatives for Coexistence</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.other">Other Implementations</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="parallel_mode.html">18. Parallel Mode</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode.html#manual.ext.parallel_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="parallel_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.prereq_flags">Prerequisite Compiler Flags</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.parallel_mode">Using Parallel Mode</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.specific">Using Specific Parallel Components</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.intro">Interface Basics</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning">Configuration and Tuning</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.omp">Setting up the OpenMP Environment</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.compile">Compile Time Switches</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.settings">Run Time Settings and Defaults</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.impl">Implementation Namespaces</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_test.html">Testing</a></span></dt><dt><span class="bibliography"><a href="parallel_mode.html#parallel_mode.biblio">Bibliography</a></span></dt></dl></dd><dt><span class="chapter"><a href="profile_mode.html">19. Profile Mode</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.using">Using the Profile Mode</a></span></dt><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.tuning">Tuning the Profile Mode</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.wrapper">Wrapper Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.instrumentation">Instrumentation</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.rtlib">Run Time Behavior</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.analysis">Analysis and Diagnostics</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.cost-model">Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.reports">Reports</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.testing">Testing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_api.html">Extensions for Custom Containers</a></span></dt><dt><span class="section"><a href="profile_mode_cost_model.html">Empirical Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html">Implementation Issues</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stack">Stack Traces</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.symbols">Symbolization of Instruction Addresses</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.concurrency">Concurrency</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stdlib-in-proflib">Using the Standard Library in the Instrumentation Implementation</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.malloc-hooks">Malloc Hooks</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.construction-destruction">Construction and Destruction of Global Objects</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_devel.html">Developer Information</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.bigpic">Big Picture</a></span></dt><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.howto">How To Add A Diagnostic</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html">Diagnostics</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.template">Diagnostic Template</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers">Containers</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small">Hashtable Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large">Hashtable Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash">Inefficient Hash</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_small">Vector Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_large">Vector Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_hashtable">Vector to Hashtable</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_to_vector">Hashtable to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_list">Vector to List</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_vector">List to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_slist">List to Forward List (Slist)</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.assoc_ord_to_unord">Ordered to Unordered Associative Container</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms">Algorithms</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms.sort">Sort Algorithm Performance</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality">Data Locality</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.sw_prefetch">Need Software Prefetch</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.linked">Linked Structure Locality</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread">Multithreaded Data Access</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.ddtest">Data Dependence Violations at Container Level</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.false_share">False Sharing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.statistics">Statistics</a></span></dt></dl></dd><dt><span class="bibliography"><a href="profile_mode.html#profile_mode.biblio">Bibliography</a></span></dt></dl></dd><dt><span class="chapter"><a href="mt_allocator.html">20. The mt_allocator</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator.html#allocator.mt.intro">Intro</a></span></dt><dt><span class="section"><a href="mt_allocator_design.html">Design Issues</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_design.html#allocator.mt.overview">Overview</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.tune">Tunable Parameters</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.init">Initialization</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.deallocation">Deallocation Notes</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_ex_single.html">Single Thread Example</a></span></dt><dt><span class="section"><a href="mt_allocator_ex_multi.html">Multiple Thread Example</a></span></dt></dl></dd><dt><span class="chapter"><a href="bitmap_allocator.html">21. The bitmap_allocator</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator.html#allocator.bitmap.design">Design</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.free_list_store">Free List Store</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block">Super Block</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block_data">Super Block Data Layout</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.max_wasted">Maximum Wasted Percentage</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.allocate"><code class="function">allocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.deallocate"><code class="function">deallocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.questions">Questions</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.1">1</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.2">2</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.3">3</a></span></dt></dl></dd><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.locality">Locality</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.grow_policy">Overhead and Grow Policy</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="policy_data_structures.html">22. Policy-Based Data Structures</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues">Performance Issues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.associative">Associative</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.priority_queue">Priority Que</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation">Goals</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.associative">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.iterators">Iterators</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.functions">Functional</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.priority_queue">Priority Queues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.binary_heap">Binary Heaps</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="section"><a href="policy_data_structures_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.organization">Organization</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial">Tutorial</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.basic">Basic Use</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.configuring">

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Configuring via Template Parameters

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</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.traits">

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_semantics.html" title="Semantics" /><link rel="next" href="debug_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.using"></a>Using</h2></div></div></div><p>

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_semantics.html" title="Semantics" /><link rel="next" href="debug_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.using"></a>Using</h2></div></div></div><p>

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</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="debug_mode.using.mode"></a>Using the Debug Mode</h3></div></div></div><p>To use the libstdc++ debug mode, compile your application with the

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compiler flag <code class="code">-D_GLIBCXX_DEBUG</code>. Note that this flag

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changes the sizes and behavior of standard class templates such

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@@ -18,6 +18,6 @@

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mode or with debug mode. The

2905

following table provides the names and headers of the debugging

2906

containers:

2907

-</p><div class="table"><a id="idp16490400"></a><p class="title"><strong>Table 17.1. Debugging Containers</strong></p><div class="table-contents"><table summary="Debugging Containers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::bitset</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="classname">__gnu_debug::bitset</code></td><td align="left"><code class="filename"><debug/bitset></code></td></tr><tr><td align="left"><code class="classname">std::deque</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="classname">__gnu_debug::deque</code></td><td align="left"><code class="filename"><debug/deque></code></td></tr><tr><td align="left"><code class="classname">std::list</code></td><td align="left"><code class="filename">list</code></td><td align="left"><code class="classname">__gnu_debug::list</code></td><td align="left"><code class="filename"><debug/list></code></td></tr><tr><td align="left"><code class="classname">std::map</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::map</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multimap</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::multimap</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multiset</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::multiset</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::set</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::set</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::wstring</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::wstring</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::basic_string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::basic_string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::vector</code></td><td align="left"><code class="filename">vector</code></td><td align="left"><code class="classname">__gnu_debug::vector</code></td><td align="left"><code class="filename"><debug/vector></code></td></tr></tbody></table></div></div><br class="table-break" /><p>In addition, when compiling in C++11 mode, these additional

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+</p><div class="table"><a id="idm269999040896"></a><p class="title"><strong>Table 17.1. Debugging Containers</strong></p><div class="table-contents"><table summary="Debugging Containers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::bitset</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="classname">__gnu_debug::bitset</code></td><td align="left"><code class="filename"><debug/bitset></code></td></tr><tr><td align="left"><code class="classname">std::deque</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="classname">__gnu_debug::deque</code></td><td align="left"><code class="filename"><debug/deque></code></td></tr><tr><td align="left"><code class="classname">std::list</code></td><td align="left"><code class="filename">list</code></td><td align="left"><code class="classname">__gnu_debug::list</code></td><td align="left"><code class="filename"><debug/list></code></td></tr><tr><td align="left"><code class="classname">std::map</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::map</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multimap</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::multimap</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multiset</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::multiset</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::set</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::set</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::wstring</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::wstring</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::basic_string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::basic_string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::vector</code></td><td align="left"><code class="filename">vector</code></td><td align="left"><code class="classname">__gnu_debug::vector</code></td><td align="left"><code class="filename"><debug/vector></code></td></tr></tbody></table></div></div><br class="table-break" /><p>In addition, when compiling in C++11 mode, these additional

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containers have additional debug capability.

2910

-</p><div class="table"><a id="idp16535296"></a><p class="title"><strong>Table 17.2. Debugging Containers C++11</strong></p><div class="table-contents"><table summary="Debugging Containers C++11" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::unordered_map</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_map</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multimap</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multimap</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_set</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_set</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multiset</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multiset</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="debug_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

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\ No newline at end of file

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+</p><div class="table"><a id="idm269998996000"></a><p class="title"><strong>Table 17.2. Debugging Containers C++11</strong></p><div class="table-contents"><table summary="Debugging Containers C++11" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::unordered_map</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_map</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multimap</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multimap</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_set</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_set</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multiset</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multiset</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="debug_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 18. Parallel Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="debug_mode_design.html" title="Design" /><link rel="next" href="parallel_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 18. Parallel Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_design.html">Prev</a> </td><th width="60%" align="center">Part III.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 18. Parallel Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="debug_mode_design.html" title="Design" /><link rel="next" href="parallel_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 18. Parallel Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_design.html">Prev</a> </td><th width="60%" align="center">Part III.

2922

Extensions

2923

2924

-</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.parallel_mode"></a>Chapter 18. Parallel Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="parallel_mode.html#manual.ext.parallel_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="parallel_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.prereq_flags">Prerequisite Compiler Flags</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.parallel_mode">Using Parallel Mode</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.specific">Using Specific Parallel Components</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.intro">Interface Basics</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning">Configuration and Tuning</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.omp">Setting up the OpenMP Environment</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.compile">Compile Time Switches</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.settings">Run Time Settings and Defaults</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.impl">Implementation Namespaces</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_test.html">Testing</a></span></dt><dt><span class="bibliography"><a href="parallel_mode.html#parallel_mode.biblio">Bibliography</a></span></dt></dl></div><p> The libstdc++ parallel mode is an experimental parallel

2925

+</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.parallel_mode"></a>Chapter 18. Parallel Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="parallel_mode.html#manual.ext.parallel_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="parallel_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.prereq_flags">Prerequisite Compiler Flags</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.parallel_mode">Using Parallel Mode</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.specific">Using Specific Parallel Components</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.intro">Interface Basics</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning">Configuration and Tuning</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.omp">Setting up the OpenMP Environment</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.compile">Compile Time Switches</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.settings">Run Time Settings and Defaults</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.impl">Implementation Namespaces</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_test.html">Testing</a></span></dt><dt><span class="bibliography"><a href="parallel_mode.html#parallel_mode.biblio">Bibliography</a></span></dt></dl></div><p> The libstdc++ parallel mode is an experimental parallel

2926

implementation of many algorithms the C++ Standard Library.

2927

</p><p>

2928

Several of the standard algorithms, for instance

2929

@@ -12,11 +12,11 @@

2930

specific compiler flag.

2931

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.intro"></a>Intro</h2></div></div></div><p>The following library components in the include

2932

<code class="filename">numeric</code> are included in the parallel mode:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><code class="function">std::accumulate</code></p></li><li class="listitem"><p><code class="function">std::adjacent_difference</code></p></li><li class="listitem"><p><code class="function">std::inner_product</code></p></li><li class="listitem"><p><code class="function">std::partial_sum</code></p></li></ul></div><p>The following library components in the include

2933

-<code class="filename">algorithm</code> are included in the parallel mode:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><code class="function">std::adjacent_find</code></p></li><li class="listitem"><p><code class="function">std::count</code></p></li><li class="listitem"><p><code class="function">std::count_if</code></p></li><li class="listitem"><p><code class="function">std::equal</code></p></li><li class="listitem"><p><code class="function">std::find</code></p></li><li class="listitem"><p><code class="function">std::find_if</code></p></li><li class="listitem"><p><code class="function">std::find_first_of</code></p></li><li class="listitem"><p><code class="function">std::for_each</code></p></li><li class="listitem"><p><code class="function">std::generate</code></p></li><li class="listitem"><p><code class="function">std::generate_n</code></p></li><li class="listitem"><p><code class="function">std::lexicographical_compare</code></p></li><li class="listitem"><p><code class="function">std::mismatch</code></p></li><li class="listitem"><p><code class="function">std::search</code></p></li><li class="listitem"><p><code class="function">std::search_n</code></p></li><li class="listitem"><p><code class="function">std::transform</code></p></li><li class="listitem"><p><code class="function">std::replace</code></p></li><li class="listitem"><p><code class="function">std::replace_if</code></p></li><li class="listitem"><p><code class="function">std::max_element</code></p></li><li class="listitem"><p><code class="function">std::merge</code></p></li><li class="listitem"><p><code class="function">std::min_element</code></p></li><li class="listitem"><p><code class="function">std::nth_element</code></p></li><li class="listitem"><p><code class="function">std::partial_sort</code></p></li><li class="listitem"><p><code class="function">std::partition</code></p></li><li class="listitem"><p><code class="function">std::random_shuffle</code></p></li><li class="listitem"><p><code class="function">std::set_union</code></p></li><li class="listitem"><p><code class="function">std::set_intersection</code></p></li><li class="listitem"><p><code class="function">std::set_symmetric_difference</code></p></li><li class="listitem"><p><code class="function">std::set_difference</code></p></li><li class="listitem"><p><code class="function">std::sort</code></p></li><li class="listitem"><p><code class="function">std::stable_sort</code></p></li><li class="listitem"><p><code class="function">std::unique_copy</code></p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="parallel_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idp16926864"></a><p><span class="citetitle"><em class="citetitle">

2934

+<code class="filename">algorithm</code> are included in the parallel mode:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><code class="function">std::adjacent_find</code></p></li><li class="listitem"><p><code class="function">std::count</code></p></li><li class="listitem"><p><code class="function">std::count_if</code></p></li><li class="listitem"><p><code class="function">std::equal</code></p></li><li class="listitem"><p><code class="function">std::find</code></p></li><li class="listitem"><p><code class="function">std::find_if</code></p></li><li class="listitem"><p><code class="function">std::find_first_of</code></p></li><li class="listitem"><p><code class="function">std::for_each</code></p></li><li class="listitem"><p><code class="function">std::generate</code></p></li><li class="listitem"><p><code class="function">std::generate_n</code></p></li><li class="listitem"><p><code class="function">std::lexicographical_compare</code></p></li><li class="listitem"><p><code class="function">std::mismatch</code></p></li><li class="listitem"><p><code class="function">std::search</code></p></li><li class="listitem"><p><code class="function">std::search_n</code></p></li><li class="listitem"><p><code class="function">std::transform</code></p></li><li class="listitem"><p><code class="function">std::replace</code></p></li><li class="listitem"><p><code class="function">std::replace_if</code></p></li><li class="listitem"><p><code class="function">std::max_element</code></p></li><li class="listitem"><p><code class="function">std::merge</code></p></li><li class="listitem"><p><code class="function">std::min_element</code></p></li><li class="listitem"><p><code class="function">std::nth_element</code></p></li><li class="listitem"><p><code class="function">std::partial_sort</code></p></li><li class="listitem"><p><code class="function">std::partition</code></p></li><li class="listitem"><p><code class="function">std::random_shuffle</code></p></li><li class="listitem"><p><code class="function">std::set_union</code></p></li><li class="listitem"><p><code class="function">std::set_intersection</code></p></li><li class="listitem"><p><code class="function">std::set_symmetric_difference</code></p></li><li class="listitem"><p><code class="function">std::set_difference</code></p></li><li class="listitem"><p><code class="function">std::sort</code></p></li><li class="listitem"><p><code class="function">std::stable_sort</code></p></li><li class="listitem"><p><code class="function">std::unique_copy</code></p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="parallel_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idm269998604464"></a><p><span class="citetitle"><em class="citetitle">

2935

Parallelization of Bulk Operations for STL Dictionaries

2936

</em>. </span><span class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span>. </span><span class="author"><span class="firstname">Leonor</span> <span class="surname">Frias</span>. </span><span class="copyright">Copyright © 2007 . </span><span class="publisher"><span class="publishername">

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Workshop on Highly Parallel Processing on a Chip (HPPC) 2007. (LNCS)

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- . </span></span></p></div><div class="biblioentry"><a id="idp16931936"></a><p><span class="citetitle"><em class="citetitle">

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+ . </span></span></p></div><div class="biblioentry"><a id="idm269998599392"></a><p><span class="citetitle"><em class="citetitle">

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The Multi-Core Standard Template Library

2941

</em>. </span><span class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span>. </span><span class="author"><span class="firstname">Peter</span> <span class="surname">Sanders</span>. </span><span class="author"><span class="firstname">Felix</span> <span class="surname">Putze</span>. </span><span class="copyright">Copyright © 2007 . </span><span class="publisher"><span class="publishername">

2942

Euro-Par 2007: Parallel Processing. (LNCS 4641)

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Semantics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="next" href="debug_mode_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Semantics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.semantics"></a>Semantics</h2></div></div></div><p>

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Semantics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="next" href="debug_mode_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Semantics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.semantics"></a>Semantics</h2></div></div></div><p>

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</p><p>A program that uses the C++ standard library correctly

2952

will maintain the same semantics under debug mode as it had with

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the normal (release) library. All functional and exception-handling

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 2. Setup</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="bugs.html" title="Bugs" /><link rel="next" href="configure.html" title="Configure" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 2. Setup</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bugs.html">Prev</a> </td><th width="60%" align="center">Part I.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 2. Setup</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="bugs.html" title="Bugs" /><link rel="next" href="configure.html" title="Configure" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 2. Setup</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bugs.html">Prev</a> </td><th width="60%" align="center">Part I.

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Introduction

2963

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-</th><td width="20%" align="right"> <a accesskey="n" href="configure.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.setup"></a>Chapter 2. Setup</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></div><p>To transform libstdc++ sources into installed include files

2965

+</th><td width="20%" align="right"> <a accesskey="n" href="configure.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.setup"></a>Chapter 2. Setup</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></div><p>To transform libstdc++ sources into installed include files

2966

and properly built binaries useful for linking to other software is

2967

a multi-step process. Steps include getting the sources,

2968

configuring and building the sources, testing, and installation.

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===================================================================

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Backwards Compatibility</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, backwards" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="api.html" title="API Evolution and Deprecation History" /><link rel="next" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Backwards Compatibility</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center">Appendix B.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Backwards Compatibility</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, backwards" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="api.html" title="API Evolution and Deprecation History" /><link rel="next" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Backwards Compatibility</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center">Appendix B.

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Porting and Maintenance

2978

2979

</th><td width="20%" align="right"> <a accesskey="n" href="appendix_free.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.appendix.porting.backwards"></a>Backwards Compatibility</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="backwards.first"></a>First</h3></div></div></div><p>The first generation GNU C++ library was called libg++. It was a

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This is a change in behavior from older versions. Now, most

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<span class="type">iterator_type</span> typedefs in container classes are POD

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objects, not <span class="type">value_type</span> pointers.

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-</p></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="backwards.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idp23415104"></a><p><span class="title"><em>

2985

+</p></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="backwards.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idm269992117648"></a><p><span class="title"><em>

2986

2987

Migrating to GCC 4.1

2988

</a>

2989

- </em>. </span><span class="author"><span class="firstname">Dan</span> <span class="surname">Kegel</span>. </span></p></div><div class="biblioentry"><a id="idp23417888"></a><p><span class="title"><em>

2990

+ </em>. </span><span class="author"><span class="firstname">Dan</span> <span class="surname">Kegel</span>. </span></p></div><div class="biblioentry"><a id="idm269992114864"></a><p><span class="title"><em>

2991

2992

Building the Whole Debian Archive with GCC 4.1: A Summary

2993

</a>

2994

- </em>. </span><span class="author"><span class="firstname">Martin</span> <span class="surname">Michlmayr</span>. </span></p></div><div class="biblioentry"><a id="idp23420736"></a><p><span class="title"><em>

2995

+ </em>. </span><span class="author"><span class="firstname">Martin</span> <span class="surname">Michlmayr</span>. </span></p></div><div class="biblioentry"><a id="idm269992112016"></a><p><span class="title"><em>

2996

2997

Migration guide for GCC-3.2

2998

</a>

2999

Index: libstdc++-v3/doc/html/manual/source_design_notes.html

3000

===================================================================

3001

--- a/src/libstdc++-v3/doc/html/manual/source_design_notes.html (.../tags/gcc_4_8_2_release)

3002

+++ b/src/libstdc++-v3/doc/html/manual/source_design_notes.html (.../branches/gcc-4_8-branch)

3003

@@ -1,5 +1,5 @@

3004

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3005

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Notes</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_code_style.html" title="Coding Style" /><link rel="next" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Notes</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_code_style.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3006

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Notes</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_code_style.html" title="Coding Style" /><link rel="next" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Notes</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_code_style.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3007

Contributing

3008

3009

</th><td width="20%" align="right"> <a accesskey="n" href="appendix_porting.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="contrib.design_notes"></a>Design Notes</h2></div></div></div><p>

3010

Index: libstdc++-v3/doc/html/manual/ext_sgi.html

3011

===================================================================

3012

--- a/src/libstdc++-v3/doc/html/manual/ext_sgi.html (.../tags/gcc_4_8_2_release)

3013

+++ b/src/libstdc++-v3/doc/html/manual/ext_sgi.html (.../branches/gcc-4_8-branch)

3014

@@ -1,5 +1,5 @@

3015

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3016

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Deprecated</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="prev" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="next" href="ext_utilities.html" title="Chapter 24. Utilities" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Deprecated</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_containers.html">Prev</a> </td><th width="60%" align="center">Chapter 23. HP/SGI Extensions</th><td width="20%" align="right"> <a accesskey="n" href="ext_utilities.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.deprecated_sgi"></a>Deprecated</h2></div></div></div><p>

3017

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Deprecated</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="prev" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="next" href="ext_utilities.html" title="Chapter 24. Utilities" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Deprecated</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_containers.html">Prev</a> </td><th width="60%" align="center">Chapter 23. HP/SGI Extensions</th><td width="20%" align="right"> <a accesskey="n" href="ext_utilities.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.deprecated_sgi"></a>Deprecated</h2></div></div></div><p>

3018

The SGI hashing classes <code class="classname">hash_set</code> and

3019

<code class="classname">hash_set</code> have been deprecated by the

3020

unordered_set, unordered_multiset, unordered_map,

3021

Index: libstdc++-v3/doc/html/manual/facets.html

3022

===================================================================

3023

--- a/src/libstdc++-v3/doc/html/manual/facets.html (.../tags/gcc_4_8_2_release)

3024

+++ b/src/libstdc++-v3/doc/html/manual/facets.html (.../branches/gcc-4_8-branch)

3025

@@ -1,8 +1,8 @@

3026

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3027

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Facets</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="localization.html" title="Chapter 8. Localization" /><link rel="prev" href="localization.html" title="Chapter 8. Localization" /><link rel="next" href="containers.html" title="Chapter 9. Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Facets</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="localization.html">Prev</a> </td><th width="60%" align="center">Chapter 8.

3028

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Facets</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="localization.html" title="Chapter 8. Localization" /><link rel="prev" href="localization.html" title="Chapter 8. Localization" /><link rel="next" href="containers.html" title="Chapter 9. Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Facets</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="localization.html">Prev</a> </td><th width="60%" align="center">Chapter 8.

3029

Localization

3030

3031

-</th><td width="20%" align="right"> <a accesskey="n" href="containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.facet"></a>Facets</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.facet.ctype"></a>ctype</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15778336"></a>Specializations</h5></div></div></div><p>

3032

+</th><td width="20%" align="right"> <a accesskey="n" href="containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.facet"></a>Facets</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.facet.ctype"></a>ctype</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999753024"></a>Specializations</h5></div></div></div><p>

3033

For the required specialization codecvt<wchar_t, char, mbstate_t> ,

3034

conversions are made between the internal character set (always UCS4

3035

on GNU/Linux) and whatever the currently selected locale for the

3036

@@ -49,24 +49,24 @@

3037

</p></li><li class="listitem"><p>

3038

Rename abstract base class. See if just smash-overriding is a

3039

better approach. Clarify, add sanity to naming.

3040

- </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15793392"></a><p><span class="citetitle"><em class="citetitle">

3041

+ </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999738032"></a><p><span class="citetitle"><em class="citetitle">

3042

The GNU C Library

3043

- </em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">Chapters 6 Character Set Handling and 7 Locales and Internationalization. </span></p></div><div class="biblioentry"><a id="idp15798144"></a><p><span class="citetitle"><em class="citetitle">

3044

+ </em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">Chapters 6 Character Set Handling and 7 Locales and Internationalization. </span></p></div><div class="biblioentry"><a id="idm269999733280"></a><p><span class="citetitle"><em class="citetitle">

3045

Correspondence

3046

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp15801232"></a><p><span class="citetitle"><em class="citetitle">

3047

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999730192"></a><p><span class="citetitle"><em class="citetitle">

3048

ISO/IEC 14882:1998 Programming languages - C++

3049

3050

3051

ISO/IEC 9899:1999 Programming languages - C

3052

3053

3054

3055

The Open Group Base Specifications, Issue 6 (IEEE Std. 1003.1-2004)

3056

</a>

3057

3058

- The Open Group/The Institute of Electrical and Electronics Engineers, Inc.. </span></p></div><div class="biblioentry"><a id="idp15809040"></a><p><span class="citetitle"><em class="citetitle">

3059

+ The Open Group/The Institute of Electrical and Electronics Engineers, Inc.. </span></p></div><div class="biblioentry"><a id="idm269999722384"></a><p><span class="citetitle"><em class="citetitle">

3060

The C++ Programming Language, Special Edition

3061

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3062

Addison Wesley

3063

- . </span></span></p></div><div class="biblioentry"><a id="idp15813664"></a><p><span class="citetitle"><em class="citetitle">

3064

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999717760"></a><p><span class="citetitle"><em class="citetitle">

3065

Standard C++ IOStreams and Locales

3066

</em>. </span><span class="subtitle">

3067

Advanced Programmer's Guide and Reference

3068

@@ -409,17 +409,17 @@

3069

</p></li><li class="listitem"><p>

3070

wchar_t/char internal buffers and conversions between

3071

internal/external buffers?

3072

- </p></li></ul></div></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.codecvt.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15891136"></a><p><span class="citetitle"><em class="citetitle">

3073

+ </p></li></ul></div></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.codecvt.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999640080"></a><p><span class="citetitle"><em class="citetitle">

3074

The GNU C Library

3075

</em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">

3076

Chapters 6 Character Set Handling and 7 Locales and Internationalization

3077

- . </span></p></div><div class="biblioentry"><a id="idp15895888"></a><p><span class="citetitle"><em class="citetitle">

3078

+ . </span></p></div><div class="biblioentry"><a id="idm269999635328"></a><p><span class="citetitle"><em class="citetitle">

3079

Correspondence

3080

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp15898976"></a><p><span class="citetitle"><em class="citetitle">

3081

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999632240"></a><p><span class="citetitle"><em class="citetitle">

3082

ISO/IEC 14882:1998 Programming languages - C++

3083

3084

3085

ISO/IEC 9899:1999 Programming languages - C

3086

3087

3088

3089

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

3090

</a>

3091

@@ -426,25 +426,25 @@

3092

3093

The Open Group/The Institute of Electrical and Electronics

3094

Engineers, Inc.

3095

- . </span></p></div><div class="biblioentry"><a id="idp15906768"></a><p><span class="citetitle"><em class="citetitle">

3096

+ . </span></p></div><div class="biblioentry"><a id="idm269999624448"></a><p><span class="citetitle"><em class="citetitle">

3097

The C++ Programming Language, Special Edition

3098

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3099

Addison Wesley

3100

- . </span></span></p></div><div class="biblioentry"><a id="idp15911392"></a><p><span class="citetitle"><em class="citetitle">

3101

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999619824"></a><p><span class="citetitle"><em class="citetitle">

3102

Standard C++ IOStreams and Locales

3103

</em>. </span><span class="subtitle">

3104

Advanced Programmer's Guide and Reference

3105

. </span><span class="author"><span class="firstname">Angelika</span> <span class="surname">Langer</span>. </span><span class="author"><span class="firstname">Klaus</span> <span class="surname">Kreft</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley Longman, Inc.. </span><span class="publisher"><span class="publishername">

3106

Addison Wesley Longman

3107

- . </span></span></p></div><div class="biblioentry"><a id="idp15917056"></a><p><span class="title"><em>

3108

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999614160"></a><p><span class="title"><em>

3109

3110

A brief description of Normative Addendum 1

3111

</a>

3112

- </em>. </span><span class="author"><span class="firstname">Clive</span> <span class="surname">Feather</span>. </span><span class="pagenums">Extended Character Sets. </span></p></div><div class="biblioentry"><a id="idp15920304"></a><p><span class="title"><em>

3113

+ </em>. </span><span class="author"><span class="firstname">Clive</span> <span class="surname">Feather</span>. </span><span class="pagenums">Extended Character Sets. </span></p></div><div class="biblioentry"><a id="idm269999610912"></a><p><span class="title"><em>

3114

3115

The Unicode HOWTO

3116

</a>

3117

- </em>. </span><span class="author"><span class="firstname">Bruno</span> <span class="surname">Haible</span>. </span></p></div><div class="biblioentry"><a id="idp15923088"></a><p><span class="title"><em>

3118

+ </em>. </span><span class="author"><span class="firstname">Bruno</span> <span class="surname">Haible</span>. </span></p></div><div class="biblioentry"><a id="idm269999608128"></a><p><span class="title"><em>

3119

3120

UTF-8 and Unicode FAQ for Unix/Linux

3121

</a>

3122

@@ -690,16 +690,16 @@

3123

model. As of this writing, it is unknown how to query to see

3124

if a specified message catalog exists using the gettext

3125

package.

3126

- </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.messages.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp16003632"></a><p><span class="citetitle"><em class="citetitle">

3127

+ </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.messages.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999527584"></a><p><span class="citetitle"><em class="citetitle">

3128

The GNU C Library

3129

</em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">Chapters 6 Character Set Handling, and 7 Locales and Internationalization

3130

- . </span></p></div><div class="biblioentry"><a id="idp16008384"></a><p><span class="citetitle"><em class="citetitle">

3131

+ . </span></p></div><div class="biblioentry"><a id="idm269999522832"></a><p><span class="citetitle"><em class="citetitle">

3132

Correspondence

3133

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp16011472"></a><p><span class="citetitle"><em class="citetitle">

3134

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999519744"></a><p><span class="citetitle"><em class="citetitle">

3135

ISO/IEC 14882:1998 Programming languages - C++

3136

3137

3138

ISO/IEC 9899:1999 Programming languages - C

3139

3140

3141

3142

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

3143

</a>

3144

@@ -706,23 +706,23 @@

3145

3146

The Open Group/The Institute of Electrical and Electronics

3147

Engineers, Inc.

3148

- . </span></p></div><div class="biblioentry"><a id="idp16019264"></a><p><span class="citetitle"><em class="citetitle">

3149

+ . </span></p></div><div class="biblioentry"><a id="idm269999511952"></a><p><span class="citetitle"><em class="citetitle">

3150

The C++ Programming Language, Special Edition

3151

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3152

Addison Wesley

3153

- . </span></span></p></div><div class="biblioentry"><a id="idp16023888"></a><p><span class="citetitle"><em class="citetitle">

3154

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999507328"></a><p><span class="citetitle"><em class="citetitle">

3155

Standard C++ IOStreams and Locales

3156

</em>. </span><span class="subtitle">

3157

Advanced Programmer's Guide and Reference

3158

. </span><span class="author"><span class="firstname">Angelika</span> <span class="surname">Langer</span>. </span><span class="author"><span class="firstname">Klaus</span> <span class="surname">Kreft</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley Longman, Inc.. </span><span class="publisher"><span class="publishername">

3159

Addison Wesley Longman

3160

- . </span></span></p></div><div class="biblioentry"><a id="idp16029552"></a><p><span class="title"><em>

3161

- <a class="link" href="http://java.sun.com/reference/api/index.html" target="_top">

3162

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999501664"></a><p><span class="title"><em>

3163

+ <a class="link" href="http://www.oracle.com/technetwork/java/api/index.html" target="_top">

3164

API Specifications, Java Platform

3165

</a>

3166

</em>. </span><span class="pagenums">java.util.Properties, java.text.MessageFormat,

3167

java.util.Locale, java.util.ResourceBundle

3168

- . </span></p></div><div class="biblioentry"><a id="idp16031888"></a><p><span class="title"><em>

3169

+ . </span></p></div><div class="biblioentry"><a id="idm269999499328"></a><p><span class="title"><em>

3170

3171

GNU gettext tools, version 0.10.38, Native Language Support

3172

Library and Tools.

3173

Index: libstdc++-v3/doc/html/manual/diagnostics.html

3174

===================================================================

3175

--- a/src/libstdc++-v3/doc/html/manual/diagnostics.html (.../tags/gcc_4_8_2_release)

3176

+++ b/src/libstdc++-v3/doc/html/manual/diagnostics.html (.../branches/gcc-4_8-branch)

3177

@@ -1,5 +1,5 @@

3178

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3179

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 5. Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="termination.html" title="Termination" /><link rel="next" href="concept_checking.html" title="Concept Checking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 5.

3180

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 5. Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="termination.html" title="Termination" /><link rel="next" href="concept_checking.html" title="Concept Checking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 5.

3181

Diagnostics

3182

3183

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="termination.html">Prev</a> </td><th width="60%" align="center">Part II.

3184

@@ -6,8 +6,8 @@

3185

Standard Contents

3186

</th><td width="20%" align="right"> <a accesskey="n" href="concept_checking.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.diagnostics"></a>Chapter 5.

3187

Diagnostics

3188

- <a id="idp13835248" class="indexterm"></a>

3189

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="concept_checking.html">Concept Checking</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.diagnostics.exceptions"></a>Exceptions</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.diagnostics.exceptions.api"></a>API Reference</h3></div></div></div><p>

3190

+ <a id="idm270001697504" class="indexterm"></a>

3191

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="concept_checking.html">Concept Checking</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.diagnostics.exceptions"></a>Exceptions</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.diagnostics.exceptions.api"></a>API Reference</h3></div></div></div><p>

3192

All exception objects are defined in one of the standard header

3193

files: <code class="filename">exception</code>,

3194

<code class="filename">stdexcept</code>, <code class="filename">new</code>, and

3195

Index: libstdc++-v3/doc/html/manual/mt_allocator_design.html

3196

===================================================================

3197

--- a/src/libstdc++-v3/doc/html/manual/mt_allocator_design.html (.../tags/gcc_4_8_2_release)

3198

+++ b/src/libstdc++-v3/doc/html/manual/mt_allocator_design.html (.../branches/gcc-4_8-branch)

3199

@@ -1,5 +1,5 @@

3200

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3201

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Issues</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="next" href="mt_allocator_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Issues</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.design_issues"></a>Design Issues</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.overview"></a>Overview</h3></div></div></div><p> There are three general components to the allocator: a datum

3202

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Issues</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="next" href="mt_allocator_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Issues</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.design_issues"></a>Design Issues</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.overview"></a>Overview</h3></div></div></div><p> There are three general components to the allocator: a datum

3203

describing the characteristics of the memory pool, a policy class

3204

containing this pool that links instantiation types to common or

3205

individual pools, and a class inheriting from the policy class that is

3206

Index: libstdc++-v3/doc/html/manual/appendix_free.html

3207

===================================================================

3208

--- a/src/libstdc++-v3/doc/html/manual/appendix_free.html (.../tags/gcc_4_8_2_release)

3209

+++ b/src/libstdc++-v3/doc/html/manual/appendix_free.html (.../branches/gcc-4_8-branch)

3210

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3211

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3212

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix C. Free Software Needs Free Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="backwards.html" title="Backwards Compatibility" /><link rel="next" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix C.

3213

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix C. Free Software Needs Free Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="backwards.html" title="Backwards Compatibility" /><link rel="next" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix C.

3214

Free Software Needs Free Documentation

3215

3216

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="backwards.html">Prev</a> </td><th width="60%" align="center">Part IV.

3217

@@ -6,7 +6,7 @@

3218

Appendices

3219

</th><td width="20%" align="right"> <a accesskey="n" href="appendix_gpl.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.free"></a>

3220

Free Software Needs Free Documentation

3221

- <a id="idp23426192" class="indexterm"></a>

3222

+ <a id="idm269992106560" class="indexterm"></a>

3223

</h1></div></div></div><p>

3224

The biggest deficiency in free operating systems is not in the

3225

software--it is the lack of good free manuals that we can include in

3226

Index: libstdc++-v3/doc/html/manual/algorithms.html

3227

===================================================================

3228

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3229

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3230

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3231

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3232

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3233

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 11. Algorithms</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library, algorithm" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="iterators.html" title="Chapter 10. Iterators" /><link rel="next" href="numerics.html" title="Chapter 12. Numerics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 11.

3234

Algorithms

3235

3236

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="iterators.html">Prev</a> </td><th width="60%" align="center">Part II.

3237

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3238

Standard Contents

3239

</th><td width="20%" align="right"> <a accesskey="n" href="numerics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.algorithms"></a>Chapter 11.

3240

Algorithms

3241

- <a id="idp16191968" class="indexterm"></a>

3242

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="algorithms.html#std.algorithms.mutating">Mutating</a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.mutating.swap"><code class="function">swap</code></a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.swap.specializations">Specializations</a></span></dt></dl></dd></dl></dd></dl></div><p>

3243

+ <a id="idm269999339120" class="indexterm"></a>

3244

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="algorithms.html#std.algorithms.mutating">Mutating</a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.mutating.swap"><code class="function">swap</code></a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.swap.specializations">Specializations</a></span></dt></dl></dd></dl></dd></dl></div><p>

3245

The neatest accomplishment of the algorithms section is that all the

3246

work is done via iterators, not containers directly. This means two

3247

important things:

3248

Index: libstdc++-v3/doc/html/manual/appendix_porting.html

3249

===================================================================

3250

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3251

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3252

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3253

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3254

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3255

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix B. Porting and Maintenance</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="source_design_notes.html" title="Design Notes" /><link rel="next" href="documentation_hacking.html" title="Writing and Generating Documentation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix B.

3256

Porting and Maintenance

3257

3258

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_design_notes.html">Prev</a> </td><th width="60%" align="center">Part IV.

3259

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3260

Appendices

3261

</th><td width="20%" align="right"> <a accesskey="n" href="documentation_hacking.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.porting"></a>

3262

Porting and Maintenance

3263

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3264

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="appendix_porting.html#appendix.porting.build_hacking">Configure and Build Hacking</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview">Overview</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.basic">General Process</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.map">What Comes from Where</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure">Configure</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.scripts">Storing Information in non-AC files (like configure.host)</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.conventions">Coding and Commenting Conventions</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.acinclude">The acinclude.m4 layout</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.enable"><code class="constant">GLIBCXX_ENABLE</code>, the <code class="literal">--enable</code> maker</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.make">Make</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html">Writing and Generating Documentation</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doc.intro">Introduction</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.generation">Generating Documentation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.doxygen">Doxygen</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doxygen.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.rules">Generating the Doxygen Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.markup">Markup</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html#doc.docbook">Docbook</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#docbook.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.rules">Generating the DocBook Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.validation">Editing and Validation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.examples">File Organization and Basics</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.markup">Markup By Example</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="internals.html">Porting to New Hardware or Operating Systems</a></span></dt><dd><dl><dt><span class="section"><a href="internals.html#internals.os">Operating System</a></span></dt><dt><span class="section"><a href="internals.html#internals.cpu">CPU</a></span></dt><dt><span class="section"><a href="internals.html#internals.char_types">Character Types</a></span></dt><dt><span class="section"><a href="internals.html#internals.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="internals.html#internals.numeric_limits">Numeric Limits</a></span></dt><dt><span class="section"><a href="internals.html#internals.libtool">Libtool</a></span></dt></dl></dd><dt><span class="section"><a href="test.html">Test</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization">Organization</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization.layout">Directory Layout</a></span></dt><dt><span class="section"><a href="test.html#test.organization.naming">Naming Conventions</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.run">Running the Testsuite</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.run.basic">Basic</a></span></dt><dt><span class="section"><a href="test.html#test.run.variations">Variations</a></span></dt><dt><span class="section"><a href="test.html#test.run.permutations">Permutations</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.new_tests">Writing a new test case</a></span></dt><dt><span class="section"><a href="test.html#test.harness">Test Harness and Utilities</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.harness.dejagnu">Dejagnu Harness Details</a></span></dt><dt><span class="section"><a href="test.html#test.harness.utils">Utilities</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.special">Special Topics</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.exception.safety">

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+ <a id="idm269993523968" class="indexterm"></a>

3266

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="appendix_porting.html#appendix.porting.build_hacking">Configure and Build Hacking</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview">Overview</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.basic">General Process</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.map">What Comes from Where</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure">Configure</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.scripts">Storing Information in non-AC files (like configure.host)</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.conventions">Coding and Commenting Conventions</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.acinclude">The acinclude.m4 layout</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.enable"><code class="constant">GLIBCXX_ENABLE</code>, the <code class="literal">--enable</code> maker</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.make">Make</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html">Writing and Generating Documentation</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doc.intro">Introduction</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.generation">Generating Documentation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.doxygen">Doxygen</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doxygen.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.rules">Generating the Doxygen Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.markup">Markup</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html#doc.docbook">Docbook</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#docbook.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.rules">Generating the DocBook Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.validation">Editing and Validation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.examples">File Organization and Basics</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.markup">Markup By Example</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="internals.html">Porting to New Hardware or Operating Systems</a></span></dt><dd><dl><dt><span class="section"><a href="internals.html#internals.os">Operating System</a></span></dt><dt><span class="section"><a href="internals.html#internals.cpu">CPU</a></span></dt><dt><span class="section"><a href="internals.html#internals.char_types">Character Types</a></span></dt><dt><span class="section"><a href="internals.html#internals.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="internals.html#internals.numeric_limits">Numeric Limits</a></span></dt><dt><span class="section"><a href="internals.html#internals.libtool">Libtool</a></span></dt></dl></dd><dt><span class="section"><a href="test.html">Test</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization">Organization</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization.layout">Directory Layout</a></span></dt><dt><span class="section"><a href="test.html#test.organization.naming">Naming Conventions</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.run">Running the Testsuite</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.run.basic">Basic</a></span></dt><dt><span class="section"><a href="test.html#test.run.variations">Variations</a></span></dt><dt><span class="section"><a href="test.html#test.run.permutations">Permutations</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.new_tests">Writing a new test case</a></span></dt><dt><span class="section"><a href="test.html#test.harness">Test Harness and Utilities</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.harness.dejagnu">Dejagnu Harness Details</a></span></dt><dt><span class="section"><a href="test.html#test.harness.utils">Utilities</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.special">Special Topics</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.exception.safety">

3267

Qualifying Exception Safety Guarantees

3268

3269

</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.exception.safety.overview">Overview</a></span></dt><dt><span class="section"><a href="test.html#test.exception.safety.status">

3270

@@ -61,7 +61,7 @@

3271

in the build directory starts the build process. The <code class="literal">all</code> target comes from the <code class="filename">Makefile</code> file, which is generated via <span class="command"><strong>configure</strong></span> from the <code class="filename">Makefile.in</code> file, which is in turn generated (via

3272

<span class="command"><strong>automake</strong></span>) from the file

3273

<code class="filename">Makefile.am</code>.

3274

-</p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="build_hacking.overview.map"></a>What Comes from Where</h4></div></div></div><div class="figure"><a id="idp22035648"></a><p class="title"><strong>Figure B.1. Configure and Build File Dependencies</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/confdeps.png" align="middle" alt="Dependency Graph for Configure and Build Files" /></div></div></div><br class="figure-break" /><p>

3275

+</p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="build_hacking.overview.map"></a>What Comes from Where</h4></div></div></div><div class="figure"><a id="idm269993497120"></a><p class="title"><strong>Figure B.1. Configure and Build File Dependencies</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/confdeps.png" align="middle" alt="Dependency Graph for Configure and Build Files" /></div></div></div><br class="figure-break" /><p>

3276

Regenerate all generated files by using the command

3277

<code class="code">autoreconf</code> at the top level of the libstdc++ source

3278

directory.

3279

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3280

===================================================================

3281

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3282

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3283

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3284

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Empirical Cost Model</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_api.html" title="Extensions for Custom Containers" /><link rel="next" href="profile_mode_impl.html" title="Implementation Issues" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Empirical Cost Model</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_api.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.cost_model"></a>Empirical Cost Model</h2></div></div></div><p>

3286

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Empirical Cost Model</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_api.html" title="Extensions for Custom Containers" /><link rel="next" href="profile_mode_impl.html" title="Implementation Issues" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Empirical Cost Model</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_api.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.cost_model"></a>Empirical Cost Model</h2></div></div></div><p>

3287

Currently, the cost model uses formulas with predefined relative weights

3288

for alternative containers or container implementations. For instance,

3289

iterating through a vector is X times faster than iterating through a list.

3290

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3291

===================================================================

3292

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3293

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3294

@@ -1,5 +1,5 @@

3295

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3296

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Make</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="setup.html" title="Chapter 2. Setup" /><link rel="prev" href="configure.html" title="Configure" /><link rel="next" href="using.html" title="Chapter 3. Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Make</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="configure.html">Prev</a> </td><th width="60%" align="center">Chapter 2. Setup</th><td width="20%" align="right"> <a accesskey="n" href="using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.make"></a>Make</h2></div></div></div><p>If you have never done this before, you should read the basic

3297

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Make</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="setup.html" title="Chapter 2. Setup" /><link rel="prev" href="configure.html" title="Configure" /><link rel="next" href="using.html" title="Chapter 3. Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Make</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="configure.html">Prev</a> </td><th width="60%" align="center">Chapter 2. Setup</th><td width="20%" align="right"> <a accesskey="n" href="using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.make"></a>Make</h2></div></div></div><p>If you have never done this before, you should read the basic

3298

<a class="link" href="http://gcc.gnu.org/install/" target="_top">GCC Installation

3299

Instructions</a> first. Read <span class="emphasis"><em>all of them</em></span>.

3300

<span class="emphasis"><em>Twice.</em></span>

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3303

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Pairs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="utilities.html" title="Chapter 6. Utilities" /><link rel="next" href="memory.html" title="Memory" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Pairs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="utilities.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

3308

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Pairs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="utilities.html" title="Chapter 6. Utilities" /><link rel="next" href="memory.html" title="Memory" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Pairs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="utilities.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

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Utilities

3310

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</th><td width="20%" align="right"> <a accesskey="n" href="memory.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.pairs"></a>Pairs</h2></div></div></div><p>The <code class="code">pair<T1,T2></code> is a simple and handy way to

3312

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===================================================================

3314

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3318

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Test</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, test, testsuite, performance, conformance, ABI, exception safety" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="internals.html" title="Porting to New Hardware or Operating Systems" /><link rel="next" href="abi.html" title="ABI Policy and Guidelines" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Test</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="internals.html">Prev</a> </td><th width="60%" align="center">Appendix B.

3319

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Test</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, test, testsuite, performance, conformance, ABI, exception safety" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="internals.html" title="Porting to New Hardware or Operating Systems" /><link rel="next" href="abi.html" title="ABI Policy and Guidelines" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Test</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="internals.html">Prev</a> </td><th width="60%" align="center">Appendix B.

3320

Porting and Maintenance

3321

3322

</th><td width="20%" align="right"> <a accesskey="n" href="abi.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.test"></a>Test</h2></div></div></div><p>

3323

@@ -492,7 +492,7 @@

3324

reporting functions including:

3325

</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: circle; "><li class="listitem"><p>time_counter</p></li><li class="listitem"><p>resource_counter</p></li><li class="listitem"><p>report_performance</p></li></ul></div></li></ul></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="test.special"></a>Special Topics</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="test.exception.safety"></a>

3326

Qualifying Exception Safety Guarantees

3327

- <a id="idp22628992" class="indexterm"></a>

3328

+ <a id="idm269992903504" class="indexterm"></a>

3329

</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="test.exception.safety.overview"></a>Overview</h5></div></div></div><p>

3330

Testing is composed of running a particular test sequence,

3331

and looking at what happens to the surrounding code when

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===================================================================

3334

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3338

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Linking</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_namespaces.html" title="Namespaces" /><link rel="next" href="using_concurrency.html" title="Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Linking</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_namespaces.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_concurrency.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.linkage"></a>Linking</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.linkage.freestanding"></a>Almost Nothing</h3></div></div></div><p>

3339

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Linking</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_namespaces.html" title="Namespaces" /><link rel="next" href="using_concurrency.html" title="Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Linking</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_namespaces.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_concurrency.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.linkage"></a>Linking</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.linkage.freestanding"></a>Almost Nothing</h3></div></div></div><p>

3340

Or as close as it gets: freestanding. This is a minimal

3341

configuration, with only partial support for the standard

3342

library. Assume only the following header files can be used:

3343

Index: libstdc++-v3/doc/html/manual/using_headers.html

3344

===================================================================

3345

--- a/src/libstdc++-v3/doc/html/manual/using_headers.html (.../tags/gcc_4_8_2_release)

3346

+++ b/src/libstdc++-v3/doc/html/manual/using_headers.html (.../branches/gcc-4_8-branch)

3347

@@ -1,5 +1,5 @@

3348

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3349

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Headers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using.html" title="Chapter 3. Using" /><link rel="next" href="using_macros.html" title="Macros" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Headers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_macros.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.headers"></a>Headers</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.all"></a>Header Files</h3></div></div></div><p>

3350

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Headers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using.html" title="Chapter 3. Using" /><link rel="next" href="using_macros.html" title="Macros" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Headers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_macros.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.headers"></a>Headers</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.all"></a>Header Files</h3></div></div></div><p>

3351

The C++ standard specifies the entire set of header files that

3352

must be available to all hosted implementations. Actually, the

3353

word "files" is a misnomer, since the contents of the

3354

@@ -18,19 +18,19 @@

3355

the 1998 standard as updated for 2003, and the current 2011 standard.

3356

</p><p>

3357

C++98/03 include files. These are available in the default compilation mode, i.e. <code class="code">-std=c++98</code> or <code class="code">-std=gnu++98</code>.

3358

- </p><div class="table"><a id="idp13079360"></a><p class="title"><strong>Table 3.2. C++ 1998 Library Headers</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">complex</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td></tr><tr><td align="left"><code class="filename">fstream</code></td><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td><td align="left"><code class="filename">iosfwd</code></td></tr><tr><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td><td align="left"><code class="filename">list</code></td></tr><tr><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td></tr><tr><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">typeinfo</code></td></tr><tr><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13115840"></a><p class="title"><strong>Table 3.3. C++ 1998 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">ciso646</code></td></tr><tr><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td></tr><tr><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p>

3359

+ </p><div class="table"><a id="idm270002453792"></a><p class="title"><strong>Table 3.2. C++ 1998 Library Headers</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">complex</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td></tr><tr><td align="left"><code class="filename">fstream</code></td><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td><td align="left"><code class="filename">iosfwd</code></td></tr><tr><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td><td align="left"><code class="filename">list</code></td></tr><tr><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td></tr><tr><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">typeinfo</code></td></tr><tr><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002417312"></a><p class="title"><strong>Table 3.3. C++ 1998 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">ciso646</code></td></tr><tr><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td></tr><tr><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p>

3360

C++11 include files. These are only available in C++11 compilation

3361

mode, i.e. <code class="literal">-std=c++11</code> or <code class="literal">-std=gnu++11</code>.

3362

-</p><p></p><div class="table"><a id="idp13140576"></a><p class="title"><strong>Table 3.4. C++ 2011 Library Headers</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">array</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">chrono</code></td><td align="left"><code class="filename">complex</code></td></tr><tr><td align="left"><code class="filename">condition_variable</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td><td align="left"><code class="filename">forward_list</code></td><td align="left"><code class="filename">fstream</code></td></tr><tr><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">future</code></td><td align="left"><code class="filename">initalizer_list</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td></tr><tr><td align="left"><code class="filename">iosfwd</code></td><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td></tr><tr><td align="left"><code class="filename">list</code></td><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">mutex</code></td></tr><tr><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">random</code></td></tr><tr><td align="left"><code class="filename">ratio</code></td><td align="left"><code class="filename">regex</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">system_error</code></td><td align="left"><code class="filename">thread</code></td></tr><tr><td align="left"><code class="filename">tuple</code></td><td align="left"><code class="filename">type_traits</code></td><td align="left"><code class="filename">typeinfo</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="filename">unordered_set</code></td></tr><tr><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13192016"></a><p class="title"><strong>Table 3.5. C++ 2011 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">ccomplex</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cfenv</code></td></tr><tr><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">cinttypes</code></td><td align="left"><code class="filename">ciso646</code></td><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td></tr><tr><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstdbool</code></td></tr><tr><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdint</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctgmath</code></td><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cuchar</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3363

+</p><p></p><div class="table"><a id="idm270002392576"></a><p class="title"><strong>Table 3.4. C++ 2011 Library Headers</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">array</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">chrono</code></td><td align="left"><code class="filename">complex</code></td></tr><tr><td align="left"><code class="filename">condition_variable</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td><td align="left"><code class="filename">forward_list</code></td><td align="left"><code class="filename">fstream</code></td></tr><tr><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">future</code></td><td align="left"><code class="filename">initalizer_list</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td></tr><tr><td align="left"><code class="filename">iosfwd</code></td><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td></tr><tr><td align="left"><code class="filename">list</code></td><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">mutex</code></td></tr><tr><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">random</code></td></tr><tr><td align="left"><code class="filename">ratio</code></td><td align="left"><code class="filename">regex</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">system_error</code></td><td align="left"><code class="filename">thread</code></td></tr><tr><td align="left"><code class="filename">tuple</code></td><td align="left"><code class="filename">type_traits</code></td><td align="left"><code class="filename">typeinfo</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="filename">unordered_set</code></td></tr><tr><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002341136"></a><p class="title"><strong>Table 3.5. C++ 2011 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">ccomplex</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cfenv</code></td></tr><tr><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">cinttypes</code></td><td align="left"><code class="filename">ciso646</code></td><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td></tr><tr><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstdbool</code></td></tr><tr><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdint</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctgmath</code></td><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cuchar</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3364

In addition, TR1 includes as:

3365

-</p><div class="table"><a id="idp13221904"></a><p class="title"><strong>Table 3.6. C++ TR 1 Library Headers</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/array</code></td><td align="left"><code class="filename">tr1/complex</code></td><td align="left"><code class="filename">tr1/memory</code></td><td align="left"><code class="filename">tr1/functional</code></td><td align="left"><code class="filename">tr1/random</code></td></tr><tr><td align="left"><code class="filename">tr1/regex</code></td><td align="left"><code class="filename">tr1/tuple</code></td><td align="left"><code class="filename">tr1/type_traits</code></td><td align="left"><code class="filename">tr1/unordered_map</code></td><td align="left"><code class="filename">tr1/unordered_set</code></td></tr><tr><td align="left"><code class="filename">tr1/utility</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13238832"></a><p class="title"><strong>Table 3.7. C++ TR 1 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/ccomplex</code></td><td align="left"><code class="filename">tr1/cfenv</code></td><td align="left"><code class="filename">tr1/cfloat</code></td><td align="left"><code class="filename">tr1/cmath</code></td><td align="left"><code class="filename">tr1/cinttypes</code></td></tr><tr><td align="left"><code class="filename">tr1/climits</code></td><td align="left"><code class="filename">tr1/cstdarg</code></td><td align="left"><code class="filename">tr1/cstdbool</code></td><td align="left"><code class="filename">tr1/cstdint</code></td><td align="left"><code class="filename">tr1/cstdio</code></td></tr><tr><td align="left"><code class="filename">tr1/cstdlib</code></td><td align="left"><code class="filename">tr1/ctgmath</code></td><td align="left"><code class="filename">tr1/ctime</code></td><td align="left"><code class="filename">tr1/cwchar</code></td><td align="left"><code class="filename">tr1/cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>Decimal floating-point arithmetic is available if the C++

3366

+</p><div class="table"><a id="idm270002311248"></a><p class="title"><strong>Table 3.6. C++ TR 1 Library Headers</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/array</code></td><td align="left"><code class="filename">tr1/complex</code></td><td align="left"><code class="filename">tr1/memory</code></td><td align="left"><code class="filename">tr1/functional</code></td><td align="left"><code class="filename">tr1/random</code></td></tr><tr><td align="left"><code class="filename">tr1/regex</code></td><td align="left"><code class="filename">tr1/tuple</code></td><td align="left"><code class="filename">tr1/type_traits</code></td><td align="left"><code class="filename">tr1/unordered_map</code></td><td align="left"><code class="filename">tr1/unordered_set</code></td></tr><tr><td align="left"><code class="filename">tr1/utility</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002294320"></a><p class="title"><strong>Table 3.7. C++ TR 1 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/ccomplex</code></td><td align="left"><code class="filename">tr1/cfenv</code></td><td align="left"><code class="filename">tr1/cfloat</code></td><td align="left"><code class="filename">tr1/cmath</code></td><td align="left"><code class="filename">tr1/cinttypes</code></td></tr><tr><td align="left"><code class="filename">tr1/climits</code></td><td align="left"><code class="filename">tr1/cstdarg</code></td><td align="left"><code class="filename">tr1/cstdbool</code></td><td align="left"><code class="filename">tr1/cstdint</code></td><td align="left"><code class="filename">tr1/cstdio</code></td></tr><tr><td align="left"><code class="filename">tr1/cstdlib</code></td><td align="left"><code class="filename">tr1/ctgmath</code></td><td align="left"><code class="filename">tr1/ctime</code></td><td align="left"><code class="filename">tr1/cwchar</code></td><td align="left"><code class="filename">tr1/cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>Decimal floating-point arithmetic is available if the C++

3367

compiler supports scalar decimal floating-point types defined via

3368

<code class="code">__attribute__((mode(SD|DD|LD)))</code>.

3369

-</p><div class="table"><a id="idp13259904"></a><p class="title"><strong>Table 3.8. C++ TR 24733 Decimal Floating-Point Header</strong></p><div class="table-contents"><table summary="C++ TR 24733 Decimal Floating-Point Header" border="1"><colgroup><col align="left" class="c1" /></colgroup><tbody><tr><td align="left"><code class="filename">decimal/decimal</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3370

+</p><div class="table"><a id="idm270002273248"></a><p class="title"><strong>Table 3.8. C++ TR 24733 Decimal Floating-Point Header</strong></p><div class="table-contents"><table summary="C++ TR 24733 Decimal Floating-Point Header" border="1"><colgroup><col align="left" class="c1" /></colgroup><tbody><tr><td align="left"><code class="filename">decimal/decimal</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3371

Also included are files for the C++ ABI interface:

3372

-</p><div class="table"><a id="idp13265424"></a><p class="title"><strong>Table 3.9. C++ ABI Headers</strong></p><div class="table-contents"><table summary="C++ ABI Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">cxxabi.h</code></td><td align="left"><code class="filename">cxxabi_forced.h</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3373

+</p><div class="table"><a id="idm270002267728"></a><p class="title"><strong>Table 3.9. C++ ABI Headers</strong></p><div class="table-contents"><table summary="C++ ABI Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">cxxabi.h</code></td><td align="left"><code class="filename">cxxabi_forced.h</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3374

And a large variety of extensions.

3375

-</p><div class="table"><a id="idp13271824"></a><p class="title"><strong>Table 3.10. Extension Headers</strong></p><div class="table-contents"><table summary="Extension Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">ext/algorithm</code></td><td align="left"><code class="filename">ext/atomicity.h</code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"><code class="filename">ext/cast.h</code></td></tr><tr><td align="left"><code class="filename">ext/codecvt_specializations.h</code></td><td align="left"><code class="filename">ext/concurrence.h</code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="filename">ext/enc_filebuf.h</code></td><td align="left"><code class="filename">ext/extptr_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/functional</code></td><td align="left"><code class="filename">ext/iterator</code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="filename">ext/memory</code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="filename">ext/numeric</code></td><td align="left"><code class="filename">ext/numeric_traits.h</code></td><td align="left"><code class="filename">ext/pb_ds/assoc_container.h</code></td><td align="left"><code class="filename">ext/pb_ds/priority_queue.h</code></td></tr><tr><td align="left"><code class="filename">ext/pod_char_traits.h</code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="filename">ext/rb_tree</code></td><td align="left"><code class="filename">ext/rope</code></td><td align="left"><code class="filename">ext/slist</code></td></tr><tr><td align="left"><code class="filename">ext/stdio_filebuf.h</code></td><td align="left"><code class="filename">ext/stdio_sync_filebuf.h</code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left"><code class="filename">ext/typelist.h</code></td><td align="left"><code class="filename">ext/type_traits.h</code></td></tr><tr><td align="left"><code class="filename">ext/vstring.h</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13307552"></a><p class="title"><strong>Table 3.11. Extension Debug Headers</strong></p><div class="table-contents"><table summary="Extension Debug Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">debug/bitset</code></td><td align="left"><code class="filename">debug/deque</code></td><td align="left"><code class="filename">debug/list</code></td><td align="left"><code class="filename">debug/map</code></td><td align="left"><code class="filename">debug/set</code></td></tr><tr><td align="left"><code class="filename">debug/string</code></td><td align="left"><code class="filename">debug/unordered_map</code></td><td align="left"><code class="filename">debug/unordered_set</code></td><td align="left"><code class="filename">debug/vector</code></td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13322320"></a><p class="title"><strong>Table 3.12. Extension Profile Headers</strong></p><div class="table-contents"><table summary="Extension Profile Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><tbody><tr><td align="left"><code class="filename">profile/bitset</code></td><td align="left"><code class="filename">profile/deque</code></td><td align="left"><code class="filename">profile/list</code></td><td align="left"><code class="filename">profile/map</code></td></tr><tr><td align="left"><code class="filename">profile/set</code></td><td align="left"><code class="filename">profile/unordered_map</code></td><td align="left"><code class="filename">profile/unordered_set</code></td><td align="left"><code class="filename">profile/vector</code></td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13335696"></a><p class="title"><strong>Table 3.13. Extension Parallel Headers</strong></p><div class="table-contents"><table summary="Extension Parallel Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">parallel/algorithm</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr></tbody></table></div></div><br class="table-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.mixing"></a>Mixing Headers</h3></div></div></div><p> A few simple rules.

3376

+</p><div class="table"><a id="idm270002261328"></a><p class="title"><strong>Table 3.10. Extension Headers</strong></p><div class="table-contents"><table summary="Extension Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">ext/algorithm</code></td><td align="left"><code class="filename">ext/atomicity.h</code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"><code class="filename">ext/cast.h</code></td></tr><tr><td align="left"><code class="filename">ext/codecvt_specializations.h</code></td><td align="left"><code class="filename">ext/concurrence.h</code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="filename">ext/enc_filebuf.h</code></td><td align="left"><code class="filename">ext/extptr_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/functional</code></td><td align="left"><code class="filename">ext/iterator</code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="filename">ext/memory</code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="filename">ext/numeric</code></td><td align="left"><code class="filename">ext/numeric_traits.h</code></td><td align="left"><code class="filename">ext/pb_ds/assoc_container.h</code></td><td align="left"><code class="filename">ext/pb_ds/priority_queue.h</code></td></tr><tr><td align="left"><code class="filename">ext/pod_char_traits.h</code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="filename">ext/rb_tree</code></td><td align="left"><code class="filename">ext/rope</code></td><td align="left"><code class="filename">ext/slist</code></td></tr><tr><td align="left"><code class="filename">ext/stdio_filebuf.h</code></td><td align="left"><code class="filename">ext/stdio_sync_filebuf.h</code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left"><code class="filename">ext/typelist.h</code></td><td align="left"><code class="filename">ext/type_traits.h</code></td></tr><tr><td align="left"><code class="filename">ext/vstring.h</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002225600"></a><p class="title"><strong>Table 3.11. Extension Debug Headers</strong></p><div class="table-contents"><table summary="Extension Debug Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">debug/bitset</code></td><td align="left"><code class="filename">debug/deque</code></td><td align="left"><code class="filename">debug/list</code></td><td align="left"><code class="filename">debug/map</code></td><td align="left"><code class="filename">debug/set</code></td></tr><tr><td align="left"><code class="filename">debug/string</code></td><td align="left"><code class="filename">debug/unordered_map</code></td><td align="left"><code class="filename">debug/unordered_set</code></td><td align="left"><code class="filename">debug/vector</code></td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002210832"></a><p class="title"><strong>Table 3.12. Extension Profile Headers</strong></p><div class="table-contents"><table summary="Extension Profile Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><tbody><tr><td align="left"><code class="filename">profile/bitset</code></td><td align="left"><code class="filename">profile/deque</code></td><td align="left"><code class="filename">profile/list</code></td><td align="left"><code class="filename">profile/map</code></td></tr><tr><td align="left"><code class="filename">profile/set</code></td><td align="left"><code class="filename">profile/unordered_map</code></td><td align="left"><code class="filename">profile/unordered_set</code></td><td align="left"><code class="filename">profile/vector</code></td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002197456"></a><p class="title"><strong>Table 3.13. Extension Parallel Headers</strong></p><div class="table-contents"><table summary="Extension Parallel Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">parallel/algorithm</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr></tbody></table></div></div><br class="table-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.mixing"></a>Mixing Headers</h3></div></div></div><p> A few simple rules.

3377

</p><p>First, mixing different dialects of the standard headers is not

3378

possible. It's an all-or-nothing affair. Thus, code like

3379

</p><pre class="programlisting">

3380

Index: libstdc++-v3/doc/html/manual/using_namespaces.html

3381

===================================================================

3382

--- a/src/libstdc++-v3/doc/html/manual/using_namespaces.html (.../tags/gcc_4_8_2_release)

3383

+++ b/src/libstdc++-v3/doc/html/manual/using_namespaces.html (.../branches/gcc-4_8-branch)

3384

@@ -1,5 +1,5 @@

3385

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3386

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Namespaces</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_macros.html" title="Macros" /><link rel="next" href="using_dynamic_or_shared.html" title="Linking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Namespaces</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_macros.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_dynamic_or_shared.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.namespaces"></a>Namespaces</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.namespaces.all"></a>Available Namespaces</h3></div></div></div><p> There are three main namespaces.

3387

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Namespaces</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_macros.html" title="Macros" /><link rel="next" href="using_dynamic_or_shared.html" title="Linking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Namespaces</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_macros.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_dynamic_or_shared.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.namespaces"></a>Namespaces</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.namespaces.all"></a>Available Namespaces</h3></div></div></div><p> There are three main namespaces.

3388

</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>std</p><p>The ISO C++ standards specify that "all library entities are defined

3389

within namespace std." This includes namespaces nested

3390

within <code class="code">namespace std</code>, such as <code class="code">namespace

3391

Index: libstdc++-v3/doc/html/manual/debug.html

3392

===================================================================

3393

--- a/src/libstdc++-v3/doc/html/manual/debug.html (.../tags/gcc_4_8_2_release)

3394

+++ b/src/libstdc++-v3/doc/html/manual/debug.html (.../branches/gcc-4_8-branch)

3395

@@ -1,5 +1,5 @@

3396

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3397

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Debugging Support</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_exceptions.html" title="Exceptions" /><link rel="next" href="std_contents.html" title="Part II. Standard Contents" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Debugging Support</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_exceptions.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="std_contents.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.debug"></a>Debugging Support</h2></div></div></div><p>

3398

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Debugging Support</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_exceptions.html" title="Exceptions" /><link rel="next" href="std_contents.html" title="Part II. Standard Contents" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Debugging Support</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_exceptions.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="std_contents.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.debug"></a>Debugging Support</h2></div></div></div><p>

3399

There are numerous things that can be done to improve the ease with

3400

which C++ binaries are debugged when using the GNU tool chain. Here

3401

are some of them.

3402

@@ -161,7 +161,7 @@

3403

DRD</a>,

3404

3405

Helgrind</a>, and

3406

- <a class="link" href="http://code.google.com/p/data-race-test" target="_top">

3407

+ <a class="link" href="http://code.google.com/p/data-race-test/" target="_top">

3408

ThreadSanitizer</a>.

3409

</p><p>

3410

With DRD, Helgrind and ThreadSanitizer you will need to define

3411

Index: libstdc++-v3/doc/html/manual/localization.html

3412

===================================================================

3413

--- a/src/libstdc++-v3/doc/html/manual/localization.html (.../tags/gcc_4_8_2_release)

3414

+++ b/src/libstdc++-v3/doc/html/manual/localization.html (.../branches/gcc-4_8-branch)

3415

@@ -1,5 +1,5 @@

3416

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3417

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 8. Localization</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="strings.html" title="Chapter 7. Strings" /><link rel="next" href="facets.html" title="Facets" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 8.

3418

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 8. Localization</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="strings.html" title="Chapter 7. Strings" /><link rel="next" href="facets.html" title="Facets" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 8.

3419

Localization

3420

3421

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="strings.html">Prev</a> </td><th width="60%" align="center">Part II.

3422

@@ -6,8 +6,8 @@

3423

Standard Contents

3424

</th><td width="20%" align="right"> <a accesskey="n" href="facets.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.localization"></a>Chapter 8.

3425

Localization

3426

- <a id="idp15701088" class="indexterm"></a>

3427

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idp15778336">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.locales"></a>Locales</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.locales.locale"></a>locale</h3></div></div></div><p>

3428

+ <a id="idm269999830208" class="indexterm"></a>

3429

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idm269999753024">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.locales"></a>Locales</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.locales.locale"></a>locale</h3></div></div></div><p>

3430

Describes the basic locale object, including nested

3431

classes id, facet, and the reference-counted implementation object,

3432

class _Impl.

3433

@@ -402,18 +402,18 @@

3434

What should non-required facet instantiations do? If the

3435

generic implementation is provided, then how to end-users

3436

provide specializations?

3437

- </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="locales.locale.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15744064"></a><p><span class="citetitle"><em class="citetitle">

3438

+ </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="locales.locale.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999787232"></a><p><span class="citetitle"><em class="citetitle">

3439

The GNU C Library

3440

</em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">

3441

Chapters 6 Character Set Handling and 7 Locales and

3442

Internationalization

3443

- . </span></p></div><div class="biblioentry"><a id="idp15748832"></a><p><span class="citetitle"><em class="citetitle">

3444

+ . </span></p></div><div class="biblioentry"><a id="idm269999782464"></a><p><span class="citetitle"><em class="citetitle">

3445

Correspondence

3446

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp15751920"></a><p><span class="citetitle"><em class="citetitle">

3447

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999779376"></a><p><span class="citetitle"><em class="citetitle">

3448

ISO/IEC 14882:1998 Programming languages - C++

3449

3450

3451

ISO/IEC 9899:1999 Programming languages - C

3452

3453

3454

3455

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

3456

</a>

3457

@@ -420,11 +420,11 @@

3458

3459

The Open Group/The Institute of Electrical and Electronics

3460

Engineers, Inc.

3461

- . </span></p></div><div class="biblioentry"><a id="idp15759712"></a><p><span class="citetitle"><em class="citetitle">

3462

+ . </span></p></div><div class="biblioentry"><a id="idm269999771584"></a><p><span class="citetitle"><em class="citetitle">

3463

The C++ Programming Language, Special Edition

3464

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3465

Addison Wesley

3466

- . </span></span></p></div><div class="biblioentry"><a id="idp15764336"></a><p><span class="citetitle"><em class="citetitle">

3467

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999766960"></a><p><span class="citetitle"><em class="citetitle">

3468

Standard C++ IOStreams and Locales

3469

</em>. </span><span class="subtitle">

3470

Advanced Programmer's Guide and Reference

3471

Index: libstdc++-v3/doc/html/manual/ext_algorithms.html

3472

===================================================================

3473

--- a/src/libstdc++-v3/doc/html/manual/ext_algorithms.html (.../tags/gcc_4_8_2_release)

3474

+++ b/src/libstdc++-v3/doc/html/manual/ext_algorithms.html (.../branches/gcc-4_8-branch)

3475

@@ -1,5 +1,5 @@

3476

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3477

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 25. Algorithms</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_utilities.html" title="Chapter 24. Utilities" /><link rel="next" href="ext_numerics.html" title="Chapter 26. Numerics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 25. Algorithms</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_utilities.html">Prev</a> </td><th width="60%" align="center">Part III.

3478

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 25. Algorithms</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_utilities.html" title="Chapter 24. Utilities" /><link rel="next" href="ext_numerics.html" title="Chapter 26. Numerics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 25. Algorithms</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_utilities.html">Prev</a> </td><th width="60%" align="center">Part III.

3479

Extensions

3480

3481

</th><td width="20%" align="right"> <a accesskey="n" href="ext_numerics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.algorithms"></a>Chapter 25. Algorithms</h2></div></div></div><p>25.1.6 (count, count_if) is extended with two more versions of count

3482

Index: libstdc++-v3/doc/html/manual/debug_mode.html

3483

===================================================================

3484

--- a/src/libstdc++-v3/doc/html/manual/debug_mode.html (.../tags/gcc_4_8_2_release)

3485

+++ b/src/libstdc++-v3/doc/html/manual/debug_mode.html (.../branches/gcc-4_8-branch)

3486

@@ -1,8 +1,8 @@

3487

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3488

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 17. Debug Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /><link rel="next" href="debug_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 17. Debug Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_compile_checks.html">Prev</a> </td><th width="60%" align="center">Part III.

3489

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 17. Debug Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /><link rel="next" href="debug_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 17. Debug Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_compile_checks.html">Prev</a> </td><th width="60%" align="center">Part III.

3490

Extensions

3491

3492

-</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.debug_mode"></a>Chapter 17. Debug Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

3493

+</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.debug_mode"></a>Chapter 17. Debug Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

3494

debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.alt">Alternatives for Coexistence</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.other">Other Implementations</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.intro"></a>Intro</h2></div></div></div><p>

3495

By default, libstdc++ is built with efficiency in mind, and

3496

therefore performs little or no error checking that is not

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3499

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3500

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3501

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3502

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3503

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="next" href="profile_mode_api.html" title="Extensions for Custom Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_api.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.design"></a>Design</h2></div></div></div><p>

3504

-</p><div class="table"><a id="idp16981200"></a><p class="title"><strong>Table 19.1. Profile Code Location</strong></p><div class="table-contents"><table summary="Profile Code Location" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Code Location</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><code class="code">libstdc++-v3/include/std/*</code></td><td align="left">Preprocessor code to redirect to profile extension headers.</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/*</code></td><td align="left">Profile extension public headers (map, vector, ...).</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/impl/*</code></td><td align="left">Profile extension internals. Implementation files are

3505

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="next" href="profile_mode_api.html" title="Extensions for Custom Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_api.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.design"></a>Design</h2></div></div></div><p>

3506

+</p><div class="table"><a id="idm269998550064"></a><p class="title"><strong>Table 19.1. Profile Code Location</strong></p><div class="table-contents"><table summary="Profile Code Location" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Code Location</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><code class="code">libstdc++-v3/include/std/*</code></td><td align="left">Preprocessor code to redirect to profile extension headers.</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/*</code></td><td align="left">Profile extension public headers (map, vector, ...).</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/impl/*</code></td><td align="left">Profile extension internals. Implementation files are

3507

only included from <code class="code">impl/profiler.h</code>, which is the only

3508

file included from the public headers.</td></tr></tbody></table></div></div><br class="table-break" /><p>

3509

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.design.wrapper"></a>Wrapper Model</h3></div></div></div><p>

3510

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3511

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3512

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3513

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3514

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3515

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3516

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_dynamic_or_shared.html" title="Linking" /><link rel="next" href="using_exceptions.html" title="Exceptions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Concurrency</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_dynamic_or_shared.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_exceptions.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.concurrency"></a>Concurrency</h2></div></div></div><p>This section discusses issues surrounding the proper compilation

3517

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_dynamic_or_shared.html" title="Linking" /><link rel="next" href="using_exceptions.html" title="Exceptions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Concurrency</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_dynamic_or_shared.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_exceptions.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.concurrency"></a>Concurrency</h2></div></div></div><p>This section discusses issues surrounding the proper compilation

3518

of multithreaded applications which use the Standard C++

3519

library. This information is GCC-specific since the C++

3520

standard does not address matters of multithreaded applications.

3521

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3522

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3523

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3526

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_design.html" title="Design Issues" /><link rel="next" href="mt_allocator_ex_single.html" title="Single Thread Example" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_design.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_ex_single.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.tune"></a>Tunable Parameters</h3></div></div></div><p>Certain allocation parameters can be modified, or tuned. There

3528

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_design.html" title="Design Issues" /><link rel="next" href="mt_allocator_ex_single.html" title="Single Thread Example" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_design.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_ex_single.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.tune"></a>Tunable Parameters</h3></div></div></div><p>Certain allocation parameters can be modified, or tuned. There

3529

exists a nested <code class="code">struct __pool_base::_Tune</code> that contains all

3530

these parameters, which include settings for

3531

</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>Alignment</p></li><li class="listitem"><p>Maximum bytes before calling <code class="code">::operator new</code> directly</p></li><li class="listitem"><p>Minimum bytes</p></li><li class="listitem"><p>Size of underlying global allocations</p></li><li class="listitem"><p>Maximum number of supported threads</p></li><li class="listitem"><p>Migration of deallocations to the global free list</p></li><li class="listitem"><p>Shunt for global <code class="code">new</code> and <code class="code">delete</code></p></li></ul></div><p>Adjusting parameters for a given instance of an allocator can only

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix E. GNU Free Documentation License</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /><link rel="next" href="../bk02.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix E. GNU Free Documentation License</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_gpl.html">Prev</a> </td><th width="60%" align="center">Part IV.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix E. GNU Free Documentation License</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /><link rel="next" href="../bk02.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix E. GNU Free Documentation License</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_gpl.html">Prev</a> </td><th width="60%" align="center">Part IV.

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Appendices

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</th><td width="20%" align="right"> <a accesskey="n" href="../bk02.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.gfdl-1.3"></a>GNU Free Documentation License</h1></div></div></div><p>Version 1.3, 3 November 2008</p><p>

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3545

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 9. Containers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="facets.html" title="Facets" /><link rel="next" href="associative.html" title="Associative" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 9.

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Containers

3552

3553

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="facets.html">Prev</a> </td><th width="60%" align="center">Part II.

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Standard Contents

3556

</th><td width="20%" align="right"> <a accesskey="n" href="associative.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.containers"></a>Chapter 9.

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Containers

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- <a id="idp16037808" class="indexterm"></a>

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-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.sequences"></a>Sequences</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.sequences.list"></a>list</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="sequences.list.size"></a>list::size() is O(n)</h4></div></div></div><p>

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+ <a id="idm269999493408" class="indexterm"></a>

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+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.sequences"></a>Sequences</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.sequences.list"></a>list</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="sequences.list.size"></a>list::size() is O(n)</h4></div></div></div><p>

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Yes it is, and that's okay. This is a decision that we preserved

3563

when we imported SGI's STL implementation. The following is

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quoted from <a class="link" href="http://www.sgi.com/tech/stl/FAQ.html" target="_top">their FAQ</a>:

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Index: libstdc++-v3/doc/html/manual/io.html

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 13. Input and Output</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="numerics_and_c.html" title="Interacting with C" /><link rel="next" href="streambufs.html" title="Stream Buffers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 13.

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 13. Input and Output</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="numerics_and_c.html" title="Interacting with C" /><link rel="next" href="streambufs.html" title="Stream Buffers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 13.

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Input and Output

3574

3575

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="numerics_and_c.html">Prev</a> </td><th width="60%" align="center">Part II.

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@@ -6,8 +6,8 @@

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Standard Contents

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</th><td width="20%" align="right"> <a accesskey="n" href="streambufs.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.io"></a>Chapter 13.

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Input and Output

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- <a id="idp16257600" class="indexterm"></a>

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-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="io.html#std.io.objects">Iostream Objects</a></span></dt><dt><span class="section"><a href="streambufs.html">Stream Buffers</a></span></dt><dd><dl><dt><span class="section"><a href="streambufs.html#io.streambuf.derived">Derived streambuf Classes</a></span></dt><dt><span class="section"><a href="streambufs.html#io.streambuf.buffering">Buffering</a></span></dt></dl></dd><dt><span class="section"><a href="stringstreams.html">Memory Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="stringstreams.html#std.io.memstreams.compat">Compatibility With strstream</a></span></dt></dl></dd><dt><span class="section"><a href="fstreams.html">File Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="fstreams.html#std.io.filestreams.copying_a_file">Copying a File</a></span></dt><dt><span class="section"><a href="fstreams.html#std.io.filestreams.binary">Binary Input and Output</a></span></dt></dl></dd><dt><span class="section"><a href="io_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="io_and_c.html#std.io.c.FILE">Using FILE* and file descriptors</a></span></dt><dt><span class="section"><a href="io_and_c.html#std.io.c.sync">Performance</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.objects"></a>Iostream Objects</h2></div></div></div><p>To minimize the time you have to wait on the compiler, it's good to

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+ <a id="idm269999273616" class="indexterm"></a>

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+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="io.html#std.io.objects">Iostream Objects</a></span></dt><dt><span class="section"><a href="streambufs.html">Stream Buffers</a></span></dt><dd><dl><dt><span class="section"><a href="streambufs.html#io.streambuf.derived">Derived streambuf Classes</a></span></dt><dt><span class="section"><a href="streambufs.html#io.streambuf.buffering">Buffering</a></span></dt></dl></dd><dt><span class="section"><a href="stringstreams.html">Memory Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="stringstreams.html#std.io.memstreams.compat">Compatibility With strstream</a></span></dt></dl></dd><dt><span class="section"><a href="fstreams.html">File Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="fstreams.html#std.io.filestreams.copying_a_file">Copying a File</a></span></dt><dt><span class="section"><a href="fstreams.html#std.io.filestreams.binary">Binary Input and Output</a></span></dt></dl></dd><dt><span class="section"><a href="io_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="io_and_c.html#std.io.c.FILE">Using FILE* and file descriptors</a></span></dt><dt><span class="section"><a href="io_and_c.html#std.io.c.sync">Performance</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.objects"></a>Iostream Objects</h2></div></div></div><p>To minimize the time you have to wait on the compiler, it's good to

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only include the headers you really need. Many people simply include

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<iostream> when they don't need to -- and that can <span class="emphasis"><em>penalize

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your runtime as well.</em></span> Here are some tips on which header to use

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Index: libstdc++-v3/doc/html/manual/index.html

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===================================================================

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library Manual</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="../index.html" title="The GNU C++ Library" /><link rel="prev" href="../index.html" title="The GNU C++ Library" /><link rel="next" href="intro.html" title="Part I. Introduction" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library Manual</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="../index.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="intro.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><div><div><h1 class="title"><a id="manual"></a>The GNU C++ Library Manual</h1></div><div><div class="authorgroup"><div class="author"><h3 class="author"><span class="firstname"></span> <span class="surname"></span></h3></div><div class="author"><h3 class="author"><span class="firstname">Paolo</span> <span class="surname">Carlini</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Phil</span> <span class="surname">Edwards</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Doug</span> <span class="surname">Gregor</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Dhruv</span> <span class="surname">Matani</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jason</span> <span class="surname">Merrill</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Mark</span> <span class="surname">Mitchell</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Nathan</span> <span class="surname">Myers</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Felix</span> <span class="surname">Natter</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Stefan</span> <span class="surname">Olsson</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Silvius</span> <span class="surname">Rus</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Ami</span> <span class="surname">Tavory</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jonathan</span> <span class="surname">Wakely</span></h3></div></div></div><div><p class="copyright">Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library Manual</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="../index.html" title="The GNU C++ Library" /><link rel="prev" href="../index.html" title="The GNU C++ Library" /><link rel="next" href="intro.html" title="Part I. Introduction" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library Manual</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="../index.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="intro.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><div><div><h1 class="title"><a id="manual"></a>The GNU C++ Library Manual</h1></div><div><div class="authorgroup"><div class="author"><h3 class="author"><span class="firstname"></span> <span class="surname"></span></h3></div><div class="author"><h3 class="author"><span class="firstname">Paolo</span> <span class="surname">Carlini</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Phil</span> <span class="surname">Edwards</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Doug</span> <span class="surname">Gregor</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Dhruv</span> <span class="surname">Matani</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jason</span> <span class="surname">Merrill</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Mark</span> <span class="surname">Mitchell</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Nathan</span> <span class="surname">Myers</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Felix</span> <span class="surname">Natter</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Stefan</span> <span class="surname">Olsson</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Silvius</span> <span class="surname">Rus</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Ami</span> <span class="surname">Tavory</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jonathan</span> <span class="surname">Wakely</span></h3></div></div></div><div><p class="copyright">Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013

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- </p></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="part"><a href="intro.html">I.

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+ </p></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="part"><a href="intro.html">I.

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Introduction

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</a></span></dt><dd><dl><dt><span class="chapter"><a href="status.html">1. Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="part"><a href="std_contents.html">II.

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</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="concept_checking.html">Concept Checking</a></span></dt></dl></dd><dt><span class="chapter"><a href="utilities.html">6.

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Utilities

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-</a></span></dt><dd><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp13920976">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idp13924528">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp13937824">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15512272">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idp15534784">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idp15542080">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp15556704">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15573056">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idp15576640">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="strings.html">7.

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+</a></span></dt><dd><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270001611968">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idm270001608416">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm270001595120">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270000019344">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999996832">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idm269999989536">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999974912">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm269999958496">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idm269999954912">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="strings.html">7.

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Strings

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</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="localization.html">8.

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-</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idp15778336">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

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+</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idm269999753024">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

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</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="iterators.html">10.

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</a></span></dt><dt><span class="appendix"><a href="appendix_gpl.html">D.

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<acronym class="acronym">GNU</acronym> General Public License version 3

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- </a></span></dt><dt><span class="appendix"><a href="appendix_gfdl.html">E. GNU Free Documentation License</a></span></dt></dl></dd></dl></div><div class="list-of-figures"><p><strong>List of Figures</strong></p><dl><dt>22.1. <a href="policy_data_structures.html#idp17613296">Node Invariants</a></dt><dt>22.2. <a href="policy_data_structures.html#idp17619952">Underlying Associative Data Structures</a></dt><dt>22.3. <a href="policy_data_structures.html#idp17651648">Range Iteration in Different Data Structures</a></dt><dt>22.4. <a href="policy_data_structures.html#idp17666528">Point Iteration in Hash Data Structures</a></dt><dt>22.5. <a href="policy_data_structures.html#idp17675840">Effect of erase in different underlying data structures</a></dt><dt>22.6. <a href="policy_data_structures.html#idp17743424">Underlying Priority Queue Data Structures</a></dt><dt>22.7. <a href="policy_data_structures_using.html#idp17806128">Exception Hierarchy</a></dt><dt>22.8. <a href="policy_data_structures_design.html#idp18000448">Non-unique Mapping Standard Containers</a></dt><dt>22.9. <a href="policy_data_structures_design.html#fig.pbds_embedded_lists_2">

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+ </a></span></dt><dt><span class="appendix"><a href="appendix_gfdl.html">E. GNU Free Documentation License</a></span></dt></dl></dd></dl></div><div class="list-of-figures"><p><strong>List of Figures</strong></p><dl><dt>22.1. <a href="policy_data_structures.html#idm269997917584">Node Invariants</a></dt><dt>22.2. <a href="policy_data_structures.html#idm269997910864">Underlying Associative Data Structures</a></dt><dt>22.3. <a href="policy_data_structures.html#idm269997879168">Range Iteration in Different Data Structures</a></dt><dt>22.4. <a href="policy_data_structures.html#idm269997864256">Point Iteration in Hash Data Structures</a></dt><dt>22.5. <a href="policy_data_structures.html#idm269997855056">Effect of erase in different underlying data structures</a></dt><dt>22.6. <a href="policy_data_structures.html#idm269997787392">Underlying Priority Queue Data Structures</a></dt><dt>22.7. <a href="policy_data_structures_using.html#idm269997724688">Exception Hierarchy</a></dt><dt>22.8. <a href="policy_data_structures_design.html#idm269997530416">Non-unique Mapping Standard Containers</a></dt><dt>22.9. <a href="policy_data_structures_design.html#fig.pbds_embedded_lists_2">

3623

Effect of embedded lists in

3624

<code class="classname">std::multimap</code>

3625

- </a></dt><dt>22.10. <a href="policy_data_structures_design.html#idp18023952">Non-unique Mapping Containers</a></dt><dt>22.11. <a href="policy_data_structures_design.html#idp18043824">Point Iterator Hierarchy</a></dt><dt>22.12. <a href="policy_data_structures_design.html#idp18057168">Invalidation Guarantee Tags Hierarchy</a></dt><dt>22.13. <a href="policy_data_structures_design.html#idp18087392">Container Tag Hierarchy</a></dt><dt>22.14. <a href="policy_data_structures_design.html#idp18127536">Hash functions, ranged-hash functions, and

3626

- range-hashing functions</a></dt><dt>22.15. <a href="policy_data_structures_design.html#idp18191968">Insert hash sequence diagram</a></dt><dt>22.16. <a href="policy_data_structures_design.html#idp18199024">Insert hash sequence diagram with a null policy</a></dt><dt>22.17. <a href="policy_data_structures_design.html#idp18215840">Hash policy class diagram</a></dt><dt>22.18. <a href="policy_data_structures_design.html#idp18234944">Balls and bins</a></dt><dt>22.19. <a href="policy_data_structures_design.html#idp18265728">Insert resize sequence diagram</a></dt><dt>22.20. <a href="policy_data_structures_design.html#idp18273504">Standard resize policy trigger sequence

3627

- diagram</a></dt><dt>22.21. <a href="policy_data_structures_design.html#idp18277664">Standard resize policy size sequence

3628

- diagram</a></dt><dt>22.22. <a href="policy_data_structures_design.html#idp18355696">Tree node invariants</a></dt><dt>22.23. <a href="policy_data_structures_design.html#idp18365136">Tree node invalidation</a></dt><dt>22.24. <a href="policy_data_structures_design.html#idp18378304">A tree and its update policy</a></dt><dt>22.25. <a href="policy_data_structures_design.html#idp18389968">Restoring node invariants</a></dt><dt>22.26. <a href="policy_data_structures_design.html#idp18398144">Insert update sequence</a></dt><dt>22.27. <a href="policy_data_structures_design.html#idp18420400">Useless update path</a></dt><dt>22.28. <a href="policy_data_structures_design.html#idp18465088">A PATRICIA trie</a></dt><dt>22.29. <a href="policy_data_structures_design.html#idp18475584">A trie and its update policy</a></dt><dt>22.30. <a href="policy_data_structures_design.html#idp18506160">A simple list</a></dt><dt>22.31. <a href="policy_data_structures_design.html#idp18511744">The counter algorithm</a></dt><dt>22.32. <a href="policy_data_structures_design.html#idp18575568">Underlying Priority-Queue Data-Structures.</a></dt><dt>22.33. <a href="policy_data_structures_design.html#idp18610544">Priority-Queue Data-Structure Tags.</a></dt><dt>B.1. <a href="appendix_porting.html#idp22035648">Configure and Build File Dependencies</a></dt></dl></div><div class="list-of-tables"><p><strong>List of Tables</strong></p><dl><dt>1.1. <a href="status.html#idp452240">C++ 1998/2003 Implementation Status</a></dt><dt>1.2. <a href="status.html#idp8670848">C++ 2011 Implementation Status</a></dt><dt>1.3. <a href="status.html#idp7483200">C++ TR1 Implementation Status</a></dt><dt>1.4. <a href="status.html#idp12559072">C++ TR 24733 Implementation Status</a></dt><dt>3.1. <a href="using.html#idp13051936">C++ Command Options</a></dt><dt>3.2. <a href="using_headers.html#idp13079360">C++ 1998 Library Headers</a></dt><dt>3.3. <a href="using_headers.html#idp13115840">C++ 1998 Library Headers for C Library Facilities</a></dt><dt>3.4. <a href="using_headers.html#idp13140576">C++ 2011 Library Headers</a></dt><dt>3.5. <a href="using_headers.html#idp13192016">C++ 2011 Library Headers for C Library Facilities</a></dt><dt>3.6. <a href="using_headers.html#idp13221904">C++ TR 1 Library Headers</a></dt><dt>3.7. <a href="using_headers.html#idp13238832">C++ TR 1 Library Headers for C Library Facilities</a></dt><dt>3.8. <a href="using_headers.html#idp13259904">C++ TR 24733 Decimal Floating-Point Header</a></dt><dt>3.9. <a href="using_headers.html#idp13265424">C++ ABI Headers</a></dt><dt>3.10. <a href="using_headers.html#idp13271824">Extension Headers</a></dt><dt>3.11. <a href="using_headers.html#idp13307552">Extension Debug Headers</a></dt><dt>3.12. <a href="using_headers.html#idp13322320">Extension Profile Headers</a></dt><dt>3.13. <a href="using_headers.html#idp13335696">Extension Parallel Headers</a></dt><dt>17.1. <a href="debug_mode_using.html#idp16490400">Debugging Containers</a></dt><dt>17.2. <a href="debug_mode_using.html#idp16535296">Debugging Containers C++11</a></dt><dt>18.1. <a href="parallel_mode_using.html#idp16725920">Parallel Algorithms</a></dt><dt>19.1. <a href="profile_mode_design.html#idp16981200">Profile Code Location</a></dt><dt>19.2. <a href="profile_mode_diagnostics.html#idp17088912">Profile Diagnostics</a></dt><dt>21.1. <a href="bitmap_allocator_impl.html#idp17500848">Bitmap Allocator Memory Map</a></dt><dt>B.1. <a href="documentation_hacking.html#idp22162432">Doxygen Prerequisites</a></dt><dt>B.2. <a href="documentation_hacking.html#idp22238096">HTML to Doxygen Markup Comparison</a></dt><dt>B.3. <a href="documentation_hacking.html#idp22257536">Docbook Prerequisites</a></dt><dt>B.4. <a href="documentation_hacking.html#idp22335040">HTML to Docbook XML Markup Comparison</a></dt><dt>B.5. <a href="documentation_hacking.html#idp22359184">Docbook XML Element Use</a></dt><dt>B.6. <a href="api.html#idp23030528">Extension Allocators</a></dt><dt>B.7. <a href="api.html#idp23058160">Extension Allocators Continued</a></dt></dl></div><div class="list-of-equations"><p><strong>List of Equations</strong></p><dl><dt>22.1. <a href="policy_data_structures_design.html#idp18141344">Ranged Hash Function</a></dt><dt>22.2. <a href="policy_data_structures_design.html#idp18147232">Range-Hashing, Division Method</a></dt><dt>22.3. <a href="policy_data_structures_design.html#idp18151744">Division via Prime Modulo</a></dt><dt>22.4. <a href="policy_data_structures_design.html#idp18153568">Division via Bit Mask</a></dt><dt>22.5. <a href="policy_data_structures_design.html#idp18163200">

3629

+ </a></dt><dt>22.10. <a href="policy_data_structures_design.html#idm269997506912">Non-unique Mapping Containers</a></dt><dt>22.11. <a href="policy_data_structures_design.html#idm269997487104">Point Iterator Hierarchy</a></dt><dt>22.12. <a href="policy_data_structures_design.html#idm269997473760">Invalidation Guarantee Tags Hierarchy</a></dt><dt>22.13. <a href="policy_data_structures_design.html#idm269997443664">Container Tag Hierarchy</a></dt><dt>22.14. <a href="policy_data_structures_design.html#idm269997403584">Hash functions, ranged-hash functions, and

3630

+ range-hashing functions</a></dt><dt>22.15. <a href="policy_data_structures_design.html#idm269997339216">Insert hash sequence diagram</a></dt><dt>22.16. <a href="policy_data_structures_design.html#idm269997332160">Insert hash sequence diagram with a null policy</a></dt><dt>22.17. <a href="policy_data_structures_design.html#idm269997315408">Hash policy class diagram</a></dt><dt>22.18. <a href="policy_data_structures_design.html#idm269997296368">Balls and bins</a></dt><dt>22.19. <a href="policy_data_structures_design.html#idm269997265648">Insert resize sequence diagram</a></dt><dt>22.20. <a href="policy_data_structures_design.html#idm269997257872">Standard resize policy trigger sequence

3631

+ diagram</a></dt><dt>22.21. <a href="policy_data_structures_design.html#idm269997253712">Standard resize policy size sequence

3632

+ diagram</a></dt><dt>22.22. <a href="policy_data_structures_design.html#idm269997175616">Tree node invariants</a></dt><dt>22.23. <a href="policy_data_structures_design.html#idm269997166176">Tree node invalidation</a></dt><dt>22.24. <a href="policy_data_structures_design.html#idm269997153072">A tree and its update policy</a></dt><dt>22.25. <a href="policy_data_structures_design.html#idm269997141408">Restoring node invariants</a></dt><dt>22.26. <a href="policy_data_structures_design.html#idm269997133232">Insert update sequence</a></dt><dt>22.27. <a href="policy_data_structures_design.html#idm269997110976">Useless update path</a></dt><dt>22.28. <a href="policy_data_structures_design.html#idm269997066288">A PATRICIA trie</a></dt><dt>22.29. <a href="policy_data_structures_design.html#idm269997055856">A trie and its update policy</a></dt><dt>22.30. <a href="policy_data_structures_design.html#idm269997025344">A simple list</a></dt><dt>22.31. <a href="policy_data_structures_design.html#idm269997019760">The counter algorithm</a></dt><dt>22.32. <a href="policy_data_structures_design.html#idm269996955920">Underlying Priority-Queue Data-Structures.</a></dt><dt>22.33. <a href="policy_data_structures_design.html#idm269996920880">Priority-Queue Data-Structure Tags.</a></dt><dt>B.1. <a href="appendix_porting.html#idm269993497120">Configure and Build File Dependencies</a></dt></dl></div><div class="list-of-tables"><p><strong>List of Tables</strong></p><dl><dt>1.1. <a href="status.html#idm270008034928">C++ 1998/2003 Implementation Status</a></dt><dt>1.2. <a href="status.html#idm270007982624">C++ 2011 Implementation Status</a></dt><dt>1.3. <a href="status.html#idm270006687472">C++ TR1 Implementation Status</a></dt><dt>1.4. <a href="status.html#idm270002960368">C++ TR 24733 Implementation Status</a></dt><dt>3.1. <a href="using.html#idm270002481088">C++ Command Options</a></dt><dt>3.2. <a href="using_headers.html#idm270002453792">C++ 1998 Library Headers</a></dt><dt>3.3. <a href="using_headers.html#idm270002417312">C++ 1998 Library Headers for C Library Facilities</a></dt><dt>3.4. <a href="using_headers.html#idm270002392576">C++ 2011 Library Headers</a></dt><dt>3.5. <a href="using_headers.html#idm270002341136">C++ 2011 Library Headers for C Library Facilities</a></dt><dt>3.6. <a href="using_headers.html#idm270002311248">C++ TR 1 Library Headers</a></dt><dt>3.7. <a href="using_headers.html#idm270002294320">C++ TR 1 Library Headers for C Library Facilities</a></dt><dt>3.8. <a href="using_headers.html#idm270002273248">C++ TR 24733 Decimal Floating-Point Header</a></dt><dt>3.9. <a href="using_headers.html#idm270002267728">C++ ABI Headers</a></dt><dt>3.10. <a href="using_headers.html#idm270002261328">Extension Headers</a></dt><dt>3.11. <a href="using_headers.html#idm270002225600">Extension Debug Headers</a></dt><dt>3.12. <a href="using_headers.html#idm270002210832">Extension Profile Headers</a></dt><dt>3.13. <a href="using_headers.html#idm270002197456">Extension Parallel Headers</a></dt><dt>17.1. <a href="debug_mode_using.html#idm269999040896">Debugging Containers</a></dt><dt>17.2. <a href="debug_mode_using.html#idm269998996000">Debugging Containers C++11</a></dt><dt>18.1. <a href="parallel_mode_using.html#idm269998805216">Parallel Algorithms</a></dt><dt>19.1. <a href="profile_mode_design.html#idm269998550064">Profile Code Location</a></dt><dt>19.2. <a href="profile_mode_diagnostics.html#idm269998442544">Profile Diagnostics</a></dt><dt>21.1. <a href="bitmap_allocator_impl.html#idm269998030352">Bitmap Allocator Memory Map</a></dt><dt>B.1. <a href="documentation_hacking.html#idm269993370272">Doxygen Prerequisites</a></dt><dt>B.2. <a href="documentation_hacking.html#idm269993294592">HTML to Doxygen Markup Comparison</a></dt><dt>B.3. <a href="documentation_hacking.html#idm269993275152">Docbook Prerequisites</a></dt><dt>B.4. <a href="documentation_hacking.html#idm269993197520">HTML to Docbook XML Markup Comparison</a></dt><dt>B.5. <a href="documentation_hacking.html#idm269993173376">Docbook XML Element Use</a></dt><dt>B.6. <a href="api.html#idm269992502096">Extension Allocators</a></dt><dt>B.7. <a href="api.html#idm269992474464">Extension Allocators Continued</a></dt></dl></div><div class="list-of-equations"><p><strong>List of Equations</strong></p><dl><dt>22.1. <a href="policy_data_structures_design.html#idm269997389776">Ranged Hash Function</a></dt><dt>22.2. <a href="policy_data_structures_design.html#idm269997383888">Range-Hashing, Division Method</a></dt><dt>22.3. <a href="policy_data_structures_design.html#idm269997379376">Division via Prime Modulo</a></dt><dt>22.4. <a href="policy_data_structures_design.html#idm269997377552">Division via Bit Mask</a></dt><dt>22.5. <a href="policy_data_structures_design.html#idm269997367984">

3633

A Standard String Hash Function

3634

- </a></dt><dt>22.6. <a href="policy_data_structures_design.html#idp18169344">

3635

+ </a></dt><dt>22.6. <a href="policy_data_structures_design.html#idm269997361840">

3636

Only k String DNA Hash

3637

- </a></dt><dt>22.7. <a href="policy_data_structures_design.html#idp18240448">

3638

+ </a></dt><dt>22.7. <a href="policy_data_structures_design.html#idm269997290864">

3639

Probability of Probe Sequence of Length k

3640

- </a></dt><dt>22.8. <a href="policy_data_structures_design.html#idp18247216">

3641

+ </a></dt><dt>22.8. <a href="policy_data_structures_design.html#idm269997284096">

3642

Probability Probe Sequence in Some Bin

3643

</a></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="../index.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="intro.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Part I.

3644

Introduction

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="numerics.html" title="Chapter 12. Numerics" /><link rel="prev" href="generalized_numeric_operations.html" title="Generalized Operations" /><link rel="next" href="io.html" title="Chapter 13. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="generalized_numeric_operations.html">Prev</a> </td><th width="60%" align="center">Chapter 12.

3652

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="numerics.html" title="Chapter 12. Numerics" /><link rel="prev" href="generalized_numeric_operations.html" title="Generalized Operations" /><link rel="next" href="io.html" title="Chapter 13. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="generalized_numeric_operations.html">Prev</a> </td><th width="60%" align="center">Chapter 12.

3653

Numerics

3654

3655

</th><td width="20%" align="right"> <a accesskey="n" href="io.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.numerics.c"></a>Interacting with C</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="numerics.c.array"></a>Numerics vs. Arrays</h3></div></div></div><p>One of the major reasons why FORTRAN can chew through numbers so well

3656

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3657

===================================================================

3658

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3661

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3662

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix D. GNU General Public License version 3</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /><link rel="next" href="appendix_gfdl.html" title="Appendix E. GNU Free Documentation License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix D.

3663

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix D. GNU General Public License version 3</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /><link rel="next" href="appendix_gfdl.html" title="Appendix E. GNU Free Documentation License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix D.

3664

<acronym class="acronym">GNU</acronym> General Public License version 3

3665

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_free.html">Prev</a> </td><th width="60%" align="center">Part IV.

3666

Appendices

3667

@@ -77,7 +77,7 @@

3668

</p><p>

3669

The precise terms and conditions for copying, distribution and modification

3670

follow.

3671

- </p><h2><a id="idp23466384"></a>

3672

+ </p><h2><a id="idm269992066368"></a>

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TERMS AND CONDITIONS

3674

</h2><h2><a id="gpl-3-definitions"></a>

3675

0. Definitions.

3676

@@ -618,7 +618,7 @@

3677

waiver of all civil liability in connection with the Program, unless a

3678

warranty or assumption of liability accompanies a copy of the Program in

3679

return for a fee.

3680

- </p><h2><a id="idp23565184"></a>

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+ </p><h2><a id="idm269991967568"></a>

3682

END OF TERMS AND CONDITIONS

3683

</h2><h2><a id="HowToApply"></a>

3684

How to Apply These Terms to Your New Programs

3685

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3686

===================================================================

3687

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3691

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Coding Style</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_organization.html" title="Directory Layout and Source Conventions" /><link rel="next" href="source_design_notes.html" title="Design Notes" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Coding Style</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_organization.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3692

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Coding Style</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_organization.html" title="Directory Layout and Source Conventions" /><link rel="next" href="source_design_notes.html" title="Design Notes" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Coding Style</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_organization.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3693

Contributing

3694

3695

</th><td width="20%" align="right"> <a accesskey="n" href="source_design_notes.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="contrib.coding_style"></a>Coding Style</h2></div></div></div><p>

3696

Index: libstdc++-v3/doc/html/manual/streambufs.html

3697

===================================================================

3698

--- a/src/libstdc++-v3/doc/html/manual/streambufs.html (.../tags/gcc_4_8_2_release)

3699

+++ b/src/libstdc++-v3/doc/html/manual/streambufs.html (.../branches/gcc-4_8-branch)

3700

@@ -1,5 +1,5 @@

3701

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3702

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Stream Buffers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="io.html" title="Chapter 13. Input and Output" /><link rel="next" href="stringstreams.html" title="Memory Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Stream Buffers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="io.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

3703

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Stream Buffers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="io.html" title="Chapter 13. Input and Output" /><link rel="next" href="stringstreams.html" title="Memory Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Stream Buffers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="io.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

3704

Input and Output

3705

3706

</th><td width="20%" align="right"> <a accesskey="n" href="stringstreams.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.streambufs"></a>Stream Buffers</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="io.streambuf.derived"></a>Derived streambuf Classes</h3></div></div></div><p>

3707

Index: libstdc++-v3/doc/html/manual/utilities.html

3708

===================================================================

3709

--- a/src/libstdc++-v3/doc/html/manual/utilities.html (.../tags/gcc_4_8_2_release)

3710

+++ b/src/libstdc++-v3/doc/html/manual/utilities.html (.../branches/gcc-4_8-branch)

3711

@@ -1,5 +1,5 @@

3712

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3713

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 6. Utilities</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="concept_checking.html" title="Concept Checking" /><link rel="next" href="pairs.html" title="Pairs" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 6.

3714

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 6. Utilities</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="concept_checking.html" title="Concept Checking" /><link rel="next" href="pairs.html" title="Pairs" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 6.

3715

Utilities

3716

3717

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="concept_checking.html">Prev</a> </td><th width="60%" align="center">Part II.

3718

@@ -6,8 +6,8 @@

3719

Standard Contents

3720

</th><td width="20%" align="right"> <a accesskey="n" href="pairs.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.util"></a>Chapter 6.

3721

Utilities

3722

- <a id="idp13862416" class="indexterm"></a>

3723

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp13920976">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idp13924528">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp13937824">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15512272">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idp15534784">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idp15542080">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp15556704">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15573056">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idp15576640">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.functors"></a>Functors</h2></div></div></div><p>If you don't know what functors are, you're not alone. Many people

3724

+ <a id="idm270001670464" class="indexterm"></a>

3725

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270001611968">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idm270001608416">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm270001595120">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270000019344">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999996832">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idm269999989536">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999974912">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm269999958496">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idm269999954912">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.functors"></a>Functors</h2></div></div></div><p>If you don't know what functors are, you're not alone. Many people

3726

get slightly the wrong idea. In the interest of not reinventing

3727

the wheel, we will refer you to the introduction to the functor

3728

concept written by SGI as part of their STL, in

3729

Index: libstdc++-v3/include/debug/functions.h

3730

===================================================================

3731

--- a/src/libstdc++-v3/include/debug/functions.h (.../tags/gcc_4_8_2_release)

3732

+++ b/src/libstdc++-v3/include/debug/functions.h (.../branches/gcc-4_8-branch)

3733

@@ -345,11 +345,13 @@

3734

return __check_sorted_set_aux(__first, __last, __pred, _SameType());

3735

}

3736

3737

+ // _GLIBCXX_RESOLVE_LIB_DEFECTS

3738

+ // 270. Binary search requirements overly strict

3739

+ // Determine if a sequence is partitioned w.r.t. this element.

3740

template<typename _ForwardIterator, typename _Tp>

3741

inline bool

3742

- __check_partitioned_lower_aux(_ForwardIterator __first,

3743

- _ForwardIterator __last, const _Tp& __value,

3744

- std::forward_iterator_tag)

3745

+ __check_partitioned_lower(_ForwardIterator __first,

3746

+ _ForwardIterator __last, const _Tp& __value)

3747

{

3748

while (__first != __last && *__first < __value)

3749

++__first;

3750

@@ -362,38 +364,11 @@

3751

return __first == __last;

3752

}

3753

3754

- // For performance reason, as the iterator range has been validated, check on

3755

- // random access safe iterators is done using the base iterator.

3756

- template<typename _Iterator, typename _Sequence, typename _Tp>

3757

- inline bool

3758

- __check_partitioned_lower_aux(

3759

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3760

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3761

- const _Tp& __value,

3762

- std::random_access_iterator_tag __tag)

3763

- {

3764

- return __check_partitioned_lower_aux(__first.base(), __last.base(),

3765

- __value, __tag);

3766

- }

3767

-

3768

- // _GLIBCXX_RESOLVE_LIB_DEFECTS

3769

- // 270. Binary search requirements overly strict

3770

- // Determine if a sequence is partitioned w.r.t. this element.

3771

template<typename _ForwardIterator, typename _Tp>

3772

inline bool

3773

- __check_partitioned_lower(_ForwardIterator __first,

3774

+ __check_partitioned_upper(_ForwardIterator __first,

3775

_ForwardIterator __last, const _Tp& __value)

3776

{

3777

- return __check_partitioned_lower_aux(__first, __last, __value,

3778

- std::__iterator_category(__first));

3779

- }

3780

-

3781

- template<typename _ForwardIterator, typename _Tp>

3782

- inline bool

3783

- __check_partitioned_upper_aux(_ForwardIterator __first,

3784

- _ForwardIterator __last, const _Tp& __value,

3785

- std::forward_iterator_tag)

3786

- {

3787

while (__first != __last && !(__value < *__first))

3788

++__first;

3789

if (__first != __last)

3790

@@ -405,35 +380,12 @@

3791

return __first == __last;

3792

}

3793

3794

- // For performance reason, as the iterator range has been validated, check on

3795

- // random access safe iterators is done using the base iterator.

3796

- template<typename _Iterator, typename _Sequence, typename _Tp>

3797

- inline bool

3798

- __check_partitioned_upper_aux(

3799

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3800

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3801

- const _Tp& __value,

3802

- std::random_access_iterator_tag __tag)

3803

- {

3804

- return __check_partitioned_upper_aux(__first.base(), __last.base(),

3805

- __value, __tag);

3806

- }

3807

-

3808

- template<typename _ForwardIterator, typename _Tp>

3809

- inline bool

3810

- __check_partitioned_upper(_ForwardIterator __first,

3811

- _ForwardIterator __last, const _Tp& __value)

3812

- {

3813

- return __check_partitioned_upper_aux(__first, __last, __value,

3814

- std::__iterator_category(__first));

3815

- }

3816

-

3817

+ // Determine if a sequence is partitioned w.r.t. this element.

3818

template<typename _ForwardIterator, typename _Tp, typename _Pred>

3819

inline bool

3820

- __check_partitioned_lower_aux(_ForwardIterator __first,

3821

- _ForwardIterator __last, const _Tp& __value,

3822

- _Pred __pred,

3823

- std::forward_iterator_tag)

3824

+ __check_partitioned_lower(_ForwardIterator __first,

3825

+ _ForwardIterator __last, const _Tp& __value,

3826

+ _Pred __pred)

3827

{

3828

while (__first != __last && bool(__pred(*__first, __value)))

3829

++__first;

3830

@@ -446,39 +398,12 @@

3831

return __first == __last;

3832

}

3833

3834

- // For performance reason, as the iterator range has been validated, check on

3835

- // random access safe iterators is done using the base iterator.

3836

- template<typename _Iterator, typename _Sequence,

3837

- typename _Tp, typename _Pred>

3838

- inline bool

3839

- __check_partitioned_lower_aux(

3840

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3841

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3842

- const _Tp& __value, _Pred __pred,

3843

- std::random_access_iterator_tag __tag)

3844

- {

3845

- return __check_partitioned_lower_aux(__first.base(), __last.base(),

3846

- __value, __pred, __tag);

3847

- }

3848

-

3849

- // Determine if a sequence is partitioned w.r.t. this element.

3850

template<typename _ForwardIterator, typename _Tp, typename _Pred>

3851

inline bool

3852

- __check_partitioned_lower(_ForwardIterator __first,

3853

+ __check_partitioned_upper(_ForwardIterator __first,

3854

_ForwardIterator __last, const _Tp& __value,

3855

_Pred __pred)

3856

{

3857

- return __check_partitioned_lower_aux(__first, __last, __value, __pred,

3858

- std::__iterator_category(__first));

3859

- }

3860

-

3861

- template<typename _ForwardIterator, typename _Tp, typename _Pred>

3862

- inline bool

3863

- __check_partitioned_upper_aux(_ForwardIterator __first,

3864

- _ForwardIterator __last, const _Tp& __value,

3865

- _Pred __pred,

3866

- std::forward_iterator_tag)

3867

- {

3868

while (__first != __last && !bool(__pred(__value, *__first)))

3869

++__first;

3870

if (__first != __last)

3871

@@ -490,31 +415,6 @@

3872

return __first == __last;

3873

}

3874

3875

- // For performance reason, as the iterator range has been validated, check on

3876

- // random access safe iterators is done using the base iterator.

3877

- template<typename _Iterator, typename _Sequence,

3878

- typename _Tp, typename _Pred>

3879

- inline bool

3880

- __check_partitioned_upper_aux(

3881

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3882

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3883

- const _Tp& __value, _Pred __pred,

3884

- std::random_access_iterator_tag __tag)

3885

- {

3886

- return __check_partitioned_upper_aux(__first.base(), __last.base(),

3887

- __value, __pred, __tag);

3888

- }

3889

-

3890

- template<typename _ForwardIterator, typename _Tp, typename _Pred>

3891

- inline bool

3892

- __check_partitioned_upper(_ForwardIterator __first,

3893

- _ForwardIterator __last, const _Tp& __value,

3894

- _Pred __pred)

3895

- {

3896

- return __check_partitioned_upper_aux(__first, __last, __value, __pred,

3897

- std::__iterator_category(__first));

3898

- }

3899

-

3900

// Helper struct to detect random access safe iterators.

3901

template<typename _Iterator>

3902

struct __is_safe_random_iterator

3903

Index: libstdc++-v3/include/debug/safe_unordered_base.h

3904

===================================================================

3905

--- a/src/libstdc++-v3/include/debug/safe_unordered_base.h (.../tags/gcc_4_8_2_release)

3906

+++ b/src/libstdc++-v3/include/debug/safe_unordered_base.h (.../branches/gcc-4_8-branch)

3907

@@ -133,9 +133,19 @@

3908

protected:

3909

// Initialize with a version number of 1 and no iterators

3910

_Safe_unordered_container_base()

3911

- : _M_local_iterators(0), _M_const_local_iterators(0)

3912

+ : _M_local_iterators(nullptr), _M_const_local_iterators(nullptr)

3913

{ }

3914

3915

+ // Initialize with a version number of 1 and no iterators

3916

+ _Safe_unordered_container_base(const _Safe_unordered_container_base&)

3917

+ noexcept

3918

+ : _Safe_unordered_container_base() { }

3919

+

3920

+ _Safe_unordered_container_base(_Safe_unordered_container_base&& __x)

3921

+ noexcept

3922

+ : _Safe_unordered_container_base()

3923

+ { this->_M_swap(__x); }

3924

+

3925

/** Notify all iterators that reference this container that the

3926

container is being destroyed. */

3927

~_Safe_unordered_container_base()

3928

Index: libstdc++-v3/include/debug/macros.h

3929

===================================================================

3930

--- a/src/libstdc++-v3/include/debug/macros.h (.../tags/gcc_4_8_2_release)

3931

+++ b/src/libstdc++-v3/include/debug/macros.h (.../branches/gcc-4_8-branch)

3932

@@ -261,8 +261,9 @@

3933

w.r.t. the value _Value. */

3934

#define __glibcxx_check_partitioned_lower(_First,_Last,_Value) \

3935

__glibcxx_check_valid_range(_First,_Last); \

3936

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower(_First, _Last, \

3937

- _Value), \

3938

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower( \

3939

+ __gnu_debug::__base(_First), \

3940

+ __gnu_debug::__base(_Last), _Value), \

3941

_M_message(__gnu_debug::__msg_unpartitioned) \

3942

._M_iterator(_First, #_First) \

3943

._M_iterator(_Last, #_Last) \

3944

@@ -270,8 +271,9 @@

3945

3946

#define __glibcxx_check_partitioned_upper(_First,_Last,_Value) \

3947

__glibcxx_check_valid_range(_First,_Last); \

3948

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper(_First, _Last, \

3949

- _Value), \

3950

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper( \

3951

+ __gnu_debug::__base(_First), \

3952

+ __gnu_debug::__base(_Last), _Value), \

3953

_M_message(__gnu_debug::__msg_unpartitioned) \

3954

._M_iterator(_First, #_First) \

3955

._M_iterator(_Last, #_Last) \

3956

@@ -281,8 +283,9 @@

3957

w.r.t. the value _Value and predicate _Pred. */

3958

#define __glibcxx_check_partitioned_lower_pred(_First,_Last,_Value,_Pred) \

3959

__glibcxx_check_valid_range(_First,_Last); \

3960

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower(_First, _Last, \

3961

- _Value, _Pred), \

3962

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower( \

3963

+ __gnu_debug::__base(_First), \

3964

+ __gnu_debug::__base(_Last), _Value, _Pred), \

3965

_M_message(__gnu_debug::__msg_unpartitioned_pred) \

3966

._M_iterator(_First, #_First) \

3967

._M_iterator(_Last, #_Last) \

3968

@@ -293,8 +296,9 @@

3969

w.r.t. the value _Value and predicate _Pred. */

3970

#define __glibcxx_check_partitioned_upper_pred(_First,_Last,_Value,_Pred) \

3971

__glibcxx_check_valid_range(_First,_Last); \

3972

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper(_First, _Last, \

3973

- _Value, _Pred), \

3974

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper( \

3975

+ __gnu_debug::__base(_First), \

3976

+ __gnu_debug::__base(_Last), _Value, _Pred), \

3977

_M_message(__gnu_debug::__msg_unpartitioned_pred) \

3978

._M_iterator(_First, #_First) \

3979

._M_iterator(_Last, #_Last) \

3980

Index: libstdc++-v3/include/std/future

3981

===================================================================

3982

--- a/src/libstdc++-v3/include/std/future (.../tags/gcc_4_8_2_release)

3983

+++ b/src/libstdc++-v3/include/std/future (.../branches/gcc-4_8-branch)

3984

@@ -1261,9 +1261,11 @@

3985

struct __future_base::_Task_state<_Fn, _Alloc, _Res(_Args...)> final

3986

: __future_base::_Task_state_base<_Res(_Args...)>

3987

{

3988

- _Task_state(_Fn&& __fn, const _Alloc& __a)

3989

- : _Task_state_base<_Res(_Args...)>(__a), _M_impl(std::move(__fn), __a)

3990

- { }

3991

+ template<typename _Fn2>

3992

+ _Task_state(_Fn2&& __fn, const _Alloc& __a)

3993

+ : _Task_state_base<_Res(_Args...)>(__a),

3994

+ _M_impl(std::forward<_Fn2>(__fn), __a)

3995

+ { }

3996

3997

private:

3998

virtual void

3999

@@ -1292,19 +1294,21 @@

4000

4001

struct _Impl : _Alloc

4002

{

4003

- _Impl(_Fn&& __fn, const _Alloc& __a)

4004

- : _Alloc(__a), _M_fn(std::move(__fn)) { }

4005

+ template<typename _Fn2>

4006

+ _Impl(_Fn2&& __fn, const _Alloc& __a)

4007

+ : _Alloc(__a), _M_fn(std::forward<_Fn2>(__fn)) { }

4008

_Fn _M_fn;

4009

} _M_impl;

4010

};

4011

4012

- template<typename _Signature, typename _Fn, typename _Alloc>

4013

- static shared_ptr<__future_base::_Task_state_base<_Signature>>

4014

- __create_task_state(_Fn&& __fn, const _Alloc& __a)

4015

- {

4016

- typedef __future_base::_Task_state<_Fn, _Alloc, _Signature> _State;

4017

- return std::allocate_shared<_State>(__a, std::move(__fn), __a);

4018

- }

4019

+ template<typename _Signature, typename _Fn, typename _Alloc>

4020

+ static shared_ptr<__future_base::_Task_state_base<_Signature>>

4021

+ __create_task_state(_Fn&& __fn, const _Alloc& __a)

4022

+ {

4023

+ typedef typename decay<_Fn>::type _Fn2;

4024

+ typedef __future_base::_Task_state<_Fn2, _Alloc, _Signature> _State;

4025

+ return std::allocate_shared<_State>(__a, std::forward<_Fn>(__fn), __a);

4026

+ }

4027

4028

template<typename _Fn, typename _Alloc, typename _Res, typename... _Args>

4029

shared_ptr<__future_base::_Task_state_base<_Res(_Args...)>>

4030

@@ -1344,7 +1348,8 @@

4031

__constrain_pkgdtask<packaged_task, _Fn>::__type>

4032

explicit

4033

packaged_task(_Fn&& __fn)

4034

- : packaged_task(allocator_arg, std::allocator<int>(), std::move(__fn))

4035

+ : packaged_task(allocator_arg, std::allocator<int>(),

4036

+ std::forward<_Fn>(__fn))

4037

{ }

4038

4039

// _GLIBCXX_RESOLVE_LIB_DEFECTS

4040

Index: libstdc++-v3/include/bits/atomic_base.h

4041

===================================================================

4042

--- a/src/libstdc++-v3/include/bits/atomic_base.h (.../tags/gcc_4_8_2_release)

4043

+++ b/src/libstdc++-v3/include/bits/atomic_base.h (.../branches/gcc-4_8-branch)

4044

@@ -764,11 +764,11 @@

4045

4046

bool

4047

is_lock_free() const noexcept

4048

- { return __atomic_is_lock_free(_M_type_size(1), nullptr); }

4049

+ { return __atomic_is_lock_free(sizeof(__pointer_type), nullptr); }

4050

4051

bool

4052

is_lock_free() const volatile noexcept

4053

- { return __atomic_is_lock_free(_M_type_size(1), nullptr); }

4054

+ { return __atomic_is_lock_free(sizeof(__pointer_type), nullptr); }

4055

4056

void

4057

store(__pointer_type __p,

4058

Index: libstdc++-v3/include/bits/stl_vector.h

4059

===================================================================

4060

--- a/src/libstdc++-v3/include/bits/stl_vector.h (.../tags/gcc_4_8_2_release)

4061

+++ b/src/libstdc++-v3/include/bits/stl_vector.h (.../branches/gcc-4_8-branch)

4062

@@ -1361,7 +1361,8 @@

4063

void

4064

_M_move_assign(vector&& __x, std::true_type) noexcept

4065

{

4066

- const vector __tmp(std::move(*this));

4067

+ vector __tmp(get_allocator());

4068

+ this->_M_impl._M_swap_data(__tmp._M_impl);

4069

this->_M_impl._M_swap_data(__x._M_impl);

4070

if (_Alloc_traits::_S_propagate_on_move_assign())

4071

std::__alloc_on_move(_M_get_Tp_allocator(),

4072

Index: libstdc++-v3/include/bits/stl_algo.h

4073

===================================================================

4074

--- a/src/libstdc++-v3/include/bits/stl_algo.h (.../tags/gcc_4_8_2_release)

4075

+++ b/src/libstdc++-v3/include/bits/stl_algo.h (.../branches/gcc-4_8-branch)

4076

@@ -2279,7 +2279,7 @@

4077

_RandomAccessIterator __last)

4078

{

4079

_RandomAccessIterator __mid = __first + (__last - __first) / 2;

4080

- std::__move_median_to_first(__first, __first + 1, __mid, (__last - 2));

4081

+ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1);

4082

return std::__unguarded_partition(__first + 1, __last, *__first);

4083

}

4084

4085

@@ -2291,7 +2291,7 @@

4086

_RandomAccessIterator __last, _Compare __comp)

4087

{

4088

_RandomAccessIterator __mid = __first + (__last - __first) / 2;

4089

- std::__move_median_to_first(__first, __first + 1, __mid, (__last - 2),

4090

+ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1,

4091

__comp);

4092

return std::__unguarded_partition(__first + 1, __last, *__first, __comp);

4093

}

4094

Index: libstdc++-v3/include/bits/shared_ptr_base.h

4095

===================================================================

4096

--- a/src/libstdc++-v3/include/bits/shared_ptr_base.h (.../tags/gcc_4_8_2_release)

4097

+++ b/src/libstdc++-v3/include/bits/shared_ptr_base.h (.../branches/gcc-4_8-branch)

4098

@@ -233,7 +233,7 @@

4099

_M_add_ref_lock()

4100

{

4101

// Perform lock-free add-if-not-zero operation.

4102

- _Atomic_word __count = _M_use_count;

4103

+ _Atomic_word __count = _M_get_use_count();

4104

do

4105

{

4106

if (__count == 0)

4107

@@ -391,7 +391,7 @@

4108

public:

4109

template<typename... _Args>

4110

_Sp_counted_ptr_inplace(_Alloc __a, _Args&&... __args)

4111

- : _M_impl(__a), _M_storage()

4112

+ : _M_impl(__a)

4113

{

4114

_M_impl._M_ptr = static_cast<_Tp*>(static_cast<void*>(&_M_storage));

4115

// _GLIBCXX_RESOLVE_LIB_DEFECTS

4116

@@ -819,7 +819,7 @@

4117

: _M_ptr(__r.get()), _M_refcount()

4118

{

4119

__glibcxx_function_requires(_ConvertibleConcept<_Tp1*, _Tp*>)

4120

- auto __tmp = std::__addressof(*__r.get());

4121

+ auto __tmp = __r.get();

4122

_M_refcount = __shared_count<_Lp>(std::move(__r));

4123

__enable_shared_from_this_helper(_M_refcount, __tmp, __tmp);

4124

}

4125

Index: libstdc++-v3/include/c_global/cstdio

4126

===================================================================

4127

--- a/src/libstdc++-v3/include/c_global/cstdio (.../tags/gcc_4_8_2_release)

4128

+++ b/src/libstdc++-v3/include/c_global/cstdio (.../branches/gcc-4_8-branch)

4129

@@ -69,6 +69,7 @@

4130

#undef ftell

4131

#undef fwrite

4132

#undef getc

4133

+#undef getchar

4134

#undef gets

4135

#undef perror

4136

#undef printf

4137

Index: libstdc++-v3/ChangeLog

4138

===================================================================

4139

--- a/src/libstdc++-v3/ChangeLog (.../tags/gcc_4_8_2_release)

4140

+++ b/src/libstdc++-v3/ChangeLog (.../branches/gcc-4_8-branch)

4141

@@ -1,3 +1,172 @@

4142

+2012-04-05 Dominique d'Humieres <dominiq@lps.ens.fr>

4143

+ Jack Howarth <howarth@bromo.med.uc.edu>

4144

+

4145

+ PR target/54407

4146

+ * 30_threads/condition_variable/54185.cc: Skip for darwin < 11.

4147

+

4148

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

4149

+

4150

+ Backport from mainline

4151

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

4152

+

4153

+ * configure: Regenerate.

4154

+

4155

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

4156

+

4157

+ Backport from mainline r204808:

4158

+

4159

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

4160

+

4161

+ * scripts/extract_symvers.in: Ignore <localentry: > fields

4162

+ in readelf --symbols output.

4163

+

4164

+2014-03-26 Jonathan Wakely <jwakely@redhat.com>

4165

+

4166

+ PR libstdc++/59548

4167

+ * include/debug/safe_unordered_base.h (_Safe_unordered_container_base):

4168

+ Define copy and move constructors that handle iterators correctly.

4169

+ * testsuite/23_containers/unordered_map/59548.cc: New.

4170

+

4171

+2014-03-25 Jonathan Wakely <jwakely@redhat.com>

4172

+

4173

+ PR libstdc++/60658

4174

+ * include/bits/atomic_base.h (__atomic_base<_PTp*>::is_lock_free()):

4175

+ Use sizeof pointer type not the element type.

4176

+ * testsuite/29_atomics/atomic/60658.cc: New.

4177

+

4178

+2014-03-18 Jonathan Wakely <jwakely@redhat.com>

4179

+

4180

+ PR libstdc++/60564

4181

+ * include/std/future (__future_base::_Task_state<>): Change

4182

+ constructors to template functions using perfect forwarding.

4183

+ (__create_task_state): Use decayed type as stored task.

4184

+ (packaged_task::packaged_task(_Fn&&)): Forward instead of moving.

4185

+ * testsuite/30_threads/packaged_task/60564.cc: New.

4186

+

4187

+2014-03-12 Roland McGrath <mcgrathr@google.com>

4188

+ Mark Seaborn <mseaborn@google.com>

4189

+

4190

+ PR libstdc++/59392

4191

+ * libsupc++/eh_call.cc (__cxa_call_unexpected): Call __do_catch with

4192

+ the address of a null pointer, not with a null pointer to pointer.

4193

+ Copy comment for this case from eh_personality.cc:__cxa_call_unexpected.

4194

+ * testsuite/18_support/bad_exception/59392.cc: New file.

4195

+

4196

+2014-03-11 Jonathan Wakely <jwakely@redhat.com>

4197

+

4198

+ Backport from mainline.

4199

+ 2014-01-09 Jonathan Wakely <jwakely@redhat.com>

4200

+

4201

+ PR libstdc++/59680

4202

+ * src/c++11/thread.cc (__sleep_for): Fix call to ::sleep.

4203

+

4204

+2014-03-11 Jonathan Wakely <jwakely@redhat.com>

4205

+

4206

+ Backport from mainline.

4207

+ 2014-01-27 Jonathan Wakely <jwakely@redhat.com>

4208

+

4209

+ PR libstdc++/59215

4210

+ * include/bits/shared_ptr_base.h

4211

+ (_Sp_counted_base<_S_atomic>::_M_add_ref_lock()): Use relaxed atomic

4212

+ load.

4213

+

4214

+2014-03-11 Jonathan Wakely <jwakely@redhat.com>

4215

+

4216

+ Backport from mainline.

4217

+

4218

+ 2014-01-09 Jonathan Wakely <jwakely@redhat.com>

4219

+

4220

+ PR libstdc++/59738

4221

+ * include/bits/stl_vector.h (vector<>::_M_move_assign): Restore

4222

+ support for non-Movable types.

4223

+

4224

+ 2014-01-08 François Dumont <fdumont@gcc.gnu.org>

4225

+

4226

+ * include/bits/stl_vector.h (std::vector<>::_M_move_assign): Pass

4227

+ *this allocator instance when building temporary vector instance

4228

+ so that *this allocator does not get moved.

4229

+ * testsuite/23_containers/vector/allocator/move.cc (test01): Add

4230

+ check on a vector iterator.

4231

+ * testsuite/23_containers/vector/allocator/move_assign.cc

4232

+ (test02): Likewise.

4233

+ (test03): New, test with a non-propagating allocator.

4234

+

4235

+ 2013-11-15 Jonathan Wakely <jwakely.gcc@gmail.com>

4236

+

4237

+ * testsuite/23_containers/vector/allocator/move.cc: New

4238

+

4239

+2014-01-27 Jason Merrill <jason@redhat.com>

4240

+

4241

+ Core DR 475

4242

+ PR c++/41174

4243

+ PR c++/59224

4244

+ * libsupc++/eh_throw.cc (__cxa_throw): Set uncaughtExceptions.

4245

+ * libsupc++/eh_alloc.cc (__cxa_allocate_dependent_exception)

4246

+ (__cxa_allocate_exception): Don't set it here.

4247

+

4248

+2013-12-15 H.J. Lu <hongjiu.lu@intel.com>

4249

+

4250

+ * config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Update.

4251

+

4252

+2013-11-22 Jonathan Wakely <jwakely.gcc@gmail.com>

4253

+

4254

+ * acinclude.m4 (libtool_VERSION): Bump.

4255

+ * configure: Regenerate.

4256

+ * doc/xml/manual/abi.xml: Update version information.

4257

+

4258

+2013-11-05 Jonathan Wakely <jwakely.gcc@gmail.com>

4259

+

4260

+ * doc/xml/manual/status_cxx2011.xml: Document aligned_union as

4261

+ missing.

4262

+

4263

+ * doc/xml/manual/spine.xml: Update copyright years.

4264

+ * doc/html/*: Regenerate.

4265

+

4266

+2013-11-01 Paolo Carlini <paolo.carlini@oracle.com>

4267

+

4268

+ PR libstdc++/58952

4269

+ * include/c_global/cstdio: Undef getchar.

4270

+

4271

+2013-10-31 Jonathan Wakely <jwakely.gcc@gmail.com>

4272

+

4273

+ * testsuite/20_util/shared_ptr/cons/58839.cc: Do not use

4274

+ default_delete<void>.

4275

+

4276

+2013-10-30 Chris Studholme <cvs@cs.utoronto.ca>

4277

+

4278

+ PR libstdc++/58912

4279

+ * include/bits/shared_ptr_base.h (_Sp_counted_ptr_inplace): Remove

4280

+ unnecessary initialization of storage buffer.

4281

+

4282

+2013-10-29 Jonathan Wakely <jwakely.gcc@gmail.com>

4283

+

4284

+ PR libstdc++/58839

4285

+ * include/bits/shared_ptr_base.h

4286

+ (__shared_ptr<T>::__shared_ptr(unique_ptr<U,D>&&)): Do not dereference

4287

+ pointer.

4288

+ * testsuite/20_util/shared_ptr/cons/58839.cc: New.

4289

+

4290

+2013-10-20 Chris Jefferson <chris@bubblescope.net>

4291

+ Paolo Carlini <paolo.carlini@oracle.com>

4292

+

4293

+ PR libstdc++/58800

4294

+ * include/bits/stl_algo.h (__unguarded_partition_pivot): Change

4295

+ __last - 2 to __last - 1.

4296

+ * testsuite/25_algorithms/nth_element/58800.cc: New

4297

+

4298

+2013-10-16 François Dumont <fdumont@gcc.gnu.org>

4299

+

4300

+ PR libstdc++/58191

4301

+ * include/debug/macros.h (__glibcxx_check_partitioned_lower): Add

4302

+ __gnu_debug::__base calls on iterators passed to internal debug

4303

+ check.

4304

+ (__glibcxx_check_partitioned_lower_pred): Likewise.

4305

+ (__glibcxx_check_partitioned_upper): Likewise.

4306

+ (__glibcxx_check_partitioned_upper_pred): Likewise.

4307

+ * include/debug/functions.h (__check_partitioned_lower):

4308

+ Remove code to detect safe iterators.

4309

+ (__check_partitioned_upper): Likewise.

4310

+

4311

2013-10-16 Release Manager

4312

4313

* GCC 4.8.2 released.

4314

Index: libstdc++-v3/libsupc++/eh_call.cc

4315

===================================================================

4316

--- a/src/libstdc++-v3/libsupc++/eh_call.cc (.../tags/gcc_4_8_2_release)

4317

+++ b/src/libstdc++-v3/libsupc++/eh_call.cc (.../branches/gcc-4_8-branch)

4318

@@ -104,14 +104,14 @@

4319

} end_catch_protect_obj;

4320

4321

4322

- __try

4323

- {

4324

+ __try

4325

+ {

4326

if (foreign_exception)

4327

std::unexpected();

4328

else

4329

__unexpected(unexpectedHandler);

4330

}

4331

- __catch(...)

4332

+ __catch(...)

4333

{

4334

/* See if the new exception matches the rtti list. */

4335

if (foreign_exception)

4336

@@ -140,15 +140,19 @@

4337

&new_ptr) != ctm_failed)

4338

__throw_exception_again;

4339

4340

- if (catch_type->__do_catch(&bad_exc, 0, 1))

4341

+ // If the exception spec allows std::bad_exception, throw that.

4342

+ // We don't have a thrown object to compare against, but since

4343

+ // bad_exception doesn't have virtual bases, that's OK; just pass NULL.

4344

+ void* obj = NULL;

4345

+ if (catch_type->__do_catch(&bad_exc, &obj, 1))

4346

bad_exception_allowed = true;

4347

}

4348

4349

// If the exception spec allows std::bad_exception, throw that.

4350

-#ifdef __EXCEPTIONS

4351

+#ifdef __EXCEPTIONS

4352

if (bad_exception_allowed)

4353

throw std::bad_exception();

4354

-#endif

4355

+#endif

4356

4357

// Otherwise, die.

4358

__terminate(terminateHandler);

4359

Index: libstdc++-v3/libsupc++/eh_alloc.cc

4360

===================================================================

4361

--- a/src/libstdc++-v3/libsupc++/eh_alloc.cc (.../tags/gcc_4_8_2_release)

4362

+++ b/src/libstdc++-v3/libsupc++/eh_alloc.cc (.../branches/gcc-4_8-branch)

4363

@@ -129,12 +129,6 @@

4364

std::terminate ();

4365

}

4366

4367

- // We have an uncaught exception as soon as we allocate memory. This

4368

- // yields uncaught_exception() true during the copy-constructor that

4369

- // initializes the exception object. See Issue 475.

4370

- __cxa_eh_globals *globals = __cxa_get_globals ();

4371

- globals->uncaughtExceptions += 1;

4372

-

4373

memset (ret, 0, sizeof (__cxa_refcounted_exception));

4374

4375

return (void *)((char *)ret + sizeof (__cxa_refcounted_exception));

4376

@@ -191,12 +185,6 @@

4377

std::terminate ();

4378

}

4379

4380

- // We have an uncaught exception as soon as we allocate memory. This

4381

- // yields uncaught_exception() true during the copy-constructor that

4382

- // initializes the exception object. See Issue 475.

4383

- __cxa_eh_globals *globals = __cxa_get_globals ();

4384

- globals->uncaughtExceptions += 1;

4385

-

4386

memset (ret, 0, sizeof (__cxa_dependent_exception));

4387

4388

return ret;

4389

Index: libstdc++-v3/libsupc++/eh_throw.cc

4390

===================================================================

4391

--- a/src/libstdc++-v3/libsupc++/eh_throw.cc (.../tags/gcc_4_8_2_release)

4392

+++ b/src/libstdc++-v3/libsupc++/eh_throw.cc (.../branches/gcc-4_8-branch)

4393

@@ -62,6 +62,9 @@

4394

{

4395

PROBE2 (throw, obj, tinfo);

4396

4397

+ __cxa_eh_globals *globals = __cxa_get_globals ();

4398

+ globals->uncaughtExceptions += 1;

4399

+

4400

// Definitely a primary.

4401

__cxa_refcounted_exception *header

4402

= __get_refcounted_exception_header_from_obj (obj);

4403

Index: libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc

4404

===================================================================

4405

--- a/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc (.../tags/gcc_4_8_2_release)

4406

+++ b/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc (.../branches/gcc-4_8-branch)

4407

@@ -0,0 +1,52 @@

4408

4409

+//

4410

+// This file is part of the GNU ISO C++ Library. This library is free

4411

+// software; you can redistribute it and/or modify it under the

4412

+// terms of the GNU General Public License as published by the

4413

+// Free Software Foundation; either version 3, or (at your option)

4414

+// any later version.

4415

+

4416

+// This library is distributed in the hope that it will be useful,

4417

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4418

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4419

+// GNU General Public License for more details.

4420

+

4421

+// You should have received a copy of the GNU General Public License along

4422

+// with this library; see the file COPYING3. If not see

4423

+// <http://www.gnu.org/licenses/>.

4424

+

4425

+// 25.3.2 [lib.alg.nth.element]

4426

+

4427

+// { dg-options "-std=gnu++11" }

4428

+

4429

+#include <algorithm>

4430

+#include <testsuite_hooks.h>

4431

+#include <testsuite_iterators.h>

4432

+

4433

+using __gnu_test::test_container;

4434

+using __gnu_test::random_access_iterator_wrapper;

4435

+

4436

+typedef test_container<int, random_access_iterator_wrapper> Container;

4437

+

4438

+void test01()

4439

+{

4440

+ std::vector<int> v = {

4441

+ 207089,

4442

+ 202585,

4443

+ 180067,

4444

+ 157549,

4445

+ 211592,

4446

+ 216096,

4447

+ 207089

4448

+ };

4449

+

4450

+ Container con(v.data(), v.data() + 7);

4451

+

4452

+ std::nth_element(con.begin(), con.begin() + 3, con.end());

4453

+}

4454

+

4455

+int main()

4456

+{

4457

+ test01();

4458

+ return 0;

4459

+}

4460

Index: libstdc++-v3/testsuite/18_support/bad_exception/59392.cc

4461

===================================================================

4462

--- a/src/libstdc++-v3/testsuite/18_support/bad_exception/59392.cc (.../tags/gcc_4_8_2_release)

4463

+++ b/src/libstdc++-v3/testsuite/18_support/bad_exception/59392.cc (.../branches/gcc-4_8-branch)

4464

@@ -0,0 +1,51 @@

4465

4466

+//

4467

+// This file is part of the GNU ISO C++ Library. This library is free

4468

+// software; you can redistribute it and/or modify it under the

4469

+// terms of the GNU General Public License as published by the

4470

+// Free Software Foundation; either version 3, or (at your option)

4471

+// any later version.

4472

+

4473

+// This library is distributed in the hope that it will be useful,

4474

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4475

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4476

+// GNU General Public License for more details.

4477

+

4478

+// You should have received a copy of the GNU General Public License along

4479

+// with this library; see the file COPYING3. If not see

4480

+// <http://www.gnu.org/licenses/>.

4481

+

4482

+#include <exception>

4483

+#include <cstdlib>

4484

+

4485

+class expected {};

4486

+class unexpected {};

4487

+class from_handler {};

4488

+

4489

+static void func_with_exception_spec() throw(expected)

4490

+{

4491

+ throw unexpected();

4492

+}

4493

+

4494

+static void unexpected_handler()

4495

+{

4496

+ throw from_handler();

4497

+}

4498

+

4499

+static void terminate_handler()

4500

+{

4501

+ exit(0);

4502

+}

4503

+

4504

+// libstdc++/59392

4505

+int main()

4506

+{

4507

+ std::set_unexpected(unexpected_handler);

4508

+ std::set_terminate(terminate_handler);

4509

+ try {

4510

+ func_with_exception_spec();

4511

+ } catch (expected&) {

4512

+ abort();

4513

+ }

4514

+ abort();

4515

+}

4516

4517

Property changes on: libstdc++-v3/testsuite/18_support/bad_exception/59392.cc

4518

___________________________________________________________________

4519

Added: svn:eol-style

4520

## -0,0 +1 ##

4521

+LF

4522

\ No newline at end of property

4523

Index: libstdc++-v3/testsuite/30_threads/packaged_task/60564.cc

4524

===================================================================

4525

--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/60564.cc (.../tags/gcc_4_8_2_release)

4526

+++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/60564.cc (.../branches/gcc-4_8-branch)

4527

@@ -0,0 +1,51 @@

4528

+// { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } }

4529

+// { dg-options " -std=gnu++11 -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* powerpc-ibm-aix* } }

4530

+// { dg-options " -std=gnu++11 -pthreads" { target *-*-solaris* } }

4531

+// { dg-options " -std=gnu++11 " { target *-*-cygwin *-*-darwin* } }

4532

+// { dg-require-cstdint "" }

4533

+// { dg-require-gthreads "" }

4534

+// { dg-require-atomic-builtins "" }

4535

+

4536

4537

+//

4538

+// This file is part of the GNU ISO C++ Library. This library is free

4539

+// software; you can redistribute it and/or modify it under the

4540

+// terms of the GNU General Public License as published by the

4541

+// Free Software Foundation; either version 3, or (at your option)

4542

+// any later version.

4543

+

4544

+// This library is distributed in the hope that it will be useful,

4545

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4546

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4547

+// GNU General Public License for more details.

4548

+

4549

+// You should have received a copy of the GNU General Public License along

4550

+// with this library; see the file COPYING3. If not see

4551

+// <http://www.gnu.org/licenses/>.

4552

+

4553

+

4554

+#include <future>

4555

+#include <testsuite_hooks.h>

4556

+

4557

+struct X

4558

+{

4559

+ X() = default;

4560

+ X(const X&) = default;

4561

+ X(X&& x) { x.moved = true; }

4562

+

4563

+ void operator()() const { }

4564

+

4565

+ bool moved = false;

4566

+};

4567

+

4568

+void test01()

4569

+{

4570

+ X x;

4571

+ std::packaged_task<void()> p(x);

4572

+ VERIFY( !x.moved );

4573

+}

4574

+

4575

+int main()

4576

+{

4577

+ test01();

4578

+}

4579

Index: libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc

4580

===================================================================

4581

--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc (.../tags/gcc_4_8_2_release)

4582

+++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc (.../branches/gcc-4_8-branch)

4583

@@ -1,11 +1,11 @@

4584

-// { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } }

4585

-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } }

4586

+// { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* *-*-solaris* *-*-cygwin *-*-darwin1[1-9]* powerpc-ibm-aix* } }

4587

+// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* powerpc-ibm-aix* } }

4588

// { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } }

4589

// { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } }

4590

// { dg-require-cstdint "" }

4591

// { dg-require-gthreads "" }

4592

4593

4594

4595

//

4596

// This file is part of the GNU ISO C++ Library. This library is free

4597

// software; you can redistribute it and/or modify it under the

4598

Index: libstdc++-v3/testsuite/29_atomics/atomic/60658.cc

4599

===================================================================

4600

--- a/src/libstdc++-v3/testsuite/29_atomics/atomic/60658.cc (.../tags/gcc_4_8_2_release)

4601

+++ b/src/libstdc++-v3/testsuite/29_atomics/atomic/60658.cc (.../branches/gcc-4_8-branch)

4602

@@ -0,0 +1,43 @@

4603

+// { dg-require-atomic-builtins "" }

4604

+// { dg-options "-std=gnu++11" }

4605

+

4606

4607

+//

4608

+// This file is part of the GNU ISO C++ Library. This library is free

4609

+// software; you can redistribute it and/or modify it under the

4610

+// terms of the GNU General Public License as published by the

4611

+// Free Software Foundation; either version 3, or (at your option)

4612

+// any later version.

4613

+

4614

+// This library is distributed in the hope that it will be useful,

4615

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4616

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4617

+// GNU General Public License for more details.

4618

+

4619

+// You should have received a copy of the GNU General Public License along

4620

+// with this library; see the file COPYING3. If not see

4621

+// <http://www.gnu.org/licenses/>.

4622

+

4623

+#include <atomic>

4624

+#include <testsuite_hooks.h>

4625

+

4626

+// libstdc++/60658

4627

+

4628

+struct Foo {

4629

+ char buf[1];

4630

+};

4631

+

4632

+struct Bar {

4633

+ char buf[100];

4634

+};

4635

+

4636

+int

4637

+main ()

4638

+{

4639

+ bool test __attribute__((unused)) = true;

4640

+

4641

+ std::atomic<Foo*> a;

4642

+ std::atomic<Bar*> b;

4643

+

4644

+ VERIFY (a.is_lock_free() == b.is_lock_free());

4645

+}

4646

Index: libstdc++-v3/testsuite/23_containers/unordered_map/59548.cc

4647

===================================================================

4648

--- a/src/libstdc++-v3/testsuite/23_containers/unordered_map/59548.cc (.../tags/gcc_4_8_2_release)

4649

+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_map/59548.cc (.../branches/gcc-4_8-branch)

4650

@@ -0,0 +1,34 @@

4651

+// { dg-options "-std=gnu++11" }

4652

+// { dg-do compile }

4653

+// { dg-require-debug-mode "" }

4654

+

4655

4656

+//

4657

+// This file is part of the GNU ISO C++ Library. This library is free

4658

+// software; you can redistribute it and/or modify it under the

4659

+// terms of the GNU General Public License as published by the

4660

+// Free Software Foundation; either version 3, or (at your option)

4661

+// any later version.

4662

+

4663

+// This library is distributed in the hope that it will be useful,

4664

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4665

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4666

+// GNU General Public License for more details.

4667

+

4668

+// You should have received a copy of the GNU General Public License along

4669

+// with this library; see the file COPYING3. If not see

4670

+// <http://www.gnu.org/licenses/>.

4671

+

4672

+// libstdc++/59548

4673

+

4674

+#include <unordered_map>

4675

+

4676

+int main()

4677

+{

4678

+ std::unordered_map<int,int> foo{ {0,1} };

4679

+ auto i = foo.begin();

4680

+ {

4681

+ auto bar = foo;

4682

+ }

4683

+ return i->first;

4684

+}

4685

Index: libstdc++-v3/testsuite/23_containers/vector/allocator/move.cc

4686

===================================================================

4687

--- a/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move.cc (.../tags/gcc_4_8_2_release)

4688

+++ b/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move.cc (.../branches/gcc-4_8-branch)

4689

@@ -0,0 +1,59 @@

4690

4691

+//

4692

+// This file is part of the GNU ISO C++ Library. This library is free

4693

+// software; you can redistribute it and/or modify it under the

4694

+// terms of the GNU General Public License as published by the

4695

+// Free Software Foundation; either version 3, or (at your option)

4696

+// any later version.

4697

+

4698

+// This library is distributed in the hope that it will be useful,

4699

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4700

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4701

+// GNU General Public License for more details.

4702

+

4703

+// You should have received a copy of the GNU General Public License along

4704

+// with this library; see the file COPYING3. If not see

4705

+// <http://www.gnu.org/licenses/>.

4706

+

4707

+// { dg-options "-std=gnu++11" }

4708

+

4709

+#include <vector>

4710

+#include <testsuite_hooks.h>

4711

+#include <testsuite_allocator.h>

4712

+

4713

+struct T { int i; };

4714

+

4715

+using __gnu_test::uneq_allocator;

4716

+

4717

+void test01()

4718

+{

4719

+ bool test __attribute__((unused)) = true;

4720

+ typedef uneq_allocator<T> alloc_type;

4721

+ typedef std::vector<T, alloc_type> test_type;

4722

+ test_type v1(alloc_type(1));

4723

+ v1 = { T() };

4724

+ auto it = v1.begin();

4725

+ test_type v2(std::move(v1));

4726

+ VERIFY(1 == v1.get_allocator().get_personality());

4727

+ VERIFY(1 == v2.get_allocator().get_personality());

4728

+ VERIFY( it == v2.begin() );

4729

+}

4730

+

4731

+void test02()

4732

+{

4733

+ bool test __attribute__((unused)) = true;

4734

+ typedef uneq_allocator<T> alloc_type;

4735

+ typedef std::vector<T, alloc_type> test_type;

4736

+ test_type v1(alloc_type(1));

4737

+ v1 = { T() };

4738

+ test_type v2(std::move(v1), alloc_type(2));

4739

+ VERIFY(1 == v1.get_allocator().get_personality());

4740

+ VERIFY(2 == v2.get_allocator().get_personality());

4741

+}

4742

+

4743

+int main()

4744

+{

4745

+ test01();

4746

+ test02();

4747

+ return 0;

4748

+}

4749

Index: libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc

4750

===================================================================

4751

--- a/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc (.../tags/gcc_4_8_2_release)

4752

+++ b/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc (.../branches/gcc-4_8-branch)

4753

@@ -46,16 +46,35 @@

4754

typedef std::vector<T, alloc_type> test_type;

4755

test_type v1(alloc_type(1));

4756

v1.push_back(T());

4757

+ auto it = v1.begin();

4758

test_type v2(alloc_type(2));

4759

+ v2.push_back(T());

4760

v2 = std::move(v1);

4761

- v2.push_back(T());

4762

+ VERIFY( it == v2.begin() );

4763

VERIFY(0 == v1.get_allocator().get_personality());

4764

VERIFY(1 == v2.get_allocator().get_personality());

4765

}

4766

4767

+void test03()

4768

+{

4769

+ bool test __attribute__((unused)) = true;

4770

+ typedef propagating_allocator<T, false> alloc_type;

4771

+ typedef std::vector<T, alloc_type> test_type;

4772

+ test_type v1(alloc_type(1));

4773

+ v1.push_back(T());

4774

+ auto it = v1.begin();

4775

+ test_type v2(alloc_type(1));

4776

+ v2.push_back(T());

4777

+ v2 = std::move(v1);

4778

+ VERIFY( it == v2.begin() );

4779

+ VERIFY(1 == v1.get_allocator().get_personality());

4780

+ VERIFY(1 == v2.get_allocator().get_personality());

4781

+}

4782

+

4783

int main()

4784

{

4785

test01();

4786

test02();

4787

+ test03();

4788

return 0;

4789

}

4790

Index: libstdc++-v3/testsuite/20_util/shared_ptr/cons/58839.cc

4791

===================================================================

4792

--- a/src/libstdc++-v3/testsuite/20_util/shared_ptr/cons/58839.cc (.../tags/gcc_4_8_2_release)

4793

+++ b/src/libstdc++-v3/testsuite/20_util/shared_ptr/cons/58839.cc (.../branches/gcc-4_8-branch)

4794

@@ -0,0 +1,33 @@

4795

+// { dg-options "-std=gnu++11" }

4796

+// { dg-do compile }

4797

+

4798

4799

+//

4800

+// This file is part of the GNU ISO C++ Library. This library is free

4801

+// software; you can redistribute it and/or modify it under the

4802

+// terms of the GNU General Public License as published by the

4803

+// Free Software Foundation; either version 3, or (at your option)

4804

+// any later version.

4805

+

4806

+// This library is distributed in the hope that it will be useful,

4807

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4808

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4809

+// GNU General Public License for more details.

4810

+

4811

+// You should have received a copy of the GNU General Public License along

4812

+// with this library; see the file COPYING3. If not see

4813

+// <http://www.gnu.org/licenses/>.

4814

+

4815

+#include <memory>

4816

+

4817

+// libstdc++/58839

4818

+

4819

+struct D {

4820

+ void operator()(void*) const noexcept { }

4821

+};

4822

+

4823

+void test01()

4824

+{

4825

+ std::unique_ptr<void, D> y;

4826

+ std::shared_ptr<void> x = std::move(y);

4827

+}

4828

Index: libstdc++-v3/testsuite/20_util/bind/57899.cc

4829

===================================================================

4830

--- a/src/libstdc++-v3/testsuite/20_util/bind/57899.cc (.../tags/gcc_4_8_2_release)

4831

+++ b/src/libstdc++-v3/testsuite/20_util/bind/57899.cc (.../branches/gcc-4_8-branch)

4832

@@ -0,0 +1,48 @@

4833

4834

+//

4835

+// This file is part of the GNU ISO C++ Library. This library is free

4836

+// software; you can redistribute it and/or modify it under the

4837

+// terms of the GNU General Public License as published by the

4838

+// Free Software Foundation; either version 3, or (at your option)

4839

+// any later version.

4840

+

4841

+// This library is distributed in the hope that it will be useful,

4842

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4843

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4844

+// GNU General Public License for more details.

4845

+

4846

+// You should have received a copy of the GNU General Public License along

4847

+// with this library; see the file COPYING3. If not see

4848

+// <http://www.gnu.org/licenses/>.

4849

+

4850

+// 20.7.11 Function template bind

4851

+

4852

+// PR c++/57899

4853

+// { dg-do compile }

4854

+// { dg-options -std=c++11 }

4855

+

4856

+#include <functional>

4857

+using std::bind;

4858

+using std::placeholders::_1;

4859

+

4860

+struct S { int i; };

4861

+

4862

+struct P { S s; };

4863

+

4864

+struct get_s

4865

+{

4866

+ const S& operator()(const P& p) const { return p.s; }

4867

+} gs;

4868

+

4869

+int gi(const S& s) { return s.i; }

4870

+

4871

+bool cmp(int, int) { return true; }

4872

+

4873

+int main()

4874

+{

4875

+ P p{};

4876

+ auto f1 = bind(gs, _1);

4877

+ auto f2 = bind(gi, f1);

4878

+ auto f3 = bind(cmp, f2, 5);

4879

+ f3(p);

4880

+}

4881

Index: libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt

4882

===================================================================

4883

--- a/src/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt (.../tags/gcc_4_8_2_release)

4884

+++ b/src/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt (.../branches/gcc-4_8-branch)

4885

@@ -403,6 +403,7 @@

4886

FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE6getlocEv@@GLIBCXX_3.4

4887

FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4

4888

FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4

4889

+FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18

4890

FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4

4891

FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4

4892

FUNC:_ZNKSt18basic_stringstreamIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4

4893

@@ -590,6 +591,8 @@

4894

FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewm@@GLIBCXX_3.4

4895

FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewx@@GLIBCXX_3.4

4896

FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewy@@GLIBCXX_3.4

4897

+FUNC:_ZNKSt8__detail20_Prime_rehash_policy11_M_next_bktEj@@GLIBCXX_3.4.18

4898

+FUNC:_ZNKSt8__detail20_Prime_rehash_policy14_M_need_rehashEjjj@@GLIBCXX_3.4.18

4899

FUNC:_ZNKSt8bad_cast4whatEv@@GLIBCXX_3.4.9

4900

FUNC:_ZNKSt8ios_base7failure4whatEv@@GLIBCXX_3.4

4901

FUNC:_ZNKSt8messagesIcE18_M_convert_to_charERKSs@@GLIBCXX_3.4

4902

@@ -1207,6 +1210,7 @@

4903

FUNC:_ZNSt11regex_errorD0Ev@@GLIBCXX_3.4.15

4904

FUNC:_ZNSt11regex_errorD1Ev@@GLIBCXX_3.4.15

4905

FUNC:_ZNSt11regex_errorD2Ev@@GLIBCXX_3.4.15

4906

+FUNC:_ZNSt11this_thread11__sleep_forENSt6chrono8durationIxSt5ratioILx1ELx1EEEENS1_IxS2_ILx1ELx1000000000EEEE@@GLIBCXX_3.4.18

4907

FUNC:_ZNSt12__basic_fileIcE2fdEv@@GLIBCXX_3.4

4908

FUNC:_ZNSt12__basic_fileIcE4fileEv@@GLIBCXX_3.4.1

4909

FUNC:_ZNSt12__basic_fileIcE4openEPKcSt13_Ios_Openmodei@@GLIBCXX_3.4

4910

@@ -1485,6 +1489,11 @@

4911

FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEt@@GLIBCXX_3.4

4912

FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEx@@GLIBCXX_3.4

4913

FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEy@@GLIBCXX_3.4

4914

+FUNC:_ZNSt13random_device14_M_init_pretr1ERKSs@@GLIBCXX_3.4.18

4915

+FUNC:_ZNSt13random_device16_M_getval_pretr1Ev@@GLIBCXX_3.4.18

4916

+FUNC:_ZNSt13random_device7_M_finiEv@@GLIBCXX_3.4.18

4917

+FUNC:_ZNSt13random_device7_M_initERKSs@@GLIBCXX_3.4.18

4918

+FUNC:_ZNSt13random_device9_M_getvalEv@@GLIBCXX_3.4.18

4919

FUNC:_ZNSt13runtime_errorC1ERKSs@@GLIBCXX_3.4

4920

FUNC:_ZNSt13runtime_errorC2ERKSs@@GLIBCXX_3.4

4921

FUNC:_ZNSt13runtime_errorD0Ev@@GLIBCXX_3.4

4922

@@ -1929,6 +1938,8 @@

4923

FUNC:_ZNSt6__norm15_List_node_base8transferEPS0_S1_@@GLIBCXX_3.4.9

4924

FUNC:_ZNSt6__norm15_List_node_base9_M_unhookEv@@GLIBCXX_3.4.14

4925

FUNC:_ZNSt6chrono12system_clock3nowEv@@GLIBCXX_3.4.11

4926

+FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19

4927

+FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19

4928

FUNC:_ZNSt6gslice8_IndexerC1EjRKSt8valarrayIjES4_@@GLIBCXX_3.4

4929

FUNC:_ZNSt6gslice8_IndexerC2EjRKSt8valarrayIjES4_@@GLIBCXX_3.4

4930

FUNC:_ZNSt6locale11_M_coalesceERKS_S1_i@@GLIBCXX_3.4

4931

@@ -2467,6 +2478,7 @@

4932

FUNC:__cxa_guard_release@@CXXABI_1.3

4933

FUNC:__cxa_pure_virtual@@CXXABI_1.3

4934

FUNC:__cxa_rethrow@@CXXABI_1.3

4935

+FUNC:__cxa_thread_atexit@@CXXABI_1.3.7

4936

FUNC:__cxa_throw@@CXXABI_1.3

4937

FUNC:__cxa_tm_cleanup@@CXXABI_TM_1

4938

FUNC:__cxa_vec_cctor@@CXXABI_1.3

4939

@@ -2491,6 +2503,7 @@

4940

OBJECT:0:CXXABI_1.3.4

4941

OBJECT:0:CXXABI_1.3.5

4942

OBJECT:0:CXXABI_1.3.6

4943

+OBJECT:0:CXXABI_1.3.7

4944

OBJECT:0:CXXABI_TM_1

4945

OBJECT:0:GLIBCXX_3.4

4946

OBJECT:0:GLIBCXX_3.4.1

4947

@@ -2502,6 +2515,8 @@

4948

OBJECT:0:GLIBCXX_3.4.15

4949

OBJECT:0:GLIBCXX_3.4.16

4950

OBJECT:0:GLIBCXX_3.4.17

4951

+OBJECT:0:GLIBCXX_3.4.18

4952

+OBJECT:0:GLIBCXX_3.4.19

4953

OBJECT:0:GLIBCXX_3.4.2

4954

OBJECT:0:GLIBCXX_3.4.3

4955

OBJECT:0:GLIBCXX_3.4.4

4956

@@ -3033,6 +3048,8 @@

4957

OBJECT:1:_ZNSt21__numeric_limits_base9is_moduloE@@GLIBCXX_3.4

4958

OBJECT:1:_ZNSt21__numeric_limits_base9is_signedE@@GLIBCXX_3.4

4959

OBJECT:1:_ZNSt6chrono12system_clock12is_monotonicE@@GLIBCXX_3.4.11

4960

+OBJECT:1:_ZNSt6chrono3_V212steady_clock9is_steadyE@@GLIBCXX_3.4.19

4961

+OBJECT:1:_ZNSt6chrono3_V212system_clock9is_steadyE@@GLIBCXX_3.4.19

4962

OBJECT:1:_ZSt10adopt_lock@@GLIBCXX_3.4.11

4963

OBJECT:1:_ZSt10defer_lock@@GLIBCXX_3.4.11

4964

OBJECT:1:_ZSt11try_to_lock@@GLIBCXX_3.4.11

4965

Index: libstdc++-v3/acinclude.m4

4966

===================================================================

4967

--- a/src/libstdc++-v3/acinclude.m4 (.../tags/gcc_4_8_2_release)

4968

+++ b/src/libstdc++-v3/acinclude.m4 (.../branches/gcc-4_8-branch)

4969

@@ -3266,7 +3266,7 @@

4970

fi

4971

4972

# For libtool versioning info, format is CURRENT:REVISION:AGE

4973

-libtool_VERSION=6:18:0

4974

+libtool_VERSION=6:19:0

4975

4976

# Everything parsed; figure out what files and settings to use.

4977

case $enable_symvers in

4978

Index: libmudflap/configure

4979

===================================================================

4980

--- a/src/libmudflap/configure (.../tags/gcc_4_8_2_release)

4981

+++ b/src/libmudflap/configure (.../branches/gcc-4_8-branch)

4982

@@ -6377,7 +6377,7 @@

4983

rm -rf conftest*

4984

;;

4985

4986

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

4987

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

4988

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

4989

# Find out which ABI we are using.

4990

echo 'int i;' > conftest.$ac_ext

4991

@@ -6402,7 +6402,10 @@

4992

;;

4993

esac

4994

;;

4995

- ppc64-*linux*|powerpc64-*linux*)

4996

+ powerpc64le-*linux*)

4997

+ LD="${LD-ld} -m elf32lppclinux"

4998

+ ;;

4999

+ powerpc64-*linux*)

5000

LD="${LD-ld} -m elf32ppclinux"

5001

;;

5002

s390x-*linux*)

5003

@@ -6421,7 +6424,10 @@

5004

x86_64-*linux*)

5005

LD="${LD-ld} -m elf_x86_64"

5006

;;

5007

- ppc*-*linux*|powerpc*-*linux*)

5008

+ powerpcle-*linux*)

5009

+ LD="${LD-ld} -m elf64lppc"

5010

+ ;;

5011

+ powerpc-*linux*)

5012

LD="${LD-ld} -m elf64ppc"

5013

;;

5014

s390*-*linux*|s390*-*tpf*)

5015

@@ -10615,7 +10621,7 @@

5016

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5017

lt_status=$lt_dlunknown

5018

cat > conftest.$ac_ext <<_LT_EOF

5019

-#line 10618 "configure"

5020

+#line 10624 "configure"

5021

#include "confdefs.h"

5022

5023

#if HAVE_DLFCN_H

5024

@@ -10721,7 +10727,7 @@

5025

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5026

lt_status=$lt_dlunknown

5027

cat > conftest.$ac_ext <<_LT_EOF

5028

-#line 10724 "configure"

5029

+#line 10730 "configure"

5030

#include "confdefs.h"

5031

5032

#if HAVE_DLFCN_H

5033

Index: libmudflap/ChangeLog

5034

===================================================================

5035

--- a/src/libmudflap/ChangeLog (.../tags/gcc_4_8_2_release)

5036

+++ b/src/libmudflap/ChangeLog (.../branches/gcc-4_8-branch)

5037

@@ -1,3 +1,10 @@

5038

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5039

+

5040

+ Backport from mainline

5041

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5042

+

5043

+ * configure: Regenerate.

5044

+

5045

2013-10-16 Release Manager

5046

5047

* GCC 4.8.2 released.

5048

Index: boehm-gc/include/private/gcconfig.h

5049

===================================================================

5050

--- a/src/boehm-gc/include/private/gcconfig.h (.../tags/gcc_4_8_2_release)

5051

+++ b/src/boehm-gc/include/private/gcconfig.h (.../branches/gcc-4_8-branch)

5052

@@ -837,7 +837,15 @@

5053

# define NO_PTHREAD_TRYLOCK

5054

# endif

5055

# ifdef FREEBSD

5056

+# if defined(__powerpc64__)

5057

+# define ALIGNMENT 8

5058

+# define CPP_WORDSZ 64

5059

+# ifndef HBLKSIZE

5060

+# define HBLKSIZE 4096

5061

+# endif

5062

+# else

5063

# define ALIGNMENT 4

5064

+# endif

5065

# define OS_TYPE "FREEBSD"

5066

# ifndef GC_FREEBSD_THREADS

5067

# define MPROTECT_VDB

5068

Index: boehm-gc/ChangeLog

5069

===================================================================

5070

--- a/src/boehm-gc/ChangeLog (.../tags/gcc_4_8_2_release)

5071

+++ b/src/boehm-gc/ChangeLog (.../branches/gcc-4_8-branch)

5072

@@ -1,3 +1,15 @@

5073

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5074

+

5075

+ Backport from mainline

5076

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5077

+

5078

+ * configure: Regenerate.

5079

+

5080

+2013-12-29 Andreas Tobler <andreast@gcc.gnu.org>

5081

+

5082

+ Merge from trunk:

5083

+ * include/private/gcconfig.h: Add FreeBSD powerpc64 defines.

5084

+

5085

2013-10-16 Release Manager

5086

5087

* GCC 4.8.2 released.

5088

Index: boehm-gc/configure

5089

===================================================================

5090

--- a/src/boehm-gc/configure (.../tags/gcc_4_8_2_release)

5091

+++ b/src/boehm-gc/configure (.../branches/gcc-4_8-branch)

5092

@@ -6770,7 +6770,7 @@

5093

rm -rf conftest*

5094

;;

5095

5096

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5097

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5098

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5099

# Find out which ABI we are using.

5100

echo 'int i;' > conftest.$ac_ext

5101

@@ -6795,7 +6795,10 @@

5102

;;

5103

esac

5104

;;

5105

- ppc64-*linux*|powerpc64-*linux*)

5106

+ powerpc64le-*linux*)

5107

+ LD="${LD-ld} -m elf32lppclinux"

5108

+ ;;

5109

+ powerpc64-*linux*)

5110

LD="${LD-ld} -m elf32ppclinux"

5111

;;

5112

s390x-*linux*)

5113

@@ -6814,7 +6817,10 @@

5114

x86_64-*linux*)

5115

LD="${LD-ld} -m elf_x86_64"

5116

;;

5117

- ppc*-*linux*|powerpc*-*linux*)

5118

+ powerpcle-*linux*)

5119

+ LD="${LD-ld} -m elf64lppc"

5120

+ ;;

5121

+ powerpc-*linux*)

5122

LD="${LD-ld} -m elf64ppc"

5123

;;

5124

s390*-*linux*|s390*-*tpf*)

5125

@@ -11312,7 +11318,7 @@

5126

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5127

lt_status=$lt_dlunknown

5128

cat > conftest.$ac_ext <<_LT_EOF

5129

-#line 11315 "configure"

5130

+#line 11321 "configure"

5131

#include "confdefs.h"

5132

5133

#if HAVE_DLFCN_H

5134

@@ -11418,7 +11424,7 @@

5135

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5136

lt_status=$lt_dlunknown

5137

cat > conftest.$ac_ext <<_LT_EOF

5138

-#line 11421 "configure"

5139

+#line 11427 "configure"

5140

#include "confdefs.h"

5141

5142

#if HAVE_DLFCN_H

5143

Index: ChangeLog

5144

===================================================================

5145

--- a/src/ChangeLog (.../tags/gcc_4_8_2_release)

5146

+++ b/src/ChangeLog (.../branches/gcc-4_8-branch)

5147

@@ -1,3 +1,21 @@

5148

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5149

+

5150

+ Backport from mainline

5151

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5152

+

5153

+ * libtool.m4: Update to mainline version.

5154

+ * configure: Regenerate.

5155

+

5156

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5157

+

5158

+ Backport from mainline r203071:

5159

+

5160

+ 2013-10-01 Joern Rennecke <joern.rennecke@embecosm.com>

5161

+

5162

+ Import from savannah.gnu.org:

5163

+ * config.guess: Update to 2013-06-10 version.

5164

+ * config.sub: Update to 2013-10-01 version.

5165

+

5166

2013-10-16 Release Manager

5167

5168

* GCC 4.8.2 released.

5169

Index: lto-plugin/configure

5170

===================================================================

5171

--- a/src/lto-plugin/configure (.../tags/gcc_4_8_2_release)

5172

+++ b/src/lto-plugin/configure (.../branches/gcc-4_8-branch)

5173

@@ -6044,7 +6044,7 @@

5174

rm -rf conftest*

5175

;;

5176

5177

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5178

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5179

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5180

# Find out which ABI we are using.

5181

echo 'int i;' > conftest.$ac_ext

5182

@@ -6069,7 +6069,10 @@

5183

;;

5184

esac

5185

;;

5186

- ppc64-*linux*|powerpc64-*linux*)

5187

+ powerpc64le-*linux*)

5188

+ LD="${LD-ld} -m elf32lppclinux"

5189

+ ;;

5190

+ powerpc64-*linux*)

5191

LD="${LD-ld} -m elf32ppclinux"

5192

;;

5193

s390x-*linux*)

5194

@@ -6088,7 +6091,10 @@

5195

x86_64-*linux*)

5196

LD="${LD-ld} -m elf_x86_64"

5197

;;

5198

- ppc*-*linux*|powerpc*-*linux*)

5199

+ powerpcle-*linux*)

5200

+ LD="${LD-ld} -m elf64lppc"

5201

+ ;;

5202

+ powerpc-*linux*)

5203

LD="${LD-ld} -m elf64ppc"

5204

;;

5205

s390*-*linux*|s390*-*tpf*)

5206

@@ -10552,7 +10558,7 @@

5207

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5208

lt_status=$lt_dlunknown

5209

cat > conftest.$ac_ext <<_LT_EOF

5210

-#line 10555 "configure"

5211

+#line 10561 "configure"

5212

#include "confdefs.h"

5213

5214

#if HAVE_DLFCN_H

5215

@@ -10658,7 +10664,7 @@

5216

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5217

lt_status=$lt_dlunknown

5218

cat > conftest.$ac_ext <<_LT_EOF

5219

-#line 10661 "configure"

5220

+#line 10667 "configure"

5221

#include "confdefs.h"

5222

5223

#if HAVE_DLFCN_H

5224

Index: lto-plugin/ChangeLog

5225

===================================================================

5226

--- a/src/lto-plugin/ChangeLog (.../tags/gcc_4_8_2_release)

5227

+++ b/src/lto-plugin/ChangeLog (.../branches/gcc-4_8-branch)

5228

@@ -1,3 +1,10 @@

5229

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5230

+

5231

+ Backport from mainline

5232

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5233

+

5234

+ * configure: Regenerate.

5235

+

5236

2013-10-16 Release Manager

5237

5238

* GCC 4.8.2 released.

5239

Index: contrib/ChangeLog

5240

===================================================================

5241

--- a/src/contrib/ChangeLog (.../tags/gcc_4_8_2_release)

5242

+++ b/src/contrib/ChangeLog (.../branches/gcc-4_8-branch)

5243

@@ -1,3 +1,7 @@

5244

+2013-10-21 Mike Stump <mikestump@comcast.net>

5245

+

5246

+ * gcc_update (configure): Update to handle svn 1.8.1.

5247

+

5248

2013-10-16 Release Manager

5249

5250

* GCC 4.8.2 released.

5251

Index: contrib/gcc_update

5252

===================================================================

5253

--- a/src/contrib/gcc_update (.../tags/gcc_4_8_2_release)

5254

+++ b/src/contrib/gcc_update (.../branches/gcc-4_8-branch)

5255

@@ -382,7 +382,7 @@

5256

fi

5257

5258

revision=`$GCC_SVN info | awk '/Revision:/ { print $2 }'`

5259

- branch=`$GCC_SVN info | sed -ne "/URL:/ {

5260

+ branch=`$GCC_SVN info | sed -ne "/^URL:/ {

5261

s,.*/trunk,trunk,

5262

s,.*/branches/,,

5263

s,.*/tags/,,

5264

Index: libatomic/configure

5265

===================================================================

5266

--- a/src/libatomic/configure (.../tags/gcc_4_8_2_release)

5267

+++ b/src/libatomic/configure (.../branches/gcc-4_8-branch)

5268

@@ -6505,7 +6505,7 @@

5269

rm -rf conftest*

5270

;;

5271

5272

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5273

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5274

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5275

# Find out which ABI we are using.

5276

echo 'int i;' > conftest.$ac_ext

5277

@@ -6530,7 +6530,10 @@

5278

;;

5279

esac

5280

;;

5281

- ppc64-*linux*|powerpc64-*linux*)

5282

+ powerpc64le-*linux*)

5283

+ LD="${LD-ld} -m elf32lppclinux"

5284

+ ;;

5285

+ powerpc64-*linux*)

5286

LD="${LD-ld} -m elf32ppclinux"

5287

;;

5288

s390x-*linux*)

5289

@@ -6549,7 +6552,10 @@

5290

x86_64-*linux*)

5291

LD="${LD-ld} -m elf_x86_64"

5292

;;

5293

- ppc*-*linux*|powerpc*-*linux*)

5294

+ powerpcle-*linux*)

5295

+ LD="${LD-ld} -m elf64lppc"

5296

+ ;;

5297

+ powerpc-*linux*)

5298

LD="${LD-ld} -m elf64ppc"

5299

;;

5300

s390*-*linux*|s390*-*tpf*)

5301

@@ -11013,7 +11019,7 @@

5302

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5303

lt_status=$lt_dlunknown

5304

cat > conftest.$ac_ext <<_LT_EOF

5305

-#line 11016 "configure"

5306

+#line 11022 "configure"

5307

#include "confdefs.h"

5308

5309

#if HAVE_DLFCN_H

5310

@@ -11119,7 +11125,7 @@

5311

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5312

lt_status=$lt_dlunknown

5313

cat > conftest.$ac_ext <<_LT_EOF

5314

-#line 11122 "configure"

5315

+#line 11128 "configure"

5316

#include "confdefs.h"

5317

5318

#if HAVE_DLFCN_H

5319

Index: libatomic/cas_n.c

5320

===================================================================

5321

--- a/src/libatomic/cas_n.c (.../tags/gcc_4_8_2_release)

5322

+++ b/src/libatomic/cas_n.c (.../branches/gcc-4_8-branch)

5323

@@ -51,10 +51,9 @@

5324

#if !DONE && N <= WORDSIZE && defined(atomic_compare_exchange_w)

5325

bool

5326

SIZE(libat_compare_exchange) (UTYPE *mptr, UTYPE *eptr, UTYPE newval,

5327

- int smodel, int fmodel UNUSED)

5328

+ int smodel, int fmodel)

5329

{

5330

UWORD mask, shift, weval, woldval, wnewval, t, *wptr;

5331

- bool ret = false;

5332

5333

pre_barrier (smodel);

5334

5335

@@ -82,12 +81,13 @@

5336

}

5337

while (!atomic_compare_exchange_w (wptr, &woldval, t, true,

5338

__ATOMIC_RELAXED, __ATOMIC_RELAXED));

5339

- ret = true;

5340

+ post_barrier (smodel);

5341

+ return true;

5342

+

5343

failure:

5344

*eptr = woldval >> shift;

5345

-

5346

- post_barrier (smodel);

5347

- return ret;

5348

+ post_barrier (fmodel);

5349

+ return false;

5350

}

5351

5352

#define DONE 1

5353

@@ -102,18 +102,17 @@

5354

{

5355

UTYPE oldval;

5356

UWORD magic;

5357

- bool ret = false;

5358

+ bool ret;

5359

5360

pre_seq_barrier (smodel);

5361

magic = protect_start (mptr);

5362

5363

oldval = *mptr;

5364

- if (oldval == *eptr)

5365

- {

5366

- *mptr = newval;

5367

- ret = true;

5368

- }

5369

- *eptr = oldval;

5370

+ ret = (oldval == *eptr);

5371

+ if (ret)

5372

+ *mptr = newval;

5373

+ else

5374

+ *eptr = oldval;

5375

5376

protect_end (mptr, magic);

5377

post_seq_barrier (smodel);

5378

Index: libatomic/ChangeLog

5379

===================================================================

5380

--- a/src/libatomic/ChangeLog (.../tags/gcc_4_8_2_release)

5381

+++ b/src/libatomic/ChangeLog (.../branches/gcc-4_8-branch)

5382

@@ -1,3 +1,16 @@

5383

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5384

+

5385

+ Backport from mainline

5386

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5387

+

5388

+ * configure: Regenerate.

5389

+

5390

+2014-02-20 Richard Henderson <rth@redhat.com>

5391

+

5392

+ PR c++/60272

5393

+ * cas_n.c (libat_compare_exchange): Conditionalize on failure

5394

+ the store back to EPTR.

5395

+

5396

2013-10-16 Release Manager

5397

5398

* GCC 4.8.2 released.

5399

Index: libbacktrace/configure

5400

===================================================================

5401

--- a/src/libbacktrace/configure (.../tags/gcc_4_8_2_release)

5402

+++ b/src/libbacktrace/configure (.../branches/gcc-4_8-branch)

5403

@@ -6842,7 +6842,7 @@

5404

rm -rf conftest*

5405

;;

5406

5407

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5408

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5409

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5410

# Find out which ABI we are using.

5411

echo 'int i;' > conftest.$ac_ext

5412

@@ -6867,7 +6867,10 @@

5413

;;

5414

esac

5415

;;

5416

- ppc64-*linux*|powerpc64-*linux*)

5417

+ powerpc64le-*linux*)

5418

+ LD="${LD-ld} -m elf32lppclinux"

5419

+ ;;

5420

+ powerpc64-*linux*)

5421

LD="${LD-ld} -m elf32ppclinux"

5422

;;

5423

s390x-*linux*)

5424

@@ -6886,7 +6889,10 @@

5425

x86_64-*linux*)

5426

LD="${LD-ld} -m elf_x86_64"

5427

;;

5428

- ppc*-*linux*|powerpc*-*linux*)

5429

+ powerpcle-*linux*)

5430

+ LD="${LD-ld} -m elf64lppc"

5431

+ ;;

5432

+ powerpc-*linux*)

5433

LD="${LD-ld} -m elf64ppc"

5434

;;

5435

s390*-*linux*|s390*-*tpf*)

5436

@@ -11081,7 +11087,7 @@

5437

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5438

lt_status=$lt_dlunknown

5439

cat > conftest.$ac_ext <<_LT_EOF

5440

-#line 11084 "configure"

5441

+#line 11090 "configure"

5442

#include "confdefs.h"

5443

5444

#if HAVE_DLFCN_H

5445

@@ -11187,7 +11193,7 @@

5446

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5447

lt_status=$lt_dlunknown

5448

cat > conftest.$ac_ext <<_LT_EOF

5449

-#line 11190 "configure"

5450

+#line 11196 "configure"

5451

#include "confdefs.h"

5452

5453

#if HAVE_DLFCN_H

5454

@@ -11667,12 +11673,13 @@

5455

return 0;

5456

}

5457

_ACEOF

5458

-if ac_fn_c_try_compile "$LINENO"; then :

5459

+if ac_fn_c_try_link "$LINENO"; then :

5460

have_unwind_getipinfo=yes

5461

else

5462

have_unwind_getipinfo=no

5463

fi

5464

-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext

5465

+rm -f core conftest.err conftest.$ac_objext \

5466

+ conftest$ac_exeext conftest.$ac_ext

5467

CFLAGS="$ac_save_CFLAGS"

5468

{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $have_unwind_getipinfo" >&5

5469

$as_echo "$have_unwind_getipinfo" >&6; }

5470

Index: libbacktrace/Makefile.in

5471

===================================================================

5472

--- a/src/libbacktrace/Makefile.in (.../tags/gcc_4_8_2_release)

5473

+++ b/src/libbacktrace/Makefile.in (.../branches/gcc-4_8-branch)

5474

@@ -16,7 +16,7 @@

5475

@SET_MAKE@

5476

5477

# Makefile.am -- Backtrace Makefile.

5478

5479

5480

5481

# Redistribution and use in source and binary forms, with or without

5482

# modification, are permitted provided that the following conditions are

5483

Index: libbacktrace/dwarf.c

5484

===================================================================

5485

--- a/src/libbacktrace/dwarf.c (.../tags/gcc_4_8_2_release)

5486

+++ b/src/libbacktrace/dwarf.c (.../branches/gcc-4_8-branch)

5487

@@ -2507,7 +2507,6 @@

5488

if (pfvec->count == 0)

5489

return;

5490

5491

- addrs = (struct function_addrs *) pfvec->vec.base;

5492

addrs_count = pfvec->count;

5493

5494

if (fvec == NULL)

5495

@@ -2514,12 +2513,17 @@

5496

{

5497

if (!backtrace_vector_release (state, &lvec.vec, error_callback, data))

5498

return;

5499

+ addrs = (struct function_addrs *) pfvec->vec.base;

5500

}

5501

else

5502

{

5503

/* Finish this list of addresses, but leave the remaining space in

5504

the vector available for the next function unit. */

5505

- backtrace_vector_finish (state, &fvec->vec);

5506

+ addrs = ((struct function_addrs *)

5507

+ backtrace_vector_finish (state, &fvec->vec,

5508

+ error_callback, data));

5509

+ if (addrs == NULL)

5510

+ return;

5511

fvec->count = 0;

5512

}

5513

5514

Index: libbacktrace/ChangeLog

5515

===================================================================

5516

--- a/src/libbacktrace/ChangeLog (.../tags/gcc_4_8_2_release)

5517

+++ b/src/libbacktrace/ChangeLog (.../branches/gcc-4_8-branch)

5518

@@ -1,3 +1,35 @@

5519

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5520

+

5521

+ Backport from mainline

5522

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5523

+

5524

+ * configure: Regenerate.

5525

+

5526

+2014-02-07 Misty De Meo <misty@brew.sh>

5527

+

5528

+ PR target/58710

5529

+ * configure.ac: Use AC_LINK_IFELSE in check for

5530

+ _Unwind_GetIPInfo.

5531

+ * configure: Regenerate.

5532

+

5533

+2013-12-05 Ian Lance Taylor <iant@google.com>

5534

+

5535

+ * alloc.c (backtrace_vector_finish): Add error_callback and data

5536

+ parameters. Call backtrace_vector_release. Return address base.

5537

+ * mmap.c (backtrace_vector_finish): Add error_callback and data

5538

+ parameters. Return address base.

5539

+ * dwarf.c (read_function_info): Get new address base from

5540

+ backtrace_vector_finish.

5541

+ * internal.h (backtrace_vector_finish): Update declaration.

5542

+

5543

+2013-11-30 Ian Lance Taylor <iant@google.com>

5544

+

5545

+ Backport from mainline:

5546

+ 2013-10-17 Ian Lance Taylor <iant@google.com>

5547

+

5548

+ * elf.c (elf_add): Don't get the wrong offsets if a debug section

5549

+ is missing.

5550

+

5551

2013-10-16 Release Manager

5552

5553

* GCC 4.8.2 released.

5554

Index: libbacktrace/elf.c

5555

===================================================================

5556

--- a/src/libbacktrace/elf.c (.../tags/gcc_4_8_2_release)

5557

+++ b/src/libbacktrace/elf.c (.../branches/gcc-4_8-branch)

5558

@@ -725,6 +725,8 @@

5559

{

5560

off_t end;

5561

5562

+ if (sections[i].size == 0)

5563

+ continue;

5564

if (min_offset == 0 || sections[i].offset < min_offset)

5565

min_offset = sections[i].offset;

5566

end = sections[i].offset + sections[i].size;

5567

@@ -751,8 +753,13 @@

5568

descriptor = -1;

5569

5570

for (i = 0; i < (int) DEBUG_MAX; ++i)

5571

- sections[i].data = ((const unsigned char *) debug_view.data

5572

- + (sections[i].offset - min_offset));

5573

+ {

5574

+ if (sections[i].size == 0)

5575

+ sections[i].data = NULL;

5576

+ else

5577

+ sections[i].data = ((const unsigned char *) debug_view.data

5578

+ + (sections[i].offset - min_offset));

5579

+ }

5580

5581

if (!backtrace_dwarf_add (state, base_address,

5582

sections[DEBUG_INFO].data,

5583

Index: libbacktrace/internal.h

5584

===================================================================

5585

--- a/src/libbacktrace/internal.h (.../tags/gcc_4_8_2_release)

5586

+++ b/src/libbacktrace/internal.h (.../branches/gcc-4_8-branch)

5587

@@ -192,13 +192,17 @@

5588

struct backtrace_vector *vec);

5589

5590

/* Finish the current allocation on VEC. Prepare to start a new

5591

- allocation. The finished allocation will never be freed. */

5592

+ allocation. The finished allocation will never be freed. Returns

5593

+ a pointer to the base of the finished entries, or NULL on

5594

+ failure. */

5595

5596

-extern void backtrace_vector_finish (struct backtrace_state *state,

5597

- struct backtrace_vector *vec);

5598

+extern void* backtrace_vector_finish (struct backtrace_state *state,

5599

+ struct backtrace_vector *vec,

5600

+ backtrace_error_callback error_callback,

5601

+ void *data);

5602

5603

-/* Release any extra space allocated for VEC. Returns 1 on success, 0

5604

- on failure. */

5605

+/* Release any extra space allocated for VEC. This may change

5606

+ VEC->base. Returns 1 on success, 0 on failure. */

5607

5608

extern int backtrace_vector_release (struct backtrace_state *state,

5609

struct backtrace_vector *vec,

5610

Index: libbacktrace/configure.ac

5611

===================================================================

5612

--- a/src/libbacktrace/configure.ac (.../tags/gcc_4_8_2_release)

5613

+++ b/src/libbacktrace/configure.ac (.../branches/gcc-4_8-branch)

5614

@@ -144,7 +144,7 @@

5615

ac_save_CFFLAGS="$CFLAGS"

5616

CFLAGS="$CFLAGS -Werror-implicit-function-declaration"

5617

AC_MSG_CHECKING([for _Unwind_GetIPInfo])

5618

- AC_COMPILE_IFELSE(

5619

+ AC_LINK_IFELSE(

5620

[AC_LANG_PROGRAM(

5621

[#include "unwind.h"

5622

struct _Unwind_Context *context;

5623

Index: libbacktrace/alloc.c

5624

===================================================================

5625

--- a/src/libbacktrace/alloc.c (.../tags/gcc_4_8_2_release)

5626

+++ b/src/libbacktrace/alloc.c (.../branches/gcc-4_8-branch)

5627

@@ -113,12 +113,24 @@

5628

5629

/* Finish the current allocation on VEC. */

5630

5631

-void

5632

-backtrace_vector_finish (struct backtrace_state *state ATTRIBUTE_UNUSED,

5633

- struct backtrace_vector *vec)

5634

+void *

5635

+backtrace_vector_finish (struct backtrace_state *state,

5636

+ struct backtrace_vector *vec,

5637

+ backtrace_error_callback error_callback,

5638

+ void *data)

5639

{

5640

- vec->base = (char *) vec->base + vec->size;

5641

+ void *ret;

5642

+

5643

+ /* With this allocator we call realloc in backtrace_vector_grow,

5644

+ which means we can't easily reuse the memory here. So just

5645

+ release it. */

5646

+ if (!backtrace_vector_release (state, vec, error_callback, data))

5647

+ return NULL;

5648

+ ret = vec->base;

5649

+ vec->base = NULL;

5650

vec->size = 0;

5651

+ vec->alc = 0;

5652

+ return ret;

5653

}

5654

5655

/* Release any extra space allocated for VEC. */

5656

Index: libbacktrace/mmap.c

5657

===================================================================

5658

--- a/src/libbacktrace/mmap.c (.../tags/gcc_4_8_2_release)

5659

+++ b/src/libbacktrace/mmap.c (.../branches/gcc-4_8-branch)

5660

@@ -230,12 +230,19 @@

5661

5662

/* Finish the current allocation on VEC. */

5663

5664

-void

5665

-backtrace_vector_finish (struct backtrace_state *state ATTRIBUTE_UNUSED,

5666

- struct backtrace_vector *vec)

5667

+void *

5668

+backtrace_vector_finish (

5669

+ struct backtrace_state *state ATTRIBUTE_UNUSED,

5670

+ struct backtrace_vector *vec,

5671

+ backtrace_error_callback error_callback ATTRIBUTE_UNUSED,

5672

+ void *data ATTRIBUTE_UNUSED)

5673

{

5674

+ void *ret;

5675

+

5676

+ ret = vec->base;

5677

vec->base = (char *) vec->base + vec->size;

5678

vec->size = 0;

5679

+ return ret;

5680

}

5681

5682

/* Release any extra space allocated for VEC. */

5683

Index: libjava/libltdl/configure

5684

===================================================================

5685

--- a/src/libjava/libltdl/configure (.../tags/gcc_4_8_2_release)

5686

+++ b/src/libjava/libltdl/configure (.../branches/gcc-4_8-branch)

5687

@@ -4806,7 +4806,7 @@

5688

rm -rf conftest*

5689

;;

5690

5691

-x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

5692

+x86_64-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

5693

# Find out which ABI we are using.

5694

echo 'int i;' > conftest.$ac_ext

5695

if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5

5696

@@ -4820,7 +4820,10 @@

5697

x86_64-*linux*)

5698

LD="${LD-ld} -m elf_i386"

5699

;;

5700

- ppc64-*linux*|powerpc64-*linux*)

5701

+ powerpc64le-*linux*)

5702

+ LD="${LD-ld} -m elf32lppclinux"

5703

+ ;;

5704

+ powerpc64-*linux*)

5705

LD="${LD-ld} -m elf32ppclinux"

5706

;;

5707

s390x-*linux*)

5708

@@ -4836,7 +4839,10 @@

5709

x86_64-*linux*)

5710

LD="${LD-ld} -m elf_x86_64"

5711

;;

5712

- ppc*-*linux*|powerpc*-*linux*)

5713

+ powerpcle-*linux*)

5714

+ LD="${LD-ld} -m elf64lppc"

5715

+ ;;

5716

+ powerpc-*linux*)

5717

LD="${LD-ld} -m elf64ppc"

5718

;;

5719

s390*-*linux*)

5720

@@ -6456,11 +6462,11 @@

5721

-e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \

5722

-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \

5723

-e 's:$: $lt_compiler_flag:'`

5724

- (eval echo "\"\$as_me:6459: $lt_compile\"" >&5)

5725

+ (eval echo "\"\$as_me:6465: $lt_compile\"" >&5)

5726

(eval "$lt_compile" 2>conftest.err)

5727

ac_status=$?

5728

cat conftest.err >&5

5729

- echo "$as_me:6463: \$? = $ac_status" >&5

5730

+ echo "$as_me:6469: \$? = $ac_status" >&5

5731

if (exit $ac_status) && test -s "$ac_outfile"; then

5732

# The compiler can only warn and ignore the option if not recognized

5733

# So say no if there are warnings other than the usual output.

5734

@@ -6718,11 +6724,11 @@

5735

-e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \

5736

-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \

5737

-e 's:$: $lt_compiler_flag:'`

5738

- (eval echo "\"\$as_me:6721: $lt_compile\"" >&5)

5739

+ (eval echo "\"\$as_me:6727: $lt_compile\"" >&5)

5740

(eval "$lt_compile" 2>conftest.err)

5741

ac_status=$?

5742

cat conftest.err >&5

5743

- echo "$as_me:6725: \$? = $ac_status" >&5

5744

+ echo "$as_me:6731: \$? = $ac_status" >&5

5745

if (exit $ac_status) && test -s "$ac_outfile"; then

5746

# The compiler can only warn and ignore the option if not recognized

5747

# So say no if there are warnings other than the usual output.

5748

@@ -6780,11 +6786,11 @@

5749

-e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \

5750

-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \

5751

-e 's:$: $lt_compiler_flag:'`

5752

- (eval echo "\"\$as_me:6783: $lt_compile\"" >&5)

5753

+ (eval echo "\"\$as_me:6789: $lt_compile\"" >&5)

5754

(eval "$lt_compile" 2>out/conftest.err)

5755

ac_status=$?

5756

cat out/conftest.err >&5

5757

- echo "$as_me:6787: \$? = $ac_status" >&5

5758

+ echo "$as_me:6793: \$? = $ac_status" >&5

5759

if (exit $ac_status) && test -s out/conftest2.$ac_objext

5760

then

5761

# The compiler can only warn and ignore the option if not recognized

5762

@@ -8099,7 +8105,7 @@

5763

libsuff=

5764

case "$host_cpu" in

5765

x86_64*|s390x*|powerpc64*)

5766

- echo '#line 8102 "configure"' > conftest.$ac_ext

5767

+ echo '#line 8108 "configure"' > conftest.$ac_ext

5768

if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5

5769

(eval $ac_compile) 2>&5

5770

ac_status=$?

5771

@@ -8652,7 +8658,7 @@

5772

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5773

lt_status=$lt_dlunknown

5774

cat > conftest.$ac_ext <<EOF

5775

-#line 8655 "configure"

5776

+#line 8661 "configure"

5777

#include "confdefs.h"

5778

5779

#if HAVE_DLFCN_H

5780

@@ -8750,7 +8756,7 @@

5781

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5782

lt_status=$lt_dlunknown

5783

cat > conftest.$ac_ext <<EOF

5784

-#line 8753 "configure"

5785

+#line 8759 "configure"

5786

#include "confdefs.h"

5787

5788

#if HAVE_DLFCN_H

5789

@@ -10591,7 +10597,7 @@

5790

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5791

lt_status=$lt_dlunknown

5792

cat > conftest.$ac_ext <<EOF

5793

-#line 10594 "configure"

5794

+#line 10600 "configure"

5795

#include "confdefs.h"

5796

5797

#if HAVE_DLFCN_H

5798

Index: libjava/libltdl/ChangeLog

5799

===================================================================

5800

--- a/src/libjava/libltdl/ChangeLog (.../tags/gcc_4_8_2_release)

5801

+++ b/src/libjava/libltdl/ChangeLog (.../branches/gcc-4_8-branch)

5802

@@ -1,3 +1,11 @@

5803

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5804

+

5805

+ Backport from mainline

5806

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5807

+

5808

+ * acinclude.m4: Update to mainline version.

5809

+ * configure: Regenerate.

5810

+

5811

2013-10-16 Release Manager

5812

5813

* GCC 4.8.2 released.

5814

Index: libjava/libltdl/acinclude.m4

5815

===================================================================

5816

--- a/src/libjava/libltdl/acinclude.m4 (.../tags/gcc_4_8_2_release)

5817

+++ b/src/libjava/libltdl/acinclude.m4 (.../branches/gcc-4_8-branch)

5818

@@ -519,7 +519,7 @@

5819

rm -rf conftest*

5820

;;

5821

5822

-x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

5823

+x86_64-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

5824

# Find out which ABI we are using.

5825

echo 'int i;' > conftest.$ac_ext

5826

if AC_TRY_EVAL(ac_compile); then

5827

@@ -529,7 +529,10 @@

5828

x86_64-*linux*)

5829

LD="${LD-ld} -m elf_i386"

5830

;;

5831

- ppc64-*linux*|powerpc64-*linux*)

5832

+ powerpc64le-*linux*)

5833

+ LD="${LD-ld} -m elf32lppclinux"

5834

+ ;;

5835

+ powerpc64-*linux*)

5836

LD="${LD-ld} -m elf32ppclinux"

5837

;;

5838

s390x-*linux*)

5839

@@ -545,7 +548,10 @@

5840

x86_64-*linux*)

5841

LD="${LD-ld} -m elf_x86_64"

5842

;;

5843

- ppc*-*linux*|powerpc*-*linux*)

5844

+ powerpcle-*linux*)

5845

+ LD="${LD-ld} -m elf64lppc"

5846

+ ;;

5847

+ powerpc-*linux*)

5848

LD="${LD-ld} -m elf64ppc"

5849

;;

5850

s390*-*linux*)

5851

Index: libjava/classpath/ChangeLog

5852

===================================================================

5853

--- a/src/libjava/classpath/ChangeLog (.../tags/gcc_4_8_2_release)

5854

+++ b/src/libjava/classpath/ChangeLog (.../branches/gcc-4_8-branch)

5855

@@ -1,3 +1,10 @@

5856

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5857

+

5858

+ Backport from mainline

5859

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5860

+

5861

+ * configure: Regenerate.

5862

+

5863

2013-10-16 Release Manager

5864

5865

* GCC 4.8.2 released.

5866

Index: libjava/classpath/configure

5867

===================================================================

5868

--- a/src/libjava/classpath/configure (.../tags/gcc_4_8_2_release)

5869

+++ b/src/libjava/classpath/configure (.../branches/gcc-4_8-branch)

5870

@@ -7577,7 +7577,7 @@

5871

rm -rf conftest*

5872

;;

5873

5874

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5875

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5876

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5877

# Find out which ABI we are using.

5878

echo 'int i;' > conftest.$ac_ext

5879

@@ -7602,7 +7602,10 @@

5880

;;

5881

esac

5882

;;

5883

- ppc64-*linux*|powerpc64-*linux*)

5884

+ powerpc64le-*linux*)

5885

+ LD="${LD-ld} -m elf32lppclinux"

5886

+ ;;

5887

+ powerpc64-*linux*)

5888

LD="${LD-ld} -m elf32ppclinux"

5889

;;

5890

s390x-*linux*)

5891

@@ -7621,7 +7624,10 @@

5892

x86_64-*linux*)

5893

LD="${LD-ld} -m elf_x86_64"

5894

;;

5895

- ppc*-*linux*|powerpc*-*linux*)

5896

+ powerpcle-*linux*)

5897

+ LD="${LD-ld} -m elf64lppc"

5898

+ ;;

5899

+ powerpc-*linux*)

5900

LD="${LD-ld} -m elf64ppc"

5901

;;

5902

s390*-*linux*|s390*-*tpf*)

5903

@@ -11820,7 +11826,7 @@

5904

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5905

lt_status=$lt_dlunknown

5906

cat > conftest.$ac_ext <<_LT_EOF

5907

-#line 11823 "configure"

5908

+#line 11829 "configure"

5909

#include "confdefs.h"

5910

5911

#if HAVE_DLFCN_H

5912

@@ -11926,7 +11932,7 @@

5913

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5914

lt_status=$lt_dlunknown

5915

cat > conftest.$ac_ext <<_LT_EOF

5916

-#line 11929 "configure"

5917

+#line 11935 "configure"

5918

#include "confdefs.h"

5919

5920

#if HAVE_DLFCN_H

5921

@@ -25300,7 +25306,7 @@

5922

JAVA_TEST=Object.java

5923

CLASS_TEST=Object.class

5924

cat << \EOF > $JAVA_TEST

5925

-/* #line 25303 "configure" */

5926

+/* #line 25309 "configure" */

5927

package java.lang;

5928

5929

public class Object

5930

@@ -25393,7 +25399,7 @@

5931

if uudecode$EXEEXT Test.uue; then

5932

ac_cv_prog_uudecode_base64=yes

5933

else

5934

- echo "configure: 25396: uudecode had trouble decoding base 64 file 'Test.uue'" >&5

5935

+ echo "configure: 25402: uudecode had trouble decoding base 64 file 'Test.uue'" >&5

5936

echo "configure: failed file was:" >&5

5937

cat Test.uue >&5

5938

ac_cv_prog_uudecode_base64=no

5939

@@ -25421,7 +25427,7 @@

5940

CLASS_TEST=Test.class

5941

TEST=Test

5942

cat << \EOF > $JAVA_TEST

5943

-/* [#]line 25424 "configure" */

5944

+/* [#]line 25430 "configure" */

5945

public class Test {

5946

public static void main (String args[]) {

5947

System.exit (0);

5948

@@ -25629,7 +25635,7 @@

5949

JAVA_TEST=Test.java

5950

CLASS_TEST=Test.class

5951

cat << \EOF > $JAVA_TEST

5952

- /* #line 25632 "configure" */

5953

+ /* #line 25638 "configure" */

5954

public class Test

5955

{

5956

public static void main(String args)

5957

Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c

5958

===================================================================

5959

--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../tags/gcc_4_8_2_release)

5960

+++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../branches/gcc-4_8-branch)

5961

@@ -39,10 +39,11 @@

5962

#include <pango/pango.h>

5963

#include <pango/pangoft2.h>

5964

#include <pango/pangofc-font.h>

5965

-#include <freetype/ftglyph.h>

5966

-#include <freetype/ftoutln.h>

5967

-#include <freetype/fttypes.h>

5968

-#include <freetype/tttables.h>

5969

+#include <ft2build.h>

5970

+#include FT_GLYPH_H

5971

+#include FT_OUTLINE_H

5972

+#include FT_TYPES_H

5973

+#include FT_TRUETYPE_TABLES_H

5974

#include "gdkfont.h"

5975

#include "gtkpeer.h"

5976

#include "gnu_java_awt_peer_gtk_GdkFontPeer.h"

5977

Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c

5978

===================================================================

5979

--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../tags/gcc_4_8_2_release)

5980

+++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../branches/gcc-4_8-branch)

5981

@@ -42,8 +42,9 @@

5982

#include <pango/pango.h>

5983

#include <pango/pangoft2.h>

5984

#include <pango/pangofc-font.h>

5985

-#include <freetype/ftglyph.h>

5986

-#include <freetype/ftoutln.h>

5987

+#include <ft2build.h>

5988

+#include FT_GLYPH_H

5989

+#include FT_OUTLINE_H

5990

#include "jcl.h"

5991

#include "gdkfont.h"

5992

#include "gnu_java_awt_peer_gtk_FreetypeGlyphVector.h"

5993

Index: libjava/classpath/ChangeLog.gcj

5994

===================================================================

5995

--- a/src/libjava/classpath/ChangeLog.gcj (.../tags/gcc_4_8_2_release)

5996

+++ b/src/libjava/classpath/ChangeLog.gcj (.../branches/gcc-4_8-branch)

5997

@@ -1,3 +1,9 @@

5998

+2013-11-29 Matthias Klose <doko@ubuntu.com>

5999

+

6000

+ * native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c,

6001

+ native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c:

6002

+ Fix freetype includes.

6003

+

6004

2013-03-22 Jakub Jelinek <jakub@redhat.com>

6005

6006

PR other/43620

6007

Index: libjava/classpath

6008

===================================================================

6009

--- a/src/libjava/classpath (.../tags/gcc_4_8_2_release)

6010

+++ b/src/libjava/classpath (.../branches/gcc-4_8-branch)

6011

6012

Property changes on: libjava/classpath

6013

___________________________________________________________________

6014

Modified: svn:mergeinfo

6015

Merged /trunk/libjava/classpath:r206395

6016

Index: libjava/ChangeLog

6017

===================================================================

6018

--- a/src/libjava/ChangeLog (.../tags/gcc_4_8_2_release)

6019

+++ b/src/libjava/ChangeLog (.../branches/gcc-4_8-branch)

6020

@@ -1,3 +1,23 @@

6021

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

6022

+

6023

+ Backport from mainline

6024

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6025

+

6026

+ * configure: Regenerate.

6027

+

6028

+2014-04-01 Dominique d'Humieres <dominiq@lps.ens.fr>

6029

+

6030

+ Backport from mainline

6031

+ 2014-02-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

6032

+

6033

+ PR libgcj/55637

6034

+ * testsuite/libjava.lang/sourcelocation.xfail: New file.

6035

+

6036

+2014-03-11 Uros Bizjak <ubizjak@gmail.com>

6037

+

6038

+ * java/lang/natObject.cc (_Jv_MonitorEnter): Add missing parenthesis

6039

+ around comparison with (address | LOCKED) in JvAssert.

6040

+

6041

2013-10-16 Release Manager

6042

6043

* GCC 4.8.2 released.

6044

Index: libjava/testsuite/libjava.lang/sourcelocation.xfail

6045

===================================================================

6046

--- a/src/libjava/testsuite/libjava.lang/sourcelocation.xfail (.../tags/gcc_4_8_2_release)

6047

+++ b/src/libjava/testsuite/libjava.lang/sourcelocation.xfail (.../branches/gcc-4_8-branch)

6048

@@ -0,0 +1 @@

6049

+xfail-output

6050

Index: libjava/configure

6051

===================================================================

6052

--- a/src/libjava/configure (.../tags/gcc_4_8_2_release)

6053

+++ b/src/libjava/configure (.../branches/gcc-4_8-branch)

6054

@@ -8842,7 +8842,7 @@

6055

rm -rf conftest*

6056

;;

6057

6058

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

6059

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

6060

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

6061

# Find out which ABI we are using.

6062

echo 'int i;' > conftest.$ac_ext

6063

@@ -8867,7 +8867,10 @@

6064

;;

6065

esac

6066

;;

6067

- ppc64-*linux*|powerpc64-*linux*)

6068

+ powerpc64le-*linux*)

6069

+ LD="${LD-ld} -m elf32lppclinux"

6070

+ ;;

6071

+ powerpc64-*linux*)

6072

LD="${LD-ld} -m elf32ppclinux"

6073

;;

6074

s390x-*linux*)

6075

@@ -8886,7 +8889,10 @@

6076

x86_64-*linux*)

6077

LD="${LD-ld} -m elf_x86_64"

6078

;;

6079

- ppc*-*linux*|powerpc*-*linux*)

6080

+ powerpcle-*linux*)

6081

+ LD="${LD-ld} -m elf64lppc"

6082

+ ;;

6083

+ powerpc-*linux*)

6084

LD="${LD-ld} -m elf64ppc"

6085

;;

6086

s390*-*linux*|s390*-*tpf*)

6087

@@ -13382,7 +13388,7 @@

6088

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

6089

lt_status=$lt_dlunknown

6090

cat > conftest.$ac_ext <<_LT_EOF

6091

-#line 13385 "configure"

6092

+#line 13391 "configure"

6093

#include "confdefs.h"

6094

6095

#if HAVE_DLFCN_H

6096

@@ -13488,7 +13494,7 @@

6097

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

6098

lt_status=$lt_dlunknown

6099

cat > conftest.$ac_ext <<_LT_EOF

6100

-#line 13491 "configure"

6101

+#line 13497 "configure"

6102

#include "confdefs.h"

6103

6104

#if HAVE_DLFCN_H

6105

@@ -19483,7 +19489,7 @@

6106

enableval=$enable_sjlj_exceptions; :

6107

else

6108

cat > conftest.$ac_ext << EOF

6109

-#line 19486 "configure"

6110

+#line 19492 "configure"

6111

struct S { ~S(); };

6112

void bar();

6113

void foo()

6114

Index: libjava/java/lang/natObject.cc

6115

===================================================================

6116

--- a/src/libjava/java/lang/natObject.cc (.../tags/gcc_4_8_2_release)

6117

+++ b/src/libjava/java/lang/natObject.cc (.../branches/gcc-4_8-branch)

6118

@@ -929,7 +929,7 @@

6119

// only be held by other threads waiting for conversion, and

6120

// they, like us, drop it quickly without blocking.

6121

_Jv_MutexLock(&(hl->si.mutex));

6122

- JvAssert(he -> address == address | LOCKED );

6123

+ JvAssert(he -> address == (address | LOCKED));

6124

release_set(&(he -> address), (address | REQUEST_CONVERSION | HEAVY));

6125

// release lock on he

6126

LOG(REQ_CONV, (address | REQUEST_CONVERSION | HEAVY), self);

6127

@@ -961,7 +961,7 @@

6128

}

6129

obj_addr_t was_heavy = (address & HEAVY);

6130

if ((address & LOCKED) ||

6131

- !compare_and_swap(&(he -> address), address, (address | LOCKED )))

6132

+ !compare_and_swap(&(he -> address), address, address | LOCKED ))

6133

{

6134

wait_unlocked(he);

6135

goto retry;

6136

Index: gnattools/configure

6137

===================================================================

6138

--- a/src/gnattools/configure (.../tags/gcc_4_8_2_release)

6139

+++ b/src/gnattools/configure (.../branches/gcc-4_8-branch)

6140

@@ -2029,66 +2029,59 @@

6141

# Per-target case statement

6142

# -------------------------

6143

case "${target}" in

6144

- alpha*-dec-vx*) # Unlike all other Vxworks

6145

+ *-*-aix*)

6146

+ TOOLS_TARGET_PAIRS="\

6147

+ mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6148

+ indepsw.adb<indepsw-aix.adb"

6149

;;

6150

- m68k*-wrs-vx* \

6151

- | powerpc*-wrs-vxworks \

6152

- | sparc*-wrs-vx* \

6153

- | *86-wrs-vxworks \

6154

- | mips*-wrs-vx*)

6155

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb"

6156

+ *-*-darwin*)

6157

+ TOOLS_TARGET_PAIRS="\

6158

+ mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb \

6159

+ indepsw.adb<indepsw-darwin.adb"

6160

;;

6161

- sparc-sun-solaris*)

6162

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6163

+ *-*-freebsd*)

6164

+ TOOLS_TARGET_PAIRS="\

6165

+ mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6166

+ indepsw.adb<indepsw-gnu.adb"

6167

;;

6168

- *86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)

6169

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6170

- ;;

6171

- *86-*-linux* \

6172

- | powerpc*-*-linux* \

6173

- | *ia64-*-linux* \

6174

- | alpha*-*-linux* \

6175

- | sparc*-*-linux* \

6176

- | hppa*-*-linux* \

6177

- | *x86_64-*-linux*)

6178

+ *-*-linux*)

6179

TOOLS_TARGET_PAIRS="\

6180

mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6181

indepsw.adb<indepsw-gnu.adb"

6182

;;

6183

- s390*-*-linux*)

6184

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb"

6185

+ *-*-lynxos*)

6186

+ TOOLS_TARGET_PAIRS="\

6187

+ mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6188

+ indepsw.adb<indepsw-gnu.adb"

6189

;;

6190

- *86-*-freebsd*)

6191

+ *-*-solaris*)

6192

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6193

+ ;;

6194

+ *-*-vxworks*)

6195

TOOLS_TARGET_PAIRS="\

6196

- mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6197

+ mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb \

6198

indepsw.adb<indepsw-gnu.adb"

6199

;;

6200

- hppa*-hp-hpux10*) # Unlike hpux11

6201

+ hppa*-hp-hpux10*)

6202

;;

6203

hppa*-hp-hpux11*)

6204

TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-hpux.adb"

6205

;;

6206

- *-ibm-aix*)

6207

- TOOLS_TARGET_PAIRS="\

6208

- mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6209

- indepsw.adb<indepsw-aix.adb"

6210

+ ia64-hp-hpux11*)

6211

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-ia64-hpux.adb"

6212

;;

6213

- alpha*-dec-vms* | alpha*-dec-openvms* | alpha*-dec-vms* \

6214

- | alpha*-hp-vms* | alpha*-hp-openvms* | alpha*-hp-vms*)

6215

+ alpha*-*-vms* | alpha*-*-openvms*)

6216

TOOLS_TARGET_PAIRS="\

6217

mlib-tgt-specific.adb<mlib-tgt-specific-vms-alpha.adb \

6218

symbols.adb<symbols-vms.adb \

6219

symbols-processing.adb<symbols-processing-vms-alpha.adb"

6220

-

6221

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6222

;;

6223

- ia64*-dec-vms* | ia64*-dec-openvms* | ia64*-dec-vms* \

6224

- | ia64*-hp-vms* | ia64*-hp-openvms* | ia64*-hp-vms*)

6225

+ ia64-*-vms* | ia64-*-openvms*)

6226

TOOLS_TARGET_PAIRS="\

6227

mlib-tgt-specific.adb<mlib-tgt-specific-vms-ia64.adb \

6228

symbols.adb<symbols-vms.adb \

6229

symbols-processing.adb<symbols-processing-vms-ia64.adb"

6230

-

6231

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6232

;;

6233

*-*-cygwin32* | *-*-mingw32* | *-*-pe)

6234

@@ -2097,14 +2090,6 @@

6235

indepsw.adb<indepsw-mingw.adb"

6236

EXTRA_GNATTOOLS='../../gnatdll$(exeext)'

6237

;;

6238

- *-*-darwin*)

6239

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb"

6240

- ;;

6241

- *-*-lynxos)

6242

- TOOLS_TARGET_PAIRS="\

6243

- mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6244

- indepsw.adb<indepsw-gnu.adb"

6245

- ;;

6246

esac

6247

6248

# From user or toplevel makefile.

6249

Index: gnattools/Makefile.in

6250

===================================================================

6251

--- a/src/gnattools/Makefile.in (.../tags/gcc_4_8_2_release)

6252

+++ b/src/gnattools/Makefile.in (.../branches/gcc-4_8-branch)

6253

@@ -24,6 +24,8 @@

6254

libdir = @libdir@

6255

build = @build@

6256

target = @target@

6257

+host = @host@

6258

+host_alias = @host_alias@

6259

prefix = @prefix@

6260

INSTALL = @INSTALL@

6261

INSTALL_DATA = @INSTALL_DATA@

6262

@@ -84,6 +86,7 @@

6263

TOOLS_FLAGS_TO_PASS_RE= \

6264

"CC=../../xgcc -B../../" \

6265

"CFLAGS=$(CFLAGS)" \

6266

+ "LDFLAGS=$(LDFLAGS)" \

6267

"ADAFLAGS=$(ADAFLAGS)" \

6268

"ADA_CFLAGS=$(ADA_CFLAGS)" \

6269

"INCLUDES=$(INCLUDES_FOR_SUBDIR)" \

6270

@@ -97,6 +100,22 @@

6271

"TOOLSCASE=cross"

6272

6273

# Variables for gnattools, cross

6274

+ifeq ($(build), $(host))

6275

+ GNATMAKE_FOR_HOST=gnatmake

6276

+ GNATLINK_FOR_HOST=gnatlink

6277

+ GNATBIND_FOR_HOST=gnatbind

6278

+ GNATLS_FOR_HOST=gnatls

6279

+else

6280

+ GNATMAKE_FOR_HOST=$(host_alias)-gnatmake

6281

+ GNATLINK_FOR_HOST=$(host_alias)-gnatlink

6282

+ GNATBIND_FOR_HOST=$(host_alias)-gnatbind

6283

+ GNATLS_FOR_HOST=$(host_alias)-gnatls

6284

+endif

6285

+

6286

+# Put the host RTS dir first in the PATH to hide the default runtime

6287

+# files that are among the sources

6288

+RTS_DIR:=$(strip $(subst \,/,$(shell $(GNATLS_FOR_HOST) -v | grep adalib )))

6289

+

6290

TOOLS_FLAGS_TO_PASS_CROSS= \

6291

"CC=$(CC)" \

6292

"CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" \

6293

@@ -108,9 +127,9 @@

6294

"exeext=$(exeext)" \

6295

"fsrcdir=$(fsrcdir)" \

6296

"srcdir=$(fsrcdir)" \

6297

- "GNATMAKE=gnatmake" \

6298

- "GNATLINK=gnatlink" \

6299

- "GNATBIND=gnatbind" \

6300

+ "GNATMAKE=$(GNATMAKE_FOR_HOST)" \

6301

+ "GNATLINK=$(GNATLINK_FOR_HOST)" \

6302

+ "GNATBIND=$(GNATBIND_FOR_HOST)" \

6303

"TOOLSCASE=cross" \

6304

"LIBGNAT="

6305

6306

@@ -179,11 +198,6 @@

6307

$(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \

6308

$(TOOLS_FLAGS_TO_PASS_NATIVE) common-tools

6309

6310

-# For cross builds of gnattools,

6311

-# put the host RTS dir first in the PATH to hide the default runtime

6312

-# files that are among the sources

6313

-# FIXME: This should be done in configure.

6314

-RTS_DIR:=$(strip $(subst \,/,$(shell gnatls -v | grep adalib )))

6315

gnattools-cross: $(GCC_DIR)/stamp-tools

6316

# gnattools1-re

6317

$(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \

6318

Index: gnattools/configure.ac

6319

===================================================================

6320

--- a/src/gnattools/configure.ac (.../tags/gcc_4_8_2_release)

6321

+++ b/src/gnattools/configure.ac (.../branches/gcc-4_8-branch)

6322

@@ -69,66 +69,59 @@

6323

# Per-target case statement

6324

# -------------------------

6325

case "${target}" in

6326

- alpha*-dec-vx*) # Unlike all other Vxworks

6327

+ *-*-aix*)

6328

+ TOOLS_TARGET_PAIRS="\

6329

+ mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6330

+ indepsw.adb<indepsw-aix.adb"

6331

;;

6332

- m68k*-wrs-vx* \

6333

- | powerpc*-wrs-vxworks \

6334

- | sparc*-wrs-vx* \

6335

- | *86-wrs-vxworks \

6336

- | mips*-wrs-vx*)

6337

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb"

6338

+ *-*-darwin*)

6339

+ TOOLS_TARGET_PAIRS="\

6340

+ mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb \

6341

+ indepsw.adb<indepsw-darwin.adb"

6342

;;

6343

- sparc-sun-solaris*)

6344

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6345

+ *-*-freebsd*)

6346

+ TOOLS_TARGET_PAIRS="\

6347

+ mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6348

+ indepsw.adb<indepsw-gnu.adb"

6349

;;

6350

- *86-*-solaris2* | x86_64-*-solaris2.1[[0-9]]*)

6351

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6352

- ;;

6353

- *86-*-linux* \

6354

- | powerpc*-*-linux* \

6355

- | *ia64-*-linux* \

6356

- | alpha*-*-linux* \

6357

- | sparc*-*-linux* \

6358

- | hppa*-*-linux* \

6359

- | *x86_64-*-linux*)

6360

+ *-*-linux*)

6361

TOOLS_TARGET_PAIRS="\

6362

mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6363

indepsw.adb<indepsw-gnu.adb"

6364

;;

6365

- s390*-*-linux*)

6366

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb"

6367

+ *-*-lynxos*)

6368

+ TOOLS_TARGET_PAIRS="\

6369

+ mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6370

+ indepsw.adb<indepsw-gnu.adb"

6371

;;

6372

- *86-*-freebsd*)

6373

+ *-*-solaris*)

6374

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6375

+ ;;

6376

+ *-*-vxworks*)

6377

TOOLS_TARGET_PAIRS="\

6378

- mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6379

+ mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb \

6380

indepsw.adb<indepsw-gnu.adb"

6381

;;

6382

- hppa*-hp-hpux10*) # Unlike hpux11

6383

+ hppa*-hp-hpux10*)

6384

;;

6385

hppa*-hp-hpux11*)

6386

TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-hpux.adb"

6387

;;

6388

- *-ibm-aix*)

6389

- TOOLS_TARGET_PAIRS="\

6390

- mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6391

- indepsw.adb<indepsw-aix.adb"

6392

+ ia64-hp-hpux11*)

6393

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-ia64-hpux.adb"

6394

;;

6395

- alpha*-dec-vms* | alpha*-dec-openvms* | alpha*-dec-vms* \

6396

- | alpha*-hp-vms* | alpha*-hp-openvms* | alpha*-hp-vms*)

6397

+ alpha*-*-vms* | alpha*-*-openvms*)

6398

TOOLS_TARGET_PAIRS="\

6399

mlib-tgt-specific.adb<mlib-tgt-specific-vms-alpha.adb \

6400

symbols.adb<symbols-vms.adb \

6401

symbols-processing.adb<symbols-processing-vms-alpha.adb"

6402

-

6403

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6404

;;

6405

- ia64*-dec-vms* | ia64*-dec-openvms* | ia64*-dec-vms* \

6406

- | ia64*-hp-vms* | ia64*-hp-openvms* | ia64*-hp-vms*)

6407

+ ia64-*-vms* | ia64-*-openvms*)

6408

TOOLS_TARGET_PAIRS="\

6409

mlib-tgt-specific.adb<mlib-tgt-specific-vms-ia64.adb \

6410

symbols.adb<symbols-vms.adb \

6411

symbols-processing.adb<symbols-processing-vms-ia64.adb"

6412

-

6413

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6414

;;

6415

*-*-cygwin32* | *-*-mingw32* | *-*-pe)

6416

@@ -137,14 +130,6 @@

6417

indepsw.adb<indepsw-mingw.adb"

6418

EXTRA_GNATTOOLS='../../gnatdll$(exeext)'

6419

;;

6420

- *-*-darwin*)

6421

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb"

6422

- ;;

6423

- *-*-lynxos)

6424

- TOOLS_TARGET_PAIRS="\

6425

- mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6426

- indepsw.adb<indepsw-gnu.adb"

6427

- ;;

6428

esac

6429

6430

# From user or toplevel makefile.

6431

Index: gnattools/ChangeLog

6432

===================================================================

6433

--- a/src/gnattools/ChangeLog (.../tags/gcc_4_8_2_release)

6434

+++ b/src/gnattools/ChangeLog (.../branches/gcc-4_8-branch)

6435

@@ -1,3 +1,23 @@

6436

+2013-12-12 Eric Botcazou <ebotcazou@adacore.com>

6437

+ Iain Sandoe <iain@codesourcery.com>

6438

+

6439

+ PR ada/55946

6440

+ * Makefile.in (host): Define.

6441

+ (host_alias): Likewise.

6442

+ (TOOLS_FLAGS_TO_PASS_RE): Add LDFLAGS.

6443

+ (GNATMAKE_FOR_HOST): Define.

6444

+ (GNATLINK_FOR_HOST): Likewise.

6445

+ (GNATBIND_FOR_HOST): Likewise.

6446

+ (GNATLS_FOR_HOST): Likewise.

6447

+ (RTS_DIR): Move around and use GNATLS_FOR_HOST.

6448

+ (TOOLS_FLAGS_TO_PASS_CROSS): Use the other *_HOST variables.

6449

+

6450

+2013-12-04 Eric Botcazou <ebotcazou@adacore.com>

6451

+

6452

+ PR ada/59382

6453

+ * configure.ac (target parameterization): Rewrite.

6454

+ * configure: Regenerate.

6455

+

6456

2013-10-16 Release Manager

6457

6458

* GCC 4.8.2 released.

6459

Index: maintainer-scripts/ChangeLog

6460

===================================================================

6461

--- a/src/maintainer-scripts/ChangeLog (.../tags/gcc_4_8_2_release)

6462

+++ b/src/maintainer-scripts/ChangeLog (.../branches/gcc-4_8-branch)

6463

@@ -1,3 +1,9 @@

6464

+2014-02-01 Dmitry Gorbachev <d.g.gorbachev@gmail.com>

6465

+

6466

+ PR other/56653

6467

+ * gcc_release: Avoid printing empty line to generated MD5SUMS files.

6468

+ Bump copyright year.

6469

+

6470

2013-10-16 Release Manager

6471

6472

* GCC 4.8.2 released.

6473

Index: maintainer-scripts/gcc_release

6474

===================================================================

6475

--- a/src/maintainer-scripts/gcc_release (.../tags/gcc_4_8_2_release)

6476

+++ b/src/maintainer-scripts/gcc_release (.../branches/gcc-4_8-branch)

6477

@@ -9,7 +9,7 @@

6478

# Contents:

6479

# Script to create a GCC release.

6480

#

6481

6482

6483

#

6484

# This file is part of GCC.

6485

#

6486

@@ -213,7 +213,7 @@

6487

#

6488

# Suggested usage:

6489

# md5sum -c MD5SUMS | grep -v \"OK$\"

6490

-" > MD5SUMS

6491

+#" > MD5SUMS

6492

6493

find . -type f |

6494

sed -e 's:^\./::' -e '/MD5SUMS/d' |

6495

Index: libgcc/config.host

6496

===================================================================

6497

--- a/src/libgcc/config.host (.../tags/gcc_4_8_2_release)

6498

+++ b/src/libgcc/config.host (.../branches/gcc-4_8-branch)

6499

@@ -331,10 +331,10 @@

6500

;;

6501

arm*-*-uclinux*) # ARM ucLinux

6502

tmake_file="${tmake_file} t-fixedpoint-gnu-prefix"

6503

+ tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"

6504

tmake_file="${tmake_file} arm/t-bpabi"

6505

tm_file="$tm_file arm/bpabi-lib.h"

6506

unwind_header=config/arm/unwind-arm.h

6507

- tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"

6508

extra_parts="$extra_parts crti.o crtn.o"

6509

;;

6510

arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)

6511

@@ -718,6 +718,10 @@

6512

tmake_file="${tmake_file} microblaze/t-microblaze t-fdpbit"

6513

extra_parts="$extra_parts crtbeginS.o crtendS.o crtbeginT.o crti.o crtn.o"

6514

;;

6515

+microblaze*-*-rtems*)

6516

+ tmake_file="${tmake_file} microblaze/t-microblaze t-fdpbit"

6517

+ extra_parts="$extra_parts crtbeginS.o crtendS.o crtbeginT.o crti.o crtn.o"

6518

+ ;;

6519

mips*-*-netbsd*) # NetBSD/mips, either endian.

6520

;;

6521

mips*-*-linux*) # Linux MIPS, either endian.

6522

@@ -1081,7 +1085,7 @@

6523

md_unwind_header=tilepro/linux-unwind.h

6524

;;

6525

v850*-*-*)

6526

- tmake_file="v850/t-v850 t-fdpbit"

6527

+ tmake_file="${tmake_file} v850/t-v850 t-fdpbit"

6528

;;

6529

vax-*-linux*)

6530

tmake_file="$tmake_file vax/t-linux"

6531

@@ -1098,7 +1102,7 @@

6532

extra_parts="$extra_parts crti.o crtn.o"

6533

;;

6534

xtensa*-*-linux*)

6535

- tmake_file="$tmake_file xtensa/t-xtensa xtensa/t-linux"

6536

+ tmake_file="$tmake_file xtensa/t-xtensa xtensa/t-linux t-slibgcc-libgcc"

6537

md_unwind_header=xtensa/linux-unwind.h

6538

;;

6539

am33_2.0-*-linux*)

6540

Index: libgcc/ChangeLog

6541

===================================================================

6542

--- a/src/libgcc/ChangeLog (.../tags/gcc_4_8_2_release)

6543

+++ b/src/libgcc/ChangeLog (.../branches/gcc-4_8-branch)

6544

@@ -1,3 +1,206 @@

6545

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

6546

+

6547

+ Backport from mainline r204808:

6548

+

6549

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6550

+ Alan Modra <amodra@gmail.com>

6551

+

6552

+ * config/rs6000/linux-unwind.h (TOC_SAVE_SLOT): Define.

6553

+ (frob_update_context): Use it.

6554

+

6555

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6556

+ Alan Modra <amodra@gmail.com>

6557

+

6558

+ * config/rs6000/tramp.S [__powerpc64__ && _CALL_ELF == 2]:

6559

+ (trampoline_initial): Provide ELFv2 variant.

6560

+ (__trampoline_setup): Likewise.

6561

+

6562

+ * config/rs6000/linux-unwind.h (frob_update_context): Do not

6563

+ check for AIX indirect function call sequence if _CALL_ELF == 2.

6564

+

6565

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6566

+ Alan Modra <amodra@gmail.com>

6567

+

6568

+ * config/rs6000/linux-unwind.h (get_regs): Do not support

6569

+ old kernel versions if _CALL_ELF == 2.

6570

+ (frob_update_context): Do not support PLT stub variants only

6571

+ generated by old linkers if _CALL_ELF == 2.

6572

+

6573

+ Backport from mainline r204800:

6574

+

6575

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6576

+ Alan Modra <amodra@gmail.com>

6577

+

6578

+ * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Correct

6579

+ location of CR save area for 64-bit little-endian systems.

6580

+

6581

+2014-03-20 Joel Sherrill <joel.sherrill@oarcorp.com>

6582

+

6583

+ * config.host (v850*-*-*): Add to tmake_file instead of resetting it.

6584

+

6585

+2014-02-28 Joey Ye <joey.ye@arm.com>

6586

+

6587

+ Backport from mainline r208229

6588

+ 2014-02-28 Joey Ye <joey.ye@arm.com>

6589

+

6590

+ PR libgcc/60166

6591

+ * config/arm/sfp-machine.h (_FP_NANFRAC_H,

6592

+ _FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q):

6593

+ Set to zero.

6594

+

6595

+2014-02-18 Kai Tietz <ktietz@redhat.com>

6596

+ Jonathan Schleifer <js@webkeks.org>

6597

+

6598

+ PR objc/56870

6599

+ * unwind-seh.c (_GCC_specific_handler): Pass proper

6600

+ value to unwind-handler.

6601

+

6602

+2014-01-25 Walter Lee <walt@tilera.com>

6603

+

6604

+ Backport from mainline

6605

+ 2014-01-25 Walter Lee <walt@tilera.com>

6606

+

6607

+ * config/tilepro/atomic.c (pre_atomic_barrier): Mark inline.

6608

+ (post_atomic_barrier): Ditto.

6609

+ (__fetch_and_do): New macro.

6610

+ (__atomic_fetch_and_do): Use __fetch_and_do.

6611

+ (__sync_fetch_and_do): New macro.

6612

+ (__sync_fetch_and_add_4): New function.

6613

+ (__sync_fetch_and_sub_4): New function.

6614

+ (__sync_fetch_and_or_4): New function.

6615

+ (__sync_fetch_and_and_4): New function.

6616

+ (__sync_fetch_and_xor_4): New function.

6617

+ (__sync_fetch_and_nand_4): New function.

6618

+ (__sync_fetch_and_add_8): New function.

6619

+ (__sync_fetch_and_sub_8): New function.

6620

+ (__sync_fetch_and_or_8): New function.

6621

+ (__sync_fetch_and_and_8): New function.

6622

+ (__sync_fetch_and_xor_8): New function.

6623

+ (__sync_fetch_and_nand_8): New function.

6624

+ (__do_and_fetch): New macro.

6625

+ (__atomic_do_and_fetch): Use __do_and_fetch.

6626

+ (__sync_do_and_fetch): New macro.

6627

+ (__sync_add_and_fetch_4): New function.

6628

+ (__sync_sub_and_fetch_4): New function.

6629

+ (__sync_or_and_fetch_4): New function.

6630

+ (__sync_and_and_fetch_4): New function.

6631

+ (__sync_xor_and_fetch_4): New function.

6632

+ (__sync_nand_and_fetch_4): New function.

6633

+ (__sync_add_and_fetch_8): New function.

6634

+ (__sync_sub_and_fetch_8): New function.

6635

+ (__sync_or_and_fetch_8): New function.

6636

+ (__sync_and_and_fetch_8): New function.

6637

+ (__sync_xor_and_fetch_8): New function.

6638

+ (__sync_nand_and_fetch_8): New function.

6639

+ (__sync_exchange_methods): New macro.

6640

+ (__sync_val_compare_and_swap_4): New function.

6641

+ (__sync_bool_compare_and_swap_4): New function.

6642

+ (__sync_lock_test_and_test_4): New function.

6643

+ (__sync_val_compare_and_swap_8): New function.

6644

+ (__sync_bool_compare_and_swap_8): New function.

6645

+ (__sync_lock_test_and_test_8): New function.

6646

+ (__subword_cmpxchg_body): New macro.

6647

+ (__atomic_compare_exchange_1): Use __subword_cmpxchg_body.

6648

+ (__atomic_compare_exchange_2): Ditto.

6649

+ (__sync_subword_cmpxchg): New macro.

6650

+ (__sync_val_compare_and_swap_1): New function.

6651

+ (__sync_bool_compare_and_swap_1): New function.

6652

+ (__sync_val_compare_and_swap_2): New function.

6653

+ (__sync_bool_compare_and_swap_2): New function.

6654

+ (__atomic_subword): Rename to ...

6655

+ (__subword): ... New name.

6656

+ (__atomic_subword_fetch): Use __subword.

6657

+ (__sync_subword_fetch): New macro.

6658

+ (__sync_fetch_and_add_1): New function.

6659

+ (__sync_fetch_and_sub_1): New function.

6660

+ (__sync_fetch_and_or_1): New function.

6661

+ (__sync_fetch_and_and_1): New function.

6662

+ (__sync_fetch_and_xor_1): New function.

6663

+ (__sync_fetch_and_nand_1): New function.

6664

+ (__sync_fetch_and_add_2): New function.

6665

+ (__sync_fetch_and_sub_2): New function.

6666

+ (__sync_fetch_and_or_2): New function.

6667

+ (__sync_fetch_and_and_2): New function.

6668

+ (__sync_fetch_and_xor_2): New function.

6669

+ (__sync_fetch_and_nand_2): New function.

6670

+ (__sync_add_and_fetch_1): New function.

6671

+ (__sync_sub_and_fetch_1): New function.

6672

+ (__sync_or_and_fetch_1): New function.

6673

+ (__sync_and_and_fetch_1): New function.

6674

+ (__sync_xor_and_fetch_1): New function.

6675

+ (__sync_nand_and_fetch_1): New function.

6676

+ (__sync_add_and_fetch_2): New function.

6677

+ (__sync_sub_and_fetch_2): New function.

6678

+ (__sync_or_and_fetch_2): New function.

6679

+ (__sync_and_and_fetch_2): New function.

6680

+ (__sync_xor_and_fetch_2): New function.

6681

+ (__sync_nand_and_fetch_2): New function.

6682

+ (__atomic_subword_lock): Use __subword.

6683

+ (__sync_subword_lock): New macro.

6684

+ (__sync_lock_test_and_set_1): New function.

6685

+ (__sync_lock_test_and_set_2): New function.

6686

+

6687

+2014-01-25 Walter Lee <walt@tilera.com>

6688

+

6689

+ Backport from mainline

6690

+ 2014-01-25 Walter Lee <walt@tilera.com>

6691

+

6692

+ * config/tilepro/atomic.c (BIT_OFFSET): Define.

6693

+ (__atomic_subword_cmpxchg): Use BIT_OFFSET.

6694

+ (__atomic_subword): Ditto.

6695

+

6696

+2014-01-25 Walter Lee <walt@tilera.com>

6697

+

6698

+ Backport from mainline

6699

+ 2014-01-25 Walter Lee <walt@tilera.com>

6700

+

6701

+ * config/tilepro/atomic.c (__atomic_do_and_fetch): Add

6702

+ a prefix op argument.

6703

+ (__atomic_nand_fetch_4): Add prefix op.

6704

+ (__atomic_nand_fetch_8): Ditto.

6705

+

6706

+2014-01-21 Baruch Siach <barch@tkos.co.il>

6707

+

6708

+ * config.host (tmake_file): add t-slibgcc-libgcc for xtensa*-*-linux*.

6709

+

6710

+2014-01-03 Joseph Myers <joseph@codesourcery.com>

6711

+

6712

+ * config/rs6000/ibm-ldouble.c (__gcc_qdiv): Scale up arguments in

6713

+ case of small numerator and finite nonzero result.

6714

+

6715

+2013-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>

6716

+

6717

+ Backport from trunk r205917.

6718

+ 2013-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>

6719

+ * config.host (arm*-*-uclinux*): Move t-arm before t-bpabi.

6720

+

6721

+2013-12-10 Uros Bizjak <ubizjak@gmail.com>

6722

+

6723

+ * config/i386/sfp-exceptions.c (__sfp_handle_exceptions): Emit SSE

6724

+ instructions when __SSE_MATH__ is defined.

6725

+

6726

+2013-12-06 Ralf Corsépius <ralf.corsepius@rtems.org>

6727

+

6728

+ * config.host (microblaze-*-rtems*): New.

6729

+

6730

+2013-11-10 Kai Tietz <ktietz@redhat.com>

6731

+

6732

+ Back-merged from trunk

6733

+ * config/i386/cygming-crtbegin.c (__gcc_register_frame):

6734

+ Increment load-count on use of LIBGCC_SONAME DLL.

6735

+ (hmod_libgcc): New static variable to hold handle of

6736

+ LIBGCC_SONAME DLL.

6737

+ (__gcc_deregister_frame): Decrement load-count of

6738

+ LIBGCC_SONAME DLL.

6739

+

6740

+2013-11-07 Uros Bizjak <ubizjak@gmail.com>

6741

+

6742

+ * config/i386/sfp-exceptions.c (__sfp_handle_exceptions): Handle

6743

+ FP_EX_DENORM. Store result to volatile location after SSE division

6744

+ to close interrupt window. Remove unneeded fwait after x87

6745

+ division since interrupt window will be closed by emitted fstp.

6746

+ Rewrite FP_EX_INEXACT handling.

6747

+

6748

2013-10-16 Release Manager

6749

6750

* GCC 4.8.2 released.

6751

@@ -151,7 +354,7 @@

6752

* config/mips/crtn.S (fini, init): New labels.

6753

6754

2012-02-19 Edgar E. Iglesias <edgar.iglesias@gmail.com>

6755

- * config/microblaze/modsi3.S (modsi3): Fix case with 0x80000000

6756

+ * config/microblaze/modsi3.S (modsi3): Fix case with 0x80000000

6757

as dividend.

6758

6759

2013-02-16 Alan Modra <amodra@gmail.com>

6760

Index: libgcc/config/i386/sfp-exceptions.c

6761

===================================================================

6762

--- a/src/libgcc/config/i386/sfp-exceptions.c (.../tags/gcc_4_8_2_release)

6763

+++ b/src/libgcc/config/i386/sfp-exceptions.c (.../branches/gcc-4_8-branch)

6764

@@ -47,21 +47,33 @@

6765

if (_fex & FP_EX_INVALID)

6766

{

6767

float f = 0.0f;

6768

-#ifdef __x86_64__

6769

+#ifdef __SSE_MATH__

6770

+ volatile float r __attribute__ ((unused));

6771

asm volatile ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f));

6772

+ r = f; /* Needed to trigger exception. */

6773

#else

6774

asm volatile ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f));

6775

- asm volatile ("fwait");

6776

+ /* No need for fwait, exception is triggered by emitted fstp. */

6777

#endif

6778

}

6779

+ if (_fex & FP_EX_DENORM)

6780

+ {

6781

+ struct fenv temp;

6782

+ asm volatile ("fnstenv\t%0" : "=m" (temp));

6783

+ temp.__status_word |= FP_EX_DENORM;

6784

+ asm volatile ("fldenv\t%0" : : "m" (temp));

6785

+ asm volatile ("fwait");

6786

+ }

6787

if (_fex & FP_EX_DIVZERO)

6788

{

6789

float f = 1.0f, g = 0.0f;

6790

-#ifdef __x86_64__

6791

+#ifdef __SSE_MATH__

6792

+ volatile float r __attribute__ ((unused));

6793

asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));

6794

+ r = f; /* Needed to trigger exception. */

6795

#else

6796

asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));

6797

- asm volatile ("fwait");

6798

+ /* No need for fwait, exception is triggered by emitted fstp. */

6799

#endif

6800

}

6801

if (_fex & FP_EX_OVERFLOW)

6802

@@ -82,11 +94,15 @@

6803

}

6804

if (_fex & FP_EX_INEXACT)

6805

{

6806

- struct fenv temp;

6807

- asm volatile ("fnstenv\t%0" : "=m" (temp));

6808

- temp.__status_word |= FP_EX_INEXACT;

6809

- asm volatile ("fldenv\t%0" : : "m" (temp));

6810

- asm volatile ("fwait");

6811

+ float f = 1.0f, g = 3.0f;

6812

+#ifdef __SSE_MATH__

6813

+ volatile float r __attribute__ ((unused));

6814

+ asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));

6815

+ r = f; /* Needed to trigger exception. */

6816

+#else

6817

+ asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));

6818

+ /* No need for fwait, exception is triggered by emitted fstp. */

6819

+#endif

6820

}

6821

};

6822

#endif

6823

Index: libgcc/config/i386/cygming-crtbegin.c

6824

===================================================================

6825

--- a/src/libgcc/config/i386/cygming-crtbegin.c (.../tags/gcc_4_8_2_release)

6826

+++ b/src/libgcc/config/i386/cygming-crtbegin.c (.../branches/gcc-4_8-branch)

6827

@@ -69,6 +69,9 @@

6828

= { };

6829

6830

static struct object obj;

6831

+

6832

+/* Handle of libgcc's DLL reference. */

6833

+HANDLE hmod_libgcc;

6834

#endif

6835

6836

#if TARGET_USE_JCR_SECTION

6837

@@ -93,9 +96,14 @@

6838

6839

void (*register_frame_fn) (const void *, struct object *);

6840

HANDLE h = GetModuleHandle (LIBGCC_SONAME);

6841

+

6842

if (h)

6843

- register_frame_fn = (void (*) (const void *, struct object *))

6844

- GetProcAddress (h, "__register_frame_info");

6845

+ {

6846

+ /* Increasing the load-count of LIBGCC_SONAME DLL. */

6847

+ hmod_libgcc = LoadLibrary (LIBGCC_SONAME);

6848

+ register_frame_fn = (void (*) (const void *, struct object *))

6849

+ GetProcAddress (h, "__register_frame_info");

6850

+ }

6851

else

6852

register_frame_fn = __register_frame_info;

6853

if (register_frame_fn)

6854

@@ -132,5 +140,7 @@

6855

deregister_frame_fn = __deregister_frame_info;

6856

if (deregister_frame_fn)

6857

deregister_frame_fn (__EH_FRAME_BEGIN__);

6858

+ if (hmod_libgcc)

6859

+ FreeLibrary (hmod_libgcc);

6860

#endif

6861

}

6862

Index: libgcc/config/rs6000/tramp.S

6863

===================================================================

6864

--- a/src/libgcc/config/rs6000/tramp.S (.../tags/gcc_4_8_2_release)

6865

+++ b/src/libgcc/config/rs6000/tramp.S (.../branches/gcc-4_8-branch)

6866

@@ -116,4 +116,70 @@

6867

6868

#endif

6869

6870

+#elif _CALL_ELF == 2

6871

+ .type trampoline_initial,@object

6872

+ .align 3

6873

+trampoline_initial:

6874

+ ld r11,.Lchain(r12)

6875

+ ld r12,.Lfunc(r12)

6876

+ mtctr r12

6877

+ bctr

6878

+.Lfunc = .-trampoline_initial

6879

+ .quad 0 /* will be replaced with function address */

6880

+.Lchain = .-trampoline_initial

6881

+ .quad 0 /* will be replaced with static chain */

6882

+

6883

+trampoline_size = .-trampoline_initial

6884

+ .size trampoline_initial,trampoline_size

6885

+

6886

+

6887

+/* R3 = stack address to store trampoline */

6888

+/* R4 = length of trampoline area */

6889

+/* R5 = function address */

6890

+/* R6 = static chain */

6891

+

6892

+ .pushsection ".toc","aw"

6893

+.LC0:

6894

+ .quad trampoline_initial-8

6895

+ .popsection

6896

+

6897

+FUNC_START(__trampoline_setup)

6898

+ addis 7,2,.LC0@toc@ha

6899

+ ld 7,.LC0@toc@l(7) /* trampoline address -8 */

6900

+

6901

+ li r8,trampoline_size /* verify that the trampoline is big enough */

6902

+ cmpw cr1,r8,r4

6903

+ srwi r4,r4,3 /* # doublewords to move */

6904

+ addi r9,r3,-8 /* adjust pointer for stdu */

6905

+ mtctr r4

6906

+ blt cr1,.Labort

6907

+

6908

+ /* Copy the instructions to the stack */

6909

+.Lmove:

6910

+ ldu r10,8(r7)

6911

+ stdu r10,8(r9)

6912

+ bdnz .Lmove

6913

+

6914

+ /* Store correct function and static chain */

6915

+ std r5,.Lfunc(r3)

6916

+ std r6,.Lchain(r3)

6917

+

6918

+ /* Now flush both caches */

6919

+ mtctr r4

6920

+.Lcache:

6921

+ icbi 0,r3

6922

+ dcbf 0,r3

6923

+ addi r3,r3,8

6924

+ bdnz .Lcache

6925

+

6926

+ /* Finally synchronize things & return */

6927

+ sync

6928

+ isync

6929

+ blr

6930

+

6931

+.Labort:

6932

+ bl JUMP_TARGET(abort)

6933

+ nop

6934

+FUNC_END(__trampoline_setup)

6935

+

6936

#endif

6937

Index: libgcc/config/rs6000/linux-unwind.h

6938

===================================================================

6939

--- a/src/libgcc/config/rs6000/linux-unwind.h (.../tags/gcc_4_8_2_release)

6940

+++ b/src/libgcc/config/rs6000/linux-unwind.h (.../branches/gcc-4_8-branch)

6941

@@ -24,9 +24,19 @@

6942

6943

#define R_LR 65

6944

#define R_CR2 70

6945

+#define R_CR3 71

6946

+#define R_CR4 72

6947

#define R_VR0 77

6948

#define R_VRSAVE 109

6949

6950

+#ifdef __powerpc64__

6951

+#if _CALL_ELF == 2

6952

+#define TOC_SAVE_SLOT 24

6953

+#else

6954

+#define TOC_SAVE_SLOT 40

6955

+#endif

6956

+#endif

6957

+

6958

struct gcc_vregs

6959

{

6960

__attribute__ ((vector_size (16))) int vr[32];

6961

@@ -107,6 +117,8 @@

6962

}

6963

else if (pc[1] == 0x380000AC)

6964

{

6965

+#if _CALL_ELF != 2

6966

+ /* These old kernel versions never supported ELFv2. */

6967

/* This works for 2.4 kernels, but not for 2.6 kernels with vdso

6968

because pc isn't pointing into the stack. Can be removed when

6969

no one is running 2.4.19 or 2.4.20, the first two ppc64

6970

@@ -121,6 +133,7 @@

6971

if ((long) frame24->puc != -21 * 8)

6972

return frame24->puc->regs;

6973

else

6974

+#endif

6975

{

6976

/* This works for 2.4.21 and later kernels. */

6977

struct rt_sigframe {

6978

@@ -185,6 +198,7 @@

6979

{

6980

struct gcc_regs *regs = get_regs (context);

6981

struct gcc_vregs *vregs;

6982

+ long cr_offset;

6983

long new_cfa;

6984

int i;

6985

6986

@@ -206,11 +220,21 @@

6987

fs->regs.reg[i].loc.offset = (long) &regs->gpr[i] - new_cfa;

6988

}

6989

6990

+ /* The CR is saved in the low 32 bits of regs->ccr. */

6991

+ cr_offset = (long) &regs->ccr - new_cfa;

6992

+#ifndef __LITTLE_ENDIAN__

6993

+ cr_offset += sizeof (long) - 4;

6994

+#endif

6995

+ /* In the ELFv1 ABI, CR2 stands in for the whole CR. */

6996

fs->regs.reg[R_CR2].how = REG_SAVED_OFFSET;

6997

- /* CR? regs are always 32-bit and PPC is big-endian, so in 64-bit

6998

- libgcc loc.offset needs to point to the low 32 bits of regs->ccr. */

6999

- fs->regs.reg[R_CR2].loc.offset = (long) &regs->ccr - new_cfa

7000

- + sizeof (long) - 4;

7001

+ fs->regs.reg[R_CR2].loc.offset = cr_offset;

7002

+#if _CALL_ELF == 2

7003

+ /* In the ELFv2 ABI, every CR field has a separate CFI entry. */

7004

+ fs->regs.reg[R_CR3].how = REG_SAVED_OFFSET;

7005

+ fs->regs.reg[R_CR3].loc.offset = cr_offset;

7006

+ fs->regs.reg[R_CR4].how = REG_SAVED_OFFSET;

7007

+ fs->regs.reg[R_CR4].loc.offset = cr_offset;

7008

+#endif

7009

7010

fs->regs.reg[R_LR].how = REG_SAVED_OFFSET;

7011

fs->regs.reg[R_LR].loc.offset = (long) &regs->link - new_cfa;

7012

@@ -294,9 +318,13 @@

7013

figure out if it was saved. The big problem here is that the

7014

code that does the save/restore is generated by the linker, so

7015

we have no good way to determine at compile time what to do. */

7016

- if (pc[0] == 0xF8410028

7017

+ if (pc[0] == 0xF8410000 + TOC_SAVE_SLOT

7018

+#if _CALL_ELF != 2

7019

+ /* The ELFv2 linker never generates the old PLT stub form. */

7020

|| ((pc[0] & 0xFFFF0000) == 0x3D820000

7021

- && pc[1] == 0xF8410028))

7022

+ && pc[1] == 0xF8410000 + TOC_SAVE_SLOT)

7023

+#endif

7024

+ )

7025

{

7026

/* We are in a plt call stub or r2 adjusting long branch stub,

7027

before r2 has been saved. Keep REG_UNSAVED. */

7028

@@ -305,10 +333,12 @@

7029

{

7030

unsigned int *insn

7031

= (unsigned int *) _Unwind_GetGR (context, R_LR);

7032

- if (insn && *insn == 0xE8410028)

7033

- _Unwind_SetGRPtr (context, 2, context->cfa + 40);

7034

+ if (insn && *insn == 0xE8410000 + TOC_SAVE_SLOT)

7035

+ _Unwind_SetGRPtr (context, 2, context->cfa + TOC_SAVE_SLOT);

7036

+#if _CALL_ELF != 2

7037

+ /* ELFv2 does not use this function pointer call sequence. */

7038

else if (pc[0] == 0x4E800421

7039

- && pc[1] == 0xE8410028)

7040

+ && pc[1] == 0xE8410000 + TOC_SAVE_SLOT)

7041

{

7042

/* We are at the bctrl instruction in a call via function

7043

pointer. gcc always emits the load of the new R2 just

7044

@@ -315,8 +345,9 @@

7045

before the bctrl so this is the first and only place

7046

we need to use the stored R2. */

7047

_Unwind_Word sp = _Unwind_GetGR (context, 1);

7048

- _Unwind_SetGRPtr (context, 2, (void *)(sp + 40));

7049

+ _Unwind_SetGRPtr (context, 2, (void *)(sp + TOC_SAVE_SLOT));

7050

}

7051

+#endif

7052

}

7053

}

7054

#endif

7055

Index: libgcc/config/rs6000/ibm-ldouble.c

7056

===================================================================

7057

--- a/src/libgcc/config/rs6000/ibm-ldouble.c (.../tags/gcc_4_8_2_release)

7058

+++ b/src/libgcc/config/rs6000/ibm-ldouble.c (.../branches/gcc-4_8-branch)

7059

@@ -188,7 +188,16 @@

7060

|| nonfinite (t))

7061

return t;

7062

7063

- /* Finite nonzero result requires corrections to the highest order term. */

7064

+ /* Finite nonzero result requires corrections to the highest order

7065

+ term. These corrections require the low part of c * t to be

7066

+ exactly represented in double. */

7067

+ if (fabs (a) <= 0x1p-969)

7068

+ {

7069

+ a *= 0x1p106;

7070

+ b *= 0x1p106;

7071

+ c *= 0x1p106;

7072

+ d *= 0x1p106;

7073

+ }

7074

7075

s = c * t; /* (s,sigma) = c*t exactly. */

7076

w = -(-b + d * t); /* Written to get fnmsub for speed, but not

7077

Index: libgcc/config/tilepro/atomic.c

7078

===================================================================

7079

--- a/src/libgcc/config/tilepro/atomic.c (.../tags/gcc_4_8_2_release)

7080

+++ b/src/libgcc/config/tilepro/atomic.c (.../branches/gcc-4_8-branch)

7081

@@ -28,7 +28,7 @@

7082

/* This code should be inlined by the compiler, but for now support

7083

it as out-of-line methods in libgcc. */

7084

7085

-static void

7086

+static inline void

7087

pre_atomic_barrier (int model)

7088

{

7089

switch ((enum memmodel) model)

7090

@@ -44,7 +44,7 @@

7091

return;

7092

}

7093

7094

-static void

7095

+static inline void

7096

post_atomic_barrier (int model)

7097

{

7098

switch ((enum memmodel) model)

7099

@@ -62,16 +62,21 @@

7100

7101

#define __unused __attribute__((unused))

7102

7103

-#define __atomic_fetch_and_do(type, size, opname) \

7104

-type \

7105

-__atomic_fetch_##opname##_##size(type* p, type i, int model) \

7106

+#define __fetch_and_do(proto, type, size, opname, top, bottom) \

7107

+proto \

7108

{ \

7109

- pre_atomic_barrier(model); \

7110

+ top; \

7111

type rv = arch_atomic_##opname(p, i); \

7112

- post_atomic_barrier(model); \

7113

+ bottom; \

7114

return rv; \

7115

}

7116

7117

+#define __atomic_fetch_and_do(type, size, opname) \

7118

+ __fetch_and_do(type __atomic_fetch_##opname##_##size(type* p, type i, int model), \

7119

+ type, size, opname, \

7120

+ pre_atomic_barrier(model), \

7121

+ post_atomic_barrier(model)) \

7122

+

7123

__atomic_fetch_and_do (int, 4, add)

7124

__atomic_fetch_and_do (int, 4, sub)

7125

__atomic_fetch_and_do (int, 4, or)

7126

@@ -84,27 +89,73 @@

7127

__atomic_fetch_and_do (long long, 8, and)

7128

__atomic_fetch_and_do (long long, 8, xor)

7129

__atomic_fetch_and_do (long long, 8, nand)

7130

-#define __atomic_do_and_fetch(type, size, opname, op) \

7131

-type \

7132

-__atomic_##opname##_fetch_##size(type* p, type i, int model) \

7133

-{ \

7134

- pre_atomic_barrier(model); \

7135

- type rv = arch_atomic_##opname(p, i) op i; \

7136

- post_atomic_barrier(model); \

7137

- return rv; \

7138

+

7139

+#define __sync_fetch_and_do(type, size, opname) \

7140

+ __fetch_and_do(type __sync_fetch_and_##opname##_##size(type* p, type i), \

7141

+ type, size, opname, \

7142

+ arch_atomic_write_barrier(), \

7143

+ arch_atomic_read_barrier())

7144

+

7145

+__sync_fetch_and_do (int, 4, add)

7146

+__sync_fetch_and_do (int, 4, sub)

7147

+__sync_fetch_and_do (int, 4, or)

7148

+__sync_fetch_and_do (int, 4, and)

7149

+__sync_fetch_and_do (int, 4, xor)

7150

+__sync_fetch_and_do (int, 4, nand)

7151

+__sync_fetch_and_do (long long, 8, add)

7152

+__sync_fetch_and_do (long long, 8, sub)

7153

+__sync_fetch_and_do (long long, 8, or)

7154

+__sync_fetch_and_do (long long, 8, and)

7155

+__sync_fetch_and_do (long long, 8, xor)

7156

+__sync_fetch_and_do (long long, 8, nand)

7157

+

7158

+#define __do_and_fetch(proto, type, size, opname, op, op2, top, bottom) \

7159

+proto \

7160

+{ \

7161

+ top; \

7162

+ type rv = op2 (arch_atomic_##opname(p, i) op i); \

7163

+ bottom; \

7164

+ return rv; \

7165

}

7166

-__atomic_do_and_fetch (int, 4, add, +)

7167

-__atomic_do_and_fetch (int, 4, sub, -)

7168

-__atomic_do_and_fetch (int, 4, or, |)

7169

-__atomic_do_and_fetch (int, 4, and, &)

7170

-__atomic_do_and_fetch (int, 4, xor, |)

7171

-__atomic_do_and_fetch (int, 4, nand, &)

7172

-__atomic_do_and_fetch (long long, 8, add, +)

7173

-__atomic_do_and_fetch (long long, 8, sub, -)

7174

-__atomic_do_and_fetch (long long, 8, or, |)

7175

-__atomic_do_and_fetch (long long, 8, and, &)

7176

-__atomic_do_and_fetch (long long, 8, xor, |)

7177

-__atomic_do_and_fetch (long long, 8, nand, &)

7178

+

7179

+#define __atomic_do_and_fetch(type, size, opname, op, op2) \

7180

+ __do_and_fetch(type __atomic_##opname##_fetch_##size(type* p, type i, int model), \

7181

+ type, size, opname, op, op2, \

7182

+ pre_atomic_barrier(model), \

7183

+ post_atomic_barrier(model)) \

7184

+

7185

+__atomic_do_and_fetch (int, 4, add, +, )

7186

+__atomic_do_and_fetch (int, 4, sub, -, )

7187

+__atomic_do_and_fetch (int, 4, or, |, )

7188

+__atomic_do_and_fetch (int, 4, and, &, )

7189

+__atomic_do_and_fetch (int, 4, xor, |, )

7190

+__atomic_do_and_fetch (int, 4, nand, &, ~)

7191

+__atomic_do_and_fetch (long long, 8, add, +, )

7192

+__atomic_do_and_fetch (long long, 8, sub, -, )

7193

+__atomic_do_and_fetch (long long, 8, or, |, )

7194

+__atomic_do_and_fetch (long long, 8, and, &, )

7195

+__atomic_do_and_fetch (long long, 8, xor, |, )

7196

+__atomic_do_and_fetch (long long, 8, nand, &, ~)

7197

+

7198

+#define __sync_do_and_fetch(type, size, opname, op, op2) \

7199

+ __do_and_fetch(type __sync_##opname##_and_fetch_##size(type* p, type i), \

7200

+ type, size, opname, op, op2, \

7201

+ arch_atomic_write_barrier(), \

7202

+ arch_atomic_read_barrier()) \

7203

+

7204

+__sync_do_and_fetch (int, 4, add, +, )

7205

+__sync_do_and_fetch (int, 4, sub, -, )

7206

+__sync_do_and_fetch (int, 4, or, |, )

7207

+__sync_do_and_fetch (int, 4, and, &, )

7208

+__sync_do_and_fetch (int, 4, xor, |, )

7209

+__sync_do_and_fetch (int, 4, nand, &, ~)

7210

+__sync_do_and_fetch (long long, 8, add, +, )

7211

+__sync_do_and_fetch (long long, 8, sub, -, )

7212

+__sync_do_and_fetch (long long, 8, or, |, )

7213

+__sync_do_and_fetch (long long, 8, and, &, )

7214

+__sync_do_and_fetch (long long, 8, xor, |, )

7215

+__sync_do_and_fetch (long long, 8, nand, &, ~)

7216

+

7217

#define __atomic_exchange_methods(type, size) \

7218

bool \

7219

__atomic_compare_exchange_##size(volatile type* ptr, type* oldvalp, \

7220

@@ -128,49 +179,117 @@

7221

post_atomic_barrier(model); \

7222

return retval; \

7223

}

7224

+

7225

__atomic_exchange_methods (int, 4)

7226

__atomic_exchange_methods (long long, 8)

7227

7228

+#define __sync_exchange_methods(type, size) \

7229

+type \

7230

+__sync_val_compare_and_swap_##size(type* ptr, type oldval, type newval) \

7231

+{ \

7232

+ arch_atomic_write_barrier(); \

7233

+ type retval = arch_atomic_val_compare_and_exchange(ptr, oldval, newval); \

7234

+ arch_atomic_read_barrier(); \

7235

+ return retval; \

7236

+} \

7237

+ \

7238

+bool \

7239

+__sync_bool_compare_and_swap_##size(type* ptr, type oldval, type newval) \

7240

+{ \

7241

+ arch_atomic_write_barrier(); \

7242

+ bool retval = arch_atomic_bool_compare_and_exchange(ptr, oldval, newval); \

7243

+ arch_atomic_read_barrier(); \

7244

+ return retval; \

7245

+} \

7246

+ \

7247

+type \

7248

+__sync_lock_test_and_set_##size(type* ptr, type val) \

7249

+{ \

7250

+ type retval = arch_atomic_exchange(ptr, val); \

7251

+ arch_atomic_acquire_barrier_value(retval); \

7252

+ return retval; \

7253

+}

7254

+

7255

+__sync_exchange_methods (int, 4)

7256

+__sync_exchange_methods (long long, 8)

7257

+

7258

+#ifdef __LITTLE_ENDIAN__

7259

+#define BIT_OFFSET(n, type) ((n) * 8)

7260

+#else

7261

+#define BIT_OFFSET(n, type) ((4 - sizeof(type) - (n)) * 8)

7262

+#endif

7263

+

7264

/* Subword methods require the same approach for both TILEPro and

7265

TILE-Gx. We load the background data for the word, insert the

7266

desired subword piece, then compare-and-exchange it into place. */

7267

#define u8 unsigned char

7268

#define u16 unsigned short

7269

+

7270

+#define __subword_cmpxchg_body(type, size, ptr, guess, val) \

7271

+ ({ \

7272

+ unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \

7273

+ const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type); \

7274

+ const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \

7275

+ const unsigned int bgmask = ~(valmask << shift); \

7276

+ unsigned int oldword = *p; \

7277

+ type oldval = (oldword >> shift) & valmask; \

7278

+ if (__builtin_expect((oldval == guess), 1)) { \

7279

+ unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \

7280

+ oldword = arch_atomic_val_compare_and_exchange(p, oldword, word); \

7281

+ oldval = (oldword >> shift) & valmask; \

7282

+ } \

7283

+ oldval; \

7284

+ }) \

7285

+

7286

#define __atomic_subword_cmpxchg(type, size) \

7287

\

7288

bool \

7289

-__atomic_compare_exchange_##size(volatile type* ptr, type* guess, \

7290

+__atomic_compare_exchange_##size(volatile type* ptr, type* guess_ptr, \

7291

type val, bool weak __unused, int models, \

7292

int modelf __unused) \

7293

{ \

7294

pre_atomic_barrier(models); \

7295

- unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \

7296

- const int shift = ((unsigned long)ptr & 3UL) * 8; \

7297

- const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \

7298

- const unsigned int bgmask = ~(valmask << shift); \

7299

- unsigned int oldword = *p; \

7300

- type oldval = (oldword >> shift) & valmask; \

7301

- if (__builtin_expect((oldval == *guess), 1)) { \

7302

- unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \

7303

- oldword = arch_atomic_val_compare_and_exchange(p, oldword, word); \

7304

- oldval = (oldword >> shift) & valmask; \

7305

- } \

7306

+ type guess = *guess_ptr; \

7307

+ type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val); \

7308

post_atomic_barrier(models); \

7309

- bool success = (oldval == *guess); \

7310

- *guess = oldval; \

7311

+ bool success = (oldval == guess); \

7312

+ *guess_ptr = oldval; \

7313

return success; \

7314

}

7315

+

7316

__atomic_subword_cmpxchg (u8, 1)

7317

__atomic_subword_cmpxchg (u16, 2)

7318

+

7319

+#define __sync_subword_cmpxchg(type, size) \

7320

+ \

7321

+type \

7322

+__sync_val_compare_and_swap_##size(type* ptr, type guess, type val) \

7323

+{ \

7324

+ arch_atomic_write_barrier(); \

7325

+ type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val); \

7326

+ arch_atomic_read_barrier(); \

7327

+ return oldval; \

7328

+} \

7329

+ \

7330

+bool \

7331

+__sync_bool_compare_and_swap_##size(type* ptr, type guess, type val) \

7332

+{ \

7333

+ type oldval = __sync_val_compare_and_swap_##size(ptr, guess, val); \

7334

+ return oldval == guess; \

7335

+}

7336

+

7337

+__sync_subword_cmpxchg (u8, 1)

7338

+__sync_subword_cmpxchg (u16, 2)

7339

+

7340

/* For the atomic-update subword methods, we use the same approach as

7341

above, but we retry until we succeed if the compare-and-exchange

7342

fails. */

7343

-#define __atomic_subword(type, proto, top, expr, bottom) \

7344

+#define __subword(type, proto, top, expr, bottom) \

7345

proto \

7346

{ \

7347

top \

7348

unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \

7349

- const int shift = ((unsigned long)ptr & 3UL) * 8; \

7350

+ const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type); \

7351

const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \

7352

const unsigned int bgmask = ~(valmask << shift); \

7353

unsigned int oldword, xword = *p; \

7354

@@ -184,12 +303,14 @@

7355

} while (__builtin_expect(xword != oldword, 0)); \

7356

bottom \

7357

}

7358

+

7359

#define __atomic_subword_fetch(type, funcname, expr, retval) \

7360

- __atomic_subword(type, \

7361

- type __atomic_ ## funcname(volatile type *ptr, type i, int model), \

7362

- pre_atomic_barrier(model);, \

7363

- expr, \

7364

- post_atomic_barrier(model); return retval;)

7365

+ __subword(type, \

7366

+ type __atomic_ ## funcname(volatile type *ptr, type i, int model), \

7367

+ pre_atomic_barrier(model);, \

7368

+ expr, \

7369

+ post_atomic_barrier(model); return retval;)

7370

+

7371

__atomic_subword_fetch (u8, fetch_add_1, oldval + i, oldval)

7372

__atomic_subword_fetch (u8, fetch_sub_1, oldval - i, oldval)

7373

__atomic_subword_fetch (u8, fetch_or_1, oldval | i, oldval)

7374

@@ -196,6 +317,7 @@

7375

__atomic_subword_fetch (u8, fetch_and_1, oldval & i, oldval)

7376

__atomic_subword_fetch (u8, fetch_xor_1, oldval ^ i, oldval)

7377

__atomic_subword_fetch (u8, fetch_nand_1, ~(oldval & i), oldval)

7378

+

7379

__atomic_subword_fetch (u16, fetch_add_2, oldval + i, oldval)

7380

__atomic_subword_fetch (u16, fetch_sub_2, oldval - i, oldval)

7381

__atomic_subword_fetch (u16, fetch_or_2, oldval | i, oldval)

7382

@@ -202,6 +324,7 @@

7383

__atomic_subword_fetch (u16, fetch_and_2, oldval & i, oldval)

7384

__atomic_subword_fetch (u16, fetch_xor_2, oldval ^ i, oldval)

7385

__atomic_subword_fetch (u16, fetch_nand_2, ~(oldval & i), oldval)

7386

+

7387

__atomic_subword_fetch (u8, add_fetch_1, oldval + i, val)

7388

__atomic_subword_fetch (u8, sub_fetch_1, oldval - i, val)

7389

__atomic_subword_fetch (u8, or_fetch_1, oldval | i, val)

7390

@@ -208,6 +331,7 @@

7391

__atomic_subword_fetch (u8, and_fetch_1, oldval & i, val)

7392

__atomic_subword_fetch (u8, xor_fetch_1, oldval ^ i, val)

7393

__atomic_subword_fetch (u8, nand_fetch_1, ~(oldval & i), val)

7394

+

7395

__atomic_subword_fetch (u16, add_fetch_2, oldval + i, val)

7396

__atomic_subword_fetch (u16, sub_fetch_2, oldval - i, val)

7397

__atomic_subword_fetch (u16, or_fetch_2, oldval | i, val)

7398

@@ -214,12 +338,58 @@

7399

__atomic_subword_fetch (u16, and_fetch_2, oldval & i, val)

7400

__atomic_subword_fetch (u16, xor_fetch_2, oldval ^ i, val)

7401

__atomic_subword_fetch (u16, nand_fetch_2, ~(oldval & i), val)

7402

+

7403

+#define __sync_subword_fetch(type, funcname, expr, retval) \

7404

+ __subword(type, \

7405

+ type __sync_ ## funcname(type *ptr, type i), \

7406

+ arch_atomic_read_barrier();, \

7407

+ expr, \

7408

+ arch_atomic_write_barrier(); return retval;)

7409

+

7410

+__sync_subword_fetch (u8, fetch_and_add_1, oldval + i, oldval)

7411

+__sync_subword_fetch (u8, fetch_and_sub_1, oldval - i, oldval)

7412

+__sync_subword_fetch (u8, fetch_and_or_1, oldval | i, oldval)

7413

+__sync_subword_fetch (u8, fetch_and_and_1, oldval & i, oldval)

7414

+__sync_subword_fetch (u8, fetch_and_xor_1, oldval ^ i, oldval)

7415

+__sync_subword_fetch (u8, fetch_and_nand_1, ~(oldval & i), oldval)

7416

+

7417

+__sync_subword_fetch (u16, fetch_and_add_2, oldval + i, oldval)

7418

+__sync_subword_fetch (u16, fetch_and_sub_2, oldval - i, oldval)

7419

+__sync_subword_fetch (u16, fetch_and_or_2, oldval | i, oldval)

7420

+__sync_subword_fetch (u16, fetch_and_and_2, oldval & i, oldval)

7421

+__sync_subword_fetch (u16, fetch_and_xor_2, oldval ^ i, oldval)

7422

+__sync_subword_fetch (u16, fetch_and_nand_2, ~(oldval & i), oldval)

7423

+

7424

+__sync_subword_fetch (u8, add_and_fetch_1, oldval + i, val)

7425

+__sync_subword_fetch (u8, sub_and_fetch_1, oldval - i, val)

7426

+__sync_subword_fetch (u8, or_and_fetch_1, oldval | i, val)

7427

+__sync_subword_fetch (u8, and_and_fetch_1, oldval & i, val)

7428

+__sync_subword_fetch (u8, xor_and_fetch_1, oldval ^ i, val)

7429

+__sync_subword_fetch (u8, nand_and_fetch_1, ~(oldval & i), val)

7430

+

7431

+__sync_subword_fetch (u16, add_and_fetch_2, oldval + i, val)

7432

+__sync_subword_fetch (u16, sub_and_fetch_2, oldval - i, val)

7433

+__sync_subword_fetch (u16, or_and_fetch_2, oldval | i, val)

7434

+__sync_subword_fetch (u16, and_and_fetch_2, oldval & i, val)

7435

+__sync_subword_fetch (u16, xor_and_fetch_2, oldval ^ i, val)

7436

+__sync_subword_fetch (u16, nand_and_fetch_2, ~(oldval & i), val)

7437

+

7438

#define __atomic_subword_lock(type, size) \

7439

- \

7440

-__atomic_subword(type, \

7441

- type __atomic_exchange_##size(volatile type* ptr, type nval, int model), \

7442

- pre_atomic_barrier(model);, \

7443

- nval, \

7444

- post_atomic_barrier(model); return oldval;)

7445

+ __subword(type, \

7446

+ type __atomic_exchange_##size(volatile type* ptr, type nval, int model), \

7447

+ pre_atomic_barrier(model);, \

7448

+ nval, \

7449

+ post_atomic_barrier(model); return oldval;)

7450

+

7451

__atomic_subword_lock (u8, 1)

7452

__atomic_subword_lock (u16, 2)

7453

+

7454

+#define __sync_subword_lock(type, size) \

7455

+ __subword(type, \

7456

+ type __sync_lock_test_and_set_##size(type* ptr, type nval), \

7457

+ , \

7458

+ nval, \

7459

+ arch_atomic_acquire_barrier_value(oldval); return oldval;)

7460

+

7461

+__sync_subword_lock (u8, 1)

7462

+__sync_subword_lock (u16, 2)

7463

Index: libgcc/config/arm/sfp-machine.h

7464

===================================================================

7465

--- a/src/libgcc/config/arm/sfp-machine.h (.../tags/gcc_4_8_2_release)

7466

+++ b/src/libgcc/config/arm/sfp-machine.h (.../branches/gcc-4_8-branch)

7467

@@ -19,10 +19,12 @@

7468

#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)

7469

#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)

7470

7471

-#define _FP_NANFRAC_H ((_FP_QNANBIT_H << 1) - 1)

7472

-#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)

7473

-#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1

7474

-#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1

7475

+/* According to RTABI, QNAN is only with the most significant bit of the

7476

+ significand set, and all other significand bits zero. */

7477

+#define _FP_NANFRAC_H 0

7478

+#define _FP_NANFRAC_S 0

7479

+#define _FP_NANFRAC_D 0, 0

7480

+#define _FP_NANFRAC_Q 0, 0, 0, 0

7481

#define _FP_NANSIGN_H 0

7482

#define _FP_NANSIGN_S 0

7483

#define _FP_NANSIGN_D 0

7484

Index: libgcc/unwind-seh.c

7485

===================================================================

7486

--- a/src/libgcc/unwind-seh.c (.../tags/gcc_4_8_2_release)

7487

+++ b/src/libgcc/unwind-seh.c (.../branches/gcc-4_8-branch)

7488

@@ -313,8 +313,9 @@

7489

ms_exc->ExceptionInformation[3] = gcc_context.reg[1];

7490

7491

/* Begin phase 2. Perform the unwinding. */

7492

- RtlUnwindEx (this_frame, gcc_context.ra, ms_exc, gcc_exc,

7493

- ms_orig_context, ms_disp->HistoryTable);

7494

+ RtlUnwindEx (this_frame, gcc_context.ra, ms_exc,

7495

+ (PVOID)gcc_context.reg[0], ms_orig_context,

7496

+ ms_disp->HistoryTable);

7497

}

7498

7499

/* In _Unwind_RaiseException we return _URC_FATAL_PHASE1_ERROR. */

7500

Index: config.guess

7501

===================================================================

7502

--- a/src/config.guess (.../tags/gcc_4_8_2_release)

7503

+++ b/src/config.guess (.../branches/gcc-4_8-branch)

7504

@@ -1,10 +1,8 @@

7505

#! /bin/sh

7506

# Attempt to guess a canonical system name.

7507

7508

-# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,

7509

-# 2011, 2012, 2013 Free Software Foundation, Inc.

7510

7511

7512

-timestamp='2012-12-30'

7513

+timestamp='2013-06-10'

7514

7515

# This file is free software; you can redistribute it and/or modify it

7516

# under the terms of the GNU General Public License as published by

7517

@@ -52,9 +50,7 @@

7518

GNU config.guess ($timestamp)

7519

7520

Originally written by Per Bothner.

7521

7522

-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,

7523

-2012, 2013 Free Software Foundation, Inc.

7524

7525

7526

This is free software; see the source for copying conditions. There is NO

7527

warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."

7528

@@ -136,6 +132,27 @@

7529

UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown

7530

UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown

7531

7532

+case "${UNAME_SYSTEM}" in

7533

+Linux|GNU|GNU/*)

7534

+ # If the system lacks a compiler, then just pick glibc.

7535

+ # We could probably try harder.

7536

+ LIBC=gnu

7537

+

7538

+ eval $set_cc_for_build

7539

+ cat <<-EOF > $dummy.c

7540

+ #include <features.h>

7541

+ #if defined(__UCLIBC__)

7542

+ LIBC=uclibc

7543

+ #elif defined(__dietlibc__)

7544

+ LIBC=dietlibc

7545

+ #else

7546

+ LIBC=gnu

7547

+ #endif

7548

+ EOF

7549

+ eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'`

7550

+ ;;

7551

+esac

7552

+

7553

# Note: order is significant - the case branches are not exclusive.

7554

7555

case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in

7556

@@ -857,21 +874,21 @@

7557

exit ;;

7558

*:GNU:*:*)

7559

# the GNU system

7560

- echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'`

7561

+ echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-${LIBC}`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'`

7562

exit ;;

7563

*:GNU/*:*:*)

7564

# other systems with GNU libc and userland

7565

- echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-gnu

7566

+ echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-${LIBC}

7567

exit ;;

7568

i*86:Minix:*:*)

7569

echo ${UNAME_MACHINE}-pc-minix

7570

exit ;;

7571

aarch64:Linux:*:*)

7572

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7573

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7574

exit ;;

7575

aarch64_be:Linux:*:*)

7576

UNAME_MACHINE=aarch64_be

7577

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7578

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7579

exit ;;

7580

alpha:Linux:*:*)

7581

case `sed -n '/^cpu model/s/^.*: $.*$/\1/p' < /proc/cpuinfo` in

7582

@@ -884,59 +901,54 @@

7583

EV68*) UNAME_MACHINE=alphaev68 ;;

7584

esac

7585

objdump --private-headers /bin/sh | grep -q ld.so.1

7586

- if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi

7587

- echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC}

7588

+ if test "$?" = 0 ; then LIBC="gnulibc1" ; fi

7589

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7590

exit ;;

7591

+ arc:Linux:*:* | arceb:Linux:*:*)

7592

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7593

+ exit ;;

7594

arm*:Linux:*:*)

7595

eval $set_cc_for_build

7596

if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \

7597

| grep -q __ARM_EABI__

7598

then

7599

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7600

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7601

else

7602

if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \

7603

| grep -q __ARM_PCS_VFP

7604

then

7605

- echo ${UNAME_MACHINE}-unknown-linux-gnueabi

7606

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabi

7607

else

7608

- echo ${UNAME_MACHINE}-unknown-linux-gnueabihf

7609

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabihf

7610

fi

7611

fi

7612

exit ;;

7613

avr32*:Linux:*:*)

7614

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7615

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7616

exit ;;

7617

cris:Linux:*:*)

7618

- echo ${UNAME_MACHINE}-axis-linux-gnu

7619

+ echo ${UNAME_MACHINE}-axis-linux-${LIBC}

7620

exit ;;

7621

crisv32:Linux:*:*)

7622

- echo ${UNAME_MACHINE}-axis-linux-gnu

7623

+ echo ${UNAME_MACHINE}-axis-linux-${LIBC}

7624

exit ;;

7625

frv:Linux:*:*)

7626

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7627

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7628

exit ;;

7629

hexagon:Linux:*:*)

7630

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7631

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7632

exit ;;

7633

i*86:Linux:*:*)

7634

- LIBC=gnu

7635

- eval $set_cc_for_build

7636

- sed 's/^ //' << EOF >$dummy.c

7637

- #ifdef __dietlibc__

7638

- LIBC=dietlibc

7639

- #endif

7640

-EOF

7641

- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'`

7642

- echo "${UNAME_MACHINE}-pc-linux-${LIBC}"

7643

+ echo ${UNAME_MACHINE}-pc-linux-${LIBC}

7644

exit ;;

7645

ia64:Linux:*:*)

7646

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7647

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7648

exit ;;

7649

m32r*:Linux:*:*)

7650

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7651

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7652

exit ;;

7653

m68*:Linux:*:*)

7654

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7655

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7656

exit ;;

7657

mips:Linux:*:* | mips64:Linux:*:*)

7658

eval $set_cc_for_build

7659

@@ -955,54 +967,63 @@

7660

#endif

7661

EOF

7662

eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'`

7663

- test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; }

7664

+ test x"${CPU}" != x && { echo "${CPU}-unknown-linux-${LIBC}"; exit; }

7665

;;

7666

+ or1k:Linux:*:*)

7667

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7668

+ exit ;;

7669

or32:Linux:*:*)

7670

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7671

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7672

exit ;;

7673

padre:Linux:*:*)

7674

- echo sparc-unknown-linux-gnu

7675

+ echo sparc-unknown-linux-${LIBC}

7676

exit ;;

7677

parisc64:Linux:*:* | hppa64:Linux:*:*)

7678

- echo hppa64-unknown-linux-gnu

7679

+ echo hppa64-unknown-linux-${LIBC}

7680

exit ;;

7681

parisc:Linux:*:* | hppa:Linux:*:*)

7682

# Look for CPU level

7683

case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in

7684

- PA7*) echo hppa1.1-unknown-linux-gnu ;;

7685

- PA8*) echo hppa2.0-unknown-linux-gnu ;;

7686

- *) echo hppa-unknown-linux-gnu ;;

7687

+ PA7*) echo hppa1.1-unknown-linux-${LIBC} ;;

7688

+ PA8*) echo hppa2.0-unknown-linux-${LIBC} ;;

7689

+ *) echo hppa-unknown-linux-${LIBC} ;;

7690

esac

7691

exit ;;

7692

ppc64:Linux:*:*)

7693

- echo powerpc64-unknown-linux-gnu

7694

+ echo powerpc64-unknown-linux-${LIBC}

7695

exit ;;

7696

ppc:Linux:*:*)

7697

- echo powerpc-unknown-linux-gnu

7698

+ echo powerpc-unknown-linux-${LIBC}

7699

exit ;;

7700

+ ppc64le:Linux:*:*)

7701

+ echo powerpc64le-unknown-linux-${LIBC}

7702

+ exit ;;

7703

+ ppcle:Linux:*:*)

7704

+ echo powerpcle-unknown-linux-${LIBC}

7705

+ exit ;;

7706

s390:Linux:*:* | s390x:Linux:*:*)

7707

- echo ${UNAME_MACHINE}-ibm-linux

7708

+ echo ${UNAME_MACHINE}-ibm-linux-${LIBC}

7709

exit ;;

7710

sh64*:Linux:*:*)

7711

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7712

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7713

exit ;;

7714

sh*:Linux:*:*)

7715

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7716

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7717

exit ;;

7718

sparc:Linux:*:* | sparc64:Linux:*:*)

7719

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7720

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7721

exit ;;

7722

tile*:Linux:*:*)

7723

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7724

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7725

exit ;;

7726

vax:Linux:*:*)

7727

- echo ${UNAME_MACHINE}-dec-linux-gnu

7728

+ echo ${UNAME_MACHINE}-dec-linux-${LIBC}

7729

exit ;;

7730

x86_64:Linux:*:*)

7731

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7732

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7733

exit ;;

7734

xtensa*:Linux:*:*)

7735

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7736

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7737

exit ;;

7738

i*86:DYNIX/ptx:4*:*)

7739

# ptx 4.0 does uname -s correctly, with DYNIX/ptx in there.

7740

@@ -1235,19 +1256,21 @@

7741

exit ;;

7742

*:Darwin:*:*)

7743

UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown

7744

- case $UNAME_PROCESSOR in

7745

- i386)

7746

- eval $set_cc_for_build

7747

- if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then

7748

- if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \

7749

- (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \

7750

- grep IS_64BIT_ARCH >/dev/null

7751

- then

7752

- UNAME_PROCESSOR="x86_64"

7753

- fi

7754

- fi ;;

7755

- unknown) UNAME_PROCESSOR=powerpc ;;

7756

- esac

7757

+ eval $set_cc_for_build

7758

+ if test "$UNAME_PROCESSOR" = unknown ; then

7759

+ UNAME_PROCESSOR=powerpc

7760

+ fi

7761

+ if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then

7762

+ if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \

7763

+ (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \

7764

+ grep IS_64BIT_ARCH >/dev/null

7765

+ then

7766

+ case $UNAME_PROCESSOR in

7767

+ i386) UNAME_PROCESSOR=x86_64 ;;

7768

+ powerpc) UNAME_PROCESSOR=powerpc64 ;;

7769

+ esac

7770

+ fi

7771

+ fi

7772

echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE}

7773

exit ;;

7774

*:procnto*:*:* | *:QNX:[0123456789]*:*)

7775

Index: gcc/tree-vrp.c

7776

===================================================================

7777

--- a/src/gcc/tree-vrp.c (.../tags/gcc_4_8_2_release)

7778

+++ b/src/gcc/tree-vrp.c (.../branches/gcc-4_8-branch)

7779

@@ -5271,9 +5271,13 @@

7780

}

7781

else if (CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (op_def)))

7782

{

7783

- /* Recurse through the type conversion. */

7784

- retval |= register_edge_assert_for_1 (gimple_assign_rhs1 (op_def),

7785

- code, e, bsi);

7786

+ /* Recurse through the type conversion, unless it is a narrowing

7787

+ conversion or conversion from non-integral type. */

7788

+ tree rhs = gimple_assign_rhs1 (op_def);

7789

+ if (INTEGRAL_TYPE_P (TREE_TYPE (rhs))

7790

+ && (TYPE_PRECISION (TREE_TYPE (rhs))

7791

+ <= TYPE_PRECISION (TREE_TYPE (op))))

7792

+ retval |= register_edge_assert_for_1 (rhs, code, e, bsi);

7793

}

7794

7795

return retval;

7796

@@ -7453,7 +7457,8 @@

7797

}

7798

else if ((operand_less_p (vr1min, *vr0max) == 1

7799

|| operand_equal_p (vr1min, *vr0max, 0))

7800

- && operand_less_p (*vr0min, vr1min) == 1)

7801

+ && operand_less_p (*vr0min, vr1min) == 1

7802

+ && operand_less_p (*vr0max, vr1max) == 1)

7803

{

7804

/* [ ( ] ) or [ ]( ) */

7805

if (*vr0type == VR_RANGE

7806

@@ -7487,7 +7492,8 @@

7807

}

7808

else if ((operand_less_p (*vr0min, vr1max) == 1

7809

|| operand_equal_p (*vr0min, vr1max, 0))

7810

- && operand_less_p (vr1min, *vr0min) == 1)

7811

+ && operand_less_p (vr1min, *vr0min) == 1

7812

+ && operand_less_p (vr1max, *vr0max) == 1)

7813

{

7814

/* ( [ ) ] or ( )[ ] */

7815

if (*vr0type == VR_RANGE

7816

Index: gcc/loop-unswitch.c

7817

===================================================================

7818

--- a/src/gcc/loop-unswitch.c (.../tags/gcc_4_8_2_release)

7819

+++ b/src/gcc/loop-unswitch.c (.../branches/gcc-4_8-branch)

7820

@@ -191,6 +191,7 @@

7821

if (!test)

7822

return NULL_RTX;

7823

7824

+ mode = VOIDmode;

7825

for (i = 0; i < 2; i++)

7826

{

7827

op[i] = XEXP (test, i);

7828

@@ -205,11 +206,15 @@

7829

return NULL_RTX;

7830

7831

op[i] = get_iv_value (&iv, const0_rtx);

7832

+ if (iv.extend != IV_UNKNOWN_EXTEND

7833

+ && iv.mode != iv.extend_mode)

7834

+ op[i] = lowpart_subreg (iv.mode, op[i], iv.extend_mode);

7835

+ if (mode == VOIDmode)

7836

+ mode = iv.mode;

7837

+ else

7838

+ gcc_assert (mode == iv.mode);

7839

}

7840

7841

- mode = GET_MODE (op[0]);

7842

- if (mode == VOIDmode)

7843

- mode = GET_MODE (op[1]);

7844

if (GET_MODE_CLASS (mode) == MODE_CC)

7845

{

7846

if (at != BB_END (bb))

7847

Index: gcc/tree-ssa-loop-im.c

7848

===================================================================

7849

--- a/src/gcc/tree-ssa-loop-im.c (.../tags/gcc_4_8_2_release)

7850

+++ b/src/gcc/tree-ssa-loop-im.c (.../branches/gcc-4_8-branch)

7851

@@ -1190,6 +1190,67 @@

7852

fini_walk_dominator_tree (&walk_data);

7853

}

7854

7855

+/* Return true if CODE is an operation that when operating on signed

7856

+ integer types involves undefined behavior on overflow and the

7857

+ operation can be expressed with unsigned arithmetic. */

7858

+

7859

+static bool

7860

+arith_code_with_undefined_signed_overflow (tree_code code)

7861

+{

7862

+ switch (code)

7863

+ {

7864

+ case PLUS_EXPR:

7865

+ case MINUS_EXPR:

7866

+ case MULT_EXPR:

7867

+ case NEGATE_EXPR:

7868

+ case POINTER_PLUS_EXPR:

7869

+ return true;

7870

+ default:

7871

+ return false;

7872

+ }

7873

+}

7874

+

7875

+/* Rewrite STMT, an assignment with a signed integer or pointer arithmetic

7876

+ operation that can be transformed to unsigned arithmetic by converting

7877

+ its operand, carrying out the operation in the corresponding unsigned

7878

+ type and converting the result back to the original type.

7879

+

7880

+ Returns a sequence of statements that replace STMT and also contain

7881

+ a modified form of STMT itself. */

7882

+

7883

+static gimple_seq

7884

+rewrite_to_defined_overflow (gimple stmt)

7885

+{

7886

+ if (dump_file && (dump_flags & TDF_DETAILS))

7887

+ {

7888

+ fprintf (dump_file, "rewriting stmt with undefined signed "

7889

+ "overflow ");

7890

+ print_gimple_stmt (dump_file, stmt, 0, TDF_SLIM);

7891

+ }

7892

+

7893

+ tree lhs = gimple_assign_lhs (stmt);

7894

+ tree type = unsigned_type_for (TREE_TYPE (lhs));

7895

+ gimple_seq stmts = NULL;

7896

+ for (unsigned i = 1; i < gimple_num_ops (stmt); ++i)

7897

+ {

7898

+ gimple_seq stmts2 = NULL;

7899

+ gimple_set_op (stmt, i,

7900

+ force_gimple_operand (fold_convert (type,

7901

+ gimple_op (stmt, i)),

7902

+ &stmts2, true, NULL_TREE));

7903

+ gimple_seq_add_seq (&stmts, stmts2);

7904

+ }

7905

+ gimple_assign_set_lhs (stmt, make_ssa_name (type, stmt));

7906

+ if (gimple_assign_rhs_code (stmt) == POINTER_PLUS_EXPR)

7907

+ gimple_assign_set_rhs_code (stmt, PLUS_EXPR);

7908

+ gimple_seq_add_stmt (&stmts, stmt);

7909

+ gimple cvt = gimple_build_assign_with_ops

7910

+ (NOP_EXPR, lhs, gimple_assign_lhs (stmt), NULL_TREE);

7911

+ gimple_seq_add_stmt (&stmts, cvt);

7912

+

7913

+ return stmts;

7914

+}

7915

+

7916

/* Hoist the statements in basic block BB out of the loops prescribed by

7917

data stored in LIM_DATA structures associated with each statement. Callback

7918

for walk_dominator_tree. */

7919

@@ -1321,7 +1382,21 @@

7920

}

7921

}

7922

gsi_remove (&bsi, false);

7923

- gsi_insert_on_edge (e, stmt);

7924

+ /* In case this is a stmt that is not unconditionally executed

7925

+ when the target loop header is executed and the stmt may

7926

+ invoke undefined integer or pointer overflow rewrite it to

7927

+ unsigned arithmetic. */

7928

+ if (is_gimple_assign (stmt)

7929

+ && INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_lhs (stmt)))

7930

+ && TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (gimple_assign_lhs (stmt)))

7931

+ && arith_code_with_undefined_signed_overflow

7932

+ (gimple_assign_rhs_code (stmt))

7933

+ && (!ALWAYS_EXECUTED_IN (bb)

7934

+ || !(ALWAYS_EXECUTED_IN (bb) == level

7935

+ || flow_loop_nested_p (ALWAYS_EXECUTED_IN (bb), level))))

7936

+ gsi_insert_seq_on_edge (e, rewrite_to_defined_overflow (stmt));

7937

+ else

7938

+ gsi_insert_on_edge (e, stmt);

7939

}

7940

}

7941

7942

Index: gcc/tree-ssa-tail-merge.c

7943

===================================================================

7944

--- a/src/gcc/tree-ssa-tail-merge.c (.../tags/gcc_4_8_2_release)

7945

+++ b/src/gcc/tree-ssa-tail-merge.c (.../branches/gcc-4_8-branch)

7946

@@ -297,7 +297,8 @@

7947

tree val;

7948

def_operand_p def_p;

7949

7950

- if (gimple_has_side_effects (stmt))

7951

+ if (gimple_has_side_effects (stmt)

7952

+ || gimple_vdef (stmt) != NULL_TREE)

7953

return false;

7954

7955

def_p = SINGLE_SSA_DEF_OPERAND (stmt, SSA_OP_DEF);

7956

Index: gcc/cgraphbuild.c

7957

===================================================================

7958

--- a/src/gcc/cgraphbuild.c (.../tags/gcc_4_8_2_release)

7959

+++ b/src/gcc/cgraphbuild.c (.../branches/gcc-4_8-branch)

7960

@@ -73,7 +73,7 @@

7961

decl = get_base_var (*tp);

7962

if (TREE_CODE (decl) == FUNCTION_DECL)

7963

{

7964

- struct cgraph_node *node = cgraph_get_create_node (decl);

7965

+ struct cgraph_node *node = cgraph_get_create_real_symbol_node (decl);

7966

if (!ctx->only_vars)

7967

cgraph_mark_address_taken_node (node);

7968

ipa_record_reference ((symtab_node)ctx->varpool_node,

7969

@@ -143,7 +143,7 @@

7970

{

7971

struct cgraph_node *per_node;

7972

7973

- per_node = cgraph_get_create_node (DECL_FUNCTION_PERSONALITY (node->symbol.decl));

7974

+ per_node = cgraph_get_create_real_symbol_node (DECL_FUNCTION_PERSONALITY (node->symbol.decl));

7975

ipa_record_reference ((symtab_node)node, (symtab_node)per_node, IPA_REF_ADDR, NULL);

7976

cgraph_mark_address_taken_node (per_node);

7977

}

7978

@@ -218,12 +218,12 @@

7979

/* Mark address taken in STMT. */

7980

7981

static bool

7982

-mark_address (gimple stmt, tree addr, void *data)

7983

+mark_address (gimple stmt, tree addr, tree, void *data)

7984

{

7985

addr = get_base_address (addr);

7986

if (TREE_CODE (addr) == FUNCTION_DECL)

7987

{

7988

- struct cgraph_node *node = cgraph_get_create_node (addr);

7989

+ struct cgraph_node *node = cgraph_get_create_real_symbol_node (addr);

7990

cgraph_mark_address_taken_node (node);

7991

ipa_record_reference ((symtab_node)data,

7992

(symtab_node)node,

7993

@@ -245,7 +245,7 @@

7994

/* Mark load of T. */

7995

7996

static bool

7997

-mark_load (gimple stmt, tree t, void *data)

7998

+mark_load (gimple stmt, tree t, tree, void *data)

7999

{

8000

t = get_base_address (t);

8001

if (t && TREE_CODE (t) == FUNCTION_DECL)

8002

@@ -252,7 +252,7 @@

8003

{

8004

/* ??? This can happen on platforms with descriptors when these are

8005

directly manipulated in the code. Pretend that it's an address. */

8006

- struct cgraph_node *node = cgraph_get_create_node (t);

8007

+ struct cgraph_node *node = cgraph_get_create_real_symbol_node (t);

8008

cgraph_mark_address_taken_node (node);

8009

ipa_record_reference ((symtab_node)data,

8010

(symtab_node)node,

8011

@@ -273,7 +273,7 @@

8012

/* Mark store of T. */

8013

8014

static bool

8015

-mark_store (gimple stmt, tree t, void *data)

8016

+mark_store (gimple stmt, tree t, tree, void *data)

8017

{

8018

t = get_base_address (t);

8019

if (t && TREE_CODE (t) == VAR_DECL

8020

@@ -330,7 +330,7 @@

8021

{

8022

tree fn = gimple_omp_parallel_child_fn (stmt);

8023

ipa_record_reference ((symtab_node)node,

8024

- (symtab_node)cgraph_get_create_node (fn),

8025

+ (symtab_node)cgraph_get_create_real_symbol_node (fn),

8026

IPA_REF_ADDR, stmt);

8027

}

8028

if (gimple_code (stmt) == GIMPLE_OMP_TASK)

8029

@@ -338,12 +338,12 @@

8030

tree fn = gimple_omp_task_child_fn (stmt);

8031

if (fn)

8032

ipa_record_reference ((symtab_node)node,

8033

- (symtab_node) cgraph_get_create_node (fn),

8034

+ (symtab_node) cgraph_get_create_real_symbol_node (fn),

8035

IPA_REF_ADDR, stmt);

8036

fn = gimple_omp_task_copy_fn (stmt);

8037

if (fn)

8038

ipa_record_reference ((symtab_node)node,

8039

- (symtab_node)cgraph_get_create_node (fn),

8040

+ (symtab_node)cgraph_get_create_real_symbol_node (fn),

8041

IPA_REF_ADDR, stmt);

8042

}

8043

}

8044

Index: gcc/tree-ssa-uninit.c

8045

===================================================================

8046

--- a/src/gcc/tree-ssa-uninit.c (.../tags/gcc_4_8_2_release)

8047

+++ b/src/gcc/tree-ssa-uninit.c (.../branches/gcc-4_8-branch)

8048

@@ -36,6 +36,7 @@

8049

#include "hashtab.h"

8050

#include "tree-pass.h"

8051

#include "diagnostic-core.h"

8052

+#include "params.h"

8053

8054

/* This implements the pass that does predicate aware warning on uses of

8055

possibly uninitialized variables. The pass first collects the set of

8056

@@ -246,8 +247,8 @@

8057

8058

/* Computes the control dependence chains (paths of edges)

8059

for DEP_BB up to the dominating basic block BB (the head node of a

8060

- chain should be dominated by it). CD_CHAINS is pointer to a

8061

- dynamic array holding the result chains. CUR_CD_CHAIN is the current

8062

+ chain should be dominated by it). CD_CHAINS is pointer to an

8063

+ array holding the result chains. CUR_CD_CHAIN is the current

8064

chain being computed. *NUM_CHAINS is total number of chains. The

8065

function returns true if the information is successfully computed,

8066

return false if there is no control dependence or not computed. */

8067

@@ -256,7 +257,8 @@

8068

compute_control_dep_chain (basic_block bb, basic_block dep_bb,

8069

vec<edge> *cd_chains,

8070

size_t *num_chains,

8071

- vec<edge> *cur_cd_chain)

8072

+ vec<edge> *cur_cd_chain,

8073

+ int *num_calls)

8074

{

8075

edge_iterator ei;

8076

edge e;

8077

@@ -267,6 +269,10 @@

8078

if (EDGE_COUNT (bb->succs) < 2)

8079

return false;

8080

8081

+ if (*num_calls > PARAM_VALUE (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS))

8082

+ return false;

8083

+ ++*num_calls;

8084

+

8085

/* Could use a set instead. */

8086

cur_chain_len = cur_cd_chain->length ();

8087

if (cur_chain_len > MAX_CHAIN_LEN)

8088

@@ -306,7 +312,7 @@

8089

8090

/* Now check if DEP_BB is indirectly control dependent on BB. */

8091

if (compute_control_dep_chain (cd_bb, dep_bb, cd_chains,

8092

- num_chains, cur_cd_chain))

8093

+ num_chains, cur_cd_chain, num_calls))

8094

{

8095

found_cd_chain = true;

8096

break;

8097

@@ -438,14 +444,12 @@

8098

basic_block use_bb)

8099

{

8100

size_t num_chains = 0, i;

8101

- vec<edge> *dep_chains = 0;

8102

+ int num_calls = 0;

8103

+ vec<edge> dep_chains[MAX_NUM_CHAINS];

8104

vec<edge> cur_chain = vNULL;

8105

bool has_valid_pred = false;

8106

basic_block cd_root = 0;

8107

8108

- typedef vec<edge> vec_edge_heap;

8109

- dep_chains = XCNEWVEC (vec_edge_heap, MAX_NUM_CHAINS);

8110

-

8111

/* First find the closest bb that is control equivalent to PHI_BB

8112

that also dominates USE_BB. */

8113

cd_root = phi_bb;

8114

@@ -458,20 +462,16 @@

8115

break;

8116

}

8117

8118

- compute_control_dep_chain (cd_root, use_bb,

8119

- dep_chains, &num_chains,

8120

- &cur_chain);

8121

+ compute_control_dep_chain (cd_root, use_bb, dep_chains, &num_chains,

8122

+ &cur_chain, &num_calls);

8123

8124

has_valid_pred

8125

- = convert_control_dep_chain_into_preds (dep_chains,

8126

- num_chains,

8127

- preds,

8128

- num_preds);

8129

+ = convert_control_dep_chain_into_preds (dep_chains, num_chains, preds,

8130

+ num_preds);

8131

/* Free individual chain */

8132

cur_chain.release ();

8133

for (i = 0; i < num_chains; i++)

8134

dep_chains[i].release ();

8135

- free (dep_chains);

8136

return has_valid_pred;

8137

}

8138

8139

@@ -539,7 +539,7 @@

8140

size_t *num_preds, gimple phi)

8141

{

8142

size_t num_chains = 0, i, n;

8143

- vec<edge> *dep_chains = 0;

8144

+ vec<edge> dep_chains[MAX_NUM_CHAINS];

8145

vec<edge> cur_chain = vNULL;

8146

vec<edge> def_edges = vNULL;

8147

bool has_valid_pred = false;

8148

@@ -546,9 +546,6 @@

8149

basic_block phi_bb, cd_root = 0;

8150

struct pointer_set_t *visited_phis;

8151

8152

- typedef vec<edge> vec_edge_heap;

8153

- dep_chains = XCNEWVEC (vec_edge_heap, MAX_NUM_CHAINS);

8154

-

8155

phi_bb = gimple_bb (phi);

8156

/* First find the closest dominating bb to be

8157

the control dependence root */

8158

@@ -567,38 +564,33 @@

8159

for (i = 0; i < n; i++)

8160

{

8161

size_t prev_nc, j;

8162

+ int num_calls = 0;

8163

edge opnd_edge;

8164

8165

opnd_edge = def_edges[i];

8166

prev_nc = num_chains;

8167

- compute_control_dep_chain (cd_root, opnd_edge->src,

8168

- dep_chains, &num_chains,

8169

- &cur_chain);

8170

- /* Free individual chain */

8171

- cur_chain.release ();

8172

+ compute_control_dep_chain (cd_root, opnd_edge->src, dep_chains,

8173

+ &num_chains, &cur_chain, &num_calls);

8174

8175

/* Now update the newly added chains with

8176

the phi operand edge: */

8177

if (EDGE_COUNT (opnd_edge->src->succs) > 1)

8178

{

8179

- if (prev_nc == num_chains

8180

- && num_chains < MAX_NUM_CHAINS)

8181

- num_chains++;

8182

+ if (prev_nc == num_chains && num_chains < MAX_NUM_CHAINS)

8183

+ dep_chains[num_chains++] = vNULL;

8184

for (j = prev_nc; j < num_chains; j++)

8185

- {

8186

- dep_chains[j].safe_push (opnd_edge);

8187

- }

8188

+ dep_chains[j].safe_push (opnd_edge);

8189

}

8190

}

8191

8192

+ /* Free individual chain */

8193

+ cur_chain.release ();

8194

+

8195

has_valid_pred

8196

- = convert_control_dep_chain_into_preds (dep_chains,

8197

- num_chains,

8198

- preds,

8199

- num_preds);

8200

+ = convert_control_dep_chain_into_preds (dep_chains, num_chains, preds,

8201

+ num_preds);

8202

for (i = 0; i < num_chains; i++)

8203

dep_chains[i].release ();

8204

- free (dep_chains);

8205

return has_valid_pred;

8206

}

8207

8208

Index: gcc/tree-ssa-loop-niter.c

8209

===================================================================

8210

--- a/src/gcc/tree-ssa-loop-niter.c (.../tags/gcc_4_8_2_release)

8211

+++ b/src/gcc/tree-ssa-loop-niter.c (.../branches/gcc-4_8-branch)

8212

@@ -2075,7 +2075,8 @@

8213

return NULL;

8214

}

8215

8216

- if (gimple_code (stmt) != GIMPLE_ASSIGN)

8217

+ if (gimple_code (stmt) != GIMPLE_ASSIGN

8218

+ || gimple_assign_rhs_class (stmt) == GIMPLE_TERNARY_RHS)

8219

return NULL;

8220

8221

code = gimple_assign_rhs_code (stmt);

8222

@@ -2143,7 +2144,7 @@

8223

{

8224

gimple stmt;

8225

8226

- gcc_assert (is_gimple_min_invariant (base));

8227

+ gcc_checking_assert (is_gimple_min_invariant (base));

8228

8229

if (!x)

8230

return base;

8231

@@ -2152,7 +2153,7 @@

8232

if (gimple_code (stmt) == GIMPLE_PHI)

8233

return base;

8234

8235

- gcc_assert (is_gimple_assign (stmt));

8236

+ gcc_checking_assert (is_gimple_assign (stmt));

8237

8238

/* STMT must be either an assignment of a single SSA name or an

8239

expression involving an SSA name and a constant. Try to fold that

8240

Index: gcc/c-family/c.opt

8241

===================================================================

8242

--- a/src/gcc/c-family/c.opt (.../tags/gcc_4_8_2_release)

8243

+++ b/src/gcc/c-family/c.opt (.../branches/gcc-4_8-branch)

8244

@@ -933,7 +933,7 @@

8245

Recognize GNU-defined keywords

8246

8247

fgnu-runtime

8248

-ObjC ObjC++ Report RejectNegative Var(flag_next_runtime,0) Init(NEXT_OBJC_RUNTIME)

8249

+ObjC ObjC++ LTO Report RejectNegative Var(flag_next_runtime,0) Init(NEXT_OBJC_RUNTIME)

8250

Generate code for GNU runtime environment

8251

8252

fgnu89-inline

8253

@@ -1007,7 +1007,7 @@

8254

C++ ObjC++ Ignore Warn(switch %qs is no longer supported)

8255

8256

fnext-runtime

8257

-ObjC ObjC++ Report RejectNegative Var(flag_next_runtime)

8258

+ObjC ObjC++ LTO Report RejectNegative Var(flag_next_runtime)

8259

Generate code for NeXT (Apple Mac OS X) runtime environment

8260

8261

fnil-receivers

8262

@@ -1025,7 +1025,7 @@

8263

Treat a throw() exception specification as noexcept to improve code size

8264

8265

fobjc-abi-version=

8266

-ObjC ObjC++ Joined Report RejectNegative UInteger Var(flag_objc_abi)

8267

+ObjC ObjC++ LTO Joined Report RejectNegative UInteger Var(flag_objc_abi)

8268

Specify which ABI to use for Objective-C family code and meta-data generation.

8269

8270

; Generate special '- .cxx_construct' and '- .cxx_destruct' methods

8271

@@ -1045,7 +1045,7 @@

8272

Enable Objective-C exception and synchronization syntax

8273

8274

fobjc-gc

8275

-ObjC ObjC++ Var(flag_objc_gc)

8276

+ObjC ObjC++ LTO Var(flag_objc_gc)

8277

Enable garbage collection (GC) in Objective-C/Objective-C++ programs

8278

8279

fobjc-nilcheck

8280

@@ -1105,7 +1105,7 @@

8281

-fno-pretty-templates Do not pretty-print template specializations as the template signature followed by the arguments

8282

8283

freplace-objc-classes

8284

-ObjC ObjC++ Var(flag_replace_objc_classes)

8285

+ObjC ObjC++ LTO Var(flag_replace_objc_classes)

8286

Used in Fix-and-Continue mode to indicate that object files may be swapped in at runtime

8287

8288

frepo

8289

Index: gcc/c-family/c-opts.c

8290

===================================================================

8291

--- a/src/gcc/c-family/c-opts.c (.../tags/gcc_4_8_2_release)

8292

+++ b/src/gcc/c-family/c-opts.c (.../branches/gcc-4_8-branch)

8293

@@ -1258,17 +1258,18 @@

8294

{

8295

size_t i;

8296

8297

- {

8298

- /* Make sure all of the builtins about to be declared have

8299

- BUILTINS_LOCATION has their source_location. */

8300

- source_location builtins_loc = BUILTINS_LOCATION;

8301

- cpp_force_token_locations (parse_in, &builtins_loc);

8302

+ cb_file_change (parse_in,

8303

+ linemap_add (line_table, LC_RENAME, 0,

8304

+ _("<built-in>"), 0));

8305

+ /* Make sure all of the builtins about to be declared have

8306

+ BUILTINS_LOCATION has their source_location. */

8307

+ source_location builtins_loc = BUILTINS_LOCATION;

8308

+ cpp_force_token_locations (parse_in, &builtins_loc);

8309

8310

- cpp_init_builtins (parse_in, flag_hosted);

8311

- c_cpp_builtins (parse_in);

8312

+ cpp_init_builtins (parse_in, flag_hosted);

8313

+ c_cpp_builtins (parse_in);

8314

8315

- cpp_stop_forcing_token_locations (parse_in);

8316

- }

8317

+ cpp_stop_forcing_token_locations (parse_in);

8318

8319

/* We're about to send user input to cpplib, so make it warn for

8320

things that we previously (when we sent it internal definitions)

8321

Index: gcc/c-family/ChangeLog

8322

===================================================================

8323

--- a/src/gcc/c-family/ChangeLog (.../tags/gcc_4_8_2_release)

8324

+++ b/src/gcc/c-family/ChangeLog (.../branches/gcc-4_8-branch)

8325

@@ -1,3 +1,72 @@

8326

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

8327

+

8328

+ Backport from mainline

8329

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

8330

+

8331

+ PR c++/60689

8332

+ * c-common.c (add_atomic_size_parameter): When creating new

8333

+ params vector, push the size argument first.

8334

+

8335

+ 2014-03-22 Jakub Jelinek <jakub@redhat.com>

8336

+

8337

+ PR debug/60603

8338

+ * c-opts.c (c_finish_options): Restore cb_file_change call to

8339

+ <built-in>.

8340

+

8341

+ 2014-03-13 Jakub Jelinek <jakub@redhat.com>

8342

+

8343

+ PR middle-end/36282

8344

+ * c-pragma.c (apply_pragma_weak): Only look at

8345

+ TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)) if

8346

+ DECL_ASSEMBLER_NAME_SET_P (decl).

8347

+ (maybe_apply_pending_pragma_weaks): Exit early if

8348

+ vec_safe_is_empty (pending_weaks) rather than only when

8349

+ !pending_weaks.

8350

+ (maybe_apply_pragma_weak): Likewise. If !DECL_ASSEMBLER_NAME_SET_P,

8351

+ set assembler name back to NULL afterwards.

8352

+

8353

+2014-04-07 Dominique d'Humieres <dominiq@lps.ens.fr>

8354

+

8355

+ Backport from mainline

8356

+ 2013-09-14 Iain Sandoe <iains@gcc.gnu.org>

8357

+

8358

+ PR target/48094

8359

+ * c.opt (fgnu-runtime, fnext-runtime, fobjc-abi-version,

8360

+ fobjc-gc, freplace-objc-classes): Accept for LTO.

8361

+

8362

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

8363

+

8364

+ Backport from mainline

8365

+ 2014-02-19 Jakub Jelinek <jakub@redhat.com>

8366

+

8367

+ PR c/37743

8368

+ * c-common.c (c_common_nodes_and_builtins): When initializing

8369

+ c_uint{16,32,64}_type_node, also set corresponding

8370

+ uint{16,32,64}_type_node to the same value.

8371

+

8372

+ 2014-02-12 Jakub Jelinek <jakub@redhat.com>

8373

+

8374

+ PR c/60101

8375

+ * c-common.c (merge_tlist): If copy is true, call new_tlist,

8376

+ if false, add ADD itself, rather than vice versa.

8377

+ (verify_tree): For COND_EXPR, don't call merge_tlist with non-zero

8378

+ copy. For SAVE_EXPR, only call merge_tlist once.

8379

+

8380

+2013-11-29 Jakub Jelinek <jakub@redhat.com>

8381

+

8382

+ PR c/59280

8383

+ * c-common.c (get_priority): If TREE_VALUE (args) is IDENTIFIER_NODE,

8384

+ goto invalid. If it is error_mark_node, don't issue further

8385

+ diagnostics.

8386

+

8387

+2013-11-04 Marek Polacek <polacek@redhat.com>

8388

+

8389

+ Backport from mainline

8390

+ 2013-11-04 Marek Polacek <polacek@redhat.com>

8391

+

8392

+ PR c++/58979

8393

+ * c-common.c (invalid_indirection_error): Handle RO_ARROW_STAR case.

8394

+

8395

2013-10-16 Release Manager

8396

8397

* GCC 4.8.2 released.

8398

Index: gcc/c-family/c-common.c

8399

===================================================================

8400

--- a/src/gcc/c-family/c-common.c (.../tags/gcc_4_8_2_release)

8401

+++ b/src/gcc/c-family/c-common.c (.../branches/gcc-4_8-branch)

8402

@@ -2894,7 +2894,7 @@

8403

}

8404

if (!found)

8405

{

8406

- *end = copy ? add : new_tlist (NULL, add->expr, add->writer);

8407

+ *end = copy ? new_tlist (NULL, add->expr, add->writer) : add;

8408

end = &(*end)->next;

8409

*end = 0;

8410

}

8411

@@ -3052,7 +3052,7 @@

8412

verify_tree (TREE_OPERAND (x, 0), &tmp_before, &tmp_list2, NULL_TREE);

8413

warn_for_collisions (tmp_list2);

8414

merge_tlist (pbefore_sp, tmp_before, 0);

8415

- merge_tlist (pbefore_sp, tmp_list2, 1);

8416

+ merge_tlist (pbefore_sp, tmp_list2, 0);

8417

8418

tmp_list3 = tmp_nosp = 0;

8419

verify_tree (TREE_OPERAND (x, 1), &tmp_list3, &tmp_nosp, NULL_TREE);

8420

@@ -3156,12 +3156,7 @@

8421

warn_for_collisions (tmp_nosp);

8422

8423

tmp_list3 = 0;

8424

- while (tmp_nosp)

8425

- {

8426

- struct tlist *t = tmp_nosp;

8427

- tmp_nosp = t->next;

8428

- merge_tlist (&tmp_list3, t, 0);

8429

- }

8430

+ merge_tlist (&tmp_list3, tmp_nosp, 0);

8431

t->cache_before_sp = tmp_before;

8432

t->cache_after_sp = tmp_list3;

8433

}

8434

@@ -5511,13 +5506,13 @@

8435

uint8_type_node =

8436

TREE_TYPE (identifier_global_value (c_get_ident (UINT8_TYPE)));

8437

if (UINT16_TYPE)

8438

- c_uint16_type_node =

8439

+ c_uint16_type_node = uint16_type_node =

8440

TREE_TYPE (identifier_global_value (c_get_ident (UINT16_TYPE)));

8441

if (UINT32_TYPE)

8442

- c_uint32_type_node =

8443

+ c_uint32_type_node = uint32_type_node =

8444

TREE_TYPE (identifier_global_value (c_get_ident (UINT32_TYPE)));

8445

if (UINT64_TYPE)

8446

- c_uint64_type_node =

8447

+ c_uint64_type_node = uint64_type_node =

8448

TREE_TYPE (identifier_global_value (c_get_ident (UINT64_TYPE)));

8449

if (INT_LEAST8_TYPE)

8450

int_least8_type_node =

8451

@@ -6917,6 +6912,10 @@

8452

}

8453

8454

arg = TREE_VALUE (args);

8455

+ if (TREE_CODE (arg) == IDENTIFIER_NODE)

8456

+ goto invalid;

8457

+ if (arg == error_mark_node)

8458

+ return DEFAULT_INIT_PRIORITY;

8459

arg = default_conversion (arg);

8460

if (!host_integerp (arg, /*pos=*/0)

8461

|| !INTEGRAL_TYPE_P (TREE_TYPE (arg)))

8462

@@ -9763,6 +9762,11 @@

8463

"invalid type argument of %<->%> (have %qT)",

8464

type);

8465

break;

8466

+ case RO_ARROW_STAR:

8467

+ error_at (loc,

8468

+ "invalid type argument of %<->*%> (have %qT)",

8469

+ type);

8470

+ break;

8471

case RO_IMPLICIT_CONVERSION:

8472

error_at (loc,

8473

"invalid type argument of implicit conversion (have %qT)",

8474

@@ -10198,6 +10202,7 @@

8475

8476

len = params->length ();

8477

vec_alloc (v, len + 1);

8478

+ v->quick_push (build_int_cst (size_type_node, n));

8479

for (z = 0; z < len; z++)

8480

v->quick_push ((*params)[z]);

8481

f = build_function_call_vec (loc, function, v, NULL);

8482

Index: gcc/c-family/c-pragma.c

8483

===================================================================

8484

--- a/src/gcc/c-family/c-pragma.c (.../tags/gcc_4_8_2_release)

8485

+++ b/src/gcc/c-family/c-pragma.c (.../branches/gcc-4_8-branch)

8486

@@ -259,6 +259,7 @@

8487

8488

if (SUPPORTS_WEAK && DECL_EXTERNAL (decl) && TREE_USED (decl)

8489

&& !DECL_WEAK (decl) /* Don't complain about a redundant #pragma. */

8490

+ && DECL_ASSEMBLER_NAME_SET_P (decl)

8491

&& TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)))

8492

warning (OPT_Wpragmas, "applying #pragma weak %q+D after first use "

8493

"results in unspecified behavior", decl);

8494

@@ -276,7 +277,7 @@

8495

/* Avoid asking for DECL_ASSEMBLER_NAME when it's not needed. */

8496

8497

/* No weak symbols pending, take the short-cut. */

8498

- if (!pending_weaks)

8499

+ if (vec_safe_is_empty (pending_weaks))

8500

return;

8501

/* If it's not visible outside this file, it doesn't matter whether

8502

it's weak. */

8503

@@ -288,7 +289,13 @@

8504

if (TREE_CODE (decl) != FUNCTION_DECL && TREE_CODE (decl) != VAR_DECL)

8505

return;

8506

8507

- id = DECL_ASSEMBLER_NAME (decl);

8508

+ if (DECL_ASSEMBLER_NAME_SET_P (decl))

8509

+ id = DECL_ASSEMBLER_NAME (decl);

8510

+ else

8511

+ {

8512

+ id = DECL_ASSEMBLER_NAME (decl);

8513

+ SET_DECL_ASSEMBLER_NAME (decl, NULL_TREE);

8514

+ }

8515

8516

FOR_EACH_VEC_ELT (*pending_weaks, i, pe)

8517

if (id == pe->name)

8518

@@ -309,7 +316,7 @@

8519

pending_weak *pe;

8520

symtab_node target;

8521

8522

- if (!pending_weaks)

8523

+ if (vec_safe_is_empty (pending_weaks))

8524

return;

8525

8526

FOR_EACH_VEC_ELT (*pending_weaks, i, pe)

8527

Index: gcc/c/c-typeck.c

8528

===================================================================

8529

--- a/src/gcc/c/c-typeck.c (.../tags/gcc_4_8_2_release)

8530

+++ b/src/gcc/c/c-typeck.c (.../branches/gcc-4_8-branch)

8531

@@ -2666,7 +2666,7 @@

8532

vec_alloc (v, list_length (params));

8533

for (; params; params = TREE_CHAIN (params))

8534

v->quick_push (TREE_VALUE (params));

8535

- ret = build_function_call_vec (loc, function, v, NULL);

8536

+ ret = c_build_function_call_vec (loc, function, v, NULL);

8537

vec_free (v);

8538

return ret;

8539

}

8540

@@ -2705,14 +2705,6 @@

8541

/* Convert anything with function type to a pointer-to-function. */

8542

if (TREE_CODE (function) == FUNCTION_DECL)

8543

{

8544

- /* Implement type-directed function overloading for builtins.

8545

- resolve_overloaded_builtin and targetm.resolve_overloaded_builtin

8546

- handle all the type checking. The result is a complete expression

8547

- that implements this function call. */

8548

- tem = resolve_overloaded_builtin (loc, function, params);

8549

- if (tem)

8550

- return tem;

8551

-

8552

name = DECL_NAME (function);

8553

8554

if (flag_tm)

8555

@@ -2863,6 +2855,30 @@

8556

}

8557

return require_complete_type (result);

8558

}

8559

+

8560

+/* Like build_function_call_vec, but call also resolve_overloaded_builtin. */

8561

+

8562

+tree

8563

+c_build_function_call_vec (location_t loc, tree function,

8564

+ vec<tree, va_gc> *params,

8565

+ vec<tree, va_gc> *origtypes)

8566

+{

8567

+ /* Strip NON_LVALUE_EXPRs, etc., since we aren't using as an lvalue. */

8568

+ STRIP_TYPE_NOPS (function);

8569

+

8570

+ /* Convert anything with function type to a pointer-to-function. */

8571

+ if (TREE_CODE (function) == FUNCTION_DECL)

8572

+ {

8573

+ /* Implement type-directed function overloading for builtins.

8574

+ resolve_overloaded_builtin and targetm.resolve_overloaded_builtin

8575

+ handle all the type checking. The result is a complete expression

8576

+ that implements this function call. */

8577

+ tree tem = resolve_overloaded_builtin (loc, function, params);

8578

+ if (tem)

8579

+ return tem;

8580

+ }

8581

+ return build_function_call_vec (loc, function, params, origtypes);

8582

+}

8583

8584

/* Convert the argument expressions in the vector VALUES

8585

to the types in the list TYPELIST.

8586

@@ -3629,7 +3645,8 @@

8587

/* Report invalid types. */

8588

8589

if (typecode != POINTER_TYPE && typecode != FIXED_POINT_TYPE

8590

- && typecode != INTEGER_TYPE && typecode != REAL_TYPE)

8591

+ && typecode != INTEGER_TYPE && typecode != REAL_TYPE

8592

+ && typecode != VECTOR_TYPE)

8593

{

8594

if (code == PREINCREMENT_EXPR || code == POSTINCREMENT_EXPR)

8595

error_at (location, "wrong type argument to increment");

8596

@@ -3694,7 +3711,9 @@

8597

}

8598

else

8599

{

8600

- inc = integer_one_node;

8601

+ inc = (TREE_CODE (argtype) == VECTOR_TYPE

8602

+ ? build_one_cst (argtype)

8603

+ : integer_one_node);

8604

inc = convert (argtype, inc);

8605

}

8606

8607

@@ -4331,8 +4350,10 @@

8608

{

8609

if (int_operands)

8610

{

8611

- op1 = remove_c_maybe_const_expr (op1);

8612

- op2 = remove_c_maybe_const_expr (op2);

8613

+ /* Use c_fully_fold here, since C_MAYBE_CONST_EXPR might be

8614

+ nested inside of the expression. */

8615

+ op1 = c_fully_fold (op1, false, NULL);

8616

+ op2 = c_fully_fold (op2, false, NULL);

8617

}

8618

ret = build3 (COND_EXPR, result_type, ifexp, op1, op2);

8619

if (int_operands)

8620

@@ -10618,7 +10639,8 @@

8621

"%qE has invalid type for %<reduction%>", t);

8622

remove = true;

8623

}

8624

- else if (FLOAT_TYPE_P (TREE_TYPE (t)))

8625

+ else if (FLOAT_TYPE_P (TREE_TYPE (t))

8626

+ || TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

8627

{

8628

enum tree_code r_code = OMP_CLAUSE_REDUCTION_CODE (c);

8629

const char *r_name = NULL;

8630

@@ -10628,8 +10650,14 @@

8631

case PLUS_EXPR:

8632

case MULT_EXPR:

8633

case MINUS_EXPR:

8634

+ break;

8635

case MIN_EXPR:

8636

+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

8637

+ r_name = "min";

8638

+ break;

8639

case MAX_EXPR:

8640

+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

8641

+ r_name = "max";

8642

break;

8643

case BIT_AND_EXPR:

8644

r_name = "&";

8645

@@ -10641,10 +10669,12 @@

8646

r_name = "|";

8647

break;

8648

case TRUTH_ANDIF_EXPR:

8649

- r_name = "&&";

8650

+ if (FLOAT_TYPE_P (TREE_TYPE (t)))

8651

+ r_name = "&&";

8652

break;

8653

case TRUTH_ORIF_EXPR:

8654

- r_name = "||";

8655

+ if (FLOAT_TYPE_P (TREE_TYPE (t)))

8656

+ r_name = "||";

8657

break;

8658

default:

8659

gcc_unreachable ();

8660

Index: gcc/c/c-tree.h

8661

===================================================================

8662

--- a/src/gcc/c/c-tree.h (.../tags/gcc_4_8_2_release)

8663

+++ b/src/gcc/c/c-tree.h (.../branches/gcc-4_8-branch)

8664

@@ -640,6 +640,8 @@

8665

extern tree c_finish_omp_clauses (tree);

8666

extern tree c_build_va_arg (location_t, tree, tree);

8667

extern tree c_finish_transaction (location_t, tree, int);

8668

+extern tree c_build_function_call_vec (location_t, tree, vec<tree, va_gc> *,

8669

+ vec<tree, va_gc> *);

8670

8671

/* Set to 0 at beginning of a function definition, set to 1 if

8672

a return statement that specifies a return value is seen. */

8673

Index: gcc/c/ChangeLog

8674

===================================================================

8675

--- a/src/gcc/c/ChangeLog (.../tags/gcc_4_8_2_release)

8676

+++ b/src/gcc/c/ChangeLog (.../branches/gcc-4_8-branch)

8677

@@ -1,3 +1,49 @@

8678

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

8679

+

8680

+ Backport from mainline

8681

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

8682

+

8683

+ PR c++/60689

8684

+ * c-tree.h (c_build_function_call_vec): New prototype.

8685

+ * c-typeck.c (build_function_call_vec): Don't call

8686

+ resolve_overloaded_builtin here.

8687

+ (c_build_function_call_vec): New wrapper function around

8688

+ build_function_call_vec. Call resolve_overloaded_builtin here.

8689

+ (convert_lvalue_to_rvalue, build_function_call, build_atomic_assign):

8690

+ Call c_build_function_call_vec instead of build_function_call_vec.

8691

+ * c-parser.c (c_parser_postfix_expression_after_primary): Likewise.

8692

+ * c-decl.c (finish_decl): Likewise.

8693

+

8694

+2014-01-23 Jakub Jelinek <jakub@redhat.com>

8695

+

8696

+ PR middle-end/58809

8697

+ * c-typeck.c (c_finish_omp_clause): Reject MIN_EXPR, MAX_EXPR,

8698

+ BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR on COMPLEX_TYPEs.

8699

+

8700

+2014-01-22 Marek Polacek <polacek@redhat.com>

8701

+

8702

+ Backport from mainline

8703

+ 2014-01-22 Marek Polacek <polacek@redhat.com>

8704

+

8705

+ PR c/59891

8706

+ * c-typeck.c (build_conditional_expr): Call c_fully_fold instead

8707

+ of remove_c_maybe_const_expr on op1 and op2.

8708

+

8709

+2013-12-03 Marek Polacek <polacek@redhat.com>

8710

+

8711

+ Backport from mainline

8712

+ 2013-12-03 Marek Polacek <polacek@redhat.com>

8713

+

8714

+ PR c/59351

8715

+ * c-decl.c (build_compound_literal): Allow compound literals with

8716

+ empty initial value.

8717

+

8718

+2013-11-27 Tom de Vries <tom@codesourcery.com>

8719

+ Marc Glisse <marc.glisse@inria.fr>

8720

+

8721

+ PR c++/59032

8722

+ * c-typeck.c (build_unary_op): Allow vector increment and decrement.

8723

+

8724

2013-10-16 Release Manager

8725

8726

* GCC 4.8.2 released.

8727

Index: gcc/c/c-decl.c

8728

===================================================================

8729

--- a/src/gcc/c/c-decl.c (.../tags/gcc_4_8_2_release)

8730

+++ b/src/gcc/c/c-decl.c (.../branches/gcc-4_8-branch)

8731

@@ -4507,8 +4507,8 @@

8732

cleanup = build_unary_op (input_location, ADDR_EXPR, decl, 0);

8733

vec_alloc (v, 1);

8734

v->quick_push (cleanup);

8735

- cleanup = build_function_call_vec (DECL_SOURCE_LOCATION (decl),

8736

- cleanup_decl, v, NULL);

8737

+ cleanup = c_build_function_call_vec (DECL_SOURCE_LOCATION (decl),

8738

+ cleanup_decl, v, NULL);

8739

vec_free (v);

8740

8741

/* Don't warn about decl unused; the cleanup uses it. */

8742

@@ -4632,7 +4632,9 @@

8743

{

8744

int failure = complete_array_type (&TREE_TYPE (decl),

8745

DECL_INITIAL (decl), true);

8746

- gcc_assert (!failure);

8747

+ /* If complete_array_type returns 3, it means that the

8748

+ initial value of the compound literal is empty. Allow it. */

8749

+ gcc_assert (failure == 0 || failure == 3);

8750

8751

type = TREE_TYPE (decl);

8752

TREE_TYPE (DECL_INITIAL (decl)) = type;

8753

Index: gcc/c/c-parser.c

8754

===================================================================

8755

--- a/src/gcc/c/c-parser.c (.../tags/gcc_4_8_2_release)

8756

+++ b/src/gcc/c/c-parser.c (.../branches/gcc-4_8-branch)

8757

@@ -6904,8 +6904,8 @@

8758

sizeof_ptr_memacc_comptypes);

8759

/* FIXME diagnostics: Ideally we want the FUNCNAME, not the

8760

"(" after the FUNCNAME, which is what we have now. */

8761

- expr.value = build_function_call_vec (op_loc, expr.value, exprlist,

8762

- origtypes);

8763

+ expr.value = c_build_function_call_vec (op_loc, expr.value, exprlist,

8764

+ origtypes);

8765

expr.original_code = ERROR_MARK;

8766

if (TREE_CODE (expr.value) == INTEGER_CST

8767

&& TREE_CODE (orig_expr.value) == FUNCTION_DECL

8768

Index: gcc/cgraph.c

8769

===================================================================

8770

--- a/src/gcc/cgraph.c (.../tags/gcc_4_8_2_release)

8771

+++ b/src/gcc/cgraph.c (.../branches/gcc-4_8-branch)

8772

@@ -2596,4 +2596,47 @@

8773

FOR_EACH_FUNCTION (node)

8774

verify_cgraph_node (node);

8775

}

8776

+

8777

+/* Create external decl node for DECL.

8778

+ The difference i nbetween cgraph_get_create_node and

8779

+ cgraph_get_create_real_symbol_node is that cgraph_get_create_node

8780

+ may return inline clone, while cgraph_get_create_real_symbol_node

8781

+ will create a new node in this case.

8782

+ FIXME: This function should be removed once clones are put out of decl

8783

+ hash. */

8784

+

8785

+struct cgraph_node *

8786

+cgraph_get_create_real_symbol_node (tree decl)

8787

+{

8788

+ struct cgraph_node *first_clone = cgraph_get_node (decl);

8789

+ struct cgraph_node *node;

8790

+ /* create symbol table node. even if inline clone exists, we can not take

8791

+ it as a target of non-inlined call. */

8792

+ node = cgraph_get_node (decl);

8793

+ if (node && !node->global.inlined_to)

8794

+ return node;

8795

+

8796

+ node = cgraph_create_node (decl);

8797

+

8798

+ /* ok, we previously inlined the function, then removed the offline copy and

8799

+ now we want it back for external call. this can happen when devirtualizing

8800

+ while inlining function called once that happens after extern inlined and

8801

+ virtuals are already removed. in this case introduce the external node

8802

+ and make it available for call. */

8803

+ if (first_clone)

8804

+ {

8805

+ first_clone->clone_of = node;

8806

+ node->clones = first_clone;

8807

+ symtab_prevail_in_asm_name_hash ((symtab_node) node);

8808

+ symtab_insert_node_to_hashtable ((symtab_node) node);

8809

+ if (dump_file)

8810

+ fprintf (dump_file, "Introduced new external node "

8811

+ "(%s/%i) and turned into root of the clone tree.\n",

8812

+ xstrdup (cgraph_node_name (node)), node->uid);

8813

+ }

8814

+ else if (dump_file)

8815

+ fprintf (dump_file, "Introduced new external node "

8816

+ "(%s/%i).\n", xstrdup (cgraph_node_name (node)), node->uid);

8817

+ return node;

8818

+}

8819

#include "gt-cgraph.h"

8820

Index: gcc/cgraph.h

8821

===================================================================

8822

--- a/src/gcc/cgraph.h (.../tags/gcc_4_8_2_release)

8823

+++ b/src/gcc/cgraph.h (.../branches/gcc-4_8-branch)

8824

@@ -575,6 +575,7 @@

8825

struct cgraph_node * cgraph_create_node (tree);

8826

struct cgraph_node * cgraph_create_empty_node (void);

8827

struct cgraph_node * cgraph_get_create_node (tree);

8828

+struct cgraph_node * cgraph_get_create_real_symbol_node (tree);

8829

struct cgraph_node * cgraph_same_body_alias (struct cgraph_node *, tree, tree);

8830

struct cgraph_node * cgraph_add_thunk (struct cgraph_node *, tree, tree, bool, HOST_WIDE_INT,

8831

HOST_WIDE_INT, tree, tree);

8832

Index: gcc/optabs.c

8833

===================================================================

8834

--- a/src/gcc/optabs.c (.../tags/gcc_4_8_2_release)

8835

+++ b/src/gcc/optabs.c (.../branches/gcc-4_8-branch)

8836

@@ -3376,7 +3376,8 @@

8837

{

8838

rtx temp;

8839

8840

- if (! flag_trapv)

8841

+ if (GET_MODE_CLASS (mode) != MODE_INT

8842

+ || ! flag_trapv)

8843

result_unsignedp = 1;

8844

8845

/* First try to do it with a special abs instruction. */

8846

@@ -3399,7 +3400,8 @@

8847

{

8848

rtx last = get_last_insn ();

8849

8850

- temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);

8851

+ temp = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,

8852

+ op0, NULL_RTX, 0);

8853

if (temp != 0)

8854

temp = expand_binop (mode, smax_optab, op0, temp, target, 0,

8855

OPTAB_WIDEN);

8856

@@ -3441,7 +3443,8 @@

8857

{

8858

rtx temp, op1;

8859

8860

- if (! flag_trapv)

8861

+ if (GET_MODE_CLASS (mode) != MODE_INT

8862

+ || ! flag_trapv)

8863

result_unsignedp = 1;

8864

8865

temp = expand_abs_nojump (mode, op0, target, result_unsignedp);

8866

@@ -4558,8 +4561,11 @@

8867

if (!COMPARISON_P (comparison))

8868

return NULL_RTX;

8869

8870

+ /* State variables we need to save and restore if cmove can't be used. */

8871

+ int save_pending_stack_adjust = pending_stack_adjust;

8872

+ int save_stack_pointer_delta = stack_pointer_delta;

8873

+ last = get_last_insn ();

8874

do_pending_stack_adjust ();

8875

- last = get_last_insn ();

8876

prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),

8877

GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,

8878

&comparison, &cmode);

8879

@@ -4579,6 +4585,8 @@

8880

}

8881

}

8882

delete_insns_since (last);

8883

+ pending_stack_adjust = save_pending_stack_adjust;

8884

+ stack_pointer_delta = save_stack_pointer_delta;

8885

return NULL_RTX;

8886

}

8887

8888

@@ -6233,7 +6241,7 @@

8889

8890

/* If the optabs changed, record it. */

8891

if (memcmp (tmp_optabs, this_target_optabs, sizeof (struct target_optabs)))

8892

- TREE_OPTIMIZATION_OPTABS (optnode) = (unsigned char *) tmp_optabs;

8893

+ TREE_OPTIMIZATION_OPTABS (optnode) = tmp_optabs;

8894

else

8895

{

8896

TREE_OPTIMIZATION_OPTABS (optnode) = NULL;

8897

@@ -7035,8 +7043,7 @@

8898

8899

create_output_operand (&ops[0], target, mode);

8900

create_fixed_operand (&ops[1], mem);

8901

- /* VAL may have been promoted to a wider mode. Shrink it if so. */

8902

- create_convert_operand_to (&ops[2], val, mode, true);

8903

+ create_input_operand (&ops[2], val, mode);

8904

create_integer_operand (&ops[3], model);

8905

if (maybe_expand_insn (icode, 4, ops))

8906

return ops[0].value;

8907

@@ -7075,8 +7082,7 @@

8908

struct expand_operand ops[3];

8909

create_output_operand (&ops[0], target, mode);

8910

create_fixed_operand (&ops[1], mem);

8911

- /* VAL may have been promoted to a wider mode. Shrink it if so. */

8912

- create_convert_operand_to (&ops[2], val, mode, true);

8913

+ create_input_operand (&ops[2], val, mode);

8914

if (maybe_expand_insn (icode, 3, ops))

8915

return ops[0].value;

8916

}

8917

@@ -7118,8 +7124,6 @@

8918

{

8919

if (!target || !register_operand (target, mode))

8920

target = gen_reg_rtx (mode);

8921

- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)

8922

- val = convert_modes (mode, GET_MODE (val), val, 1);

8923

if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))

8924

return target;

8925

}

8926

@@ -7331,8 +7335,8 @@

8927

create_output_operand (&ops[0], target_bool, bool_mode);

8928

create_output_operand (&ops[1], target_oval, mode);

8929

create_fixed_operand (&ops[2], mem);

8930

- create_convert_operand_to (&ops[3], expected, mode, true);

8931

- create_convert_operand_to (&ops[4], desired, mode, true);

8932

+ create_input_operand (&ops[3], expected, mode);

8933

+ create_input_operand (&ops[4], desired, mode);

8934

create_integer_operand (&ops[5], is_weak);

8935

create_integer_operand (&ops[6], succ_model);

8936

create_integer_operand (&ops[7], fail_model);

8937

@@ -7353,8 +7357,8 @@

8938

8939

create_output_operand (&ops[0], target_oval, mode);

8940

create_fixed_operand (&ops[1], mem);

8941

- create_convert_operand_to (&ops[2], expected, mode, true);

8942

- create_convert_operand_to (&ops[3], desired, mode, true);

8943

+ create_input_operand (&ops[2], expected, mode);

8944

+ create_input_operand (&ops[3], desired, mode);

8945

if (!maybe_expand_insn (icode, 4, ops))

8946

return false;

8947

8948

Index: gcc/DATESTAMP

8949

===================================================================

8950

--- a/src/gcc/DATESTAMP (.../tags/gcc_4_8_2_release)

8951

+++ b/src/gcc/DATESTAMP (.../branches/gcc-4_8-branch)

8952

@@ -1 +1 @@

8953

-20131016

8954

+20140424

8955

Index: gcc/value-prof.c

8956

===================================================================

8957

--- a/src/gcc/value-prof.c (.../tags/gcc_4_8_2_release)

8958

+++ b/src/gcc/value-prof.c (.../branches/gcc-4_8-branch)

8959

@@ -1270,8 +1270,7 @@

8960

8961

/* Build an EH edge for the direct call if necessary. */

8962

lp_nr = lookup_stmt_eh_lp (icall_stmt);

8963

- if (lp_nr != 0

8964

- && stmt_could_throw_p (dcall_stmt))

8965

+ if (lp_nr > 0 && stmt_could_throw_p (dcall_stmt))

8966

{

8967

edge e_eh, e;

8968

edge_iterator ei;

8969

Index: gcc/tree.c

8970

===================================================================

8971

--- a/src/gcc/tree.c (.../tags/gcc_4_8_2_release)

8972

+++ b/src/gcc/tree.c (.../branches/gcc-4_8-branch)

8973

@@ -1619,6 +1619,60 @@

8974

}

8975

}

8976

8977

+/* Return an integer of type TYPE containing all 1's in as much precision as

8978

+ it contains, or a complex or vector whose subparts are such integers. */

8979

+

8980

+tree

8981

+build_all_ones_cst (tree type)

8982

+{

8983

+ if (TREE_CODE (type) == COMPLEX_TYPE)

8984

+ {

8985

+ tree scalar = build_all_ones_cst (TREE_TYPE (type));

8986

+ return build_complex (type, scalar, scalar);

8987

+ }

8988

+ else

8989

+ return build_minus_one_cst (type);

8990

+}

8991

+

8992

+/* Return a constant of arithmetic type TYPE which is the

8993

+ opposite of the multiplicative identity of the set TYPE. */

8994

+

8995

+tree

8996

+build_minus_one_cst (tree type)

8997

+{

8998

+ switch (TREE_CODE (type))

8999

+ {

9000

+ case INTEGER_TYPE: case ENUMERAL_TYPE: case BOOLEAN_TYPE:

9001

+ case POINTER_TYPE: case REFERENCE_TYPE:

9002

+ case OFFSET_TYPE:

9003

+ return build_int_cst (type, -1);

9004

+

9005

+ case REAL_TYPE:

9006

+ return build_real (type, dconstm1);

9007

+

9008

+ case FIXED_POINT_TYPE:

9009

+ /* We can only generate 1 for accum types. */

9010

+ gcc_assert (ALL_SCALAR_ACCUM_MODE_P (TYPE_MODE (type)));

9011

+ return build_fixed (type, fixed_from_double_int (double_int_minus_one,

9012

+ TYPE_MODE (type)));

9013

+

9014

+ case VECTOR_TYPE:

9015

+ {

9016

+ tree scalar = build_minus_one_cst (TREE_TYPE (type));

9017

+

9018

+ return build_vector_from_val (type, scalar);

9019

+ }

9020

+

9021

+ case COMPLEX_TYPE:

9022

+ return build_complex (type,

9023

+ build_minus_one_cst (TREE_TYPE (type)),

9024

+ build_zero_cst (TREE_TYPE (type)));

9025

+

9026

+ default:

9027

+ gcc_unreachable ();

9028

+ }

9029

+}

9030

+

9031

/* Build 0 constant of type TYPE. This is used by constructor folding

9032

and thus the constant should be represented in memory by

9033

zero(es). */

9034

Index: gcc/tree.h

9035

===================================================================

9036

--- a/src/gcc/tree.h (.../tags/gcc_4_8_2_release)

9037

+++ b/src/gcc/tree.h (.../branches/gcc-4_8-branch)

9038

@@ -3589,7 +3589,7 @@

9039

9040

/* Target optabs for this set of optimization options. This is of

9041

type `struct target_optabs *'. */

9042

- unsigned char *GTY ((atomic)) optabs;

9043

+ void *GTY ((atomic)) optabs;

9044

9045

/* The value of this_target_optabs against which the optabs above were

9046

generated. */

9047

@@ -4760,6 +4760,8 @@

9048

extern tree build_real_from_int_cst (tree, const_tree);

9049

extern tree build_complex (tree, tree, tree);

9050

extern tree build_one_cst (tree);

9051

+extern tree build_minus_one_cst (tree);

9052

+extern tree build_all_ones_cst (tree);

9053

extern tree build_zero_cst (tree);

9054

extern tree build_string (int, const char *);

9055

extern tree build_tree_list_stat (tree, tree MEM_STAT_DECL);

9056

@@ -5854,6 +5856,7 @@

9057

extern tree fold_builtin_fputs (location_t, tree, tree, bool, bool, tree);

9058

extern tree fold_builtin_strcpy (location_t, tree, tree, tree, tree);

9059

extern tree fold_builtin_strncpy (location_t, tree, tree, tree, tree, tree);

9060

+extern tree fold_builtin_strcat (location_t, tree, tree, tree);

9061

extern tree fold_builtin_memory_chk (location_t, tree, tree, tree, tree, tree, tree, bool,

9062

enum built_in_function);

9063

extern tree fold_builtin_stxcpy_chk (location_t, tree, tree, tree, tree, tree, bool,

9064

@@ -6545,4 +6548,18 @@

9065

&& builtin_info.implicit_p[uns_fncode]);

9066

}

9067

9068

+/* Return pointer to optimization flags of FNDECL. */

9069

+static inline struct cl_optimization *

9070

+opts_for_fn (const_tree fndecl)

9071

+{

9072

+ tree fn_opts = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);

9073

+ if (fn_opts == NULL_TREE)

9074

+ fn_opts = optimization_default_node;

9075

+ return TREE_OPTIMIZATION (fn_opts);

9076

+}

9077

+

9078

+/* opt flag for function FNDECL, e.g. opts_for_fn (fndecl, optimize) is

9079

+ the optimization level of function fndecl. */

9080

+#define opt_for_fn(fndecl, opt) (opts_for_fn (fndecl)->x_##opt)

9081

+

9082

#endif /* GCC_TREE_H */

9083

Index: gcc/ipa-cp.c

9084

===================================================================

9085

--- a/src/gcc/ipa-cp.c (.../tags/gcc_4_8_2_release)

9086

+++ b/src/gcc/ipa-cp.c (.../branches/gcc-4_8-branch)

9087

@@ -444,6 +444,9 @@

9088

reason = "not a tree_versionable_function";

9089

else if (cgraph_function_body_availability (node) <= AVAIL_OVERWRITABLE)

9090

reason = "insufficient body availability";

9091

+ else if (!opt_for_fn (node->symbol.decl, optimize)

9092

+ || !opt_for_fn (node->symbol.decl, flag_ipa_cp))

9093

+ reason = "non-optimized function";

9094

9095

if (reason && dump_file && !node->alias && !node->thunk.thunk_p)

9096

fprintf (dump_file, "Function %s/%i is not versionable, reason: %s.\n",

9097

@@ -1455,22 +1458,21 @@

9098

args_count = ipa_get_cs_argument_count (args);

9099

parms_count = ipa_get_param_count (callee_info);

9100

9101

- /* If this call goes through a thunk we must not propagate to the first (0th)

9102

- parameter. However, we might need to uncover a thunk from below a series

9103

- of aliases first. */

9104

+ /* If this call goes through a thunk we should not propagate because we

9105

+ cannot redirect edges to thunks. However, we might need to uncover a

9106

+ thunk from below a series of aliases first. */

9107

alias_or_thunk = cs->callee;

9108

while (alias_or_thunk->alias)

9109

alias_or_thunk = cgraph_alias_aliased_node (alias_or_thunk);

9110

if (alias_or_thunk->thunk.thunk_p)

9111

{

9112

- ret |= set_all_contains_variable (ipa_get_parm_lattices (callee_info,

9113

- 0));

9114

- i = 1;

9115

+ for (i = 0; i < parms_count; i++)

9116

+ ret |= set_all_contains_variable (ipa_get_parm_lattices (callee_info,

9117

+ i));

9118

+ return ret;

9119

}

9120

- else

9121

- i = 0;

9122

9123

- for (; (i < args_count) && (i < parms_count); i++)

9124

+ for (i = 0; (i < args_count) && (i < parms_count); i++)

9125

{

9126

struct ipa_jump_func *jump_func = ipa_get_ith_jump_func (args, i);

9127

struct ipcp_param_lattices *dest_plats;

9128

@@ -3119,6 +3121,7 @@

9129

struct cgraph_node *node)

9130

{

9131

struct ipa_node_params *orig_caller_info = IPA_NODE_REF (cs->caller);

9132

+ struct ipa_node_params *orig_node_info;

9133

struct ipa_agg_replacement_value *aggval;

9134

int i, ec, count;

9135

9136

@@ -3133,6 +3136,7 @@

9137

if (aggval->index >= ec)

9138

return false;

9139

9140

+ orig_node_info = IPA_NODE_REF (IPA_NODE_REF (node)->ipcp_orig_node);

9141

if (orig_caller_info->ipcp_orig_node)

9142

orig_caller_info = IPA_NODE_REF (orig_caller_info->ipcp_orig_node);

9143

9144

@@ -3150,7 +3154,7 @@

9145

if (!interesting)

9146

continue;

9147

9148

- plats = ipa_get_parm_lattices (orig_caller_info, aggval->index);

9149

+ plats = ipa_get_parm_lattices (orig_node_info, aggval->index);

9150

if (plats->aggs_bottom)

9151

return false;

9152

9153

Index: gcc/rtlanal.c

9154

===================================================================

9155

--- a/src/gcc/rtlanal.c (.../tags/gcc_4_8_2_release)

9156

+++ b/src/gcc/rtlanal.c (.../branches/gcc-4_8-branch)

9157

@@ -224,10 +224,10 @@

9158

return 0;

9159

}

9160

9161

-/* Return nonzero if the use of X as an address in a MEM can cause a trap.

9162

- MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls

9163

- whether nonzero is returned for unaligned memory accesses on strict

9164

- alignment machines. */

9165

+/* Return nonzero if the use of X+OFFSET as an address in a MEM with SIZE

9166

+ bytes can cause a trap. MODE is the mode of the MEM (not that of X) and

9167

+ UNALIGNED_MEMS controls whether nonzero is returned for unaligned memory

9168

+ references on strict alignment machines. */

9169

9170

static int

9171

rtx_addr_can_trap_p_1 (const_rtx x, HOST_WIDE_INT offset, HOST_WIDE_INT size,

9172

@@ -235,11 +235,12 @@

9173

{

9174

enum rtx_code code = GET_CODE (x);

9175

9176

- if (STRICT_ALIGNMENT

9177

- && unaligned_mems

9178

- && GET_MODE_SIZE (mode) != 0)

9179

+ /* The offset must be a multiple of the mode size if we are considering

9180

+ unaligned memory references on strict alignment machines. */

9181

+ if (STRICT_ALIGNMENT && unaligned_mems && GET_MODE_SIZE (mode) != 0)

9182

{

9183

HOST_WIDE_INT actual_offset = offset;

9184

+

9185

#ifdef SPARC_STACK_BOUNDARY_HACK

9186

/* ??? The SPARC port may claim a STACK_BOUNDARY higher than

9187

the real alignment of %sp. However, when it does this, the

9188

@@ -298,8 +299,27 @@

9189

return 0;

9190

9191

case REG:

9192

- /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */

9193

- if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx

9194

+ /* Stack references are assumed not to trap, but we need to deal with

9195

+ nonsensical offsets. */

9196

+ if (x == frame_pointer_rtx)

9197

+ {

9198

+ HOST_WIDE_INT adj_offset = offset - STARTING_FRAME_OFFSET;

9199

+ if (size == 0)

9200

+ size = GET_MODE_SIZE (mode);

9201

+ if (FRAME_GROWS_DOWNWARD)

9202

+ {

9203

+ if (adj_offset < frame_offset || adj_offset + size - 1 >= 0)

9204

+ return 1;

9205

+ }

9206

+ else

9207

+ {

9208

+ if (adj_offset < 0 || adj_offset + size - 1 >= frame_offset)

9209

+ return 1;

9210

+ }

9211

+ return 0;

9212

+ }

9213

+ /* ??? Need to add a similar guard for nonsensical offsets. */

9214

+ if (x == hard_frame_pointer_rtx

9215

|| x == stack_pointer_rtx

9216

/* The arg pointer varies if it is not a fixed register. */

9217

|| (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))

9218

@@ -320,9 +340,7 @@

9219

if (XEXP (x, 0) == pic_offset_table_rtx && CONSTANT_P (XEXP (x, 1)))

9220

return 0;

9221

9222

- /* - or it is an address that can't trap plus a constant integer,

9223

- with the proper remainder modulo the mode size if we are

9224

- considering unaligned memory references. */

9225

+ /* - or it is an address that can't trap plus a constant integer. */

9226

if (CONST_INT_P (XEXP (x, 1))

9227

&& !rtx_addr_can_trap_p_1 (XEXP (x, 0), offset + INTVAL (XEXP (x, 1)),

9228

size, mode, unaligned_mems))

9229

Index: gcc/configure

9230

===================================================================

9231

--- a/src/gcc/configure (.../tags/gcc_4_8_2_release)

9232

+++ b/src/gcc/configure (.../branches/gcc-4_8-branch)

9233

@@ -11202,13 +11202,16 @@

9234

/* | A-Za-z:\\/* ) realsrcdir=${srcdir};;

9235

*) realsrcdir=../${srcdir};;

9236

esac

9237

- saved_CFLAGS="${CFLAGS}"

9238

+ # Clearing GMPINC is necessary to prevent host headers being

9239

+ # used by the build compiler. Defining GENERATOR_FILE stops

9240

+ # system.h from including gmp.h.

9241

CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \

9242

- LDFLAGS="${LDFLAGS_FOR_BUILD}" \

9243

+ CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \

9244

+ LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \

9245

+ GMPINC="" CPPFLAGS="${CPPFLAGS} -DGENERATOR_FILE" \

9246

${realsrcdir}/configure \

9247

--enable-languages=${enable_languages-all} \

9248

--target=$target_alias --host=$build_alias --build=$build_alias

9249

- CFLAGS="${saved_CFLAGS}"

9250

9251

# We just finished tests for the build machine, so rename

9252

# the file auto-build.h in the gcc directory.

9253

@@ -11703,6 +11706,7 @@

9254

if test x$build != x$host || test "x$coverage_flags" != x

9255

then

9256

BUILD_CFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CFLAGS_FOR_BUILD)'

9257

+ BUILD_CXXFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CXXFLAGS_FOR_BUILD)'

9258

BUILD_LDFLAGS='$(LDFLAGS_FOR_BUILD)'

9259

fi

9260

9261

@@ -13590,7 +13594,7 @@

9262

rm -rf conftest*

9263

;;

9264

9265

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

9266

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

9267

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

9268

# Find out which ABI we are using.

9269

echo 'int i;' > conftest.$ac_ext

9270

@@ -13615,7 +13619,10 @@

9271

;;

9272

esac

9273

;;

9274

- ppc64-*linux*|powerpc64-*linux*)

9275

+ powerpc64le-*linux*)

9276

+ LD="${LD-ld} -m elf32lppclinux"

9277

+ ;;

9278

+ powerpc64-*linux*)

9279

LD="${LD-ld} -m elf32ppclinux"

9280

;;

9281

s390x-*linux*)

9282

@@ -13634,7 +13641,10 @@

9283

x86_64-*linux*)

9284

LD="${LD-ld} -m elf_x86_64"

9285

;;

9286

- ppc*-*linux*|powerpc*-*linux*)

9287

+ powerpcle-*linux*)

9288

+ LD="${LD-ld} -m elf64lppc"

9289

+ ;;

9290

+ powerpc-*linux*)

9291

LD="${LD-ld} -m elf64ppc"

9292

;;

9293

s390*-*linux*|s390*-*tpf*)

9294

@@ -17828,7 +17838,7 @@

9295

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

9296

lt_status=$lt_dlunknown

9297

cat > conftest.$ac_ext <<_LT_EOF

9298

-#line 17831 "configure"

9299

+#line 17841 "configure"

9300

#include "confdefs.h"

9301

9302

#if HAVE_DLFCN_H

9303

@@ -17934,7 +17944,7 @@

9304

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

9305

lt_status=$lt_dlunknown

9306

cat > conftest.$ac_ext <<_LT_EOF

9307

-#line 17937 "configure"

9308

+#line 17947 "configure"

9309

#include "confdefs.h"

9310

9311

#if HAVE_DLFCN_H

9312

@@ -24263,6 +24273,43 @@

9313

$as_echo "#define HAVE_AS_SPARC4 1" >>confdefs.h

9314

9315

fi

9316

+

9317

+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for LEON instructions" >&5

9318

+$as_echo_n "checking assembler for LEON instructions... " >&6; }

9319

+if test "${gcc_cv_as_sparc_leon+set}" = set; then :

9320

+ $as_echo_n "(cached) " >&6

9321

+else

9322

+ gcc_cv_as_sparc_leon=no

9323

+ if test x$gcc_cv_as != x; then

9324

+ $as_echo '.text

9325

+ .register %g2, #scratch

9326

+ .register %g3, #scratch

9327

+ .align 4

9328

+ smac %g2, %g3, %g1

9329

+ umac %g2, %g3, %g1

9330

+ cas [%g2], %g3, %g1' > conftest.s

9331

+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -Aleon -o conftest.o conftest.s >&5'

9332

+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5

9333

+ (eval $ac_try) 2>&5

9334

+ ac_status=$?

9335

+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5

9336

+ test $ac_status = 0; }; }

9337

+ then

9338

+ gcc_cv_as_sparc_leon=yes

9339

+ else

9340

+ echo "configure: failed program was" >&5

9341

+ cat conftest.s >&5

9342

+ fi

9343

+ rm -f conftest.o conftest.s

9344

+ fi

9345

+fi

9346

+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_sparc_leon" >&5

9347

+$as_echo "$gcc_cv_as_sparc_leon" >&6; }

9348

+if test $gcc_cv_as_sparc_leon = yes; then

9349

+

9350

+$as_echo "#define HAVE_AS_LEON 1" >>confdefs.h

9351

+

9352

+fi

9353

;;

9354

9355

i[34567]86-*-* | x86_64-*-*)

9356

@@ -24745,6 +24792,10 @@

9357

9358

# These two are used unconditionally by i386.[ch]; it is to be defined

9359

# to 1 if the feature is present, 0 otherwise.

9360

+ as_ix86_gotoff_in_data_opt=

9361

+ if test x$gas = xyes; then

9362

+ as_ix86_gotoff_in_data_opt="--32"

9363

+ fi

9364

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for GOTOFF in data" >&5

9365

$as_echo_n "checking assembler for GOTOFF in data... " >&6; }

9366

if test "${gcc_cv_as_ix86_gotoff_in_data+set}" = set; then :

9367

@@ -24761,7 +24812,7 @@

9368

nop

9369

.data

9370

.long .L0@GOTOFF' > conftest.s

9371

- if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'

9372

+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags $as_ix86_gotoff_in_data_opt -o conftest.o conftest.s >&5'

9373

{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5

9374

(eval $ac_try) 2>&5

9375

ac_status=$?

9376

@@ -24822,6 +24873,37 @@

9377

9378

fi

9379

9380

+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for ud2 mnemonic" >&5

9381

+$as_echo_n "checking assembler for ud2 mnemonic... " >&6; }

9382

+if test "${gcc_cv_as_ix86_ud2+set}" = set; then :

9383

+ $as_echo_n "(cached) " >&6

9384

+else

9385

+ gcc_cv_as_ix86_ud2=no

9386

+ if test x$gcc_cv_as != x; then

9387

+ $as_echo 'ud2' > conftest.s

9388

+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'

9389

+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5

9390

+ (eval $ac_try) 2>&5

9391

+ ac_status=$?

9392

+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5

9393

+ test $ac_status = 0; }; }

9394

+ then

9395

+ gcc_cv_as_ix86_ud2=yes

9396

+ else

9397

+ echo "configure: failed program was" >&5

9398

+ cat conftest.s >&5

9399

+ fi

9400

+ rm -f conftest.o conftest.s

9401

+ fi

9402

+fi

9403

+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_ix86_ud2" >&5

9404

+$as_echo "$gcc_cv_as_ix86_ud2" >&6; }

9405

+if test $gcc_cv_as_ix86_ud2 = yes; then

9406

+

9407

+$as_echo "#define HAVE_AS_IX86_UD2 1" >>confdefs.h

9408

+

9409

+fi

9410

+

9411

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for R_386_TLS_GD_PLT reloc" >&5

9412

$as_echo_n "checking assembler for R_386_TLS_GD_PLT reloc... " >&6; }

9413

if test "${gcc_cv_as_ix86_tlsgdplt+set}" = set; then :

9414

@@ -27239,8 +27321,8 @@

9415

$as_echo_n "checking for exported symbols... " >&6; }

9416

if test "x$export_sym_check" != x; then

9417

echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c

9418

- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1

9419

- if $export_sym_check conftest | grep foobar > /dev/null; then

9420

+ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1

9421

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

9422

: # No need to use a flag

9423

{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5

9424

$as_echo "yes" >&6; }

9425

@@ -27249,8 +27331,8 @@

9426

$as_echo "yes" >&6; }

9427

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -rdynamic" >&5

9428

$as_echo_n "checking for -rdynamic... " >&6; }

9429

- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1

9430

- if $export_sym_check conftest | grep foobar > /dev/null; then

9431

+ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1

9432

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

9433

plugin_rdynamic=yes

9434

pluginlibs="-rdynamic"

9435

else

9436

Index: gcc/builtins.c

9437

===================================================================

9438

--- a/src/gcc/builtins.c (.../tags/gcc_4_8_2_release)

9439

+++ b/src/gcc/builtins.c (.../branches/gcc-4_8-branch)

9440

@@ -180,7 +180,6 @@

9441

static tree fold_builtin_strpbrk (location_t, tree, tree, tree);

9442

static tree fold_builtin_strstr (location_t, tree, tree, tree);

9443

static tree fold_builtin_strrchr (location_t, tree, tree, tree);

9444

-static tree fold_builtin_strcat (location_t, tree, tree);

9445

static tree fold_builtin_strncat (location_t, tree, tree, tree);

9446

static tree fold_builtin_strspn (location_t, tree, tree);

9447

static tree fold_builtin_strcspn (location_t, tree, tree);

9448

@@ -1958,6 +1957,7 @@

9449

tree fndecl = get_callee_fndecl (exp);

9450

enum machine_mode mode;

9451

bool errno_set = false;

9452

+ bool try_widening = false;

9453

tree arg;

9454

9455

if (!validate_arglist (exp, REAL_TYPE, VOID_TYPE))

9456

@@ -1969,6 +1969,7 @@

9457

{

9458

CASE_FLT_FN (BUILT_IN_SQRT):

9459

errno_set = ! tree_expr_nonnegative_p (arg);

9460

+ try_widening = true;

9461

builtin_optab = sqrt_optab;

9462

break;

9463

CASE_FLT_FN (BUILT_IN_EXP):

9464

@@ -2025,8 +2026,10 @@

9465

if (! flag_errno_math || ! HONOR_NANS (mode))

9466

errno_set = false;

9467

9468

- /* Before working hard, check whether the instruction is available. */

9469

- if (optab_handler (builtin_optab, mode) != CODE_FOR_nothing

9470

+ /* Before working hard, check whether the instruction is available, but try

9471

+ to widen the mode for specific operations. */

9472

+ if ((optab_handler (builtin_optab, mode) != CODE_FOR_nothing

9473

+ || (try_widening && !excess_precision_type (TREE_TYPE (exp))))

9474

&& (!errno_set || !optimize_insn_for_size_p ()))

9475

{

9476

rtx result = gen_reg_rtx (mode);

9477

@@ -5347,7 +5350,7 @@

9478

expand_builtin_atomic_compare_exchange (enum machine_mode mode, tree exp,

9479

rtx target)

9480

{

9481

- rtx expect, desired, mem, oldval;

9482

+ rtx expect, desired, mem, oldval, label;

9483

enum memmodel success, failure;

9484

tree weak;

9485

bool is_weak;

9486

@@ -5385,14 +5388,26 @@

9487

if (host_integerp (weak, 0) && tree_low_cst (weak, 0) != 0)

9488

is_weak = true;

9489

9490

- oldval = expect;

9491

- if (!expand_atomic_compare_and_swap ((target == const0_rtx ? NULL : &target),

9492

- &oldval, mem, oldval, desired,

9493

+ if (target == const0_rtx)

9494

+ target = NULL;

9495

+

9496

+ /* Lest the rtl backend create a race condition with an imporoper store

9497

+ to memory, always create a new pseudo for OLDVAL. */

9498

+ oldval = NULL;

9499

+

9500

+ if (!expand_atomic_compare_and_swap (&target, &oldval, mem, expect, desired,

9501

is_weak, success, failure))

9502

return NULL_RTX;

9503

9504

- if (oldval != expect)

9505

- emit_move_insn (expect, oldval);

9506

+ /* Conditionally store back to EXPECT, lest we create a race condition

9507

+ with an improper store to memory. */

9508

+ /* ??? With a rearrangement of atomics at the gimple level, we can handle

9509

+ the normal case where EXPECT is totally private, i.e. a register. At

9510

+ which point the store can be unconditional. */

9511

+ label = gen_label_rtx ();

9512

+ emit_cmp_and_jump_insns (target, const0_rtx, NE, NULL, VOIDmode, 1, label);

9513

+ emit_move_insn (expect, oldval);

9514

+ emit_label (label);

9515

9516

return target;

9517

}

9518

@@ -5846,6 +5861,9 @@

9519

switch (fcode)

9520

{

9521

CASE_FLT_FN (BUILT_IN_FABS):

9522

+ case BUILT_IN_FABSD32:

9523

+ case BUILT_IN_FABSD64:

9524

+ case BUILT_IN_FABSD128:

9525

target = expand_builtin_fabs (exp, target, subtarget);

9526

if (target)

9527

return target;

9528

@@ -10298,6 +10316,9 @@

9529

return fold_builtin_strlen (loc, type, arg0);

9530

9531

CASE_FLT_FN (BUILT_IN_FABS):

9532

+ case BUILT_IN_FABSD32:

9533

+ case BUILT_IN_FABSD64:

9534

+ case BUILT_IN_FABSD128:

9535

return fold_builtin_fabs (loc, arg0, type);

9536

9537

case BUILT_IN_ABS:

9538

@@ -10766,7 +10787,7 @@

9539

return fold_builtin_strstr (loc, arg0, arg1, type);

9540

9541

case BUILT_IN_STRCAT:

9542

- return fold_builtin_strcat (loc, arg0, arg1);

9543

+ return fold_builtin_strcat (loc, arg0, arg1, NULL_TREE);

9544

9545

case BUILT_IN_STRSPN:

9546

return fold_builtin_strspn (loc, arg0, arg1);

9547

@@ -11809,8 +11830,9 @@

9548

COMPOUND_EXPR in the chain will contain the tree for the simplified

9549

form of the builtin function call. */

9550

9551

-static tree

9552

-fold_builtin_strcat (location_t loc ATTRIBUTE_UNUSED, tree dst, tree src)

9553

+tree

9554

+fold_builtin_strcat (location_t loc ATTRIBUTE_UNUSED, tree dst, tree src,

9555

+ tree len)

9556

{

9557

if (!validate_arg (dst, POINTER_TYPE)

9558

|| !validate_arg (src, POINTER_TYPE))

9559

@@ -11828,22 +11850,17 @@

9560

/* See if we can store by pieces into (dst + strlen(dst)). */

9561

tree newdst, call;

9562

tree strlen_fn = builtin_decl_implicit (BUILT_IN_STRLEN);

9563

- tree strcpy_fn = builtin_decl_implicit (BUILT_IN_STRCPY);

9564

+ tree memcpy_fn = builtin_decl_implicit (BUILT_IN_MEMCPY);

9565

9566

- if (!strlen_fn || !strcpy_fn)

9567

+ if (!strlen_fn || !memcpy_fn)

9568

return NULL_TREE;

9569

9570

- /* If we don't have a movstr we don't want to emit an strcpy

9571

- call. We have to do that if the length of the source string

9572

- isn't computable (in that case we can use memcpy probably

9573

- later expanding to a sequence of mov instructions). If we

9574

- have movstr instructions we can emit strcpy calls. */

9575

- if (!HAVE_movstr)

9576

- {

9577

- tree len = c_strlen (src, 1);

9578

- if (! len || TREE_SIDE_EFFECTS (len))

9579

- return NULL_TREE;

9580

- }

9581

+ /* If the length of the source string isn't computable don't

9582

+ split strcat into strlen and memcpy. */

9583

+ if (! len)

9584

+ len = c_strlen (src, 1);

9585

+ if (! len || TREE_SIDE_EFFECTS (len))

9586

+ return NULL_TREE;

9587

9588

/* Stabilize the argument list. */

9589

dst = builtin_save_expr (dst);

9590

@@ -11855,7 +11872,11 @@

9591

newdst = fold_build_pointer_plus_loc (loc, dst, newdst);

9592

newdst = builtin_save_expr (newdst);

9593

9594

- call = build_call_expr_loc (loc, strcpy_fn, 2, newdst, src);

9595

+ len = fold_convert_loc (loc, size_type_node, len);

9596

+ len = size_binop_loc (loc, PLUS_EXPR, len,

9597

+ build_int_cst (size_type_node, 1));

9598

+

9599

+ call = build_call_expr_loc (loc, memcpy_fn, 3, newdst, src, len);

9600

return build2 (COMPOUND_EXPR, TREE_TYPE (dst), call, dst);

9601

}

9602

return NULL_TREE;

9603

Index: gcc/gcc.c

9604

===================================================================

9605

--- a/src/gcc/gcc.c (.../tags/gcc_4_8_2_release)

9606

+++ b/src/gcc/gcc.c (.../branches/gcc-4_8-branch)

9607

@@ -5441,7 +5441,7 @@

9608

const char *save_suffix_subst;

9609

9610

int save_growing_size;

9611

- void *save_growing_value;

9612

+ void *save_growing_value = NULL;

9613

9614

sf = lookup_spec_function (func);

9615

if (sf == NULL)

9616

Index: gcc/fold-const.c

9617

===================================================================

9618

--- a/src/gcc/fold-const.c (.../tags/gcc_4_8_2_release)

9619

+++ b/src/gcc/fold-const.c (.../branches/gcc-4_8-branch)

9620

@@ -2664,10 +2664,11 @@

9621

case COMPONENT_REF:

9622

/* Handle operand 2 the same as for ARRAY_REF. Operand 0

9623

may be NULL when we're called to compare MEM_EXPRs. */

9624

- if (!OP_SAME_WITH_NULL (0))

9625

+ if (!OP_SAME_WITH_NULL (0)

9626

+ || !OP_SAME (1))

9627

return 0;

9628

flags &= ~OEP_CONSTANT_ADDRESS_OF;

9629

- return OP_SAME (1) && OP_SAME_WITH_NULL (2);

9630

+ return OP_SAME_WITH_NULL (2);

9631

9632

case BIT_FIELD_REF:

9633

if (!OP_SAME (0))

9634

@@ -4920,12 +4921,16 @@

9635

int in0_p, in1_p, in_p;

9636

tree low0, low1, low, high0, high1, high;

9637

bool strict_overflow_p = false;

9638

- tree lhs = make_range (op0, &in0_p, &low0, &high0, &strict_overflow_p);

9639

- tree rhs = make_range (op1, &in1_p, &low1, &high1, &strict_overflow_p);

9640

- tree tem;

9641

+ tree tem, lhs, rhs;

9642

const char * const warnmsg = G_("assuming signed overflow does not occur "

9643

"when simplifying range test");

9644

9645

+ if (!INTEGRAL_TYPE_P (type))

9646

+ return 0;

9647

+

9648

+ lhs = make_range (op0, &in0_p, &low0, &high0, &strict_overflow_p);

9649

+ rhs = make_range (op1, &in1_p, &low1, &high1, &strict_overflow_p);

9650

+

9651

/* If this is an OR operation, invert both sides; we will invert

9652

again at the end. */

9653

if (or_op)

9654

@@ -10927,6 +10932,13 @@

9655

fold_build2_loc (loc, MULT_EXPR, type,

9656

build_int_cst (type, 2) , arg1));

9657

9658

+ /* ((T) (X /[ex] C)) * C cancels out if the conversion is

9659

+ sign-changing only. */

9660

+ if (TREE_CODE (arg1) == INTEGER_CST

9661

+ && TREE_CODE (arg0) == EXACT_DIV_EXPR

9662

+ && operand_equal_p (arg1, TREE_OPERAND (arg0, 1), 0))

9663

+ return fold_convert_loc (loc, type, TREE_OPERAND (arg0, 0));

9664

+

9665

strict_overflow_p = false;

9666

if (TREE_CODE (arg1) == INTEGER_CST

9667

&& 0 != (tem = extract_muldiv (op0, arg1, code, NULL_TREE,

9668

@@ -16587,7 +16599,7 @@

9669

unsigned HOST_WIDE_INT indexi = offset * BITS_PER_UNIT;

9670

tree index = bitsize_int (indexi);

9671

9672

- if (offset/part_widthi <= TYPE_VECTOR_SUBPARTS (op00type))

9673

+ if (offset / part_widthi < TYPE_VECTOR_SUBPARTS (op00type))

9674

return fold_build3_loc (loc,

9675

BIT_FIELD_REF, type, op00,

9676

part_width, index);

9677

Index: gcc/objc/ChangeLog

9678

===================================================================

9679

--- a/src/gcc/objc/ChangeLog (.../tags/gcc_4_8_2_release)

9680

+++ b/src/gcc/objc/ChangeLog (.../branches/gcc-4_8-branch)

9681

@@ -1,3 +1,14 @@

9682

+2014-04-07 Dominique d'Humieres <dominiq@lps.ens.fr>

9683

+

9684

+ Backport from mainline

9685

+ 2013-09-14 Iain Sandoe <iains@gcc.gnu.org>

9686

+

9687

+ PR target/48094

9688

+ * objc-next-runtime-abi-01.c (generate_objc_image_info): Remove.

9689

+ (objc_generate_v1_next_metadata): Remove generation of ImageInfo.

9690

+ * objc-next-runtime-abi-02.c (generate_v2_objc_image_info): Remove.

9691

+ (objc_generate_v2_next_metadata): Remove generation of ImageInfo.

9692

+

9693

2013-10-16 Release Manager

9694

9695

* GCC 4.8.2 released.

9696

Index: gcc/objc/objc-next-runtime-abi-01.c

9697

===================================================================

9698

--- a/src/gcc/objc/objc-next-runtime-abi-01.c (.../tags/gcc_4_8_2_release)

9699

+++ b/src/gcc/objc/objc-next-runtime-abi-01.c (.../branches/gcc-4_8-branch)

9700

@@ -2332,37 +2332,7 @@

9701

return;

9702

}

9703

9704

-

9705

-/* The Fix-and-Continue functionality available in Mac OS X 10.3 and

9706

- later requires that ObjC translation units participating in F&C be

9707

- specially marked. The following routine accomplishes this. */

9708

-

9709

-/* static int _OBJC_IMAGE_INFO[2] = { 0, 1 }; */

9710

-

9711

static void

9712

-generate_objc_image_info (void)

9713

-{

9714

- tree decl;

9715

- int flags

9716

- = ((flag_replace_objc_classes && imp_count ? 1 : 0)

9717

- | (flag_objc_gc ? 2 : 0));

9718

- vec<constructor_elt, va_gc> *v = NULL;

9719

- tree array_type;

9720

-

9721

- array_type = build_sized_array_type (integer_type_node, 2);

9722

-

9723

- decl = start_var_decl (array_type, "_OBJC_ImageInfo");

9724

-

9725

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, integer_zero_node);

9726

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, build_int_cst (integer_type_node, flags));

9727

- /* The runtime wants this and refers to it in a manner hidden from the compiler.

9728

- So we must force the output. */

9729

- DECL_PRESERVE_P (decl) = 1;

9730

- OBJCMETA (decl, objc_meta, meta_info);

9731

- finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), v));

9732

-}

9733

-

9734

-static void

9735

objc_generate_v1_next_metadata (void)

9736

{

9737

struct imp_entry *impent;

9738

@@ -2412,9 +2382,6 @@

9739

attr = build_tree_list (objc_meta, meta_modules);

9740

build_module_descriptor (vers, attr);

9741

9742

- /* This conveys information on GC usage and zero-link. */

9743

- generate_objc_image_info ();

9744

-

9745

/* Dump the class references. This forces the appropriate classes

9746

to be linked into the executable image, preserving unix archive

9747

semantics. */

9748

Index: gcc/objc/objc-next-runtime-abi-02.c

9749

===================================================================

9750

--- a/src/gcc/objc/objc-next-runtime-abi-02.c (.../tags/gcc_4_8_2_release)

9751

+++ b/src/gcc/objc/objc-next-runtime-abi-02.c (.../branches/gcc-4_8-branch)

9752

@@ -3329,32 +3329,7 @@

9753

finish_var_decl (ref->decl, ref->offset);

9754

}

9755

9756

-/* static int _OBJC_IMAGE_INFO[2] = { 0, 16 | flags }; */

9757

-

9758

static void

9759

-generate_v2_objc_image_info (void)

9760

-{

9761

- tree decl, array_type;

9762

- vec<constructor_elt, va_gc> *v = NULL;

9763

- int flags =

9764

- ((flag_replace_objc_classes && imp_count ? 1 : 0)

9765

- | (flag_objc_gc ? 2 : 0));

9766

-

9767

- flags |= 16;

9768

-

9769

- array_type = build_sized_array_type (integer_type_node, 2);

9770

-

9771

- decl = start_var_decl (array_type, "_OBJC_ImageInfo");

9772

-

9773

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, integer_zero_node);

9774

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, build_int_cst (integer_type_node, flags));

9775

- /* The Runtime wants this. */

9776

- DECL_PRESERVE_P (decl) = 1;

9777

- OBJCMETA (decl, objc_meta, meta_info);

9778

- finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), v));

9779

-}

9780

-

9781

-static void

9782

objc_generate_v2_next_metadata (void)

9783

{

9784

struct imp_entry *impent;

9785

@@ -3405,9 +3380,6 @@

9786

build_v2_address_table (nonlazy_category_list, "_OBJC_NonLazyCategoryList$",

9787

meta_label_nonlazy_categorylist);

9788

9789

- /* This conveys information on GC usage and zero-link. */

9790

- generate_v2_objc_image_info ();

9791

-

9792

/* Generate catch objects for eh, if any are needed. */

9793

build_v2_eh_catch_objects ();

9794

9795

Index: gcc/reorg.c

9796

===================================================================

9797

--- a/src/gcc/reorg.c (.../tags/gcc_4_8_2_release)

9798

+++ b/src/gcc/reorg.c (.../branches/gcc-4_8-branch)

9799

@@ -1105,6 +1105,7 @@

9800

int used_annul = 0;

9801

int i;

9802

struct resources cc_set;

9803

+ bool *redundant;

9804

9805

/* We can't do anything if there are more delay slots in SEQ than we

9806

can handle, or if we don't know that it will be a taken branch.

9807

@@ -1145,6 +1146,7 @@

9808

return delay_list;

9809

#endif

9810

9811

+ redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));

9812

for (i = 1; i < XVECLEN (seq, 0); i++)

9813

{

9814

rtx trial = XVECEXP (seq, 0, i);

9815

@@ -1166,7 +1168,8 @@

9816

9817

/* If this insn was already done (usually in a previous delay slot),

9818

pretend we put it in our delay slot. */

9819

- if (redundant_insn (trial, insn, new_delay_list))

9820

+ redundant[i] = redundant_insn (trial, insn, new_delay_list);

9821

+ if (redundant[i])

9822

continue;

9823

9824

/* We will end up re-vectoring this branch, so compute flags

9825

@@ -1199,6 +1202,12 @@

9826

return delay_list;

9827

}

9828

9829

+ /* Record the effect of the instructions that were redundant and which

9830

+ we therefore decided not to copy. */

9831

+ for (i = 1; i < XVECLEN (seq, 0); i++)

9832

+ if (redundant[i])

9833

+ update_block (XVECEXP (seq, 0, i), insn);

9834

+

9835

/* Show the place to which we will be branching. */

9836

*pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));

9837

9838

@@ -1262,6 +1271,7 @@

9839

/* If this insn was already done, we don't need it. */

9840

if (redundant_insn (trial, insn, delay_list))

9841

{

9842

+ update_block (trial, insn);

9843

delete_from_delay_slot (trial);

9844

continue;

9845

}

9846

@@ -3266,6 +3276,7 @@

9847

to reprocess this insn. */

9848

if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))

9849

{

9850

+ update_block (XVECEXP (pat, 0, 1), insn);

9851

delete_from_delay_slot (XVECEXP (pat, 0, 1));

9852

next = prev_active_insn (next);

9853

continue;

9854

@@ -3385,6 +3396,7 @@

9855

&& redirect_with_delay_slots_safe_p (delay_insn, target_label,

9856

insn))

9857

{

9858

+ update_block (XVECEXP (PATTERN (trial), 0, 1), insn);

9859

reorg_redirect_jump (delay_insn, target_label);

9860

next = insn;

9861

continue;

9862

Index: gcc/tree-ssa-sccvn.c

9863

===================================================================

9864

--- a/src/gcc/tree-ssa-sccvn.c (.../tags/gcc_4_8_2_release)

9865

+++ b/src/gcc/tree-ssa-sccvn.c (.../branches/gcc-4_8-branch)

9866

@@ -660,7 +660,7 @@

9867

}

9868

9869

/* For non-calls, store the information that makes up the address. */

9870

-

9871

+ tree orig = ref;

9872

while (ref)

9873

{

9874

vn_reference_op_s temp;

9875

@@ -711,7 +711,15 @@

9876

.arshift (BITS_PER_UNIT == 8

9877

? 3 : exact_log2 (BITS_PER_UNIT),

9878

HOST_BITS_PER_DOUBLE_INT);

9879

- if (off.fits_shwi ())

9880

+ if (off.fits_shwi ()

9881

+ /* Probibit value-numbering zero offset components

9882

+ of addresses the same before the pass folding

9883

+ __builtin_object_size had a chance to run

9884

+ (checking cfun->after_inlining does the

9885

+ trick here). */

9886

+ && (TREE_CODE (orig) != ADDR_EXPR

9887

+ || !off.is_zero ()

9888

+ || cfun->after_inlining))

9889

temp.off = off.low;

9890

}

9891

}

9892

Index: gcc/ChangeLog

9893

===================================================================

9894

--- a/src/gcc/ChangeLog (.../tags/gcc_4_8_2_release)

9895

+++ b/src/gcc/ChangeLog (.../branches/gcc-4_8-branch)

9896

@@ -1,3 +1,5067 @@

9897

+2014-04-22 Michael Meissner <meissner@linux.vnet.ibm.com>

9898

+

9899

+ Back port from main line:

9900

+ 2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>

9901

+

9902

+ * config/rs6000/rs6000-builtins.def (VBPERMQ): Add vbpermq builtin

9903

+ for ISA 2.07.

9904

+

9905

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add

9906

+ vbpermq builtins.

9907

+

9908

+ * config/rs6000/altivec.md (UNSPEC_VBPERMQ): Add support for the

9909

+ vbpermq instruction.

9910

+ (altivec_vbpermq): Likewise.

9911

+

9912

+ PR target/60672

9913

+ * config/rs6000/altivec.h (vec_xxsldwi): Add missing define to

9914

+ enable use of xxsldwi and xxpermdi builtin functions.

9915

+ (vec_xxpermdi): Likewise.

9916

+

9917

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

9918

+ Document use of vec_xxsldwi and vec_xxpermdi builtins.

9919

+

9920

+2014-04-23 Uros Bizjak <ubizjak@gmail.com>

9921

+

9922

+ Backport from mainline

9923

+ 2014-04-21 Uros Bizjak <ubizjak@gmail.com>

9924

+

9925

+ PR target/60909

9926

+ * config/i386/i386.c (ix86_expand_builtin)

9927

+ <case IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Use temporary

9928

+ register for target RTX.

9929

+ <case IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Ditto.

9930

+

9931

+2014-04-23 Richard Biener <rguenther@suse.de>

9932

+

9933

+ Backport from mainline

9934

+ 2014-04-02 Richard Biener <rguenther@suse.de>

9935

+

9936

+ PR middle-end/60729

9937

+ * optabs.c (expand_abs_nojump): Honor flag_trapv only for

9938

+ MODE_INTs. Properly use negv_optab.

9939

+ (expand_abs): Likewise.

9940

+

9941

+ 2014-04-03 Richard Biener <rguenther@suse.de>

9942

+

9943

+ PR tree-optimization/60740

9944

+ * graphite-scop-detection.c (stmt_simple_for_scop_p): Iterate

9945

+ over all GIMPLE_COND operands.

9946

+

9947

+2014-04-23 Richard Biener <rguenther@suse.de>

9948

+

9949

+ PR middle-end/60635

9950

+ * gimplify.c (gimple_regimplify_operands): Update the

9951

+ re-gimplifed stmt.

9952

+

9953

+2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

9954

+

9955

+ Back port from the trunk, subversion id 209546.

9956

+

9957

+ 2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

9958

+

9959

+ PR target/60735

9960

+ * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):

9961

+ If mode is DDmode and TARGET_E500_DOUBLE allow move.

9962

+

9963

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some

9964

+ more debug information for E500 if -mdebug=reg.

9965

+

9966

+2014-04-18 Richard Henderson <rth@redhat.com>

9967

+

9968

+ * config/aarch64/aarch64.c (aarch64_register_move_cost): Pass a mode

9969

+ to GET_MODE_SIZE, not a reg_class_t.

9970

+

9971

+2014-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

9972

+

9973

+ * config/rs6000/vsx.md (vsx_xxmrghw_<mode>): Adjust for

9974

+ little-endian.

9975

+ (vsx_xxmrglw_<mode>): Likewise.

9976

+

9977

+2014-04-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

9978

+

9979

+ PR target/60839

9980

+ Revert the following patch

9981

+

9982

+ 2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

9983

+

9984

+ Back port mainline subversion id 209025.

9985

+ 2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>

9986

+

9987

+ PR target/60735

9988

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have

9989

+ software floating point or no floating point registers, do not

9990

+ allow any type in the FPRs. Eliminate a test for SPE SIMD types

9991

+ in GPRs that occurs after we tested for GPRs that would never be

9992

+ true.

9993

+

9994

+ * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):

9995

+ Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,

9996

+ since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,

9997

+ specifically allow DDmode, since that does not use the SPE SIMD

9998

+ instructions.

9999

+

10000

+2014-04-10 Vladimir Makarov <vmakarov@redhat.com>

10001

+

10002

+ PR rtl-optimization/60769

10003

+ * lra-constraints.c (simplify_operand_subreg): Force reload of

10004

+ paradoxical subreg if it is not in the class contents.

10005

+

10006

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

10007

+

10008

+ Backport from mainline

10009

+ 2014-03-12 Jakub Jelinek <jakub@redhat.com>

10010

+ Marc Glisse <marc.glisse@inria.fr>

10011

+

10012

+ PR tree-optimization/60502

10013

+ * tree-ssa-reassoc.c (eliminate_not_pairs): Use build_all_ones_cst

10014

+ instead of build_low_bits_mask.

10015

+

10016

+ 2013-06-13 Marc Glisse <marc.glisse@inria.fr>

10017

+

10018

+ * tree.c (build_all_ones_cst): New function.

10019

+ * tree.h (build_all_ones_cst): Declare it.

10020

+

10021

+ 2013-05-10 Marc Glisse <marc.glisse@inria.fr>

10022

+

10023

+ * tree.c (build_minus_one_cst): New function.

10024

+ * tree.h (build_minus_one_cst): Declare new function.

10025

+

10026

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

10027

+

10028

+ Backport from mainline

10029

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

10030

+

10031

+ PR target/60693

10032

+ * config/i386/i386.c (ix86_copy_addr_to_reg): Call copy_addr_to_reg

10033

+ also if addr has VOIDmode.

10034

+

10035

+ 2014-03-17 Jakub Jelinek <jakub@redhat.com>

10036

+

10037

+ PR target/60516

10038

+ * config/i386/i386.c (ix86_expand_epilogue): Adjust REG_CFA_ADJUST_CFA

10039

+ note creation for the 2010-08-31 changes.

10040

+

10041

+ 2014-03-06 Jakub Jelinek <jakub@redhat.com>

10042

+ Meador Inge <meadori@codesourcery.com>

10043

+

10044

+ PR target/58595

10045

+ * config/arm/arm.c (arm_tls_symbol_p): Remove.

10046

+ (arm_legitimize_address): Call legitimize_tls_address for any

10047

+ arm_tls_referenced_p expression, handle constant addend. Call it

10048

+ before testing for !TARGET_ARM.

10049

+ (thumb_legitimize_address): Don't handle arm_tls_symbol_p here.

10050

+

10051

+2014-04-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10052

+

10053

+ Backport from mainline r208750

10054

+ 2014-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10055

+

10056

+ * config/rs6000/rs6000.c (rs6000_expand_vector_set): Generate a

10057

+ pattern for vector nor instead of subtract from splat(-1).

10058

+ (altivec_expand_vec_perm_const_le): Likewise.

10059

+

10060

+ Backport from mainline r209235

10061

+ 2014-04-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10062

+

10063

+ * config/rs6000/rs6000.c (rs6000_expand_vector_set): Use vnand

10064

+ instead of vnor to exploit possible fusion opportunity in the

10065

+ future.

10066

+ (altivec_expand_vec_perm_const_le): Likewise.

10067

+

10068

+2014-04-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10069

+

10070

+ Revert following patch

10071

+ 2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10072

+

10073

+ Backport from mainline

10074

+ 2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10075

+

10076

+ * config/rs6000/sync.md (AINT mode_iterator): Move definition.

10077

+ (loadsync_<mode>): Change mode.

10078

+ (load_quadpti, store_quadpti): New.

10079

+ (atomic_load<mode>, atomic_store<mode>): Add support for TI mode.

10080

+ * config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

10081

+

10082

+2014-04-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10083

+

10084

+ Backport from mainline r202642

10085

+ 2013-09-17 Alan Modra <amodra@gmail.com>

10086

+

10087

+ PR target/57589

10088

+ * config/rs6000/driver-rs6000.c (elf_platform): Revert 2013-06-11

10089

+ patch (r199972).

10090

+

10091

+2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10092

+

10093

+ Backport from mainline

10094

+ 2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10095

+

10096

+ * config/rs6000/sync.md (AINT mode_iterator): Move definition.

10097

+ (loadsync_<mode>): Change mode.

10098

+ (load_quadpti, store_quadpti): New.

10099

+ (atomic_load<mode>, atomic_store<mode>): Add support for TI mode.

10100

+ * config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

10101

+

10102

+2014-04-07 Martin Jambor <mjambor@suse.cz>

10103

+

10104

+ PR ipa/60640

10105

+ * ipa-cp.c (propagate_constants_accross_call): Do not propagate

10106

+ accross thunks.

10107

+

10108

+2014-04-07 Dominique d'Humieres <dominiq@lps.ens.fr>

10109

+

10110

+ Backport from mainline

10111

+ 2013-09-14 Iain Sandoe <iains@gcc.gnu.org>

10112

+

10113

+ PR target/48094

10114

+ * config/darwin.c (darwin_objc2_section): Note if ObjC Metadata

10115

+ is seen.

10116

+ (darwin_objc1_section): Likewise.

10117

+ (darwin_file_end): Emit Image Info section when required.

10118

+

10119

+2014-04-05 Alan Modra <amodra@gmail.com>

10120

+

10121

+ Apply from mainline

10122

+ 2014-01-28 Alan Modra <amodra@gmail.com>

10123

+ * Makefile.in (BUILD_CPPFLAGS): Do not use ALL_CPPFLAGS.

10124

+ * configure.ac <recursive call for build != host>: Define

10125

+ GENERATOR_FILE. Comment. Use CXX_FOR_BUILD, CXXFLAGS_FOR_BUILD

10126

+ and LD_FOR_BUILD too.

10127

+ * configure: Regenerate.

10128

+

10129

+2014-04-04 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10130

+

10131

+ Backport from mainline r208895:

10132

+ 2014-03-28 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10133

+

10134

+ * config/rs6000/rs6000.c (fusion_gpr_load_p): Refuse optimization

10135

+ if it would clobber the stack pointer, even temporarily.

10136

+

10137

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10138

+

10139

+ Back port from main line:

10140

+ 2014-04-01 Michael Meissner <meissner@linux.vnet.ibm.com>

10141

+

10142

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

10143

+ Document vec_vgbbd.

10144

+

10145

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10146

+

10147

+ Back port mainline subversion id 209025.

10148

+ 2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>

10149

+

10150

+ PR target/60735

10151

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have

10152

+ software floating point or no floating point registers, do not

10153

+ allow any type in the FPRs. Eliminate a test for SPE SIMD types

10154

+ in GPRs that occurs after we tested for GPRs that would never be

10155

+ true.

10156

+

10157

+ * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):

10158

+ Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,

10159

+ since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,

10160

+ specifically allow DDmode, since that does not use the SPE SIMD

10161

+ instructions.

10162

+

10163

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10164

+

10165

+ Backport from mainline r205308

10166

+ 2013-11-23 David Edelsohn <dje.gcc@gmail.com>

10167

+

10168

+ * config/rs6000/rs6000.c (IN_NAMED_SECTION): New macro.

10169

+ (rs6000_xcoff_select_section): Place decls with stricter alignment

10170

+ into named sections.

10171

+ (rs6000_xcoff_unique_section): Allow unique sections for

10172

+ uninitialized data with strict alignment.

10173

+

10174

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10175

+

10176

+ Backport from mainline

10177

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10178

+

10179

+ * gcc/configure: Regenerate.

10180

+

10181

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10182

+

10183

+ Back port from trunk

10184

+ 2013-04-25 Alan Modra <amodra@gmail.com>

10185

+

10186

+ PR target/57052

10187

+ * config/rs6000/rs6000.md (rotlsi3_internal7): Rename to

10188

+ rotlsi3_internal7le and condition on !BYTES_BIG_ENDIAN.

10189

+ (rotlsi3_internal8be): New BYTES_BIG_ENDIAN insn.

10190

+ Repeat for many other rotate/shift and mask patterns using subregs.

10191

+ Name lshiftrt insns.

10192

+ (ashrdisi3_noppc64): Rename to ashrdisi3_noppc64be and condition

10193

+ on WORDS_BIG_ENDIAN.

10194

+

10195

+ 2013-06-07 Alan Modra <amodra@gmail.com>

10196

+

10197

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't

10198

+ override user -mfp-in-toc.

10199

+ (offsettable_ok_by_alignment): Consider just the current access

10200

+ rather than the whole object, unless BLKmode. Handle

10201

+ CONSTANT_POOL_ADDRESS_P constants that lack a decl too.

10202

+ (use_toc_relative_ref): Allow CONSTANT_POOL_ADDRESS_P constants

10203

+ for -mcmodel=medium.

10204

+ * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't

10205

+ override user -mfp-in-toc or -msum-in-toc. Default to

10206

+ -mno-fp-in-toc for -mcmodel=medium.

10207

+

10208

+ 2013-06-18 Alan Modra <amodra@gmail.com>

10209

+

10210

+ * config/rs6000/rs6000.h (enum data_align): New.

10211

+ (LOCAL_ALIGNMENT, DATA_ALIGNMENT): Use rs6000_data_alignment.

10212

+ (DATA_ABI_ALIGNMENT): Define.

10213

+ (CONSTANT_ALIGNMENT): Correct comment.

10214

+ * config/rs6000/rs6000-protos.h (rs6000_data_alignment): Declare.

10215

+ * config/rs6000/rs6000.c (rs6000_data_alignment): New function.

10216

+

10217

+ 2013-07-11 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10218

+

10219

+ * config/rs6000/rs6000.md (""*tls_gd_low<TLSmode:tls_abi_suffix>"):

10220

+ Require GOT register as additional operand in UNSPEC.

10221

+ ("*tls_ld_low<TLSmode:tls_abi_suffix>"): Likewise.

10222

+ ("*tls_got_dtprel_low<TLSmode:tls_abi_suffix>"): Likewise.

10223

+ ("*tls_got_tprel_low<TLSmode:tls_abi_suffix>"): Likewise.

10224

+ ("*tls_gd<TLSmode:tls_abi_suffix>"): Update splitter.

10225

+ ("*tls_ld<TLSmode:tls_abi_suffix>"): Likewise.

10226

+ ("tls_got_dtprel_<TLSmode:tls_abi_suffix>"): Likewise.

10227

+ ("tls_got_tprel_<TLSmode:tls_abi_suffix>"): Likewise.

10228

+

10229

+ 2014-01-23 Pat Haugen <pthaugen@us.ibm.com>

10230

+

10231

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't

10232

+ force flag_ira_loop_pressure if set via command line.

10233

+

10234

+ 2014-02-06 Alan Modra <amodra@gmail.com>

10235

+

10236

+ PR target/60032

10237

+ * config/rs6000/rs6000.c (rs6000_secondary_memory_needed_mode): Only

10238

+ change SDmode to DDmode when lra_in_progress.

10239

+

10240

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10241

+

10242

+ V1TImode Support

10243

+ Back port from trunk

10244

+ 2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com>

10245

+

10246

+ * config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.

10247

+ (VEC_M): Likewise.

10248

+ (VEC_N): Likewise.

10249

+ (VEC_R): Likewise.

10250

+ (VEC_base): Likewise.

10251

+ (mov<MODE>, VEC_M modes): If we are loading TImode into VSX

10252

+ registers, we need to swap double words in little endian mode.

10253

+

10254

+ * config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode

10255

+ to be a container mode for 128-bit integer operations added in ISA

10256

+ 2.07. Unlike TImode and PTImode, the preferred register set is

10257

+ the Altivec/VMX registers for the 128-bit operations.

10258

+

10259

+ * config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add

10260

+ declarations.

10261

+ (rs6000_split_128bit_ok_p): Likewise.

10262

+

10263

+ * config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support

10264

+ macros for creating ISA 2.07 normal and overloaded builtin

10265

+ functions with 3 arguments.

10266

+ (BU_P8V_OVERLOAD_3): Likewise.

10267

+ (VPERM_1T): Add support for V1TImode in 128-bit vector operations

10268

+ for use as overloaded functions.

10269

+ (VPERM_1TI_UNS): Likewise.

10270

+ (VSEL_1TI): Likewise.

10271

+ (VSEL_1TI_UNS): Likewise.

10272

+ (ST_INTERNAL_1ti): Likewise.

10273

+ (LD_INTERNAL_1ti): Likewise.

10274

+ (XXSEL_1TI): Likewise.

10275

+ (XXSEL_1TI_UNS): Likewise.

10276

+ (VPERM_1TI): Likewise.

10277

+ (VPERM_1TI_UNS): Likewise.

10278

+ (XXPERMDI_1TI): Likewise.

10279

+ (SET_1TI): Likewise.

10280

+ (LXVD2X_V1TI): Likewise.

10281

+ (STXVD2X_V1TI): Likewise.

10282

+ (VEC_INIT_V1TI): Likewise.

10283

+ (VEC_SET_V1TI): Likewise.

10284

+ (VEC_EXT_V1TI): Likewise.

10285

+ (EQV_V1TI): Likewise.

10286

+ (NAND_V1TI): Likewise.

10287

+ (ORC_V1TI): Likewise.

10288

+ (VADDCUQ): Add support for 128-bit integer arithmetic instructions

10289

+ added in ISA 2.07. Add both normal 'altivec' builtins, and the

10290

+ overloaded builtin.

10291

+ (VADDUQM): Likewise.

10292

+ (VSUBCUQ): Likewise.

10293

+ (VADDEUQM): Likewise.

10294

+ (VADDECUQ): Likewise.

10295

+ (VSUBEUQM): Likewise.

10296

+ (VSUBECUQ): Likewise.

10297

+

10298

+ * config/rs6000/rs6000-c.c (__int128_type): New static to hold

10299

+ __int128_t and __uint128_t types.

10300

+ (__uint128_type): Likewise.

10301

+ (altivec_categorize_keyword): Add support for vector __int128_t,

10302

+ vector __uint128_t, vector __int128, and vector unsigned __int128

10303

+ as a container type for TImode operations that need to be done in

10304

+ VSX/Altivec registers.

10305

+ (rs6000_macro_to_expand): Likewise.

10306

+ (altivec_overloaded_builtins): Add ISA 2.07 overloaded functions

10307

+ to support 128-bit integer instructions vaddcuq, vadduqm,

10308

+ vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.

10309

+ (altivec_resolve_overloaded_builtin): Add support for V1TImode.

10310

+

10311

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support

10312

+ for V1TImode, and set up preferences to use VSX/Altivec

10313

+ registers. Setup VSX reload handlers.

10314

+ (rs6000_debug_reg_global): Likewise.

10315

+ (rs6000_init_hard_regno_mode_ok): Likewise.

10316

+ (rs6000_preferred_simd_mode): Likewise.

10317

+ (vspltis_constant): Do not allow V1TImode as easy altivec

10318

+ constants.

10319

+ (easy_altivec_constant): Likewise.

10320

+ (output_vec_const_move): Likewise.

10321

+ (rs6000_expand_vector_set): Convert V1TImode set and extract to

10322

+ simple move.

10323

+ (rs6000_expand_vector_extract): Likewise.

10324

+ (reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg

10325

+ addressing.

10326

+ (rs6000_const_vec): Add support for V1TImode.

10327

+ (rs6000_emit_le_vsx_load): Swap double words when loading or

10328

+ storing TImode/V1TImode.

10329

+ (rs6000_emit_le_vsx_store): Likewise.

10330

+ (rs6000_emit_le_vsx_move): Likewise.

10331

+ (rs6000_emit_move): Add support for V1TImode.

10332

+ (altivec_expand_ld_builtin): Likewise.

10333

+ (altivec_expand_st_builtin): Likewise.

10334

+ (altivec_expand_vec_init_builtin): Likewise.

10335

+ (altivec_expand_builtin): Likewise.

10336

+ (rs6000_init_builtins): Add support for V1TImode type. Add

10337

+ support for ISA 2.07 128-bit integer builtins. Define type names

10338

+ for the VSX/Altivec vector types.

10339

+ (altivec_init_builtins): Add support for overloaded vector

10340

+ functions with V1TImode type.

10341

+ (rs6000_preferred_reload_class): Prefer Altivec registers for

10342

+ V1TImode.

10343

+ (rs6000_move_128bit_ok_p): Move 128-bit move/split validation to

10344

+ external function.

10345

+ (rs6000_split_128bit_ok_p): Likewise.

10346

+ (rs6000_handle_altivec_attribute): Create V1TImode from vector

10347

+ __int128_t and vector __uint128_t.

10348

+

10349

+ * config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators

10350

+ and mode attributes.

10351

+ (VSX_M): Likewise.

10352

+ (VSX_M2): Likewise.

10353

+ (VSm): Likewise.

10354

+ (VSs): Likewise.

10355

+ (VSr): Likewise.

10356

+ (VSv): Likewise.

10357

+ (VS_scalar): Likewise.

10358

+ (VS_double): Likewise.

10359

+ (vsx_set_v1ti): New builtin function to create V1TImode from

10360

+ TImode.

10361

+

10362

+ * config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say

10363

+ whether we support the ISA 2.07 128-bit integer arithmetic

10364

+ instructions.

10365

+ (ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.

10366

+ (enum rs6000_builtin_type_index): Add fields to hold V1TImode

10367

+ and TImode types for use with the builtin functions.

10368

+ (V1TI_type_node): Likewise.

10369

+ (unsigned_V1TI_type_node): Likewise.

10370

+ (intTI_type_internal_node): Likewise.

10371

+ (uintTI_type_internal_node): Likewise.

10372

+

10373

+ * config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA

10374

+ 2.07 128-bit builtin functions.

10375

+ (UNSPEC_VADDEUQM): Likewise.

10376

+ (UNSPEC_VADDECUQ): Likewise.

10377

+ (UNSPEC_VSUBCUQ): Likewise.

10378

+ (UNSPEC_VSUBEUQM): Likewise.

10379

+ (UNSPEC_VSUBECUQ): Likewise.

10380

+ (VM): Add V1TImode to vector mode iterators.

10381

+ (VM2): Likewise.

10382

+ (VI_unit): Likewise.

10383

+ (altivec_vadduqm): Add ISA 2.07 128-bit binary builtins.

10384

+ (altivec_vaddcuq): Likewise.

10385

+ (altivec_vsubuqm): Likewise.

10386

+ (altivec_vsubcuq): Likewise.

10387

+ (altivec_vaddeuqm): Likewise.

10388

+ (altivec_vaddecuq): Likewise.

10389

+ (altivec_vsubeuqm): Likewise.

10390

+ (altivec_vsubecuq): Likewise.

10391

+

10392

+ * config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector

10393

+ mode iterators.

10394

+ (BOOL_128): Likewise.

10395

+ (BOOL_REGS_OUTPUT): Likewise.

10396

+ (BOOL_REGS_OP1): Likewise.

10397

+ (BOOL_REGS_OP2): Likewise.

10398

+ (BOOL_REGS_UNARY): Likewise.

10399

+ (BOOL_REGS_AND_CR0): Likewise.

10400

+

10401

+ * config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07

10402

+ 128-bit integer builtin support.

10403

+ (vec_vadduqm): Likewise.

10404

+ (vec_vaddecuq): Likewise.

10405

+ (vec_vaddeuqm): Likewise.

10406

+ (vec_vsubecuq): Likewise.

10407

+ (vec_vsubeuqm): Likewise.

10408

+ (vec_vsubcuq): Likewise.

10409

+ (vec_vsubuqm): Likewise.

10410

+

10411

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

10412

+ Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,

10413

+ vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding

10414

+ 128-bit integer add/subtract to ISA 2.07.

10415

+

10416

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10417

+

10418

+ Apply mainline r207798

10419

+ 2014-02-26 Alan Modra <amodra@gmail.com>

10420

+ PR target/58675

10421

+ PR target/57935

10422

+ * config/rs6000/rs6000.c (rs6000_secondary_reload_inner): Use

10423

+ find_replacement on parts of insn rtl that might be reloaded.

10424

+

10425

+ Backport from mainline r208287

10426

+ 2014-03-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10427

+

10428

+ * config/rs6000/rs6000.c (rs6000_preferred_reload_class): Disallow

10429

+ reload of PLUS rtx's outside of GENERAL_REGS or BASE_REGS; relax

10430

+ constraint on constants to permit them being loaded into

10431

+ GENERAL_REGS or BASE_REGS.

10432

+

10433

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10434

+

10435

+ Backport from mainline r207699.

10436

+ 2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>

10437

+

10438

+ PR target/60137

10439

+ * config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter

10440

+ for VSX/Altivec vectors that land in GPR registers.

10441

+

10442

+ Backport from mainline r207808.

10443

+ 2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>

10444

+

10445

+ PR target/60203

10446

+ * config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints.

10447

+ (mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves

10448

+ into 64-bit and 32-bit moves. On 64-bit moves, add support for

10449

+ using direct move instructions on ISA 2.07. Also adjust

10450

+ instruction length for 64-bit.

10451

+ (mov<mode>_64bit, TFmode/TDmode): Likewise.

10452

+ (mov<mode>_32bit, TFmode/TDmode): Likewise.

10453

+

10454

+ Backport from mainline r207868.

10455

+ 2014-02-18 Michael Meissner <meissner@linux.vnet.ibm.com>

10456

+

10457

+ PR target/60203

10458

+ * config/rs6000/rs6000.md (mov<mode>_64bit, TF/TDmode moves):

10459

+ Split 64-bit moves into 2 patterns. Do not allow the use of

10460

+ direct move for TDmode in little endian, since the decimal value

10461

+ has little endian bytes within a word, but the 64-bit pieces are

10462

+ ordered in a big endian fashion, and normal subreg's of TDmode are

10463

+ not allowed.

10464

+ (mov<mode>_64bit_dm): Likewise.

10465

+ (movtd_64bit_nodm): Likewise.

10466

+

10467

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10468

+

10469

+ Backport from mainline r207658

10470

+ 2014-02-06 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10471

+

10472

+ * config/rs6000/sysv4.h (ENDIAN_SELECT): Do not attempt to enforce

10473

+ big-endian mode for -mcall-aixdesc, -mcall-freebsd, -mcall-netbsd,

10474

+ -mcall-openbsd, or -mcall-linux.

10475

+ (CC1_ENDIAN_BIG_SPEC): Remove.

10476

+ (CC1_ENDIAN_LITTLE_SPEC): Remove.

10477

+ (CC1_ENDIAN_DEFAULT_SPEC): Remove.

10478

+ (CC1_SPEC): Remove (always empty) %cc1_endian_... spec.

10479

+ (SUBTARGET_EXTRA_SPECS): Remove %cc1_endian_big, %cc1_endian_little,

10480

+ and %cc1_endian_default.

10481

+ * config/rs6000/sysv4le.h (CC1_ENDIAN_DEFAULT_SPEC): Remove.

10482

+

10483

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10484

+

10485

+ Little Endian Vector API Support

10486

+ Backport from mainline r206443

10487

+ 2014-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10488

+

10489

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove

10490

+ two duplicate entries.

10491

+

10492

+ Backport from mainline r206494

10493

+ 2014-01-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10494

+

10495

+ * doc/invoke.texi: Add -maltivec={be,le} options, and document

10496

+ default element-order behavior for -maltivec.

10497

+ * config/rs6000/rs6000.opt: Add -maltivec={be,le} options.

10498

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Ensure

10499

+ that -maltivec={le,be} implies -maltivec; disallow -maltivec=le

10500

+ when targeting big endian, at least for now.

10501

+ * config/rs6000/rs6000.h: Add #define of VECTOR_ELT_ORDER_BIG.

10502

+

10503

+ Backport from mainline r206541

10504

+ 2014-01-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10505

+

10506

+ * config/rs6000/rs6000-builtin.def: Fix pasto for VPKSDUS.

10507

+

10508

+ Backport from mainline r206590

10509

+ 2014-01-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10510

+

10511

+ * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):

10512

+ Implement -maltivec=be for vec_insert and vec_extract.

10513

+

10514

+ Backport from mainline r206641

10515

+ 2014-01-15 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

10516

+

10517

+ * config/rs6000/altivec.md (mulv8hi3): Explicitly generate vmulesh

10518

+ and vmulosh rather than call gen_vec_widen_smult_*.

10519

+ (vec_widen_umult_even_v16qi): Test VECTOR_ELT_ORDER_BIG rather

10520

+ than BYTES_BIG_ENDIAN to determine use of even or odd instruction.

10521

+ (vec_widen_smult_even_v16qi): Likewise.

10522

+ (vec_widen_umult_even_v8hi): Likewise.

10523

+ (vec_widen_smult_even_v8hi): Likewise.

10524

+ (vec_widen_umult_odd_v16qi): Likewise.

10525

+ (vec_widen_smult_odd_v16qi): Likewise.

10526

+ (vec_widen_umult_odd_v8hi): Likewise.

10527

+ (vec_widen_smult_odd_v8hi): Likewise.

10528

+ (vec_widen_umult_hi_v16qi): Explicitly generate vmuleub and

10529

+ vmuloub rather than call gen_vec_widen_umult_*.

10530

+ (vec_widen_umult_lo_v16qi): Likewise.

10531

+ (vec_widen_smult_hi_v16qi): Explicitly generate vmulesb and

10532

+ vmulosb rather than call gen_vec_widen_smult_*.

10533

+ (vec_widen_smult_lo_v16qi): Likewise.

10534

+ (vec_widen_umult_hi_v8hi): Explicitly generate vmuleuh and vmulouh

10535

+ rather than call gen_vec_widen_umult_*.

10536

+ (vec_widen_umult_lo_v8hi): Likewise.

10537

+ (vec_widen_smult_hi_v8hi): Explicitly gnerate vmulesh and vmulosh

10538

+ rather than call gen_vec_widen_smult_*.

10539

+ (vec_widen_smult_lo_v8hi): Likewise.

10540

+

10541

+ Backport from mainline r207062

10542

+ 2014-01-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10543

+

10544

+ * config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Remove

10545

+ correction for little endian...

10546

+ * config/rs6000/vsx.md (vsx_xxpermdi2_<mode>_1): ...and move it to

10547

+ here.

10548

+

10549

+ Backport from mainline r207262

10550

+ 2014-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10551

+

10552

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Use

10553

+ CODE_FOR_altivec_vmrg*_direct rather than CODE_FOR_altivec_vmrg*.

10554

+ * config/rs6000/vsx.md (vsx_mergel_<mode>): Adjust for

10555

+ -maltivec=be with LE targets.

10556

+ (vsx_mergeh_<mode>): Likewise.

10557

+ * config/rs6000/altivec.md (UNSPEC_VMRG[HL]_DIRECT): New

10558

+ unspecs.

10559

+ (mulv8hi3): Use gen_altivec_vmrg[hl]w_direct.

10560

+ (altivec_vmrghb): Replace with define_expand and new

10561

+ *altivec_vmrghb_internal insn; adjust for -maltivec=be with LE

10562

+ targets.

10563

+ (altivec_vmrghb_direct): New define_insn.

10564

+ (altivec_vmrghh): Replace with define_expand and new

10565

+ *altivec_vmrghh_internal insn; adjust for -maltivec=be with LE

10566

+ targets.

10567

+ (altivec_vmrghh_direct): New define_insn.

10568

+ (altivec_vmrghw): Replace with define_expand and new

10569

+ *altivec_vmrghw_internal insn; adjust for -maltivec=be with LE

10570

+ targets.

10571

+ (altivec_vmrghw_direct): New define_insn.

10572

+ (*altivec_vmrghsf): Adjust for endianness.

10573

+ (altivec_vmrglb): Replace with define_expand and new

10574

+ *altivec_vmrglb_internal insn; adjust for -maltivec=be with LE

10575

+ targets.

10576

+ (altivec_vmrglb_direct): New define_insn.

10577

+ (altivec_vmrglh): Replace with define_expand and new

10578

+ *altivec_vmrglh_internal insn; adjust for -maltivec=be with LE

10579

+ targets.

10580

+ (altivec_vmrglh_direct): New define_insn.

10581

+ (altivec_vmrglw): Replace with define_expand and new

10582

+ *altivec_vmrglw_internal insn; adjust for -maltivec=be with LE

10583

+ targets.

10584

+ (altivec_vmrglw_direct): New define_insn.

10585

+ (*altivec_vmrglsf): Adjust for endianness.

10586

+ (vec_widen_umult_hi_v16qi): Use gen_altivec_vmrghh_direct.

10587

+ (vec_widen_umult_lo_v16qi): Use gen_altivec_vmrglh_direct.

10588

+ (vec_widen_smult_hi_v16qi): Use gen_altivec_vmrghh_direct.

10589

+ (vec_widen_smult_lo_v16qi): Use gen_altivec_vmrglh_direct.

10590

+ (vec_widen_umult_hi_v8hi): Use gen_altivec_vmrghw_direct.

10591

+ (vec_widen_umult_lo_v8hi): Use gen_altivec_vmrglw_direct.

10592

+ (vec_widen_smult_hi_v8hi): Use gen_altivec_vmrghw_direct.

10593

+ (vec_widen_smult_lo_v8hi): Use gen_altivec_vmrglw_direct.

10594

+

10595

+ Backport from mainline r207318

10596

+ 2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10597

+

10598

+ * gcc/config/rs6000/rs6000.c (rs6000_expand_vector_init): Use

10599

+ gen_vsx_xxspltw_v4sf_direct instead of gen_vsx_xxspltw_v4sf;

10600

+ remove element index adjustment for endian (now handled in vsx.md

10601

+ and altivec.md).

10602

+ (altivec_expand_vec_perm_const): Use

10603

+ gen_altivec_vsplt[bhw]_direct instead of gen_altivec_vsplt[bhw].

10604

+ * gcc/config/rs6000/vsx.md (UNSPEC_VSX_XXSPLTW): New unspec.

10605

+ (vsx_xxspltw_<mode>): Adjust element index for little endian.

10606

+ * gcc/config/rs6000/altivec.md (altivec_vspltb): Divide into a

10607

+ define_expand and a new define_insn *altivec_vspltb_internal;

10608

+ adjust for -maltivec=be on a little endian target.

10609

+ (altivec_vspltb_direct): New.

10610

+ (altivec_vsplth): Divide into a define_expand and a new

10611

+ define_insn *altivec_vsplth_internal; adjust for -maltivec=be on a

10612

+ little endian target.

10613

+ (altivec_vsplth_direct): New.

10614

+ (altivec_vspltw): Divide into a define_expand and a new

10615

+ define_insn *altivec_vspltw_internal; adjust for -maltivec=be on a

10616

+ little endian target.

10617

+ (altivec_vspltw_direct): New.

10618

+ (altivec_vspltsf): Divide into a define_expand and a new

10619

+ define_insn *altivec_vspltsf_internal; adjust for -maltivec=be on

10620

+ a little endian target.

10621

+

10622

+ Backport from mainline r207326

10623

+ 2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10624

+

10625

+ * config/rs6000/rs6000.c (rs6000_expand_vector_init): Remove

10626

+ unused variable "field".

10627

+ * config/rs6000/vsx.md (vsx_mergel_<mode>): Add missing DONE.

10628

+ (vsx_mergeh_<mode>): Likewise.

10629

+ * config/rs6000/altivec.md (altivec_vmrghb): Likewise.

10630

+ (altivec_vmrghh): Likewise.

10631

+ (altivec_vmrghw): Likewise.

10632

+ (altivec_vmrglb): Likewise.

10633

+ (altivec_vmrglh): Likewise.

10634

+ (altivec_vmrglw): Likewise.

10635

+ (altivec_vspltb): Add missing uses.

10636

+ (altivec_vsplth): Likewise.

10637

+ (altivec_vspltw): Likewise.

10638

+ (altivec_vspltsf): Likewise.

10639

+

10640

+ Backport from mainline r207414

10641

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10642

+

10643

+ * config/rs6000/altivec.md (UNSPEC_VSUMSWS_DIRECT): New unspec.

10644

+ (altivec_vsumsws): Add handling for -maltivec=be with a little

10645

+ endian target.

10646

+ (altivec_vsumsws_direct): New.

10647

+ (reduc_splus_<mode>): Call gen_altivec_vsumsws_direct instead of

10648

+ gen_altivec_vsumsws.

10649

+

10650

+ Backport from mainline r207415

10651

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10652

+

10653

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_le): Generalize

10654

+ for vector types other than V16QImode.

10655

+ * config/rs6000/altivec.md (altivec_vperm_<mode>): Change to a

10656

+ define_expand, and call altivec_expand_vec_perm_le when producing

10657

+ code with little endian element order.

10658

+ (*altivec_vperm_<mode>_internal): New insn having previous

10659

+ behavior of altivec_vperm_<mode>.

10660

+ (altivec_vperm_<mode>_uns): Change to a define_expand, and call

10661

+ altivec_expand_vec_perm_le when producing code with little endian

10662

+ element order.

10663

+ (*altivec_vperm_<mode>_uns_internal): New insn having previous

10664

+ behavior of altivec_vperm_<mode>_uns.

10665

+

10666

+ Backport from mainline r207520

10667

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10668

+

10669

+ * altivec.md (UNSPEC_VPACK_UNS_UNS_MOD_DIRECT): New unspec.

10670

+ (UNSPEC_VUNPACK_HI_SIGN_DIRECT): Likewise.

10671

+ (UNSPEC_VUNPACK_LO_SIGN_DIRECT): Likewise.

10672

+ (mulv8hi3): Use gen_altivec_vpkuwum_direct instead of

10673

+ gen_altivec_vpkuwum.

10674

+ (altivec_vpkpx): Test for VECTOR_ELT_ORDER_BIG instead of for

10675

+ BYTES_BIG_ENDIAN.

10676

+ (altivec_vpks<VI_char>ss): Likewise.

10677

+ (altivec_vpks<VI_char>us): Likewise.

10678

+ (altivec_vpku<VI_char>us): Likewise.

10679

+ (altivec_vpku<VI_char>um): Likewise.

10680

+ (altivec_vpku<VI_char>um_direct): New (copy of

10681

+ altivec_vpku<VI_char>um that still relies on BYTES_BIG_ENDIAN, for

10682

+ internal use).

10683

+ (altivec_vupkhs<VU_char>): Emit vupkls* instead of vupkhs* when

10684

+ target is little endian and -maltivec=be is not specified.

10685

+ (*altivec_vupkhs<VU_char>_direct): New (copy of

10686

+ altivec_vupkhs<VU_char> that always emits vupkhs*, for internal

10687

+ use).

10688

+ (altivec_vupkls<VU_char>): Emit vupkhs* instead of vupkls* when

10689

+ target is little endian and -maltivec=be is not specified.

10690

+ (*altivec_vupkls<VU_char>_direct): New (copy of

10691

+ altivec_vupkls<VU_char> that always emits vupkls*, for internal

10692

+ use).

10693

+ (altivec_vupkhpx): Emit vupklpx instead of vupkhpx when target is

10694

+ little endian and -maltivec=be is not specified.

10695

+ (altivec_vupklpx): Emit vupkhpx instead of vupklpx when target is

10696

+ little endian and -maltivec=be is not specified.

10697

+

10698

+ Backport from mainline r207521

10699

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10700

+

10701

+ * config/rs6000/altivec.md (altivec_vsum2sws): Adjust code

10702

+ generation for -maltivec=be.

10703

+ (altivec_vsumsws): Simplify redundant test.

10704

+

10705

+ Backport from mainline r207525

10706

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10707

+

10708

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Change

10709

+ CODE_FOR_altivec_vpku[hw]um to

10710

+ CODE_FOR_altivec_vpku[hw]um_direct.

10711

+ * config/rs6000/altivec.md (vec_unpacks_hi_<VP_small_lc>): Change

10712

+ UNSPEC_VUNPACK_HI_SIGN to UNSPEC_VUNPACK_HI_SIGN_DIRECT.

10713

+ (vec_unpacks_lo_<VP_small_lc>): Change UNSPEC_VUNPACK_LO_SIGN to

10714

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT.

10715

+

10716

+ Backport from mainline r207814.

10717

+ 2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10718

+

10719

+ * config/rs6000/vsx.md (vsx_xxpermdi_<mode>): Handle little

10720

+ endian targets.

10721

+

10722

+ Backport from mainline r207815.

10723

+ 2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10724

+

10725

+ * config/rs6000/altivec.md (p8_vmrgew): Handle little endian

10726

+ targets.

10727

+ (p8_vmrgow): Likewise.

10728

+

10729

+ Backport from mainline r207919.

10730

+ 2014-02-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10731

+

10732

+ * config/rs6000/rs6000.c (vspltis_constant): Fix most significant

10733

+ bit of zero.

10734

+

10735

+ Backport from mainline 208019

10736

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10737

+

10738

+ * config/rs6000/altivec.md (altivec_lvxl): Rename as

10739

+ *altivec_lvxl_<mode>_internal and use VM2 iterator instead of

10740

+ V4SI.

10741

+ (altivec_lvxl_<mode>): New define_expand incorporating

10742

+ -maltivec=be semantics where needed.

10743

+ (altivec_lvx): Rename as *altivec_lvx_<mode>_internal.

10744

+ (altivec_lvx_<mode>): New define_expand incorporating -maltivec=be

10745

+ semantics where needed.

10746

+ (altivec_stvx): Rename as *altivec_stvx_<mode>_internal.

10747

+ (altivec_stvx_<mode>): New define_expand incorporating

10748

+ -maltivec=be semantics where needed.

10749

+ (altivec_stvxl): Rename as *altivec_stvxl_<mode>_internal and use

10750

+ VM2 iterator instead of V4SI.

10751

+ (altivec_stvxl_<mode>): New define_expand incorporating

10752

+ -maltivec=be semantics where needed.

10753

+ * config/rs6000/rs6000-builtin.def: Add new built-in definitions

10754

+ LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI, LVXL_V16QI,

10755

+ LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI, LVX_V8HI, LVX_V16QI,

10756

+ STVX_V2DF, STVX_V2DI, STVX_V4SF, STVX_V4SI, STVX_V8HI, STVX_V16QI,

10757

+ STVXL_V2DF, STVXL_V2DI, STVXL_V4SF, STVXL_V4SI, STVXL_V8HI,

10758

+ STVXL_V16QI.

10759

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Replace

10760

+ ALTIVEC_BUILTIN_LVX with ALTIVEC_BUILTIN_LVX_<MODE> throughout;

10761

+ similarly for ALTIVEC_BUILTIN_LVXL, ALTIVEC_BUILTIN_STVX, and

10762

+ ALTIVEC_BUILTIN_STVXL.

10763

+ * config/rs6000/rs6000-protos.h (altivec_expand_lvx_be): New

10764

+ prototype.

10765

+ (altivec_expand_stvx_be): Likewise.

10766

+ * config/rs6000/rs6000.c (swap_selector_for_mode): New function.

10767

+ (altivec_expand_lvx_be): Likewise.

10768

+ (altivec_expand_stvx_be): Likewise.

10769

+ (altivec_expand_builtin): Add cases for

10770

+ ALTIVEC_BUILTIN_STVX_<MODE>, ALTIVEC_BUILTIN_STVXL_<MODE>,

10771

+ ALTIVEC_BUILTIN_LVXL_<MODE>, and ALTIVEC_BUILTIN_LVX_<MODE>.

10772

+ (altivec_init_builtins): Add definitions for

10773

+ __builtin_altivec_lvxl_<mode>, __builtin_altivec_lvx_<mode>,

10774

+ __builtin_altivec_stvx_<mode>, and

10775

+ __builtin_altivec_stvxl_<mode>.

10776

+

10777

+ Backport from mainline 208021

10778

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10779

+

10780

+ * config/rs6000/altivec.md (altivec_vsumsws): Replace second

10781

+ vspltw with vsldoi.

10782

+ (reduc_uplus_v16qi): Use gen_altivec_vsumsws_direct instead of

10783

+ gen_altivec_vsumsws.

10784

+

10785

+ Backport from mainline 208049

10786

+ 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10787

+

10788

+ * config/rs6000/altivec.md (altivec_lve<VI_char>x): Replace

10789

+ define_insn with define_expand and new define_insn

10790

+ *altivec_lve<VI_char>x_internal.

10791

+ (altivec_stve<VI_char>x): Replace define_insn with define_expand

10792

+ and new define_insn *altivec_stve<VI_char>x_internal.

10793

+ * config/rs6000/rs6000-protos.h (altivec_expand_stvex_be): New

10794

+ prototype.

10795

+ * config/rs6000/rs6000.c (altivec_expand_lvx_be): Document use by

10796

+ lve*x built-ins.

10797

+ (altivec_expand_stvex_be): New function.

10798

+

10799

+ Backport from mainline

10800

+ 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10801

+ * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Relax assert

10802

+ to permit subregs.

10803

+

10804

+ Backport from mainline

10805

+ 2014-02-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10806

+ * config/rs6000/vector.md (*vector_unordered<mode>): Change split

10807

+ to use canonical form for nor<mode>3.

10808

+

10809

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10810

+

10811

+ Backport from mainline

10812

+ 2014-02-04 Michael Meissner <meissner@linux.vnet.ibm.com>

10813

+

10814

+ * config/rs6000/rs6000.opt (-mlra): Add switch to enable the LRA

10815

+ register allocator.

10816

+

10817

+ * config/rs6000/rs6000.c (TARGET_LRA_P): Add support for -mlra to

10818

+ enable the LRA register allocator. Back port the changes from the

10819

+ trunk to enable LRA.

10820

+ (rs6000_legitimate_offset_address_p): Likewise.

10821

+ (legitimate_lo_sum_address_p): Likewise.

10822

+ (use_toc_relative_ref): Likewise.

10823

+ (rs6000_legitimate_address_p): Likewise.

10824

+ (rs6000_emit_move): Likewise.

10825

+ (rs6000_secondary_memory_needed_mode): Likewise.

10826

+ (rs6000_alloc_sdmode_stack_slot): Likewise.

10827

+ (rs6000_lra_p): Likewise.

10828

+

10829

+ * config/rs6000/sync.md (load_lockedti): Copy TI/PTI variables by

10830

+ 64-bit parts to force the register allocator to allocate even/odd

10831

+ register pairs for the quad word atomic instructions.

10832

+ (store_conditionalti): Likewise.

10833

+

10834

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10835

+

10836

+ Back port from mainline

10837

+ 2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com>

10838

+

10839

+ PR target/59909

10840

+ * doc/invoke.texi (RS/6000 and PowerPC Options): Document

10841

+ -mquad-memory-atomic. Update -mquad-memory documentation to say

10842

+ it is only used for non-atomic loads/stores.

10843

+

10844

+ * config/rs6000/predicates.md (quad_int_reg_operand): Allow either

10845

+ -mquad-memory or -mquad-memory-atomic switches.

10846

+

10847

+ * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Add

10848

+ -mquad-memory-atomic to ISA 2.07 support.

10849

+

10850

+ * config/rs6000/rs6000.opt (-mquad-memory-atomic): Add new switch

10851

+ to separate support of normal quad word memory operations (ldq,

10852

+ stq) from the atomic quad word memory operations.

10853

+

10854

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Add

10855

+ support to separate non-atomic quad word operations from atomic

10856

+ quad word operations. Disable non-atomic quad word operations in

10857

+ little endian mode so that we don't have to swap words after the

10858

+ load and before the store.

10859

+ (quad_load_store_p): Add comment about atomic quad word support.

10860

+ (rs6000_opt_masks): Add -mquad-memory-atomic to the list of

10861

+ options printed with -mdebug=reg.

10862

+

10863

+ * config/rs6000/rs6000.h (TARGET_SYNC_TI): Use

10864

+ -mquad-memory-atomic as the test for whether we have quad word

10865

+ atomic instructions.

10866

+ (TARGET_SYNC_HI_QI): If either -mquad-memory-atomic,

10867

+ -mquad-memory, or -mp8-vector are used, allow byte/half-word

10868

+ atomic operations.

10869

+

10870

+ * config/rs6000/sync.md (load_lockedti): Insure that the address

10871

+ is a proper indexed or indirect address for the lqarx instruction.

10872

+ On little endian systems, swap the hi/lo registers after the lqarx

10873

+ instruction.

10874

+ (load_lockedpti): Use indexed_or_indirect_operand predicate to

10875

+ insure the address is valid for the lqarx instruction.

10876

+ (store_conditionalti): Insure that the address is a proper indexed

10877

+ or indirect address for the stqcrx. instruction. On little endian

10878

+ systems, swap the hi/lo registers before doing the stqcrx.

10879

+ instruction.

10880

+ (store_conditionalpti): Use indexed_or_indirect_operand predicate to

10881

+ insure the address is valid for the stqcrx. instruction.

10882

+

10883

+ * gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):

10884

+ Define __QUAD_MEMORY__ and __QUAD_MEMORY_ATOMIC__ based on what

10885

+ type of quad memory support is available.

10886

+

10887

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10888

+

10889

+ Apply mainline r202190, powerpc64le multilibs and multiarch dir

10890

+ 2013-09-03 Alan Modra <amodra@gmail.com>

10891

+

10892

+ * config.gcc (powerpc*-*-linux*): Add support for little-endian

10893

+ multilibs to big-endian target and vice versa.

10894

+ * config/rs6000/t-linux64: Use := assignment on all vars.

10895

+ (MULTILIB_EXTRA_OPTS): Remove fPIC.

10896

+ (MULTILIB_OSDIRNAMES): Specify using mapping from multilib_options.

10897

+ * config/rs6000/t-linux64le: New file.

10898

+ * config/rs6000/t-linux64bele: New file.

10899

+ * config/rs6000/t-linux64lebe: New file.

10900

+

10901

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10902

+

10903

+ Back port from mainline

10904

+ 2014-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>

10905

+

10906

+ PR target/59844

10907

+ * config/rs6000/rs6000.md (reload_vsx_from_gprsf): Add little

10908

+ endian support, remove tests for WORDS_BIG_ENDIAN.

10909

+ (p8_mfvsrd_3_<mode>): Likewise.

10910

+ (reload_gpr_from_vsx<mode>): Likewise.

10911

+ (reload_gpr_from_vsxsf): Likewise.

10912

+ (p8_mfvsrd_4_disf): Likewise.

10913

+

10914

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10915

+

10916

+ Backport from mainline

10917

+ 2013-04-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10918

+

10919

+ PR target/56843

10920

+ * config/rs6000/rs6000.c (rs6000_emit_swdiv_high_precision): Remove.

10921

+ (rs6000_emit_swdiv_low_precision): Remove.

10922

+ (rs6000_emit_swdiv): Rewrite to handle between one and four

10923

+ iterations of Newton-Raphson generally; modify required number of

10924

+ iterations for some cases.

10925

+ * config/rs6000/rs6000.h (RS6000_RECIP_HIGH_PRECISION_P): Remove.

10926

+

10927

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10928

+

10929

+ Backport from mainline

10930

+ 2013-08-19 Peter Bergner <bergner@vnet.ibm.com>

10931

+ Jakub Jelinek <jakub@redhat.com>

10932

+

10933

+ * builtins.def (BUILT_IN_FABSD32): New DFP ABS builtin.

10934

+ (BUILT_IN_FABSD64): Likewise.

10935

+ (BUILT_IN_FABSD128): Likewise.

10936

+ * builtins.c (expand_builtin): Add support for

10937

+ new DFP ABS builtins.

10938

+ (fold_builtin_1): Likewise.

10939

+ * config/rs6000/dfp.md

10940

+ (*abstd2_fpr): Handle non-overlapping destination

10941

+ and source operands.

10942

+ (*nabstd2_fpr): Likewise.

10943

+

10944

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10945

+

10946

+ Apply mainline r205060.

10947

+ 2013-11-20 Alan Modra <amodra@gmail.com>

10948

+ * config/rs6000/sysv4.h (CC1_ENDIAN_LITTLE_SPEC): Define as empty.

10949

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Default

10950

+ to strict alignment on older processors when little-endian.

10951

+ * config/rs6000/linux64.h (PROCESSOR_DEFAULT64): Default to power8

10952

+ for ELFv2.

10953

+

10954

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10955

+

10956

+ POWER ELFv2 ABI Support

10957

+ Backport from mainline r204842:

10958

+

10959

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10960

+

10961

+ * doc/invoke.texi (-mabi=elfv1, -mabi=elfv2): Document.

10962

+

10963

+ Backport from mainline r204809:

10964

+

10965

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10966

+

10967

+ * config/rs6000/sysv4le.h (LINUX64_DEFAULT_ABI_ELFv2): Define.

10968

+

10969

+ Backport from mainline r204808:

10970

+

10971

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10972

+ Alan Modra <amodra@gmail.com>

10973

+

10974

+ * config/rs6000/rs6000.h (RS6000_SAVE_AREA): Handle ABI_ELFv2.

10975

+ (RS6000_SAVE_TOC): Remove.

10976

+ (RS6000_TOC_SAVE_SLOT): New macro.

10977

+ * config/rs6000/rs6000.c (rs6000_parm_offset): New function.

10978

+ (rs6000_parm_start): Use it.

10979

+ (rs6000_function_arg_advance_1): Likewise.

10980

+ (rs6000_emit_prologue): Use RS6000_TOC_SAVE_SLOT.

10981

+ (rs6000_emit_epilogue): Likewise.

10982

+ (rs6000_call_aix): Likewise.

10983

+ (rs6000_output_function_prologue): Do not save/restore r11

10984

+ around calling _mcount for ABI_ELFv2.

10985

+

10986

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10987

+ Alan Modra <amodra@gmail.com>

10988

+

10989

+ * config/rs6000/rs6000-protos.h (rs6000_reg_parm_stack_space):

10990

+ Add prototype.

10991

+ * config/rs6000/rs6000.h (RS6000_REG_SAVE): Remove.

10992

+ (REG_PARM_STACK_SPACE): Call rs6000_reg_parm_stack_space.

10993

+ * config/rs6000/rs6000.c (rs6000_parm_needs_stack): New function.

10994

+ (rs6000_function_parms_need_stack): Likewise.

10995

+ (rs6000_reg_parm_stack_space): Likewise.

10996

+ (rs6000_function_arg): Do not replace BLKmode by Pmode when

10997

+ returning a register argument.

10998

+

10999

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11000

+ Michael Gschwind <mkg@us.ibm.com>

11001

+

11002

+ * config/rs6000/rs6000.h (FP_ARG_MAX_RETURN): New macro.

11003

+ (ALTIVEC_ARG_MAX_RETURN): Likewise.

11004

+ (FUNCTION_VALUE_REGNO_P): Use them.

11005

+ * config/rs6000/rs6000.c (TARGET_RETURN_IN_MSB): Define.

11006

+ (rs6000_return_in_msb): New function.

11007

+ (rs6000_return_in_memory): Handle ELFv2 homogeneous aggregates.

11008

+ Handle aggregates of up to 16 bytes for ELFv2.

11009

+ (rs6000_function_value): Handle ELFv2 homogeneous aggregates.

11010

+

11011

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11012

+ Michael Gschwind <mkg@us.ibm.com>

11013

+

11014

+ * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.

11015

+ * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.

11016

+ (rs6000_discover_homogeneous_aggregate): Likewise.

11017

+ (rs6000_function_arg_boundary): Handle homogeneous aggregates.

11018

+ (rs6000_function_arg_advance_1): Likewise.

11019

+ (rs6000_function_arg): Likewise.

11020

+ (rs6000_arg_partial_bytes): Likewise.

11021

+ (rs6000_psave_function_arg): Handle BLKmode arguments.

11022

+

11023

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11024

+ Michael Gschwind <mkg@us.ibm.com>

11025

+

11026

+ * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.

11027

+ * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.

11028

+ (rs6000_discover_homogeneous_aggregate): Likewise.

11029

+ (rs6000_function_arg_boundary): Handle homogeneous aggregates.

11030

+ (rs6000_function_arg_advance_1): Likewise.

11031

+ (rs6000_function_arg): Likewise.

11032

+ (rs6000_arg_partial_bytes): Likewise.

11033

+ (rs6000_psave_function_arg): Handle BLKmode arguments.

11034

+

11035

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11036

+

11037

+ * config/rs6000/rs6000.c (machine_function): New member

11038

+ r2_setup_needed.

11039

+ (rs6000_emit_prologue): Set r2_setup_needed if necessary.

11040

+ (rs6000_output_mi_thunk): Set r2_setup_needed.

11041

+ (rs6000_output_function_prologue): Output global entry point

11042

+ prologue and local entry point marker if needed for ABI_ELFv2.

11043

+ Output -mprofile-kernel code here.

11044

+ (output_function_profiler): Do not output -mprofile-kernel

11045

+ code here; moved to rs6000_output_function_prologue.

11046

+ (rs6000_file_start): Output ".abiversion 2" for ABI_ELFv2.

11047

+

11048

+ (rs6000_emit_move): Do not handle dot symbols for ABI_ELFv2.

11049

+ (rs6000_output_function_entry): Likewise.

11050

+ (rs6000_assemble_integer): Likewise.

11051

+ (rs6000_elf_encode_section_info): Likewise.

11052

+ (rs6000_elf_declare_function_name): Do not create dot symbols

11053

+ or .opd section for ABI_ELFv2.

11054

+

11055

+ (rs6000_trampoline_size): Update for ABI_ELFv2 trampolines.

11056

+ (rs6000_trampoline_init): Likewise.

11057

+ (rs6000_elf_file_end): Call file_end_indicate_exec_stack

11058

+ for ABI_ELFv2.

11059

+

11060

+ (rs6000_call_aix): Handle ELFv2 indirect calls. Do not check

11061

+ for function descriptors in ABI_ELFv2.

11062

+

11063

+ * config/rs6000/rs6000.md ("*call_indirect_aix<mode>"): Support

11064

+ on ABI_AIX only, not ABI_ELFv2.

11065

+ ("*call_value_indirect_aix<mode>"): Likewise.

11066

+ ("*call_indirect_elfv2<mode>"): New pattern.

11067

+ ("*call_value_indirect_elfv2<mode>"): Likewise.

11068

+

11069

+ * config/rs6000/predicates.md ("symbol_ref_operand"): Do not

11070

+ check for function descriptors in ABI_ELFv2.

11071

+ ("current_file_function_operand"): Likewise.

11072

+

11073

+ * config/rs6000/ppc-asm.h [__powerpc64__ && _CALL_ELF == 2]:

11074

+ (toc): Undefine.

11075

+ (FUNC_NAME): Define ELFv2 variant.

11076

+ (JUMP_TARGET): Likewise.

11077

+ (FUNC_START): Likewise.

11078

+ (HIDDEN_FUNC): Likewise.

11079

+ (FUNC_END): Likeiwse.

11080

+

11081

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11082

+

11083

+ * config.gcc [powerpc*-*-* | rs6000-*-*]: Support --with-abi=elfv1

11084

+ and --with-abi=elfv2.

11085

+ * config/rs6000/option-defaults.h (OPTION_DEFAULT_SPECS): Add "abi".

11086

+ * config/rs6000/rs6000.opt (mabi=elfv1): New option.

11087

+ (mabi=elfv2): Likewise.

11088

+ * config/rs6000/rs6000-opts.h (enum rs6000_abi): Add ABI_ELFv2.

11089

+ * config/rs6000/linux64.h (DEFAULT_ABI): Do not hard-code to AIX_ABI

11090

+ if !RS6000_BI_ARCH.

11091

+ (ELFv2_ABI_CHECK): New macro.

11092

+ (SUBSUBTARGET_OVERRIDE_OPTIONS): Use it to decide whether to set

11093

+ rs6000_current_abi to ABI_AIX or ABI_ELFv2.

11094

+ (GLIBC_DYNAMIC_LINKER64): Support ELFv2 ld.so version.

11095

+ * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Predefine

11096

+ _CALL_ELF and __STRUCT_PARM_ALIGN__ if appropriate.

11097

+

11098

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Handle ABI_ELFv2.

11099

+ (debug_stack_info): Likewise.

11100

+ (rs6000_file_start): Treat ABI_ELFv2 the same as ABI_AIX.

11101

+ (rs6000_legitimize_tls_address): Likewise.

11102

+ (rs6000_conditional_register_usage): Likewise.

11103

+ (rs6000_emit_move): Likewise.

11104

+ (init_cumulative_args): Likewise.

11105

+ (rs6000_function_arg_advance_1): Likewise.

11106

+ (rs6000_function_arg): Likewise.

11107

+ (rs6000_arg_partial_bytes): Likewise.

11108

+ (rs6000_output_function_entry): Likewise.

11109

+ (rs6000_assemble_integer): Likewise.

11110

+ (rs6000_savres_strategy): Likewise.

11111

+ (rs6000_stack_info): Likewise.

11112

+ (rs6000_function_ok_for_sibcall): Likewise.

11113

+ (rs6000_emit_load_toc_table): Likewise.

11114

+ (rs6000_savres_routine_name): Likewise.

11115

+ (ptr_regno_for_savres): Likewise.

11116

+ (rs6000_emit_prologue): Likewise.

11117

+ (rs6000_emit_epilogue): Likewise.

11118

+ (rs6000_output_function_epilogue): Likewise.

11119

+ (output_profile_hook): Likewise.

11120

+ (output_function_profiler): Likewise.

11121

+ (rs6000_trampoline_size): Likewise.

11122

+ (rs6000_trampoline_init): Likewise.

11123

+ (rs6000_elf_output_toc_section_asm_op): Likewise.

11124

+ (rs6000_elf_encode_section_info): Likewise.

11125

+ (rs6000_elf_reloc_rw_mask): Likewise.

11126

+ (rs6000_elf_declare_function_name): Likewise.

11127

+ (rs6000_function_arg_boundary): Treat ABI_ELFv2 the same as ABI_AIX,

11128

+ except that rs6000_compat_align_parm is always assumed false.

11129

+ (rs6000_gimplify_va_arg): Likewise.

11130

+ (rs6000_call_aix): Update comment.

11131

+ (rs6000_sibcall_aix): Likewise.

11132

+ * config/rs6000/rs6000.md ("tls_gd_aix<TLSmode:tls_abi_suffix>"):

11133

+ Treat ABI_ELFv2 the same as ABI_AIX.

11134

+ ("*tls_gd_call_aix<TLSmode:tls_abi_suffix>"): Likewise.

11135

+ ("tls_ld_aix<TLSmode:tls_abi_suffix>"): Likewise.

11136

+ ("*tls_ld_call_aix<TLSmode:tls_abi_suffix>"): Likewise.

11137

+ ("load_toc_aix_si"): Likewise.

11138

+ ("load_toc_aix_di"): Likewise.

11139

+ ("call"): Likewise.

11140

+ ("call_value"): Likewise.

11141

+ ("*call_local_aix<mode>"): Likewise.

11142

+ ("*call_value_local_aix<mode>"): Likewise.

11143

+ ("*call_nonlocal_aix<mode>"): Likewise.

11144

+ ("*call_value_nonlocal_aix<mode>"): Likewise.

11145

+ ("*call_indirect_aix<mode>"): Likewise.

11146

+ ("*call_value_indirect_aix<mode>"): Likewise.

11147

+ ("sibcall"): Likewise.

11148

+ ("sibcall_value"): Likewise.

11149

+ ("*sibcall_aix<mode>"): Likewise.

11150

+ ("*sibcall_value_aix<mode>"): Likewise.

11151

+ * config/rs6000/predicates.md ("symbol_ref_operand"): Likewise.

11152

+ ("current_file_function_operand"): Likewise.

11153

+

11154

+ Backport from mainline r204807:

11155

+

11156

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11157

+

11158

+ * config/rs6000/rs6000.c (rs6000_arg_partial_bytes): Simplify logic

11159

+ by making use of the fact that for vector / floating point arguments

11160

+ passed both in VRs/FPRs and in the fixed parameter area, the partial

11161

+ bytes mechanism is in fact not used.

11162

+

11163

+ Backport from mainline r204806:

11164

+

11165

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11166

+

11167

+ * config/rs6000/rs6000.c (rs6000_psave_function_arg): New function.

11168

+ (rs6000_finish_function_arg): Likewise.

11169

+ (rs6000_function_arg): Use rs6000_psave_function_arg and

11170

+ rs6000_finish_function_arg to handle both vector and floating

11171

+ point arguments that are also passed in GPRs / the stack.

11172

+

11173

+ Backport from mainline r204805:

11174

+

11175

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11176

+

11177

+ * config/rs6000/rs6000.c (USE_FP_FOR_ARG_P): Remove TYPE argument.

11178

+ (USE_ALTIVEC_FOR_ARG_P): Likewise.

11179

+ (rs6000_darwin64_record_arg_advance_recurse): Update uses.

11180

+ (rs6000_function_arg_advance_1):Likewise.

11181

+ (rs6000_darwin64_record_arg_recurse): Likewise.

11182

+ (rs6000_function_arg): Likewise.

11183

+ (rs6000_arg_partial_bytes): Likewise.

11184

+

11185

+ Backport from mainline r204804:

11186

+

11187

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11188

+

11189

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Replace

11190

+ "DEFAULT_ABI != ABI_AIX" test by testing for ABI_V4 or ABI_DARWIN.

11191

+ (rs6000_savres_strategy): Likewise.

11192

+ (rs6000_return_addr): Likewise.

11193

+ (rs6000_emit_load_toc_table): Replace "DEFAULT_ABI != ABI_AIX" by

11194

+ testing for ABI_V4 (since ABI_DARWIN is impossible here).

11195

+ (rs6000_emit_prologue): Likewise.

11196

+ (legitimate_lo_sum_address_p): Simplify DEFAULT_ABI test.

11197

+ (rs6000_elf_declare_function_name): Remove duplicated test.

11198

+ * config/rs6000/rs6000.md ("load_toc_v4_PIC_1"): Explicitly test

11199

+ for ABI_V4 (instead of "DEFAULT_ABI != ABI_AIX" test).

11200

+ ("load_toc_v4_PIC_1_normal"): Likewise.

11201

+ ("load_toc_v4_PIC_1_476"): Likewise.

11202

+ ("load_toc_v4_PIC_1b"): Likewise.

11203

+ ("load_toc_v4_PIC_1b_normal"): Likewise.

11204

+ ("load_toc_v4_PIC_1b_476"): Likewise.

11205

+ ("load_toc_v4_PIC_2"): Likewise.

11206

+ ("load_toc_v4_PIC_3b"): Likewise.

11207

+ ("load_toc_v4_PIC_3c"): Likewise.

11208

+ * config/rs6000/rs6000.h (RS6000_REG_SAVE): Simplify DEFAULT_ABI test.

11209

+ (RS6000_SAVE_AREA): Likewise.

11210

+ (FP_ARG_MAX_REG): Likewise.

11211

+ (RETURN_ADDRESS_OFFSET): Likewise.

11212

+ * config/rs6000/sysv.h (TARGET_TOC): Test for ABI_V4 instead

11213

+ of ABI_AIX.

11214

+ (SUBTARGET_OVERRIDE_OPTIONS): Likewise.

11215

+ (MINIMAL_TOC_SECTION_ASM_OP): Likewise.

11216

+

11217

+ Backport from mainline r204803:

11218

+

11219

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11220

+

11221

+ * config/rs6000/rs6000.c (rs6000_call_indirect_aix): Rename to ...

11222

+ (rs6000_call_aix): ... this. Handle both direct and indirect calls.

11223

+ Create call insn directly instead of via various gen_... routines.

11224

+ Mention special registers used by the call in CALL_INSN_FUNCTION_USAGE.

11225

+ (rs6000_sibcall_aix): New function.

11226

+ * config/rs6000/rs6000.md (TOC_SAVE_OFFSET_32BIT): Remove.

11227

+ (TOC_SAVE_OFFSET_64BIT): Likewise.

11228

+ (AIX_FUNC_DESC_TOC_32BIT): Likewise.

11229

+ (AIX_FUNC_DESC_TOC_64BIT): Likewise.

11230

+ (AIX_FUNC_DESC_SC_32BIT): Likewise.

11231

+ (AIX_FUNC_DESC_SC_64BIT): Likewise.

11232

+ ("call" expander): Call rs6000_call_aix.

11233

+ ("call_value" expander): Likewise.

11234

+ ("call_indirect_aix<ptrsize>"): Replace this pattern ...

11235

+ ("call_indirect_aix<ptrsize>_nor11"): ... and this pattern ...

11236

+ ("*call_indirect_aix<mode>"): ... by this insn pattern.

11237

+ ("call_value_indirect_aix<ptrsize>"): Replace this pattern ...

11238

+ ("call_value_indirect_aix<ptrsize>_nor11"): ... and this pattern ...

11239

+ ("*call_value_indirect_aix<mode>"): ... by this insn pattern.

11240

+ ("*call_nonlocal_aix32", "*call_nonlocal_aix64"): Replace by ...

11241

+ ("*call_nonlocal_aix<mode>"): ... this pattern.

11242

+ ("*call_value_nonlocal_aix32", "*call_value_nonlocal_aix64"): Replace

11243

+ ("*call_value_nonlocal_aix<mode>"): ... by this pattern.

11244

+ ("*call_local_aix<mode>"): New insn pattern.

11245

+ ("*call_value_local_aix<mode>"): Likewise.

11246

+ ("sibcall" expander): Call rs6000_sibcall_aix.

11247

+ ("sibcall_value" expander): Likewise. Move earlier in file.

11248

+ ("*sibcall_nonlocal_aix<mode>"): Replace by ...

11249

+ ("*sibcall_aix<mode>"): ... this pattern.

11250

+ ("*sibcall_value_nonlocal_aix<mode>"): Replace by ...

11251

+ ("*sibcall_value_aix<mode>"): ... this pattern.

11252

+ * config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): Remove.

11253

+ (rs6000_call_aix): Add prototype.

11254

+ (rs6000_sibcall_aix): Likewise.

11255

+

11256

+ Backport from mainline r204799:

11257

+

11258

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11259

+

11260

+ * config/rs6000/rs6000.c (rs6000_emit_prologue): Do not place a

11261

+ RTX_FRAME_RELATED_P marker on the UNSPEC_MOVESI_FROM_CR insn.

11262

+ Instead, add USEs of all modified call-saved CR fields to the

11263

+ insn storing the result to the stack slot, and provide an

11264

+ appropriate REG_FRAME_RELATED_EXPR for that insn.

11265

+ * config/rs6000/rs6000.md ("*crsave"): New insn pattern.

11266

+ * config/rs6000/predicates.md ("crsave_operation"): New predicate.

11267

+

11268

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11269

+

11270

+ ELFv2 ABI Call Support

11271

+ Backport from mainline r204798:

11272

+

11273

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11274

+ Alan Modra <amodra@gmail.com>

11275

+

11276

+ * function.c (assign_parms): Use all.reg_parm_stack_space instead

11277

+ of re-evaluating REG_PARM_STACK_SPACE target macro.

11278

+ (locate_and_pad_parm): New parameter REG_PARM_STACK_SPACE. Use it

11279

+ instead of evaluating target macro REG_PARM_STACK_SPACE every time.

11280

+ (assign_parm_find_entry_rtl): Update call.

11281

+ * calls.c (initialize_argument_information): Update call.

11282

+ (emit_library_call_value_1): Likewise.

11283

+ * expr.h (locate_and_pad_parm): Update prototype.

11284

+

11285

+ Backport from mainline r204797:

11286

+

11287

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11288

+

11289

+ * calls.c (store_unaligned_arguments_into_pseudos): Skip PARALLEL

11290

+ arguments.

11291

+

11292

+ Backport from mainline r197003:

11293

+

11294

+ 2013-03-23 Eric Botcazou <ebotcazou@adacore.com>

11295

+

11296

+ * calls.c (expand_call): Add missing guard to code handling return

11297

+ of non-BLKmode structures in MSB.

11298

+ * function.c (expand_function_end): Likewise.

11299

+

11300

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11301

+

11302

+ Backport from mainline r201750.

11303

+ Note: Default setting of -mcompat-align-parm inverted!

11304

+

11305

+ 2013-08-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11306

+

11307

+ PR target/57949

11308

+ * doc/invoke.texi: Add documentation of mcompat-align-parm

11309

+ option.

11310

+ * config/rs6000/rs6000.opt: Add mcompat-align-parm option.

11311

+ * config/rs6000/rs6000.c (rs6000_function_arg_boundary): For AIX

11312

+ and Linux, correct BLKmode alignment when 128-bit alignment is

11313

+ required and compatibility flag is not set.

11314

+ (rs6000_gimplify_va_arg): For AIX and Linux, honor specified

11315

+ alignment for zero-size arguments when compatibility flag is not

11316

+ set.

11317

+

11318

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11319

+

11320

+ Little Endian Vector Support

11321

+ Backport from mainline r205333

11322

+ 2013-11-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11323

+

11324

+ * config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Correct

11325

+ for little endian.

11326

+

11327

+ Backport from mainline r205241

11328

+ 2013-11-21 Bill Schmidt <wschmidt@vnet.ibm.com>

11329

+

11330

+ * config/rs6000/vector.md (vec_pack_trunc_v2df): Revert previous

11331

+ little endian change.

11332

+ (vec_pack_sfix_trunc_v2df): Likewise.

11333

+ (vec_pack_ufix_trunc_v2df): Likewise.

11334

+ * config/rs6000/rs6000.c (rs6000_expand_interleave): Correct

11335

+ double checking of endianness.

11336

+

11337

+ Backport from mainline r205146

11338

+ 2013-11-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11339

+

11340

+ * config/rs6000/vsx.md (vsx_set_<mode>): Adjust for little endian.

11341

+ (vsx_extract_<mode>): Likewise.

11342

+ (*vsx_extract_<mode>_one_le): New LE variant on

11343

+ *vsx_extract_<mode>_zero.

11344

+ (vsx_extract_v4sf): Adjust for little endian.

11345

+

11346

+ Backport from mainline r205080

11347

+ 2013-11-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11348

+

11349

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Adjust

11350

+ V16QI vector splat case for little endian.

11351

+

11352

+ Backport from mainline r205045:

11353

+

11354

+ 2013-11-19 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11355

+

11356

+ * config/rs6000/vector.md ("mov<mode>"): Do not call

11357

+ rs6000_emit_le_vsx_move to move into or out of GPRs.

11358

+ * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Assert

11359

+ source and destination are not GPR hard regs.

11360

+

11361

+ Backport from mainline r204920

11362

+ 2011-11-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11363

+

11364

+ * config/rs6000/rs6000.c (rs6000_frame_related): Add split_reg

11365

+ parameter and use it in REG_FRAME_RELATED_EXPR note.

11366

+ (emit_frame_save): Call rs6000_frame_related with extra NULL_RTX

11367

+ parameter.

11368

+ (rs6000_emit_prologue): Likewise, but for little endian VSX

11369

+ stores, pass the source register of the store instead.

11370

+

11371

+ Backport from mainline r204862

11372

+ 2013-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11373

+

11374

+ * config/rs6000/altivec.md (UNSPEC_VPERM_X, UNSPEC_VPERM_UNS_X):

11375

+ Remove.

11376

+ (altivec_vperm_<mode>): Revert earlier little endian change.

11377

+ (*altivec_vperm_<mode>_internal): Remove.

11378

+ (altivec_vperm_<mode>_uns): Revert earlier little endian change.

11379

+ (*altivec_vperm_<mode>_uns_internal): Remove.

11380

+ * config/rs6000/vector.md (vec_realign_load_<mode>): Revise

11381

+ commentary.

11382

+

11383

+ Backport from mainline r204441

11384

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11385

+

11386

+ * config/rs6000/rs6000.c (rs6000_option_override_internal):

11387

+ Remove restriction against use of VSX instructions when generating

11388

+ code for little endian mode.

11389

+

11390

+ Backport from mainline r204440

11391

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11392

+

11393

+ * config/rs6000/altivec.md (mulv4si3): Ensure we generate vmulouh

11394

+ for both big and little endian.

11395

+ (mulv8hi3): Swap input operands for merge high and merge low

11396

+ instructions for little endian.

11397

+

11398

+ Backport from mainline r204439

11399

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11400

+

11401

+ * config/rs6000/altivec.md (vec_widen_umult_even_v16qi): Change

11402

+ define_insn to define_expand that uses even patterns for big

11403

+ endian and odd patterns for little endian.

11404

+ (vec_widen_smult_even_v16qi): Likewise.

11405

+ (vec_widen_umult_even_v8hi): Likewise.

11406

+ (vec_widen_smult_even_v8hi): Likewise.

11407

+ (vec_widen_umult_odd_v16qi): Likewise.

11408

+ (vec_widen_smult_odd_v16qi): Likewise.

11409

+ (vec_widen_umult_odd_v8hi): Likewise.

11410

+ (vec_widen_smult_odd_v8hi): Likewise.

11411

+ (altivec_vmuleub): New define_insn.

11412

+ (altivec_vmuloub): Likewise.

11413

+ (altivec_vmulesb): Likewise.

11414

+ (altivec_vmulosb): Likewise.

11415

+ (altivec_vmuleuh): Likewise.

11416

+ (altivec_vmulouh): Likewise.

11417

+ (altivec_vmulesh): Likewise.

11418

+ (altivec_vmulosh): Likewise.

11419

+

11420

+ Backport from mainline r204395

11421

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11422

+

11423

+ * config/rs6000/vector.md (vec_pack_sfix_trunc_v2df): Adjust for

11424

+ little endian.

11425

+ (vec_pack_ufix_trunc_v2df): Likewise.

11426

+

11427

+ Backport from mainline r204363

11428

+ 2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11429

+

11430

+ * config/rs6000/altivec.md (vec_widen_umult_hi_v16qi): Swap

11431

+ arguments to merge instruction for little endian.

11432

+ (vec_widen_umult_lo_v16qi): Likewise.

11433

+ (vec_widen_smult_hi_v16qi): Likewise.

11434

+ (vec_widen_smult_lo_v16qi): Likewise.

11435

+ (vec_widen_umult_hi_v8hi): Likewise.

11436

+ (vec_widen_umult_lo_v8hi): Likewise.

11437

+ (vec_widen_smult_hi_v8hi): Likewise.

11438

+ (vec_widen_smult_lo_v8hi): Likewise.

11439

+

11440

+ Backport from mainline r204350

11441

+ 2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11442

+

11443

+ * config/rs6000/vsx.md (*vsx_le_perm_store_<mode> for VSX_D):

11444

+ Replace the define_insn_and_split with a define_insn and two

11445

+ define_splits, with the split after reload re-permuting the source

11446

+ register to its original value.

11447

+ (*vsx_le_perm_store_<mode> for VSX_W): Likewise.

11448

+ (*vsx_le_perm_store_v8hi): Likewise.

11449

+ (*vsx_le_perm_store_v16qi): Likewise.

11450

+

11451

+ Backport from mainline r204321

11452

+ 2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11453

+

11454

+ * config/rs6000/vector.md (vec_pack_trunc_v2df): Adjust for

11455

+ little endian.

11456

+

11457

+ Backport from mainline r204321

11458

+ 2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

11459

+

11460

+ * config/rs6000/rs6000.c (rs6000_expand_vector_set): Adjust for

11461

+ little endian.

11462

+

11463

+ Backport from mainline r203980

11464

+ 2013-10-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11465

+

11466

+ * config/rs6000/altivec.md (mulv8hi3): Adjust for little endian.

11467

+

11468

+ Backport from mainline r203930

11469

+ 2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com>

11470

+

11471

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse

11472

+ meaning of merge-high and merge-low masks for little endian; avoid

11473

+ use of vector-pack masks for little endian for mismatched modes.

11474

+

11475

+ Backport from mainline r203877

11476

+ 2013-10-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11477

+

11478

+ * config/rs6000/altivec.md (vec_unpacku_hi_v16qi): Adjust for

11479

+ little endian.

11480

+ (vec_unpacku_hi_v8hi): Likewise.

11481

+ (vec_unpacku_lo_v16qi): Likewise.

11482

+ (vec_unpacku_lo_v8hi): Likewise.

11483

+

11484

+ Backport from mainline r203863

11485

+ 2013-10-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11486

+

11487

+ * config/rs6000/rs6000.c (vspltis_constant): Make sure we check

11488

+ all elements for both endian flavors.

11489

+

11490

+ Backport from mainline r203714

11491

+ 2013-10-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11492

+

11493

+ * gcc/config/rs6000/vector.md (vec_unpacks_hi_v4sf): Correct for

11494

+ endianness.

11495

+ (vec_unpacks_lo_v4sf): Likewise.

11496

+ (vec_unpacks_float_hi_v4si): Likewise.

11497

+ (vec_unpacks_float_lo_v4si): Likewise.

11498

+ (vec_unpacku_float_hi_v4si): Likewise.

11499

+ (vec_unpacku_float_lo_v4si): Likewise.

11500

+

11501

+ Backport from mainline r203713

11502

+ 2013-10-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11503

+

11504

+ * config/rs6000/vsx.md (vsx_concat_<mode>): Adjust output for LE.

11505

+ (vsx_concat_v2sf): Likewise.

11506

+

11507

+ Backport from mainline r203458

11508

+ 2013-10-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11509

+

11510

+ * config/rs6000/vsx.md (*vsx_le_perm_load_v2di): Generalize to

11511

+ handle vector float as well.

11512

+ (*vsx_le_perm_load_v4si): Likewise.

11513

+ (*vsx_le_perm_store_v2di): Likewise.

11514

+ (*vsx_le_perm_store_v4si): Likewise.

11515

+

11516

+ Backport from mainline r203457

11517

+ 2013-10-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11518

+

11519

+ * config/rs6000/vector.md (vec_realign_load<mode>): Generate vperm

11520

+ directly to circumvent subtract from splat{31} workaround.

11521

+ * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_le): New

11522

+ prototype.

11523

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_le): New.

11524

+ * config/rs6000/altivec.md (define_c_enum "unspec"): Add

11525

+ UNSPEC_VPERM_X and UNSPEC_VPERM_UNS_X.

11526

+ (altivec_vperm_<mode>): Convert to define_insn_and_split to

11527

+ separate big and little endian logic.

11528

+ (*altivec_vperm_<mode>_internal): New define_insn.

11529

+ (altivec_vperm_<mode>_uns): Convert to define_insn_and_split to

11530

+ separate big and little endian logic.

11531

+ (*altivec_vperm_<mode>_uns_internal): New define_insn.

11532

+ (vec_permv16qi): Add little endian logic.

11533

+

11534

+ Backport from mainline r203247

11535

+ 2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11536

+

11537

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const_le): New.

11538

+ (altivec_expand_vec_perm_const): Call it.

11539

+

11540

+ Backport from mainline r203246

11541

+ 2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11542

+

11543

+ * config/rs6000/vector.md (mov<mode>): Emit permuted move

11544

+ sequences for LE VSX loads and stores at expand time.

11545

+ * config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_move): New

11546

+ prototype.

11547

+ * config/rs6000/rs6000.c (rs6000_const_vec): New.

11548

+ (rs6000_gen_le_vsx_permute): New.

11549

+ (rs6000_gen_le_vsx_load): New.

11550

+ (rs6000_gen_le_vsx_store): New.

11551

+ (rs6000_gen_le_vsx_move): New.

11552

+ * config/rs6000/vsx.md (*vsx_le_perm_load_v2di): New.

11553

+ (*vsx_le_perm_load_v4si): New.

11554

+ (*vsx_le_perm_load_v8hi): New.

11555

+ (*vsx_le_perm_load_v16qi): New.

11556

+ (*vsx_le_perm_store_v2di): New.

11557

+ (*vsx_le_perm_store_v4si): New.

11558

+ (*vsx_le_perm_store_v8hi): New.

11559

+ (*vsx_le_perm_store_v16qi): New.

11560

+ (*vsx_xxpermdi2_le_<mode>): New.

11561

+ (*vsx_xxpermdi4_le_<mode>): New.

11562

+ (*vsx_xxpermdi8_le_V8HI): New.

11563

+ (*vsx_xxpermdi16_le_V16QI): New.

11564

+ (*vsx_lxvd2x2_le_<mode>): New.

11565

+ (*vsx_lxvd2x4_le_<mode>): New.

11566

+ (*vsx_lxvd2x8_le_V8HI): New.

11567

+ (*vsx_lxvd2x16_le_V16QI): New.

11568

+ (*vsx_stxvd2x2_le_<mode>): New.

11569

+ (*vsx_stxvd2x4_le_<mode>): New.

11570

+ (*vsx_stxvd2x8_le_V8HI): New.

11571

+ (*vsx_stxvd2x16_le_V16QI): New.

11572

+

11573

+ Backport from mainline r201235

11574

+ 2013-07-24 Bill Schmidt <wschmidt@linux.ibm.com>

11575

+ Anton Blanchard <anton@au1.ibm.com>

11576

+

11577

+ * config/rs6000/altivec.md (altivec_vpkpx): Handle little endian.

11578

+ (altivec_vpks<VI_char>ss): Likewise.

11579

+ (altivec_vpks<VI_char>us): Likewise.

11580

+ (altivec_vpku<VI_char>us): Likewise.

11581

+ (altivec_vpku<VI_char>um): Likewise.

11582

+

11583

+ Backport from mainline r201208

11584

+ 2013-07-24 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

11585

+ Anton Blanchard <anton@au1.ibm.com>

11586

+

11587

+ * config/rs6000/vector.md (vec_realign_load_<mode>): Reorder input

11588

+ operands to vperm for little endian.

11589

+ * config/rs6000/rs6000.c (rs6000_expand_builtin): Use lvsr instead

11590

+ of lvsl to create the control mask for a vperm for little endian.

11591

+

11592

+ Backport from mainline r201195

11593

+ 2013-07-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11594

+ Anton Blanchard <anton@au1.ibm.com>

11595

+

11596

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse

11597

+ two operands for little-endian.

11598

+

11599

+ Backport from mainline r201193

11600

+ 2013-07-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11601

+ Anton Blanchard <anton@au1.ibm.com>

11602

+

11603

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Correct

11604

+ selection of field for vector splat in little endian mode.

11605

+

11606

+ Backport from mainline r201149

11607

+ 2013-07-22 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

11608

+ Anton Blanchard <anton@au1.ibm.com>

11609

+

11610

+ * config/rs6000/rs6000.c (rs6000_expand_vector_init): Fix

11611

+ endianness when selecting field to splat.

11612

+

11613

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11614

+

11615

+ Backport from mainline r205123:

11616

+

11617

+ 2013-11-20 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11618

+

11619

+ * config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Do not

11620

+ allow subregs of TDmode in FPRs of smaller size in little-endian.

11621

+ (rs6000_split_multireg_move): When splitting an access to TDmode

11622

+ in FPRs, do not use simplify_gen_subreg.

11623

+

11624

+ Backport from mainline r204927:

11625

+

11626

+ 2013-11-17 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11627

+

11628

+ * config/rs6000/rs6000.c (rs6000_emit_move): Use low word of

11629

+ sdmode_stack_slot also in little-endian mode.

11630

+

11631

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11632

+

11633

+ Power8 HTM Support

11634

+ Backport from mainline

11635

+ 2013-12-03 Peter Bergner <bergner@vnet.ibm.com>

11636

+

11637

+ * config/rs6000/htmintrin.h (_TEXASR_INSTRUCTION_FETCH_CONFLICT): Fix

11638

+ typo in macro name.

11639

+ (_TEXASRU_INSTRUCTION_FETCH_CONFLICT): Likewise.

11640

+

11641

+ Backport from mainline r205233.

11642

+ 2013-11-21 Peter Bergner <bergner@vnet.ibm.com>

11643

+

11644

+ * doc/extend.texi: Document htm builtins.

11645

+

11646

+ Backport from mainline

11647

+ 2013-07-17 Iain Sandoe <iain@codesourcery.com>

11648

+

11649

+ * config/rs6000/darwin.h (REGISTER_NAMES): Add HTM registers.

11650

+

11651

+ Backport from mainline

11652

+ 2013-07-16 Peter Bergner <bergner@vnet.ibm.com>

11653

+

11654

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not

11655

+ enable extra ISA flags with TARGET_HTM.

11656

+

11657

+ 2013-07-16 Jakub Jelinek <jakub@redhat.com>

11658

+ Peter Bergner <bergner@vnet.ibm.com>

11659

+

11660

+ * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTERS): Mention HTM

11661

+ registers in the comment.

11662

+ (DWARF_FRAME_REGISTERS): Subtract also the 3 HTM registers.

11663

+ (DWARF_REG_TO_UNWIND_COLUMN): Use DWARF_FRAME_REGISTERS

11664

+ rather than FIRST_PSEUDO_REGISTERS.

11665

+

11666

+ * config.gcc (powerpc*-*-*): Install htmintrin.h and htmxlintrin.h.

11667

+ * config/rs6000/t-rs6000 (MD_INCLUDES): Add htm.md.

11668

+ * config/rs6000/rs6000.opt: Add -mhtm option.

11669

+ * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_HTM.

11670

+ (ISA_2_7_MASKS_SERVER): Add OPTION_MASK_HTM.

11671

+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define

11672

+ __HTM__ if the HTM instructions are available.

11673

+ * config/rs6000/predicates.md (u3bit_cint_operand, u10bit_cint_operand)

11674

+ (htm_spr_reg_operand): New define_predicates.

11675

+ * config/rs6000/rs6000.md (define_attr "type"): Add htm.

11676

+ (TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO): New define_constants.

11677

+ Include htm.md.

11678

+ * config/rs6000/rs6000-builtin.def (BU_HTM_0, BU_HTM_1, BU_HTM_2)

11679

+ (BU_HTM_3, BU_HTM_SPR0, BU_HTM_SPR1): Add support macros for defining

11680

+ HTM builtin functions.

11681

+ * config/rs6000/rs6000.c (RS6000_BUILTIN_H): New macro.

11682

+ (rs6000_reg_names, alt_reg_names): Add HTM SPR register names.

11683

+ (rs6000_init_hard_regno_mode_ok): Add support for HTM instructions.

11684

+ (rs6000_builtin_mask_calculate): Likewise.

11685

+ (rs6000_option_override_internal): Likewise.

11686

+ (bdesc_htm): Add new HTM builtin support.

11687

+ (htm_spr_num): New function.

11688

+ (htm_spr_regno): Likewise.

11689

+ (rs6000_htm_spr_icode): Likewise.

11690

+ (htm_expand_builtin): Likewise.

11691

+ (htm_init_builtins): Likewise.

11692

+ (rs6000_expand_builtin): Add support for HTM builtin functions.

11693

+ (rs6000_init_builtins): Likewise.

11694

+ (rs6000_invalid_builtin, rs6000_opt_mask): Add support for -mhtm option.

11695

+ * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mhtm.

11696

+ (TARGET_HTM, MASK_HTM): Define macros.

11697

+ (FIRST_PSEUDO_REGISTER): Adjust for new HTM SPR registers.

11698

+ (FIXED_REGISTERS): Likewise.

11699

+ (CALL_USED_REGISTERS): Likewise.

11700

+ (CALL_REALLY_USED_REGISTERS): Likewise.

11701

+ (REG_ALLOC_ORDER): Likewise.

11702

+ (enum reg_class): Likewise.

11703

+ (REG_CLASS_NAMES): Likewise.

11704

+ (REG_CLASS_CONTENTS): Likewise.

11705

+ (REGISTER_NAMES): Likewise.

11706

+ (ADDITIONAL_REGISTER_NAMES): Likewise.

11707

+ (RS6000_BTC_SPR, RS6000_BTC_VOID, RS6000_BTC_32BIT, RS6000_BTC_64BIT)

11708

+ (RS6000_BTC_MISC_MASK, RS6000_BTM_HTM): New macros.

11709

+ (RS6000_BTM_COMMON): Add RS6000_BTM_HTM.

11710

+ * config/rs6000/htm.md: New file.

11711

+ * config/rs6000/htmintrin.h: New file.

11712

+ * config/rs6000/htmxlintrin.h: New file.

11713

+

11714

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11715

+

11716

+ Power8 Base Support

11717

+ Apply mainline

11718

+ 2013-11-23 Alan Modra <amodra@gmail.com>

11719

+ * config/rs6000/vsx.md (fusion peepholes): Disable when !TARGET_VSX.

11720

+

11721

+ Backport from mainline

11722

+ 2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com>

11723

+

11724

+ PR target/59054

11725

+ * config/rs6000/rs6000.md (movdi_internal32): Eliminate

11726

+ constraints that would allow DImode into the traditional Altivec

11727

+ registers, but cause undesirable code generation when loading 0 as

11728

+ a constant.

11729

+ (movdi_internal64): Likewise.

11730

+ (cmp<mode>_fpr): Do not use %x for CR register output.

11731

+ (extendsfdf2_fpr): Fix constraints when -mallow-upper-df and

11732

+ -mallow-upper-sf debug switches are used.

11733

+

11734

+ Backport from mainline

11735

+ 2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>

11736

+

11737

+ * config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new

11738

+ fields to the reg_addr array that describes the valid addressing

11739

+ mode for any register, general purpose registers, floating point

11740

+ registers, and Altivec registers.

11741

+ (FIRST_RELOAD_REG_CLASS): Likewise.

11742

+ (LAST_RELOAD_REG_CLASS): Likewise.

11743

+ (struct reload_reg_map_type): Likewise.

11744

+ (reload_reg_map_type): Likewise.

11745

+ (RELOAD_REG_VALID): Likewise.

11746

+ (RELOAD_REG_MULTIPLE): Likewise.

11747

+ (RELOAD_REG_INDEXED): Likewise.

11748

+ (RELOAD_REG_OFFSET): Likewise.

11749

+ (RELOAD_REG_PRE_INCDEC): Likewise.

11750

+ (RELOAD_REG_PRE_MODIFY): Likewise.

11751

+ (reg_addr): Likewise.

11752

+ (mode_supports_pre_incdec_p): New helper functions to say whether

11753

+ a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.

11754

+ (mode_supports_pre_modify_p): Likewise.

11755

+ (rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to

11756

+ print the valid address mode bits for each mode.

11757

+ (rs6000_debug_print_mode): Likewise.

11758

+ (rs6000_debug_reg_global): Likewise.

11759

+ (rs6000_setup_reg_addr_masks): New function to set up the address

11760

+ mask bits for each type.

11761

+ (rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.

11762

+ Call rs6000_setup_reg_addr_masks to set up the address mask bits.

11763

+ (rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and

11764

+ mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and

11765

+ PRE_MODIFY are supported.

11766

+ (rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec

11767

+ registers, instead of {src,dest}_av_p.

11768

+ (rs6000_print_options_internal): Tweak the debug output slightly.

11769

+

11770

+ Backport from mainline

11771

+ 2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>

11772

+

11773

+ * config/rs6000/rs6000-builtin.def (XSRDPIM): Use floatdf2,

11774

+ ceildf2, btruncdf2, instead of vsx_* name.

11775

+

11776

+ * config/rs6000/vsx.md (vsx_add<mode>3): Change arithmetic

11777

+ iterators to only do V2DF and V4SF here. Move the DF code to

11778

+ rs6000.md where it is combined with SF mode. Replace <VSv> with

11779

+ just 'v' since only vector operations are handled with these insns

11780

+ after moving the DF support to rs6000.md.

11781

+ (vsx_sub<mode>3): Likewise.

11782

+ (vsx_mul<mode>3): Likewise.

11783

+ (vsx_div<mode>3): Likewise.

11784

+ (vsx_fre<mode>2): Likewise.

11785

+ (vsx_neg<mode>2): Likewise.

11786

+ (vsx_abs<mode>2): Likewise.

11787

+ (vsx_nabs<mode>2): Likewise.

11788

+ (vsx_smax<mode>3): Likewise.

11789

+ (vsx_smin<mode>3): Likewise.

11790

+ (vsx_sqrt<mode>2): Likewise.

11791

+ (vsx_rsqrte<mode>2): Likewise.

11792

+ (vsx_fms<mode>4): Likewise.

11793

+ (vsx_nfma<mode>4): Likewise.

11794

+ (vsx_copysign<mode>3): Likewise.

11795

+ (vsx_btrunc<mode>2): Likewise.

11796

+ (vsx_floor<mode>2): Likewise.

11797

+ (vsx_ceil<mode>2): Likewise.

11798

+ (vsx_smaxsf3): Delete scalar ops that were moved to rs6000.md.

11799

+ (vsx_sminsf3): Likewise.

11800

+ (vsx_fmadf4): Likewise.

11801

+ (vsx_fmsdf4): Likewise.

11802

+ (vsx_nfmadf4): Likewise.

11803

+ (vsx_nfmsdf4): Likewise.

11804

+ (vsx_cmpdf_internal1): Likewise.

11805

+

11806

+ * config/rs6000/rs6000.h (TARGET_SF_SPE): Define macros to make it

11807

+ simpler to select whether a target has SPE or traditional floating

11808

+ point support in iterators.

11809

+ (TARGET_DF_SPE): Likewise.

11810

+ (TARGET_SF_FPR): Likewise.

11811

+ (TARGET_DF_FPR): Likewise.

11812

+ (TARGET_SF_INSN): Macros to say whether floating point support

11813

+ exists for a given operation for expanders.

11814

+ (TARGET_DF_INSN): Likewise.

11815

+

11816

+ * config/rs6000/rs6000.c (Ftrad): New mode attributes to allow

11817

+ combining of SF/DF mode operations, using both traditional and VSX

11818

+ registers.

11819

+ (Fvsx): Likewise.

11820

+ (Ff): Likewise.

11821

+ (Fv): Likewise.

11822

+ (Fs): Likewise.

11823

+ (Ffre): Likewise.

11824

+ (FFRE): Likewise.

11825

+ (abs<mode>2): Combine SF/DF modes using traditional floating point

11826

+ instructions. Add support for using the upper DF registers with

11827

+ VSX support, and SF registers with power8-vector support. Update

11828

+ expanders for operations supported by both the SPE and traditional

11829

+ floating point units.

11830

+ (abs<mode>2_fpr): Likewise.

11831

+ (nabs<mode>2): Likewise.

11832

+ (nabs<mode>2_fpr): Likewise.

11833

+ (neg<mode>2): Likewise.

11834

+ (neg<mode>2_fpr): Likewise.

11835

+ (add<mode>3): Likewise.

11836

+ (add<mode>3_fpr): Likewise.

11837

+ (sub<mode>3): Likewise.

11838

+ (sub<mode>3_fpr): Likewise.

11839

+ (mul<mode>3): Likewise.

11840

+ (mul<mode>3_fpr): Likewise.

11841

+ (div<mode>3): Likewise.

11842

+ (div<mode>3_fpr): Likewise.

11843

+ (sqrt<mode>3): Likewise.

11844

+ (sqrt<mode>3_fpr): Likewise.

11845

+ (fre<Fs>): Likewise.

11846

+ (rsqrt<mode>2): Likewise.

11847

+ (cmp<mode>_fpr): Likewise.

11848

+ (smax<mode>3): Likewise.

11849

+ (smin<mode>3): Likewise.

11850

+ (smax<mode>3_vsx): Likewise.

11851

+ (smin<mode>3_vsx): Likewise.

11852

+ (negsf2): Delete SF operations that are merged with DF.

11853

+ (abssf2): Likewise.

11854

+ (addsf3): Likewise.

11855

+ (subsf3): Likewise.

11856

+ (mulsf3): Likewise.

11857

+ (divsf3): Likewise.

11858

+ (fres): Likewise.

11859

+ (fmasf4_fpr): Likewise.

11860

+ (fmssf4_fpr): Likewise.

11861

+ (nfmasf4_fpr): Likewise.

11862

+ (nfmssf4_fpr): Likewise.

11863

+ (sqrtsf2): Likewise.

11864

+ (rsqrtsf_internal1): Likewise.

11865

+ (smaxsf3): Likewise.

11866

+ (sminsf3): Likewise.

11867

+ (cmpsf_internal1): Likewise.

11868

+ (copysign<mode>3_fcpsgn): Add VSX/power8-vector support.

11869

+ (negdf2): Delete DF operations that are merged with SF.

11870

+ (absdf2): Likewise.

11871

+ (nabsdf2): Likewise.

11872

+ (adddf3): Likewise.

11873

+ (subdf3): Likewise.

11874

+ (muldf3): Likewise.

11875

+ (divdf3): Likewise.

11876

+ (fred): Likewise.

11877

+ (rsqrtdf_internal1): Likewise.

11878

+ (fmadf4_fpr): Likewise.

11879

+ (fmsdf4_fpr): Likewise.

11880

+ (nfmadf4_fpr): Likewise.

11881

+ (nfmsdf4_fpr): Likewise.

11882

+ (sqrtdf2): Likewise.

11883

+ (smaxdf3): Likewise.

11884

+ (smindf3): Likewise.

11885

+ (cmpdf_internal1): Likewise.

11886

+ (lrint<mode>di2): Use TARGET_<MODE>_FPR macro.

11887

+ (btrunc<mode>2): Delete separate expander, and combine with the

11888

+ insn and add VSX instruction support. Use TARGET_<MODE>_FPR.

11889

+ (btrunc<mode>2_fpr): Likewise.

11890

+ (ceil<mode>2): Likewise.

11891

+ (ceil<mode>2_fpr): Likewise.

11892

+ (floor<mode>2): Likewise.

11893

+ (floor<mode>2_fpr): Likewise.

11894

+ (fma<mode>4_fpr): Combine SF and DF fused multiply/add support.

11895

+ Add support for using the upper registers with VSX and

11896

+ power8-vector. Move insns to be closer to the define_expands. On

11897

+ VSX systems, prefer the traditional form of FMA over the VSX

11898

+ version, since the traditional form allows the target not to

11899

+ overlap with the inputs.

11900

+ (fms<mode>4_fpr): Likewise.

11901

+ (nfma<mode>4_fpr): Likewise.

11902

+ (nfms<mode>4_fpr): Likewise.

11903

+

11904

+ Backport from mainline

11905

+ 2013-09-27 Michael Meissner <meissner@linux.vnet.ibm.com>

11906

+

11907

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Allow

11908

+ DFmode, DImode, and SFmode in the upper VSX registers based on the

11909

+ -mupper-regs-{df,sf} flags. Fix wu constraint to be ALTIVEC_REGS

11910

+ if -mpower8-vector. Combine -mvsx-timode handling with the rest

11911

+ of the VSX register handling.

11912

+

11913

+ * config/rs6000/rs6000.md (f32_lv): Use %x0 for VSX regsters.

11914

+ (f32_sv): Likewise.

11915

+ (zero_extendsidi2_lfiwzx): Add support for loading into the

11916

+ Altivec registers with -mpower8-vector. Use wu/wv constraints to

11917

+ only do VSX memory options on Altivec registers.

11918

+ (extendsidi2_lfiwax): Likewise.

11919

+ (extendsfdf2_fpr): Likewise.

11920

+ (mov<mode>_hardfloat, SF/SD modes): Likewise.

11921

+ (mov<mode>_hardfloat32, DF/DD modes): Likewise.

11922

+ (mov<mode>_hardfloat64, DF/DD modes): Likewise.

11923

+ (movdi_internal64): Likewise.

11924

+

11925

+ Backport from mainline

11926

+ 2013-09-23 Michael Meissner <meissner@linux.vnet.ibm.com>

11927

+

11928

+ * config/rs6000/rs6000.c (rs6000_vector_reload): Delete, combine

11929

+ reload helper function arrays into a single array reg_addr.

11930

+ (reload_fpr_gpr): Likewise.

11931

+ (reload_gpr_vsx): Likewise.

11932

+ (reload_vsx_gpr): Likewise.

11933

+ (struct rs6000_reg_addr): Likewise.

11934

+ (reg_addr): Likewise.

11935

+ (rs6000_debug_reg_global): Change rs6000_vector_reload,

11936

+ reload_fpr_gpr, reload_gpr_vsx, reload_vsx_gpr uses to reg_addr.

11937

+ (rs6000_init_hard_regno_mode_ok): Likewise.

11938

+ (rs6000_secondary_reload_direct_move): Likewise.

11939

+ (rs6000_secondary_reload): Likewise.

11940

+

11941

+ * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add new

11942

+ constraints: wu, ww, and wy. Repurpose wv constraint added during

11943

+ power8 changes. Put wg constraint in alphabetical order.

11944

+

11945

+ * config/rs6000/rs6000.opt (-mvsx-scalar-float): New debug switch

11946

+ for future work to add ISA 2.07 VSX single precision support.

11947

+ (-mvsx-scalar-double): Change default from -1 to 1, update

11948

+ documentation comment.

11949

+ (-mvsx-scalar-memory): Rename debug switch to -mupper-regs-df.

11950

+ (-mupper-regs-df): New debug switch to control whether DF values

11951

+ can go in the traditional Altivec registers.

11952

+ (-mupper-regs-sf): New debug switch to control whether SF values

11953

+ can go in the traditional Altivec registers.

11954

+

11955

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print wu, ww,

11956

+ and wy constraints.

11957

+ (rs6000_init_hard_regno_mode_ok): Use ssize_t instead of int for

11958

+ loop variables. Rename -mvsx-scalar-memory to -mupper-regs-df.

11959

+ Add new constraints, wu/ww/wy. Repurpose wv constraint.

11960

+ (rs6000_debug_legitimate_address_p): Print if we are running

11961

+ before, during, or after reload.

11962

+ (rs6000_secondary_reload): Add a comment.

11963

+ (rs6000_opt_masks): Add -mupper-regs-df, -mupper-regs-sf.

11964

+

11965

+ * config/rs6000/constraints.md (wa constraint): Sort w<x>

11966

+ constraints. Update documentation string.

11967

+ (wd constraint): Likewise.

11968

+ (wf constraint): Likewise.

11969

+ (wg constraint): Likewise.

11970

+ (wn constraint): Likewise.

11971

+ (ws constraint): Likewise.

11972

+ (wt constraint): Likewise.

11973

+ (wx constraint): Likewise.

11974

+ (wz constraint): Likewise.

11975

+ (wu constraint): New constraint for ISA 2.07 SFmode scalar

11976

+ instructions.

11977

+ (ww constraint): Likewise.

11978

+ (wy constraint): Likewise.

11979

+ (wv constraint): Repurpose ISA 2.07 constraint that did not use in

11980

+ the previous submissions.

11981

+ * doc/md.texi (PowerPC and IBM RS6000): Likewise.

11982

+

11983

+ Backport from mainline

11984

+ 2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>

11985

+

11986

+ PR target/58673

11987

+ * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only

11988

+ restrict TImode addresses to single indirect registers if both

11989

+ -mquad-memory and -mvsx-timode are used.

11990

+ (rs6000_output_move_128bit): Use quad_load_store_p to determine if

11991

+ we should emit load/store quad. Remove using %y for quad memory

11992

+ addresses.

11993

+

11994

+ * config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add

11995

+ constraints to allow load/store quad on machines where TImode is

11996

+ not allowed in VSX registers. Use 'n' instead of 'F' constraint

11997

+ for TImode to load integer constants.

11998

+

11999

+ Backport from mainline

12000

+ 2013-10-02 Michael Meissner <meissner@linux.vnet.ibm.com>

12001

+

12002

+ PR target/58587

12003

+ * config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Turn off

12004

+ setting -mvsx-timode by default until the underlying problem is

12005

+ fixed.

12006

+ (RS6000_CPU, power7 defaults): Likewise.

12007

+

12008

+ Backport from trunk

12009

+ 2013-08-16 Michael Meissner <meissner@linux.vnet.ibm.com>

12010

+

12011

+ PR target/58160

12012

+ * config/rs6000/predicates.md (fusion_gpr_mem_load): Allow the

12013

+ memory rtx to contain ZERO_EXTEND and SIGN_EXTEND.

12014

+

12015

+ * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Pass operands

12016

+ array instead of each individual operand as a separate argument.

12017

+ (emit_fusion_gpr_load): Likewise.

12018

+ (expand_fusion_gpr_load): Add new function declaration.

12019

+

12020

+ * config/rs6000/rs6000.c (fusion_gpr_load_p): Change the calling

12021

+ signature to have the operands passed as an array, instead of as

12022

+ separate arguments. Allow ZERO_EXTEND to be in the memory

12023

+ address, and also SIGN_EXTEND if -mpower8-fusion-sign. Do not

12024

+ depend on the register live/dead flags when peepholes are run.

12025

+ (expand_fusion_gpr_load): New function to be called from the

12026

+ peephole2 pass, to change the register that addis sets to be the

12027

+ target register.

12028

+ (emit_fusion_gpr_load): Change the calling signature to have the

12029

+ operands passed as an array, instead of as separate arguments.

12030

+ Allow ZERO_EXTEND to be in the memory address, and also

12031

+ SIGN_EXTEND if -mpower8-fusion-sign.

12032

+

12033

+ * config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): Delete unused

12034

+ unspec enumeration.

12035

+ (power8 fusion peephole/peephole2): Rework the fusion peepholes to

12036

+ adjust the register addis loads up in the peephole2 pass. Do not

12037

+ depend on the register live/dead state when the peephole pass is

12038

+ done.

12039

+

12040

+ Backport from trunk

12041

+ 2013-07-23 Michael Meissner <meissner@linux.vnet.ibm.com>

12042

+

12043

+ * config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean

12044

+ expanders to rs6000.md.

12045

+ (ior<mode>3): Likewise.

12046

+ (and<mode>3): Likewise.

12047

+ (one_cmpl<mode>2): Likewise.

12048

+ (nor<mode>3): Likewise.

12049

+ (andc<mode>3): Likewise.

12050

+ (eqv<mode>3): Likewise.

12051

+ (nand<mode>3): Likewise.

12052

+ (orc<mode>3): Likewise.

12053

+

12054

+ * config/rs6000/rs6000-protos.h (rs6000_split_logical): New

12055

+ declaration.

12056

+

12057

+ * config/rs6000/rs6000.c (rs6000_split_logical_inner): Add support

12058

+ to split multi-word logical operations.

12059

+ (rs6000_split_logical_di): Likewise.

12060

+ (rs6000_split_logical): Likewise.

12061

+

12062

+ * config/rs6000/vsx.md (VSX_L2): Delete, no longer used.

12063

+ (vsx_and<mode>3_32bit): Move 128-bit logical insns to rs6000.md,

12064

+ and allow TImode operations in 32-bit.

12065

+ (vsx_and<mode>3_64bit): Likewise.

12066

+ (vsx_ior<mode>3_32bit): Likewise.

12067

+ (vsx_ior<mode>3_64bit): Likewise.

12068

+ (vsx_xor<mode>3_32bit): Likewise.

12069

+ (vsx_xor<mode>3_64bit): Likewise.

12070

+ (vsx_one_cmpl<mode>2_32bit): Likewise.

12071

+ (vsx_one_cmpl<mode>2_64bit): Likewise.

12072

+ (vsx_nor<mode>3_32bit): Likewise.

12073

+ (vsx_nor<mode>3_64bit): Likewise.

12074

+ (vsx_andc<mode>3_32bit): Likewise.

12075

+ (vsx_andc<mode>3_64bit): Likewise.

12076

+ (vsx_eqv<mode>3_32bit): Likewise.

12077

+ (vsx_eqv<mode>3_64bit): Likewise.

12078

+ (vsx_nand<mode>3_32bit): Likewise.

12079

+ (vsx_nand<mode>3_64bit): Likewise.

12080

+ (vsx_orc<mode>3_32bit): Likewise.

12081

+ (vsx_orc<mode>3_64bit): Likewise.

12082

+

12083

+ * config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Always allow vector

12084

+ logical types in GPRs.

12085

+

12086

+ * config/rs6000/altivec.md (altivec_and<mode>3): Move 128-bit

12087

+ logical insns to rs6000.md, and allow TImode operations in

12088

+ 32-bit.

12089

+ (altivec_ior<mode>3): Likewise.

12090

+ (altivec_xor<mode>3): Likewise.

12091

+ (altivec_one_cmpl<mode>2): Likewise.

12092

+ (altivec_nor<mode>3): Likewise.

12093

+ (altivec_andc<mode>3): Likewise.

12094

+

12095

+ * config/rs6000/rs6000.md (BOOL_128): New mode iterators and mode

12096

+ attributes for moving the 128-bit logical operations into

12097

+ rs6000.md.

12098

+ (BOOL_REGS_OUTPUT): Likewise.

12099

+ (BOOL_REGS_OP1): Likewise.

12100

+ (BOOL_REGS_OP2): Likewise.

12101

+ (BOOL_REGS_UNARY): Likewise.

12102

+ (BOOL_REGS_AND_CR0): Likewise.

12103

+ (one_cmpl<mode>2): Add support for DI logical operations on

12104

+ 32-bit, splitting the operations to 32-bit.

12105

+ (anddi3): Likewise.

12106

+ (iordi3): Likewise.

12107

+ (xordi3): Likewise.

12108

+ (and<mode>3, 128-bit types): Rewrite 2013-06-06 logical operator

12109

+ changes to combine the 32/64-bit code, allow logical operations on

12110

+ TI mode in 32-bit, and to use similar match_operator patterns like

12111

+ scalar mode uses. Combine the Altivec and VSX code for logical

12112

+ operations, and move it here.

12113

+ (ior<mode>3, 128-bit types): Likewise.

12114

+ (xor<mode>3, 128-bit types): Likewise.

12115

+ (one_cmpl<mode>3, 128-bit types): Likewise.

12116

+ (nor<mode>3, 128-bit types): Likewise.

12117

+ (andc<mode>3, 128-bit types): Likewise.

12118

+ (eqv<mode>3, 128-bit types): Likewise.

12119

+ (nand<mode>3, 128-bit types): Likewise.

12120

+ (orc<mode>3, 128-bit types): Likewise.

12121

+ (and<mode>3_internal): Likewise.

12122

+ (bool<mode>3_internal): Likewise.

12123

+ (boolc<mode>3_internal1): Likewise.

12124

+ (boolc<mode>3_internal2): Likewise.

12125

+ (boolcc<mode>3_internal1): Likewise.

12126

+ (boolcc<mode>3_internal2): Likewise.

12127

+ (eqv<mode>3_internal1): Likewise.

12128

+ (eqv<mode>3_internal2): Likewise.

12129

+ (one_cmpl1<mode>3_internal): Likewise.

12130

+

12131

+ Back port from mainline:

12132

+ 2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com>

12133

+ Pat Haugen <pthaugen@us.ibm.com>

12134

+ Peter Bergner <bergner@vnet.ibm.com>

12135

+

12136

+ * lib/target-supports.exp (check_p8vector_hw_available) Add power8

12137

+ support.

12138

+ (check_effective_target_powerpc_p8vector_ok): Likewise.

12139

+ (is-effective-target): Likewise.

12140

+ (check_vect_support_and_set_flags): Likewise.

12141

+

12142

+ Backport from mainline

12143

+ 2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com>

12144

+

12145

+ * config/rs6000/predicates.md (fusion_gpr_addis): New predicates

12146

+ to support power8 load fusion.

12147

+ (fusion_gpr_mem_load): Likewise.

12148

+

12149

+ * config/rs6000/rs6000-modes.def (PTImode): Update a comment.

12150

+

12151

+ * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): New

12152

+ declarations for power8 load fusion.

12153

+ (emit_fusion_gpr_load): Likewise.

12154

+

12155

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): If

12156

+ tuning for power8, turn on fusion mode by default. Turn on sign

12157

+ extending fusion mode if normal fusion mode is on, and we are at

12158

+ -O2 or -O3.

12159

+ (fusion_gpr_load_p): New function, return true if we can fuse an

12160

+ addis instruction with a dependent load to a GPR.

12161

+ (emit_fusion_gpr_load): Emit the instructions for power8 load

12162

+ fusion to GPRs.

12163

+

12164

+ * config/rs6000/vsx.md (VSX_M2): New iterator for fusion

12165

+ peepholes.

12166

+ (VSX load fusion peepholes): New peepholes to fuse together an

12167

+ addi instruction with a VSX load instruction.

12168

+

12169

+ * config/rs6000/rs6000.md (GPR load fusion peepholes): New

12170

+ peepholes to fuse an addis instruction with a load to a GPR base

12171

+ register. If we are supporting sign extending fusions, convert

12172

+ sign extending loads to zero extending loads and add an explicit

12173

+ sign extension.

12174

+

12175

+ Backport from mainline

12176

+ 2013-07-18 Pat Haugen <pthaugen@us.ibm.com>

12177

+

12178

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Adjust flag

12179

+ interaction for new Power8 flags and VSX.

12180

+

12181

+ Back port from the trunk

12182

+ 2013-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>

12183

+

12184

+ PR target/57744

12185

+ * config/rs6000/rs6000.h (MODES_TIEABLE_P): Do not allow PTImode

12186

+ to tie with any other modes. Eliminate Altivec vector mode tests,

12187

+ since these are a subset of ALTIVEC or VSX vector modes. Simplify

12188

+ code, to return 0 if testing MODE2 for a condition, if we've

12189

+ already tested MODE1 for the same condition.

12190

+

12191

+ Backport from mainline

12192

+ 2013-06-28 Pat Haugen <pthaugen@us.ibm.com>

12193

+

12194

+ * config/rs6000/rs6000.md (define_insn ""): Fix insn type.

12195

+

12196

+ Back port from the trunk

12197

+ 2013-06-26 Michael Meissner <meissner@linux.vnet.ibm.com>

12198

+ Pat Haugen <pthaugen@us.ibm.com>

12199

+ Peter Bergner <bergner@vnet.ibm.com>

12200

+

12201

+ * config/rs6000/power8.md: New.

12202

+ * config/rs6000/rs6000-cpus.def (RS6000_CPU table): Adjust processor

12203

+ setting for power8 entry.

12204

+ * config/rs6000/t-rs6000 (MD_INCLUDES): Add power8.md.

12205

+ * config/rs6000/rs6000.c (is_microcoded_insn, is_cracked_insn): Adjust

12206

+ test for Power4/Power5 only.

12207

+ (insn_must_be_first_in_group, insn_must_be_last_in_group): Add Power8

12208

+ support.

12209

+ (force_new_group): Adjust comment.

12210

+ * config/rs6000/rs6000.md: Include power8.md.

12211

+

12212

+ Back port from the trunk

12213

+ 2013-06-14 Michael Meissner <meissner@linux.vnet.ibm.com>

12214

+

12215

+ PR target/57615

12216

+ * config/rs6000/rs6000.md (mov<mode>_ppc64): Call

12217

+ rs6000_output_move_128bit to handle emitting quad memory

12218

+ operations. Set attribute length to 8 bytes.

12219

+

12220

+ Back port from the trunk

12221

+ 2013-06-13 Michael Meissner <meissner@linux.vnet.ibm.com>

12222

+

12223

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Move

12224

+ test for clearing quad memory on 32-bit later.

12225

+

12226

+ Back port from the trunk

12227

+

12228

+ 2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com>

12229

+ Pat Haugen <pthaugen@us.ibm.com>

12230

+ Peter Bergner <bergner@vnet.ibm.com>

12231

+

12232

+ * config/rs6000/rs6000.c (emit_load_locked): Add support for

12233

+ power8 byte, half-word, and quad-word atomic instructions.

12234

+ (emit_store_conditional): Likewise.

12235

+ (rs6000_expand_atomic_compare_and_swap): Likewise.

12236

+ (rs6000_expand_atomic_op): Likewise.

12237

+

12238

+ * config/rs6000/sync.md (larx): Add new modes for power8.

12239

+ (stcx): Likewise.

12240

+ (AINT): New mode iterator to include TImode as well as normal

12241

+ integer modes on power8.

12242

+ (fetchop_pred): Use int_reg_operand instead of gpc_reg_operand so

12243

+ that VSX registers are not considered. Use AINT mode iterator

12244

+ instead of INT1 to allow inclusion of quad word atomic operations

12245

+ on power8.

12246

+ (load_locked<mode>): Likewise.

12247

+ (store_conditional<mode>): Likewise.

12248

+ (atomic_compare_and_swap<mode>): Likewise.

12249

+ (atomic_exchange<mode>): Likewise.

12250

+ (atomic_nand<mode>): Likewise.

12251

+ (atomic_fetch_<fetchop_name><mode>): Likewise.

12252

+ (atomic_nand_fetch<mode>): Likewise.

12253

+ (mem_thread_fence): Use gen_loadsync_<mode> instead of enumerating

12254

+ each type.

12255

+ (ATOMIC): On power8, add QImode, HImode modes.

12256

+ (load_locked<QHI:mode>_si): Varients of load_locked for QI/HI

12257

+ modes that promote to SImode.

12258

+ (load_lockedti): Convert TImode arguments to PTImode, so that we

12259

+ get a guaranteed even/odd register pair.

12260

+ (load_lockedpti): Likewise.

12261

+ (store_conditionalti): Likewise.

12262

+ (store_conditionalpti): Likewise.

12263

+

12264

+ * config/rs6000/rs6000.md (QHI): New mode iterator for power8

12265

+ atomic load/store instructions.

12266

+ (HSI): Likewise.

12267

+

12268

+ Back port from the trunk

12269

+

12270

+ 2013-06-10 Michael Meissner <meissner@linux.vnet.ibm.com>

12271

+ Pat Haugen <pthaugen@us.ibm.com>

12272

+ Peter Bergner <bergner@vnet.ibm.com>

12273

+

12274

+ * config/rs6000/vector.md (GPR move splitter): Do not split moves

12275

+ of vectors in GPRS if they are direct moves or quad word load or

12276

+ store moves.

12277

+

12278

+ * config/rs6000/rs6000-protos.h (rs6000_output_move_128bit): Add

12279

+ declaration.

12280

+ (direct_move_p): Likewise.

12281

+ (quad_load_store_p): Likewise.

12282

+

12283

+ * config/rs6000/rs6000.c (enum rs6000_reg_type): Simplify register

12284

+ classes into bins based on the physical register type.

12285

+ (reg_class_to_reg_type): Likewise.

12286

+ (IS_STD_REG_TYPE): Likewise.

12287

+ (IS_FP_VECT_REG_TYPE): Likewise.

12288

+ (reload_fpr_gpr): Arrays to determine what insn to use if we can

12289

+ use direct move instructions.

12290

+ (reload_gpr_vsx): Likewise.

12291

+ (reload_vsx_gpr): Likewise.

12292

+ (rs6000_init_hard_regno_mode_ok): Precalculate the register type

12293

+ information that is a simplification of register classes. Also

12294

+ precalculate direct move reload helpers.

12295

+ (direct_move_p): New function to return true if the operation can

12296

+ be done as a direct move instruciton.

12297

+ (quad_load_store_p): New function to return true if the operation

12298

+ is a quad memory operation.

12299

+ (rs6000_legitimize_address): If quad memory, only allow register

12300

+ indirect for TImode addresses.

12301

+ (rs6000_legitimate_address_p): Likewise.

12302

+ (enum reload_reg_type): Delete, replace with rs6000_reg_type.

12303

+ (rs6000_reload_register_type): Likewise.

12304

+ (register_to_reg_type): Return register type.

12305

+ (rs6000_secondary_reload_simple_move): New helper function for

12306

+ secondary reload and secondary memory needed to identify anything

12307

+ that is a simple move, and does not need reloading.

12308

+ (rs6000_secondary_reload_direct_move): New helper function for

12309

+ secondary reload to identify cases that can be done with several

12310

+ instructions via the direct move instructions.

12311

+ (rs6000_secondary_reload_move): New helper function for secondary

12312

+ reload to identify moves between register types that can be done.

12313

+ (rs6000_secondary_reload): Add support for quad memory operations

12314

+ and for direct move.

12315

+ (rs6000_secondary_memory_needed): Likewise.

12316

+ (rs6000_debug_secondary_memory_needed): Change argument names.

12317

+ (rs6000_output_move_128bit): New function to return the move to

12318

+ use for 128-bit moves, including knowing about the various

12319

+ limitations of quad memory operations.

12320

+

12321

+ * config/rs6000/vsx.md (vsx_mov<mode>): Add support for quad

12322

+ memory operations. call rs6000_output_move_128bit for the actual

12323

+ instruciton(s) to generate.

12324

+ (vsx_movti_64bit): Likewise.

12325

+

12326

+ * config/rs6000/rs6000.md (UNSPEC_P8V_FMRGOW): New unspec values.

12327

+ (UNSPEC_P8V_MTVSRWZ): Likewise.

12328

+ (UNSPEC_P8V_RELOAD_FROM_GPR): Likewise.

12329

+ (UNSPEC_P8V_MTVSRD): Likewise.

12330

+ (UNSPEC_P8V_XXPERMDI): Likewise.

12331

+ (UNSPEC_P8V_RELOAD_FROM_VSX): Likewise.

12332

+ (UNSPEC_FUSION_GPR): Likewise.

12333

+ (FMOVE128_GPR): New iterator for direct move.

12334

+ (f32_lv): New mode attribute for load/store of SFmode/SDmode

12335

+ values.

12336

+ (f32_sv): Likewise.

12337

+ (f32_dm): Likewise.

12338

+ (zero_extend<mode>di2_internal1): Add support for power8 32-bit

12339

+ loads and direct move instructions.

12340

+ (zero_extendsidi2_lfiwzx): Likewise.

12341

+ (extendsidi2_lfiwax): Likewise.

12342

+ (extendsidi2_nocell): Likewise.

12343

+ (floatsi<mode>2_lfiwax): Likewise.

12344

+ (lfiwax): Likewise.

12345

+ (floatunssi<mode>2_lfiwzx): Likewise.

12346

+ (lfiwzx): Likewise.

12347

+ (fix_trunc<mode>_stfiwx): Likewise.

12348

+ (fixuns_trunc<mode>_stfiwx): Likewise.

12349

+ (mov<mode>_hardfloat, 32-bit floating point): Likewise.

12350

+ (mov<move>_hardfloat64, 64-bit floating point): Likewise.

12351

+ (parity<mode>2_cmpb): Set length/type attr.

12352

+ (unnamed shift right patterns, mov<mode>_internal2): Change type attr

12353

+ for 'mr.' to fast_compare.

12354

+ (bpermd_<mode>): Change type attr to popcnt.

12355

+ (p8_fmrgow_<mode>): New insns for power8 direct move support.

12356

+ (p8_mtvsrwz_1): Likewise.

12357

+ (p8_mtvsrwz_2): Likewise.

12358

+ (reload_fpr_from_gpr<mode>): Likewise.

12359

+ (p8_mtvsrd_1): Likewise.

12360

+ (p8_mtvsrd_2): Likewise.

12361

+ (p8_xxpermdi_<mode>): Likewise.

12362

+ (reload_vsx_from_gpr<mode>): Likewise.

12363

+ (reload_vsx_from_gprsf): Likewise.

12364

+ (p8_mfvsrd_3_<mode>): LIkewise.

12365

+ (reload_gpr_from_vsx<mode>): Likewise.

12366

+ (reload_gpr_from_vsxsf): Likewise.

12367

+ (p8_mfvsrd_4_disf): Likewise.

12368

+ (multi-word GPR splits): Do not split direct moves or quad memory

12369

+ operations.

12370

+

12371

+ Backport from the trunk

12372

+

12373

+ 2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com>

12374

+ Pat Haugen <pthaugen@us.ibm.com>

12375

+ Peter Bergner <bergner@vnet.ibm.com>

12376

+

12377

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

12378

+ Document new power8 builtins.

12379

+

12380

+ * config/rs6000/vector.md (and<mode>3): Add a clobber/scratch of a

12381

+ condition code register, to allow 128-bit logical operations to be

12382

+ done in the VSX or GPR registers.

12383

+ (nor<mode>3): Use the canonical form for nor.

12384

+ (eqv<mode>3): Add expanders for power8 xxleqv, xxlnand, xxlorc,

12385

+ vclz*, and vpopcnt* vector instructions.

12386

+ (nand<mode>3): Likewise.

12387

+ (orc<mode>3): Likewise.

12388

+ (clz<mode>2): LIkewise.

12389

+ (popcount<mode>2): Likewise.

12390

+

12391

+ * config/rs6000/predicates.md (int_reg_operand): Rework tests so

12392

+ that only the GPRs are recognized.

12393

+

12394

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add

12395

+ support for new power8 builtins.

12396

+

12397

+ * config/rs6000/rs6000-builtin.def (xscvspdpn): Add new power8

12398

+ builtin functions.

12399

+ (xscvdpspn): Likewise.

12400

+ (vclz): Likewise.

12401

+ (vclzb): Likewise.

12402

+ (vclzh): Likewise.

12403

+ (vclzw): Likewise.

12404

+ (vclzd): Likewise.

12405

+ (vpopcnt): Likewise.

12406

+ (vpopcntb): Likewise.

12407

+ (vpopcnth): Likewise.

12408

+ (vpopcntw): Likewise.

12409

+ (vpopcntd): Likewise.

12410

+ (vgbbd): Likewise.

12411

+ (vmrgew): Likewise.

12412

+ (vmrgow): Likewise.

12413

+ (eqv): Likewise.

12414

+ (eqv_v16qi3): Likewise.

12415

+ (eqv_v8hi3): Likewise.

12416

+ (eqv_v4si3): Likewise.

12417

+ (eqv_v2di3): Likewise.

12418

+ (eqv_v4sf3): Likewise.

12419

+ (eqv_v2df3): Likewise.

12420

+ (nand): Likewise.

12421

+ (nand_v16qi3): Likewise.

12422

+ (nand_v8hi3): Likewise.

12423

+ (nand_v4si3): Likewise.

12424

+ (nand_v2di3): Likewise.

12425

+ (nand_v4sf3): Likewise.

12426

+ (nand_v2df3): Likewise.

12427

+ (orc): Likewise.

12428

+ (orc_v16qi3): Likewise.

12429

+ (orc_v8hi3): Likewise.

12430

+ (orc_v4si3): Likewise.

12431

+ (orc_v2di3): Likewise.

12432

+ (orc_v4sf3): Likewise.

12433

+ (orc_v2df3): Likewise.

12434

+

12435

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Only

12436

+ allow power8 quad mode in 64-bit.

12437

+ (rs6000_builtin_vectorized_function): Add support to vectorize

12438

+ ISA 2.07 count leading zeros, population count builtins.

12439

+ (rs6000_expand_vector_init): On ISA 2.07 use xscvdpspn to form

12440

+ V4SF vectors instead of xscvdpsp to avoid IEEE related traps.

12441

+ (builtin_function_type): Add vgbbd builtin function which takes an

12442

+ unsigned argument.

12443

+ (altivec_expand_vec_perm_const): Add support for new power8 merge

12444

+ instructions.

12445

+

12446

+ * config/rs6000/vsx.md (VSX_L2): New iterator for 128-bit types,

12447

+ that does not include TImdoe for use with 32-bit.

12448

+ (UNSPEC_VSX_CVSPDPN): Support for power8 xscvdpspn and xscvspdpn

12449

+ instructions.

12450

+ (UNSPEC_VSX_CVDPSPN): Likewise.

12451

+ (vsx_xscvdpspn): Likewise.

12452

+ (vsx_xscvspdpn): Likewise.

12453

+ (vsx_xscvdpspn_scalar): Likewise.

12454

+ (vsx_xscvspdpn_directmove): Likewise.

12455

+ (vsx_and<mode>3): Split logical operations into 32-bit and

12456

+ 64-bit. Add support to do logical operations on TImode as well as

12457

+ VSX vector types. Allow logical operations to be done in either

12458

+ VSX registers or in general purpose registers in 64-bit mode. Add

12459

+ splitters if GPRs were used. For AND, add clobber of CCmode to

12460

+ allow use of ANDI on GPRs. Rewrite nor to use the canonical RTL

12461

+ encoding.

12462

+ (vsx_and<mode>3_32bit): Likewise.

12463

+ (vsx_and<mode>3_64bit): Likewise.

12464

+ (vsx_ior<mode>3): Likewise.

12465

+ (vsx_ior<mode>3_32bit): Likewise.

12466

+ (vsx_ior<mode>3_64bit): Likewise.

12467

+ (vsx_xor<mode>3): Likewise.

12468

+ (vsx_xor<mode>3_32bit): Likewise.

12469

+ (vsx_xor<mode>3_64bit): Likewise.

12470

+ (vsx_one_cmpl<mode>2): Likewise.

12471

+ (vsx_one_cmpl<mode>2_32bit): Likewise.

12472

+ (vsx_one_cmpl<mode>2_64bit): Likewise.

12473

+ (vsx_nor<mode>3): Likewise.

12474

+ (vsx_nor<mode>3_32bit): Likewise.

12475

+ (vsx_nor<mode>3_64bit): Likewise.

12476

+ (vsx_andc<mode>3): Likewise.

12477

+ (vsx_andc<mode>3_32bit): Likewise.

12478

+ (vsx_andc<mode>3_64bit): Likewise.

12479

+ (vsx_eqv<mode>3_32bit): Add support for power8 xxleqv, xxlnand,

12480

+ and xxlorc instructions.

12481

+ (vsx_eqv<mode>3_64bit): Likewise.

12482

+ (vsx_nand<mode>3_32bit): Likewise.

12483

+ (vsx_nand<mode>3_64bit): Likewise.

12484

+ (vsx_orc<mode>3_32bit): Likewise.

12485

+ (vsx_orc<mode>3_64bit): Likewise.

12486

+

12487

+ * config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Update comment.

12488

+

12489

+ * config/rs6000/altivec.md (UNSPEC_VGBBD): Add power8 vgbbd

12490

+ instruction.

12491

+ (p8_vmrgew): Add power8 vmrgew and vmrgow instructions.

12492

+ (p8_vmrgow): Likewise.

12493

+ (altivec_and<mode>3): Add clobber of CCmode to allow AND using

12494

+ GPRs to be split under VSX.

12495

+ (p8v_clz<mode>2): Add power8 count leading zero support.

12496

+ (p8v_popcount<mode>2): Add power8 population count support.

12497

+ (p8v_vgbbd): Add power8 gather bits by bytes by doubleword

12498

+ support.

12499

+

12500

+ * config/rs6000/rs6000.md (eqv<mode>3): Add support for powerp eqv

12501

+ instruction.

12502

+

12503

+ * config/rs6000/altivec.h (vec_eqv): Add defines to export power8

12504

+ builtin functions.

12505

+ (vec_nand): Likewise.

12506

+ (vec_vclz): Likewise.

12507

+ (vec_vclzb): Likewise.

12508

+ (vec_vclzd): Likewise.

12509

+ (vec_vclzh): Likewise.

12510

+ (vec_vclzw): Likewise.

12511

+ (vec_vgbbd): Likewise.

12512

+ (vec_vmrgew): Likewise.

12513

+ (vec_vmrgow): Likewise.

12514

+ (vec_vpopcnt): Likewise.

12515

+ (vec_vpopcntb): Likewise.

12516

+ (vec_vpopcntd): Likewise.

12517

+ (vec_vpopcnth): Likewise.

12518

+ (vec_vpopcntw): Likewise.

12519

+

12520

+ Backport from trunk

12521

+

12522

+ 2013-05-29 Michael Meissner <meissner@linux.vnet.ibm.com>

12523

+ Pat Haugen <pthaugen@us.ibm.com>

12524

+ Peter Bergner <bergner@vnet.ibm.com>

12525

+

12526

+ * config/rs6000/vector.md (VEC_I): Add support for new power8 V2DI

12527

+ instructions.

12528

+ (VEC_A): Likewise.

12529

+ (VEC_C): Likewise.

12530

+ (vrotl<mode>3): Likewise.

12531

+ (vashl<mode>3): Likewise.

12532

+ (vlshr<mode>3): Likewise.

12533

+ (vashr<mode>3): Likewise.

12534

+

12535

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add

12536

+ support for power8 V2DI builtins.

12537

+

12538

+ * config/rs6000/rs6000-builtin.def (abs_v2di): Add support for

12539

+ power8 V2DI builtins.

12540

+ (vupkhsw): Likewise.

12541

+ (vupklsw): Likewise.

12542

+ (vaddudm): Likewise.

12543

+ (vminsd): Likewise.

12544

+ (vmaxsd): Likewise.

12545

+ (vminud): Likewise.

12546

+ (vmaxud): Likewise.

12547

+ (vpkudum): Likewise.

12548

+ (vpksdss): Likewise.

12549

+ (vpkudus): Likewise.

12550

+ (vpksdus): Likewise.

12551

+ (vrld): Likewise.

12552

+ (vsld): Likewise.

12553

+ (vsrd): Likewise.

12554

+ (vsrad): Likewise.

12555

+ (vsubudm): Likewise.

12556

+ (vcmpequd): Likewise.

12557

+ (vcmpgtsd): Likewise.

12558

+ (vcmpgtud): Likewise.

12559

+ (vcmpequd_p): Likewise.

12560

+ (vcmpgtsd_p): Likewise.

12561

+ (vcmpgtud_p): Likewise.

12562

+ (vupkhsw): Likewise.

12563

+ (vupklsw): Likewise.

12564

+ (vaddudm): Likewise.

12565

+ (vmaxsd): Likewise.

12566

+ (vmaxud): Likewise.

12567

+ (vminsd): Likewise.

12568

+ (vminud): Likewise.

12569

+ (vpksdss): Likewise.

12570

+ (vpksdus): Likewise.

12571

+ (vpkudum): Likewise.

12572

+ (vpkudus): Likewise.

12573

+ (vrld): Likewise.

12574

+ (vsld): Likewise.

12575

+ (vsrad): Likewise.

12576

+ (vsrd): Likewise.

12577

+ (vsubudm): Likewise.

12578

+

12579

+ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add

12580

+ support for power8 V2DI instructions.

12581

+

12582

+ * config/rs6000/altivec.md (UNSPEC_VPKUHUM): Add support for

12583

+ power8 V2DI instructions. Combine pack and unpack insns to use an

12584

+ iterator for each mode. Check whether a particular mode supports

12585

+ Altivec instructions instead of just checking TARGET_ALTIVEC.

12586

+ (UNSPEC_VPKUWUM): Likewise.

12587

+ (UNSPEC_VPKSHSS): Likewise.

12588

+ (UNSPEC_VPKSWSS): Likewise.

12589

+ (UNSPEC_VPKUHUS): Likewise.

12590

+ (UNSPEC_VPKSHUS): Likewise.

12591

+ (UNSPEC_VPKUWUS): Likewise.

12592

+ (UNSPEC_VPKSWUS): Likewise.

12593

+ (UNSPEC_VPACK_SIGN_SIGN_SAT): Likewise.

12594

+ (UNSPEC_VPACK_SIGN_UNS_SAT): Likewise.

12595

+ (UNSPEC_VPACK_UNS_UNS_SAT): Likewise.

12596

+ (UNSPEC_VPACK_UNS_UNS_MOD): Likewise.

12597

+ (UNSPEC_VUPKHSB): Likewise.

12598

+ (UNSPEC_VUNPACK_HI_SIGN): Likewise.

12599

+ (UNSPEC_VUNPACK_LO_SIGN): Likewise.

12600

+ (UNSPEC_VUPKHSH): Likewise.

12601

+ (UNSPEC_VUPKLSB): Likewise.

12602

+ (UNSPEC_VUPKLSH): Likewise.

12603

+ (VI2): Likewise.

12604

+ (VI_char): Likewise.

12605

+ (VI_scalar): Likewise.

12606

+ (VI_unit): Likewise.

12607

+ (VP): Likewise.

12608

+ (VP_small): Likewise.

12609

+ (VP_small_lc): Likewise.

12610

+ (VU_char): Likewise.

12611

+ (add<mode>3): Likewise.

12612

+ (altivec_vaddcuw): Likewise.

12613

+ (altivec_vaddu<VI_char>s): Likewise.

12614

+ (altivec_vadds<VI_char>s): Likewise.

12615

+ (sub<mode>3): Likewise.

12616

+ (altivec_vsubcuw): Likewise.

12617

+ (altivec_vsubu<VI_char>s): Likewise.

12618

+ (altivec_vsubs<VI_char>s): Likewise.

12619

+ (altivec_vavgs<VI_char>): Likewise.

12620

+ (altivec_vcmpbfp): Likewise.

12621

+ (altivec_eq<mode>): Likewise.

12622

+ (altivec_gt<mode>): Likewise.

12623

+ (altivec_gtu<mode>): Likewise.

12624

+ (umax<mode>3): Likewise.

12625

+ (smax<mode>3): Likewise.

12626

+ (umin<mode>3): Likewise.

12627

+ (smin<mode>3): Likewise.

12628

+ (altivec_vpkuhum): Likewise.

12629

+ (altivec_vpkuwum): Likewise.

12630

+ (altivec_vpkshss): Likewise.

12631

+ (altivec_vpkswss): Likewise.

12632

+ (altivec_vpkuhus): Likewise.

12633

+ (altivec_vpkshus): Likewise.

12634

+ (altivec_vpkuwus): Likewise.

12635

+ (altivec_vpkswus): Likewise.

12636

+ (altivec_vpks<VI_char>ss): Likewise.

12637

+ (altivec_vpks<VI_char>us): Likewise.

12638

+ (altivec_vpku<VI_char>us): Likewise.

12639

+ (altivec_vpku<VI_char>um): Likewise.

12640

+ (altivec_vrl<VI_char>): Likewise.

12641

+ (altivec_vsl<VI_char>): Likewise.

12642

+ (altivec_vsr<VI_char>): Likewise.

12643

+ (altivec_vsra<VI_char>): Likewise.

12644

+ (altivec_vsldoi_<mode>): Likewise.

12645

+ (altivec_vupkhsb): Likewise.

12646

+ (altivec_vupkhs<VU_char>): Likewise.

12647

+ (altivec_vupkls<VU_char>): Likewise.

12648

+ (altivec_vupkhsh): Likewise.

12649

+ (altivec_vupklsb): Likewise.

12650

+ (altivec_vupklsh): Likewise.

12651

+ (altivec_vcmpequ<VI_char>_p): Likewise.

12652

+ (altivec_vcmpgts<VI_char>_p): Likewise.

12653

+ (altivec_vcmpgtu<VI_char>_p): Likewise.

12654

+ (abs<mode>2): Likewise.

12655

+ (vec_unpacks_hi_v16qi): Likewise.

12656

+ (vec_unpacks_hi_v8hi): Likewise.

12657

+ (vec_unpacks_lo_v16qi): Likewise.

12658

+ (vec_unpacks_hi_<VP_small_lc>): Likewise.

12659

+ (vec_unpacks_lo_v8hi): Likewise.

12660

+ (vec_unpacks_lo_<VP_small_lc>): Likewise.

12661

+ (vec_pack_trunc_v8h): Likewise.

12662

+ (vec_pack_trunc_v4si): Likewise.

12663

+ (vec_pack_trunc_<mode>): Likewise.

12664

+

12665

+ * config/rs6000/altivec.h (vec_vaddudm): Add defines for power8

12666

+ V2DI builtins.

12667

+ (vec_vmaxsd): Likewise.

12668

+ (vec_vmaxud): Likewise.

12669

+ (vec_vminsd): Likewise.

12670

+ (vec_vminud): Likewise.

12671

+ (vec_vpksdss): Likewise.

12672

+ (vec_vpksdus): Likewise.

12673

+ (vec_vpkudum): Likewise.

12674

+ (vec_vpkudus): Likewise.

12675

+ (vec_vrld): Likewise.

12676

+ (vec_vsld): Likewise.

12677

+ (vec_vsrad): Likewise.

12678

+ (vec_vsrd): Likewise.

12679

+ (vec_vsubudm): Likewise.

12680

+ (vec_vupkhsw): Likewise.

12681

+ (vec_vupklsw): Likewise.

12682

+

12683

+ 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>

12684

+ Pat Haugen <pthaugen@us.ibm.com>

12685

+ Peter Bergner <bergner@vnet.ibm.com>

12686

+

12687

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Add

12688

+ documentation for the power8 crypto builtins.

12689

+

12690

+ * config/rs6000/t-rs6000 (MD_INCLUDES): Add crypto.md.

12691

+

12692

+ * config/rs6000/rs6000-builtin.def (BU_P8V_AV_1): Add support

12693

+ macros for defining power8 builtin functions.

12694

+ (BU_P8V_AV_2): Likewise.

12695

+ (BU_P8V_AV_P): Likewise.

12696

+ (BU_P8V_VSX_1): Likewise.

12697

+ (BU_P8V_OVERLOAD_1): Likewise.

12698

+ (BU_P8V_OVERLOAD_2): Likewise.

12699

+ (BU_CRYPTO_1): Likewise.

12700

+ (BU_CRYPTO_2): Likewise.

12701

+ (BU_CRYPTO_3): Likewise.

12702

+ (BU_CRYPTO_OVERLOAD_1): Likewise.

12703

+ (BU_CRYPTO_OVERLOAD_2): Likewise.

12704

+ (XSCVSPDP): Fix typo, point to the correct instruction.

12705

+ (VCIPHER): Add power8 crypto builtins.

12706

+ (VCIPHERLAST): Likewise.

12707

+ (VNCIPHER): Likewise.

12708

+ (VNCIPHERLAST): Likewise.

12709

+ (VPMSUMB): Likewise.

12710

+ (VPMSUMH): Likewise.

12711

+ (VPMSUMW): Likewise.

12712

+ (VPERMXOR_V2DI): Likewise.

12713

+ (VPERMXOR_V4SI: Likewise.

12714

+ (VPERMXOR_V8HI: Likewise.

12715

+ (VPERMXOR_V16QI: Likewise.

12716

+ (VSHASIGMAW): Likewise.

12717

+ (VSHASIGMAD): Likewise.

12718

+ (VPMSUM): Likewise.

12719

+ (VPERMXOR): Likewise.

12720

+ (VSHASIGMA): Likewise.

12721

+

12722

+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define

12723

+ __CRYPTO__ if the crypto instructions are available.

12724

+ (altivec_overloaded_builtins): Add support for overloaded power8

12725

+ builtins.

12726

+

12727

+ * config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Add

12728

+ support for power8 crypto builtins.

12729

+ (builtin_function_type): Likewise.

12730

+ (altivec_init_builtins): Add support for builtins that take vector

12731

+ long long (V2DI) arguments.

12732

+

12733

+ * config/rs6000/crypto.md: New file, define power8 crypto

12734

+ instructions.

12735

+

12736

+ 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>

12737

+ Pat Haugen <pthaugen@us.ibm.com>

12738

+ Peter Bergner <bergner@vnet.ibm.com>

12739

+

12740

+ * doc/invoke.texi (Option Summary): Add power8 options.

12741

+ (RS/6000 and PowerPC Options): Likewise.

12742

+

12743

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Update to use

12744

+ constraints.md instead of rs6000.h. Reorder w* constraints. Add

12745

+ wm, wn, wr documentation.

12746

+

12747

+ * gcc/config/rs6000/constraints.md (wm): New constraint for VSX

12748

+ registers if direct move instructions are enabled.

12749

+ (wn): New constraint for no registers.

12750

+ (wq): New constraint for quad word even GPR registers.

12751

+ (wr): New constraint if 64-bit instructions are enabled.

12752

+ (wv): New constraint if power8 vector instructions are enabled.

12753

+ (wQ): New constraint for quad word memory locations.

12754

+

12755

+ * gcc/config/rs6000/predicates.md (const_0_to_15_operand): New

12756

+ constraint for 0..15 for crypto instructions.

12757

+ (gpc_reg_operand): If VSX allow registers in VSX registers as well

12758

+ as GPR and floating point registers.

12759

+ (int_reg_operand): New predicate to match only GPR registers.

12760

+ (base_reg_operand): New predicate to match base registers.

12761

+ (quad_int_reg_operand): New predicate to match even GPR registers

12762

+ for quad memory operations.

12763

+ (vsx_reg_or_cint_operand): New predicate to allow vector logical

12764

+ operations in both GPR and VSX registers.

12765

+ (quad_memory_operand): New predicate for quad memory operations.

12766

+ (reg_or_indexed_operand): New predicate for direct move support.

12767

+

12768

+ * gcc/config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED):

12769

+ Inherit from ISA_2_4_MASKS, not ISA_2_2_MASKS.

12770

+ (ISA_2_7_MASKS_SERVER): New mask for ISA 2.07 (i.e. power8).

12771

+ (POWERPC_MASKS): Add power8 options.

12772

+ (power8 cpu): Use ISA_2_7_MASKS_SERVER instead of specifying the

12773

+ various options.

12774

+

12775

+ * gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):

12776

+ Define _ARCH_PWR8 and __POWER8_VECTOR__ for power8.

12777

+

12778

+ * gcc/config/rs6000/rs6000.opt (-mvsx-timode): Add documentation.

12779

+ (-mpower8-fusion): New power8 options.

12780

+ (-mpower8-fusion-sign): Likewise.

12781

+ (-mpower8-vector): Likewise.

12782

+ (-mcrypto): Likewise.

12783

+ (-mdirect-move): Likewise.

12784

+ (-mquad-memory): Likewise.

12785

+

12786

+ * gcc/config/rs6000/rs6000.c (power8_cost): Initial definition for

12787

+ power8.

12788

+ (rs6000_hard_regno_mode_ok): Make PTImode only match even GPR

12789

+ registers.

12790

+ (rs6000_debug_reg_print): Print the base register class if

12791

+ -mdebug=reg.

12792

+ (rs6000_debug_vector_unit): Add p8_vector.

12793

+ (rs6000_debug_reg_global): If -mdebug=reg, print power8 constraint

12794

+ definitions. Also print fusion state.

12795

+ (rs6000_init_hard_regno_mode_ok): Set up power8 constraints.

12796

+ (rs6000_builtin_mask_calculate): Add power8 builtin support.

12797

+ (rs6000_option_override_internal): Add support for power8.

12798

+ (rs6000_common_init_builtins): Add debugging for skipped builtins

12799

+ if -mdebug=builtin.

12800

+ (rs6000_adjust_cost): Add power8 support.

12801

+ (rs6000_issue_rate): Likewise.

12802

+ (insn_must_be_first_in_group): Likewise.

12803

+ (insn_must_be_last_in_group): Likewise.

12804

+ (force_new_group): Likewise.

12805

+ (rs6000_register_move_cost): Likewise.

12806

+ (rs6000_opt_masks): Likewise.

12807

+

12808

+ * config/rs6000/rs6000.h (ASM_CPU_POWER8_SPEC): If we don't have a

12809

+ power8 capable assembler, default to power7 options.

12810

+ (TARGET_DIRECT_MOVE): Likewise.

12811

+ (TARGET_CRYPTO): Likewise.

12812

+ (TARGET_P8_VECTOR): Likewise.

12813

+ (VECTOR_UNIT_P8_VECTOR_P): Define power8 vector support.

12814

+ (VECTOR_UNIT_VSX_OR_P8_VECTOR_P): Likewise.

12815

+ (VECTOR_MEM_P8_VECTOR_P): Likewise.

12816

+ (VECTOR_MEM_VSX_OR_P8_VECTOR_P): Likewise.

12817

+ (VECTOR_MEM_ALTIVEC_OR_VSX_P): Likewise.

12818

+ (TARGET_XSCVDPSPN): Likewise.

12819

+ (TARGET_XSCVSPDPN): Likewsie.

12820

+ (TARGET_SYNC_HI_QI): Likewise.

12821

+ (TARGET_SYNC_TI): Likewise.

12822

+ (MASK_CRYPTO): Likewise.

12823

+ (MASK_DIRECT_MOVE): Likewise.

12824

+ (MASK_P8_FUSION): Likewise.

12825

+ (MASK_P8_VECTOR): Likewise.

12826

+ (REG_ALLOC_ORDER): Move fr13 to be lower in priority so that the

12827

+ TFmode temporary used by some of the direct move instructions to

12828

+ get two FP temporary registers does not force creation of a stack

12829

+ frame.

12830

+ (VLOGICAL_REGNO_P): Allow vector logical operations in GPRs.

12831

+ (MODES_TIEABLE_P): Move the VSX tests above the Altivec tests so

12832

+ that any VSX registers are tieable, even if they are also an

12833

+ Altivec vector mode.

12834

+ (r6000_reg_class_enum): Add wm, wr, wv constraints.

12835

+ (RS6000_BTM_P8_VECTOR): Power8 builtin support.

12836

+ (RS6000_BTM_CRYPTO): Likewise.

12837

+ (RS6000_BTM_COMMON): Likewise.

12838

+

12839

+ * config/rs6000/rs6000.md (cpu attribute): Add power8.

12840

+ * config/rs6000/rs6000-opts.h (PROCESSOR_POWER8): Likewise.

12841

+ (enum rs6000_vector): Add power8 vector support.

12842

+

12843

+

12844

+ Backport from mainline

12845

+ 2013-03-20 Pat Haugen <pthaugen@us.ibm.com>

12846

+

12847

+ * config/rs6000/predicates.md (indexed_address, update_address_mem

12848

+ update_indexed_address_mem): New predicates.

12849

+ * config/rs6000/vsx.md (vsx_extract_<mode>_zero): Set correct "type"

12850

+ attribute for load/store instructions.

12851

+ * config/rs6000/dfp.md (movsd_store): Likewise.

12852

+ (movsd_load): Likewise.

12853

+ * config/rs6000/rs6000.md (zero_extend<mode>di2_internal1): Likewise.

12854

+ (unnamed HI->DI extend define_insn): Likewise.

12855

+ (unnamed SI->DI extend define_insn): Likewise.

12856

+ (unnamed QI->SI extend define_insn): Likewise.

12857

+ (unnamed QI->HI extend define_insn): Likewise.

12858

+ (unnamed HI->SI extend define_insn): Likewise.

12859

+ (unnamed HI->SI extend define_insn): Likewise.

12860

+ (extendsfdf2_fpr): Likewise.

12861

+ (movsi_internal1): Likewise.

12862

+ (movsi_internal1_single): Likewise.

12863

+ (movhi_internal): Likewise.

12864

+ (movqi_internal): Likewise.

12865

+ (movcc_internal1): Correct mnemonic for stw insn. Set correct "type"

12866

+ attribute for load/store instructions.

12867

+ (mov<mode>_hardfloat): Set correct "type" attribute for load/store

12868

+ instructions.

12869

+ (mov<mode>_softfloat): Likewise.

12870

+ (mov<mode>_hardfloat32): Likewise.

12871

+ (mov<mode>_hardfloat64): Likewise.

12872

+ (mov<mode>_softfloat64): Likewise.

12873

+ (movdi_internal32): Likewise.

12874

+ (movdi_internal64): Likewise.

12875

+ (probe_stack_<mode>): Likewise.

12876

+

12877

+ Backport from mainline

12878

+ 2013-03-20 Michael Meissner <meissner@linux.vnet.ibm.com>

12879

+

12880

+ * config/rs6000/vector.md (VEC_R): Add 32-bit integer, binary

12881

+ floating point, and decimal floating point to reload iterator.

12882

+

12883

+ * config/rs6000/constraints.md (wl constraint): New constraints to

12884

+ return FLOAT_REGS if certain options are used to reduce the number

12885

+ of separate patterns that exist in the file.

12886

+ (wx constraint): Likewise.

12887

+ (wz constraint): Likewise.

12888

+

12889

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): If

12890

+ -mdebug=reg, print wg, wl, wx, and wz constraints.

12891

+ (rs6000_init_hard_regno_mode_ok): Initialize new constraints.

12892

+ Initialize the reload functions for 64-bit binary/decimal floating

12893

+ point types.

12894

+ (reg_offset_addressing_ok_p): If we are on a power7 or later, use

12895

+ LFIWZX and STFIWX to load/store 32-bit decimal types, and don't

12896

+ create the buffer on the stack to overcome not having a 32-bit

12897

+ load and store.

12898

+ (rs6000_emit_move): Likewise.

12899

+ (rs6000_secondary_memory_needed_rtx): Likewise.

12900

+ (rs6000_alloc_sdmode_stack_slot): Likewise.

12901

+ (rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f

12902

+ via xxlxor, just like DFmode 0.0.

12903

+

12904

+ * config/rs6000/rs6000.h (TARGET_NO_SDMODE_STACK): New macro)

12905

+ (define as 1 if we are running on a power7 or newer.

12906

+ (enum r6000_reg_class_enum): Add new constraints.

12907

+

12908

+ * config/rs6000/dfp.md (movsd): Delete, combine with binary

12909

+ floating point moves in rs6000.md. Combine power6x (mfpgpr) moves

12910

+ with other moves by using conditional constraits (wg). Use LFIWZX

12911

+ and STFIWX for loading SDmode on power7. Use xxlxor to create

12912

+ 0.0f.

12913

+ (movsd splitter): Likewise.

12914

+ (movsd_hardfloat): Likewise.

12915

+ (movsd_softfloat): Likewise.

12916

+

12917

+ * config/rs6000/rs6000.md (FMOVE32): New iterators to combine

12918

+ binary and decimal floating point moves.

12919

+ (fmove_ok): New attributes to combine binary and decimal floating

12920

+ point moves, and to combine power6x (mfpgpr) moves along normal

12921

+ floating moves.

12922

+ (real_value_to_target): Likewise.

12923

+ (f32_lr): Likewise.

12924

+ (f32_lm): Likewise.

12925

+ (f32_li): Likewise.

12926

+ (f32_sr): Likewise.

12927

+ (f32_sm): Likewise.

12928

+ (f32_si): Likewise.

12929

+ (movsf): Combine binary and decimal floating point moves. Combine

12930

+ power6x (mfpgpr) moves with other moves by using conditional

12931

+ constraits (wg). Use LFIWZX and STFIWX for loading SDmode on

12932

+ power7.

12933

+ (mov<mode> for SFmode/SDmode); Likewise.

12934

+ (SFmode/SDmode splitters): Likewise.

12935

+ (movsf_hardfloat): Likewise.

12936

+ (mov<mode>_hardfloat for SFmode/SDmode): Likewise.

12937

+ (movsf_softfloat): Likewise.

12938

+ (mov<mode>_softfloat for SFmode/SDmode): Likewise.

12939

+

12940

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wl)

12941

+ (wx and wz constraints.

12942

+

12943

+ * config/rs6000/constraints.md (wg constraint): New constraint to

12944

+ return FLOAT_REGS if -mmfpgpr (power6x) was used.

12945

+

12946

+ * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wg

12947

+ constraint.

12948

+

12949

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): If

12950

+ -mdebug=reg, print wg, wl, wx, and wz constraints.

12951

+ (rs6000_init_hard_regno_mode_ok): Initialize new constraints.

12952

+ Initialize the reload functions for 64-bit binary/decimal floating

12953

+ point types.

12954

+ (reg_offset_addressing_ok_p): If we are on a power7 or later, use

12955

+ LFIWZX and STFIWX to load/store 32-bit decimal types, and don't

12956

+ create the buffer on the stack to overcome not having a 32-bit

12957

+ load and store.

12958

+ (rs6000_emit_move): Likewise.

12959

+ (rs6000_secondary_memory_needed_rtx): Likewise.

12960

+ (rs6000_alloc_sdmode_stack_slot): Likewise.

12961

+ (rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f

12962

+ via xxlxor, just like DFmode 0.0.

12963

+

12964

+

12965

+ * config/rs6000/dfp.md (movdd): Delete, combine with binary

12966

+ floating point moves in rs6000.md. Combine power6x (mfpgpr) moves

12967

+ with other moves by using conditional constraits (wg). Use LFIWZX

12968

+ and STFIWX for loading SDmode on power7.

12969

+ (movdd splitters): Likewise.

12970

+ (movdd_hardfloat32): Likewise.

12971

+ (movdd_softfloat32): Likewise.

12972

+ (movdd_hardfloat64_mfpgpr): Likewise.

12973

+ (movdd_hardfloat64): Likewise.

12974

+ (movdd_softfloat64): Likewise.

12975

+

12976

+ * config/rs6000/rs6000.md (FMOVE64): New iterators to combine

12977

+ 64-bit binary and decimal floating point moves.

12978

+ (FMOVE64X): Likewise.

12979

+ (movdf): Combine 64-bit binary and decimal floating point moves.

12980

+ Combine power6x (mfpgpr) moves with other moves by using

12981

+ conditional constraits (wg).

12982

+ (mov<mode> for DFmode/DDmode): Likewise.

12983

+ (DFmode/DDmode splitters): Likewise.

12984

+ (movdf_hardfloat32): Likewise.

12985

+ (mov<mode>_hardfloat32 for DFmode/DDmode): Likewise.

12986

+ (movdf_softfloat32): Likewise.

12987

+ (movdf_hardfloat64_mfpgpr): Likewise.

12988

+ (movdf_hardfloat64): Likewise.

12989

+ (mov<mode>_hardfloat64 for DFmode/DDmode): Likewise.

12990

+ (movdf_softfloat64): Likewise.

12991

+ (mov<mode>_softfloat64 for DFmode/DDmode): Likewise.

12992

+ (reload_<mode>_load): Move to later in the file so they aren't in

12993

+ the middle of the floating point move insns.

12994

+ (reload_<mode>_store): Likewise.

12995

+

12996

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wg

12997

+ constraint.

12998

+

12999

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print out wg

13000

+ constraint if -mdebug=reg.

13001

+ (rs6000_initi_hard_regno_mode_ok): Enable wg constraint if

13002

+ -mfpgpr. Enable using dd reload support if needed.

13003

+

13004

+ * config/rs6000/dfp.md (movtd): Delete, combine with 128-bit

13005

+ binary and decimal floating point moves in rs6000.md.

13006

+ (movtd_internal): Likewise.

13007

+

13008

+ * config/rs6000/rs6000.md (FMOVE128): Combine 128-bit binary and

13009

+ decimal floating point moves.

13010

+ (movtf): Likewise.

13011

+ (movtf_internal): Likewise.

13012

+ (mov<mode>_internal, TDmode/TFmode): Likewise.

13013

+ (movtf_softfloat): Likewise.

13014

+ (mov<mode>_softfloat, TDmode/TFmode): Likewise.

13015

+

13016

+ * config/rs6000/rs6000.md (movdi_mfpgpr): Delete, combine with

13017

+ movdi_internal64, using wg constraint for move direct operations.

13018

+ (movdi_internal64): Likewise.

13019

+

13020

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print

13021

+ MODES_TIEABLE_P for selected modes. Print the numerical value of

13022

+ the various virtual registers. Use GPR/FPR first/last values)

13023

+ (instead of hard coding the register numbers. Print which modes

13024

+ have reload functions registered.

13025

+ (rs6000_option_override_internal): If -mdebug=reg, trace the

13026

+ options settings before/after setting cpu, target and subtarget

13027

+ settings.

13028

+ (rs6000_secondary_reload_trace): Improve the RTL dump for

13029

+ -mdebug=addr and for secondary reload failures in

13030

+ rs6000_secondary_reload_inner.

13031

+ (rs6000_secondary_reload_fail): Likewise.

13032

+ (rs6000_secondary_reload_inner): Likewise.

13033

+

13034

+ * config/rs6000/rs6000.md (FIRST_GPR_REGNO): Add convenience

13035

+ macros for first/last GPR and FPR registers.

13036

+ (LAST_GPR_REGNO): Likewise.

13037

+ (FIRST_FPR_REGNO): Likewise.

13038

+ (LAST_FPR_REGNO): Likewise.

13039

+

13040

+ * config/rs6000/vector.md (mul<mode>3): Use the combined macro

13041

+ VECTOR_UNIT_ALTIVEC_OR_VSX_P instead of separate calls to

13042

+ VECTOR_UNIT_ALTIVEC_P and VECTOR_UNIT_VSX_P.

13043

+ (vcond<mode><mode>): Likewise.

13044

+ (vcondu<mode><mode>): Likewise.

13045

+ (vector_gtu<mode>): Likewise.

13046

+ (vector_gte<mode>): Likewise.

13047

+ (xor<mode>3): Don't allow logical operations on TImode in 32-bit

13048

+ to prevent the compiler from converting DImode operations to

13049

+ TImode.

13050

+ (ior<mode>3): Likewise.

13051

+ (and<mode>3): Likewise.

13052

+ (one_cmpl<mode>2): Likewise.

13053

+ (nor<mode>3): Likewise.

13054

+ (andc<mode>3): Likewise.

13055

+

13056

+ * config/rs6000/constraints.md (wt constraint): New constraint

13057

+ that returns VSX_REGS if TImode is allowed in VSX registers.

13058

+

13059

+ * config/rs6000/predicates.md (easy_fp_constant): 0.0f is an easy

13060

+ constant under VSX.

13061

+

13062

+ * config/rs6000/rs6000-modes.def (PTImode): Define, PTImode is

13063

+ similar to TImode, but it is restricted to being in the GPRs.

13064

+

13065

+ * config/rs6000/rs6000.opt (-mvsx-timode): New switch to allow

13066

+ TImode to occupy a single VSX register.

13067

+

13068

+ * config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Default to

13069

+ -mvsx-timode for power7/power8.

13070

+ (power7 cpu): Likewise.

13071

+ (power8 cpu): Likewise.

13072

+

13073

+ * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Make

13074

+ sure that TFmode/TDmode take up two registers if they are ever

13075

+ allowed in the upper VSX registers.

13076

+ (rs6000_hard_regno_mode_ok): If -mvsx-timode, allow TImode in VSX

13077

+ registers.

13078

+ (rs6000_init_hard_regno_mode_ok): Likewise.

13079

+ (rs6000_debug_reg_global): Add debugging for PTImode and wt

13080

+ constraint. Print if LRA is turned on.

13081

+ (rs6000_option_override_internal): Give an error if -mvsx-timode

13082

+ and VSX is not enabled.

13083

+ (invalid_e500_subreg): Handle PTImode, restricting it to GPRs. If

13084

+ -mvsx-timode, restrict TImode to reg+reg addressing, and PTImode

13085

+ to reg+offset addressing. Use PTImode when checking offset

13086

+ addresses for validity.

13087

+ (reg_offset_addressing_ok_p): Likewise.

13088

+ (rs6000_legitimate_offset_address_p): Likewise.

13089

+ (rs6000_legitimize_address): Likewise.

13090

+ (rs6000_legitimize_reload_address): Likewise.

13091

+ (rs6000_legitimate_address_p): Likewise.

13092

+ (rs6000_eliminate_indexed_memrefs): Likewise.

13093

+ (rs6000_emit_move): Likewise.

13094

+ (rs6000_secondary_reload): Likewise.

13095

+ (rs6000_secondary_reload_inner): Handle PTImode. Allow 64-bit

13096

+ reloads to fpr registers to continue to use reg+offset addressing)

13097

+ (but 64-bit reloads to altivec registers need reg+reg addressing.

13098

+ Drop test for PRE_MODIFY, since VSX loads/stores no longer support

13099

+ it. Treat LO_SUM like a PLUS operation.

13100

+ (rs6000_secondary_reload_class): If type is 64-bit, prefer to use

13101

+ FLOAT_REGS instead of VSX_RGS to allow use of reg+offset

13102

+ addressing.

13103

+ (rs6000_cannot_change_mode_class): Do not allow TImode in VSX

13104

+ registers to share a register with a smaller sized type, since VSX

13105

+ puts scalars in the upper 64-bits.

13106

+ (print_operand): Add support for PTImode.

13107

+ (rs6000_register_move_cost): Use VECTOR_MEM_VSX_P instead of

13108

+ VECTOR_UNIT_VSX_P to catch types that can be loaded in VSX

13109

+ registers, but don't have arithmetic support.

13110

+ (rs6000_memory_move_cost): Add test for VSX.

13111

+ (rs6000_opt_masks): Add -mvsx-timode.

13112

+

13113

+ * config/rs6000/vsx.md (VSm): Change to use 64-bit aligned moves

13114

+ for TImode.

13115

+ (VSs): Likewise.

13116

+ (VSr): Use wt constraint for TImode.

13117

+ (VSv): Drop TImode support.

13118

+ (vsx_movti): Delete, replace with versions for 32-bit and 64-bit.

13119

+ (vsx_movti_64bit): Likewise.

13120

+ (vsx_movti_32bit): Likewise.

13121

+ (vec_store_<mode>): Use VSX iterator instead of vector iterator.

13122

+ (vsx_and<mode>3): Delete use of '?' constraint on inputs, just put

13123

+ one '?' on the appropriate output constraint. Do not allow TImode

13124

+ logical operations on 32-bit systems.

13125

+ (vsx_ior<mode>3): Likewise.

13126

+ (vsx_xor<mode>3): Likewise.

13127

+ (vsx_one_cmpl<mode>2): Likewise.

13128

+ (vsx_nor<mode>3): Likewise.

13129

+ (vsx_andc<mode>3): Likewise.

13130

+ (vsx_concat_<mode>): Likewise.

13131

+ (vsx_xxpermdi_<mode>): Fix thinko for non V2DF/V2DI modes.

13132

+

13133

+ * config/rs6000/rs6000.h (MASK_VSX_TIMODE): Map from

13134

+ OPTION_MASK_VSX_TIMODE.

13135

+ (enum rs6000_reg_class_enum): Add RS6000_CONSTRAINT_wt.

13136

+ (STACK_SAVEAREA_MODE): Use PTImode instead of TImode.

13137

+

13138

+ * config/rs6000/rs6000.md (INT mode attribute): Add PTImode.

13139

+ (TI2 iterator): New iterator for TImode, PTImode.

13140

+ (wd mode attribute): Add values for vector types.

13141

+ (movti_string): Replace TI move operations with operations for

13142

+ TImode and PTImode. Add support for TImode being allowed in VSX

13143

+ registers.

13144

+ (mov<mode>_string, TImode/PTImode): Likewise.

13145

+ (movti_ppc64): Likewise.

13146

+ (mov<mode>_ppc64, TImode/PTImode): Likewise.

13147

+ (TI mode splitters): Likewise.

13148

+

13149

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wt

13150

+ constraint.

13151

+

13152

+2014-04-04 Richard Biener <rguenther@suse.de>

13153

+

13154

+ * tree-ssanames.c (make_ssa_name_fn): Fix assert.

13155

+

13156

+2014-04-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

13157

+

13158

+ * config/s390/s390.c (s390_expand_insv): Use GET_MODE_BITSIZE.

13159

+

13160

+2014-04-01 Richard Biener <rguenther@suse.de>

13161

+

13162

+ * gimple.h (struct gimple_statement_base): Align subcode to

13163

+ 16 bits.

13164

+

13165

+2014-04-01 Sebastian Huber <sebastian.huber@embedded-brains.de>

13166

+

13167

+ * doc/invoke.texi (mapp-regs): Clarify.

13168

+

13169

+2014-03-31 H.J. Lu <hongjiu.lu@intel.com>

13170

+

13171

+ PR rtl-optimization/60700

13172

+ Backport from mainline

13173

+ 2013-07-30 Zhenqiang Chen <zhenqiang.chen@linaro.org>

13174

+

13175

+ PR rtl-optimization/57637

13176

+ * function.c (move_insn_for_shrink_wrap): Also check the

13177

+ GEN set of the LIVE problem for the liveness analysis

13178

+ if it exists, otherwise give up.

13179

+

13180

+2014-03-30 Kaz Kojima <kkojima@gcc.gnu.org>

13181

+

13182

+ Backport from mainline

13183

+ 2014-03-19 Kaz Kojima <kkojima@gcc.gnu.org>

13184

+

13185

+ PR target/60039

13186

+ * config/sh/sh.md (udivsi3_i1): Clobber R1 register.

13187

+

13188

+2014-03-26 Martin Jambor <mjambor@suse.cz>

13189

+

13190

+ PR ipa/60419

13191

+ * ipa.c (symtab_remove_unreachable_nodes): Clear thunk and

13192

+ alias flags of nodes in the border.

13193

+

13194

+2014-03-26 Eric Botcazou <ebotcazou@adacore.com>

13195

+

13196

+ PR rtl-optimization/60452

13197

+ * rtlanal.c (rtx_addr_can_trap_p_1): Fix head comment.

13198

+ <case REG>: Return 1 for invalid offsets from the frame pointer.

13199

+

13200

+2014-03-24 Richard Biener <rguenther@suse.de>

13201

+

13202

+ PR tree-optimization/60429

13203

+ * tree-ssa-structalias.c (get_constraint_for_ptr_offset): Remove

13204

+ duplicated line.

13205

+

13206

+2014-03-23 Eric Botcazou <ebotcazou@adacore.com>

13207

+

13208

+ PR rtl-optimization/60601

13209

+ * bb-reorder.c (fix_up_fall_thru_edges): Test EDGE_FALLTHRU everywhere.

13210

+

13211

+ * gcc.c (eval_spec_function): Initialize save_growing_value.

13212

+

13213

+2014-03-20 Jakub Jelinek <jakub@redhat.com>

13214

+

13215

+ PR target/60568

13216

+ * config/i386/i386.c (x86_output_mi_thunk): Surround UNSPEC_GOT

13217

+ into CONST, put pic register as first operand of PLUS. Use

13218

+ gen_const_mem for both 32-bit and 64-bit PIC got loads.

13219

+

13220

+2014-03-20 Eric Botcazou <ebotcazou@adacore.com>

13221

+

13222

+ * config/sparc/sparc.c (sparc_do_work_around_errata): Implement work

13223

+ around for store forwarding issue in the FPU on the UT699.

13224

+ * config/sparc/sparc.md (in_branch_delay): Return false for single FP

13225

+ loads and operations if -mfix-ut699 is specified.

13226

+ (divtf3_hq): Tweak attribute.

13227

+ (sqrttf2_hq): Likewise.

13228

+

13229

+2014-03-18 Kai Tietz <ktietz@redhat.com>

13230

+

13231

+ PR rtl-optimization/56356

13232

+ * sdbout.c (sdbout_parms): Verify that parms'

13233

+ incoming argument is valid.

13234

+ (sdbout_reg_parms): Likewise.

13235

+

13236

+2014-03-18 Eric Botcazou <ebotcazou@adacore.com>

13237

+

13238

+ * config/sparc/sparc.c (sparc_do_work_around_errata): Speed up and use

13239

+ proper constant for the store mode.

13240

+

13241

+2014-03-17 Mikael Pettersson <mikpelinux@gmail.com>

13242

+ Committed by Bill Schmidt <wschmidt@linux.vnet.ibm.com>

13243

+

13244

+ Backport from mainline:

13245

+

13246

+ 2013-06-20 Joern Rennecke <joern.rennecke@embecosm.com>

13247

+

13248

+ PR rtl-optimization/57425

13249

+ PR rtl-optimization/57569

13250

+ * alias.c (write_dependence_p): Remove parameters mem_mode and

13251

+ canon_mem_addr. Add parameters x_mode, x_addr and x_canonicalized.

13252

+ Changed all callers.

13253

+ (canon_anti_dependence): Get comments and semantics in sync.

13254

+ Add parameter mem_canonicalized. Changed all callers.

13255

+ * rtl.h (canon_anti_dependence): Update prototype.

13256

+

13257

+ 2013-06-16 Joern Rennecke <joern.rennecke@embecosm.com>

13258

+

13259

+ PR rtl-optimization/57425

13260

+ PR rtl-optimization/57569

13261

+ * alias.c (write_dependence_p): Add new parameters mem_mode,

13262

+ canon_mem_addr and mem_canonicalized. Change type of writep to bool.

13263

+ Changed all callers.

13264

+ (canon_anti_dependence): New function.

13265

+ * cse.c (check_dependence): Use canon_anti_dependence.

13266

+ * cselib.c (cselib_invalidate_mem): Likewise.

13267

+ * rtl.h (canon_anti_dependence): Declare.

13268

+

13269

+2014-03-17 Richard Biener <rguenther@suse.de>

13270

+

13271

+ Backport from mainline

13272

+ 2014-03-11 Richard Biener <rguenther@suse.de>

13273

+

13274

+ PR tree-optimization/60429

13275

+ PR tree-optimization/60485

13276

+ * tree-ssa-structalias.c (set_union_with_increment): Properly

13277

+ take into account all fields that overlap the shifted vars.

13278

+ (do_sd_constraint): Likewise.

13279

+ (do_ds_constraint): Likewise.

13280

+ (get_constraint_for_ptr_offset): Likewise.

13281

+

13282

+2014-03-15 Eric Botcazou <ebotcazou@adacore.com>

13283

+

13284

+ * config/sparc/sparc-protos.h (tls_call_delay): Delete.

13285

+ (eligible_for_call_delay): New prototype.

13286

+ * config/sparc/sparc.c (tls_call_delay): Rename into...

13287

+ (eligible_for_call_delay): ...this. Return false if the instruction

13288

+ cannot be put in the delay slot of a branch.

13289

+ (eligible_for_restore_insn): Simplify.

13290

+ (eligible_for_return_delay): Return false if the instruction cannot be

13291

+ put in the delay slot of a branch and simplify.

13292

+ (eligible_for_sibcall_delay): Return false if the instruction cannot be

13293

+ put in the delay slot of a branch.

13294

+ * config/sparc/sparc.md (fix_ut699): New attribute.

13295

+ (tls_call_delay): Delete.

13296

+ (in_call_delay): Reimplement.

13297

+ (eligible_for_sibcall_delay): Rename into...

13298

+ (in_sibcall_delay): ...this.

13299

+ (eligible_for_return_delay): Rename into...

13300

+ (in_return_delay): ...this.

13301

+ (in_branch_delay): Reimplement.

13302

+ (in_uncond_branch_delay): Delete.

13303

+ (in_annul_branch_delay): Delete.

13304

+

13305

+2014-03-14 Georg-Johann Lay <avr@gjlay.de>

13306

+

13307

+ Backport from 2014-03-14 trunk r208562.

13308

+

13309

+ PR target/59396

13310

+ * config/avr/avr.c (avr_set_current_function): Pass function name

13311

+ through default_strip_name_encoding before sanity checking instead

13312

+ of skipping the first char of the assembler name.

13313

+

13314

+2014-03-13 Georg-Johann Lay <avr@gjlay.de>

13315

+

13316

+ Backport from 2014-03-13 trunk r208532.

13317

+

13318

+ PR target/60486

13319

+ * config/avr/avr.c (avr_out_plus): Swap cc_plus and cc_minus in

13320

+ calls of avr_out_plus_1.

13321

+

13322

+2014-03-13 Joey Ye <joey.ye@arm.com>

13323

+

13324

+ Backport from mainline

13325

+ 2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com>

13326

+

13327

+ PR tree-optimization/60454

13328

+ * tree-ssa-math-opts.c (find_bswap_1): Fix bswap detection.

13329

+

13330

+2014-03-06 Matthias Klose <doko@ubuntu.com>

13331

+

13332

+ * Makefile.in (s-mlib): Only pass MULTIARCH_DIRNAME if

13333

+ MULTILIB_OSDIRNAMES is not defined.

13334

+

13335

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

13336

+

13337

+ PR tree-optimization/60276

13338

+ * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Avoid

13339

+ a -Wsign-compare warning.

13340

+

13341

+ * Makefile.in (tree-ssa-uninit.o): Depend on $(PARAMS_H).

13342

+

13343

+ Backport from mainline

13344

+ 2014-02-21 Jakub Jelinek <jakub@redhat.com>

13345

+

13346

+ PR tree-optimization/56490

13347

+ * params.def (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS): New param.

13348

+ * tree-ssa-uninit.c: Include params.h.

13349

+ (compute_control_dep_chain): Add num_calls argument, return false

13350

+ if it exceed PARAM_UNINIT_CONTROL_DEP_ATTEMPTS param, pass

13351

+ num_calls to recursive call.

13352

+ (find_predicates): Change dep_chain into normal array, add num_calls

13353

+ variable and adjust compute_control_dep_chain caller.

13354

+ (find_def_preds): Likewise.

13355

+

13356

+ 2014-02-13 Jakub Jelinek <jakub@redhat.com>

13357

+

13358

+ PR target/43546

13359

+ * expr.c (compress_float_constant): If x is a hard register,

13360

+ extend into a pseudo and then move to x.

13361

+

13362

+ 2014-02-11 Richard Henderson <rth@redhat.com>

13363

+ Jakub Jelinek <jakub@redhat.com>

13364

+

13365

+ PR debug/59776

13366

+ * tree-sra.c (load_assign_lhs_subreplacements): Add VIEW_CONVERT_EXPR

13367

+ around drhs if type conversion to lacc->type is not useless.

13368

+

13369

+ 2014-02-08 Jakub Jelinek <jakub@redhat.com>

13370

+

13371

+ PR ipa/60026

13372

+ * ipa-cp.c (determine_versionability): Fail at -O0

13373

+ or __attribute__((optimize (0))) or -fno-ipa-cp functions.

13374

+ * tree-sra.c (ipa_sra_preliminary_function_checks): Similarly.

13375

+

13376

+ 2014-02-06 Jakub Jelinek <jakub@redhat.com>

13377

+

13378

+ PR target/60062

13379

+ * tree.h (opts_for_fn): New inline function.

13380

+ (opt_for_fn): Define.

13381

+ * config/i386/i386.c (ix86_function_regparm): Use

13382

+ opt_for_fn (decl, optimize) instead of optimize.

13383

+

13384

+ 2014-02-05 Jakub Jelinek <jakub@redhat.com>

13385

+

13386

+ PR middle-end/57499

13387

+ * tree-eh.c (cleanup_empty_eh): Bail out on totally empty

13388

+ bb with no successors.

13389

+

13390

+2014-03-04 Richard Biener <rguenther@suse.de>

13391

+

13392

+ PR tree-optimization/60382

13393

+ * tree-vect-loop.c (vect_is_simple_reduction_1): Do not consider

13394

+ dead PHIs a reduction.

13395

+

13396

+2014-02-25 Richard Biener <rguenther@suse.de>

13397

+

13398

+ Backport from mainline

13399

+ 2014-02-21 Richard Biener <rguenther@suse.de>

13400

+

13401

+ PR tree-optimization/60276

13402

+ * tree-vectorizer.h (struct _stmt_vec_info): Add min_neg_dist field.

13403

+ (STMT_VINFO_MIN_NEG_DIST): New macro.

13404

+ * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Record

13405

+ STMT_VINFO_MIN_NEG_DIST.

13406

+ * tree-vect-stmts.c (vectorizable_load): Verify if assumptions

13407

+ made for negative dependence distances still hold.

13408

+

13409

+2014-02-25 Richard Biener <rguenther@suse.de>

13410

+

13411

+ Backport from mainline

13412

+ 2014-02-21 Richard Biener <rguenther@suse.de>

13413

+

13414

+ PR middle-end/60291

13415

+ * tree-ssa-live.c (mark_all_vars_used_1): Do not walk

13416

+ DECL_INITIAL for globals not in the current function context.

13417

+

13418

+ 2014-02-20 Richard Biener <rguenther@suse.de>

13419

+

13420

+ PR middle-end/60221

13421

+ * tree-eh.c (execute_cleanup_eh_1): Also cleanup empty EH

13422

+ regions at -O0.

13423

+

13424

+ 2014-02-14 Richard Biener <rguenther@suse.de>

13425

+

13426

+ PR tree-optimization/60183

13427

+ * tree-ssa-phiprop.c (propagate_with_phi): Avoid speculating

13428

+ loads.

13429

+ (tree_ssa_phiprop): Calculate and free post-dominators.

13430

+

13431

+2014-02-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

13432

+

13433

+ PR target/55426

13434

+ * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Allow 128 to 64-bit

13435

+ conversions.

13436

+

13437

+2014-02-24 John David Anglin <danglin@gcc.gnu.org>

13438

+

13439

+ * config/pa/pa.c (pa_output_move_double): Don't valididate when

13440

+ adjusting offsetable addresses.

13441

+

13442

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

13443

+

13444

+ * config/microblaze/microblaze.md: Correct ashrsi_reg / lshrsi_reg names

13445

+

13446

+2014-02-23 Edgar E. Iglesias <edgar.iglesias@xilinx.com>

13447

+

13448

+ * config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED

13449

+ definition.

13450

+

13451

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

13452

+

13453

+ * /config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk

13454

+ and define TARGET_ASM_OUTPUT_MI_THUNK and

13455

+ TARGET_ASM_CAN_OUTPUT_MI_THUNK.

13456

+

13457

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

13458

+

13459

+ * config/microblaze/predicates.md: Add cmp_op predicate.

13460

+ * config/microblaze/microblaze.md: Add branch_compare instruction

13461

+ which uses cmp_op predicate and emits cmp insn before branch.

13462

+ * config/microblaze/microblaze.c (microblaze_emit_compare): Rename

13463

+ to microblaze_expand_conditional_branch and consolidate logic.

13464

+ (microblaze_expand_conditional_branch): emit branch_compare

13465

+ insn instead of handling cmp op separate from branch insn.

13466

+

13467

+2014-02-21 Martin Jambor <mjambor@suse.cz>

13468

+

13469

+ PR ipa/55260

13470

+ * ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Uce correct

13471

+ info when checking whether lattices are bottom.

13472

+

13473

+2014-02-21 Jakub Jelinek <jakub@redhat.com>

13474

+

13475

+ * config/i386/i386.c (ix86_expand_vec_perm): Use V8SImode

13476

+ mode for mask of V8SFmode permutation.

13477

+

13478

+2014-02-20 Richard Henderson <rth@redhat.com>

13479

+

13480

+ PR c++/60272

13481

+ * builtins.c (expand_builtin_atomic_compare_exchange): Conditionalize

13482

+ on failure the store back into EXPECT. Always make a new pseudo for

13483

+ OLDVAL.

13484

+

13485

+2014-02-20 Jakub Jelinek <jakub@redhat.com>

13486

+

13487

+ PR target/57896

13488

+ * config/i386/i386.c (expand_vec_perm_interleave2): Don't call

13489

+ gen_reg_rtx if d->testing_p.

13490

+ (expand_vec_perm_pshufb2, expand_vec_perm_even_odd_1,

13491

+ expand_vec_perm_broadcast_1): Return early if d->testing_p and

13492

+ we will certainly return true.

13493

+

13494

+2014-02-20 Richard Biener <rguenther@suse.de>

13495

+

13496

+ * tree-cfg.c (replace_uses_by): Mark altered BBs before

13497

+ doing the substitution.

13498

+

13499

+2014-02-19 H.J. Lu <hongjiu.lu@intel.com>

13500

+

13501

+ Backport from mainline

13502

+ 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>

13503

+

13504

+ PR target/60207

13505

+ * config/i386/i386.c (construct_container): Remove TFmode check

13506

+ for X86_64_INTEGER_CLASS.

13507

+

13508

+2014-02-19 Uros Bizjak <ubizjak@gmail.com>

13509

+

13510

+ Backport from mainline

13511

+ 2014-02-19 Uros Bizjak <ubizjak@gmail.com>

13512

+

13513

+ PR target/59794

13514

+ * config/i386/i386.c (type_natural_mode): Warn for ABI changes

13515

+ only when -Wpsabi is enabled.

13516

+

13517

+2014-02-19 Terry Guo <terry.guo@arm.com>

13518

+

13519

+ Backport from mainline

13520

+ 2014-02-08 Terry Guo <terry.guo@arm.com>

13521

+

13522

+ * doc/invoke.texi: Document ARM -march=armv7e-m.

13523

+

13524

+2014-02-18 Kai Tietz <ktietz@redhat.com>

13525

+

13526

+ Backport from mainline

13527

+ 2014-02-18 Kai Tietz <ktietz@redhat.com>

13528

+

13529

+ PR target/60193

13530

+ * config/i386/i386.c (ix86_expand_prologue): Use

13531

+ rax register as displacement for restoring %r10, %rax.

13532

+ Additional fix wrong offset for restoring both-registers.

13533

+

13534

+2014-02-18 Eric Botcazou <ebotcazou@adacore.com>

13535

+

13536

+ * ipa-prop.c (compute_complex_ancestor_jump_func): Replace overzealous

13537

+ assertion with conditional return.

13538

+

13539

+2014-02-18 Jakub Jelinek <jakub@redhat.com>

13540

+ Uros Bizjak <ubizjak@gmail.com>

13541

+

13542

+ PR driver/60233

13543

+ * config/i386/driver-i386.c (host_detect_local_cpu): If

13544

+ YMM state is not saved by the OS, also clear has_f16c. Move

13545

+ CPUID 0x80000001 handling before YMM state saving checking.

13546

+

13547

+2014-02-14 Roland McGrath <mcgrathr@google.com>

13548

+

13549

+ * configure.ac (HAVE_AS_IX86_UD2): New test for 'ud2' mnemonic.

13550

+ * configure: Regenerated.

13551

+ * config.in: Regenerated.

13552

+ * config/i386/i386.md (trap) [HAVE_AS_IX86_UD2]: Use the mnemonic

13553

+ instead of ASM_SHORT.

13554

+

13555

+2014-02-13 Uros Bizjak <ubizjak@gmail.com>

13556

+

13557

+ Backport from mainline

13558

+ 2014-02-13 Uros Bizjak <ubizjak@gmail.com>

13559

+

13560

+ * config/i386/sse.md (xop_vmfrcz<mode>2): Generate const0 in

13561

+ operands[2], not operands[3].

13562

+

13563

+2014-02-13 Dominik Vogt <vogt@linux.vnet.ibm.com>

13564

+

13565

+ * config/s390/s390.c (s390_asm_output_function_label): Fix crash

13566

+ caused by bad second argument to warning_at() with -mhotpatch and

13567

+ nested functions (e.g. with gfortran).

13568

+

13569

+2014-02-12 H.J. Lu <hongjiu.lu@intel.com>

13570

+

13571

+ Backport from mainline

13572

+ 2014-02-12 H.J. Lu <hongjiu.lu@intel.com>

13573

+ Uros Bizjak <ubizjak@gmail.com>

13574

+

13575

+ PR target/60151

13576

+ * configure.ac (HAVE_AS_GOTOFF_IN_DATA): Pass --32 to GNU assembler.

13577

+

13578

+2014-02-12 Eric Botcazou <ebotcazou@adacore.com>

13579

+

13580

+ PR rtl-optimization/60116

13581

+ * combine.c (try_combine): Also remove dangling REG_DEAD notes on the

13582

+ other_insn once the combination has been validated.

13583

+

13584

+2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>

13585

+

13586

+ * config/microblaze/microblaze.md: Add movsi4_rev insn pattern.

13587

+ * config/microblaze/predicates.md: Add reg_or_mem_operand predicate.

13588

+

13589

+2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>

13590

+

13591

+ * config/microblaze/microblaze.c: Extend mcpu version format

13592

+

13593

+2014-02-10 David Holsgrove <david.holsgrove@xilinx.com>

13594

+

13595

+ * config/microblaze/microblaze.h: Define SIZE_TYPE and PTRDIFF_TYPE.

13596

+

13597

+2014-02-10 Richard Biener <rguenther@suse.de>

13598

+

13599

+ Backport from mainline

13600

+ 2014-01-30 Richard Biener <rguenther@suse.de>

13601

+

13602

+ PR tree-optimization/59903

13603

+ * tree-vect-loop.c (vect_transform_loop): Guard multiple-types

13604

+ check properly.

13605

+

13606

+ 2014-02-10 Richard Biener <rguenther@suse.de>

13607

+

13608

+ PR tree-optimization/60115

13609

+ * tree-eh.c (tree_could_trap_p): Unify TARGET_MEM_REF and

13610

+ MEM_REF handling. Properly verify that the accesses are not

13611

+ out of the objects bound.

13612

+

13613

+2014-02-05 James Greenhalgh <james.greenhalgh@arm.com>

13614

+

13615

+ Backport from mainline.

13616

+ 2014-02-05 James Greenhalgh <james.greenhalgh@arm.com>

13617

+

13618

+ PR target/59718

13619

+ * doc/invoke.texi (-march): Clarify documentation for ARM.

13620

+ (-mtune): Likewise.

13621

+ (-mcpu): Likewise.

13622

+

13623

+2014-02-04 John David Anglin <danglin@gcc.gnu.org>

13624

+

13625

+ PR target/59777

13626

+ * config/pa/pa.c (legitimize_tls_address): Return original address

13627

+ if not passed a SYMBOL_REF rtx.

13628

+ (hppa_legitimize_address): Call legitimize_tls_address for all TLS

13629

+ addresses.

13630

+ (pa_emit_move_sequence): Simplify TLS source operands.

13631

+ (pa_legitimate_constant_p): Reject all TLS constants.

13632

+ * config/pa/pa.h (PA_SYMBOL_REF_TLS_P): Correct comment.

13633

+ (CONSTANT_ADDRESS_P): Reject TLS CONST addresses.

13634

+

13635

+2014-02-04 Uros Bizjak <ubizjak@gmail.com>

13636

+

13637

+ Backport from mainline

13638

+ 2014-02-02 Uros Bizjak <ubizjak@gmail.com>

13639

+

13640

+ PR target/60017

13641

+ * config/i386/i386.c (classify_argument): Fix handling of bit_offset

13642

+ when calculating size of integer atomic types.

13643

+

13644

+2014-02-02 Uros Bizjak <ubizjak@gmail.com>

13645

+

13646

+ Backport from mainline

13647

+ 2014-01-30 Jakub Jelinek <jakub@redhat.com>

13648

+

13649

+ * config/i386/f16cintrin.h (_cvtsh_ss): Avoid -Wnarrowing warning.

13650

+

13651

+2014-01-31 Richard Henderson <rth@redhat.com>

13652

+

13653

+ PR middle-end/60004

13654

+ * tree-eh.c (lower_try_finally_switch): Delay lowering finally block

13655

+ until after else_eh is processed.

13656

+

13657

+2014-01-30 David Holsgrove <david.holsgrove@xilinx.com>

13658

+

13659

+ Backport from mainline

13660

+ * config/microblaze/microblaze.md(cstoresf4, cbranchsf4): Replace

13661

+ comparison_operator with ordered_comparison_operator.

13662

+

13663

+2014-01-25 Walter Lee <walt@tilera.com>

13664

+

13665

+ Backport from mainline

13666

+ 2014-01-25 Walter Lee <walt@tilera.com>

13667

+

13668

+ * config/tilegx/sync.md (atomic_fetch_sub): Fix negation and

13669

+ avoid clobbering a live register.

13670

+

13671

+2014-01-25 Walter Lee <walt@tilera.com>

13672

+

13673

+ Backport from mainline

13674

+ 2014-01-25 Walter Lee <walt@tilera.com>

13675

+

13676

+ * config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins):

13677

+ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.

13678

+ * config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins):

13679

+ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}.

13680

+

13681

+2014-01-25 Walter Lee <walt@tilera.com>

13682

+

13683

+ Backport from mainline

13684

+ 2014-01-25 Walter Lee <walt@tilera.com>

13685

+

13686

+ * config/tilegx/tilegx.c (tilegx_gen_bundles): Delete barrier

13687

+ insns before bundling.

13688

+ * config/tilegx/tilegx.md (tile_network_barrier): Update comment.

13689

+

13690

+2014-01-25 Walter Lee <walt@tilera.com>

13691

+

13692

+ Backport from mainline

13693

+ 2014-01-25 Walter Lee <walt@tilera.com>

13694

+

13695

+ * config/tilegx/tilegx.c (tilegx_expand_builtin): Set

13696

+ PREFETCH_SCHEDULE_BARRIER_P to true for prefetches.

13697

+ * config/tilepro/tilepro.c (tilepro_expand_builtin): Ditto.

13698

+

13699

+2014-01-25 Walter Lee <walt@tilera.com>

13700

+

13701

+ Backport from mainline

13702

+ 2014-01-25 Walter Lee <walt@tilera.com>

13703

+

13704

+ * config/tilepro/tilepro.md (ctzdi2): Use register_operand

13705

+ predicate.

13706

+ (clzdi2): Ditto.

13707

+ (ffsdi2): Ditto.

13708

+

13709

+2014-01-25 Walter Lee <walt@tilera.com>

13710

+

13711

+ Backport from mainline

13712

+ 2014-01-25 Walter Lee <walt@tilera.com>

13713

+

13714

+ * config/tilegx/tilegx.c (tilegx_expand_to_rtl_hook): New.

13715

+ (TARGET_EXPAND_TO_RTL_HOOK): Define.

13716

+

13717

+2014-01-24 H.J. Lu <hongjiu.lu@intel.com>

13718

+

13719

+ Backport from mainline

13720

+ 2014-01-23 H.J. Lu <hongjiu.lu@intel.com>

13721

+

13722

+ PR target/59929

13723

+ * config/i386/i386.md (pushsf splitter): Get stack adjustment

13724

+ from push operand if code of push isn't PRE_DEC.

13725

+

13726

+2014-01-23 David Holsgrove <david.holsgrove@xilinx.com>

13727

+

13728

+ Backport from mainline.

13729

+ * config/microblaze/microblaze.md: Add trap insn and attribute

13730

+

13731

+2014-01-23 Marek Polacek <polacek@redhat.com>

13732

+

13733

+ Backport from mainline

13734

+ 2013-10-21 Marek Polacek <polacek@redhat.com>

13735

+

13736

+ PR middle-end/58809

13737

+ * fold-const.c (fold_range_test): Return 0 if the type is not

13738

+ an integral type.

13739

+

13740

+2014-01-22 David Holsgrove <david.holsgrove@xilinx.com>

13741

+

13742

+ * config/microblaze/microblaze.md: Correct bswaphi2 insn.

13743

+

13744

+2014-01-22 Uros Bizjak <ubizjak@gmail.com>

13745

+

13746

+ Backport from mainline

13747

+ 2014-01-20 Uros Bizjak <ubizjak@gmail.com>

13748

+

13749

+ * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false

13750

+ for SImode_address_operand operands, having only a REG argument.

13751

+

13752

+ 2014-01-20 Jakub Jelinek <jakub@redhat.com>

13753

+

13754

+ PR target/59880

13755

+ * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false

13756

+ if operands[1] is a REG or ZERO_EXTEND of a REG.

13757

+

13758

+ 2014-01-18 Uros Bizjak <ubizjak@gmail.com>

13759

+ H.J. Lu <hongjiu.lu@intel.com>

13760

+

13761

+ PR target/59379

13762

+ * config/i386/i386.md (*lea<mode>): Zero-extend return register

13763

+ to DImode for zero-extended addresses.

13764

+

13765

+2014-01-21 Andrew Pinski <apinski@cavium.com>

13766

+ Steve Ellcey <sellcey@mips.com>

13767

+

13768

+ PR target/59462

13769

+ * config/mips/mips.c (mips_print_operand): Check operand mode instead

13770

+ of operator mode.

13771

+

13772

+2014-01-21 Andrey Belevantsev <abel@ispras.ru>

13773

+

13774

+ Backport from mainline

13775

+ 2013-12-23 Andrey Belevantsev <abel@ispras.ru>

13776

+

13777

+ PR rtl-optimization/57422

13778

+ * sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling

13779

+ add_to_hard_reg_set.

13780

+

13781

+2014-01-20 Jakub Jelinek <jakub@redhat.com>

13782

+

13783

+ PR middle-end/59860

13784

+ * tree.h (fold_builtin_strcat): New prototype.

13785

+ * builtins.c (fold_builtin_strcat): No longer static. Add len

13786

+ argument, if non-NULL, don't call c_strlen. Optimize

13787

+ directly into __builtin_memcpy instead of __builtin_strcpy.

13788

+ (fold_builtin_2): Adjust fold_builtin_strcat caller.

13789

+ * gimple-fold.c (gimple_fold_builtin): Handle BUILT_IN_STRCAT.

13790

+

13791

+2014-01-20 Richard Biener <rguenther@suse.de>

13792

+

13793

+ PR middle-end/59860

13794

+ * builtins.c (fold_builtin_strcat): Remove case better handled

13795

+ by tree-ssa-strlen.c.

13796

+

13797

+2014-01-19 John David Anglin <danglin@gcc.gnu.org>

13798

+

13799

+ * config/pa/pa.c (pa_attr_length_millicode_call): Correct length of

13800

+ long non-pic millicode calls.

13801

+

13802

+2014-01-17 John David Anglin <danglin@gcc.gnu.org>

13803

+

13804

+ * config/pa/pa.c (pa_attr_length_indirect_call): Don't output a short

13805

+ call to $$dyncall when TARGET_LONG_CALLS is true.

13806

+

13807

+2014-01-17 H.J. Lu <hongjiu.lu@intel.com>

13808

+

13809

+ Backport from mainline

13810

+ 2014-01-14 H.J. Lu <hongjiu.lu@intel.com>

13811

+

13812

+ PR target/59794

13813

+ * config/i386/i386.c (type_natural_mode): Add a bool parameter

13814

+ to indicate if type is used for function return value. Warn

13815

+ ABI change if the vector mode isn't available for function

13816

+ return value.

13817

+ (ix86_function_arg_advance): Pass false to type_natural_mode.

13818

+ (ix86_function_arg): Likewise.

13819

+ (ix86_gimplify_va_arg): Likewise.

13820

+ (function_arg_32): Don't warn ABI change.

13821

+ (ix86_function_value): Pass true to type_natural_mode.

13822

+ (ix86_return_in_memory): Likewise.

13823

+ (ix86_struct_value_rtx): Removed.

13824

+ (TARGET_STRUCT_VALUE_RTX): Likewise.

13825

+

13826

+2014-01-17 Charles Baylis <charles.baylis@linaro.org>

13827

+

13828

+ Backport from mainline

13829

+ 2013-12-19 Charles Baylis <charles.baylis@linaro.org>

13830

+

13831

+ PR target/59142

13832

+ * config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb

13833

+ patterns.

13834

+ * config/arm/ldmstm.md: Regenerate.

13835

+

13836

+ 2013-12-19 Charles Baylis <charles.baylis@linaro.org>

13837

+

13838

+ PR target/59142

13839

+ * config/arm/predicates.md (arm_hard_general_register_operand):

13840

+ New predicate.

13841

+ (arm_hard_register_operand): Remove.

13842

+ * config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand

13843

+ for all patterns.

13844

+ * config/arm/ldmstm.md: Regenerate.

13845

+

13846

+ 2013-12-19 Charles Baylis <charles.baylis@linaro.org>

13847

+

13848

+ PR target/59142

13849

+ * config/arm/predicates.md (vfp_hard_register_operand): New predicate.

13850

+ * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use

13851

+ vfp_hard_register_operand.

13852

+

13853

+2014-01-17 Kugan Vivekanandarajah <kuganv@linaro.org>

13854

+

13855

+ Backport from mainline

13856

+ 2014-01-15 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org>

13857

+ Kugan Vivekanandarajah <kuganv@linaro.org>

13858

+

13859

+ PR target/59695

13860

+ * config/aarch64/aarch64.c (aarch64_build_constant): Fix incorrect

13861

+ truncation.

13862

+

13863

+2014-01-17 Terry Guo <terry.guo@arm.com>

13864

+

13865

+ PR target/59826

13866

+ * config/arm/arm.md (prefetch): Set insn type attribute to load1.

13867

+

13868

+2014-01-16 Jakub Jelinek <jakub@redhat.com>

13869

+

13870

+ PR target/59839

13871

+ * config/i386/i386.c (ix86_expand_builtin): If target doesn't

13872

+ satisfy operand 0 predicate for gathers, use a new pseudo as

13873

+ subtarget.

13874

+

13875

+2014-01-16 Richard Henderson <rth@redhat.com>

13876

+

13877

+ PR debug/54694

13878

+ * reginfo.c (global_regs_decl): Globalize.

13879

+ * rtl.h (global_regs_decl): Declare.

13880

+ * ira.c (do_reload): Diagnose frame_pointer_needed and it

13881

+ reserved via global_regs.

13882

+

13883

+2014-01-16 Peter Bergner <bergner@vnet.ibm.com>

13884

+

13885

+ Backport from mainline

13886

+ 2014-01-15 Uros Bizjak <ubizjak@gmail.com>

13887

+

13888

+ * config/i386/i386.c (ix86_hard_regno_mode_ok): Use

13889

+ VALID_AVX256_REG_OR_OI_MODE.

13890

+

13891

+ 2013-09-05 Peter Bergner <bergner@vnet.ibm.com>

13892

+

13893

+ PR target/58139

13894

+ * reginfo.c (choose_hard_reg_mode): Scan through all mode classes

13895

+ looking for widest mode.

13896

+

13897

+2014-01-16 Marek Polacek <polacek@redhat.com>

13898

+

13899

+ Backported from mainline

13900

+ 2014-01-16 Marek Polacek <polacek@redhat.com>

13901

+

13902

+ PR middle-end/59827

13903

+ * gimple-low.c (gimple_check_call_args): Don't use DECL_ARG_TYPE if

13904

+ it is error_mark_node.

13905

+

13906

+2014-01-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

13907

+

13908

+ PR target/59803

13909

+ * config/s390/s390.c (s390_preferred_reload_class): Don't return

13910

+ ADDR_REGS for invalid symrefs in non-PIC code.

13911

+

13912

+2014-01-14 Uros Bizjak <ubizjak@gmail.com>

13913

+

13914

+ Revert:

13915

+ 2014-01-08 Uros Bizjak <ubizjak@gmail.com>

13916

+

13917

+ * config/i386/i386.c (ix86_data_alignment): Calculate max_align

13918

+ from prefetch_block tune setting.

13919

+

13920

+2014-01-13 Jakub Jelinek <jakub@redhat.com>

13921

+

13922

+ Backported from mainline

13923

+ 2014-01-10 Jakub Jelinek <jakub@redhat.com>

13924

+

13925

+ PR tree-optimization/59745

13926

+ * tree-predcom.c (tree_predictive_commoning_loop): Call

13927

+ free_affine_expand_cache if giving up because components is NULL.

13928

+

13929

+2014-01-10 Yufeng Zhang <yufeng.zhang@arm.com>

13930

+

13931

+ * config/arm/arm.c (arm_expand_neon_args): Call expand_expr

13932

+ with EXPAND_MEMORY for NEON_ARG_MEMORY; check if the returned

13933

+ rtx is const0_rtx or not.

13934

+

13935

+2014-01-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

13936

+

13937

+ * config/s390/s390.c (s390_expand_tbegin): Remove jump over CC

13938

+ extraction in good case.

13939

+

13940

+2014-01-10 Huacai Chen <chenhc@lemote.com>

13941

+

13942

+ * config/mips/driver-native.c (host_detect_local_cpu): Handle new

13943

+ kernel strings for Loongson-2E/2F/3A.

13944

+

13945

+2014-01-10 Richard Biener <rguenther@suse.de>

13946

+

13947

+ PR tree-optimization/59715

13948

+ * tree-flow.h (split_critical_edges): Declare.

13949

+ * tree-cfg.c (split_critical_edges): Export.

13950

+ * tree-ssa-sink.c (execute_sink_code): Split critical edges.

13951

+

13952

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

13953

+

13954

+ * config/mips/mips.h (ISA_HAS_WSBH): Define.

13955

+ * config/mips/mips.md (UNSPEC_WSBH, UNSPEC_DSBH, UNSPEC_DSHD): New

13956

+ constants.

13957

+ (bswaphi2, bswapsi2, bswapdi2, wsbh, dsbh, dshd): New patterns.

13958

+

13959

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

13960

+

13961

+ PR rtl-optimization/59137

13962

+ * reorg.c (steal_delay_list_from_target): Call update_block for

13963

+ elided insns.

13964

+ (steal_delay_list_from_fallthrough, relax_delay_slots): Likewise.

13965

+

13966

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

13967

+

13968

+ Revert:

13969

+ 2012-10-07 Richard Sandiford <rdsandiford@googlemail.com>

13970

+

13971

+ * config/mips/mips.c (mips_truncated_op_cost): New function.

13972

+ (mips_rtx_costs): Adjust test for BADDU.

13973

+ * config/mips/mips.md (*baddu_di<mode>): Push truncates to operands.

13974

+

13975

+ 2012-10-02 Richard Sandiford <rdsandiford@googlemail.com>

13976

+

13977

+ * config/mips/mips.md (*baddu_si_eb, *baddu_si_el): Merge into...

13978

+ (*baddu_si): ...this new pattern.

13979

+

13980

+2014-01-09 Richard Biener <rguenther@suse.de>

13981

+

13982

+ Backport from mainline

13983

+ 2013-11-18 Richard Biener <rguenther@suse.de>

13984

+

13985

+ PR tree-optimization/59125

13986

+ PR tree-optimization/54570

13987

+ * tree-ssa-sccvn.c (copy_reference_ops_from_ref): When inlining

13988

+ is not complete do not treat component-references with offset zero

13989

+ but different fields as equal.

13990

+ * tree-object-size.c: Include tree-phinodes.h and ssa-iterators.h.

13991

+ (compute_object_sizes): Apply TLC. Propagate the constant

13992

+ results into all uses and fold their stmts.

13993

+ * passes.def (pass_all_optimizations): Move pass_object_sizes

13994

+ after the first pass_forwprop and before pass_fre.

13995

+

13996

+ 2013-12-03 Jakub Jelinek <jakub@redhat.com>

13997

+

13998

+ PR tree-optimization/59362

13999

+ * tree-object-size.c (object_sizes): Change into array of

14000

+ vec<unsigned HOST_WIDE_INT>.

14001

+ (compute_builtin_object_size): Check computed bitmap for

14002

+ non-NULL instead of object_sizes. Call safe_grow on object_sizes

14003

+ vector if new SSA_NAMEs appeared.

14004

+ (init_object_sizes): Check computed bitmap for non-NULL.

14005

+ Call safe_grow on object_sizes elements instead of initializing

14006

+ it with XNEWVEC.

14007

+ (fini_object_sizes): Call release on object_sizes elements, don't

14008

+ set it to NULL.

14009

+

14010

+2014-01-09 Richard Earnshaw <rearnsha@arm.com>

14011

+

14012

+ PR rtl-optimization/54300

14013

+ * regcprop.c (copyprop_hardreg_forward_1): Ensure any unused

14014

+ outputs in a single-set are killed from the value chains.

14015

+

14016

+2014-01-09 Jakub Jelinek <jakub@redhat.com>

14017

+

14018

+ PR rtl-optimization/59724

14019

+ * ifcvt.c (cond_exec_process_if_block): Don't call

14020

+ flow_find_head_matching_sequence with 0 longest_match.

14021

+ * cfgcleanup.c (flow_find_head_matching_sequence): Count even

14022

+ non-active insns if !stop_after.

14023

+ (try_head_merge_bb): Revert 2014-01-07 changes.

14024

+

14025

+2014-01-09 Hans-Peter Nilsson <hp@axis.com>

14026

+

14027

+ Backport from mainline

14028

+ 2013-12-23 Hans-Peter Nilsson <hp@axis.com>

14029

+

14030

+ PR middle-end/59584

14031

+ * config/cris/predicates.md (cris_nonsp_register_operand):

14032

+ New define_predicate.

14033

+ * config/cris/cris.md: Replace register_operand with

14034

+ cris_nonsp_register_operand for destinations in all

14035

+ define_splits where a register is set more than once.

14036

+

14037

+2014-01-08 H.J. Lu <hongjiu.lu@intel.com>

14038

+

14039

+ Backport from mainline

14040

+ 2013-12-25 H.J. Lu <hongjiu.lu@intel.com>

14041

+

14042

+ PR target/59587

14043

+ * config/i386/i386.c (struct ptt): Add a field for processor name.

14044

+ (processor_target_table): Sync with processor_type. Add

14045

+ processor names.

14046

+ (cpu_names): Removed.

14047

+ (ix86_option_override_internal): Default x_ix86_tune_string

14048

+ to processor_target_table[TARGET_CPU_DEFAULT].name.

14049

+ (ix86_function_specific_print): Assert arch and tune <

14050

+ PROCESSOR_max. Use processor_target_table to print arch and

14051

+ tune names.

14052

+ * config/i386/i386.h (TARGET_CPU_DEFAULT): Default to

14053

+ PROCESSOR_GENERIC32.

14054

+ (target_cpu_default): Removed.

14055

+ (processor_type): Reordered.

14056

+

14057

+2014-01-08 Uros Bizjak <ubizjak@gmail.com>

14058

+

14059

+ Backport from mainline

14060

+ 2014-01-05 Uros Bizjak <ubizjak@gmail.com>

14061

+

14062

+ * config/i386/i386.c (ix86_data_alignment): Calculate max_align

14063

+ from prefetch_block tune setting.

14064

+ (nocona_cost): Correct size of prefetch block to 64.

14065

+

14066

+2014-01-08 Martin Jambor <mjambor@suse.cz>

14067

+

14068

+ PR ipa/59610

14069

+ * ipa-prop.c (ipa_compute_jump_functions): Bail out if not optimizing.

14070

+ (parm_preserved_before_stmt_p): Assume modification present when not

14071

+ optimizing.

14072

+

14073

+2014-01-07 John David Anglin <danglin@gcc.gnu.org>

14074

+

14075

+ PR target/59652

14076

+ * config/pa/pa.c (pa_legitimate_address_p): Return false before reload

14077

+ for 14-bit register offsets when INT14_OK_STRICT is false.

14078

+

14079

+2014-01-07 Roland Stigge <stigge@antcom.de>

14080

+ Michael Meissner <meissner@linux.vnet.ibm.com>

14081

+

14082

+ PR 57386/target

14083

+ * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p):

14084

+ Only check TFmode for SPE constants. Don't check TImode or TDmode.

14085

+

14086

+2014-01-07 Jakub Jelinek <jakub@redhat.com>

14087

+

14088

+ PR rtl-optimization/58668

14089

+ * cfgcleanup.c (flow_find_cross_jump): Don't count

14090

+ any jumps if dir_p is NULL. Remove p1 variable and make USE/CLOBBER

14091

+ check consistent with other places.

14092

+ (flow_find_head_matching_sequence): Don't count USE or CLOBBER insns.

14093

+ (try_head_merge_bb): Adjust for the flow_find_head_matching_sequence

14094

+ counting change.

14095

+ * ifcvt.c (count_bb_insns): Don't count USE or CLOBBER insns.

14096

+

14097

+2014-01-07 Mike Stump <mikestump@comcast.net>

14098

+ Jakub Jelinek <jakub@redhat.com>

14099

+

14100

+ PR pch/59436

14101

+ * tree.h (struct tree_optimization_option): Change optabs

14102

+ type from unsigned char * to void *.

14103

+ * optabs.c (init_tree_optimization_optabs): Adjust

14104

+ TREE_OPTIMIZATION_OPTABS initialization.

14105

+

14106

+2014-01-07 Jakub Jelinek <jakub@redhat.com>

14107

+

14108

+ Backported from mainline

14109

+ 2013-12-16 Jakub Jelinek <jakub@redhat.com>

14110

+

14111

+ PR middle-end/58956

14112

+ PR middle-end/59470

14113

+ * gimple.h (walk_stmt_load_store_addr_fn): New typedef.

14114

+ (walk_stmt_load_store_addr_ops, walk_stmt_load_store_ops): Use it

14115

+ for callback params.

14116

+ * gimple.c (walk_stmt_load_store_ops): Likewise.

14117

+ (walk_stmt_load_store_addr_ops): Likewise. Adjust all callback

14118

+ calls to supply the gimple operand containing the base tree

14119

+ as an extra argument.

14120

+ * tree-ssa-ter.c (find_ssaname, find_ssaname_in_store): New helper

14121

+ functions.

14122

+ (find_replaceable_in_bb): For calls or GIMPLE_ASM, only set

14123

+ same_root_var if USE is used somewhere in the stores of the stmt.

14124

+ * ipa-prop.c (visit_ref_for_mod_analysis): Remove name of the stmt

14125

+ argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.

14126

+ * ipa-pure-const.c (check_load, check_store, check_ipa_load,

14127

+ check_ipa_store): Likewise.

14128

+ * gimple.c (gimple_ior_addresses_taken_1): Likewise.

14129

+ * ipa-split.c (test_nonssa_use, mark_nonssa_use): Likewise.

14130

+ (verify_non_ssa_vars, visit_bb): Adjust their callers.

14131

+ * cfgexpand.c (add_scope_conflicts_1): Use

14132

+ walk_stmt_load_store_addr_fn type for visit variable.

14133

+ (visit_op, visit_conflict): Remove name of the stmt

14134

+ argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.

14135

+ * tree-sra.c (asm_visit_addr): Likewise. Remove name of the data

14136

+ argument and ATTRIBUTE_UNUSED.

14137

+ * cgraphbuild.c (mark_address, mark_load, mark_store): Add another

14138

+ unnamed tree argument.

14139

+

14140

+2014-01-03 Andreas Schwab <schwab@linux-m68k.org>

14141

+

14142

+ * config/m68k/m68k.c (handle_move_double): Handle pushes with

14143

+ overlapping registers also for registers other than the stack

14144

+ pointer.

14145

+

14146

+2014-01-03 Jakub Jelinek <jakub@redhat.com>

14147

+

14148

+ PR target/59625

14149

+ * config/i386/i386.c (ix86_avoid_jump_mispredicts): Don't consider

14150

+ asm goto as jump.

14151

+

14152

+2014-01-01 Jakub Jelinek <jakub@redhat.com>

14153

+

14154

+ PR rtl-optimization/59647

14155

+ * cse.c (cse_process_notes_1): Don't substitute negative VOIDmode

14156

+ new_rtx into UNSIGNED_FLOAT rtxes.

14157

+

14158

+2013-12-28 Eric Botcazou <ebotcazou@adacore.com>

14159

+

14160

+ * doc/invoke.texi (output file options): Document -fada-spec-parent.

14161

+

14162

+2013-12-26 Uros Bizjak <ubizjak@gmail.com>

14163

+

14164

+ * config/i386/driver-i386.c (decode_caches_intel): Add missing entries.

14165

+

14166

+2013-12-20 Jakub Jelinek <jakub@redhat.com>

14167

+

14168

+ PR c++/59255

14169

+ Backported from mainline

14170

+ 2013-08-19 Dehao Chen <dehao@google.com>

14171

+

14172

+ * value-prof.c (gimple_ic): Fix the bug of adding EH edge.

14173

+

14174

+2013-12-19 James Greenhalgh <james.greenhalgh@arm.com>

14175

+

14176

+ Backport from Mainline.

14177

+ 2013-05-01 James Greenhalgh <james.greenhalgh@arm.com>

14178

+

14179

+ * config/aarch64/aarch64-simd-builtins.def (cmhs): Rename to...

14180

+ (cmgeu): ...This.

14181

+ (cmhi): Rename to...

14182

+ (cmgtu): ...This.

14183

+ * config/aarch64/aarch64-simd.md

14184

+ (simd_mode): Add SF.

14185

+ (aarch64_vcond_internal): Use new names for unsigned comparison insns.

14186

+ (aarch64_cm<optab><mode>): Rewrite to not use UNSPECs.

14187

+ * config/aarch64/aarch64.md (*cstore<mode>_neg): Rename to...

14188

+ (cstore<mode>_neg): ...This.

14189

+ * config/aarch64/iterators.md

14190

+ (VALLF): new.

14191

+ (unspec): Remove UNSPEC_CM<EQ, LE, LT, GE, GT, HS, HI, TST>.

14192

+ (COMPARISONS): New.

14193

+ (UCOMPARISONS): Likewise.

14194

+ (optab): Add missing comparisons.

14195

+ (n_optab): New.

14196

+ (cmp_1): Likewise.

14197

+ (cmp_2): Likewise.

14198

+ (CMP): Likewise.

14199

+ (cmp): Remove.

14200

+ (VCMP_S): Likewise.

14201

+ (VCMP_U): Likewise.

14202

+ (V_cmp_result): Add DF, SF modes.

14203

+ (v_cmp_result): Likewise.

14204

+ (v): Likewise.

14205

+ (vmtype): Likewise.

14206

+ * config/aarch64/predicates.md (aarch64_reg_or_fp_zero): New.

14207

+

14208

+ Partial Backport from mainline.

14209

+ 2013-05-01 James Greenhalgh <james.greenhalgh@arm.com>

14210

+

14211

+ * config/aarch64/arm_neon.h

14212

+ (vc<eq, lt, le, gt, ge, tst><qsd>_<u><8,16,32,64>): Remap

14213

+ to builtins or C as appropriate.

14214

+

14215

+2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

14216

+ Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14217

+

14218

+ Backport from mainline

14219

+ 2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

14220

+ * config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New

14221

+ constant

14222

+ (s390_hotpatch_trampoline_halfwords_max): New constant

14223

+ (s390_hotpatch_trampoline_halfwords): New static variable

14224

+ (get_hotpatch_attribute): New function

14225

+ (s390_handle_hotpatch_attribute): New function

14226

+ (s390_attribute_table): New target specific attribute table to implement

14227

+ the hotpatch attribute

14228

+ (s390_option_override): Parse hotpatch options

14229

+ (s390_function_num_hotpatch_trampoline_halfwords): New function

14230

+ (s390_can_inline_p): Implement target hook to

14231

+ suppress hotpatching for explicitly inlined functions

14232

+ (s390_asm_output_function_label): Generate hotpatch prologue

14233

+ (TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table

14234

+ (TARGET_CAN_INLINE_P): Define to implement target hook

14235

+ * config/s390/s390.opt (mhotpatch): New options -mhotpatch, -mhotpatch=

14236

+ * config/s390/s390-protos.h (s390_asm_output_function_label): Add

14237

+ prototype

14238

+ * config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific

14239

+ function label generation for hotpatching

14240

+ (FUNCTION_BOUNDARY): Align functions to eight bytes

14241

+ * doc/extend.texi: Document hotpatch attribute

14242

+ * doc/invoke.texi: Document -mhotpatch option

14243

+

14244

+2013-12-18 Eric Botcazou <ebotcazou@adacore.com>

14245

+

14246

+ * config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko.

14247

+

14248

+2013-12-12 Vladimir Makarov <vmakarov@redhat.com>

14249

+

14250

+ PR middle-end/59470

14251

+ * lra-coalesce.c (lra_coalesce): Invalidate inheritance pseudo

14252

+ values if necessary.

14253

+

14254

+2013-12-12 Jakub Jelinek <jakub@redhat.com>

14255

+

14256

+ PR libgomp/59467

14257

+ * gimplify.c (omp_check_private): Add copyprivate argument, if it

14258

+ is true, don't check omp_privatize_by_reference.

14259

+ (gimplify_scan_omp_clauses): For OMP_CLAUSE_COPYPRIVATE verify

14260

+ decl is private in outer context. Adjust omp_check_private caller.

14261

+

14262

+2013-12-10 Eric Botcazou <ebotcazou@adacore.com>

14263

+

14264

+ PR rtl-optimization/58295

14265

+ * simplify-rtx.c (simplify_truncation): Restrict the distribution for

14266

+ WORD_REGISTER_OPERATIONS targets.

14267

+

14268

+2013-12-10 Kai Tietz <ktietz@redhat.com>

14269

+

14270

+ PR target/56807

14271

+ * config/i386/i386.c (ix86_expand_prologue): Address saved

14272

+ registers stack-relative, not via frame-pointer.

14273

+

14274

+2013-12-09 Alan Modra <amodra@gmail.com>

14275

+

14276

+ Apply from mainline

14277

+ 2013-12-05 Alan Modra <amodra@gmail.com>

14278

+ * configure.ac (BUILD_CXXFLAGS) Don't use ALL_CXXFLAGS for

14279

+ build != host.

14280

+ <recursive call for build != host>: Clear GMPINC. Don't bother

14281

+ saving CFLAGS.

14282

+ * configure: Regenerate.

14283

+

14284

+2013-12-08 Uros Bizjak <ubizjak@gmail.com>

14285

+

14286

+ Backport from mainline

14287

+ 2013-12-06 Uros Bizjak <ubizjak@gmail.com>

14288

+

14289

+ PR target/59405

14290

+ * config/i386/i386.c (type_natural_mode): Properly handle

14291

+ size 8 for !TARGET_64BIT.

14292

+

14293

+2013-12-07 Ralf Corsépius <ralf.corsepius@rtems.org>

14294

+

14295

+ * config.gcc (microblaze*-*-rtems*): Add TARGET_BIG_ENDIAN_DEFAULT.

14296

+

14297

+2013-12-06 Jakub Jelinek <jakub@redhat.com>

14298

+

14299

+ PR tree-optimization/59388

14300

+ * tree-ssa-reassoc.c (update_range_test): If op == range->exp,

14301

+ gimplify tem after stmt rather than before it.

14302

+

14303

+2013-12-06 Oleg Endo <olegendo@gcc.gnu.org>

14304

+

14305

+ Backport from mainline

14306

+ 2013-11-26 Oleg Endo <olegendo@gcc.gnu.org>

14307

+

14308

+ PR target/58314

14309

+ PR target/50751

14310

+ * config/sh/sh.c (max_mov_insn_displacement, disp_addr_displacement):

14311

+ Prefix function names with 'sh_'. Make them non-static.

14312

+ * config/sh/sh-protos.h (sh_disp_addr_displacement,

14313

+ sh_max_mov_insn_displacement): Add declarations.

14314

+ * config/sh/constraints.md (Q): Reject QImode.

14315

+ (Sdd): Use match_code "mem".

14316

+ (Snd): Fix erroneous matching of non-memory operands.

14317

+ * config/sh/predicates.md (short_displacement_mem_operand): New

14318

+ predicate.

14319

+ (general_movsrc_operand): Disallow PC relative QImode loads.

14320

+ * config/sh/sh.md (*mov<mode>_reg_reg): Remove it.

14321

+ (*movqi, *movhi): Merge both insns into...

14322

+ (*mov<mode>): ... this new insn. Replace generic 'm' constraints with

14323

+ 'Snd' and 'Sdd' constraints. Calculate insn length dynamically based

14324

+ on the operand types.

14325

+

14326

+2013-12-06 Richard Biener <rguenther@suse.de>

14327

+

14328

+ Backport from mainline

14329

+ 2013-11-29 Richard Biener <rguenther@suse.de>

14330

+

14331

+ PR tree-optimization/59334

14332

+ * tree-ssa-dce.c (eliminate_unnecessary_stmts): Fix bug

14333

+ in previous commit.

14334

+

14335

+ 2013-11-28 Richard Biener <rguenther@suse.de>

14336

+

14337

+ PR tree-optimization/59330

14338

+ * tree-ssa-dce.c (eliminate_unnecessary_stmts): Simplify

14339

+ and fix delayed marking of free calls not necessary.

14340

+

14341

+2013-12-06 Richard Biener <rguenther@suse.de>

14342

+

14343

+ Backport from mainline

14344

+ 2013-11-27 Richard Biener <rguenther@suse.de>

14345

+

14346

+ PR tree-optimization/59288

14347

+ * tree-vect-loop.c (get_initial_def_for_induction): Do not

14348

+ re-analyze the PHI but use STMT_VINFO_LOOP_PHI_EVOLUTION_PART.

14349

+

14350

+ 2013-11-19 Richard Biener <rguenther@suse.de>

14351

+

14352

+ PR tree-optimization/59164

14353

+ * tree-vect-loop.c (vect_analyze_loop_operations): Adjust

14354

+ check whether we can create an epilogue loop to reflect the

14355

+ cases where we create one.

14356

+

14357

+ 2013-09-05 Richard Biener <rguenther@suse.de>

14358

+

14359

+ PR tree-optimization/58137

14360

+ * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size):

14361

+ Do not create vectors of pointers.

14362

+ * tree-vect-loop.c (get_initial_def_for_induction): Use proper

14363

+ types for the components of the vector initializer.

14364

+ * tree-cfg.c (verify_gimple_assign_binary): Remove special-casing

14365

+ allowing pointer vectors with PLUS_EXPR/MINUS_EXPR.

14366

+

14367

+2013-12-06 Oleg Endo <olegendo@gcc.gnu.org>

14368

+

14369

+ PR target/51244

14370

+ PR target/59343

14371

+ * config/sh/sh.md (*cbranch_t): Check that there are no labels between

14372

+ the s1 insn and the testing insn. Remove REG_DEAD note from s1 insn.

14373

+

14374

+2013-12-05 Richard Biener <rguenther@suse.de>

14375

+

14376

+ Backport from mainline

14377

+ 2013-11-19 Richard Biener <rguenther@suse.de>

14378

+

14379

+ PR middle-end/58956

14380

+ * tree-ssa-ter.c (find_replaceable_in_bb): Avoid forwarding

14381

+ loads into stmts that may clobber it.

14382

+

14383

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

14384

+

14385

+ PR rtl-optimization/58726

14386

+ * combine.c (force_to_mode): Fix comment typo. Don't destructively

14387

+ modify x for ROTATE, ROTATERT and IF_THEN_ELSE.

14388

+

14389

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

14390

+ Uros Bizjak <ubizjak@gmail.com>

14391

+

14392

+ PR target/59163

14393

+ * config/i386/i386.c (ix86_legitimate_combined_insn): If for

14394

+ !TARGET_AVX there is misaligned MEM operand with vector mode

14395

+ and get_attr_ssememalign is 0, return false.

14396

+ (ix86_expand_special_args_builtin): Add get_pointer_alignment

14397

+ computed alignment and for non-temporal loads/stores also

14398

+ at least GET_MODE_ALIGNMENT as MEM_ALIGN.

14399

+ * config/i386/sse.md

14400

+ (<sse>_loadu<ssemodesuffix><avxsizesuffix>,

14401

+ <sse>_storeu<ssemodesuffix><avxsizesuffix>,

14402

+ <sse2>_loaddqu<avxsizesuffix>,

14403

+ <sse2>_storedqu<avxsizesuffix>, <sse3>_lddqu<avxsizesuffix>,

14404

+ sse_vmrcpv4sf2, sse_vmrsqrtv4sf2, sse2_cvtdq2pd, sse_movhlps,

14405

+ sse_movlhps, sse_storehps, sse_loadhps, sse_loadlps,

14406

+ *vec_interleave_highv2df, *vec_interleave_lowv2df,

14407

+ *vec_extractv2df_1_sse, sse2_loadhpd, sse2_loadlpd, sse2_movsd,

14408

+ sse4_1_<code>v8qiv8hi2, sse4_1_<code>v4qiv4si2,

14409

+ sse4_1_<code>v4hiv4si2, sse4_1_<code>v2qiv2di2,

14410

+ sse4_1_<code>v2hiv2di2, sse4_1_<code>v2siv2di2, sse4_2_pcmpestr,

14411

+ *sse4_2_pcmpestr_unaligned, sse4_2_pcmpestri, sse4_2_pcmpestrm,

14412

+ sse4_2_pcmpestr_cconly, sse4_2_pcmpistr, *sse4_2_pcmpistr_unaligned,

14413

+ sse4_2_pcmpistri, sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Add

14414

+ ssememalign attribute.

14415

+ * config/i386/i386.md (ssememalign): New define_attr.

14416

+

14417

+2013-12-03 Jakub Jelinek <jakub@redhat.com>

14418

+

14419

+ PR middle-end/59011

14420

+ * gimplify.c (nonlocal_vla_vars): New variable.

14421

+ (gimplify_var_or_parm_decl): Put VAR_DECLs for VLAs into

14422

+ nonlocal_vla_vars chain.

14423

+ (gimplify_body): Call declare_vars on nonlocal_vla_vars chain

14424

+ if outer_bind has DECL_INITIAL (current_function_decl) block.

14425

+

14426

+ PR target/58864

14427

+ * optabs.c (emit_conditional_move): Save and restore

14428

+ pending_stack_adjust and stack_pointer_delta if cmove can't be used.

14429

+

14430

+2013-12-02 Jakub Jelinek <jakub@redhat.com>

14431

+

14432

+ PR tree-optimization/59358

14433

+ * tree-vrp.c (union_ranges): To check for the partially

14434

+ overlapping ranges or adjacent ranges, also compare *vr0max

14435

+ with vr1max.

14436

+

14437

+2013-12-02 Richard Biener <rguenther@suse.de>

14438

+

14439

+ PR tree-optimization/59139

14440

+ * tree-ssa-loop-niter.c (chain_of_csts_start): Properly match

14441

+ code in get_val_for.

14442

+ (get_val_for): Use gcc_checking_asserts.

14443

+

14444

+2013-11-27 Tom de Vries <tom@codesourcery.com>

14445

+ Marc Glisse <marc.glisse@inria.fr>

14446

+

14447

+ PR middle-end/59037

14448

+ * fold-const.c (fold_indirect_ref_1): Don't create out-of-bounds

14449

+ BIT_FIELD_REF.

14450

+ * gimplify.c (gimple_fold_indirect_ref): Same.

14451

+

14452

+2013-12-01 Eric Botcazou <ebotcazou@adacore.com>

14453

+

14454

+ * config/i386/winnt.c (i386_pe_asm_named_section): Be prepared for an

14455

+ identifier node.

14456

+

14457

+2013-12-01 Bernd Edlinger <bernd.edlinger@hotmail.de>

14458

+

14459

+ * expr.c (emit_group_store): Fix off-by-one BITFIELD_END argument.

14460

+

14461

+2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

14462

+

14463

+ Backport from mainline

14464

+ 2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

14465

+

14466

+ * config/arm/iterators.md (vrint_conds): New int attribute.

14467

+ * config/arm/vfp.md (<vrint_pattern><SDF:mode>2): Set conds attribute.

14468

+ (smax<mode>3): Likewise.

14469

+ (smin<mode>3): Likewise.

14470

+

14471

+2013-11-28 Uros Bizjak <ubizjak@gmail.com>

14472

+

14473

+ Backport from mainline

14474

+ 2013-11-27 Uros Bizjak <ubizjak@gmail.com>

14475

+ Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>

14476

+

14477

+ PR target/56788

14478

+ * gcc.target/i386/xop-frczX.c: New test.

14479

+

14480

+2013-11-28 Terry Guo <terry.guo@arm.com>

14481

+

14482

+ Backport mainline r205391

14483

+ 2013-11-26 Terry Guo <terry.guo@arm.com>

14484

+

14485

+ * config/arm/arm.c (require_pic_register): Handle high pic base

14486

+ register for thumb-1.

14487

+ (arm_load_pic_register): Also initialize high pic base register.

14488

+ * doc/invoke.texi: Update documentation for option -mpic-register.

14489

+

14490

+2013-11-27 Jakub Jelinek <jakub@redhat.com>

14491

+

14492

+ Backported from mainline

14493

+ 2013-11-26 Jakub Jelinek <jakub@redhat.com>

14494

+

14495

+ PR tree-optimization/59014

14496

+ * tree-vrp.c (register_edge_assert_for_1): Don't look

14497

+ through conversions from non-integral types or through

14498

+ narrowing conversions.

14499

+

14500

+2013-11-27 Eric Botcazou <ebotcazou@adacore.com>

14501

+

14502

+ PR middle-end/59138

14503

+ * expr.c (emit_group_store): Don't write past the end of the structure.

14504

+ (store_bit_field): Fix formatting.

14505

+

14506

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

14507

+

14508

+ Backport from mainline

14509

+ 2013-09-17 Sebastian Huber <sebastian.huber@embedded-brains.de>

14510

+

14511

+ * config/sparc/t-rtems: Add leon3 multilibs.

14512

+

14513

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

14514

+

14515

+ Backport from mainline

14516

+ 2013-08-09 Eric Botcazou <ebotcazou@adacore.com>

14517

+

14518

+ * configure.ac: Add GAS check for LEON instructions on SPARC.

14519

+ * configure: Regenerate.

14520

+ * config.in: Likewise.

14521

+ * config.gcc (with_cpu): Remove sparc-leon*-* and deal with LEON in the

14522

+ sparc*-*-* block.

14523

+ * config/sparc/sparc.opt (LEON, LEON3): New masks.

14524

+ * config/sparc/sparc.h (ASM_CPU32_DEFAULT_SPEC): Set to AS_LEON_FLAG

14525

+ for LEON or LEON3.

14526

+ (ASM_CPU_SPEC): Pass AS_LEON_FLAG if -mcpu=leon or -mcpu=leon3.

14527

+ (AS_LEON_FLAG): New macro.

14528

+ * config/sparc/sparc.c (sparc_option_override): Set MASK_LEON for leon

14529

+ and MASK_LEON3 for leon3 and unset them if HAVE_AS_LEON is not defined.

14530

+ Deal with LEON and LEON3 for the memory model.

14531

+ * config/sparc/sync.md (atomic_compare_and_swap<mode>): Enable if LEON3

14532

+ (atomic_compare_and_swap<mode>_1): Likewise.

14533

+ (*atomic_compare_and_swap<mode>_1): Likewise.

14534

+

14535

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

14536

+

14537

+ Backport from mainline

14538

+ 2013-07-23 Eric Botcazou <ebotcazou@adacore.com>

14539

+

14540

+ * doc/invoke.texi (SPARC Options): Document new leon3 processor value.

14541

+

14542

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

14543

+

14544

+ Backport from mainline

14545

+ 2013-07-22 Eric Botcazou <ebotcazou@adacore.com>

14546

+

14547

+ * config.gcc (sparc*-*-*): Accept leon3 processor.

14548

+ (sparc-leon*-*): Merge with sparc*-*-* and add leon3 support.

14549

+ * doc/invoke.texi (SPARC Options): Adjust -mfix-ut699 entry.

14550

+ * config/sparc/sparc-opts.h (enum processor_type): Add PROCESSOR_LEON3.

14551

+ * config/sparc/sparc.opt (enum processor_type): Add leon3.

14552

+ (mfix-ut699): Adjust comment.

14553

+ * config/sparc/sparc.h (TARGET_CPU_leon3): New define.

14554

+ (CPP_CPU32_DEFAULT_SPEC): Add leon3 support.

14555

+ (CPP_CPU_SPEC): Likewise.

14556

+ (ASM_CPU_SPEC): Likewise.

14557

+ * config/sparc/sparc.c (leon3_cost): New constant.

14558

+ (sparc_option_override): Add leon3 support.

14559

+ (mem_ref): New function.

14560

+ (sparc_gate_work_around_errata): Return true if -mfix-ut699 is enabled.

14561

+ (sparc_do_work_around_errata): Look into the instruction in the delay

14562

+ slot and adjust accordingly. Add fix for the data cache nullify issues

14563

+ of the UT699. Change insertion position for the NOP.

14564

+ * config/sparc/leon.md (leon_fpalu, leon_fpmds, write_buf): Delete.

14565

+ (leon3_load): New reservation.

14566

+ (leon_store): Bump latency to 2.

14567

+ (grfpu): New automaton.

14568

+ (grfpu_alu): New unit.

14569

+ (grfpu_ds): Likewise.

14570

+ (leon_fp_alu): Adjust.

14571

+ (leon_fp_mult): Delete.

14572

+ (leon_fp_div): Split into leon_fp_divs and leon_fp_divd.

14573

+ (leon_fp_sqrt): Split into leon_fp_sqrts and leon_fp_sqrtd.

14574

+ * config/sparc/sparc.md (cpu): Add leon3.

14575

+ * config/sparc/sync.md (atomic_exchangesi): Disable if -mfix-ut699.

14576

+ (swapsi): Likewise.

14577

+ (atomic_test_and_set): Likewise.

14578

+ (ldstub): Likewise.

14579

+

14580

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

14581

+

14582

+ Backport from mainline

14583

+ 2013-04-10 Steven Bosscher <steven@gcc.gnu.org>

14584

+

14585

+ * config/sparc/sparc.c: Include tree-pass.h.

14586

+ (TARGET_MACHINE_DEPENDENT_REORG): Do not redefine.

14587

+ (sparc_reorg): Rename to sparc_do_work_around_errata. Move to

14588

+ head of file. Change return type. Split off gate function.

14589

+ (sparc_gate_work_around_errata): New function.

14590

+ (pass_work_around_errata): New pass definition.

14591

+ (insert_pass_work_around_errata) New pass insert definition to

14592

+ insert pass_work_around_errata just after delayed-branch scheduling.

14593

+ (sparc_option_override): Insert the pass.

14594

+ * config/sparc/t-sparc (sparc.o): Add TREE_PASS_H dependence.

14595

+

14596

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

14597

+

14598

+ Backport from mainline

14599

+ 2013-05-28 Eric Botcazou <ebotcazou@adacore.com>

14600

+

14601

+ * doc/invoke.texi (SPARC Options): Document -mfix-ut699.

14602

+ * builtins.c (expand_builtin_mathfn) <BUILT_IN_SQRT>: Try to widen the

14603

+ mode if the instruction isn't available in the original mode.

14604

+ * config/sparc/sparc.opt (mfix-ut699): New option.

14605

+ * config/sparc/sparc.md (muldf3_extend): Disable if -mfix-ut699.

14606

+ (divdf3): Turn into expander.

14607

+ (divdf3_nofix): New insn.

14608

+ (divdf3_fix): Likewise.

14609

+ (divsf3): Disable if -mfix-ut699.

14610

+ (sqrtdf2): Turn into expander.

14611

+ (sqrtdf2_nofix): New insn.

14612

+ (sqrtdf2_fix): Likewise.

14613

+ (sqrtsf2): Disable if -mfix-ut699.

14614

+

14615

+2013-11-22 Eric Botcazou <ebotcazou@adacore.com>

14616

+

14617

+ * print-rtl.c (print_rtx) <case MEM>: Output a space if no MEM_EXPR.

14618

+

14619

+2013-11-21 Zhenqiang Chen <zhenqiang.chen@linaro.org>

14620

+

14621

+ PR bootstrap/57683

14622

+ Backport from mainline: r197467 and r198999.

14623

+ 2013-04-03 Jeff Law <law@redhat.com>

14624

+

14625

+ * Makefile.in (lra-constraints.o): Depend on $(OPTABS_H).

14626

+ (lra-eliminations.o): Likewise.

14627

+

14628

+ 2013-05-16 Jeff Law <law@redhat.com>

14629

+

14630

+ * Makefile.in (tree-switch-conversion.o): Depend on $(OPTABS_H).

14631

+

14632

+2013-11-20 Eric Botcazou <ebotcazou@adacore.com>

14633

+

14634

+ PR target/59207

14635

+ * config/sparc/sparc.c (sparc_fold_builtin) <case CODE_FOR_pdist_vis>:

14636

+ Make sure neg2_ovf is set before being used.

14637

+

14638

+2013-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14639

+ Dominik Vogt <vogt@linux.vnet.ibm.com>

14640

+

14641

+ Backport from mainline

14642

+ * config/s390/s390.c (s390_canonicalize_comparison): Don't fold

14643

+ int comparisons with an out of range condition code.

14644

+ (s390_optimize_nonescaping_tx): Skip empty BBs.

14645

+ Generate the new tbegin RTX when removing the FPR clobbers (with

14646

+ two SETs).

14647

+ (s390_expand_tbegin): Fix the retry loop counter. Copy CC to the

14648

+ result before doing the retry calculations.

14649

+ (s390_init_builtins): Make tbegin "returns_twice" and tabort

14650

+ "noreturn".

14651

+ * config/s390/s390.md (UNSPECV_TBEGIN_TDB): New constant used for

14652

+ the TDB setting part of an tbegin.

14653

+ ("tbegin_1", "tbegin_nofloat_1"): Add a set for the TDB.

14654

+ ("tx_assist"): Set unused argument to an immediate zero instead of

14655

+ loading zero into a GPR and pass it as argument.

14656

+ * config/s390/htmxlintrin.h (__TM_simple_begin, __TM_begin):

14657

+ Remove inline and related attributes.

14658

+ (__TM_nesting_depth, __TM_is_user_abort, __TM_is_named_user_abort)

14659

+ (__TM_is_illegal, __TM_is_footprint_exceeded)

14660

+ (__TM_is_nested_too_deep, __TM_is_conflict): Fix format value

14661

+ check.

14662

+

14663

+2013-11-19 Uros Bizjak <ubizjak@gmail.com>

14664

+

14665

+ Backport from mainline

14666

+ 2013-11-18 Uros Bizjak <ubizjak@gmail.com>

14667

+

14668

+ * config/i386/i386.c (ix86_decompose_address): Use REG_P instead of

14669

+ ix86_address_subreg_operand. Move subreg checks to

14670

+ ix86_validate_address_register. Move address override check to

14671

+ ix86_legitimate_address_p.

14672

+ (ix86_validate_address_register): New function.

14673

+ (ix86_legitimate_address_p): Call ix86_validate_address_register

14674

+ to validate base and index registers. Add address override check

14675

+ from ix86_decompose_address.

14676

+ (ix86_decompose_address): Remove.

14677

+

14678

+ Backport from mainline

14679

+ 2013-11-17 Uros Bizjak <ubizjak@gmail.com>

14680

+

14681

+ PR target/59153

14682

+ * config/i386/i386.c (ix86_address_subreg_operand): Do not

14683

+ reject non-integer subregs.

14684

+ (ix86_decompose_address): Do not reject invalid CONST_INT RTXes.

14685

+ Move check for invalid x32 constant addresses ...

14686

+ (ix86_legitimate_address_p): ... here.

14687

+

14688

+2013-11-19 Richard Biener <rguenther@suse.de>

14689

+

14690

+ Backport from mainline

14691

+ 2013-11-07 Richard Biener <rguenther@suse.de>

14692

+

14693

+ * tree-dfa.c (get_ref_base_and_extent): Fix casting.

14694

+

14695

+2013-11-19 Richard Biener <rguenther@suse.de>

14696

+

14697

+ PR tree-optimization/57517

14698

+ * tree-predcom.c (combinable_refs_p): Verify the combination

14699

+ is always executed when the refs are.

14700

+

14701

+2013-11-19 Richard Biener <rguenther@suse.de>

14702

+

14703

+ Backport from mainline

14704

+ 2013-11-05 Richard Biener <rguenther@suse.de>

14705

+

14706

+ PR middle-end/58941

14707

+ * tree-dfa.c (get_ref_base_and_extent): Merge common code

14708

+ in MEM_REF and TARGET_MEM_REF handling. Make sure to

14709

+ process trailing array detection before diving into the

14710

+ view-converted object (and possibly apply some extra offset).

14711

+

14712

+2013-11-18 Richard Biener <rguenther@suse.de>

14713

+

14714

+ Backport from mainline

14715

+ 2013-10-21 Richard Biener <rguenther@suse.de>

14716

+

14717

+ PR tree-optimization/58794

14718

+ * fold-const.c (operand_equal_p): Compare FIELD_DECL operand

14719

+ of COMPONENT_REFs with OEP_CONSTANT_ADDRESS_OF left in place.

14720

+

14721

+ 2013-10-21 Richard Biener <rguenther@suse.de>

14722

+

14723

+ PR middle-end/58742

14724

+ * fold-const.c (fold_binary_loc): Fold ((T) (X /[ex] C)) * C

14725

+ to (T) X for sign-changing conversions (or no conversion).

14726

+

14727

+ 2013-11-06 Richard Biener <rguenther@suse.de>

14728

+

14729

+ PR tree-optimization/58653

14730

+ * tree-predcom.c (ref_at_iteration): Rewrite to generate

14731

+ a MEM_REF.

14732

+ (prepare_initializers_chain): Adjust.

14733

+

14734

+ PR tree-optimization/59047

14735

+ * tree-predcom.c (ref_at_iteration): Handle bitfield accesses

14736

+ properly.

14737

+

14738

+ 2013-10-15 Richard Biener <rguenther@suse.de>

14739

+

14740

+ PR tree-optimization/58143

14741

+ * tree-ssa-loop-im.c (arith_code_with_undefined_signed_overflow):

14742

+ New function.

14743

+ (rewrite_to_defined_overflow): Likewise.

14744

+ (move_computations_dom_walker::before_dom): Rewrite stmts

14745

+ with undefined signed overflow that are not always executed

14746

+ into unsigned arithmetic.

14747

+

14748

+2013-11-14 Uros Bizjak <ubizjak@gmail.com>

14749

+

14750

+ Backport from mainline

14751

+ 2013-11-10 Uros Bizjak <ubizjak@gmail.com>

14752

+

14753

+ * mode-switching.c (optimize_mode_switching): Mark block as

14754

+ nontransparent, if last_mode at block exit is different from no_mode.

14755

+

14756

+ Backport from mainline

14757

+ 2013-11-06 Uros Bizjak <ubizjak@gmail.com>

14758

+

14759

+ PR target/59021

14760

+ * config/i386/i386.c (ix86_avx_u128_mode_needed): Require

14761

+ AVX_U128_DIRTY mode for call_insn RTXes that use AVX256 registers.

14762

+ (ix86_avx_u128_mode_needed): Return AVX_U128_DIRTY mode for call_insn

14763

+ RTXes that return in AVX256 register.

14764

+

14765

+2013-11-14 Jakub Jelinek <jakub@redhat.com>

14766

+ Uros Bizjak <ubizjak@gmail.com>

14767

+

14768

+ PR target/59101

14769

+ * config/i386/i386.md (*anddi_2): Only allow CCZmode if

14770

+ operands[2] satisfies_constraint_Z that might have bit 31 set.

14771

+

14772

+2013-11-12 H.J. Lu <hongjiu.lu@intel.com>

14773

+

14774

+ Backported from mainline

14775

+ 2013-11-12 H.J. Lu <hongjiu.lu@intel.com>

14776

+

14777

+ PR target/59088

14778

+ * config/i386/i386.c (initial_ix86_tune_features): Set

14779

+ X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL and

14780

+ X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL for m_HASWELL.

14781

+

14782

+2013-11-11 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

14783

+

14784

+ Backported from mainline

14785

+ 2013-10-30 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

14786

+

14787

+ PR target/58854

14788

+ * config/arm/arm.c (arm_expand_epilogue_apcs_frame): Emit blockage

14789

+

14790

+2013-11-11 Jakub Jelinek <jakub@redhat.com>

14791

+

14792

+ Backported from mainline

14793

+ 2013-11-06 Jakub Jelinek <jakub@redhat.com>

14794

+

14795

+ PR middle-end/58970

14796

+ * expr.c (get_bit_range): Handle *offset == NULL_TREE.

14797

+ (expand_assignment): If *bitpos is negative, set *offset

14798

+ and adjust *bitpos, so that it is not negative.

14799

+

14800

+ 2013-11-05 Jakub Jelinek <jakub@redhat.com>

14801

+

14802

+ PR rtl-optimization/58997

14803

+ * loop-iv.c (iv_subreg): For IV_UNKNOWN_EXTEND, expect

14804

+ get_iv_value to be in iv->mode rather than iv->extend_mode.

14805

+ (iv_extend): Likewise. Otherwise, if iv->extend != extend,

14806

+ use lowpart_subreg on get_iv_value before calling simplify_gen_unary.

14807

+ * loop-unswitch.c (may_unswitch_on): Make sure op[i] is in the right

14808

+ mode.

14809

+

14810

+2013-11-10 Karlson2k <k2k@narod.ru>

14811

+ Kai Tietz <ktietz@redhat.com>

14812

+

14813

+ Merged from trunk

14814

+ PR plugins/52872

14815

+ * configure.ac: Adding for exported symbols check

14816

+ and for rdynamic-check executable-extension.

14817

+ * configure: Regenerated.

14818

+

14819

+2013-11-07 H.J. Lu <hongjiu.lu@intel.com>

14820

+

14821

+ PR target/59034

14822

+ * config/i386/i386.md (push peepholer/splitter): Use Pmode

14823

+ with stack_pointer_rtx.

14824

+

14825

+2013-11-05 Uros Bizjak <ubizjak@gmail.com>

14826

+

14827

+ * config/i386/t-rtems (MULTILIB_MATCHES): Fix option typos.

14828

+

14829

+2013-11-05 Jakub Jelinek <jakub@redhat.com>

14830

+

14831

+ PR tree-optimization/58984

14832

+ * ipa-prop.c (ipa_load_from_parm_agg_1): Add SIZE_P argument,

14833

+ set *SIZE_P if non-NULL on success.

14834

+ (ipa_load_from_parm_agg, ipa_analyze_indirect_call_uses): Adjust

14835

+ callers.

14836

+ (ipcp_transform_function): Likewise. Punt if size of access

14837

+ is different from TYPE_SIZE on v->value's type.

14838

+

14839

+2013-11-03 H.J. Lu <hongjiu.lu@intel.com>

14840

+

14841

+ Backport from mainline

14842

+ 2013-10-12 H.J. Lu <hongjiu.lu@intel.com>

14843

+

14844

+ PR target/58690

14845

+ * config/i386/i386.c (ix86_copy_addr_to_reg): New function.

14846

+ (ix86_expand_movmem): Replace copy_addr_to_reg with

14847

+ ix86_copy_addr_to_reg.

14848

+ (ix86_expand_setmem): Likewise.

14849

+

14850

+2013-10-29 Uros Bizjak <ubizjak@gmail.com>

14851

+

14852

+ Backport from mainline

14853

+ 2013-08-08 Richard Sandiford <rdsandiford@googlemail.com>

14854

+

14855

+ PR rtl-optimization/58079

14856

+ * combine.c (combine_simplify_rtx): Avoid using SUBST if

14857

+ simplify_comparison has widened a comparison with an integer.

14858

+

14859

+2013-10-29 Martin Jambor <mjambor@suse.cz>

14860

+

14861

+ PR middle-end/58789

14862

+ Backport from mainline

14863

+ 2013-05-09 Martin Jambor <mjambor@suse.cz>

14864

+

14865

+ PR lto/57084

14866

+ * gimple-fold.c (canonicalize_constructor_val): Call

14867

+ cgraph_get_create_real_symbol_node instead of cgraph_get_create_node.

14868

+

14869

+ Backport from mainline

14870

+ 2013-03-16 Jan Hubicka <jh@suse.cz>

14871

+

14872

+ * cgraph.h (cgraph_get_create_real_symbol_node): Declare.

14873

+ * cgraph.c (cgraph_get_create_real_symbol_node): New function.

14874

+ * cgrpahbuild.c: Use cgraph_get_create_real_symbol_node instead

14875

+ of cgraph_get_create_node.

14876

+ * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.

14877

+

14878

+2013-10-28 Tom de Vries <tom@codesourcery.com>

14879

+

14880

+ * cfgexpand.c (gimple_expand_cfg): Remove test for parm_birth_insn.

14881

+ Don't commit insertions after NOTE_INSN_FUNCTION_BEG.

14882

+

14883

+2013-10-26 Uros Bizjak <ubizjak@gmail.com>

14884

+

14885

+ Backport from mainline

14886

+ 2013-10-22 Uros Bizjak <ubizjak@gmail.com>

14887

+

14888

+ PR target/58779

14889

+ * config/i386/i386.c (put_condition_code) <case GTU, case LEU>:

14890

+ Remove CCCmode handling.

14891

+ <case LTU>: Return 'c' suffix for CCCmode.

14892

+ <case GEU>: Return 'nc' suffix for CCCmode.

14893

+ (ix86_cc_mode) <case GTU, case LEU>: Do not generate overflow checks.

14894

+ * config/i386/i386.md (*sub<mode>3_cconly_overflow): Remove.

14895

+ (*sub<mode>3_cc_overflow): Ditto.

14896

+ (*subsi3_zext_cc_overflow): Ditto.

14897

+

14898

+2013-10-26 Uros Bizjak <ubizjak@gmail.com>

14899

+

14900

+ Backport from mainline

14901

+ 2013-10-19 Uros Bizjak <ubizjak@gmail.com>

14902

+

14903

+ PR target/58792

14904

+ * config/i386/i386.c (ix86_function_value_regno): Add DX_REG,

14905

+ ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG

14906

+ and SI_REG for 64bit SYSV ABI targets.

14907

+

14908

+2013-08-25 Richard Henderson <rth@twiddle.net>

14909

+

14910

+ PR rtl/58542

14911

+ * optabs.c (maybe_emit_atomic_exchange): Use create_input_operand

14912

+ instead of create_convert_operand_to.

14913

+ (maybe_emit_sync_lock_test_and_set): Likewise.

14914

+ (expand_atomic_compare_and_swap): Likewise.

14915

+ (maybe_emit_compare_and_swap_exchange_loop): Don't convert_modes.

14916

+

14917

+2013-10-25 Eric Botcazou <ebotcazou@adacore.com>

14918

+

14919

+ PR rtl-optimization/58831

14920

+ * alias.c (init_alias_analysis): At the beginning of each iteration, set

14921

+ the reg_seen[N] bit if static_reg_base_value[N] is non-null.

14922

+

14923

+2013-10-25 Eric Botcazou <ebotcazou@adacore.com>

14924

+

14925

+ * recog.c (search_ofs): New static variable moved from...

14926

+ (peep2_find_free_register): ...here.

14927

+ (peephole2_optimize): Initialize it.

14928

+

14929

+2013-10-24 David Edelsohn <dje.gcc@gmail.com>

14930

+

14931

+ Backport from mainline

14932

+ 2013-10-23 David Edelsohn <dje.gcc@gmail.com>

14933

+

14934

+ PR target/58838

14935

+ * config/rs6000/rs6000.md (mulsi3_internal1 and splitter): Add

14936

+ TARGET_32BIT final condition.

14937

+ (mulsi3_internal2 and splitter): Same.

14938

+

14939

+2013-10-23 Tom de Vries <tom@codesourcery.com>

14940

+

14941

+ PR tree-optimization/58805

14942

+ * tree-ssa-tail-merge.c (stmt_local_def): Add gimple_vdef check.

14943

+

14944

+2013-10-23 Richard Biener <rguenther@suse.de>

14945

+

14946

+ Backport from mainline

14947

+ 2013-06-24 Richard Biener <rguenther@suse.de>

14948

+

14949

+ PR tree-optimization/57488

14950

+ * tree-ssa-pre.c (insert): Clear NEW sets before each iteration.

14951

+

14952

+2013-10-16 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>

14953

+

14954

+ Backport from mainline

14955

+ 2013-10-16 Ganesh Gopalasubramanian

14956

+ <Ganesh.Gopalasubramanian@amd.com>

14957

+

14958

+ * config/i386/i386.c (ix86_option_override_internal): Enable FMA4

14959

+ for AMD bdver3.

14960

+

14961

2013-10-16 Release Manager

14962

14963

* GCC 4.8.2 released.

14964

@@ -639,7 +5708,7 @@

14965

2013-07-31 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14966

14967

Backport from mainline

14968

- 2013-03-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14969

+ 2013-03-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14970

14971

* config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Define.

14972

14973

Index: gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c

14974

===================================================================

14975

--- a/src/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c (.../tags/gcc_4_8_2_release)

14976

+++ b/src/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c (.../branches/gcc-4_8-branch)

14977

@@ -0,0 +1,11 @@

14978

+/* { dg-do compile } */

14979

+/* { dg-require-effective-target arm_thumb1_ok } */

14980

+/* { dg-options "-mthumb -fpic -msingle-pic-base" } */

14981

+

14982

+int g_test;

14983

+

14984

+int

14985

+foo (int par)

14986

+{

14987

+ g_test = par;

14988

+}

14989

Index: gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c

14990

===================================================================

14991

--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c (.../tags/gcc_4_8_2_release)

14992

+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c (.../branches/gcc-4_8-branch)

14993

@@ -0,0 +1,25 @@

14994

+/* Test the `vst1Q_laneu64' ARM Neon intrinsic. */

14995

+

14996

+/* Detect ICE in the case of unaligned memory address. */

14997

+

14998

+/* { dg-do compile } */

14999

+/* { dg-require-effective-target arm_neon_ok } */

15000

+/* { dg-add-options arm_neon } */

15001

+

15002

+#include "arm_neon.h"

15003

+

15004

+unsigned char dummy_store[1000];

15005

+

15006

+void

15007

+foo (char* addr)

15008

+{

15009

+ uint8x16_t vdata = vld1q_u8 (addr);

15010

+ vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0);

15011

+}

15012

+

15013

+uint64_t

15014

+bar (uint64x2_t vdata)

15015

+{

15016

+ vdata = vld1q_lane_u64 ((uint64_t*) &dummy_store, vdata, 0);

15017

+ return vgetq_lane_u64 (vdata, 0);

15018

+}

15019

Index: gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c

15020

===================================================================

15021

--- a/src/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c (.../tags/gcc_4_8_2_release)

15022

+++ b/src/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c (.../branches/gcc-4_8-branch)

15023

@@ -0,0 +1,11 @@

15024

+/* { dg-do compile } */

15025

+/* { dg-require-effective-target arm_thumb1_ok } */

15026

+/* { dg-options "-mthumb -fpic -mpic-register=9" } */

15027

+

15028

+int g_test;

15029

+

15030

+int

15031

+foo (int par)

15032

+{

15033

+ g_test = par;

15034

+}

15035

Index: gcc/testsuite/gcc.target/arm/require-pic-register-loc.c

15036

===================================================================

15037

--- a/src/gcc/testsuite/gcc.target/arm/require-pic-register-loc.c (.../tags/gcc_4_8_2_release)

15038

+++ b/src/gcc/testsuite/gcc.target/arm/require-pic-register-loc.c (.../branches/gcc-4_8-branch)

15039

@@ -0,0 +1,29 @@

15040

+/* { dg-do compile } */

15041

+/* { dg-options "-g -fPIC" } */

15042

+

15043

+void *v;

15044

+void a (void *x) { }

15045

+void b (void) { }

15046

+ /* line 7. */

15047

+int /* line 8. */

15048

+main (int argc) /* line 9. */

15049

+{ /* line 10. */

15050

+ if (argc == 12345) /* line 11. */

15051

+ {

15052

+ a (v);

15053

+ return 1;

15054

+ }

15055

+ b ();

15056

+

15057

+ return 0;

15058

+}

15059

+

15060

+/* { dg-final { scan-assembler-not "\.loc 1 7 0" } } */

15061

+/* { dg-final { scan-assembler-not "\.loc 1 8 0" } } */

15062

+/* { dg-final { scan-assembler-not "\.loc 1 9 0" } } */

15063

+

15064

+/* The loc at the start of the prologue. */

15065

+/* { dg-final { scan-assembler-times "\.loc 1 10 0" 1 } } */

15066

+

15067

+/* The loc at the end of the prologue, with the first user line. */

15068

+/* { dg-final { scan-assembler-times "\.loc 1 11 0" 1 } } */

15069

Index: gcc/testsuite/gcc.target/arm/vrinta-ce.c

15070

===================================================================

15071

--- a/src/gcc/testsuite/gcc.target/arm/vrinta-ce.c (.../tags/gcc_4_8_2_release)

15072

+++ b/src/gcc/testsuite/gcc.target/arm/vrinta-ce.c (.../branches/gcc-4_8-branch)

15073

@@ -0,0 +1,15 @@

15074

+/* { dg-do compile } */

15075

+/* { dg-require-effective-target arm_v8_vfp_ok } */

15076

+/* { dg-options "-O2 -marm -march=armv8-a" } */

15077

+/* { dg-add-options arm_v8_vfp } */

15078

+

15079

+double foo (double a)

15080

+{

15081

+ if (a > 3.0)

15082

+ return __builtin_round (a);

15083

+

15084

+ return 0.0;

15085

+}

15086

+

15087

+/* { dg-final { scan-assembler-times "vrinta.f64\td\[0-9\]+" 1 } } */

15088

+

15089

Index: gcc/testsuite/gcc.target/arm/pr54300.C

15090

===================================================================

15091

--- a/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../tags/gcc_4_8_2_release)

15092

+++ b/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../branches/gcc-4_8-branch)

15093

@@ -0,0 +1,61 @@

15094

+/* { dg-do run } */

15095

+/* { dg-require-effective-target arm_neon } */

15096

+/* { dg-options "-O2" } */

15097

+/* { dg-add-options arm_neon } */

15098

+

15099

+#include <arm_neon.h>

15100

+#include <stdlib.h>

15101

+

15102

+struct __attribute__ ((aligned(8))) _v16u8_ {

15103

+ uint8x16_t val;

15104

+ _v16u8_( const int16x8_t &src) { val = vreinterpretq_u8_s16(src); }

15105

+ operator int16x8_t () const { return vreinterpretq_s16_u8(val); }

15106

+};

15107

+typedef struct _v16u8_ v16u8;

15108

+

15109

+struct __attribute__ ((aligned(4))) _v8u8_ {

15110

+ uint8x8_t val;

15111

+ _v8u8_( const uint8x8_t &src) { val = src; }

15112

+ operator int16x4_t () const { return vreinterpret_s16_u8(val); }

15113

+};

15114

+typedef struct _v8u8_ v8u8;

15115

+

15116

+typedef v16u8 v8i16;

15117

+typedef int32x4_t v4i32;

15118

+typedef const short cv1i16;

15119

+typedef const unsigned char cv1u8;

15120

+typedef const v8i16 cv8i16;

15121

+

15122

+static inline __attribute__((always_inline)) v8u8 zero_64(){ return vdup_n_u8( 0 ); }

15123

+

15124

+static inline __attribute__((always_inline)) v8i16 loadlo_8i16( cv8i16* p ){

15125

+ return vcombine_s16( vld1_s16( (cv1i16 *)p ), zero_64() );

15126

+}

15127

+static inline __attribute__((always_inline)) v8i16 _loadlo_8i16( cv8i16* p, int offset ){

15128

+ return loadlo_8i16( (cv8i16*)(&((cv1u8*)p)[offset]) );

15129

+}

15130

+

15131

+void __attribute__((noinline))

15132

+test(unsigned short *_Inp, int32_t *_Out,

15133

+ unsigned int s1v, unsigned int dv0,

15134

+ unsigned int smask_v)

15135

+{

15136

+ int32x4_t c = vdupq_n_s32(0);

15137

+

15138

+ for(unsigned int sv=0 ; sv!=dv0 ; sv=(sv+s1v)&smask_v )

15139

+ {

15140

+ int32x4_t s;

15141

+ s = vmovl_s16( vget_low_s16( _loadlo_8i16( (cv8i16*) _Inp, sv ) ) );

15142

+ c = vaddq_s32( c, s );

15143

+ }

15144

+ vst1q_s32( _Out, c );

15145

+}

15146

+

15147

+main()

15148

+{

15149

+ unsigned short a[4] = {1, 2, 3, 4};

15150

+ int32_t b[4] = {0, 0, 0, 0};

15151

+ test(a, b, 1, 1, ~0);

15152

+ if (b[0] != 1 || b[1] != 2 || b[2] != 3 || b[3] != 4)

15153

+ abort();

15154

+}

15155

Index: gcc/testsuite/gcc.target/arm/pr59826.c

15156

===================================================================

15157

--- a/src/gcc/testsuite/gcc.target/arm/pr59826.c (.../tags/gcc_4_8_2_release)

15158

+++ b/src/gcc/testsuite/gcc.target/arm/pr59826.c (.../branches/gcc-4_8-branch)

15159

@@ -0,0 +1,35 @@

15160

+/* { dg-do compile } */

15161

+/* { dg-options "-mthumb -mcpu=cortex-m4 -fprefetch-loop-arrays -O2" } */

15162

+

15163

+typedef struct genxWriter_rec * genxWriter;

15164

+typedef unsigned char * utf8;

15165

+typedef const unsigned char * constUtf8;

15166

+

15167

+int genxScrubText(genxWriter w, constUtf8 in, utf8 out)

15168

+{

15169

+ int problems = 0;

15170

+ constUtf8 last = in;

15171

+

15172

+ while (*in)

15173

+ {

15174

+ int c = genxNextUnicodeChar(&in);

15175

+ if (c == -1)

15176

+ {

15177

+ problems++;

15178

+ last = in;

15179

+ continue;

15180

+ }

15181

+

15182

+ if (!isXMLChar(w, c))

15183

+ {

15184

+ problems++;

15185

+ last = in;

15186

+ continue;

15187

+ }

15188

+

15189

+ while (last < in)

15190

+ *out++ = *last++;

15191

+ }

15192

+ *out = 0;

15193

+ return problems;

15194

+}

15195

Index: gcc/testsuite/gcc.target/arm/pr57637.c

15196

===================================================================

15197

--- a/src/gcc/testsuite/gcc.target/arm/pr57637.c (.../tags/gcc_4_8_2_release)

15198

+++ b/src/gcc/testsuite/gcc.target/arm/pr57637.c (.../branches/gcc-4_8-branch)

15199

@@ -0,0 +1,206 @@

15200

+/* { dg-do run } */

15201

+/* { dg-options "-O2 -fno-inline" } */

15202

+

15203

+typedef struct _GtkCssStyleProperty GtkCssStyleProperty;

15204

+

15205

+struct _GtkCssStyleProperty

15206

+{

15207

+ int *initial_value;

15208

+ unsigned int id;

15209

+ unsigned int inherit :1;

15210

+ unsigned int animated :1;

15211

+ unsigned int affects_size :1;

15212

+ unsigned int affects_font :1;

15213

+

15214

+ int * parse_value;

15215

+ int * query_value;

15216

+ int * assign_value;

15217

+};

15218

+

15219

+void

15220

+g_assertion_message_expr (const char *domain,

15221

+ const char *file,

15222

+ int line,

15223

+ const char *func,

15224

+ const char *expr) __attribute__((__noreturn__));

15225

+

15226

+void

15227

+g_assertion_message_expr (const char *domain,

15228

+ const char *file,

15229

+ int line,

15230

+ const char *func,

15231

+ const char *expr)

15232

+{

15233

+ __builtin_abort ();

15234

+}

15235

+int

15236

+get_id (GtkCssStyleProperty *property)

15237

+{

15238

+ return 1;

15239

+}

15240

+int

15241

+_gtk_css_style_property_get_type ()

15242

+{

15243

+ return 1;

15244

+}

15245

+

15246

+GtkCssStyleProperty *

15247

+g_object_new (int object_type,

15248

+ const char *first_property_name,

15249

+ ...)

15250

+{

15251

+ return (GtkCssStyleProperty *) __builtin_malloc (sizeof (GtkCssStyleProperty));

15252

+}

15253

+

15254

+typedef enum {

15255

+ INHERIT = (1 << 0),

15256

+ ANIMATED = (1 << 1),

15257

+ RESIZE = (1 << 2),

15258

+ FONT = (1 << 3)

15259

+} GtkStylePropertyFlags;

15260

+

15261

+int t = 0;

15262

+void

15263

+gtk_css_style_property_register (const char * name,

15264

+ int expected_id,

15265

+ int value_type,

15266

+ int flags,

15267

+ int *parse_value,

15268

+ int *query_value,

15269

+ int *assign_value,

15270

+ int *initial_value)

15271

+{

15272

+ GtkCssStyleProperty *node;

15273

+

15274

+ do

15275

+ {

15276

+ if (__builtin_expect (__extension__ (

15277

+ {

15278

+ int _g_boolean_var_;

15279

+ if (initial_value != ((void *)0))

15280

+ _g_boolean_var_ = 1;

15281

+ else

15282

+ _g_boolean_var_ = 0;

15283

+ _g_boolean_var_;

15284

+ }),

15285

+ 1))

15286

+ ;

15287

+ else

15288

+ g_assertion_message_expr ("Gtk",

15289

+ "gtkcssstylepropertyimpl.c",

15290

+ 85,

15291

+ ((const char*) (__PRETTY_FUNCTION__)),

15292

+ "initial_value != NULL");

15293

+ } while (0);

15294

+

15295

+ do

15296

+ {

15297

+ if (__builtin_expect (__extension__ (

15298

+ {

15299

+ int _g_boolean_var_;

15300

+ if (parse_value != ((void *)0))

15301

+ _g_boolean_var_ = 1;

15302

+ else

15303

+ _g_boolean_var_ = 0;

15304

+ _g_boolean_var_;

15305

+ }),

15306

+ 1))

15307

+ ;

15308

+ else

15309

+ g_assertion_message_expr ("Gtk",

15310

+ "gtkcssstylepropertyimpl.c",

15311

+ 86,

15312

+ ((const char*) (__PRETTY_FUNCTION__)),

15313

+ "parse_value != NULL");

15314

+ } while (0);

15315

+

15316

+ do

15317

+ {

15318

+ if (__builtin_expect (__extension__ (

15319

+ {

15320

+ int _g_boolean_var_;

15321

+ if (value_type == ((int) ((1) << (2)))

15322

+ || query_value != ((void *)0))

15323

+ _g_boolean_var_ = 1;

15324

+ else

15325

+ _g_boolean_var_ = 0;

15326

+ _g_boolean_var_;

15327

+ }),

15328

+ 1))

15329

+ ;

15330

+ else

15331

+ g_assertion_message_expr ("Gtk",

15332

+ "gtkcssstylepropertyimpl.c",

15333

+ 87, ((const char*) (__PRETTY_FUNCTION__)),

15334

+ "value_type == NONE || query_value != NULL");

15335

+ } while (0);

15336

+

15337

+ /* FLAGS is changed in a cond_exec instruction with pr57637. */

15338

+ if (flags == 15)

15339

+ t = 15;

15340

+

15341

+ do

15342

+ {

15343

+ if (__builtin_expect (__extension__ (

15344

+ {

15345

+ int _g_boolean_var_;

15346

+ if (value_type == ((1) << (2))

15347

+ || assign_value != ((void *)0))

15348

+ _g_boolean_var_ = 1;

15349

+ else

15350

+ _g_boolean_var_ = 0;

15351

+ _g_boolean_var_;

15352

+ }),

15353

+ 1))

15354

+ ;

15355

+ else

15356

+ g_assertion_message_expr ("Gtk",

15357

+ "gtkcssstylepropertyimpl.c",

15358

+ 88, ((const char*) (__PRETTY_FUNCTION__)),

15359

+ "value_type == NONE || assign_value != NULL");

15360

+ } while (0);

15361

+

15362

+ node = g_object_new ((_gtk_css_style_property_get_type ()),

15363

+ "value-type", value_type,

15364

+ "affects-size", (flags & RESIZE) ? (0) : (!(0)),

15365

+ "affects-font", (flags & FONT) ? (!(0)) : (0),

15366

+ "animated", (flags & ANIMATED) ? (!(0)) : (0),

15367

+ "inherit", (flags & INHERIT) ? (!(0)) : (0),

15368

+ "initial-value", initial_value,

15369

+ "name", name,

15370

+ ((void *)0));

15371

+

15372

+ node->parse_value = parse_value;

15373

+ node->query_value = query_value;

15374

+ node->assign_value = assign_value;

15375

+

15376

+ do

15377

+ {

15378

+ if (__builtin_expect (__extension__ (

15379

+ {

15380

+ int _g_boolean_var_;

15381

+ if (get_id (node) == expected_id)

15382

+ _g_boolean_var_ = 1;

15383

+ else

15384

+ _g_boolean_var_ = 0;

15385

+ _g_boolean_var_;

15386

+ }),

15387

+ 1))

15388

+ ;

15389

+ else

15390

+ g_assertion_message_expr ("Gtk",

15391

+ "gtkcssstylepropertyimpl.c",

15392

+ 106,

15393

+ ((const char*) (__PRETTY_FUNCTION__)),

15394

+ "get_id (node) == expected_id");

15395

+ } while (0);

15396

+}

15397

+

15398

+int main ()

15399

+{

15400

+ gtk_css_style_property_register ("test", 1, 4, 15, &t, &t, &t, &t);

15401

+

15402

+ if (t != 15)

15403

+ __builtin_abort ();

15404

+ return 0;

15405

+}

15406

Index: gcc/testsuite/gcc.target/powerpc/ppc-target-2.c

15407

===================================================================

15408

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c (.../tags/gcc_4_8_2_release)

15409

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c (.../branches/gcc-4_8-branch)

15410

@@ -5,8 +5,7 @@

15411

/* { dg-final { scan-assembler-times "fabs" 3 } } */

15412

/* { dg-final { scan-assembler-times "fnabs" 3 } } */

15413

/* { dg-final { scan-assembler-times "fsel" 3 } } */

15414

-/* { dg-final { scan-assembler-times "fcpsgn" 3 } } */

15415

-/* { dg-final { scan-assembler-times "xscpsgndp" 1 } } */

15416

+/* { dg-final { scan-assembler-times "fcpsgn\|xscpsgndp" 4 } } */

15417

15418

/* fabs/fnabs/fsel */

15419

double normal1 (double a, double b) { return __builtin_copysign (a, b); }

15420

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c

15421

===================================================================

15422

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c (.../tags/gcc_4_8_2_release)

15423

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c (.../branches/gcc-4_8-branch)

15424

@@ -0,0 +1,65 @@

15425

+/* { dg-do compile { target { powerpc*-*-* } } } */

15426

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15427

+/* { dg-require-effective-target powerpc_p8vector_ok } */

15428

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

15429

+

15430

+#ifndef TYPE

15431

+#define TYPE long long

15432

+#endif

15433

+

15434

+#ifndef SIGN_TYPE

15435

+#define SIGN_TYPE signed TYPE

15436

+#endif

15437

+

15438

+#ifndef UNS_TYPE

15439

+#define UNS_TYPE unsigned TYPE

15440

+#endif

15441

+

15442

+typedef vector SIGN_TYPE v_sign;

15443

+typedef vector UNS_TYPE v_uns;

15444

+

15445

+v_sign sign_add (v_sign a, v_sign b)

15446

+{

15447

+ return a + b;

15448

+}

15449

+

15450

+v_sign sign_sub (v_sign a, v_sign b)

15451

+{

15452

+ return a - b;

15453

+}

15454

+

15455

+v_sign sign_shift_left (v_sign a, v_sign b)

15456

+{

15457

+ return a << b;

15458

+}

15459

+

15460

+v_sign sign_shift_right (v_sign a, v_sign b)

15461

+{

15462

+ return a >> b;

15463

+}

15464

+

15465

+v_uns uns_add (v_uns a, v_uns b)

15466

+{

15467

+ return a + b;

15468

+}

15469

+

15470

+v_uns uns_sub (v_uns a, v_uns b)

15471

+{

15472

+ return a - b;

15473

+}

15474

+

15475

+v_uns uns_shift_left (v_uns a, v_uns b)

15476

+{

15477

+ return a << b;

15478

+}

15479

+

15480

+v_uns uns_shift_right (v_uns a, v_uns b)

15481

+{

15482

+ return a >> b;

15483

+}

15484

+

15485

+/* { dg-final { scan-assembler-times "vaddudm" 2 } } */

15486

+/* { dg-final { scan-assembler-times "vsubudm" 2 } } */

15487

+/* { dg-final { scan-assembler-times "vsld" 2 } } */

15488

+/* { dg-final { scan-assembler-times "vsrad" 1 } } */

15489

+/* { dg-final { scan-assembler-times "vsrd" 1 } } */

15490

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c

15491

===================================================================

15492

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c (.../tags/gcc_4_8_2_release)

15493

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c (.../branches/gcc-4_8-branch)

15494

@@ -0,0 +1,200 @@

15495

+/* { dg-do compile { target { powerpc*-*-* } } } */

15496

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15497

+/* { dg-require-effective-target powerpc_p8vector_ok } */

15498

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

15499

+

15500

+#ifndef SIZE

15501

+#define SIZE 1024

15502

+#endif

15503

+

15504

+#ifndef ALIGN

15505

+#define ALIGN 32

15506

+#endif

15507

+

15508

+#ifndef TYPE

15509

+#define TYPE long long

15510

+#endif

15511

+

15512

+#ifndef SIGN_TYPE

15513

+#define SIGN_TYPE signed TYPE

15514

+#endif

15515

+

15516

+#ifndef UNS_TYPE

15517

+#define UNS_TYPE unsigned TYPE

15518

+#endif

15519

+

15520

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

15521

+

15522

+SIGN_TYPE sa[SIZE] ALIGN_ATTR;

15523

+SIGN_TYPE sb[SIZE] ALIGN_ATTR;

15524

+SIGN_TYPE sc[SIZE] ALIGN_ATTR;

15525

+

15526

+UNS_TYPE ua[SIZE] ALIGN_ATTR;

15527

+UNS_TYPE ub[SIZE] ALIGN_ATTR;

15528

+UNS_TYPE uc[SIZE] ALIGN_ATTR;

15529

+

15530

+void

15531

+sign_add (void)

15532

+{

15533

+ unsigned long i;

15534

+

15535

+ for (i = 0; i < SIZE; i++)

15536

+ sa[i] = sb[i] + sc[i];

15537

+}

15538

+

15539

+void

15540

+sign_sub (void)

15541

+{

15542

+ unsigned long i;

15543

+

15544

+ for (i = 0; i < SIZE; i++)

15545

+ sa[i] = sb[i] - sc[i];

15546

+}

15547

+

15548

+void

15549

+sign_shift_left (void)

15550

+{

15551

+ unsigned long i;

15552

+

15553

+ for (i = 0; i < SIZE; i++)

15554

+ sa[i] = sb[i] << sc[i];

15555

+}

15556

+

15557

+void

15558

+sign_shift_right (void)

15559

+{

15560

+ unsigned long i;

15561

+

15562

+ for (i = 0; i < SIZE; i++)

15563

+ sa[i] = sb[i] >> sc[i];

15564

+}

15565

+

15566

+void

15567

+sign_max (void)

15568

+{

15569

+ unsigned long i;

15570

+

15571

+ for (i = 0; i < SIZE; i++)

15572

+ sa[i] = (sb[i] > sc[i]) ? sb[i] : sc[i];

15573

+}

15574

+

15575

+void

15576

+sign_min (void)

15577

+{

15578

+ unsigned long i;

15579

+

15580

+ for (i = 0; i < SIZE; i++)

15581

+ sa[i] = (sb[i] < sc[i]) ? sb[i] : sc[i];

15582

+}

15583

+

15584

+void

15585

+sign_abs (void)

15586

+{

15587

+ unsigned long i;

15588

+

15589

+ for (i = 0; i < SIZE; i++)

15590

+ sa[i] = (sb[i] < 0) ? -sb[i] : sb[i]; /* xor, vsubudm, vmaxsd. */

15591

+}

15592

+

15593

+void

15594

+sign_eq (SIGN_TYPE val1, SIGN_TYPE val2)

15595

+{

15596

+ unsigned long i;

15597

+

15598

+ for (i = 0; i < SIZE; i++)

15599

+ sa[i] = (sb[i] == sc[i]) ? val1 : val2;

15600

+}

15601

+

15602

+void

15603

+sign_lt (SIGN_TYPE val1, SIGN_TYPE val2)

15604

+{

15605

+ unsigned long i;

15606

+

15607

+ for (i = 0; i < SIZE; i++)

15608

+ sa[i] = (sb[i] < sc[i]) ? val1 : val2;

15609

+}

15610

+

15611

+void

15612

+uns_add (void)

15613

+{

15614

+ unsigned long i;

15615

+

15616

+ for (i = 0; i < SIZE; i++)

15617

+ ua[i] = ub[i] + uc[i];

15618

+}

15619

+

15620

+void

15621

+uns_sub (void)

15622

+{

15623

+ unsigned long i;

15624

+

15625

+ for (i = 0; i < SIZE; i++)

15626

+ ua[i] = ub[i] - uc[i];

15627

+}

15628

+

15629

+void

15630

+uns_shift_left (void)

15631

+{

15632

+ unsigned long i;

15633

+

15634

+ for (i = 0; i < SIZE; i++)

15635

+ ua[i] = ub[i] << uc[i];

15636

+}

15637

+

15638

+void

15639

+uns_shift_right (void)

15640

+{

15641

+ unsigned long i;

15642

+

15643

+ for (i = 0; i < SIZE; i++)

15644

+ ua[i] = ub[i] >> uc[i];

15645

+}

15646

+

15647

+void

15648

+uns_max (void)

15649

+{

15650

+ unsigned long i;

15651

+

15652

+ for (i = 0; i < SIZE; i++)

15653

+ ua[i] = (ub[i] > uc[i]) ? ub[i] : uc[i];

15654

+}

15655

+

15656

+void

15657

+uns_min (void)

15658

+{

15659

+ unsigned long i;

15660

+

15661

+ for (i = 0; i < SIZE; i++)

15662

+ ua[i] = (ub[i] < uc[i]) ? ub[i] : uc[i];

15663

+}

15664

+

15665

+void

15666

+uns_eq (UNS_TYPE val1, UNS_TYPE val2)

15667

+{

15668

+ unsigned long i;

15669

+

15670

+ for (i = 0; i < SIZE; i++)

15671

+ ua[i] = (ub[i] == uc[i]) ? val1 : val2;

15672

+}

15673

+

15674

+void

15675

+uns_lt (UNS_TYPE val1, UNS_TYPE val2)

15676

+{

15677

+ unsigned long i;

15678

+

15679

+ for (i = 0; i < SIZE; i++)

15680

+ ua[i] = (ub[i] < uc[i]) ? val1 : val2;

15681

+}

15682

+

15683

+/* { dg-final { scan-assembler-times "\[\t \]vaddudm\[\t \]" 2 } } */

15684

+/* { dg-final { scan-assembler-times "\[\t \]vsubudm\[\t \]" 3 } } */

15685

+/* { dg-final { scan-assembler-times "\[\t \]vmaxsd\[\t \]" 2 } } */

15686

+/* { dg-final { scan-assembler-times "\[\t \]vmaxud\[\t \]" 1 } } */

15687

+/* { dg-final { scan-assembler-times "\[\t \]vminsd\[\t \]" 1 } } */

15688

+/* { dg-final { scan-assembler-times "\[\t \]vminud\[\t \]" 1 } } */

15689

+/* { dg-final { scan-assembler-times "\[\t \]vsld\[\t \]" 2 } } */

15690

+/* { dg-final { scan-assembler-times "\[\t \]vsrad\[\t \]" 1 } } */

15691

+/* { dg-final { scan-assembler-times "\[\t \]vsrd\[\t \]" 1 } } */

15692

+/* { dg-final { scan-assembler-times "\[\t \]vcmpequd\[\t \]" 2 } } */

15693

+/* { dg-final { scan-assembler-times "\[\t \]vcmpgtsd\[\t \]" 1 } } */

15694

+/* { dg-final { scan-assembler-times "\[\t \]vcmpgtud\[\t \]" 1 } } */

15695

Index: gcc/testsuite/gcc.target/powerpc/pr57744.c

15696

===================================================================

15697

--- a/src/gcc/testsuite/gcc.target/powerpc/pr57744.c (.../tags/gcc_4_8_2_release)

15698

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr57744.c (.../branches/gcc-4_8-branch)

15699

@@ -0,0 +1,39 @@

15700

+/* { dg-do run { target { powerpc*-*-* && lp64 } } } */

15701

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15702

+/* { dg-require-effective-target powerpc_p8vector_ok } */

15703

+/* { dg-options "-mcpu=power8 -O3" } */

15704

+

15705

+void abort (void);

15706

+

15707

+typedef unsigned U_16 __attribute__((mode(TI)));

15708

+

15709

+extern int libat_compare_exchange_16 (U_16 *, U_16 *, U_16, int, int)

15710

+ __attribute__((__noinline__));

15711

+

15712

+/* PR 57744: lqarx/stqcx needs even/odd register pairs. The assembler will

15713

+ complain if the compiler gets an odd/even register pair. Create a function

15714

+ which has the 16 byte compare and exchange instructions, but don't actually

15715

+ execute it, so that we can detect these failures on older machines. */

15716

+

15717

+int

15718

+libat_compare_exchange_16 (U_16 *mptr, U_16 *eptr, U_16 newval,

15719

+ int smodel, int fmodel __attribute__((unused)))

15720

+{

15721

+ if (((smodel) == 0))

15722

+ return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 0, 0);

15723

+ else if (((smodel) != 5))

15724

+ return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 4, 0);

15725

+ else

15726

+ return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 5, 0);

15727

+}

15728

+

15729

+U_16 a = 1, b = 1, c = -2;

15730

+volatile int do_test = 0;

15731

+

15732

+int main (void)

15733

+{

15734

+ if (do_test && !libat_compare_exchange_16 (&a, &b, c, 0, 0))

15735

+ abort ();

15736

+

15737

+ return 0;

15738

+}

15739

Index: gcc/testsuite/gcc.target/powerpc/recip-1.c

15740

===================================================================

15741

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-1.c (.../tags/gcc_4_8_2_release)

15742

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-1.c (.../branches/gcc-4_8-branch)

15743

@@ -3,8 +3,8 @@

15744

/* { dg-options "-O2 -mrecip -ffast-math -mcpu=power6" } */

15745

/* { dg-final { scan-assembler-times "frsqrte" 2 } } */

15746

/* { dg-final { scan-assembler-times "fmsub" 2 } } */

15747

-/* { dg-final { scan-assembler-times "fmul" 8 } } */

15748

-/* { dg-final { scan-assembler-times "fnmsub" 4 } } */

15749

+/* { dg-final { scan-assembler-times "fmul" 6 } } */

15750

+/* { dg-final { scan-assembler-times "fnmsub" 3 } } */

15751

15752

double

15753

rsqrt_d (double a)

15754

Index: gcc/testsuite/gcc.target/powerpc/darwin-longlong.c

15755

===================================================================

15756

--- a/src/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c (.../tags/gcc_4_8_2_release)

15757

+++ b/src/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c (.../branches/gcc-4_8-branch)

15758

@@ -11,7 +11,11 @@

15759

int i[2];

15760

} ud;

15761

ud.ll = in;

15762

+#ifdef __LITTLE_ENDIAN__

15763

+ return ud.i[1];

15764

+#else

15765

return ud.i[0];

15766

+#endif

15767

}

15768

15769

int main()

15770

Index: gcc/testsuite/gcc.target/powerpc/bool2-p8.c

15771

===================================================================

15772

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-p8.c (.../tags/gcc_4_8_2_release)

15773

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-p8.c (.../branches/gcc-4_8-branch)

15774

@@ -0,0 +1,32 @@

15775

+/* { dg-do compile { target { powerpc*-*-* } } } */

15776

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15777

+/* { dg-require-effective-target powerpc_p8vector_ok } */

15778

+/* { dg-options "-O2 -mcpu=power8" } */

15779

+/* { dg-final { scan-assembler-not "\[ \t\]and " } } */

15780

+/* { dg-final { scan-assembler-not "\[ \t\]or " } } */

15781

+/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */

15782

+/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */

15783

+/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */

15784

+/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */

15785

+/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */

15786

+/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */

15787

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

15788

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

15789

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

15790

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

15791

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

15792

+/* { dg-final { scan-assembler "\[ \t\]xxland " } } */

15793

+/* { dg-final { scan-assembler "\[ \t\]xxlor " } } */

15794

+/* { dg-final { scan-assembler "\[ \t\]xxlxor " } } */

15795

+/* { dg-final { scan-assembler "\[ \t\]xxlnor " } } */

15796

+/* { dg-final { scan-assembler "\[ \t\]xxlandc " } } */

15797

+/* { dg-final { scan-assembler "\[ \t\]xxleqv " } } */

15798

+/* { dg-final { scan-assembler "\[ \t\]xxlorc " } } */

15799

+/* { dg-final { scan-assembler "\[ \t\]xxlnand " } } */

15800

+

15801

+#ifndef TYPE

15802

+typedef int v4si __attribute__ ((vector_size (16)));

15803

+#define TYPE v4si

15804

+#endif

15805

+

15806

+#include "bool2.h"

15807

Index: gcc/testsuite/gcc.target/powerpc/mmfpgpr.c

15808

===================================================================

15809

--- a/src/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c (.../tags/gcc_4_8_2_release)

15810

+++ b/src/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c (.../branches/gcc-4_8-branch)

15811

@@ -0,0 +1,22 @@

15812

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

15813

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15814

+/* { dg-require-effective-target powerpc_vsx_ok } */

15815

+/* { dg-options "-O2 -mcpu=power6x -mmfpgpr" } */

15816

+/* { dg-final { scan-assembler "mffgpr" } } */

15817

+/* { dg-final { scan-assembler "mftgpr" } } */

15818

+

15819

+/* Test that we generate the instructions to move between the GPR and FPR

15820

+ registers under power6x. */

15821

+

15822

+extern long return_long (void);

15823

+extern double return_double (void);

15824

+

15825

+double return_double2 (void)

15826

+{

15827

+ return (double) return_long ();

15828

+}

15829

+

15830

+long return_long2 (void)

15831

+{

15832

+ return (long) return_double ();

15833

+}

15834

Index: gcc/testsuite/gcc.target/powerpc/pr60203.c

15835

===================================================================

15836

--- a/src/gcc/testsuite/gcc.target/powerpc/pr60203.c (.../tags/gcc_4_8_2_release)

15837

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr60203.c (.../branches/gcc-4_8-branch)

15838

@@ -0,0 +1,40 @@

15839

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

15840

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15841

+/* { dg-require-effective-target powerpc_p8vector_ok } */

15842

+/* { dg-options "-mcpu=power8 -O3" } */

15843

+

15844

+union u_ld { long double ld; double d[2]; };

15845

+

15846

+long double

15847

+pack (double a, double aa)

15848

+{

15849

+ union u_ld u;

15850

+ u.d[0] = a;

15851

+ u.d[1] = aa;

15852

+ return u.ld;

15853

+}

15854

+

15855

+double

15856

+unpack_0 (long double x)

15857

+{

15858

+ union u_ld u;

15859

+ u.ld = x;

15860

+ return u.d[0];

15861

+}

15862

+

15863

+double

15864

+unpack_1 (long double x)

15865

+{

15866

+ union u_ld u;

15867

+ u.ld = x;

15868

+ return u.d[1];

15869

+}

15870

+

15871

+/* { dg-final { scan-assembler-not "stfd" } } */

15872

+/* { dg-final { scan-assembler-not "lfd" } } */

15873

+/* { dg-final { scan-assembler-not "lxsdx" } } */

15874

+/* { dg-final { scan-assembler-not "stxsdx" } } */

15875

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

15876

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

15877

+

15878

+

15879

Index: gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c

15880

===================================================================

15881

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c (.../tags/gcc_4_8_2_release)

15882

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c (.../branches/gcc-4_8-branch)

15883

@@ -0,0 +1,14 @@

15884

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

15885

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15886

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

15887

+/* { dg-require-effective-target powerpc_p8vector_ok } */

15888

+/* { dg-options "-mcpu=power8 -O2" } */

15889

+/* { dg-final { scan-assembler "mtvsrd" } } */

15890

+/* { dg-final { scan-assembler "mfvsrd" } } */

15891

+

15892

+/* Check code generation for direct move for vector types. */

15893

+

15894

+#define TYPE vector int

15895

+#define VSX_REG_ATTR "wa"

15896

+

15897

+#include "direct-move.h"

15898

Index: gcc/testsuite/gcc.target/powerpc/bool2-av.c

15899

===================================================================

15900

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-av.c (.../tags/gcc_4_8_2_release)

15901

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-av.c (.../branches/gcc-4_8-branch)

15902

@@ -0,0 +1,32 @@

15903

+/* { dg-do compile { target { powerpc*-*-* } } } */

15904

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15905

+/* { dg-require-effective-target powerpc_altivec_ok } */

15906

+/* { dg-options "-O2 -mcpu=power6 -maltivec" } */

15907

+/* { dg-final { scan-assembler-not "\[ \t\]and " } } */

15908

+/* { dg-final { scan-assembler-not "\[ \t\]or " } } */

15909

+/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */

15910

+/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */

15911

+/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */

15912

+/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */

15913

+/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */

15914

+/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */

15915

+/* { dg-final { scan-assembler "\[ \t\]vand " } } */

15916

+/* { dg-final { scan-assembler "\[ \t\]vandc " } } */

15917

+/* { dg-final { scan-assembler "\[ \t\]vor " } } */

15918

+/* { dg-final { scan-assembler "\[ \t\]vxor " } } */

15919

+/* { dg-final { scan-assembler "\[ \t\]vnor " } } */

15920

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

15921

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

15922

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

15923

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

15924

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

15925

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

15926

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

15927

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

15928

+

15929

+#ifndef TYPE

15930

+typedef int v4si __attribute__ ((vector_size (16)));

15931

+#define TYPE v4si

15932

+#endif

15933

+

15934

+#include "bool2.h"

15935

Index: gcc/testsuite/gcc.target/powerpc/pr43154.c

15936

===================================================================

15937

--- a/src/gcc/testsuite/gcc.target/powerpc/pr43154.c (.../tags/gcc_4_8_2_release)

15938

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr43154.c (.../branches/gcc-4_8-branch)

15939

@@ -1,5 +1,6 @@

15940

/* { dg-do compile { target { powerpc*-*-* } } } */

15941

/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15942

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

15943

/* { dg-require-effective-target powerpc_vsx_ok } */

15944

/* { dg-options "-O2 -mcpu=power7" } */

15945

15946

Index: gcc/testsuite/gcc.target/powerpc/pr59054.c

15947

===================================================================

15948

--- a/src/gcc/testsuite/gcc.target/powerpc/pr59054.c (.../tags/gcc_4_8_2_release)

15949

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr59054.c (.../branches/gcc-4_8-branch)

15950

@@ -0,0 +1,9 @@

15951

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

15952

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15953

+/* { dg-require-effective-target powerpc_vsx_ok } */

15954

+/* { dg-options "-mcpu=power7 -O0 -m64" } */

15955

+

15956

+long foo (void) { return 0; }

15957

+

15958

+/* { dg-final { scan-assembler-not "xxlor" } } */

15959

+/* { dg-final { scan-assembler-not "stfd" } } */

15960

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c

15961

===================================================================

15962

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c (.../tags/gcc_4_8_2_release)

15963

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c (.../branches/gcc-4_8-branch)

15964

@@ -0,0 +1,204 @@

15965

+/* { dg-do compile { target { powerpc*-*-* } } } */

15966

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

15967

+/* { dg-require-effective-target powerpc_p8vector_ok } */

15968

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

15969

+

15970

+#include <altivec.h>

15971

+

15972

+typedef vector long long v_sign;

15973

+typedef vector unsigned long long v_uns;

15974

+typedef vector bool long long v_bool;

15975

+

15976

+v_sign sign_add_1 (v_sign a, v_sign b)

15977

+{

15978

+ return __builtin_altivec_vaddudm (a, b);

15979

+}

15980

+

15981

+v_sign sign_add_2 (v_sign a, v_sign b)

15982

+{

15983

+ return vec_add (a, b);

15984

+}

15985

+

15986

+v_sign sign_add_3 (v_sign a, v_sign b)

15987

+{

15988

+ return vec_vaddudm (a, b);

15989

+}

15990

+

15991

+v_sign sign_sub_1 (v_sign a, v_sign b)

15992

+{

15993

+ return __builtin_altivec_vsubudm (a, b);

15994

+}

15995

+

15996

+v_sign sign_sub_2 (v_sign a, v_sign b)

15997

+{

15998

+ return vec_sub (a, b);

15999

+}

16000

+

16001

+

16002

+v_sign sign_sub_3 (v_sign a, v_sign b)

16003

+{

16004

+ return vec_vsubudm (a, b);

16005

+}

16006

+

16007

+v_sign sign_min_1 (v_sign a, v_sign b)

16008

+{

16009

+ return __builtin_altivec_vminsd (a, b);

16010

+}

16011

+

16012

+v_sign sign_min_2 (v_sign a, v_sign b)

16013

+{

16014

+ return vec_min (a, b);

16015

+}

16016

+

16017

+v_sign sign_min_3 (v_sign a, v_sign b)

16018

+{

16019

+ return vec_vminsd (a, b);

16020

+}

16021

+

16022

+v_sign sign_max_1 (v_sign a, v_sign b)

16023

+{

16024

+ return __builtin_altivec_vmaxsd (a, b);

16025

+}

16026

+

16027

+v_sign sign_max_2 (v_sign a, v_sign b)

16028

+{

16029

+ return vec_max (a, b);

16030

+}

16031

+

16032

+v_sign sign_max_3 (v_sign a, v_sign b)

16033

+{

16034

+ return vec_vmaxsd (a, b);

16035

+}

16036

+

16037

+v_sign sign_abs (v_sign a)

16038

+{

16039

+ return vec_abs (a); /* xor, vsubudm, vmaxsd. */

16040

+}

16041

+

16042

+v_bool sign_eq (v_sign a, v_sign b)

16043

+{

16044

+ return vec_cmpeq (a, b);

16045

+}

16046

+

16047

+v_bool sign_lt (v_sign a, v_sign b)

16048

+{

16049

+ return vec_cmplt (a, b);

16050

+}

16051

+

16052

+v_uns uns_add_2 (v_uns a, v_uns b)

16053

+{

16054

+ return vec_add (a, b);

16055

+}

16056

+

16057

+v_uns uns_add_3 (v_uns a, v_uns b)

16058

+{

16059

+ return vec_vaddudm (a, b);

16060

+}

16061

+

16062

+v_uns uns_sub_2 (v_uns a, v_uns b)

16063

+{

16064

+ return vec_sub (a, b);

16065

+}

16066

+

16067

+v_uns uns_sub_3 (v_uns a, v_uns b)

16068

+{

16069

+ return vec_vsubudm (a, b);

16070

+}

16071

+

16072

+v_uns uns_min_2 (v_uns a, v_uns b)

16073

+{

16074

+ return vec_min (a, b);

16075

+}

16076

+

16077

+v_uns uns_min_3 (v_uns a, v_uns b)

16078

+{

16079

+ return vec_vminud (a, b);

16080

+}

16081

+

16082

+v_uns uns_max_2 (v_uns a, v_uns b)

16083

+{

16084

+ return vec_max (a, b);

16085

+}

16086

+

16087

+v_uns uns_max_3 (v_uns a, v_uns b)

16088

+{

16089

+ return vec_vmaxud (a, b);

16090

+}

16091

+

16092

+v_bool uns_eq (v_uns a, v_uns b)

16093

+{

16094

+ return vec_cmpeq (a, b);

16095

+}

16096

+

16097

+v_bool uns_lt (v_uns a, v_uns b)

16098

+{

16099

+ return vec_cmplt (a, b);

16100

+}

16101

+

16102

+v_sign sign_rl_1 (v_sign a, v_sign b)

16103

+{

16104

+ return __builtin_altivec_vrld (a, b);

16105

+}

16106

+

16107

+v_sign sign_rl_2 (v_sign a, v_uns b)

16108

+{

16109

+ return vec_rl (a, b);

16110

+}

16111

+

16112

+v_uns uns_rl_2 (v_uns a, v_uns b)

16113

+{

16114

+ return vec_rl (a, b);

16115

+}

16116

+

16117

+v_sign sign_sl_1 (v_sign a, v_sign b)

16118

+{

16119

+ return __builtin_altivec_vsld (a, b);

16120

+}

16121

+

16122

+v_sign sign_sl_2 (v_sign a, v_uns b)

16123

+{

16124

+ return vec_sl (a, b);

16125

+}

16126

+

16127

+v_sign sign_sl_3 (v_sign a, v_uns b)

16128

+{

16129

+ return vec_vsld (a, b);

16130

+}

16131

+

16132

+v_uns uns_sl_2 (v_uns a, v_uns b)

16133

+{

16134

+ return vec_sl (a, b);

16135

+}

16136

+

16137

+v_uns uns_sl_3 (v_uns a, v_uns b)

16138

+{

16139

+ return vec_vsld (a, b);

16140

+}

16141

+

16142

+v_sign sign_sra_1 (v_sign a, v_sign b)

16143

+{

16144

+ return __builtin_altivec_vsrad (a, b);

16145

+}

16146

+

16147

+v_sign sign_sra_2 (v_sign a, v_uns b)

16148

+{

16149

+ return vec_sra (a, b);

16150

+}

16151

+

16152

+v_sign sign_sra_3 (v_sign a, v_uns b)

16153

+{

16154

+ return vec_vsrad (a, b);

16155

+}

16156

+

16157

+/* { dg-final { scan-assembler-times "vaddudm" 5 } } */

16158

+/* { dg-final { scan-assembler-times "vsubudm" 6 } } */

16159

+/* { dg-final { scan-assembler-times "vmaxsd" 4 } } */

16160

+/* { dg-final { scan-assembler-times "vminsd" 3 } } */

16161

+/* { dg-final { scan-assembler-times "vmaxud" 2 } } */

16162

+/* { dg-final { scan-assembler-times "vminud" 2 } } */

16163

+/* { dg-final { scan-assembler-times "vcmpequd" 2 } } */

16164

+/* { dg-final { scan-assembler-times "vcmpgtsd" 1 } } */

16165

+/* { dg-final { scan-assembler-times "vcmpgtud" 1 } } */

16166

+/* { dg-final { scan-assembler-times "vrld" 3 } } */

16167

+/* { dg-final { scan-assembler-times "vsld" 5 } } */

16168

+/* { dg-final { scan-assembler-times "vsrad" 3 } } */

16169

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c

16170

===================================================================

16171

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c (.../tags/gcc_4_8_2_release)

16172

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c (.../branches/gcc-4_8-branch)

16173

@@ -0,0 +1,30 @@

16174

+/* { dg-do compile { target { powerpc*-*-* } } } */

16175

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16176

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16177

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model" } */

16178

+

16179

+#include <stddef.h>

16180

+

16181

+#ifndef SIZE

16182

+#define SIZE 1024

16183

+#endif

16184

+

16185

+#ifndef ALIGN

16186

+#define ALIGN 32

16187

+#endif

16188

+

16189

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

16190

+

16191

+long long sign_ll[SIZE] ALIGN_ATTR;

16192

+int sign_i [SIZE] ALIGN_ATTR;

16193

+

16194

+void copy_int_to_long_long (void)

16195

+{

16196

+ size_t i;

16197

+

16198

+ for (i = 0; i < SIZE; i++)

16199

+ sign_ll[i] = sign_i[i];

16200

+}

16201

+

16202

+/* { dg-final { scan-assembler "vupkhsw" } } */

16203

+/* { dg-final { scan-assembler "vupklsw" } } */

16204

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c

16205

===================================================================

16206

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c (.../tags/gcc_4_8_2_release)

16207

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c (.../branches/gcc-4_8-branch)

16208

@@ -0,0 +1,27 @@

16209

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16210

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16211

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16212

+/* { dg-options "-O3 -mcpu=power8" } */

16213

+/* { dg-final { scan-assembler "vbpermq" } } */

16214

+/* { dg-final { scan-assembler "mfvsrd" } } */

16215

+/* { dg-final { scan-assembler-not "stfd" } } */

16216

+/* { dg-final { scan-assembler-not "stxvd2x" } } */

16217

+

16218

+#include <altivec.h>

16219

+

16220

+#if __LITTLE_ENDIAN__

16221

+#define OFFSET 1

16222

+#else

16223

+#define OFFSET 0

16224

+#endif

16225

+

16226

+long foos (vector signed char a, vector signed char b)

16227

+{

16228

+ return vec_extract (vec_vbpermq (a, b), OFFSET);

16229

+}

16230

+

16231

+long foou (vector unsigned char a, vector unsigned char b)

16232

+{

16233

+ return vec_extract (vec_vbpermq (a, b), OFFSET);

16234

+}

16235

+

16236

Index: gcc/testsuite/gcc.target/powerpc/pr60735.c

16237

===================================================================

16238

--- a/src/gcc/testsuite/gcc.target/powerpc/pr60735.c (.../tags/gcc_4_8_2_release)

16239

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr60735.c (.../branches/gcc-4_8-branch)

16240

@@ -0,0 +1,11 @@

16241

+/* { dg-do compile } */

16242

+/* { dg-options "-mcpu=8548 -mspe -mabi=spe -O2" } */

16243

+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */

16244

+

16245

+/* In PR60735, the type _Decimal64 generated an insn not found message. */

16246

+

16247

+void

16248

+pr60735 (_Decimal64 *p, _Decimal64 *q)

16249

+{

16250

+ *p = *q;

16251

+}

16252

Index: gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c

16253

===================================================================

16254

--- a/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c (.../tags/gcc_4_8_2_release)

16255

+++ b/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c (.../branches/gcc-4_8-branch)

16256

@@ -0,0 +1,23 @@

16257

+/* { dg-do compile } */

16258

+/* { dg-require-effective-target powerpc_altivec_ok } */

16259

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

16260

+/* { dg-options "-O -maltivec -mno-vsx" } */

16261

+

16262

+typedef unsigned char V __attribute__((vector_size(16)));

16263

+

16264

+V p2(V x, V y)

16265

+{

16266

+ return __builtin_shuffle(x, y,

16267

+ (V){ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 });

16268

+

16269

+}

16270

+

16271

+V p4(V x, V y)

16272

+{

16273

+ return __builtin_shuffle(x, y,

16274

+ (V){ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 });

16275

+}

16276

+

16277

+/* { dg-final { scan-assembler-not "vperm" } } */

16278

+/* { dg-final { scan-assembler "vpkuhum" } } */

16279

+/* { dg-final { scan-assembler "vpkuwum" } } */

16280

Index: gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c

16281

===================================================================

16282

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c (.../tags/gcc_4_8_2_release)

16283

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c (.../branches/gcc-4_8-branch)

16284

@@ -0,0 +1,85 @@

16285

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16286

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16287

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16288

+/* { dg-options "-mcpu=power8 -O3 -mvsx-timode" } */

16289

+

16290

+#include <altivec.h>

16291

+

16292

+#ifndef TYPE

16293

+#define TYPE vector __int128_t

16294

+#endif

16295

+

16296

+TYPE

16297

+do_addcuq (TYPE p, TYPE q)

16298

+{

16299

+ return __builtin_vec_vaddcuq (p, q);

16300

+}

16301

+

16302

+TYPE

16303

+do_adduqm (TYPE p, TYPE q)

16304

+{

16305

+ return __builtin_vec_add (p, q);

16306

+}

16307

+

16308

+TYPE

16309

+do_addeuqm (TYPE p, TYPE q, TYPE r)

16310

+{

16311

+ return __builtin_vec_vaddeuqm (p, q, r);

16312

+}

16313

+

16314

+TYPE

16315

+do_addecuq (TYPE p, TYPE q, TYPE r)

16316

+{

16317

+ return __builtin_vec_vaddecuq (p, q, r);

16318

+}

16319

+

16320

+TYPE

16321

+do_subeuqm (TYPE p, TYPE q, TYPE r)

16322

+{

16323

+ return __builtin_vec_vsubeuqm (p, q, r);

16324

+}

16325

+

16326

+TYPE

16327

+do_subecuq (TYPE p, TYPE q, TYPE r)

16328

+{

16329

+ return __builtin_vec_vsubecuq (p, q, r);

16330

+}

16331

+

16332

+TYPE

16333

+do_subcuq (TYPE p, TYPE q)

16334

+{

16335

+ return __builtin_vec_vsubcuq (p, q);

16336

+}

16337

+

16338

+TYPE

16339

+do_subuqm (TYPE p, TYPE q)

16340

+{

16341

+ return __builtin_vec_vsubuqm (p, q);

16342

+}

16343

+

16344

+TYPE

16345

+do_zero (void)

16346

+{

16347

+ return (TYPE) { 0 };

16348

+}

16349

+

16350

+TYPE

16351

+do_minus_one (void)

16352

+{

16353

+ return (TYPE) { -1 };

16354

+}

16355

+

16356

+/* { dg-final { scan-assembler "vaddcuq" } } */

16357

+/* { dg-final { scan-assembler "vadduqm" } } */

16358

+/* { dg-final { scan-assembler "vaddecuq" } } */

16359

+/* { dg-final { scan-assembler "vaddeuqm" } } */

16360

+/* { dg-final { scan-assembler "vsubecuq" } } */

16361

+/* { dg-final { scan-assembler "vsubeuqm" } } */

16362

+/* { dg-final { scan-assembler "vsubcuq" } } */

16363

+/* { dg-final { scan-assembler "vsubuqm" } } */

16364

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

16365

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

16366

+/* { dg-final { scan-assembler-not "ori 2,2,0" } } */

16367

+/* { dg-final { scan-assembler-not "xxpermdi" } } */

16368

+/* { dg-final { scan-assembler-not "stxvd2x" } } */

16369

+/* { dg-final { scan-assembler-not "stxvw4x" } } */

16370

Index: gcc/testsuite/gcc.target/powerpc/pr58673-1.c

16371

===================================================================

16372

--- a/src/gcc/testsuite/gcc.target/powerpc/pr58673-1.c (.../tags/gcc_4_8_2_release)

16373

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr58673-1.c (.../branches/gcc-4_8-branch)

16374

@@ -0,0 +1,78 @@

16375

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16376

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16377

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16378

+/* { dg-options "-mcpu=power8 -m64 -O1" } */

16379

+

16380

+enum typecode

16381

+{

16382

+ QIcode, QUcode, HIcode, HUcode, SIcode, SUcode, DIcode, DUcode, SFcode,

16383

+ DFcode, XFcode, Pcode, Tcode, LAST_AND_UNUSED_TYPECODE

16384

+};

16385

+enum bytecode_opcode

16386

+{

16387

+ neverneverland, drop, duplicate, over, setstackSI, adjstackSI, constQI,

16388

+ constHI, constSI, constDI, constSF, constDF, constXF, constP, loadQI,

16389

+ loadHI, loadSI, loadDI, loadSF, loadDF, loadXF, loadP, storeQI, storeHI,

16390

+ storeSI, storeDI, storeSF, storeDF, storeXF, storeP, storeBLK, clearBLK,

16391

+ addconstPSI, newlocalSI, localP, argP, convertQIHI, convertHISI,

16392

+ convertSIDI, convertQISI, convertQUHU, convertHUSU, convertSUDU,

16393

+ convertQUSU, convertSFDF, convertDFXF, convertHIQI, convertSIHI,

16394

+ convertDISI, convertSIQI, convertSUQU, convertDFSF, convertXFDF,

16395

+ convertSISF, convertSIDF, convertSIXF, convertSUSF, convertSUDF,

16396

+ convertSUXF, convertDISF, convertDIDF, convertDIXF, convertDUSF,

16397

+ convertDUDF, convertDUXF, convertSFSI, convertDFSI, convertXFSI,

16398

+ convertSFSU, convertDFSU, convertXFSU, convertSFDI, convertDFDI,

16399

+ convertXFDI, convertSFDU, convertDFDU, convertXFDU, convertPSI,

16400

+ convertSIP, convertSIT, convertDIT, convertSFT, convertDFT, convertXFT,

16401

+ convertPT, zxloadBI, sxloadBI, sstoreBI, addSI, addDI, addSF, addDF,

16402

+ addXF, addPSI, subSI, subDI, subSF, subDF, subXF, subPP, mulSI, mulDI,

16403

+ mulSU, mulDU, mulSF, mulDF, mulXF, divSI, divDI, divSU, divDU, divSF,

16404

+ divDF, divXF, modSI, modDI, modSU, modDU, andSI, andDI, iorSI, iorDI,

16405

+ xorSI, xorDI, lshiftSI, lshiftSU, lshiftDI, lshiftDU, rshiftSI, rshiftSU,

16406

+ rshiftDI, rshiftDU, ltSI, ltSU, ltDI, ltDU, ltSF, ltDF, ltXF, ltP, leSI,

16407

+ leSU, leDI, leDU, leSF, leDF, leXF, leP, geSI, geSU, geDI, geDU, geSF,

16408

+ geDF, geXF, geP, gtSI, gtSU, gtDI, gtDU, gtSF, gtDF, gtXF, gtP, eqSI,

16409

+ eqDI, eqSF, eqDF, eqXF, eqP, neSI, neDI, neSF, neDF, neXF, neP, negSI,

16410

+ negDI, negSF, negDF, negXF, notSI, notDI, notT, predecQI, predecHI,

16411

+ predecSI, predecDI, predecP, predecSF, predecDF, predecXF, predecBI,

16412

+ preincQI, preincHI, preincSI, preincDI, preincP, preincSF, preincDF,

16413

+ preincXF, preincBI, postdecQI, postdecHI, postdecSI, postdecDI, postdecP,

16414

+ postdecSF, postdecDF, postdecXF, postdecBI, postincQI, postincHI,

16415

+ postincSI, postincDI, postincP, postincSF, postincDF, postincXF,

16416

+ postincBI, xjumpif, xjumpifnot, jump, jumpP, caseSI, caseSU, caseDI,

16417

+ caseDU, call, returnP, ret, linenote, LAST_AND_UNUSED_OPCODE

16418

+};

16419

+struct binary_operator

16420

+{

16421

+ enum bytecode_opcode opcode;

16422

+ enum typecode arg0;

16423

+};

16424

+static struct conversion_recipe

16425

+{

16426

+ unsigned char *opcodes;

16427

+ int cost;

16428

+}

16429

+conversion_recipe[((int) LAST_AND_UNUSED_TYPECODE)][((int)

16430

+ LAST_AND_UNUSED_TYPECODE)];

16431

+static struct conversion_recipe

16432

+deduce_conversion (from, to)

16433

+ enum typecode from, to;

16434

+{

16435

+ (conversion_recipe[(int) from][(int) to].

16436

+ opcodes ? 0 : (conversion_recipe[(int) from][(int) to] =

16437

+ deduce_conversion (from, to), 0));

16438

+}

16439

+

16440

+void

16441

+bc_expand_binary_operation (optab, resulttype, arg0, arg1)

16442

+ struct binary_operator optab[];

16443

+{

16444

+ int i, besti, cost, bestcost;

16445

+ enum typecode resultcode, arg0code;

16446

+ for (i = 0; optab[i].opcode != -1; ++i)

16447

+ {

16448

+ (conversion_recipe[(int) arg0code][(int) optab[i].arg0].

16449

+ opcodes ? 0 : (conversion_recipe[(int) arg0code][(int) optab[i].arg0] =

16450

+ deduce_conversion (arg0code, optab[i].arg0), 0));

16451

+ }

16452

+}

16453

Index: gcc/testsuite/gcc.target/powerpc/no-r11-1.c

16454

===================================================================

16455

--- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-1.c (.../tags/gcc_4_8_2_release)

16456

+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-1.c (.../branches/gcc-4_8-branch)

16457

@@ -1,5 +1,6 @@

16458

/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16459

/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */

16460

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

16461

/* { dg-options "-O2 -mno-pointers-to-nested-functions" } */

16462

16463

int

16464

Index: gcc/testsuite/gcc.target/powerpc/p8vector-fp.c

16465

===================================================================

16466

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c (.../tags/gcc_4_8_2_release)

16467

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c (.../branches/gcc-4_8-branch)

16468

@@ -0,0 +1,139 @@

16469

+/* { dg-do compile { target { powerpc*-*-* } } } */

16470

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16471

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16472

+/* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf -fno-math-errno" } */

16473

+

16474

+float abs_sf (float *p)

16475

+{

16476

+ float f = *p;

16477

+ __asm__ ("# reg %x0" : "+v" (f));

16478

+ return __builtin_fabsf (f);

16479

+}

16480

+

16481

+float nabs_sf (float *p)

16482

+{

16483

+ float f = *p;

16484

+ __asm__ ("# reg %x0" : "+v" (f));

16485

+ return - __builtin_fabsf (f);

16486

+}

16487

+

16488

+float neg_sf (float *p)

16489

+{

16490

+ float f = *p;

16491

+ __asm__ ("# reg %x0" : "+v" (f));

16492

+ return - f;

16493

+}

16494

+

16495

+float add_sf (float *p, float *q)

16496

+{

16497

+ float f1 = *p;

16498

+ float f2 = *q;

16499

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

16500

+ return f1 + f2;

16501

+}

16502

+

16503

+float sub_sf (float *p, float *q)

16504

+{

16505

+ float f1 = *p;

16506

+ float f2 = *q;

16507

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

16508

+ return f1 - f2;

16509

+}

16510

+

16511

+float mul_sf (float *p, float *q)

16512

+{

16513

+ float f1 = *p;

16514

+ float f2 = *q;

16515

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

16516

+ return f1 * f2;

16517

+}

16518

+

16519

+float div_sf (float *p, float *q)

16520

+{

16521

+ float f1 = *p;

16522

+ float f2 = *q;

16523

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

16524

+ return f1 / f2;

16525

+}

16526

+

16527

+float sqrt_sf (float *p)

16528

+{

16529

+ float f = *p;

16530

+ __asm__ ("# reg %x0" : "+v" (f));

16531

+ return __builtin_sqrtf (f);

16532

+}

16533

+

16534

+

16535

+double abs_df (double *p)

16536

+{

16537

+ double d = *p;

16538

+ __asm__ ("# reg %x0" : "+v" (d));

16539

+ return __builtin_fabs (d);

16540

+}

16541

+

16542

+double nabs_df (double *p)

16543

+{

16544

+ double d = *p;

16545

+ __asm__ ("# reg %x0" : "+v" (d));

16546

+ return - __builtin_fabs (d);

16547

+}

16548

+

16549

+double neg_df (double *p)

16550

+{

16551

+ double d = *p;

16552

+ __asm__ ("# reg %x0" : "+v" (d));

16553

+ return - d;

16554

+}

16555

+

16556

+double add_df (double *p, double *q)

16557

+{

16558

+ double d1 = *p;

16559

+ double d2 = *q;

16560

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

16561

+ return d1 + d2;

16562

+}

16563

+

16564

+double sub_df (double *p, double *q)

16565

+{

16566

+ double d1 = *p;

16567

+ double d2 = *q;

16568

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

16569

+ return d1 - d2;

16570

+}

16571

+

16572

+double mul_df (double *p, double *q)

16573

+{

16574

+ double d1 = *p;

16575

+ double d2 = *q;

16576

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

16577

+ return d1 * d2;

16578

+}

16579

+

16580

+double div_df (double *p, double *q)

16581

+{

16582

+ double d1 = *p;

16583

+ double d2 = *q;

16584

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

16585

+ return d1 / d2;

16586

+}

16587

+

16588

+double sqrt_df (float *p)

16589

+{

16590

+ double d = *p;

16591

+ __asm__ ("# reg %x0" : "+v" (d));

16592

+ return __builtin_sqrt (d);

16593

+}

16594

+

16595

+/* { dg-final { scan-assembler "xsabsdp" } } */

16596

+/* { dg-final { scan-assembler "xsadddp" } } */

16597

+/* { dg-final { scan-assembler "xsaddsp" } } */

16598

+/* { dg-final { scan-assembler "xsdivdp" } } */

16599

+/* { dg-final { scan-assembler "xsdivsp" } } */

16600

+/* { dg-final { scan-assembler "xsmuldp" } } */

16601

+/* { dg-final { scan-assembler "xsmulsp" } } */

16602

+/* { dg-final { scan-assembler "xsnabsdp" } } */

16603

+/* { dg-final { scan-assembler "xsnegdp" } } */

16604

+/* { dg-final { scan-assembler "xssqrtdp" } } */

16605

+/* { dg-final { scan-assembler "xssqrtsp" } } */

16606

+/* { dg-final { scan-assembler "xssubdp" } } */

16607

+/* { dg-final { scan-assembler "xssubsp" } } */

16608

Index: gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c

16609

===================================================================

16610

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c (.../tags/gcc_4_8_2_release)

16611

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c (.../branches/gcc-4_8-branch)

16612

@@ -0,0 +1,13 @@

16613

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

16614

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16615

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

16616

+/* { dg-require-effective-target p8vector_hw } */

16617

+/* { dg-options "-mcpu=power8 -O2" } */

16618

+

16619

+/* Check whether we get the right bits for direct move at runtime. */

16620

+

16621

+#define TYPE vector int

16622

+#define DO_MAIN

16623

+#define VSX_REG_ATTR "wa"

16624

+

16625

+#include "direct-move.h"

16626

Index: gcc/testsuite/gcc.target/powerpc/bool3-p7.c

16627

===================================================================

16628

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3-p7.c (.../tags/gcc_4_8_2_release)

16629

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3-p7.c (.../branches/gcc-4_8-branch)

16630

@@ -0,0 +1,37 @@

16631

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16632

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16633

+/* { dg-require-effective-target powerpc_vsx_ok } */

16634

+/* { dg-options "-O2 -mcpu=power7" } */

16635

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

16636

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

16637

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

16638

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

16639

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

16640

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

16641

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

16642

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

16643

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

16644

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

16645

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

16646

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

16647

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

16648

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

16649

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

16650

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

16651

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

16652

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

16653

+

16654

+/* On power7, for 128-bit types, ORC/ANDC/EQV might not show up, since the

16655

+ vector unit doesn't support these, so the appropriate combine patterns may

16656

+ not be generated. */

16657

+

16658

+#ifndef TYPE

16659

+#ifdef _ARCH_PPC64

16660

+#define TYPE __int128_t

16661

+#else

16662

+typedef int v4si __attribute__ ((vector_size (16)));

16663

+#define TYPE v4si

16664

+#endif

16665

+#endif

16666

+

16667

+#include "bool3.h"

16668

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c

16669

===================================================================

16670

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c (.../tags/gcc_4_8_2_release)

16671

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c (.../branches/gcc-4_8-branch)

16672

@@ -0,0 +1,104 @@

16673

+/* { dg-do compile { target { powerpc*-*-* } } } */

16674

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16675

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16676

+/* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model" } */

16677

+

16678

+#include <altivec.h>

16679

+

16680

+typedef vector long long vll_sign;

16681

+typedef vector unsigned long long vll_uns;

16682

+typedef vector bool long long vll_bool;

16683

+

16684

+typedef vector int vi_sign;

16685

+typedef vector unsigned int vi_uns;

16686

+typedef vector bool int vi_bool;

16687

+

16688

+typedef vector short vs_sign;

16689

+typedef vector unsigned short vs_uns;

16690

+typedef vector bool short vs_bool;

16691

+

16692

+typedef vector signed char vc_sign;

16693

+typedef vector unsigned char vc_uns;

16694

+typedef vector bool char vc_bool;

16695

+

16696

+

16697

+vi_sign vi_pack_1 (vll_sign a, vll_sign b)

16698

+{

16699

+ return __builtin_altivec_vpkudum (a, b);

16700

+}

16701

+

16702

+vi_sign vi_pack_2 (vll_sign a, vll_sign b)

16703

+{

16704

+ return vec_pack (a, b);

16705

+}

16706

+

16707

+vi_sign vi_pack_3 (vll_sign a, vll_sign b)

16708

+{

16709

+ return vec_vpkudum (a, b);

16710

+}

16711

+

16712

+vs_sign vs_pack_1 (vi_sign a, vi_sign b)

16713

+{

16714

+ return __builtin_altivec_vpkuwum (a, b);

16715

+}

16716

+

16717

+vs_sign vs_pack_2 (vi_sign a, vi_sign b)

16718

+{

16719

+ return vec_pack (a, b);

16720

+}

16721

+

16722

+vs_sign vs_pack_3 (vi_sign a, vi_sign b)

16723

+{

16724

+ return vec_vpkuwum (a, b);

16725

+}

16726

+

16727

+vc_sign vc_pack_1 (vs_sign a, vs_sign b)

16728

+{

16729

+ return __builtin_altivec_vpkuhum (a, b);

16730

+}

16731

+

16732

+vc_sign vc_pack_2 (vs_sign a, vs_sign b)

16733

+{

16734

+ return vec_pack (a, b);

16735

+}

16736

+

16737

+vc_sign vc_pack_3 (vs_sign a, vs_sign b)

16738

+{

16739

+ return vec_vpkuhum (a, b);

16740

+}

16741

+

16742

+vll_sign vll_unpack_hi_1 (vi_sign a)

16743

+{

16744

+ return __builtin_altivec_vupkhsw (a);

16745

+}

16746

+

16747

+vll_sign vll_unpack_hi_2 (vi_sign a)

16748

+{

16749

+ return vec_unpackh (a);

16750

+}

16751

+

16752

+vll_sign vll_unpack_hi_3 (vi_sign a)

16753

+{

16754

+ return __builtin_vec_vupkhsw (a);

16755

+}

16756

+

16757

+vll_sign vll_unpack_lo_1 (vi_sign a)

16758

+{

16759

+ return vec_vupklsw (a);

16760

+}

16761

+

16762

+vll_sign vll_unpack_lo_2 (vi_sign a)

16763

+{

16764

+ return vec_unpackl (a);

16765

+}

16766

+

16767

+vll_sign vll_unpack_lo_3 (vi_sign a)

16768

+{

16769

+ return vec_vupklsw (a);

16770

+}

16771

+

16772

+/* { dg-final { scan-assembler-times "vpkudum" 3 } } */

16773

+/* { dg-final { scan-assembler-times "vpkuwum" 3 } } */

16774

+/* { dg-final { scan-assembler-times "vpkuhum" 3 } } */

16775

+/* { dg-final { scan-assembler-times "vupklsw" 3 } } */

16776

+/* { dg-final { scan-assembler-times "vupkhsw" 3 } } */

16777

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c

16778

===================================================================

16779

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c (.../tags/gcc_4_8_2_release)

16780

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c (.../branches/gcc-4_8-branch)

16781

@@ -0,0 +1,29 @@

16782

+/* { dg-do compile { target { powerpc*-*-* } } } */

16783

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16784

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16785

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model" } */

16786

+

16787

+#include <stddef.h>

16788

+

16789

+#ifndef SIZE

16790

+#define SIZE 1024

16791

+#endif

16792

+

16793

+#ifndef ALIGN

16794

+#define ALIGN 32

16795

+#endif

16796

+

16797

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

16798

+

16799

+long long sign_ll[SIZE] ALIGN_ATTR;

16800

+int sign_i [SIZE] ALIGN_ATTR;

16801

+

16802

+void copy_long_long_to_int (void)

16803

+{

16804

+ size_t i;

16805

+

16806

+ for (i = 0; i < SIZE; i++)

16807

+ sign_i[i] = sign_ll[i];

16808

+}

16809

+

16810

+/* { dg-final { scan-assembler "vpkudum" } } */

16811

Index: gcc/testsuite/gcc.target/powerpc/direct-move.h

16812

===================================================================

16813

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move.h (.../tags/gcc_4_8_2_release)

16814

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move.h (.../branches/gcc-4_8-branch)

16815

@@ -0,0 +1,188 @@

16816

+/* Test functions for direct move support. */

16817

+

16818

+#include <math.h>

16819

+extern void abort (void);

16820

+

16821

+#ifndef VSX_REG_ATTR

16822

+#define VSX_REG_ATTR "wa"

16823

+#endif

16824

+

16825

+void __attribute__((__noinline__))

16826

+copy (TYPE *a, TYPE *b)

16827

+{

16828

+ *b = *a;

16829

+}

16830

+

16831

+#ifndef NO_GPR

16832

+void __attribute__((__noinline__))

16833

+load_gpr (TYPE *a, TYPE *b)

16834

+{

16835

+ TYPE c = *a;

16836

+ __asm__ ("# gpr, reg = %0" : "+b" (c));

16837

+ *b = c;

16838

+}

16839

+#endif

16840

+

16841

+#ifndef NO_FPR

16842

+void __attribute__((__noinline__))

16843

+load_fpr (TYPE *a, TYPE *b)

16844

+{

16845

+ TYPE c = *a;

16846

+ __asm__ ("# fpr, reg = %0" : "+d" (c));

16847

+ *b = c;

16848

+}

16849

+#endif

16850

+

16851

+#ifndef NO_ALTIVEC

16852

+void __attribute__((__noinline__))

16853

+load_altivec (TYPE *a, TYPE *b)

16854

+{

16855

+ TYPE c = *a;

16856

+ __asm__ ("# altivec, reg = %0" : "+v" (c));

16857

+ *b = c;

16858

+}

16859

+#endif

16860

+

16861

+#ifndef NO_VSX

16862

+void __attribute__((__noinline__))

16863

+load_vsx (TYPE *a, TYPE *b)

16864

+{

16865

+ TYPE c = *a;

16866

+ __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (c));

16867

+ *b = c;

16868

+}

16869

+#endif

16870

+

16871

+#ifndef NO_GPR_TO_VSX

16872

+void __attribute__((__noinline__))

16873

+load_gpr_to_vsx (TYPE *a, TYPE *b)

16874

+{

16875

+ TYPE c = *a;

16876

+ TYPE d;

16877

+ __asm__ ("# gpr, reg = %0" : "+b" (c));

16878

+ d = c;

16879

+ __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (d));

16880

+ *b = d;

16881

+}

16882

+#endif

16883

+

16884

+#ifndef NO_VSX_TO_GPR

16885

+void __attribute__((__noinline__))

16886

+load_vsx_to_gpr (TYPE *a, TYPE *b)

16887

+{

16888

+ TYPE c = *a;

16889

+ TYPE d;

16890

+ __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (c));

16891

+ d = c;

16892

+ __asm__ ("# gpr, reg = %0" : "+b" (d));

16893

+ *b = d;

16894

+}

16895

+#endif

16896

+

16897

+#ifdef DO_MAIN

16898

+typedef void (fn_type (TYPE *, TYPE *));

16899

+

16900

+struct test_struct {

16901

+ fn_type *func;

16902

+ const char *name;

16903

+};

16904

+

16905

+const struct test_struct test_functions[] = {

16906

+ { copy, "copy" },

16907

+#ifndef NO_GPR

16908

+ { load_gpr, "load_gpr" },

16909

+#endif

16910

+#ifndef NO_FPR

16911

+ { load_fpr, "load_fpr" },

16912

+#endif

16913

+#ifndef NO_ALTIVEC

16914

+ { load_altivec, "load_altivec" },

16915

+#endif

16916

+#ifndef NO_VSX

16917

+ { load_vsx, "load_vsx" },

16918

+#endif

16919

+#ifndef NO_GPR_TO_VSX

16920

+ { load_gpr_to_vsx, "load_gpr_to_vsx" },

16921

+#endif

16922

+#ifndef NO_VSX_TO_GPR

16923

+ { load_vsx_to_gpr, "load_vsx_to_gpr" },

16924

+#endif

16925

+};

16926

+

16927

+/* Test a given value for each of the functions. */

16928

+void __attribute__((__noinline__))

16929

+test_value (TYPE a)

16930

+{

16931

+ long i;

16932

+

16933

+ for (i = 0; i < sizeof (test_functions) / sizeof (test_functions[0]); i++)

16934

+ {

16935

+ TYPE b;

16936

+

16937

+ test_functions[i].func (&a, &b);

16938

+ if (memcmp ((void *)&a, (void *)&b, sizeof (TYPE)) != 0)

16939

+ abort ();

16940

+ }

16941

+}

16942

+

16943

+/* Main program. */

16944

+int

16945

+main (void)

16946

+{

16947

+ long i,j;

16948

+ union {

16949

+ TYPE value;

16950

+ unsigned char bytes[sizeof (TYPE)];

16951

+ } u;

16952

+

16953

+#if IS_INT

16954

+ TYPE value = (TYPE)-5;

16955

+ for (i = 0; i < 12; i++)

16956

+ {

16957

+ test_value (value);

16958

+ value++;

16959

+ }

16960

+

16961

+ for (i = 0; i < 8*sizeof (TYPE); i++)

16962

+ test_value (((TYPE)1) << i);

16963

+

16964

+#elif IS_UNS

16965

+ TYPE value = (TYPE)0;

16966

+ for (i = 0; i < 10; i++)

16967

+ {

16968

+ test_value (value);

16969

+ test_value (~ value);

16970

+ value++;

16971

+ }

16972

+

16973

+ for (i = 0; i < 8*sizeof (TYPE); i++)

16974

+ test_value (((TYPE)1) << i);

16975

+

16976

+#elif IS_FLOAT

16977

+ TYPE value = (TYPE)-5;

16978

+ for (i = 0; i < 12; i++)

16979

+ {

16980

+ test_value (value);

16981

+ value++;

16982

+ }

16983

+

16984

+ test_value ((TYPE)3.1415926535);

16985

+ test_value ((TYPE)1.23456);

16986

+ test_value ((TYPE)(-0.0));

16987

+ test_value ((TYPE)NAN);

16988

+ test_value ((TYPE)+INFINITY);

16989

+ test_value ((TYPE)-INFINITY);

16990

+#else

16991

+

16992

+ for (j = 0; j < 10; j++)

16993

+ {

16994

+ for (i = 0; i < sizeof (TYPE); i++)

16995

+ u.bytes[i] = (unsigned char) (random () >> 4);

16996

+

16997

+ test_value (u.value);

16998

+ }

16999

+#endif

17000

+

17001

+ return 0;

17002

+}

17003

+#endif

17004

Index: gcc/testsuite/gcc.target/powerpc/sd-vsx.c

17005

===================================================================

17006

--- a/src/gcc/testsuite/gcc.target/powerpc/sd-vsx.c (.../tags/gcc_4_8_2_release)

17007

+++ b/src/gcc/testsuite/gcc.target/powerpc/sd-vsx.c (.../branches/gcc-4_8-branch)

17008

@@ -0,0 +1,20 @@

17009

+/* { dg-do compile { target { powerpc*-*-* } } } */

17010

+/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */

17011

+/* { dg-require-effective-target powerpc_vsx_ok } */

17012

+/* { dg-options "-O2 -mcpu=power7 -mhard-dfp" } */

17013

+/* { dg-final { scan-assembler-times "lfiwzx" 2 } } */

17014

+/* { dg-final { scan-assembler-times "stfiwx" 1 } } */

17015

+/* { dg-final { scan-assembler-not "lfd" } } */

17016

+/* { dg-final { scan-assembler-not "stfd" } } */

17017

+/* { dg-final { scan-assembler-times "dctdp" 2 } } */

17018

+/* { dg-final { scan-assembler-times "dadd" 1 } } */

17019

+/* { dg-final { scan-assembler-times "drsp" 1 } } */

17020

+

17021

+/* Test that power7 can directly load/store SDmode variables without using a

17022

+ bounce buffer. */

17023

+_Decimal32 a;

17024

+

17025

+void inc_dec32 (void)

17026

+{

17027

+ a += (_Decimal32) 1.0;

17028

+}

17029

Index: gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c

17030

===================================================================

17031

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c (.../tags/gcc_4_8_2_release)

17032

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c (.../branches/gcc-4_8-branch)

17033

@@ -0,0 +1,177 @@

17034

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

17035

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17036

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

17037

+/* { dg-require-effective-target p8vector_hw } */

17038

+/* { dg-options "-mcpu=power8 -O2" } */

17039

+

17040

+#include <stddef.h>

17041

+#include <stdlib.h>

17042

+#include <altivec.h>

17043

+

17044

+#ifdef DEBUG

17045

+#include <stdio.h>

17046

+#define UNUSED

17047

+

17048

+#ifdef __LITTLE_ENDIAN__

17049

+#define HI_WORD 1

17050

+#define LO_WORD 0

17051

+#else

17052

+#define HI_WORD 0

17053

+#define LO_WORD 1

17054

+#endif

17055

+

17056

+#else

17057

+#define UNUSED __attribute__((__unused__))

17058

+#endif

17059

+

17060

+#ifndef S_TYPE

17061

+#define S_TYPE __uint128_t

17062

+#endif

17063

+

17064

+#ifndef V_TYPE

17065

+#define V_TYPE vector S_TYPE

17066

+#endif

17067

+

17068

+static int compare (S_TYPE, V_TYPE, const char *, const char *)

17069

+ __attribute__((__noinline__));

17070

+

17071

+static int

17072

+compare (S_TYPE scalar,

17073

+ V_TYPE vect,

17074

+ const char *nl UNUSED,

17075

+ const char *which UNUSED)

17076

+{

17077

+ unsigned long scalar_lo = (unsigned long) scalar;

17078

+ unsigned long scalar_hi = (unsigned long) (scalar >> 64);

17079

+ unsigned long vect_lo;

17080

+ unsigned long vect_hi;

17081

+ vector long long tmp;

17082

+ int ret;

17083

+

17084

+ __asm__ ("mfvsrd %0,%x3\n\t"

17085

+ "xxpermdi %x2,%x3,%x3,3\n\t"

17086

+ "mfvsrd %1,%x2"

17087

+ : "=r" (vect_hi),

17088

+ "=r" (vect_lo),

17089

+ "=wa" (tmp)

17090

+ : "wa" (vect));

17091

+

17092

+ ret = (scalar_lo != vect_lo) || (scalar_hi != vect_hi);

17093

+

17094

+#ifdef DEBUG

17095

+ printf ("%s%s: 0x%.16lx %.16lx %s 0x%.16lx %.16lx\n",

17096

+ nl, which,

17097

+ scalar_hi, scalar_lo,

17098

+ (ret) ? "!=" : "==",

17099

+ vect_hi, vect_lo);

17100

+

17101

+ fflush (stdout);

17102

+#endif

17103

+

17104

+ return ret;

17105

+}

17106

+

17107

+static void convert_via_mem (V_TYPE *, S_TYPE *)

17108

+ __attribute__((__noinline__));

17109

+

17110

+static void

17111

+convert_via_mem (V_TYPE *v, S_TYPE *s)

17112

+{

17113

+ *v = (V_TYPE) { *s };

17114

+ __asm__ volatile ("nop"

17115

+ : "+m" (*s), "+m" (*v)

17116

+ :

17117

+ : "memory");

17118

+

17119

+}

17120

+

17121

+

17122

+/* Check if vadduqm returns the same values as normal 128-bit add. */

17123

+

17124

+/* Values to add together. */

17125

+const static struct {

17126

+ unsigned long hi_1;

17127

+ unsigned long lo_1;

17128

+ unsigned long hi_2;

17129

+ unsigned long lo_2;

17130

+} values[] = {

17131

+ { 0x0000000000000000UL, 0xfffffffffffffffeUL,

17132

+ 0x0000000000000000UL, 0x0000000000000002UL },

17133

+ { 0x0000000000000000UL, 0x0000000000000002UL,

17134

+ 0x0000000000000000UL, 0xfffffffffffffffeUL },

17135

+ { 0xffffffffffffffffUL, 0xfffffffffffffffeUL,

17136

+ 0x0000000000000000UL, 0x0000000000000002UL },

17137

+ { 0xfffffffffffffff2UL, 0xffffffffffffffffUL,

17138

+ 0x0000000000000002UL, 0x0000000000000000UL },

17139

+ { 0x7fffffffffffffffUL, 0xfffffffffffffffeUL,

17140

+ 0x0000000000000000UL, 0x0000000000000002UL },

17141

+ { 0x7ffffffffffffff2UL, 0xffffffffffffffffUL,

17142

+ 0x0000000000000002UL, 0x0000000000000000UL },

17143

+};

17144

+

17145

+int

17146

+main (void)

17147

+{

17148

+ int reg_errors = 0;

17149

+ int mem_errors = 0;

17150

+ size_t i;

17151

+ const char *nl = "";

17152

+

17153

+ for (i = 0; i < sizeof (values) / sizeof (values[0]); i++)

17154

+ {

17155

+ S_TYPE s_reg_res, s_reg_in1, s_reg_in2, s_mem_res, s_mem_in1, s_mem_in2;

17156

+ V_TYPE v_reg_res, v_reg_in1, v_reg_in2, v_mem_res, v_mem_in1, v_mem_in2;

17157

+

17158

+ s_reg_in1 = ((((S_TYPE)values[i].hi_1 << 64)) + ((S_TYPE)values[i].lo_1));

17159

+ reg_errors += compare (s_reg_in1, (V_TYPE) { s_reg_in1 }, nl, "reg, in1");

17160

+

17161

+ s_reg_in2 = ((((S_TYPE)values[i].hi_2 << 64)) + ((S_TYPE)values[i].lo_2));

17162

+ reg_errors += compare (s_reg_in2, (V_TYPE) { s_reg_in2 }, "", "reg, in2");

17163

+

17164

+ s_reg_res = s_reg_in1 + s_reg_in2;

17165

+

17166

+ v_reg_in1 = (V_TYPE) { s_reg_in1 };

17167

+ v_reg_in2 = (V_TYPE) { s_reg_in2 };

17168

+ v_reg_res = vec_vadduqm (v_reg_in1, v_reg_in2);

17169

+ reg_errors += compare (s_reg_res, v_reg_res, "", "reg, res");

17170

+

17171

+ s_mem_in1 = s_reg_in1;

17172

+ convert_via_mem (&v_mem_in1, &s_mem_in1);

17173

+ mem_errors += compare (s_mem_in1, (V_TYPE) { s_mem_in1 }, "\n", "mem, in1");

17174

+

17175

+ s_mem_in2 = s_reg_in2;

17176

+ convert_via_mem (&v_mem_in2, &s_mem_in2);

17177

+ mem_errors += compare (s_mem_in2, (V_TYPE) { s_mem_in2 }, "", "mem, in2");

17178

+

17179

+ s_mem_res = s_mem_in1 + s_mem_in2;

17180

+ v_mem_res = vec_vadduqm (v_mem_in1, v_mem_in2);

17181

+ mem_errors += compare (s_mem_res, v_mem_res, "", "mem, res");

17182

+

17183

+ nl = "\n";

17184

+ }

17185

+

17186

+#ifdef DEBUG

17187

+ putchar ('\n');

17188

+

17189

+ if (!reg_errors)

17190

+ fputs ("no errors found on register operations\n", stdout);

17191

+ else

17192

+ printf ("%d error%s found on register operations\n",

17193

+ reg_errors,

17194

+ (reg_errors == 1) ? "s" : "");

17195

+

17196

+ if (!mem_errors)

17197

+ fputs ("no errors found on memory operations\n", stdout);

17198

+ else

17199

+ printf ("%d error%s found on memory operations\n",

17200

+ mem_errors,

17201

+ (mem_errors == 1) ? "s" : "");

17202

+

17203

+ fflush (stdout);

17204

+#endif

17205

+

17206

+ if ((reg_errors + mem_errors) != 0)

17207

+ abort ();

17208

+

17209

+ return 0;

17210

+}

17211

Index: gcc/testsuite/gcc.target/powerpc/pr58673-2.c

17212

===================================================================

17213

--- a/src/gcc/testsuite/gcc.target/powerpc/pr58673-2.c (.../tags/gcc_4_8_2_release)

17214

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr58673-2.c (.../branches/gcc-4_8-branch)

17215

@@ -0,0 +1,217 @@

17216

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17217

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17218

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17219

+/* { dg-options "-mcpu=power8 -O3 -m64 -funroll-loops" } */

17220

+

17221

+#include <stddef.h>

17222

+#include <stdlib.h>

17223

+#include <math.h>

17224

+#include <string.h>

17225

+

17226

+typedef long unsigned int size_t;

17227

+typedef struct _IO_FILE FILE;

17228

+typedef float real;

17229

+typedef real rvec[3];

17230

+typedef real matrix[3][3];

17231

+typedef real tensor[3][3];

17232

+enum

17233

+{

17234

+ F_BONDS, F_G96BONDS, F_MORSE, F_CUBICBONDS, F_CONNBONDS, F_HARMONIC,

17235

+ F_ANGLES, F_G96ANGLES, F_PDIHS, F_RBDIHS, F_IDIHS, F_LJ14, F_COUL14, F_LJ,

17236

+ F_BHAM, F_LJLR, F_DISPCORR, F_SR, F_LR, F_WPOL, F_POSRES, F_DISRES,

17237

+ F_DISRESVIOL, F_ORIRES, F_ORIRESDEV, F_ANGRES, F_ANGRESZ, F_SHAKE,

17238

+ F_SHAKENC, F_SETTLE, F_DUMMY2, F_DUMMY3, F_DUMMY3FD, F_DUMMY3FAD,

17239

+ F_DUMMY3OUT, F_DUMMY4FD, F_EQM, F_EPOT, F_EKIN, F_ETOT, F_TEMP, F_PRES,

17240

+ F_DVDL, F_DVDLKIN, F_NRE

17241

+};

17242

+typedef union

17243

+{

17244

+ struct

17245

+ {

17246

+ }

17247

+ bham;

17248

+ struct

17249

+ {

17250

+ real rA, krA, rB, krB;

17251

+ }

17252

+ harmonic;

17253

+}

17254

+t_iparams;

17255

+typedef struct

17256

+{

17257

+ t_iparams *iparams;

17258

+}

17259

+t_idef;

17260

+typedef struct

17261

+{

17262

+}

17263

+t_inputrec;

17264

+typedef struct

17265

+{

17266

+}

17267

+t_commrec;

17268

+typedef struct

17269

+{

17270

+}

17271

+t_forcerec;

17272

+typedef struct

17273

+{

17274

+}

17275

+t_mdatoms;

17276

+typedef struct

17277

+{

17278

+}

17279

+t_filenm;

17280

+enum

17281

+{

17282

+ eoPres, eoEpot, eoVir, eoDist, eoMu, eoForce, eoFx, eoFy, eoFz, eoPx, eoPy,

17283

+ eoPz, eoPolarizability, eoDipole, eoObsNR, eoMemory =

17284

+ eoObsNR, eoInter, eoUseVirial, eoNR

17285

+};

17286

+extern char *eoNames[eoNR];

17287

+typedef struct

17288

+{

17289

+ int bPrint;

17290

+}

17291

+t_coupl_LJ;

17292

+typedef struct

17293

+{

17294

+ int eObs;

17295

+ t_iparams xi;

17296

+}

17297

+t_coupl_iparams;

17298

+typedef struct

17299

+{

17300

+ real act_value[eoObsNR];

17301

+ real av_value[eoObsNR];

17302

+ real ref_value[eoObsNR];

17303

+ int bObsUsed[eoObsNR];

17304

+ int nLJ, nBU, nQ, nIP;

17305

+ t_coupl_LJ *tcLJ;

17306

+}

17307

+t_coupl_rec;

17308

+static void

17309

+pr_ff (t_coupl_rec * tcr, real time, t_idef * idef, t_commrec * cr, int nfile,

17310

+ t_filenm fnm[])

17311

+{

17312

+ static FILE *prop;

17313

+ static FILE **out = ((void *) 0);

17314

+ static FILE **qq = ((void *) 0);

17315

+ static FILE **ip = ((void *) 0);

17316

+ char buf[256];

17317

+ char *leg[] = {

17318

+ "C12", "C6"

17319

+ };

17320

+ char **raleg;

17321

+ int i, j, index;

17322

+ if ((prop == ((void *) 0)) && (out == ((void *) 0)) && (qq == ((void *) 0))

17323

+ && (ip == ((void *) 0)))

17324

+ {

17325

+ for (i = j = 0; (i < eoObsNR); i++)

17326

+ {

17327

+ if (tcr->bObsUsed[i])

17328

+ {

17329

+ raleg[j++] =

17330

+ (__extension__

17331

+ (__builtin_constant_p (eoNames[i])

17332

+ && ((size_t) (const void *) ((eoNames[i]) + 1) -

17333

+ (size_t) (const void *) (eoNames[i]) ==

17334

+ 1) ? (((const char *) (eoNames[i]))[0] ==

17335

+ '\0' ? (char *) calloc ((size_t) 1,

17336

+ (size_t) 1) : (

17337

+ {

17338

+ size_t

17339

+ __len

17340

+ =

17341

+ strlen

17342

+ (eoNames

17343

+ [i])

17344

+ +

17345

+ 1;

17346

+ char

17347

+ *__retval

17348

+ =

17349

+ (char

17350

+ *)

17351

+ malloc

17352

+ (__len);

17353

+ __retval;}

17354

+ )): __strdup (eoNames[i])));

17355

+ raleg[j++] =

17356

+ (__extension__

17357

+ (__builtin_constant_p (buf)

17358

+ && ((size_t) (const void *) ((buf) + 1) -

17359

+ (size_t) (const void *) (buf) ==

17360

+ 1) ? (((const char *) (buf))[0] ==

17361

+ '\0' ? (char *) calloc ((size_t) 1,

17362

+ (size_t) 1) : (

17363

+ {

17364

+ size_t

17365

+ __len

17366

+ =

17367

+ strlen

17368

+ (buf)

17369

+ +

17370

+ 1;

17371

+ char

17372

+ *__retval

17373

+ =

17374

+ (char

17375

+ *)

17376

+ malloc

17377

+ (__len);

17378

+ __retval;}

17379

+ )): __strdup (buf)));

17380

+ }

17381

+ }

17382

+ if (tcr->nLJ)

17383

+ {

17384

+ for (i = 0; (i < tcr->nLJ); i++)

17385

+ {

17386

+ if (tcr->tcLJ[i].bPrint)

17387

+ {

17388

+ xvgr_legend (out[i], (sizeof (leg) / sizeof ((leg)[0])),

17389

+ leg);

17390

+ }

17391

+ }

17392

+ }

17393

+ }

17394

+}

17395

+

17396

+void

17397

+do_coupling (FILE * log, int nfile, t_filenm fnm[], t_coupl_rec * tcr, real t,

17398

+ int step, real ener[], t_forcerec * fr, t_inputrec * ir,

17399

+ int bMaster, t_mdatoms * md, t_idef * idef, real mu_aver,

17400

+ int nmols, t_commrec * cr, matrix box, tensor virial,

17401

+ tensor pres, rvec mu_tot, rvec x[], rvec f[], int bDoIt)

17402

+{

17403

+ int i, j, ati, atj, atnr2, type, ftype;

17404

+ real deviation[eoObsNR], prdev[eoObsNR], epot0, dist, rmsf;

17405

+ real ff6, ff12, ffa, ffb, ffc, ffq, factor, dt, mu_ind;

17406

+ int bTest, bPrint;

17407

+ t_coupl_iparams *tip;

17408

+ if (bPrint)

17409

+ {

17410

+ pr_ff (tcr, t, idef, cr, nfile, fnm);

17411

+ }

17412

+ for (i = 0; (i < eoObsNR); i++)

17413

+ {

17414

+ deviation[i] =

17415

+ calc_deviation (tcr->av_value[i], tcr->act_value[i],

17416

+ tcr->ref_value[i]);

17417

+ prdev[i] = tcr->ref_value[i] - tcr->act_value[i];

17418

+ }

17419

+ if (bPrint)

17420

+ pr_dev (tcr, t, prdev, cr, nfile, fnm);

17421

+ for (i = 0; (i < atnr2); i++)

17422

+ {

17423

+ factor = dt * deviation[tip->eObs];

17424

+ switch (ftype)

17425

+ {

17426

+ case F_BONDS:

17427

+ if (fabs (tip->xi.harmonic.krA) > 1.2e-38)

17428

+ idef->iparams[type].harmonic.krA *=

17429

+ (1 + factor / tip->xi.harmonic.krA);

17430

+ }

17431

+ }

17432

+}

17433

Index: gcc/testsuite/gcc.target/powerpc/atomic-p7.c

17434

===================================================================

17435

--- a/src/gcc/testsuite/gcc.target/powerpc/atomic-p7.c (.../tags/gcc_4_8_2_release)

17436

+++ b/src/gcc/testsuite/gcc.target/powerpc/atomic-p7.c (.../branches/gcc-4_8-branch)

17437

@@ -0,0 +1,207 @@

17438

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17439

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17440

+/* { dg-require-effective-target powerpc_vsx_ok } */

17441

+/* { dg-options "-mcpu=power7 -O2" } */

17442

+/* { dg-final { scan-assembler-not "lbarx" } } */

17443

+/* { dg-final { scan-assembler-not "lharx" } } */

17444

+/* { dg-final { scan-assembler-times "lwarx" 18 } } */

17445

+/* { dg-final { scan-assembler-times "ldarx" 6 } } */

17446

+/* { dg-final { scan-assembler-not "lqarx" } } */

17447

+/* { dg-final { scan-assembler-not "stbcx" } } */

17448

+/* { dg-final { scan-assembler-not "sthcx" } } */

17449

+/* { dg-final { scan-assembler-times "stwcx" 18 } } */

17450

+/* { dg-final { scan-assembler-times "stdcx" 6 } } */

17451

+/* { dg-final { scan-assembler-not "stqcx" } } */

17452

+/* { dg-final { scan-assembler-times "bl __atomic" 6 } } */

17453

+/* { dg-final { scan-assembler-times "isync" 12 } } */

17454

+/* { dg-final { scan-assembler-times "lwsync" 8 } } */

17455

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

17456

+/* { dg-final { scan-assembler-not "mtvsrwa" } } */

17457

+/* { dg-final { scan-assembler-not "mtvsrwz" } } */

17458

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

17459

+/* { dg-final { scan-assembler-not "mfvsrwz" } } */

17460

+

17461

+/* Test for the byte atomic operations on power8 using lbarx/stbcx. */

17462

+char

17463

+char_fetch_add_relaxed (char *ptr, int value)

17464

+{

17465

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

17466

+}

17467

+

17468

+char

17469

+char_fetch_sub_consume (char *ptr, int value)

17470

+{

17471

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

17472

+}

17473

+

17474

+char

17475

+char_fetch_and_acquire (char *ptr, int value)

17476

+{

17477

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

17478

+}

17479

+

17480

+char

17481

+char_fetch_ior_release (char *ptr, int value)

17482

+{

17483

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

17484

+}

17485

+

17486

+char

17487

+char_fetch_xor_acq_rel (char *ptr, int value)

17488

+{

17489

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

17490

+}

17491

+

17492

+char

17493

+char_fetch_nand_seq_cst (char *ptr, int value)

17494

+{

17495

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

17496

+}

17497

+

17498

+/* Test for the half word atomic operations on power8 using lharx/sthcx. */

17499

+short

17500

+short_fetch_add_relaxed (short *ptr, int value)

17501

+{

17502

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

17503

+}

17504

+

17505

+short

17506

+short_fetch_sub_consume (short *ptr, int value)

17507

+{

17508

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

17509

+}

17510

+

17511

+short

17512

+short_fetch_and_acquire (short *ptr, int value)

17513

+{

17514

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

17515

+}

17516

+

17517

+short

17518

+short_fetch_ior_release (short *ptr, int value)

17519

+{

17520

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

17521

+}

17522

+

17523

+short

17524

+short_fetch_xor_acq_rel (short *ptr, int value)

17525

+{

17526

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

17527

+}

17528

+

17529

+short

17530

+short_fetch_nand_seq_cst (short *ptr, int value)

17531

+{

17532

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

17533

+}

17534

+

17535

+/* Test for the word atomic operations on power8 using lwarx/stwcx. */

17536

+int

17537

+int_fetch_add_relaxed (int *ptr, int value)

17538

+{

17539

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

17540

+}

17541

+

17542

+int

17543

+int_fetch_sub_consume (int *ptr, int value)

17544

+{

17545

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

17546

+}

17547

+

17548

+int

17549

+int_fetch_and_acquire (int *ptr, int value)

17550

+{

17551

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

17552

+}

17553

+

17554

+int

17555

+int_fetch_ior_release (int *ptr, int value)

17556

+{

17557

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

17558

+}

17559

+

17560

+int

17561

+int_fetch_xor_acq_rel (int *ptr, int value)

17562

+{

17563

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

17564

+}

17565

+

17566

+int

17567

+int_fetch_nand_seq_cst (int *ptr, int value)

17568

+{

17569

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

17570

+}

17571

+

17572

+/* Test for the double word atomic operations on power8 using ldarx/stdcx. */

17573

+long

17574

+long_fetch_add_relaxed (long *ptr, long value)

17575

+{

17576

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

17577

+}

17578

+

17579

+long

17580

+long_fetch_sub_consume (long *ptr, long value)

17581

+{

17582

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

17583

+}

17584

+

17585

+long

17586

+long_fetch_and_acquire (long *ptr, long value)

17587

+{

17588

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

17589

+}

17590

+

17591

+long

17592

+long_fetch_ior_release (long *ptr, long value)

17593

+{

17594

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

17595

+}

17596

+

17597

+long

17598

+long_fetch_xor_acq_rel (long *ptr, long value)

17599

+{

17600

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

17601

+}

17602

+

17603

+long

17604

+long_fetch_nand_seq_cst (long *ptr, long value)

17605

+{

17606

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

17607

+}

17608

+

17609

+/* Test for the quad word atomic operations on power8 using ldarx/stdcx. */

17610

+__int128_t

17611

+quad_fetch_add_relaxed (__int128_t *ptr, __int128_t value)

17612

+{

17613

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

17614

+}

17615

+

17616

+__int128_t

17617

+quad_fetch_sub_consume (__int128_t *ptr, __int128_t value)

17618

+{

17619

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

17620

+}

17621

+

17622

+__int128_t

17623

+quad_fetch_and_acquire (__int128_t *ptr, __int128_t value)

17624

+{

17625

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

17626

+}

17627

+

17628

+__int128_t

17629

+quad_fetch_ior_release (__int128_t *ptr, __int128_t value)

17630

+{

17631

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

17632

+}

17633

+

17634

+__int128_t

17635

+quad_fetch_xor_acq_rel (__int128_t *ptr, __int128_t value)

17636

+{

17637

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

17638

+}

17639

+

17640

+__int128_t

17641

+quad_fetch_nand_seq_cst (__int128_t *ptr, __int128_t value)

17642

+{

17643

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

17644

+}

17645

Index: gcc/testsuite/gcc.target/powerpc/recip-3.c

17646

===================================================================

17647

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-3.c (.../tags/gcc_4_8_2_release)

17648

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-3.c (.../branches/gcc-4_8-branch)

17649

@@ -1,14 +1,14 @@

17650

/* { dg-do compile { target { { powerpc*-*-* } && { ! powerpc*-apple-darwin* } } } } */

17651

/* { dg-require-effective-target powerpc_fprs } */

17652

/* { dg-options "-O2 -mrecip -ffast-math -mcpu=power7" } */

17653

-/* { dg-final { scan-assembler-times "xsrsqrtedp" 1 } } */

17654

+/* { dg-final { scan-assembler-times "xsrsqrtedp\|frsqrte\ " 1 } } */

17655

/* { dg-final { scan-assembler-times "xsmsub.dp\|fmsub\ " 1 } } */

17656

-/* { dg-final { scan-assembler-times "xsmuldp" 4 } } */

17657

+/* { dg-final { scan-assembler-times "xsmuldp\|fmul\ " 4 } } */

17658

/* { dg-final { scan-assembler-times "xsnmsub.dp\|fnmsub\ " 2 } } */

17659

-/* { dg-final { scan-assembler-times "frsqrtes" 1 } } */

17660

-/* { dg-final { scan-assembler-times "fmsubs" 1 } } */

17661

-/* { dg-final { scan-assembler-times "fmuls" 4 } } */

17662

-/* { dg-final { scan-assembler-times "fnmsubs" 2 } } */

17663

+/* { dg-final { scan-assembler-times "xsrsqrtesp\|frsqrtes" 1 } } */

17664

+/* { dg-final { scan-assembler-times "xsmsub.sp\|fmsubs" 1 } } */

17665

+/* { dg-final { scan-assembler-times "xsmulsp\|fmuls" 2 } } */

17666

+/* { dg-final { scan-assembler-times "xsnmsub.sp\|fnmsubs" 1 } } */

17667

17668

double

17669

rsqrt_d (double a)

17670

Index: gcc/testsuite/gcc.target/powerpc/timode_off.c

17671

===================================================================

17672

--- a/src/gcc/testsuite/gcc.target/powerpc/timode_off.c (.../tags/gcc_4_8_2_release)

17673

+++ b/src/gcc/testsuite/gcc.target/powerpc/timode_off.c (.../branches/gcc-4_8-branch)

17674

@@ -1,5 +1,5 @@

17675

/* { dg-do assemble { target { lp64 } } } */

17676

-/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps" } */

17677

+/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps -mcpu=power5" } */

17678

17679

typedef int TImode __attribute__ ((mode (TI)));

17680

17681

@@ -46,6 +46,12 @@

17682

TImode r20 (void *x) { return *(TImode *) (x + 32748); }

17683

17684

/* test should really be == 616, see pr54110 */

17685

+/* When TImode is allowed in VSX registers, the allowable address modes for

17686

+ TImode is just a single indirect address in order for the value to be loaded

17687

+ and store in either GPR or VSX registers. This affects the generated code,

17688

+ and it would cause this test to fail, when such an option is used. Fall

17689

+ back to power5 to test the code. */

17690

+

17691

/* { dg-final { object-size text <= 700 } } */

17692

/* { dg-final { scan-assembler-not "(st|l)fd" } } */

17693

/* { dg-final { cleanup-saved-temps "timode_off" } } */

17694

Index: gcc/testsuite/gcc.target/powerpc/no-r11-2.c

17695

===================================================================

17696

--- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-2.c (.../tags/gcc_4_8_2_release)

17697

+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-2.c (.../branches/gcc-4_8-branch)

17698

@@ -1,5 +1,6 @@

17699

/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17700

/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */

17701

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

17702

/* { dg-options "-O2 -mpointers-to-nested-functions" } */

17703

17704

int

17705

Index: gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c

17706

===================================================================

17707

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c (.../tags/gcc_4_8_2_release)

17708

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c (.../branches/gcc-4_8-branch)

17709

@@ -0,0 +1,42 @@

17710

+/* { dg-do compile { target { powerpc*-*-* } } } */

17711

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17712

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17713

+/* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf" } */

17714

+

17715

+float load_sf (float *p)

17716

+{

17717

+ float f = *p;

17718

+ __asm__ ("# reg %x0" : "+v" (f));

17719

+ return f;

17720

+}

17721

+

17722

+double load_df (double *p)

17723

+{

17724

+ double d = *p;

17725

+ __asm__ ("# reg %x0" : "+v" (d));

17726

+ return d;

17727

+}

17728

+

17729

+double load_dfsf (float *p)

17730

+{

17731

+ double d = (double) *p;

17732

+ __asm__ ("# reg %x0" : "+v" (d));

17733

+ return d;

17734

+}

17735

+

17736

+void store_sf (float *p, float f)

17737

+{

17738

+ __asm__ ("# reg %x0" : "+v" (f));

17739

+ *p = f;

17740

+}

17741

+

17742

+void store_df (double *p, double d)

17743

+{

17744

+ __asm__ ("# reg %x0" : "+v" (d));

17745

+ *p = d;

17746

+}

17747

+

17748

+/* { dg-final { scan-assembler "lxsspx" } } */

17749

+/* { dg-final { scan-assembler "lxsdx" } } */

17750

+/* { dg-final { scan-assembler "stxsspx" } } */

17751

+/* { dg-final { scan-assembler "stxsdx" } } */

17752

Index: gcc/testsuite/gcc.target/powerpc/bool3-p8.c

17753

===================================================================

17754

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3-p8.c (.../tags/gcc_4_8_2_release)

17755

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3-p8.c (.../branches/gcc-4_8-branch)

17756

@@ -0,0 +1,36 @@

17757

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17758

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17759

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17760

+/* { dg-options "-O2 -mcpu=power8" } */

17761

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

17762

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

17763

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

17764

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

17765

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

17766

+/* { dg-final { scan-assembler "\[ \t\]eqv " } } */

17767

+/* { dg-final { scan-assembler "\[ \t\]orc " } } */

17768

+/* { dg-final { scan-assembler "\[ \t\]nand " } } */

17769

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

17770

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

17771

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

17772

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

17773

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

17774

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

17775

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

17776

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

17777

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

17778

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

17779

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

17780

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

17781

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

17782

+

17783

+#ifndef TYPE

17784

+#ifdef _ARCH_PPC64

17785

+#define TYPE __int128_t

17786

+#else

17787

+typedef int v4si __attribute__ ((vector_size (16)));

17788

+#define TYPE v4si

17789

+#endif

17790

+#endif

17791

+

17792

+#include "bool3.h"

17793

Index: gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c

17794

===================================================================

17795

--- a/src/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c (.../tags/gcc_4_8_2_release)

17796

+++ b/src/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c (.../branches/gcc-4_8-branch)

17797

@@ -0,0 +1,32 @@

17798

+/* This checks the availability of the XL compiler intrinsics for

17799

+ transactional execution with the expected prototypes. */

17800

+

17801

+/* { dg-do compile { target { powerpc*-*-* } } } */

17802

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17803

+/* { dg-require-effective-target powerpc_htm_ok } */

17804

+/* { dg-options "-O2 -mhtm" } */

17805

+

17806

+#include <htmxlintrin.h>

17807

+

17808

+void

17809

+foo (void *TM_buff, long *result, unsigned char *code)

17810

+{

17811

+ *result++ = __TM_simple_begin ();

17812

+ *result++ = __TM_begin (TM_buff);

17813

+ *result++ = __TM_end ();

17814

+ __TM_abort ();

17815

+ __TM_named_abort (*code);

17816

+ __TM_resume ();

17817

+ __TM_suspend ();

17818

+ *result++ = __TM_is_user_abort (TM_buff);

17819

+ *result++ = __TM_is_named_user_abort (TM_buff, code);

17820

+ *result++ = __TM_is_illegal (TM_buff);

17821

+ *result++ = __TM_is_footprint_exceeded (TM_buff);

17822

+ *result++ = __TM_nesting_depth (TM_buff);

17823

+ *result++ = __TM_is_nested_too_deep (TM_buff);

17824

+ *result++ = __TM_is_conflict (TM_buff);

17825

+ *result++ = __TM_is_failure_persistent (TM_buff);

17826

+ *result++ = __TM_failure_address (TM_buff);

17827

+ *result++ = __TM_failure_code (TM_buff);

17828

+}

17829

+

17830

Index: gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c

17831

===================================================================

17832

--- a/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../tags/gcc_4_8_2_release)

17833

+++ b/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../branches/gcc-4_8-branch)

17834

@@ -0,0 +1,21 @@

17835

+/* Test accuracy of long double division (glibc bug 15396). */

17836

+/* { dg-do run { target powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } */

17837

+/* { dg-options "-mlong-double-128" } */

17838

+

17839

+extern void exit (int);

17840

+extern void abort (void);

17841

+

17842

+volatile long double a = 0x1p-1024L;

17843

+volatile long double b = 0x3p-53L;

17844

+volatile long double r;

17845

+volatile long double expected = 0x1.55555555555555555555555555p-973L;

17846

+

17847

+int

17848

+main (void)

17849

+{

17850

+ r = a / b;

17851

+ /* Allow error up to 2ulp. */

17852

+ if (__builtin_fabsl (r - expected) > 0x1p-1073L)

17853

+ abort ();

17854

+ exit (0);

17855

+}

17856

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c

17857

===================================================================

17858

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c (.../tags/gcc_4_8_2_release)

17859

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c (.../branches/gcc-4_8-branch)

17860

@@ -0,0 +1,249 @@

17861

+/* { dg-do compile { target { powerpc*-*-* } } } */

17862

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17863

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17864

+/* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model" } */

17865

+

17866

+#include <altivec.h>

17867

+

17868

+typedef vector long long vll_sign;

17869

+typedef vector unsigned long long vll_uns;

17870

+typedef vector bool long long vll_bool;

17871

+

17872

+typedef vector int vi_sign;

17873

+typedef vector unsigned int vi_uns;

17874

+typedef vector bool int vi_bool;

17875

+

17876

+typedef vector short vs_sign;

17877

+typedef vector unsigned short vs_uns;

17878

+typedef vector bool short vs_bool;

17879

+

17880

+typedef vector signed char vc_sign;

17881

+typedef vector unsigned char vc_uns;

17882

+typedef vector bool char vc_bool;

17883

+

17884

+vll_sign vll_clz_1 (vll_sign a)

17885

+{

17886

+ return __builtin_altivec_vclzd (a);

17887

+}

17888

+

17889

+vll_sign vll_clz_2 (vll_sign a)

17890

+{

17891

+ return vec_vclz (a);

17892

+}

17893

+

17894

+vll_sign vll_clz_3 (vll_sign a)

17895

+{

17896

+ return vec_vclzd (a);

17897

+}

17898

+

17899

+vll_uns vll_clz_4 (vll_uns a)

17900

+{

17901

+ return vec_vclz (a);

17902

+}

17903

+

17904

+vll_uns vll_clz_5 (vll_uns a)

17905

+{

17906

+ return vec_vclzd (a);

17907

+}

17908

+

17909

+vi_sign vi_clz_1 (vi_sign a)

17910

+{

17911

+ return __builtin_altivec_vclzw (a);

17912

+}

17913

+

17914

+vi_sign vi_clz_2 (vi_sign a)

17915

+{

17916

+ return vec_vclz (a);

17917

+}

17918

+

17919

+vi_sign vi_clz_3 (vi_sign a)

17920

+{

17921

+ return vec_vclzw (a);

17922

+}

17923

+

17924

+vi_uns vi_clz_4 (vi_uns a)

17925

+{

17926

+ return vec_vclz (a);

17927

+}

17928

+

17929

+vi_uns vi_clz_5 (vi_uns a)

17930

+{

17931

+ return vec_vclzw (a);

17932

+}

17933

+

17934

+vs_sign vs_clz_1 (vs_sign a)

17935

+{

17936

+ return __builtin_altivec_vclzh (a);

17937

+}

17938

+

17939

+vs_sign vs_clz_2 (vs_sign a)

17940

+{

17941

+ return vec_vclz (a);

17942

+}

17943

+

17944

+vs_sign vs_clz_3 (vs_sign a)

17945

+{

17946

+ return vec_vclzh (a);

17947

+}

17948

+

17949

+vs_uns vs_clz_4 (vs_uns a)

17950

+{

17951

+ return vec_vclz (a);

17952

+}

17953

+

17954

+vs_uns vs_clz_5 (vs_uns a)

17955

+{

17956

+ return vec_vclzh (a);

17957

+}

17958

+

17959

+vc_sign vc_clz_1 (vc_sign a)

17960

+{

17961

+ return __builtin_altivec_vclzb (a);

17962

+}

17963

+

17964

+vc_sign vc_clz_2 (vc_sign a)

17965

+{

17966

+ return vec_vclz (a);

17967

+}

17968

+

17969

+vc_sign vc_clz_3 (vc_sign a)

17970

+{

17971

+ return vec_vclzb (a);

17972

+}

17973

+

17974

+vc_uns vc_clz_4 (vc_uns a)

17975

+{

17976

+ return vec_vclz (a);

17977

+}

17978

+

17979

+vc_uns vc_clz_5 (vc_uns a)

17980

+{

17981

+ return vec_vclzb (a);

17982

+}

17983

+

17984

+vll_sign vll_popcnt_1 (vll_sign a)

17985

+{

17986

+ return __builtin_altivec_vpopcntd (a);

17987

+}

17988

+

17989

+vll_sign vll_popcnt_2 (vll_sign a)

17990

+{

17991

+ return vec_vpopcnt (a);

17992

+}

17993

+

17994

+vll_sign vll_popcnt_3 (vll_sign a)

17995

+{

17996

+ return vec_vpopcntd (a);

17997

+}

17998

+

17999

+vll_uns vll_popcnt_4 (vll_uns a)

18000

+{

18001

+ return vec_vpopcnt (a);

18002

+}

18003

+

18004

+vll_uns vll_popcnt_5 (vll_uns a)

18005

+{

18006

+ return vec_vpopcntd (a);

18007

+}

18008

+

18009

+vi_sign vi_popcnt_1 (vi_sign a)

18010

+{

18011

+ return __builtin_altivec_vpopcntw (a);

18012

+}

18013

+

18014

+vi_sign vi_popcnt_2 (vi_sign a)

18015

+{

18016

+ return vec_vpopcnt (a);

18017

+}

18018

+

18019

+vi_sign vi_popcnt_3 (vi_sign a)

18020

+{

18021

+ return vec_vpopcntw (a);

18022

+}

18023

+

18024

+vi_uns vi_popcnt_4 (vi_uns a)

18025

+{

18026

+ return vec_vpopcnt (a);

18027

+}

18028

+

18029

+vi_uns vi_popcnt_5 (vi_uns a)

18030

+{

18031

+ return vec_vpopcntw (a);

18032

+}

18033

+

18034

+vs_sign vs_popcnt_1 (vs_sign a)

18035

+{

18036

+ return __builtin_altivec_vpopcnth (a);

18037

+}

18038

+

18039

+vs_sign vs_popcnt_2 (vs_sign a)

18040

+{

18041

+ return vec_vpopcnt (a);

18042

+}

18043

+

18044

+vs_sign vs_popcnt_3 (vs_sign a)

18045

+{

18046

+ return vec_vpopcnth (a);

18047

+}

18048

+

18049

+vs_uns vs_popcnt_4 (vs_uns a)

18050

+{

18051

+ return vec_vpopcnt (a);

18052

+}

18053

+

18054

+vs_uns vs_popcnt_5 (vs_uns a)

18055

+{

18056

+ return vec_vpopcnth (a);

18057

+}

18058

+

18059

+vc_sign vc_popcnt_1 (vc_sign a)

18060

+{

18061

+ return __builtin_altivec_vpopcntb (a);

18062

+}

18063

+

18064

+vc_sign vc_popcnt_2 (vc_sign a)

18065

+{

18066

+ return vec_vpopcnt (a);

18067

+}

18068

+

18069

+vc_sign vc_popcnt_3 (vc_sign a)

18070

+{

18071

+ return vec_vpopcntb (a);

18072

+}

18073

+

18074

+vc_uns vc_popcnt_4 (vc_uns a)

18075

+{

18076

+ return vec_vpopcnt (a);

18077

+}

18078

+

18079

+vc_uns vc_popcnt_5 (vc_uns a)

18080

+{

18081

+ return vec_vpopcntb (a);

18082

+}

18083

+

18084

+vc_uns vc_gbb_1 (vc_uns a)

18085

+{

18086

+ return __builtin_altivec_vgbbd (a);

18087

+}

18088

+

18089

+vc_sign vc_gbb_2 (vc_sign a)

18090

+{

18091

+ return vec_vgbbd (a);

18092

+}

18093

+

18094

+vc_uns vc_gbb_3 (vc_uns a)

18095

+{

18096

+ return vec_vgbbd (a);

18097

+}

18098

+

18099

+/* { dg-final { scan-assembler-times "vclzd" 5 } } */

18100

+/* { dg-final { scan-assembler-times "vclzw" 5 } } */

18101

+/* { dg-final { scan-assembler-times "vclzh" 5 } } */

18102

+/* { dg-final { scan-assembler-times "vclzb" 5 } } */

18103

+

18104

+/* { dg-final { scan-assembler-times "vpopcntd" 5 } } */

18105

+/* { dg-final { scan-assembler-times "vpopcntw" 5 } } */

18106

+/* { dg-final { scan-assembler-times "vpopcnth" 5 } } */

18107

+/* { dg-final { scan-assembler-times "vpopcntb" 5 } } */

18108

+

18109

+/* { dg-final { scan-assembler-times "vgbbd" 3 } } */

18110

Index: gcc/testsuite/gcc.target/powerpc/bool3-av.c

18111

===================================================================

18112

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3-av.c (.../tags/gcc_4_8_2_release)

18113

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3-av.c (.../branches/gcc-4_8-branch)

18114

@@ -0,0 +1,37 @@

18115

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

18116

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18117

+/* { dg-require-effective-target powerpc_altivec_ok } */

18118

+/* { dg-options "-O2 -mcpu=power6 -mabi=altivec -maltivec -mno-vsx" } */

18119

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

18120

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

18121

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

18122

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

18123

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

18124

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

18125

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

18126

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

18127

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

18128

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

18129

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

18130

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

18131

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

18132

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

18133

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

18134

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

18135

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

18136

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

18137

+

18138

+/* On altivec, for 128-bit types, ORC/ANDC/EQV might not show up, since the

18139

+ vector unit doesn't support these, so the appropriate combine patterns may

18140

+ not be generated. */

18141

+

18142

+#ifndef TYPE

18143

+#ifdef _ARCH_PPC64

18144

+#define TYPE __int128_t

18145

+#else

18146

+typedef int v4si __attribute__ ((vector_size (16)));

18147

+#define TYPE v4si

18148

+#endif

18149

+#endif

18150

+

18151

+#include "bool3.h"

18152

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c

18153

===================================================================

18154

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c (.../tags/gcc_4_8_2_release)

18155

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c (.../branches/gcc-4_8-branch)

18156

@@ -0,0 +1,69 @@

18157

+/* { dg-do compile { target { powerpc*-*-* } } } */

18158

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18159

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18160

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

18161

+

18162

+#ifndef SIZE

18163

+#define SIZE 1024

18164

+#endif

18165

+

18166

+#ifndef ALIGN

18167

+#define ALIGN 32

18168

+#endif

18169

+

18170

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

18171

+

18172

+#define DO_BUILTIN(PREFIX, TYPE, CLZ, POPCNT) \

18173

+TYPE PREFIX ## _a[SIZE] ALIGN_ATTR; \

18174

+TYPE PREFIX ## _b[SIZE] ALIGN_ATTR; \

18175

+ \

18176

+void \

18177

+PREFIX ## _clz (void) \

18178

+{ \

18179

+ unsigned long i; \

18180

+ \

18181

+ for (i = 0; i < SIZE; i++) \

18182

+ PREFIX ## _a[i] = CLZ (PREFIX ## _b[i]); \

18183

+} \

18184

+ \

18185

+void \

18186

+PREFIX ## _popcnt (void) \

18187

+{ \

18188

+ unsigned long i; \

18189

+ \

18190

+ for (i = 0; i < SIZE; i++) \

18191

+ PREFIX ## _a[i] = POPCNT (PREFIX ## _b[i]); \

18192

+}

18193

+

18194

+#if !defined(DO_LONG_LONG) && !defined(DO_LONG) && !defined(DO_INT) && !defined(DO_SHORT) && !defined(DO_CHAR)

18195

+#define DO_INT 1

18196

+#endif

18197

+

18198

+#if DO_LONG_LONG

18199

+/* At the moment, only int is auto vectorized. */

18200

+DO_BUILTIN (sll, long long, __builtin_clzll, __builtin_popcountll)

18201

+DO_BUILTIN (ull, unsigned long long, __builtin_clzll, __builtin_popcountll)

18202

+#endif

18203

+

18204

+#if defined(_ARCH_PPC64) && DO_LONG

18205

+DO_BUILTIN (sl, long, __builtin_clzl, __builtin_popcountl)

18206

+DO_BUILTIN (ul, unsigned long, __builtin_clzl, __builtin_popcountl)

18207

+#endif

18208

+

18209

+#if DO_INT

18210

+DO_BUILTIN (si, int, __builtin_clz, __builtin_popcount)

18211

+DO_BUILTIN (ui, unsigned int, __builtin_clz, __builtin_popcount)

18212

+#endif

18213

+

18214

+#if DO_SHORT

18215

+DO_BUILTIN (ss, short, __builtin_clz, __builtin_popcount)

18216

+DO_BUILTIN (us, unsigned short, __builtin_clz, __builtin_popcount)

18217

+#endif

18218

+

18219

+#if DO_CHAR

18220

+DO_BUILTIN (sc, signed char, __builtin_clz, __builtin_popcount)

18221

+DO_BUILTIN (uc, unsigned char, __builtin_clz, __builtin_popcount)

18222

+#endif

18223

+

18224

+/* { dg-final { scan-assembler-times "vclzw" 2 } } */

18225

+/* { dg-final { scan-assembler-times "vpopcntw" 2 } } */

18226

Index: gcc/testsuite/gcc.target/powerpc/pr57949-1.c

18227

===================================================================

18228

--- a/src/gcc/testsuite/gcc.target/powerpc/pr57949-1.c (.../tags/gcc_4_8_2_release)

18229

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr57949-1.c (.../branches/gcc-4_8-branch)

18230

@@ -0,0 +1,20 @@

18231

+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */

18232

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18233

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

18234

+/* { dg-options "-O2 -mcpu=power7 -mno-compat-align-parm" } */

18235

+

18236

+/* Verify that vs is 16-byte aligned with -mcompat-align-parm. */

18237

+

18238

+typedef float v4sf __attribute__ ((vector_size (16)));

18239

+struct s { long m; v4sf v; };

18240

+long n;

18241

+v4sf ve;

18242

+

18243

+void pr57949 (long d1, long d2, long d3, long d4, long d5, long d6,

18244

+ long d7, long d8, long d9, struct s vs) {

18245

+ n = vs.m;

18246

+ ve = vs.v;

18247

+}

18248

+

18249

+/* { dg-final { scan-assembler "li \.\*,144" } } */

18250

+/* { dg-final { scan-assembler "ld \.\*,128\$1\$" } } */

18251

Index: gcc/testsuite/gcc.target/powerpc/atomic-p8.c

18252

===================================================================

18253

--- a/src/gcc/testsuite/gcc.target/powerpc/atomic-p8.c (.../tags/gcc_4_8_2_release)

18254

+++ b/src/gcc/testsuite/gcc.target/powerpc/atomic-p8.c (.../branches/gcc-4_8-branch)

18255

@@ -0,0 +1,237 @@

18256

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

18257

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18258

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18259

+/* { dg-options "-mcpu=power8 -O2" } */

18260

+/* { dg-final { scan-assembler-times "lbarx" 7 } } */

18261

+/* { dg-final { scan-assembler-times "lharx" 7 } } */

18262

+/* { dg-final { scan-assembler-times "lwarx" 7 } } */

18263

+/* { dg-final { scan-assembler-times "ldarx" 7 } } */

18264

+/* { dg-final { scan-assembler-times "lqarx" 7 } } */

18265

+/* { dg-final { scan-assembler-times "stbcx" 7 } } */

18266

+/* { dg-final { scan-assembler-times "sthcx" 7 } } */

18267

+/* { dg-final { scan-assembler-times "stwcx" 7 } } */

18268

+/* { dg-final { scan-assembler-times "stdcx" 7 } } */

18269

+/* { dg-final { scan-assembler-times "stqcx" 7 } } */

18270

+/* { dg-final { scan-assembler-not "bl __atomic" } } */

18271

+/* { dg-final { scan-assembler-times "isync" 20 } } */

18272

+/* { dg-final { scan-assembler-times "lwsync" 10 } } */

18273

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

18274

+/* { dg-final { scan-assembler-not "mtvsrwa" } } */

18275

+/* { dg-final { scan-assembler-not "mtvsrwz" } } */

18276

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

18277

+/* { dg-final { scan-assembler-not "mfvsrwz" } } */

18278

+

18279

+/* Test for the byte atomic operations on power8 using lbarx/stbcx. */

18280

+char

18281

+char_fetch_add_relaxed (char *ptr, int value)

18282

+{

18283

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18284

+}

18285

+

18286

+char

18287

+char_fetch_sub_consume (char *ptr, int value)

18288

+{

18289

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18290

+}

18291

+

18292

+char

18293

+char_fetch_and_acquire (char *ptr, int value)

18294

+{

18295

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18296

+}

18297

+

18298

+char

18299

+char_fetch_ior_release (char *ptr, int value)

18300

+{

18301

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18302

+}

18303

+

18304

+char

18305

+char_fetch_xor_acq_rel (char *ptr, int value)

18306

+{

18307

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18308

+}

18309

+

18310

+char

18311

+char_fetch_nand_seq_cst (char *ptr, int value)

18312

+{

18313

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18314

+}

18315

+

18316

+void

18317

+char_val_compare_and_swap (char *p, int i, int j, char *q)

18318

+{

18319

+ *q = __sync_val_compare_and_swap (p, i, j);

18320

+}

18321

+

18322

+/* Test for the half word atomic operations on power8 using lharx/sthcx. */

18323

+short

18324

+short_fetch_add_relaxed (short *ptr, int value)

18325

+{

18326

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18327

+}

18328

+

18329

+short

18330

+short_fetch_sub_consume (short *ptr, int value)

18331

+{

18332

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18333

+}

18334

+

18335

+short

18336

+short_fetch_and_acquire (short *ptr, int value)

18337

+{

18338

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18339

+}

18340

+

18341

+short

18342

+short_fetch_ior_release (short *ptr, int value)

18343

+{

18344

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18345

+}

18346

+

18347

+short

18348

+short_fetch_xor_acq_rel (short *ptr, int value)

18349

+{

18350

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18351

+}

18352

+

18353

+short

18354

+short_fetch_nand_seq_cst (short *ptr, int value)

18355

+{

18356

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18357

+}

18358

+

18359

+void

18360

+short_val_compare_and_swap (short *p, int i, int j, short *q)

18361

+{

18362

+ *q = __sync_val_compare_and_swap (p, i, j);

18363

+}

18364

+

18365

+/* Test for the word atomic operations on power8 using lwarx/stwcx. */

18366

+int

18367

+int_fetch_add_relaxed (int *ptr, int value)

18368

+{

18369

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18370

+}

18371

+

18372

+int

18373

+int_fetch_sub_consume (int *ptr, int value)

18374

+{

18375

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18376

+}

18377

+

18378

+int

18379

+int_fetch_and_acquire (int *ptr, int value)

18380

+{

18381

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18382

+}

18383

+

18384

+int

18385

+int_fetch_ior_release (int *ptr, int value)

18386

+{

18387

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18388

+}

18389

+

18390

+int

18391

+int_fetch_xor_acq_rel (int *ptr, int value)

18392

+{

18393

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18394

+}

18395

+

18396

+int

18397

+int_fetch_nand_seq_cst (int *ptr, int value)

18398

+{

18399

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18400

+}

18401

+

18402

+void

18403

+int_val_compare_and_swap (int *p, int i, int j, int *q)

18404

+{

18405

+ *q = __sync_val_compare_and_swap (p, i, j);

18406

+}

18407

+

18408

+/* Test for the double word atomic operations on power8 using ldarx/stdcx. */

18409

+long

18410

+long_fetch_add_relaxed (long *ptr, long value)

18411

+{

18412

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18413

+}

18414

+

18415

+long

18416

+long_fetch_sub_consume (long *ptr, long value)

18417

+{

18418

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18419

+}

18420

+

18421

+long

18422

+long_fetch_and_acquire (long *ptr, long value)

18423

+{

18424

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18425

+}

18426

+

18427

+long

18428

+long_fetch_ior_release (long *ptr, long value)

18429

+{

18430

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18431

+}

18432

+

18433

+long

18434

+long_fetch_xor_acq_rel (long *ptr, long value)

18435

+{

18436

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18437

+}

18438

+

18439

+long

18440

+long_fetch_nand_seq_cst (long *ptr, long value)

18441

+{

18442

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18443

+}

18444

+

18445

+void

18446

+long_val_compare_and_swap (long *p, long i, long j, long *q)

18447

+{

18448

+ *q = __sync_val_compare_and_swap (p, i, j);

18449

+}

18450

+

18451

+/* Test for the quad word atomic operations on power8 using ldarx/stdcx. */

18452

+__int128_t

18453

+quad_fetch_add_relaxed (__int128_t *ptr, __int128_t value)

18454

+{

18455

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18456

+}

18457

+

18458

+__int128_t

18459

+quad_fetch_sub_consume (__int128_t *ptr, __int128_t value)

18460

+{

18461

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18462

+}

18463

+

18464

+__int128_t

18465

+quad_fetch_and_acquire (__int128_t *ptr, __int128_t value)

18466

+{

18467

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18468

+}

18469

+

18470

+__int128_t

18471

+quad_fetch_ior_release (__int128_t *ptr, __int128_t value)

18472

+{

18473

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18474

+}

18475

+

18476

+__int128_t

18477

+quad_fetch_xor_acq_rel (__int128_t *ptr, __int128_t value)

18478

+{

18479

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18480

+}

18481

+

18482

+__int128_t

18483

+quad_fetch_nand_seq_cst (__int128_t *ptr, __int128_t value)

18484

+{

18485

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18486

+}

18487

+

18488

+void

18489

+quad_val_compare_and_swap (__int128_t *p, __int128_t i, __int128_t j, __int128_t *q)

18490

+{

18491

+ *q = __sync_val_compare_and_swap (p, i, j);

18492

+}

18493

Index: gcc/testsuite/gcc.target/powerpc/sd-pwr6.c

18494

===================================================================

18495

--- a/src/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c (.../tags/gcc_4_8_2_release)

18496

+++ b/src/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c (.../branches/gcc-4_8-branch)

18497

@@ -0,0 +1,19 @@

18498

+/* { dg-do compile { target { powerpc*-*-* } } } */

18499

+/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */

18500

+/* { dg-require-effective-target powerpc_vsx_ok } */

18501

+/* { dg-options "-O2 -mcpu=power6 -mhard-dfp" } */

18502

+/* { dg-final { scan-assembler-not "lfiwzx" } } */

18503

+/* { dg-final { scan-assembler-times "lfd" 2 } } */

18504

+/* { dg-final { scan-assembler-times "dctdp" 2 } } */

18505

+/* { dg-final { scan-assembler-times "dadd" 1 } } */

18506

+/* { dg-final { scan-assembler-times "drsp" 1 } } */

18507

+

18508

+/* Test that for power6 we need to use a bounce buffer on the stack to load

18509

+ SDmode variables because the power6 does not have a way to directly load

18510

+ 32-bit values from memory. */

18511

+_Decimal32 a;

18512

+

18513

+void inc_dec32 (void)

18514

+{

18515

+ a += (_Decimal32) 1.0;

18516

+}

18517

Index: gcc/testsuite/gcc.target/powerpc/recip-4.c

18518

===================================================================

18519

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-4.c (.../tags/gcc_4_8_2_release)

18520

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-4.c (.../branches/gcc-4_8-branch)

18521

@@ -7,8 +7,8 @@

18522

/* { dg-final { scan-assembler-times "xvnmsub.dp" 2 } } */

18523

/* { dg-final { scan-assembler-times "xvrsqrtesp" 1 } } */

18524

/* { dg-final { scan-assembler-times "xvmsub.sp" 1 } } */

18525

-/* { dg-final { scan-assembler-times "xvmulsp" 4 } } */

18526

-/* { dg-final { scan-assembler-times "xvnmsub.sp" 2 } } */

18527

+/* { dg-final { scan-assembler-times "xvmulsp" 2 } } */

18528

+/* { dg-final { scan-assembler-times "xvnmsub.sp" 1 } } */

18529

18530

#define SIZE 1024

18531

18532

Index: gcc/testsuite/gcc.target/powerpc/no-r11-3.c

18533

===================================================================

18534

--- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-3.c (.../tags/gcc_4_8_2_release)

18535

+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-3.c (.../branches/gcc-4_8-branch)

18536

@@ -1,5 +1,6 @@

18537

/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

18538

/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */

18539

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

18540

/* { dg-options "-O2 -mno-pointers-to-nested-functions" } */

18541

18542

extern void ext_call (int (func) (void));

18543

Index: gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c

18544

===================================================================

18545

--- a/src/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c (.../tags/gcc_4_8_2_release)

18546

+++ b/src/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c (.../branches/gcc-4_8-branch)

18547

@@ -0,0 +1,130 @@

18548

+/* { dg-do compile { target { powerpc*-*-* } } } */

18549

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18550

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18551

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

18552

+

18553

+typedef vector unsigned long long crypto_t;

18554

+typedef vector unsigned long long v2di_t;

18555

+typedef vector unsigned int v4si_t;

18556

+typedef vector unsigned short v8hi_t;

18557

+typedef vector unsigned char v16qi_t;

18558

+

18559

+crypto_t crpyto1 (crypto_t a)

18560

+{

18561

+ return __builtin_crypto_vsbox (a);

18562

+}

18563

+

18564

+crypto_t crypto2 (crypto_t a, crypto_t b)

18565

+{

18566

+ return __builtin_crypto_vcipher (a, b);

18567

+}

18568

+

18569

+crypto_t crypto3 (crypto_t a, crypto_t b)

18570

+{

18571

+ return __builtin_crypto_vcipherlast (a, b);

18572

+}

18573

+

18574

+crypto_t crypto4 (crypto_t a, crypto_t b)

18575

+{

18576

+ return __builtin_crypto_vncipher (a, b);

18577

+}

18578

+

18579

+crypto_t crypto5 (crypto_t a, crypto_t b)

18580

+{

18581

+ return __builtin_crypto_vncipherlast (a, b);

18582

+}

18583

+

18584

+v16qi_t crypto6a (v16qi_t a, v16qi_t b, v16qi_t c)

18585

+{

18586

+ return __builtin_crypto_vpermxor (a, b, c);

18587

+}

18588

+

18589

+v8hi_t crypto6b (v8hi_t a, v8hi_t b, v8hi_t c)

18590

+{

18591

+ return __builtin_crypto_vpermxor (a, b, c);

18592

+}

18593

+

18594

+v4si_t crypto6c (v4si_t a, v4si_t b, v4si_t c)

18595

+{

18596

+ return __builtin_crypto_vpermxor (a, b, c);

18597

+}

18598

+

18599

+v2di_t crypto6d (v2di_t a, v2di_t b, v2di_t c)

18600

+{

18601

+ return __builtin_crypto_vpermxor (a, b, c);

18602

+}

18603

+

18604

+v16qi_t crypto7a (v16qi_t a, v16qi_t b)

18605

+{

18606

+ return __builtin_crypto_vpmsumb (a, b);

18607

+}

18608

+

18609

+v16qi_t crypto7b (v16qi_t a, v16qi_t b)

18610

+{

18611

+ return __builtin_crypto_vpmsum (a, b);

18612

+}

18613

+

18614

+v8hi_t crypto7c (v8hi_t a, v8hi_t b)

18615

+{

18616

+ return __builtin_crypto_vpmsumh (a, b);

18617

+}

18618

+

18619

+v8hi_t crypto7d (v8hi_t a, v8hi_t b)

18620

+{

18621

+ return __builtin_crypto_vpmsum (a, b);

18622

+}

18623

+

18624

+v4si_t crypto7e (v4si_t a, v4si_t b)

18625

+{

18626

+ return __builtin_crypto_vpmsumw (a, b);

18627

+}

18628

+

18629

+v4si_t crypto7f (v4si_t a, v4si_t b)

18630

+{

18631

+ return __builtin_crypto_vpmsum (a, b);

18632

+}

18633

+

18634

+v2di_t crypto7g (v2di_t a, v2di_t b)

18635

+{

18636

+ return __builtin_crypto_vpmsumd (a, b);

18637

+}

18638

+

18639

+v2di_t crypto7h (v2di_t a, v2di_t b)

18640

+{

18641

+ return __builtin_crypto_vpmsum (a, b);

18642

+}

18643

+

18644

+v2di_t crypto8a (v2di_t a)

18645

+{

18646

+ return __builtin_crypto_vshasigmad (a, 0, 8);

18647

+}

18648

+

18649

+v2di_t crypto8b (v2di_t a)

18650

+{

18651

+ return __builtin_crypto_vshasigma (a, 0, 8);

18652

+}

18653

+

18654

+v4si_t crypto8c (v4si_t a)

18655

+{

18656

+ return __builtin_crypto_vshasigmaw (a, 1, 15);

18657

+}

18658

+

18659

+v4si_t crypto8d (v4si_t a)

18660

+{

18661

+ return __builtin_crypto_vshasigma (a, 1, 15);

18662

+}

18663

+

18664

+/* Note space is used after the instruction so that vcipherlast does not match

18665

+ vcipher. */

18666

+/* { dg-final { scan-assembler-times "vcipher " 1 } } */

18667

+/* { dg-final { scan-assembler-times "vcipherlast " 1 } } */

18668

+/* { dg-final { scan-assembler-times "vncipher " 1 } } */

18669

+/* { dg-final { scan-assembler-times "vncipherlast " 1 } } */

18670

+/* { dg-final { scan-assembler-times "vpermxor " 4 } } */

18671

+/* { dg-final { scan-assembler-times "vpmsumb " 2 } } */

18672

+/* { dg-final { scan-assembler-times "vpmsumd " 2 } } */

18673

+/* { dg-final { scan-assembler-times "vpmsumh " 2 } } */

18674

+/* { dg-final { scan-assembler-times "vpmsumw " 2 } } */

18675

+/* { dg-final { scan-assembler-times "vsbox " 1 } } */

18676

+/* { dg-final { scan-assembler-times "vshasigmad " 2 } } */

18677

+/* { dg-final { scan-assembler-times "vshasigmaw " 2 } } */

18678

Index: gcc/testsuite/gcc.target/powerpc/pr42747.c

18679

===================================================================

18680

--- a/src/gcc/testsuite/gcc.target/powerpc/pr42747.c (.../tags/gcc_4_8_2_release)

18681

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr42747.c (.../branches/gcc-4_8-branch)

18682

@@ -5,4 +5,4 @@

18683

18684

double foo (double x) { return __builtin_sqrt (x); }

18685

18686

-/* { dg-final { scan-assembler "xssqrtdp" } } */

18687

+/* { dg-final { scan-assembler "xssqrtdp\|fsqrt" } } */

18688

Index: gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c

18689

===================================================================

18690

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c (.../tags/gcc_4_8_2_release)

18691

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c (.../branches/gcc-4_8-branch)

18692

@@ -0,0 +1,26 @@

18693

+/* Test generation of DFP instructions for POWER6. */

18694

+/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */

18695

+/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */

18696

+

18697

+/* { dg-final { scan-assembler-times "fneg" 1 } } */

18698

+/* { dg-final { scan-assembler-times "fabs" 1 } } */

18699

+/* { dg-final { scan-assembler-times "fnabs" 1 } } */

18700

+/* { dg-final { scan-assembler-times "fmr" 0 } } */

18701

+

18702

+_Decimal64

18703

+func1 (_Decimal64 a, _Decimal64 b)

18704

+{

18705

+ return -b;

18706

+}

18707

+

18708

+_Decimal64

18709

+func2 (_Decimal64 a, _Decimal64 b)

18710

+{

18711

+ return __builtin_fabsd64 (b);

18712

+}

18713

+

18714

+_Decimal64

18715

+func3 (_Decimal64 a, _Decimal64 b)

18716

+{

18717

+ return - __builtin_fabsd64 (b);

18718

+}

18719

Index: gcc/testsuite/gcc.target/powerpc/direct-move-float1.c

18720

===================================================================

18721

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c (.../tags/gcc_4_8_2_release)

18722

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c (.../branches/gcc-4_8-branch)

18723

@@ -0,0 +1,18 @@

18724

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

18725

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18726

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

18727

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18728

+/* { dg-options "-mcpu=power8 -O2" } */

18729

+/* { dg-final { scan-assembler "mtvsrd" } } */

18730

+/* { dg-final { scan-assembler "mfvsrd" } } */

18731

+/* { dg-final { scan-assembler "xscvdpspn" } } */

18732

+/* { dg-final { scan-assembler "xscvspdpn" } } */

18733

+

18734

+/* Check code generation for direct move for float types. */

18735

+

18736

+#define TYPE float

18737

+#define IS_FLOAT 1

18738

+#define NO_ALTIVEC 1

18739

+#define VSX_REG_ATTR "ww"

18740

+

18741

+#include "direct-move.h"

18742

Index: gcc/testsuite/gcc.target/powerpc/dfp-td-2.c

18743

===================================================================

18744

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-td-2.c (.../tags/gcc_4_8_2_release)

18745

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-td-2.c (.../branches/gcc-4_8-branch)

18746

@@ -0,0 +1,29 @@

18747

+/* Test generation of DFP instructions for POWER6. */

18748

+/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */

18749

+/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */

18750

+

18751

+/* { dg-final { scan-assembler-times "fneg" 1 } } */

18752

+/* { dg-final { scan-assembler-times "fabs" 1 } } */

18753

+/* { dg-final { scan-assembler-times "fnabs" 1 } } */

18754

+/* { dg-final { scan-assembler-times "fmr" 0 } } */

18755

+

18756

+/* These tests verify we only generate fneg, fabs and fnabs

18757

+ instructions and no fmr's since these are done in place. */

18758

+

18759

+_Decimal128

18760

+func1 (_Decimal128 a)

18761

+{

18762

+ return -a;

18763

+}

18764

+

18765

+_Decimal128

18766

+func2 (_Decimal128 a)

18767

+{

18768

+ return __builtin_fabsd128 (a);

18769

+}

18770

+

18771

+_Decimal128

18772

+func3 (_Decimal128 a)

18773

+{

18774

+ return - __builtin_fabsd128 (a);

18775

+}

18776

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c

18777

===================================================================

18778

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c (.../tags/gcc_4_8_2_release)

18779

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c (.../branches/gcc-4_8-branch)

18780

@@ -0,0 +1,105 @@

18781

+/* { dg-do compile { target { powerpc*-*-* } } } */

18782

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18783

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18784

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

18785

+

18786

+#include <altivec.h>

18787

+

18788

+#ifndef SIZE

18789

+#define SIZE 1024

18790

+#endif

18791

+

18792

+#ifndef ALIGN

18793

+#define ALIGN 32

18794

+#endif

18795

+

18796

+#ifndef ATTR_ALIGN

18797

+#define ATTR_ALIGN __attribute__((__aligned__(ALIGN)))

18798

+#endif

18799

+

18800

+#define DOIT(TYPE, PREFIX) \

18801

+TYPE PREFIX ## _eqv_builtin (TYPE a, TYPE b) \

18802

+{ \

18803

+ return vec_eqv (a, b); \

18804

+} \

18805

+ \

18806

+TYPE PREFIX ## _eqv_arith (TYPE a, TYPE b) \

18807

+{ \

18808

+ return ~(a ^ b); \

18809

+} \

18810

+ \

18811

+TYPE PREFIX ## _nand_builtin (TYPE a, TYPE b) \

18812

+{ \

18813

+ return vec_nand (a, b); \

18814

+} \

18815

+ \

18816

+TYPE PREFIX ## _nand_arith1 (TYPE a, TYPE b) \

18817

+{ \

18818

+ return ~(a & b); \

18819

+} \

18820

+ \

18821

+TYPE PREFIX ## _nand_arith2 (TYPE a, TYPE b) \

18822

+{ \

18823

+ return (~a) | (~b); \

18824

+} \

18825

+ \

18826

+TYPE PREFIX ## _orc_builtin (TYPE a, TYPE b) \

18827

+{ \

18828

+ return vec_orc (a, b); \

18829

+} \

18830

+ \

18831

+TYPE PREFIX ## _orc_arith1 (TYPE a, TYPE b) \

18832

+{ \

18833

+ return (~ a) | b; \

18834

+} \

18835

+ \

18836

+TYPE PREFIX ## _orc_arith2 (TYPE a, TYPE b) \

18837

+{ \

18838

+ return a | (~ b); \

18839

+}

18840

+

18841

+#define DOIT_FLOAT(TYPE, PREFIX) \

18842

+TYPE PREFIX ## _eqv_builtin (TYPE a, TYPE b) \

18843

+{ \

18844

+ return vec_eqv (a, b); \

18845

+} \

18846

+ \

18847

+TYPE PREFIX ## _nand_builtin (TYPE a, TYPE b) \

18848

+{ \

18849

+ return vec_nand (a, b); \

18850

+} \

18851

+ \

18852

+TYPE PREFIX ## _orc_builtin (TYPE a, TYPE b) \

18853

+{ \

18854

+ return vec_orc (a, b); \

18855

+}

18856

+

18857

+typedef vector signed char sign_char_vec;

18858

+typedef vector short sign_short_vec;

18859

+typedef vector int sign_int_vec;

18860

+typedef vector long long sign_llong_vec;

18861

+

18862

+typedef vector unsigned char uns_char_vec;

18863

+typedef vector unsigned short uns_short_vec;

18864

+typedef vector unsigned int uns_int_vec;

18865

+typedef vector unsigned long long uns_llong_vec;

18866

+

18867

+typedef vector float float_vec;

18868

+typedef vector double double_vec;

18869

+

18870

+DOIT(sign_char_vec, sign_char)

18871

+DOIT(sign_short_vec, sign_short)

18872

+DOIT(sign_int_vec, sign_int)

18873

+DOIT(sign_llong_vec, sign_llong)

18874

+

18875

+DOIT(uns_char_vec, uns_char)

18876

+DOIT(uns_short_vec, uns_short)

18877

+DOIT(uns_int_vec, uns_int)

18878

+DOIT(uns_llong_vec, uns_llong)

18879

+

18880

+DOIT_FLOAT(float_vec, float)

18881

+DOIT_FLOAT(double_vec, double)

18882

+

18883

+/* { dg-final { scan-assembler-times "xxleqv" 18 } } */

18884

+/* { dg-final { scan-assembler-times "xxlnand" 26 } } */

18885

+/* { dg-final { scan-assembler-times "xxlorc" 26 } } */

18886

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c

18887

===================================================================

18888

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c (.../tags/gcc_4_8_2_release)

18889

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c (.../branches/gcc-4_8-branch)

18890

@@ -0,0 +1,87 @@

18891

+/* { dg-do compile { target { powerpc*-*-* } } } */

18892

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18893

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18894

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

18895

+

18896

+#ifndef SIZE

18897

+#define SIZE 1024

18898

+#endif

18899

+

18900

+#ifndef ALIGN

18901

+#define ALIGN 32

18902

+#endif

18903

+

18904

+#ifndef ATTR_ALIGN

18905

+#define ATTR_ALIGN __attribute__((__aligned__(ALIGN)))

18906

+#endif

18907

+

18908

+#ifndef TYPE

18909

+#define TYPE unsigned int

18910

+#endif

18911

+

18912

+TYPE in1 [SIZE] ATTR_ALIGN;

18913

+TYPE in2 [SIZE] ATTR_ALIGN;

18914

+TYPE eqv [SIZE] ATTR_ALIGN;

18915

+TYPE nand1[SIZE] ATTR_ALIGN;

18916

+TYPE nand2[SIZE] ATTR_ALIGN;

18917

+TYPE orc1 [SIZE] ATTR_ALIGN;

18918

+TYPE orc2 [SIZE] ATTR_ALIGN;

18919

+

18920

+void

18921

+do_eqv (void)

18922

+{

18923

+ unsigned long i;

18924

+

18925

+ for (i = 0; i < SIZE; i++)

18926

+ {

18927

+ eqv[i] = ~(in1[i] ^ in2[i]);

18928

+ }

18929

+}

18930

+

18931

+void

18932

+do_nand1 (void)

18933

+{

18934

+ unsigned long i;

18935

+

18936

+ for (i = 0; i < SIZE; i++)

18937

+ {

18938

+ nand1[i] = ~(in1[i] & in2[i]);

18939

+ }

18940

+}

18941

+

18942

+void

18943

+do_nand2 (void)

18944

+{

18945

+ unsigned long i;

18946

+

18947

+ for (i = 0; i < SIZE; i++)

18948

+ {

18949

+ nand2[i] = (~in1[i]) | (~in2[i]);

18950

+ }

18951

+}

18952

+

18953

+void

18954

+do_orc1 (void)

18955

+{

18956

+ unsigned long i;

18957

+

18958

+ for (i = 0; i < SIZE; i++)

18959

+ {

18960

+ orc1[i] = (~in1[i]) | in2[i];

18961

+ }

18962

+}

18963

+

18964

+void

18965

+do_orc2 (void)

18966

+{

18967

+ unsigned long i;

18968

+

18969

+ for (i = 0; i < SIZE; i++)

18970

+ {

18971

+ orc1[i] = in1[i] | (~in2[i]);

18972

+ }

18973

+}

18974

+

18975

+/* { dg-final { scan-assembler-times "xxleqv" 1 } } */

18976

+/* { dg-final { scan-assembler-times "xxlnand" 2 } } */

18977

+/* { dg-final { scan-assembler-times "xxlorc" 2 } } */

18978

Index: gcc/testsuite/gcc.target/powerpc/pr57949-2.c

18979

===================================================================

18980

--- a/src/gcc/testsuite/gcc.target/powerpc/pr57949-2.c (.../tags/gcc_4_8_2_release)

18981

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr57949-2.c (.../branches/gcc-4_8-branch)

18982

@@ -0,0 +1,20 @@

18983

+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */

18984

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18985

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

18986

+/* { dg-options "-O2 -mcpu=power7" } */

18987

+

18988

+/* Verify that vs is not 16-byte aligned in the absence of -mno-compat-align-parm. */

18989

+

18990

+typedef float v4sf __attribute__ ((vector_size (16)));

18991

+struct s { long m; v4sf v; };

18992

+long n;

18993

+v4sf ve;

18994

+

18995

+void pr57949 (long d1, long d2, long d3, long d4, long d5, long d6,

18996

+ long d7, long d8, long d9, struct s vs) {

18997

+ n = vs.m;

18998

+ ve = vs.v;

18999

+}

19000

+

19001

+/* { dg-final { scan-assembler "ld .\*,136\$1\$" } } */

19002

+/* { dg-final { scan-assembler "ld .\*,120\$1\$" } } */

19003

Index: gcc/testsuite/gcc.target/powerpc/recip-5.c

19004

===================================================================

19005

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-5.c (.../tags/gcc_4_8_2_release)

19006

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-5.c (.../branches/gcc-4_8-branch)

19007

@@ -4,8 +4,16 @@

19008

/* { dg-options "-O3 -ftree-vectorize -mrecip=all -ffast-math -mcpu=power7 -fno-unroll-loops" } */

19009

/* { dg-final { scan-assembler-times "xvredp" 4 } } */

19010

/* { dg-final { scan-assembler-times "xvresp" 5 } } */

19011

-/* { dg-final { scan-assembler-times "xsredp" 2 } } */

19012

-/* { dg-final { scan-assembler-times "fres" 2 } } */

19013

+/* { dg-final { scan-assembler-times "xsredp\|fre\ " 2 } } */

19014

+/* { dg-final { scan-assembler-times "xsresp\|fres" 2 } } */

19015

+/* { dg-final { scan-assembler-times "xsmulsp\|fmuls" 2 } } */

19016

+/* { dg-final { scan-assembler-times "xsnmsub.sp\|fnmsubs" 2 } } */

19017

+/* { dg-final { scan-assembler-times "xsmuldp\|fmul\ " 2 } } */

19018

+/* { dg-final { scan-assembler-times "xsnmsub.dp\|fnmsub\ " 4 } } */

19019

+/* { dg-final { scan-assembler-times "xvmulsp" 7 } } */

19020

+/* { dg-final { scan-assembler-times "xvnmsub.sp" 5 } } */

19021

+/* { dg-final { scan-assembler-times "xvmuldp" 6 } } */

19022

+/* { dg-final { scan-assembler-times "xvnmsub.dp" 8 } } */

19023

19024

#include <altivec.h>

19025

19026

Index: gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c

19027

===================================================================

19028

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c (.../tags/gcc_4_8_2_release)

19029

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c (.../branches/gcc-4_8-branch)

19030

@@ -89,8 +89,10 @@

19031

long a1;

19032

long a2;

19033

long a3;

19034

+#if _CALL_ELF != 2

19035

long a4;

19036

long a5;

19037

+#endif

19038

parm_t slot[100];

19039

} stack_frame_t;

19040

19041

Index: gcc/testsuite/gcc.target/powerpc/direct-move-float2.c

19042

===================================================================

19043

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c (.../tags/gcc_4_8_2_release)

19044

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c (.../branches/gcc-4_8-branch)

19045

@@ -0,0 +1,15 @@

19046

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

19047

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19048

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19049

+/* { dg-require-effective-target p8vector_hw } */

19050

+/* { dg-options "-mcpu=power8 -O2" } */

19051

+

19052

+/* Check whether we get the right bits for direct move at runtime. */

19053

+

19054

+#define TYPE float

19055

+#define IS_FLOAT 1

19056

+#define NO_ALTIVEC 1

19057

+#define DO_MAIN

19058

+#define VSX_REG_ATTR "ww"

19059

+

19060

+#include "direct-move.h"

19061

Index: gcc/testsuite/gcc.target/powerpc/direct-move-double1.c

19062

===================================================================

19063

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c (.../tags/gcc_4_8_2_release)

19064

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c (.../branches/gcc-4_8-branch)

19065

@@ -0,0 +1,16 @@

19066

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

19067

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19068

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19069

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19070

+/* { dg-options "-mcpu=power8 -O2" } */

19071

+/* { dg-final { scan-assembler "mtvsrd" } } */

19072

+/* { dg-final { scan-assembler "mfvsrd" } } */

19073

+

19074

+/* Check code generation for direct move for double types. */

19075

+

19076

+#define TYPE double

19077

+#define IS_FLOAT 1

19078

+#define NO_ALTIVEC 1

19079

+#define VSX_REG_ATTR "ws"

19080

+

19081

+#include "direct-move.h"

19082

Index: gcc/testsuite/gcc.target/powerpc/dfp-td-3.c

19083

===================================================================

19084

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-td-3.c (.../tags/gcc_4_8_2_release)

19085

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-td-3.c (.../branches/gcc-4_8-branch)

19086

@@ -0,0 +1,29 @@

19087

+/* Test generation of DFP instructions for POWER6. */

19088

+/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */

19089

+/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */

19090

+

19091

+/* { dg-final { scan-assembler-times "fneg" 1 } } */

19092

+/* { dg-final { scan-assembler-times "fabs" 1 } } */

19093

+/* { dg-final { scan-assembler-times "fnabs" 1 } } */

19094

+/* { dg-final { scan-assembler-times "fmr" 3 } } */

19095

+

19096

+/* These tests verify we generate fneg, fabs and fnabs and

19097

+ associated fmr's since these are not done in place. */

19098

+

19099

+_Decimal128

19100

+func1 (_Decimal128 a, _Decimal128 b)

19101

+{

19102

+ return -b;

19103

+}

19104

+

19105

+_Decimal128

19106

+func2 (_Decimal128 a, _Decimal128 b)

19107

+{

19108

+ return __builtin_fabsd128 (b);

19109

+}

19110

+

19111

+_Decimal128

19112

+func3 (_Decimal128 a, _Decimal128 b)

19113

+{

19114

+ return - __builtin_fabsd128 (b);

19115

+}

19116

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c

19117

===================================================================

19118

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c (.../tags/gcc_4_8_2_release)

19119

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c (.../branches/gcc-4_8-branch)

19120

@@ -0,0 +1,10 @@

19121

+/* { dg-do compile { target { powerpc*-*-* } } } */

19122

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19123

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19124

+/* { dg-options "-mcpu=power8 -O2" } */

19125

+

19126

+vector float dbl_to_float_p8 (double x) { return __builtin_vsx_xscvdpspn (x); }

19127

+double float_to_dbl_p8 (vector float x) { return __builtin_vsx_xscvspdpn (x); }

19128

+

19129

+/* { dg-final { scan-assembler "xscvdpspn" } } */

19130

+/* { dg-final { scan-assembler "xscvspdpn" } } */

19131

Index: gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c

19132

===================================================================

19133

--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c (.../tags/gcc_4_8_2_release)

19134

+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c (.../branches/gcc-4_8-branch)

19135

@@ -16,9 +16,9 @@

19136

/* { dg-final { scan-assembler "xvrspiz" } } */

19137

/* { dg-final { scan-assembler "xsrdpi" } } */

19138

/* { dg-final { scan-assembler "xsrdpic" } } */

19139

-/* { dg-final { scan-assembler "xsrdpim" } } */

19140

-/* { dg-final { scan-assembler "xsrdpip" } } */

19141

-/* { dg-final { scan-assembler "xsrdpiz" } } */

19142

+/* { dg-final { scan-assembler "xsrdpim\|frim" } } */

19143

+/* { dg-final { scan-assembler "xsrdpip\|frip" } } */

19144

+/* { dg-final { scan-assembler "xsrdpiz\|friz" } } */

19145

/* { dg-final { scan-assembler "xsmaxdp" } } */

19146

/* { dg-final { scan-assembler "xsmindp" } } */

19147

/* { dg-final { scan-assembler "xxland" } } */

19148

Index: gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c

19149

===================================================================

19150

--- a/src/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c (.../tags/gcc_4_8_2_release)

19151

+++ b/src/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c (.../branches/gcc-4_8-branch)

19152

@@ -0,0 +1,51 @@

19153

+/* { dg-do compile { target { powerpc*-*-* } } } */

19154

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19155

+/* { dg-require-effective-target powerpc_htm_ok } */

19156

+/* { dg-options "-O2 -mhtm" } */

19157

+

19158

+/* { dg-final { scan-assembler-times "tbegin\\." 1 } } */

19159

+/* { dg-final { scan-assembler-times "tend\\." 2 } } */

19160

+/* { dg-final { scan-assembler-times "tabort\\." 2 } } */

19161

+/* { dg-final { scan-assembler-times "tabortdc\\." 1 } } */

19162

+/* { dg-final { scan-assembler-times "tabortdci\\." 1 } } */

19163

+/* { dg-final { scan-assembler-times "tabortwc\\." 1 } } */

19164

+/* { dg-final { scan-assembler-times "tabortwci\\." 2 } } */

19165

+/* { dg-final { scan-assembler-times "tcheck\\." 1 } } */

19166

+/* { dg-final { scan-assembler-times "trechkpt\\." 1 } } */

19167

+/* { dg-final { scan-assembler-times "treclaim\\." 1 } } */

19168

+/* { dg-final { scan-assembler-times "tsr\\." 3 } } */

19169

+/* { dg-final { scan-assembler-times "mfspr" 4 } } */

19170

+/* { dg-final { scan-assembler-times "mtspr" 4 } } */

19171

+

19172

+void use_builtins (long *p, char code, long *a, long *b)

19173

+{

19174

+ p[0] = __builtin_tbegin (0);

19175

+ p[1] = __builtin_tend (0);

19176

+ p[2] = __builtin_tendall ();

19177

+ p[3] = __builtin_tabort (0);

19178

+ p[4] = __builtin_tabort (code);

19179

+

19180

+ p[5] = __builtin_tabortdc (0xf, a[5], b[5]);

19181

+ p[6] = __builtin_tabortdci (0xf, a[6], 13);

19182

+ p[7] = __builtin_tabortwc (0xf, a[7], b[7]);

19183

+ p[8] = __builtin_tabortwci (0xf, a[8], 13);

19184

+

19185

+ p[9] = __builtin_tcheck (5);

19186

+ p[10] = __builtin_trechkpt ();

19187

+ p[11] = __builtin_treclaim (0);

19188

+ p[12] = __builtin_tresume ();

19189

+ p[13] = __builtin_tsuspend ();

19190

+ p[14] = __builtin_tsr (0);

19191

+ p[15] = __builtin_ttest (); /* This expands to a tabortwci. */

19192

+

19193

+

19194

+ p[16] = __builtin_get_texasr ();

19195

+ p[17] = __builtin_get_texasru ();

19196

+ p[18] = __builtin_get_tfhar ();

19197

+ p[19] = __builtin_get_tfiar ();

19198

+

19199

+ __builtin_set_texasr (a[20]);

19200

+ __builtin_set_texasru (a[21]);

19201

+ __builtin_set_tfhar (a[22]);

19202

+ __builtin_set_tfiar (a[23]);

19203

+}

19204

Index: gcc/testsuite/gcc.target/powerpc/bool.c

19205

===================================================================

19206

--- a/src/gcc/testsuite/gcc.target/powerpc/bool.c (.../tags/gcc_4_8_2_release)

19207

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool.c (.../branches/gcc-4_8-branch)

19208

@@ -0,0 +1,14 @@

19209

+/* { dg-do compile { target { powerpc*-*-* } } } */

19210

+/* { dg-options "-O2" } */

19211

+/* { dg-final { scan-assembler "eqv" } } */

19212

+/* { dg-final { scan-assembler "nand" } } */

19213

+/* { dg-final { scan-assembler "nor" } } */

19214

+

19215

+#ifndef TYPE

19216

+#define TYPE unsigned long

19217

+#endif

19218

+

19219

+TYPE op1 (TYPE a, TYPE b) { return ~(a ^ b); } /* eqv */

19220

+TYPE op2 (TYPE a, TYPE b) { return ~(a & b); } /* nand */

19221

+TYPE op3 (TYPE a, TYPE b) { return ~(a | b); } /* nor */

19222

+

19223

Index: gcc/testsuite/gcc.target/powerpc/bool2-p5.c

19224

===================================================================

19225

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-p5.c (.../tags/gcc_4_8_2_release)

19226

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-p5.c (.../branches/gcc-4_8-branch)

19227

@@ -0,0 +1,32 @@

19228

+/* { dg-do compile { target { powerpc*-*-* } } } */

19229

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19230

+/* { dg-require-effective-target powerpc_altivec_ok } */

19231

+/* { dg-options "-O2 -mcpu=power5 -mabi=altivec -mno-altivec -mno-vsx" } */

19232

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

19233

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

19234

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

19235

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

19236

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

19237

+/* { dg-final { scan-assembler "\[ \t\]eqv " } } */

19238

+/* { dg-final { scan-assembler "\[ \t\]orc " } } */

19239

+/* { dg-final { scan-assembler "\[ \t\]nand " } } */

19240

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

19241

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

19242

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

19243

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

19244

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

19245

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

19246

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

19247

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

19248

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

19249

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

19250

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

19251

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

19252

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

19253

+

19254

+#ifndef TYPE

19255

+typedef int v4si __attribute__ ((vector_size (16)));

19256

+#define TYPE v4si

19257

+#endif

19258

+

19259

+#include "bool2.h"

19260

Index: gcc/testsuite/gcc.target/powerpc/fusion.c

19261

===================================================================

19262

--- a/src/gcc/testsuite/gcc.target/powerpc/fusion.c (.../tags/gcc_4_8_2_release)

19263

+++ b/src/gcc/testsuite/gcc.target/powerpc/fusion.c (.../branches/gcc-4_8-branch)

19264

@@ -0,0 +1,24 @@

19265

+/* { dg-do compile { target { powerpc*-*-* } } } */

19266

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19267

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

19268

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19269

+/* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */

19270

+

19271

+#define LARGE 0x12345

19272

+

19273

+int fusion_uchar (unsigned char *p){ return p[LARGE]; }

19274

+int fusion_schar (signed char *p){ return p[LARGE]; }

19275

+int fusion_ushort (unsigned short *p){ return p[LARGE]; }

19276

+int fusion_short (short *p){ return p[LARGE]; }

19277

+int fusion_int (int *p){ return p[LARGE]; }

19278

+unsigned fusion_uns (unsigned *p){ return p[LARGE]; }

19279

+

19280

+vector double fusion_vector (vector double *p) { return p[2]; }

19281

+

19282

+/* { dg-final { scan-assembler-times "gpr load fusion" 6 } } */

19283

+/* { dg-final { scan-assembler-times "vector load fusion" 1 } } */

19284

+/* { dg-final { scan-assembler-times "lbz" 2 } } */

19285

+/* { dg-final { scan-assembler-times "extsb" 1 } } */

19286

+/* { dg-final { scan-assembler-times "lhz" 2 } } */

19287

+/* { dg-final { scan-assembler-times "extsh" 1 } } */

19288

+/* { dg-final { scan-assembler-times "lwz" 2 } } */

19289

Index: gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c

19290

===================================================================

19291

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c (.../tags/gcc_4_8_2_release)

19292

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c (.../branches/gcc-4_8-branch)

19293

@@ -107,8 +107,10 @@

19294

long a1;

19295

long a2;

19296

long a3;

19297

+#if _CALL_ELF != 2

19298

long a4;

19299

long a5;

19300

+#endif

19301

parm_t slot[100];

19302

} stack_frame_t;

19303

19304

@@ -119,6 +121,12 @@

19305

vector int v;

19306

} vector_int_t;

19307

19308

+#ifdef __LITTLE_ENDIAN__

19309

+#define MAKE_SLOT(x, y) ((long)x | ((long)y << 32))

19310

+#else

19311

+#define MAKE_SLOT(x, y) ((long)y | ((long)x << 32))

19312

+#endif

19313

+

19314

/* Paramter passing.

19315

s : gpr 3

19316

v : vpr 2

19317

@@ -226,8 +234,8 @@

19318

sp = __builtin_frame_address(0);

19319

sp = sp->backchain;

19320

19321

- if (sp->slot[2].l != 0x100000002ULL

19322

- || sp->slot[4].l != 0x500000006ULL)

19323

+ if (sp->slot[2].l != MAKE_SLOT (1, 2)

19324

+ || sp->slot[4].l != MAKE_SLOT (5, 6))

19325

abort();

19326

}

19327

19328

@@ -268,8 +276,8 @@

19329

sp = __builtin_frame_address(0);

19330

sp = sp->backchain;

19331

19332

- if (sp->slot[4].l != 0x100000002ULL

19333

- || sp->slot[6].l != 0x500000006ULL)

19334

+ if (sp->slot[4].l != MAKE_SLOT (1, 2)

19335

+ || sp->slot[6].l != MAKE_SLOT (5, 6))

19336

abort();

19337

}

19338

19339

@@ -296,8 +304,8 @@

19340

sp = __builtin_frame_address(0);

19341

sp = sp->backchain;

19342

19343

- if (sp->slot[4].l != 0x100000002ULL

19344

- || sp->slot[6].l != 0x500000006ULL)

19345

+ if (sp->slot[4].l != MAKE_SLOT (1, 2)

19346

+ || sp->slot[6].l != MAKE_SLOT (5, 6))

19347

abort();

19348

}

19349

19350

Index: gcc/testsuite/gcc.target/powerpc/direct-move-long1.c

19351

===================================================================

19352

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c (.../tags/gcc_4_8_2_release)

19353

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c (.../branches/gcc-4_8-branch)

19354

@@ -0,0 +1,16 @@

19355

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

19356

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19357

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19358

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19359

+/* { dg-options "-mcpu=power8 -O2" } */

19360

+/* { dg-final { scan-assembler "mtvsrd" } } */

19361

+/* { dg-final { scan-assembler "mfvsrd" } } */

19362

+

19363

+/* Check code generation for direct move for long types. */

19364

+

19365

+#define TYPE long

19366

+#define IS_INT 1

19367

+#define NO_ALTIVEC 1

19368

+#define VSX_REG_ATTR "d"

19369

+

19370

+#include "direct-move.h"

19371

Index: gcc/testsuite/gcc.target/powerpc/direct-move-double2.c

19372

===================================================================

19373

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c (.../tags/gcc_4_8_2_release)

19374

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c (.../branches/gcc-4_8-branch)

19375

@@ -0,0 +1,15 @@

19376

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

19377

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19378

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19379

+/* { dg-require-effective-target p8vector_hw } */

19380

+/* { dg-options "-mcpu=power8 -O2" } */

19381

+

19382

+/* Check whether we get the right bits for direct move at runtime. */

19383

+

19384

+#define TYPE double

19385

+#define IS_FLOAT 1

19386

+#define NO_ALTIVEC 1

19387

+#define DO_MAIN

19388

+#define VSX_REG_ATTR "ws"

19389

+

19390

+#include "direct-move.h"

19391

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c

19392

===================================================================

19393

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c (.../tags/gcc_4_8_2_release)

19394

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c (.../branches/gcc-4_8-branch)

19395

@@ -0,0 +1,32 @@

19396

+/* { dg-do compile { target { powerpc*-*-* } } } */

19397

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19398

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19399

+/* { dg-options "-mcpu=power8 -O2" } */

19400

+

19401

+#include <altivec.h>

19402

+

19403

+typedef vector int v_sign;

19404

+typedef vector unsigned int v_uns;

19405

+

19406

+v_sign even_sign (v_sign a, v_sign b)

19407

+{

19408

+ return vec_vmrgew (a, b);

19409

+}

19410

+

19411

+v_uns even_uns (v_uns a, v_uns b)

19412

+{

19413

+ return vec_vmrgew (a, b);

19414

+}

19415

+

19416

+v_sign odd_sign (v_sign a, v_sign b)

19417

+{

19418

+ return vec_vmrgow (a, b);

19419

+}

19420

+

19421

+v_uns odd_uns (v_uns a, v_uns b)

19422

+{

19423

+ return vec_vmrgow (a, b);

19424

+}

19425

+

19426

+/* { dg-final { scan-assembler-times "vmrgew" 2 } } */

19427

+/* { dg-final { scan-assembler-times "vmrgow" 2 } } */

19428

Index: gcc/testsuite/gcc.target/powerpc/bool2.h

19429

===================================================================

19430

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2.h (.../tags/gcc_4_8_2_release)

19431

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2.h (.../branches/gcc-4_8-branch)

19432

@@ -0,0 +1,29 @@

19433

+/* Test various logical operations. */

19434

+

19435

+TYPE arg1 (TYPE p, TYPE q) { return p & q; } /* AND */

19436

+TYPE arg2 (TYPE p, TYPE q) { return p | q; } /* OR */

19437

+TYPE arg3 (TYPE p, TYPE q) { return p ^ q; } /* XOR */

19438

+TYPE arg4 (TYPE p) { return ~ p; } /* NOR */

19439

+TYPE arg5 (TYPE p, TYPE q) { return ~(p & q); } /* NAND */

19440

+TYPE arg6 (TYPE p, TYPE q) { return ~(p | q); } /* NOR */

19441

+TYPE arg7 (TYPE p, TYPE q) { return ~(p ^ q); } /* EQV */

19442

+TYPE arg8 (TYPE p, TYPE q) { return (~p) & q; } /* ANDC */

19443

+TYPE arg9 (TYPE p, TYPE q) { return (~p) | q; } /* ORC */

19444

+TYPE arg10(TYPE p, TYPE q) { return (~p) ^ q; } /* EQV */

19445

+TYPE arg11(TYPE p, TYPE q) { return p & (~q); } /* ANDC */

19446

+TYPE arg12(TYPE p, TYPE q) { return p | (~q); } /* ORC */

19447

+TYPE arg13(TYPE p, TYPE q) { return p ^ (~q); } /* EQV */

19448

+

19449

+void ptr1 (TYPE *p) { p[0] = p[1] & p[2]; } /* AND */

19450

+void ptr2 (TYPE *p) { p[0] = p[1] | p[2]; } /* OR */

19451

+void ptr3 (TYPE *p) { p[0] = p[1] ^ p[2]; } /* XOR */

19452

+void ptr4 (TYPE *p) { p[0] = ~p[1]; } /* NOR */

19453

+void ptr5 (TYPE *p) { p[0] = ~(p[1] & p[2]); } /* NAND */

19454

+void ptr6 (TYPE *p) { p[0] = ~(p[1] | p[2]); } /* NOR */

19455

+void ptr7 (TYPE *p) { p[0] = ~(p[1] ^ p[2]); } /* EQV */

19456

+void ptr8 (TYPE *p) { p[0] = ~(p[1]) & p[2]; } /* ANDC */

19457

+void ptr9 (TYPE *p) { p[0] = (~p[1]) | p[2]; } /* ORC */

19458

+void ptr10(TYPE *p) { p[0] = (~p[1]) ^ p[2]; } /* EQV */

19459

+void ptr11(TYPE *p) { p[0] = p[1] & (~p[2]); } /* ANDC */

19460

+void ptr12(TYPE *p) { p[0] = p[1] | (~p[2]); } /* ORC */

19461

+void ptr13(TYPE *p) { p[0] = p[1] ^ (~p[2]); } /* EQV */

19462

Index: gcc/testsuite/gcc.target/powerpc/pr48258-1.c

19463

===================================================================

19464

--- a/src/gcc/testsuite/gcc.target/powerpc/pr48258-1.c (.../tags/gcc_4_8_2_release)

19465

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr48258-1.c (.../branches/gcc-4_8-branch)

19466

@@ -1,5 +1,6 @@

19467

/* { dg-do compile } */

19468

/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19469

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

19470

/* { dg-require-effective-target powerpc_vsx_ok } */

19471

/* { dg-options "-O3 -mcpu=power7 -mabi=altivec -ffast-math -fno-unroll-loops" } */

19472

/* { dg-final { scan-assembler-times "xvaddsp" 3 } } */

19473

Index: gcc/testsuite/gcc.target/powerpc/quad-atomic.c

19474

===================================================================

19475

--- a/src/gcc/testsuite/gcc.target/powerpc/quad-atomic.c (.../tags/gcc_4_8_2_release)

19476

+++ b/src/gcc/testsuite/gcc.target/powerpc/quad-atomic.c (.../branches/gcc-4_8-branch)

19477

@@ -0,0 +1,67 @@

19478

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

19479

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19480

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19481

+/* { dg-require-effective-target p8vector_hw } */

19482

+/* { dg-options "-mcpu=power8 -O2" } */

19483

+

19484

+/* Test whether we get the right bits for quad word atomic instructions. */

19485

+#include <stdlib.h>

19486

+

19487

+static __int128_t quad_fetch_and (__int128_t *, __int128_t value) __attribute__((__noinline__));

19488

+static __int128_t quad_fetch_or (__int128_t *, __int128_t value) __attribute__((__noinline__));

19489

+static __int128_t quad_fetch_add (__int128_t *, __int128_t value) __attribute__((__noinline__));

19490

+

19491

+static __int128_t

19492

+quad_fetch_and (__int128_t *ptr, __int128_t value)

19493

+{

19494

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

19495

+}

19496

+

19497

+static __int128_t

19498

+quad_fetch_or (__int128_t *ptr, __int128_t value)

19499

+{

19500

+ return __atomic_fetch_or (ptr, value, __ATOMIC_ACQUIRE);

19501

+}

19502

+

19503

+static __int128_t

19504

+quad_fetch_add (__int128_t *ptr, __int128_t value)

19505

+{

19506

+ return __atomic_fetch_add (ptr, value, __ATOMIC_ACQUIRE);

19507

+}

19508

+

19509

+int

19510

+main (void)

19511

+{

19512

+ __int128_t result;

19513

+ __int128_t value;

19514

+ __int128_t and_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL));

19515

+ __int128_t and_value = ((((__int128_t) 0xfffffffffffffff0ULL) << 64) | ((__int128_t) 0xfffffffffffffff0ULL));

19516

+ __int128_t and_exp = ((((__int128_t) 0x1234567890abcde0ULL) << 64) | ((__int128_t) 0xfedcba0987654320ULL));

19517

+

19518

+ __int128_t or_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL));

19519

+ __int128_t or_value = ((((__int128_t) 0x0000000000000010ULL) << 64) | ((__int128_t) 0x000000000000000eULL));

19520

+ __int128_t or_exp = ((((__int128_t) 0x1234567890abcdffULL) << 64) | ((__int128_t) 0xfedcba098765432fULL));

19521

+

19522

+ __int128_t add_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL));

19523

+ __int128_t add_value = ((((__int128_t) 0x0000000001000000ULL) << 64) | ((__int128_t) 0x0000001000000000ULL));

19524

+ __int128_t add_exp = ((((__int128_t) 0x1234567891abcdefULL) << 64) | ((__int128_t) 0xfedcba1987654321ULL));

19525

+

19526

+

19527

+ value = and_input;

19528

+ result = quad_fetch_and (&value, and_value);

19529

+ if (result != and_input || value != and_exp)

19530

+ abort ();

19531

+

19532

+ value = or_input;

19533

+ result = quad_fetch_or (&value, or_value);

19534

+ if (result != or_input || value != or_exp)

19535

+ abort ();

19536

+

19537

+ value = add_input;

19538

+ result = quad_fetch_add (&value, add_value);

19539

+ if (result != add_input || value != add_exp)

19540

+ abort ();

19541

+

19542

+ return 0;

19543

+}

19544

+

19545

Index: gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c

19546

===================================================================

19547

Index: gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c

19548

===================================================================

19549

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c (.../tags/gcc_4_8_2_release)

19550

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c (.../branches/gcc-4_8-branch)

19551

@@ -33,15 +33,27 @@

19552

19553

19554

/* Wrapper to save the GPRs and FPRs and then jump to the real function. */

19555

+#if _CALL_ELF != 2

19556

+#define FUNC_START(NAME) \

19557

+ "\t.globl\t" NAME "\n\t" \

19558

+ ".section \".opd\",\"aw\"\n\t" \

19559

+ ".align 3\n" \

19560

+ NAME ":\n\t" \

19561

+ ".quad .L." NAME ",.TOC.@tocbase,0\n\t" \

19562

+ ".text\n\t" \

19563

+ ".type " NAME ", @function\n" \

19564

+ ".L." NAME ":\n\t"

19565

+#else

19566

+#define FUNC_START(NAME) \

19567

+ "\t.globl\t" NAME "\n\t" \

19568

+ ".text\n\t" \

19569

+ NAME ":\n" \

19570

+ "0:\taddis 2,12,(.TOC.-0b)@ha\n\t" \

19571

+ "addi 2,2,(.TOC.-0b)@l\n\t" \

19572

+ ".localentry " NAME ",.-" NAME "\n\t"

19573

+#endif

19574

#define WRAPPER(NAME) \

19575

-__asm__ ("\t.globl\t" #NAME "_asm\n\t" \

19576

- ".section \".opd\",\"aw\"\n\t" \

19577

- ".align 3\n" \

19578

- #NAME "_asm:\n\t" \

19579

- ".quad .L." #NAME "_asm,.TOC.@tocbase,0\n\t" \

19580

- ".text\n\t" \

19581

- ".type " #NAME "_asm, @function\n" \

19582

- ".L." #NAME "_asm:\n\t" \

19583

+__asm__ (FUNC_START (#NAME "_asm") \

19584

"ld 11,gparms@got(2)\n\t" \

19585

"std 3,0(11)\n\t" \

19586

"std 4,8(11)\n\t" \

19587

@@ -75,8 +87,10 @@

19588

long a1;

19589

long a2;

19590

long a3;

19591

+#if _CALL_ELF != 2

19592

long a4;

19593

long a5;

19594

+#endif

19595

unsigned long slot[100];

19596

} stack_frame_t;

19597

19598

Index: gcc/testsuite/gcc.target/powerpc/direct-move-long2.c

19599

===================================================================

19600

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c (.../tags/gcc_4_8_2_release)

19601

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c (.../branches/gcc-4_8-branch)

19602

@@ -0,0 +1,15 @@

19603

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

19604

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19605

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19606

+/* { dg-require-effective-target p8vector_hw } */

19607

+/* { dg-options "-mcpu=power8 -O2" } */

19608

+

19609

+/* Check whether we get the right bits for direct move at runtime. */

19610

+

19611

+#define TYPE long

19612

+#define IS_INT 1

19613

+#define NO_ALTIVEC 1

19614

+#define DO_MAIN

19615

+#define VSX_REG_ATTR "d"

19616

+

19617

+#include "direct-move.h"

19618

Index: gcc/testsuite/gcc.target/powerpc/vsx-float0.c

19619

===================================================================

19620

--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-float0.c (.../tags/gcc_4_8_2_release)

19621

+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-float0.c (.../branches/gcc-4_8-branch)

19622

@@ -0,0 +1,16 @@

19623

+/* { dg-do compile { target { powerpc*-*-* } } } */

19624

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19625

+/* { dg-require-effective-target powerpc_vsx_ok } */

19626

+/* { dg-options "-O2 -mcpu=power7" } */

19627

+/* { dg-final { scan-assembler "xxlxor" } } */

19628

+

19629

+/* Test that we generate xxlor to clear a SFmode register. */

19630

+

19631

+float sum (float *p, unsigned long n)

19632

+{

19633

+ float sum = 0.0f; /* generate xxlxor instead of load */

19634

+ while (n-- > 0)

19635

+ sum += *p++;

19636

+

19637

+ return sum;

19638

+}

19639

Index: gcc/testsuite/gcc.target/powerpc/ppc-target-1.c

19640

===================================================================

19641

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c (.../tags/gcc_4_8_2_release)

19642

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c (.../branches/gcc-4_8-branch)

19643

@@ -5,8 +5,7 @@

19644

/* { dg-final { scan-assembler-times "fabs" 3 } } */

19645

/* { dg-final { scan-assembler-times "fnabs" 3 } } */

19646

/* { dg-final { scan-assembler-times "fsel" 3 } } */

19647

-/* { dg-final { scan-assembler-times "fcpsgn" 3 } } */

19648

-/* { dg-final { scan-assembler-times "xscpsgndp" 1 } } */

19649

+/* { dg-final { scan-assembler-times "fcpsgn\|xscpsgndp" 4 } } */

19650

19651

double normal1 (double, double);

19652

double power5 (double, double) __attribute__((__target__("cpu=power5")));

19653

Index: gcc/testsuite/gcc.target/powerpc/pr60137.c

19654

===================================================================

19655

--- a/src/gcc/testsuite/gcc.target/powerpc/pr60137.c (.../tags/gcc_4_8_2_release)

19656

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr60137.c (.../branches/gcc-4_8-branch)

19657

@@ -0,0 +1,17 @@

19658

+/* { dg-do compile { target { powerpc*-*-* } } } */

19659

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19660

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19661

+/* { dg-options "-mcpu=power8 -O3 -mno-vsx" } */

19662

+

19663

+/* target/60137, compiler got a 'could not split insn error'. */

19664

+

19665

+extern int target_flags;

19666

+extern char fixed_regs[53];

19667

+extern char call_used_regs[53];

19668

+

19669

+void init_reg_sets_1(void)

19670

+{

19671

+ int i;

19672

+ for (i = 0; i < 53; i++)

19673

+ fixed_regs[i] = call_used_regs[i] = (call_used_regs[i] &((target_flags & 0x02000000) ? 2 : 1)) != 0;

19674

+}

19675

Index: gcc/testsuite/gcc.target/powerpc/bool3.h

19676

===================================================================

19677

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3.h (.../tags/gcc_4_8_2_release)

19678

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3.h (.../branches/gcc-4_8-branch)

19679

@@ -0,0 +1,186 @@

19680

+/* Test forcing 128-bit logical types into GPR registers. */

19681

+

19682

+#if defined(NO_ASM)

19683

+#define FORCE_REG1(X)

19684

+#define FORCE_REG2(X,Y)

19685

+

19686

+#else

19687

+#if defined(USE_ALTIVEC)

19688

+#define REG_CLASS "+v"

19689

+#define PRINT_REG1 "# altivec reg %0"

19690

+#define PRINT_REG2 "# altivec reg %0, %1"

19691

+

19692

+#elif defined(USE_FPR)

19693

+#define REG_CLASS "+d"

19694

+#define PRINT_REG1 "# fpr reg %0"

19695

+#define PRINT_REG2 "# fpr reg %0, %1"

19696

+

19697

+#elif defined(USE_VSX)

19698

+#define REG_CLASS "+wa"

19699

+#define PRINT_REG1 "# vsx reg %x0"

19700

+#define PRINT_REG2 "# vsx reg %x0, %x1"

19701

+

19702

+#else

19703

+#define REG_CLASS "+r"

19704

+#define PRINT_REG1 "# gpr reg %0"

19705

+#define PRINT_REG2 "# gpr reg %0, %1"

19706

+#endif

19707

+

19708

+#define FORCE_REG1(X) __asm__ (PRINT_REG1 : REG_CLASS (X))

19709

+#define FORCE_REG2(X,Y) __asm__ (PRINT_REG2 : REG_CLASS (X), REG_CLASS (Y))

19710

+#endif

19711

+

19712

+void ptr1 (TYPE *p)

19713

+{

19714

+ TYPE a = p[1];

19715

+ TYPE b = p[2];

19716

+ TYPE c;

19717

+

19718

+ FORCE_REG2 (a, b);

19719

+ c = a & b; /* AND */

19720

+ FORCE_REG1 (c);

19721

+ p[0] = c;

19722

+}

19723

+

19724

+void ptr2 (TYPE *p)

19725

+{

19726

+ TYPE a = p[1];

19727

+ TYPE b = p[2];

19728

+ TYPE c;

19729

+

19730

+ FORCE_REG2 (a, b);

19731

+ c = a | b; /* OR */

19732

+ FORCE_REG1 (c);

19733

+ p[0] = c;

19734

+}

19735

+

19736

+void ptr3 (TYPE *p)

19737

+{

19738

+ TYPE a = p[1];

19739

+ TYPE b = p[2];

19740

+ TYPE c;

19741

+

19742

+ FORCE_REG2 (a, b);

19743

+ c = a ^ b; /* XOR */

19744

+ FORCE_REG1 (c);

19745

+ p[0] = c;

19746

+}

19747

+

19748

+void ptr4 (TYPE *p)

19749

+{

19750

+ TYPE a = p[1];

19751

+ TYPE b;

19752

+

19753

+ FORCE_REG1 (a);

19754

+ b = ~a; /* NOR */

19755

+ FORCE_REG1 (b);

19756

+ p[0] = b;

19757

+}

19758

+

19759

+void ptr5 (TYPE *p)

19760

+{

19761

+ TYPE a = p[1];

19762

+ TYPE b = p[2];

19763

+ TYPE c;

19764

+

19765

+ FORCE_REG2 (a, b);

19766

+ c = ~(a & b); /* NAND */

19767

+ FORCE_REG1 (c);

19768

+ p[0] = c;

19769

+}

19770

+

19771

+void ptr6 (TYPE *p)

19772

+{

19773

+ TYPE a = p[1];

19774

+ TYPE b = p[2];

19775

+ TYPE c;

19776

+

19777

+ FORCE_REG2 (a, b);

19778

+ c = ~(a | b); /* AND */

19779

+ FORCE_REG1 (c);

19780

+ p[0] = c;

19781

+}

19782

+

19783

+void ptr7 (TYPE *p)

19784

+{

19785

+ TYPE a = p[1];

19786

+ TYPE b = p[2];

19787

+ TYPE c;

19788

+

19789

+ FORCE_REG2 (a, b);

19790

+ c = ~(a ^ b); /* EQV */

19791

+ FORCE_REG1 (c);

19792

+ p[0] = c;

19793

+}

19794

+

19795

+void ptr8 (TYPE *p)

19796

+{

19797

+ TYPE a = p[1];

19798

+ TYPE b = p[2];

19799

+ TYPE c;

19800

+

19801

+ FORCE_REG2 (a, b);

19802

+ c = (~a) & b; /* ANDC */

19803

+ FORCE_REG1 (c);

19804

+ p[0] = c;

19805

+}

19806

+

19807

+void ptr9 (TYPE *p)

19808

+{

19809

+ TYPE a = p[1];

19810

+ TYPE b = p[2];

19811

+ TYPE c;

19812

+

19813

+ FORCE_REG2 (a, b);

19814

+ c = (~a) | b; /* ORC */

19815

+ FORCE_REG1 (c);

19816

+ p[0] = c;

19817

+}

19818

+

19819

+void ptr10 (TYPE *p)

19820

+{

19821

+ TYPE a = p[1];

19822

+ TYPE b = p[2];

19823

+ TYPE c;

19824

+

19825

+ FORCE_REG2 (a, b);

19826

+ c = (~a) ^ b; /* EQV */

19827

+ FORCE_REG1 (c);

19828

+ p[0] = c;

19829

+}

19830

+

19831

+void ptr11 (TYPE *p)

19832

+{

19833

+ TYPE a = p[1];

19834

+ TYPE b = p[2];

19835

+ TYPE c;

19836

+

19837

+ FORCE_REG2 (a, b);

19838

+ c = a & (~b); /* ANDC */

19839

+ FORCE_REG1 (c);

19840

+ p[0] = c;

19841

+}

19842

+

19843

+void ptr12 (TYPE *p)

19844

+{

19845

+ TYPE a = p[1];

19846

+ TYPE b = p[2];

19847

+ TYPE c;

19848

+

19849

+ FORCE_REG2 (a, b);

19850

+ c = a | (~b); /* ORC */

19851

+ FORCE_REG1 (c);

19852

+ p[0] = c;

19853

+}

19854

+

19855

+void ptr13 (TYPE *p)

19856

+{

19857

+ TYPE a = p[1];

19858

+ TYPE b = p[2];

19859

+ TYPE c;

19860

+

19861

+ FORCE_REG2 (a, b);

19862

+ c = a ^ (~b); /* AND */

19863

+ FORCE_REG1 (c);

19864

+ p[0] = c;

19865

+}

19866

Index: gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c

19867

===================================================================

19868

--- a/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c (.../tags/gcc_4_8_2_release)

19869

+++ b/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c (.../branches/gcc-4_8-branch)

19870

@@ -19,19 +19,6 @@

19871

return __builtin_shuffle(x, (V){ 4,5,6,7, 4,5,6,7, 4,5,6,7, 4,5,6,7, });

19872

}

19873

19874

-V p2(V x, V y)

19875

-{

19876

- return __builtin_shuffle(x, y,

19877

- (V){ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 });

19878

-

19879

-}

19880

-

19881

-V p4(V x, V y)

19882

-{

19883

- return __builtin_shuffle(x, y,

19884

- (V){ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 });

19885

-}

19886

-

19887

V h1(V x, V y)

19888

{

19889

return __builtin_shuffle(x, y,

19890

@@ -72,5 +59,3 @@

19891

/* { dg-final { scan-assembler "vspltb" } } */

19892

/* { dg-final { scan-assembler "vsplth" } } */

19893

/* { dg-final { scan-assembler "vspltw" } } */

19894

-/* { dg-final { scan-assembler "vpkuhum" } } */

19895

-/* { dg-final { scan-assembler "vpkuwum" } } */

19896

Index: gcc/testsuite/gcc.target/powerpc/bool2-p7.c

19897

===================================================================

19898

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-p7.c (.../tags/gcc_4_8_2_release)

19899

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-p7.c (.../branches/gcc-4_8-branch)

19900

@@ -0,0 +1,31 @@

19901

+/* { dg-do compile { target { powerpc*-*-* } } } */

19902

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19903

+/* { dg-require-effective-target powerpc_vsx_ok } */

19904

+/* { dg-options "-O2 -mcpu=power7" } */

19905

+/* { dg-final { scan-assembler-not "\[ \t\]and " } } */

19906

+/* { dg-final { scan-assembler-not "\[ \t\]or " } } */

19907

+/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */

19908

+/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */

19909

+/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */

19910

+/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */

19911

+/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */

19912

+/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */

19913

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

19914

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

19915

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

19916

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

19917

+/* { dg-final { scan-assembler "\[ \t\]xxland " } } */

19918

+/* { dg-final { scan-assembler "\[ \t\]xxlor " } } */

19919

+/* { dg-final { scan-assembler "\[ \t\]xxlxor " } } */

19920

+/* { dg-final { scan-assembler "\[ \t\]xxlnor " } } */

19921

+/* { dg-final { scan-assembler "\[ \t\]xxlandc " } } */

19922

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

19923

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

19924

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

19925

+

19926

+#ifndef TYPE

19927

+typedef int v4si __attribute__ ((vector_size (16)));

19928

+#define TYPE v4si

19929

+#endif

19930

+

19931

+#include "bool2.h"

19932

Index: gcc/testsuite/gcc.target/microblaze/others/mem_reload.c

19933

===================================================================

19934

--- a/src/gcc/testsuite/gcc.target/microblaze/others/mem_reload.c (.../tags/gcc_4_8_2_release)

19935

+++ b/src/gcc/testsuite/gcc.target/microblaze/others/mem_reload.c (.../branches/gcc-4_8-branch)

19936

@@ -0,0 +1,74 @@

19937

+/* { dg-options "-O2 -fPIC" } */

19938

+

19939

+typedef struct test_struct

19940

+{

19941

+ unsigned long long h[8];

19942

+ unsigned long long Nl,Nh;

19943

+ union {

19944

+ unsigned long long d[16];

19945

+ unsigned char p[(16*8)];

19946

+ } u;

19947

+ unsigned int num,md_len;

19948

+} TEST_STRUCT;

19949

+

19950

+static const unsigned long long K512[12] = {

19951

+ 0x428a2f98d728ae22,0x7137449123ef65cd,

19952

+ 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc,

19953

+ 0x3956c25bf348b538,0x59f111f1b605d019,

19954

+ 0x923f82a4af194f9b,0xab1c5ed5da6d8118,

19955

+ 0xd807aa98a3030242,0x12835b0145706fbe,

19956

+ 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2};

19957

+

19958

+#define ROTR(x,s) (((x)>>s) | (x)<<(64-s))

19959

+#define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))

19960

+#define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))

19961

+#define Ch(x,y,z) (((x) & (y)) ^ ((~(x)) & (z)))

19962

+#define Maj(x,y,z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))

19963

+

19964

+#define ROUND_00_15(i,a,b,c,d,e,f,g,h) do { \

19965

+ T1 += h + Sigma1(e) + Ch(e,f,g) + K512[i]; \

19966

+ h = Sigma0(a) + Maj(a,b,c); \

19967

+ d += T1; h += T1; } while (0)

19968

+

19969

+#define ROUND_16_80(i,a,b,c,d,e,f,g,h,X) do { \

19970

+ T1 = X[(i)&0x0f] += s0 + s1 + X[(i+9)&0x0f]; \

19971

+ ROUND_00_15(i,a,b,c,d,e,f,g,h); } while (0)

19972

+

19973

+static void testfunc1 (TEST_STRUCT *ctx, const void *in, unsigned int num)

19974

+{

19975

+ const unsigned long long *W=in;

19976

+ unsigned long long a,b,c,d,e,f,g,h,s0,s1,T1;

19977

+ unsigned long long X[16];

19978

+ int i;

19979

+

19980

+ while (num--) {

19981

+

19982

+ T1 = X[0] = W[0]; ROUND_00_15(0,a,b,c,d,e,f,g,h);

19983

+ T1 = X[1] = W[1]; ROUND_00_15(1,h,a,b,c,d,e,f,g);

19984

+ T1 = X[2] = W[2]; ROUND_00_15(2,g,h,a,b,c,d,e,f);

19985

+ T1 = X[3] = W[3]; ROUND_00_15(3,f,g,h,a,b,c,d,e);

19986

+ T1 = X[4] = W[4]; ROUND_00_15(4,e,f,g,h,a,b,c,d);

19987

+ T1 = X[5] = W[5]; ROUND_00_15(5,d,e,f,g,h,a,b,c);

19988

+ T1 = X[6] = W[6]; ROUND_00_15(6,c,d,e,f,g,h,a,b);

19989

+ T1 = X[7] = W[7]; ROUND_00_15(7,b,c,d,e,f,g,h,a);

19990

+ T1 = X[8] = W[8]; ROUND_00_15(8,a,b,c,d,e,f,g,h);

19991

+ T1 = X[9] = W[9]; ROUND_00_15(9,h,a,b,c,d,e,f,g);

19992

+

19993

+ for (i=16;i<80;i+=8)

19994

+ {

19995

+ ROUND_16_80(i+0,a,b,c,d,e,f,g,h,X);

19996

+ }

19997

+

19998

+ ctx->h[4] += e; ctx->h[5] += f; ctx->h[6] += g; ctx->h[7] += h;

19999

+ }

20000

+}

20001

+

20002

+int testfunc2 (TEST_STRUCT *c, const void *_data, unsigned int len)

20003

+{

20004

+ const unsigned char *data=(const unsigned char *)_data;

20005

+

20006

+ unsigned char *p=(unsigned char *)c->u.p;

20007

+

20008

+ testfunc1 (c,p,0);

20009

+ testfunc1 (c,data,len/sizeof(c->u));

20010

+}

20011

Index: gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c

20012

===================================================================

20013

--- a/src/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c (.../tags/gcc_4_8_2_release)

20014

+++ b/src/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c (.../branches/gcc-4_8-branch)

20015

@@ -0,0 +1,8 @@

20016

+/* { dg-do compile } */

20017

+

20018

+void trap ()

20019

+{

20020

+ __builtin_trap ();

20021

+}

20022

+

20023

+/* { dg-final { scan-assembler "brki\tr0,-1" } } */

20024

\ No newline at end of file

20025

Index: gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c

20026

===================================================================

20027

--- a/src/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c (.../tags/gcc_4_8_2_release)

20028

+++ b/src/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c (.../branches/gcc-4_8-branch)

20029

@@ -0,0 +1,9 @@

20030

+/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */

20031

+

20032

+void float_func(float f1, float f2, float f3)

20033

+{

20034

+ /* { dg-final { scan-assembler "fcmp\.eq\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */

20035

+ /* { dg-final { scan-assembler "fcmp\.le\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */

20036

+ if(f1==f2 && f1<=f3)

20037

+ print ("f1 eq f2 && f1 le f3");

20038

+}

20039

Index: gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c

20040

===================================================================

20041

--- a/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (.../tags/gcc_4_8_2_release)

20042

+++ b/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (.../branches/gcc-4_8-branch)

20043

@@ -1,8 +1,14 @@

20044

/* { dg-do compile } */

20045

/* { dg-options "-O2" } */

20046

20047

-#include "../../../config/aarch64/arm_neon.h"

20048

+#include <arm_neon.h>

20049

20050

+/* Used to force a variable to a SIMD register. */

20051

+#define force_simd(V1) asm volatile ("mov %d0, %1.d[0]" \

20052

+ : "=w"(V1) \

20053

+ : "w"(V1) \

20054

+ : /* No clobbers */);

20055

+

20056

/* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */

20057

20058

uint64x1_t

20059

@@ -31,7 +37,12 @@

20060

uint64x1_t

20061

test_vceqd_s64 (int64x1_t a, int64x1_t b)

20062

{

20063

- return vceqd_s64 (a, b);

20064

+ uint64x1_t res;

20065

+ force_simd (a);

20066

+ force_simd (b);

20067

+ res = vceqd_s64 (a, b);

20068

+ force_simd (res);

20069

+ return res;

20070

}

20071

20072

/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

20073

@@ -39,7 +50,11 @@

20074

uint64x1_t

20075

test_vceqzd_s64 (int64x1_t a)

20076

{

20077

- return vceqzd_s64 (a);

20078

+ uint64x1_t res;

20079

+ force_simd (a);

20080

+ res = vceqzd_s64 (a);

20081

+ force_simd (res);

20082

+ return res;

20083

}

20084

20085

/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */

20086

@@ -47,21 +62,36 @@

20087

uint64x1_t

20088

test_vcged_s64 (int64x1_t a, int64x1_t b)

20089

{

20090

- return vcged_s64 (a, b);

20091

+ uint64x1_t res;

20092

+ force_simd (a);

20093

+ force_simd (b);

20094

+ res = vcged_s64 (a, b);

20095

+ force_simd (res);

20096

+ return res;

20097

}

20098

20099

uint64x1_t

20100

test_vcled_s64 (int64x1_t a, int64x1_t b)

20101

{

20102

- return vcled_s64 (a, b);

20103

+ uint64x1_t res;

20104

+ force_simd (a);

20105

+ force_simd (b);

20106

+ res = vcled_s64 (a, b);

20107

+ force_simd (res);

20108

+ return res;

20109

}

20110

20111

-/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

20112

+/* Idiom recognition will cause this testcase not to generate

20113

+ the expected cmge instruction, so do not check for it. */

20114

20115

uint64x1_t

20116

test_vcgezd_s64 (int64x1_t a)

20117

{

20118

- return vcgezd_s64 (a);

20119

+ uint64x1_t res;

20120

+ force_simd (a);

20121

+ res = vcgezd_s64 (a);

20122

+ force_simd (res);

20123

+ return res;

20124

}

20125

20126

/* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */

20127

@@ -69,7 +99,12 @@

20128

uint64x1_t

20129

test_vcged_u64 (uint64x1_t a, uint64x1_t b)

20130

{

20131

- return vcged_u64 (a, b);

20132

+ uint64x1_t res;

20133

+ force_simd (a);

20134

+ force_simd (b);

20135

+ res = vcged_u64 (a, b);

20136

+ force_simd (res);

20137

+ return res;

20138

}

20139

20140

/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */

20141

@@ -77,13 +112,23 @@

20142

uint64x1_t

20143

test_vcgtd_s64 (int64x1_t a, int64x1_t b)

20144

{

20145

- return vcgtd_s64 (a, b);

20146

+ uint64x1_t res;

20147

+ force_simd (a);

20148

+ force_simd (b);

20149

+ res = vcgtd_s64 (a, b);

20150

+ force_simd (res);

20151

+ return res;

20152

}

20153

20154

uint64x1_t

20155

test_vcltd_s64 (int64x1_t a, int64x1_t b)

20156

{

20157

- return vcltd_s64 (a, b);

20158

+ uint64x1_t res;

20159

+ force_simd (a);

20160

+ force_simd (b);

20161

+ res = vcltd_s64 (a, b);

20162

+ force_simd (res);

20163

+ return res;

20164

}

20165

20166

/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

20167

@@ -91,7 +136,11 @@

20168

uint64x1_t

20169

test_vcgtzd_s64 (int64x1_t a)

20170

{

20171

- return vcgtzd_s64 (a);

20172

+ uint64x1_t res;

20173

+ force_simd (a);

20174

+ res = vcgtzd_s64 (a);

20175

+ force_simd (res);

20176

+ return res;

20177

}

20178

20179

/* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */

20180

@@ -99,7 +148,12 @@

20181

uint64x1_t

20182

test_vcgtd_u64 (uint64x1_t a, uint64x1_t b)

20183

{

20184

- return vcgtd_u64 (a, b);

20185

+ uint64x1_t res;

20186

+ force_simd (a);

20187

+ force_simd (b);

20188

+ res = vcgtd_u64 (a, b);

20189

+ force_simd (res);

20190

+ return res;

20191

}

20192

20193

/* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

20194

@@ -107,15 +161,24 @@

20195

uint64x1_t

20196

test_vclezd_s64 (int64x1_t a)

20197

{

20198

- return vclezd_s64 (a);

20199

+ uint64x1_t res;

20200

+ force_simd (a);

20201

+ res = vclezd_s64 (a);

20202

+ force_simd (res);

20203

+ return res;

20204

}

20205

20206

-/* { dg-final { scan-assembler-times "\\tcmlt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

20207

+/* Idiom recognition will cause this testcase not to generate

20208

+ the expected cmlt instruction, so do not check for it. */

20209

20210

uint64x1_t

20211

test_vcltzd_s64 (int64x1_t a)

20212

{

20213

- return vcltzd_s64 (a);

20214

+ uint64x1_t res;

20215

+ force_simd (a);

20216

+ res = vcltzd_s64 (a);

20217

+ force_simd (res);

20218

+ return res;

20219

}

20220

20221

/* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */

20222

@@ -179,13 +242,23 @@

20223

int64x1_t

20224

test_vtst_s64 (int64x1_t a, int64x1_t b)

20225

{

20226

- return vtstd_s64 (a, b);

20227

+ uint64x1_t res;

20228

+ force_simd (a);

20229

+ force_simd (b);

20230

+ res = vtstd_s64 (a, b);

20231

+ force_simd (res);

20232

+ return res;

20233

}

20234

20235

uint64x1_t

20236

test_vtst_u64 (uint64x1_t a, uint64x1_t b)

20237

{

20238

- return vtstd_u64 (a, b);

20239

+ uint64x1_t res;

20240

+ force_simd (a);

20241

+ force_simd (b);

20242

+ res = vtstd_s64 (a, b);

20243

+ force_simd (res);

20244

+ return res;

20245

}

20246

20247

/* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */

20248

@@ -722,8 +795,11 @@

20249

return vrshld_u64 (a, b);

20250

}

20251

20252

-/* { dg-final { scan-assembler-times "\\tasr\\tx\[0-9\]+" 1 } } */

20253

+/* Other intrinsics can generate an asr instruction (vcltzd, vcgezd),

20254

+ so we cannot check scan-assembler-times. */

20255

20256

+/* { dg-final { scan-assembler "\\tasr\\tx\[0-9\]+" } } */

20257

+

20258

int64x1_t

20259

test_vshrd_n_s64 (int64x1_t a)

20260

{

20261

Index: gcc/testsuite/gcc.target/i386/pr59405.c

20262

===================================================================

20263

--- a/src/gcc/testsuite/gcc.target/i386/pr59405.c (.../tags/gcc_4_8_2_release)

20264

+++ b/src/gcc/testsuite/gcc.target/i386/pr59405.c (.../branches/gcc-4_8-branch)

20265

@@ -0,0 +1,24 @@

20266

+/* { dg-do run } */

20267

+/* { dg-options "-mmmx -mfpmath=387" } */

20268

+

20269

+#include "mmx-check.h"

20270

+

20271

+#include <mmintrin.h>

20272

+

20273

+typedef float float32x2_t __attribute__ ((vector_size (8)));

20274

+

20275

+float

20276

+foo32x2_be (float32x2_t x)

20277

+{

20278

+ _mm_empty ();

20279

+ return x[1];

20280

+}

20281

+

20282

+static void

20283

+mmx_test (void)

20284

+{

20285

+ float32x2_t b = { 0.0f, 1.0f };

20286

+

20287

+ if (foo32x2_be (b) != 1.0f)

20288

+ abort ();

20289

+}

20290

Index: gcc/testsuite/gcc.target/i386/pr59794-5.c

20291

===================================================================

20292

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-5.c (.../tags/gcc_4_8_2_release)

20293

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-5.c (.../branches/gcc-4_8-branch)

20294

@@ -0,0 +1,14 @@

20295

+/* PR target/59794 */

20296

+/* { dg-do compile { target { ia32 } } } */

20297

+/* { dg-options "-O2 -mno-sse" } */

20298

+/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */

20299

+

20300

+typedef int __v4si __attribute__ ((__vector_size__ (16)));

20301

+

20302

+extern __v4si x;

20303

+

20304

+__v4si

20305

+foo (void)

20306

+{ /* { dg-warning "SSE vector return without SSE enabled changes the ABI" } */

20307

+ return x;

20308

+}

20309

Index: gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c

20310

===================================================================

20311

--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c (.../tags/gcc_4_8_2_release)

20312

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c (.../branches/gcc-4_8-branch)

20313

@@ -1,5 +1,5 @@

20314

/* { dg-do compile { target lp64 } } */

20315

-/* { dg-options "-O2 -mavx -mabi=ms -mtune=generic -dp" } */

20316

+/* { dg-options "-O2 -mavx -mabi=ms -maccumulate-outgoing-args -dp" } */

20317

20318

typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));

20319

20320

Index: gcc/testsuite/gcc.target/i386/pr54694.c

20321

===================================================================

20322

--- a/src/gcc/testsuite/gcc.target/i386/pr54694.c (.../tags/gcc_4_8_2_release)

20323

+++ b/src/gcc/testsuite/gcc.target/i386/pr54694.c (.../branches/gcc-4_8-branch)

20324

@@ -0,0 +1,11 @@

20325

+/* { dg-do compile } */

20326

+/* { dg-options "-O" } */

20327

+

20328

+register void *hfp __asm__("%ebp"); /* { dg-message "note: for" } */

20329

+

20330

+extern void g(void *);

20331

+

20332

+void f(int x) /* { dg-error "frame pointer required" } */

20333

+{

20334

+ g(__builtin_alloca(x));

20335

+}

20336

Index: gcc/testsuite/gcc.target/i386/pr59470.c

20337

===================================================================

20338

--- a/src/gcc/testsuite/gcc.target/i386/pr59470.c (.../tags/gcc_4_8_2_release)

20339

+++ b/src/gcc/testsuite/gcc.target/i386/pr59470.c (.../branches/gcc-4_8-branch)

20340

@@ -0,0 +1,17 @@

20341

+/* PR middle-end/58956 */

20342

+/* PR middle-end/59470 */

20343

+/* { dg-do run } */

20344

+/* { dg-options "-O2" } */

20345

+

20346

+int a, b, d[1024];

20347

+

20348

+int

20349

+main ()

20350

+{

20351

+ int c = a;

20352

+ asm ("{movl $6, (%2); movl $1, %0|mov dword ptr [%2], 6; mov %0, 1}"

20353

+ : "=r" (d[c]) : "rm" (b), "r" (&a) : "memory");

20354

+ if (d[0] != 1 || d[6] != 0)

20355

+ __builtin_abort ();

20356

+ return 0;

20357

+}

20358

Index: gcc/testsuite/gcc.target/i386/pr59034-1.c

20359

===================================================================

20360

--- a/src/gcc/testsuite/gcc.target/i386/pr59034-1.c (.../tags/gcc_4_8_2_release)

20361

+++ b/src/gcc/testsuite/gcc.target/i386/pr59034-1.c (.../branches/gcc-4_8-branch)

20362

@@ -0,0 +1,10 @@

20363

+/* { dg-do compile { target { ! { ia32 } } } } */

20364

+/* { dg-require-effective-target maybe_x32 } */

20365

+/* { dg-options "-O -mx32 -mtune=corei7 -maddress-mode=short" } */

20366

+

20367

+extern int foo(int, ...);

20368

+int bar(void) {

20369

+ long double l = 1.2345E6;

20370

+ foo(0, l);

20371

+ return 0;

20372

+}

20373

Index: gcc/testsuite/gcc.target/i386/pr58690.c

20374

===================================================================

20375

--- a/src/gcc/testsuite/gcc.target/i386/pr58690.c (.../tags/gcc_4_8_2_release)

20376

+++ b/src/gcc/testsuite/gcc.target/i386/pr58690.c (.../branches/gcc-4_8-branch)

20377

@@ -0,0 +1,14 @@

20378

+/* { dg-do compile { target { ! { ia32 } } } } */

20379

+/* { dg-require-effective-target maybe_x32 } */

20380

+/* { dg-options "-O2 -mx32 -maddress-mode=short" } */

20381

+

20382

+struct gomp_thread

20383

+{

20384

+ char foo[41];

20385

+};

20386

+extern __thread struct gomp_thread gomp_tls_data;

20387

+void

20388

+foo (void)

20389

+{

20390

+ __builtin_memset (&gomp_tls_data, '\0', sizeof (gomp_tls_data));

20391

+}

20392

Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c

20393

===================================================================

20394

--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../tags/gcc_4_8_2_release)

20395

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../branches/gcc-4_8-branch)

20396

@@ -15,7 +15,7 @@

20397

avx_test (void)

20398

{

20399

union256d u;

20400

- double e [4] __attribute__ ((aligned (8))) = {0.0};

20401

+ double e [4] __attribute__ ((aligned (32))) = {0.0};

20402

20403

u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215);

20404

20405

Index: gcc/testsuite/gcc.target/i386/pr9771-1.c

20406

===================================================================

20407

--- a/src/gcc/testsuite/gcc.target/i386/pr9771-1.c (.../tags/gcc_4_8_2_release)

20408

+++ b/src/gcc/testsuite/gcc.target/i386/pr9771-1.c (.../branches/gcc-4_8-branch)

20409

@@ -45,7 +45,17 @@

20410

exit(0);

20411

}

20412

20413

-int main()

20414

+/* main usually performs dynamic realignment of the stack in case

20415

+ _start would fail to properly align the stack, but for dynamic

20416

+ stack realignment we need frame pointer which is incompatible

20417

+ with -ffixed-ebp and the global register var. So, cheat here

20418

+ and hide from the compiler that main is really main. */

20419

+#define ASMNAME(cname) ASMNAME2 (__USER_LABEL_PREFIX__, cname)

20420

+#define ASMNAME2(prefix, cname) STRING (prefix) cname

20421

+#define STRING(x) #x

20422

+int real_main() __asm (ASMNAME ("main"));

20423

+

20424

+int real_main()

20425

{

20426

test();

20427

return 0;

20428

Index: gcc/testsuite/gcc.target/i386/pr60700.c

20429

===================================================================

20430

--- a/src/gcc/testsuite/gcc.target/i386/pr60700.c (.../tags/gcc_4_8_2_release)

20431

+++ b/src/gcc/testsuite/gcc.target/i386/pr60700.c (.../branches/gcc-4_8-branch)

20432

@@ -0,0 +1,59 @@

20433

+/* PR rtl-optimization/60700 */

20434

+/* { dg-do run { target ia32 } } */

20435

+/* { dg-options "-O3 -march=i686" } */

20436

+

20437

+int

20438

+__attribute__((noinline))

20439

+foo (void)

20440

+{

20441

+ return 0;

20442

+}

20443

+

20444

+void *g = (void *)1;

20445

+

20446

+struct st {

20447

+ char data[36]; /* must be greater than 32. */

20448

+};

20449

+

20450

+int

20451

+__attribute__((noinline))

20452

+repro(struct st **out)

20453

+{

20454

+ int status = 0;

20455

+

20456

+ *out = 0;

20457

+

20458

+ status = foo();

20459

+ if (status != 0) {

20460

+ return status;

20461

+ }

20462

+

20463

+ if (0 == g) {

20464

+ status = 999;

20465

+ return status;

20466

+ }

20467

+

20468

+ *out = (struct st *)__builtin_malloc(sizeof(struct st));

20469

+ if (0 == *out) {

20470

+ status = 42;

20471

+ return status;

20472

+ }

20473

+

20474

+ __builtin_memset(*out, 0, sizeof(struct st));

20475

+

20476

+ return status;

20477

+}

20478

+

20479

+int

20480

+main ()

20481

+{

20482

+ struct st *p;

20483

+ int ret = repro (&p);

20484

+ unsigned int i;

20485

+

20486

+ for (i = 0; i < sizeof (p->data)/sizeof (p->data[0]); i++)

20487

+ if (p->data[i] != 0)

20488

+ __builtin_abort ();

20489

+

20490

+ return ret;

20491

+}

20492

Index: gcc/testsuite/gcc.target/i386/pr59794-2.c

20493

===================================================================

20494

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-2.c (.../tags/gcc_4_8_2_release)

20495

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-2.c (.../branches/gcc-4_8-branch)

20496

@@ -0,0 +1,15 @@

20497

+/* PR target/59794 */

20498

+/* { dg-prune-output "ABI for passing parameters" } */

20499

+/* { dg-options "-O2 -mno-sse" } */

20500

+/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */

20501

+

20502

+typedef double __v2df __attribute__ ((__vector_size__ (16)));

20503

+

20504

+extern __v2df x;

20505

+

20506

+extern void bar (__v2df);

20507

+void

20508

+foo (void)

20509

+{

20510

+ bar (x); /* { dg-message "warning: SSE vector argument without SSE enabled changes the ABI" } */

20511

+}

20512

Index: gcc/testsuite/gcc.target/i386/pr57003.c

20513

===================================================================

20514

--- a/src/gcc/testsuite/gcc.target/i386/pr57003.c (.../tags/gcc_4_8_2_release)

20515

+++ b/src/gcc/testsuite/gcc.target/i386/pr57003.c (.../branches/gcc-4_8-branch)

20516

@@ -1,6 +1,6 @@

20517

/* PR rtl-optimization/57003 */

20518

/* { dg-do run } */

20519

-/* { dg-options "-O2" } */

20520

+/* { dg-options "-O2 -maccumulate-outgoing-args" } */

20521

20522

#define N 2001

20523

unsigned short *b, *c, *d;

20524

Index: gcc/testsuite/gcc.target/i386/pr59929.c

20525

===================================================================

20526

--- a/src/gcc/testsuite/gcc.target/i386/pr59929.c (.../tags/gcc_4_8_2_release)

20527

+++ b/src/gcc/testsuite/gcc.target/i386/pr59929.c (.../branches/gcc-4_8-branch)

20528

@@ -0,0 +1,55 @@

20529

+/* { dg-do run } */

20530

+/* { dg-options "-O0 -mno-accumulate-outgoing-args" } */

20531

+/* { dg-options "-O0 -mno-accumulate-outgoing-args -mx32 -maddress-mode=short" { target x32 } } */

20532

+

20533

+void

20534

+__attribute__ ((noinline))

20535

+test (float x1, float x2, float x3, float x4, float x5, float x6,

20536

+ float x7, float x8, float x9, float x10, float x11, float x12,

20537

+ float x13, float x14, float x15, float x16)

20538

+{

20539

+ if (x1 != 91

20540

+ || x2 != 92

20541

+ || x3 != 93

20542

+ || x4 != 94

20543

+ || x5 != 95

20544

+ || x6 != 96

20545

+ || x7 != 97

20546

+ || x8 != 98

20547

+ || x9 != 99

20548

+ || x10 != 100

20549

+ || x11 != 101

20550

+ || x12 != 102

20551

+ || x13 != 103

20552

+ || x14 != 104

20553

+ || x15 != 105

20554

+ || x16 != 106)

20555

+ __builtin_abort ();

20556

+}

20557

+

20558

+float x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13,

20559

+ x14, x15, x16;

20560

+

20561

+int

20562

+main ()

20563

+{

20564

+ x1 = 91;

20565

+ x2 = 92;

20566

+ x3 = 93;

20567

+ x4 = 94;

20568

+ x5 = 95;

20569

+ x6 = 96;

20570

+ x7 = 97;

20571

+ x8 = 98;

20572

+ x9 = 99;

20573

+ x10 = 100;

20574

+ x11 = 101;

20575

+ x12 = 102;

20576

+ x13 = 103;

20577

+ x14 = 104;

20578

+ x15 = 105;

20579

+ x16 = 106;

20580

+ test (x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13,

20581

+ x14, x15, x16);

20582

+ return 0;

20583

+}

20584

Index: gcc/testsuite/gcc.target/i386/pr59794-6.c

20585

===================================================================

20586

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-6.c (.../tags/gcc_4_8_2_release)

20587

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-6.c (.../branches/gcc-4_8-branch)

20588

@@ -0,0 +1,14 @@

20589

+/* PR target/59794 */

20590

+/* { dg-do compile { target { ! ia32 } } } */

20591

+/* { dg-options "-O2 -mno-sse" } */

20592

+/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */

20593

+

20594

+typedef int __v4si __attribute__ ((__vector_size__ (16)));

20595

+

20596

+extern __v4si x;

20597

+

20598

+__v4si

20599

+foo (void)

20600

+{ /* { dg-error "SSE register return with SSE disabled" } */

20601

+ return x;

20602

+}

20603

Index: gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c

20604

===================================================================

20605

--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c (.../tags/gcc_4_8_2_release)

20606

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c (.../branches/gcc-4_8-branch)

20607

@@ -1,5 +1,5 @@

20608

/* { dg-do compile { target lp64 } } */

20609

-/* { dg-options "-O0 -mavx -mabi=ms -mtune=generic -dp" } */

20610

+/* { dg-options "-O0 -mavx -mabi=ms -maccumulate-outgoing-args -dp" } */

20611

20612

typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));

20613

20614

Index: gcc/testsuite/gcc.target/i386/sse2-movapd-1.c

20615

===================================================================

20616

--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../tags/gcc_4_8_2_release)

20617

+++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../branches/gcc-4_8-branch)

20618

@@ -25,7 +25,7 @@

20619

TEST (void)

20620

{

20621

union128d u;

20622

- double e[2] __attribute__ ((aligned (8))) = {2134.3343,1234.635654};

20623

+ double e[2] __attribute__ ((aligned (16))) = {2134.3343,1234.635654};

20624

20625

u.x = test (e);

20626

20627

Index: gcc/testsuite/gcc.target/i386/pr59021.c

20628

===================================================================

20629

--- a/src/gcc/testsuite/gcc.target/i386/pr59021.c (.../tags/gcc_4_8_2_release)

20630

+++ b/src/gcc/testsuite/gcc.target/i386/pr59021.c (.../branches/gcc-4_8-branch)

20631

@@ -0,0 +1,23 @@

20632

+/* { dg-do compile } */

20633

+/* { dg-options "-O2 -mavx -mvzeroupper" } */

20634

+

20635

+extern void abort (void);

20636

+

20637

+struct S {

20638

+ int i1;

20639

+ int i2;

20640

+ int i3;

20641

+};

20642

+

20643

+typedef double v4df __attribute__ ((vector_size (32)));

20644

+

20645

+extern int foo (v4df, int i1, int i2, int i3, int i4, int i5, struct S s);

20646

+

20647

+void bar (v4df v, struct S s)

20648

+{

20649

+ int r = foo (v, 1, 2, 3, 4, 5, s);

20650

+ if (r)

20651

+ abort ();

20652

+}

20653

+

20654

+/* { dg-final { scan-assembler-not "vzeroupper" } } */

20655

Index: gcc/testsuite/gcc.target/i386/pr59034-2.c

20656

===================================================================

20657

--- a/src/gcc/testsuite/gcc.target/i386/pr59034-2.c (.../tags/gcc_4_8_2_release)

20658

+++ b/src/gcc/testsuite/gcc.target/i386/pr59034-2.c (.../branches/gcc-4_8-branch)

20659

@@ -0,0 +1,10 @@

20660

+/* { dg-do compile { target { ! { ia32 } } } } */

20661

+/* { dg-require-effective-target maybe_x32 } */

20662

+/* { dg-options "-O -mx32 -mtune=corei7 -maddress-mode=long" } */

20663

+

20664

+extern int foo(int, ...);

20665

+int bar(void) {

20666

+ long double l = 1.2345E6;

20667

+ foo(0, l);

20668

+ return 0;

20669

+}

20670

Index: gcc/testsuite/gcc.target/i386/pr60693.c

20671

===================================================================

20672

--- a/src/gcc/testsuite/gcc.target/i386/pr60693.c (.../tags/gcc_4_8_2_release)

20673

+++ b/src/gcc/testsuite/gcc.target/i386/pr60693.c (.../branches/gcc-4_8-branch)

20674

@@ -0,0 +1,13 @@

20675

+/* PR target/60693 */

20676

+/* { dg-do compile } */

20677

+/* { dg-options "-O0" } */

20678

+

20679

+void bar (char *);

20680

+

20681

+void

20682

+foo (void)

20683

+{

20684

+ char buf[4096];

20685

+ __builtin_memcpy (buf, (void *) 0x8000, 4096);

20686

+ bar (buf);

20687

+}

20688

Index: gcc/testsuite/gcc.target/i386/pr59794-3.c

20689

===================================================================

20690

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-3.c (.../tags/gcc_4_8_2_release)

20691

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-3.c (.../branches/gcc-4_8-branch)

20692

@@ -0,0 +1,15 @@

20693

+/* PR target/59794 */

20694

+/* { dg-prune-output "ABI for passing parameters" } */

20695

+/* { dg-options "-O2 -mno-avx" } */

20696

+/* { dg-skip-if "no AVX vector" { *-*-mingw* } } */

20697

+

20698

+typedef int __v8si __attribute__ ((__vector_size__ (32)));

20699

+

20700

+extern __v8si x;

20701

+

20702

+extern void bar (__v8si);

20703

+void

20704

+foo (void)

20705

+{

20706

+ bar (x); /* { dg-message "warning: AVX vector argument without AVX enabled changes the ABI" } */

20707

+}

20708

Index: gcc/testsuite/gcc.target/i386/pr59839.c

20709

===================================================================

20710

--- a/src/gcc/testsuite/gcc.target/i386/pr59839.c (.../tags/gcc_4_8_2_release)

20711

+++ b/src/gcc/testsuite/gcc.target/i386/pr59839.c (.../branches/gcc-4_8-branch)

20712

@@ -0,0 +1,12 @@

20713

+/* PR target/59839 */

20714

+/* { dg-do compile } */

20715

+/* { dg-options "-O0 -mavx2" } */

20716

+

20717

+#include <x86intrin.h>

20718

+

20719

+void

20720

+test (const float *x)

20721

+{

20722

+ __m256i i = _mm256_set1_epi32 (1);

20723

+ __m256 d = _mm256_i32gather_ps (x, i, 1);

20724

+}

20725

Index: gcc/testsuite/gcc.target/i386/pr60516.c

20726

===================================================================

20727

--- a/src/gcc/testsuite/gcc.target/i386/pr60516.c (.../tags/gcc_4_8_2_release)

20728

+++ b/src/gcc/testsuite/gcc.target/i386/pr60516.c (.../branches/gcc-4_8-branch)

20729

@@ -0,0 +1,20 @@

20730

+/* PR target/60516 */

20731

+/* { dg-do compile } */

20732

+/* { dg-options "-O2" } */

20733

+

20734

+struct S { char c[65536]; };

20735

+

20736

+__attribute__((ms_abi, thiscall)) void

20737

+foo (void *x, struct S y)

20738

+{

20739

+}

20740

+

20741

+__attribute__((ms_abi, fastcall)) void

20742

+bar (void *x, void *y, struct S z)

20743

+{

20744

+}

20745

+

20746

+__attribute__((ms_abi, stdcall)) void

20747

+baz (struct S x)

20748

+{

20749

+}

20750

Index: gcc/testsuite/gcc.target/i386/xop-frczX.c

20751

===================================================================

20752

--- a/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../tags/gcc_4_8_2_release)

20753

+++ b/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../branches/gcc-4_8-branch)

20754

@@ -0,0 +1,60 @@

20755

+/* { dg-do run } */

20756

+/* { dg-require-effective-target xop } */

20757

+/* { dg-options "-O2 -mxop" } */

20758

+

20759

+#include "xop-check.h"

20760

+

20761

+#include <x86intrin.h>

20762

+

20763

+void

20764

+check_mm_vmfrcz_sd (__m128d __A, __m128d __B)

20765

+{

20766

+ union128d a, b, c;

20767

+ double d[2];

20768

+

20769

+ a.x = __A;

20770

+ b.x = __B;

20771

+ c.x = _mm_frcz_sd (__A, __B);

20772

+ d[0] = b.a[0] - (int)b.a[0] ;

20773

+ d[1] = a.a[1];

20774

+ if (check_union128d (c, d))

20775

+ abort ();

20776

+}

20777

+

20778

+void

20779

+check_mm_vmfrcz_ss (__m128 __A, __m128 __B)

20780

+{

20781

+ union128 a, b, c;

20782

+ float f[4];

20783

+

20784

+ a.x = __A;

20785

+ b.x = __B;

20786

+ c.x = _mm_frcz_ss (__A, __B);

20787

+ f[0] = b.a[0] - (int)b.a[0] ;

20788

+ f[1] = a.a[1];

20789

+ f[2] = a.a[2];

20790

+ f[3] = a.a[3];

20791

+ if (check_union128 (c, f))

20792

+ abort ();

20793

+}

20794

+

20795

+static void

20796

+xop_test (void)

20797

+{

20798

+ union128 a, b;

20799

+ union128d c,d;

20800

+ int i;

20801

+

20802

+ for (i = 0; i < 4; i++)

20803

+ {

20804

+ a.a[i] = i + 3.5;

20805

+ b.a[i] = i + 7.9;

20806

+ }

20807

+ for (i = 0; i < 2; i++)

20808

+ {

20809

+ c.a[i] = i + 3.5;

20810

+ d.a[i] = i + 7.987654321;

20811

+ }

20812

+ check_mm_vmfrcz_ss (a.x, b.x);

20813

+ check_mm_vmfrcz_sd (c.x, d.x);

20814

+}

20815

Index: gcc/testsuite/gcc.target/i386/pr59794-7.c

20816

===================================================================

20817

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-7.c (.../tags/gcc_4_8_2_release)

20818

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-7.c (.../branches/gcc-4_8-branch)

20819

@@ -0,0 +1,13 @@

20820

+/* PR target/59794 */

20821

+/* { dg-options "-O2 -mno-avx" } */

20822

+/* { dg-skip-if "no AVX vector" { *-*-mingw* } } */

20823

+

20824

+typedef int __v8si __attribute__ ((__vector_size__ (32)));

20825

+

20826

+extern __v8si x;

20827

+

20828

+__v8si

20829

+foo (void)

20830

+{ /* { dg-warning "AVX vector return without AVX enabled changes the ABI" } */

20831

+ return x;

20832

+}

20833

Index: gcc/testsuite/gcc.target/i386/pr59625.c

20834

===================================================================

20835

--- a/src/gcc/testsuite/gcc.target/i386/pr59625.c (.../tags/gcc_4_8_2_release)

20836

+++ b/src/gcc/testsuite/gcc.target/i386/pr59625.c (.../branches/gcc-4_8-branch)

20837

@@ -0,0 +1,36 @@

20838

+/* PR target/59625 */

20839

+/* { dg-do compile } */

20840

+/* { dg-options "-O2 -mtune=atom" } */

20841

+

20842

+int

20843

+foo (void)

20844

+{

20845

+ asm goto ("" : : : : lab);

20846

+ asm goto ("" : : : : lab);

20847

+ asm goto ("" : : : : lab);

20848

+ asm goto ("" : : : : lab);

20849

+ asm goto ("" : : : : lab);

20850

+ asm goto ("" : : : : lab);

20851

+ asm goto ("" : : : : lab);

20852

+ asm goto ("" : : : : lab);

20853

+ asm goto ("" : : : : lab);

20854

+ asm goto ("" : : : : lab);

20855

+ asm goto ("" : : : : lab);

20856

+ asm goto ("" : : : : lab);

20857

+ asm goto ("" : : : : lab);

20858

+ asm goto ("" : : : : lab);

20859

+ asm goto ("" : : : : lab);

20860

+ asm goto ("" : : : : lab);

20861

+ asm goto ("" : : : : lab);

20862

+ asm goto ("" : : : : lab);

20863

+ asm goto ("" : : : : lab);

20864

+ asm goto ("" : : : : lab);

20865

+ return 0;

20866

+lab:

20867

+ return 1;

20868

+}

20869

+

20870

+/* Verify we don't consider asm goto as a jump for four jumps limit

20871

+ optimization. asm goto doesn't have to contain a jump at all,

20872

+ the branching to labels can happen through different means. */

20873

+/* { dg-final { scan-assembler-not "(p2align\[^\n\r\]*\[\n\r]*\[^\n\r\]*){8}p2align" } } */

20874

Index: gcc/testsuite/gcc.target/i386/sse2-movapd-2.c

20875

===================================================================

20876

--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../tags/gcc_4_8_2_release)

20877

+++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../branches/gcc-4_8-branch)

20878

@@ -25,7 +25,7 @@

20879

TEST (void)

20880

{

20881

union128d u;

20882

- double e[2] __attribute__ ((aligned (8))) = {0.0};

20883

+ double e[2] __attribute__ ((aligned (16))) = {0.0};

20884

20885

u.x = _mm_set_pd (2134.3343,1234.635654);

20886

20887

Index: gcc/testsuite/gcc.target/i386/sse-5.c

20888

===================================================================

20889

--- a/src/gcc/testsuite/gcc.target/i386/sse-5.c (.../tags/gcc_4_8_2_release)

20890

+++ b/src/gcc/testsuite/gcc.target/i386/sse-5.c (.../branches/gcc-4_8-branch)

20891

@@ -1,6 +1,7 @@

20892

/* { dg-do compile } */

20893

/* { dg-require-effective-target ia32 } */

20894

-/* { dg-options "-Winline -Wno-psabi -O2 -mno-sse" } */

20895

+/* { dg-prune-output "ABI for passing parameters" } */

20896

+/* { dg-options "-Winline -O2 -mno-sse" } */

20897

20898

typedef double v2df __attribute__ ((vector_size (16)));

20899

v2df p;

20900

Index: gcc/testsuite/gcc.target/i386/pr39162.c

20901

===================================================================

20902

--- a/src/gcc/testsuite/gcc.target/i386/pr39162.c (.../tags/gcc_4_8_2_release)

20903

+++ b/src/gcc/testsuite/gcc.target/i386/pr39162.c (.../branches/gcc-4_8-branch)

20904

@@ -1,11 +1,14 @@

20905

/* { dg-do compile } */

20906

-/* { dg-options "-O2 -Wno-psabi -msse2 -mno-avx" } */

20907

+/* { dg-prune-output "ABI for passing parameters" } */

20908

+/* { dg-options "-O2 -msse2 -mno-avx" } */

20909

/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */

20910

20911

typedef long long __m256i __attribute__ ((__vector_size__ (32), __may_alias__));

20912

20913

-__m256i

20914

+extern __m256i y;

20915

+

20916

+void

20917

bar (__m256i x) /* { dg-warning "AVX" "" } */

20918

{

20919

- return x;

20920

+ y = x;

20921

}

20922

Index: gcc/testsuite/gcc.target/i386/pr60909-1.c

20923

===================================================================

20924

--- a/src/gcc/testsuite/gcc.target/i386/pr60909-1.c (.../tags/gcc_4_8_2_release)

20925

+++ b/src/gcc/testsuite/gcc.target/i386/pr60909-1.c (.../branches/gcc-4_8-branch)

20926

@@ -0,0 +1,11 @@

20927

+/* { dg-do compile } */

20928

+/* { dg-options "-mrdrnd" } */

20929

+

20930

+extern void bar (int);

20931

+

20932

+void

20933

+foo (unsigned *u)

20934

+{

20935

+ int i = __builtin_ia32_rdrand32_step (u);

20936

+ bar (i);

20937

+}

20938

Index: gcc/testsuite/gcc.target/i386/pr58137.c

20939

===================================================================

20940

--- a/src/gcc/testsuite/gcc.target/i386/pr58137.c (.../tags/gcc_4_8_2_release)

20941

+++ b/src/gcc/testsuite/gcc.target/i386/pr58137.c (.../branches/gcc-4_8-branch)

20942

@@ -0,0 +1,33 @@

20943

+/* { dg-do compile } */

20944

+/* { dg-options "-O3 -mavx2" } */

20945

+

20946

+typedef unsigned int U32;

20947

+

20948

+struct sv {

20949

+ void* sv_any;

20950

+ U32 sv_refcnt;

20951

+ U32 sv_flags;

20952

+};

20953

+typedef struct sv SV;

20954

+

20955

+struct xrv {

20956

+ SV * xrv_rv;

20957

+};

20958

+typedef struct xrv XRV;

20959

+

20960

+extern XRV * PL_xrv_root;

20961

+

20962

+void

20963

+more_xrv (void)

20964

+{

20965

+ register XRV* xrv;

20966

+ register XRV* xrvend;

20967

+ xrv = PL_xrv_root;

20968

+ xrvend = &xrv[200 / sizeof (XRV) - 1];

20969

+ while (xrv < xrvend)

20970

+ {

20971

+ xrv->xrv_rv = (SV*)(xrv + 1);

20972

+ xrv++;

20973

+ }

20974

+ xrv->xrv_rv = 0;

20975

+}

20976

Index: gcc/testsuite/gcc.target/i386/pr59794-4.c

20977

===================================================================

20978

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-4.c (.../tags/gcc_4_8_2_release)

20979

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-4.c (.../branches/gcc-4_8-branch)

20980

@@ -0,0 +1,14 @@

20981

+/* PR target/59794 */

20982

+/* { dg-do compile { target { ia32 } } } */

20983

+/* { dg-options "-O2 -mno-mmx" } */

20984

+/* { dg-skip-if "no MMX vector" { *-*-mingw* } } */

20985

+

20986

+typedef int __v2si __attribute__ ((__vector_size__ (8)));

20987

+

20988

+extern __v2si x;

20989

+

20990

+__v2si

20991

+foo (void)

20992

+{ /* { dg-warning "MMX vector return without MMX enabled changes the ABI" } */

20993

+ return x;

20994

+}

20995

Index: gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c

20996

===================================================================

20997

--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c (.../tags/gcc_4_8_2_release)

20998

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c (.../branches/gcc-4_8-branch)

20999

@@ -1,5 +1,5 @@

21000

/* { dg-do compile { target lp64 } } */

21001

-/* { dg-options "-O2 -mavx -mabi=ms -mtune=generic -dp" } */

21002

+/* { dg-options "-O2 -mavx -mabi=ms -maccumulate-outgoing-args -dp" } */

21003

21004

typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));

21005

21006

Index: gcc/testsuite/gcc.target/i386/pr30315.c

21007

===================================================================

21008

--- a/src/gcc/testsuite/gcc.target/i386/pr30315.c (.../tags/gcc_4_8_2_release)

21009

+++ b/src/gcc/testsuite/gcc.target/i386/pr30315.c (.../branches/gcc-4_8-branch)

21010

@@ -1,6 +1,6 @@

21011

/* { dg-do compile } */

21012

/* { dg-options "-O2" } */

21013

-/* { dg-final { scan-assembler-times "cmp" 4 } } */

21014

+/* { dg-final { scan-assembler-not "cmp" } } */

21015

21016

extern void abort (void);

21017

int c;

21018

@@ -34,39 +34,10 @@

21019

}

21020

#define PLUSCCONLY(T, t) PLUSCCONLY1(T, t, a) PLUSCCONLY1(T, t, b)

21021

21022

-#define MINUSCC(T, t) \

21023

-T minuscc##t (T a, T b) \

21024

-{ \

21025

- T difference = a - b; \

21026

- if (difference > a) \

21027

- abort (); \

21028

- return difference; \

21029

-}

21030

-

21031

-#define DECCC(T, t) \

21032

-T deccc##t (T a, T b) \

21033

-{ \

21034

- T difference = a - b; \

21035

- if (difference > a) \

21036

- c --; \

21037

- return difference; \

21038

-}

21039

-

21040

-#define MINUSCCONLY(T, t) \

21041

-void minuscconly##t (T a, T b) \

21042

-{ \

21043

- T difference = a - b; \

21044

- if (difference > a) \

21045

- abort (); \

21046

-}

21047

-

21048

#define TEST(T, t) \

21049

PLUSCC(T, t) \

21050

PLUSCCONLY(T, t) \

21051

- INCCC(T, t) \

21052

- MINUSCC(T, t) \

21053

- MINUSCCONLY(T, t) \

21054

- DECCC(T, t)

21055

+ INCCC(T, t)

21056

21057

TEST (unsigned long, l)

21058

TEST (unsigned int, i)

21059

@@ -84,14 +55,3 @@

21060

21061

PLUSCCZEXT(a)

21062

PLUSCCZEXT(b)

21063

-

21064

-#define MINUSCCZEXT \

21065

-unsigned long minuscczext (unsigned int a, unsigned int b) \

21066

-{ \

21067

- unsigned int difference = a - b; \

21068

- if (difference > a) \

21069

- abort (); \

21070

- return difference; \

21071

-}

21072

-

21073

-MINUSCCZEXT

21074

Index: gcc/testsuite/gcc.target/i386/pr43869.c

21075

===================================================================

21076

--- a/src/gcc/testsuite/gcc.target/i386/pr43869.c (.../tags/gcc_4_8_2_release)

21077

+++ b/src/gcc/testsuite/gcc.target/i386/pr43869.c (.../branches/gcc-4_8-branch)

21078

@@ -1,4 +1,5 @@

21079

/* { dg-do compile { target lp64 } } */

21080

+/* { dg-options "-maccumulate-outgoing-args" } */

21081

21082

int __attribute__((__noinline__))

21083

bugged(float f1, float f2, float f3, float f4,

21084

Index: gcc/testsuite/gcc.target/i386/pr43546.c

21085

===================================================================

21086

--- a/src/gcc/testsuite/gcc.target/i386/pr43546.c (.../tags/gcc_4_8_2_release)

21087

+++ b/src/gcc/testsuite/gcc.target/i386/pr43546.c (.../branches/gcc-4_8-branch)

21088

@@ -0,0 +1,12 @@

21089

+/* PR target/43546 */

21090

+/* { dg-do compile } */

21091

+/* { dg-options "-O1" } */

21092

+/* { dg-additional-options "-mpreferred-stack-boundary=2 -msseregparm -msse" { target ia32 } } */

21093

+

21094

+extern void bar (double);

21095

+

21096

+void

21097

+foo (void)

21098

+{

21099

+ bar (1.0);

21100

+}

21101

Index: gcc/testsuite/gcc.target/i386/pr43662.c

21102

===================================================================

21103

--- a/src/gcc/testsuite/gcc.target/i386/pr43662.c (.../tags/gcc_4_8_2_release)

21104

+++ b/src/gcc/testsuite/gcc.target/i386/pr43662.c (.../branches/gcc-4_8-branch)

21105

@@ -1,5 +1,5 @@

21106

/* { dg-do compile { target lp64 } } */

21107

-/* { dg-options "-O2" } */

21108

+/* { dg-options "-O2 -maccumulate-outgoing-args" } */

21109

21110

void __attribute__ ((ms_abi)) foo (void)

21111

{

21112

Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c

21113

===================================================================

21114

--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../tags/gcc_4_8_2_release)

21115

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../branches/gcc-4_8-branch)

21116

@@ -15,7 +15,7 @@

21117

avx_test (void)

21118

{

21119

union256d u;

21120

- double e [4] __attribute__ ((aligned (8))) = {41124.234,2344.2354,8653.65635,856.43576};

21121

+ double e [4] __attribute__ ((aligned (32))) = {41124.234,2344.2354,8653.65635,856.43576};

21122

21123

u.x = test (e);

21124

21125

Index: gcc/testsuite/gcc.target/i386/nest-1.c

21126

===================================================================

21127

--- a/src/gcc/testsuite/gcc.target/i386/nest-1.c (.../tags/gcc_4_8_2_release)

21128

+++ b/src/gcc/testsuite/gcc.target/i386/nest-1.c (.../branches/gcc-4_8-branch)

21129

@@ -0,0 +1,14 @@

21130

+/* { dg-do compile { target llp64 } } */

21131

+/* { dg-options "" } */

21132

+

21133

+void foo (int i)

21134

+{

21135

+ void nested (void)

21136

+ {

21137

+ char arr[(1U << 31) + 4U];

21138

+ arr[i] = 0;

21139

+ }

21140

+

21141

+ nested ();

21142

+}

21143

+

21144

Index: gcc/testsuite/gcc.target/i386/pr60909-2.c

21145

===================================================================

21146

--- a/src/gcc/testsuite/gcc.target/i386/pr60909-2.c (.../tags/gcc_4_8_2_release)

21147

+++ b/src/gcc/testsuite/gcc.target/i386/pr60909-2.c (.../branches/gcc-4_8-branch)

21148

@@ -0,0 +1,11 @@

21149

+/* { dg-do compile } */

21150

+/* { dg-options "-mrdseed" } */

21151

+

21152

+extern void bar (int);

21153

+

21154

+void

21155

+foo (unsigned *u)

21156

+{

21157

+ int i = __builtin_ia32_rdseed_si_step (u);

21158

+ bar (i);

21159

+}

21160

Index: gcc/testsuite/gcc.target/i386/pr59794-1.c

21161

===================================================================

21162

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-1.c (.../tags/gcc_4_8_2_release)

21163

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-1.c (.../branches/gcc-4_8-branch)

21164

@@ -0,0 +1,15 @@

21165

+/* PR target/59794 */

21166

+/* { dg-do compile { target { ia32 } } } */

21167

+/* { dg-options "-O2 -mno-mmx" } */

21168

+/* { dg-skip-if "no MMX vector" { *-*-mingw* } } */

21169

+

21170

+typedef int __v2si __attribute__ ((__vector_size__ (8)));

21171

+

21172

+extern __v2si x;

21173

+

21174

+extern void bar (__v2si);

21175

+void

21176

+foo (void)

21177

+{

21178

+ bar (x); /* { dg-message "warning: MMX vector argument without MMX enabled changes the ABI" } */

21179

+}

21180

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/pr38891.c

21181

===================================================================

21182

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/pr38891.c (.../tags/gcc_4_8_2_release)

21183

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/pr38891.c (.../branches/gcc-4_8-branch)

21184

@@ -1,7 +1,7 @@

21185

/* Test for cross x86_64<->w64 abi standard calls.

21186

*/

21187

/* { dg-do compile } */

21188

-/* { dg-options "-mno-sse" } */

21189

+/* { dg-options "-mno-sse -maccumulate-outgoing-args" } */

21190

#include "callabi.h"

21191

21192

long double

21193

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-1.c

21194

===================================================================

21195

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-1.c (.../tags/gcc_4_8_2_release)

21196

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-1.c (.../branches/gcc-4_8-branch)

21197

@@ -2,7 +2,7 @@

21198

*/

21199

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

21200

/* { dg-do run } */

21201

-/* { dg-options "-std=gnu99" } */

21202

+/* { dg-options "-std=gnu99 -maccumulate-outgoing-args" } */

21203

#include "callabi.h"

21204

21205

extern __SIZE_TYPE__ strlen (const char *);

21206

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-2.c

21207

===================================================================

21208

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-2.c (.../tags/gcc_4_8_2_release)

21209

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-2.c (.../branches/gcc-4_8-branch)

21210

@@ -2,7 +2,7 @@

21211

*/

21212

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

21213

/* { dg-do run } */

21214

-/* { dg-options "-std=gnu99" } */

21215

+/* { dg-options "-std=gnu99 -maccumulate-outgoing-args" } */

21216

#include "callabi.h"

21217

21218

extern void abort (void);

21219

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-3.c

21220

===================================================================

21221

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-3.c (.../tags/gcc_4_8_2_release)

21222

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-3.c (.../branches/gcc-4_8-branch)

21223

@@ -2,7 +2,7 @@

21224

*/

21225

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

21226

/* { dg-do run } */

21227

-/* { dg-options "-std=gnu99" } */

21228

+/* { dg-options "-std=gnu99 -maccumulate-outgoing-args" } */

21229

#include "callabi.h"

21230

21231

extern void abort (void);

21232

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c

21233

===================================================================

21234

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c (.../tags/gcc_4_8_2_release)

21235

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c (.../branches/gcc-4_8-branch)

21236

@@ -1,6 +1,6 @@

21237

/* Test for cross x86_64<->w64 abi va_list calls. */

21238

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

21239

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

21240

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

21241

/* { dg-additional-sources "vaarg-4b.c" } */

21242

21243

extern __SIZE_TYPE__ __attribute__ ((sysv_abi)) strlen (const char *);

21244

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c

21245

===================================================================

21246

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c (.../tags/gcc_4_8_2_release)

21247

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c (.../branches/gcc-4_8-branch)

21248

@@ -1,6 +1,6 @@

21249

/* Test for cross x86_64<->w64 abi va_list calls. */

21250

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

21251

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

21252

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

21253

/* { dg-additional-sources "vaarg-5b.c" } */

21254

21255

extern void __attribute__ ((sysv_abi)) abort (void);

21256

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4b.c

21257

===================================================================

21258

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4b.c (.../tags/gcc_4_8_2_release)

21259

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4b.c (.../branches/gcc-4_8-branch)

21260

@@ -1,5 +1,5 @@

21261

/* Test for cross x86_64<->w64 abi va_list calls. */

21262

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

21263

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

21264

21265

#include <stdarg.h>

21266

21267

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5b.c

21268

===================================================================

21269

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5b.c (.../tags/gcc_4_8_2_release)

21270

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5b.c (.../branches/gcc-4_8-branch)

21271

@@ -1,5 +1,5 @@

21272

/* Test for cross x86_64<->w64 abi va_list calls. */

21273

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

21274

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

21275

21276

#include <stdarg.h>

21277

21278

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-1.c

21279

===================================================================

21280

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-1.c (.../tags/gcc_4_8_2_release)

21281

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-1.c (.../branches/gcc-4_8-branch)

21282

@@ -1,5 +1,5 @@

21283

/* { dg-do compile } */

21284

-/* { dg-options "-O2 -mabi=sysv" } */

21285

+/* { dg-options "-O2 -mabi=sysv -maccumulate-outgoing-args" } */

21286

21287

__attribute__ ((ms_abi))

21288

int foo (void)

21289

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-2.c

21290

===================================================================

21291

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-2.c (.../tags/gcc_4_8_2_release)

21292

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-2.c (.../branches/gcc-4_8-branch)

21293

@@ -1,5 +1,5 @@

21294

/* { dg-do compile } */

21295

-/* { dg-options "-O2 -mabi=sysv" } */

21296

+/* { dg-options "-O2 -mabi=sysv -maccumulate-outgoing-args" } */

21297

21298

extern int glb1, gbl2, gbl3;

21299

21300

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c

21301

===================================================================

21302

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c (.../tags/gcc_4_8_2_release)

21303

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c (.../branches/gcc-4_8-branch)

21304

@@ -2,7 +2,7 @@

21305

*/

21306

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

21307

/* { dg-do run } */

21308

-/* { dg-options "-std=gnu99 -ffast-math" } */

21309

+/* { dg-options "-std=gnu99 -ffast-math -maccumulate-outgoing-args" } */

21310

#include "callabi.h"

21311

21312

extern void abort (void);

21313

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c

21314

===================================================================

21315

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c (.../tags/gcc_4_8_2_release)

21316

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c (.../branches/gcc-4_8-branch)

21317

@@ -1,6 +1,6 @@

21318

/* Test for cross x86_64<->w64 abi standard calls via variable. */

21319

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

21320

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

21321

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

21322

/* { dg-additional-sources "func-indirect-2b.c" } */

21323

21324

extern void __attribute__ ((sysv_abi)) abort (void);

21325

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect.c

21326

===================================================================

21327

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect.c (.../tags/gcc_4_8_2_release)

21328

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect.c (.../branches/gcc-4_8-branch)

21329

@@ -2,7 +2,7 @@

21330

*/

21331

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

21332

/* { dg-do run } */

21333

-/* { dg-options "-std=gnu99 -ffast-math" } */

21334

+/* { dg-options "-std=gnu99 -ffast-math -maccumulate-outgoing-args" } */

21335

#include "callabi.h"

21336

21337

extern void abort (void);

21338

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c

21339

===================================================================

21340

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c (.../tags/gcc_4_8_2_release)

21341

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c (.../branches/gcc-4_8-branch)

21342

@@ -1,6 +1,6 @@

21343

/* Test for cross x86_64<->w64 abi standard calls. */

21344

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

21345

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

21346

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

21347

/* { dg-additional-sources "func-2b.c" } */

21348

21349

extern void __attribute__ ((sysv_abi)) abort (void);

21350

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2b.c

21351

===================================================================

21352

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2b.c (.../tags/gcc_4_8_2_release)

21353

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2b.c (.../branches/gcc-4_8-branch)

21354

@@ -1,5 +1,5 @@

21355

/* Test for cross x86_64<->w64 abi standard calls via variable. */

21356

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

21357

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

21358

21359

typedef int (*func)(void *, char *, char *, short, long long);

21360

21361

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2b.c

21362

===================================================================

21363

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2b.c (.../tags/gcc_4_8_2_release)

21364

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2b.c (.../branches/gcc-4_8-branch)

21365

@@ -1,5 +1,5 @@

21366

/* Test for cross x86_64<->w64 abi standard calls. */

21367

-/* { dg-options "-mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

21368

+/* { dg-options "-mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

21369

21370

long double func_cross (long double a, double b, float c, long d, int e,

21371

char f)

21372

Index: gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c

21373

===================================================================

21374

--- a/src/gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c (.../tags/gcc_4_8_2_release)

21375

+++ b/src/gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c (.../branches/gcc-4_8-branch)

21376

@@ -1,37 +0,0 @@

21377

-/* This checks the availability of the XL compiler intrinsics for

21378

- transactional execution with the expected prototypes. */

21379

-

21380

-/* { dg-do compile } */

21381

-/* { dg-options "-O3 -march=zEC12 -mzarch" } */

21382

-

21383

-#include <htmxlintrin.h>

21384

-

21385

-int a = 0;

21386

-unsigned long g;

21387

-

21388

-int

21389

-foo ()

21390

-{

21391

- struct __htm_tdb *tdb_struct;

21392

- void * const tdb = tdb_struct;

21393

- long result;

21394

- unsigned char code;

21395

-

21396

- result = __TM_simple_begin ();

21397

- result = __TM_begin (tdb);

21398

- result = __TM_end ();

21399

- __TM_abort ();

21400

- __TM_named_abort (42);

21401

- __TM_non_transactional_store (&g, 42);

21402

- result = __TM_nesting_depth (tdb);

21403

-

21404

- result = __TM_is_user_abort (tdb);

21405

- result = __TM_is_named_user_abort (tdb, &code);

21406

- result = __TM_is_illegal (tdb);

21407

- result = __TM_is_footprint_exceeded (tdb);

21408

- result = __TM_is_nested_too_deep (tdb);

21409

- result = __TM_is_conflict (tdb);

21410

- result = __TM_is_failure_persistent (result);

21411

- result = __TM_failure_address (tdb);

21412

- result = __TM_failure_code (tdb);

21413

-}

21414

Index: gcc/testsuite/gcc.target/s390/htm-1.c

21415

===================================================================

21416

--- a/src/gcc/testsuite/gcc.target/s390/htm-1.c (.../tags/gcc_4_8_2_release)

21417

+++ b/src/gcc/testsuite/gcc.target/s390/htm-1.c (.../branches/gcc-4_8-branch)

21418

@@ -1,73 +0,0 @@

21419

-/* This checks the availability of the low-level builtins introduced

21420

- for transactional execution. */

21421

-

21422

-/* { dg-do compile } */

21423

-/* { dg-options "-O3 -march=zEC12 -mzarch" } */

21424

-

21425

-#include <stdint.h>

21426

-#include <htmintrin.h>

21427

-

21428

-int global = 0;

21429

-uint64_t g;

21430

-struct __htm_tdb global_tdb;

21431

-

21432

-int

21433

-foo (struct __htm_tdb* tdb, int reg, int *mem, uint64_t *mem64)

21434

-{

21435

-

21436

- int cc;

21437

- int n;

21438

-

21439

- cc = __builtin_tbegin (0);

21440

- cc = __builtin_tbegin (tdb);

21441

- cc = __builtin_tbegin (&global_tdb);

21442

-

21443

- cc = __builtin_tbegin_nofloat (0);

21444

- cc = __builtin_tbegin_nofloat (&global_tdb);

21445

-

21446

- cc = __builtin_tbegin_retry (0, 42);

21447

- cc = __builtin_tbegin_retry (0, reg);

21448

- cc = __builtin_tbegin_retry (0, *mem);

21449

- cc = __builtin_tbegin_retry (0, global);

21450

- cc = __builtin_tbegin_retry (tdb, 42);

21451

- cc = __builtin_tbegin_retry (&global_tdb, 42);

21452

-

21453

- cc = __builtin_tbegin_retry_nofloat (0, 42);

21454

- cc = __builtin_tbegin_retry_nofloat (0, reg);

21455

- cc = __builtin_tbegin_retry_nofloat (0, *mem);

21456

- cc = __builtin_tbegin_retry_nofloat (0, global);

21457

- cc = __builtin_tbegin_retry_nofloat (&global_tdb, 42);

21458

-

21459

- __builtin_tbeginc ();

21460

-

21461

- n = __builtin_tx_nesting_depth();

21462

-

21463

- __builtin_non_tx_store(&g, 23);

21464

- __builtin_non_tx_store(mem64, 23);

21465

- __builtin_non_tx_store(&g, reg);

21466

- __builtin_non_tx_store(&g, *mem);

21467

- __builtin_non_tx_store(&g, global);

21468

-

21469

- __builtin_tabort (42 + 255);

21470

- __builtin_tabort (reg);

21471

- /* { dg-final { scan-assembler-times "tabort\t255" 1 } } */

21472

- __builtin_tabort (reg + 255);

21473

- __builtin_tabort (*mem);

21474

- __builtin_tabort (global);

21475

- /* Here global + 255 gets reloaded into a reg. Better would be to

21476

- just reload global or *mem and get the +255 for free as address

21477

- arithmetic. */

21478

- __builtin_tabort (*mem + 255);

21479

- __builtin_tabort (global + 255);

21480

-

21481

- __builtin_tend();

21482

-

21483

- __builtin_tx_assist (23);

21484

- __builtin_tx_assist (reg);

21485

- __builtin_tx_assist (*mem);

21486

- __builtin_tx_assist (global);

21487

-}

21488

-

21489

-/* Make sure the tdb NULL argument ends up as immediate value in the

21490

- instruction. */

21491

-/* { dg-final { scan-assembler-times "tbegin\t0," 10 } } */

21492

Index: gcc/testsuite/gcc.target/s390/htm-nofloat-2.c

21493

===================================================================

21494

--- a/src/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c (.../tags/gcc_4_8_2_release)

21495

+++ b/src/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c (.../branches/gcc-4_8-branch)

21496

@@ -1,55 +0,0 @@

21497

-/* { dg-do run } */

21498

-/* { dg-options "-O3 -mhtm -Wa,-march=zEC12,-mzarch --save-temps" } */

21499

-

21500

-/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin

21501

- instruction does not automatically preserves them. If the

21502

- transaction body is fully contained in a function the backend tries

21503

- after reload to get rid of the FPR save/restore operations

21504

- triggered by the clobbers. This testcase failed since the backend

21505

- was able to get rid of all FPR saves/restores and since these were

21506

- the only stack operations also of the entire stack space. So even

21507

- the save/restore of the stack pointer was omitted in the end.

21508

- However, since the frame layout has been fixed before, the prologue

21509

- still generated the stack pointer decrement making foo return with

21510

- a modified stack pointer. */

21511

-

21512

-void abort(void);

21513

-

21514

-void __attribute__((noinline))

21515

-foo (int a)

21516

-{

21517

- /* This is just to prevent the tbegin code from actually being

21518

- executed. That way the test may even run on machines prior to

21519

- zEC12. */

21520

- if (a == 42)

21521

- return;

21522

-

21523

- if (__builtin_tbegin (0) == 0)

21524

- __builtin_tend ();

21525

-}

21526

-

21527

-#ifdef __s390x__

21528

-#define GET_STACK_POINTER(SP) \

21529

- asm volatile ("stg %%r15, %0" : "=QRST" (SP));

21530

-#else

21531

-#define GET_STACK_POINTER(SP) \

21532

- asm volatile ("st %%r15, %0" : "=QR" (SP));

21533

-#endif

21534

-

21535

-int main(void)

21536

-{

21537

- unsigned long new_sp, old_sp;

21538

-

21539

- GET_STACK_POINTER (old_sp);

21540

- foo(42);

21541

- GET_STACK_POINTER (new_sp);

21542

-

21543

- if (old_sp != new_sp)

21544

- abort ();

21545

-

21546

- return 0;

21547

-}

21548

-

21549

-/* Make sure no FPR saves/restores are emitted. */

21550

-/* { dg-final { scan-assembler-not "\tstd\t" } } */

21551

-/* { dg-final { scan-assembler-not "\tld\t" } } */

21552

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c

21553

===================================================================

21554

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c (.../tags/gcc_4_8_2_release)

21555

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c (.../branches/gcc-4_8-branch)

21556

@@ -0,0 +1,27 @@

21557

+/* Functional tests for the function hotpatching feature. */

21558

+

21559

+/* { dg-do run } */

21560

+/* { dg-options "-O3 -mzarch -mhotpatch" } */

21561

+

21562

+#include <stdio.h>

21563

+

21564

+void hp1(void)

21565

+{

21566

+ printf("hello, world!\n");

21567

+}

21568

+

21569

+inline void hp2(void)

21570

+{

21571

+ printf("hello, world!\n");

21572

+}

21573

+

21574

+__attribute__ ((always_inline))

21575

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

21576

+{

21577

+ printf("hello, world!\n");

21578

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

21579

+

21580

+int main (void)

21581

+{

21582

+ return 0;

21583

+}

21584

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c

21585

===================================================================

21586

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c (.../tags/gcc_4_8_2_release)

21587

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c (.../branches/gcc-4_8-branch)

21588

@@ -0,0 +1,27 @@

21589

+/* Functional tests for the function hotpatching feature. */

21590

+

21591

+/* { dg-do run } */

21592

+/* { dg-options "-O3 -mzarch -mhotpatch=0" } */

21593

+

21594

+#include <stdio.h>

21595

+

21596

+void hp1(void)

21597

+{

21598

+ printf("hello, world!\n");

21599

+}

21600

+

21601

+inline void hp2(void)

21602

+{

21603

+ printf("hello, world!\n");

21604

+}

21605

+

21606

+__attribute__ ((always_inline))

21607

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

21608

+{

21609

+ printf("hello, world!\n");

21610

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

21611

+

21612

+int main (void)

21613

+{

21614

+ return 0;

21615

+}

21616

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c

21617

===================================================================

21618

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c (.../tags/gcc_4_8_2_release)

21619

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c (.../branches/gcc-4_8-branch)

21620

@@ -0,0 +1,27 @@

21621

+/* Functional tests for the function hotpatching feature. */

21622

+

21623

+/* { dg-do run } */

21624

+/* { dg-options "-O3 -mzarch -mhotpatch=1" } */

21625

+

21626

+#include <stdio.h>

21627

+

21628

+void hp1(void)

21629

+{

21630

+ printf("hello, world!\n");

21631

+}

21632

+

21633

+inline void hp2(void)

21634

+{

21635

+ printf("hello, world!\n");

21636

+}

21637

+

21638

+__attribute__ ((always_inline))

21639

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

21640

+{

21641

+ printf("hello, world!\n");

21642

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

21643

+

21644

+int main (void)

21645

+{

21646

+ return 0;

21647

+}

21648

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c

21649

===================================================================

21650

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c (.../tags/gcc_4_8_2_release)

21651

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c (.../branches/gcc-4_8-branch)

21652

@@ -0,0 +1,11 @@

21653

+/* Functional tests for the function hotpatching feature. */

21654

+

21655

+/* { dg-do compile } */

21656

+/* { dg-options "-O3 -mzarch -mhotpatch=-1" } */

21657

+

21658

+int main (void)

21659

+{

21660

+ return 0;

21661

+}

21662

+

21663

+/* { dg-excess-errors "argument to '-mhotpatch=' should be a non-negative integer" } */

21664

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c

21665

===================================================================

21666

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c (.../tags/gcc_4_8_2_release)

21667

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c (.../branches/gcc-4_8-branch)

21668

@@ -0,0 +1,28 @@

21669

+/* Functional tests for the function hotpatching feature. */

21670

+

21671

+/* { dg-do compile } */

21672

+/* { dg-options "-O3 -mzarch -mhotpatch=1000000" } */

21673

+

21674

+#include <stdio.h>

21675

+

21676

+void hp1(void)

21677

+{

21678

+ printf("hello, world!\n");

21679

+}

21680

+

21681

+__attribute__ ((hotpatch(1000000)))

21682

+void hp2(void)

21683

+{

21684

+ printf("hello, world!\n");

21685

+}

21686

+

21687

+__attribute__ ((hotpatch(1000001)))

21688

+void hp3(void)

21689

+{ /* { dg-error "requested 'hotpatch' attribute is not a non-negative integer constant or too large .max. 1000000." } */

21690

+ printf("hello, world!\n");

21691

+}

21692

+

21693

+int main (void)

21694

+{

21695

+ return 0;

21696

+}

21697

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c

21698

===================================================================

21699

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c (.../tags/gcc_4_8_2_release)

21700

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c (.../branches/gcc-4_8-branch)

21701

@@ -0,0 +1,11 @@

21702

+/* Functional tests for the function hotpatching feature. */

21703

+

21704

+/* { dg-do compile } */

21705

+/* { dg-options "-O3 -mzarch -mhotpatch=1000001" } */

21706

+

21707

+int main (void)

21708

+{

21709

+ return 0;

21710

+}

21711

+

21712

+/* { dg-excess-errors "argument to '-mhotpatch=' is too large .max. 1000000." } */

21713

Index: gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c

21714

===================================================================

21715

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c (.../tags/gcc_4_8_2_release)

21716

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c (.../branches/gcc-4_8-branch)

21717

@@ -0,0 +1,164 @@

21718

+/* This checks the availability of the low-level builtins introduced

21719

+ for transactional execution. */

21720

+

21721

+/* { dg-do compile } */

21722

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

21723

+

21724

+#include <stdint.h>

21725

+#include <htmintrin.h>

21726

+

21727

+int global = 0;

21728

+uint64_t g;

21729

+struct __htm_tdb global_tdb;

21730

+

21731

+int

21732

+foo (struct __htm_tdb* tdb, int reg, int *mem, uint64_t *mem64)

21733

+{

21734

+

21735

+ int cc;

21736

+ int n;

21737

+

21738

+ __builtin_tbegin ((void *)0);

21739

+ __builtin_tbegin ((void *)-99999);

21740

+ __builtin_tbegin ((void *)99999);

21741

+ while (__builtin_tbegin ((void *)0) != 0)

21742

+ {

21743

+ }

21744

+ cc = __builtin_tbegin ((void *)0x12345678);

21745

+ cc = __builtin_tbegin (tdb);

21746

+ cc = __builtin_tbegin (&global_tdb);

21747

+ cc = __builtin_tbegin ((void *)(long)(reg + 0x12345678));

21748

+ cc = __builtin_tbegin ((void *)(long)(reg));

21749

+

21750

+ __builtin_tbegin_nofloat ((void *)0);

21751

+ __builtin_tbegin_nofloat ((void *)-99999);

21752

+ __builtin_tbegin_nofloat ((void *)99999);

21753

+ cc = __builtin_tbegin_nofloat ((void *)0x12345678);

21754

+ cc = __builtin_tbegin_nofloat (tdb);

21755

+ cc = __builtin_tbegin_nofloat (&global_tdb);

21756

+ cc = __builtin_tbegin_nofloat ((void *)(long)(reg + 0x12345678));

21757

+ cc = __builtin_tbegin_nofloat ((void *)(long)(reg));

21758

+

21759

+ __builtin_tbegin_retry ((void *)0, 0);

21760

+ cc = __builtin_tbegin_retry ((void *)0, 1);

21761

+ cc = __builtin_tbegin_retry ((void *)0, -1);

21762

+ cc = __builtin_tbegin_retry ((void *)0, 42);

21763

+ cc = __builtin_tbegin_retry ((void *)0, reg);

21764

+ cc = __builtin_tbegin_retry ((void *)0, *mem);

21765

+ cc = __builtin_tbegin_retry ((void *)0, global);

21766

+ cc = __builtin_tbegin_retry (tdb, 42);

21767

+ cc = __builtin_tbegin_retry (&global_tdb, 42);

21768

+ cc = __builtin_tbegin_retry ((void *)0x12345678, global);

21769

+ cc = __builtin_tbegin_retry (

21770

+ (void *)(long) (reg + 0x12345678), global + 1);

21771

+ cc = __builtin_tbegin_retry (

21772

+ (void *)(long)(reg), global - 1);

21773

+

21774

+ __builtin_tbegin_retry_nofloat ((void *)0, 0);

21775

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, 1);

21776

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, -1);

21777

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, 42);

21778

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, reg);

21779

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, *mem);

21780

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, global);

21781

+ cc = __builtin_tbegin_retry_nofloat (tdb, 42);

21782

+ cc = __builtin_tbegin_retry_nofloat (&global_tdb, 42);

21783

+ cc = __builtin_tbegin_retry_nofloat ((void *)0x12345678, global);

21784

+ cc = __builtin_tbegin_retry_nofloat (

21785

+ (void *)(long) (reg + 0x12345678), global + 1);

21786

+ cc = __builtin_tbegin_retry_nofloat (

21787

+ (void *)(long)(reg), global - 1);

21788

+

21789

+ __builtin_tbeginc ();

21790

+

21791

+ __builtin_tx_nesting_depth ();

21792

+ n = __builtin_tx_nesting_depth ();

21793

+

21794

+ __builtin_non_tx_store (mem64, 0);

21795

+ {

21796

+ const uint64_t val_var = 0x1122334455667788;

21797

+

21798

+ __builtin_non_tx_store (mem64, val_var);

21799

+ }

21800

+ __builtin_non_tx_store (mem64, (uint64_t)reg);

21801

+ __builtin_non_tx_store (mem64, g);

21802

+ __builtin_non_tx_store ((uint64_t *)0, 0);

21803

+ __builtin_non_tx_store ((uint64_t *)0x12345678, 0);

21804

+ __builtin_non_tx_store (&g, 23);

21805

+ __builtin_non_tx_store (&g, reg);

21806

+ __builtin_non_tx_store (&g, *mem);

21807

+ __builtin_non_tx_store (&g, global);

21808

+

21809

+ __builtin_tend();

21810

+

21811

+ __builtin_tx_assist (0);

21812

+ __builtin_tx_assist (1);

21813

+ __builtin_tx_assist (reg);

21814

+ __builtin_tx_assist (*mem);

21815

+ __builtin_tx_assist (global);

21816

+}

21817

+

21818

+/* The taborts must go into separate function since they are

21819

+ "noreturn". */

21820

+

21821

+void

21822

+tabort1 ()

21823

+{

21824

+ __builtin_tabort (256);

21825

+}

21826

+

21827

+void

21828

+tabort2 (int reg)

21829

+{

21830

+ __builtin_tabort (reg);

21831

+}

21832

+

21833

+void

21834

+tabort3 (int reg)

21835

+{

21836

+ /* { dg-final { scan-assembler-times "tabort\t255" 1 } } */

21837

+ __builtin_tabort (reg + 255);

21838

+}

21839

+

21840

+void

21841

+tabort4 (int *mem)

21842

+{

21843

+ __builtin_tabort (*mem);

21844

+}

21845

+

21846

+void

21847

+tabort5 ()

21848

+{

21849

+ __builtin_tabort (global);

21850

+}

21851

+

21852

+void

21853

+tabort6 (int *mem)

21854

+{

21855

+ /* Here global + 255 gets reloaded into a reg. Better would be to

21856

+ just reload global or *mem and get the +255 for free as address

21857

+ arithmetic. */

21858

+ __builtin_tabort (*mem + 255);

21859

+}

21860

+

21861

+void

21862

+tabort7 ()

21863

+{

21864

+ __builtin_tabort (global + 255);

21865

+}

21866

+

21867

+void

21868

+tabort8 ()

21869

+{

21870

+ __builtin_tabort (-1);

21871

+}

21872

+

21873

+

21874

+/* Make sure the tdb NULL argument ends up as immediate value in the

21875

+ instruction. */

21876

+/* { dg-final { scan-assembler-times "tbegin\t0," 17 } } */

21877

+/* { dg-final { scan-assembler-times "tbegin\t" 41 } } */

21878

+/* Check number of occurences of certain instructions. */

21879

+/* { dg-final { scan-assembler-times "tbeginc\t" 1 } } */

21880

+/* { dg-final { scan-assembler-times "tabort\t" 8 } } */

21881

+/* { dg-final { scan-assembler "ppa\t" } } */

21882

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c

21883

===================================================================

21884

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c (.../tags/gcc_4_8_2_release)

21885

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c (.../branches/gcc-4_8-branch)

21886

@@ -0,0 +1,68 @@

21887

+/* Functional tests for the function hotpatching feature. */

21888

+

21889

+/* { dg-do run } */

21890

+/* { dg-options "-O3 -mzarch -mno-hotpatch" } */

21891

+

21892

+#include <stdio.h>

21893

+

21894

+__attribute__ ((hotpatch))

21895

+void hp1(void)

21896

+{

21897

+ printf("hello, world!\n");

21898

+}

21899

+

21900

+__attribute__ ((hotpatch))

21901

+inline void hp2(void)

21902

+{

21903

+ printf("hello, world!\n");

21904

+}

21905

+

21906

+__attribute__ ((hotpatch))

21907

+__attribute__ ((always_inline))

21908

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

21909

+{

21910

+ printf("hello, world!\n");

21911

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

21912

+

21913

+__attribute__ ((hotpatch(0)))

21914

+void hp4(void)

21915

+{

21916

+ printf("hello, world!\n");

21917

+}

21918

+

21919

+__attribute__ ((hotpatch(0)))

21920

+inline void hp5(void)

21921

+{

21922

+ printf("hello, world!\n");

21923

+}

21924

+

21925

+__attribute__ ((hotpatch(0)))

21926

+__attribute__ ((always_inline))

21927

+void hp6(void) /* { dg-warning "always_inline function might not be inlinable" } */

21928

+{

21929

+ printf("hello, world!\n");

21930

+} /* { dg-warning "function 'hp6' with the 'always_inline' attribute is not hotpatchable" } */

21931

+

21932

+__attribute__ ((hotpatch(1)))

21933

+void hp7(void)

21934

+{

21935

+ printf("hello, world!\n");

21936

+}

21937

+

21938

+__attribute__ ((hotpatch(1)))

21939

+inline void hp8(void)

21940

+{

21941

+ printf("hello, world!\n");

21942

+}

21943

+

21944

+__attribute__ ((hotpatch(1)))

21945

+__attribute__ ((always_inline))

21946

+void hp9(void) /* { dg-warning "always_inline function might not be inlinable" } */

21947

+{

21948

+ printf("hello, world!\n");

21949

+} /* { dg-warning "function 'hp9' with the 'always_inline' attribute is not hotpatchable" } */

21950

+

21951

+int main (void)

21952

+{

21953

+ return 0;

21954

+}

21955

Index: gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c

21956

===================================================================

21957

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c (.../tags/gcc_4_8_2_release)

21958

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c (.../branches/gcc-4_8-branch)

21959

@@ -0,0 +1,12 @@

21960

+/* { dg-do compile } */

21961

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

21962

+

21963

+void must_not_compile1 (void)

21964

+{

21965

+ __builtin_tabort (0); /* { dg-error "Invalid transaction abort code:" } */

21966

+}

21967

+

21968

+void must_not_compile2 (void)

21969

+{

21970

+ __builtin_tabort (255); /* { dg-error "Invalid transaction abort code:" } */

21971

+}

21972

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c

21973

===================================================================

21974

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c (.../tags/gcc_4_8_2_release)

21975

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c (.../branches/gcc-4_8-branch)

21976

@@ -0,0 +1,23 @@

21977

+/* Functional tests for the function hotpatching feature. */

21978

+

21979

+/* { dg-do run } */

21980

+/* { dg-options "-O3 -mzarch -mhotpatch" } */

21981

+

21982

+#include <stdio.h>

21983

+

21984

+int hp1(void)

21985

+{

21986

+ int nested1(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */

21987

+ { return 1; }

21988

+

21989

+ __attribute__ ((hotpatch))

21990

+ int nested2(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */

21991

+ { return 1; }

21992

+

21993

+ return nested1() - nested2();

21994

+}

21995

+

21996

+int main (void)

21997

+{

21998

+ return hp1();

21999

+}

22000

Index: gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c

22001

===================================================================

22002

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c (.../tags/gcc_4_8_2_release)

22003

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c (.../branches/gcc-4_8-branch)

22004

@@ -0,0 +1,37 @@

22005

+/* This checks the availability of the XL compiler intrinsics for

22006

+ transactional execution with the expected prototypes. */

22007

+

22008

+/* { dg-do compile } */

22009

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

22010

+

22011

+#include <htmxlintrin.h>

22012

+

22013

+int a = 0;

22014

+unsigned long g;

22015

+

22016

+int

22017

+foo ()

22018

+{

22019

+ struct __htm_tdb *tdb_struct;

22020

+ void * const tdb = tdb_struct;

22021

+ long result;

22022

+ unsigned char code;

22023

+

22024

+ result = __TM_simple_begin ();

22025

+ result = __TM_begin (tdb);

22026

+ result = __TM_end ();

22027

+ __TM_abort ();

22028

+ __TM_named_abort (42);

22029

+ __TM_non_transactional_store (&g, 42);

22030

+ result = __TM_nesting_depth (tdb);

22031

+

22032

+ result = __TM_is_user_abort (tdb);

22033

+ result = __TM_is_named_user_abort (tdb, &code);

22034

+ result = __TM_is_illegal (tdb);

22035

+ result = __TM_is_footprint_exceeded (tdb);

22036

+ result = __TM_is_nested_too_deep (tdb);

22037

+ result = __TM_is_conflict (tdb);

22038

+ result = __TM_is_failure_persistent (result);

22039

+ result = __TM_failure_address (tdb);

22040

+ result = __TM_failure_code (tdb);

22041

+}

22042

Index: gcc/testsuite/gcc.target/s390/s390.exp

22043

===================================================================

22044

--- a/src/gcc/testsuite/gcc.target/s390/s390.exp (.../tags/gcc_4_8_2_release)

22045

+++ b/src/gcc/testsuite/gcc.target/s390/s390.exp (.../branches/gcc-4_8-branch)

22046

@@ -24,6 +24,19 @@

22047

# Load support procs.

22048

load_lib gcc-dg.exp

22049

22050

+# Return 1 if htm (etnd - extract nesting depth) instructions are

22051

+# understood by the assembler and can be executed.

22052

+proc check_effective_target_htm { } {

22053

+ if { ![check_runtime s390_check_htm [subst {

22054

+ int main (void)

22055

+ {

22056

+ unsigned int nd;

22057

+ asm ("etnd %0" : "=d" (nd));

22058

+ return nd;

22059

+ }

22060

+ }] "-march=zEC12 -mzarch" ] } { return 0 } else { return 1 }

22061

+}

22062

+

22063

# If a testcase doesn't have special options, use these.

22064

global DEFAULT_CFLAGS

22065

if ![info exists DEFAULT_CFLAGS] then {

22066

Index: gcc/testsuite/gcc.target/s390/htm-nofloat-1.c

22067

===================================================================

22068

--- a/src/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c (.../tags/gcc_4_8_2_release)

22069

+++ b/src/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c (.../branches/gcc-4_8-branch)

22070

@@ -1,12 +1,50 @@

22071

-/* { dg-do compile } */

22072

-/* { dg-options "-O3 -march=zEC12 -mzarch" } */

22073

+/* { dg-do run } */

22074

+/* { dg-require-effective-target htm } */

22075

+/* { dg-options "-O3 -march=zEC12 -mzarch --save-temps" } */

22076

22077

-int

22078

-foo ()

22079

+/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin

22080

+ instruction does not automatically preserves them. If the

22081

+ transaction body is fully contained in a function the backend tries

22082

+ after reload to get rid of the FPR save/restore operations

22083

+ triggered by the clobbers. This testcase failed since the backend

22084

+ was able to get rid of all FPR saves/restores and since these were

22085

+ the only stack operations also of the entire stack space. So even

22086

+ the save/restore of the stack pointer was omitted in the end.

22087

+ However, since the frame layout has been fixed before, the prologue

22088

+ still generated the stack pointer decrement making foo return with

22089

+ a modified stack pointer. */

22090

+

22091

+void abort(void);

22092

+

22093

+void __attribute__((noinline))

22094

+foo (int a)

22095

{

22096

- __builtin_tbegin_nofloat (0);

22097

- __builtin_tbegin_retry_nofloat (0, 42);

22098

+ if (__builtin_tbegin (0) == 0)

22099

+ __builtin_tend ();

22100

}

22101

+

22102

+#ifdef __s390x__

22103

+#define GET_STACK_POINTER(SP) \

22104

+ asm volatile ("stg %%r15, %0" : "=QRST" (SP));

22105

+#else

22106

+#define GET_STACK_POINTER(SP) \

22107

+ asm volatile ("st %%r15, %0" : "=QR" (SP));

22108

+#endif

22109

+

22110

+int main(void)

22111

+{

22112

+ unsigned long new_sp, old_sp;

22113

+

22114

+ GET_STACK_POINTER (old_sp);

22115

+ foo(42);

22116

+ GET_STACK_POINTER (new_sp);

22117

+

22118

+ if (old_sp != new_sp)

22119

+ abort ();

22120

+

22121

+ return 0;

22122

+}

22123

+

22124

/* Make sure no FPR saves/restores are emitted. */

22125

-/* { dg-final { scan-assembler-not "std" } } */

22126

-/* { dg-final { scan-assembler-not "ld" } } */

22127

+/* { dg-final { scan-assembler-not "\tstd\t" } } */

22128

+/* { dg-final { scan-assembler-not "\tld\t" } } */

22129

Index: gcc/testsuite/gcc.target/s390/hotpatch-1.c

22130

===================================================================

22131

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-1.c (.../tags/gcc_4_8_2_release)

22132

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-1.c (.../branches/gcc-4_8-branch)

22133

@@ -0,0 +1,20 @@

22134

+/* Functional tests for the function hotpatching feature. */

22135

+

22136

+/* { dg-do run } */

22137

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

22138

+

22139

+#include <stdio.h>

22140

+

22141

+void hp1(void)

22142

+{

22143

+ printf("hello, world!\n");

22144

+}

22145

+

22146

+int main (void)

22147

+{

22148

+ return 0;

22149

+}

22150

+

22151

+/* Check number of occurences of certain instructions. */

22152

+/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */

22153

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

22154

Index: gcc/testsuite/gcc.target/s390/hotpatch-2.c

22155

===================================================================

22156

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-2.c (.../tags/gcc_4_8_2_release)

22157

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-2.c (.../branches/gcc-4_8-branch)

22158

@@ -0,0 +1,20 @@

22159

+/* Functional tests for the function hotpatching feature. */

22160

+

22161

+/* { dg-do run } */

22162

+/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */

22163

+

22164

+#include <stdio.h>

22165

+

22166

+void hp1(void)

22167

+{

22168

+ printf("hello, world!\n");

22169

+}

22170

+

22171

+int main (void)

22172

+{

22173

+ return 0;

22174

+}

22175

+

22176

+/* Check number of occurences of certain instructions. */

22177

+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */

22178

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

22179

Index: gcc/testsuite/gcc.target/s390/hotpatch-3.c

22180

===================================================================

22181

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-3.c (.../tags/gcc_4_8_2_release)

22182

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-3.c (.../branches/gcc-4_8-branch)

22183

@@ -0,0 +1,20 @@

22184

+/* Functional tests for the function hotpatching feature. */

22185

+

22186

+/* { dg-do run } */

22187

+/* { dg-options "-O3 -mzarch -mhotpatch=0 --save-temps" } */

22188

+

22189

+#include <stdio.h>

22190

+

22191

+void hp1(void)

22192

+{

22193

+ printf("hello, world!\n");

22194

+}

22195

+

22196

+int main (void)

22197

+{

22198

+ return 0;

22199

+}

22200

+

22201

+/* Check number of occurences of certain instructions. */

22202

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

22203

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

22204

Index: gcc/testsuite/gcc.target/s390/hotpatch-4.c

22205

===================================================================

22206

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-4.c (.../tags/gcc_4_8_2_release)

22207

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-4.c (.../branches/gcc-4_8-branch)

22208

@@ -0,0 +1,26 @@

22209

+/* Functional tests for the function hotpatching feature. */

22210

+

22211

+/* { dg-do run } */

22212

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

22213

+

22214

+#include <stdio.h>

22215

+

22216

+inline void hp1(void)

22217

+{

22218

+ printf("hello, world!\n");

22219

+}

22220

+

22221

+__attribute__ ((always_inline))

22222

+void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */

22223

+{

22224

+ printf("hello, world!\n");

22225

+} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */

22226

+

22227

+int main (void)

22228

+{

22229

+ return 0;

22230

+}

22231

+

22232

+/* Check number of occurences of certain instructions. */

22233

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

22234

+/* { dg-final { scan-assembler-not "nop\t0" } } */

22235

Index: gcc/testsuite/gcc.target/s390/hotpatch-5.c

22236

===================================================================

22237

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-5.c (.../tags/gcc_4_8_2_release)

22238

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-5.c (.../branches/gcc-4_8-branch)

22239

@@ -0,0 +1,21 @@

22240

+/* Functional tests for the function hotpatching feature. */

22241

+

22242

+/* { dg-do run } */

22243

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

22244

+

22245

+#include <stdio.h>

22246

+

22247

+__attribute__ ((hotpatch))

22248

+void hp1(void)

22249

+{

22250

+ printf("hello, world!\n");

22251

+}

22252

+

22253

+int main (void)

22254

+{

22255

+ return 0;

22256

+}

22257

+

22258

+/* Check number of occurences of certain instructions. */

22259

+/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */

22260

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

22261

Index: gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c

22262

===================================================================

22263

--- a/src/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c (.../tags/gcc_4_8_2_release)

22264

+++ b/src/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c (.../branches/gcc-4_8-branch)

22265

@@ -0,0 +1,12 @@

22266

+/* { dg-do compile } */

22267

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

22268

+

22269

+int

22270

+foo ()

22271

+{

22272

+ __builtin_tbegin_nofloat (0);

22273

+ __builtin_tbegin_retry_nofloat (0, 42);

22274

+}

22275

+/* Make sure no FPR saves/restores are emitted. */

22276

+/* { dg-final { scan-assembler-not "std" } } */

22277

+/* { dg-final { scan-assembler-not "ld" } } */

22278

Index: gcc/testsuite/gcc.target/s390/hotpatch-6.c

22279

===================================================================

22280

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-6.c (.../tags/gcc_4_8_2_release)

22281

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-6.c (.../branches/gcc-4_8-branch)

22282

@@ -0,0 +1,21 @@

22283

+/* Functional tests for the function hotpatching feature. */

22284

+

22285

+/* { dg-do run } */

22286

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

22287

+

22288

+#include <stdio.h>

22289

+

22290

+__attribute__ ((hotpatch(1)))

22291

+void hp1(void)

22292

+{

22293

+ printf("hello, world!\n");

22294

+}

22295

+

22296

+int main (void)

22297

+{

22298

+ return 0;

22299

+}

22300

+

22301

+/* Check number of occurences of certain instructions. */

22302

+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */

22303

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

22304

Index: gcc/testsuite/gcc.target/s390/htm-builtins-1.c

22305

===================================================================

22306

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-1.c (.../tags/gcc_4_8_2_release)

22307

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-1.c (.../branches/gcc-4_8-branch)

22308

@@ -0,0 +1,1073 @@

22309

+/* Functional tests of the htm __builtin_... macros. */

22310

+

22311

+/* { dg-do run } */

22312

+/* { dg-require-effective-target htm } */

22313

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

22314

+

22315

+/* ---------------------------- included header files ---------------------- */

22316

+

22317

+#include <stdio.h>

22318

+#include <string.h>

22319

+#include <stdint.h>

22320

+#include <htmintrin.h>

22321

+

22322

+/* ---------------------------- local definitions -------------------------- */

22323

+

22324

+#define DEFAULT_MAX_REPETITIONS 5

22325

+#define DEFAULT_REQUIRED_QUORUM ((DEFAULT_MAX_REPETITIONS) - 1)

22326

+#define NUM_WARMUP_RUNS 10

22327

+

22328

+/* ---------------------------- local macros ------------------------------- */

22329

+

22330

+#define TEST_DF_REP(name) \

22331

+ { #name, name, DEFAULT_MAX_REPETITIONS, DEFAULT_REQUIRED_QUORUM }

22332

+#define TEST_NO_REP(name) { #name, name, 1, 1 }

22333

+

22334

+/* ---------------------------- local types -------------------------------- */

22335

+

22336

+typedef int (*test_func_t)(void);

22337

+

22338

+typedef struct

22339

+{

22340

+ const char *name;

22341

+ test_func_t test_func;

22342

+ int max_repetitions;

22343

+ int required_quorum;

22344

+} test_table_entry_t;

22345

+

22346

+/* ---------------------------- local variables ---------------------------- */

22347

+

22348

+__attribute__ ((aligned(256))) static struct __htm_tdb local_tdb256;

22349

+static struct __htm_tdb local_tdb;

22350

+static int do_dump_tdb = 0;

22351

+

22352

+/* ---------------------------- exported variables (globals) --------------- */

22353

+

22354

+__attribute__ ((aligned(256))) struct

22355

+{

22356

+ float float_1;

22357

+ float float_2;

22358

+ float float_3;

22359

+} global = { 1.0, 2.5, 0.0 };

22360

+

22361

+__attribute__ ((aligned(256))) struct

22362

+{

22363

+ volatile uint64_t c1;

22364

+ volatile uint64_t c2;

22365

+ volatile uint64_t c3;

22366

+} counters = { 0, 0, 0 };

22367

+

22368

+/* ---------------------------- local helper functions --------------------- */

22369

+

22370

+static void dump_tdb (struct __htm_tdb *tdb)

22371

+{

22372

+ unsigned char *p;

22373

+ int i;

22374

+ int j;

22375

+

22376

+ if (do_dump_tdb == 0)

22377

+ {

22378

+ return;

22379

+ }

22380

+ p = (unsigned char *)tdb;

22381

+ for (i = 0; i < 16; i++)

22382

+ {

22383

+ fprintf (stderr, "0x%02x ", i * 16);

22384

+ for (j = 0; j < 16; j++)

22385

+ {

22386

+ fprintf (stderr, "%02x", (int)p[i * 16 + j]);

22387

+ if (j < 15)

22388

+ {

22389

+ fprintf (stderr, " ");

22390

+ }

22391

+ if (j == 7)

22392

+ {

22393

+ fprintf (stderr, " ");

22394

+ }

22395

+ }

22396

+ fprintf (stderr, "\n");

22397

+ }

22398

+

22399

+ return;

22400

+}

22401

+

22402

+/* ---------------------------- local test functions ----------------------- */

22403

+

22404

+/* Check values of the constants defined in htmintrin.h. */

22405

+static int test_constants (void)

22406

+{

22407

+ if (_HTM_TBEGIN_STARTED != 0)

22408

+ {

22409

+ return 100 * _HTM_TBEGIN_STARTED + 1;

22410

+ }

22411

+ if (_HTM_TBEGIN_INDETERMINATE != 1)

22412

+ {

22413

+ return 100 * _HTM_TBEGIN_INDETERMINATE + 2;

22414

+ }

22415

+ if (_HTM_TBEGIN_TRANSIENT != 2)

22416

+ {

22417

+ return 100 * _HTM_TBEGIN_TRANSIENT + 3;

22418

+ }

22419

+ if (_HTM_TBEGIN_PERSISTENT != 3)

22420

+ {

22421

+ return 100 * _HTM_TBEGIN_PERSISTENT + 4;

22422

+ }

22423

+

22424

+ return 0;

22425

+}

22426

+

22427

+static int test_tbegin_ntstg_tend (void)

22428

+{

22429

+ int rc;

22430

+

22431

+ counters.c1 = 0;

22432

+ counters.c2 = 0;

22433

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

22434

+ {

22435

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, 1);

22436

+ counters.c2 = 2;

22437

+ rc = __builtin_tend ();

22438

+ if (rc != 0)

22439

+ {

22440

+ return 100 * rc + 5;

22441

+ }

22442

+ if (counters.c1 != 1)

22443

+ {

22444

+ return 100 * counters.c1 + 2;

22445

+ }

22446

+ if (counters.c2 != 2)

22447

+ {

22448

+ return 100 * counters.c2 + 3;

22449

+ }

22450

+ }

22451

+ else

22452

+ {

22453

+ return 100 * rc + 4;

22454

+ }

22455

+

22456

+ return 0;

22457

+}

22458

+

22459

+static int test_tbegin_ntstg_tabort (void)

22460

+{

22461

+ float f;

22462

+

22463

+ counters.c1 = 0;

22464

+ counters.c2 = 0;

22465

+ f = 0;

22466

+ if (__builtin_tbegin ((void *)0) == 0)

22467

+ {

22468

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, 1);

22469

+ counters.c2 = 2;

22470

+ f = 1;

22471

+ __builtin_tabort (256);

22472

+ return 1;

22473

+ }

22474

+ if (counters.c1 != 1)

22475

+ {

22476

+ return 100 * counters.c1 + 2;

22477

+ }

22478

+ if (counters.c2 != 0)

22479

+ {

22480

+ return 100 * counters.c2 + 3;

22481

+ }

22482

+ if (f != 0)

22483

+ {

22484

+ return 100 * f + 4;

22485

+ }

22486

+

22487

+ return 0;

22488

+}

22489

+

22490

+static int test_tbegin_nofloat (void)

22491

+{

22492

+ int rc;

22493

+

22494

+ counters.c1 = 0;

22495

+ counters.c2 = 0;

22496

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

22497

+ {

22498

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, 1);

22499

+ counters.c2 = 2;

22500

+ rc = __builtin_tend ();

22501

+ if (rc != 0)

22502

+ {

22503

+ return 100 * rc + 5;

22504

+ }

22505

+ if (counters.c1 != 1)

22506

+ {

22507

+ return 100 * counters.c1 + 2;

22508

+ }

22509

+ if (counters.c2 != 2)

22510

+ {

22511

+ return 100 * counters.c2 + 3;

22512

+ }

22513

+ }

22514

+ else

22515

+ {

22516

+ return 100 * rc + 4;

22517

+ }

22518

+

22519

+ return 0;

22520

+}

22521

+

22522

+static int test_tbegin_retry (void)

22523

+{

22524

+ int rc;

22525

+

22526

+ counters.c1 = 0;

22527

+ counters.c2 = 0;

22528

+ counters.c3 = 0;

22529

+ if ((rc = __builtin_tbegin_retry ((void *)0, 5)) == 0)

22530

+ {

22531

+ int do_abort;

22532

+

22533

+ do_abort = (counters.c1 == 0) ? 1 : 0;

22534

+ __builtin_non_tx_store (

22535

+ (uint64_t *)&counters.c1, counters.c1 + 1);

22536

+ if (do_abort == 1)

22537

+ {

22538

+ __builtin_tabort (256);

22539

+ }

22540

+ counters.c2 = counters.c2 + 10;

22541

+ __builtin_non_tx_store ((uint64_t *)&counters.c3, 3);

22542

+ rc = __builtin_tend ();

22543

+ if (rc != 0)

22544

+ {

22545

+ return 100 * rc + 5;

22546

+ }

22547

+ if (counters.c1 != 2)

22548

+ {

22549

+ return 100 * counters.c1 + 2;

22550

+ }

22551

+ if (counters.c2 != 10)

22552

+ {

22553

+ return 100 * counters.c2 + 3;

22554

+ }

22555

+ if (counters.c3 != 3)

22556

+ {

22557

+ return 100 * counters.c3 + 6;

22558

+ }

22559

+ }

22560

+ else

22561

+ {

22562

+ return 100 * rc + 4;

22563

+ }

22564

+

22565

+ return 0;

22566

+}

22567

+

22568

+static int test_tbegin_retry_nofloat (void)

22569

+{

22570

+ int rc;

22571

+

22572

+ counters.c1 = 0;

22573

+ counters.c2 = 0;

22574

+ counters.c3 = 0;

22575

+ if ((rc = __builtin_tbegin_retry_nofloat ((void *)0, 5)) == 0)

22576

+ {

22577

+ int do_abort;

22578

+

22579

+ do_abort = (counters.c1 == 0) ? 1 : 0;

22580

+ __builtin_non_tx_store (

22581

+ (uint64_t *)&counters.c1, counters.c1 + 1);

22582

+ if (do_abort == 1)

22583

+ {

22584

+ __builtin_tabort (256);

22585

+ }

22586

+ counters.c2 = counters.c2 + 10;

22587

+ __builtin_non_tx_store ((uint64_t *)&counters.c3, 3);

22588

+ rc = __builtin_tend ();

22589

+ if (rc != 0)

22590

+ {

22591

+ return 100 * rc + 5;

22592

+ }

22593

+ if (counters.c1 != 2)

22594

+ {

22595

+ return 100 * counters.c1 + 2;

22596

+ }

22597

+ if (counters.c2 != 10)

22598

+ {

22599

+ return 100 * counters.c2 + 3;

22600

+ }

22601

+ if (counters.c3 != 3)

22602

+ {

22603

+ return 100 * counters.c3 + 6;

22604

+ }

22605

+ }

22606

+ else

22607

+ {

22608

+ return 100 * rc + 4;

22609

+ }

22610

+

22611

+ return 0;

22612

+}

22613

+

22614

+static int test_tbegin_aborts (void)

22615

+{

22616

+ float f;

22617

+ int rc;

22618

+

22619

+ f = 77;

22620

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

22621

+ {

22622

+ f = 88;

22623

+ __builtin_tabort (256);

22624

+ return 2;

22625

+ }

22626

+ else if (rc != 2)

22627

+ {

22628

+ return 3;

22629

+ }

22630

+ if (f != 77)

22631

+ {

22632

+ return 4;

22633

+ }

22634

+ f = 66;

22635

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

22636

+ {

22637

+ f = 99;

22638

+ __builtin_tabort (257);

22639

+ return 5;

22640

+ }

22641

+ else if (rc != 3)

22642

+ {

22643

+ return 100 * rc + 6;

22644

+ }

22645

+ if (f != 66)

22646

+ {

22647

+ return 100 * f + 7;

22648

+ }

22649

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

22650

+ {

22651

+ global.float_3 = global.float_1 + global.float_2;

22652

+ rc = __builtin_tend ();

22653

+ if (rc != 0)

22654

+ {

22655

+ return 100 * rc + 8;

22656

+ }

22657

+ }

22658

+ else

22659

+ {

22660

+ return 100 * rc + 9;

22661

+ }

22662

+ if (global.float_3 != global.float_1 + global.float_2)

22663

+ {

22664

+ return 100 * rc + 10;

22665

+ }

22666

+

22667

+ return 0;

22668

+}

22669

+

22670

+static __attribute__((noinline)) void indirect_abort(int abort_code)

22671

+{

22672

+ __builtin_tabort (abort_code);

22673

+

22674

+ return;

22675

+}

22676

+

22677

+static int test_tbegin_indirect_aborts (void)

22678

+{

22679

+ float f;

22680

+ int rc;

22681

+

22682

+ f = 77;

22683

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

22684

+ {

22685

+ f = 88;

22686

+ indirect_abort(256);

22687

+ return 2;

22688

+ }

22689

+ else if (rc != 2)

22690

+ {

22691

+ return 100 * rc + 3;

22692

+ }

22693

+ if (f != 77)

22694

+ {

22695

+ return 100 * rc + 4;

22696

+ }

22697

+ f = 66;

22698

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

22699

+ {

22700

+ f = 99;

22701

+ indirect_abort(257);

22702

+ return 5;

22703

+ }

22704

+ else if (rc != 3)

22705

+ {

22706

+ return 100 * rc + 6;

22707

+ }

22708

+ if (f != 66)

22709

+ {

22710

+ return 100 * f + 7;

22711

+ }

22712

+

22713

+ return 0;

22714

+}

22715

+

22716

+static int test_tbegin_nofloat_aborts (void)

22717

+{

22718

+ int rc;

22719

+

22720

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

22721

+ {

22722

+ __builtin_tabort (256);

22723

+ return 2;

22724

+ }

22725

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

22726

+ {

22727

+ __builtin_tabort (257);

22728

+ return 1005;

22729

+ }

22730

+ else if (rc != 3)

22731

+ {

22732

+ return 1000 * rc + 6;

22733

+ }

22734

+

22735

+ return 0;

22736

+}

22737

+

22738

+static int test_tbegin_nofloat_indirect_aborts (void)

22739

+{

22740

+ int rc;

22741

+

22742

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

22743

+ {

22744

+ indirect_abort (256);

22745

+ return 2;

22746

+ }

22747

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

22748

+ {

22749

+ indirect_abort (257);

22750

+ return 1005;

22751

+ }

22752

+ else if (rc != 3)

22753

+ {

22754

+ return 1000 * rc + 6;

22755

+ }

22756

+

22757

+ return 0;

22758

+}

22759

+

22760

+static

22761

+int _test_tbegin_retry_aborts (int retries, uint64_t abort_code)

22762

+{

22763

+ int rc;

22764

+

22765

+ counters.c1 = 0;

22766

+ if ((rc = __builtin_tbegin_retry ((void *)0, retries)) == 0)

22767

+ {

22768

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, counters.c1 + 1);

22769

+ __builtin_tabort (abort_code);

22770

+ return 2;

22771

+ }

22772

+ else

22773

+ {

22774

+ if ((abort_code & 1) == 0)

22775

+ {

22776

+ if (rc != 2)

22777

+ {

22778

+ return 100 * rc + 2003;

22779

+ }

22780

+ else if (counters.c1 != (uint64_t)retries + 1)

22781

+ {

22782

+ return 1000 * counters.c1 + 100 * retries + 4;

22783

+ }

22784

+ }

22785

+ else

22786

+ {

22787

+ if (rc != 3)

22788

+ {

22789

+ return 100 * rc + 3005;

22790

+ }

22791

+ else if (counters.c1 != 1)

22792

+ {

22793

+ return 1000 * counters.c1 + 100 * retries + 6;

22794

+ }

22795

+ }

22796

+ }

22797

+

22798

+ return 0;

22799

+}

22800

+

22801

+static int test_tbegin_retry_aborts (void)

22802

+{

22803

+ int rc;

22804

+ int retries;

22805

+

22806

+ for (retries = 1; retries <= 3; retries++)

22807

+ {

22808

+ rc = _test_tbegin_retry_aborts (retries, 256);

22809

+ if (rc != 0)

22810

+ {

22811

+ return 10000 + rc;

22812

+ }

22813

+ }

22814

+ for (retries = 1; retries <= 3; retries++)

22815

+ {

22816

+ rc = _test_tbegin_retry_aborts (retries, 257);

22817

+ if (rc != 0)

22818

+ {

22819

+ return 20000 + rc;

22820

+ }

22821

+ }

22822

+ if ((rc = __builtin_tbegin_retry ((void *)0, 5)) == 0)

22823

+ {

22824

+ global.float_3 = global.float_1 + global.float_2;

22825

+ rc = __builtin_tend ();

22826

+ if (rc != 0)

22827

+ {

22828

+ return 30000 + 100 * rc + 6;

22829

+ }

22830

+ }

22831

+ else

22832

+ {

22833

+ return 30000 + 100 * rc + 7;

22834

+ }

22835

+

22836

+ return 0;

22837

+}

22838

+

22839

+static int _test_tbegin_retry_nofloat_aborts (int retries, uint64_t abort_code)

22840

+{

22841

+ int rc;

22842

+

22843

+ counters.c1 = 0;

22844

+ if ((rc = __builtin_tbegin_retry_nofloat ((void *)0, retries)) == 0)

22845

+ {

22846

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, counters.c1 + 1);

22847

+ __builtin_tabort (abort_code);

22848

+ return 2;

22849

+ }

22850

+ else

22851

+ {

22852

+ if ((abort_code & 1) == 0)

22853

+ {

22854

+ if (rc != 2)

22855

+ {

22856

+ return 100 * rc + 2003;

22857

+ }

22858

+ else if (counters.c1 != (uint64_t)retries + 1)

22859

+ {

22860

+ return 1000 * counters.c1 + 100 * retries + 4;

22861

+ }

22862

+ }

22863

+ else

22864

+ {

22865

+ if (rc != 3)

22866

+ {

22867

+ return 100 * rc + 3005;

22868

+ }

22869

+ else if (counters.c1 != 1)

22870

+ {

22871

+ return 1000 * counters.c1 + 100 * retries + 6;

22872

+ }

22873

+ }

22874

+ }

22875

+

22876

+ return 0;

22877

+}

22878

+

22879

+static int test_tbegin_retry_nofloat_aborts (void)

22880

+{

22881

+ int rc;

22882

+ int retries;

22883

+

22884

+ for (retries = 1; retries <= 3; retries++)

22885

+ {

22886

+ rc = _test_tbegin_retry_nofloat_aborts (retries, 256);

22887

+ if (rc != 0)

22888

+ {

22889

+ return 10 * retries + rc;

22890

+ }

22891

+ }

22892

+ for (retries = 1; retries <= 3; retries++)

22893

+ {

22894

+ rc = _test_tbegin_retry_nofloat_aborts (retries, 257);

22895

+ if (rc != 0)

22896

+ {

22897

+ return 10000 + 10 * retries + rc;

22898

+ }

22899

+ }

22900

+

22901

+ return 0;

22902

+}

22903

+

22904

+static int test_tbegin_tdb (void)

22905

+{

22906

+ int rc;

22907

+

22908

+ local_tdb.format = 0;

22909

+ if ((rc = __builtin_tbegin (&local_tdb)) == 0)

22910

+ {

22911

+ rc = __builtin_tend ();

22912

+ if (rc != 0)

22913

+ {

22914

+ return 100 * rc + 1;

22915

+ }

22916

+ if (local_tdb.format != 0)

22917

+ {

22918

+ dump_tdb (&local_tdb);

22919

+ return 100 * local_tdb.format + 2;

22920

+ }

22921

+ }

22922

+ else

22923

+ {

22924

+ return 100 * rc + 3;

22925

+ }

22926

+ local_tdb.format = 0;

22927

+ if ((rc = __builtin_tbegin (&local_tdb)) == 0)

22928

+ {

22929

+ __builtin_tabort (257);

22930

+ return 4;

22931

+ }

22932

+ else

22933

+ {

22934

+ if (rc != 3)

22935

+ {

22936

+ return 100 * rc + 5;

22937

+ }

22938

+ if (local_tdb.format != 1)

22939

+ {

22940

+ dump_tdb (&local_tdb);

22941

+ return 100 * local_tdb.format + 6;

22942

+ }

22943

+ }

22944

+ local_tdb256.format = 0;

22945

+ if ((rc = __builtin_tbegin (&local_tdb256)) == 0)

22946

+ {

22947

+ rc = __builtin_tend ();

22948

+ if (rc != 0)

22949

+ {

22950

+ return 1100 * rc + 1;

22951

+ }

22952

+ if (local_tdb256.format != 0)

22953

+ {

22954

+ dump_tdb (&local_tdb256);

22955

+ return 1100 * local_tdb256.format + 2;

22956

+ }

22957

+ }

22958

+ else

22959

+ {

22960

+ return 1100 * rc + 3;

22961

+ }

22962

+ local_tdb256.format = 0;

22963

+ if ((rc = __builtin_tbegin (&local_tdb256)) == 0)

22964

+ {

22965

+ __builtin_tabort (257);

22966

+ return 2004;

22967

+ }

22968

+ else

22969

+ {

22970

+ if (rc != 3)

22971

+ {

22972

+ return 2100 * rc + 5;

22973

+ }

22974

+ if (local_tdb256.format != 1)

22975

+ {

22976

+ dump_tdb (&local_tdb256);

22977

+ return 2100 * local_tdb256.format + 6;

22978

+ }

22979

+ }

22980

+

22981

+ return 0;

22982

+}

22983

+

22984

+static int test_tbegin_nofloat_tdb (void)

22985

+{

22986

+ int rc;

22987

+

22988

+ local_tdb.format = 0;

22989

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb)) == 0)

22990

+ {

22991

+ rc = __builtin_tend ();

22992

+ if (rc != 0)

22993

+ {

22994

+ return 100 * rc + 1;

22995

+ }

22996

+ if (local_tdb.format != 0)

22997

+ {

22998

+ dump_tdb (&local_tdb);

22999

+ return 100 * local_tdb.format + 2;

23000

+ }

23001

+ }

23002

+ else

23003

+ {

23004

+ return 3;

23005

+ }

23006

+ local_tdb.format = 0;

23007

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb)) == 0)

23008

+ {

23009

+ __builtin_tabort (257);

23010

+ return 4;

23011

+ }

23012

+ else

23013

+ {

23014

+ if (rc != 3)

23015

+ {

23016

+ return 100 * rc + 5;

23017

+ }

23018

+ if (local_tdb.format != 1)

23019

+ {

23020

+ dump_tdb (&local_tdb);

23021

+ return 100 * local_tdb.format + 6;

23022

+ }

23023

+ }

23024

+ local_tdb256.format = 0;

23025

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb256)) == 0)

23026

+ {

23027

+ rc = __builtin_tend ();

23028

+ if (rc != 0)

23029

+ {

23030

+ return 1100 * rc + 1;

23031

+ }

23032

+ if (local_tdb256.format != 0)

23033

+ {

23034

+ dump_tdb (&local_tdb256);

23035

+ return 1100 * local_tdb256.format + 2;

23036

+ }

23037

+ }

23038

+ else

23039

+ {

23040

+ return 1003;

23041

+ }

23042

+ local_tdb256.format = 0;

23043

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb256)) == 0)

23044

+ {

23045

+ __builtin_tabort (257);

23046

+ return 2004;

23047

+ }

23048

+ else

23049

+ {

23050

+ if (rc != 3)

23051

+ {

23052

+ return 2100 * rc + 5;

23053

+ }

23054

+ if (local_tdb256.format != 1)

23055

+ {

23056

+ dump_tdb (&local_tdb256);

23057

+ return 2100 * local_tdb256.format + 6;

23058

+ }

23059

+ }

23060

+

23061

+ return 0;

23062

+}

23063

+

23064

+static int test_tbegin_retry_tdb (void)

23065

+{

23066

+ int rc;

23067

+

23068

+ local_tdb256.format = 0;

23069

+ if ((rc = __builtin_tbegin_retry (&local_tdb256, 2)) == 0)

23070

+ {

23071

+ rc = __builtin_tend ();

23072

+ if (rc != 0)

23073

+ {

23074

+ return 1100 * rc + 1;

23075

+ }

23076

+ if (local_tdb256.format != 0)

23077

+ {

23078

+ dump_tdb (&local_tdb256);

23079

+ return 1100 * local_tdb256.format + 2;

23080

+ }

23081

+ }

23082

+ else

23083

+ {

23084

+ return 1003;

23085

+ }

23086

+ local_tdb256.format = 0;

23087

+ if ((rc = __builtin_tbegin_retry (&local_tdb256, 2)) == 0)

23088

+ {

23089

+ __builtin_tabort (257);

23090

+ return 2004;

23091

+ }

23092

+ else

23093

+ {

23094

+ if (rc != 3)

23095

+ {

23096

+ return 2100 * rc + 5;

23097

+ }

23098

+ if (local_tdb256.format != 1)

23099

+ {

23100

+ dump_tdb (&local_tdb256);

23101

+ return 2100 * local_tdb256.format + 6;

23102

+ }

23103

+ }

23104

+

23105

+ return 0;

23106

+}

23107

+

23108

+static int test_tbegin_retry_nofloat_tdb (void)

23109

+{

23110

+ int rc;

23111

+

23112

+ local_tdb.format = 0;

23113

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb, 2)) == 0)

23114

+ {

23115

+ rc = __builtin_tend ();

23116

+ if (rc != 0)

23117

+ {

23118

+ return 100 * rc + 1;

23119

+ }

23120

+ if (local_tdb.format != 0)

23121

+ {

23122

+ dump_tdb (&local_tdb);

23123

+ return 100 * local_tdb.format + 2;

23124

+ }

23125

+ }

23126

+ else

23127

+ {

23128

+ return 100 * rc + 3;

23129

+ }

23130

+ local_tdb.format = 0;

23131

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb, 2)) == 0)

23132

+ {

23133

+ __builtin_tabort (257);

23134

+ return 4;

23135

+ }

23136

+ else

23137

+ {

23138

+ if (rc != 3)

23139

+ {

23140

+ return 100 * rc + 5;

23141

+ }

23142

+ if (local_tdb.format != 1)

23143

+ {

23144

+ dump_tdb (&local_tdb);

23145

+ return 100 * local_tdb.format + 6;

23146

+ }

23147

+ }

23148

+ local_tdb256.format = 0;

23149

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb256, 2)) == 0)

23150

+ {

23151

+ rc = __builtin_tend ();

23152

+ if (rc != 0)

23153

+ {

23154

+ return 1100 * rc + 1;

23155

+ }

23156

+ if (local_tdb256.format != 0)

23157

+ {

23158

+ dump_tdb (&local_tdb256);

23159

+ return 1100 * local_tdb256.format + 2;

23160

+ }

23161

+ }

23162

+ else

23163

+ {

23164

+ return 1100 * rc + 3;

23165

+ }

23166

+ local_tdb256.format = 0;

23167

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb256, 2)) == 0)

23168

+ {

23169

+ __builtin_tabort (257);

23170

+ return 2004;

23171

+ }

23172

+ else

23173

+ {

23174

+ if (rc != 3)

23175

+ {

23176

+ return 2100 * rc + 5;

23177

+ }

23178

+ if (local_tdb256.format != 1)

23179

+ {

23180

+ dump_tdb (&local_tdb256);

23181

+ return 2100 * local_tdb256.format + 6;

23182

+ }

23183

+ }

23184

+

23185

+ return 0;

23186

+}

23187

+

23188

+static int test_etnd (void)

23189

+{

23190

+ int rc;

23191

+

23192

+ counters.c1 = 0;

23193

+ counters.c2 = 0;

23194

+ counters.c3 = 0;

23195

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

23196

+ {

23197

+ counters.c1 = __builtin_tx_nesting_depth ();

23198

+ if (__builtin_tbegin ((void *)0) == 0)

23199

+ {

23200

+ counters.c2 = __builtin_tx_nesting_depth ();

23201

+ if (__builtin_tbegin ((void *)0) == 0)

23202

+ {

23203

+ counters.c3 = __builtin_tx_nesting_depth ();

23204

+ __builtin_tend ();

23205

+ }

23206

+ __builtin_tend ();

23207

+ }

23208

+ __builtin_tend ();

23209

+ }

23210

+ else

23211

+ {

23212

+ return 100 * rc + 1;

23213

+ }

23214

+ if (counters.c1 != 1)

23215

+ {

23216

+ return 100 * counters.c1 + 2;

23217

+ }

23218

+ if (counters.c2 != 2)

23219

+ {

23220

+ return 100 * counters.c2 + 3;

23221

+ }

23222

+ if (counters.c3 != 3)

23223

+ {

23224

+ return 100 * counters.c3 + 4;

23225

+ }

23226

+

23227

+ return 0;

23228

+}

23229

+

23230

+static int test_tbeginc (void)

23231

+{

23232

+ int rc;

23233

+

23234

+ counters.c1 = 0;

23235

+ __builtin_tbeginc ();

23236

+ counters.c1 = 1;

23237

+ rc = __builtin_tend ();

23238

+ if (rc != 0)

23239

+ {

23240

+ return 10000 * rc + 1;

23241

+ }

23242

+ if (counters.c1 != 1)

23243

+ {

23244

+ return 100000 * counters.c1 + 3;

23245

+ }

23246

+

23247

+ return 0;

23248

+}

23249

+

23250

+/* ---------------------------- local testing framework functions ---------- */

23251

+

23252

+static int run_one_test (const test_table_entry_t *test_entry)

23253

+{

23254

+ int do_print_passes;

23255

+ int succeeded;

23256

+ int rc;

23257

+ int i;

23258

+

23259

+ /* Warmup run to get all necessary data and instruction pages into the page

23260

+ * tables. */

23261

+ {

23262

+ int run;

23263

+

23264

+ do_dump_tdb = 0;

23265

+ for (run = 0; run < NUM_WARMUP_RUNS; run++)

23266

+ {

23267

+ test_entry->test_func ();

23268

+ }

23269

+ do_dump_tdb = 1;

23270

+ }

23271

+ do_print_passes = (

23272

+ test_entry->required_quorum != 1 ||

23273

+ test_entry->max_repetitions != 1);

23274

+ printf ("RRR RUN %s\n", test_entry->name);

23275

+ if (do_print_passes == 1)

23276

+ {

23277

+ printf (

23278

+ " (requires %d successful out of %d runs)\n",

23279

+ test_entry->required_quorum,

23280

+ test_entry->max_repetitions);

23281

+ }

23282

+ succeeded = 0;

23283

+ rc = 0;

23284

+ for (rc = 0, i = 0; i < test_entry->max_repetitions; i++)

23285

+ {

23286

+ if (do_print_passes == 1)

23287

+ {

23288

+ if (i == 0)

23289

+ {

23290

+ printf (" ");

23291

+ }

23292

+ else

23293

+ {

23294

+ printf (",");

23295

+ }

23296

+ }

23297

+ rc = test_entry->test_func ();

23298

+ if (rc == 0)

23299

+ {

23300

+ if (do_print_passes == 1)

23301

+ {

23302

+ printf (" success");

23303

+ }

23304

+ succeeded++;

23305

+ if (succeeded >= test_entry->required_quorum)

23306

+ {

23307

+ break;

23308

+ }

23309

+ }

23310

+ else

23311

+ {

23312

+ printf (" failed (rc = %d)", rc);

23313

+ }

23314

+ }

23315

+ if (do_print_passes == 1 || rc != 0)

23316

+ {

23317

+ printf ("\n");

23318

+ }

23319

+ if (succeeded >= test_entry->required_quorum)

23320

+ {

23321

+ printf ("+++ OK %s\n", test_entry->name);

23322

+

23323

+ return 0;

23324

+ }

23325

+ else

23326

+ {

23327

+ printf ("--- FAIL %s\n", test_entry->name);

23328

+

23329

+ return (rc != 0) ? rc : -1;

23330

+ }

23331

+}

23332

+

23333

+static int run_all_tests (const test_table_entry_t *test_table)

23334

+{

23335

+ const test_table_entry_t *test;

23336

+ int rc;

23337

+

23338

+ for (

23339

+ rc = 0, test = &test_table[0];

23340

+ test->test_func != NULL && rc == 0; test++)

23341

+ {

23342

+ rc = run_one_test (test);

23343

+ }

23344

+

23345

+ return rc;

23346

+}

23347

+

23348

+/* ---------------------------- interface functions ------------------------ */

23349

+

23350

+int main (void)

23351

+{

23352

+ const test_table_entry_t test_table[] = {

23353

+ TEST_NO_REP (test_constants),

23354

+ TEST_DF_REP (test_tbegin_ntstg_tend),

23355

+ TEST_DF_REP (test_tbegin_ntstg_tabort),

23356

+ TEST_DF_REP (test_tbegin_nofloat),

23357

+ TEST_NO_REP (test_tbegin_retry),

23358

+ TEST_NO_REP (test_tbegin_retry_nofloat),

23359

+ TEST_DF_REP (test_tbegin_aborts),

23360

+ TEST_DF_REP (test_tbegin_indirect_aborts),

23361

+ TEST_DF_REP (test_tbegin_nofloat_aborts),

23362

+ TEST_DF_REP (test_tbegin_nofloat_indirect_aborts),

23363

+ TEST_NO_REP (test_tbegin_retry_aborts),

23364

+ TEST_NO_REP (test_tbegin_retry_nofloat_aborts),

23365

+ TEST_DF_REP (test_tbegin_tdb),

23366

+ TEST_DF_REP (test_tbegin_nofloat_tdb),

23367

+ TEST_NO_REP (test_tbegin_retry_tdb),

23368

+ TEST_NO_REP (test_tbegin_retry_nofloat_tdb),

23369

+ TEST_DF_REP (test_etnd),

23370

+ TEST_DF_REP (test_tbeginc),

23371

+ { (void *)0, 0, 0 }

23372

+ };

23373

+

23374

+ {

23375

+ int rc;

23376

+

23377

+ rc = run_all_tests (test_table);

23378

+

23379

+ return rc;

23380

+ }

23381

+}

23382

Index: gcc/testsuite/gcc.target/s390/hotpatch-7.c

23383

===================================================================

23384

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-7.c (.../tags/gcc_4_8_2_release)

23385

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-7.c (.../branches/gcc-4_8-branch)

23386

@@ -0,0 +1,21 @@

23387

+/* Functional tests for the function hotpatching feature. */

23388

+

23389

+/* { dg-do run } */

23390

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

23391

+

23392

+#include <stdio.h>

23393

+

23394

+__attribute__ ((hotpatch(0)))

23395

+void hp1(void)

23396

+{

23397

+ printf("hello, world!\n");

23398

+}

23399

+

23400

+int main (void)

23401

+{

23402

+ return 0;

23403

+}

23404

+

23405

+/* Check number of occurences of certain instructions. */

23406

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

23407

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

23408

Index: gcc/testsuite/gcc.target/s390/htm-builtins-2.c

23409

===================================================================

23410

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-2.c (.../tags/gcc_4_8_2_release)

23411

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-2.c (.../branches/gcc-4_8-branch)

23412

@@ -0,0 +1,682 @@

23413

+/* Functional tests of the htm __TM_... macros. */

23414

+

23415

+/* { dg-do run } */

23416

+/* { dg-require-effective-target htm } */

23417

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23418

+

23419

+/* ---------------------------- included header files ---------------------- */

23420

+

23421

+#include <stdio.h>

23422

+#include <string.h>

23423

+#include <inttypes.h>

23424

+#include <htmxlintrin.h>

23425

+

23426

+/* ---------------------------- local definitions -------------------------- */

23427

+

23428

+#define DEFAULT_MAX_REPETITIONS 5

23429

+#define DEFAULT_REQUIRED_QUORUM ((DEFAULT_MAX_REPETITIONS) - 1)

23430

+#define DEFAULT_ABORT_ADDRESS (0x12345678u)

23431

+

23432

+/* ---------------------------- local macros ------------------------------- */

23433

+

23434

+#define TEST_DF_REP(name) \

23435

+ { #name, name, DEFAULT_MAX_REPETITIONS, DEFAULT_REQUIRED_QUORUM }

23436

+#define TEST_NO_REP(name) { #name, name, 1, 1 }

23437

+

23438

+/* ---------------------------- local types -------------------------------- */

23439

+

23440

+typedef int (*test_func_t)(void);

23441

+

23442

+typedef struct

23443

+{

23444

+ const char *name;

23445

+ test_func_t test_func;

23446

+ int max_repetitions;

23447

+ int required_quorum;

23448

+} test_table_entry_t;

23449

+

23450

+typedef enum

23451

+{

23452

+ ABORT_T_SYSTEM = 0,

23453

+ ABORT_T_USER = 1,

23454

+} abort_user_t;

23455

+

23456

+typedef enum

23457

+{

23458

+ ABORT_T_NONE = 0,

23459

+ ABORT_T_ILLEGAL,

23460

+ ABORT_T_FOOTPRINT_EXCEEDED,

23461

+ ABORT_T_NESTED_TOO_DEEP,

23462

+ ABORT_T_CONFLICT,

23463

+

23464

+ ABORT_T_INVALID_ABORT_CODE

23465

+} abort_t;

23466

+

23467

+/* ---------------------------- local variables ---------------------------- */

23468

+

23469

+__attribute__ ((aligned(256))) static struct __htm_tdb local_tdb256;

23470

+static struct __htm_tdb local_tdb;

23471

+

23472

+static abort_t const abort_classes[] =

23473

+{

23474

+ ABORT_T_INVALID_ABORT_CODE,

23475

+ ABORT_T_NONE,

23476

+ ABORT_T_NONE,

23477

+ ABORT_T_NONE,

23478

+

23479

+ ABORT_T_ILLEGAL,

23480

+ ABORT_T_NONE,

23481

+ ABORT_T_NONE,

23482

+ ABORT_T_FOOTPRINT_EXCEEDED,

23483

+

23484

+ ABORT_T_FOOTPRINT_EXCEEDED,

23485

+ ABORT_T_CONFLICT,

23486

+ ABORT_T_CONFLICT,

23487

+ ABORT_T_ILLEGAL,

23488

+

23489

+ ABORT_T_NONE,

23490

+ ABORT_T_NESTED_TOO_DEEP,

23491

+ ABORT_T_NONE,

23492

+ ABORT_T_NONE,

23493

+

23494

+ ABORT_T_NONE

23495

+};

23496

+

23497

+static size_t num_abort_classes = sizeof(abort_classes) / sizeof(abort_t);

23498

+

23499

+/* ---------------------------- exported variables (globals) --------------- */

23500

+

23501

+int global_int = 0;

23502

+uint64_t global_u64 = 0;

23503

+float global_float_1 = 1.0;

23504

+float global_float_2 = 2.5;

23505

+float global_float_3 = 0.0;

23506

+__attribute__ ((aligned(256))) struct

23507

+{

23508

+ volatile uint64_t c1;

23509

+ volatile uint64_t c2;

23510

+ volatile uint64_t c3;

23511

+} counters = { 0, 0, 0 };

23512

+

23513

+/* ---------------------------- local helper functions --------------------- */

23514

+

23515

+static void dump_tdb(struct __htm_tdb *tdb)

23516

+{

23517

+ unsigned char *p;

23518

+ int i;

23519

+ int j;

23520

+

23521

+ p = (unsigned char *)tdb;

23522

+ for (i = 0; i < 16; i++)

23523

+ {

23524

+ fprintf(stderr, "0x%02x ", i * 16);

23525

+ for (j = 0; j < 16; j++)

23526

+ {

23527

+ fprintf(stderr, "%02x", (int)p[i * 16 + j]);

23528

+ if (j < 15)

23529

+ {

23530

+ fprintf(stderr, " ");

23531

+ }

23532

+ if (j == 7)

23533

+ {

23534

+ fprintf(stderr, " ");

23535

+ }

23536

+ }

23537

+ fprintf(stderr, "\n");

23538

+ }

23539

+

23540

+ return;

23541

+}

23542

+

23543

+static void make_fake_tdb(struct __htm_tdb *tdb)

23544

+{

23545

+ memset(tdb, 0, sizeof(*tdb));

23546

+ tdb->format = 1;

23547

+ tdb->nesting_depth = 1;

23548

+ tdb->atia = DEFAULT_ABORT_ADDRESS;

23549

+ tdb->abort_code = 11;

23550

+

23551

+ return;

23552

+}

23553

+

23554

+static int check_abort_code_in_tdb(struct __htm_tdb *tdb, uint64_t abort_code)

23555

+{

23556

+ long expect_rc;

23557

+ long rc;

23558

+

23559

+ if (abort_code != 0)

23560

+ {

23561

+ long addr;

23562

+

23563

+ addr = __TM_failure_address(&local_tdb);

23564

+ if (addr != DEFAULT_ABORT_ADDRESS)

23565

+ {

23566

+ return 11;

23567

+ }

23568

+ }

23569

+ {

23570

+ long long tdb_abort_code;

23571

+

23572

+ tdb_abort_code = __TM_failure_code(tdb);

23573

+ if ((uint64_t)tdb_abort_code != abort_code)

23574

+ {

23575

+ fprintf(

23576

+ stderr, "tm_ac %" PRIu64 ", ac %" PRIu64

23577

+ ", tdb_ac %" PRIu64 "\n",

23578

+ (uint64_t)tdb_abort_code, abort_code,

23579

+ (uint64_t)tdb->abort_code);

23580

+ return 10;

23581

+ }

23582

+ }

23583

+ expect_rc = (abort_code >= 256) ? 1 : 0;

23584

+ rc = __TM_is_user_abort(tdb);

23585

+ if (rc != expect_rc)

23586

+ {

23587

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

23588

+ return 1;

23589

+ }

23590

+ {

23591

+ unsigned char code;

23592

+

23593

+ code = 0xffu;

23594

+ rc = __TM_is_named_user_abort(tdb, &code);

23595

+ if (rc != expect_rc)

23596

+ {

23597

+ fprintf(

23598

+ stderr, "rc %ld, expect_rc %ld\n", rc,

23599

+ expect_rc);

23600

+ return 2;

23601

+ }

23602

+ if (expect_rc == 1 && code != abort_code - 256)

23603

+ {

23604

+ return 3;

23605

+ }

23606

+ }

23607

+ if (abort_code > (uint64_t)num_abort_classes)

23608

+ {

23609

+ abort_code = (uint64_t)num_abort_classes;

23610

+ }

23611

+ expect_rc = (abort_classes[abort_code] == ABORT_T_ILLEGAL) ? 1 : 0;

23612

+ rc = __TM_is_illegal(tdb);

23613

+ if (rc != expect_rc)

23614

+ {

23615

+ dump_tdb(tdb);

23616

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

23617

+ return 4;

23618

+ }

23619

+ expect_rc =

23620

+ (abort_classes[abort_code] == ABORT_T_FOOTPRINT_EXCEEDED) ?

23621

+ 1 : 0;

23622

+ rc = __TM_is_footprint_exceeded(tdb);

23623

+ if (rc != expect_rc)

23624

+ {

23625

+ dump_tdb(tdb);

23626

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

23627

+ return 5;

23628

+ }

23629

+ expect_rc =

23630

+ (abort_classes[abort_code] == ABORT_T_NESTED_TOO_DEEP) ? 1 : 0;

23631

+ rc = __TM_is_nested_too_deep(tdb);

23632

+ if (rc != expect_rc)

23633

+ {

23634

+ dump_tdb(tdb);

23635

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

23636

+ return 6;

23637

+ }

23638

+ expect_rc = (abort_classes[abort_code] == ABORT_T_CONFLICT) ? 1 : 0;

23639

+ rc = __TM_is_conflict(tdb);

23640

+ if (rc != expect_rc)

23641

+ {

23642

+ dump_tdb(tdb);

23643

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

23644

+ return 7;

23645

+ }

23646

+

23647

+ return 0;

23648

+}

23649

+

23650

+/* ---------------------------- local test functions ----------------------- */

23651

+

23652

+/* Not a test; make sure that the involved global cachelines are reserved for

23653

+ * writing. */

23654

+static int init_cache(void)

23655

+{

23656

+ make_fake_tdb(&local_tdb);

23657

+ make_fake_tdb(&local_tdb256);

23658

+ global_int = 0;

23659

+ global_u64 = 0;

23660

+ global_float_1 = 1.0;

23661

+ global_float_2 = 2.5;

23662

+ global_float_3 = 0.0;

23663

+ counters.c1 = 0;

23664

+ counters.c2 = 0;

23665

+ counters.c3 = 0;

23666

+

23667

+ return 0;

23668

+}

23669

+

23670

+static int test_abort_classification(void)

23671

+{

23672

+ int i;

23673

+

23674

+ make_fake_tdb(&local_tdb);

23675

+ for (i = 0; i <= 256; i++)

23676

+ {

23677

+ int rc;

23678

+

23679

+ local_tdb.abort_code = (uint64_t)i;

23680

+ rc = check_abort_code_in_tdb(&local_tdb, (uint64_t)i);

23681

+ if (rc != 0)

23682

+ {

23683

+ return 100 * i + rc;

23684

+ }

23685

+ }

23686

+

23687

+ return 0;

23688

+}

23689

+

23690

+static int test_cc_classification(void)

23691

+{

23692

+ long rc;

23693

+

23694

+ rc = __TM_is_failure_persistent(0);

23695

+ if (rc != 0)

23696

+ {

23697

+ return 1;

23698

+ }

23699

+ rc = __TM_is_failure_persistent(1);

23700

+ if (rc != 0)

23701

+ {

23702

+ return 2;

23703

+ }

23704

+ rc = __TM_is_failure_persistent(2);

23705

+ if (rc != 0)

23706

+ {

23707

+ return 3;

23708

+ }

23709

+ rc = __TM_is_failure_persistent(3);

23710

+ if (rc != 1)

23711

+ {

23712

+ return 4;

23713

+ }

23714

+

23715

+ return 0;

23716

+}

23717

+

23718

+static int test_tbegin_ntstg_tend(void)

23719

+{

23720

+ long rc;

23721

+

23722

+ counters.c1 = 0;

23723

+ counters.c2 = 0;

23724

+ if ((rc = __TM_simple_begin()) == 0)

23725

+ {

23726

+ __TM_non_transactional_store((uint64_t *)&counters.c1, 1);

23727

+ counters.c2 = 2;

23728

+ rc = __TM_end();

23729

+ if (rc != 0)

23730

+ {

23731

+ return 100 * rc + 5;

23732

+ }

23733

+ if (counters.c1 != 1)

23734

+ {

23735

+ return 100 * counters.c1 + 2;

23736

+ }

23737

+ if (counters.c2 != 2)

23738

+ {

23739

+ return 100 * counters.c2 + 3;

23740

+ }

23741

+ }

23742

+ else

23743

+ {

23744

+ return 100 * rc + 4;

23745

+ }

23746

+

23747

+ return 0;

23748

+}

23749

+

23750

+static int test_tbegin_ntstg_tabort(void)

23751

+{

23752

+ register float f;

23753

+

23754

+ counters.c1 = 0;

23755

+ counters.c2 = 0;

23756

+ f = 0;

23757

+ if (__TM_simple_begin() == 0)

23758

+ {

23759

+ __TM_non_transactional_store((uint64_t *)&counters.c1, 1);

23760

+ counters.c2 = 2;

23761

+ f = 1;

23762

+ __TM_named_abort(0);

23763

+ return 1;

23764

+ }

23765

+ if (counters.c1 != 1)

23766

+ {

23767

+ return 100 * counters.c1 + 2;

23768

+ }

23769

+ if (counters.c2 != 0)

23770

+ {

23771

+ return 100 * counters.c2 + 3;

23772

+ }

23773

+ if (f != 0)

23774

+ {

23775

+ return 100 * f + 4;

23776

+ }

23777

+

23778

+ return 0;

23779

+}

23780

+

23781

+static int test_tbegin_aborts(void)

23782

+{

23783

+ float f;

23784

+ long rc;

23785

+

23786

+ f = 77;

23787

+ if ((rc = __TM_simple_begin()) == 0)

23788

+ {

23789

+ f = 88;

23790

+ __TM_abort();

23791

+ return 2;

23792

+ }

23793

+ else if (rc != 2)

23794

+ {

23795

+ return 3;

23796

+ }

23797

+ if (f != 77)

23798

+ {

23799

+ return 4;

23800

+ }

23801

+ f = 66;

23802

+ if ((rc = __TM_simple_begin()) == 0)

23803

+ {

23804

+ f = 99;

23805

+ __TM_named_abort(3);

23806

+ return 5;

23807

+ }

23808

+ else if (rc != 3)

23809

+ {

23810

+ return 100 * rc + 6;

23811

+ }

23812

+ if (f != 66)

23813

+ {

23814

+ return 100 * f + 7;

23815

+ }

23816

+ if ((rc = __TM_simple_begin()) == 0)

23817

+ {

23818

+ global_float_3 = global_float_1 + global_float_2;

23819

+ rc = __TM_end();

23820

+ if (rc != 0)

23821

+ {

23822

+ return 100 * rc + 8;

23823

+ }

23824

+ }

23825

+ else

23826

+ {

23827

+ return 100 * rc + 9;

23828

+ }

23829

+ if (global_float_3 != global_float_1 + global_float_2)

23830

+ {

23831

+ return 100 * rc + 10;

23832

+ }

23833

+

23834

+ return 0;

23835

+}

23836

+

23837

+static int test_tbegin_tdb(void)

23838

+{

23839

+ long rc;

23840

+

23841

+ local_tdb.format = 0;

23842

+ if ((rc = __TM_begin(&local_tdb)) == 0)

23843

+ {

23844

+ rc = __TM_end();

23845

+ if (rc != 0)

23846

+ {

23847

+ return 100 * rc + 1;

23848

+ }

23849

+ if (local_tdb.format != 0)

23850

+ {

23851

+ dump_tdb(&local_tdb);

23852

+ return 100 * local_tdb.format + 2;

23853

+ }

23854

+ }

23855

+ else

23856

+ {

23857

+ return 100 * rc + 3;

23858

+ }

23859

+ local_tdb.format = 0;

23860

+ if ((rc = __TM_begin(&local_tdb)) == 0)

23861

+ {

23862

+ __TM_named_abort(1);

23863

+ return 4;

23864

+ }

23865

+ else

23866

+ {

23867

+ if (rc != 3)

23868

+ {

23869

+ return 100 * rc + 5;

23870

+ }

23871

+ if (local_tdb.format != 1)

23872

+ {

23873

+ dump_tdb(&local_tdb);

23874

+ return 100 * local_tdb.format + 6;

23875

+ }

23876

+ }

23877

+ local_tdb256.format = 0;

23878

+ if ((rc = __TM_begin(&local_tdb256)) == 0)

23879

+ {

23880

+ rc = __TM_end();

23881

+ if (rc != 0)

23882

+ {

23883

+ return 1100 * rc + 1;

23884

+ }

23885

+ if (local_tdb256.format != 0)

23886

+ {

23887

+ dump_tdb(&local_tdb256);

23888

+ return 1100 * local_tdb256.format + 2;

23889

+ }

23890

+ }

23891

+ else

23892

+ {

23893

+ return 1100 * rc + 3;

23894

+ }

23895

+#if 1 /*!!!does not work*/

23896

+ local_tdb256.format = 0;

23897

+ if ((rc = __TM_begin(&local_tdb256)) == 0)

23898

+ {

23899

+ __TM_named_abort(1);

23900

+ return 2004;

23901

+ }

23902

+ else

23903

+ {

23904

+ if (rc != 3)

23905

+ {

23906

+ return 2100 * rc + 5;

23907

+ }

23908

+ if (local_tdb256.format != 1)

23909

+ {

23910

+ dump_tdb(&local_tdb256);

23911

+ return 2100 * local_tdb256.format + 6;

23912

+ }

23913

+ }

23914

+#endif

23915

+

23916

+ return 0;

23917

+}

23918

+

23919

+static int test_etnd(void)

23920

+{

23921

+ long rc;

23922

+

23923

+ {

23924

+ long nd;

23925

+

23926

+ make_fake_tdb(&local_tdb);

23927

+ local_tdb.nesting_depth = 0;

23928

+ nd = __TM_nesting_depth(&local_tdb);

23929

+ if (nd != 0)

23930

+ {

23931

+ return 1;

23932

+ }

23933

+ local_tdb.nesting_depth = 7;

23934

+ nd = __TM_nesting_depth(&local_tdb);

23935

+ if (nd != 7)

23936

+ {

23937

+ return 7;

23938

+ }

23939

+ local_tdb.format = 0;

23940

+ nd = __TM_nesting_depth(&local_tdb);

23941

+ if (nd != 0)

23942

+ {

23943

+ return 2;

23944

+ }

23945

+ }

23946

+ counters.c1 = 0;

23947

+ counters.c1 = 0;

23948

+ counters.c2 = 0;

23949

+ counters.c3 = 0;

23950

+ if ((rc = __TM_simple_begin()) == 0)

23951

+ {

23952

+ counters.c1 = __TM_nesting_depth(0);

23953

+ if (__TM_simple_begin() == 0)

23954

+ {

23955

+ counters.c2 = __TM_nesting_depth(0);

23956

+ if (__TM_simple_begin() == 0)

23957

+ {

23958

+ counters.c3 = __TM_nesting_depth(0);

23959

+ __TM_end();

23960

+ }

23961

+ __TM_end();

23962

+ }

23963

+ __TM_end();

23964

+ }

23965

+ else

23966

+ {

23967

+ return 100 * rc + 1;

23968

+ }

23969

+ if (counters.c1 != 1)

23970

+ {

23971

+ return 100 * counters.c1 + 2;

23972

+ }

23973

+ if (counters.c2 != 2)

23974

+ {

23975

+ return 100 * counters.c2 + 3;

23976

+ }

23977

+ if (counters.c3 != 3)

23978

+ {

23979

+ return 100 * counters.c3 + 4;

23980

+ }

23981

+

23982

+ return 0;

23983

+}

23984

+

23985

+/* ---------------------------- local testing framework functions ---------- */

23986

+

23987

+static int run_one_test(const test_table_entry_t *test_entry)

23988

+{

23989

+ int do_print_passes;

23990

+ int succeeded;

23991

+ int rc;

23992

+ int i;

23993

+

23994

+ do_print_passes = (

23995

+ test_entry->required_quorum != 1 ||

23996

+ test_entry->max_repetitions != 1);

23997

+ printf("RRR RUN %s\n", test_entry->name);

23998

+ if (do_print_passes == 1)

23999

+ {

24000

+ printf(

24001

+ " (requires %d successful out of %d runs)\n",

24002

+ test_entry->required_quorum,

24003

+ test_entry->max_repetitions);

24004

+ }

24005

+ succeeded = 0;

24006

+ rc = 0;

24007

+ for (rc = 0, i = 0; i < test_entry->max_repetitions; i++)

24008

+ {

24009

+ if (do_print_passes == 1)

24010

+ {

24011

+ if (i == 0)

24012

+ {

24013

+ printf(" ");

24014

+ }

24015

+ else

24016

+ {

24017

+ printf(",");

24018

+ }

24019

+ }

24020

+ rc = test_entry->test_func();

24021

+ if (rc == 0)

24022

+ {

24023

+ if (do_print_passes == 1)

24024

+ {

24025

+ printf(" success");

24026

+ }

24027

+ succeeded++;

24028

+ if (succeeded >= test_entry->required_quorum)

24029

+ {

24030

+ break;

24031

+ }

24032

+ }

24033

+ else

24034

+ {

24035

+ printf(" failed (rc = %d)", rc);

24036

+ }

24037

+ }

24038

+ if (do_print_passes == 1 || rc != 0)

24039

+ {

24040

+ printf("\n");

24041

+ }

24042

+ if (succeeded >= test_entry->required_quorum)

24043

+ {

24044

+ printf("+++ OK %s\n", test_entry->name);

24045

+

24046

+ return 0;

24047

+ }

24048

+ else

24049

+ {

24050

+ printf("--- FAIL %s\n", test_entry->name);

24051

+

24052

+ return (rc != 0) ? rc : -1;

24053

+ }

24054

+}

24055

+

24056

+static int run_all_tests(const test_table_entry_t *test_table)

24057

+{

24058

+ const test_table_entry_t *test;

24059

+ int rc;

24060

+

24061

+ for (

24062

+ rc = 0, test = &test_table[0];

24063

+ test->test_func != NULL && rc == 0; test++)

24064

+ {

24065

+ rc = run_one_test(test);

24066

+ }

24067

+

24068

+ return rc;

24069

+}

24070

+

24071

+/* ---------------------------- interface functions ------------------------ */

24072

+

24073

+int main(void)

24074

+{

24075

+ const test_table_entry_t test_table[] = {

24076

+ TEST_NO_REP(init_cache),

24077

+ TEST_NO_REP(test_abort_classification),

24078

+ TEST_NO_REP(test_cc_classification),

24079

+ TEST_DF_REP(test_tbegin_ntstg_tend),

24080

+ TEST_DF_REP(test_tbegin_ntstg_tabort),

24081

+ TEST_DF_REP(test_tbegin_aborts),

24082

+ TEST_DF_REP(test_tbegin_tdb),

24083

+ TEST_DF_REP(test_etnd),

24084

+ { (void *)0, 0, 0 }

24085

+ };

24086

+

24087

+ {

24088

+ int rc;

24089

+

24090

+ rc = run_all_tests(test_table);

24091

+

24092

+ return rc;

24093

+ }

24094

+}

24095

Index: gcc/testsuite/gcc.target/s390/hotpatch-8.c

24096

===================================================================

24097

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-8.c (.../tags/gcc_4_8_2_release)

24098

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-8.c (.../branches/gcc-4_8-branch)

24099

@@ -0,0 +1,28 @@

24100

+/* Functional tests for the function hotpatching feature. */

24101

+

24102

+/* { dg-do run } */

24103

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

24104

+

24105

+#include <stdio.h>

24106

+

24107

+__attribute__ ((hotpatch))

24108

+inline void hp1(void)

24109

+{

24110

+ printf("hello, world!\n");

24111

+}

24112

+

24113

+__attribute__ ((hotpatch))

24114

+__attribute__ ((always_inline))

24115

+void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */

24116

+{

24117

+ printf("hello, world!\n");

24118

+} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */

24119

+

24120

+int main (void)

24121

+{

24122

+ return 0;

24123

+}

24124

+

24125

+/* Check number of occurences of certain instructions. */

24126

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

24127

+/* { dg-final { scan-assembler-not "nop\t0" } } */

24128

Index: gcc/testsuite/gcc.target/s390/hotpatch-9.c

24129

===================================================================

24130

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-9.c (.../tags/gcc_4_8_2_release)

24131

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-9.c (.../branches/gcc-4_8-branch)

24132

@@ -0,0 +1,21 @@

24133

+/* Functional tests for the function hotpatching feature. */

24134

+

24135

+/* { dg-do run } */

24136

+/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */

24137

+

24138

+#include <stdio.h>

24139

+

24140

+__attribute__ ((hotpatch(2)))

24141

+void hp1(void)

24142

+{

24143

+ printf("hello, world!\n");

24144

+}

24145

+

24146

+int main (void)

24147

+{

24148

+ return 0;

24149

+}

24150

+

24151

+/* Check number of occurences of certain instructions. */

24152

+/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */

24153

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

24154

Index: gcc/testsuite/gcc.target/s390/hotpatch-10.c

24155

===================================================================

24156

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-10.c (.../tags/gcc_4_8_2_release)

24157

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-10.c (.../branches/gcc-4_8-branch)

24158

@@ -0,0 +1,21 @@

24159

+/* Functional tests for the function hotpatching feature. */

24160

+

24161

+/* { dg-do run } */

24162

+/* { dg-options "-O3 -mzarch -mno-hotpatch --save-temps" } */

24163

+

24164

+#include <stdio.h>

24165

+

24166

+__attribute__ ((hotpatch(2)))

24167

+void hp1(void)

24168

+{

24169

+ printf("hello, world!\n");

24170

+}

24171

+

24172

+int main (void)

24173

+{

24174

+ return 0;

24175

+}

24176

+

24177

+/* Check number of occurences of certain instructions. */

24178

+/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */

24179

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

24180

Index: gcc/testsuite/gcc.target/s390/hotpatch-11.c

24181

===================================================================

24182

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-11.c (.../tags/gcc_4_8_2_release)

24183

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-11.c (.../branches/gcc-4_8-branch)

24184

@@ -0,0 +1,20 @@

24185

+/* Functional tests for the function hotpatching feature. */

24186

+

24187

+/* { dg-do run } */

24188

+/* { dg-options "-O3 -mzarch -mhotpatch -mno-hotpatch --save-temps" } */

24189

+

24190

+#include <stdio.h>

24191

+

24192

+void hp1(void)

24193

+{

24194

+ printf("hello, world!\n");

24195

+}

24196

+

24197

+int main (void)

24198

+{

24199

+ return 0;

24200

+}

24201

+

24202

+/* Check number of occurences of certain instructions. */

24203

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

24204

+/* { dg-final { scan-assembler-not "nop\t0" } } */

24205

Index: gcc/testsuite/gcc.target/s390/hotpatch-12.c

24206

===================================================================

24207

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-12.c (.../tags/gcc_4_8_2_release)

24208

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-12.c (.../branches/gcc-4_8-branch)

24209

@@ -0,0 +1,20 @@

24210

+/* Functional tests for the function hotpatching feature. */

24211

+

24212

+/* { dg-do run } */

24213

+/* { dg-options "-O3 -mzarch -mno-hotpatch -mhotpatch=1 --save-temps" } */

24214

+

24215

+#include <stdio.h>

24216

+

24217

+void hp1(void)

24218

+{

24219

+ printf("hello, world!\n");

24220

+}

24221

+

24222

+int main (void)

24223

+{

24224

+ return 0;

24225

+}

24226

+

24227

+/* Check number of occurences of certain instructions. */

24228

+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */

24229

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

24230

Index: gcc/testsuite/gcc.target/mips/bswap-1.c

24231

===================================================================

24232

--- a/src/gcc/testsuite/gcc.target/mips/bswap-1.c (.../tags/gcc_4_8_2_release)

24233

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-1.c (.../branches/gcc-4_8-branch)

24234

@@ -0,0 +1,10 @@

24235

+/* { dg-options "isa_rev>=2" } */

24236

+/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */

24237

+

24238

+NOMIPS16 unsigned short

24239

+foo (unsigned short x)

24240

+{

24241

+ return ((x << 8) & 0xff00) | ((x >> 8) & 0xff);

24242

+}

24243

+

24244

+/* { dg-final { scan-assembler "\twsbh\t" } } */

24245

Index: gcc/testsuite/gcc.target/mips/bswap-2.c

24246

===================================================================

24247

--- a/src/gcc/testsuite/gcc.target/mips/bswap-2.c (.../tags/gcc_4_8_2_release)

24248

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-2.c (.../branches/gcc-4_8-branch)

24249

@@ -0,0 +1,9 @@

24250

+/* { dg-options "isa_rev>=2" } */

24251

+

24252

+NOMIPS16 unsigned short

24253

+foo (unsigned short x)

24254

+{

24255

+ return __builtin_bswap16 (x);

24256

+}

24257

+

24258

+/* { dg-final { scan-assembler "\twsbh\t" } } */

24259

Index: gcc/testsuite/gcc.target/mips/pr59137.c

24260

===================================================================

24261

--- a/src/gcc/testsuite/gcc.target/mips/pr59137.c (.../tags/gcc_4_8_2_release)

24262

+++ b/src/gcc/testsuite/gcc.target/mips/pr59137.c (.../branches/gcc-4_8-branch)

24263

@@ -0,0 +1,34 @@

24264

+/* { dg-do run } */

24265

+/* { dg-options "-mno-plt" } */

24266

+

24267

+extern void abort (void);

24268

+

24269

+struct lispstruct

24270

+{

24271

+ int e;

24272

+ int t;

24273

+};

24274

+

24275

+struct lispstruct Cnil_body;

24276

+struct lispstruct Ct_body;

24277

+int nvalues;

24278

+

24279

+struct lispstruct * __attribute__ ((noinline))

24280

+fLlistp (struct lispstruct *x0)

24281

+{

24282

+ if (x0 == &Cnil_body

24283

+ || (((unsigned long) x0 >= 0x80000000) ? 0

24284

+ : (!x0->e ? (x0 != &Cnil_body) : x0->t)))

24285

+ x0 = &Ct_body;

24286

+ else

24287

+ x0 = &Cnil_body;

24288

+ nvalues = 1;

24289

+ return x0;

24290

+}

24291

+

24292

+int main ()

24293

+{

24294

+ if (fLlistp ((struct lispstruct *) 0xa0000001) != &Cnil_body)

24295

+ abort ();

24296

+ return 0;

24297

+}

24298

Index: gcc/testsuite/gcc.target/mips/bswap-3.c

24299

===================================================================

24300

--- a/src/gcc/testsuite/gcc.target/mips/bswap-3.c (.../tags/gcc_4_8_2_release)

24301

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-3.c (.../branches/gcc-4_8-branch)

24302

@@ -0,0 +1,14 @@

24303

+/* { dg-options "isa_rev>=2" } */

24304

+/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */

24305

+

24306

+NOMIPS16 unsigned int

24307

+foo (unsigned int x)

24308

+{

24309

+ return (((x << 24) & 0xff000000)

24310

+ | ((x << 8) & 0xff0000)

24311

+ | ((x >> 8) & 0xff00)

24312

+ | ((x >> 24) & 0xff));

24313

+}

24314

+

24315

+/* { dg-final { scan-assembler "\twsbh\t" } } */

24316

+/* { dg-final { scan-assembler "\tror\t" } } */

24317

Index: gcc/testsuite/gcc.target/mips/bswap-4.c

24318

===================================================================

24319

--- a/src/gcc/testsuite/gcc.target/mips/bswap-4.c (.../tags/gcc_4_8_2_release)

24320

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-4.c (.../branches/gcc-4_8-branch)

24321

@@ -0,0 +1,10 @@

24322

+/* { dg-options "isa_rev>=2" } */

24323

+

24324

+NOMIPS16 unsigned int

24325

+foo (unsigned int x)

24326

+{

24327

+ return __builtin_bswap32 (x);

24328

+}

24329

+

24330

+/* { dg-final { scan-assembler "\twsbh\t" } } */

24331

+/* { dg-final { scan-assembler "\tror\t" } } */

24332

Index: gcc/testsuite/gcc.target/mips/bswap-5.c

24333

===================================================================

24334

--- a/src/gcc/testsuite/gcc.target/mips/bswap-5.c (.../tags/gcc_4_8_2_release)

24335

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-5.c (.../branches/gcc-4_8-branch)

24336

@@ -0,0 +1,20 @@

24337

+/* { dg-options "isa_rev>=2 -mgp64" } */

24338

+/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */

24339

+

24340

+typedef unsigned long long uint64_t;

24341

+

24342

+NOMIPS16 uint64_t

24343

+foo (uint64_t x)

24344

+{

24345

+ return (((x << 56) & 0xff00000000000000ull)

24346

+ | ((x << 40) & 0xff000000000000ull)

24347

+ | ((x << 24) & 0xff0000000000ull)

24348

+ | ((x << 8) & 0xff00000000ull)

24349

+ | ((x >> 8) & 0xff000000)

24350

+ | ((x >> 24) & 0xff0000)

24351

+ | ((x >> 40) & 0xff00)

24352

+ | ((x >> 56) & 0xff));

24353

+}

24354

+

24355

+/* { dg-final { scan-assembler "\tdsbh\t" } } */

24356

+/* { dg-final { scan-assembler "\tdshd\t" } } */

24357

Index: gcc/testsuite/gcc.target/mips/bswap-6.c

24358

===================================================================

24359

--- a/src/gcc/testsuite/gcc.target/mips/bswap-6.c (.../tags/gcc_4_8_2_release)

24360

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-6.c (.../branches/gcc-4_8-branch)

24361

@@ -0,0 +1,12 @@

24362

+/* { dg-options "isa_rev>=2 -mgp64" } */

24363

+

24364

+typedef unsigned long long uint64_t;

24365

+

24366

+NOMIPS16 uint64_t

24367

+foo (uint64_t x)

24368

+{

24369

+ return __builtin_bswap64 (x);

24370

+}

24371

+

24372

+/* { dg-final { scan-assembler "\tdsbh\t" } } */

24373

+/* { dg-final { scan-assembler "\tdshd\t" } } */

24374

Index: gcc/testsuite/gcc.target/sh/pr51244-19.c

24375

===================================================================

24376

--- a/src/gcc/testsuite/gcc.target/sh/pr51244-19.c (.../tags/gcc_4_8_2_release)

24377

+++ b/src/gcc/testsuite/gcc.target/sh/pr51244-19.c (.../branches/gcc-4_8-branch)

24378

@@ -22,11 +22,16 @@

24379

unwanted sequences. Thus, if we see any movt insns, something is not

24380

working as expected. This test requires -O2 because the T bit stores

24381

in question will be eliminated in additional insn split passes after

24382

- reload. */

24383

+ reload.

24384

+

24385

+ Notice: When this test case was initially added, the T bit optimization

24386

+ was buggy and this test case resulted in wrong code. The movt

24387

+ instructions actually have to be present in this case to get

24388

+ correct code. */

24389

/* { dg-do compile { target "sh*-*-*" } } */

24390

/* { dg-options "-O2" } */

24391

/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */

24392

-/* { dg-final { scan-assembler-not "movt" } } */

24393

+/* { dg-final { scan-assembler "movt" } } */

24394

24395

struct request

24396

{

24397

Index: gcc/testsuite/gcc.target/sh/pr54089-3.c

24398

===================================================================

24399

--- a/src/gcc/testsuite/gcc.target/sh/pr54089-3.c (.../tags/gcc_4_8_2_release)

24400

+++ b/src/gcc/testsuite/gcc.target/sh/pr54089-3.c (.../branches/gcc-4_8-branch)

24401

@@ -5,7 +5,7 @@

24402

/* { dg-options "-O1" } */

24403

/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m1*" "-m2" "-m2e*" } } */

24404

/* { dg-final { scan-assembler-not "and" } } */

24405

-/* { dg-final { scan-assembler-not "31" } } */

24406

+/* { dg-final { scan-assembler-not "#31" } } */

24407

24408

int

24409

test00 (unsigned int a, int* b, int c, int* d, unsigned int e)

24410

Index: gcc/testsuite/go.test/go-test.exp

24411

===================================================================

24412

--- a/src/gcc/testsuite/go.test/go-test.exp (.../tags/gcc_4_8_2_release)

24413

+++ b/src/gcc/testsuite/go.test/go-test.exp (.../branches/gcc-4_8-branch)

24414

@@ -333,17 +333,16 @@

24415

}

24416

24417

if { ( [file tail $test] == "select2.go" \

24418

- || [file tail $test] == "stack.go" ) \

24419

+ || [file tail $test] == "stack.go" \

24420

+ || [file tail $test] == "peano.go" ) \

24421

&& ! [check_effective_target_split_stack] } {

24422

- # chan/select2.go fails on targets without split stack,

24423

- # because they allocate a large stack segment that blows

24424

- # out the memory calculations.

24425

+ # These tests fails on targets without split stack.

24426

untested $name

24427

continue

24428

}

24429

24430

- if { [file tail $test] == "rotate.go" } {

24431

- # This test produces a temporary file that takes too long

24432

+ if [string match "*go.test/test/rotate\[0123\].go" $test] {

24433

+ # These tests produces a temporary file that takes too long

24434

# to compile--5 minutes on my laptop without optimization.

24435

# When compiling without optimization it tests nothing

24436

# useful, since the point of the test is to see whether

24437

Index: gcc/testsuite/lib/target-supports.exp

24438

===================================================================

24439

--- a/src/gcc/testsuite/lib/target-supports.exp (.../tags/gcc_4_8_2_release)

24440

+++ b/src/gcc/testsuite/lib/target-supports.exp (.../branches/gcc-4_8-branch)

24441

@@ -1311,6 +1311,32 @@

24442

return 0

24443

}

24444

24445

+# Return 1 if the target supports executing power8 vector instructions, 0

24446

+# otherwise. Cache the result.

24447

+

24448

+proc check_p8vector_hw_available { } {

24449

+ return [check_cached_effective_target p8vector_hw_available {

24450

+ # Some simulators are known to not support VSX/power8 instructions.

24451

+ # For now, disable on Darwin

24452

+ if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {

24453

+ expr 0

24454

+ } else {

24455

+ set options "-mpower8-vector"

24456

+ check_runtime_nocache p8vector_hw_available {

24457

+ int main()

24458

+ {

24459

+ #ifdef __MACH__

24460

+ asm volatile ("xxlorc vs0,vs0,vs0");

24461

+ #else

24462

+ asm volatile ("xxlorc 0,0,0");

24463

+ #endif

24464

+ return 0;

24465

+ }

24466

+ } $options

24467

+ }

24468

+ }]

24469

+}

24470

+

24471

# Return 1 if the target supports executing VSX instructions, 0

24472

# otherwise. Cache the result.

24473

24474

@@ -2672,6 +2698,33 @@

24475

}

24476

}

24477

24478

+# Return 1 if this is a PowerPC target supporting -mpower8-vector

24479

+

24480

+proc check_effective_target_powerpc_p8vector_ok { } {

24481

+ if { ([istarget powerpc*-*-*]

24482

+ && ![istarget powerpc-*-linux*paired*])

24483

+ || [istarget rs6000-*-*] } {

24484

+ # AltiVec is not supported on AIX before 5.3.

24485

+ if { [istarget powerpc*-*-aix4*]

24486

+ || [istarget powerpc*-*-aix5.1*]

24487

+ || [istarget powerpc*-*-aix5.2*] } {

24488

+ return 0

24489

+ }

24490

+ return [check_no_compiler_messages powerpc_p8vector_ok object {

24491

+ int main (void) {

24492

+#ifdef __MACH__

24493

+ asm volatile ("xxlorc vs0,vs0,vs0");

24494

+#else

24495

+ asm volatile ("xxlorc 0,0,0");

24496

+#endif

24497

+ return 0;

24498

+ }

24499

+ } "-mpower8-vector"]

24500

+ } else {

24501

+ return 0

24502

+ }

24503

+}

24504

+

24505

# Return 1 if this is a PowerPC target supporting -mvsx

24506

24507

proc check_effective_target_powerpc_vsx_ok { } {

24508

@@ -2699,6 +2752,27 @@

24509

}

24510

}

24511

24512

+# Return 1 if this is a PowerPC target supporting -mhtm

24513

+

24514

+proc check_effective_target_powerpc_htm_ok { } {

24515

+ if { ([istarget powerpc*-*-*]

24516

+ && ![istarget powerpc-*-linux*paired*])

24517

+ || [istarget rs6000-*-*] } {

24518

+ # HTM is not supported on AIX yet.

24519

+ if { [istarget powerpc*-*-aix*] } {

24520

+ return 0

24521

+ }

24522

+ return [check_no_compiler_messages powerpc_htm_ok object {

24523

+ int main (void) {

24524

+ asm volatile ("tbegin. 0");

24525

+ return 0;

24526

+ }

24527

+ } "-mhtm"]

24528

+ } else {

24529

+ return 0

24530

+ }

24531

+}

24532

+

24533

# Return 1 if this is a PowerPC target supporting -mcpu=cell.

24534

24535

proc check_effective_target_powerpc_ppu_ok { } {

24536

@@ -2794,6 +2868,22 @@

24537

}

24538

}

24539

24540

+# Return 1 if this is a PowerPC target using the ELFv2 ABI.

24541

+

24542

+proc check_effective_target_powerpc_elfv2 { } {

24543

+ if { [istarget powerpc*-*-*] } {

24544

+ return [check_no_compiler_messages powerpc_elfv2 object {

24545

+ #if _CALL_ELF != 2

24546

+ #error not ELF v2 ABI

24547

+ #else

24548

+ int dummy;

24549

+ #endif

24550

+ }]

24551

+ } else {

24552

+ return 0

24553

+ }

24554

+}

24555

+

24556

# Return 1 if this is a SPU target with a toolchain that

24557

# supports automatic overlay generation.

24558

24559

@@ -4499,6 +4589,7 @@

24560

switch $arg {

24561

"vmx_hw" { set selected [check_vmx_hw_available] }

24562

"vsx_hw" { set selected [check_vsx_hw_available] }

24563

+ "p8vector_hw" { set selected [check_p8vector_hw_available] }

24564

"ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }

24565

"named_sections" { set selected [check_named_sections_available] }

24566

"gc_sections" { set selected [check_gc_sections_available] }

24567

@@ -4520,6 +4611,7 @@

24568

switch $arg {

24569

"vmx_hw" { return 1 }

24570

"vsx_hw" { return 1 }

24571

+ "p8vector_hw" { return 1 }

24572

"ppc_recip_hw" { return 1 }

24573

"named_sections" { return 1 }

24574

"gc_sections" { return 1 }

24575

@@ -5077,7 +5169,9 @@

24576

}

24577

24578

lappend DEFAULT_VECTCFLAGS "-maltivec"

24579

- if [check_vsx_hw_available] {

24580

+ if [check_p8vector_hw_available] {

24581

+ lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"

24582

+ } elseif [check_vsx_hw_available] {

24583

lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"

24584

}

24585

24586

Index: gcc/testsuite/gfortran.dg/shape_8.f90

24587

===================================================================

24588

--- a/src/gcc/testsuite/gfortran.dg/shape_8.f90 (.../tags/gcc_4_8_2_release)

24589

+++ b/src/gcc/testsuite/gfortran.dg/shape_8.f90 (.../branches/gcc-4_8-branch)

24590

@@ -0,0 +1,10 @@

24591

+! { dg-do compile }

24592

+!

24593

+! PR 60450: [4.7/4.8 Regression] ICE with SHAPE intrinsic

24594

+!

24595

+! Contributed by Dave Allured <dave.allured@noaa.gov>

24596

+

24597

+ real, allocatable :: x(:,:)

24598

+ allocate (x(3,2), source=99.)

24599

+ print *, shape (x / 10.0)

24600

+end

24601

Index: gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90

24602

===================================================================

24603

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90 (.../tags/gcc_4_8_2_release)

24604

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90 (.../branches/gcc-4_8-branch)

24605

@@ -0,0 +1,12 @@

24606

+! { dg-do compile }

24607

+!

24608

+! PR fortran/58803

24609

+!

24610

+! Contributed by Vittorio Zecca

24611

+!

24612

+! Was before ICEing due to a double free

24613

+!

24614

+ type t

24615

+ procedure(real), pointer, nopass :: f1, f2

24616

+ end type

24617

+ end

24618

Index: gcc/testsuite/gfortran.dg/where_4.f90

24619

===================================================================

24620

--- a/src/gcc/testsuite/gfortran.dg/where_4.f90 (.../tags/gcc_4_8_2_release)

24621

+++ b/src/gcc/testsuite/gfortran.dg/where_4.f90 (.../branches/gcc-4_8-branch)

24622

@@ -0,0 +1,18 @@

24623

+! { dg-do compile }

24624

+! PR 60522 - this used to ICE.

24625

+! Original test case Roger Ferrer Ibanez

24626

+subroutine foo(a, b)

24627

+ implicit none

24628

+ integer, dimension(:), intent(inout) :: a

24629

+ integer, dimension(:), intent(in) :: b

24630

+

24631

+ where (b(:) > 0)

24632

+ where (b(:) > 100)

24633

+ a(lbound(a, 1):ubound(a, 1)) = b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1)) - 100

24634

+ elsewhere

24635

+ a(lbound(a, 1):ubound(a, 1)) = b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1))

24636

+ end where

24637

+ elsewhere

24638

+ a(lbound(a, 1):ubound(a, 1)) = - b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1))

24639

+ end where

24640

+end subroutine foo

24641

Index: gcc/testsuite/gfortran.dg/gomp/pr59467.f90

24642

===================================================================

24643

--- a/src/gcc/testsuite/gfortran.dg/gomp/pr59467.f90 (.../tags/gcc_4_8_2_release)

24644

+++ b/src/gcc/testsuite/gfortran.dg/gomp/pr59467.f90 (.../branches/gcc-4_8-branch)

24645

@@ -0,0 +1,24 @@

24646

+! PR libgomp/59467

24647

+! { dg-do compile }

24648

+! { dg-options "-fopenmp" }

24649

+ FUNCTION t()

24650

+ INTEGER :: a, b, t

24651

+ a = 0

24652

+ b = 0

24653

+ !$OMP PARALLEL REDUCTION(+:b)

24654

+ !$OMP SINGLE ! { dg-error "is not threadprivate or private in outer context" }

24655

+ !$OMP ATOMIC WRITE

24656

+ a = 6

24657

+ !$OMP END SINGLE COPYPRIVATE (a)

24658

+ b = a

24659

+ !$OMP END PARALLEL

24660

+ t = b

24661

+ b = 0

24662

+ !$OMP PARALLEL REDUCTION(+:b)

24663

+ !$OMP SINGLE

24664

+ !$OMP ATOMIC WRITE

24665

+ b = 6

24666

+ !$OMP END SINGLE COPYPRIVATE (b)

24667

+ !$OMP END PARALLEL

24668

+ t = t + b

24669

+ END FUNCTION

24670

Index: gcc/testsuite/gfortran.dg/allocate_class_3.f90

24671

===================================================================

24672

--- a/src/gcc/testsuite/gfortran.dg/allocate_class_3.f90 (.../tags/gcc_4_8_2_release)

24673

+++ b/src/gcc/testsuite/gfortran.dg/allocate_class_3.f90 (.../branches/gcc-4_8-branch)

24674

@@ -0,0 +1,107 @@

24675

+! { dg-do run }

24676

+! Tests the fix for PR59414, comment #3, in which the allocate

24677

+! expressions were not correctly being stripped to provide the

24678

+! vpointer as an lhs to the pointer assignment of the vptr from

24679

+! the SOURCE expression.

24680

+!

24681

+! Contributed by Antony Lewis <antony@cosmologist.info>

24682

+!

24683

+module ObjectLists

24684

+ implicit none

24685

+

24686

+ type :: t

24687

+ integer :: i

24688

+ end type

24689

+

24690

+ type Object_array_pointer

24691

+ class(t), pointer :: p(:)

24692

+ end type

24693

+

24694

+contains

24695

+

24696

+ subroutine AddArray1 (P, Pt)

24697

+ class(t) :: P(:)

24698

+ class(Object_array_pointer) :: Pt

24699

+

24700

+ select type (Pt)

24701

+ class is (Object_array_pointer)

24702

+ if (associated (Pt%P)) deallocate (Pt%P)

24703

+ allocate(Pt%P(1:SIZE(P)), source=P)

24704

+ end select

24705

+ end subroutine

24706

+

24707

+ subroutine AddArray2 (P, Pt)

24708

+ class(t) :: P(:)

24709

+ class(Object_array_pointer) :: Pt

24710

+

24711

+ select type (Pt)

24712

+ type is (Object_array_pointer)

24713

+ if (associated (Pt%P)) deallocate (Pt%P)

24714

+ allocate(Pt%P(1:SIZE(P)), source=P)

24715

+ end select

24716

+ end subroutine

24717

+

24718

+ subroutine AddArray3 (P, Pt)

24719

+ class(t) :: P

24720

+ class(Object_array_pointer) :: Pt

24721

+

24722

+ select type (Pt)

24723

+ class is (Object_array_pointer)

24724

+ if (associated (Pt%P)) deallocate (Pt%P)

24725

+ allocate(Pt%P(1:4), source=P)

24726

+ end select

24727

+ end subroutine

24728

+

24729

+ subroutine AddArray4 (P, Pt)

24730

+ type(t) :: P(:)

24731

+ class(Object_array_pointer) :: Pt

24732

+

24733

+ select type (Pt)

24734

+ class is (Object_array_pointer)

24735

+ if (associated (Pt%P)) deallocate (Pt%P)

24736

+ allocate(Pt%P(1:SIZE(P)), source=P)

24737

+ end select

24738

+ end subroutine

24739

+end module

24740

+

24741

+ use ObjectLists

24742

+ type(Object_array_pointer), pointer :: Pt

24743

+ class(t), pointer :: P(:)

24744

+

24745

+ allocate (P(2), source = [t(1),t(2)])

24746

+ allocate (Pt, source = Object_array_pointer(NULL()))

24747

+ call AddArray1 (P, Pt)

24748

+ select type (x => Pt%p)

24749

+ type is (t)

24750

+ if (any (x%i .ne. [1,2])) call abort

24751

+ end select

24752

+ deallocate (P)

24753

+ deallocate (pt)

24754

+

24755

+ allocate (P(3), source = [t(3),t(4),t(5)])

24756

+ allocate (Pt, source = Object_array_pointer(NULL()))

24757

+ call AddArray2 (P, Pt)

24758

+ select type (x => Pt%p)

24759

+ type is (t)

24760

+ if (any (x%i .ne. [3,4,5])) call abort

24761

+ end select

24762

+ deallocate (P)

24763

+ deallocate (pt)

24764

+

24765

+ allocate (Pt, source = Object_array_pointer(NULL()))

24766

+ call AddArray3 (t(6), Pt)

24767

+ select type (x => Pt%p)

24768

+ type is (t)

24769

+ if (any (x%i .ne. [6,6,6,6])) call abort

24770

+ end select

24771

+ deallocate (pt)

24772

+

24773

+ allocate (Pt, source = Object_array_pointer(NULL()))

24774

+ call AddArray4 ([t(7), t(8)], Pt)

24775

+ select type (x => Pt%p)

24776

+ type is (t)

24777

+ if (any (x%i .ne. [7,8])) call abort

24778

+ end select

24779

+ deallocate (pt)

24780

+ end

24781

+

24782

Index: gcc/testsuite/gfortran.dg/reshape_6.f90

24783

===================================================================

24784

--- a/src/gcc/testsuite/gfortran.dg/reshape_6.f90 (.../tags/gcc_4_8_2_release)

24785

+++ b/src/gcc/testsuite/gfortran.dg/reshape_6.f90 (.../branches/gcc-4_8-branch)

24786

@@ -0,0 +1,19 @@

24787

+! { dg-do compile }

24788

+! PR fortran/58989

24789

+!

24790

+program test

24791

+

24792

+ real(8), dimension(4,4) :: fluxes

24793

+ real(8), dimension(2,2,2,2) :: f

24794

+ integer, dimension(3) :: dmmy

24795

+ integer, parameter :: indx(4)=(/2,2,2,2/)

24796

+

24797

+ fluxes = 1

24798

+

24799

+ dmmy = (/2,2,2/)

24800

+

24801

+ f = reshape(fluxes,(/dmmy,2/)) ! Caused an ICE

24802

+ f = reshape(fluxes,(/2,2,2,2/)) ! Works as expected

24803

+ f = reshape(fluxes,indx) ! Works as expected

24804

+

24805

+end program test

24806

Index: gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90

24807

===================================================================

24808

--- a/src/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 (.../tags/gcc_4_8_2_release)

24809

+++ b/src/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 (.../branches/gcc-4_8-branch)

24810

@@ -0,0 +1,36 @@

24811

+! { dg-do compile }

24812

+!

24813

+! PR fortran/58007

24814

+! Unresolved fiixup while loading a module.

24815

+!

24816

+! This tests that the specification expression A%MAX_DEGREE in module BSR is

24817

+! correctly loaded and resolved in program MAIN.

24818

+!

24819

+! Original testcase from Daniel Shapiro <shapero@uw.edu>

24820

+

24821

+module matrix

24822

+ type :: sparse_matrix

24823

+ integer :: max_degree

24824

+ end type

24825

+end module

24826

+

24827

+module bsr

24828

+ use matrix

24829

+

24830

+ type, extends(sparse_matrix) :: bsr_matrix

24831

+ end type

24832

+

24833

+ integer :: i1

24834

+ integer :: i2

24835

+ integer :: i3

24836

+contains

24837

+ function get_neighbors (A)

24838

+ type(bsr_matrix), intent(in) :: A

24839

+ integer :: get_neighbors(A%max_degree)

24840

+ end function

24841

+end module

24842

+

24843

+program main

24844

+ use matrix

24845

+ use bsr

24846

+end

24847

Index: gcc/testsuite/gfortran.dg/init_flag_12.f90

24848

===================================================================

24849

--- a/src/gcc/testsuite/gfortran.dg/init_flag_12.f90 (.../tags/gcc_4_8_2_release)

24850

+++ b/src/gcc/testsuite/gfortran.dg/init_flag_12.f90 (.../branches/gcc-4_8-branch)

24851

@@ -0,0 +1,13 @@

24852

+! { dg-do compile }

24853

+! { dg-options "-fno-automatic -finit-local-zero" }

24854

+!

24855

+! PR 55907: [4.7/4.8/4.9 Regression] ICE with -fno-automatic -finit-local-zero

24856

+!

24857

+! Contributed by J.R. Garcia <garcia.espinosa.jr@gmail.com>

24858

+

24859

+subroutine cchaine (i)

24860

+ implicit none

24861

+ integer :: i

24862

+ character(len=i) :: chaine

24863

+ write(*,*) chaine

24864

+end subroutine

24865

Index: gcc/testsuite/gfortran.dg/derived_external_function_1.f90

24866

===================================================================

24867

--- a/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../tags/gcc_4_8_2_release)

24868

+++ b/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../branches/gcc-4_8-branch)

24869

@@ -0,0 +1,27 @@

24870

+! { dg-do run }

24871

+!

24872

+! PR fortran/58771

24873

+!

24874

+! Contributed by Vittorio Secca <zeccav@gmail.com>

24875

+!

24876

+! ICEd on the write statement with f() because the derived type backend

24877

+! declaration not built.

24878

+!

24879

+module m

24880

+ type t

24881

+ integer(4) g

24882

+ end type

24883

+end

24884

+

24885

+type(t) function f() result(ff)

24886

+ use m

24887

+ ff%g = 42

24888

+end

24889

+

24890

+ use m

24891

+ character (20) :: line1, line2

24892

+ type(t) f

24893

+ write (line1, *) f()

24894

+ write (line2, *) 42_4

24895

+ if (line1 .ne. line2) call abort

24896

+end

24897

Index: gcc/testsuite/gfortran.dg/implicit_pure_4.f90

24898

===================================================================

24899

--- a/src/gcc/testsuite/gfortran.dg/implicit_pure_4.f90 (.../tags/gcc_4_8_2_release)

24900

+++ b/src/gcc/testsuite/gfortran.dg/implicit_pure_4.f90 (.../branches/gcc-4_8-branch)

24901

@@ -0,0 +1,22 @@

24902

+! { dg-do compile }

24903

+!

24904

+! PR fortran/60543

24905

+! PR fortran/60283

24906

+!

24907

+module m

24908

+contains

24909

+ REAL(8) FUNCTION random()

24910

+ CALL RANDOM_NUMBER(random)

24911

+ END FUNCTION random

24912

+ REAL(8) FUNCTION random2()

24913

+ block

24914

+ block

24915

+ block

24916

+ CALL RANDOM_NUMBER(random2)

24917

+ end block

24918

+ end block

24919

+ end block

24920

+ END FUNCTION random2

24921

+end module m

24922

+

24923

+! { dg-final { scan-module-absence "m" "IMPLICIT_PURE" } }

24924

Index: gcc/testsuite/gfortran.dg/null_6.f90

24925

===================================================================

24926

--- a/src/gcc/testsuite/gfortran.dg/null_6.f90 (.../tags/gcc_4_8_2_release)

24927

+++ b/src/gcc/testsuite/gfortran.dg/null_6.f90 (.../branches/gcc-4_8-branch)

24928

@@ -30,5 +30,5 @@

24929

24930

subroutine test_PR34547_3 ()

24931

integer, allocatable :: i(:)

24932

- print *, NULL(i)

24933

+ print *, NULL(i) ! { dg-error "Invalid context for NULL" }

24934

end subroutine test_PR34547_3

24935

Index: gcc/testsuite/gfortran.dg/fmt_en.f90

24936

===================================================================

24937

--- a/src/gcc/testsuite/gfortran.dg/fmt_en.f90 (.../tags/gcc_4_8_2_release)

24938

+++ b/src/gcc/testsuite/gfortran.dg/fmt_en.f90 (.../branches/gcc-4_8-branch)

24939

@@ -0,0 +1,186 @@

24940

+! { dg-do run { target fd_truncate } }

24941

+! PR60128 Invalid outputs with EN descriptors

24942

+! Test case provided by Walt Brainerd.

24943

+program pr60128

24944

+use ISO_FORTRAN_ENV

24945

+ implicit none

24946

+ integer, parameter :: j(size(real_kinds)+4)=[REAL_KINDS, [4, 4, 4, 4]]

24947

+ logical :: l_skip(4) = .false.

24948

+ integer :: i

24949

+ integer :: n_tst = 0, n_cnt = 0, n_skip = 0

24950

+ character(len=20) :: s, s1

24951

+

24952

+ open (unit = 10, file = 'fmt_en.res')

24953

+! Check that the default rounding mode is to nearest and to even on tie.

24954

+ do i=1,size(real_kinds)

24955

+ if (i == 1) then

24956

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(1)), &

24957

+ real(9.49999905,kind=j(1)), &

24958

+ real(9.5,kind=j(1)), real(8.5,kind=j(1))

24959

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(1)), &

24960

+ real(98765.0,kind=j(1))

24961

+ else if (i == 2) then

24962

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(2)), &

24963

+ real(9.49999905,kind=j(2)), &

24964

+ real(9.5,kind=j(2)), real(8.5,kind=j(2))

24965

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(2)), &

24966

+ real(98765.0,kind=j(2))

24967

+ else if (i == 3) then

24968

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(3)), &

24969

+ real(9.49999905,kind=j(3)), &

24970

+ real(9.5,kind=j(3)), real(8.5,kind=j(3))

24971

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(3)), &

24972

+ real(98765.0,kind=j(3))

24973

+ else if (i == 4) then

24974

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(4)), &

24975

+ real(9.49999905,kind=j(4)), &

24976

+ real(9.5,kind=j(4)), real(8.5,kind=j(4))

24977

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(4)), &

24978

+ real(98765.0,kind=j(4))

24979

+ end if

24980

+ if (s /= '-9.5 9.5 10. 8.' .or. s1 /= ' 987.4E+03 98.76E+03') then

24981

+ l_skip(i) = .true.

24982

+! print "('Unsupported rounding for real(',i0,')')", j(i)

24983

+ end if

24984

+ end do

24985

+

24986

+

24987

+! Original test.

24988

+ call checkfmt("(en15.2)", -.44444, " -444.44E-03")

24989

+

24990

+! Test for the bug in comment 6.

24991

+ call checkfmt("(en15.0)", 1.0, " 1.E+00")

24992

+ call checkfmt("(en15.0)", 1.00000012, " 1.E+00")

24993

+ call checkfmt("(en15.0)", 0.99999994, " 1.E+00")

24994

+ call checkfmt("(en15.0)", 10.0, " 10.E+00")

24995

+ call checkfmt("(en15.0)", 10.0000010, " 10.E+00")

24996

+ call checkfmt("(en15.0)", 9.99999905, " 10.E+00")

24997

+ call checkfmt("(en15.0)", 100.0, " 100.E+00")

24998

+ call checkfmt("(en15.0)", 100.000008, " 100.E+00")

24999

+ call checkfmt("(en15.0)", 99.9999924, " 100.E+00")

25000

+ call checkfmt("(en15.0)", 1000.0, " 1.E+03")

25001

+ call checkfmt("(en15.0)", 1000.00006, " 1.E+03")

25002

+ call checkfmt("(en15.0)", 999.999939, " 1.E+03")

25003

+ call checkfmt("(en15.0)", 9.5, " 10.E+00")

25004

+ call checkfmt("(en15.0)", 9.50000095, " 10.E+00")

25005

+ call checkfmt("(en15.0)", 9.49999905, " 9.E+00")

25006

+ call checkfmt("(en15.0)", 99.5, " 100.E+00")

25007

+ call checkfmt("(en15.0)", 99.5000076, " 100.E+00")

25008

+ call checkfmt("(en15.0)", 99.4999924, " 99.E+00")

25009

+ call checkfmt("(en15.0)", 999.5, " 1.E+03")

25010

+ call checkfmt("(en15.0)", 999.500061, " 1.E+03")

25011

+ call checkfmt("(en15.0)", 999.499939, " 999.E+00")

25012

+ call checkfmt("(en15.0)", 9500.0, " 10.E+03")

25013

+ call checkfmt("(en15.0)", 9500.00098, " 10.E+03")

25014

+ call checkfmt("(en15.0)", 9499.99902, " 9.E+03")

25015

+ call checkfmt("(en15.1)", 9950.0, " 10.0E+03")

25016

+ call checkfmt("(en15.2)", 9995.0, " 10.00E+03")

25017

+ call checkfmt("(en15.3)", 9999.5, " 10.000E+03")

25018

+ call checkfmt("(en15.1)", 9.5, " 9.5E+00")

25019

+ call checkfmt("(en15.1)", 9.50000095, " 9.5E+00")

25020

+ call checkfmt("(en15.1)", 9.49999905, " 9.5E+00")

25021

+ call checkfmt("(en15.1)", 0.099951, " 100.0E-03")

25022

+ call checkfmt("(en15.1)", 0.009951, " 10.0E-03")

25023

+ call checkfmt("(en15.1)", 0.000999951," 1.0E-03")

25024

+

25025

+ call checkfmt("(en15.0)", -1.0, " -1.E+00")

25026

+ call checkfmt("(en15.0)", -1.00000012, " -1.E+00")

25027

+ call checkfmt("(en15.0)", -0.99999994, " -1.E+00")

25028

+ call checkfmt("(en15.0)", -10.0, " -10.E+00")

25029

+ call checkfmt("(en15.0)", -10.0000010, " -10.E+00")

25030

+ call checkfmt("(en15.0)", -9.99999905, " -10.E+00")

25031

+ call checkfmt("(en15.0)", -100.0, " -100.E+00")

25032

+ call checkfmt("(en15.0)", -100.000008, " -100.E+00")

25033

+ call checkfmt("(en15.0)", -99.9999924, " -100.E+00")

25034

+ call checkfmt("(en15.0)", -1000.0, " -1.E+03")

25035

+ call checkfmt("(en15.0)", -1000.00006, " -1.E+03")

25036

+ call checkfmt("(en15.0)", -999.999939, " -1.E+03")

25037

+ call checkfmt("(en15.0)", -9.5, " -10.E+00")

25038

+ call checkfmt("(en15.0)", -9.50000095, " -10.E+00")

25039

+ call checkfmt("(en15.0)", -9.49999905, " -9.E+00")

25040

+ call checkfmt("(en15.0)", -99.5, " -100.E+00")

25041

+ call checkfmt("(en15.0)", -99.5000076, " -100.E+00")

25042

+ call checkfmt("(en15.0)", -99.4999924, " -99.E+00")

25043

+ call checkfmt("(en15.0)", -999.5, " -1.E+03")

25044

+ call checkfmt("(en15.0)", -999.500061, " -1.E+03")

25045

+ call checkfmt("(en15.0)", -999.499939, " -999.E+00")

25046

+ call checkfmt("(en15.0)", -9500.0, " -10.E+03")

25047

+ call checkfmt("(en15.0)", -9500.00098, " -10.E+03")

25048

+ call checkfmt("(en15.0)", -9499.99902, " -9.E+03")

25049

+ call checkfmt("(en15.1)", -9950.0, " -10.0E+03")

25050

+ call checkfmt("(en15.2)", -9995.0, " -10.00E+03")

25051

+ call checkfmt("(en15.3)", -9999.5, " -10.000E+03")

25052

+ call checkfmt("(en15.1)", -9.5, " -9.5E+00")

25053

+ call checkfmt("(en15.1)", -9.50000095, " -9.5E+00")

25054

+ call checkfmt("(en15.1)", -9.49999905, " -9.5E+00")

25055

+ call checkfmt("(en15.1)", -0.099951, " -100.0E-03")

25056

+ call checkfmt("(en15.1)", -0.009951, " -10.0E-03")

25057

+ call checkfmt("(en15.1)", -0.000999951," -1.0E-03")

25058

+

25059

+ call checkfmt("(en15.1)", 987350., " 987.4E+03")

25060

+ call checkfmt("(en15.2)", 98735., " 98.74E+03")

25061

+ call checkfmt("(en15.3)", 9873.5, " 9.874E+03")

25062

+ call checkfmt("(en15.1)", 987650., " 987.6E+03")

25063

+ call checkfmt("(en15.2)", 98765., " 98.76E+03")

25064

+ call checkfmt("(en15.3)", 9876.5, " 9.876E+03")

25065

+ call checkfmt("(en15.1)", 3.125E-02, " 31.2E-03")

25066

+ call checkfmt("(en15.1)", 9.375E-02, " 93.8E-03")

25067

+ call checkfmt("(en15.2)", 1.5625E-02, " 15.62E-03")

25068

+ call checkfmt("(en15.2)", 4.6875E-02, " 46.88E-03")

25069

+ call checkfmt("(en15.3)", 7.8125E-03, " 7.812E-03")

25070

+ call checkfmt("(en15.3)", 2.34375E-02, " 23.438E-03")

25071

+ call checkfmt("(en15.3)", 9.765625E-04," 976.562E-06")

25072

+ call checkfmt("(en15.6)", 2.9296875E-03," 2.929688E-03")

25073

+

25074

+ call checkfmt("(en15.1)", -987350., " -987.4E+03")

25075

+ call checkfmt("(en15.2)", -98735., " -98.74E+03")

25076

+ call checkfmt("(en15.3)", -9873.5, " -9.874E+03")

25077

+ call checkfmt("(en15.1)", -987650., " -987.6E+03")

25078

+ call checkfmt("(en15.2)", -98765., " -98.76E+03")

25079

+ call checkfmt("(en15.3)", -9876.5, " -9.876E+03")

25080

+ call checkfmt("(en15.1)", -3.125E-02, " -31.2E-03")

25081

+ call checkfmt("(en15.1)", -9.375E-02, " -93.8E-03")

25082

+ call checkfmt("(en15.2)", -1.5625E-02, " -15.62E-03")

25083

+ call checkfmt("(en15.2)", -4.6875E-02, " -46.88E-03")

25084

+ call checkfmt("(en15.3)", -7.8125E-03, " -7.812E-03")

25085

+ call checkfmt("(en15.3)", -2.34375E-02, " -23.438E-03")

25086

+ call checkfmt("(en15.3)", -9.765625E-04," -976.562E-06")

25087

+ call checkfmt("(en15.6)", -2.9296875E-03," -2.929688E-03")

25088

+

25089

+ ! print *, n_tst, n_cnt, n_skip

25090

+ if (n_cnt /= 0) call abort

25091

+ if (all(.not. l_skip)) write (10, *) "All kinds rounded to nearest"

25092

+ close (10)

25093

+

25094

+contains

25095

+ subroutine checkfmt(fmt, x, cmp)

25096

+ implicit none

25097

+ integer :: i

25098

+ character(len=*), intent(in) :: fmt

25099

+ real, intent(in) :: x

25100

+ character(len=*), intent(in) :: cmp

25101

+ do i=1,size(real_kinds)

25102

+ if (i == 1) then

25103

+ write(s, fmt) real(x,kind=j(1))

25104

+ else if (i == 2) then

25105

+ write(s, fmt) real(x,kind=j(2))

25106

+ else if (i == 3) then

25107

+ write(s, fmt) real(x,kind=j(3))

25108

+ else if (i == 4) then

25109

+ write(s, fmt) real(x,kind=j(4))

25110

+ end if

25111

+ n_tst = n_tst + 1

25112

+ if (s /= cmp) then

25113

+ if (l_skip(i)) then

25114

+ n_skip = n_skip + 1

25115

+ else

25116

+ print "(a,1x,a,' expected: ',1x,a)", fmt, s, cmp

25117

+ n_cnt = n_cnt + 1

25118

+ end if

25119

+ end if

25120

+ end do

25121

+

25122

+ end subroutine

25123

+end program

25124

+! { dg-final { scan-file fmt_en.res "All kinds rounded to nearest" { xfail { i?86-*-solaris2.9* hppa*-*-hpux* } } } }

25125

+! { dg-final { cleanup-saved-temps } }

25126

Index: gcc/testsuite/gfortran.dg/constructor_9.f90

25127

===================================================================

25128

--- a/src/gcc/testsuite/gfortran.dg/constructor_9.f90 (.../tags/gcc_4_8_2_release)

25129

+++ b/src/gcc/testsuite/gfortran.dg/constructor_9.f90 (.../branches/gcc-4_8-branch)

25130

@@ -0,0 +1,22 @@

25131

+! { dg-do compile }

25132

+! { dg-options "-Wall" }

25133

+!

25134

+! PR 58471: [4.8/4.9 Regression] ICE on invalid with missing type constructor and -Wall

25135

+!

25136

+! Contributed by Andrew Benson <abensonca@gmail.com>

25137

+

25138

+module cf

25139

+ implicit none

25140

+ type :: cfmde

25141

+ end type

25142

+ interface cfmde

25143

+ module procedure mdedc ! { dg-error "is neither function nor subroutine" }

25144

+ end interface

25145

+contains

25146

+ subroutine cfi()

25147

+ type(cfmde), pointer :: cfd

25148

+ cfd=cfmde() ! { dg-error "Can't convert" }

25149

+ end subroutine

25150

+end module

25151

+

25152

+! { dg-final { cleanup-modules "cf" } }

25153

Index: gcc/testsuite/gfortran.dg/round_3.f08

25154

===================================================================

25155

--- a/src/gcc/testsuite/gfortran.dg/round_3.f08 (.../tags/gcc_4_8_2_release)

25156

+++ b/src/gcc/testsuite/gfortran.dg/round_3.f08 (.../branches/gcc-4_8-branch)

25157

@@ -16,19 +16,44 @@

25158

call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00")

25159

call checkfmt("(RU,1P,G10.4E2)", 2.3456e5, "2.3456E+05")

25160

25161

- call checkfmt("(RU,F2.0)", 0.09, "1.") ! 0.

25162

+ call checkfmt("(RC,G10.2)", 99.5, " 0.10E+03") ! pr59774

25163

+ call checkfmt("(RC,G10.2)", 995., " 0.10E+04") ! pr59774

25164

+ call checkfmt("(RC,G10.3)", 999.5, " 0.100E+04") ! pr59774

25165

+ call checkfmt("(RC,G10.3)", 9995., " 0.100E+05") ! pr59774

25166

+ call checkfmt("(RU,G10.2)", .099, " 0.10 ") ! pr59774

25167

+ call checkfmt("(RC,G10.1)", .095, " 0.1 ") ! pr59774

25168

+ call checkfmt("(RU,G10.3)", .0999, " 0.100 ") ! pr59774

25169

+ call checkfmt("(RC,G10.2)", .0995, " 0.10 ") ! pr59774

25170

+

25171

+ call checkfmt("(RU,G9.3)", 891.1, " 892.") ! pr59836

25172

+ call checkfmt("(RD,G9.3)", -891.1, "-892.") ! pr59836

25173

+

25174

+ call checkfmt("(RU,F6.4)", 0.00006, "0.0001")! 0.

25175

+ call checkfmt("(RU,F5.3)", 0.0007, "0.001") ! 0.

25176

+ call checkfmt("(RU,F4.2)", 0.008, "0.01") ! 0.

25177

+ call checkfmt("(RU,F3.1)", 0.09, "0.1") ! 0.

25178

+

25179

+ call checkfmt("(RU,F2.0)", 0.09, "1.") ! 0.

25180

call checkfmt("(RD,F3.0)", -0.09, "-1.") ! -0.

25181

- call checkfmt("(RU,F2.0)", 2.0, "2.") ! 3.

25182

- call checkfmt("(RD,F3.0)", -2.0, "-2.") ! -3.

25183

- call checkfmt("(RU,F6.4)", 2.0, "2.0000") ! 2.0001

25184

- call checkfmt("(RD,F7.4)", -2.0, "-2.0000") ! -2.0001

25185

- call checkfmt("(RU,1P,E6.0E2)", 2.0, "2.E+00") ! 3.E+00

25186

+ call checkfmt("(RU,F2.0)", 0.9, "1.") ! pr59836

25187

+ call checkfmt("(RC,F2.0)", 0.4, "0.") ! pr59836

25188

+ call checkfmt("(RC,F2.0)", 0.5, "1.") ! pr59836

25189

+ call checkfmt("(RC,F2.0)", 0.6, "1.") ! pr59836

25190

+ call checkfmt("(RD,F3.0)", -0.9, "-1.") ! pr59836

25191

+ call checkfmt("(RC,F3.0)", -0.4, "-0.") ! pr59836

25192

+ call checkfmt("(RC,F3.0)", -0.5, "-1.") ! pr59836

25193

+ call checkfmt("(RC,F3.0)", -0.6, "-1.") ! pr59836

25194

+ call checkfmt("(RU,F2.0)", 2.0, "2.") ! 3.

25195

+ call checkfmt("(RD,F3.0)", -2.0, "-2.") ! -3.

25196

+ call checkfmt("(RU,F6.4)", 2.0, "2.0000") ! 2.0001

25197

+ call checkfmt("(RD,F7.4)", -2.0, "-2.0000") ! -2.0001

25198

+ call checkfmt("(RU,1P,E6.0E2)", 2.0, "2.E+00") ! 3.E+00

25199

call checkfmt("(RD,1P,E7.0E2)", -2.0, "-2.E+00") ! -3.E+00

25200

- call checkfmt("(RU,1P,E7.1E2)", 2.5, "2.5E+00") ! 2.6E+00

25201

+ call checkfmt("(RU,1P,E7.1E2)", 2.5, "2.5E+00") ! 2.6E+00

25202

call checkfmt("(RD,1P,E8.1E2)", -2.5, "-2.5E+00") ! -2.6E+00

25203

call checkfmt("(RU,1P,E10.4E2)", 2.5, "2.5000E+00") ! 2.5001E+00

25204

call checkfmt("(RD,1P,E11.4E2)", -2.5, "-2.5000E+00") ! -2.5001E+00

25205

- call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") ! 3.E+00

25206

+ call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") ! 3.E+00

25207

call checkfmt("(RD,1P,G7.0E2)", -2.0, "-2.E+00") ! -3.E+00

25208

call checkfmt("(RU,1P,G10.4E2)", 2.3456e5, "2.3456E+05") ! 2.3457E+05

25209

call checkfmt("(RD,1P,G11.4E2)", -2.3456e5, "-2.3456E+05") ! -2.3457E+05

25210

Index: gcc/testsuite/gfortran.dg/default_initialization_7.f90

25211

===================================================================

25212

--- a/src/gcc/testsuite/gfortran.dg/default_initialization_7.f90 (.../tags/gcc_4_8_2_release)

25213

+++ b/src/gcc/testsuite/gfortran.dg/default_initialization_7.f90 (.../branches/gcc-4_8-branch)

25214

@@ -0,0 +1,22 @@

25215

+! { dg-do compile }

25216

+!

25217

+! PR fortran/57033

25218

+! ICE on a structure constructor of an extended derived type whose parent

25219

+! type last component has a default initializer

25220

+!

25221

+! Contributed by Tilo Schwarz <tilo@tilo-schwarz.de>

25222

+

25223

+program ice

25224

+

25225

+type m

25226

+ integer i

25227

+ logical :: f = .false.

25228

+end type m

25229

+

25230

+type, extends(m) :: me

25231

+end type me

25232

+

25233

+type(me) meo

25234

+

25235

+meo = me(1) ! ICE

25236

+end program ice

25237

Index: gcc/testsuite/gfortran.dg/proc_ptr_46.f90

25238

===================================================================

25239

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_46.f90 (.../tags/gcc_4_8_2_release)

25240

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_46.f90 (.../branches/gcc-4_8-branch)

25241

@@ -0,0 +1,14 @@

25242

+! { dg-do compile }

25243

+!

25244

+! PR fortran/49397

25245

+!

25246

+! Invalid per IR F08/0060 and F2008Corr2, C729

25247

+!

25248

+

25249

+! Print *,f() ! << Valid when uncommented

25250

+Contains

25251

+ Subroutine s

25252

+ Procedure(Real),Pointer :: p

25253

+ p => f ! { dg-error "Procedure pointer target 'f' at .1. must be either an intrinsic, host or use associated, referenced or have the EXTERNAL attribute" }

25254

+ End Subroutine

25255

+End

25256

Index: gcc/testsuite/gfortran.dg/pr52370.f90

25257

===================================================================

25258

--- a/src/gcc/testsuite/gfortran.dg/pr52370.f90 (.../tags/gcc_4_8_2_release)

25259

+++ b/src/gcc/testsuite/gfortran.dg/pr52370.f90 (.../branches/gcc-4_8-branch)

25260

@@ -0,0 +1,21 @@

25261

+! PR fortran/52370

25262

+! { dg-do compile }

25263

+! { dg-options "-O1 -Wall" }

25264

+

25265

+module pr52370

25266

+contains

25267

+ subroutine foo(a,b)

25268

+ real, intent(out) :: a

25269

+ real, dimension(:), optional, intent(out) :: b

25270

+ a=0.5

25271

+ if (present(b)) then

25272

+ b=1.0

25273

+ end if

25274

+ end subroutine foo

25275

+end module pr52370

25276

+

25277

+program prg52370

25278

+ use pr52370

25279

+ real :: a

25280

+ call foo(a)

25281

+end program prg52370

25282

Index: gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90

25283

===================================================================

25284

--- a/src/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 (.../tags/gcc_4_8_2_release)

25285

+++ b/src/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 (.../branches/gcc-4_8-branch)

25286

@@ -0,0 +1,22 @@

25287

+! { dg-do compile }

25288

+! { dg-options "-ffrontend-optimize" }

25289

+!

25290

+! PR fortran/60341

25291

+! An unguarded union access was wrongly enabling a frontend optimization on a

25292

+! string comparison, leading to an ICE.

25293

+!

25294

+! Original testcase from Steve Chapel <steve.chapel@a2pg.com>.

25295

+! Reduced by Steven G. Kargl <kargl@gcc.gnu.org>.

25296

+!

25297

+

25298

+ subroutine modelg(ncm)

25299

+ implicit none

25300

+ integer, parameter :: pc = 30, pm = pc - 1

25301

+ integer i

25302

+ character*4 catt(pm,2)

25303

+ integer ncm,iatt(pm,pc)

25304

+ do i=1,ncm

25305

+ if (catt(i,1)//catt(i,2).eq.'central') exit

25306

+ end do

25307

+ iatt(i,4)=1

25308

+ end

25309

Index: gcc/testsuite/gfortran.dg/list_read_12.f90

25310

===================================================================

25311

--- a/src/gcc/testsuite/gfortran.dg/list_read_12.f90 (.../tags/gcc_4_8_2_release)

25312

+++ b/src/gcc/testsuite/gfortran.dg/list_read_12.f90 (.../branches/gcc-4_8-branch)

25313

@@ -0,0 +1,11 @@

25314

+! { dg-do run }

25315

+! PR58324 Bogus end of file condition

25316

+integer :: i, ios

25317

+open(99, access='stream', form='unformatted')

25318

+write(99) "5 a"

25319

+close(99)

25320

+

25321

+open(99, access='sequential', form='formatted')

25322

+read(99, *, iostat=ios) i

25323

+if (ios /= 0) call abort

25324

+end

25325

Index: gcc/testsuite/gfortran.dg/generic_28.f90

25326

===================================================================

25327

--- a/src/gcc/testsuite/gfortran.dg/generic_28.f90 (.../tags/gcc_4_8_2_release)

25328

+++ b/src/gcc/testsuite/gfortran.dg/generic_28.f90 (.../branches/gcc-4_8-branch)

25329

@@ -0,0 +1,18 @@

25330

+! { dg-do compile }

25331

+!

25332

+! PR 58998: [4.8/4.9 Regression] Generic interface problem with gfortran

25333

+!

25334

+! Contributed by Paul van Delst

25335

+

25336

+ interface iargc

25337

+ procedure iargc_8

25338

+ end interface

25339

+

25340

+contains

25341

+

25342

+ integer(8) function iargc_8()

25343

+ integer(4) iargc

25344

+ iargc_8 = iargc()

25345

+ end function

25346

+

25347

+end

25348

Index: gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90

25349

===================================================================

25350

--- a/src/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 (.../tags/gcc_4_8_2_release)

25351

+++ b/src/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 (.../branches/gcc-4_8-branch)

25352

@@ -0,0 +1,44 @@

25353

+! { dg-do compile }

25354

+!

25355

+! PR fortran/58007

25356

+! Unresolved fixup while loading a module.

25357

+!

25358

+! This tests that the specification expression A%MAX_DEGREE in module BSR is

25359

+! correctly loaded and resolved in program MAIN.

25360

+!

25361

+! Original testcase from Daniel Shapiro <shapero@uw.edu>

25362

+! Reduced by Tobias Burnus <burnus@net-b.de> and Janus Weil <janus@gcc.gnu.org>

25363

+

25364

+module matrix

25365

+ type :: sparse_matrix

25366

+ integer :: max_degree

25367

+ end type

25368

+contains

25369

+ subroutine init_interface (A)

25370

+ class(sparse_matrix), intent(in) :: A

25371

+ end subroutine

25372

+ real function get_value_interface()

25373

+ end function

25374

+end module

25375

+

25376

+module ellpack

25377

+ use matrix

25378

+end module

25379

+

25380

+module bsr

25381

+ use matrix

25382

+ type, extends(sparse_matrix) :: bsr_matrix

25383

+ contains

25384

+ procedure :: get_neighbors

25385

+ end type

25386

+contains

25387

+ function get_neighbors (A)

25388

+ class(bsr_matrix), intent(in) :: A

25389

+ integer :: get_neighbors(A%max_degree)

25390

+ end function

25391

+end module

25392

+

25393

+program main

25394

+ use ellpack

25395

+ use bsr

25396

+end

25397

Index: gcc/testsuite/gfortran.dg/lto/pr60635_1.c

25398

===================================================================

25399

--- a/src/gcc/testsuite/gfortran.dg/lto/pr60635_1.c (.../tags/gcc_4_8_2_release)

25400

+++ b/src/gcc/testsuite/gfortran.dg/lto/pr60635_1.c (.../branches/gcc-4_8-branch)

25401

@@ -0,0 +1,14 @@

25402

+#include <stdint.h>

25403

+#include <stdbool.h>

25404

+

25405

+static bool littleendian=true;

25406

+

25407

+uint16_t bigendc16(union{uint16_t * n;uint8_t* b;}x){

25408

+

25409

+ if (!littleendian) return *x.n;

25410

+

25411

+ uint16_t res = ((uint16_t)(x.b[1])<<0) |

25412

+ ((uint16_t)(x.b[0])<<8);

25413

+ return res;

25414

+}

25415

+

25416

Index: gcc/testsuite/gfortran.dg/lto/pr60635_0.f90

25417

===================================================================

25418

--- a/src/gcc/testsuite/gfortran.dg/lto/pr60635_0.f90 (.../tags/gcc_4_8_2_release)

25419

+++ b/src/gcc/testsuite/gfortran.dg/lto/pr60635_0.f90 (.../branches/gcc-4_8-branch)

25420

@@ -0,0 +1,16 @@

25421

+! { dg-lto-do link }

25422

+program test

25423

+ use iso_fortran_env

25424

+

25425

+ interface

25426

+ integer(int16) function bigendc16(x) bind(C)

25427

+ import

25428

+ integer(int16), intent(in) :: x

25429

+ end function

25430

+ end interface

25431

+

25432

+ integer(int16) :: x16 = 12345

25433

+ x16 = bigendc16(x16)

25434

+ print *,x16

25435

+end program

25436

+

25437

Index: gcc/testsuite/gfortran.dg/arrayio_13.f90

25438

===================================================================

25439

--- a/src/gcc/testsuite/gfortran.dg/arrayio_13.f90 (.../tags/gcc_4_8_2_release)

25440

+++ b/src/gcc/testsuite/gfortran.dg/arrayio_13.f90 (.../branches/gcc-4_8-branch)

25441

@@ -0,0 +1,14 @@

25442

+! { dg-do run }

25443

+! PR60810 Bogus end-of-file

25444

+program readstrlist

25445

+ character(len=80), dimension(2) :: ver

25446

+ integer :: a, b, c

25447

+ a = 1

25448

+ b = 2

25449

+ c = 3

25450

+ ver(1) = '285 383'

25451

+ ver(2) = '985'

25452

+ read( ver, *) a, b, c

25453

+ if (a /= 285 .or. b /= 383 .or. c /= 985) call abort

25454

+ !write ( *, *) a, b, c

25455

+end

25456

Index: gcc/testsuite/gfortran.dg/null_5.f90

25457

===================================================================

25458

--- a/src/gcc/testsuite/gfortran.dg/null_5.f90 (.../tags/gcc_4_8_2_release)

25459

+++ b/src/gcc/testsuite/gfortran.dg/null_5.f90 (.../branches/gcc-4_8-branch)

25460

@@ -34,7 +34,7 @@

25461

end subroutine test_PR34547_1

25462

25463

subroutine test_PR34547_2 ()

25464

- print *, null () ! { dg-error "in data transfer statement requires MOLD" }

25465

+ print *, null () ! { dg-error "Invalid context" }

25466

end subroutine test_PR34547_2

25467

25468

subroutine test_PR34547_3 ()

25469

Index: gcc/testsuite/gfortran.dg/proc_ptr_43.f90

25470

===================================================================

25471

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_43.f90 (.../tags/gcc_4_8_2_release)

25472

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_43.f90 (.../branches/gcc-4_8-branch)

25473

@@ -0,0 +1,19 @@

25474

+! { dg-do compile }

25475

+!

25476

+! PR 58099: [4.8/4.9 Regression] [F03] over-zealous procedure-pointer error checking

25477

+!

25478

+! Contributed by Daniel Price <daniel.price@monash.edu>

25479

+

25480

+ implicit none

25481

+ procedure(real), pointer :: wfunc

25482

+

25483

+ wfunc => w_cubic

25484

+

25485

+contains

25486

+

25487

+ pure real function w_cubic(q2)

25488

+ real, intent(in) :: q2

25489

+ w_cubic = 0.

25490

+ end function

25491

+

25492

+end

25493

Index: gcc/testsuite/gfortran.dg/nan_7.f90

25494

===================================================================

25495

--- a/src/gcc/testsuite/gfortran.dg/nan_7.f90 (.../tags/gcc_4_8_2_release)

25496

+++ b/src/gcc/testsuite/gfortran.dg/nan_7.f90 (.../branches/gcc-4_8-branch)

25497

@@ -2,6 +2,7 @@

25498

! { dg-options "-fno-range-check" }

25499

! { dg-require-effective-target fortran_real_16 }

25500

! { dg-require-effective-target fortran_integer_16 }

25501

+! { dg-skip-if "" { "powerpc*le-*-*" } { "*" } { "" } }

25502

! PR47293 NAN not correctly read

25503

character(len=200) :: str

25504

real(16) :: r

25505

Index: gcc/testsuite/gfortran.dg/typebound_generic_15.f90

25506

===================================================================

25507

--- a/src/gcc/testsuite/gfortran.dg/typebound_generic_15.f90 (.../tags/gcc_4_8_2_release)

25508

+++ b/src/gcc/testsuite/gfortran.dg/typebound_generic_15.f90 (.../branches/gcc-4_8-branch)

25509

@@ -0,0 +1,18 @@

25510

+! { dg-do compile }

25511

+!

25512

+! PR 60231: [4.8/4.9 Regression] ICE on undefined generic

25513

+!

25514

+! Contributed by Antony Lewis <antony@cosmologist.info>

25515

+

25516

+module Objects

25517

+

25518

+ Type TObjectList

25519

+ contains

25520

+ procedure :: Add1 ! { dg-error "must be a module procedure" }

25521

+ procedure :: Add2 ! { dg-error "must be a module procedure" }

25522

+ generic :: Add => Add1, Add2 ! { dg-error "are ambiguous" }

25523

+ end Type

25524

+

25525

+end module

25526

+

25527

+! { dg-final { cleanup-modules "Objects" } }

25528

Index: gcc/testsuite/gfortran.dg/extends_15.f90

25529

===================================================================

25530

--- a/src/gcc/testsuite/gfortran.dg/extends_15.f90 (.../tags/gcc_4_8_2_release)

25531

+++ b/src/gcc/testsuite/gfortran.dg/extends_15.f90 (.../branches/gcc-4_8-branch)

25532

@@ -0,0 +1,16 @@

25533

+! { dg-do compile }

25534

+!

25535

+! PR 58355: [4.7/4.8/4.9 Regression] [F03] ICE with TYPE, EXTENDS before parent TYPE defined

25536

+!

25537

+! Contributed by Andrew Benson <abensonca@gmail.com>

25538

+

25539

+module ct

25540

+ public :: t1

25541

+

25542

+ type, extends(t1) :: t2 ! { dg-error "has not been previously defined" }

25543

+

25544

+ type :: t1

25545

+ end type

25546

+end

25547

+

25548

+! { dg-final { cleanup-modules "ct" } }

25549

Index: gcc/testsuite/gfortran.dg/optional_class_1.f90

25550

===================================================================

25551

--- a/src/gcc/testsuite/gfortran.dg/optional_class_1.f90 (.../tags/gcc_4_8_2_release)

25552

+++ b/src/gcc/testsuite/gfortran.dg/optional_class_1.f90 (.../branches/gcc-4_8-branch)

25553

@@ -0,0 +1,45 @@

25554

+! { dg-do run }

25555

+!

25556

+! PR fortran/57445

25557

+!

25558

+! Contributed by Tobias Burnus <burnus@gcc.gnu.org>

25559

+!

25560

+! Spurious assert was added at revision 192495

25561

+!

25562

+module m

25563

+ implicit none

25564

+ type t

25565

+ integer :: i

25566

+ end type t

25567

+contains

25568

+ subroutine opt(xa, xc, xaa, xca)

25569

+ type(t), allocatable, intent(out), optional :: xa

25570

+ class(t), allocatable, intent(out), optional :: xc

25571

+ type(t), allocatable, intent(out), optional :: xaa(:)

25572

+ class(t), allocatable, intent(out), optional :: xca(:)

25573

+ if (present (xca)) call foo_opt(xca=xca)

25574

+ end subroutine opt

25575

+ subroutine foo_opt(xa, xc, xaa, xca)

25576

+ type(t), allocatable, intent(out), optional :: xa

25577

+ class(t), allocatable, intent(out), optional :: xc

25578

+ type(t), allocatable, intent(out), optional :: xaa(:)

25579

+ class(t), allocatable, intent(out), optional :: xca(:)

25580

+ if (present (xca)) then

25581

+ if (allocated (xca)) deallocate (xca)

25582

+ allocate (xca(3), source = [t(9),t(99),t(999)])

25583

+ end if

25584

+ end subroutine foo_opt

25585

+end module m

25586

+ use m

25587

+ class(t), allocatable :: xca(:)

25588

+ allocate (xca(1), source = t(42))

25589

+ select type (xca)

25590

+ type is (t)

25591

+ if (any (xca%i .ne. [42])) call abort

25592

+ end select

25593

+ call opt (xca = xca)

25594

+ select type (xca)

25595

+ type is (t)

25596

+ if (any (xca%i .ne. [9,99,999])) call abort

25597

+ end select

25598

+end

25599

Index: gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90

25600

===================================================================

25601

--- a/src/gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90 (.../tags/gcc_4_8_2_release)

25602

+++ b/src/gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90 (.../branches/gcc-4_8-branch)

25603

@@ -0,0 +1,74 @@

25604

+! { dg-do run }

25605

+!

25606

+! PR 59654: [4.8/4.9 Regression] [OOP] Broken function table with complex OO use case

25607

+!

25608

+! Contributed by Thomas Clune <Thomas.L.Clune@nasa.gov>

25609

+

25610

+module TestResult_mod

25611

+ implicit none

25612

+

25613

+ type TestResult

25614

+ integer :: numRun = 0

25615

+ contains

25616

+ procedure :: run

25617

+ procedure, nopass :: getNumRun

25618

+ end type

25619

+

25620

+contains

25621

+

25622

+ subroutine run (this)

25623

+ class (TestResult) :: this

25624

+ this%numRun = this%numRun + 1

25625

+ end subroutine

25626

+

25627

+ subroutine getNumRun()

25628

+ end subroutine

25629

+

25630

+end module

25631

+

25632

+

25633

+module BaseTestRunner_mod

25634

+ implicit none

25635

+

25636

+ type :: BaseTestRunner

25637

+ contains

25638

+ procedure, nopass :: norun

25639

+ end type

25640

+

25641

+contains

25642

+

25643

+ function norun () result(result)

25644

+ use TestResult_mod, only: TestResult

25645

+ type (TestResult) :: result

25646

+ end function

25647

+

25648

+end module

25649

+

25650

+

25651

+module TestRunner_mod

25652

+ use BaseTestRunner_mod, only: BaseTestRunner

25653

+ implicit none

25654

+end module

25655

+

25656

+

25657

+program main

25658

+ use TestRunner_mod, only: BaseTestRunner

25659

+ use TestResult_mod, only: TestResult

25660

+ implicit none

25661

+

25662

+ type (TestResult) :: result

25663

+

25664

+ call runtest (result)

25665

+

25666

+contains

25667

+

25668

+ subroutine runtest (result)

25669

+ use TestResult_mod, only: TestResult

25670

+ class (TestResult) :: result

25671

+ call result%run()

25672

+ if (result%numRun /= 1) call abort()

25673

+ end subroutine

25674

+

25675

+end

25676

+

25677

+! { dg-final { cleanup-modules "TestResult_mod BaseTestRunner_mod TestRunner_mod" } }

25678

Index: gcc/testsuite/gfortran.dg/proc_ptr_45.f90

25679

===================================================================

25680

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_45.f90 (.../tags/gcc_4_8_2_release)

25681

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_45.f90 (.../branches/gcc-4_8-branch)

25682

@@ -0,0 +1,24 @@

25683

+! { dg-do compile }

25684

+!

25685

+! PR fortran/49397

25686

+!

25687

+! Valid per IR F08/0060 and F2008Corr2, C729

25688

+!

25689

+Program m5

25690

+ Print *,f()

25691

+Contains

25692

+ Subroutine s

25693

+ Procedure(Real),Pointer :: p

25694

+ Print *,g()

25695

+ p => f ! (1)

25696

+ Print *,p()

25697

+ p => g ! (2)

25698

+ Print *,p()

25699

+ End Subroutine

25700

+End Program

25701

+Function f()

25702

+ f = 1

25703

+End Function

25704

+Function g()

25705

+ g = 2

25706

+End Function

25707

Index: gcc/testsuite/gfortran.dg/pr59700.f90

25708

===================================================================

25709

--- a/src/gcc/testsuite/gfortran.dg/pr59700.f90 (.../tags/gcc_4_8_2_release)

25710

+++ b/src/gcc/testsuite/gfortran.dg/pr59700.f90 (.../branches/gcc-4_8-branch)

25711

@@ -0,0 +1,40 @@

25712

+! { dg-do run }

25713

+! PR59700 Test case by Steve Kargl

25714

+program foo

25715

+

25716

+ implicit none

25717

+

25718

+ character(len=80) msg

25719

+ integer, parameter :: fd = 10

25720

+ integer i1, i2, i3, i4

25721

+ real x1, x2, x3, x4

25722

+ complex c1, c2

25723

+ logical a

25724

+

25725

+ open(unit=fd, status='scratch')

25726

+ write(fd, '(A)') '1 2 3.4 q'

25727

+

25728

+ rewind(fd)

25729

+ msg = 'ok'

25730

+ read(fd, *, err=10, iomsg=msg) i1, i2, i3, i4

25731

+10 if (msg /= 'Bad integer for item 3 in list input') call abort

25732

+ rewind(fd)

25733

+ msg = 'ok'

25734

+ read(fd, *, err=20, iomsg=msg) x1, x2, x3, x4

25735

+20 if (msg /= 'Bad real number in item 4 of list input') call abort

25736

+ rewind(fd)

25737

+ msg = 'ok'

25738

+ read(fd, *, err=30, iomsg=msg) i1, x2, x1, a

25739

+30 if (msg /= 'Bad logical value while reading item 4') call abort

25740

+ rewind(fd)

25741

+ read(fd, *, err=31, iomsg=msg) i1, x2, a, x1

25742

+31 if (msg /= 'Bad repeat count in item 3 of list input') call abort

25743

+ close(fd)

25744

+ open(unit=fd, status='scratch')

25745

+ write(fd, '(A)') '(1, 2) (3.4, q)'

25746

+ rewind(fd)

25747

+ msg = 'ok'

25748

+ read(fd, *, err=40, iomsg=msg) c1, c2

25749

+40 if (msg /= 'Bad floating point number for item 2') call abort

25750

+ close(fd)

25751

+end program foo

25752

Index: gcc/testsuite/gfortran.dg/ichar_3.f90

25753

===================================================================

25754

--- a/src/gcc/testsuite/gfortran.dg/ichar_3.f90 (.../tags/gcc_4_8_2_release)

25755

+++ b/src/gcc/testsuite/gfortran.dg/ichar_3.f90 (.../branches/gcc-4_8-branch)

25756

@@ -0,0 +1,13 @@

25757

+! { dg-do compile }

25758

+!

25759

+! PR fortran/59599

25760

+! The call to ichar was triggering an ICE.

25761

+!

25762

+! Original testcase from Fran Martinez Fadrique <fmartinez@gmv.com>

25763

+

25764

+character(1) cpk(2)

25765

+integer res(2)

25766

+cpk = 'a'

25767

+res = ichar( cpk, kind=1 )

25768

+print *, ichar( cpk, kind=1 )

25769

+end

25770

Index: gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90

25771

===================================================================

25772

--- a/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90 (.../tags/gcc_4_8_2_release)

25773

+++ b/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90 (.../branches/gcc-4_8-branch)

25774

@@ -0,0 +1,17 @@

25775

+! { dg-do compile }

25776

+!

25777

+! PR 59493: [OOP] ICE: Segfault on Class(*) pointer association

25778

+!

25779

+! Contributed by Hossein Talebi <talebi.hossein@gmail.com>

25780

+

25781

+ implicit none

25782

+

25783

+ type ty_mytype1

25784

+ end type

25785

+

25786

+ class(ty_mytype1), allocatable, target:: cla1

25787

+ class(*), pointer :: ptr

25788

+

25789

+ ptr => cla1

25790

+

25791

+end

25792

Index: gcc/testsuite/gfortran.dg/fmt_g_1.f90

25793

===================================================================

25794

--- a/src/gcc/testsuite/gfortran.dg/fmt_g_1.f90 (.../tags/gcc_4_8_2_release)

25795

+++ b/src/gcc/testsuite/gfortran.dg/fmt_g_1.f90 (.../branches/gcc-4_8-branch)

25796

@@ -0,0 +1,11 @@

25797

+! { dg-do run }

25798

+! PR59771 Cleanup handling of Gw.0 and Gw.0Ee format

25799

+! Test case prepared by Dominique d'Humieres <dominiq@lps.ens.fr>

25800

+ PROGRAM FOO

25801

+ character(len=60) :: buffer, buffer1

25802

+

25803

+ write (buffer ,'(6(1X,1PG9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0

25804

+ write (buffer1,'(6(1X,1PE9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0

25805

+

25806

+ if (buffer /= buffer1) call abort

25807

+ end

25808

Index: gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90

25809

===================================================================

25810

--- a/src/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 (.../tags/gcc_4_8_2_release)

25811

+++ b/src/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 (.../branches/gcc-4_8-branch)

25812

@@ -0,0 +1,39 @@

25813

+! { dg-do run }

25814

+!

25815

+! PR fortran/59906

25816

+!

25817

+! Contributed by H Anlauf <anlauf@gmx.de>

25818

+!

25819

+! Failed generate character scalar for scalarized loop for elemantal call.

25820

+!

25821

+program x

25822

+ implicit none

25823

+ call y('bbb')

25824

+contains

25825

+

25826

+ subroutine y(str)

25827

+ character(len=*), intent(in) :: str

25828

+ character(len=len_trim(str)) :: str_aux

25829

+ character(len=3) :: str3 = 'abc'

25830

+

25831

+ str_aux = str

25832

+

25833

+ ! Compiled but did not give correct result

25834

+ if (any (str_cmp((/'aaa','bbb'/), str) .neqv. [.FALSE.,.TRUE.])) call abort

25835

+

25836

+ ! Did not compile

25837

+ if (any (str_cmp((/'bbb', 'aaa'/), str_aux) .neqv. [.TRUE.,.FALSE.])) call abort

25838

+

25839

+ ! Verify patch

25840

+ if (any (str_cmp((/'bbb', 'aaa'/), str3) .neqv. [.FALSE.,.FALSE.])) call abort

25841

+ if (any (str_cmp((/'bbb', 'aaa'/), 'aaa') .neqv. [.FALSE.,.TRUE.])) call abort

25842

+

25843

+ end subroutine y

25844

+

25845

+ elemental logical function str_cmp(str1, str2)

25846

+ character(len=*), intent(in) :: str1

25847

+ character(len=*), intent(in) :: str2

25848

+ str_cmp = (str1 == str2)

25849

+ end function str_cmp

25850

+

25851

+end program x

25852

Index: gcc/testsuite/gcc.c-torture/execute/20140212-1.c

25853

===================================================================

25854

--- a/src/gcc/testsuite/gcc.c-torture/execute/20140212-1.c (.../tags/gcc_4_8_2_release)

25855

+++ b/src/gcc/testsuite/gcc.c-torture/execute/20140212-1.c (.../branches/gcc-4_8-branch)

25856

@@ -0,0 +1,37 @@

25857

+/* PR rtl-optimization/60116 */

25858

+/* Reported by Zhendong Su <su@cs.ucdavis.edu> */

25859

+

25860

+extern void abort (void);

25861

+

25862

+int a, b, c, d = 1, e, f = 1, h, i, k;

25863

+char g, j;

25864

+

25865

+void

25866

+fn1 (void)

25867

+{

25868

+ int l;

25869

+ e = 0;

25870

+ c = 0;

25871

+ for (;;)

25872

+ {

25873

+ k = a && b;

25874

+ j = k * 54;

25875

+ g = j * 147;

25876

+ l = ~g + (long long) e && 1;

25877

+ if (d)

25878

+ c = l;

25879

+ else

25880

+ h = i = l * 9UL;

25881

+ if (f)

25882

+ return;

25883

+ }

25884

+}

25885

+

25886

+int

25887

+main (void)

25888

+{

25889

+ fn1 ();

25890

+ if (c != 1)

25891

+ abort ();

25892

+ return 0;

25893

+}

25894

Index: gcc/testsuite/gcc.c-torture/execute/pr58984.c

25895

===================================================================

25896

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58984.c (.../tags/gcc_4_8_2_release)

25897

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58984.c (.../branches/gcc-4_8-branch)

25898

@@ -0,0 +1,57 @@

25899

+/* PR tree-optimization/58984 */

25900

+

25901

+struct S { int f0 : 8; int : 6; int f1 : 5; };

25902

+struct T { char f0; int : 6; int f1 : 5; };

25903

+

25904

+int a, *c = &a, e, n, b, m;

25905

+

25906

+static int

25907

+foo (struct S p)

25908

+{

25909

+ const unsigned short *f[36];

25910

+ for (; e < 2; e++)

25911

+ {

25912

+ const unsigned short **i = &f[0];

25913

+ *c ^= 1;

25914

+ if (p.f1)

25915

+ {

25916

+ *i = 0;

25917

+ return b;

25918

+ }

25919

+ }

25920

+ return 0;

25921

+}

25922

+

25923

+static int

25924

+bar (struct T p)

25925

+{

25926

+ const unsigned short *f[36];

25927

+ for (; e < 2; e++)

25928

+ {

25929

+ const unsigned short **i = &f[0];

25930

+ *c ^= 1;

25931

+ if (p.f1)

25932

+ {

25933

+ *i = 0;

25934

+ return b;

25935

+ }

25936

+ }

25937

+ return 0;

25938

+}

25939

+

25940

+int

25941

+main ()

25942

+{

25943

+ struct S o = { 1, 1 };

25944

+ foo (o);

25945

+ m = n || o.f0;

25946

+ if (a != 1)

25947

+ __builtin_abort ();

25948

+ e = 0;

25949

+ struct T p = { 1, 1 };

25950

+ bar (p);

25951

+ m |= n || p.f0;

25952

+ if (a != 0)

25953

+ __builtin_abort ();

25954

+ return 0;

25955

+}

25956

Index: gcc/testsuite/gcc.c-torture/execute/pr60454.c

25957

===================================================================

25958

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60454.c (.../tags/gcc_4_8_2_release)

25959

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60454.c (.../branches/gcc-4_8-branch)

25960

@@ -0,0 +1,31 @@

25961

+#ifdef __UINT32_TYPE__

25962

+typedef __UINT32_TYPE__ uint32_t;

25963

+#else

25964

+typedef unsigned uint32_t;

25965

+#endif

25966

+

25967

+#define __fake_const_swab32(x) ((uint32_t)( \

25968

+ (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \

25969

+ (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \

25970

+ (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 8) | \

25971

+ (((uint32_t)(x) & (uint32_t)0x0000ff00UL) ) | \

25972

+ (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))

25973

+

25974

+/* Previous version of bswap optimization would detect byte swap when none

25975

+ happen. This test aims at catching such wrong detection to avoid

25976

+ regressions. */

25977

+

25978

+__attribute__ ((noinline, noclone)) uint32_t

25979

+fake_swap32 (uint32_t in)

25980

+{

25981

+ return __fake_const_swab32 (in);

25982

+}

25983

+

25984

+int main(void)

25985

+{

25986

+ if (sizeof (uint32_t) * __CHAR_BIT__ != 32)

25987

+ return 0;

25988

+ if (fake_swap32 (0x12345678UL) != 0x78567E12UL)

25989

+ __builtin_abort ();

25990

+ return 0;

25991

+}

25992

Index: gcc/testsuite/gcc.c-torture/execute/pr60017.c

25993

===================================================================

25994

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60017.c (.../tags/gcc_4_8_2_release)

25995

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60017.c (.../branches/gcc-4_8-branch)

25996

@@ -0,0 +1,33 @@

25997

+/* PR target/60017 */

25998

+

25999

+extern void abort (void);

26000

+

26001

+struct S0

26002

+{

26003

+ short m0;

26004

+ short m1;

26005

+};

26006

+

26007

+struct S1

26008

+{

26009

+ unsigned m0:1;

26010

+ char m1[2][2];

26011

+ struct S0 m2[2];

26012

+};

26013

+

26014

+struct S1 x = { 1, {{2, 3}, {4, 5}}, {{6, 7}, {8, 9}} };

26015

+

26016

+struct S1 func (void)

26017

+{

26018

+ return x;

26019

+}

26020

+

26021

+int main (void)

26022

+{

26023

+ struct S1 ret = func ();

26024

+

26025

+ if (ret.m2[1].m1 != 9)

26026

+ abort ();

26027

+

26028

+ return 0;

26029

+}

26030

Index: gcc/testsuite/gcc.c-torture/execute/20131127-1.c

26031

===================================================================

26032

--- a/src/gcc/testsuite/gcc.c-torture/execute/20131127-1.c (.../tags/gcc_4_8_2_release)

26033

+++ b/src/gcc/testsuite/gcc.c-torture/execute/20131127-1.c (.../branches/gcc-4_8-branch)

26034

@@ -0,0 +1,34 @@

26035

+/* PR middle-end/59138 */

26036

+/* Testcase by John Regehr <regehr@cs.utah.edu> */

26037

+

26038

+extern void abort (void);

26039

+

26040

+#pragma pack(1)

26041

+

26042

+struct S0 {

26043

+ int f0;

26044

+ int f1;

26045

+ int f2;

26046

+ short f3;

26047

+};

26048

+

26049

+short a = 1;

26050

+

26051

+struct S0 b = { 1 }, c, d, e;

26052

+

26053

+struct S0 fn1() { return c; }

26054

+

26055

+void fn2 (void)

26056

+{

26057

+ b = fn1 ();

26058

+ a = 0;

26059

+ d = e;

26060

+}

26061

+

26062

+int main (void)

26063

+{

26064

+ fn2 ();

26065

+ if (a != 0)

26066

+ abort ();

26067

+ return 0;

26068

+}

26069

Index: gcc/testsuite/gcc.c-torture/execute/pr59358.c

26070

===================================================================

26071

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59358.c (.../tags/gcc_4_8_2_release)

26072

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59358.c (.../branches/gcc-4_8-branch)

26073

@@ -0,0 +1,44 @@

26074

+/* PR tree-optimization/59358 */

26075

+

26076

+__attribute__((noinline, noclone)) int

26077

+foo (int *x, int y)

26078

+{

26079

+ int z = *x;

26080

+ if (y > z && y <= 16)

26081

+ while (y > z)

26082

+ z *= 2;

26083

+ return z;

26084

+}

26085

+

26086

+int

26087

+main ()

26088

+{

26089

+ int i;

26090

+ for (i = 1; i < 17; i++)

26091

+ {

26092

+ int j = foo (&i, 16);

26093

+ int k;

26094

+ if (i >= 8 && i <= 15)

26095

+ k = 16 + (i - 8) * 2;

26096

+ else if (i >= 4 && i <= 7)

26097

+ k = 16 + (i - 4) * 4;

26098

+ else if (i == 3)

26099

+ k = 24;

26100

+ else

26101

+ k = 16;

26102

+ if (j != k)

26103

+ __builtin_abort ();

26104

+ j = foo (&i, 7);

26105

+ if (i >= 7)

26106

+ k = i;

26107

+ else if (i >= 4)

26108

+ k = 8 + (i - 4) * 2;

26109

+ else if (i == 3)

26110

+ k = 12;

26111

+ else

26112

+ k = 8;

26113

+ if (j != k)

26114

+ __builtin_abort ();

26115

+ }

26116

+ return 0;

26117

+}

26118

Index: gcc/testsuite/gcc.c-torture/execute/pr60062.c

26119

===================================================================

26120

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60062.c (.../tags/gcc_4_8_2_release)

26121

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60062.c (.../branches/gcc-4_8-branch)

26122

@@ -0,0 +1,25 @@

26123

+/* PR target/60062 */

26124

+

26125

+int a;

26126

+

26127

+static void

26128

+foo (const char *p1, int p2)

26129

+{

26130

+ if (__builtin_strcmp (p1, "hello") != 0)

26131

+ __builtin_abort ();

26132

+}

26133

+

26134

+static void

26135

+bar (const char *p1)

26136

+{

26137

+ if (__builtin_strcmp (p1, "hello") != 0)

26138

+ __builtin_abort ();

26139

+}

26140

+

26141

+__attribute__((optimize (0))) int

26142

+main ()

26143

+{

26144

+ foo ("hello", a);

26145

+ bar ("hello");

26146

+ return 0;

26147

+}

26148

Index: gcc/testsuite/gcc.c-torture/execute/pr59014-2.c

26149

===================================================================

26150

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59014-2.c (.../tags/gcc_4_8_2_release)

26151

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59014-2.c (.../branches/gcc-4_8-branch)

26152

@@ -0,0 +1,23 @@

26153

+/* PR tree-optimization/59014 */

26154

+

26155

+__attribute__((noinline, noclone)) long long int

26156

+foo (long long int x, long long int y)

26157

+{

26158

+ if (((int) x | (int) y) != 0)

26159

+ return 6;

26160

+ return x + y;

26161

+}

26162

+

26163

+int

26164

+main ()

26165

+{

26166

+ if (sizeof (long long) == sizeof (int))

26167

+ return 0;

26168

+ int shift_half = sizeof (int) * __CHAR_BIT__ / 2;

26169

+ long long int x = (3LL << shift_half) << shift_half;

26170

+ long long int y = (5LL << shift_half) << shift_half;

26171

+ long long int z = foo (x, y);

26172

+ if (z != ((8LL << shift_half) << shift_half))

26173

+ __builtin_abort ();

26174

+ return 0;

26175

+}

26176

Index: gcc/testsuite/gcc.c-torture/execute/pr59101.c

26177

===================================================================

26178

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59101.c (.../tags/gcc_4_8_2_release)

26179

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59101.c (.../branches/gcc-4_8-branch)

26180

@@ -0,0 +1,15 @@

26181

+/* PR target/59101 */

26182

+

26183

+__attribute__((noinline, noclone)) int

26184

+foo (int a)

26185

+{

26186

+ return (~a & 4102790424LL) > 0 | 6;

26187

+}

26188

+

26189

+int

26190

+main ()

26191

+{

26192

+ if (foo (0) != 7)

26193

+ __builtin_abort ();

26194

+ return 0;

26195

+}

26196

Index: gcc/testsuite/gcc.c-torture/execute/pr58831.c

26197

===================================================================

26198

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c (.../tags/gcc_4_8_2_release)

26199

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c (.../branches/gcc-4_8-branch)

26200

@@ -0,0 +1,40 @@

26201

+#include <assert.h>

26202

+

26203

+int a, *b, c, d, f, **i, p, q, *r;

26204

+short o, j;

26205

+

26206

+static int __attribute__((noinline, noclone))

26207

+fn1 (int *p1, int **p2)

26208

+{

26209

+ int **e = &b;

26210

+ for (; p; p++)

26211

+ *p1 = 1;

26212

+ *e = *p2 = &d;

26213

+

26214

+ assert (r);

26215

+

26216

+ return c;

26217

+}

26218

+

26219

+static int ** __attribute__((noinline, noclone))

26220

+fn2 (void)

26221

+{

26222

+ for (f = 0; f != 42; f++)

26223

+ {

26224

+ int *g[3] = {0, 0, 0};

26225

+ for (o = 0; o; o--)

26226

+ for (; a > 1;)

26227

+ {

26228

+ int **h[1] = { &g[2] };

26229

+ }

26230

+ }

26231

+ return &r;

26232

+}

26233

+

26234

+int

26235

+main (void)

26236

+{

26237

+ i = fn2 ();

26238

+ fn1 (b, i);

26239

+ return 0;

26240

+}

26241

Index: gcc/testsuite/gcc.c-torture/execute/pr58726.c

26242

===================================================================

26243

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58726.c (.../tags/gcc_4_8_2_release)

26244

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58726.c (.../branches/gcc-4_8-branch)

26245

@@ -0,0 +1,26 @@

26246

+/* PR rtl-optimization/58726 */

26247

+

26248

+int a, c;

26249

+union { int f1; int f2 : 1; } b;

26250

+

26251

+short

26252

+foo (short p)

26253

+{

26254

+ return p < 0 ? p : a;

26255

+}

26256

+

26257

+int

26258

+main ()

26259

+{

26260

+ if (sizeof (short) * __CHAR_BIT__ != 16

26261

+ || sizeof (int) * __CHAR_BIT__ != 32)

26262

+ return 0;

26263

+ b.f1 = 56374;

26264

+ unsigned short d;

26265

+ int e = b.f2;

26266

+ d = e == 0 ? b.f1 : 0;

26267

+ c = foo (d);

26268

+ if (c != (short) 56374)

26269

+ __builtin_abort ();

26270

+ return 0;

26271

+}

26272

Index: gcc/testsuite/gcc.c-torture/execute/pr59014.c

26273

===================================================================

26274

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59014.c (.../tags/gcc_4_8_2_release)

26275

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59014.c (.../branches/gcc-4_8-branch)

26276

@@ -0,0 +1,25 @@

26277

+/* PR tree-optimization/59014 */

26278

+

26279

+int a = 2, b, c, d;

26280

+

26281

+int

26282

+foo ()

26283

+{

26284

+ for (;; c++)

26285

+ if ((b > 0) | (a & 1))

26286

+ ;

26287

+ else

26288

+ {

26289

+ d = a;

26290

+ return 0;

26291

+ }

26292

+}

26293

+

26294

+int

26295

+main ()

26296

+{

26297

+ foo ();

26298

+ if (d != 2)

26299

+ __builtin_abort ();

26300

+ return 0;

26301

+}

26302

Index: gcc/testsuite/gcc.c-torture/execute/pr60072.c

26303

===================================================================

26304

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60072.c (.../tags/gcc_4_8_2_release)

26305

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60072.c (.../branches/gcc-4_8-branch)

26306

@@ -0,0 +1,16 @@

26307

+/* PR target/60072 */

26308

+

26309

+int c = 1;

26310

+

26311

+__attribute__ ((optimize (1)))

26312

+static int *foo (int *p)

26313

+{

26314

+ return p;

26315

+}

26316

+

26317

+int

26318

+main ()

26319

+{

26320

+ *foo (&c) = 2;

26321

+ return c - 2;

26322

+}

26323

Index: gcc/testsuite/gcc.c-torture/execute/20140326-1.c

26324

===================================================================

26325

--- a/src/gcc/testsuite/gcc.c-torture/execute/20140326-1.c (.../tags/gcc_4_8_2_release)

26326

+++ b/src/gcc/testsuite/gcc.c-torture/execute/20140326-1.c (.../branches/gcc-4_8-branch)

26327

@@ -0,0 +1,10 @@

26328

+int a;

26329

+

26330

+int

26331

+main (void)

26332

+{

26333

+ char e[2] = { 0, 0 }, f = 0;

26334

+ if (a == 131072)

26335

+ f = e[a];

26336

+ return f;

26337

+}

26338

Index: gcc/testsuite/gcc.c-torture/execute/pr59388.c

26339

===================================================================

26340

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59388.c (.../tags/gcc_4_8_2_release)

26341

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59388.c (.../branches/gcc-4_8-branch)

26342

@@ -0,0 +1,11 @@

26343

+/* PR tree-optimization/59388 */

26344

+

26345

+int a;

26346

+struct S { unsigned int f:1; } b;

26347

+

26348

+int

26349

+main ()

26350

+{

26351

+ a = (0 < b.f) | b.f;

26352

+ return a;

26353

+}

26354

Index: gcc/testsuite/gcc.c-torture/compile/pr58970-1.c

26355

===================================================================

26356

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr58970-1.c (.../tags/gcc_4_8_2_release)

26357

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr58970-1.c (.../branches/gcc-4_8-branch)

26358

@@ -0,0 +1,11 @@

26359

+/* PR middle-end/58970 */

26360

+

26361

+struct T { int b : 1; };

26362

+struct S { struct T t[1]; };

26363

+

26364

+void

26365

+foo (int x, struct S *s)

26366

+{

26367

+ if (x == -1)

26368

+ s->t[x].b = 0;

26369

+}

26370

Index: gcc/testsuite/gcc.c-torture/compile/pr59803.c

26371

===================================================================

26372

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr59803.c (.../tags/gcc_4_8_2_release)

26373

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr59803.c (.../branches/gcc-4_8-branch)

26374

@@ -0,0 +1,27 @@

26375

+/* PR target/59803 */

26376

+

26377

+extern void baz (void) __attribute__ ((__noreturn__));

26378

+struct A { int g, h; };

26379

+extern struct A a;

26380

+struct B { unsigned char i, j, k, l, m; };

26381

+int c, d, e;

26382

+static int f;

26383

+

26384

+void

26385

+foo (void)

26386

+{

26387

+ f = 1;

26388

+}

26389

+

26390

+void

26391

+bar (struct B *x)

26392

+{

26393

+ x->i = e;

26394

+ x->k = c;

26395

+ x->l = d;

26396

+ x->j = a.h;

26397

+ x->m = f;

26398

+ if (x->i != e) baz ();

26399

+ if (x->k != c) baz ();

26400

+ if (x->j != a.h) baz ();

26401

+}

26402

Index: gcc/testsuite/gcc.c-torture/compile/pr58997.c

26403

===================================================================

26404

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr58997.c (.../tags/gcc_4_8_2_release)

26405

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr58997.c (.../branches/gcc-4_8-branch)

26406

@@ -0,0 +1,19 @@

26407

+/* PR rtl-optimization/58997 */

26408

+

26409

+int a, b, c, e;

26410

+short d;

26411

+char h;

26412

+

26413

+void

26414

+foo ()

26415

+{

26416

+ while (b)

26417

+ {

26418

+ d = a ? c : 1 % a;

26419

+ c = d;

26420

+ h = d;

26421

+ if (!h)

26422

+ while (e)

26423

+ ;

26424

+ }

26425

+}

26426

Index: gcc/testsuite/gcc.c-torture/compile/pr58970-2.c

26427

===================================================================

26428

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr58970-2.c (.../tags/gcc_4_8_2_release)

26429

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr58970-2.c (.../branches/gcc-4_8-branch)

26430

@@ -0,0 +1,11 @@

26431

+/* PR middle-end/58970 */

26432

+

26433

+struct T { char a : 8; char b : 1; };

26434

+struct S { char x; struct T t[1]; };

26435

+

26436

+void

26437

+foo (int x, struct S *s)

26438

+{

26439

+ if (x == -1)

26440

+ s->t[x].b = 0;

26441

+}

26442

Index: gcc/testsuite/gcc.c-torture/compile/pr59362.c

26443

===================================================================

26444

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr59362.c (.../tags/gcc_4_8_2_release)

26445

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr59362.c (.../branches/gcc-4_8-branch)

26446

@@ -0,0 +1,21 @@

26447

+/* PR tree-optimization/59362 */

26448

+

26449

+char *

26450

+foo (char *r, int s)

26451

+{

26452

+ r = __builtin___stpcpy_chk (r, "abc", __builtin_object_size (r, 1));

26453

+ if (s)

26454

+ r = __builtin___stpcpy_chk (r, "d", __builtin_object_size (r, 1));

26455

+ return r;

26456

+}

26457

+

26458

+char *a;

26459

+long int b;

26460

+

26461

+void

26462

+bar (void)

26463

+{

26464

+ b = __builtin_object_size (0, 0);

26465

+ a = __builtin___stpcpy_chk (0, "", b);

26466

+ b = __builtin_object_size (a, 0);

26467

+}

26468

Index: gcc/testsuite/gnat.dg/opt32.adb

26469

===================================================================

26470

--- a/src/gcc/testsuite/gnat.dg/opt32.adb (.../tags/gcc_4_8_2_release)

26471

+++ b/src/gcc/testsuite/gnat.dg/opt32.adb (.../branches/gcc-4_8-branch)

26472

@@ -0,0 +1,37 @@

26473

+-- { dg-do compile }

26474

+-- { dg-options "-O2" }

26475

+

26476

+with Ada.Containers; use Ada.Containers;

26477

+with Ada.Containers.Vectors;

26478

+

26479

+function Opt32 return Natural is

26480

+

26481

+ package My_Vectors

26482

+ is new Vectors (Index_Type => Natural, Element_Type => Integer);

26483

+ use My_Vectors;

26484

+

26485

+ V : Vector;

26486

+

26487

+ function Sign_Changes return Natural is

26488

+ Cur : Cursor := To_Cursor (V, 0);

26489

+ R : Natural := 0;

26490

+ Negative : Boolean;

26491

+ begin

26492

+ Negative := Element (Cur) < 0;

26493

+

26494

+ loop

26495

+ Cur := Next (Cur);

26496

+ exit when R > 100;

26497

+

26498

+ if (Element (Cur) < 0) /= Negative then

26499

+ Negative := not Negative;

26500

+ R := R + 1;

26501

+ end if;

26502

+ end loop;

26503

+

26504

+ return R;

26505

+ end;

26506

+

26507

+begin

26508

+ return Sign_Changes;

26509

+end;

26510

Index: gcc/testsuite/gcc.dg/pr58668.c

26511

===================================================================

26512

--- a/src/gcc/testsuite/gcc.dg/pr58668.c (.../tags/gcc_4_8_2_release)

26513

+++ b/src/gcc/testsuite/gcc.dg/pr58668.c (.../branches/gcc-4_8-branch)

26514

@@ -0,0 +1,25 @@

26515

+/* PR rtl-optimization/58668 */

26516

+/* { dg-do compile } */

26517

+/* { dg-options "-O2" } */

26518

+/* { dg-additional-options "-mthumb" { target { { arm*-*-* } && arm_thumb2_ok } } } */

26519

+

26520

+void *fn1 (void *);

26521

+void *fn2 (void *, const char *);

26522

+void fn3 (void *);

26523

+void fn4 (void *, int);

26524

+

26525

+void *

26526

+test (void *x)

26527

+{

26528

+ void *a, *b;

26529

+ if (!(a = fn1 (x)))

26530

+ return (void *) 0;

26531

+ if (!(b = fn2 (a, "w")))

26532

+ {

26533

+ fn3 (a);

26534

+ return (void *) 0;

26535

+ }

26536

+ fn3 (a);

26537

+ fn4 (b, 1);

26538

+ return b;

26539

+}

26540

Index: gcc/testsuite/gcc.dg/pr57518.c

26541

===================================================================

26542

--- a/src/gcc/testsuite/gcc.dg/pr57518.c (.../tags/gcc_4_8_2_release)

26543

+++ b/src/gcc/testsuite/gcc.dg/pr57518.c (.../branches/gcc-4_8-branch)

26544

@@ -1,8 +1,8 @@

26545

-/* PR rtl-optimization/57130 */

26546

+/* PR rtl-optimization/57518 */

26547

26548

/* { dg-do compile } */

26549

/* { dg-options "-O2 -fdump-rtl-ira" } */

26550

-/* { dg-final { scan-rtl-dump-not "REG_EQUIV.*mem.*\"ip\"" "ira" } } */

26551

+/* { dg-final { scan-rtl-dump-not "REG_EQUIV\[^\n\]*mem\[^\n\]*\"ip\".*subreg" "ira" } } */

26552

26553

char ip[10];

26554

int total;

26555

Index: gcc/testsuite/gcc.dg/builtin-object-size-14.c

26556

===================================================================

26557

--- a/src/gcc/testsuite/gcc.dg/builtin-object-size-14.c (.../tags/gcc_4_8_2_release)

26558

+++ b/src/gcc/testsuite/gcc.dg/builtin-object-size-14.c (.../branches/gcc-4_8-branch)

26559

@@ -0,0 +1,28 @@

26560

+/* { dg-do run } */

26561

+/* { dg-options "-O2" } */

26562

+

26563

+extern void abort (void);

26564

+extern char *strncpy(char *, const char *, __SIZE_TYPE__);

26565

+

26566

+union u {

26567

+ struct {

26568

+ char vi[8];

26569

+ char pi[16];

26570

+ };

26571

+ char all[8+16+4];

26572

+};

26573

+

26574

+void __attribute__((noinline,noclone))

26575

+f(union u *u)

26576

+{

26577

+ char vi[8+1];

26578

+ __builtin_strncpy(vi, u->vi, sizeof(u->vi));

26579

+ if (__builtin_object_size (u->all, 1) != -1)

26580

+ abort ();

26581

+}

26582

+int main()

26583

+{

26584

+ union u u;

26585

+ f (&u);

26586

+ return 0;

26587

+}

26588

Index: gcc/testsuite/gcc.dg/gomp/pr58809.c

26589

===================================================================

26590

--- a/src/gcc/testsuite/gcc.dg/gomp/pr58809.c (.../tags/gcc_4_8_2_release)

26591

+++ b/src/gcc/testsuite/gcc.dg/gomp/pr58809.c (.../branches/gcc-4_8-branch)

26592

@@ -0,0 +1,13 @@

26593

+/* PR middle-end/58809 */

26594

+/* { dg-do compile } */

26595

+/* { dg-options "-fopenmp -O" } */

26596

+

26597

+int i;

26598

+#pragma omp threadprivate (i)

26599

+

26600

+void foo()

26601

+{

26602

+ _Complex int j;

26603

+#pragma omp parallel copyin (i) reduction (&&:j)

26604

+ ;

26605

+}

26606

Index: gcc/testsuite/gcc.dg/20050922-1.c

26607

===================================================================

26608

--- a/src/gcc/testsuite/gcc.dg/20050922-1.c (.../tags/gcc_4_8_2_release)

26609

+++ b/src/gcc/testsuite/gcc.dg/20050922-1.c (.../branches/gcc-4_8-branch)

26610

@@ -4,7 +4,7 @@

26611

/* { dg-do run } */

26612

/* { dg-options "-O1 -std=c99" } */

26613

26614

-#include <stdlib.h>

26615

+extern void abort (void);

26616

26617

#if __INT_MAX__ == 2147483647

26618

typedef unsigned int uint32_t;

26619

Index: gcc/testsuite/gcc.dg/pr46309.c

26620

===================================================================

26621

--- a/src/gcc/testsuite/gcc.dg/pr46309.c (.../tags/gcc_4_8_2_release)

26622

+++ b/src/gcc/testsuite/gcc.dg/pr46309.c (.../branches/gcc-4_8-branch)

26623

@@ -1,5 +1,5 @@

26624

/* PR tree-optimization/46309 */

26625

-/* { dg-do compile } */

26626

+/* { dg-do compile { target { ! { cris*-*-* } } } } */

26627

/* { dg-options "-O2 -fdump-tree-reassoc-details" } */

26628

/* The transformation depends on BRANCH_COST being greater than 1

26629

(see the notes in the PR), so try to force that. */

26630

Index: gcc/testsuite/gcc.dg/pr60485-2.c

26631

===================================================================

26632

--- a/src/gcc/testsuite/gcc.dg/pr60485-2.c (.../tags/gcc_4_8_2_release)

26633

+++ b/src/gcc/testsuite/gcc.dg/pr60485-2.c (.../branches/gcc-4_8-branch)

26634

@@ -0,0 +1,38 @@

26635

+/* { dg-do run } */

26636

+/* { dg-options "-O2" } */

26637

+

26638

+extern void abort (void);

26639

+struct S {

26640

+ int *i[4];

26641

+ int *p1;

26642

+ int *p2;

26643

+ int *p3;

26644

+ int *p4;

26645

+ int **x;

26646

+};

26647

+int **b;

26648

+int main()

26649

+{

26650

+ int i = 1;

26651

+ struct S s;

26652

+ s.p3 = &i;

26653

+ int **p;

26654

+ if (b)

26655

+ p = b;

26656

+ else

26657

+ p = &s.i[2];

26658

+ p += 4;

26659

+ /* prevert fowrprop from creating an offsetted sd constraint and

26660

+ preserve the pointer offsetting constraint. */

26661

+ s.x = p;

26662

+ p = s.x;

26663

+ if (!b)

26664

+ {

26665

+ int *z = *p;

26666

+ /* z should point to i (and non-local/escaped). */

26667

+ *z = 0;

26668

+ }

26669

+ if (i != 0)

26670

+ abort ();

26671

+ return i;

26672

+}

26673

Index: gcc/testsuite/gcc.dg/atomic-store-6.c

26674

===================================================================

26675

--- a/src/gcc/testsuite/gcc.dg/atomic-store-6.c (.../tags/gcc_4_8_2_release)

26676

+++ b/src/gcc/testsuite/gcc.dg/atomic-store-6.c (.../branches/gcc-4_8-branch)

26677

@@ -0,0 +1,13 @@

26678

+/* { dg-do run } */

26679

+/* { dg-require-effective-target sync_int_128_runtime } */

26680

+/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */

26681

+

26682

+__int128_t i;

26683

+

26684

+int main()

26685

+{

26686

+ __atomic_store_16(&i, -1, 0);

26687

+ if (i != -1)

26688

+ __builtin_abort();

26689

+ return 0;

26690

+}

26691

Index: gcc/testsuite/gcc.dg/guality/pr59776.c

26692

===================================================================

26693

--- a/src/gcc/testsuite/gcc.dg/guality/pr59776.c (.../tags/gcc_4_8_2_release)

26694

+++ b/src/gcc/testsuite/gcc.dg/guality/pr59776.c (.../branches/gcc-4_8-branch)

26695

@@ -0,0 +1,29 @@

26696

+/* PR debug/59776 */

26697

+/* { dg-do run } */

26698

+/* { dg-options "-g" } */

26699

+

26700

+#include "../nop.h"

26701

+

26702

+struct S { float f, g; };

26703

+

26704

+__attribute__((noinline, noclone)) void

26705

+foo (struct S *p)

26706

+{

26707

+ struct S s1, s2; /* { dg-final { gdb-test pr59776.c:17 "s1.f" "5.0" } } */

26708

+ s1 = *p; /* { dg-final { gdb-test pr59776.c:17 "s1.g" "6.0" } } */

26709

+ s2 = s1; /* { dg-final { gdb-test pr59776.c:17 "s2.f" "0.0" } } */

26710

+ *(int *) &s2.f = 0; /* { dg-final { gdb-test pr59776.c:17 "s2.g" "6.0" } } */

26711

+ asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s1.f" "5.0" } } */

26712

+ asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s1.g" "6.0" } } */

26713

+ s2 = s1; /* { dg-final { gdb-test pr59776.c:20 "s2.f" "5.0" } } */

26714

+ asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s2.g" "6.0" } } */

26715

+ asm volatile (NOP : : : "memory");

26716

+}

26717

+

26718

+int

26719

+main ()

26720

+{

26721

+ struct S x = { 5.0f, 6.0f };

26722

+ foo (&x);

26723

+ return 0;

26724

+}

26725

Index: gcc/testsuite/gcc.dg/attr-weakref-1.c

26726

===================================================================

26727

--- a/src/gcc/testsuite/gcc.dg/attr-weakref-1.c (.../tags/gcc_4_8_2_release)

26728

+++ b/src/gcc/testsuite/gcc.dg/attr-weakref-1.c (.../branches/gcc-4_8-branch)

26729

@@ -4,12 +4,14 @@

26730

// This test requires support for undefined weak symbols. This support

26731

// is not available on hppa*-*-hpux*. The test is skipped rather than

26732

// xfailed to suppress the warning that would otherwise arise.

26733

-// { dg-skip-if "" { "*-*-darwin*" "hppa*-*-hpux*" } "*" { "" } }

26734

+// { dg-skip-if "" { "hppa*-*-hpux*" } "*" { "" } }

26735

// For kernel modules and static RTPs, the loader treats undefined weak

26736

// symbols in the same way as undefined strong symbols. The test

26737

// therefore fails to load, so skip it.

26738

// { dg-skip-if "" { "*-*-vxworks*" && nonpic } "*" { "-non-static" } }

26739

// { dg-options "-O2" }

26740

+// { dg-additional-options "-Wl,-undefined,dynamic_lookup" { target *-*-darwin* } }

26741

+// { dg-additional-options "-Wl,-flat_namespace" { target *-*-darwin[89]* } }

26742

// { dg-additional-sources "attr-weakref-1a.c" }

26743

26744

26745

Index: gcc/testsuite/gcc.dg/pr59827.c

26746

===================================================================

26747

--- a/src/gcc/testsuite/gcc.dg/pr59827.c (.../tags/gcc_4_8_2_release)

26748

+++ b/src/gcc/testsuite/gcc.dg/pr59827.c (.../branches/gcc-4_8-branch)

26749

@@ -0,0 +1,15 @@

26750

+/* PR middle-end/59827 */

26751

+/* { dg-do compile } */

26752

+

26753

+int

26754

+foo (int p[2][]) /* { dg-error "array type has incomplete element type" } */

26755

+{

26756

+ return p[0][0];

26757

+}

26758

+

26759

+void

26760

+bar (void)

26761

+{

26762

+ int p[2][1];

26763

+ foo (p); /* { dg-error "type of formal parameter 1 is incomplete" } */

26764

+}

26765

Index: gcc/testsuite/gcc.dg/vmx/stl-be-order.c

26766

===================================================================

26767

--- a/src/gcc/testsuite/gcc.dg/vmx/stl-be-order.c (.../tags/gcc_4_8_2_release)

26768

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl-be-order.c (.../branches/gcc-4_8-branch)

26769

@@ -0,0 +1,83 @@

26770

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

26771

+

26772

+#include "harness.h"

26773

+

26774

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

26775

+static signed char svsc[16] __attribute__ ((aligned (16)));

26776

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

26777

+static unsigned short svus[8] __attribute__ ((aligned (16)));

26778

+static signed short svss[8] __attribute__ ((aligned (16)));

26779

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

26780

+static unsigned short svp[8] __attribute__ ((aligned (16)));

26781

+static unsigned int svui[4] __attribute__ ((aligned (16)));

26782

+static signed int svsi[4] __attribute__ ((aligned (16)));

26783

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

26784

+static float svf[4] __attribute__ ((aligned (16)));

26785

+

26786

+static void check_arrays ()

26787

+{

26788

+ unsigned int i;

26789

+ for (i = 0; i < 16; ++i)

26790

+ {

26791

+ check (svuc[i] == i, "svuc");

26792

+ check (svsc[i] == i - 8, "svsc");

26793

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

26794

+ }

26795

+ for (i = 0; i < 8; ++i)

26796

+ {

26797

+ check (svus[i] == i, "svus");

26798

+ check (svss[i] == i - 4, "svss");

26799

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

26800

+ check (svp[i] == i, "svp");

26801

+ }

26802

+ for (i = 0; i < 4; ++i)

26803

+ {

26804

+ check (svui[i] == i, "svui");

26805

+ check (svsi[i] == i - 2, "svsi");

26806

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

26807

+ check (svf[i] == i * 1.0f, "svf");

26808

+ }

26809

+}

26810

+

26811

+static void test ()

26812

+{

26813

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

26814

+ vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

26815

+ vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

26816

+ vector bool char vbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

26817

+ vector unsigned short vus = {7,6,5,4,3,2,1,0};

26818

+ vector signed short vss = {3,2,1,0,-1,-2,-3,-4};

26819

+ vector bool short vbs = {65535,0,65535,0,65535,0,65535,0};

26820

+ vector pixel vp = {7,6,5,4,3,2,1,0};

26821

+ vector unsigned int vui = {3,2,1,0};

26822

+ vector signed int vsi = {1,0,-1,-2};

26823

+ vector bool int vbi = {0xffffffff,0,0xffffffff,0};

26824

+ vector float vf = {3.0,2.0,1.0,0.0};

26825

+#else

26826

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

26827

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

26828

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

26829

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

26830

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

26831

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

26832

+ vector pixel vp = {0,1,2,3,4,5,6,7};

26833

+ vector unsigned int vui = {0,1,2,3};

26834

+ vector signed int vsi = {-2,-1,0,1};

26835

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

26836

+ vector float vf = {0.0,1.0,2.0,3.0};

26837

+#endif

26838

+

26839

+ vec_stl (vuc, 0, (vector unsigned char *)svuc);

26840

+ vec_stl (vsc, 0, (vector signed char *)svsc);

26841

+ vec_stl (vbc, 0, (vector bool char *)svbc);

26842

+ vec_stl (vus, 0, (vector unsigned short *)svus);

26843

+ vec_stl (vss, 0, (vector signed short *)svss);

26844

+ vec_stl (vbs, 0, (vector bool short *)svbs);

26845

+ vec_stl (vp, 0, (vector pixel *)svp);

26846

+ vec_stl (vui, 0, (vector unsigned int *)svui);

26847

+ vec_stl (vsi, 0, (vector signed int *)svsi);

26848

+ vec_stl (vbi, 0, (vector bool int *)svbi);

26849

+ vec_stl (vf, 0, (vector float *)svf);

26850

+

26851

+ check_arrays ();

26852

+}

26853

Index: gcc/testsuite/gcc.dg/vmx/perm-be-order.c

26854

===================================================================

26855

--- a/src/gcc/testsuite/gcc.dg/vmx/perm-be-order.c (.../tags/gcc_4_8_2_release)

26856

+++ b/src/gcc/testsuite/gcc.dg/vmx/perm-be-order.c (.../branches/gcc-4_8-branch)

26857

@@ -0,0 +1,74 @@

26858

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

26859

+

26860

+#include "harness.h"

26861

+

26862

+static void test()

26863

+{

26864

+ /* Input vectors. */

26865

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

26866

+ vector unsigned char vucb = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

26867

+ vector signed char vsca = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

26868

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

26869

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

26870

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

26871

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

26872

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

26873

+ vector unsigned int vuia = {0,1,2,3};

26874

+ vector unsigned int vuib = {4,5,6,7};

26875

+ vector signed int vsia = {-4,-3,-2,-1};

26876

+ vector signed int vsib = {0,1,2,3};

26877

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

26878

+ vector float vfb = {0.0,1.0,2.0,3.0};

26879

+

26880

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

26881

+ vector unsigned char vucp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23};

26882

+ vector unsigned char vscp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23};

26883

+ vector unsigned char vusp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22};

26884

+ vector unsigned char vssp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22};

26885

+ vector unsigned char vuip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};

26886

+ vector unsigned char vsip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};

26887

+ vector unsigned char vfp = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};

26888

+#else

26889

+ vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

26890

+ vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

26891

+ vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

26892

+ vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

26893

+ vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

26894

+ vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

26895

+ vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

26896

+#endif

26897

+

26898

+ /* Result vectors. */

26899

+ vector unsigned char vuc;

26900

+ vector signed char vsc;

26901

+ vector unsigned short vus;

26902

+ vector signed short vss;

26903

+ vector unsigned int vui;

26904

+ vector signed int vsi;

26905

+ vector float vf;

26906

+

26907

+ /* Expected result vectors. */

26908

+ vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

26909

+ vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8};

26910

+ vector unsigned short vusr = {0,15,1,14,2,13,3,12};

26911

+ vector signed short vssr = {-8,7,-7,6,-6,5,-5,4};

26912

+ vector unsigned int vuir = {0,7,1,6};

26913

+ vector signed int vsir = {-4,3,-3,2};

26914

+ vector float vfr = {-4.0,3.0,-3.0,2.0};

26915

+

26916

+ vuc = vec_perm (vuca, vucb, vucp);

26917

+ vsc = vec_perm (vsca, vscb, vscp);

26918

+ vus = vec_perm (vusa, vusb, vusp);

26919

+ vss = vec_perm (vssa, vssb, vssp);

26920

+ vui = vec_perm (vuia, vuib, vuip);

26921

+ vsi = vec_perm (vsia, vsib, vsip);

26922

+ vf = vec_perm (vfa, vfb, vfp );

26923

+

26924

+ check (vec_all_eq (vuc, vucr), "vuc");

26925

+ check (vec_all_eq (vsc, vscr), "vsc");

26926

+ check (vec_all_eq (vus, vusr), "vus");

26927

+ check (vec_all_eq (vss, vssr), "vss");

26928

+ check (vec_all_eq (vui, vuir), "vui");

26929

+ check (vec_all_eq (vsi, vsir), "vsi");

26930

+ check (vec_all_eq (vf, vfr), "vf" );

26931

+}

26932

Index: gcc/testsuite/gcc.dg/vmx/insert-be-order.c

26933

===================================================================

26934

--- a/src/gcc/testsuite/gcc.dg/vmx/insert-be-order.c (.../tags/gcc_4_8_2_release)

26935

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert-be-order.c (.../branches/gcc-4_8-branch)

26936

@@ -0,0 +1,65 @@

26937

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

26938

+

26939

+#include "harness.h"

26940

+

26941

+static void test()

26942

+{

26943

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

26944

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

26945

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

26946

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

26947

+ vector unsigned int ve = {0,1,2,3};

26948

+ vector signed int vf = {-2,-1,0,1};

26949

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

26950

+

26951

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

26952

+ check (vec_all_eq (vec_insert (16, va, 5),

26953

+ ((vector unsigned char)

26954

+ {0,1,2,3,4,5,6,7,8,9,16,11,12,13,14,15})),

26955

+ "vec_insert (va LE)");

26956

+ check (vec_all_eq (vec_insert (-16, vb, 0),

26957

+ ((vector signed char)

26958

+ {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,-16})),

26959

+ "vec_insert (vb LE)");

26960

+ check (vec_all_eq (vec_insert (16, vc, 7),

26961

+ ((vector unsigned short){16,1,2,3,4,5,6,7})),

26962

+ "vec_insert (vc LE)");

26963

+ check (vec_all_eq (vec_insert (-16, vd, 3),

26964

+ ((vector signed short){-4,-3,-2,-1,-16,1,2,3})),

26965

+ "vec_insert (vd LE)");

26966

+ check (vec_all_eq (vec_insert (16, ve, 2),

26967

+ ((vector unsigned int){0,16,2,3})),

26968

+ "vec_insert (ve LE)");

26969

+ check (vec_all_eq (vec_insert (-16, vf, 1),

26970

+ ((vector signed int){-2,-1,-16,1})),

26971

+ "vec_insert (vf LE)");

26972

+ check (vec_all_eq (vec_insert (-16.0f, vg, 0),

26973

+ ((vector float){-2.0f,-1.0f,0.0f,-16.0f})),

26974

+ "vec_insert (vg LE)");

26975

+#else

26976

+ check (vec_all_eq (vec_insert (16, va, 5),

26977

+ ((vector unsigned char)

26978

+ {0,1,2,3,4,16,6,7,8,9,10,11,12,13,14,15})),

26979

+ "vec_insert (va BE)");

26980

+ check (vec_all_eq (vec_insert (-16, vb, 0),

26981

+ ((vector signed char)

26982

+ {-16,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7})),

26983

+ "vec_insert (vb BE)");

26984

+ check (vec_all_eq (vec_insert (16, vc, 7),

26985

+ ((vector unsigned short){0,1,2,3,4,5,6,16})),

26986

+ "vec_insert (vc BE)");

26987

+ check (vec_all_eq (vec_insert (-16, vd, 3),

26988

+ ((vector signed short){-4,-3,-2,-16,0,1,2,3})),

26989

+ "vec_insert (vd BE)");

26990

+ check (vec_all_eq (vec_insert (16, ve, 2),

26991

+ ((vector unsigned int){0,1,16,3})),

26992

+ "vec_insert (ve BE)");

26993

+ check (vec_all_eq (vec_insert (-16, vf, 1),

26994

+ ((vector signed int){-2,-16,0,1})),

26995

+ "vec_insert (vf BE)");

26996

+ check (vec_all_eq (vec_insert (-16.0f, vg, 0),

26997

+ ((vector float){-16.0f,-1.0f,0.0f,1.0f})),

26998

+ "vec_insert (vg BE)");

26999

+#endif

27000

+}

27001

+

27002

Index: gcc/testsuite/gcc.dg/vmx/ldl.c

27003

===================================================================

27004

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl.c (.../tags/gcc_4_8_2_release)

27005

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl.c (.../branches/gcc-4_8-branch)

27006

@@ -0,0 +1,91 @@

27007

+#include "harness.h"

27008

+

27009

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

27010

+static signed char svsc[16] __attribute__ ((aligned (16)));

27011

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

27012

+static unsigned short svus[8] __attribute__ ((aligned (16)));

27013

+static signed short svss[8] __attribute__ ((aligned (16)));

27014

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

27015

+static unsigned short svp[8] __attribute__ ((aligned (16)));

27016

+static unsigned int svui[4] __attribute__ ((aligned (16)));

27017

+static signed int svsi[4] __attribute__ ((aligned (16)));

27018

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

27019

+static float svf[4] __attribute__ ((aligned (16)));

27020

+

27021

+static void init ()

27022

+{

27023

+ unsigned int i;

27024

+ for (i = 0; i < 16; ++i)

27025

+ {

27026

+ svuc[i] = i;

27027

+ svsc[i] = i - 8;

27028

+ svbc[i] = (i % 2) ? 0xff : 0;

27029

+ }

27030

+ for (i = 0; i < 8; ++i)

27031

+ {

27032

+ svus[i] = i;

27033

+ svss[i] = i - 4;

27034

+ svbs[i] = (i % 2) ? 0xffff : 0;

27035

+ svp[i] = i;

27036

+ }

27037

+ for (i = 0; i < 4; ++i)

27038

+ {

27039

+ svui[i] = i;

27040

+ svsi[i] = i - 2;

27041

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

27042

+ svf[i] = i * 1.0f;

27043

+ }

27044

+}

27045

+

27046

+static void test ()

27047

+{

27048

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27049

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

27050

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

27051

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

27052

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

27053

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

27054

+ vector pixel evp = {0,1,2,3,4,5,6,7};

27055

+ vector unsigned int evui = {0,1,2,3};

27056

+ vector signed int evsi = {-2,-1,0,1};

27057

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

27058

+ vector float evf = {0.0,1.0,2.0,3.0};

27059

+

27060

+ vector unsigned char vuc;

27061

+ vector signed char vsc;

27062

+ vector bool char vbc;

27063

+ vector unsigned short vus;

27064

+ vector signed short vss;

27065

+ vector bool short vbs;

27066

+ vector pixel vp;

27067

+ vector unsigned int vui;

27068

+ vector signed int vsi;

27069

+ vector bool int vbi;

27070

+ vector float vf;

27071

+

27072

+ init ();

27073

+

27074

+ vuc = vec_ldl (0, (vector unsigned char *)svuc);

27075

+ vsc = vec_ldl (0, (vector signed char *)svsc);

27076

+ vbc = vec_ldl (0, (vector bool char *)svbc);

27077

+ vus = vec_ldl (0, (vector unsigned short *)svus);

27078

+ vss = vec_ldl (0, (vector signed short *)svss);

27079

+ vbs = vec_ldl (0, (vector bool short *)svbs);

27080

+ vp = vec_ldl (0, (vector pixel *)svp);

27081

+ vui = vec_ldl (0, (vector unsigned int *)svui);

27082

+ vsi = vec_ldl (0, (vector signed int *)svsi);

27083

+ vbi = vec_ldl (0, (vector bool int *)svbi);

27084

+ vf = vec_ldl (0, (vector float *)svf);

27085

+

27086

+ check (vec_all_eq (vuc, evuc), "vuc");

27087

+ check (vec_all_eq (vsc, evsc), "vsc");

27088

+ check (vec_all_eq (vbc, evbc), "vbc");

27089

+ check (vec_all_eq (vus, evus), "vus");

27090

+ check (vec_all_eq (vss, evss), "vss");

27091

+ check (vec_all_eq (vbs, evbs), "vbs");

27092

+ check (vec_all_eq (vp, evp ), "vp" );

27093

+ check (vec_all_eq (vui, evui), "vui");

27094

+ check (vec_all_eq (vsi, evsi), "vsi");

27095

+ check (vec_all_eq (vbi, evbi), "vbi");

27096

+ check (vec_all_eq (vf, evf ), "vf" );

27097

+}

27098

Index: gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c

27099

===================================================================

27100

--- a/src/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c (.../tags/gcc_4_8_2_release)

27101

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c (.../branches/gcc-4_8-branch)

27102

@@ -0,0 +1,34 @@

27103

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

27104

+/* { dg-require-effective-target powerpc_vsx_ok } */

27105

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

27106

+

27107

+#include "harness.h"

27108

+

27109

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

27110

+static double svd[2] __attribute__ ((aligned (16)));

27111

+

27112

+static void check_arrays ()

27113

+{

27114

+ unsigned int i;

27115

+ for (i = 0; i < 2; ++i)

27116

+ {

27117

+ check (svul[i] == i, "svul");

27118

+ check (svd[i] == i * 1.0, "svd");

27119

+ }

27120

+}

27121

+

27122

+static void test ()

27123

+{

27124

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27125

+ vector unsigned long long vul = {1,0};

27126

+ vector double vd = {1.0,0.0};

27127

+#else

27128

+ vector unsigned long long vul = {0,1};

27129

+ vector double vd = {0.0,1.0};

27130

+#endif

27131

+

27132

+ vec_stl (vul, 0, (vector unsigned long long *)svul);

27133

+ vec_stl (vd, 0, (vector double *)svd);

27134

+

27135

+ check_arrays ();

27136

+}

27137

Index: gcc/testsuite/gcc.dg/vmx/vsums.c

27138

===================================================================

27139

--- a/src/gcc/testsuite/gcc.dg/vmx/vsums.c (.../tags/gcc_4_8_2_release)

27140

+++ b/src/gcc/testsuite/gcc.dg/vmx/vsums.c (.../branches/gcc-4_8-branch)

27141

@@ -0,0 +1,12 @@

27142

+#include "harness.h"

27143

+

27144

+static void test()

27145

+{

27146

+ vector signed int va = {-7,11,-13,17};

27147

+ vector signed int vb = {0,0,0,128};

27148

+ vector signed int evd = {0,0,0,136};

27149

+

27150

+ vector signed int vd = vec_sums (va, vb);

27151

+

27152

+ check (vec_all_eq (vd, evd), "sums");

27153

+}

27154

Index: gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c

27155

===================================================================

27156

--- a/src/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c (.../tags/gcc_4_8_2_release)

27157

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c (.../branches/gcc-4_8-branch)

27158

@@ -0,0 +1,34 @@

27159

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

27160

+/* { dg-require-effective-target powerpc_vsx_ok } */

27161

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

27162

+

27163

+#include "harness.h"

27164

+

27165

+static int vec_long_long_eq (vector long long x, vector long long y)

27166

+{

27167

+ return (x[0] == y[0] && x[1] == y[1]);

27168

+}

27169

+

27170

+static int vec_dbl_eq (vector double x, vector double y)

27171

+{

27172

+ return (x[0] == y[0] && x[1] == y[1]);

27173

+}

27174

+

27175

+static void test()

27176

+{

27177

+ vector long long vl = {0, 1};

27178

+ vector double vd = {0.0, 1.0};

27179

+ vector long long vlr = vec_insert (2, vl, 0);

27180

+ vector double vdr = vec_insert (2.0, vd, 1);

27181

+

27182

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27183

+ vector long long vler = {0, 2};

27184

+ vector double vder = {2.0, 1.0};

27185

+#else

27186

+ vector long long vler = {2, 1};

27187

+ vector double vder = {0.0, 2.0};

27188

+#endif

27189

+

27190

+ check (vec_long_long_eq (vlr, vler), "vl");

27191

+ check (vec_dbl_eq (vdr, vder), "vd");

27192

+}

27193

Index: gcc/testsuite/gcc.dg/vmx/unpack.c

27194

===================================================================

27195

--- a/src/gcc/testsuite/gcc.dg/vmx/unpack.c (.../tags/gcc_4_8_2_release)

27196

+++ b/src/gcc/testsuite/gcc.dg/vmx/unpack.c (.../branches/gcc-4_8-branch)

27197

@@ -0,0 +1,67 @@

27198

+#include "harness.h"

27199

+

27200

+#define BIG 4294967295

27201

+

27202

+static void test()

27203

+{

27204

+ /* Input vectors. */

27205

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

27206

+ vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

27207

+ vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3,

27208

+ (1<<15) + (4<<10) + (5<<5) + 6,

27209

+ (0<<15) + (7<<10) + (8<<5) + 9,

27210

+ (1<<15) + (10<<10) + (11<<5) + 12,

27211

+ (1<<15) + (13<<10) + (14<<5) + 15,

27212

+ (0<<15) + (16<<10) + (17<<5) + 18,

27213

+ (1<<15) + (19<<10) + (20<<5) + 21,

27214

+ (0<<15) + (22<<10) + (23<<5) + 24};

27215

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

27216

+ vector bool short vbs = {0,65535,65535,0,0,0,65535,0};

27217

+

27218

+ /* Result vectors. */

27219

+ vector signed short vsch, vscl;

27220

+ vector bool short vbsh, vbsl;

27221

+ vector unsigned int vuih, vuil;

27222

+ vector signed int vsih, vsil;

27223

+ vector bool int vbih, vbil;

27224

+

27225

+ /* Expected result vectors. */

27226

+ vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1};

27227

+ vector signed short vsclr = {0,1,2,3,4,5,6,7};

27228

+ vector bool short vbshr = {0,65535,65535,0,0,0,65535,0};

27229

+ vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535};

27230

+ vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3,

27231

+ (65535<<24) + (4<<16) + (5<<8) + 6,

27232

+ (0<<24) + (7<<16) + (8<<8) + 9,

27233

+ (65535<<24) + (10<<16) + (11<<8) + 12};

27234

+ vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15,

27235

+ (0<<24) + (16<<16) + (17<<8) + 18,

27236

+ (65535<<24) + (19<<16) + (20<<8) + 21,

27237

+ (0<<24) + (22<<16) + (23<<8) + 24};

27238

+ vector signed int vsihr = {-4,-3,-2,-1};

27239

+ vector signed int vsilr = {0,1,2,3};

27240

+ vector bool int vbihr = {0,BIG,BIG,0};

27241

+ vector bool int vbilr = {0,0,BIG,0};

27242

+

27243

+ vsch = vec_unpackh (vsc);

27244

+ vscl = vec_unpackl (vsc);

27245

+ vbsh = vec_unpackh (vbc);

27246

+ vbsl = vec_unpackl (vbc);

27247

+ vuih = vec_unpackh (vp);

27248

+ vuil = vec_unpackl (vp);

27249

+ vsih = vec_unpackh (vss);

27250

+ vsil = vec_unpackl (vss);

27251

+ vbih = vec_unpackh (vbs);

27252

+ vbil = vec_unpackl (vbs);

27253

+

27254

+ check (vec_all_eq (vsch, vschr), "vsch");

27255

+ check (vec_all_eq (vscl, vsclr), "vscl");

27256

+ check (vec_all_eq (vbsh, vbshr), "vbsh");

27257

+ check (vec_all_eq (vbsl, vbslr), "vbsl");

27258

+ check (vec_all_eq (vuih, vuihr), "vuih");

27259

+ check (vec_all_eq (vuil, vuilr), "vuil");

27260

+ check (vec_all_eq (vsih, vsihr), "vsih");

27261

+ check (vec_all_eq (vsil, vsilr), "vsil");

27262

+ check (vec_all_eq (vbih, vbihr), "vbih");

27263

+ check (vec_all_eq (vbil, vbilr), "vbil");

27264

+}

27265

Index: gcc/testsuite/gcc.dg/vmx/splat.c

27266

===================================================================

27267

--- a/src/gcc/testsuite/gcc.dg/vmx/splat.c (.../tags/gcc_4_8_2_release)

27268

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat.c (.../branches/gcc-4_8-branch)

27269

@@ -0,0 +1,47 @@

27270

+#include "harness.h"

27271

+

27272

+static void test()

27273

+{

27274

+ /* Input vectors. */

27275

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27276

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

27277

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

27278

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

27279

+ vector unsigned int vui = {0,1,2,3};

27280

+ vector signed int vsi = {-2,-1,0,1};

27281

+ vector float vf = {-2.0,-1.0,0.0,1.0};

27282

+

27283

+ /* Result vectors. */

27284

+ vector unsigned char vucr;

27285

+ vector signed char vscr;

27286

+ vector unsigned short vusr;

27287

+ vector signed short vssr;

27288

+ vector unsigned int vuir;

27289

+ vector signed int vsir;

27290

+ vector float vfr;

27291

+

27292

+ /* Expected result vectors. */

27293

+ vector unsigned char vucer = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};

27294

+ vector signed char vscer = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

27295

+ vector unsigned short vuser = {7,7,7,7,7,7,7,7};

27296

+ vector signed short vsser = {-4,-4,-4,-4,-4,-4,-4,-4};

27297

+ vector unsigned int vuier = {2,2,2,2};

27298

+ vector signed int vsier = {1,1,1,1};

27299

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

27300

+

27301

+ vucr = vec_splat (vuc, 1);

27302

+ vscr = vec_splat (vsc, 8);

27303

+ vusr = vec_splat (vus, 7);

27304

+ vssr = vec_splat (vss, 0);

27305

+ vuir = vec_splat (vui, 2);

27306

+ vsir = vec_splat (vsi, 3);

27307

+ vfr = vec_splat (vf, 1);

27308

+

27309

+ check (vec_all_eq (vucr, vucer), "vuc");

27310

+ check (vec_all_eq (vscr, vscer), "vsc");

27311

+ check (vec_all_eq (vusr, vuser), "vus");

27312

+ check (vec_all_eq (vssr, vsser), "vss");

27313

+ check (vec_all_eq (vuir, vuier), "vui");

27314

+ check (vec_all_eq (vsir, vsier), "vsi");

27315

+ check (vec_all_eq (vfr, vfer ), "vf");

27316

+}

27317

Index: gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c

27318

===================================================================

27319

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c (.../tags/gcc_4_8_2_release)

27320

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c (.../branches/gcc-4_8-branch)

27321

@@ -0,0 +1,44 @@

27322

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

27323

+/* { dg-require-effective-target powerpc_vsx_ok } */

27324

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

27325

+

27326

+#include "harness.h"

27327

+

27328

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

27329

+static double svd[2] __attribute__ ((aligned (16)));

27330

+

27331

+static void init ()

27332

+{

27333

+ unsigned int i;

27334

+ for (i = 0; i < 2; ++i)

27335

+ {

27336

+ svul[i] = i;

27337

+ svd[i] = i * 1.0;

27338

+ }

27339

+}

27340

+

27341

+static void test ()

27342

+{

27343

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27344

+ vector unsigned long long evul = {1,0};

27345

+ vector double evd = {1.0,0.0};

27346

+#else

27347

+ vector unsigned long long evul = {0,1};

27348

+ vector double evd = {0.0,1.0};

27349

+#endif

27350

+

27351

+ vector unsigned long long vul;

27352

+ vector double vd;

27353

+ unsigned i;

27354

+

27355

+ init ();

27356

+

27357

+ vul = vec_ldl (0, (vector unsigned long long *)svul);

27358

+ vd = vec_ldl (0, (vector double *)svd);

27359

+

27360

+ for (i = 0; i < 2; ++i)

27361

+ {

27362

+ check (vul[i] == evul[i], "vul");

27363

+ check (vd[i] == evd[i], "vd" );

27364

+ }

27365

+}

27366

Index: gcc/testsuite/gcc.dg/vmx/merge-be-order.c

27367

===================================================================

27368

--- a/src/gcc/testsuite/gcc.dg/vmx/merge-be-order.c (.../tags/gcc_4_8_2_release)

27369

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge-be-order.c (.../branches/gcc-4_8-branch)

27370

@@ -0,0 +1,96 @@

27371

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

27372

+

27373

+#include "harness.h"

27374

+

27375

+static void test()

27376

+{

27377

+ /* Input vectors. */

27378

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27379

+ vector unsigned char vucb

27380

+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

27381

+ vector signed char vsca

27382

+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

27383

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27384

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

27385

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

27386

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

27387

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

27388

+ vector unsigned int vuia = {0,1,2,3};

27389

+ vector unsigned int vuib = {4,5,6,7};

27390

+ vector signed int vsia = {-4,-3,-2,-1};

27391

+ vector signed int vsib = {0,1,2,3};

27392

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

27393

+ vector float vfb = {0.0,1.0,2.0,3.0};

27394

+

27395

+ /* Result vectors. */

27396

+ vector unsigned char vuch, vucl;

27397

+ vector signed char vsch, vscl;

27398

+ vector unsigned short vush, vusl;

27399

+ vector signed short vssh, vssl;

27400

+ vector unsigned int vuih, vuil;

27401

+ vector signed int vsih, vsil;

27402

+ vector float vfh, vfl;

27403

+

27404

+ /* Expected result vectors. */

27405

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27406

+ vector unsigned char vucrh = {24,8,25,9,26,10,27,11,28,12,29,13,30,14,31,15};

27407

+ vector unsigned char vucrl = {16,0,17,1,18,2,19,3,20,4,21,5,22,6,23,7};

27408

+ vector signed char vscrh = {8,-8,9,-7,10,-6,11,-5,12,-4,13,-3,14,-2,15,-1};

27409

+ vector signed char vscrl = {0,-16,1,-15,2,-14,3,-13,4,-12,5,-11,6,-10,7,-9};

27410

+ vector unsigned short vusrh = {12,4,13,5,14,6,15,7};

27411

+ vector unsigned short vusrl = {8,0,9,1,10,2,11,3};

27412

+ vector signed short vssrh = {4,-4,5,-3,6,-2,7,-1};

27413

+ vector signed short vssrl = {0,-8,1,-7,2,-6,3,-5};

27414

+ vector unsigned int vuirh = {6,2,7,3};

27415

+ vector unsigned int vuirl = {4,0,5,1};

27416

+ vector signed int vsirh = {2,-2,3,-1};

27417

+ vector signed int vsirl = {0,-4,1,-3};

27418

+ vector float vfrh = {2.0,-2.0,3.0,-1.0};

27419

+ vector float vfrl = {0.0,-4.0,1.0,-3.0};

27420

+#else

27421

+ vector unsigned char vucrh = {0,16,1,17,2,18,3,19,4,20,5,21,6,22,7,23};

27422

+ vector unsigned char vucrl = {8,24,9,25,10,26,11,27,12,28,13,29,14,30,15,31};

27423

+ vector signed char vscrh = {-16,0,-15,1,-14,2,-13,3,-12,4,-11,5,-10,6,-9,7};

27424

+ vector signed char vscrl = {-8,8,-7,9,-6,10,-5,11,-4,12,-3,13,-2,14,-1,15};

27425

+ vector unsigned short vusrh = {0,8,1,9,2,10,3,11};

27426

+ vector unsigned short vusrl = {4,12,5,13,6,14,7,15};

27427

+ vector signed short vssrh = {-8,0,-7,1,-6,2,-5,3};

27428

+ vector signed short vssrl = {-4,4,-3,5,-2,6,-1,7};

27429

+ vector unsigned int vuirh = {0,4,1,5};

27430

+ vector unsigned int vuirl = {2,6,3,7};

27431

+ vector signed int vsirh = {-4,0,-3,1};

27432

+ vector signed int vsirl = {-2,2,-1,3};

27433

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

27434

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

27435

+#endif

27436

+

27437

+ vuch = vec_mergeh (vuca, vucb);

27438

+ vucl = vec_mergel (vuca, vucb);

27439

+ vsch = vec_mergeh (vsca, vscb);

27440

+ vscl = vec_mergel (vsca, vscb);

27441

+ vush = vec_mergeh (vusa, vusb);

27442

+ vusl = vec_mergel (vusa, vusb);

27443

+ vssh = vec_mergeh (vssa, vssb);

27444

+ vssl = vec_mergel (vssa, vssb);

27445

+ vuih = vec_mergeh (vuia, vuib);

27446

+ vuil = vec_mergel (vuia, vuib);

27447

+ vsih = vec_mergeh (vsia, vsib);

27448

+ vsil = vec_mergel (vsia, vsib);

27449

+ vfh = vec_mergeh (vfa, vfb );

27450

+ vfl = vec_mergel (vfa, vfb );

27451

+

27452

+ check (vec_all_eq (vuch, vucrh), "vuch");

27453

+ check (vec_all_eq (vucl, vucrl), "vucl");

27454

+ check (vec_all_eq (vsch, vscrh), "vsch");

27455

+ check (vec_all_eq (vscl, vscrl), "vscl");

27456

+ check (vec_all_eq (vush, vusrh), "vush");

27457

+ check (vec_all_eq (vusl, vusrl), "vusl");

27458

+ check (vec_all_eq (vssh, vssrh), "vssh");

27459

+ check (vec_all_eq (vssl, vssrl), "vssl");

27460

+ check (vec_all_eq (vuih, vuirh), "vuih");

27461

+ check (vec_all_eq (vuil, vuirl), "vuil");

27462

+ check (vec_all_eq (vsih, vsirh), "vsih");

27463

+ check (vec_all_eq (vsil, vsirl), "vsil");

27464

+ check (vec_all_eq (vfh, vfrh), "vfh");

27465

+ check (vec_all_eq (vfl, vfrl), "vfl");

27466

+}

27467

Index: gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c

27468

===================================================================

27469

--- a/src/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c (.../tags/gcc_4_8_2_release)

27470

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c (.../branches/gcc-4_8-branch)

27471

@@ -0,0 +1,37 @@

27472

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

27473

+/* { dg-require-effective-target powerpc_vsx_ok } */

27474

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

27475

+

27476

+#include "harness.h"

27477

+

27478

+static void test()

27479

+{

27480

+ /* Input vectors. */

27481

+ vector unsigned int vui = {0,1,2,3};

27482

+ vector signed int vsi = {-2,-1,0,1};

27483

+ vector float vf = {-2.0,-1.0,0.0,1.0};

27484

+

27485

+ /* Result vectors. */

27486

+ vector unsigned int vuir;

27487

+ vector signed int vsir;

27488

+ vector float vfr;

27489

+

27490

+ /* Expected result vectors. */

27491

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27492

+ vector unsigned int vuier = {1,1,1,1};

27493

+ vector signed int vsier = {-2,-2,-2,-2};

27494

+ vector float vfer = {0.0,0.0,0.0,0.0};

27495

+#else

27496

+ vector unsigned int vuier = {2,2,2,2};

27497

+ vector signed int vsier = {1,1,1,1};

27498

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

27499

+#endif

27500

+

27501

+ vuir = vec_splat (vui, 2);

27502

+ vsir = vec_splat (vsi, 3);

27503

+ vfr = vec_splat (vf, 1);

27504

+

27505

+ check (vec_all_eq (vuir, vuier), "vui");

27506

+ check (vec_all_eq (vsir, vsier), "vsi");

27507

+ check (vec_all_eq (vfr, vfer ), "vf");

27508

+}

27509

Index: gcc/testsuite/gcc.dg/vmx/merge.c

27510

===================================================================

27511

--- a/src/gcc/testsuite/gcc.dg/vmx/merge.c (.../tags/gcc_4_8_2_release)

27512

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge.c (.../branches/gcc-4_8-branch)

27513

@@ -0,0 +1,77 @@

27514

+#include "harness.h"

27515

+

27516

+static void test()

27517

+{

27518

+ /* Input vectors. */

27519

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27520

+ vector unsigned char vucb

27521

+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

27522

+ vector signed char vsca

27523

+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

27524

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27525

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

27526

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

27527

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

27528

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

27529

+ vector unsigned int vuia = {0,1,2,3};

27530

+ vector unsigned int vuib = {4,5,6,7};

27531

+ vector signed int vsia = {-4,-3,-2,-1};

27532

+ vector signed int vsib = {0,1,2,3};

27533

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

27534

+ vector float vfb = {0.0,1.0,2.0,3.0};

27535

+

27536

+ /* Result vectors. */

27537

+ vector unsigned char vuch, vucl;

27538

+ vector signed char vsch, vscl;

27539

+ vector unsigned short vush, vusl;

27540

+ vector signed short vssh, vssl;

27541

+ vector unsigned int vuih, vuil;

27542

+ vector signed int vsih, vsil;

27543

+ vector float vfh, vfl;

27544

+

27545

+ /* Expected result vectors. */

27546

+ vector unsigned char vucrh = {0,16,1,17,2,18,3,19,4,20,5,21,6,22,7,23};

27547

+ vector unsigned char vucrl = {8,24,9,25,10,26,11,27,12,28,13,29,14,30,15,31};

27548

+ vector signed char vscrh = {-16,0,-15,1,-14,2,-13,3,-12,4,-11,5,-10,6,-9,7};

27549

+ vector signed char vscrl = {-8,8,-7,9,-6,10,-5,11,-4,12,-3,13,-2,14,-1,15};

27550

+ vector unsigned short vusrh = {0,8,1,9,2,10,3,11};

27551

+ vector unsigned short vusrl = {4,12,5,13,6,14,7,15};

27552

+ vector signed short vssrh = {-8,0,-7,1,-6,2,-5,3};

27553

+ vector signed short vssrl = {-4,4,-3,5,-2,6,-1,7};

27554

+ vector unsigned int vuirh = {0,4,1,5};

27555

+ vector unsigned int vuirl = {2,6,3,7};

27556

+ vector signed int vsirh = {-4,0,-3,1};

27557

+ vector signed int vsirl = {-2,2,-1,3};

27558

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

27559

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

27560

+

27561

+ vuch = vec_mergeh (vuca, vucb);

27562

+ vucl = vec_mergel (vuca, vucb);

27563

+ vsch = vec_mergeh (vsca, vscb);

27564

+ vscl = vec_mergel (vsca, vscb);

27565

+ vush = vec_mergeh (vusa, vusb);

27566

+ vusl = vec_mergel (vusa, vusb);

27567

+ vssh = vec_mergeh (vssa, vssb);

27568

+ vssl = vec_mergel (vssa, vssb);

27569

+ vuih = vec_mergeh (vuia, vuib);

27570

+ vuil = vec_mergel (vuia, vuib);

27571

+ vsih = vec_mergeh (vsia, vsib);

27572

+ vsil = vec_mergel (vsia, vsib);

27573

+ vfh = vec_mergeh (vfa, vfb );

27574

+ vfl = vec_mergel (vfa, vfb );

27575

+

27576

+ check (vec_all_eq (vuch, vucrh), "vuch");

27577

+ check (vec_all_eq (vucl, vucrl), "vucl");

27578

+ check (vec_all_eq (vsch, vscrh), "vsch");

27579

+ check (vec_all_eq (vscl, vscrl), "vscl");

27580

+ check (vec_all_eq (vush, vusrh), "vush");

27581

+ check (vec_all_eq (vusl, vusrl), "vusl");

27582

+ check (vec_all_eq (vssh, vssrh), "vssh");

27583

+ check (vec_all_eq (vssl, vssrl), "vssl");

27584

+ check (vec_all_eq (vuih, vuirh), "vuih");

27585

+ check (vec_all_eq (vuil, vuirl), "vuil");

27586

+ check (vec_all_eq (vsih, vsirh), "vsih");

27587

+ check (vec_all_eq (vsil, vsirl), "vsil");

27588

+ check (vec_all_eq (vfh, vfrh), "vfh");

27589

+ check (vec_all_eq (vfl, vfrl), "vfl");

27590

+}

27591

Index: gcc/testsuite/gcc.dg/vmx/vec-set.c

27592

===================================================================

27593

--- a/src/gcc/testsuite/gcc.dg/vmx/vec-set.c (.../tags/gcc_4_8_2_release)

27594

+++ b/src/gcc/testsuite/gcc.dg/vmx/vec-set.c (.../branches/gcc-4_8-branch)

27595

@@ -0,0 +1,14 @@

27596

+#include "harness.h"

27597

+

27598

+vector short

27599

+vec_set (short m)

27600

+{

27601

+ return (vector short){m, 0, 0, 0, 0, 0, 0, 0};

27602

+}

27603

+

27604

+static void test()

27605

+{

27606

+ check (vec_all_eq (vec_set (7),

27607

+ ((vector short){7, 0, 0, 0, 0, 0, 0, 0})),

27608

+ "vec_set");

27609

+}

27610

Index: gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c

27611

===================================================================

27612

--- a/src/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c (.../tags/gcc_4_8_2_release)

27613

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c (.../branches/gcc-4_8-branch)

27614

@@ -0,0 +1,44 @@

27615

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

27616

+/* { dg-require-effective-target powerpc_vsx_ok } */

27617

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

27618

+

27619

+#include "harness.h"

27620

+

27621

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

27622

+static double svd[2] __attribute__ ((aligned (16)));

27623

+

27624

+static void init ()

27625

+{

27626

+ unsigned int i;

27627

+ for (i = 0; i < 2; ++i)

27628

+ {

27629

+ svul[i] = i;

27630

+ svd[i] = i * 1.0;

27631

+ }

27632

+}

27633

+

27634

+static void test ()

27635

+{

27636

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27637

+ vector unsigned long long evul = {1,0};

27638

+ vector double evd = {1.0,0.0};

27639

+#else

27640

+ vector unsigned long long evul = {0,1};

27641

+ vector double evd = {0.0,1.0};

27642

+#endif

27643

+

27644

+ vector unsigned long long vul;

27645

+ vector double vd;

27646

+ unsigned i;

27647

+

27648

+ init ();

27649

+

27650

+ vul = vec_ld (0, (vector unsigned long long *)svul);

27651

+ vd = vec_ld (0, (vector double *)svd);

27652

+

27653

+ for (i = 0; i < 2; ++i)

27654

+ {

27655

+ check (vul[i] == evul[i], "vul");

27656

+ check (vd[i] == evd[i], "vd" );

27657

+ }

27658

+}

27659

Index: gcc/testsuite/gcc.dg/vmx/extract.c

27660

===================================================================

27661

--- a/src/gcc/testsuite/gcc.dg/vmx/extract.c (.../tags/gcc_4_8_2_release)

27662

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract.c (.../branches/gcc-4_8-branch)

27663

@@ -0,0 +1,21 @@

27664

+#include "harness.h"

27665

+

27666

+static void test()

27667

+{

27668

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27669

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

27670

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

27671

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

27672

+ vector unsigned int ve = {0,1,2,3};

27673

+ vector signed int vf = {-2,-1,0,1};

27674

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

27675

+

27676

+ check (vec_extract (va, 5) == 5, "vec_extract (va, 5)");

27677

+ check (vec_extract (vb, 0) == -8, "vec_extract (vb, 0)");

27678

+ check (vec_extract (vc, 7) == 7, "vec_extract (vc, 7)");

27679

+ check (vec_extract (vd, 3) == -1, "vec_extract (vd, 3)");

27680

+ check (vec_extract (ve, 2) == 2, "vec_extract (ve, 2)");

27681

+ check (vec_extract (vf, 1) == -1, "vec_extract (vf, 1)");

27682

+ check (vec_extract (vg, 0) == -2.0f, "vec_extract (vg, 0)");

27683

+}

27684

+

27685

Index: gcc/testsuite/gcc.dg/vmx/pack-be-order.c

27686

===================================================================

27687

--- a/src/gcc/testsuite/gcc.dg/vmx/pack-be-order.c (.../tags/gcc_4_8_2_release)

27688

+++ b/src/gcc/testsuite/gcc.dg/vmx/pack-be-order.c (.../branches/gcc-4_8-branch)

27689

@@ -0,0 +1,136 @@

27690

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

27691

+

27692

+#include "harness.h"

27693

+

27694

+#define BIG 4294967295

27695

+

27696

+static void test()

27697

+{

27698

+ /* Input vectors. */

27699

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

27700

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

27701

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

27702

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

27703

+ vector bool short vbsa = {0,65535,65535,0,0,0,65535,0};

27704

+ vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535};

27705

+ vector unsigned int vuia = {0,1,2,3};

27706

+ vector unsigned int vuib = {4,5,6,7};

27707

+ vector signed int vsia = {-4,-3,-2,-1};

27708

+ vector signed int vsib = {0,1,2,3};

27709

+ vector bool int vbia = {0,BIG,BIG,BIG};

27710

+ vector bool int vbib = {BIG,0,0,0};

27711

+ vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3),

27712

+ (1<<24) + (5<<19) + (6<<11) + (7<<3),

27713

+ (0<<24) + (8<<19) + (9<<11) + (10<<3),

27714

+ (1<<24) + (11<<19) + (12<<11) + (13<<3)};

27715

+ vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3),

27716

+ (0<<24) + (17<<19) + (18<<11) + (19<<3),

27717

+ (1<<24) + (20<<19) + (21<<11) + (22<<3),

27718

+ (0<<24) + (23<<19) + (24<<11) + (25<<3)};

27719

+ vector unsigned short vusc = {0,256,1,257,2,258,3,259};

27720

+ vector unsigned short vusd = {4,260,5,261,6,262,7,263};

27721

+ vector signed short vssc = {-1,-128,0,127,-2,-129,1,128};

27722

+ vector signed short vssd = {-3,-130,2,129,-4,-131,3,130};

27723

+ vector unsigned int vuic = {0,65536,1,65537};

27724

+ vector unsigned int vuid = {2,65538,3,65539};

27725

+ vector signed int vsic = {-1,-32768,0,32767};

27726

+ vector signed int vsid = {-2,-32769,1,32768};

27727

+

27728

+ /* Result vectors. */

27729

+ vector unsigned char vucr;

27730

+ vector signed char vscr;

27731

+ vector bool char vbcr;

27732

+ vector unsigned short vusr;

27733

+ vector signed short vssr;

27734

+ vector bool short vbsr;

27735

+ vector pixel vpr;

27736

+ vector unsigned char vucsr;

27737

+ vector signed char vscsr;

27738

+ vector unsigned short vussr;

27739

+ vector signed short vsssr;

27740

+ vector unsigned char vucsur1, vucsur2;

27741

+ vector unsigned short vussur1, vussur2;

27742

+

27743

+ /* Expected result vectors. */

27744

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27745

+ vector unsigned char vucer = {8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7};

27746

+ vector signed char vscer = {0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1};

27747

+ vector bool char vbcer = {255,0,0,255,255,255,0,255,0,255,255,0,0,0,255,0};

27748

+ vector unsigned short vuser = {4,5,6,7,0,1,2,3};

27749

+ vector signed short vsser = {0,1,2,3,-4,-3,-2,-1};

27750

+ vector bool short vbser = {65535,0,0,0,0,65535,65535,65535};

27751

+ vector pixel vper = {(1<<15) + (14<<10) + (15<<5) + 16,

27752

+ (0<<15) + (17<<10) + (18<<5) + 19,

27753

+ (1<<15) + (20<<10) + (21<<5) + 22,

27754

+ (0<<15) + (23<<10) + (24<<5) + 25,

27755

+ (0<<15) + (2<<10) + (3<<5) + 4,

27756

+ (1<<15) + (5<<10) + (6<<5) + 7,

27757

+ (0<<15) + (8<<10) + (9<<5) + 10,

27758

+ (1<<15) + (11<<10) + (12<<5) + 13};

27759

+ vector unsigned char vucser = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255};

27760

+ vector signed char vscser = {-3,-128,2,127,-4,-128,3,127,

27761

+ -1,-128,0,127,-2,-128,1,127};

27762

+ vector unsigned short vusser = {2,65535,3,65535,0,65535,1,65535};

27763

+ vector signed short vssser = {-2,-32768,1,32767,-1,-32768,0,32767};

27764

+ vector unsigned char vucsuer1 = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255};

27765

+ vector unsigned char vucsuer2 = {0,0,2,129,0,0,3,130,0,0,0,127,0,0,1,128};

27766

+ vector unsigned short vussuer1 = {2,65535,3,65535,0,65535,1,65535};

27767

+ vector unsigned short vussuer2 = {0,0,1,32768,0,0,0,32767};

27768

+#else

27769

+ vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27770

+ vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

27771

+ vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

27772

+ vector unsigned short vuser = {0,1,2,3,4,5,6,7};

27773

+ vector signed short vsser = {-4,-3,-2,-1,0,1,2,3};

27774

+ vector bool short vbser = {0,65535,65535,65535,65535,0,0,0};

27775

+ vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4,

27776

+ (1<<15) + (5<<10) + (6<<5) + 7,

27777

+ (0<<15) + (8<<10) + (9<<5) + 10,

27778

+ (1<<15) + (11<<10) + (12<<5) + 13,

27779

+ (1<<15) + (14<<10) + (15<<5) + 16,

27780

+ (0<<15) + (17<<10) + (18<<5) + 19,

27781

+ (1<<15) + (20<<10) + (21<<5) + 22,

27782

+ (0<<15) + (23<<10) + (24<<5) + 25};

27783

+ vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

27784

+ vector signed char vscser = {-1,-128,0,127,-2,-128,1,127,

27785

+ -3,-128,2,127,-4,-128,3,127};

27786

+ vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535};

27787

+ vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767};

27788

+ vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

27789

+ vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130};

27790

+ vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535};

27791

+ vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768};

27792

+#endif

27793

+

27794

+ vucr = vec_pack (vusa, vusb);

27795

+ vscr = vec_pack (vssa, vssb);

27796

+ vbcr = vec_pack (vbsa, vbsb);

27797

+ vusr = vec_pack (vuia, vuib);

27798

+ vssr = vec_pack (vsia, vsib);

27799

+ vbsr = vec_pack (vbia, vbib);

27800

+ vpr = vec_packpx (vipa, vipb);

27801

+ vucsr = vec_packs (vusc, vusd);

27802

+ vscsr = vec_packs (vssc, vssd);

27803

+ vussr = vec_packs (vuic, vuid);

27804

+ vsssr = vec_packs (vsic, vsid);

27805

+ vucsur1 = vec_packsu (vusc, vusd);

27806

+ vucsur2 = vec_packsu (vssc, vssd);

27807

+ vussur1 = vec_packsu (vuic, vuid);

27808

+ vussur2 = vec_packsu (vsic, vsid);

27809

+

27810

+ check (vec_all_eq (vucr, vucer), "vucr");

27811

+ check (vec_all_eq (vscr, vscer), "vscr");

27812

+ check (vec_all_eq (vbcr, vbcer), "vbcr");

27813

+ check (vec_all_eq (vusr, vuser), "vusr");

27814

+ check (vec_all_eq (vssr, vsser), "vssr");

27815

+ check (vec_all_eq (vbsr, vbser), "vbsr");

27816

+ check (vec_all_eq (vpr, vper ), "vpr" );

27817

+ check (vec_all_eq (vucsr, vucser), "vucsr");

27818

+ check (vec_all_eq (vscsr, vscser), "vscsr");

27819

+ check (vec_all_eq (vussr, vusser), "vussr");

27820

+ check (vec_all_eq (vsssr, vssser), "vsssr");

27821

+ check (vec_all_eq (vucsur1, vucsuer1), "vucsur1");

27822

+ check (vec_all_eq (vucsur2, vucsuer2), "vucsur2");

27823

+ check (vec_all_eq (vussur1, vussuer1), "vussur1");

27824

+ check (vec_all_eq (vussur2, vussuer2), "vussur2");

27825

+}

27826

Index: gcc/testsuite/gcc.dg/vmx/st-be-order.c

27827

===================================================================

27828

--- a/src/gcc/testsuite/gcc.dg/vmx/st-be-order.c (.../tags/gcc_4_8_2_release)

27829

+++ b/src/gcc/testsuite/gcc.dg/vmx/st-be-order.c (.../branches/gcc-4_8-branch)

27830

@@ -0,0 +1,83 @@

27831

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

27832

+

27833

+#include "harness.h"

27834

+

27835

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

27836

+static signed char svsc[16] __attribute__ ((aligned (16)));

27837

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

27838

+static unsigned short svus[8] __attribute__ ((aligned (16)));

27839

+static signed short svss[8] __attribute__ ((aligned (16)));

27840

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

27841

+static unsigned short svp[8] __attribute__ ((aligned (16)));

27842

+static unsigned int svui[4] __attribute__ ((aligned (16)));

27843

+static signed int svsi[4] __attribute__ ((aligned (16)));

27844

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

27845

+static float svf[4] __attribute__ ((aligned (16)));

27846

+

27847

+static void check_arrays ()

27848

+{

27849

+ unsigned int i;

27850

+ for (i = 0; i < 16; ++i)

27851

+ {

27852

+ check (svuc[i] == i, "svuc");

27853

+ check (svsc[i] == i - 8, "svsc");

27854

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

27855

+ }

27856

+ for (i = 0; i < 8; ++i)

27857

+ {

27858

+ check (svus[i] == i, "svus");

27859

+ check (svss[i] == i - 4, "svss");

27860

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

27861

+ check (svp[i] == i, "svp");

27862

+ }

27863

+ for (i = 0; i < 4; ++i)

27864

+ {

27865

+ check (svui[i] == i, "svui");

27866

+ check (svsi[i] == i - 2, "svsi");

27867

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

27868

+ check (svf[i] == i * 1.0f, "svf");

27869

+ }

27870

+}

27871

+

27872

+static void test ()

27873

+{

27874

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27875

+ vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

27876

+ vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

27877

+ vector bool char vbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

27878

+ vector unsigned short vus = {7,6,5,4,3,2,1,0};

27879

+ vector signed short vss = {3,2,1,0,-1,-2,-3,-4};

27880

+ vector bool short vbs = {65535,0,65535,0,65535,0,65535,0};

27881

+ vector pixel vp = {7,6,5,4,3,2,1,0};

27882

+ vector unsigned int vui = {3,2,1,0};

27883

+ vector signed int vsi = {1,0,-1,-2};

27884

+ vector bool int vbi = {0xffffffff,0,0xffffffff,0};

27885

+ vector float vf = {3.0,2.0,1.0,0.0};

27886

+#else

27887

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

27888

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

27889

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

27890

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

27891

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

27892

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

27893

+ vector pixel vp = {0,1,2,3,4,5,6,7};

27894

+ vector unsigned int vui = {0,1,2,3};

27895

+ vector signed int vsi = {-2,-1,0,1};

27896

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

27897

+ vector float vf = {0.0,1.0,2.0,3.0};

27898

+#endif

27899

+

27900

+ vec_st (vuc, 0, (vector unsigned char *)svuc);

27901

+ vec_st (vsc, 0, (vector signed char *)svsc);

27902

+ vec_st (vbc, 0, (vector bool char *)svbc);

27903

+ vec_st (vus, 0, (vector unsigned short *)svus);

27904

+ vec_st (vss, 0, (vector signed short *)svss);

27905

+ vec_st (vbs, 0, (vector bool short *)svbs);

27906

+ vec_st (vp, 0, (vector pixel *)svp);

27907

+ vec_st (vui, 0, (vector unsigned int *)svui);

27908

+ vec_st (vsi, 0, (vector signed int *)svsi);

27909

+ vec_st (vbi, 0, (vector bool int *)svbi);

27910

+ vec_st (vf, 0, (vector float *)svf);

27911

+

27912

+ check_arrays ();

27913

+}

27914

Index: gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c

27915

===================================================================

27916

--- a/src/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c (.../tags/gcc_4_8_2_release)

27917

+++ b/src/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c (.../branches/gcc-4_8-branch)

27918

@@ -13,6 +13,20 @@

27919

#define DO_INLINE __attribute__ ((always_inline))

27920

#define DONT_INLINE __attribute__ ((noinline))

27921

27922

+#ifdef __LITTLE_ENDIAN__

27923

+static inline DO_INLINE int inline_me(vector signed short data)

27924

+{

27925

+ union {vector signed short v; signed short s[8];} u;

27926

+ signed short x;

27927

+ unsigned char x1, x2;

27928

+

27929

+ u.v = data;

27930

+ x = u.s[7];

27931

+ x1 = (x >> 8) & 0xff;

27932

+ x2 = x & 0xff;

27933

+ return ((x2 << 8) | x1);

27934

+}

27935

+#else

27936

static inline DO_INLINE int inline_me(vector signed short data)

27937

{

27938

union {vector signed short v; signed short s[8];} u;

27939

@@ -19,6 +33,7 @@

27940

u.v = data;

27941

return u.s[7];

27942

}

27943

+#endif

27944

27945

static DONT_INLINE int foo(vector signed short data)

27946

{

27947

Index: gcc/testsuite/gcc.dg/vmx/eg-5.c

27948

===================================================================

27949

--- a/src/gcc/testsuite/gcc.dg/vmx/eg-5.c (.../tags/gcc_4_8_2_release)

27950

+++ b/src/gcc/testsuite/gcc.dg/vmx/eg-5.c (.../branches/gcc-4_8-branch)

27951

@@ -6,12 +6,10 @@

27952

{

27953

/* Set result to a vector of f32 0's */

27954

vector float result = ((vector float){0.,0.,0.,0.});

27955

-

27956

result = vec_madd (c0, vec_splat (v, 0), result);

27957

result = vec_madd (c1, vec_splat (v, 1), result);

27958

result = vec_madd (c2, vec_splat (v, 2), result);

27959

result = vec_madd (c3, vec_splat (v, 3), result);

27960

-

27961

return result;

27962

}

27963

27964

Index: gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c

27965

===================================================================

27966

--- a/src/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c (.../tags/gcc_4_8_2_release)

27967

+++ b/src/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c (.../branches/gcc-4_8-branch)

27968

@@ -0,0 +1,34 @@

27969

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

27970

+/* { dg-require-effective-target powerpc_vsx_ok } */

27971

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

27972

+

27973

+#include "harness.h"

27974

+

27975

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

27976

+static double svd[2] __attribute__ ((aligned (16)));

27977

+

27978

+static void check_arrays ()

27979

+{

27980

+ unsigned int i;

27981

+ for (i = 0; i < 2; ++i)

27982

+ {

27983

+ check (svul[i] == i, "svul");

27984

+ check (svd[i] == i * 1.0, "svd");

27985

+ }

27986

+}

27987

+

27988

+static void test ()

27989

+{

27990

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

27991

+ vector unsigned long long vul = {1,0};

27992

+ vector double vd = {1.0,0.0};

27993

+#else

27994

+ vector unsigned long long vul = {0,1};

27995

+ vector double vd = {0.0,1.0};

27996

+#endif

27997

+

27998

+ vec_st (vul, 0, (vector unsigned long long *)svul);

27999

+ vec_st (vd, 0, (vector double *)svd);

28000

+

28001

+ check_arrays ();

28002

+}

28003

Index: gcc/testsuite/gcc.dg/vmx/lde.c

28004

===================================================================

28005

--- a/src/gcc/testsuite/gcc.dg/vmx/lde.c (.../tags/gcc_4_8_2_release)

28006

+++ b/src/gcc/testsuite/gcc.dg/vmx/lde.c (.../branches/gcc-4_8-branch)

28007

@@ -0,0 +1,59 @@

28008

+#include "harness.h"

28009

+

28010

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28011

+static signed char svsc[16] __attribute__ ((aligned (16)));

28012

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28013

+static signed short svss[8] __attribute__ ((aligned (16)));

28014

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28015

+static signed int svsi[4] __attribute__ ((aligned (16)));

28016

+static float svf[4] __attribute__ ((aligned (16)));

28017

+

28018

+static void init ()

28019

+{

28020

+ unsigned int i;

28021

+ for (i = 0; i < 16; ++i)

28022

+ {

28023

+ svuc[i] = i;

28024

+ svsc[i] = i - 8;

28025

+ }

28026

+ for (i = 0; i < 8; ++i)

28027

+ {

28028

+ svus[i] = i;

28029

+ svss[i] = i - 4;

28030

+ }

28031

+ for (i = 0; i < 4; ++i)

28032

+ {

28033

+ svui[i] = i;

28034

+ svsi[i] = i - 2;

28035

+ svf[i] = i * 1.0f;

28036

+ }

28037

+}

28038

+

28039

+static void test ()

28040

+{

28041

+ vector unsigned char vuc;

28042

+ vector signed char vsc;

28043

+ vector unsigned short vus;

28044

+ vector signed short vss;

28045

+ vector unsigned int vui;

28046

+ vector signed int vsi;

28047

+ vector float vf;

28048

+

28049

+ init ();

28050

+

28051

+ vuc = vec_lde (9*1, (unsigned char *)svuc);

28052

+ vsc = vec_lde (14*1, (signed char *)svsc);

28053

+ vus = vec_lde (7*2, (unsigned short *)svus);

28054

+ vss = vec_lde (1*2, (signed short *)svss);

28055

+ vui = vec_lde (3*4, (unsigned int *)svui);

28056

+ vsi = vec_lde (2*4, (signed int *)svsi);

28057

+ vf = vec_lde (0*4, (float *)svf);

28058

+

28059

+ check (vec_extract (vuc, 9) == 9, "vuc");

28060

+ check (vec_extract (vsc, 14) == 6, "vsc");

28061

+ check (vec_extract (vus, 7) == 7, "vus");

28062

+ check (vec_extract (vss, 1) == -3, "vss");

28063

+ check (vec_extract (vui, 3) == 3, "vui");

28064

+ check (vec_extract (vsi, 2) == 0, "vsi");

28065

+ check (vec_extract (vf, 0) == 0.0, "vf");

28066

+}

28067

Index: gcc/testsuite/gcc.dg/vmx/pack.c

28068

===================================================================

28069

--- a/src/gcc/testsuite/gcc.dg/vmx/pack.c (.../tags/gcc_4_8_2_release)

28070

+++ b/src/gcc/testsuite/gcc.dg/vmx/pack.c (.../branches/gcc-4_8-branch)

28071

@@ -0,0 +1,108 @@

28072

+#include "harness.h"

28073

+

28074

+#define BIG 4294967295

28075

+

28076

+static void test()

28077

+{

28078

+ /* Input vectors. */

28079

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

28080

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

28081

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

28082

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

28083

+ vector bool short vbsa = {0,65535,65535,0,0,0,65535,0};

28084

+ vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535};

28085

+ vector unsigned int vuia = {0,1,2,3};

28086

+ vector unsigned int vuib = {4,5,6,7};

28087

+ vector signed int vsia = {-4,-3,-2,-1};

28088

+ vector signed int vsib = {0,1,2,3};

28089

+ vector bool int vbia = {0,BIG,BIG,BIG};

28090

+ vector bool int vbib = {BIG,0,0,0};

28091

+ vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3),

28092

+ (1<<24) + (5<<19) + (6<<11) + (7<<3),

28093

+ (0<<24) + (8<<19) + (9<<11) + (10<<3),

28094

+ (1<<24) + (11<<19) + (12<<11) + (13<<3)};

28095

+ vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3),

28096

+ (0<<24) + (17<<19) + (18<<11) + (19<<3),

28097

+ (1<<24) + (20<<19) + (21<<11) + (22<<3),

28098

+ (0<<24) + (23<<19) + (24<<11) + (25<<3)};

28099

+ vector unsigned short vusc = {0,256,1,257,2,258,3,259};

28100

+ vector unsigned short vusd = {4,260,5,261,6,262,7,263};

28101

+ vector signed short vssc = {-1,-128,0,127,-2,-129,1,128};

28102

+ vector signed short vssd = {-3,-130,2,129,-4,-131,3,130};

28103

+ vector unsigned int vuic = {0,65536,1,65537};

28104

+ vector unsigned int vuid = {2,65538,3,65539};

28105

+ vector signed int vsic = {-1,-32768,0,32767};

28106

+ vector signed int vsid = {-2,-32769,1,32768};

28107

+

28108

+ /* Result vectors. */

28109

+ vector unsigned char vucr;

28110

+ vector signed char vscr;

28111

+ vector bool char vbcr;

28112

+ vector unsigned short vusr;

28113

+ vector signed short vssr;

28114

+ vector bool short vbsr;

28115

+ vector pixel vpr;

28116

+ vector unsigned char vucsr;

28117

+ vector signed char vscsr;

28118

+ vector unsigned short vussr;

28119

+ vector signed short vsssr;

28120

+ vector unsigned char vucsur1, vucsur2;

28121

+ vector unsigned short vussur1, vussur2;

28122

+

28123

+ /* Expected result vectors. */

28124

+ vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28125

+ vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28126

+ vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

28127

+ vector unsigned short vuser = {0,1,2,3,4,5,6,7};

28128

+ vector signed short vsser = {-4,-3,-2,-1,0,1,2,3};

28129

+ vector bool short vbser = {0,65535,65535,65535,65535,0,0,0};

28130

+ vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4,

28131

+ (1<<15) + (5<<10) + (6<<5) + 7,

28132

+ (0<<15) + (8<<10) + (9<<5) + 10,

28133

+ (1<<15) + (11<<10) + (12<<5) + 13,

28134

+ (1<<15) + (14<<10) + (15<<5) + 16,

28135

+ (0<<15) + (17<<10) + (18<<5) + 19,

28136

+ (1<<15) + (20<<10) + (21<<5) + 22,

28137

+ (0<<15) + (23<<10) + (24<<5) + 25};

28138

+ vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

28139

+ vector signed char vscser = {-1,-128,0,127,-2,-128,1,127,

28140

+ -3,-128,2,127,-4,-128,3,127};

28141

+ vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535};

28142

+ vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767};

28143

+ vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

28144

+ vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130};

28145

+ vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535};

28146

+ vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768};

28147

+

28148

+ vucr = vec_pack (vusa, vusb);

28149

+ vscr = vec_pack (vssa, vssb);

28150

+ vbcr = vec_pack (vbsa, vbsb);

28151

+ vusr = vec_pack (vuia, vuib);

28152

+ vssr = vec_pack (vsia, vsib);

28153

+ vbsr = vec_pack (vbia, vbib);

28154

+ vpr = vec_packpx (vipa, vipb);

28155

+ vucsr = vec_packs (vusc, vusd);

28156

+ vscsr = vec_packs (vssc, vssd);

28157

+ vussr = vec_packs (vuic, vuid);

28158

+ vsssr = vec_packs (vsic, vsid);

28159

+ vucsur1 = vec_packsu (vusc, vusd);

28160

+ vucsur2 = vec_packsu (vssc, vssd);

28161

+ vussur1 = vec_packsu (vuic, vuid);

28162

+ vussur2 = vec_packsu (vsic, vsid);

28163

+

28164

+ check (vec_all_eq (vucr, vucer), "vucr");

28165

+ check (vec_all_eq (vscr, vscer), "vscr");

28166

+ check (vec_all_eq (vbcr, vbcer), "vbcr");

28167

+ check (vec_all_eq (vusr, vuser), "vusr");

28168

+ check (vec_all_eq (vssr, vsser), "vssr");

28169

+ check (vec_all_eq (vbsr, vbser), "vbsr");

28170

+ check (vec_all_eq (vpr, vper ), "vpr" );

28171

+ check (vec_all_eq (vucsr, vucser), "vucsr");

28172

+ check (vec_all_eq (vscsr, vscser), "vscsr");

28173

+ check (vec_all_eq (vussr, vusser), "vussr");

28174

+ check (vec_all_eq (vsssr, vssser), "vsssr");

28175

+ check (vec_all_eq (vucsur1, vucsuer1), "vucsur1");

28176

+ check (vec_all_eq (vucsur2, vucsuer2), "vucsur2");

28177

+ check (vec_all_eq (vussur1, vussuer1), "vussur1");

28178

+ check (vec_all_eq (vussur2, vussuer2), "vussur2");

28179

+}

28180

Index: gcc/testsuite/gcc.dg/vmx/unpack-be-order.c

28181

===================================================================

28182

--- a/src/gcc/testsuite/gcc.dg/vmx/unpack-be-order.c (.../tags/gcc_4_8_2_release)

28183

+++ b/src/gcc/testsuite/gcc.dg/vmx/unpack-be-order.c (.../branches/gcc-4_8-branch)

28184

@@ -0,0 +1,88 @@

28185

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28186

+

28187

+#include "harness.h"

28188

+

28189

+#define BIG 4294967295

28190

+

28191

+static void test()

28192

+{

28193

+ /* Input vectors. */

28194

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28195

+ vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

28196

+ vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3,

28197

+ (1<<15) + (4<<10) + (5<<5) + 6,

28198

+ (0<<15) + (7<<10) + (8<<5) + 9,

28199

+ (1<<15) + (10<<10) + (11<<5) + 12,

28200

+ (1<<15) + (13<<10) + (14<<5) + 15,

28201

+ (0<<15) + (16<<10) + (17<<5) + 18,

28202

+ (1<<15) + (19<<10) + (20<<5) + 21,

28203

+ (0<<15) + (22<<10) + (23<<5) + 24};

28204

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

28205

+ vector bool short vbs = {0,65535,65535,0,0,0,65535,0};

28206

+

28207

+ /* Result vectors. */

28208

+ vector signed short vsch, vscl;

28209

+ vector bool short vbsh, vbsl;

28210

+ vector unsigned int vuih, vuil;

28211

+ vector signed int vsih, vsil;

28212

+ vector bool int vbih, vbil;

28213

+

28214

+ /* Expected result vectors. */

28215

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28216

+ vector signed short vschr = {0,1,2,3,4,5,6,7};

28217

+ vector signed short vsclr = {-8,-7,-6,-5,-4,-3,-2,-1};

28218

+ vector bool short vbshr = {65535,0,0,65535,65535,65535,0,65535};

28219

+ vector bool short vbslr = {0,65535,65535,0,0,0,65535,0};

28220

+ vector unsigned int vuihr = {(65535<<24) + (13<<16) + (14<<8) + 15,

28221

+ (0<<24) + (16<<16) + (17<<8) + 18,

28222

+ (65535<<24) + (19<<16) + (20<<8) + 21,

28223

+ (0<<24) + (22<<16) + (23<<8) + 24};

28224

+ vector unsigned int vuilr = {(0<<24) + (1<<16) + (2<<8) + 3,

28225

+ (65535<<24) + (4<<16) + (5<<8) + 6,

28226

+ (0<<24) + (7<<16) + (8<<8) + 9,

28227

+ (65535<<24) + (10<<16) + (11<<8) + 12};

28228

+ vector signed int vsihr = {0,1,2,3};

28229

+ vector signed int vsilr = {-4,-3,-2,-1};

28230

+ vector bool int vbihr = {0,0,BIG,0};

28231

+ vector bool int vbilr = {0,BIG,BIG,0};

28232

+#else

28233

+ vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1};

28234

+ vector signed short vsclr = {0,1,2,3,4,5,6,7};

28235

+ vector bool short vbshr = {0,65535,65535,0,0,0,65535,0};

28236

+ vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535};

28237

+ vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3,

28238

+ (65535<<24) + (4<<16) + (5<<8) + 6,

28239

+ (0<<24) + (7<<16) + (8<<8) + 9,

28240

+ (65535<<24) + (10<<16) + (11<<8) + 12};

28241

+ vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15,

28242

+ (0<<24) + (16<<16) + (17<<8) + 18,

28243

+ (65535<<24) + (19<<16) + (20<<8) + 21,

28244

+ (0<<24) + (22<<16) + (23<<8) + 24};

28245

+ vector signed int vsihr = {-4,-3,-2,-1};

28246

+ vector signed int vsilr = {0,1,2,3};

28247

+ vector bool int vbihr = {0,BIG,BIG,0};

28248

+ vector bool int vbilr = {0,0,BIG,0};

28249

+#endif

28250

+

28251

+ vsch = vec_unpackh (vsc);

28252

+ vscl = vec_unpackl (vsc);

28253

+ vbsh = vec_unpackh (vbc);

28254

+ vbsl = vec_unpackl (vbc);

28255

+ vuih = vec_unpackh (vp);

28256

+ vuil = vec_unpackl (vp);

28257

+ vsih = vec_unpackh (vss);

28258

+ vsil = vec_unpackl (vss);

28259

+ vbih = vec_unpackh (vbs);

28260

+ vbil = vec_unpackl (vbs);

28261

+

28262

+ check (vec_all_eq (vsch, vschr), "vsch");

28263

+ check (vec_all_eq (vscl, vsclr), "vscl");

28264

+ check (vec_all_eq (vbsh, vbshr), "vbsh");

28265

+ check (vec_all_eq (vbsl, vbslr), "vbsl");

28266

+ check (vec_all_eq (vuih, vuihr), "vuih");

28267

+ check (vec_all_eq (vuil, vuilr), "vuil");

28268

+ check (vec_all_eq (vsih, vsihr), "vsih");

28269

+ check (vec_all_eq (vsil, vsilr), "vsil");

28270

+ check (vec_all_eq (vbih, vbihr), "vbih");

28271

+ check (vec_all_eq (vbil, vbilr), "vbil");

28272

+}

28273

Index: gcc/testsuite/gcc.dg/vmx/st.c

28274

===================================================================

28275

--- a/src/gcc/testsuite/gcc.dg/vmx/st.c (.../tags/gcc_4_8_2_release)

28276

+++ b/src/gcc/testsuite/gcc.dg/vmx/st.c (.../branches/gcc-4_8-branch)

28277

@@ -0,0 +1,67 @@

28278

+#include "harness.h"

28279

+

28280

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28281

+static signed char svsc[16] __attribute__ ((aligned (16)));

28282

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

28283

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28284

+static signed short svss[8] __attribute__ ((aligned (16)));

28285

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

28286

+static unsigned short svp[8] __attribute__ ((aligned (16)));

28287

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28288

+static signed int svsi[4] __attribute__ ((aligned (16)));

28289

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

28290

+static float svf[4] __attribute__ ((aligned (16)));

28291

+

28292

+static void check_arrays ()

28293

+{

28294

+ unsigned int i;

28295

+ for (i = 0; i < 16; ++i)

28296

+ {

28297

+ check (svuc[i] == i, "svuc");

28298

+ check (svsc[i] == i - 8, "svsc");

28299

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

28300

+ }

28301

+ for (i = 0; i < 8; ++i)

28302

+ {

28303

+ check (svus[i] == i, "svus");

28304

+ check (svss[i] == i - 4, "svss");

28305

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

28306

+ check (svp[i] == i, "svp");

28307

+ }

28308

+ for (i = 0; i < 4; ++i)

28309

+ {

28310

+ check (svui[i] == i, "svui");

28311

+ check (svsi[i] == i - 2, "svsi");

28312

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

28313

+ check (svf[i] == i * 1.0f, "svf");

28314

+ }

28315

+}

28316

+

28317

+static void test ()

28318

+{

28319

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28320

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28321

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

28322

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

28323

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

28324

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

28325

+ vector pixel vp = {0,1,2,3,4,5,6,7};

28326

+ vector unsigned int vui = {0,1,2,3};

28327

+ vector signed int vsi = {-2,-1,0,1};

28328

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

28329

+ vector float vf = {0.0,1.0,2.0,3.0};

28330

+

28331

+ vec_st (vuc, 0, (vector unsigned char *)svuc);

28332

+ vec_st (vsc, 0, (vector signed char *)svsc);

28333

+ vec_st (vbc, 0, (vector bool char *)svbc);

28334

+ vec_st (vus, 0, (vector unsigned short *)svus);

28335

+ vec_st (vss, 0, (vector signed short *)svss);

28336

+ vec_st (vbs, 0, (vector bool short *)svbs);

28337

+ vec_st (vp, 0, (vector pixel *)svp);

28338

+ vec_st (vui, 0, (vector unsigned int *)svui);

28339

+ vec_st (vsi, 0, (vector signed int *)svsi);

28340

+ vec_st (vbi, 0, (vector bool int *)svbi);

28341

+ vec_st (vf, 0, (vector float *)svf);

28342

+

28343

+ check_arrays ();

28344

+}

28345

Index: gcc/testsuite/gcc.dg/vmx/ste-be-order.c

28346

===================================================================

28347

--- a/src/gcc/testsuite/gcc.dg/vmx/ste-be-order.c (.../tags/gcc_4_8_2_release)

28348

+++ b/src/gcc/testsuite/gcc.dg/vmx/ste-be-order.c (.../branches/gcc-4_8-branch)

28349

@@ -0,0 +1,53 @@

28350

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28351

+

28352

+#include "harness.h"

28353

+

28354

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28355

+static signed char svsc[16] __attribute__ ((aligned (16)));

28356

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28357

+static signed short svss[8] __attribute__ ((aligned (16)));

28358

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28359

+static signed int svsi[4] __attribute__ ((aligned (16)));

28360

+static float svf[4] __attribute__ ((aligned (16)));

28361

+

28362

+static void check_arrays ()

28363

+{

28364

+ check (svuc[9] == 9, "svuc");

28365

+ check (svsc[14] == 6, "svsc");

28366

+ check (svus[7] == 7, "svus");

28367

+ check (svss[1] == -3, "svss");

28368

+ check (svui[3] == 3, "svui");

28369

+ check (svsi[2] == 0, "svsi");

28370

+ check (svf[0] == 0.0, "svf");

28371

+}

28372

+

28373

+static void test ()

28374

+{

28375

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28376

+ vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

28377

+ vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

28378

+ vector unsigned short vus = {7,6,5,4,3,2,1,0};

28379

+ vector signed short vss = {3,2,1,0,-1,-2,-3,-4};

28380

+ vector unsigned int vui = {3,2,1,0};

28381

+ vector signed int vsi = {1,0,-1,-2};

28382

+ vector float vf = {3.0,2.0,1.0,0.0};

28383

+#else

28384

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28385

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28386

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

28387

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

28388

+ vector unsigned int vui = {0,1,2,3};

28389

+ vector signed int vsi = {-2,-1,0,1};

28390

+ vector float vf = {0.0,1.0,2.0,3.0};

28391

+#endif

28392

+

28393

+ vec_ste (vuc, 9*1, (unsigned char *)svuc);

28394

+ vec_ste (vsc, 14*1, (signed char *)svsc);

28395

+ vec_ste (vus, 7*2, (unsigned short *)svus);

28396

+ vec_ste (vss, 1*2, (signed short *)svss);

28397

+ vec_ste (vui, 3*4, (unsigned int *)svui);

28398

+ vec_ste (vsi, 2*4, (signed int *)svsi);

28399

+ vec_ste (vf, 0*4, (float *)svf);

28400

+

28401

+ check_arrays ();

28402

+}

28403

Index: gcc/testsuite/gcc.dg/vmx/insert.c

28404

===================================================================

28405

--- a/src/gcc/testsuite/gcc.dg/vmx/insert.c (.../tags/gcc_4_8_2_release)

28406

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert.c (.../branches/gcc-4_8-branch)

28407

@@ -0,0 +1,37 @@

28408

+#include "harness.h"

28409

+

28410

+static void test()

28411

+{

28412

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28413

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28414

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

28415

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

28416

+ vector unsigned int ve = {0,1,2,3};

28417

+ vector signed int vf = {-2,-1,0,1};

28418

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

28419

+

28420

+ check (vec_all_eq (vec_insert (16, va, 5),

28421

+ ((vector unsigned char)

28422

+ {0,1,2,3,4,16,6,7,8,9,10,11,12,13,14,15})),

28423

+ "vec_insert (va)");

28424

+ check (vec_all_eq (vec_insert (-16, vb, 0),

28425

+ ((vector signed char)

28426

+ {-16,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7})),

28427

+ "vec_insert (vb)");

28428

+ check (vec_all_eq (vec_insert (16, vc, 7),

28429

+ ((vector unsigned short){0,1,2,3,4,5,6,16})),

28430

+ "vec_insert (vc)");

28431

+ check (vec_all_eq (vec_insert (-16, vd, 3),

28432

+ ((vector signed short){-4,-3,-2,-16,0,1,2,3})),

28433

+ "vec_insert (vd)");

28434

+ check (vec_all_eq (vec_insert (16, ve, 2),

28435

+ ((vector unsigned int){0,1,16,3})),

28436

+ "vec_insert (ve)");

28437

+ check (vec_all_eq (vec_insert (-16, vf, 1),

28438

+ ((vector signed int){-2,-16,0,1})),

28439

+ "vec_insert (vf)");

28440

+ check (vec_all_eq (vec_insert (-16.0f, vg, 0),

28441

+ ((vector float){-16.0f,-1.0f,0.0f,1.0f})),

28442

+ "vec_insert (vg)");

28443

+}

28444

+

28445

Index: gcc/testsuite/gcc.dg/vmx/ld-vsx.c

28446

===================================================================

28447

--- a/src/gcc/testsuite/gcc.dg/vmx/ld-vsx.c (.../tags/gcc_4_8_2_release)

28448

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld-vsx.c (.../branches/gcc-4_8-branch)

28449

@@ -0,0 +1,39 @@

28450

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

28451

+/* { dg-require-effective-target powerpc_vsx_ok } */

28452

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

28453

+

28454

+#include "harness.h"

28455

+

28456

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

28457

+static double svd[2] __attribute__ ((aligned (16)));

28458

+

28459

+static void init ()

28460

+{

28461

+ unsigned int i;

28462

+ for (i = 0; i < 2; ++i)

28463

+ {

28464

+ svul[i] = i;

28465

+ svd[i] = i * 1.0;

28466

+ }

28467

+}

28468

+

28469

+static void test ()

28470

+{

28471

+ vector unsigned long long evul = {0,1};

28472

+ vector double evd = {0.0,1.0};

28473

+

28474

+ vector unsigned long long vul;

28475

+ vector double vd;

28476

+ unsigned i;

28477

+

28478

+ init ();

28479

+

28480

+ vul = vec_ld (0, (vector unsigned long long *)svul);

28481

+ vd = vec_ld (0, (vector double *)svd);

28482

+

28483

+ for (i = 0; i < 2; ++i)

28484

+ {

28485

+ check (vul[i] == evul[i], "vul");

28486

+ check (vd[i] == evd[i], "vd" );

28487

+ }

28488

+}

28489

Index: gcc/testsuite/gcc.dg/vmx/extract-vsx.c

28490

===================================================================

28491

--- a/src/gcc/testsuite/gcc.dg/vmx/extract-vsx.c (.../tags/gcc_4_8_2_release)

28492

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract-vsx.c (.../branches/gcc-4_8-branch)

28493

@@ -0,0 +1,16 @@

28494

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

28495

+/* { dg-require-effective-target powerpc_vsx_ok } */

28496

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

28497

+

28498

+#include "harness.h"

28499

+

28500

+static void test()

28501

+{

28502

+ vector long long vl = {0, 1};

28503

+ vector double vd = {0.0, 1.0};

28504

+

28505

+ check (vec_extract (vl, 0) == 0, "vec_extract, vl, 0");

28506

+ check (vec_extract (vd, 1) == 1.0, "vec_extract, vd, 1");

28507

+ check (vl[0] == 0, "[], vl, 0");

28508

+ check (vd[1] == 1.0, "[], vd, 0");

28509

+}

28510

Index: gcc/testsuite/gcc.dg/vmx/perm.c

28511

===================================================================

28512

--- a/src/gcc/testsuite/gcc.dg/vmx/perm.c (.../tags/gcc_4_8_2_release)

28513

+++ b/src/gcc/testsuite/gcc.dg/vmx/perm.c (.../branches/gcc-4_8-branch)

28514

@@ -0,0 +1,69 @@

28515

+#include "harness.h"

28516

+

28517

+static void test()

28518

+{

28519

+ /* Input vectors. */

28520

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28521

+ vector unsigned char vucb

28522

+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

28523

+ vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

28524

+

28525

+ vector signed char vsca

28526

+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

28527

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28528

+ vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

28529

+

28530

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

28531

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

28532

+ vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

28533

+

28534

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

28535

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

28536

+ vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

28537

+

28538

+ vector unsigned int vuia = {0,1,2,3};

28539

+ vector unsigned int vuib = {4,5,6,7};

28540

+ vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

28541

+

28542

+ vector signed int vsia = {-4,-3,-2,-1};

28543

+ vector signed int vsib = {0,1,2,3};

28544

+ vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

28545

+

28546

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

28547

+ vector float vfb = {0.0,1.0,2.0,3.0};

28548

+ vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

28549

+

28550

+ /* Result vectors. */

28551

+ vector unsigned char vuc;

28552

+ vector signed char vsc;

28553

+ vector unsigned short vus;

28554

+ vector signed short vss;

28555

+ vector unsigned int vui;

28556

+ vector signed int vsi;

28557

+ vector float vf;

28558

+

28559

+ /* Expected result vectors. */

28560

+ vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

28561

+ vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8};

28562

+ vector unsigned short vusr = {0,15,1,14,2,13,3,12};

28563

+ vector signed short vssr = {-8,7,-7,6,-6,5,-5,4};

28564

+ vector unsigned int vuir = {0,7,1,6};

28565

+ vector signed int vsir = {-4,3,-3,2};

28566

+ vector float vfr = {-4.0,3.0,-3.0,2.0};

28567

+

28568

+ vuc = vec_perm (vuca, vucb, vucp);

28569

+ vsc = vec_perm (vsca, vscb, vscp);

28570

+ vus = vec_perm (vusa, vusb, vusp);

28571

+ vss = vec_perm (vssa, vssb, vssp);

28572

+ vui = vec_perm (vuia, vuib, vuip);

28573

+ vsi = vec_perm (vsia, vsib, vsip);

28574

+ vf = vec_perm (vfa, vfb, vfp );

28575

+

28576

+ check (vec_all_eq (vuc, vucr), "vuc");

28577

+ check (vec_all_eq (vsc, vscr), "vsc");

28578

+ check (vec_all_eq (vus, vusr), "vus");

28579

+ check (vec_all_eq (vss, vssr), "vss");

28580

+ check (vec_all_eq (vui, vuir), "vui");

28581

+ check (vec_all_eq (vsi, vsir), "vsi");

28582

+ check (vec_all_eq (vf, vfr), "vf" );

28583

+}

28584

Index: gcc/testsuite/gcc.dg/vmx/extract-be-order.c

28585

===================================================================

28586

--- a/src/gcc/testsuite/gcc.dg/vmx/extract-be-order.c (.../tags/gcc_4_8_2_release)

28587

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract-be-order.c (.../branches/gcc-4_8-branch)

28588

@@ -0,0 +1,33 @@

28589

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28590

+

28591

+#include "harness.h"

28592

+

28593

+static void test()

28594

+{

28595

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28596

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28597

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

28598

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

28599

+ vector unsigned int ve = {0,1,2,3};

28600

+ vector signed int vf = {-2,-1,0,1};

28601

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

28602

+

28603

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28604

+ check (vec_extract (va, 5) == 10, "vec_extract (va, 5)");

28605

+ check (vec_extract (vb, 0) == 7, "vec_extract (vb, 0)");

28606

+ check (vec_extract (vc, 7) == 0, "vec_extract (vc, 7)");

28607

+ check (vec_extract (vd, 3) == 0, "vec_extract (vd, 3)");

28608

+ check (vec_extract (ve, 2) == 1, "vec_extract (ve, 2)");

28609

+ check (vec_extract (vf, 1) == 0, "vec_extract (vf, 1)");

28610

+ check (vec_extract (vg, 0) == 1.0f, "vec_extract (vg, 0)");

28611

+#else

28612

+ check (vec_extract (va, 5) == 5, "vec_extract (va, 5)");

28613

+ check (vec_extract (vb, 0) == -8, "vec_extract (vb, 0)");

28614

+ check (vec_extract (vc, 7) == 7, "vec_extract (vc, 7)");

28615

+ check (vec_extract (vd, 3) == -1, "vec_extract (vd, 3)");

28616

+ check (vec_extract (ve, 2) == 2, "vec_extract (ve, 2)");

28617

+ check (vec_extract (vf, 1) == -1, "vec_extract (vf, 1)");

28618

+ check (vec_extract (vg, 0) == -2.0f, "vec_extract (vg, 0)");

28619

+#endif

28620

+}

28621

+

28622

Index: gcc/testsuite/gcc.dg/vmx/ldl-be-order.c

28623

===================================================================

28624

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl-be-order.c (.../tags/gcc_4_8_2_release)

28625

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl-be-order.c (.../branches/gcc-4_8-branch)

28626

@@ -0,0 +1,107 @@

28627

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28628

+

28629

+#include "harness.h"

28630

+

28631

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28632

+static signed char svsc[16] __attribute__ ((aligned (16)));

28633

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

28634

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28635

+static signed short svss[8] __attribute__ ((aligned (16)));

28636

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

28637

+static unsigned short svp[8] __attribute__ ((aligned (16)));

28638

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28639

+static signed int svsi[4] __attribute__ ((aligned (16)));

28640

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

28641

+static float svf[4] __attribute__ ((aligned (16)));

28642

+

28643

+static void init ()

28644

+{

28645

+ unsigned int i;

28646

+ for (i = 0; i < 16; ++i)

28647

+ {

28648

+ svuc[i] = i;

28649

+ svsc[i] = i - 8;

28650

+ svbc[i] = (i % 2) ? 0xff : 0;

28651

+ }

28652

+ for (i = 0; i < 8; ++i)

28653

+ {

28654

+ svus[i] = i;

28655

+ svss[i] = i - 4;

28656

+ svbs[i] = (i % 2) ? 0xffff : 0;

28657

+ svp[i] = i;

28658

+ }

28659

+ for (i = 0; i < 4; ++i)

28660

+ {

28661

+ svui[i] = i;

28662

+ svsi[i] = i - 2;

28663

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

28664

+ svf[i] = i * 1.0f;

28665

+ }

28666

+}

28667

+

28668

+static void test ()

28669

+{

28670

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28671

+ vector unsigned char evuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

28672

+ vector signed char evsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

28673

+ vector bool char evbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

28674

+ vector unsigned short evus = {7,6,5,4,3,2,1,0};

28675

+ vector signed short evss = {3,2,1,0,-1,-2,-3,-4};

28676

+ vector bool short evbs = {65535,0,65535,0,65535,0,65535,0};

28677

+ vector pixel evp = {7,6,5,4,3,2,1,0};

28678

+ vector unsigned int evui = {3,2,1,0};

28679

+ vector signed int evsi = {1,0,-1,-2};

28680

+ vector bool int evbi = {0xffffffff,0,0xffffffff,0};

28681

+ vector float evf = {3.0,2.0,1.0,0.0};

28682

+#else

28683

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28684

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28685

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

28686

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

28687

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

28688

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

28689

+ vector pixel evp = {0,1,2,3,4,5,6,7};

28690

+ vector unsigned int evui = {0,1,2,3};

28691

+ vector signed int evsi = {-2,-1,0,1};

28692

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

28693

+ vector float evf = {0.0,1.0,2.0,3.0};

28694

+#endif

28695

+

28696

+ vector unsigned char vuc;

28697

+ vector signed char vsc;

28698

+ vector bool char vbc;

28699

+ vector unsigned short vus;

28700

+ vector signed short vss;

28701

+ vector bool short vbs;

28702

+ vector pixel vp;

28703

+ vector unsigned int vui;

28704

+ vector signed int vsi;

28705

+ vector bool int vbi;

28706

+ vector float vf;

28707

+

28708

+ init ();

28709

+

28710

+ vuc = vec_ldl (0, (vector unsigned char *)svuc);

28711

+ vsc = vec_ldl (0, (vector signed char *)svsc);

28712

+ vbc = vec_ldl (0, (vector bool char *)svbc);

28713

+ vus = vec_ldl (0, (vector unsigned short *)svus);

28714

+ vss = vec_ldl (0, (vector signed short *)svss);

28715

+ vbs = vec_ldl (0, (vector bool short *)svbs);

28716

+ vp = vec_ldl (0, (vector pixel *)svp);

28717

+ vui = vec_ldl (0, (vector unsigned int *)svui);

28718

+ vsi = vec_ldl (0, (vector signed int *)svsi);

28719

+ vbi = vec_ldl (0, (vector bool int *)svbi);

28720

+ vf = vec_ldl (0, (vector float *)svf);

28721

+

28722

+ check (vec_all_eq (vuc, evuc), "vuc");

28723

+ check (vec_all_eq (vsc, evsc), "vsc");

28724

+ check (vec_all_eq (vbc, evbc), "vbc");

28725

+ check (vec_all_eq (vus, evus), "vus");

28726

+ check (vec_all_eq (vss, evss), "vss");

28727

+ check (vec_all_eq (vbs, evbs), "vbs");

28728

+ check (vec_all_eq (vp, evp ), "vp" );

28729

+ check (vec_all_eq (vui, evui), "vui");

28730

+ check (vec_all_eq (vsi, evsi), "vsi");

28731

+ check (vec_all_eq (vbi, evbi), "vbi");

28732

+ check (vec_all_eq (vf, evf ), "vf" );

28733

+}

28734

Index: gcc/testsuite/gcc.dg/vmx/mult-even-odd.c

28735

===================================================================

28736

--- a/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd.c (.../tags/gcc_4_8_2_release)

28737

+++ b/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd.c (.../branches/gcc-4_8-branch)

28738

@@ -0,0 +1,43 @@

28739

+#include "harness.h"

28740

+

28741

+static void test()

28742

+{

28743

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28744

+ vector unsigned char vucb = {2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3};

28745

+ vector signed char vsca = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28746

+ vector signed char vscb = {2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3};

28747

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

28748

+ vector unsigned short vusb = {2,3,2,3,2,3,2,3};

28749

+ vector signed short vssa = {-4,-3,-2,-1,0,1,2,3};

28750

+ vector signed short vssb = {2,-3,2,-3,2,-3,2,-3};

28751

+ vector unsigned short vuse, vuso;

28752

+ vector signed short vsse, vsso;

28753

+ vector unsigned int vuie, vuio;

28754

+ vector signed int vsie, vsio;

28755

+

28756

+ vuse = vec_mule (vuca, vucb);

28757

+ vuso = vec_mulo (vuca, vucb);

28758

+ vsse = vec_mule (vsca, vscb);

28759

+ vsso = vec_mulo (vsca, vscb);

28760

+ vuie = vec_mule (vusa, vusb);

28761

+ vuio = vec_mulo (vusa, vusb);

28762

+ vsie = vec_mule (vssa, vssb);

28763

+ vsio = vec_mulo (vssa, vssb);

28764

+

28765

+ check (vec_all_eq (vuse,

28766

+ ((vector unsigned short){0,4,8,12,16,20,24,28})),

28767

+ "vuse");

28768

+ check (vec_all_eq (vuso,

28769

+ ((vector unsigned short){3,9,15,21,27,33,39,45})),

28770

+ "vuso");

28771

+ check (vec_all_eq (vsse,

28772

+ ((vector signed short){-16,-12,-8,-4,0,4,8,12})),

28773

+ "vsse");

28774

+ check (vec_all_eq (vsso,

28775

+ ((vector signed short){21,15,9,3,-3,-9,-15,-21})),

28776

+ "vsso");

28777

+ check (vec_all_eq (vuie, ((vector unsigned int){0,4,8,12})), "vuie");

28778

+ check (vec_all_eq (vuio, ((vector unsigned int){3,9,15,21})), "vuio");

28779

+ check (vec_all_eq (vsie, ((vector signed int){-8,-4,0,4})), "vsie");

28780

+ check (vec_all_eq (vsio, ((vector signed int){9,3,-3,-9})), "vsio");

28781

+}

28782

Index: gcc/testsuite/gcc.dg/vmx/splat-be-order.c

28783

===================================================================

28784

--- a/src/gcc/testsuite/gcc.dg/vmx/splat-be-order.c (.../tags/gcc_4_8_2_release)

28785

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat-be-order.c (.../branches/gcc-4_8-branch)

28786

@@ -0,0 +1,59 @@

28787

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28788

+

28789

+#include "harness.h"

28790

+

28791

+static void test()

28792

+{

28793

+ /* Input vectors. */

28794

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28795

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28796

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

28797

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

28798

+ vector unsigned int vui = {0,1,2,3};

28799

+ vector signed int vsi = {-2,-1,0,1};

28800

+ vector float vf = {-2.0,-1.0,0.0,1.0};

28801

+

28802

+ /* Result vectors. */

28803

+ vector unsigned char vucr;

28804

+ vector signed char vscr;

28805

+ vector unsigned short vusr;

28806

+ vector signed short vssr;

28807

+ vector unsigned int vuir;

28808

+ vector signed int vsir;

28809

+ vector float vfr;

28810

+

28811

+ /* Expected result vectors. */

28812

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28813

+ vector unsigned char vucer = {14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14};

28814

+ vector signed char vscer = {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1};

28815

+ vector unsigned short vuser = {0,0,0,0,0,0,0,0};

28816

+ vector signed short vsser = {3,3,3,3,3,3,3,3};

28817

+ vector unsigned int vuier = {1,1,1,1};

28818

+ vector signed int vsier = {-2,-2,-2,-2};

28819

+ vector float vfer = {0.0,0.0,0.0,0.0};

28820

+#else

28821

+ vector unsigned char vucer = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};

28822

+ vector signed char vscer = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

28823

+ vector unsigned short vuser = {7,7,7,7,7,7,7,7};

28824

+ vector signed short vsser = {-4,-4,-4,-4,-4,-4,-4,-4};

28825

+ vector unsigned int vuier = {2,2,2,2};

28826

+ vector signed int vsier = {1,1,1,1};

28827

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

28828

+#endif

28829

+

28830

+ vucr = vec_splat (vuc, 1);

28831

+ vscr = vec_splat (vsc, 8);

28832

+ vusr = vec_splat (vus, 7);

28833

+ vssr = vec_splat (vss, 0);

28834

+ vuir = vec_splat (vui, 2);

28835

+ vsir = vec_splat (vsi, 3);

28836

+ vfr = vec_splat (vf, 1);

28837

+

28838

+ check (vec_all_eq (vucr, vucer), "vuc");

28839

+ check (vec_all_eq (vscr, vscer), "vsc");

28840

+ check (vec_all_eq (vusr, vuser), "vus");

28841

+ check (vec_all_eq (vssr, vsser), "vss");

28842

+ check (vec_all_eq (vuir, vuier), "vui");

28843

+ check (vec_all_eq (vsir, vsier), "vsi");

28844

+ check (vec_all_eq (vfr, vfer ), "vf");

28845

+}

28846

Index: gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c

28847

===================================================================

28848

--- a/src/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c (.../tags/gcc_4_8_2_release)

28849

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c (.../branches/gcc-4_8-branch)

28850

@@ -0,0 +1,19 @@

28851

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

28852

+/* { dg-require-effective-target powerpc_vsx_ok } */

28853

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

28854

+

28855

+#include "harness.h"

28856

+

28857

+static void test()

28858

+{

28859

+ vector long long vl = {0, 1};

28860

+ vector double vd = {0.0, 1.0};

28861

+

28862

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28863

+ check (vec_extract (vl, 0) == 1, "vl, 0");

28864

+ check (vec_extract (vd, 1) == 0.0, "vd, 1");

28865

+#else

28866

+ check (vec_extract (vl, 0) == 0, "vl, 0");

28867

+ check (vec_extract (vd, 1) == 1.0, "vd, 1");

28868

+#endif

28869

+}

28870

Index: gcc/testsuite/gcc.dg/vmx/ld-be-order.c

28871

===================================================================

28872

--- a/src/gcc/testsuite/gcc.dg/vmx/ld-be-order.c (.../tags/gcc_4_8_2_release)

28873

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld-be-order.c (.../branches/gcc-4_8-branch)

28874

@@ -0,0 +1,107 @@

28875

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28876

+

28877

+#include "harness.h"

28878

+

28879

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28880

+static signed char svsc[16] __attribute__ ((aligned (16)));

28881

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

28882

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28883

+static signed short svss[8] __attribute__ ((aligned (16)));

28884

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

28885

+static unsigned short svp[8] __attribute__ ((aligned (16)));

28886

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28887

+static signed int svsi[4] __attribute__ ((aligned (16)));

28888

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

28889

+static float svf[4] __attribute__ ((aligned (16)));

28890

+

28891

+static void init ()

28892

+{

28893

+ unsigned int i;

28894

+ for (i = 0; i < 16; ++i)

28895

+ {

28896

+ svuc[i] = i;

28897

+ svsc[i] = i - 8;

28898

+ svbc[i] = (i % 2) ? 0xff : 0;

28899

+ }

28900

+ for (i = 0; i < 8; ++i)

28901

+ {

28902

+ svus[i] = i;

28903

+ svss[i] = i - 4;

28904

+ svbs[i] = (i % 2) ? 0xffff : 0;

28905

+ svp[i] = i;

28906

+ }

28907

+ for (i = 0; i < 4; ++i)

28908

+ {

28909

+ svui[i] = i;

28910

+ svsi[i] = i - 2;

28911

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

28912

+ svf[i] = i * 1.0f;

28913

+ }

28914

+}

28915

+

28916

+static void test ()

28917

+{

28918

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28919

+ vector unsigned char evuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

28920

+ vector signed char evsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

28921

+ vector bool char evbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

28922

+ vector unsigned short evus = {7,6,5,4,3,2,1,0};

28923

+ vector signed short evss = {3,2,1,0,-1,-2,-3,-4};

28924

+ vector bool short evbs = {65535,0,65535,0,65535,0,65535,0};

28925

+ vector pixel evp = {7,6,5,4,3,2,1,0};

28926

+ vector unsigned int evui = {3,2,1,0};

28927

+ vector signed int evsi = {1,0,-1,-2};

28928

+ vector bool int evbi = {0xffffffff,0,0xffffffff,0};

28929

+ vector float evf = {3.0,2.0,1.0,0.0};

28930

+#else

28931

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28932

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28933

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

28934

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

28935

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

28936

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

28937

+ vector pixel evp = {0,1,2,3,4,5,6,7};

28938

+ vector unsigned int evui = {0,1,2,3};

28939

+ vector signed int evsi = {-2,-1,0,1};

28940

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

28941

+ vector float evf = {0.0,1.0,2.0,3.0};

28942

+#endif

28943

+

28944

+ vector unsigned char vuc;

28945

+ vector signed char vsc;

28946

+ vector bool char vbc;

28947

+ vector unsigned short vus;

28948

+ vector signed short vss;

28949

+ vector bool short vbs;

28950

+ vector pixel vp;

28951

+ vector unsigned int vui;

28952

+ vector signed int vsi;

28953

+ vector bool int vbi;

28954

+ vector float vf;

28955

+

28956

+ init ();

28957

+

28958

+ vuc = vec_ld (0, (vector unsigned char *)svuc);

28959

+ vsc = vec_ld (0, (vector signed char *)svsc);

28960

+ vbc = vec_ld (0, (vector bool char *)svbc);

28961

+ vus = vec_ld (0, (vector unsigned short *)svus);

28962

+ vss = vec_ld (0, (vector signed short *)svss);

28963

+ vbs = vec_ld (0, (vector bool short *)svbs);

28964

+ vp = vec_ld (0, (vector pixel *)svp);

28965

+ vui = vec_ld (0, (vector unsigned int *)svui);

28966

+ vsi = vec_ld (0, (vector signed int *)svsi);

28967

+ vbi = vec_ld (0, (vector bool int *)svbi);

28968

+ vf = vec_ld (0, (vector float *)svf);

28969

+

28970

+ check (vec_all_eq (vuc, evuc), "vuc");

28971

+ check (vec_all_eq (vsc, evsc), "vsc");

28972

+ check (vec_all_eq (vbc, evbc), "vbc");

28973

+ check (vec_all_eq (vus, evus), "vus");

28974

+ check (vec_all_eq (vss, evss), "vss");

28975

+ check (vec_all_eq (vbs, evbs), "vbs");

28976

+ check (vec_all_eq (vp, evp ), "vp" );

28977

+ check (vec_all_eq (vui, evui), "vui");

28978

+ check (vec_all_eq (vsi, evsi), "vsi");

28979

+ check (vec_all_eq (vbi, evbi), "vbi");

28980

+ check (vec_all_eq (vf, evf ), "vf" );

28981

+}

28982

Index: gcc/testsuite/gcc.dg/vmx/ld.c

28983

===================================================================

28984

--- a/src/gcc/testsuite/gcc.dg/vmx/ld.c (.../tags/gcc_4_8_2_release)

28985

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld.c (.../branches/gcc-4_8-branch)

28986

@@ -0,0 +1,91 @@

28987

+#include "harness.h"

28988

+

28989

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28990

+static signed char svsc[16] __attribute__ ((aligned (16)));

28991

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

28992

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28993

+static signed short svss[8] __attribute__ ((aligned (16)));

28994

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

28995

+static unsigned short svp[8] __attribute__ ((aligned (16)));

28996

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28997

+static signed int svsi[4] __attribute__ ((aligned (16)));

28998

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

28999

+static float svf[4] __attribute__ ((aligned (16)));

29000

+

29001

+static void init ()

29002

+{

29003

+ unsigned int i;

29004

+ for (i = 0; i < 16; ++i)

29005

+ {

29006

+ svuc[i] = i;

29007

+ svsc[i] = i - 8;

29008

+ svbc[i] = (i % 2) ? 0xff : 0;

29009

+ }

29010

+ for (i = 0; i < 8; ++i)

29011

+ {

29012

+ svus[i] = i;

29013

+ svss[i] = i - 4;

29014

+ svbs[i] = (i % 2) ? 0xffff : 0;

29015

+ svp[i] = i;

29016

+ }

29017

+ for (i = 0; i < 4; ++i)

29018

+ {

29019

+ svui[i] = i;

29020

+ svsi[i] = i - 2;

29021

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

29022

+ svf[i] = i * 1.0f;

29023

+ }

29024

+}

29025

+

29026

+static void test ()

29027

+{

29028

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29029

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29030

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

29031

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

29032

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

29033

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

29034

+ vector pixel evp = {0,1,2,3,4,5,6,7};

29035

+ vector unsigned int evui = {0,1,2,3};

29036

+ vector signed int evsi = {-2,-1,0,1};

29037

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

29038

+ vector float evf = {0.0,1.0,2.0,3.0};

29039

+

29040

+ vector unsigned char vuc;

29041

+ vector signed char vsc;

29042

+ vector bool char vbc;

29043

+ vector unsigned short vus;

29044

+ vector signed short vss;

29045

+ vector bool short vbs;

29046

+ vector pixel vp;

29047

+ vector unsigned int vui;

29048

+ vector signed int vsi;

29049

+ vector bool int vbi;

29050

+ vector float vf;

29051

+

29052

+ init ();

29053

+

29054

+ vuc = vec_ld (0, (vector unsigned char *)svuc);

29055

+ vsc = vec_ld (0, (vector signed char *)svsc);

29056

+ vbc = vec_ld (0, (vector bool char *)svbc);

29057

+ vus = vec_ld (0, (vector unsigned short *)svus);

29058

+ vss = vec_ld (0, (vector signed short *)svss);

29059

+ vbs = vec_ld (0, (vector bool short *)svbs);

29060

+ vp = vec_ld (0, (vector pixel *)svp);

29061

+ vui = vec_ld (0, (vector unsigned int *)svui);

29062

+ vsi = vec_ld (0, (vector signed int *)svsi);

29063

+ vbi = vec_ld (0, (vector bool int *)svbi);

29064

+ vf = vec_ld (0, (vector float *)svf);

29065

+

29066

+ check (vec_all_eq (vuc, evuc), "vuc");

29067

+ check (vec_all_eq (vsc, evsc), "vsc");

29068

+ check (vec_all_eq (vbc, evbc), "vbc");

29069

+ check (vec_all_eq (vus, evus), "vus");

29070

+ check (vec_all_eq (vss, evss), "vss");

29071

+ check (vec_all_eq (vbs, evbs), "vbs");

29072

+ check (vec_all_eq (vp, evp ), "vp" );

29073

+ check (vec_all_eq (vui, evui), "vui");

29074

+ check (vec_all_eq (vsi, evsi), "vsi");

29075

+ check (vec_all_eq (vbi, evbi), "vbi");

29076

+ check (vec_all_eq (vf, evf ), "vf" );

29077

+}

29078

Index: gcc/testsuite/gcc.dg/vmx/sn7153.c

29079

===================================================================

29080

--- a/src/gcc/testsuite/gcc.dg/vmx/sn7153.c (.../tags/gcc_4_8_2_release)

29081

+++ b/src/gcc/testsuite/gcc.dg/vmx/sn7153.c (.../branches/gcc-4_8-branch)

29082

@@ -34,7 +34,11 @@

29083

29084

void validate_sat()

29085

{

29086

+#ifdef __LITTLE_ENDIAN__

29087

+ if (vec_any_ne(vec_splat(vec_mfvscr(), 0), ((vector unsigned short){1,1,1,1,1,1,1,1})))

29088

+#else

29089

if (vec_any_ne(vec_splat(vec_mfvscr(), 7), ((vector unsigned short){1,1,1,1,1,1,1,1})))

29090

+#endif

29091

{

29092

union {vector unsigned short v; unsigned short s[8];} u;

29093

u.v = vec_mfvscr();

29094

Index: gcc/testsuite/gcc.dg/vmx/stl.c

29095

===================================================================

29096

--- a/src/gcc/testsuite/gcc.dg/vmx/stl.c (.../tags/gcc_4_8_2_release)

29097

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl.c (.../branches/gcc-4_8-branch)

29098

@@ -0,0 +1,67 @@

29099

+#include "harness.h"

29100

+

29101

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

29102

+static signed char svsc[16] __attribute__ ((aligned (16)));

29103

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

29104

+static unsigned short svus[8] __attribute__ ((aligned (16)));

29105

+static signed short svss[8] __attribute__ ((aligned (16)));

29106

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

29107

+static unsigned short svp[8] __attribute__ ((aligned (16)));

29108

+static unsigned int svui[4] __attribute__ ((aligned (16)));

29109

+static signed int svsi[4] __attribute__ ((aligned (16)));

29110

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

29111

+static float svf[4] __attribute__ ((aligned (16)));

29112

+

29113

+static void check_arrays ()

29114

+{

29115

+ unsigned int i;

29116

+ for (i = 0; i < 16; ++i)

29117

+ {

29118

+ check (svuc[i] == i, "svuc");

29119

+ check (svsc[i] == i - 8, "svsc");

29120

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

29121

+ }

29122

+ for (i = 0; i < 8; ++i)

29123

+ {

29124

+ check (svus[i] == i, "svus");

29125

+ check (svss[i] == i - 4, "svss");

29126

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

29127

+ check (svp[i] == i, "svp");

29128

+ }

29129

+ for (i = 0; i < 4; ++i)

29130

+ {

29131

+ check (svui[i] == i, "svui");

29132

+ check (svsi[i] == i - 2, "svsi");

29133

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

29134

+ check (svf[i] == i * 1.0f, "svf");

29135

+ }

29136

+}

29137

+

29138

+static void test ()

29139

+{

29140

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29141

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29142

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

29143

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

29144

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

29145

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

29146

+ vector pixel vp = {0,1,2,3,4,5,6,7};

29147

+ vector unsigned int vui = {0,1,2,3};

29148

+ vector signed int vsi = {-2,-1,0,1};

29149

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

29150

+ vector float vf = {0.0,1.0,2.0,3.0};

29151

+

29152

+ vec_stl (vuc, 0, (vector unsigned char *)svuc);

29153

+ vec_stl (vsc, 0, (vector signed char *)svsc);

29154

+ vec_stl (vbc, 0, (vector bool char *)svbc);

29155

+ vec_stl (vus, 0, (vector unsigned short *)svus);

29156

+ vec_stl (vss, 0, (vector signed short *)svss);

29157

+ vec_stl (vbs, 0, (vector bool short *)svbs);

29158

+ vec_stl (vp, 0, (vector pixel *)svp);

29159

+ vec_stl (vui, 0, (vector unsigned int *)svui);

29160

+ vec_stl (vsi, 0, (vector signed int *)svsi);

29161

+ vec_stl (vbi, 0, (vector bool int *)svbi);

29162

+ vec_stl (vf, 0, (vector float *)svf);

29163

+

29164

+ check_arrays ();

29165

+}

29166

Index: gcc/testsuite/gcc.dg/vmx/st-vsx.c

29167

===================================================================

29168

--- a/src/gcc/testsuite/gcc.dg/vmx/st-vsx.c (.../tags/gcc_4_8_2_release)

29169

+++ b/src/gcc/testsuite/gcc.dg/vmx/st-vsx.c (.../branches/gcc-4_8-branch)

29170

@@ -0,0 +1,29 @@

29171

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29172

+/* { dg-require-effective-target powerpc_vsx_ok } */

29173

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

29174

+

29175

+#include "harness.h"

29176

+

29177

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

29178

+static double svd[2] __attribute__ ((aligned (16)));

29179

+

29180

+static void check_arrays ()

29181

+{

29182

+ unsigned int i;

29183

+ for (i = 0; i < 2; ++i)

29184

+ {

29185

+ check (svul[i] == i, "svul");

29186

+ check (svd[i] == i * 1.0, "svd");

29187

+ }

29188

+}

29189

+

29190

+static void test ()

29191

+{

29192

+ vector unsigned long long vul = {0,1};

29193

+ vector double vd = {0.0,1.0};

29194

+

29195

+ vec_st (vul, 0, (vector unsigned long long *)svul);

29196

+ vec_st (vd, 0, (vector double *)svd);

29197

+

29198

+ check_arrays ();

29199

+}

29200

Index: gcc/testsuite/gcc.dg/vmx/sum2s.c

29201

===================================================================

29202

--- a/src/gcc/testsuite/gcc.dg/vmx/sum2s.c (.../tags/gcc_4_8_2_release)

29203

+++ b/src/gcc/testsuite/gcc.dg/vmx/sum2s.c (.../branches/gcc-4_8-branch)

29204

@@ -0,0 +1,13 @@

29205

+#include "harness.h"

29206

+

29207

+static void test()

29208

+{

29209

+ vector signed int vsia = {-10,1,2,3};

29210

+ vector signed int vsib = {100,101,102,-103};

29211

+ vector signed int vsir;

29212

+ vector signed int vsier = {0,92,0,-98};

29213

+

29214

+ vsir = vec_sum2s (vsia, vsib);

29215

+

29216

+ check (vec_all_eq (vsir, vsier), "vsir");

29217

+}

29218

Index: gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c

29219

===================================================================

29220

--- a/src/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c (.../tags/gcc_4_8_2_release)

29221

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c (.../branches/gcc-4_8-branch)

29222

@@ -0,0 +1,84 @@

29223

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29224

+/* { dg-require-effective-target powerpc_vsx_ok } */

29225

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

29226

+

29227

+#include "harness.h"

29228

+

29229

+static int vec_long_long_eq (vector long long x, vector long long y)

29230

+{

29231

+ return (x[0] == y[0] && x[1] == y[1]);

29232

+}

29233

+

29234

+static int vec_double_eq (vector double x, vector double y)

29235

+{

29236

+ return (x[0] == y[0] && x[1] == y[1]);

29237

+}

29238

+

29239

+static void test()

29240

+{

29241

+ /* Input vectors. */

29242

+ vector long long vla = {-2,-1};

29243

+ vector long long vlb = {0,1};

29244

+ vector double vda = {-2.0,-1.0};

29245

+ vector double vdb = {0.0,1.0};

29246

+ vector unsigned int vuia = {0,1,2,3};

29247

+ vector unsigned int vuib = {4,5,6,7};

29248

+ vector signed int vsia = {-4,-3,-2,-1};

29249

+ vector signed int vsib = {0,1,2,3};

29250

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

29251

+ vector float vfb = {0.0,1.0,2.0,3.0};

29252

+

29253

+ /* Result vectors. */

29254

+ vector long long vlh, vll;

29255

+ vector double vdh, vdl;

29256

+ vector unsigned int vuih, vuil;

29257

+ vector signed int vsih, vsil;

29258

+ vector float vfh, vfl;

29259

+

29260

+ /* Expected result vectors. */

29261

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29262

+ vector long long vlrh = {1,-1};

29263

+ vector long long vlrl = {0,-2};

29264

+ vector double vdrh = {1.0,-1.0};

29265

+ vector double vdrl = {0.0,-2.0};

29266

+ vector unsigned int vuirh = {6,2,7,3};

29267

+ vector unsigned int vuirl = {4,0,5,1};

29268

+ vector signed int vsirh = {2,-2,3,-1};

29269

+ vector signed int vsirl = {0,-4,1,-3};

29270

+ vector float vfrh = {2.0,-2.0,3.0,-1.0};

29271

+ vector float vfrl = {0.0,-4.0,1.0,-3.0};

29272

+#else

29273

+ vector long long vlrh = {-2,0};

29274

+ vector long long vlrl = {-1,1};

29275

+ vector double vdrh = {-2.0,0.0};

29276

+ vector double vdrl = {-1.0,1.0};

29277

+ vector unsigned int vuirh = {0,4,1,5};

29278

+ vector unsigned int vuirl = {2,6,3,7};

29279

+ vector signed int vsirh = {-4,0,-3,1};

29280

+ vector signed int vsirl = {-2,2,-1,3};

29281

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

29282

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

29283

+#endif

29284

+

29285

+ vlh = vec_mergeh (vla, vlb);

29286

+ vll = vec_mergel (vla, vlb);

29287

+ vdh = vec_mergeh (vda, vdb);

29288

+ vdl = vec_mergel (vda, vdb);

29289

+ vuih = vec_mergeh (vuia, vuib);

29290

+ vuil = vec_mergel (vuia, vuib);

29291

+ vsih = vec_mergeh (vsia, vsib);

29292

+ vsil = vec_mergel (vsia, vsib);

29293

+ vfh = vec_mergeh (vfa, vfb );

29294

+ vfl = vec_mergel (vfa, vfb );

29295

+

29296

+ check (vec_long_long_eq (vlh, vlrh), "vlh");

29297

+ check (vec_long_long_eq (vll, vlrl), "vll");

29298

+ check (vec_double_eq (vdh, vdrh), "vdh" );

29299

+ check (vec_double_eq (vdl, vdrl), "vdl" );

29300

+ check (vec_all_eq (vuih, vuirh), "vuih");

29301

+ check (vec_all_eq (vuil, vuirl), "vuil");

29302

+ check (vec_all_eq (vsih, vsirh), "vsih");

29303

+ check (vec_all_eq (vsil, vsirl), "vsil");

29304

+ check (vec_all_eq (vfh, vfrh), "vfh");

29305

+ check (vec_all_eq (vfl, vfrl), "vfl");

29306

+}

29307

Index: gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c

29308

===================================================================

29309

--- a/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c (.../tags/gcc_4_8_2_release)

29310

+++ b/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c (.../branches/gcc-4_8-branch)

29311

@@ -0,0 +1,64 @@

29312

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

29313

+

29314

+#include "harness.h"

29315

+

29316

+static void test()

29317

+{

29318

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29319

+ vector unsigned char vucb = {2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3};

29320

+ vector signed char vsca = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29321

+ vector signed char vscb = {2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3};

29322

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

29323

+ vector unsigned short vusb = {2,3,2,3,2,3,2,3};

29324

+ vector signed short vssa = {-4,-3,-2,-1,0,1,2,3};

29325

+ vector signed short vssb = {2,-3,2,-3,2,-3,2,-3};

29326

+ vector unsigned short vuse, vuso;

29327

+ vector signed short vsse, vsso;

29328

+ vector unsigned int vuie, vuio;

29329

+ vector signed int vsie, vsio;

29330

+

29331

+ vuse = vec_mule (vuca, vucb);

29332

+ vuso = vec_mulo (vuca, vucb);

29333

+ vsse = vec_mule (vsca, vscb);

29334

+ vsso = vec_mulo (vsca, vscb);

29335

+ vuie = vec_mule (vusa, vusb);

29336

+ vuio = vec_mulo (vusa, vusb);

29337

+ vsie = vec_mule (vssa, vssb);

29338

+ vsio = vec_mulo (vssa, vssb);

29339

+

29340

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29341

+ check (vec_all_eq (vuse,

29342

+ ((vector unsigned short){3,9,15,21,27,33,39,45})),

29343

+ "vuse");

29344

+ check (vec_all_eq (vuso,

29345

+ ((vector unsigned short){0,4,8,12,16,20,24,28})),

29346

+ "vuso");

29347

+ check (vec_all_eq (vsse,

29348

+ ((vector signed short){21,15,9,3,-3,-9,-15,-21})),

29349

+ "vsse");

29350

+ check (vec_all_eq (vsso,

29351

+ ((vector signed short){-16,-12,-8,-4,0,4,8,12})),

29352

+ "vsso");

29353

+ check (vec_all_eq (vuie, ((vector unsigned int){3,9,15,21})), "vuie");

29354

+ check (vec_all_eq (vuio, ((vector unsigned int){0,4,8,12})), "vuio");

29355

+ check (vec_all_eq (vsie, ((vector signed int){9,3,-3,-9})), "vsie");

29356

+ check (vec_all_eq (vsio, ((vector signed int){-8,-4,0,4})), "vsio");

29357

+#else

29358

+ check (vec_all_eq (vuse,

29359

+ ((vector unsigned short){0,4,8,12,16,20,24,28})),

29360

+ "vuse");

29361

+ check (vec_all_eq (vuso,

29362

+ ((vector unsigned short){3,9,15,21,27,33,39,45})),

29363

+ "vuso");

29364

+ check (vec_all_eq (vsse,

29365

+ ((vector signed short){-16,-12,-8,-4,0,4,8,12})),

29366

+ "vsse");

29367

+ check (vec_all_eq (vsso,

29368

+ ((vector signed short){21,15,9,3,-3,-9,-15,-21})),

29369

+ "vsso");

29370

+ check (vec_all_eq (vuie, ((vector unsigned int){0,4,8,12})), "vuie");

29371

+ check (vec_all_eq (vuio, ((vector unsigned int){3,9,15,21})), "vuio");

29372

+ check (vec_all_eq (vsie, ((vector signed int){-8,-4,0,4})), "vsie");

29373

+ check (vec_all_eq (vsio, ((vector signed int){9,3,-3,-9})), "vsio");

29374

+#endif

29375

+}

29376

Index: gcc/testsuite/gcc.dg/vmx/insert-vsx.c

29377

===================================================================

29378

--- a/src/gcc/testsuite/gcc.dg/vmx/insert-vsx.c (.../tags/gcc_4_8_2_release)

29379

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert-vsx.c (.../branches/gcc-4_8-branch)

29380

@@ -0,0 +1,28 @@

29381

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29382

+/* { dg-require-effective-target powerpc_vsx_ok } */

29383

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

29384

+

29385

+#include "harness.h"

29386

+

29387

+static int vec_long_long_eq (vector long long x, vector long long y)

29388

+{

29389

+ return (x[0] == y[0] && x[1] == y[1]);

29390

+}

29391

+

29392

+static int vec_dbl_eq (vector double x, vector double y)

29393

+{

29394

+ return (x[0] == y[0] && x[1] == y[1]);

29395

+}

29396

+

29397

+static void test()

29398

+{

29399

+ vector long long vl = {0, 1};

29400

+ vector double vd = {0.0, 1.0};

29401

+ vector long long vlr = vec_insert (2, vl, 0);

29402

+ vector double vdr = vec_insert (2.0, vd, 1);

29403

+ vector long long vler = {2, 1};

29404

+ vector double vder = {0.0, 2.0};

29405

+

29406

+ check (vec_long_long_eq (vlr, vler), "vl");

29407

+ check (vec_dbl_eq (vdr, vder), "vd");

29408

+}

29409

Index: gcc/testsuite/gcc.dg/vmx/vsums-be-order.c

29410

===================================================================

29411

--- a/src/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c (.../tags/gcc_4_8_2_release)

29412

+++ b/src/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c (.../branches/gcc-4_8-branch)

29413

@@ -0,0 +1,20 @@

29414

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

29415

+

29416

+#include "harness.h"

29417

+

29418

+static void test()

29419

+{

29420

+ vector signed int va = {-7,11,-13,17};

29421

+

29422

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29423

+ vector signed int vb = {128,0,0,0};

29424

+ vector signed int evd = {136,0,0,0};

29425

+#else

29426

+ vector signed int vb = {0,0,0,128};

29427

+ vector signed int evd = {0,0,0,136};

29428

+#endif

29429

+

29430

+ vector signed int vd = vec_sums (va, vb);

29431

+

29432

+ check (vec_all_eq (vd, evd), "sums");

29433

+}

29434

Index: gcc/testsuite/gcc.dg/vmx/ldl-vsx.c

29435

===================================================================

29436

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c (.../tags/gcc_4_8_2_release)

29437

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c (.../branches/gcc-4_8-branch)

29438

@@ -0,0 +1,39 @@

29439

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29440

+/* { dg-require-effective-target powerpc_vsx_ok } */

29441

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

29442

+

29443

+#include "harness.h"

29444

+

29445

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

29446

+static double svd[2] __attribute__ ((aligned (16)));

29447

+

29448

+static void init ()

29449

+{

29450

+ unsigned int i;

29451

+ for (i = 0; i < 2; ++i)

29452

+ {

29453

+ svul[i] = i;

29454

+ svd[i] = i * 1.0;

29455

+ }

29456

+}

29457

+

29458

+static void test ()

29459

+{

29460

+ vector unsigned long long evul = {0,1};

29461

+ vector double evd = {0.0,1.0};

29462

+

29463

+ vector unsigned long long vul;

29464

+ vector double vd;

29465

+ unsigned i;

29466

+

29467

+ init ();

29468

+

29469

+ vul = vec_ldl (0, (vector unsigned long long *)svul);

29470

+ vd = vec_ldl (0, (vector double *)svd);

29471

+

29472

+ for (i = 0; i < 2; ++i)

29473

+ {

29474

+ check (vul[i] == evul[i], "vul");

29475

+ check (vd[i] == evd[i], "vd" );

29476

+ }

29477

+}

29478

Index: gcc/testsuite/gcc.dg/vmx/ste.c

29479

===================================================================

29480

--- a/src/gcc/testsuite/gcc.dg/vmx/ste.c (.../tags/gcc_4_8_2_release)

29481

+++ b/src/gcc/testsuite/gcc.dg/vmx/ste.c (.../branches/gcc-4_8-branch)

29482

@@ -0,0 +1,41 @@

29483

+#include "harness.h"

29484

+

29485

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

29486

+static signed char svsc[16] __attribute__ ((aligned (16)));

29487

+static unsigned short svus[8] __attribute__ ((aligned (16)));

29488

+static signed short svss[8] __attribute__ ((aligned (16)));

29489

+static unsigned int svui[4] __attribute__ ((aligned (16)));

29490

+static signed int svsi[4] __attribute__ ((aligned (16)));

29491

+static float svf[4] __attribute__ ((aligned (16)));

29492

+

29493

+static void check_arrays ()

29494

+{

29495

+ check (svuc[9] == 9, "svuc");

29496

+ check (svsc[14] == 6, "svsc");

29497

+ check (svus[7] == 7, "svus");

29498

+ check (svss[1] == -3, "svss");

29499

+ check (svui[3] == 3, "svui");

29500

+ check (svsi[2] == 0, "svsi");

29501

+ check (svf[0] == 0.0, "svf");

29502

+}

29503

+

29504

+static void test ()

29505

+{

29506

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29507

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29508

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

29509

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

29510

+ vector unsigned int vui = {0,1,2,3};

29511

+ vector signed int vsi = {-2,-1,0,1};

29512

+ vector float vf = {0.0,1.0,2.0,3.0};

29513

+

29514

+ vec_ste (vuc, 9*1, (unsigned char *)svuc);

29515

+ vec_ste (vsc, 14*1, (signed char *)svsc);

29516

+ vec_ste (vus, 7*2, (unsigned short *)svus);

29517

+ vec_ste (vss, 1*2, (signed short *)svss);

29518

+ vec_ste (vui, 3*4, (unsigned int *)svui);

29519

+ vec_ste (vsi, 2*4, (signed int *)svsi);

29520

+ vec_ste (vf, 0*4, (float *)svf);

29521

+

29522

+ check_arrays ();

29523

+}

29524

Index: gcc/testsuite/gcc.dg/vmx/lde-be-order.c

29525

===================================================================

29526

--- a/src/gcc/testsuite/gcc.dg/vmx/lde-be-order.c (.../tags/gcc_4_8_2_release)

29527

+++ b/src/gcc/testsuite/gcc.dg/vmx/lde-be-order.c (.../branches/gcc-4_8-branch)

29528

@@ -0,0 +1,73 @@

29529

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

29530

+

29531

+#include "harness.h"

29532

+

29533

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

29534

+static signed char svsc[16] __attribute__ ((aligned (16)));

29535

+static unsigned short svus[8] __attribute__ ((aligned (16)));

29536

+static signed short svss[8] __attribute__ ((aligned (16)));

29537

+static unsigned int svui[4] __attribute__ ((aligned (16)));

29538

+static signed int svsi[4] __attribute__ ((aligned (16)));

29539

+static float svf[4] __attribute__ ((aligned (16)));

29540

+

29541

+static void init ()

29542

+{

29543

+ int i;

29544

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29545

+ for (i = 15; i >= 0; --i)

29546

+#else

29547

+ for (i = 0; i < 16; ++i)

29548

+#endif

29549

+ {

29550

+ svuc[i] = i;

29551

+ svsc[i] = i - 8;

29552

+ }

29553

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29554

+ for (i = 7; i >= 0; --i)

29555

+#else

29556

+ for (i = 0; i < 8; ++i)

29557

+#endif

29558

+ {

29559

+ svus[i] = i;

29560

+ svss[i] = i - 4;

29561

+ }

29562

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29563

+ for (i = 3; i >= 0; --i)

29564

+#else

29565

+ for (i = 0; i < 4; ++i)

29566

+#endif

29567

+ {

29568

+ svui[i] = i;

29569

+ svsi[i] = i - 2;

29570

+ svf[i] = i * 1.0f;

29571

+ }

29572

+}

29573

+

29574

+static void test ()

29575

+{

29576

+ vector unsigned char vuc;

29577

+ vector signed char vsc;

29578

+ vector unsigned short vus;

29579

+ vector signed short vss;

29580

+ vector unsigned int vui;

29581

+ vector signed int vsi;

29582

+ vector float vf;

29583

+

29584

+ init ();

29585

+

29586

+ vuc = vec_lde (9*1, (unsigned char *)svuc);

29587

+ vsc = vec_lde (14*1, (signed char *)svsc);

29588

+ vus = vec_lde (7*2, (unsigned short *)svus);

29589

+ vss = vec_lde (1*2, (signed short *)svss);

29590

+ vui = vec_lde (3*4, (unsigned int *)svui);

29591

+ vsi = vec_lde (2*4, (signed int *)svsi);

29592

+ vf = vec_lde (0*4, (float *)svf);

29593

+

29594

+ check (vec_extract (vuc, 9) == 9, "vuc");

29595

+ check (vec_extract (vsc, 14) == 6, "vsc");

29596

+ check (vec_extract (vus, 7) == 7, "vus");

29597

+ check (vec_extract (vss, 1) == -3, "vss");

29598

+ check (vec_extract (vui, 3) == 3, "vui");

29599

+ check (vec_extract (vsi, 2) == 0, "vsi");

29600

+ check (vec_extract (vf, 0) == 0.0, "vf");

29601

+}

29602

Index: gcc/testsuite/gcc.dg/vmx/splat-vsx.c

29603

===================================================================

29604

--- a/src/gcc/testsuite/gcc.dg/vmx/splat-vsx.c (.../tags/gcc_4_8_2_release)

29605

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat-vsx.c (.../branches/gcc-4_8-branch)

29606

@@ -0,0 +1,31 @@

29607

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29608

+/* { dg-require-effective-target powerpc_vsx_ok } */

29609

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

29610

+

29611

+#include "harness.h"

29612

+

29613

+static void test()

29614

+{

29615

+ /* Input vectors. */

29616

+ vector unsigned int vui = {0,1,2,3};

29617

+ vector signed int vsi = {-2,-1,0,1};

29618

+ vector float vf = {-2.0,-1.0,0.0,1.0};

29619

+

29620

+ /* Result vectors. */

29621

+ vector unsigned int vuir;

29622

+ vector signed int vsir;

29623

+ vector float vfr;

29624

+

29625

+ /* Expected result vectors. */

29626

+ vector unsigned int vuier = {2,2,2,2};

29627

+ vector signed int vsier = {1,1,1,1};

29628

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

29629

+

29630

+ vuir = vec_splat (vui, 2);

29631

+ vsir = vec_splat (vsi, 3);

29632

+ vfr = vec_splat (vf, 1);

29633

+

29634

+ check (vec_all_eq (vuir, vuier), "vui");

29635

+ check (vec_all_eq (vsir, vsier), "vsi");

29636

+ check (vec_all_eq (vfr, vfer ), "vf");

29637

+}

29638

Index: gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c

29639

===================================================================

29640

--- a/src/gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c (.../tags/gcc_4_8_2_release)

29641

+++ b/src/gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c (.../branches/gcc-4_8-branch)

29642

@@ -0,0 +1,19 @@

29643

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

29644

+

29645

+#include "harness.h"

29646

+

29647

+static void test()

29648

+{

29649

+ vector signed int vsia = {-10,1,2,3};

29650

+ vector signed int vsib = {100,101,102,-103};

29651

+ vector signed int vsir;

29652

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29653

+ vector signed int vsier = {91,0,107,0};

29654

+#else

29655

+ vector signed int vsier = {0,92,0,-98};

29656

+#endif

29657

+

29658

+ vsir = vec_sum2s (vsia, vsib);

29659

+

29660

+ check (vec_all_eq (vsir, vsier), "vsir");

29661

+}

29662

Index: gcc/testsuite/gcc.dg/vmx/merge-vsx.c

29663

===================================================================

29664

--- a/src/gcc/testsuite/gcc.dg/vmx/merge-vsx.c (.../tags/gcc_4_8_2_release)

29665

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge-vsx.c (.../branches/gcc-4_8-branch)

29666

@@ -0,0 +1,71 @@

29667

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29668

+/* { dg-require-effective-target powerpc_vsx_ok } */

29669

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

29670

+

29671

+#include "harness.h"

29672

+

29673

+static int vec_long_long_eq (vector long long x, vector long long y)

29674

+{

29675

+ return (x[0] == y[0] && x[1] == y[1]);

29676

+}

29677

+

29678

+static int vec_double_eq (vector double x, vector double y)

29679

+{

29680

+ return (x[0] == y[0] && x[1] == y[1]);

29681

+}

29682

+

29683

+static void test()

29684

+{

29685

+ /* Input vectors. */

29686

+ vector long long vla = {-2,-1};

29687

+ vector long long vlb = {0,1};

29688

+ vector double vda = {-2.0,-1.0};

29689

+ vector double vdb = {0.0,1.0};

29690

+ vector unsigned int vuia = {0,1,2,3};

29691

+ vector unsigned int vuib = {4,5,6,7};

29692

+ vector signed int vsia = {-4,-3,-2,-1};

29693

+ vector signed int vsib = {0,1,2,3};

29694

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

29695

+ vector float vfb = {0.0,1.0,2.0,3.0};

29696

+

29697

+ /* Result vectors. */

29698

+ vector long long vlh, vll;

29699

+ vector double vdh, vdl;

29700

+ vector unsigned int vuih, vuil;

29701

+ vector signed int vsih, vsil;

29702

+ vector float vfh, vfl;

29703

+

29704

+ /* Expected result vectors. */

29705

+ vector long long vlrh = {-2,0};

29706

+ vector long long vlrl = {-1,1};

29707

+ vector double vdrh = {-2.0,0.0};

29708

+ vector double vdrl = {-1.0,1.0};

29709

+ vector unsigned int vuirh = {0,4,1,5};

29710

+ vector unsigned int vuirl = {2,6,3,7};

29711

+ vector signed int vsirh = {-4,0,-3,1};

29712

+ vector signed int vsirl = {-2,2,-1,3};

29713

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

29714

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

29715

+

29716

+ vlh = vec_mergeh (vla, vlb);

29717

+ vll = vec_mergel (vla, vlb);

29718

+ vdh = vec_mergeh (vda, vdb);

29719

+ vdl = vec_mergel (vda, vdb);

29720

+ vuih = vec_mergeh (vuia, vuib);

29721

+ vuil = vec_mergel (vuia, vuib);

29722

+ vsih = vec_mergeh (vsia, vsib);

29723

+ vsil = vec_mergel (vsia, vsib);

29724

+ vfh = vec_mergeh (vfa, vfb );

29725

+ vfl = vec_mergel (vfa, vfb );

29726

+

29727

+ check (vec_long_long_eq (vlh, vlrh), "vlh");

29728

+ check (vec_long_long_eq (vll, vlrl), "vll");

29729

+ check (vec_double_eq (vdh, vdrh), "vdh" );

29730

+ check (vec_double_eq (vdl, vdrl), "vdl" );

29731

+ check (vec_all_eq (vuih, vuirh), "vuih");

29732

+ check (vec_all_eq (vuil, vuirl), "vuil");

29733

+ check (vec_all_eq (vsih, vsirh), "vsih");

29734

+ check (vec_all_eq (vsil, vsirl), "vsil");

29735

+ check (vec_all_eq (vfh, vfrh), "vfh");

29736

+ check (vec_all_eq (vfl, vfrl), "vfl");

29737

+}

29738

Index: gcc/testsuite/gcc.dg/vmx/stl-vsx.c

29739

===================================================================

29740

--- a/src/gcc/testsuite/gcc.dg/vmx/stl-vsx.c (.../tags/gcc_4_8_2_release)

29741

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl-vsx.c (.../branches/gcc-4_8-branch)

29742

@@ -0,0 +1,29 @@

29743

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29744

+/* { dg-require-effective-target powerpc_vsx_ok } */

29745

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

29746

+

29747

+#include "harness.h"

29748

+

29749

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

29750

+static double svd[2] __attribute__ ((aligned (16)));

29751

+

29752

+static void check_arrays ()

29753

+{

29754

+ unsigned int i;

29755

+ for (i = 0; i < 2; ++i)

29756

+ {

29757

+ check (svul[i] == i, "svul");

29758

+ check (svd[i] == i * 1.0, "svd");

29759

+ }

29760

+}

29761

+

29762

+static void test ()

29763

+{

29764

+ vector unsigned long long vul = {0,1};

29765

+ vector double vd = {0.0,1.0};

29766

+

29767

+ vec_stl (vul, 0, (vector unsigned long long *)svul);

29768

+ vec_stl (vd, 0, (vector double *)svd);

29769

+

29770

+ check_arrays ();

29771

+}

29772

Index: gcc/testsuite/gcc.dg/strlenopt-4gf.c

29773

===================================================================

29774

--- a/src/gcc/testsuite/gcc.dg/strlenopt-4gf.c (.../tags/gcc_4_8_2_release)

29775

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-4gf.c (.../branches/gcc-4_8-branch)

29776

@@ -7,13 +7,13 @@

29777

#include "strlenopt-4.c"

29778

29779

/* { dg-final { scan-tree-dump-times "strlen \\(" 1 "strlen" } } */

29780

-/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 4 "strlen" } } */

29781

-/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 1 "strlen" } } */

29782

+/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 0 "strlen" } } */

29783

+/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 0 "strlen" } } */

29784

/* { dg-final { scan-tree-dump-times "__strcat_chk \\(" 0 "strlen" } } */

29785

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

29786

-/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 5 "strlen" } } */

29787

-/* { dg-final { scan-tree-dump-times "memcpy \\(" 0 "strlen" } } */

29788

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */

29789

+/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 0 "strlen" } } */

29790

+/* { dg-final { scan-tree-dump-times "memcpy \\(" 4 "strlen" } } */

29791

+/* { dg-final { scan-tree-dump-times "strcpy \\(" 1 "strlen" } } */

29792

/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */

29793

-/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

29794

+/* { dg-final { scan-tree-dump-times "stpcpy \\(" 5 "strlen" } } */

29795

/* { dg-final { cleanup-tree-dump "strlen" } } */

29796

Index: gcc/testsuite/gcc.dg/pr59351.c

29797

===================================================================

29798

--- a/src/gcc/testsuite/gcc.dg/pr59351.c (.../tags/gcc_4_8_2_release)

29799

+++ b/src/gcc/testsuite/gcc.dg/pr59351.c (.../branches/gcc-4_8-branch)

29800

@@ -0,0 +1,8 @@

29801

+/* { dg-do compile } */

29802

+/* { dg-options "-std=c99 -Wpedantic" } */

29803

+

29804

+unsigned int

29805

+foo (void)

29806

+{

29807

+ return sizeof ((int[]) {}); /* { dg-warning "ISO C forbids empty initializer braces" } */

29808

+}

29809

Index: gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c

29810

===================================================================

29811

--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c (.../tags/gcc_4_8_2_release)

29812

+++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c (.../branches/gcc-4_8-branch)

29813

@@ -0,0 +1,7 @@

29814

+/* Test to make sure the macro info includes the predefined macros with line number 0. */

29815

+/* { dg-do compile } */

29816

+/* { dg-options "-g3 -gdwarf-2 -dA -fverbose-asm" } */

29817

+/* { dg-final { scan-assembler "At line number 0" } } */

29818

+

29819

+#define FOO 1

29820

+int i;

29821

Index: gcc/testsuite/gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c

29822

===================================================================

29823

--- a/src/gcc/testsuite/gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c (.../tags/gcc_4_8_2_release)

29824

+++ b/src/gcc/testsuite/gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c (.../branches/gcc-4_8-branch)

29825

@@ -1,6 +1,7 @@

29826

/* { dg-do compile } */

29827

/* { dg-options "-O2 -Wall" } */

29828

/* { dg-options "-O2 -Wall -mabi=altivec" { target { { powerpc*-*-linux* } && ilp32 } } } */

29829

+/* { dg-options "-O2 -Wall -msse2" { target { i?86-*-* x86_64-*-* } } } */

29830

29831

typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));

29832

29833

Index: gcc/testsuite/gcc.dg/builtin-object-size-8.c

29834

===================================================================

29835

--- a/src/gcc/testsuite/gcc.dg/builtin-object-size-8.c (.../tags/gcc_4_8_2_release)

29836

+++ b/src/gcc/testsuite/gcc.dg/builtin-object-size-8.c (.../branches/gcc-4_8-branch)

29837

@@ -1,4 +1,4 @@

29838

-/* { dg-do run { xfail *-*-* } } */

29839

+/* { dg-do run } */

29840

/* { dg-options "-O2" } */

29841

29842

typedef __SIZE_TYPE__ size_t;

29843

Index: gcc/testsuite/gcc.dg/20050922-2.c

29844

===================================================================

29845

--- a/src/gcc/testsuite/gcc.dg/20050922-2.c (.../tags/gcc_4_8_2_release)

29846

+++ b/src/gcc/testsuite/gcc.dg/20050922-2.c (.../branches/gcc-4_8-branch)

29847

@@ -4,7 +4,8 @@

29848

/* { dg-do run } */

29849

/* { dg-options "-O1 -std=c99" } */

29850

29851

-#include <stdlib.h>

29852

+extern void abort (void);

29853

+extern void exit (int);

29854

29855

#if __INT_MAX__ == 2147483647

29856

typedef unsigned int uint32_t;

29857

Index: gcc/testsuite/gcc.dg/graphite/pr60740.c

29858

===================================================================

29859

--- a/src/gcc/testsuite/gcc.dg/graphite/pr60740.c (.../tags/gcc_4_8_2_release)

29860

+++ b/src/gcc/testsuite/gcc.dg/graphite/pr60740.c (.../branches/gcc-4_8-branch)

29861

@@ -0,0 +1,16 @@

29862

+/* { dg-options "-O2 -floop-interchange" } */

29863

+

29864

+int **db6 = 0;

29865

+

29866

+void

29867

+k26(void)

29868

+{

29869

+ static int geb = 0;

29870

+ int *a22 = &geb;

29871

+ int **l30 = &a22;

29872

+ int *c4b;

29873

+ int ndf;

29874

+ for (ndf = 0; ndf <= 1; ++ndf)

29875

+ *c4b = (db6 == l30) && (*a22)--;

29876

+}

29877

+

29878

Index: gcc/testsuite/gcc.dg/pr59860.c

29879

===================================================================

29880

--- a/src/gcc/testsuite/gcc.dg/pr59860.c (.../tags/gcc_4_8_2_release)

29881

+++ b/src/gcc/testsuite/gcc.dg/pr59860.c (.../branches/gcc-4_8-branch)

29882

@@ -0,0 +1,15 @@

29883

+/* { dg-do compile } */

29884

+/* { dg-options "-O" } */

29885

+

29886

+extern __inline __attribute__ ((__always_inline__)) __attribute__ ((__gnu_inline__)) __attribute__ ((__artificial__)) char * __attribute__ ((__nothrow__ , __leaf__))

29887

+strcat (char *__restrict __dest, const char *__restrict __src)

29888

+{

29889

+ return __builtin___strcat_chk (__dest, __src, __builtin_object_size (__dest, 2 > 1));

29890

+}

29891

+static char raw_decode;

29892

+void foo (char **argv, char *outfilename)

29893

+{

29894

+ if (**argv == 'r')

29895

+ raw_decode = 1;

29896

+ strcat (outfilename, raw_decode ? ".raw" : ".wav");

29897

+}

29898

Index: gcc/testsuite/gcc.dg/stack-usage-1.c

29899

===================================================================

29900

--- a/src/gcc/testsuite/gcc.dg/stack-usage-1.c (.../tags/gcc_4_8_2_release)

29901

+++ b/src/gcc/testsuite/gcc.dg/stack-usage-1.c (.../branches/gcc-4_8-branch)

29902

@@ -38,7 +38,11 @@

29903

# endif

29904

#elif defined (__powerpc64__) || defined (__ppc64__) || defined (__POWERPC64__) \

29905

|| defined (__PPC64__)

29906

-# define SIZE 180

29907

+# if _CALL_ELF == 2

29908

+# define SIZE 208

29909

+# else

29910

+# define SIZE 180

29911

+# endif

29912

#elif defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) \

29913

|| defined (__POWERPC__) || defined (PPC) || defined (_IBMR2)

29914

# if defined (__ALTIVEC__)

29915

Index: gcc/testsuite/gcc.dg/pr59011.c

29916

===================================================================

29917

--- a/src/gcc/testsuite/gcc.dg/pr59011.c (.../tags/gcc_4_8_2_release)

29918

+++ b/src/gcc/testsuite/gcc.dg/pr59011.c (.../branches/gcc-4_8-branch)

29919

@@ -0,0 +1,22 @@

29920

+/* PR middle-end/59011 */

29921

+/* { dg-do compile } */

29922

+/* { dg-options "-std=gnu99" } */

29923

+

29924

+void

29925

+foo (int m)

29926

+{

29927

+ int a[m];

29928

+ void

29929

+ bar (void)

29930

+ {

29931

+ {

29932

+ int

29933

+ baz (void)

29934

+ {

29935

+ return a[0];

29936

+ }

29937

+ }

29938

+ a[0] = 42;

29939

+ }

29940

+ bar ();

29941

+}

29942

Index: gcc/testsuite/gcc.dg/pr58805.c

29943

===================================================================

29944

--- a/src/gcc/testsuite/gcc.dg/pr58805.c (.../tags/gcc_4_8_2_release)

29945

+++ b/src/gcc/testsuite/gcc.dg/pr58805.c (.../branches/gcc-4_8-branch)

29946

@@ -0,0 +1,24 @@

29947

+/* { dg-do compile } */

29948

+/* { dg-options "-O2 -ftree-tail-merge -fdump-tree-pre" } */

29949

+

29950

+/* Type that matches the 'p' constraint. */

29951

+#define TYPE void *

29952

+

29953

+static inline

29954

+void bar (TYPE *r)

29955

+{

29956

+ TYPE t;

29957

+ __asm__ ("" : "=&p" (t), "=p" (*r));

29958

+}

29959

+

29960

+void

29961

+foo (int n, TYPE *x, TYPE *y)

29962

+{

29963

+ if (n == 0)

29964

+ bar (x);

29965

+ else

29966

+ bar (y);

29967

+}

29968

+

29969

+/* { dg-final { scan-tree-dump-times "__asm__" 2 "pre"} } */

29970

+/* { dg-final { cleanup-tree-dump "pre" } } */

29971

Index: gcc/testsuite/gcc.dg/strlenopt-14gf.c

29972

===================================================================

29973

--- a/src/gcc/testsuite/gcc.dg/strlenopt-14gf.c (.../tags/gcc_4_8_2_release)

29974

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-14gf.c (.../branches/gcc-4_8-branch)

29975

@@ -11,14 +11,14 @@

29976

memcpy. */

29977

/* { dg-final { scan-tree-dump-times "strlen \\(" 4 "strlen" } } */

29978

/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 0 "strlen" } } */

29979

-/* { dg-final { scan-tree-dump-times "__mempcpy_chk \\(" 2 "strlen" } } */

29980

+/* { dg-final { scan-tree-dump-times "__mempcpy_chk \\(" 0 "strlen" } } */

29981

/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 0 "strlen" } } */

29982

/* { dg-final { scan-tree-dump-times "__strcat_chk \\(" 0 "strlen" } } */

29983

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

29984

-/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 3 "strlen" } } */

29985

-/* { dg-final { scan-tree-dump-times "memcpy \\(" 0 "strlen" } } */

29986

-/* { dg-final { scan-tree-dump-times "mempcpy \\(" 0 "strlen" } } */

29987

+/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 0 "strlen" } } */

29988

+/* { dg-final { scan-tree-dump-times "memcpy \\(" 1 "strlen" } } */

29989

+/* { dg-final { scan-tree-dump-times "mempcpy \\(" 2 "strlen" } } */

29990

/* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */

29991

/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */

29992

-/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

29993

+/* { dg-final { scan-tree-dump-times "stpcpy \\(" 2 "strlen" } } */

29994

/* { dg-final { cleanup-tree-dump "strlen" } } */

29995

Index: gcc/testsuite/gcc.dg/torture/pr57425-2.c

29996

===================================================================

29997

--- a/src/gcc/testsuite/gcc.dg/torture/pr57425-2.c (.../tags/gcc_4_8_2_release)

29998

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57425-2.c (.../branches/gcc-4_8-branch)

29999

@@ -0,0 +1,31 @@

30000

+/* { dg-do run } */

30001

+

30002

+extern void abort (void) __attribute__((noreturn));

30003

+

30004

+int

30005

+main ()

30006

+{

30007

+ int sum = 0;

30008

+ {

30009

+ int a[20];

30010

+ int *c;

30011

+ c = a;

30012

+ asm ("": "=r" (c):"0" (c));

30013

+ *c = 0;

30014

+ asm ("": "=r" (c):"0" (c));

30015

+ sum += *c;

30016

+ }

30017

+ {

30018

+ long b[10];

30019

+ long *c;

30020

+ c = b;

30021

+ asm ("": "=r" (c):"0" (c));

30022

+ *c = 1;

30023

+ asm ("": "=r" (c):"0" (c));

30024

+ sum += *c;

30025

+ }

30026

+

30027

+ if (sum != 1)

30028

+ abort();

30029

+ return 0;

30030

+}

30031

Index: gcc/testsuite/gcc.dg/torture/pr57425-3.c

30032

===================================================================

30033

--- a/src/gcc/testsuite/gcc.dg/torture/pr57425-3.c (.../tags/gcc_4_8_2_release)

30034

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57425-3.c (.../branches/gcc-4_8-branch)

30035

@@ -0,0 +1,31 @@

30036

+/* { dg-do run } */

30037

+

30038

+extern void abort (void) __attribute__((noreturn));

30039

+

30040

+int

30041

+main ()

30042

+{

30043

+ int sum = 0;

30044

+ {

30045

+ long a[20];

30046

+ long *c;

30047

+ c = a;

30048

+ asm ("": "=r" (c):"0" (c));

30049

+ *c = 0;

30050

+ asm ("": "=r" (c):"0" (c));

30051

+ sum += *c;

30052

+ }

30053

+ {

30054

+ long long b[10];

30055

+ long long *c;

30056

+ c = b;

30057

+ asm ("": "=r" (c):"0" (c));

30058

+ *c = 1;

30059

+ asm ("": "=r" (c):"0" (c));

30060

+ sum += *c;

30061

+ }

30062

+

30063

+ if (sum != 1)

30064

+ abort();

30065

+ return 0;

30066

+}

30067

Index: gcc/testsuite/gcc.dg/torture/pr59047.c

30068

===================================================================

30069

--- a/src/gcc/testsuite/gcc.dg/torture/pr59047.c (.../tags/gcc_4_8_2_release)

30070

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59047.c (.../branches/gcc-4_8-branch)

30071

@@ -0,0 +1,39 @@

30072

+/* { dg-do run } */

30073

+

30074

+extern void abort (void);

30075

+

30076

+struct

30077

+{

30078

+ int f0;

30079

+ int f1:1;

30080

+ int f2:2;

30081

+} a = {0, 0, 1};

30082

+

30083

+int b, c, *d, e, f;

30084

+

30085

+int

30086

+fn1 ()

30087

+{

30088

+ for (; b < 1; ++b)

30089

+ {

30090

+ for (e = 0; e < 1; e = 1)

30091

+ {

30092

+ int **g = &d;

30093

+ *g = &c;

30094

+ }

30095

+ *d = 0;

30096

+ f = a.f1;

30097

+ if (f)

30098

+ return 0;

30099

+ }

30100

+ return 0;

30101

+}

30102

+

30103

+int

30104

+main ()

30105

+{

30106

+ fn1 ();

30107

+ if (b != 1)

30108

+ abort ();

30109

+ return 0;

30110

+}

30111

Index: gcc/testsuite/gcc.dg/torture/pr58956.c

30112

===================================================================

30113

--- a/src/gcc/testsuite/gcc.dg/torture/pr58956.c (.../tags/gcc_4_8_2_release)

30114

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58956.c (.../branches/gcc-4_8-branch)

30115

@@ -0,0 +1,30 @@

30116

+/* { dg-do run } */

30117

+

30118

+extern void abort (void);

30119

+

30120

+struct S

30121

+{

30122

+ int f0;

30123

+} a = {1}, b, g, *c = &b, **f = &c;

30124

+

30125

+int *d, **e = &d, h;

30126

+

30127

+struct S

30128

+foo ()

30129

+{

30130

+ *e = &h;

30131

+ if (!d)

30132

+ __builtin_unreachable ();

30133

+ *f = &g;

30134

+ return a;

30135

+}

30136

+

30137

+int

30138

+main ()

30139

+{

30140

+ struct S *i = c;

30141

+ *i = foo ();

30142

+ if (b.f0 != 1)

30143

+ abort ();

30144

+ return 0;

30145

+}

30146

Index: gcc/testsuite/gcc.dg/torture/pr60183.c

30147

===================================================================

30148

--- a/src/gcc/testsuite/gcc.dg/torture/pr60183.c (.../tags/gcc_4_8_2_release)

30149

+++ b/src/gcc/testsuite/gcc.dg/torture/pr60183.c (.../branches/gcc-4_8-branch)

30150

@@ -0,0 +1,38 @@

30151

+/* { dg-do run } */

30152

+

30153

+/* Large so an out-of-bound read will crash. */

30154

+unsigned char c[0x30001] = { 1 };

30155

+int j = 2;

30156

+

30157

+static void

30158

+foo (unsigned long *x, unsigned char *y)

30159

+{

30160

+ int i;

30161

+ unsigned long w = x[0];

30162

+ for (i = 0; i < j; i++)

30163

+ {

30164

+ w += *y;

30165

+ y += 0x10000;

30166

+ w += *y;

30167

+ y += 0x10000;

30168

+ }

30169

+ x[1] = w;

30170

+}

30171

+

30172

+__attribute__ ((noinline, noclone)) void

30173

+bar (unsigned long *x)

30174

+{

30175

+ foo (x, c);

30176

+}

30177

+

30178

+int

30179

+main ()

30180

+{

30181

+ unsigned long a[2] = { 0, -1UL };

30182

+ asm volatile (""::"r" (c):"memory");

30183

+ c[0] = 0;

30184

+ bar (a);

30185

+ if (a[1] != 0)

30186

+ __builtin_abort ();

30187

+ return 0;

30188

+}

30189

Index: gcc/testsuite/gcc.dg/torture/pr57517.c

30190

===================================================================

30191

--- a/src/gcc/testsuite/gcc.dg/torture/pr57517.c (.../tags/gcc_4_8_2_release)

30192

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57517.c (.../branches/gcc-4_8-branch)

30193

@@ -0,0 +1,16 @@

30194

+/* { dg-do compile } */

30195

+

30196

+int x[1024], y[1024], z[1024], w[1024];

30197

+void foo (void)

30198

+{

30199

+ int i;

30200

+ for (i = 1; i < 1024; ++i)

30201

+ {

30202

+ int a = x[i];

30203

+ int b = y[i];

30204

+ int c = x[i-1];

30205

+ int d = y[i-1];

30206

+ if (w[i])

30207

+ z[i] = (a + b) + (c + d);

30208

+ }

30209

+}

30210

Index: gcc/testsuite/gcc.dg/torture/pr59891.c

30211

===================================================================

30212

--- a/src/gcc/testsuite/gcc.dg/torture/pr59891.c (.../tags/gcc_4_8_2_release)

30213

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59891.c (.../branches/gcc-4_8-branch)

30214

@@ -0,0 +1,9 @@

30215

+/* PR c/59891 */

30216

+

30217

+unsigned int a;

30218

+

30219

+int

30220

+main ()

30221

+{

30222

+ return (0 ? a : 0) ? : 0 % 0; /* { dg-warning "division by zero" } */

30223

+}

30224

Index: gcc/testsuite/gcc.dg/torture/pr59164.c

30225

===================================================================

30226

--- a/src/gcc/testsuite/gcc.dg/torture/pr59164.c (.../tags/gcc_4_8_2_release)

30227

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59164.c (.../branches/gcc-4_8-branch)

30228

@@ -0,0 +1,21 @@

30229

+/* { dg-do compile } */

30230

+

30231

+int a, d, e;

30232

+long b[10];

30233

+int c[10][8];

30234

+

30235

+int fn1(p1)

30236

+{

30237

+ return 1 >> p1;

30238

+}

30239

+

30240

+void fn2(void)

30241

+{

30242

+ int f;

30243

+ for (a=1; a <= 4; a++)

30244

+ {

30245

+ f = fn1(0 < c[a][0]);

30246

+ if (f || d)

30247

+ e = b[a] = 1;

30248

+ }

30249

+}

30250

Index: gcc/testsuite/gcc.dg/torture/pr58779.c

30251

===================================================================

30252

--- a/src/gcc/testsuite/gcc.dg/torture/pr58779.c (.../tags/gcc_4_8_2_release)

30253

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58779.c (.../branches/gcc-4_8-branch)

30254

@@ -0,0 +1,12 @@

30255

+/* { dg-do run } */

30256

+

30257

+int a, c;

30258

+

30259

+int main ()

30260

+{

30261

+ int e = -1;

30262

+ short d = (c <= 0) ^ e;

30263

+ if ((unsigned int) a - (a || d) <= (unsigned int) a)

30264

+ __builtin_abort ();

30265

+ return 0;

30266

+}

30267

Index: gcc/testsuite/gcc.dg/torture/pr59139.c

30268

===================================================================

30269

--- a/src/gcc/testsuite/gcc.dg/torture/pr59139.c (.../tags/gcc_4_8_2_release)

30270

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59139.c (.../branches/gcc-4_8-branch)

30271

@@ -0,0 +1,20 @@

30272

+/* { dg-do compile } */

30273

+

30274

+int a, b, c, d, e;

30275

+int fn1(p1, p2) { return p2 == 0 ? p1 : 1 % p2; }

30276

+

30277

+void fn2()

30278

+{

30279

+ c = 0;

30280

+ for (;; c = (unsigned short)c)

30281

+ {

30282

+ b = 2;

30283

+ for (; b; b = a)

30284

+ {

30285

+ e = fn1(2, c && 1);

30286

+ d = c == 0 ? e : c;

30287

+ if (d)

30288

+ return;

30289

+ }

30290

+ }

30291

+}

30292

Index: gcc/testsuite/gcc.dg/torture/pr58079.c

30293

===================================================================

30294

--- a/src/gcc/testsuite/gcc.dg/torture/pr58079.c (.../tags/gcc_4_8_2_release)

30295

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58079.c (.../branches/gcc-4_8-branch)

30296

@@ -0,0 +1,107 @@

30297

+/* { dg-options "-mlong-calls" { target mips*-*-* } } */

30298

+

30299

+typedef unsigned char u8;

30300

+typedef unsigned short u16;

30301

+typedef unsigned int __kernel_size_t;

30302

+typedef __kernel_size_t size_t;

30303

+struct list_head {

30304

+ struct list_head *next;

30305

+};

30306

+

30307

+struct dmx_ts_feed {

30308

+ int is_filtering;

30309

+};

30310

+struct dmx_section_feed {

30311

+ u16 secbufp;

30312

+ u16 seclen;

30313

+ u16 tsfeedp;

30314

+};

30315

+

30316

+typedef int (*dmx_ts_cb) (

30317

+ const u8 * buffer1,

30318

+ size_t buffer1_length,

30319

+ const u8 * buffer2,

30320

+ size_t buffer2_length

30321

+);

30322

+

30323

+struct dvb_demux_feed {

30324

+ union {

30325

+ struct dmx_ts_feed ts;

30326

+ struct dmx_section_feed sec;

30327

+ } feed;

30328

+ union {

30329

+ dmx_ts_cb ts;

30330

+ } cb;

30331

+ int type;

30332

+ u16 pid;

30333

+ int ts_type;

30334

+ struct list_head list_head;

30335

+};

30336

+

30337

+struct dvb_demux {

30338

+ int (*stop_feed)(struct dvb_demux_feed *feed);

30339

+ struct list_head feed_list;

30340

+};

30341

+

30342

+

30343

+static

30344

+inline

30345

+__attribute__((always_inline))

30346

+u8

30347

+payload(const u8 *tsp)

30348

+{

30349

+ if (tsp[3] & 0x20) {

30350

+ return 184 - 1 - tsp[4];

30351

+ }

30352

+ return 184;

30353

+}

30354

+

30355

+static

30356

+inline

30357

+__attribute__((always_inline))

30358

+int

30359

+dvb_dmx_swfilter_payload(struct dvb_demux_feed *feed, const u8 *buf)

30360

+{

30361

+ int count = payload(buf);

30362

+ int p;

30363

+ if (count == 0)

30364

+ return -1;

30365

+ return feed->cb.ts(&buf[p], count, ((void *)0), 0);

30366

+}

30367

+

30368

+static

30369

+inline

30370

+__attribute__((always_inline))

30371

+void

30372

+dvb_dmx_swfilter_packet_type(struct dvb_demux_feed *feed, const u8 *buf)

30373

+{

30374

+ switch (feed->type) {

30375

+ case 0:

30376

+ if (feed->ts_type & 1) {

30377

+ dvb_dmx_swfilter_payload(feed, buf);

30378

+ }

30379

+ if (dvb_dmx_swfilter_section_packet(feed, buf) < 0)

30380

+ feed->feed.sec.seclen = feed->feed.sec.secbufp = 0;

30381

+ }

30382

+}

30383

+

30384

+static

30385

+void

30386

+dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf)

30387

+{

30388

+ struct dvb_demux_feed *feed;

30389

+ int dvr_done = 0;

30390

+

30391

+ for (feed = ({ const typeof( ((typeof(*feed) *)0)->list_head ) *__mptr = ((&demux->feed_list)->next); (typeof(*feed) *)( (char *)__mptr - __builtin_offsetof(typeof(*feed),list_head) );}); __builtin_prefetch(feed->list_head.next), &feed->list_head != (&demux->feed_list); feed = ({ const typeof( ((typeof(*feed) *)0)->list_head ) *__mptr = (feed->list_head.next); (typeof(*feed) *)( (char *)__mptr - __builtin_offsetof(typeof(*feed),list_head) );})) {

30392

+ if (((((feed)->type == 0) && ((feed)->feed.ts.is_filtering) && (((feed)->ts_type & (1 | 8)) == 1))) && (dvr_done++))

30393

+ dvb_dmx_swfilter_packet_type(feed, buf);

30394

+ else if (feed->pid == 0x2000)

30395

+ feed->cb.ts(buf, 188, ((void *)0), 0);

30396

+ }

30397

+}

30398

+void dvb_dmx_swfilter_packets(struct dvb_demux *demux, const u8 *buf, size_t count)

30399

+{

30400

+ while (count--) {

30401

+ dvb_dmx_swfilter_packet(demux, buf);

30402

+ }

30403

+}

30404

Index: gcc/testsuite/gcc.dg/torture/pr58830.c

30405

===================================================================

30406

--- a/src/gcc/testsuite/gcc.dg/torture/pr58830.c (.../tags/gcc_4_8_2_release)

30407

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58830.c (.../branches/gcc-4_8-branch)

30408

@@ -0,0 +1,42 @@

30409

+/* { dg-do run } */

30410

+/* { dg-additional-options "-ftree-pre -ftree-partial-pre" } */

30411

+

30412

+extern void abort (void);

30413

+

30414

+int b, c, d, f, g, h, i, j[6], *l = &b, *m, n, *o, r;

30415

+char k;

30416

+

30417

+static int

30418

+foo ()

30419

+{

30420

+ char *p = &k;

30421

+

30422

+ for (; d; d++)

30423

+ if (i)

30424

+ h = 0;

30425

+ else

30426

+ h = c || (r = 0);

30427

+

30428

+ for (f = 0; f < 2; f++)

30429

+ {

30430

+ unsigned int q;

30431

+ *l = 0;

30432

+ if (n)

30433

+ *m = g;

30434

+ if (g)

30435

+ o = 0;

30436

+ for (q = -8; q >= 5; q++)

30437

+ (*p)--;

30438

+ }

30439

+

30440

+ return 0;

30441

+}

30442

+

30443

+int

30444

+main ()

30445

+{

30446

+ foo ();

30447

+ if (j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[0]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]] ^ (k & 15)] != 0)

30448

+ abort ();

30449

+ return 0;

30450

+}

30451

Index: gcc/testsuite/gcc.dg/torture/pr59715.c

30452

===================================================================

30453

--- a/src/gcc/testsuite/gcc.dg/torture/pr59715.c (.../tags/gcc_4_8_2_release)

30454

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59715.c (.../branches/gcc-4_8-branch)

30455

@@ -0,0 +1,21 @@

30456

+/* { dg-do run } */

30457

+

30458

+extern void abort (void);

30459

+

30460

+int a = 2, b;

30461

+

30462

+int

30463

+main ()

30464

+{

30465

+ int c;

30466

+ if (!b)

30467

+ {

30468

+ b = a;

30469

+ c = a == 0 ? 1 : 1 % a;

30470

+ if (c)

30471

+ b = 0;

30472

+ }

30473

+ if (b != 0)

30474

+ abort ();

30475

+ return 0;

30476

+}

30477

Index: gcc/testsuite/gcc.dg/torture/pr60115.c

30478

===================================================================

30479

--- a/src/gcc/testsuite/gcc.dg/torture/pr60115.c (.../tags/gcc_4_8_2_release)

30480

+++ b/src/gcc/testsuite/gcc.dg/torture/pr60115.c (.../branches/gcc-4_8-branch)

30481

@@ -0,0 +1,14 @@

30482

+/* { dg-do run } */

30483

+

30484

+int a, b[2];

30485

+

30486

+int

30487

+main ()

30488

+{

30489

+lbl:

30490

+ for (; a; a--)

30491

+ if (b[10000])

30492

+ goto lbl;

30493

+

30494

+ return 0;

30495

+}

30496

Index: gcc/testsuite/gcc.dg/torture/pr59903.c

30497

===================================================================

30498

--- a/src/gcc/testsuite/gcc.dg/torture/pr59903.c (.../tags/gcc_4_8_2_release)

30499

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59903.c (.../branches/gcc-4_8-branch)

30500

@@ -0,0 +1,56 @@

30501

+/* { dg-do compile } */

30502

+

30503

+int a, b, c, d, e, f, g, h, i[3], l, m, n, o, p, q, r;

30504

+

30505

+struct S0

30506

+{

30507

+ int f0;

30508

+ int f1;

30509

+ int f2;

30510

+ int f3;

30511

+} j;

30512

+

30513

+static int

30514

+fn1 (int p1)

30515

+{

30516

+ return p1 || ((p1 > 0) > (e << 1));

30517

+}

30518

+

30519

+static struct S0

30520

+fn2 (struct S0 p1)

30521

+{

30522

+ char s;

30523

+ struct S0 t = {0,0,0,0};

30524

+ int u = 2;

30525

+ for (;;)

30526

+ {

30527

+ if (i[0])

30528

+ break;

30529

+ for (m = 0; m < 4; m++)

30530

+ for (p1.f0 = 0; p1.f0 < 3; p1.f0++)

30531

+ {

30532

+ j = t;

30533

+ t.f3 = i[p1.f0];

30534

+ o = b || 1 >> b ? 0 : a < 0;

30535

+ q = 1 % d;

30536

+ if ((g < fn1 ((1 ^ (q & 1)) | n)) ^ u)

30537

+ j.f3 |= p % 2;

30538

+ s = j.f3 > 0 ? j.f3 : j.f3 << 1;

30539

+ r = l = s && p1.f1 * c;

30540

+ h = p1.f1;

30541

+ }

30542

+ }

30543

+ return p1;

30544

+}

30545

+

30546

+int

30547

+main ()

30548

+{

30549

+ for (;f;)

30550

+ {

30551

+ struct S0 v = {0,0,0,0};

30552

+ fn2 (v);

30553

+ j.f3 = 0;

30554

+ }

30555

+ return 0;

30556

+}

30557

Index: gcc/testsuite/gcc.dg/torture/pr58143-1.c

30558

===================================================================

30559

--- a/src/gcc/testsuite/gcc.dg/torture/pr58143-1.c (.../tags/gcc_4_8_2_release)

30560

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58143-1.c (.../branches/gcc-4_8-branch)

30561

@@ -0,0 +1,51 @@

30562

+/* { dg-do run } */

30563

+/* { dg-additional-options "-fstrict-overflow" } */

30564

+

30565

+extern void abort (void);

30566

+

30567

+int a, b, c, d, e, f, g, h = 1, i;

30568

+

30569

+int foo (int p)

30570

+{

30571

+ return p < 0 && a < - __INT_MAX__ - 1 - p ? 0 : 1;

30572

+}

30573

+

30574

+int *bar ()

30575

+{

30576

+ int j;

30577

+ i = h ? 0 : 1 % h;

30578

+ for (j = 0; j < 1; j++)

30579

+ for (d = 0; d; d++)

30580

+ for (e = 1; e;)

30581

+ return 0;

30582

+ return 0;

30583

+}

30584

+

30585

+int baz ()

30586

+{

30587

+ for (; b >= 0; b--)

30588

+ for (c = 1; c >= 0; c--)

30589

+ {

30590

+ int *k = &c;

30591

+ for (;;)

30592

+ {

30593

+ for (f = 0; f < 1; f++)

30594

+ {

30595

+ g = foo (*k);

30596

+ bar ();

30597

+ }

30598

+ if (*k)

30599

+ break;

30600

+ return 0;

30601

+ }

30602

+ }

30603

+ return 0;

30604

+}

30605

+

30606

+int main ()

30607

+{

30608

+ baz ();

30609

+ if (b != 0)

30610

+ abort ();

30611

+ return 0;

30612

+}

30613

Index: gcc/testsuite/gcc.dg/torture/pr58143-2.c

30614

===================================================================

30615

--- a/src/gcc/testsuite/gcc.dg/torture/pr58143-2.c (.../tags/gcc_4_8_2_release)

30616

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58143-2.c (.../branches/gcc-4_8-branch)

30617

@@ -0,0 +1,34 @@

30618

+/* { dg-do run } */

30619

+/* { dg-additional-options "-fstrict-overflow" } */

30620

+

30621

+int a, b, d, e, f, *g, h, i;

30622

+volatile int c;

30623

+

30624

+char foo (unsigned char p)

30625

+{

30626

+ return p + 1;

30627

+}

30628

+

30629

+int bar ()

30630

+{

30631

+ for (h = 0; h < 3; h = foo (h))

30632

+ {

30633

+ c;

30634

+ for (f = 0; f < 1; f++)

30635

+ {

30636

+ i = a && 0 < -__INT_MAX__ - h ? 0 : 1;

30637

+ if (e)

30638

+ for (; d;)

30639

+ b = 0;

30640

+ else

30641

+ g = 0;

30642

+ }

30643

+ }

30644

+ return 0;

30645

+}

30646

+

30647

+int main ()

30648

+{

30649

+ bar ();

30650

+ return 0;

30651

+}

30652

Index: gcc/testsuite/gcc.dg/torture/pr58941.c

30653

===================================================================

30654

--- a/src/gcc/testsuite/gcc.dg/torture/pr58941.c (.../tags/gcc_4_8_2_release)

30655

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58941.c (.../branches/gcc-4_8-branch)

30656

@@ -0,0 +1,33 @@

30657

+/* { dg-do run } */

30658

+

30659

+extern void abort (void);

30660

+

30661

+typedef struct {

30662

+ int msgLength;

30663

+ unsigned char data[1000];

30664

+} SMsg;

30665

+

30666

+typedef struct {

30667

+ int dummy;

30668

+ int d[0];

30669

+} SData;

30670

+

30671

+int condition = 3;

30672

+

30673

+int main()

30674

+{

30675

+ SMsg msg;

30676

+ SData *pData = (SData*)(msg.data);

30677

+ unsigned int i = 0;

30678

+ for (i = 0; i < 1; i++)

30679

+ {

30680

+ pData->d[i] = 0;

30681

+ if(condition & 1)

30682

+ pData->d[i] |= 0x55;

30683

+ if(condition & 2)

30684

+ pData->d[i] |= 0xaa;

30685

+ }

30686

+ if (pData->d[0] != 0xff)

30687

+ abort ();

30688

+ return 0;

30689

+}

30690

Index: gcc/testsuite/gcc.dg/torture/pr57488.c

30691

===================================================================

30692

--- a/src/gcc/testsuite/gcc.dg/torture/pr57488.c (.../tags/gcc_4_8_2_release)

30693

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57488.c (.../branches/gcc-4_8-branch)

30694

@@ -0,0 +1,58 @@

30695

+/* { dg-do run } */

30696

+

30697

+extern void abort (void);

30698

+

30699

+int i, j, *pj = &j, **ppj = &pj;

30700

+int x, *px = &x;

30701

+

30702

+short s, *ps = &s, k;

30703

+

30704

+unsigned short u, *pu = &u, **ppu = &pu;

30705

+

30706

+char c, *pc = &c;

30707

+

30708

+unsigned char v = 48;

30709

+

30710

+static int

30711

+bar (int p)

30712

+{

30713

+ p = k;

30714

+ *px = **ppu = i;

30715

+ *ppj = &p;

30716

+ if (**ppj)

30717

+ *pj = p;

30718

+ return p;

30719

+}

30720

+

30721

+void __attribute__((noinline))

30722

+foo ()

30723

+{

30724

+ for (; i <= 3; i++)

30725

+ for (; j; j--);

30726

+

30727

+ u ^= bar (*pj);

30728

+

30729

+ for (k = 1; k >= 0; k--)

30730

+ {

30731

+ int l;

30732

+ bar (0);

30733

+ for (l = 1; l < 5; l++)

30734

+ {

30735

+ int m;

30736

+ for (m = 6; m; m--)

30737

+ {

30738

+ v--;

30739

+ *ps = *pc;

30740

+ }

30741

+ }

30742

+ }

30743

+}

30744

+

30745

+int

30746

+main ()

30747

+{

30748

+ foo ();

30749

+ if (v != 0)

30750

+ abort ();

30751

+ return 0;

30752

+}

30753

Index: gcc/testsuite/gcc.dg/torture/pr57569.c

30754

===================================================================

30755

--- a/src/gcc/testsuite/gcc.dg/torture/pr57569.c (.../tags/gcc_4_8_2_release)

30756

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57569.c (.../branches/gcc-4_8-branch)

30757

@@ -0,0 +1,37 @@

30758

+/* { dg-do run } */

30759

+

30760

+extern void abort (void) __attribute__((noreturn));

30761

+

30762

+struct S { int f0; } a;

30763

+

30764

+int b, e, *d = &b, f;

30765

+

30766

+void

30767

+fn1 ()

30768

+{

30769

+ int **g[9][6];

30770

+ int ***h = &g[6][3];

30771

+ for (; e < 9; e++) {

30772

+ f = 0;

30773

+ for (; f < 6; f++)

30774

+ g[e][f] = &d;

30775

+ }

30776

+ ***h = 0;

30777

+}

30778

+

30779

+void

30780

+fn2 ()

30781

+{

30782

+ fn1 ();

30783

+ struct S c[4][10] = {};

30784

+ a = c[3][9];

30785

+}

30786

+

30787

+int

30788

+main ()

30789

+{

30790

+ fn2 ();

30791

+ if (a.f0 != 0)

30792

+ abort ();

30793

+ return 0;

30794

+}

30795

Index: gcc/testsuite/gcc.dg/torture/pr58143-3.c

30796

===================================================================

30797

--- a/src/gcc/testsuite/gcc.dg/torture/pr58143-3.c (.../tags/gcc_4_8_2_release)

30798

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58143-3.c (.../branches/gcc-4_8-branch)

30799

@@ -0,0 +1,18 @@

30800

+/* { dg-do run } */

30801

+/* { dg-additional-options "-fstrict-overflow" } */

30802

+

30803

+int a, b, c, d, e;

30804

+

30805

+int

30806

+main ()

30807

+{

30808

+ for (b = 4; b > -30; b--)

30809

+ for (; c;)

30810

+ for (;;)

30811

+ {

30812

+ e = a > __INT_MAX__ - b;

30813

+ if (d)

30814

+ break;

30815

+ }

30816

+ return 0;

30817

+}

30818

Index: gcc/testsuite/gcc.dg/torture/pr53922.c

30819

===================================================================

30820

--- a/src/gcc/testsuite/gcc.dg/torture/pr53922.c (.../tags/gcc_4_8_2_release)

30821

+++ b/src/gcc/testsuite/gcc.dg/torture/pr53922.c (.../branches/gcc-4_8-branch)

30822

@@ -3,6 +3,7 @@

30823

/* { dg-skip-if "No undefined" { *-*-mingw* } { "*" } { "" } } */

30824

/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } { "*" } { "" } } */

30825

/* { dg-options "-Wl,-undefined,dynamic_lookup" { target *-*-darwin* } } */

30826

+/* { dg-additional-options "-Wl,-flat_namespace" { target *-*-darwin[89]* } } */

30827

30828

int x(int a)

30829

{

30830

Index: gcc/testsuite/gcc.dg/torture/pr59288.c

30831

===================================================================

30832

--- a/src/gcc/testsuite/gcc.dg/torture/pr59288.c (.../tags/gcc_4_8_2_release)

30833

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59288.c (.../branches/gcc-4_8-branch)

30834

@@ -0,0 +1,9 @@

30835

+/* { dg-do compile } */

30836

+

30837

+void

30838

+baz (int *d)

30839

+{

30840

+ long int i, j, k;

30841

+ for (i = 0, j = 0, k = 0; i < 512; i = (int) i + 1, j = (int) j + 1, k = (int) k + 3)

30842

+ d[i] = j ^ (i * 3) ^ (2 * k + 2);

30843

+}

30844

Index: gcc/testsuite/gcc.dg/torture/pr57425-1.c

30845

===================================================================

30846

--- a/src/gcc/testsuite/gcc.dg/torture/pr57425-1.c (.../tags/gcc_4_8_2_release)

30847

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57425-1.c (.../branches/gcc-4_8-branch)

30848

@@ -0,0 +1,37 @@

30849

+/* { dg-do run } */

30850

+

30851

+extern void abort (void) __attribute__((noreturn));

30852

+

30853

+union setconflict

30854

+{

30855

+ int a[20];

30856

+ long b[10];

30857

+};

30858

+

30859

+int

30860

+main ()

30861

+{

30862

+ int sum = 0;

30863

+ {

30864

+ union setconflict a;

30865

+ int *c;

30866

+ c = a.a;

30867

+ asm ("": "=r" (c):"0" (c));

30868

+ *c = 0;

30869

+ asm ("": "=r" (c):"0" (c));

30870

+ sum += *c;

30871

+ }

30872

+ {

30873

+ union setconflict a;

30874

+ long *c;

30875

+ c = a.b;

30876

+ asm ("": "=r" (c):"0" (c));

30877

+ *c = 1;

30878

+ asm ("": "=r" (c):"0" (c));

30879

+ sum += *c;

30880

+ }

30881

+

30882

+ if (sum != 1)

30883

+ abort();

30884

+ return 0;

30885

+}

30886

Index: gcc/testsuite/gcc.dg/torture/pr59330.c

30887

===================================================================

30888

--- a/src/gcc/testsuite/gcc.dg/torture/pr59330.c (.../tags/gcc_4_8_2_release)

30889

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59330.c (.../branches/gcc-4_8-branch)

30890

@@ -0,0 +1,17 @@

30891

+/* { dg-do run } */

30892

+

30893

+void free(void *ptr)

30894

+{

30895

+}

30896

+

30897

+void *foo(void)

30898

+{

30899

+ return 0;

30900

+}

30901

+

30902

+int main(void)

30903

+{

30904

+ void *p = foo();

30905

+ free(p);

30906

+ return 0;

30907

+}

30908

Index: gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c

30909

===================================================================

30910

--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c (.../tags/gcc_4_8_2_release)

30911

+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c (.../branches/gcc-4_8-branch)

30912

@@ -0,0 +1,14 @@

30913

+/* { dg-do run } */

30914

+/* { dg-options "-O3" } */

30915

+

30916

+int a, c, e[5][2];

30917

+unsigned int d;

30918

+

30919

+int

30920

+main ()

30921

+{

30922

+ for (d = 0; d < 2; d++)

30923

+ if (a ? 0 : e[c + 3][d] & e[c + 4][d])

30924

+ break;

30925

+ return 0;

30926

+}

30927

Index: gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c

30928

===================================================================

30929

--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c (.../tags/gcc_4_8_2_release)

30930

+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c (.../branches/gcc-4_8-branch)

30931

@@ -0,0 +1,18 @@

30932

+/* { dg-do run } */

30933

+/* { dg-options "-O3 -fdump-tree-pcom-details" } */

30934

+

30935

+int b, f, d[5][2];

30936

+unsigned int c;

30937

+

30938

+int

30939

+main ()

30940

+{

30941

+ for (c = 0; c < 2; c++)

30942

+ if (d[b + 3][c] & d[b + 4][c])

30943

+ if (f)

30944

+ break;

30945

+ return 0;

30946

+}

30947

+

30948

+/* { dg-final { scan-tree-dump "Executing predictive commoning" "pcom" } } */

30949

+/* { dg-final { cleanup-tree-dump "pcom" } } */

30950

Index: gcc/testsuite/gcc.dg/tls/pr58595.c

30951

===================================================================

30952

--- a/src/gcc/testsuite/gcc.dg/tls/pr58595.c (.../tags/gcc_4_8_2_release)

30953

+++ b/src/gcc/testsuite/gcc.dg/tls/pr58595.c (.../branches/gcc-4_8-branch)

30954

@@ -0,0 +1,28 @@

30955

+/* PR target/58595 */

30956

+/* { dg-do run } */

30957

+/* { dg-options "-O2" } */

30958

+/* { dg-additional-options "-fpic" { target fpic } } */

30959

+/* { dg-require-effective-target tls } */

30960

+/* { dg-require-effective-target sync_int_long } */

30961

+

30962

+struct S { unsigned long a, b; };

30963

+__thread struct S s;

30964

+void bar (unsigned long *);

30965

+

30966

+__attribute__((noinline)) void

30967

+foo (void)

30968

+{

30969

+ int i;

30970

+ for (i = 0; i < 10; i++)

30971

+ __sync_fetch_and_add (&s.b, 1L);

30972

+}

30973

+

30974

+int

30975

+main ()

30976

+{

30977

+ s.b = 12;

30978

+ foo ();

30979

+ if (s.b != 22)

30980

+ __builtin_abort ();

30981

+ return 0;

30982

+}

30983

Index: gcc/testsuite/gcc.dg/strlenopt-4.c

30984

===================================================================

30985

--- a/src/gcc/testsuite/gcc.dg/strlenopt-4.c (.../tags/gcc_4_8_2_release)

30986

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-4.c (.../branches/gcc-4_8-branch)

30987

@@ -66,16 +66,10 @@

30988

return 0;

30989

}

30990

30991

-/* For targets providing a movstr pattern strcat is already decomposed

30992

- into strlen + strcpy by fold_builtin_strcat. */

30993

-

30994

-/* { dg-final { scan-tree-dump-times "strlen \\(" 3 "strlen" { target { ! s390*-*-* } } } } */

30995

-/* { dg-final { scan-tree-dump-times "strlen \\(" 6 "strlen" { target s390*-*-* } } } */

30996

+/* { dg-final { scan-tree-dump-times "strlen \\(" 3 "strlen" } } */

30997

/* { dg-final { scan-tree-dump-times "memcpy \\(" 4 "strlen" } } */

30998

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 3 "strlen" { target { ! s390*-*-* } } } } */

30999

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 6 "strlen" { target s390*-*-* } } } */

31000

-/* { dg-final { scan-tree-dump-times "strcat \\(" 3 "strlen" { target { ! s390*-*-* } } } } */

31001

-/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" { target s390*-*-* } } } */

31002

+/* { dg-final { scan-tree-dump-times "strcpy \\(" 3 "strlen" } } */

31003

+/* { dg-final { scan-tree-dump-times "strcat \\(" 3 "strlen" } } */

31004

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

31005

/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

31006

/* { dg-final { cleanup-tree-dump "strlen" } } */

31007

Index: gcc/testsuite/gcc.dg/pr56824.c

31008

===================================================================

31009

--- a/src/gcc/testsuite/gcc.dg/pr56824.c (.../tags/gcc_4_8_2_release)

31010

+++ b/src/gcc/testsuite/gcc.dg/pr56824.c (.../branches/gcc-4_8-branch)

31011

@@ -0,0 +1,18 @@

31012

+/* PR preprocessor/56824 */

31013

+/* { dg-do compile } */

31014

+/* { dg-options "-Waggregate-return" } */

31015

+

31016

+struct S { int i; };

31017

+struct S foo (void);

31018

+

31019

+#pragma GCC diagnostic push

31020

+#pragma GCC diagnostic ignored "-Waggregate-return"

31021

+

31022

+int

31023

+main ()

31024

+{

31025

+ foo ();

31026

+ return 0;

31027

+}

31028

+

31029

+#pragma GCC diagnostic pop

31030

Index: gcc/testsuite/gcc.dg/ipa/pr55260.c

31031

===================================================================

31032

--- a/src/gcc/testsuite/gcc.dg/ipa/pr55260.c (.../tags/gcc_4_8_2_release)

31033

+++ b/src/gcc/testsuite/gcc.dg/ipa/pr55260.c (.../branches/gcc-4_8-branch)

31034

@@ -0,0 +1,38 @@

31035

+/* { dg-do compile } */

31036

+/* { dg-options "-O2 -fno-inline -fipa-cp-clone" } */

31037

+

31038

+typedef struct {

31039

+ int *ptr;

31040

+ int len;

31041

+} string;

31042

+typedef struct {

31043

+ string nantstr;

31044

+ int *nant;

31045

+} malv;

31046

+typedef struct {

31047

+ int *nor;

31048

+} list_heads;

31049

+int b;

31050

+list_heads *fn1(string, int *, unsigned);

31051

+void fn2(malv *p1, list_heads *p2, unsigned p3) {

31052

+ string a = p1->nantstr;

31053

+ fn1(a, p1->nant, p3);

31054

+}

31055

+

31056

+void fn3(unsigned p1) { fn2(0, 0, p1); }

31057

+

31058

+list_heads *fn1(string p1, int *p2, unsigned p3) {

31059

+ while (1) {

31060

+ if (p3)

31061

+ fn3(1);

31062

+ if (b)

31063

+ return 0;

31064

+ fn3(1);

31065

+ }

31066

+}

31067

+

31068

+void fn5() {

31069

+ list_heads c;

31070

+ c.nor = 0;

31071

+ fn2(0, &c, 1);

31072

+}

31073

Index: gcc/testsuite/gcc.dg/ipa/pr59610.c

31074

===================================================================

31075

--- a/src/gcc/testsuite/gcc.dg/ipa/pr59610.c (.../tags/gcc_4_8_2_release)

31076

+++ b/src/gcc/testsuite/gcc.dg/ipa/pr59610.c (.../branches/gcc-4_8-branch)

31077

@@ -0,0 +1,11 @@

31078

+/* { dg-do compile } */

31079

+/* { dg-options "-O2" } */

31080

+

31081

+struct A { int a; };

31082

+extern void *y;

31083

+

31084

+__attribute__((optimize (0))) void

31085

+foo (void *p, struct A x)

31086

+{

31087

+ foo (y, x);

31088

+}

31089

Index: gcc/testsuite/gcc.dg/pr60485-1.c

31090

===================================================================

31091

--- a/src/gcc/testsuite/gcc.dg/pr60485-1.c (.../tags/gcc_4_8_2_release)

31092

+++ b/src/gcc/testsuite/gcc.dg/pr60485-1.c (.../branches/gcc-4_8-branch)

31093

@@ -0,0 +1,29 @@

31094

+/* { dg-do run } */

31095

+/* { dg-options "-O2" } */

31096

+

31097

+extern void abort (void);

31098

+struct S {

31099

+ int *i[4];

31100

+ int *p1;

31101

+ int *p2;

31102

+ int *p3;

31103

+ int *p4;

31104

+};

31105

+int **b;

31106

+int main()

31107

+{

31108

+ int i = 1;

31109

+ struct S s;

31110

+ s.p3 = &i;

31111

+ int **p;

31112

+ if (b)

31113

+ p = b;

31114

+ else

31115

+ p = &s.i[2];

31116

+ p += 4;

31117

+ if (!b)

31118

+ **p = 0;

31119

+ if (i != 0)

31120

+ abort ();

31121

+ return i;

31122

+}

31123

Index: gcc/testsuite/gcc.dg/strlenopt-1f.c

31124

===================================================================

31125

--- a/src/gcc/testsuite/gcc.dg/strlenopt-1f.c (.../tags/gcc_4_8_2_release)

31126

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-1f.c (.../branches/gcc-4_8-branch)

31127

@@ -6,13 +6,13 @@

31128

#include "strlenopt-1.c"

31129

31130

/* { dg-final { scan-tree-dump-times "strlen \\(" 2 "strlen" } } */

31131

-/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 3 "strlen" } } */

31132

-/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 1 "strlen" } } */

31133

+/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 0 "strlen" } } */

31134

+/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 0 "strlen" } } */

31135

/* { dg-final { scan-tree-dump-times "__strcat_chk \\(" 0 "strlen" } } */

31136

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

31137

/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 0 "strlen" } } */

31138

-/* { dg-final { scan-tree-dump-times "memcpy \\(" 0 "strlen" } } */

31139

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */

31140

+/* { dg-final { scan-tree-dump-times "memcpy \\(" 3 "strlen" } } */

31141

+/* { dg-final { scan-tree-dump-times "strcpy \\(" 1 "strlen" } } */

31142

/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */

31143

/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

31144

/* { dg-final { cleanup-tree-dump "strlen" } } */

31145

Index: gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c

31146

===================================================================

31147

--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c (.../tags/gcc_4_8_2_release)

31148

+++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c (.../branches/gcc-4_8-branch)

31149

@@ -1,4 +1,5 @@

31150

/* { dg-require-effective-target vect_int } */

31151

+/* { dg-skip-if "cost too high" { powerpc*le-*-* } { "*" } { "" } } */

31152

31153

#include <stdarg.h>

31154

#include "../../tree-vect.h"

31155

Index: gcc/testsuite/gcc.dg/vect/pr60382.c

31156

===================================================================

31157

--- a/src/gcc/testsuite/gcc.dg/vect/pr60382.c (.../tags/gcc_4_8_2_release)

31158

+++ b/src/gcc/testsuite/gcc.dg/vect/pr60382.c (.../branches/gcc-4_8-branch)

31159

@@ -0,0 +1,32 @@

31160

+#include "tree-vect.h"

31161

+

31162

+int a, b, c, e, f;

31163

+

31164

+void

31165

+foo ()

31166

+{

31167

+ for (b = 0; b < 3; b++)

31168

+ if (e)

31169

+ {

31170

+ for (c = 0; c < 4; c++)

31171

+ {

31172

+ if (b)

31173

+ continue;

31174

+ f = 1;

31175

+ for (a = 0; a < 2; a++)

31176

+ f |= 1;

31177

+ }

31178

+ for (;;)

31179

+ ;

31180

+ }

31181

+}

31182

+

31183

+int

31184

+main ()

31185

+{

31186

+ check_vect ();

31187

+ foo ();

31188

+ return 0;

31189

+}

31190

+

31191

+/* { dg-final { cleanup-tree-dump "vect" } } */

31192

Index: gcc/testsuite/gcc.dg/vect/pr60276.c

31193

===================================================================

31194

--- a/src/gcc/testsuite/gcc.dg/vect/pr60276.c (.../tags/gcc_4_8_2_release)

31195

+++ b/src/gcc/testsuite/gcc.dg/vect/pr60276.c (.../branches/gcc-4_8-branch)

31196

@@ -0,0 +1,52 @@

31197

+/* { dg-do run } */

31198

+

31199

+extern void abort (void);

31200

+

31201

+static void

31202

+foo (int *out, const int *lp, unsigned samples)

31203

+{

31204

+ int x, target;

31205

+ for (x = 0, target = 0; x < (int)samples; x += 2, target++)

31206

+ {

31207

+ out[x] = lp[target];

31208

+ out[x - 1] = out[x - 2] + out[x];

31209

+ }

31210

+}

31211

+

31212

+static void

31213

+foo_novec (int *out, const int *lp, unsigned samples)

31214

+{

31215

+ int x, target;

31216

+ for (x = 0, target = 0; x < (int)samples; x += 2, target++)

31217

+ {

31218

+ out[x] = lp[target];

31219

+ out[x - 1] = out[x - 2] + out[x];

31220

+ __asm__ volatile ("" : : : "memory");

31221

+ }

31222

+}

31223

+

31224

+int main(void)

31225

+{

31226

+ const int lp[25] = {

31227

+ 0, 2, 4, 6, 8,

31228

+ 10, 12, 14, 16,

31229

+ 18, 20, 22, 24,

31230

+ 26, 28, 30, 32,

31231

+ 34, 36, 38, 40,

31232

+ 42, 44, 46, 48,

31233

+ };

31234

+ int out[49] = {0};

31235

+ int out2[49] = {0};

31236

+ int s;

31237

+

31238

+ foo (out + 2, lp + 1, 48);

31239

+ foo_novec (out2 + 2, lp + 1, 48);

31240

+

31241

+ for (s = 0; s < 49; s++)

31242

+ if (out[s] != out2[s])

31243

+ abort ();

31244

+

31245

+ return 0;

31246

+}

31247

+

31248

+/* { dg-final { cleanup-tree-dump "vect" } } */

31249

Index: gcc/testsuite/gcc.dg/pr53060.c

31250

===================================================================

31251

--- a/src/gcc/testsuite/gcc.dg/pr53060.c (.../tags/gcc_4_8_2_release)

31252

+++ b/src/gcc/testsuite/gcc.dg/pr53060.c (.../branches/gcc-4_8-branch)

31253

@@ -25,3 +25,4 @@

31254

31255

/* Ignore a warning that is irrelevant to the purpose of this test. */

31256

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

31257

+/* { dg-prune-output "changes the ABI" } */

31258

Index: gcc/testsuite/ChangeLog

31259

===================================================================

31260

--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_8_2_release)

31261

+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_8-branch)

31262

@@ -1,3 +1,1717 @@

31263

+2014-04-23 Michael Meissner <meissner@linux.vnet.ibm.com>

31264

+

31265

+ Back port from main line:

31266

+ 2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>

31267

+

31268

+ * gcc.target/powerpc/p8vector-vbpermq.c: New test to test the

31269

+ vbpermq builtin.

31270

+

31271

+2014-04-23 Uros Bizjak <ubizjak@gmail.com>

31272

+

31273

+ Backport from mainline

31274

+ 2014-04-21 Uros Bizjak <ubizjak@gmail.com>

31275

+

31276

+ PR target/60909

31277

+ * gcc.target/i386/pr60909-1.c: New test.

31278

+ * gcc.target/i386/pr60909-2.c: Ditto.

31279

+

31280

+2014-04-23 Richard Biener <rguenther@suse.de>

31281

+

31282

+ Backport from mainline

31283

+ 2014-04-02 Richard Biener <rguenther@suse.de>

31284

+

31285

+ PR middle-end/60729

31286

+ * g++.dg/vect/pr60729.cc: New testcase.

31287

+

31288

+ 2014-04-03 Richard Biener <rguenther@suse.de>

31289

+

31290

+ PR tree-optimization/60740

31291

+ * gcc.dg/graphite/pr60740.c: New testcase.

31292

+

31293

+2014-04-23 Richard Biener <rguenther@suse.de>

31294

+

31295

+ PR middle-end/60635

31296

+ * gfortran.dg/lto/pr60635_0.f90: New testcase.

31297

+ * gfortran.dg/lto/pr60635_1.c: Likewise.

31298

+

31299

+2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

31300

+

31301

+ Back port from the trunk, subversion id 209546.

31302

+

31303

+ 2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

31304

+

31305

+ PR target/60735

31306

+ * gcc.target/powerpc/pr60735.c: New test. Insure _Decimal64 does

31307

+ not cause errors if -mspe.

31308

+

31309

+2014-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31310

+

31311

+ * gcc.dg/vmx/merge-vsx.c: Add V4SI and V4SF tests.

31312

+ * gcc.dg/vmx/merge-vsx-be-order.c: Likewise.

31313

+

31314

+2014-04-12 Jerry DeLisle <jvdelisle@gcc.gnu>

31315

+

31316

+ Backport from mainline

31317

+ PR libfortran/60810

31318

+ gfortran.dg/arrayio_13.f90: New test.

31319

+

31320

+2014-04-11 Hans-Peter Nilsson <hp@axis.com>

31321

+

31322

+ * gfortran.dg/fmt_en.f90: Gate test on effective_target

31323

+ fd_truncate.

31324

+

31325

+2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

31326

+

31327

+ * gcc.target/s390/htm-nofloat-1.c: Rename to ...

31328

+ * gcc.target/s390/htm-nofloat-compile-1.c: ... this one.

31329

+ * gcc.target/s390/htm-nofloat-2.c: Add check for htm target and

31330

+ rename to ...

31331

+ * gcc.target/s390/htm-nofloat-1.c: ... this one.

31332

+ * gcc.target/s390/s390.exp: Make sure the assembler supports htm

31333

+ instructions as well.

31334

+

31335

+2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

31336

+

31337

+ * gcc.target/s390/htm-builtins-compile-1.c: Replace long long with

31338

+ long.

31339

+

31340

+2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

31341

+

31342

+ * gcc.target/s390/htm-builtins-compile-1.c: Remove htm check.

31343

+ * gcc.target/s390/htm-builtins-compile-2.c: Remove htm check.

31344

+

31345

+2014-04-10 Vladimir Makarov <vmakarov@redhat.com>

31346

+

31347

+ PR rtl-optimization/60769

31348

+ * g++.dg/pr60769.C: New.

31349

+

31350

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

31351

+

31352

+ Backport from mainline

31353

+ 2014-03-12 Jakub Jelinek <jakub@redhat.com>

31354

+ Marc Glisse <marc.glisse@inria.fr>

31355

+

31356

+ PR tree-optimization/60502

31357

+ * gcc.c-torture/compile/pr60502.c: New test.

31358

+

31359

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

31360

+

31361

+ PR target/60693

31362

+ * gcc.target/i386/pr60693.c: New test.

31363

+

31364

+ PR c++/60689

31365

+ * c-c++-common/pr60689.c: New test.

31366

+

31367

+ 2014-03-22 Jakub Jelinek <jakub@redhat.com>

31368

+

31369

+ PR debug/60603

31370

+ * gcc.dg/debug/dwarf2/dwarf2-macro2.c: New test.

31371

+

31372

+ 2014-03-17 Jakub Jelinek <jakub@redhat.com>

31373

+

31374

+ PR target/60516

31375

+ * gcc.target/i386/pr60516.c: New test.

31376

+

31377

+ 2014-03-13 Jakub Jelinek <jakub@redhat.com>

31378

+

31379

+ PR middle-end/36282

31380

+ * c-c++-common/pr36282-1.c: New test.

31381

+ * c-c++-common/pr36282-2.c: New test.

31382

+ * c-c++-common/pr36282-3.c: New test.

31383

+ * c-c++-common/pr36282-4.c: New test.

31384

+

31385

+ 2014-03-06 Jakub Jelinek <jakub@redhat.com>

31386

+

31387

+ PR target/58595

31388

+ * gcc.dg/tls/pr58595.c: New test.

31389

+

31390

+2014-04-07 Martin Jambor <mjambor@suse.cz>

31391

+

31392

+ PR ipa/60640

31393

+ * g++.dg/ipa/pr60640-1.C: New test.

31394

+ * g++.dg/ipa/pr60640-2.C: Likewise.

31395

+ * g++.dg/ipa/pr60640-3.C: Likewise.

31396

+

31397

+2014-04-06 Dominique d'Humieres <dominiq@lps.ens.fr>

31398

+ Iain Sandoe <iain@codesourcery.com>

31399

+

31400

+ PR target/54083

31401

+ * gcc.dg/attr-weakref-1.c: Allow the test on darwin with

31402

+ the additional options -Wl,-undefined,dynamic_lookup and

31403

+ -Wl,-flat_namespace

31404

+ * gcc.dg/torture/pr53922.c: Additional option

31405

+ -Wl,-flat_namespace for darwin[89].

31406

+

31407

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31408

+

31409

+ Backport from mainline

31410

+ 2013-04-05 David Edelsohn <dje.gcc@gmail.com>

31411

+

31412

+ * gcc.target/powerpc/sd-vsx.c: Skip on AIX.

31413

+ * gcc.target/powerpc/sd-pwr6.c: Same.

31414

+

31415

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31416

+

31417

+ Back port from trunk

31418

+ 2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com>

31419

+

31420

+ * gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA

31421

+ 2.07 128-bit arithmetic.

31422

+ * gcc.target/powerpc/p8vector-int128-2.c: Likewise.

31423

+

31424

+ * gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,

31425

+ due to when TImode is allowed in VSX registers, the allowable

31426

+ address modes for TImode is just a single indirect address in

31427

+ order for the value to be loaded and store in either GPR or VSX

31428

+ registers. This affects the generated code, and it would cause

31429

+ this test to fail, when such an option is used.

31430

+

31431

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31432

+

31433

+ Backport from mainline r207699.

31434

+ 2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>

31435

+

31436

+ PR target/60137

31437

+ * gcc.target/powerpc/pr60137.c: New file.

31438

+

31439

+ Backport from mainline r207808.

31440

+ 2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>

31441

+

31442

+ PR target/60203

31443

+ * gcc.target/powerpc/pr60203.c: New testsuite.

31444

+

31445

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31446

+

31447

+ Little Endian Vector API Support

31448

+ Backport from mainline r206590

31449

+ 2014-01-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31450

+

31451

+ * gcc.dg/vmx/insert.c: New.

31452

+ * gcc.dg/vmx/insert-be-order.c: New.

31453

+ * gcc.dg/vmx/extract.c: New.

31454

+ * gcc.dg/vmx/extract-be-order.c: New.

31455

+

31456

+ Backport from mainline r206641

31457

+ 2014-01-15 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

31458

+

31459

+ * gcc.dg/vmx/mult-even-odd.c: New.

31460

+ * gcc.dg/vmx/mult-even-odd-be-order.c: New.

31461

+

31462

+ Backport from mainline r206926

31463

+ 2014-01-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31464

+

31465

+ * gcc.dg/vmx/insert-vsx-be-order.c: New.

31466

+ * gcc.dg/vmx/extract-vsx.c: New.

31467

+ * gcc.dg/vmx/extract-vsx-be-order.c: New.

31468

+ * gcc.dg/vmx/insert-vsx.c: New.

31469

+

31470

+ Backport from mainline r207262

31471

+ 2014-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31472

+

31473

+ * gcc.dg/vmx/merge-be-order.c: New.

31474

+ * gcc.dg/vmx/merge.c: New.

31475

+ * gcc.dg/vmx/merge-vsx-be-order.c: New.

31476

+ * gcc.dg/vmx/merge-vsx.c: New.

31477

+

31478

+ Backport from mainline r207318

31479

+ 2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31480

+

31481

+ * gcc.dg/vmx/splat.c: New.

31482

+ * gcc.dg/vmx/splat-vsx.c: New.

31483

+ * gcc.dg/vmx/splat-be-order.c: New.

31484

+ * gcc.dg/vmx/splat-vsx-be-order.c: New.

31485

+ * gcc.dg/vmx/eg-5.c: Remove special casing for little endian.

31486

+ * gcc.dg/vmx/sn7153.c: Add special casing for little endian.

31487

+

31488

+ Backport from mainline r207414

31489

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31490

+

31491

+ * gcc.dg/vmx/vsums.c: New.

31492

+ * gcc.dg/vmx/vsums-be-order.c: New.

31493

+

31494

+ Backport from mainline r207415

31495

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31496

+

31497

+ * gcc.dg/vmx/3b-15.c: Remove special handling for little endian.

31498

+ * gcc.dg/vmx/perm.c: New.

31499

+ * gcc.dg/vmx/perm-be-order.c: New.

31500

+

31501

+ Backport from mainline r207520

31502

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31503

+

31504

+ * gcc.dg/vmx/pack.c: New.

31505

+ * gcc.dg/vmx/pack-be-order.c: New.

31506

+ * gcc.dg/vmx/unpack.c: New.

31507

+ * gcc.dg/vmx/unpack-be-order.c: New.

31508

+

31509

+ Backport from mainline r207521

31510

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31511

+

31512

+ * gcc.dg/vmx/sum2s.c: New.

31513

+ * gcc.dg/vmx/sum2s-be-order.c: New.

31514

+

31515

+ Backport from mainline 208019

31516

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31517

+

31518

+ * gcc.dg/vmx/ld.c: New test.

31519

+ * gcc.dg/vmx/ld-be-order.c: New test.

31520

+ * gcc.dg/vmx/ld-vsx.c: New test.

31521

+ * gcc.dg/vmx/ld-vsx-be-order.c: New test.

31522

+ * gcc.dg/vmx/ldl.c: New test.

31523

+ * gcc.dg/vmx/ldl-be-order.c: New test.

31524

+ * gcc.dg/vmx/ldl-vsx.c: New test.

31525

+ * gcc.dg/vmx/ldl-vsx-be-order.c: New test.

31526

+ * gcc.dg/vmx/st.c: New test.

31527

+ * gcc.dg/vmx/st-be-order.c: New test.

31528

+ * gcc.dg/vmx/st-vsx.c: New test.

31529

+ * gcc.dg/vmx/st-vsx-be-order.c: New test.

31530

+ * gcc.dg/vmx/stl.c: New test.

31531

+ * gcc.dg/vmx/stl-be-order.c: New test.

31532

+ * gcc.dg/vmx/stl-vsx.c: New test.

31533

+ * gcc.dg/vmx/stl-vsx-be-order.c: New test.

31534

+

31535

+ Backport from mainline 208021

31536

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31537

+

31538

+ * gcc.dg/vmx/vsums.c: Check entire result vector.

31539

+ * gcc.dg/vmx/vsums-be-order.c: Likewise.

31540

+

31541

+ Backport from mainline 208049

31542

+ 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31543

+

31544

+ * gcc.dg/vmx/lde.c: New test.

31545

+ * gcc.dg/vmx/lde-be-order.c: New test.

31546

+ * gcc.dg/vmx/ste.c: New test.

31547

+ * gcc.dg/vmx/ste-be-order.c: New test.

31548

+

31549

+ Backport from mainline 208120

31550

+ 2014-02-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31551

+

31552

+ * gcc.dg/vmx/ld-vsx.c: Don't use vec_all_eq.

31553

+ * gcc.dg/vmx/ld-vsx-be-order.c: Likewise.

31554

+ * gcc.dg/vmx/ldl-vsx.c: Likewise.

31555

+ * gcc.dg/vmx/ldl-vsx-be-order.c: Likewise.

31556

+ * gcc.dg/vmx/merge-vsx.c: Likewise.

31557

+ * gcc.dg/vmx/merge-vsx-be-order.c: Likewise.

31558

+

31559

+ Backport from mainline 208321

31560

+ 2014-03-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31561

+

31562

+ * gcc.dg/vmx/extract-vsx.c: Replace "vector long" with "vector

31563

+ long long" throughout.

31564

+ * gcc.dg/vmx/extract-vsx-be-order.c: Likewise.

31565

+ * gcc.dg/vmx/insert-vsx.c: Likewise.

31566

+ * gcc.dg/vmx/insert-vsx-be-order.c: Likewise.

31567

+ * gcc.dg/vmx/ld-vsx.c: Likewise.

31568

+ * gcc.dg/vmx/ld-vsx-be-order.c: Likewise.

31569

+ * gcc.dg/vmx/ldl-vsx.c: Likewise.

31570

+ * gcc.dg/vmx/ldl-vsx-be-order.c: Likewise.

31571

+ * gcc.dg/vmx/merge-vsx.c: Likewise.

31572

+ * gcc.dg/vmx/merge-vsx-be-order.c: Likewise.

31573

+ * gcc.dg/vmx/st-vsx.c: Likewise.

31574

+ * gcc.dg/vmx/st-vsx-be-order.c: Likewise.

31575

+ * gcc.dg/vmx/stl-vsx.c: Likewise.

31576

+ * gcc.dg/vmx/stl-vsx-be-order.c: Likewise.

31577

+

31578

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31579

+

31580

+ Back port from mainline

31581

+ 2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com>

31582

+

31583

+ PR target/59909

31584

+ * gcc.target/powerpc/quad-atomic.c: New file to test power8 quad

31585

+ word atomic functions at runtime.

31586

+

31587

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31588

+

31589

+ Backport from mainline

31590

+ 2013-10-23 Pat Haugen <pthaugen@us.ibm.com>

31591

+

31592

+ * gcc.target/powerpc/direct-move.h: Fix header for executable tests.

31593

+

31594

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31595

+

31596

+ Backport from mainline

31597

+ 2013-04-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31598

+

31599

+ PR target/56843

31600

+ * gcc.target/powerpc/recip-1.c: Modify expected output.

31601

+ * gcc.target/powerpc/recip-3.c: Likewise.

31602

+ * gcc.target/powerpc/recip-4.c: Likewise.

31603

+ * gcc.target/powerpc/recip-5.c: Add expected output for iterations.

31604

+

31605

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31606

+

31607

+ Backport from mainline

31608

+ 2013-08-19 Peter Bergner <bergner@vnet.ibm.com>

31609

+

31610

+ * gcc.target/powerpc/dfp-dd-2.c: New test.

31611

+ * gcc.target/powerpc/dfp-td-2.c: Likewise.

31612

+ * gcc.target/powerpc/dfp-td-3.c: Likewise.

31613

+

31614

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31615

+

31616

+ ELFv2 ABI Support

31617

+ Backport from mainline r204808:

31618

+

31619

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

31620

+

31621

+ * gcc.target/powerpc/ppc64-abi-1.c (stack_frame_t): Remove

31622

+ compiler and linker field if _CALL_ELF == 2.

31623

+ * gcc.target/powerpc/ppc64-abi-2.c (stack_frame_t): Likewise.

31624

+ * gcc.target/powerpc/ppc64-abi-dfp-1.c (stack_frame_t): Likewise.

31625

+ * gcc.dg/stack-usage-1.c (SIZE): Update value for _CALL_ELF == 2.

31626

+

31627

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

31628

+

31629

+ * gcc.target/powerpc/ppc64-abi-dfp-1.c (FUNC_START): New macro.

31630

+ (WRAPPER): Use it.

31631

+ * gcc.target/powerpc/no-r11-1.c: Skip on powerpc_elfv2.

31632

+ * gcc.target/powerpc/no-r11-2.c: Skip on powerpc_elfv2.

31633

+ * gcc.target/powerpc/no-r11-3.c: Skip on powerpc_elfv2.

31634

+

31635

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

31636

+

31637

+ * lib/target-supports.exp (check_effective_target_powerpc_elfv2):

31638

+ New function.

31639

+ * gcc.target/powerpc/pr57949-1.c: Disable for powerpc_elfv2.

31640

+ * gcc.target/powerpc/pr57949-2.c: Likewise.

31641

+

31642

+ Backport from mainline r204799:

31643

+

31644

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

31645

+

31646

+ * g++.dg/eh/ppc64-sighandle-cr.C: New test.

31647

+

31648

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31649

+

31650

+ Backport from mainline r201750.

31651

+ Note: Default setting of -mcompat-align-parm inverted!

31652

+

31653

+ 2013-08-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31654

+

31655

+ PR target/57949

31656

+ * gcc.target/powerpc/pr57949-1.c: New.

31657

+ * gcc.target/powerpc/pr57949-2.c: New.

31658

+

31659

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31660

+

31661

+ Little Endian Vector Support

31662

+ Backport from mainline r205638

31663

+ 2013-12-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31664

+

31665

+ * gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c: Skip for little

31666

+ endian.

31667

+

31668

+ Backport from mainline r205146

31669

+ 2013-11-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31670

+

31671

+ * gcc.target/powerpc/pr48258-1.c: Skip for little endian.

31672

+

31673

+ Backport from mainline r204862

31674

+ 2013-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31675

+

31676

+ * gcc.dg/vmx/3b-15.c: Revise for little endian.

31677

+

31678

+ Backport from mainline r204321

31679

+ 2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

31680

+

31681

+ * gcc.dg/vmx/vec-set.c: New.

31682

+

31683

+ Backport from mainline r204138

31684

+ 2013-10-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31685

+

31686

+ * gcc.dg/vmx/gcc-bug-i.c: Add little endian variant.

31687

+ * gcc.dg/vmx/eg-5.c: Likewise.

31688

+

31689

+ Backport from mainline r203930

31690

+ 2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com>

31691

+

31692

+ * gcc.target/powerpc/altivec-perm-1.c: Move the two vector pack

31693

+ tests into...

31694

+ * gcc.target/powerpc/altivec-perm-3.c: ...this new test, which is

31695

+ restricted to big-endian targets.

31696

+

31697

+ Backport from mainline r203246

31698

+ 2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31699

+

31700

+ * gcc.target/powerpc/pr43154.c: Skip for ppc64 little endian.

31701

+ * gcc.target/powerpc/fusion.c: Likewise.

31702

+

31703

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31704

+

31705

+ Backport from mainline

31706

+ 2013-11-27 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31707

+

31708

+ * gfortran.dg/nan_7.f90: Disable for little endian PowerPC.

31709

+

31710

+ Backport from mainline r205106:

31711

+

31712

+ 2013-11-20 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

31713

+

31714

+ * gcc.target/powerpc/darwin-longlong.c (msw): Make endian-safe.

31715

+

31716

+ Backport from mainline r205046:

31717

+

31718

+ 2013-11-19 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

31719

+

31720

+ * gcc.target/powerpc/ppc64-abi-2.c (MAKE_SLOT): New macro to

31721

+ construct parameter slot value in endian-independent way.

31722

+ (fcevv, fciievv, fcvevv): Use it.

31723

+

31724

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31725

+

31726

+ Power8 HTM Support

31727

+ Backport from mainline

31728

+ * lib/target-supports.exp (check_effective_target_powerpc_htm_ok): New

31729

+ function to test if HTM is available.

31730

+ * gcc.target/powerpc/htm-xl-intrin-1.c: New test.

31731

+ * gcc.target/powerpc/htm-builtin-1.c: New test.

31732

+

31733

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31734

+

31735

+ Power8 Base Support

31736

+ Backport from mainline

31737

+ 2013-11-22 Michael Meissner <meissner@linux.vnet.ibm.com>

31738

+

31739

+ PR target/59054

31740

+ * gcc.target/powerpc/direct-move.h (VSX_REG_ATTR): Allow test to

31741

+ specify an appropriate register class for VSX operations.

31742

+ (load_vsx): Use it.

31743

+ (load_gpr_to_vsx): Likewise.

31744

+ (load_vsx_to_gpr): Likewise.

31745

+ * gcc.target/powerpc/direct-move-vint1.c: Use an appropriate

31746

+ register class for VSX registers that the type can handle. Remove

31747

+ checks for explicit number of instructions generated, just check

31748

+ if the instruction is generated.

31749

+ * gcc.target/powerpc/direct-move-vint2.c: Likewise.

31750

+ * gcc.target/powerpc/direct-move-float1.c: Likewise.

31751

+ * gcc.target/powerpc/direct-move-float2.c: Likewise.

31752

+ * gcc.target/powerpc/direct-move-double1.c: Likewise.

31753

+ * gcc.target/powerpc/direct-move-double2.c: Likewise.

31754

+ * gcc.target/powerpc/direct-move-long1.c: Likewise.

31755

+ * gcc.target/powerpc/direct-move-long2.c: Likewise.

31756

+

31757

+ * gcc.target/powerpc/bool3-av.c: Limit to 64-bit mode for now.

31758

+ * gcc.target/powerpc/bool3-p7.c: Likewise.

31759

+ * gcc.target/powerpc/bool3-p8.c: Likewise.

31760

+

31761

+ * gcc.target/powerpc/p8vector-ldst.c: Just check that the

31762

+ appropriate instructions are generated, don't check the count.

31763

+

31764

+ 2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com>

31765

+

31766

+ PR target/59054

31767

+ * gcc.target/powerpc/pr59054.c: New test.

31768

+

31769

+ 2013-08-22 Michael Meissner <meissner@linux.vnet.ibm.com>

31770

+

31771

+ * gcc.target/powerpc/pr57744.c: Declare abort.

31772

+

31773

+ 2013-07-18 Pat Haugen <pthaugen@us.ibm.com>

31774

+

31775

+ * gcc.target/powerpc/pr57744.c: Fix typo.

31776

+

31777

+ Back port from mainline

31778

+ 2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>

31779

+

31780

+ * gcc.target/powerpc/p8vector-fp.c: New test for floating point

31781

+ scalar operations when using -mupper-regs-sf and -mupper-regs-df.

31782

+ * gcc.target/powerpc/ppc-target-1.c: Update tests to allow either

31783

+ VSX scalar operations or the traditional floating point form of

31784

+ the instruction.

31785

+ * gcc.target/powerpc/ppc-target-2.c: Likewise.

31786

+ * gcc.target/powerpc/recip-3.c: Likewise.

31787

+ * gcc.target/powerpc/recip-5.c: Likewise.

31788

+ * gcc.target/powerpc/pr72747.c: Likewise.

31789

+ * gcc.target/powerpc/vsx-builtin-3.c: Likewise.

31790

+

31791

+ Back port from mainline

31792

+ 2013-09-27 Michael Meissner <meissner@linux.vnet.ibm.com>

31793

+

31794

+ * gcc.target/powerpc/p8vector-ldst.c: New test for -mupper-regs-sf

31795

+ and -mupper-regs-df.

31796

+

31797

+ Back port from mainline

31798

+ 2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>

31799

+

31800

+ PR target/58673

31801

+ * gcc.target/powerpc/pr58673-1.c: New file to test whether

31802

+ -mquad-word + -mno-vsx-timode causes errors.

31803

+ * gcc.target/powerpc/pr58673-2.c: Likewise.

31804

+

31805

+

31806

+ Backport from trunk.

31807

+ 2013-07-23 Michael Meissner <meissner@linux.vnet.ibm.com>

31808

+

31809

+ * gcc.target/powerpc/bool2.h: New file, test the code generation

31810

+ of logical operations for power5, altivec, power7, and power8 systems.

31811

+ * gcc.target/powerpc/bool2-p5.c: Likewise.

31812

+ * gcc.target/powerpc/bool2-av.c: Likewise.

31813

+ * gcc.target/powerpc/bool2-p7.c: Likewise.

31814

+ * gcc.target/powerpc/bool2-p8.c: Likewise.

31815

+ * gcc.target/powerpc/bool3.h: Likewise.

31816

+ * gcc.target/powerpc/bool3-av.c: Likewise.

31817

+ * gcc.target/powerpc/bool2-p7.c: Likewise.

31818

+ * gcc.target/powerpc/bool2-p8.c: Likewise.

31819

+

31820

+ Backport from trunk.

31821

+ 2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com>

31822

+

31823

+ * gcc.target/powerpc/fusion.c: New file, test power8 fusion support.

31824

+

31825

+ Back port from the trunk

31826

+ 2013-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>

31827

+

31828

+ PR target/57744

31829

+ * gcc.target/powerpc/pr57744.c: New test to make sure lqarx and

31830

+ stqcx. get even registers.

31831

+

31832

+ Back port from the trunk

31833

+

31834

+ 2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com>

31835

+ Pat Haugen <pthaugen@us.ibm.com>

31836

+ Peter Bergner <bergner@vnet.ibm.com>

31837

+

31838

+ * gcc.target/powerpc/atomic-p7.c: New file, add tests for atomic

31839

+ load/store instructions on power7, power8.

31840

+ * gcc.target/powerpc/atomic-p8.c: Likewise.

31841

+

31842

+ Back port from the trunk

31843

+

31844

+ 2013-06-10 Michael Meissner <meissner@linux.vnet.ibm.com>

31845

+ Pat Haugen <pthaugen@us.ibm.com>

31846

+ Peter Bergner <bergner@vnet.ibm.com>

31847

+

31848

+ * gcc.target/powerpc/direct-move-vint1.c: New tests for power8

31849

+ direct move instructions.

31850

+ * gcc.target/powerpc/direct-move-vint2.c: Likewise.

31851

+ * gcc.target/powerpc/direct-move.h: Likewise.

31852

+ * gcc.target/powerpc/direct-move-float1.c: Likewise.

31853

+ * gcc.target/powerpc/direct-move-float2.c: Likewise.

31854

+ * gcc.target/powerpc/direct-move-double1.c: Likewise.

31855

+ * gcc.target/powerpc/direct-move-double2.c: Likewise.

31856

+ * gcc.target/powerpc/direct-move-long1.c: Likewise.

31857

+ * gcc.target/powerpc/direct-move-long2.c: Likewise.

31858

+

31859

+ Backport from the trunk

31860

+

31861

+ 2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com>

31862

+ Pat Haugen <pthaugen@us.ibm.com>

31863

+ Peter Bergner <bergner@vnet.ibm.com>

31864

+

31865

+ * gcc.target/powerpc/p8vector-builtin-1.c: New test to test

31866

+ power8 builtin functions.

31867

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c: Likewise.

31868

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c: Likewise.

31869

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c: Likewise.

31870

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c: Likewise.

31871

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c: Likewise.

31872

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c: Likewise.

31873

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c: New

31874

+ tests to test power8 auto-vectorization.

31875

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c: Likewise.

31876

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c: Likewise.

31877

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c: Likewise.

31878

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c: Likewise.

31879

+

31880

+ * gcc.target/powerpc/crypto-builtin-1.c: Use effective target

31881

+ powerpc_p8vector_ok instead of powerpc_vsx_ok.

31882

+

31883

+ * gcc.target/powerpc/bool.c: New file, add eqv, nand, nor tests.

31884

+

31885

+ * lib/target-supports.exp (check_p8vector_hw_available) Add power8

31886

+ support.

31887

+ (check_effective_target_powerpc_p8vector_ok): Likewise.

31888

+ (is-effective-target): Likewise.

31889

+ (check_vect_support_and_set_flags): Likewise.

31890

+

31891

+ Backport from trunk

31892

+

31893

+ 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>

31894

+ Pat Haugen <pthaugen@us.ibm.com>

31895

+ Peter Bergner <bergner@vnet.ibm.com>

31896

+

31897

+ * gcc.target/powerpc/crypto-builtin-1.c: New file, test for power8

31898

+ crypto builtins.

31899

+

31900

+ Backport from mainline

31901

+ 2013-03-20 Michael Meissner <meissner@linux.vnet.ibm.com>

31902

+

31903

+ * gcc.target/powerpc/mmfpgpr.c: New test.

31904

+ * gcc.target/powerpc/sd-vsx.c: Likewise.

31905

+ * gcc.target/powerpc/sd-pwr6.c: Likewise.

31906

+ * gcc.target/powerpc/vsx-float0.c: Likewise.

31907

+

31908

+2014-04-01 Dominique d'Humieres <dominiq@lps.ens.fr>

31909

+

31910

+ PR libfortran/60128

31911

+ * gfortran.dg/fmt_en.f90: Skip unsupported rounding tests.

31912

+ XFAIL for i?86-*-solaris2.9* and hppa*-*-hpux*.

31913

+

31914

+2014-03-31 H.J. Lu <hongjiu.lu@intel.com>

31915

+

31916

+ Backport from mainline

31917

+ 2014-03-31 H.J. Lu <hongjiu.lu@intel.com>

31918

+

31919

+ PR rtl-optimization/60700

31920

+ * gcc.target/i386/pr60700.c: New test.

31921

+

31922

+2014-03-28 H.J. Lu <hongjiu.lu@intel.com>

31923

+

31924

+ PR rtl-optimization/60700

31925

+ Backport from mainline

31926

+ 2013-07-30 Zhenqiang Chen <zhenqiang.chen@linaro.org>

31927

+

31928

+ * gcc.target/arm/pr57637.c: New testcase.

31929

+

31930

+2014-04-28 Thomas Koenig <tkoenig@gcc.gnu.org>

31931

+

31932

+ PR fortran/60522

31933

+ * gfortran.dg/where_4.f90: New test case.

31934

+

31935

+2014-03-26 Martin Jambor <mjambor@suse.cz>

31936

+

31937

+ PR ipa/60419

31938

+ * g++.dg/ipa/pr60419.C: New test.

31939

+

31940

+2014-03-26 Eric Botcazou <ebotcazou@adacore.com>

31941

+

31942

+ * gcc.c-torture/execute/20140326-1.c: New test.

31943

+

31944

+2014-03-20 Tobias Burnus <burnus@net-b.de>

31945

+

31946

+ PR fortran/60543

31947

+ PR fortran/60283

31948

+ * gfortran.dg/implicit_pure_4.f90: New.

31949

+

31950

+2014-03-17 Mikael Pettersson <mikpelinux@gmail.com>

31951

+ Committed by Bill Schmidt <wschmidt@linux.vnet.ibm.com>

31952

+

31953

+ Backport from mainline:

31954

+

31955

+ 2013-06-16 Joern Rennecke <joern.rennecke@embecosm.com>

31956

+

31957

+ PR rtl-optimization/57425

31958

+ PR rtl-optimization/57569

31959

+ * gcc.dg/torture/pr57425-1.c, gcc.dg/torture/pr57425-2.c: New files.

31960

+ * gcc.dg/torture/pr57425-3.c, gcc.dg/torture/pr57569.c: Likewise.

31961

+

31962

+2014-03-17 Richard Biener <rguenther@suse.de>

31963

+

31964

+ Backport from mainline

31965

+ 2014-03-11 Richard Biener <rguenther@suse.de>

31966

+

31967

+ PR tree-optimization/60429

31968

+ PR tree-optimization/60485

31969

+ * gcc.dg/pr60485-1.c: New testcase.

31970

+ * gcc.dg/pr60485-2.c: Likewise.

31971

+

31972

+2014-03-15 Dominique d'Humieres <dominiq@lps.ens.fr>

31973

+

31974

+ Backport from mainline

31975

+ PR libfortran/60128

31976

+ * gfortran.dg/fmt_en.f90: New test.

31977

+

31978

+2014-03-15 Jerry DeLisle <jvdelisle@gcc.gnu>

31979

+

31980

+ Backport from mainline

31981

+ PR libfortran/58324

31982

+ * gfortran.dg/list_read_12.f90: New test.

31983

+

31984

+2014-03-13 Joey Ye <joey.ye@arm.com>

31985

+

31986

+ Backport from mainline

31987

+ 2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com>

31988

+

31989

+ PR tree-optimization/60454

31990

+ * gcc.c-torture/execute/pr60454.c: New test.

31991

+

31992

+2014-03-08 Janus Weil <janus@gcc.gnu.org>

31993

+

31994

+ PR fortran/60450

31995

+ * gfortran.dg/shape_8.f90: New.

31996

+

31997

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

31998

+

31999

+ Backport from mainline

32000

+ 2014-02-19 Jakub Jelinek <jakub@redhat.com>

32001

+

32002

+ PR c/37743

32003

+ * g++.dg/ext/builtin-bswap1.C: New test.

32004

+ * c-c++-common/pr37743.c: New test.

32005

+

32006

+ PR preprocessor/58844

32007

+ * c-c++-common/cpp/pr58844-1.c: New test.

32008

+ * c-c++-common/cpp/pr58844-2.c: New test.

32009

+

32010

+ 2014-02-13 Jakub Jelinek <jakub@redhat.com>

32011

+

32012

+ PR target/43546

32013

+ * gcc.target/i386/pr43546.c: New test.

32014

+

32015

+ 2014-02-12 Jakub Jelinek <jakub@redhat.com>

32016

+

32017

+ PR c/60101

32018

+ * c-c++-common/pr60101.c: New test.

32019

+

32020

+ 2014-02-11 Jakub Jelinek <jakub@redhat.com>

32021

+

32022

+ PR fortran/52370

32023

+ * gfortran.dg/pr52370.f90: New test.

32024

+

32025

+ PR debug/59776

32026

+ * gcc.dg/guality/pr59776.c: New test.

32027

+

32028

+ 2014-02-07 Jakub Jelinek <jakub@redhat.com>

32029

+

32030

+ PR preprocessor/56824

32031

+ * gcc.dg/pr56824.c: New test.

32032

+

32033

+ 2014-02-06 Jakub Jelinek <jakub@redhat.com>

32034

+

32035

+ PR target/60062

32036

+ * gcc.c-torture/execute/pr60062.c: New test.

32037

+ * gcc.c-torture/execute/pr60072.c: New test.

32038

+

32039

+ 2014-02-04 Jakub Jelinek <jakub@redhat.com>

32040

+

32041

+ PR ipa/60026

32042

+ * c-c++-common/torture/pr60026.c: New test.

32043

+

32044

+ 2014-02-05 Jakub Jelinek <jakub@redhat.com>

32045

+

32046

+ PR middle-end/57499

32047

+ * g++.dg/torture/pr57499.C: New test.

32048

+

32049

+ 2014-03-03 Jakub Jelinek <jakub@redhat.com>

32050

+

32051

+ PR preprocessor/60400

32052

+ * c-c++-common/cpp/pr60400.c: New test.

32053

+ * c-c++-common/cpp/pr60400-1.h: New file.

32054

+ * c-c++-common/cpp/pr60400-2.h: New file.

32055

+

32056

+2014-03-04 Richard Biener <rguenther@suse.de>

32057

+

32058

+ PR tree-optimization/60382

32059

+ * gcc.dg/vect/pr60382.c: New testcase.

32060

+

32061

+2014-03-02 Mikael Morin <mikael@gcc.gnu.org>

32062

+

32063

+ PR fortran/60341

32064

+ * gfortran.dg/str_comp_optimize_1.f90: New test.

32065

+

32066

+2014-02-25 Richard Biener <rguenther@suse.de>

32067

+

32068

+ Backport from mainline

32069

+ 2014-02-21 Richard Biener <rguenther@suse.de>

32070

+

32071

+ PR tree-optimization/60276

32072

+ * gcc.dg/vect/pr60276.c: New testcase.

32073

+

32074

+2014-02-25 Richard Biener <rguenther@suse.de>

32075

+

32076

+ Backport from mainline

32077

+ 2014-02-14 Richard Biener <rguenther@suse.de>

32078

+

32079

+ PR tree-optimization/60183

32080

+ * gcc.dg/torture/pr60183.c: New testcase.

32081

+

32082

+2014-02-24 Fabien Chêne <fabien@gcc.gnu.org>

32083

+

32084

+ PR c++/37140

32085

+ * g++.dg/template/using27.C: New.

32086

+ * g++.dg/template/using28.C: New.

32087

+ * g++.dg/template/using29.C: New.

32088

+

32089

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

32090

+

32091

+ * gcc/testsuite/gcc.target/microblaze/others/mem_reload.c: New test.

32092

+

32093

+2014-02-22 Mikael Morin <mikael@gcc.gnu.org>

32094

+

32095

+ PR fortran/59599

32096

+ * gfortran.dg/ichar_3.f90: New test.

32097

+

32098

+2014-02-21 Steven G. Kargl <kargl@gcc.gnu.org>

32099

+

32100

+ Backport from mainline

32101

+ PR fortran/59700

32102

+ * gfortran.dg/pr59700.f90: New test.

32103

+

32104

+2014-02-21 Martin Jambor <mjambor@suse.cz>

32105

+

32106

+ PR ipa/55260

32107

+ * gcc.dg/ipa/pr55260.c: New test.

32108

+

32109

+2014-02-19 Tobias Burnus <burnus@net-b.de>

32110

+

32111

+ PR fortran/49397

32112

+ * gfortran.dg/proc_ptr_45.f90: New.

32113

+ * gfortran.dg/proc_ptr_46.f90: New.

32114

+

32115

+2014-02-19 Uros Bizjak <ubizjak@gmail.com>

32116

+

32117

+ Backport from mainline

32118

+ 2014-02-19 Uros Bizjak <ubizjak@gmail.com>

32119

+

32120

+ PR target/59794

32121

+ * gcc.target/i386/pr39162.c: Add dg-prune-output.

32122

+ (dg-options): Remove -Wno-psabi.

32123

+ * gcc.target/i386/pr59794-2.c: Ditto.

32124

+ * gcc.target/i386/sse-5.c: Ditto.

32125

+

32126

+2014-02-19 Janus Weil <janus@gcc.gnu.org>

32127

+

32128

+ Backports from mainline:

32129

+ 2014-02-17 Janus Weil <janus@gcc.gnu.org>

32130

+

32131

+ PR fortran/55907

32132

+ * gfortran.dg/init_flag_12.f90: New.

32133

+

32134

+ 2014-02-18 Janus Weil <janus@gcc.gnu.org>

32135

+

32136

+ PR fortran/60231

32137

+ * gfortran.dg/typebound_generic_15.f90: New.

32138

+

32139

+2014-02-18 Kai Tietz <ktietz@redhat.com>

32140

+

32141

+ PR target/60193

32142

+ * gcc.target/i386/nest-1.c: New testcase.

32143

+

32144

+2014-02-18 Eric Botcazou <ebotcazou@adacore.com>

32145

+

32146

+ * gnat.dg/opt32.adb: New test.

32147

+

32148

+2014-02-15 Jerry DeLisle <jvdelisle@gcc.gnu>

32149

+ Dominique d'Humieres <dominiq@lps.ens.fr>

32150

+

32151

+ Backport from mainline

32152

+ PR libfortran/59771

32153

+ PR libfortran/59774

32154

+ PR libfortran/59836

32155

+ * gfortran.dg/fmt_g_1.f90: New test.

32156

+ * gfortran.dg/round_3.f08: New cases added.

32157

+

32158

+2014-02-13 Dominik Vogt <vogt@linux.vnet.ibm.com>

32159

+

32160

+ * gcc.target/s390/hotpatch-compile-8.c: New test.

32161

+

32162

+2014-02-12 Eric Botcazou <ebotcazou@adacore.com>

32163

+

32164

+ * gcc.c-torture/execute/20140212-1.c: New test.

32165

+

32166

+2014-02-10 Richard Biener <rguenther@suse.de>

32167

+

32168

+ Backport from mainline

32169

+ 2014-01-30 Richard Biener <rguenther@suse.de>

32170

+

32171

+ PR tree-optimization/59903

32172

+ * gcc.dg/torture/pr59903.c: New testcase.

32173

+

32174

+ 2014-02-10 Richard Biener <rguenther@suse.de>

32175

+

32176

+ PR tree-optimization/60115

32177

+ * gcc.dg/torture/pr60115.c: New testcase.

32178

+

32179

+2014-02-09 Janus Weil <janus@gcc.gnu.org>

32180

+

32181

+ Backport from mainline

32182

+ 2013-10-21 Tobias Burnus <burnus@net-b.de>

32183

+

32184

+ PR fortran/58803

32185

+ PR fortran/59395

32186

+ * gfortran.dg/proc_ptr_comp_38.f90: New.

32187

+

32188

+2014-02-08 Mikael Morin <mikael@gcc.gnu.org>

32189

+

32190

+ PR fortran/57033

32191

+ * gfortran.dg/default_initialization_7.f90: New test.

32192

+

32193

+2014-02-07 Paul Thomas <pault@gcc.gnu.org>

32194

+

32195

+ PR fortran/59906

32196

+ * gfortran.dg/elemental_subroutine_9.f90 : New test

32197

+

32198

+2014-02-04 Uros Bizjak <ubizjak@gmail.com>

32199

+

32200

+ Backport from mainline

32201

+ 2014-02-02 Uros Bizjak <ubizjak@gmail.com>

32202

+

32203

+ PR target/60017

32204

+ * gcc.c-torture/execute/pr60017.c: New test.

32205

+

32206

+2014-02-01 Paul Thomas <pault@gcc.gnu.org>

32207

+

32208

+ PR fortran/59414

32209

+ * gfortran.dg/allocate_class_3.f90 : New test

32210

+

32211

+2014-01-30 David Holsgrove <david.holsgrove@xilinx.com>

32212

+

32213

+ Backport from mainline.

32214

+ * gcc.target/microblaze/isa/fcmp4.c: New.

32215

+

32216

+2014-01-26 Mikael Morin <mikael@gcc.gnu.org>

32217

+

32218

+ PR fortran/58007

32219

+ * gfortran.dg/unresolved_fixup_1.f90: New test.

32220

+ * gfortran.dg/unresolved_fixup_2.f90: New test.

32221

+

32222

+2014-01-24 H.J. Lu <hongjiu.lu@intel.com>

32223

+

32224

+ Backport from mainline.

32225

+ 2014-01-23 H.J. Lu <hongjiu.lu@intel.com>

32226

+

32227

+ PR target/59929

32228

+ * gcc.target/i386/pr59929.c: New test.

32229

+

32230

+2014-01-24 Paolo Carlini <paolo.carlini@oracle.com>

32231

+

32232

+ PR c++/57524

32233

+ * g++.dg/ext/timevar2.C: New.

32234

+

32235

+2014-01-23 David Holsgrove <david.holsgrove@xilinx.com>

32236

+

32237

+ Backport from mainline.

32238

+ * gcc.target/microblaze/others/builtin-trap.c: New test.

32239

+

32240

+2014-01-23 Marek Polacek <polacek@redhat.com>

32241

+

32242

+ Backport from mainline

32243

+ 2013-10-21 Marek Polacek <polacek@redhat.com>

32244

+

32245

+ PR middle-end/58809

32246

+ * gcc.dg/gomp/pr58809.c: New test.

32247

+

32248

+2014-01-23 Jakub Jelinek <jakub@redhat.com>

32249

+

32250

+ PR middle-end/58809

32251

+ * c-c++-common/gomp/pr58809.c: New test.

32252

+

32253

+2014-01-22 Marek Polacek <polacek@redhat.com>

32254

+

32255

+ Backport from mainline

32256

+ 2014-01-22 Marek Polacek <polacek@redhat.com>

32257

+

32258

+ PR c/59891

32259

+ * gcc.dg/torture/pr59891.c: New test.

32260

+

32261

+2014-01-21 Jakub Jelinek <jakub@redhat.com>

32262

+

32263

+ PR middle-end/59860

32264

+ * gcc.dg/strlenopt-4.c: Expect the same counts on s390*-* as on all

32265

+ other targets.

32266

+

32267

+2014-01-20 Richard Biener <rguenther@suse.de>

32268

+

32269

+ PR middle-end/59860

32270

+ * gcc.dg/pr59860.c: New testcase.

32271

+

32272

+2014-01-20 Marek Polacek <polacek@redhat.com>

32273

+

32274

+ Backported from mainline

32275

+ 2014-01-17 Marek Polacek <polacek@redhat.com>

32276

+

32277

+ PR c++/59838

32278

+ * g++.dg/diagnostic/pr59838.C: New test.

32279

+

32280

+2014-01-19 Paul Thomas <pault@gcc.gnu.org>

32281

+

32282

+ Backport from mainline

32283

+ 2013-12-01 Paul Thomas <pault@gcc.gnu.org>

32284

+

32285

+ PR fortran/34547

32286

+ * gfortran.dg/null_5.f90 : Include new error.

32287

+ * gfortran.dg/null_6.f90 : Include new error.

32288

+

32289

+2014-01-17 H.J. Lu <hongjiu.lu@intel.com>

32290

+

32291

+ Backport from mainline

32292

+ 2014-01-15 H.J. Lu <hongjiu.lu@intel.com>

32293

+

32294

+ PR target/59794

32295

+ * c-c++-common/convert-vec-1.c: Also prune ABI change for

32296

+ Linux/x86.

32297

+ * g++.dg/cpp0x/constexpr-53094-2.C: Likewise.

32298

+ * g++.dg/ext/attribute-test-1.C: Likewise.

32299

+ * g++.dg/ext/attribute-test-2.C: Likewise.

32300

+ * g++.dg/ext/attribute-test-3.C: Likewise.

32301

+ * g++.dg/ext/attribute-test-4.C: Likewise.

32302

+ * g++.dg/torture/pr38565.C: Likewise.

32303

+ * gcc.dg/pr53060.c: Likewise.

32304

+ * c-c++-common/scal-to-vec2.c: Add -msse2 for x86.

32305

+ * c-c++-common/vector-compare-2.c: Likewise.

32306

+ * gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c: Likewise.

32307

+ * g++.dg/conversion/simd1.C: Add -msse2 for x86. Adjust

32308

+ dg-message line number.

32309

+

32310

+2014-01-17 H.J. Lu <hongjiu.lu@intel.com>

32311

+

32312

+ Backport from mainline

32313

+ 2014-01-14 H.J. Lu <hongjiu.lu@intel.com>

32314

+

32315

+ PR target/59794

32316

+ * gcc.target/i386/pr39162.c (y): New __m256i variable.

32317

+ (bar): Change return type to void. Set y to x.

32318

+ * gcc.target/i386/pr59794-1.c: New testcase.

32319

+ * gcc.target/i386/pr59794-2.c: Likewise.

32320

+ * gcc.target/i386/pr59794-3.c: Likewise.

32321

+ * gcc.target/i386/pr59794-4.c: Likewise.

32322

+ * gcc.target/i386/pr59794-5.c: Likewise.

32323

+ * gcc.target/i386/pr59794-6.c: Likewise.

32324

+ * gcc.target/i386/pr59794-7.c: Likewise.

32325

+

32326

+2014-01-17 Matthias Klose <doko@ubuntu.com>

32327

+

32328

+ Backport from the trunk:

32329

+ 2014-01-09 Uros Bizjak <ubizjak@gmail.com>

32330

+ * go.test/go-test.exp (go-gc-tests): Don't run peano.go on systems

32331

+ which don't support -fsplit-stack. Skip rotate[0123].go tests.

32332

+

32333

+2014-01-15 Kugan Vivekanandarajah <kuganv@linaro.org>

32334

+

32335

+ Backport from mainline

32336

+ 2014-01-15 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org>

32337

+ Kugan Vivekanandarajah <kuganv@linaro.org>

32338

+

32339

+ PR target/59695

32340

+ * g++.dg/pr59695.C: New testcase.

32341

+

32342

+2014-01-17 Terry Guo <terry.guo@arm.com>

32343

+

32344

+ * gcc.target/arm/pr59826.c: New test.

32345

+

32346

+2014-01-16 Jakub Jelinek <jakub@redhat.com>

32347

+

32348

+ PR target/59839

32349

+ * gcc.target/i386/pr59839.c: New test.

32350

+

32351

+ PR debug/54694

32352

+ * gcc.target/i386/pr9771-1.c (main): Rename to...

32353

+ (real_main): ... this. Add __asm name "main".

32354

+ (ASMNAME, ASMNAME2, STRING): Define.

32355

+

32356

+2014-01-16 Marek Polacek <polacek@redhat.com>

32357

+

32358

+ Backported from mainline

32359

+ 2014-01-16 Marek Polacek <polacek@redhat.com>

32360

+

32361

+ PR middle-end/59827

32362

+ * gcc.dg/pr59827.c: New test.

32363

+

32364

+2014-01-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

32365

+

32366

+ PR target/59803

32367

+ * gcc.c-torture/compile/pr59803.c: New testcase.

32368

+

32369

+2014-01-10 Yufeng Zhang <yufeng.zhang@arm.com>

32370

+

32371

+ * gcc.target/arm/neon/vst1Q_laneu64-1.c: New test.

32372

+

32373

+2014-01-10 Hans-Peter Nilsson <hp@axis.com>

32374

+

32375

+ * gcc.dg/pr46309.c: Disable for cris*-*-*.

32376

+

32377

+2014-01-10 Paolo Carlini <paolo.carlini@oracle.com>

32378

+

32379

+ PR c++/56060

32380

+ PR c++/59730

32381

+ * g++.dg/cpp0x/variadic144.C: New.

32382

+ * g++.dg/cpp0x/variadic145.C: Likewise.

32383

+

32384

+2014-01-10 Richard Biener <rguenther@suse.de>

32385

+

32386

+ PR tree-optimization/59715

32387

+ * gcc.dg/torture/pr59715.c: New testcase.

32388

+

32389

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

32390

+

32391

+ * gcc.target/mips/bswap-1.c, gcc.target/mips/bswap-2.c,

32392

+ gcc.target/mips/bswap-3.c, gcc.target/mips/bswap-4.c,

32393

+ gcc.target/mips/bswap-5.c, gcc.target/mips/bswap-6.c: New tests.

32394

+

32395

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

32396

+

32397

+ PR rtl-optimization/59137

32398

+ * gcc.target/mips/pr59137.c: New test.

32399

+

32400

+2014-01-09 Richard Biener <rguenther@suse.de>

32401

+

32402

+ Backport from mainline

32403

+ 2013-11-18 Richard Biener <rguenther@suse.de>

32404

+

32405

+ PR tree-optimization/59125

32406

+ PR tree-optimization/54570

32407

+ * gcc.dg/builtin-object-size-8.c: Un-xfail.

32408

+ * gcc.dg/builtin-object-size-14.c: New testcase.

32409

+ * gcc.dg/strlenopt-14gf.c: Adjust.

32410

+ * gcc.dg/strlenopt-1f.c: Likewise.

32411

+ * gcc.dg/strlenopt-4gf.c: Likewise.

32412

+

32413

+ 2013-12-03 Jakub Jelinek <jakub@redhat.com>

32414

+

32415

+ PR tree-optimization/59362

32416

+ * gcc.c-torture/compile/pr59362.c: New test.

32417

+

32418

+2014-01-09 Richard Earnshaw <rearnsha@arm.com>

32419

+

32420

+ PR rtl-optimization/54300

32421

+ * gcc.target/arm/pr54300.C: New test.

32422

+

32423

+2014-01-08 Martin Jambor <mjambor@suse.cz>

32424

+

32425

+ PR ipa/59610

32426

+ * gcc.dg/ipa/pr59610.c: New test.

32427

+

32428

+2014-01-07 Jakub Jelinek <jakub@redhat.com>

32429

+

32430

+ PR rtl-optimization/58668

32431

+ * gcc.dg/pr58668.c: New test.

32432

+

32433

+ Backported from mainline

32434

+ 2013-12-16 Jakub Jelinek <jakub@redhat.com>

32435

+

32436

+ PR middle-end/58956

32437

+ PR middle-end/59470

32438

+ * gcc.target/i386/pr59470.c: New test.

32439

+

32440

+2014-01-04 Janus Weil <janus@gcc.gnu.org>

32441

+

32442

+ Backport from mainline

32443

+ 2014-01-02 Janus Weil <janus@gcc.gnu.org>

32444

+

32445

+ PR fortran/59654

32446

+ * gfortran.dg/dynamic_dispatch_12.f90: New.

32447

+

32448

+2014-01-03 Joseph Myers <joseph@codesourcery.com>

32449

+

32450

+ * gcc.target/powerpc/rs6000-ldouble-3.c: New test.

32451

+

32452

+2014-01-03 Jakub Jelinek <jakub@redhat.com>

32453

+

32454

+ PR target/59625

32455

+ * gcc.target/i386/pr59625.c: New test.

32456

+

32457

+2014-01-01 Jakub Jelinek <jakub@redhat.com>

32458

+

32459

+ PR rtl-optimization/59647

32460

+ * g++.dg/opt/pr59647.C: New test.

32461

+

32462

+2013-12-31 Janus Weil <janus@gcc.gnu.org>

32463

+

32464

+ Backport from mainline

32465

+ 2013-12-30 Janus Weil <janus@gcc.gnu.org>

32466

+

32467

+ PR fortran/58998

32468

+ * gfortran.dg/generic_28.f90: New.

32469

+

32470

+2013-12-20 Jakub Jelinek <jakub@redhat.com>

32471

+

32472

+ PR c++/59255

32473

+ * g++.dg/tree-prof/pr59255.C: New test.

32474

+

32475

+2013-12-19 James Greenhalgh <james.greenhalgh@arm.com>

32476

+

32477

+ Backport from Mainline

32478

+ 2013-05-01 James Greenhalgh <james.greenhalgh@arm.com>

32479

+

32480

+ * gcc.target/aarch64/scalar_intrinsics.c (force_simd): New.

32481

+ (test_vceqd_s64): Force arguments to SIMD registers.

32482

+ (test_vceqzd_s64): Likewise.

32483

+ (test_vcged_s64): Likewise.

32484

+ (test_vcled_s64): Likewise.

32485

+ (test_vcgezd_s64): Likewise.

32486

+ (test_vcged_u64): Likewise.

32487

+ (test_vcgtd_s64): Likewise.

32488

+ (test_vcltd_s64): Likewise.

32489

+ (test_vcgtzd_s64): Likewise.

32490

+ (test_vcgtd_u64): Likewise.

32491

+ (test_vclezd_s64): Likewise.

32492

+ (test_vcltzd_s64): Likewise.

32493

+ (test_vtst_s64): Likewise.

32494

+ (test_vtst_u64): Likewise.

32495

+

32496

+2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

32497

+ Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

32498

+

32499

+ Backport from mainline

32500

+ 2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

32501

+ * gcc/testsuite/gcc.target/s390/hotpatch-1.c: New test

32502

+ * gcc/testsuite/gcc.target/s390/hotpatch-2.c: New test

32503

+ * gcc/testsuite/gcc.target/s390/hotpatch-3.c: New test

32504

+ * gcc/testsuite/gcc.target/s390/hotpatch-4.c: New test

32505

+ * gcc/testsuite/gcc.target/s390/hotpatch-5.c: New test

32506

+ * gcc/testsuite/gcc.target/s390/hotpatch-6.c: New test

32507

+ * gcc/testsuite/gcc.target/s390/hotpatch-7.c: New test

32508

+ * gcc/testsuite/gcc.target/s390/hotpatch-8.c: New test

32509

+ * gcc/testsuite/gcc.target/s390/hotpatch-9.c: New test

32510

+ * gcc/testsuite/gcc.target/s390/hotpatch-10.c: New test

32511

+ * gcc/testsuite/gcc.target/s390/hotpatch-11.c: New test

32512

+ * gcc/testsuite/gcc.target/s390/hotpatch-12.c: New test

32513

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c: New test

32514

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c: New test

32515

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c: New test

32516

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c: New test

32517

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c: New test

32518

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c: New test

32519

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c: New test

32520

+

32521

+2013-12-18 Janus Weil <janus@gcc.gnu.org>

32522

+

32523

+ Backport from mainline

32524

+ 2013-12-15 Janus Weil <janus@gcc.gnu.org>

32525

+

32526

+ PR fortran/59493

32527

+ * gfortran.dg/unlimited_polymorphic_15.f90: New.

32528

+

32529

+2013-12-15 Uros Bizjak <ubizjak@gmail.com>

32530

+

32531

+ PR testsuite/58630

32532

+ * gcc.target/i386/pr43662.c (dg-options):

32533

+ Add -maccumulate-outgoing-args.

32534

+ * gcc.target/i386/pr43869.c (dg-options): Ditto.

32535

+ * gcc.target/i386/pr57003.c (dg-options): Ditto.

32536

+ * gcc.target/i386/avx-vzeroupper-16.c (dg-options):

32537

+ Remove -mtune=generic and add -maccumulate-outgoing-args instead.

32538

+ * gcc.target/i386/avx-vzeroupper-17.c (dg-options): Ditto.

32539

+ * gcc.target/i386/avx-vzeroupper-18.c (dg-options): Ditto.

32540

+ * gcc.target/x86_64/abi/callabi/func-1.c (dg-options):

32541

+ Add -maccumulate-outgoing-args.

32542

+ * gcc.target/x86_64/abi/callabi/func-2a.c (dg-options): Ditto.

32543

+ * gcc.target/x86_64/abi/callabi/func-2b.c (dg-options): Ditto.

32544

+ * gcc.target/x86_64/abi/callabi/func-indirect.c (dg-options): Ditto.

32545

+ * gcc.target/x86_64/abi/callabi/func-indirect-2a.c (dg-options): Ditto.

32546

+ * gcc.target/x86_64/abi/callabi/func-indirect-2b.c (dg-options): Ditto.

32547

+ * gcc.target/x86_64/abi/callabi/leaf-1.c (dg-options): Ditto.

32548

+ * gcc.target/x86_64/abi/callabi/leaf-2.c (dg-options): Ditto.

32549

+ * gcc.target/x86_64/abi/callabi/pr38891.c (dg-options): Ditto.

32550

+ * gcc.target/x86_64/abi/callabi/vaarg-1.c (dg-options): Ditto.

32551

+ * gcc.target/x86_64/abi/callabi/vaarg-2.c (dg-options): Ditto.

32552

+ * gcc.target/x86_64/abi/callabi/vaarg-3.c (dg-options): Ditto.

32553

+ * gcc.target/x86_64/abi/callabi/vaarg-4a.c (dg-options): Ditto.

32554

+ * gcc.target/x86_64/abi/callabi/vaarg-4b.c (dg-options): Ditto.

32555

+ * gcc.target/x86_64/abi/callabi/vaarg-5a.c (dg-options): Ditto.

32556

+ * gcc.target/x86_64/abi/callabi/vaarg-5b.c (dg-options): Ditto.

32557

+

32558

+2013-12-12 Jakub Jelinek <jakub@redhat.com>

32559

+

32560

+ PR middle-end/59470

32561

+ * g++.dg/opt/pr59470.C: New test.

32562

+

32563

+ PR libgomp/59467

32564

+ * gfortran.dg/gomp/pr59467.f90: New test.

32565

+ * c-c++-common/gomp/pr59467.c: New test.

32566

+

32567

+2013-12-12 Uros Bizjak <ubizjak@gmail.com>

32568

+

32569

+ Backport from mainline

32570

+ 2013-12-12 Ryan Mansfield <rmansfield@qnx.com>

32571

+

32572

+ PR testsuite/59442

32573

+ * gcc.target/i386/sse2-movapd-1.c: Fix alignment attributes.

32574

+ * gcc.target/i386/sse2-movapd-2.c: Likewise.

32575

+ * gcc.target/i386/avx-vmovapd-256-1.c: Likewise.

32576

+ * gcc.target/i386/avx-vmovapd-256-2.c: Likewise.

32577

+

32578

+2013-12-08 Uros Bizjak <ubizjak@gmail.com>

32579

+

32580

+ Backport from mainline

32581

+ 2013-12-06 Uros Bizjak <ubizjak@gmail.com>

32582

+

32583

+ PR target/59405

32584

+ * gcc.target/i386/pr59405.c: New test.

32585

+

32586

+2013-12-06 Jakub Jelinek <jakub@redhat.com>

32587

+

32588

+ PR tree-optimization/59388

32589

+ * gcc.c-torture/execute/pr59388.c: New test.

32590

+

32591

+2013-12-06 Richard Biener <rguenther@suse.de>

32592

+

32593

+ Backport from mainline

32594

+ 2013-11-28 Richard Biener <rguenther@suse.de>

32595

+

32596

+ PR tree-optimization/59330

32597

+ * gcc.dg/torture/pr59330.c: New testcase.

32598

+

32599

+2013-12-06 Richard Biener <rguenther@suse.de>

32600

+

32601

+ Backport from mainline

32602

+ 2013-11-27 Richard Biener <rguenther@suse.de>

32603

+

32604

+ PR tree-optimization/59288

32605

+ * gcc.dg/torture/pr59288.c: New testcase.

32606

+

32607

+ 2013-11-19 Richard Biener <rguenther@suse.de>

32608

+

32609

+ PR tree-optimization/59164

32610

+ * gcc.dg/torture/pr59164.c: New testcase.

32611

+

32612

+ 2013-09-05 Richard Biener <rguenther@suse.de>

32613

+

32614

+ PR tree-optimization/58137

32615

+ * gcc.target/i386/pr58137.c: New testcase.

32616

+

32617

+2013-12-06 Oleg Endo <olegendo@gcc.gnu.org>

32618

+

32619

+ PR target/51244

32620

+ PR target/59343

32621

+ * gcc.target/sh/pr51244-19.c: Adjust test case.

32622

+

32623

+2013-12-05 Richard Biener <rguenther@suse.de>

32624

+

32625

+ Backport from mainline

32626

+ 2013-11-19 Richard Biener <rguenther@suse.de>

32627

+

32628

+ PR middle-end/58956

32629

+ * gcc.dg/torture/pr58956.c: New testcase.

32630

+

32631

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

32632

+

32633

+ PR c++/59268

32634

+ * g++.dg/cpp0x/constexpr-template6.C: New test.

32635

+

32636

+ PR rtl-optimization/58726

32637

+ * gcc.c-torture/execute/pr58726.c: New test.

32638

+

32639

+ PR target/59163

32640

+ * g++.dg/torture/pr59163.C: New test.

32641

+

32642

+2013-12-03 Marek Polacek <polacek@redhat.com>

32643

+

32644

+ Backport from mainline

32645

+ 2013-12-03 Marek Polacek <polacek@redhat.com>

32646

+

32647

+ PR c/59351

32648

+ * gcc.dg/pr59351.c: New test.

32649

+

32650

+2013-12-03 Jakub Jelinek <jakub@redhat.com>

32651

+

32652

+ PR middle-end/59011

32653

+ * gcc.dg/pr59011.c: New test.

32654

+

32655

+ PR target/58864

32656

+ * g++.dg/opt/pr58864.C: New test.

32657

+

32658

+2013-12-02 Jakub Jelinek <jakub@redhat.com>

32659

+

32660

+ PR tree-optimization/59358

32661

+ * gcc.c-torture/execute/pr59358.c: New test.

32662

+

32663

+2013-12-02 Richard Biener <rguenther@suse.de>

32664

+

32665

+ PR tree-optimization/59139

32666

+ * gcc.dg/torture/pr59139.c: New testcase.

32667

+

32668

+2013-11-27 Tom de Vries <tom@codesourcery.com>

32669

+ Marc Glisse <marc.glisse@inria.fr>

32670

+

32671

+ PR c++/59032

32672

+ * c-c++-common/pr59032.c: New testcase.

32673

+

32674

+2013-11-27 Tom de Vries <tom@codesourcery.com>

32675

+ Marc Glisse <marc.glisse@inria.fr>

32676

+

32677

+ PR middle-end/59037

32678

+ * c-c++-common/pr59037.c: New testcase.

32679

+

32680

+2013-11-30 Paul Thomas <pault@gcc.gnu.org>

32681

+

32682

+ Backport from mainline

32683

+ 2013-11-04 Paul Thomas <pault@gcc.gnu.org>

32684

+

32685

+ PR fortran/57445

32686

+ * gfortran.dg/optional_class_1.f90 : New test

32687

+

32688

+2013-11-29 Jakub Jelinek <jakub@redhat.com>

32689

+

32690

+ PR c/59280

32691

+ * c-c++-common/pr59280.c: New test.

32692

+

32693

+2013-11-28 Jakub Jelinek <jakub@redhat.com>

32694

+

32695

+ PR c++/59297

32696

+ * g++.dg/gomp/pr59297.C: New test.

32697

+

32698

+2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

32699

+

32700

+ Backport from mainline

32701

+ 2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

32702

+

32703

+ * gcc.target/arm/vrinta-ce.c: New testcase.

32704

+

32705

+2013-11-28 Uros Bizjak <ubizjak@gmail.com>

32706

+

32707

+ Backport from mainline

32708

+ 2013-11-23 Uros Bizjak <ubizjak@gmail.com>

32709

+

32710

+ PR target/56788

32711

+ * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>:

32712

+ Declare as MULTI_ARG_1_SF instruction.

32713

+ <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction.

32714

+ * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename

32715

+ from *xop_vmfrcz_<mode>.

32716

+ * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss

32717

+ to merge scalar result with __A.

32718

+ (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar

32719

+ result with __A.

32720

+

32721

+2013-11-28 Terry Guo <terry.guo@arm.com>

32722

+

32723

+ Backport mainline r205391

32724

+ 2013-11-26 Terry Guo <terry.guo@arm.com>

32725

+

32726

+ * gcc.target/arm/thumb1-pic-high-reg.c: New case.

32727

+ * gcc.target/arm/thumb1-pic-single-base.c: New case.

32728

+

32729

+2013-11-27 Jakub Jelinek <jakub@redhat.com>

32730

+

32731

+ Backported from mainline

32732

+ 2013-11-27 Jakub Jelinek <jakub@redhat.com>

32733

+

32734

+ PR tree-optimization/59014

32735

+ * gcc.c-torture/execute/pr59014-2.c: New test.

32736

+

32737

+ 2013-11-26 Jakub Jelinek <jakub@redhat.com>

32738

+

32739

+ PR tree-optimization/59014

32740

+ * gcc.c-torture/execute/pr59014.c: New test.

32741

+

32742

+2013-11-27 Eric Botcazou <ebotcazou@adacore.com>

32743

+

32744

+ * gcc.c-torture/execute/20131127-1.c: New test.

32745

+

32746

+2013-11-25 Vidya Praveen <vidyapraveen@arm.com>

32747

+

32748

+ Backport from mainline

32749

+ 2013-10-21 Vidya Praveen <vidyapraveen@arm.com>

32750

+

32751

+ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort().

32752

+ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort() and exit().

32753

+

32754

+2013-11-20 Dominik Vogt <vogt@linux.vnet.ibm.com>

32755

+

32756

+ Backport from mainline

32757

+ * gcc.target/s390/htm-1.c: Rename to ...

32758

+ * gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c: ... this

32759

+ one.

32760

+ * gcc.target/s390/htm-xl-intrin-1.c: Rename to ...

32761

+ * gcc.target/s390/htm-builtins-compile-3.c: ... this one.

32762

+ * gcc.target/s390/htm-builtins-compile-2.c: New testcase.

32763

+ * gcc.target/s390/htm-builtins-1.c: New testcase.

32764

+ * gcc.target/s390/htm-builtins-2.c: New testcase.

32765

+ * gcc.target/s390/s390.exp: Add check for htm machine.

32766

+

32767

+2013-11-19 Richard Biener <rguenther@suse.de>

32768

+

32769

+ PR tree-optimization/57517

32770

+ * gfortran.fortran-torture/compile/pr57517.f90: New testcase.

32771

+ * gcc.dg/torture/pr57517.c: Likewise.

32772

+

32773

+2013-11-19 Richard Biener <rguenther@suse.de>

32774

+

32775

+ Backport from mainline

32776

+ 2013-11-05 Richard Biener <rguenther@suse.de>

32777

+

32778

+ PR middle-end/58941

32779

+ * gcc.dg/torture/pr58941.c: New testcase.

32780

+

32781

+2013-11-18 Richard Biener <rguenther@suse.de>

32782

+

32783

+ Backport from mainline

32784

+ 2013-10-21 Richard Biener <rguenther@suse.de>

32785

+

32786

+ PR tree-optimization/58794

32787

+ * c-c++-common/torture/pr58794-1.c: New testcase.

32788

+ * c-c++-common/torture/pr58794-2.c: Likewise.

32789

+

32790

+ 2013-10-21 Richard Biener <rguenther@suse.de>

32791

+

32792

+ PR middle-end/58742

32793

+ * c-c++-common/fold-divmul-1.c: New testcase.

32794

+

32795

+ 2013-11-06 Richard Biener <rguenther@suse.de>

32796

+

32797

+ PR tree-optimization/58653

32798

+ * gcc.dg/tree-ssa/predcom-6.c: New testcase.

32799

+ * gcc.dg/tree-ssa/predcom-7.c: Likewise.

32800

+

32801

+ PR tree-optimization/59047

32802

+ * gcc.dg/torture/pr59047.c: New testcase.

32803

+

32804

+ 2013-10-15 Richard Biener <rguenther@suse.de>

32805

+

32806

+ PR tree-optimization/58143

32807

+ * gcc.dg/torture/pr58143-1.c: New testcase.

32808

+ * gcc.dg/torture/pr58143-2.c: Likewise.

32809

+ * gcc.dg/torture/pr58143-3.c: Likewise.

32810

+

32811

+2013-11-17 Janus Weil <janus@gcc.gnu.org>

32812

+

32813

+ Backport from mainline

32814

+ 2013-11-07 Janus Weil <janus@gcc.gnu.org>

32815

+

32816

+ PR fortran/58471

32817

+ * gfortran.dg/constructor_9.f90: New.

32818

+

32819

+2013-11-16 Janus Weil <janus@gcc.gnu.org>

32820

+

32821

+ Backport from mainline

32822

+ 2013-09-20 Janus Weil <janus@gcc.gnu.org>

32823

+

32824

+ PR fortran/58099

32825

+ * gfortran.dg/proc_ptr_43.f90: New.

32826

+

32827

+2013-11-16 Paul Thomas <pault@gcc.gnu.org>

32828

+

32829

+ PR fortran/58771

32830

+ * gfortran.dg/derived_external_function_1.f90 : New test

32831

+

32832

+2013-11-14 Uros Bizjak <ubizjak@gmail.com>

32833

+

32834

+ Backport from mainline

32835

+ 2013-11-06 Uros Bizjak <ubizjak@gmail.com>

32836

+

32837

+ PR target/59021

32838

+ * gcc.target/i386/pr59021.c: New test.

32839

+

32840

+2013-11-14 Jakub Jelinek <jakub@redhat.com>

32841

+

32842

+ PR target/59101

32843

+ * gcc.c-torture/execute/pr59101.c: New test.

32844

+

32845

+2013-11-11 Jakub Jelinek <jakub@redhat.com>

32846

+

32847

+ Backported from mainline

32848

+ 2013-11-06 Jakub Jelinek <jakub@redhat.com>

32849

+

32850

+ PR middle-end/58970

32851

+ * gcc.c-torture/compile/pr58970-1.c: New test.

32852

+ * gcc.c-torture/compile/pr58970-2.c: New test.

32853

+

32854

+ 2013-11-05 Jakub Jelinek <jakub@redhat.com>

32855

+

32856

+ PR rtl-optimization/58997

32857

+ * gcc.c-torture/compile/pr58997.c: New test.

32858

+

32859

+2013-11-10 Wei Mi <wmi@google.com>

32860

+

32861

+ * gcc.dg/pr57518.c: Backport regex fix from r200720.

32862

+

32863

+2013-11-07 H.J. Lu <hongjiu.lu@intel.com>

32864

+

32865

+ Backport from mainline

32866

+ 2013-11-07 H.J. Lu <hongjiu.lu@intel.com>

32867

+

32868

+ PR target/59034

32869

+ * gcc.target/i386/pr59034-1.c: New test.

32870

+ * gcc.target/i386/pr59034-2.c: Likewise.

32871

+

32872

+2013-11-06 Wei Mi <wmi@google.com>

32873

+

32874

+ PR regression/58985

32875

+ * gcc.dg/pr57518.c: Add subreg in regexp pattern.

32876

+

32877

+2013-11-05 Steven G. Kargl <kargl@gcc.gnu.org>

32878

+

32879

+ PR fortran/58989

32880

+ * gfortran.dg/reshape_6.f90: New test.

32881

+

32882

+2013-11-05 Jakub Jelinek <jakub@redhat.com>

32883

+

32884

+ PR tree-optimization/58984

32885

+ * gcc.c-torture/execute/pr58984.c: New test.

32886

+

32887

+2013-11-04 Marek Polacek <polacek@redhat.com>

32888

+

32889

+ Backport from mainline

32890

+ 2013-11-04 Marek Polacek <polacek@redhat.com>

32891

+

32892

+ PR c++/58979

32893

+ * g++.dg/diagnostic/pr58979.C: New test.

32894

+

32895

+2013-11-03 H.J. Lu <hongjiu.lu@intel.com>

32896

+

32897

+ Backport from mainline

32898

+ 2013-10-12 H.J. Lu <hongjiu.lu@intel.com>

32899

+

32900

+ PR target/58690

32901

+ * gcc.target/i386/pr58690.c: New test

32902

+

32903

+2013-11-02 Janus Weil <janus@gcc.gnu.org>

32904

+

32905

+ Backport from mainline

32906

+ 2013-09-23 Janus Weil <janus@gcc.gnu.org>

32907

+

32908

+ PR fortran/58355

32909

+ * gfortran.dg/extends_15.f90: New.

32910

+

32911

+2013-10-29 Uros Bizjak <ubizjak@gmail.com>

32912

+

32913

+ Backport from mainline

32914

+ 2013-08-08 Richard Sandiford <rdsandiford@googlemail.com>

32915

+

32916

+ PR rtl-optimization/58079

32917

+ * gcc.dg/torture/pr58079.c: New test.

32918

+

32919

+2013-10-28 Tom de Vries <tom@codesourcery.com>

32920

+

32921

+ * gcc.target/arm/require-pic-register-loc.c: New test.

32922

+

32923

+2013-10-26 Uros Bizjak <ubizjak@gmail.com>

32924

+

32925

+ Backport from mainline

32926

+ 2013-10-22 Uros Bizjak <ubizjak@gmail.com>

32927

+

32928

+ PR target/58779

32929

+ * gcc.target/i386/pr30315.c: Remove MINUSCC, DECCC, MINUSCCONLY

32930

+ and MINUSCCZEXT defines. Update scan-assembler dg directive.

32931

+ * gcc.dg/torture/pr58779.c: New test.

32932

+

32933

+2013-10-25 Richard Henderson <rth@redhat.com>

32934

+

32935

+ PR rtl/58542

32936

+ * gcc.dg/atomic-store-6.c: New.

32937

+

32938

+2013-10-25 Tom de Vries <tom@codesourcery.com>

32939

+

32940

+ PR c++/58282

32941

+ * g++.dg/tm/noexcept-6.C: New test.

32942

+

32943

+2013-10-25 Eric Botcazou <ebotcazou@adacore.com>

32944

+

32945

+ * gcc.c-torture/execute/pr58831.c: New test.

32946

+

32947

+2013-10-23 Tom de Vries <tom@codesourcery.com>

32948

+

32949

+ PR tree-optimization/58805

32950

+ * gcc.dg/pr58805.c: New test.

32951

+

32952

+2013-10-23 Richard Biener <rguenther@suse.de>

32953

+

32954

+ * gcc.dg/torture/pr58830.c: New testcase.

32955

+

32956

+ Backport from mainline

32957

+ 2013-06-24 Richard Biener <rguenther@suse.de>

32958

+

32959

+ PR tree-optimization/57488

32960

+ * gcc.dg/torture/pr57488.c: New testcase.

32961

+

32962

+2013-10-19 Oleg Endo <olegendo@gcc.gnu.org>

32963

+

32964

+ * gcc.target/sh/pr54089-3.c: Fix test for load of constant 31.

32965

+

32966

+2013-10-17 Paolo Carlini <paolo.carlini@oracle.com>

32967

+

32968

+ PR c++/58596

32969

+ * g++.dg/cpp0x/lambda/lambda-nsdmi5.C: New

32970

+

32971

+2013-10-16 Paolo Carlini <paolo.carlini@oracle.com>

32972

+

32973

+ PR c++/58633

32974

+ * g++.dg/cpp0x/decltype57.C: New.

32975

+ * g++.dg/cpp0x/enum18.C: Revert r174385 changes.

32976

+

32977

2013-10-16 Release Manager

32978

32979

* GCC 4.8.2 released.

32980

@@ -39,9 +1753,9 @@

32981

Backport from mainline

32982

2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

32983

32984

- * gcc.target/s390/htm-1.c: New file.

32985

- * gcc.target/s390/htm-nofloat-1.c: New file.

32986

- * gcc.target/s390/htm-xl-intrin-1.c: New file.

32987

+ * gcc.target/s390/htm-1.c: New file.

32988

+ * gcc.target/s390/htm-nofloat-1.c: New file.

32989

+ * gcc.target/s390/htm-xl-intrin-1.c: New file.

32990

32991

2013-10-04 Tobias Burnus <burnus@net-b.de>

32992

32993

@@ -307,8 +2021,8 @@

32994

Backport from mainline

32995

2013-08-12 Perez Read <netfirewall@gmail.com>

32996

32997

- PR target/58132

32998

- * gcc.target/i386/movabs-1.c: New test.

32999

+ PR target/58132

33000

+ * gcc.target/i386/movabs-1.c: New test.

33001

33002

2013-08-11 Janus Weil <janus@gcc.gnu.org>

33003

33004

@@ -494,7 +2208,7 @@

33005

2013-06-19 Wei Mi <wmi@google.com>

33006

33007

PR rtl-optimization/57518

33008

- * testsuite/gcc.dg/pr57518.c: New test.

33009

+ * gcc.dg/pr57518.c: New test.

33010

33011

2013-06-11 Tobias Burnus <burnus@net-b.de>

33012

33013

@@ -623,8 +2337,8 @@

33014

33015

2013-05-09 Martin Jambor <mjambor@suse.cz>

33016

33017

- PR middle-end/56988

33018

- * gcc.dg/ipa/pr56988.c: New test.

33019

+ PR middle-end/56988

33020

+ * gcc.dg/ipa/pr56988.c: New test.

33021

33022

2013-05-08 Marc Glisse <marc.glisse@inria.fr>

33023

33024

@@ -701,7 +2415,7 @@

33025

2013-04-25 Marek Polacek <polacek@redhat.com>

33026

33027

PR tree-optimization/57066

33028

- * gcc.dg/torture/builtin-logb-1.c: Adjust testcase.

33029

+ * gcc.dg/torture/builtin-logb-1.c: Adjust testcase.

33030

33031

2013-05-02 Jakub Jelinek <jakub@redhat.com>

33032

33033

@@ -727,8 +2441,8 @@

33034

Backport from mainline

33035

2013-04-24 Vladimir Makarov <vmakarov@redhat.com>

33036

33037

- PR rtl-optimizations/57046

33038

- * gcc.target/i386/pr57046.c: New test.

33039

+ PR rtl-optimizations/57046

33040

+ * gcc.target/i386/pr57046.c: New test.

33041

33042

2013-05-02 Vladimir Makarov <vmakarov@redhat.com>

33043

33044

@@ -735,8 +2449,8 @@

33045

Backport from mainline

33046

2013-04-22 Vladimir Makarov <vmakarov@redhat.com>

33047

33048

- PR target/57018

33049

- * gcc.target/i386/pr57018.c: New test.

33050

+ PR target/57018

33051

+ * gcc.target/i386/pr57018.c: New test.

33052

33053

2013-05-02 Vladimir Makarov <vmakarov@redhat.com>

33054

33055

@@ -743,8 +2457,8 @@

33056

Backport from mainline

33057

2013-04-18 Jakub Jelinek <jakub@redhat.com>

33058

33059

- PR rtl-optimization/56999

33060

- * g++.dg/opt/pr56999.C: New test.

33061

+ PR rtl-optimization/56999

33062

+ * g++.dg/opt/pr56999.C: New test.

33063

33064

2013-05-02 Vladimir Makarov <vmakarov@redhat.com>

33065

33066

@@ -751,8 +2465,8 @@

33067

Backport from mainline

33068

2013-04-19 Vladimir Makarov <vmakarov@redhat.com>

33069

33070

- PR rtl-optimization/56847

33071

- * gcc.dg/pr56847.c: New test.

33072

+ PR rtl-optimization/56847

33073

+ * gcc.dg/pr56847.c: New test.

33074

33075

2013-05-02 Ian Bolton <ian.bolton@arm.com>

33076

33077

@@ -1102,7 +2816,7 @@

33078

2013-03-29 Tobias Burnus <burnus@net-b.de>

33079

33080

PR fortran/56737

33081

- * testsuite/gfortran.dg/fmt_cache_3.f90: New.

33082

+ * gfortran.dg/fmt_cache_3.f90: New.

33083

33084

2013-04-02 Richard Biener <rguenther@suse.de>

33085

33086

@@ -1636,7 +3350,7 @@

33087

2013-02-20 Jan Hubicka <jh@suse.cz>

33088

33089

PR tree-optimization/56265

33090

- * testsuite/g++.dg/ipa/devirt-11.C: New testcase.

33091

+ * g++.dg/ipa/devirt-11.C: New testcase.

33092

33093

2013-02-20 Richard Biener <rguenther@suse.de>

33094

33095

@@ -1823,11 +3537,9 @@

33096

33097

Avoid instrumenting duplicated memory access in the same basic block

33098

* c-c++-common/asan/no-redundant-instrumentation-1.c: New test.

33099

- * testsuite/c-c++-common/asan/no-redundant-instrumentation-2.c:

33100

- Likewise.

33101

- * testsuite/c-c++-common/asan/no-redundant-instrumentation-3.c:

33102

- Likewise.

33103

- * testsuite/c-c++-common/asan/inc.c: Likewise.

33104

+ * c-c++-common/asan/no-redundant-instrumentation-2.c: Likewise.

33105

+ * c-c++-common/asan/no-redundant-instrumentation-3.c: Likewise.

33106

+ * c-c++-common/asan/inc.c: Likewise.

33107

33108

2013-02-12 Vladimir Makarov <vmakarov@redhat.com>

33109

33110

Index: gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90

33111

===================================================================

33112

--- a/src/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 (.../tags/gcc_4_8_2_release)

33113

+++ b/src/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 (.../branches/gcc-4_8-branch)

33114

@@ -0,0 +1,13 @@

33115

+SUBROUTINE cal_helicity (uh, ph, phb, wavg, ims, ime, its, ite)

33116

+ INTEGER, INTENT( IN ) :: ims, ime, its, ite

33117

+ REAL, DIMENSION( ims:ime), INTENT( IN ) :: ph, phb, wavg

33118

+ REAL, DIMENSION( ims:ime), INTENT( INOUT ) :: uh

33119

+ INTEGER :: i

33120

+ REAL :: zu

33121

+ DO i = its, ite

33122

+ zu = (ph(i ) + phb(i)) + (ph(i-1) + phb(i-1))

33123

+ IF (wavg(i) .GT. 0) THEN

33124

+ uh(i) = uh(i) + zu

33125

+ ENDIF

33126

+ END DO

33127

+END SUBROUTINE cal_helicity

33128

Index: gcc/testsuite/g++.dg/ext/attribute-test-2.C

33129

===================================================================

33130

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-2.C (.../tags/gcc_4_8_2_release)

33131

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-2.C (.../branches/gcc-4_8-branch)

33132

@@ -50,3 +50,4 @@

33133

33134

/* Ignore a warning that is irrelevant to the purpose of this test. */

33135

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

33136

+/* { dg-prune-output "changes the ABI" } */

33137

Index: gcc/testsuite/g++.dg/ext/attribute-test-3.C

33138

===================================================================

33139

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-3.C (.../tags/gcc_4_8_2_release)

33140

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-3.C (.../branches/gcc-4_8-branch)

33141

@@ -52,3 +52,4 @@

33142

33143

/* Ignore a warning that is irrelevant to the purpose of this test. */

33144

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

33145

+/* { dg-prune-output "changes the ABI" } */

33146

Index: gcc/testsuite/g++.dg/ext/traits1.C

33147

===================================================================

33148

--- a/src/gcc/testsuite/g++.dg/ext/traits1.C (.../tags/gcc_4_8_2_release)

33149

+++ b/src/gcc/testsuite/g++.dg/ext/traits1.C (.../branches/gcc-4_8-branch)

33150

@@ -0,0 +1,4 @@

33151

+// PR c++/58504

33152

+

33153

+template<bool = __has_nothrow_assign(void)> struct A {};

33154

+A<> a;

33155

Index: gcc/testsuite/g++.dg/ext/attribute-test-4.C

33156

===================================================================

33157

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-4.C (.../tags/gcc_4_8_2_release)

33158

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-4.C (.../branches/gcc-4_8-branch)

33159

@@ -49,3 +49,4 @@

33160

33161

/* Ignore a warning that is irrelevant to the purpose of this test. */

33162

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

33163

+/* { dg-prune-output "changes the ABI" } */

33164

Index: gcc/testsuite/g++.dg/ext/stmtexpr15.C

33165

===================================================================

33166

--- a/src/gcc/testsuite/g++.dg/ext/stmtexpr15.C (.../tags/gcc_4_8_2_release)

33167

+++ b/src/gcc/testsuite/g++.dg/ext/stmtexpr15.C (.../branches/gcc-4_8-branch)

33168

@@ -0,0 +1,7 @@

33169

+// PR c++/59097

33170

+// { dg-options "" }

33171

+

33172

+void foo()

33173

+{

33174

+ int x[({ return; })]; // { dg-error "non-integral" }

33175

+}

33176

Index: gcc/testsuite/g++.dg/ext/vector25.C

33177

===================================================================

33178

--- a/src/gcc/testsuite/g++.dg/ext/vector25.C (.../tags/gcc_4_8_2_release)

33179

+++ b/src/gcc/testsuite/g++.dg/ext/vector25.C (.../branches/gcc-4_8-branch)

33180

@@ -0,0 +1,6 @@

33181

+volatile int i __attribute__((vector_size(8)));

33182

+

33183

+void foo()

33184

+{

33185

+ i += i;

33186

+}

33187

Index: gcc/testsuite/g++.dg/ext/builtin-bswap1.C

33188

===================================================================

33189

--- a/src/gcc/testsuite/g++.dg/ext/builtin-bswap1.C (.../tags/gcc_4_8_2_release)

33190

+++ b/src/gcc/testsuite/g++.dg/ext/builtin-bswap1.C (.../branches/gcc-4_8-branch)

33191

@@ -0,0 +1,22 @@

33192

+// PR c/37743

33193

+// { dg-do compile }

33194

+

33195

+#if defined(__UINT32_TYPE__) && defined(__INT32_TYPE__)

33196

+

33197

+void foo (__UINT32_TYPE__);

33198

+void foo (__INT32_TYPE__);

33199

+

33200

+void

33201

+bar (__UINT32_TYPE__ x)

33202

+{

33203

+ foo (__builtin_bswap32 (x));

33204

+}

33205

+

33206

+#else

33207

+

33208

+void

33209

+bar ()

33210

+{

33211

+}

33212

+

33213

+#endif

33214

Index: gcc/testsuite/g++.dg/ext/attrib48.C

33215

===================================================================

33216

--- a/src/gcc/testsuite/g++.dg/ext/attrib48.C (.../tags/gcc_4_8_2_release)

33217

+++ b/src/gcc/testsuite/g++.dg/ext/attrib48.C (.../branches/gcc-4_8-branch)

33218

@@ -0,0 +1,6 @@

33219

+// PR c++/54652

33220

+

33221

+typedef unsigned L __attribute__ ((aligned));

33222

+typedef unsigned L __attribute__ ((aligned));

33223

+

33224

+L l;

33225

Index: gcc/testsuite/g++.dg/ext/vector27.C

33226

===================================================================

33227

--- a/src/gcc/testsuite/g++.dg/ext/vector27.C (.../tags/gcc_4_8_2_release)

33228

+++ b/src/gcc/testsuite/g++.dg/ext/vector27.C (.../branches/gcc-4_8-branch)

33229

@@ -0,0 +1,7 @@

33230

+// PR c++/58845

33231

+

33232

+void foo()

33233

+{

33234

+ int v __attribute__((vector_size(8)));

33235

+ v = v || v; // { dg-bogus "" "" { xfail *-*-* } }

33236

+}

33237

Index: gcc/testsuite/g++.dg/ext/timevar2.C

33238

===================================================================

33239

--- a/src/gcc/testsuite/g++.dg/ext/timevar2.C (.../tags/gcc_4_8_2_release)

33240

+++ b/src/gcc/testsuite/g++.dg/ext/timevar2.C (.../branches/gcc-4_8-branch)

33241

@@ -0,0 +1,14 @@

33242

+// PR c++/57524

33243

+// { dg-options "-ftime-report" }

33244

+// { dg-prune-output "wall" }

33245

+// { dg-prune-output "times" }

33246

+// { dg-prune-output "TOTAL" }

33247

+// { dg-prune-output "checks" }

33248

+

33249

+namespace detail {

33250

+namespace indirect_traits {}

33251

+using namespace indirect_traits;

33252

+void fn1() {

33253

+using namespace detail;

33254

+}

33255

+}

33256

Index: gcc/testsuite/g++.dg/ext/attribute-test-1.C

33257

===================================================================

33258

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-1.C (.../tags/gcc_4_8_2_release)

33259

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-1.C (.../branches/gcc-4_8-branch)

33260

@@ -36,3 +36,4 @@

33261

33262

/* Ignore a warning that is irrelevant to the purpose of this test. */

33263

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

33264

+/* { dg-prune-output "changes the ABI" } */

33265

Index: gcc/testsuite/g++.dg/vect/pr60729.cc

33266

===================================================================

33267

--- a/src/gcc/testsuite/g++.dg/vect/pr60729.cc (.../tags/gcc_4_8_2_release)

33268

+++ b/src/gcc/testsuite/g++.dg/vect/pr60729.cc (.../branches/gcc-4_8-branch)

33269

@@ -0,0 +1,10 @@

33270

+// { dg-do compile }

33271

+// { dg-additional-options "-ftrapv" }

33272

+

33273

+void doSomething(int dim, double *Y, double *A)

33274

+{

33275

+ for (int k=0; k<dim; k++)

33276

+ Y[k] += __builtin_fabs (A[k]);

33277

+}

33278

+

33279

+// { dg-final { cleanup-tree-dump "vect" } }

33280

Index: gcc/testsuite/g++.dg/opt/pr59647.C

33281

===================================================================

33282

--- a/src/gcc/testsuite/g++.dg/opt/pr59647.C (.../tags/gcc_4_8_2_release)

33283

+++ b/src/gcc/testsuite/g++.dg/opt/pr59647.C (.../branches/gcc-4_8-branch)

33284

@@ -0,0 +1,32 @@

33285

+// PR rtl-optimization/59647

33286

+// { dg-do compile }

33287

+// { dg-options "-O2 -fno-tree-vrp" }

33288

+// { dg-additional-options "-msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ia32 } } }

33289

+

33290

+void f1 (int);

33291

+void f2 ();

33292

+double f3 (int);

33293

+

33294

+struct A

33295

+{

33296

+ int f4 () const

33297

+ {

33298

+ if (a == 0)

33299

+ return 1;

33300

+ return 0;

33301

+ }

33302

+ unsigned f5 ()

33303

+ {

33304

+ if (!f4 ())

33305

+ f2 ();

33306

+ return a;

33307

+ }

33308

+ int a;

33309

+};

33310

+

33311

+void

33312

+f6 (A *x)

33313

+{

33314

+ unsigned b = x->f5 ();

33315

+ f1 (b - 1 - f3 (x->f5 () - 1U));

33316

+}

33317

Index: gcc/testsuite/g++.dg/opt/pr59470.C

33318

===================================================================

33319

--- a/src/gcc/testsuite/g++.dg/opt/pr59470.C (.../tags/gcc_4_8_2_release)

33320

+++ b/src/gcc/testsuite/g++.dg/opt/pr59470.C (.../branches/gcc-4_8-branch)

33321

@@ -0,0 +1,188 @@

33322

+// PR middle-end/59470

33323

+// { dg-do run }

33324

+// { dg-options "-O2 -fstack-protector" }

33325

+// { dg-additional-options "-fPIC" { target fpic } }

33326

+// { dg-require-effective-target fstack_protector }

33327

+

33328

+struct A

33329

+{

33330

+ int a1;

33331

+ A () throw () : a1 (0) {}

33332

+};

33333

+

33334

+struct B

33335

+{

33336

+ unsigned int b1 () throw ();

33337

+};

33338

+

33339

+__attribute__((noinline, noclone)) unsigned int

33340

+B::b1 () throw ()

33341

+{

33342

+ asm volatile ("" : : : "memory");

33343

+ return 0;

33344

+}

33345

+

33346

+struct C

33347

+{

33348

+ const A **c1;

33349

+ void c2 (const A *, unsigned int);

33350

+};

33351

+

33352

+__attribute__((noinline, noclone)) void

33353

+C::c2 (const A *, unsigned int)

33354

+{

33355

+ asm volatile ("" : : : "memory");

33356

+}

33357

+

33358

+struct D

33359

+{

33360

+ C *d1;

33361

+};

33362

+

33363

+struct E

33364

+{

33365

+ int e1;

33366

+ int e2;

33367

+ D e3;

33368

+};

33369

+

33370

+struct F

33371

+{

33372

+ virtual int f1 (const char * s, int n);

33373

+};

33374

+

33375

+struct G

33376

+{

33377

+ F *g1;

33378

+ bool g2;

33379

+ G & g3 (const char * ws, int len)

33380

+ {

33381

+ if (__builtin_expect (!g2, true)

33382

+ && __builtin_expect (this->g1->f1 (ws, len) != len, false))

33383

+ g2 = true;

33384

+ return *this;

33385

+ }

33386

+};

33387

+

33388

+struct H : public A

33389

+{

33390

+ const char *h1;

33391

+ unsigned int h2;

33392

+ bool h3;

33393

+ const char *h4;

33394

+ char h5;

33395

+ char h6;

33396

+ char h7[31];

33397

+ bool h8;

33398

+ H () : h1 (0), h2 (0), h4 (0), h5 (0), h6 (0), h8 (false) {}

33399

+ void h9 (const D &) __attribute__((noinline, noclone));

33400

+};

33401

+

33402

+void

33403

+H::h9 (const D &)

33404

+{

33405

+ h3 = true;

33406

+ __builtin_memset (h7, 0, sizeof (h7));

33407

+ asm volatile ("" : : : "memory");

33408

+};

33409

+

33410

+B b;

33411

+

33412

+inline const H *

33413

+foo (const D &x)

33414

+{

33415

+ const unsigned int i = b.b1 ();

33416

+ const A **j = x.d1->c1;

33417

+ if (!j[i])

33418

+ {

33419

+ H *k = 0;

33420

+ try

33421

+ {

33422

+ k = new H;

33423

+ k->h9 (x);

33424

+ }

33425

+ catch (...)

33426

+ {

33427

+ }

33428

+ x.d1->c2 (k, i);

33429

+ }

33430

+ return static_cast <const H *>(j[i]);

33431

+}

33432

+

33433

+__attribute__((noinline, noclone)) int

33434

+bar (char *x, unsigned long v, const char *y, int z, bool w)

33435

+{

33436

+ asm volatile ("" : : "r" (x), "r" (v), "r" (y) : "memory");

33437

+ asm volatile ("" : : "r" (z), "r" (w) : "memory");

33438

+ return 8;

33439

+}

33440

+

33441

+__attribute__((noinline, noclone)) void

33442

+baz (void *z, const char *g, unsigned int h, char s, E &e, char *n, char *c, int &l)

33443

+{

33444

+ asm volatile ("" : : "r" (z), "r" (g), "r" (h) : "memory");

33445

+ asm volatile ("" : : "r" (s), "r" (&e), "r" (n) : "memory");

33446

+ asm volatile ("" : : "r" (c), "r" (&l) : "memory");

33447

+ if (n == c)

33448

+ __builtin_abort ();

33449

+ int i = 0;

33450

+ asm ("" : "+r" (i));

33451

+ if (i == 0)

33452

+ __builtin_exit (0);

33453

+}

33454

+

33455

+__attribute__((noinline, noclone)) G

33456

+test (void *z, G s, E &x, char, long v)

33457

+{

33458

+ const D &d = x.e3;

33459

+ const H *h = foo (d);

33460

+ const char *q = h->h7;

33461

+ const int f = x.e2;

33462

+ const int i = 5 * sizeof (long);

33463

+ char *c = static_cast <char *>(__builtin_alloca (i));

33464

+ const int b = f & 74;

33465

+ const bool e = (b != 64 && b != 8);

33466

+ const unsigned long u = ((v > 0 || !e) ? (unsigned long) v : -(unsigned long) v);

33467

+ int l = bar (c + i, u, q, f, e);

33468

+ c += i - l;

33469

+ if (h->h3)

33470

+ {

33471

+ char *c2 = static_cast <char *>(__builtin_alloca ((l + 1) * 2));

33472

+ baz (z, h->h1, h->h2, h->h6, x, c2 + 2, c, l);

33473

+ c = c2 + 2;

33474

+ }

33475

+ if (__builtin_expect (e, true))

33476

+ {

33477

+ }

33478

+ else if ((f & 4096) && v)

33479

+ {

33480

+ {

33481

+ const bool m = f & 176;

33482

+ *--c = q[m];

33483

+ *--c = q[1];

33484

+ }

33485

+ }

33486

+ const int w = x.e1;

33487

+ if (w > l)

33488

+ {

33489

+ char * c3 = static_cast <char *>(__builtin_alloca (w));

33490

+ c = c3;

33491

+ }

33492

+ return s.g3 (c, l);

33493

+}

33494

+

33495

+int

33496

+main ()

33497

+{

33498

+ H h;

33499

+ const A *j[1];

33500

+ C c;

33501

+ G g;

33502

+ E e;

33503

+ h.h9 (e.e3);

33504

+ j[0] = &h;

33505

+ c.c1 = j;

33506

+ e.e3.d1 = &c;

33507

+ test (0, g, e, 0, 0);

33508

+ __builtin_abort ();

33509

+}

33510

Index: gcc/testsuite/g++.dg/opt/pr58864.C

33511

===================================================================

33512

--- a/src/gcc/testsuite/g++.dg/opt/pr58864.C (.../tags/gcc_4_8_2_release)

33513

+++ b/src/gcc/testsuite/g++.dg/opt/pr58864.C (.../branches/gcc-4_8-branch)

33514

@@ -0,0 +1,21 @@

33515

+// PR target/58864

33516

+// { dg-do compile }

33517

+// { dg-options "-Os" }

33518

+// { dg-additional-options "-march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } }

33519

+

33520

+struct A { A (); ~A (); };

33521

+struct B { B (); };

33522

+

33523

+float d, e;

33524

+

33525

+void

33526

+foo ()

33527

+{

33528

+ A a;

33529

+ float c = d;

33530

+ while (1)

33531

+ {

33532

+ B b;

33533

+ e = c ? -c : 0;

33534

+ }

33535

+}

33536

Index: gcc/testsuite/g++.dg/tree-prof/pr59255.C

33537

===================================================================

33538

--- a/src/gcc/testsuite/g++.dg/tree-prof/pr59255.C (.../tags/gcc_4_8_2_release)

33539

+++ b/src/gcc/testsuite/g++.dg/tree-prof/pr59255.C (.../branches/gcc-4_8-branch)

33540

@@ -0,0 +1,29 @@

33541

+// PR c++/59255

33542

+// { dg-options "-O2 -std=c++11" }

33543

+

33544

+struct S

33545

+{

33546

+ __attribute__((noinline, noclone)) ~S () noexcept (true)

33547

+ {

33548

+ if (fn)

33549

+ fn (1);

33550

+ }

33551

+ void (*fn) (int);

33552

+};

33553

+

33554

+__attribute__((noinline, noclone)) void

33555

+foo (int x)

33556

+{

33557

+ if (x != 1)

33558

+ throw 1;

33559

+}

33560

+

33561

+int

33562

+main ()

33563

+{

33564

+ for (int i = 0; i < 100; i++)

33565

+ {

33566

+ S s;

33567

+ s.fn = foo;

33568

+ }

33569

+}

33570

Index: gcc/testsuite/g++.dg/gomp/for-20.C

33571

===================================================================

33572

--- a/src/gcc/testsuite/g++.dg/gomp/for-20.C (.../tags/gcc_4_8_2_release)

33573

+++ b/src/gcc/testsuite/g++.dg/gomp/for-20.C (.../branches/gcc-4_8-branch)

33574

@@ -0,0 +1,16 @@

33575

+// PR c++/60146

33576

+// { dg-do compile }

33577

+// { dg-options -fopenmp }

33578

+

33579

+int foo() { return 0; }

33580

+

33581

+template<typename T> void bar()

33582

+{

33583

+#pragma omp parallel for

33584

+ for (T i = foo(); i < 8; ++i) {}

33585

+}

33586

+

33587

+void baz()

33588

+{

33589

+ bar<int>();

33590

+}

33591

Index: gcc/testsuite/g++.dg/gomp/pr59297.C

33592

===================================================================

33593

--- a/src/gcc/testsuite/g++.dg/gomp/pr59297.C (.../tags/gcc_4_8_2_release)

33594

+++ b/src/gcc/testsuite/g++.dg/gomp/pr59297.C (.../branches/gcc-4_8-branch)

33595

@@ -0,0 +1,25 @@

33596

+// PR c++/59297

33597

+// { dg-do compile }

33598

+// { dg-options "-fopenmp" }

33599

+

33600

+template <typename T>

33601

+struct A

33602

+{

33603

+ ~A ();

33604

+ const T &operator[] (int) const;

33605

+};

33606

+

33607

+struct B

33608

+{

33609

+ int &operator () (A <int>);

33610

+};

33611

+

33612

+void

33613

+foo (B &x, int &z)

33614

+{

33615

+ A<A<int> > y;

33616

+ #pragma omp atomic

33617

+ x (y[0]) += 1;

33618

+ #pragma omp atomic

33619

+ z += x(y[1]);

33620

+}

33621

Index: gcc/testsuite/g++.dg/diagnostic/pr59838.C

33622

===================================================================

33623

--- a/src/gcc/testsuite/g++.dg/diagnostic/pr59838.C (.../tags/gcc_4_8_2_release)

33624

+++ b/src/gcc/testsuite/g++.dg/diagnostic/pr59838.C (.../branches/gcc-4_8-branch)

33625

@@ -0,0 +1,4 @@

33626

+// PR c++/59838

33627

+// { dg-do compile }

33628

+

33629

+enum E { a, b = (E) a }; // { dg-error "conversion to incomplete type" }

33630

Index: gcc/testsuite/g++.dg/diagnostic/pr58979.C

33631

===================================================================

33632

--- a/src/gcc/testsuite/g++.dg/diagnostic/pr58979.C (.../tags/gcc_4_8_2_release)

33633

+++ b/src/gcc/testsuite/g++.dg/diagnostic/pr58979.C (.../branches/gcc-4_8-branch)

33634

@@ -0,0 +1,4 @@

33635

+// PR c++/58979

33636

+// { dg-do compile }

33637

+

33638

+int i = 0->*0; // { dg-error "invalid type argument of" }

33639

Index: gcc/testsuite/g++.dg/conversion/simd1.C

33640

===================================================================

33641

--- a/src/gcc/testsuite/g++.dg/conversion/simd1.C (.../tags/gcc_4_8_2_release)

33642

+++ b/src/gcc/testsuite/g++.dg/conversion/simd1.C (.../branches/gcc-4_8-branch)

33643

@@ -1,4 +1,5 @@

33644

/* { dg-do compile } */

33645

+/* { dg-options "-msse2" { target { i?86-*-* x86_64-*-* } } } */

33646

33647

/* Test overload resolution of vector types.

33648

From Janis Johnson and Paolo Bonzini, based on PR/16882 */

33649

@@ -17,7 +18,7 @@

33650

void foo ()

33651

{

33652

vss = vld(i, vscp); /* { dg-error "no matching function for call" } */

33653

- // { dg-message "candidate" "candidate note" { target *-*-* } 19 }

33654

+ // { dg-message "candidate" "candidate note" { target *-*-* } 20 }

33655

vss = vld(i, vssp);

33656

vss = vld(i, cvssp);

33657

}

33658

Index: gcc/testsuite/g++.dg/tls/thread_local8.C

33659

===================================================================

33660

--- a/src/gcc/testsuite/g++.dg/tls/thread_local8.C (.../tags/gcc_4_8_2_release)

33661

+++ b/src/gcc/testsuite/g++.dg/tls/thread_local8.C (.../branches/gcc-4_8-branch)

33662

@@ -0,0 +1,12 @@

33663

+// PR c++/55800

33664

+// { dg-options "-std=c++11" }

33665

+// { dg-require-alias "" }

33666

+// { dg-require-effective-target tls }

33667

+// { dg-final { scan-assembler "_ZTH12foo_instance" { target tls_native } } }

33668

+

33669

+struct foo

33670

+{

33671

+ foo();

33672

+};

33673

+

33674

+thread_local foo foo_instance;

33675

Index: gcc/testsuite/g++.dg/tls/thread_local-ice2.C

33676

===================================================================

33677

--- a/src/gcc/testsuite/g++.dg/tls/thread_local-ice2.C (.../tags/gcc_4_8_2_release)

33678

+++ b/src/gcc/testsuite/g++.dg/tls/thread_local-ice2.C (.../branches/gcc-4_8-branch)

33679

@@ -0,0 +1,11 @@

33680

+// PR c++/58672

33681

+// { dg-options "-std=c++11" }

33682

+// { dg-require-effective-target tls }

33683

+

33684

+struct A

33685

+{

33686

+ A(int);

33687

+ i; // { dg-error "" }

33688

+};

33689

+

33690

+thread_local A a(0);

33691

Index: gcc/testsuite/g++.dg/pr60769.C

33692

===================================================================

33693

--- a/src/gcc/testsuite/g++.dg/pr60769.C (.../tags/gcc_4_8_2_release)

33694

+++ b/src/gcc/testsuite/g++.dg/pr60769.C (.../branches/gcc-4_8-branch)

33695

@@ -0,0 +1,43 @@

33696

+/* { dg-do compile } */

33697

+/* { dg-options "-O" } */

33698

+

33699

+template <class T> void fun(T);

33700

+struct B {};

33701

+struct R {

33702

+ int *x;

33703

+ B f;

33704

+};

33705

+R v(int &, R);

33706

+void rfun(R &);

33707

+struct A {

33708

+ void m_fn2(R p1) {

33709

+ R a = p1;

33710

+ rfun(p1);

33711

+ fun(this);

33712

+ fun(a);

33713

+ }

33714

+};

33715

+struct J {

33716

+ A ep;

33717

+ A ap;

33718

+ int c2a;

33719

+ void m_fn1(R &p2) {

33720

+ R d, e, b;

33721

+ v(c2a, p2);

33722

+ e = v(c2a, b);

33723

+ ap.m_fn2(e);

33724

+ v(c2a, p2);

33725

+ d = v(c2a, b);

33726

+ ep.m_fn2(d);

33727

+ }

33728

+};

33729

+struct N {

33730

+ int &p_;

33731

+ J cfo;

33732

+};

33733

+void fn3(N&n) {

33734

+ R h;

33735

+ n.cfo.m_fn1(h);

33736

+}

33737

+extern N &c;

33738

+void fn1() { fn3(c); }

33739

Index: gcc/testsuite/g++.dg/tm/pr60004.C

33740

===================================================================

33741

--- a/src/gcc/testsuite/g++.dg/tm/pr60004.C (.../tags/gcc_4_8_2_release)

33742

+++ b/src/gcc/testsuite/g++.dg/tm/pr60004.C (.../branches/gcc-4_8-branch)

33743

@@ -0,0 +1,10 @@

33744

+// { dg-do compile }

33745

+// { dg-options "-fgnu-tm" }

33746

+

33747

+int a;

33748

+int f() {

33749

+ __transaction_atomic {

33750

+ if (a == 5)

33751

+ return 1;

33752

+ }

33753

+}

33754

Index: gcc/testsuite/g++.dg/tm/noexcept-6.C

33755

===================================================================

33756

--- a/src/gcc/testsuite/g++.dg/tm/noexcept-6.C (.../tags/gcc_4_8_2_release)

33757

+++ b/src/gcc/testsuite/g++.dg/tm/noexcept-6.C (.../branches/gcc-4_8-branch)

33758

@@ -0,0 +1,23 @@

33759

+// { dg-do compile }

33760

+// { dg-options "-fno-exceptions -fgnu-tm -O -std=c++0x -fdump-tree-tmlower" }

33761

+

33762

+struct TrueFalse

33763

+{

33764

+ static constexpr bool v() { return true; }

33765

+};

33766

+

33767

+int global;

33768

+

33769

+template<typename T> int foo()

33770

+{

33771

+ return __transaction_atomic noexcept(T::v()) (global + 1);

33772

+}

33773

+

33774

+int f1()

33775

+{

33776

+ return foo<TrueFalse>();

33777

+}

33778

+

33779

+/* { dg-final { scan-tree-dump-times "eh_must_not_throw" 0 "tmlower" } } */

33780

+/* { dg-final { scan-tree-dump-times "__transaction_atomic" 1 "tmlower" } } */

33781

+/* { dg-final { cleanup-tree-dump "tmlower" } } */

33782

Index: gcc/testsuite/g++.dg/pr59695.C

33783

===================================================================

33784

--- a/src/gcc/testsuite/g++.dg/pr59695.C (.../tags/gcc_4_8_2_release)

33785

+++ b/src/gcc/testsuite/g++.dg/pr59695.C (.../branches/gcc-4_8-branch)

33786

@@ -0,0 +1,125 @@

33787

+

33788

+/* PR target/59695 */

33789

+/* { dg-do run } */

33790

+/* { dg-options "-O0" } */

33791

+

33792

+#define DEFINE_VIRTUALS_FNS(i) virtual void xxx##i () {} \

33793

+ virtual void foo1_##i () {}\

33794

+ virtual void foo2_##i () {}\

33795

+ virtual void foo3_##i () {}\

33796

+ virtual void foo4_##i () {}\

33797

+ virtual void foo5_##i () {}\

33798

+ virtual void foo6_##i () {}\

33799

+ virtual void foo7_##i () {}\

33800

+ virtual void foo8_##i () {}\

33801

+ virtual void foo9_##i () {}\

33802

+ virtual void foo10_##i () {}\

33803

+ virtual void foo11_##i () {}\

33804

+ virtual void foo12_##i () {}\

33805

+ virtual void foo13_##i () {}\

33806

+ virtual void foo14_##i () {}\

33807

+ virtual void foo15_##i () {}\

33808

+ virtual void foo16_##i () {}\

33809

+ virtual void foo17_##i () {}\

33810

+ virtual void foo18_##i () {}\

33811

+ virtual void foo19_##i () {}\

33812

+ virtual void foo20_##i () {}\

33813

+ virtual void foo21_##i () {}\

33814

+ virtual void foo22_##i () {}\

33815

+

33816

+class base_class_2

33817

+{

33818

+

33819

+public:

33820

+ /* Define lots of virtual functions */

33821

+ DEFINE_VIRTUALS_FNS (1)

33822

+ DEFINE_VIRTUALS_FNS (2)

33823

+ DEFINE_VIRTUALS_FNS (3)

33824

+ DEFINE_VIRTUALS_FNS (4)

33825

+ DEFINE_VIRTUALS_FNS (5)

33826

+ DEFINE_VIRTUALS_FNS (6)

33827

+ DEFINE_VIRTUALS_FNS (7)

33828

+ DEFINE_VIRTUALS_FNS (8)

33829

+ DEFINE_VIRTUALS_FNS (9)

33830

+ DEFINE_VIRTUALS_FNS (10)

33831

+ DEFINE_VIRTUALS_FNS (11)

33832

+ DEFINE_VIRTUALS_FNS (12)

33833

+ DEFINE_VIRTUALS_FNS (13)

33834

+ DEFINE_VIRTUALS_FNS (14)

33835

+ DEFINE_VIRTUALS_FNS (15)

33836

+ DEFINE_VIRTUALS_FNS (16)

33837

+ DEFINE_VIRTUALS_FNS (17)

33838

+ DEFINE_VIRTUALS_FNS (18)

33839

+ DEFINE_VIRTUALS_FNS (19)

33840

+ DEFINE_VIRTUALS_FNS (20)

33841

+

33842

+ base_class_2();

33843

+ virtual ~base_class_2 ();

33844

+};

33845

+

33846

+base_class_2::base_class_2()

33847

+{

33848

+}

33849

+

33850

+base_class_2::~base_class_2 ()

33851

+{

33852

+}

33853

+

33854

+class base_class_1

33855

+{

33856

+public:

33857

+ virtual ~base_class_1();

33858

+ base_class_1();

33859

+};

33860

+

33861

+base_class_1::base_class_1()

33862

+{

33863

+}

33864

+

33865

+base_class_1::~base_class_1()

33866

+{

33867

+}

33868

+

33869

+class base_Impl_class :

33870

+ virtual public base_class_2, public base_class_1

33871

+{

33872

+public:

33873

+ base_Impl_class ();

33874

+ virtual ~base_Impl_class ();

33875

+};

33876

+

33877

+base_Impl_class::base_Impl_class ()

33878

+{

33879

+}

33880

+

33881

+base_Impl_class::~base_Impl_class ()

33882

+{

33883

+}

33884

+

33885

+

33886

+class test_cls : public base_Impl_class

33887

+{

33888

+public:

33889

+ test_cls();

33890

+ virtual ~test_cls();

33891

+};

33892

+

33893

+test_cls::test_cls()

33894

+{

33895

+}

33896

+

33897

+test_cls::~test_cls()

33898

+{

33899

+}

33900

+

33901

+int main()

33902

+{

33903

+ test_cls *test = new test_cls;

33904

+ base_class_2 *p1 = test;

33905

+

33906

+ /* PR59695 destructor thunk offsets are not setup

33907

+ correctly resulting in crash. */

33908

+ delete p1;

33909

+ return 0;

33910

+}

33911

+

33912

Index: gcc/testsuite/g++.dg/cpp0x/initlist79.C

33913

===================================================================

33914

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist79.C (.../tags/gcc_4_8_2_release)

33915

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist79.C (.../branches/gcc-4_8-branch)

33916

@@ -0,0 +1,8 @@

33917

+// PR c++/59646

33918

+// { dg-require-effective-target c++11 }

33919

+

33920

+#include <initializer_list>

33921

+

33922

+struct A {};

33923

+

33924

+std::initializer_list<volatile A> x = {{}};

33925

Index: gcc/testsuite/g++.dg/cpp0x/enum_base2.C

33926

===================================================================

33927

--- a/src/gcc/testsuite/g++.dg/cpp0x/enum_base2.C (.../tags/gcc_4_8_2_release)

33928

+++ b/src/gcc/testsuite/g++.dg/cpp0x/enum_base2.C (.../branches/gcc-4_8-branch)

33929

@@ -0,0 +1,9 @@

33930

+// PR c++/60187

33931

+// { dg-require-effective-target c++11 }

33932

+

33933

+template<typename... T> struct A

33934

+{

33935

+ enum E : T {}; // { dg-error "parameter pack" }

33936

+};

33937

+

33938

+A<int> a;

33939

Index: gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C

33940

===================================================================

33941

--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C (.../tags/gcc_4_8_2_release)

33942

+++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C (.../branches/gcc-4_8-branch)

33943

@@ -0,0 +1,7 @@

33944

+// PR c++/58596

33945

+// { dg-do compile { target c++11 } }

33946

+

33947

+struct A

33948

+{

33949

+ int i = [] { return decltype(i)(); }();

33950

+};

33951

Index: gcc/testsuite/g++.dg/cpp0x/variadic149.C

33952

===================================================================

33953

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic149.C (.../tags/gcc_4_8_2_release)

33954

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic149.C (.../branches/gcc-4_8-branch)

33955

@@ -0,0 +1,11 @@

33956

+// PR c++/60248

33957

+// { dg-options "-std=c++11 -g -fabi-version=2" }

33958

+

33959

+template<int...> struct A {};

33960

+

33961

+template<> struct A<0>

33962

+{

33963

+ typedef enum { e } B;

33964

+};

33965

+

33966

+A<0> a;

33967

Index: gcc/testsuite/g++.dg/cpp0x/constexpr-53094-2.C

33968

===================================================================

33969

--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-53094-2.C (.../tags/gcc_4_8_2_release)

33970

+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-53094-2.C (.../branches/gcc-4_8-branch)

33971

@@ -2,6 +2,7 @@

33972

// { dg-options "-std=gnu++11" }

33973

// Ignore warning on some powerpc-ibm-aix configurations.

33974

// { dg-prune-output "non-standard ABI extension" }

33975

+// { dg-prune-output "changes the ABI" }

33976

33977

typedef float __attribute__ ((vector_size (4 * sizeof (float)))) V4;

33978

constexpr V4 build (float x, float y, float z) { return (V4){ x, y, z, 0 };}

33979

Index: gcc/testsuite/g++.dg/cpp0x/defaulted48.C

33980

===================================================================

33981

--- a/src/gcc/testsuite/g++.dg/cpp0x/defaulted48.C (.../tags/gcc_4_8_2_release)

33982

+++ b/src/gcc/testsuite/g++.dg/cpp0x/defaulted48.C (.../branches/gcc-4_8-branch)

33983

@@ -0,0 +1,17 @@

33984

+// PR c++/60108

33985

+// { dg-require-effective-target c++11 }

33986

+

33987

+template<int> struct A

33988

+{

33989

+ virtual ~A();

33990

+};

33991

+

33992

+template<typename> struct B : A<0>, A<1>

33993

+{

33994

+ ~B() = default;

33995

+};

33996

+

33997

+struct C : B<bool>

33998

+{

33999

+ C() {}

34000

+};

34001

Index: gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C

34002

===================================================================

34003

--- a/src/gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C (.../tags/gcc_4_8_2_release)

34004

+++ b/src/gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C (.../branches/gcc-4_8-branch)

34005

@@ -0,0 +1,18 @@

34006

+// PR c++/60182

34007

+// { dg-require-effective-target c++11 }

34008

+

34009

+class B {};

34010

+template <typename> using __allocator_base = B;

34011

+template <typename> class F : __allocator_base<int> {};

34012

+class C {};

34013

+template <typename, typename = F<int> > class G : C {};

34014

+template <typename> class D;

34015

+class A {

34016

+ using Container = G<D<char>>;

34017

+ A();

34018

+ A(D<char> const &);

34019

+ Container m_elements;

34020

+};

34021

+template <template <class, class> class C, class A = F<D<int>>>

34022

+void doSomething(C<D<char>, A> &);

34023

+A::A(D<char> const &) : A() { doSomething(m_elements); }

34024

Index: gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C

34025

===================================================================

34026

--- a/src/gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C (.../tags/gcc_4_8_2_release)

34027

+++ b/src/gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C (.../branches/gcc-4_8-branch)

34028

@@ -0,0 +1,10 @@

34029

+// PR c++/58965

34030

+// { dg-require-effective-target c++11 }

34031

+

34032

+void foo()

34033

+{

34034

+ static union

34035

+ {

34036

+ int i = i;

34037

+ };

34038

+}

34039

Index: gcc/testsuite/g++.dg/cpp0x/variadic144.C

34040

===================================================================

34041

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic144.C (.../tags/gcc_4_8_2_release)

34042

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic144.C (.../branches/gcc-4_8-branch)

34043

@@ -0,0 +1,15 @@

34044

+// PR c++/56060

34045

+// { dg-do compile { target c++11 } }

34046

+

34047

+template<typename T> struct baz { };

34048

+template<typename T> T bar();

34049

+

34050

+template<typename T, typename ... U>

34051

+baz<decltype(bar<T>()(bar<U> ...))> // { dg-error "cannot be used" }

34052

+foo();

34053

+

34054

+int main()

34055

+{

34056

+ foo<int>(); // { dg-error "no matching" }

34057

+ return 0;

34058

+}

34059

Index: gcc/testsuite/g++.dg/cpp0x/enum18.C

34060

===================================================================

34061

--- a/src/gcc/testsuite/g++.dg/cpp0x/enum18.C (.../tags/gcc_4_8_2_release)

34062

+++ b/src/gcc/testsuite/g++.dg/cpp0x/enum18.C (.../branches/gcc-4_8-branch)

34063

@@ -4,5 +4,5 @@

34064

int main(void) {

34065

enum e {};

34066

e ev;

34067

- ev.e::~e_u(); // { dg-error "e_u. has not been declared" }

34068

+ ev.e::~e_u(); // { dg-error "" }

34069

}

34070

Index: gcc/testsuite/g++.dg/cpp0x/noexcept22.C

34071

===================================================================

34072

--- a/src/gcc/testsuite/g++.dg/cpp0x/noexcept22.C (.../tags/gcc_4_8_2_release)

34073

+++ b/src/gcc/testsuite/g++.dg/cpp0x/noexcept22.C (.../branches/gcc-4_8-branch)

34074

@@ -0,0 +1,21 @@

34075

+// PR c++/60046

34076

+// { dg-require-effective-target c++11 }

34077

+

34078

+constexpr bool foo () { return noexcept (true); }

34079

+template <typename T>

34080

+struct V

34081

+{

34082

+ void bar (V &) noexcept (foo ()) {}

34083

+};

34084

+template <typename T>

34085

+struct W : public V <int>

34086

+{

34087

+ void bar (W &x) { V <int>::bar (x); }

34088

+};

34089

+

34090

+int

34091

+main ()

34092

+{

34093

+ W <int> a, b;

34094

+ a.bar (b);

34095

+}

34096

Index: gcc/testsuite/g++.dg/cpp0x/initlist76.C

34097

===================================================================

34098

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist76.C (.../tags/gcc_4_8_2_release)

34099

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist76.C (.../branches/gcc-4_8-branch)

34100

@@ -0,0 +1,5 @@

34101

+// PR c++/58812

34102

+// { dg-require-effective-target c++11 }

34103

+

34104

+int i;

34105

+int&& j{{ i }}; // { dg-error "too many braces" }

34106

Index: gcc/testsuite/g++.dg/cpp0x/access02.C

34107

===================================================================

34108

--- a/src/gcc/testsuite/g++.dg/cpp0x/access02.C (.../tags/gcc_4_8_2_release)

34109

+++ b/src/gcc/testsuite/g++.dg/cpp0x/access02.C (.../branches/gcc-4_8-branch)

34110

@@ -0,0 +1,39 @@

34111

+// PR c++/58954

34112

+// { dg-require-effective-target c++11 }

34113

+

34114

+template<class T>

34115

+T&& declval();

34116

+

34117

+template<class T>

34118

+struct foo_argument

34119

+{

34120

+ template<class Ret, class C, class Arg>

34121

+ static Arg test(Ret (C::*)(Arg));

34122

+

34123

+ typedef decltype(test(&T::template foo<>)) type;

34124

+};

34125

+

34126

+template<class T, class>

34127

+struct dependent { typedef T type; };

34128

+

34129

+template<class T>

34130

+struct base

34131

+{

34132

+ template<class Ignore = void>

34133

+ auto foo(int i) -> decltype(declval<

34134

+ typename dependent<T&, Ignore>::type

34135

+ >().foo_impl(i));

34136

+};

34137

+

34138

+struct derived : base<derived>

34139

+{

34140

+ friend struct base<derived>;

34141

+private:

34142

+ int foo_impl(int i);

34143

+};

34144

+

34145

+int main()

34146

+{

34147

+ foo_argument<derived>::type var = 0;

34148

+ return var;

34149

+}

34150

Index: gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C

34151

===================================================================

34152

--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C (.../tags/gcc_4_8_2_release)

34153

+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C (.../branches/gcc-4_8-branch)

34154

@@ -0,0 +1,20 @@

34155

+// PR c++/59268

34156

+// { dg-do compile }

34157

+// { dg-options "-std=c++11" }

34158

+

34159

+template <typename>

34160

+struct A

34161

+{

34162

+ constexpr A (int) {}

34163

+ virtual void foo ()

34164

+ {

34165

+ constexpr A<void> a (0);

34166

+ }

34167

+};

34168

+

34169

+void

34170

+bar ()

34171

+{

34172

+ A<int> a (3);

34173

+ a.foo ();

34174

+}

34175

Index: gcc/testsuite/g++.dg/cpp0x/initlist78.C

34176

===================================================================

34177

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist78.C (.../tags/gcc_4_8_2_release)

34178

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist78.C (.../branches/gcc-4_8-branch)

34179

@@ -0,0 +1,12 @@

34180

+// PR c++/58639

34181

+// { dg-require-effective-target c++11 }

34182

+

34183

+struct node {

34184

+ node &parent;

34185

+};

34186

+

34187

+struct vector {

34188

+ node n;

34189

+};

34190

+

34191

+vector v({}); // { dg-error "" }

34192

Index: gcc/testsuite/g++.dg/cpp0x/variadic148.C

34193

===================================================================

34194

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic148.C (.../tags/gcc_4_8_2_release)

34195

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic148.C (.../branches/gcc-4_8-branch)

34196

@@ -0,0 +1,6 @@

34197

+// PR c++/59989

34198

+// { dg-require-effective-target c++11 }

34199

+

34200

+template<typename T> struct X {};

34201

+template<template<typename...> class D, typename ...U> int test(D<U...>*);

34202

+int n = test<X, int>(0); // { dg-error "no match" }

34203

Index: gcc/testsuite/g++.dg/cpp0x/nsdmi9.C

34204

===================================================================

34205

--- a/src/gcc/testsuite/g++.dg/cpp0x/nsdmi9.C (.../tags/gcc_4_8_2_release)

34206

+++ b/src/gcc/testsuite/g++.dg/cpp0x/nsdmi9.C (.../branches/gcc-4_8-branch)

34207

@@ -0,0 +1,13 @@

34208

+// PR c++/58162

34209

+// { dg-require-effective-target c++11 }

34210

+

34211

+struct A {

34212

+ A();

34213

+ A(A&&);

34214

+};

34215

+

34216

+struct B {

34217

+ A const a = A();

34218

+};

34219

+

34220

+B b;

34221

Index: gcc/testsuite/g++.dg/cpp0x/deleted3.C

34222

===================================================================

34223

--- a/src/gcc/testsuite/g++.dg/cpp0x/deleted3.C (.../tags/gcc_4_8_2_release)

34224

+++ b/src/gcc/testsuite/g++.dg/cpp0x/deleted3.C (.../branches/gcc-4_8-branch)

34225

@@ -0,0 +1,11 @@

34226

+// PR c++/60216

34227

+// { dg-require-effective-target c++11 }

34228

+

34229

+struct A

34230

+{

34231

+ template<typename T> A(T) = delete;

34232

+};

34233

+

34234

+template<> A::A<int>(int) {}

34235

+

34236

+A a(0);

34237

Index: gcc/testsuite/g++.dg/cpp0x/variadic150.C

34238

===================================================================

34239

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic150.C (.../tags/gcc_4_8_2_release)

34240

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic150.C (.../branches/gcc-4_8-branch)

34241

@@ -0,0 +1,9 @@

34242

+// PR c++/60219

34243

+// { dg-require-effective-target c++11 }

34244

+

34245

+template<typename..., int> void foo();

34246

+

34247

+void bar()

34248

+{

34249

+ foo<0>; // { dg-error "" }

34250

+}

34251

Index: gcc/testsuite/g++.dg/cpp0x/static_assert9.C

34252

===================================================================

34253

--- a/src/gcc/testsuite/g++.dg/cpp0x/static_assert9.C (.../tags/gcc_4_8_2_release)

34254

+++ b/src/gcc/testsuite/g++.dg/cpp0x/static_assert9.C (.../branches/gcc-4_8-branch)

34255

@@ -0,0 +1,7 @@

34256

+// PR c++/58837

34257

+// { dg-require-effective-target c++11 }

34258

+

34259

+void f();

34260

+static_assert(f, "");

34261

+struct A {};

34262

+static_assert(A::~A, ""); // { dg-error "non-static member function" }

34263

Index: gcc/testsuite/g++.dg/cpp0x/variadic145.C

34264

===================================================================

34265

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic145.C (.../tags/gcc_4_8_2_release)

34266

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic145.C (.../branches/gcc-4_8-branch)

34267

@@ -0,0 +1,13 @@

34268

+// PR c++/59730

34269

+// { dg-do compile { target c++11 } }

34270

+

34271

+template <typename> void declval();

34272

+template <typename> void forward();

34273

+template <typename> class D;

34274

+template <typename _Functor, typename... _Bound_args>

34275

+class D <_Functor(_Bound_args...)> {

34276

+ template <typename... _Args, decltype(declval<_Functor>)>

34277

+ void operator()(...) {

34278

+ 0(forward<_Args>...);

34279

+ }

34280

+};

34281

Index: gcc/testsuite/g++.dg/cpp0x/decltype57.C

34282

===================================================================

34283

--- a/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C (.../tags/gcc_4_8_2_release)

34284

+++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C (.../branches/gcc-4_8-branch)

34285

@@ -0,0 +1,8 @@

34286

+// PR c++/58633

34287

+// { dg-do compile { target c++11 } }

34288

+

34289

+void foo(int i)

34290

+{

34291

+ typedef int I;

34292

+ decltype(i.I::~I())* p;

34293

+}

34294

Index: gcc/testsuite/g++.dg/cpp0x/variadic147.C

34295

===================================================================

34296

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic147.C (.../tags/gcc_4_8_2_release)

34297

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic147.C (.../branches/gcc-4_8-branch)

34298

@@ -0,0 +1,10 @@

34299

+// PR c++/58466

34300

+// { dg-require-effective-target c++11 }

34301

+

34302

+template<char, char...> struct A;

34303

+

34304

+template<typename> struct B;

34305

+

34306

+template<char... C> struct B<A<C...>> {};

34307

+

34308

+B<A<'X'>> b;

34309

Index: gcc/testsuite/g++.dg/eh/uncaught1.C

34310

===================================================================

34311

--- a/src/gcc/testsuite/g++.dg/eh/uncaught1.C (.../tags/gcc_4_8_2_release)

34312

+++ b/src/gcc/testsuite/g++.dg/eh/uncaught1.C (.../branches/gcc-4_8-branch)

34313

@@ -13,7 +13,7 @@

34314

34315

static Check const data[] = {

34316

{ 0, 0, false }, // construct [0]

34317

- { 1, 0, true }, // [1] = [0]

34318

+ { 1, 0, false }, // [1] = [0]

34319

{ 0, 0, true }, // destruct [0]

34320

{ 2, 1, true }, // [2] = [1]

34321

{ 2, 2, true }, // destruct [2]

34322

Index: gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C

34323

===================================================================

34324

--- a/src/gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C (.../tags/gcc_4_8_2_release)

34325

+++ b/src/gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C (.../branches/gcc-4_8-branch)

34326

@@ -0,0 +1,54 @@

34327

+// { dg-do run { target { powerpc64*-*-linux* } } }

34328

+// { dg-options "-fexceptions -fnon-call-exceptions" }

34329

+

34330

+#include <signal.h>

34331

+#include <stdlib.h>

34332

+#include <fenv.h>

34333

+

34334

+#define SET_CR(R,V) __asm__ __volatile__ ("mtcrf %0,%1" : : "n" (1<<(7-R)), "r" (V<<(4*(7-R))) : "cr" #R)

34335

+#define GET_CR(R) ({ int tmp; __asm__ __volatile__ ("mfcr %0" : "=r" (tmp)); (tmp >> 4*(7-R)) & 15; })

34336

+

34337

+void sighandler (int signo, siginfo_t * si, void * uc)

34338

+{

34339

+ SET_CR(2, 3);

34340

+ SET_CR(3, 2);

34341

+ SET_CR(4, 1);

34342

+

34343

+ throw 0;

34344

+}

34345

+

34346

+float test (float a, float b) __attribute__ ((__noinline__));

34347

+float test (float a, float b)

34348

+{

34349

+ float x;

34350

+ asm ("mtcrf %1,%2" : "=f" (x) : "n" (1 << (7-3)), "r" (0), "0" (b) : "cr3");

34351

+ return a / x;

34352

+}

34353

+

34354

+int main ()

34355

+{

34356

+ struct sigaction sa;

34357

+ int status;

34358

+

34359

+ sa.sa_sigaction = sighandler;

34360

+ sa.sa_flags = SA_SIGINFO;

34361

+

34362

+ status = sigaction (SIGFPE, & sa, NULL);

34363

+

34364

+ feenableexcept (FE_DIVBYZERO);

34365

+

34366

+ SET_CR(2, 6);

34367

+ SET_CR(3, 9);

34368

+ SET_CR(4, 12);

34369

+

34370

+ try {

34371

+ test (1, 0);

34372

+ }

34373

+ catch (...) {

34374

+ return GET_CR(2) != 6 || GET_CR(3) != 9 || GET_CR(4) != 12;

34375

+ }

34376

+

34377

+ return 1;

34378

+}

34379

+

34380

+

34381

Index: gcc/testsuite/g++.dg/eh/uncaught4.C

34382

===================================================================

34383

--- a/src/gcc/testsuite/g++.dg/eh/uncaught4.C (.../tags/gcc_4_8_2_release)

34384

+++ b/src/gcc/testsuite/g++.dg/eh/uncaught4.C (.../branches/gcc-4_8-branch)

34385

@@ -0,0 +1,29 @@

34386

+// PR c++/41174

34387

+// { dg-do run }

34388

+

34389

+#include <exception>

34390

+

34391

+#define assert(E) if (!(E)) __builtin_abort();

34392

+

34393

+struct e {

34394

+ e()

34395

+ {

34396

+ assert( !std::uncaught_exception() );

34397

+ try {

34398

+ throw 1;

34399

+ } catch (int i) {

34400

+ assert( !std::uncaught_exception() );

34401

+ throw;

34402

+ }

34403

+ }

34404

+};

34405

+

34406

+int main()

34407

+{

34408

+ try {

34409

+ throw e();

34410

+ } catch (int i) {

34411

+ assert( !std::uncaught_exception() );

34412

+ }

34413

+ assert( !std::uncaught_exception() );

34414

+}

34415

Index: gcc/testsuite/g++.dg/inherit/virtual11.C

34416

===================================================================

34417

--- a/src/gcc/testsuite/g++.dg/inherit/virtual11.C (.../tags/gcc_4_8_2_release)

34418

+++ b/src/gcc/testsuite/g++.dg/inherit/virtual11.C (.../branches/gcc-4_8-branch)

34419

@@ -0,0 +1,17 @@

34420

+// PR c++/59031

34421

+// { dg-do compile }

34422

+// { dg-options "-fdump-tree-gimple " }

34423

+class B {

34424

+ public:

34425

+ virtual int add (int a, int b) {return a+ b;}

34426

+};

34427

+

34428

+class D : public B {

34429

+};

34430

+

34431

+int foo (int a, int b) {

34432

+ D d;

34433

+ return d.add(a, b);

34434

+}

34435

+// { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "gimple" } }

34436

+// { dg-final { cleanup-tree-dump "gimple" } }

34437

Index: gcc/testsuite/g++.dg/torture/pr38565.C

34438

===================================================================

34439

--- a/src/gcc/testsuite/g++.dg/torture/pr38565.C (.../tags/gcc_4_8_2_release)

34440

+++ b/src/gcc/testsuite/g++.dg/torture/pr38565.C (.../branches/gcc-4_8-branch)

34441

@@ -1,6 +1,7 @@

34442

// { dg-do compile }

34443

// Ignore warning on some powerpc-linux configurations.

34444

// { dg-prune-output "non-standard ABI extension" }

34445

+// { dg-prune-output "changes the ABI" }

34446

#define vector __attribute__((vector_size(16) ))

34447

vector unsigned int f(int a)

34448

{

34449

Index: gcc/testsuite/g++.dg/torture/pr57499.C

34450

===================================================================

34451

--- a/src/gcc/testsuite/g++.dg/torture/pr57499.C (.../tags/gcc_4_8_2_release)

34452

+++ b/src/gcc/testsuite/g++.dg/torture/pr57499.C (.../branches/gcc-4_8-branch)

34453

@@ -0,0 +1,14 @@

34454

+// PR middle-end/57499

34455

+// { dg-do compile }

34456

+

34457

+struct S

34458

+{

34459

+ ~S () __attribute__ ((noreturn)) {} // { dg-warning "function does return" }

34460

+};

34461

+

34462

+void

34463

+foo ()

34464

+{

34465

+ S s;

34466

+ throw 1;

34467

+}

34468

Index: gcc/testsuite/g++.dg/torture/pr59163.C

34469

===================================================================

34470

--- a/src/gcc/testsuite/g++.dg/torture/pr59163.C (.../tags/gcc_4_8_2_release)

34471

+++ b/src/gcc/testsuite/g++.dg/torture/pr59163.C (.../branches/gcc-4_8-branch)

34472

@@ -0,0 +1,30 @@

34473

+// PR target/59163

34474

+// { dg-do run }

34475

+

34476

+struct A { float a[4]; };

34477

+struct B { int b; A a; };

34478

+

34479

+__attribute__((noinline, noclone)) void

34480

+bar (A &a)

34481

+{

34482

+ if (a.a[0] != 36.0f || a.a[1] != 42.0f || a.a[2] != 48.0f || a.a[3] != 54.0f)

34483

+ __builtin_abort ();

34484

+}

34485

+

34486

+__attribute__((noinline, noclone)) void

34487

+foo (A &a)

34488

+{

34489

+ int i;

34490

+ A c = a;

34491

+ for (i = 0; i < 4; i++)

34492

+ c.a[i] *= 6.0f;

34493

+ a = c;

34494

+ bar (a);

34495

+}

34496

+

34497

+int

34498

+main ()

34499

+{

34500

+ B b = { 5, { 6, 7, 8, 9 } };

34501

+ foo (b.a);

34502

+}

34503

Index: gcc/testsuite/g++.dg/ipa/pr60640-1.C

34504

===================================================================

34505

--- a/src/gcc/testsuite/g++.dg/ipa/pr60640-1.C (.../tags/gcc_4_8_2_release)

34506

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60640-1.C (.../branches/gcc-4_8-branch)

34507

@@ -0,0 +1,50 @@

34508

+// { dg-do compile }

34509

+// { dg-options "-O3" }

34510

+

34511

+class ASN1Object

34512

+{

34513

+public:

34514

+ virtual ~ASN1Object ();

34515

+};

34516

+class A

34517

+{

34518

+ virtual unsigned m_fn1 () const;

34519

+};

34520

+class B

34521

+{

34522

+public:

34523

+ ASN1Object Element;

34524

+ virtual unsigned m_fn1 (bool) const;

34525

+};

34526

+template <class BASE> class C : public BASE

34527

+{

34528

+};

34529

+

34530

+class D : ASN1Object, public B

34531

+{

34532

+};

34533

+class G : public D

34534

+{

34535

+ unsigned m_fn1 (bool) const {}

34536

+};

34537

+class F : A

34538

+{

34539

+public:

34540

+ F (A);

34541

+ unsigned m_fn1 () const

34542

+ {

34543

+ int a;

34544

+ a = m_fn2 ().m_fn1 (0);

34545

+ return a;

34546

+ }

34547

+ const B &m_fn2 () const { return m_groupParameters; }

34548

+ C<G> m_groupParameters;

34549

+};

34550

+template <class D> void BenchMarkKeyAgreement (int *, int *, int)

34551

+{

34552

+ A f;

34553

+ D d (f);

34554

+}

34555

+

34556

+void BenchmarkAll2 () { BenchMarkKeyAgreement<F>(0, 0, 0); }

34557

+

34558

Index: gcc/testsuite/g++.dg/ipa/pr60640-2.C

34559

===================================================================

34560

--- a/src/gcc/testsuite/g++.dg/ipa/pr60640-2.C (.../tags/gcc_4_8_2_release)

34561

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60640-2.C (.../branches/gcc-4_8-branch)

34562

@@ -0,0 +1,15 @@

34563

+// { dg-do compile }

34564

+// { dg-options "-O3" }

34565

+

34566

+struct B { virtual unsigned f () const; };

34567

+struct C { virtual void f (); };

34568

+struct F { virtual unsigned f (bool) const; ~F (); };

34569

+struct J : C, F {};

34570

+struct G : J { unsigned f (bool) const { return 0; } };

34571

+struct H : B

34572

+{

34573

+ H (int);

34574

+ unsigned f () const { return ((const F &) h).f (0); }

34575

+ G h;

34576

+};

34577

+H h (0);

34578

Index: gcc/testsuite/g++.dg/ipa/pr60640-3.C

34579

===================================================================

34580

--- a/src/gcc/testsuite/g++.dg/ipa/pr60640-3.C (.../tags/gcc_4_8_2_release)

34581

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60640-3.C (.../branches/gcc-4_8-branch)

34582

@@ -0,0 +1,81 @@

34583

+// { dg-do run }

34584

+// { dg-options "-O3" }

34585

+

34586

+struct Distraction

34587

+{

34588

+ char fc[8];

34589

+ virtual Distraction * return_self ()

34590

+ { return this; }

34591

+};

34592

+

34593

+namespace {

34594

+

34595

+struct A;

34596

+static A * __attribute__ ((noinline, noclone)) get_an_A ();

34597

+

34598

+static int go;

34599

+

34600

+struct A

34601

+{

34602

+ int fi;

34603

+

34604

+ A () : fi(777) {}

34605

+ A (int pi) : fi (pi) {}

34606

+ virtual A * foo (int p) = 0;

34607

+};

34608

+

34609

+struct B;

34610

+static B * __attribute__ ((noinline, noclone)) get_a_B ();

34611

+

34612

+struct B : public Distraction, A

34613

+{

34614

+ B () : Distraction(), A() { }

34615

+ B (int pi) : Distraction (), A (pi) {}

34616

+ virtual B * foo (int p)

34617

+ {

34618

+ int o = fi;

34619

+ for (int i = 0; i < p; i++)

34620

+ o += i + i * i;

34621

+ go = o;

34622

+

34623

+ return get_a_B ();

34624

+ }

34625

+};

34626

+

34627

+

34628

+struct B gb1 (1111), gb2 (2);

34629

+static B * __attribute__ ((noinline, noclone))

34630

+get_a_B ()

34631

+{

34632

+ return &gb1;

34633

+}

34634

+

34635

+static A * __attribute__ ((noinline, noclone))

34636

+get_an_A ()

34637

+{

34638

+ return &gb2;

34639

+}

34640

+

34641

+}

34642

+

34643

+static int __attribute__ ((noinline, noclone))

34644

+get_a_number ()

34645

+{

34646

+ return 5;

34647

+}

34648

+

34649

+extern "C" void abort (void);

34650

+

34651

+int main (int argc, char *argv[])

34652

+{

34653

+ for (int i = 0; i < get_a_number (); i++)

34654

+ {

34655

+ struct A *p = get_an_A ();

34656

+ struct A *r = p->foo (4);

34657

+ if (r->fi != 1111)

34658

+ abort ();

34659

+ if (go != 22)

34660

+ abort ();

34661

+ }

34662

+ return 0;

34663

+}

34664

Index: gcc/testsuite/g++.dg/ipa/pr60419.C

34665

===================================================================

34666

--- a/src/gcc/testsuite/g++.dg/ipa/pr60419.C (.../tags/gcc_4_8_2_release)

34667

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60419.C (.../branches/gcc-4_8-branch)

34668

@@ -0,0 +1,80 @@

34669

+// PR middle-end/60419

34670

+// { dg-do compile }

34671

+// { dg-options "-O2" }

34672

+

34673

+struct C

34674

+{

34675

+};

34676

+

34677

+struct I : C

34678

+{

34679

+ I ();

34680

+};

34681

+

34682

+struct J

34683

+{

34684

+ void foo ();

34685

+ J ();

34686

+ virtual void foo (int &, int);

34687

+};

34688

+

34689

+template <class>

34690

+struct D

34691

+{

34692

+ virtual void foo (I &) const;

34693

+ void bar ()

34694

+ {

34695

+ I p;

34696

+ foo (p);

34697

+ }

34698

+};

34699

+

34700

+struct K : J, public D<int>

34701

+{

34702

+};

34703

+

34704

+struct F

34705

+{

34706

+ K *operator->();

34707

+};

34708

+

34709

+struct N : public K

34710

+{

34711

+ void foo (int &, int);

34712

+ I n;

34713

+ void foo (I &) const {}

34714

+};

34715

+

34716

+struct L : J

34717

+{

34718

+ F l;

34719

+};

34720

+

34721

+struct M : F

34722

+{

34723

+ L *operator->();

34724

+};

34725

+

34726

+struct G

34727

+{

34728

+ G ();

34729

+};

34730

+

34731

+M h;

34732

+

34733

+G::G ()

34734

+try

34735

+{

34736

+ N f;

34737

+ f.bar ();

34738

+ throw;

34739

+}

34740

+catch (int)

34741

+{

34742

+}

34743

+

34744

+void

34745

+baz ()

34746

+{

34747

+ h->l->bar ();

34748

+}

34749

Index: gcc/testsuite/g++.dg/template/ref7.C

34750

===================================================================

34751

--- a/src/gcc/testsuite/g++.dg/template/ref7.C (.../tags/gcc_4_8_2_release)

34752

+++ b/src/gcc/testsuite/g++.dg/template/ref7.C (.../branches/gcc-4_8-branch)

34753

@@ -0,0 +1,16 @@

34754

+// PR c++/60274

34755

+

34756

+typedef const char *const& ProtocolIdType;

34757

+

34758

+template <ProtocolIdType protocolId>

34759

+struct C {

34760

+ typedef int ProtocolVersion;

34761

+ struct D {

34762

+ ProtocolVersion GetProtocolVersion();

34763

+ };

34764

+};

34765

+template <ProtocolIdType protocolId>

34766

+typename C<protocolId>::ProtocolVersion C<protocolId>::D::GetProtocolVersion()

34767

+{

34768

+ return 1;

34769

+}

34770

Index: gcc/testsuite/g++.dg/template/using28.C

34771

===================================================================

34772

--- a/src/gcc/testsuite/g++.dg/template/using28.C (.../tags/gcc_4_8_2_release)

34773

+++ b/src/gcc/testsuite/g++.dg/template/using28.C (.../branches/gcc-4_8-branch)

34774

@@ -0,0 +1,17 @@

34775

+// PR c++/37140

34776

+

34777

+struct C

34778

+{

34779

+ static const int block_size = 1;

34780

+};

34781

+

34782

+template <typename T> struct A {

34783

+ typedef C type;

34784

+};

34785

+

34786

+template <typename T> struct B : public A<T> {

34787

+ using typename A<T>::type;

34788

+ static const int block_size = type::block_size;

34789

+};

34790

+

34791

+template class B<int>;

34792

Index: gcc/testsuite/g++.dg/template/shadow1.C

34793

===================================================================

34794

--- a/src/gcc/testsuite/g++.dg/template/shadow1.C (.../tags/gcc_4_8_2_release)

34795

+++ b/src/gcc/testsuite/g++.dg/template/shadow1.C (.../branches/gcc-4_8-branch)

34796

@@ -0,0 +1,4 @@

34797

+// PR c++/58632

34798

+

34799

+template<template<int I> class A> // { dg-message "shadows" }

34800

+class A {}; // { dg-error "declaration" }

34801

Index: gcc/testsuite/g++.dg/template/partial14.C

34802

===================================================================

34803

--- a/src/gcc/testsuite/g++.dg/template/partial14.C (.../tags/gcc_4_8_2_release)

34804

+++ b/src/gcc/testsuite/g++.dg/template/partial14.C (.../branches/gcc-4_8-branch)

34805

@@ -0,0 +1,16 @@

34806

+// PR c++/59044

34807

+

34808

+template <class T>

34809

+class C {

34810

+private:

34811

+ template <T a, T b>

34812

+ struct Implementation {};

34813

+public:

34814

+ typedef typename Implementation<0, 0>::Typedef Type;

34815

+};

34816

+

34817

+template <class T>

34818

+template <T b>

34819

+struct C<T>::Implementation<0, b> { typedef void Typedef; };

34820

+

34821

+template class C<unsigned>;

34822

Index: gcc/testsuite/g++.dg/template/using27.C

34823

===================================================================

34824

--- a/src/gcc/testsuite/g++.dg/template/using27.C (.../tags/gcc_4_8_2_release)

34825

+++ b/src/gcc/testsuite/g++.dg/template/using27.C (.../branches/gcc-4_8-branch)

34826

@@ -0,0 +1,33 @@

34827

+// PR c++/37140

34828

+

34829

+struct X

34830

+{

34831

+ typedef int nested_type;

34832

+};

34833

+

34834

+template <class T>

34835

+struct A

34836

+{

34837

+ typedef X type;

34838

+};

34839

+

34840

+template <class T>

34841

+struct B : A<T>

34842

+{

34843

+ using typename A<T>::type;

34844

+ typename type::nested_type x;

34845

+};

34846

+

34847

+template <class T>

34848

+struct C : B<T>

34849

+{

34850

+ using typename B<T>::type;

34851

+ typename type::nested_type y;

34852

+};

34853

+

34854

+struct D : C<int>

34855

+{

34856

+ using C<int>::type;

34857

+ type::nested_type z;

34858

+};

34859

+

34860

Index: gcc/testsuite/g++.dg/template/using29.C

34861

===================================================================

34862

--- a/src/gcc/testsuite/g++.dg/template/using29.C (.../tags/gcc_4_8_2_release)

34863

+++ b/src/gcc/testsuite/g++.dg/template/using29.C (.../branches/gcc-4_8-branch)

34864

@@ -0,0 +1,21 @@

34865

+// PR c++/58047

34866

+

34867

+template <int N>

34868

+struct print_arg { };

34869

+

34870

+struct const_holder {

34871

+ static const int CONSTANT = 42;

34872

+};

34873

+

34874

+template <typename T>

34875

+struct identity {

34876

+ typedef T type;

34877

+};

34878

+

34879

+template <class T>

34880

+struct test_case : public identity<T> {

34881

+ using typename identity<T>::type;

34882

+ print_arg<type::CONSTANT> printer;

34883

+};

34884

+

34885

+template struct test_case<const_holder>;

34886

Index: gcc/testsuite/g++.dg/template/partial15.C

34887

===================================================================

34888

--- a/src/gcc/testsuite/g++.dg/template/partial15.C (.../tags/gcc_4_8_2_release)

34889

+++ b/src/gcc/testsuite/g++.dg/template/partial15.C (.../branches/gcc-4_8-branch)

34890

@@ -0,0 +1,19 @@

34891

+// PR c++/57043

34892

+// { dg-do link }

34893

+

34894

+template<typename D> struct complex { };

34895

+

34896

+template<typename Tp>

34897

+complex<Tp>

34898

+pow(const complex<Tp>& x, const complex<Tp>& y) { return complex<Tp>(); }

34899

+

34900

+template<typename T, typename U>

34901

+struct promote_2 { typedef T type; };

34902

+

34903

+template<typename Tp, typename Up>

34904

+complex<typename promote_2<Tp, Up>::type>

34905

+pow(const complex<Tp>& x, const complex<Up>& y);

34906

+

34907

+complex<double> (*powcc)(const complex<double>&, const complex<double>&) = pow;

34908

+

34909

+int main() {}

34910

Index: gcc/testsuite/c-c++-common/cpp/pr60400-1.h

34911

===================================================================

34912

--- a/src/gcc/testsuite/c-c++-common/cpp/pr60400-1.h (.../tags/gcc_4_8_2_release)

34913

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr60400-1.h (.../branches/gcc-4_8-branch)

34914

@@ -0,0 +1,3 @@

34915

+??=ifndef PR60400_1_H

34916

+??=define PR60400_1_H

34917

+??=endif

34918

Index: gcc/testsuite/c-c++-common/cpp/pr60400-2.h

34919

===================================================================

34920

--- a/src/gcc/testsuite/c-c++-common/cpp/pr60400-2.h (.../tags/gcc_4_8_2_release)

34921

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr60400-2.h (.../branches/gcc-4_8-branch)

34922

@@ -0,0 +1,4 @@

34923

+??=ifndef PR60400_2_H

34924

+??=define PR60400_2_H

34925

+??=include "pr60400-1.h"

34926

+??=endif

34927

Index: gcc/testsuite/c-c++-common/cpp/pr60400.c

34928

===================================================================

34929

--- a/src/gcc/testsuite/c-c++-common/cpp/pr60400.c (.../tags/gcc_4_8_2_release)

34930

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr60400.c (.../branches/gcc-4_8-branch)

34931

@@ -0,0 +1,13 @@

34932

+/* PR preprocessor/60400 */

34933

+/* { dg-do compile } */

34934

+/* { dg-options "-trigraphs -Wtrigraphs" } */

34935

+

34936

+??=include "pr60400-1.h"

34937

+??=include "pr60400-2.h"

34938

+

34939

+/* { dg-warning "trigraph" "" { target *-*-* } 1 } */

34940

+/* { dg-warning "trigraph" "" { target *-*-* } 2 } */

34941

+/* { dg-warning "trigraph" "" { target *-*-* } 3 } */

34942

+/* { dg-warning "trigraph" "" { target *-*-* } 4 } */

34943

+/* { dg-warning "trigraph" "" { target *-*-* } 5 } */

34944

+/* { dg-warning "trigraph" "" { target *-*-* } 6 } */

34945

Index: gcc/testsuite/c-c++-common/cpp/pr58844-1.c

34946

===================================================================

34947

--- a/src/gcc/testsuite/c-c++-common/cpp/pr58844-1.c (.../tags/gcc_4_8_2_release)

34948

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr58844-1.c (.../branches/gcc-4_8-branch)

34949

@@ -0,0 +1,8 @@

34950

+/* PR preprocessor/58844 */

34951

+/* { dg-do compile } */

34952

+/* { dg-options "-ftrack-macro-expansion=0" } */

34953

+

34954

+#define A x######x

34955

+int A = 1;

34956

+#define A x######x /* { dg-message "previous definition" } */

34957

+#define A x##x /* { dg-warning "redefined" } */

34958

Index: gcc/testsuite/c-c++-common/cpp/pr58844-2.c

34959

===================================================================

34960

--- a/src/gcc/testsuite/c-c++-common/cpp/pr58844-2.c (.../tags/gcc_4_8_2_release)

34961

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr58844-2.c (.../branches/gcc-4_8-branch)

34962

@@ -0,0 +1,8 @@

34963

+/* PR preprocessor/58844 */

34964

+/* { dg-do compile } */

34965

+/* { dg-options "-ftrack-macro-expansion=2" } */

34966

+

34967

+#define A x######x

34968

+int A = 1;

34969

+#define A x######x /* { dg-message "previous definition" } */

34970

+#define A x##x /* { dg-warning "redefined" } */

34971

Index: gcc/testsuite/c-c++-common/convert-vec-1.c

34972

===================================================================

34973

--- a/src/gcc/testsuite/c-c++-common/convert-vec-1.c (.../tags/gcc_4_8_2_release)

34974

+++ b/src/gcc/testsuite/c-c++-common/convert-vec-1.c (.../branches/gcc-4_8-branch)

34975

@@ -1,3 +1,4 @@

34976

/* { dg-do compile } */

34977

+/* { dg-prune-output "changes the ABI" } */

34978

typedef float v2sf __attribute__ ((vector_size (8)));

34979

v2sf sub (void) { return (v2sf) 0.0; } /* { dg-error "can't convert" } */

34980

Index: gcc/testsuite/c-c++-common/pr60101.c

34981

===================================================================

34982

--- a/src/gcc/testsuite/c-c++-common/pr60101.c (.../tags/gcc_4_8_2_release)

34983

+++ b/src/gcc/testsuite/c-c++-common/pr60101.c (.../branches/gcc-4_8-branch)

34984

@@ -0,0 +1,112 @@

34985

+/* PR c/60101 */

34986

+/* { dg-do compile } */

34987

+/* { dg-options "-O2 -Wall" } */

34988

+

34989

+extern int *a, b, *c, *d;

34990

+

34991

+void

34992

+foo (double _Complex *x, double _Complex *y, double _Complex *z, unsigned int l, int w)

34993

+{

34994

+ unsigned int e = (unsigned int) a[3];

34995

+ double _Complex (*v)[l][4][e][l][4] = (double _Complex (*)[l][4][e][l][4]) z;

34996

+ double _Complex (*f)[l][b][l] = (double _Complex (*)[l][b][l]) y;

34997

+ unsigned int g = c[0] * c[1] * c[2];

34998

+ unsigned int h = d[0] + c[0] * (d[1] + c[1] * d[2]);

34999

+ unsigned int i;

35000

+

35001

+ for (i = 0; i < e; i++)

35002

+ {

35003

+ int j = e * d[3] + i;

35004

+

35005

+ unsigned int n0, n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11;

35006

+ float _Complex s = 0.;

35007

+ unsigned int t = 0;

35008

+

35009

+ for (n0 = 0; n0 < l; n0++)

35010

+ for (n1 = 0; n1 < l; n1++)

35011

+ for (n2 = 0; n2 < l; n2++)

35012

+ for (n3 = 0; n3 < l; n3++)

35013

+ for (n4 = 0; n4 < l; n4++)

35014

+ for (n5 = 0; n5 < l; n5++)

35015

+ for (n6 = 0; n6 < l; n6++)

35016

+ for (n7 = 0; n7 < l; n7++)

35017

+ for (n8 = 0; n8 < l; n8++)

35018

+ for (n9 = 0; n9 < l; n9++)

35019

+ for (n10 = 0; n10 < l; n10++)

35020

+ for (n11 = 0; n11 < l; n11++)

35021

+ {

35022

+ if (t % g == h)

35023

+ s

35024

+ += f[n0][n4][j][n8] * f[n1][n5][j][n9] * ~(f[n2][n6][w][n10]) * ~(f[n3][n7][w][n11])

35025

+ * (+0.25 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1]

35026

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0]

35027

+ + 0.25 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1]

35028

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

35029

+ - 0.5 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1]

35030

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

35031

+ + 0.25 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1]

35032

+ * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0]

35033

+ - 0.5 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1]

35034

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

35035

+ + 0.25 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1]

35036

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

35037

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1]

35038

+ * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0]

35039

+ - 0.5 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1]

35040

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

35041

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1]

35042

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

35043

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1]

35044

+ * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0]

35045

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1]

35046

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

35047

+ - 0.5 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1]

35048

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

35049

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

35050

+ * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0]

35051

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

35052

+ * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0]

35053

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

35054

+ * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0]

35055

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

35056

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0]

35057

+ + 1. * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

35058

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

35059

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

35060

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

35061

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

35062

+ * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0]

35063

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

35064

+ * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0]

35065

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

35066

+ * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0]

35067

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

35068

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0]

35069

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

35070

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

35071

+ + 1. * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

35072

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

35073

+ + 0.5 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

35074

+ * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] * v[0][n10][0][i][n8][0]

35075

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

35076

+ * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0] * v[0][n10][0][i][n8][0]

35077

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

35078

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n0][0] * v[0][n10][0][i][n1][0]

35079

+ + 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

35080

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n10][0][i][n0][0]

35081

+ + 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

35082

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n0][0] * v[0][n10][0][i][n1][0]

35083

+ - 0.5 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

35084

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n10][0][i][n0][0]

35085

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1]

35086

+ * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] * v[0][n3][0][i][n8][0]

35087

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1]

35088

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n0][0] * v[0][n3][0][i][n1][0]);

35089

+ t++;

35090

+ }

35091

+ int u = (j - w + b) % b;

35092

+ int q = (j >= w ? +1 : -1);

35093

+ int r = q;

35094

+ x[u] += r * s;

35095

+ }

35096

+}

35097

Index: gcc/testsuite/c-c++-common/pr36282-3.c

35098

===================================================================

35099

--- a/src/gcc/testsuite/c-c++-common/pr36282-3.c (.../tags/gcc_4_8_2_release)

35100

+++ b/src/gcc/testsuite/c-c++-common/pr36282-3.c (.../branches/gcc-4_8-branch)

35101

@@ -0,0 +1,13 @@

35102

+/* PR middle-end/36282 */

35103

+/* { dg-do compile } */

35104

+

35105

+void bar (void);

35106

+#pragma weak bar

35107

+

35108

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

35109

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

35110

+

35111

+void

35112

+foo (void)

35113

+{

35114

+}

35115

Index: gcc/testsuite/c-c++-common/pr59037.c

35116

===================================================================

35117

--- a/src/gcc/testsuite/c-c++-common/pr59037.c (.../tags/gcc_4_8_2_release)

35118

+++ b/src/gcc/testsuite/c-c++-common/pr59037.c (.../branches/gcc-4_8-branch)

35119

@@ -0,0 +1,12 @@

35120

+/* { dg-do compile } */

35121

+/* { dg-options "-O3" } */

35122

+

35123

+typedef int v4si __attribute__ ((vector_size (16)));

35124

+

35125

+int

35126

+main (int argc, char** argv)

35127

+{

35128

+ v4si x = {0,1,2,3};

35129

+ x = (v4si) {(x)[3], (x)[2], (x)[1], (x)[0]};

35130

+ return x[4];

35131

+}

35132

Index: gcc/testsuite/c-c++-common/pr59280.c

35133

===================================================================

35134

--- a/src/gcc/testsuite/c-c++-common/pr59280.c (.../tags/gcc_4_8_2_release)

35135

+++ b/src/gcc/testsuite/c-c++-common/pr59280.c (.../branches/gcc-4_8-branch)

35136

@@ -0,0 +1,4 @@

35137

+/* PR c/59280 */

35138

+/* { dg-do compile } */

35139

+

35140

+void bar (char *) __attribute__((constructor(foo))); /* { dg-error "constructor priorities must be integers|was not declared|constructor priorities are not supported" } */

35141

Index: gcc/testsuite/c-c++-common/pr37743.c

35142

===================================================================

35143

--- a/src/gcc/testsuite/c-c++-common/pr37743.c (.../tags/gcc_4_8_2_release)

35144

+++ b/src/gcc/testsuite/c-c++-common/pr37743.c (.../branches/gcc-4_8-branch)

35145

@@ -0,0 +1,13 @@

35146

+/* PR c/37743 */

35147

+/* This needs to be run only on targets where __UINT32_TYPE__ is defined

35148

+ to unsigned int. */

35149

+/* { dg-do compile { target *-*-linux-gnu* } } */

35150

+/* { dg-options "-Wformat" } */

35151

+

35152

+int foo (const char *, ...) __attribute__ ((format (printf, 1, 2)));

35153

+

35154

+void

35155

+bar (unsigned int x)

35156

+{

35157

+ foo ("%x", __builtin_bswap32 (x));

35158

+}

35159

Index: gcc/testsuite/c-c++-common/fold-divmul-1.c

35160

===================================================================

35161

--- a/src/gcc/testsuite/c-c++-common/fold-divmul-1.c (.../tags/gcc_4_8_2_release)

35162

+++ b/src/gcc/testsuite/c-c++-common/fold-divmul-1.c (.../branches/gcc-4_8-branch)

35163

@@ -0,0 +1,11 @@

35164

+/* { dg-do compile } */

35165

+/* { dg-options "-fdump-tree-original" } */

35166

+

35167

+int *

35168

+fx (int *b, int *e)

35169

+{

35170

+ return b + (e - b);

35171

+}

35172

+

35173

+/* { dg-final { scan-tree-dump-not "/\\\[ex\\\]" "original" } } */

35174

+/* { dg-final { cleanup-tree-dump "original" } } */

35175

Index: gcc/testsuite/c-c++-common/torture/pr58794-1.c

35176

===================================================================

35177

--- a/src/gcc/testsuite/c-c++-common/torture/pr58794-1.c (.../tags/gcc_4_8_2_release)

35178

+++ b/src/gcc/testsuite/c-c++-common/torture/pr58794-1.c (.../branches/gcc-4_8-branch)

35179

@@ -0,0 +1,29 @@

35180

+/* { dg-do compile } */

35181

+

35182

+struct S0

35183

+{

35184

+ int f;

35185

+};

35186

+

35187

+struct S1

35188

+{

35189

+ struct S0 f1;

35190

+ volatile int f2;

35191

+};

35192

+

35193

+struct S2

35194

+{

35195

+ struct S1 g;

35196

+} a, b;

35197

+

35198

+static int *c[1][2] = {{0, (int *)&a.g.f2}};

35199

+static int d;

35200

+

35201

+int

35202

+main ()

35203

+{

35204

+ for (d = 0; d < 1; d++)

35205

+ for (b.g.f1.f = 0; b.g.f1.f < 1; b.g.f1.f++)

35206

+ *c[b.g.f1.f][d + 1] = 0;

35207

+ return 0;

35208

+}

35209

Index: gcc/testsuite/c-c++-common/torture/pr58794-2.c

35210

===================================================================

35211

--- a/src/gcc/testsuite/c-c++-common/torture/pr58794-2.c (.../tags/gcc_4_8_2_release)

35212

+++ b/src/gcc/testsuite/c-c++-common/torture/pr58794-2.c (.../branches/gcc-4_8-branch)

35213

@@ -0,0 +1,21 @@

35214

+/* { dg-do compile } */

35215

+

35216

+struct S

35217

+{

35218

+ volatile int f;

35219

+} a;

35220

+

35221

+unsigned int b;

35222

+

35223

+static int *c[1][2] = {{0, (int *)&a.f}};

35224

+static unsigned int d;

35225

+

35226

+int

35227

+main ()

35228

+{

35229

+ for (; d < 1; d++)

35230

+ for (; b < 1; b++)

35231

+ *c[b][d + 1] = 0;

35232

+

35233

+ return 0;

35234

+}

35235

Index: gcc/testsuite/c-c++-common/torture/pr60026.c

35236

===================================================================

35237

--- a/src/gcc/testsuite/c-c++-common/torture/pr60026.c (.../tags/gcc_4_8_2_release)

35238

+++ b/src/gcc/testsuite/c-c++-common/torture/pr60026.c (.../branches/gcc-4_8-branch)

35239

@@ -0,0 +1,28 @@

35240

+/* PR ipa/60026 */

35241

+/* { dg-do compile } */

35242

+

35243

+struct S { int f; } a;

35244

+

35245

+__attribute__((optimize (0)))

35246

+struct S foo (int x, struct S y)

35247

+{

35248

+ int b = y.f;

35249

+ return a;

35250

+}

35251

+

35252

+void

35253

+bar ()

35254

+{

35255

+ while (a.f)

35256

+ {

35257

+ struct S c = {0};

35258

+ foo (0, c);

35259

+ }

35260

+}

35261

+

35262

+int

35263

+main ()

35264

+{

35265

+ bar ();

35266

+ return 0;

35267

+}

35268

Index: gcc/testsuite/c-c++-common/vector-compare-2.c

35269

===================================================================

35270

--- a/src/gcc/testsuite/c-c++-common/vector-compare-2.c (.../tags/gcc_4_8_2_release)

35271

+++ b/src/gcc/testsuite/c-c++-common/vector-compare-2.c (.../branches/gcc-4_8-branch)

35272

@@ -1,6 +1,7 @@

35273

/* { dg-do compile } */

35274

/* { dg-options "-fno-common" { target hppa*-*-hpux* } } */

35275

/* { dg-options "-mabi=altivec" { target { { powerpc*-*-linux* } && ilp32 } } } */

35276

+/* { dg-options "-msse2" { target { i?86-*-* x86_64-*-* } } } */

35277

/* Ignore warning on some powerpc-ibm-aix configurations. */

35278

/* { dg-prune-output "non-standard ABI extension" } */

35279

35280

Index: gcc/testsuite/c-c++-common/pr36282-4.c

35281

===================================================================

35282

--- a/src/gcc/testsuite/c-c++-common/pr36282-4.c (.../tags/gcc_4_8_2_release)

35283

+++ b/src/gcc/testsuite/c-c++-common/pr36282-4.c (.../branches/gcc-4_8-branch)

35284

@@ -0,0 +1,13 @@

35285

+/* PR middle-end/36282 */

35286

+/* { dg-do compile } */

35287

+

35288

+#pragma weak bar

35289

+void bar (void);

35290

+

35291

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

35292

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

35293

+

35294

+void

35295

+foo (void)

35296

+{

35297

+}

35298

Index: gcc/testsuite/c-c++-common/gomp/pr58809.c

35299

===================================================================

35300

--- a/src/gcc/testsuite/c-c++-common/gomp/pr58809.c (.../tags/gcc_4_8_2_release)

35301

+++ b/src/gcc/testsuite/c-c++-common/gomp/pr58809.c (.../branches/gcc-4_8-branch)

35302

@@ -0,0 +1,31 @@

35303

+/* PR middle-end/58809 */

35304

+/* { dg-do compile } */

35305

+/* { dg-options "-fopenmp" } */

35306

+

35307

+_Complex int j;

35308

+_Complex double d;

35309

+

35310

+void

35311

+foo (void)

35312

+{

35313

+ #pragma omp parallel reduction (&:j) /* { dg-error "has invalid type for" } */

35314

+ ;

35315

+ #pragma omp parallel reduction (|:j) /* { dg-error "has invalid type for" } */

35316

+ ;

35317

+ #pragma omp parallel reduction (^:j) /* { dg-error "has invalid type for" } */

35318

+ ;

35319

+ #pragma omp parallel reduction (min:j) /* { dg-error "has invalid type for" } */

35320

+ ;

35321

+ #pragma omp parallel reduction (max:j) /* { dg-error "has invalid type for" } */

35322

+ ;

35323

+ #pragma omp parallel reduction (&:d) /* { dg-error "has invalid type for" } */

35324

+ ;

35325

+ #pragma omp parallel reduction (|:d) /* { dg-error "has invalid type for" } */

35326

+ ;

35327

+ #pragma omp parallel reduction (^:d) /* { dg-error "has invalid type for" } */

35328

+ ;

35329

+ #pragma omp parallel reduction (min:d) /* { dg-error "has invalid type for" } */

35330

+ ;

35331

+ #pragma omp parallel reduction (max:d) /* { dg-error "has invalid type for" } */

35332

+ ;

35333

+}

35334

Index: gcc/testsuite/c-c++-common/gomp/pr59467.c

35335

===================================================================

35336

--- a/src/gcc/testsuite/c-c++-common/gomp/pr59467.c (.../tags/gcc_4_8_2_release)

35337

+++ b/src/gcc/testsuite/c-c++-common/gomp/pr59467.c (.../branches/gcc-4_8-branch)

35338

@@ -0,0 +1,68 @@

35339

+/* PR libgomp/59467 */

35340

+

35341

+int v;

35342

+

35343

+void

35344

+foo (void)

35345

+{

35346

+ int x = 0, y = 0;

35347

+ #pragma omp parallel

35348

+ {

35349

+ int z;

35350

+ #pragma omp single copyprivate (x) /* { dg-error "is not threadprivate or private in outer context" } */

35351

+ {

35352

+ #pragma omp atomic write

35353

+ x = 6;

35354

+ }

35355

+ #pragma omp atomic read

35356

+ z = x;

35357

+ #pragma omp atomic

35358

+ y += z;

35359

+ }

35360

+ #pragma omp parallel

35361

+ {

35362

+ int z;

35363

+ #pragma omp single copyprivate (v) /* { dg-error "is not threadprivate or private in outer context" } */

35364

+ {

35365

+ #pragma omp atomic write

35366

+ v = 6;

35367

+ }

35368

+ #pragma omp atomic read

35369

+ z = v;

35370

+ #pragma omp atomic

35371

+ y += z;

35372

+ }

35373

+ #pragma omp parallel private (x)

35374

+ {

35375

+ int z;

35376

+ #pragma omp single copyprivate (x)

35377

+ {

35378

+ #pragma omp atomic write

35379

+ x = 6;

35380

+ }

35381

+ #pragma omp atomic read

35382

+ z = x;

35383

+ #pragma omp atomic

35384

+ y += z;

35385

+ }

35386

+ x = 0;

35387

+ #pragma omp parallel reduction (+:x)

35388

+ {

35389

+ #pragma omp single copyprivate (x)

35390

+ {

35391

+ #pragma omp atomic write

35392

+ x = 6;

35393

+ }

35394

+ #pragma omp atomic

35395

+ y += x;

35396

+ }

35397

+ #pragma omp single copyprivate (x)

35398

+ {

35399

+ x = 7;

35400

+ }

35401

+ #pragma omp single copyprivate (v) /* { dg-error "is not threadprivate or private in outer context" } */

35402

+ {

35403

+ #pragma omp atomic write

35404

+ v = 6;

35405

+ }

35406

+}

35407

Index: gcc/testsuite/c-c++-common/pr36282-1.c

35408

===================================================================

35409

--- a/src/gcc/testsuite/c-c++-common/pr36282-1.c (.../tags/gcc_4_8_2_release)

35410

+++ b/src/gcc/testsuite/c-c++-common/pr36282-1.c (.../branches/gcc-4_8-branch)

35411

@@ -0,0 +1,12 @@

35412

+/* PR middle-end/36282 */

35413

+/* { dg-do compile } */

35414

+

35415

+#pragma weak bar

35416

+

35417

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

35418

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

35419

+

35420

+void

35421

+foo (void)

35422

+{

35423

+}

35424

Index: gcc/testsuite/c-c++-common/pr60689.c

35425

===================================================================

35426

--- a/src/gcc/testsuite/c-c++-common/pr60689.c (.../tags/gcc_4_8_2_release)

35427

+++ b/src/gcc/testsuite/c-c++-common/pr60689.c (.../branches/gcc-4_8-branch)

35428

@@ -0,0 +1,10 @@

35429

+/* PR c++/60689 */

35430

+/* { dg-do compile } */

35431

+

35432

+struct S { char x[9]; };

35433

+

35434

+void

35435

+foo (struct S *x, struct S *y, struct S *z)

35436

+{

35437

+ __atomic_exchange (x, y, z, __ATOMIC_SEQ_CST);

35438

+}

35439

Index: gcc/testsuite/c-c++-common/scal-to-vec2.c

35440

===================================================================

35441

--- a/src/gcc/testsuite/c-c++-common/scal-to-vec2.c (.../tags/gcc_4_8_2_release)

35442

+++ b/src/gcc/testsuite/c-c++-common/scal-to-vec2.c (.../branches/gcc-4_8-branch)

35443

@@ -1,6 +1,7 @@

35444

/* { dg-do compile } */

35445

/* { dg-options "-fno-common" { target hppa*-*-hpux* } } */

35446

/* { dg-options "-mabi=altivec" { target { { powerpc*-*-linux* } && ilp32 } } } */

35447

+/* { dg-options "-msse2" { target { i?86-*-* x86_64-*-* } } } */

35448

/* Ignore warning on some powerpc-ibm-aix configurations. */

35449

/* { dg-prune-output "non-standard ABI extension" } */

35450

35451

Index: gcc/testsuite/c-c++-common/pr59032.c

35452

===================================================================

35453

--- a/src/gcc/testsuite/c-c++-common/pr59032.c (.../tags/gcc_4_8_2_release)

35454

+++ b/src/gcc/testsuite/c-c++-common/pr59032.c (.../branches/gcc-4_8-branch)

35455

@@ -0,0 +1,30 @@

35456

+/* { dg-do compile } */

35457

+/* { dg-options "-O2" } */

35458

+

35459

+void

35460

+foo()

35461

+{

35462

+ float v __attribute__((vector_size(8)));

35463

+ v++;

35464

+}

35465

+

35466

+void

35467

+foo2 ()

35468

+{

35469

+ float v __attribute__((vector_size(8)));

35470

+ ++v;

35471

+}

35472

+

35473

+void

35474

+foo3 ()

35475

+{

35476

+ float v __attribute__((vector_size(8)));

35477

+ v--;

35478

+}

35479

+

35480

+void

35481

+foo4 ()

35482

+{

35483

+ float v __attribute__((vector_size(8)));

35484

+ --v;

35485

+}

35486

Index: gcc/testsuite/c-c++-common/pr36282-2.c

35487

===================================================================

35488

--- a/src/gcc/testsuite/c-c++-common/pr36282-2.c (.../tags/gcc_4_8_2_release)

35489

+++ b/src/gcc/testsuite/c-c++-common/pr36282-2.c (.../branches/gcc-4_8-branch)

35490

@@ -0,0 +1,10 @@

35491

+/* PR middle-end/36282 */

35492

+/* { dg-do compile } */

35493

+

35494

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

35495

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

35496

+

35497

+void

35498

+foo (void)

35499

+{

35500

+}

35501

Index: gcc/cp/typeck.c

35502

===================================================================

35503

--- a/src/gcc/cp/typeck.c (.../tags/gcc_4_8_2_release)

35504

+++ b/src/gcc/cp/typeck.c (.../branches/gcc-4_8-branch)

35505

@@ -4103,6 +4103,11 @@

35506

case TRUTH_ORIF_EXPR:

35507

case TRUTH_AND_EXPR:

35508

case TRUTH_OR_EXPR:

35509

+ if (TREE_CODE (type0) == VECTOR_TYPE || TREE_CODE (type1) == VECTOR_TYPE)

35510

+ {

35511

+ sorry ("logical operation on vector type");

35512

+ return error_mark_node;

35513

+ }

35514

result_type = boolean_type_node;

35515

break;

35516

35517

@@ -5010,7 +5015,10 @@

35518

cp_truthvalue_conversion (tree expr)

35519

{

35520

tree type = TREE_TYPE (expr);

35521

- if (TYPE_PTRDATAMEM_P (type))

35522

+ if (TYPE_PTRDATAMEM_P (type)

35523

+ /* Avoid ICE on invalid use of non-static member function. */

35524

+ || (TREE_CODE (expr) == FUNCTION_DECL

35525

+ && DECL_NONSTATIC_MEMBER_FUNCTION_P (expr)))

35526

return build_binary_op (EXPR_LOCATION (expr),

35527

NE_EXPR, expr, nullptr_node, 1);

35528

else if (TYPE_PTR_P (type) || TYPE_PTRMEMFUNC_P (type))

35529

@@ -5588,7 +5596,9 @@

35530

inc = cxx_sizeof_nowarn (TREE_TYPE (argtype));

35531

}

35532

else

35533

- inc = integer_one_node;

35534

+ inc = (TREE_CODE (argtype) == VECTOR_TYPE

35535

+ ? build_one_cst (argtype)

35536

+ : integer_one_node);

35537

35538

inc = cp_convert (argtype, inc, complain);

35539

35540

@@ -7194,8 +7204,7 @@

35541

side effect associated with any single compound assignment

35542

operator. -- end note ] */

35543

lhs = stabilize_reference (lhs);

35544

- if (TREE_SIDE_EFFECTS (rhs))

35545

- rhs = mark_rvalue_use (rhs);

35546

+ rhs = rvalue (rhs);

35547

rhs = stabilize_expr (rhs, &init);

35548

newrhs = cp_build_binary_op (input_location,

35549

modifycode, lhs, rhs,

35550

@@ -7611,7 +7620,7 @@

35551

/* Handle null pointer to member function conversions. */

35552

if (null_ptr_cst_p (pfn))

35553

{

35554

- pfn = build_c_cast (input_location, type, pfn);

35555

+ pfn = cp_build_c_cast (type, pfn, complain);

35556

return build_ptrmemfunc1 (to_type,

35557

integer_zero_node,

35558

pfn);

35559

Index: gcc/cp/decl.c

35560

===================================================================

35561

--- a/src/gcc/cp/decl.c (.../tags/gcc_4_8_2_release)

35562

+++ b/src/gcc/cp/decl.c (.../branches/gcc-4_8-branch)

35563

@@ -1867,9 +1867,9 @@

35564

/* Merge the data types specified in the two decls. */

35565

newtype = merge_types (TREE_TYPE (newdecl), TREE_TYPE (olddecl));

35566

35567

- /* If merge_types produces a non-typedef type, just use the old type. */

35568

- if (TREE_CODE (newdecl) == TYPE_DECL

35569

- && newtype == DECL_ORIGINAL_TYPE (newdecl))

35570

+ /* For typedefs use the old type, as the new type's DECL_NAME points

35571

+ at newdecl, which will be ggc_freed. */

35572

+ if (TREE_CODE (newdecl) == TYPE_DECL)

35573

newtype = oldtype;

35574

35575

if (TREE_CODE (newdecl) == VAR_DECL)

35576

@@ -8193,7 +8193,9 @@

35577

abi_1_itype = error_mark_node;

35578

}

35579

35580

- size = maybe_constant_value (size);

35581

+ if (INTEGRAL_OR_UNSCOPED_ENUMERATION_TYPE_P (type))

35582

+ size = maybe_constant_value (size);

35583

+

35584

if (!TREE_CONSTANT (size))

35585

size = osize;

35586

}

35587

@@ -11891,7 +11893,10 @@

35588

35589

if (decl

35590

&& (DECL_CLASS_TEMPLATE_P (decl)

35591

- || DECL_TEMPLATE_TEMPLATE_PARM_P (decl)))

35592

+ /* If scope is ts_current we're defining a class, so ignore a

35593

+ template template parameter. */

35594

+ || (scope != ts_current

35595

+ && DECL_TEMPLATE_TEMPLATE_PARM_P (decl))))

35596

decl = DECL_TEMPLATE_RESULT (decl);

35597

35598

if (decl && TREE_CODE (decl) == TYPE_DECL)

35599

Index: gcc/cp/except.c

35600

===================================================================

35601

--- a/src/gcc/cp/except.c (.../tags/gcc_4_8_2_release)

35602

+++ b/src/gcc/cp/except.c (.../branches/gcc-4_8-branch)

35603

@@ -380,6 +380,9 @@

35604

{

35605

tree type = body ? TREE_TYPE (body) : void_type_node;

35606

35607

+ if (!flag_exceptions)

35608

+ return body;

35609

+

35610

if (cond && !value_dependent_expression_p (cond))

35611

{

35612

cond = cxx_constant_value (cond);

35613

Index: gcc/cp/ChangeLog

35614

===================================================================

35615

--- a/src/gcc/cp/ChangeLog (.../tags/gcc_4_8_2_release)

35616

+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-4_8-branch)

35617

@@ -1,3 +1,246 @@

35618

+2014-02-28 Jason Merrill <jason@redhat.com>

35619

+

35620

+ PR c++/58845

35621

+ * typeck.c (cp_build_binary_op): Sorry on vector&&vector.

35622

+

35623

+2014-02-26 Jason Merrill <jason@redhat.com>

35624

+

35625

+ PR c++/60182

35626

+ * pt.c (unify): Ignore alias templates when deducing a template

35627

+ template parameter.

35628

+

35629

+2014-02-24 Jason Merrill <jason@redhat.com>

35630

+

35631

+ PR c++/60146

35632

+ * pt.c (tsubst_omp_for_iterator): Don't let substitution of the

35633

+ DECL_EXPR initialize a non-class iterator.

35634

+

35635

+2014-02-24 Fabien Chêne <fabien@gcc.gnu.org>

35636

+ PR c++/37140

35637

+ * parser.c (cp_parser_nonclass_name): Call strip_using_decl and

35638

+ move the code handling dependent USING_DECLs...

35639

+ * name-lookup.c (strip_using_decl): ...Here.

35640

+

35641

+2014-02-21 Jason Merrill <jason@redhat.com>

35642

+

35643

+ PR c++/60108

35644

+ * semantics.c (expand_or_defer_fn_1): Check DECL_DEFAULTED_FN.

35645

+

35646

+ PR c++/60187

35647

+ * parser.c (cp_parser_enum_specifier): Call

35648

+ check_for_bare_parameter_packs.

35649

+

35650

+ PR c++/60216

35651

+ * pt.c (register_specialization): Copy DECL_DELETED_FN to clones.

35652

+

35653

+ PR c++/60219

35654

+ * pt.c (coerce_template_parms): Bail if argument packing fails.

35655

+

35656

+ PR c++/60248

35657

+ * mangle.c (mangle_decl): Don't make an alias for a TYPE_DECL.

35658

+

35659

+2014-02-20 Jason Merrill <jason@redhat.com>

35660

+

35661

+ PR c++/60274

35662

+ Revert:

35663

+ PR c++/58606

35664

+ * pt.c (template_parm_to_arg): Call convert_from_reference.

35665

+ (tsubst_template_arg): Don't strip reference refs.

35666

+

35667

+2014-02-20 Kai Tietz <ktietz@redhat.com>

35668

+

35669

+ PR c++/58873

35670

+ * parser.c (cp_parser_functional_cast): Treat NULL_TREE

35671

+ valued type argument as error_mark_node.

35672

+

35673

+ PR c++/58835

35674

+ * semantics.c (finish_fname): Handle error_mark_node.

35675

+

35676

+2014-02-19 Jason Merrill <jason@redhat.com>

35677

+

35678

+ PR c++/60046

35679

+ * pt.c (maybe_instantiate_noexcept): Don't instantiate exception

35680

+ spec from template context.

35681

+

35682

+2014-01-31 Jason Merrill <jason@redhat.com>

35683

+

35684

+ PR c++/58672

35685

+ * decl2.c (handle_tls_init): Handle null init fn.

35686

+

35687

+ PR c++/55800

35688

+ * decl2.c (get_tls_init_fn): Copy DECL_EXTERNAL from the variable.

35689

+

35690

+ PR c++/59646

35691

+ * call.c (convert_like_real) [ck_aggr]: Set TARGET_EXPR_LIST_INIT_P.

35692

+ [ck_list]: Check for error_mark_node.

35693

+

35694

+ PR c++/57043

35695

+ * pt.c (fn_type_unification): Don't do DEDUCE_EXACT check

35696

+ during partial ordering.

35697

+

35698

+2014-01-30 Jason Merrill <jason@redhat.com>

35699

+

35700

+ PR c++/57899

35701

+ * pt.c (instantiate_template_1): Save/restore local_specializations.

35702

+

35703

+2014-01-29 Jason Merrill <jason@redhat.com>

35704

+

35705

+ PR c++/59989

35706

+ * pt.c (expand_template_argument_pack): Correct

35707

+ non_default_args_count calculation.

35708

+

35709

+ PR c++/58466

35710

+ * pt.c (unify_pack_expansion): Call expand_template_argument_pack.

35711

+

35712

+2014-01-28 Jason Merrill <jason@redhat.com>

35713

+

35714

+ PR c++/58632

35715

+ * decl.c (lookup_and_check_tag): Ignore template parameters if

35716

+ scope == ts_current.

35717

+ * pt.c (check_template_shadow): Don't complain about the injected

35718

+ class name.

35719

+

35720

+2014-01-27 Jason Merrill <jason@redhat.com>

35721

+

35722

+ PR c++/54652

35723

+ * decl.c (duplicate_decls): Always use oldtype for TYPE_DECL.

35724

+

35725

+ PR c++/58504

35726

+ * pt.c (tsubst_copy_and_build) [TRAIT_EXPR]: Use tsubst for

35727

+ types.

35728

+

35729

+ PR c++/58606

35730

+ * pt.c (template_parm_to_arg): Call convert_from_reference.

35731

+ (tsubst_template_arg): Don't strip reference refs.

35732

+

35733

+ PR c++/58639

35734

+ * call.c (build_aggr_conv): Reject value-initialization of reference.

35735

+

35736

+ PR c++/58812

35737

+ * call.c (convert_like_real): Give helpful error about excess braces

35738

+ for reference binding, too.

35739

+

35740

+ PR c++/58814

35741

+ * typeck.c (cp_build_modify_expr): Make the RHS an rvalue before

35742

+ stabilizing.

35743

+

35744

+ PR c++/58837

35745

+ * typeck.c (cp_truthvalue_conversion): Use explicit comparison for

35746

+ FUNCTION_DECL.

35747

+

35748

+ PR c++/59097

35749

+ * decl.c (compute_array_index_type): Don't call

35750

+ maybe_constant_value for a non-integral expression.

35751

+

35752

+ PR c++/58965

35753

+ * mangle.c (write_guarded_var_name): Handle null DECL_NAME.

35754

+

35755

+2014-01-24 Paolo Carlini <paolo.carlini@oracle.com>

35756

+

35757

+ PR c++/57524

35758

+ * name-lookup.c (push_using_directive): Use timevar_cond_start.

35759

+

35760

+2014-01-23 Jakub Jelinek <jakub@redhat.com>

35761

+

35762

+ PR middle-end/58809

35763

+ * semantics.c (finish_omp_clauses): Reject MIN_EXPR, MAX_EXPR,

35764

+ BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR on COMPLEX_TYPEs.

35765

+

35766

+2014-01-20 Marek Polacek <polacek@redhat.com>

35767

+

35768

+ Backported from mainline

35769

+ 2014-01-17 Marek Polacek <polacek@redhat.com>

35770

+

35771

+ PR c++/59838

35772

+ * cvt.c (ocp_convert): Don't segfault on non-existing

35773

+ ENUM_UNDERLYING_TYPE.

35774

+

35775

+2014-01-10 Paolo Carlini <paolo.carlini@oracle.com>

35776

+

35777

+ PR c++/56060

35778

+ PR c++/59730

35779

+ * pt.c (type_dependent_expression_p): Handle EXPR_PACK_EXPANSION.

35780

+

35781

+2013-12-12 Jason Merrill <jason@redhat.com>

35782

+

35783

+ PR c++/58954

35784

+ * pt.c (resolve_overloaded_unification): Discard access checks.

35785

+

35786

+2013-12-05 Jason Merrill <jason@redhat.com>

35787

+

35788

+ PR c++/59044

35789

+ PR c++/59052

35790

+ * pt.c (most_specialized_class): Use the partially instantiated

35791

+ template for deduction. Drop the TMPL parameter.

35792

+

35793

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

35794

+

35795

+ PR c++/59268

35796

+ * pt.c (tsubst_copy_and_build): Handle POINTER_PLUS_EXPR.

35797

+

35798

+2013-11-27 Tom de Vries <tom@codesourcery.com>

35799

+ Marc Glisse <marc.glisse@inria.fr>

35800

+

35801

+ PR c++/59032

35802

+ * typeck.c (cp_build_unary_op): Allow vector increment and decrement.

35803

+

35804

+2013-11-27 Tom de Vries <tom@codesourcery.com>

35805

+ Marc Glisse <marc.glisse@inria.fr>

35806

+

35807

+ PR middle-end/59037

35808

+ * semantics.c (cxx_fold_indirect_ref): Don't create out-of-bounds

35809

+ BIT_FIELD_REF.

35810

+

35811

+2013-11-28 Jakub Jelinek <jakub@redhat.com>

35812

+

35813

+ PR c++/59297

35814

+ * semantics.c (finish_omp_atomic): Call finish_expr_stmt

35815

+ rather than add_stmt.

35816

+

35817

+2013-11-23 Easwaran Raman <eraman@google.com>

35818

+

35819

+ PR c++/59031

35820

+ * call.c (build_new_method_call_1): Comnpare function context

35821

+ with BASELINK_BINFO type rather than instance type before

35822

+ marking the call with LOOKUP_NONVIRTUAL.

35823

+

35824

+2013-10-31 Jason Merrill <jason@redhat.com>

35825

+

35826

+ PR c++/58162

35827

+ * parser.c (cp_parser_late_parse_one_default_arg): Set

35828

+ TARGET_EXPR_DIRECT_INIT_P.

35829

+

35830

+2013-11-11 Paolo Carlini <paolo.carlini@oracle.com>

35831

+

35832

+ * cvt.c (cp_convert_to_pointer): Call build_ptrmemfunc before

35833

+ maybe_warn_zero_as_null_pointer_constant to avoid duplicate

35834

+ -Wzero-as-null-pointer-constant diagnostics.

35835

+

35836

+ * typeck.c (build_ptrmemfunc): Use cp_build_c_cast.

35837

+

35838

+2013-10-25 Tom de Vries <tom@codesourcery.com>

35839

+

35840

+ PR c++/58282

35841

+ * except.c (build_must_not_throw_expr): Handle

35842

+ flag_exceptions.

35843

+

35844

+2013-10-17 Paolo Carlini <paolo.carlini@oracle.com>

35845

+

35846

+ PR c++/58596

35847

+ * semantics.c (lambda_expr_this_capture): Handle NSDMIs in the

35848

+ cp_unevaluated_operand case.

35849

+

35850

+2013-10-16 Paolo Carlini <paolo.carlini@oracle.com>

35851

+

35852

+ PR c++/58633

35853

+ * parser.c (cp_parser_pseudo_destructor_name): Revert r174385 changes.

35854

+

35855

+2013-10-16 Jason Merrill <jason@redhat.com>

35856

+

35857

+ PR c++/57850

35858

+ * decl2.c (dump_tu): Split out from...

35859

+ (cp_write_global_declarations): ...here. Call it in PCH mode.

35860

+

35861

2013-10-16 Release Manager

35862

35863

* GCC 4.8.2 released.

35864

Index: gcc/cp/pt.c

35865

===================================================================

35866

--- a/src/gcc/cp/pt.c (.../tags/gcc_4_8_2_release)

35867

+++ b/src/gcc/cp/pt.c (.../branches/gcc-4_8-branch)

35868

@@ -170,7 +170,7 @@

35869

static tree tsubst_template_args (tree, tree, tsubst_flags_t, tree);

35870

static tree tsubst_template_parms (tree, tree, tsubst_flags_t);

35871

static void regenerate_decl_from_template (tree, tree);

35872

-static tree most_specialized_class (tree, tree, tsubst_flags_t);

35873

+static tree most_specialized_class (tree, tsubst_flags_t);

35874

static tree tsubst_aggr_type (tree, tree, tsubst_flags_t, tree, int);

35875

static tree tsubst_arg_types (tree, tree, tree, tsubst_flags_t, tree);

35876

static tree tsubst_function_type (tree, tree, tsubst_flags_t, tree);

35877

@@ -1419,6 +1419,8 @@

35878

= DECL_DECLARED_INLINE_P (fn);

35879

DECL_SOURCE_LOCATION (clone)

35880

= DECL_SOURCE_LOCATION (fn);

35881

+ DECL_DELETED_FN (clone)

35882

+ = DECL_DELETED_FN (fn);

35883

}

35884

check_specialization_namespace (tmpl);

35885

35886

@@ -3436,7 +3438,7 @@

35887

for (i = 0; i < num_packed; ++i, ++out_arg)

35888

TREE_VEC_ELT (result_args, out_arg) = TREE_VEC_ELT(packed, i);

35889

if (non_default_args_count > 0)

35890

- non_default_args_count += num_packed;

35891

+ non_default_args_count += num_packed - 1;

35892

}

35893

else

35894

{

35895

@@ -3491,6 +3493,11 @@

35896

|| TEMPLATE_PARMS_FOR_INLINE (current_template_parms))

35897

return true;

35898

35899

+ /* Don't complain about the injected class name, as we've already

35900

+ complained about the class itself. */

35901

+ if (DECL_SELF_REFERENCE_P (decl))

35902

+ return false;

35903

+

35904

error ("declaration of %q+#D", decl);

35905

error (" shadows template parm %q+#D", olddecl);

35906

return false;

35907

@@ -4261,7 +4268,7 @@

35908

if (COMPLETE_TYPE_P (inst_type)

35909

&& CLASSTYPE_IMPLICIT_INSTANTIATION (inst_type))

35910

{

35911

- tree spec = most_specialized_class (inst_type, maintmpl, tf_none);

35912

+ tree spec = most_specialized_class (inst_type, tf_none);

35913

if (spec && TREE_TYPE (spec) == type)

35914

permerror (input_location,

35915

"partial specialization of %qT after instantiation "

35916

@@ -6672,6 +6679,8 @@

35917

/* Store this argument. */

35918

if (arg == error_mark_node)

35919

lost++;

35920

+ if (lost)

35921

+ break;

35922

TREE_VEC_ELT (new_inner_args, parm_idx) = arg;

35923

35924

/* We are done with all of the arguments. */

35925

@@ -8572,7 +8581,7 @@

35926

35927

/* Determine what specialization of the original template to

35928

instantiate. */

35929

- t = most_specialized_class (type, templ, tf_warning_or_error);

35930

+ t = most_specialized_class (type, tf_warning_or_error);

35931

if (t == error_mark_node)

35932

{

35933

TYPE_BEING_DEFINED (type) = 1;

35934

@@ -12694,27 +12703,43 @@

35935

tsubst_expr ((NODE), args, complain, in_decl, \

35936

integral_constant_expression_p)

35937

tree decl, init, cond, incr;

35938

- bool init_decl;

35939

35940

init = TREE_VEC_ELT (OMP_FOR_INIT (t), i);

35941

gcc_assert (TREE_CODE (init) == MODIFY_EXPR);

35942

decl = TREE_OPERAND (init, 0);

35943

init = TREE_OPERAND (init, 1);

35944

- /* Do this before substituting into decl to handle 'auto'. */

35945

- init_decl = (init && TREE_CODE (init) == DECL_EXPR);

35946

- init = RECUR (init);

35947

- decl = RECUR (decl);

35948

- if (init_decl)

35949

+ tree decl_expr = NULL_TREE;

35950

+ if (init && TREE_CODE (init) == DECL_EXPR)

35951

{

35952

- gcc_assert (!processing_template_decl);

35953

- init = DECL_INITIAL (decl);

35954

- DECL_INITIAL (decl) = NULL_TREE;

35955

+ /* We need to jump through some hoops to handle declarations in the

35956

+ for-init-statement, since we might need to handle auto deduction,

35957

+ but we need to keep control of initialization. */

35958

+ decl_expr = init;

35959

+ init = DECL_INITIAL (DECL_EXPR_DECL (init));

35960

+ decl = tsubst_decl (decl, args, complain);

35961

}

35962

+ else

35963

+ decl = RECUR (decl);

35964

+ init = RECUR (init);

35965

35966

+ tree auto_node = type_uses_auto (TREE_TYPE (decl));

35967

+ if (auto_node && init)

35968

+ TREE_TYPE (decl)

35969

+ = do_auto_deduction (TREE_TYPE (decl), init, auto_node);

35970

+

35971

gcc_assert (!type_dependent_expression_p (decl));

35972

35973

if (!CLASS_TYPE_P (TREE_TYPE (decl)))

35974

{

35975

+ if (decl_expr)

35976

+ {

35977

+ /* Declare the variable, but don't let that initialize it. */

35978

+ tree init_sav = DECL_INITIAL (DECL_EXPR_DECL (decl_expr));

35979

+ DECL_INITIAL (DECL_EXPR_DECL (decl_expr)) = NULL_TREE;

35980

+ RECUR (decl_expr);

35981

+ DECL_INITIAL (DECL_EXPR_DECL (decl_expr)) = init_sav;

35982

+ }

35983

+

35984

cond = RECUR (TREE_VEC_ELT (OMP_FOR_COND (t), i));

35985

incr = TREE_VEC_ELT (OMP_FOR_INCR (t), i);

35986

if (TREE_CODE (incr) == MODIFY_EXPR)

35987

@@ -12731,8 +12756,14 @@

35988

return;

35989

}

35990

35991

- if (init && !init_decl)

35992

+ if (decl_expr)

35993

{

35994

+ /* Declare and initialize the variable. */

35995

+ RECUR (decl_expr);

35996

+ init = NULL_TREE;

35997

+ }

35998

+ else if (init)

35999

+ {

36000

tree c;

36001

for (c = *clauses; c ; c = OMP_CLAUSE_CHAIN (c))

36002

{

36003

@@ -13710,6 +13741,10 @@

36004

RETURN (r);

36005

}

36006

36007

+ case POINTER_PLUS_EXPR:

36008

+ return fold_build_pointer_plus (RECUR (TREE_OPERAND (t, 0)),

36009

+ RECUR (TREE_OPERAND (t, 1)));

36010

+

36011

case SCOPE_REF:

36012

RETURN (tsubst_qualified_id (t, args, complain, in_decl, /*done=*/true,

36013

/*address_p=*/false));

36014

@@ -14471,12 +14506,12 @@

36015

36016

case TRAIT_EXPR:

36017

{

36018

- tree type1 = tsubst_copy (TRAIT_EXPR_TYPE1 (t), args,

36019

- complain, in_decl);

36020

+ tree type1 = tsubst (TRAIT_EXPR_TYPE1 (t), args,

36021

+ complain, in_decl);

36022

36023

tree type2 = TRAIT_EXPR_TYPE2 (t);

36024

if (type2)

36025

- type2 = tsubst_copy (type2, args, complain, in_decl);

36026

+ type2 = tsubst (type2, args, complain, in_decl);

36027

36028

RETURN (finish_trait_expr (TRAIT_EXPR_KIND (t), type1, type2));

36029

}

36030

@@ -14778,6 +14813,8 @@

36031

/* Instantiation of the function happens in the context of the function

36032

template, not the context of the overload resolution we're doing. */

36033

push_to_top_level ();

36034

+ struct pointer_map_t *saved_local_specializations = local_specializations;

36035

+ local_specializations = NULL;

36036

/* If there are dependent arguments, e.g. because we're doing partial

36037

ordering, make sure processing_template_decl stays set. */

36038

if (uses_template_parms (targ_ptr))

36039

@@ -14793,6 +14830,7 @@

36040

targ_ptr, complain, gen_tmpl);

36041

if (DECL_CLASS_SCOPE_P (gen_tmpl))

36042

pop_nested_class ();

36043

+ local_specializations = saved_local_specializations;

36044

pop_from_top_level ();

36045

36046

if (fndecl == error_mark_node)

36047

@@ -15192,8 +15230,11 @@

36048

36049

/* If we're looking for an exact match, check that what we got

36050

is indeed an exact match. It might not be if some template

36051

- parameters are used in non-deduced contexts. */

36052

- if (strict == DEDUCE_EXACT)

36053

+ parameters are used in non-deduced contexts. But don't check

36054

+ for an exact match if we have dependent template arguments;

36055

+ in that case we're doing partial ordering, and we already know

36056

+ that we have two candidates that will provide the actual type. */

36057

+ if (strict == DEDUCE_EXACT && !any_dependent_template_arguments_p (targs))

36058

{

36059

tree substed = TREE_TYPE (decl);

36060

unsigned int i;

36061

@@ -15749,7 +15790,7 @@

36062

if (subargs != error_mark_node

36063

&& !any_dependent_template_arguments_p (subargs))

36064

{

36065

- elem = tsubst (TREE_TYPE (fn), subargs, tf_none, NULL_TREE);

36066

+ elem = TREE_TYPE (instantiate_template (fn, subargs, tf_none));

36067

if (try_one_overload (tparms, targs, tempargs, parm,

36068

elem, strict, sub_strict, addr_p, explain_p)

36069

&& (!goodfn || !same_type_p (goodfn, elem)))

36070

@@ -16207,6 +16248,9 @@

36071

tree pattern = PACK_EXPANSION_PATTERN (parm);

36072

tree pack, packs = NULL_TREE;

36073

int i, start = TREE_VEC_LENGTH (packed_parms) - 1;

36074

+

36075

+ packed_args = expand_template_argument_pack (packed_args);

36076

+

36077

int len = TREE_VEC_LENGTH (packed_args);

36078

36079

/* Determine the parameter packs we will be deducing from the

36080

@@ -16574,9 +16618,11 @@

36081

if (TREE_CODE (arg) != BOUND_TEMPLATE_TEMPLATE_PARM

36082

&& !CLASSTYPE_SPECIALIZATION_OF_PRIMARY_TEMPLATE_P (arg))

36083

return unify_template_deduction_failure (explain_p, parm, arg);

36084

-

36085

{

36086

tree parmvec = TYPE_TI_ARGS (parm);

36087

+ /* An alias template name is never deduced. */

36088

+ if (TYPE_ALIAS_P (arg))

36089

+ arg = strip_typedefs (arg);

36090

tree argvec = INNERMOST_TEMPLATE_ARGS (TYPE_TI_ARGS (arg));

36091

tree full_argvec = add_to_template_args (targs, argvec);

36092

tree parm_parms

36093

@@ -17553,7 +17599,7 @@

36094

return -1;

36095

}

36096

36097

-/* Determine which of two partial specializations of MAIN_TMPL is more

36098

+/* Determine which of two partial specializations of TMPL is more

36099

specialized.

36100

36101

PAT1 is a TREE_LIST whose TREE_TYPE is the _TYPE node corresponding

36102

@@ -17569,7 +17615,7 @@

36103

two templates is more specialized. */

36104

36105

static int

36106

-more_specialized_class (tree main_tmpl, tree pat1, tree pat2)

36107

+more_specialized_class (tree tmpl, tree pat1, tree pat2)

36108

{

36109

tree targs;

36110

tree tmpl1, tmpl2;

36111

@@ -17584,7 +17630,7 @@

36112

types in the arguments, and we need our dependency check functions

36113

to behave correctly. */

36114

++processing_template_decl;

36115

- targs = get_class_bindings (main_tmpl, TREE_VALUE (pat1),

36116

+ targs = get_class_bindings (tmpl, TREE_VALUE (pat1),

36117

CLASSTYPE_TI_ARGS (tmpl1),

36118

CLASSTYPE_TI_ARGS (tmpl2));

36119

if (targs)

36120

@@ -17593,7 +17639,7 @@

36121

any_deductions = true;

36122

}

36123

36124

- targs = get_class_bindings (main_tmpl, TREE_VALUE (pat2),

36125

+ targs = get_class_bindings (tmpl, TREE_VALUE (pat2),

36126

CLASSTYPE_TI_ARGS (tmpl2),

36127

CLASSTYPE_TI_ARGS (tmpl1));

36128

if (targs)

36129

@@ -17673,7 +17719,7 @@

36130

}

36131

36132

/* Return the innermost template arguments that, when applied to a partial

36133

- specialization of MAIN_TMPL whose innermost template parameters are

36134

+ specialization of TMPL whose innermost template parameters are

36135

TPARMS, and whose specialization arguments are SPEC_ARGS, yield the

36136

ARGS.

36137

36138

@@ -17688,7 +17734,7 @@

36139

is bound to `double'. */

36140

36141

static tree

36142

-get_class_bindings (tree main_tmpl, tree tparms, tree spec_args, tree args)

36143

+get_class_bindings (tree tmpl, tree tparms, tree spec_args, tree args)

36144

{

36145

int i, ntparms = TREE_VEC_LENGTH (tparms);

36146

tree deduced_args;

36147

@@ -17728,8 +17774,8 @@

36148

`T' is `A' but unify () does not check whether `typename T::X'

36149

is `int'. */

36150

spec_args = tsubst (spec_args, deduced_args, tf_none, NULL_TREE);

36151

- spec_args = coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (main_tmpl),

36152

- spec_args, main_tmpl,

36153

+ spec_args = coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (tmpl),

36154

+ spec_args, tmpl,

36155

tf_none, false, false);

36156

if (spec_args == error_mark_node

36157

/* We only need to check the innermost arguments; the other

36158

@@ -17877,8 +17923,8 @@

36159

}

36160

36161

/* Return the most specialized of the class template partial

36162

- specializations of TMPL which can produce TYPE, a specialization of

36163

- TMPL. The value returned is actually a TREE_LIST; the TREE_TYPE is

36164

+ specializations which can produce TYPE, a specialization of some class

36165

+ template. The value returned is actually a TREE_LIST; the TREE_TYPE is

36166

a _TYPE node corresponding to the partial specialization, while the

36167

TREE_PURPOSE is the set of template arguments that must be

36168

substituted into the TREE_TYPE in order to generate TYPE.

36169

@@ -17885,11 +17931,11 @@

36170

36171

If the choice of partial specialization is ambiguous, a diagnostic

36172

is issued, and the error_mark_node is returned. If there are no

36173

- partial specializations of TMPL matching TYPE, then NULL_TREE is

36174

- returned. */

36175

+ partial specializations matching TYPE, then NULL_TREE is

36176

+ returned, indicating that the primary template should be used. */

36177

36178

static tree

36179

-most_specialized_class (tree type, tree tmpl, tsubst_flags_t complain)

36180

+most_specialized_class (tree type, tsubst_flags_t complain)

36181

{

36182

tree list = NULL_TREE;

36183

tree t;

36184

@@ -17896,11 +17942,11 @@

36185

tree champ;

36186

int fate;

36187

bool ambiguous_p;

36188

- tree args;

36189

tree outer_args = NULL_TREE;

36190

36191

- tmpl = most_general_template (tmpl);

36192

- args = CLASSTYPE_TI_ARGS (type);

36193

+ tree tmpl = CLASSTYPE_TI_TEMPLATE (type);

36194

+ tree main_tmpl = most_general_template (tmpl);

36195

+ tree args = CLASSTYPE_TI_ARGS (type);

36196

36197

/* For determining which partial specialization to use, only the

36198

innermost args are interesting. */

36199

@@ -17910,7 +17956,7 @@

36200

args = INNERMOST_TEMPLATE_ARGS (args);

36201

}

36202

36203

- for (t = DECL_TEMPLATE_SPECIALIZATIONS (tmpl); t; t = TREE_CHAIN (t))

36204

+ for (t = DECL_TEMPLATE_SPECIALIZATIONS (main_tmpl); t; t = TREE_CHAIN (t))

36205

{

36206

tree partial_spec_args;

36207

tree spec_args;

36208

@@ -17944,8 +17990,7 @@

36209

36210

partial_spec_args =

36211

coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (tmpl),

36212

- add_to_template_args (outer_args,

36213

- partial_spec_args),

36214

+ partial_spec_args,

36215

tmpl, tf_none,

36216

/*require_all_args=*/true,

36217

/*use_default_args=*/true);

36218

@@ -18553,6 +18598,10 @@

36219

{

36220

tree fntype, spec, noex, clone;

36221

36222

+ /* Don't instantiate a noexcept-specification from template context. */

36223

+ if (processing_template_decl)

36224

+ return;

36225

+

36226

if (DECL_CLONED_FUNCTION_P (fn))

36227

fn = DECL_CLONED_FUNCTION (fn);

36228

fntype = TREE_TYPE (fn);

36229

@@ -19955,6 +20004,10 @@

36230

if (TREE_CODE (expression) == SCOPE_REF)

36231

return false;

36232

36233

+ /* Always dependent, on the number of arguments if nothing else. */

36234

+ if (TREE_CODE (expression) == EXPR_PACK_EXPANSION)

36235

+ return true;

36236

+

36237

if (BASELINK_P (expression))

36238

expression = BASELINK_FUNCTIONS (expression);

36239

36240

Index: gcc/cp/semantics.c

36241

===================================================================

36242

--- a/src/gcc/cp/semantics.c (.../tags/gcc_4_8_2_release)

36243

+++ b/src/gcc/cp/semantics.c (.../branches/gcc-4_8-branch)

36244

@@ -2501,7 +2501,8 @@

36245

tree decl;

36246

36247

decl = fname_decl (input_location, C_RID_CODE (id), id);

36248

- if (processing_template_decl && current_function_decl)

36249

+ if (processing_template_decl && current_function_decl

36250

+ && decl != error_mark_node)

36251

decl = DECL_NAME (decl);

36252

return decl;

36253

}

36254

@@ -3853,7 +3854,7 @@

36255

linkage of all functions, and as that causes writes to

36256

the data mapped in from the PCH file, it's advantageous

36257

to mark the functions at this point. */

36258

- if (!DECL_IMPLICIT_INSTANTIATION (fn))

36259

+ if (!DECL_IMPLICIT_INSTANTIATION (fn) || DECL_DEFAULTED_FN (fn))

36260

{

36261

/* This function must have external linkage, as

36262

otherwise DECL_INTERFACE_KNOWN would have been

36263

@@ -4291,7 +4292,8 @@

36264

error ("%qE has invalid type for %<reduction%>", t);

36265

remove = true;

36266

}

36267

- else if (FLOAT_TYPE_P (TREE_TYPE (t)))

36268

+ else if (FLOAT_TYPE_P (TREE_TYPE (t))

36269

+ || TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

36270

{

36271

enum tree_code r_code = OMP_CLAUSE_REDUCTION_CODE (c);

36272

switch (r_code)

36273

@@ -4299,10 +4301,26 @@

36274

case PLUS_EXPR:

36275

case MULT_EXPR:

36276

case MINUS_EXPR:

36277

+ break;

36278

case MIN_EXPR:

36279

case MAX_EXPR:

36280

+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

36281

+ r_code = ERROR_MARK;

36282

break;

36283

+ case BIT_AND_EXPR:

36284

+ case BIT_XOR_EXPR:

36285

+ case BIT_IOR_EXPR:

36286

default:

36287

+ r_code = ERROR_MARK;

36288

+ break;

36289

+ case TRUTH_ANDIF_EXPR:

36290

+ case TRUTH_ORIF_EXPR:

36291

+ if (FLOAT_TYPE_P (TREE_TYPE (t)))

36292

+ r_code = ERROR_MARK;

36293

+ break;

36294

+ }

36295

+ if (r_code == ERROR_MARK)

36296

+ {

36297

error ("%qE has invalid type for %<reduction(%s)%>",

36298

t, operator_name_info[r_code].name);

36299

remove = true;

36300

@@ -5059,7 +5077,7 @@

36301

}

36302

stmt = build2 (OMP_ATOMIC, void_type_node, integer_zero_node, stmt);

36303

}

36304

- add_stmt (stmt);

36305

+ finish_expr_stmt (stmt);

36306

}

36307

36308

void

36309

@@ -7543,7 +7561,7 @@

36310

unsigned HOST_WIDE_INT indexi = offset * BITS_PER_UNIT;

36311

tree index = bitsize_int (indexi);

36312

36313

- if (offset/part_widthi <= TYPE_VECTOR_SUBPARTS (op00type))

36314

+ if (offset / part_widthi < TYPE_VECTOR_SUBPARTS (op00type))

36315

return fold_build3_loc (loc,

36316

BIT_FIELD_REF, type, op00,

36317

part_width, index);

36318

@@ -9481,7 +9499,14 @@

36319

/* In unevaluated context this isn't an odr-use, so just return the

36320

nearest 'this'. */

36321

if (cp_unevaluated_operand)

36322

- return lookup_name (this_identifier);

36323

+ {

36324

+ /* In an NSDMI the fake 'this' pointer that we're using for

36325

+ parsing is in scope_chain. */

36326

+ if (LAMBDA_EXPR_EXTRA_SCOPE (lambda)

36327

+ && TREE_CODE (LAMBDA_EXPR_EXTRA_SCOPE (lambda)) == FIELD_DECL)

36328

+ return scope_chain->x_current_class_ptr;

36329

+ return lookup_name (this_identifier);

36330

+ }

36331

36332

/* Try to default capture 'this' if we can. */

36333

if (!this_capture

36334

Index: gcc/cp/decl2.c

36335

===================================================================

36336

--- a/src/gcc/cp/decl2.c (.../tags/gcc_4_8_2_release)

36337

+++ b/src/gcc/cp/decl2.c (.../branches/gcc-4_8-branch)

36338

@@ -2884,7 +2884,7 @@

36339

TREE_PUBLIC (fn) = TREE_PUBLIC (var);

36340

DECL_ARTIFICIAL (fn) = true;

36341

DECL_COMDAT (fn) = DECL_COMDAT (var);

36342

- DECL_EXTERNAL (fn) = true;

36343

+ DECL_EXTERNAL (fn) = DECL_EXTERNAL (var);

36344

if (DECL_ONE_ONLY (var))

36345

make_decl_one_only (fn, cxx_comdat_group (fn));

36346

if (TREE_PUBLIC (var))

36347

@@ -3946,6 +3946,8 @@

36348

if (TREE_PUBLIC (var))

36349

{

36350

tree single_init_fn = get_tls_init_fn (var);

36351

+ if (single_init_fn == NULL_TREE)

36352

+ continue;

36353

cgraph_node *alias

36354

= cgraph_same_body_alias (cgraph_get_create_node (fn),

36355

single_init_fn, fn);

36356

@@ -3960,6 +3962,22 @@

36357

expand_or_defer_fn (finish_function (0));

36358

}

36359

36360

+/* The entire file is now complete. If requested, dump everything

36361

+ to a file. */

36362

+

36363

+static void

36364

+dump_tu (void)

36365

+{

36366

+ int flags;

36367

+ FILE *stream = dump_begin (TDI_tu, &flags);

36368

+

36369

+ if (stream)

36370

+ {

36371

+ dump_node (global_namespace, flags & ~TDF_SLIM, stream);

36372

+ dump_end (TDI_tu, stream);

36373

+ }

36374

+}

36375

+

36376

/* This routine is called at the end of compilation.

36377

Its job is to create all the code needed to initialize and

36378

destroy the global aggregates. We do the destruction

36379

@@ -3990,6 +4008,7 @@

36380

if (pch_file)

36381

{

36382

c_common_write_pch ();

36383

+ dump_tu ();

36384

return;

36385

}

36386

36387

@@ -4359,17 +4378,8 @@

36388

36389

/* The entire file is now complete. If requested, dump everything

36390

to a file. */

36391

- {

36392

- int flags;

36393

- FILE *stream = dump_begin (TDI_tu, &flags);

36394

+ dump_tu ();

36395

36396

- if (stream)

36397

- {

36398

- dump_node (global_namespace, flags & ~TDF_SLIM, stream);

36399

- dump_end (TDI_tu, stream);

36400

- }

36401

- }

36402

-

36403

if (flag_detailed_statistics)

36404

{

36405

dump_tree_statistics ();

36406

Index: gcc/cp/parser.c

36407

===================================================================

36408

--- a/src/gcc/cp/parser.c (.../tags/gcc_4_8_2_release)

36409

+++ b/src/gcc/cp/parser.c (.../branches/gcc-4_8-branch)

36410

@@ -6421,10 +6421,6 @@

36411

/* Look for the `~'. */

36412

cp_parser_require (parser, CPP_COMPL, RT_COMPL);

36413

36414

- /* Once we see the ~, this has to be a pseudo-destructor. */

36415

- if (!processing_template_decl && !cp_parser_error_occurred (parser))

36416

- cp_parser_commit_to_tentative_parse (parser);

36417

-

36418

/* Look for the type-name again. We are not responsible for

36419

checking that it matches the first type-name. */

36420

*type = cp_parser_nonclass_name (parser);

36421

@@ -14168,25 +14164,7 @@

36422

/* Look up the type-name. */

36423

type_decl = cp_parser_lookup_name_simple (parser, identifier, token->location);

36424

36425

- if (TREE_CODE (type_decl) == USING_DECL)

36426

- {

36427

- if (!DECL_DEPENDENT_P (type_decl))

36428

- type_decl = strip_using_decl (type_decl);

36429

- else if (USING_DECL_TYPENAME_P (type_decl))

36430

- {

36431

- /* We have found a type introduced by a using

36432

- declaration at class scope that refers to a dependent

36433

- type.

36434

-

36435

- using typename :: [opt] nested-name-specifier unqualified-id ;

36436

- */

36437

- type_decl = make_typename_type (TREE_TYPE (type_decl),

36438

- DECL_NAME (type_decl),

36439

- typename_type, tf_error);

36440

- if (type_decl != error_mark_node)

36441

- type_decl = TYPE_NAME (type_decl);

36442

- }

36443

- }

36444

+ type_decl = strip_using_decl (type_decl);

36445

36446

if (TREE_CODE (type_decl) != TYPE_DECL

36447

&& (objc_is_id (identifier) || objc_is_class_name (identifier)))

36448

@@ -14742,7 +14720,8 @@

36449

{

36450

underlying_type = grokdeclarator (NULL, &type_specifiers, TYPENAME,

36451

/*initialized=*/0, NULL);

36452

- if (underlying_type == error_mark_node)

36453

+ if (underlying_type == error_mark_node

36454

+ || check_for_bare_parameter_packs (underlying_type))

36455

underlying_type = NULL_TREE;

36456

}

36457

}

36458

@@ -22209,6 +22188,9 @@

36459

tree cast;

36460

bool nonconst_p;

36461

36462

+ if (!type)

36463

+ type = error_mark_node;

36464

+

36465

if (cp_lexer_next_token_is (parser->lexer, CPP_OPEN_BRACE))

36466

{

36467

maybe_warn_cpp0x (CPP0X_INITIALIZER_LISTS);

36468

@@ -22576,6 +22558,9 @@

36469

&& CONSTRUCTOR_IS_DIRECT_INIT (parsed_arg))

36470

flags = LOOKUP_NORMAL;

36471

parsed_arg = digest_init_flags (TREE_TYPE (decl), parsed_arg, flags);

36472

+ if (TREE_CODE (parsed_arg) == TARGET_EXPR)

36473

+ /* This represents the whole initialization. */

36474

+ TARGET_EXPR_DIRECT_INIT_P (parsed_arg) = true;

36475

}

36476

}

36477

36478

Index: gcc/cp/call.c

36479

===================================================================

36480

--- a/src/gcc/cp/call.c (.../tags/gcc_4_8_2_release)

36481

+++ b/src/gcc/cp/call.c (.../branches/gcc-4_8-branch)

36482

@@ -892,6 +892,9 @@

36483

36484

if (i < CONSTRUCTOR_NELTS (ctor))

36485

val = CONSTRUCTOR_ELT (ctor, i)->value;

36486

+ else if (TREE_CODE (ftype) == REFERENCE_TYPE)

36487

+ /* Value-initialization of reference is ill-formed. */

36488

+ return NULL;

36489

else

36490

{

36491

if (empty_ctor == NULL_TREE)

36492

@@ -5806,9 +5809,11 @@

36493

&& convs->kind != ck_ambig

36494

&& (convs->kind != ck_ref_bind

36495

|| convs->user_conv_p)

36496

- && convs->kind != ck_rvalue

36497

+ && (convs->kind != ck_rvalue

36498

+ || SCALAR_TYPE_P (totype))

36499

&& convs->kind != ck_base)

36500

{

36501

+ bool complained = false;

36502

conversion *t = convs;

36503

36504

/* Give a helpful error if this is bad because of excess braces. */

36505

@@ -5816,7 +5821,14 @@

36506

&& SCALAR_TYPE_P (totype)

36507

&& CONSTRUCTOR_NELTS (expr) > 0

36508

&& BRACE_ENCLOSED_INITIALIZER_P (CONSTRUCTOR_ELT (expr, 0)->value))

36509

- permerror (loc, "too many braces around initializer for %qT", totype);

36510

+ {

36511

+ complained = true;

36512

+ permerror (loc, "too many braces around initializer "

36513

+ "for %qT", totype);

36514

+ while (BRACE_ENCLOSED_INITIALIZER_P (expr)

36515

+ && CONSTRUCTOR_NELTS (expr) == 1)

36516

+ expr = CONSTRUCTOR_ELT (expr, 0)->value;

36517

+ }

36518

36519

for (; t ; t = next_conversion (t))

36520

{

36521

@@ -5853,8 +5865,9 @@

36522

break;

36523

}

36524

36525

- permerror (loc, "invalid conversion from %qT to %qT",

36526

- TREE_TYPE (expr), totype);

36527

+ if (!complained)

36528

+ permerror (loc, "invalid conversion from %qT to %qT",

36529

+ TREE_TYPE (expr), totype);

36530

if (fn)

36531

permerror (DECL_SOURCE_LOCATION (fn),

36532

" initializing argument %P of %qD", argnum, fn);

36533

@@ -5999,6 +6012,8 @@

36534

to avoid the error about taking the address of a temporary. */

36535

array = cp_build_addr_expr (array, complain);

36536

array = cp_convert (build_pointer_type (elttype), array, complain);

36537

+ if (array == error_mark_node)

36538

+ return error_mark_node;

36539

36540

/* Build up the initializer_list object. */

36541

totype = complete_type (totype);

36542

@@ -6023,8 +6038,11 @@

36543

return fold_if_not_in_template (expr);

36544

}

36545

expr = reshape_init (totype, expr, complain);

36546

- return get_target_expr_sfinae (digest_init (totype, expr, complain),

36547

+ expr = get_target_expr_sfinae (digest_init (totype, expr, complain),

36548

complain);

36549

+ if (expr != error_mark_node)

36550

+ TARGET_EXPR_LIST_INIT_P (expr) = true;

36551

+ return expr;

36552

36553

default:

36554

break;

36555

@@ -7414,7 +7432,7 @@

36556

struct z_candidate *candidates = 0, *cand;

36557

tree explicit_targs = NULL_TREE;

36558

tree basetype = NULL_TREE;

36559

- tree access_binfo;

36560

+ tree access_binfo, binfo;

36561

tree optype;

36562

tree first_mem_arg = NULL_TREE;

36563

tree instance_ptr;

36564

@@ -7454,6 +7472,7 @@

36565

if (!conversion_path)

36566

conversion_path = BASELINK_BINFO (fns);

36567

access_binfo = BASELINK_ACCESS_BINFO (fns);

36568

+ binfo = BASELINK_BINFO (fns);

36569

optype = BASELINK_OPTYPE (fns);

36570

fns = BASELINK_FUNCTIONS (fns);

36571

if (TREE_CODE (fns) == TEMPLATE_ID_EXPR)

36572

@@ -7697,13 +7716,13 @@

36573

{

36574

/* Optimize away vtable lookup if we know that this

36575

function can't be overridden. We need to check if

36576

- the context and the instance type are the same,

36577

+ the context and the type where we found fn are the same,

36578

actually FN might be defined in a different class

36579

type because of a using-declaration. In this case, we

36580

do not want to perform a non-virtual call. */

36581

if (DECL_VINDEX (fn) && ! (flags & LOOKUP_NONVIRTUAL)

36582

&& same_type_ignoring_top_level_qualifiers_p

36583

- (DECL_CONTEXT (fn), TREE_TYPE (instance))

36584

+ (DECL_CONTEXT (fn), BINFO_TYPE (binfo))

36585

&& resolves_to_fixed_type_p (instance, 0))

36586

flags |= LOOKUP_NONVIRTUAL;

36587

if (explicit_targs)

36588

Index: gcc/cp/cvt.c

36589

===================================================================

36590

--- a/src/gcc/cp/cvt.c (.../tags/gcc_4_8_2_release)

36591

+++ b/src/gcc/cp/cvt.c (.../branches/gcc-4_8-branch)

36592

@@ -203,13 +203,13 @@

36593

36594

if (null_ptr_cst_p (expr))

36595

{

36596

- if (complain & tf_warning)

36597

- maybe_warn_zero_as_null_pointer_constant (expr, loc);

36598

-

36599

if (TYPE_PTRMEMFUNC_P (type))

36600

return build_ptrmemfunc (TYPE_PTRMEMFUNC_FN_TYPE (type), expr, 0,

36601

/*c_cast_p=*/false, complain);

36602

36603

+ if (complain & tf_warning)

36604

+ maybe_warn_zero_as_null_pointer_constant (expr, loc);

36605

+

36606

/* A NULL pointer-to-data-member is represented by -1, not by

36607

zero. */

36608

tree val = (TYPE_PTRDATAMEM_P (type)

36609

@@ -743,6 +743,7 @@

36610

unspecified. */

36611

if ((complain & tf_warning)

36612

&& TREE_CODE (e) == INTEGER_CST

36613

+ && ENUM_UNDERLYING_TYPE (type)

36614

&& !int_fits_type_p (e, ENUM_UNDERLYING_TYPE (type)))

36615

warning_at (loc, OPT_Wconversion,

36616

"the result of the conversion is unspecified because "

36617

Index: gcc/cp/mangle.c

36618

===================================================================

36619

--- a/src/gcc/cp/mangle.c (.../tags/gcc_4_8_2_release)

36620

+++ b/src/gcc/cp/mangle.c (.../branches/gcc-4_8-branch)

36621

@@ -3478,6 +3478,7 @@

36622

36623

if (G.need_abi_warning

36624

/* Don't do this for a fake symbol we aren't going to emit anyway. */

36625

+ && TREE_CODE (decl) != TYPE_DECL

36626

&& !DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P (decl)

36627

&& !DECL_MAYBE_IN_CHARGE_DESTRUCTOR_P (decl))

36628

{

36629

@@ -3773,7 +3774,8 @@

36630

static void

36631

write_guarded_var_name (const tree variable)

36632

{

36633

- if (strncmp (IDENTIFIER_POINTER (DECL_NAME (variable)), "_ZGR", 4) == 0)

36634

+ if (DECL_NAME (variable)

36635

+ && strncmp (IDENTIFIER_POINTER (DECL_NAME (variable)), "_ZGR", 4) == 0)

36636

/* The name of a guard variable for a reference temporary should refer

36637

to the reference, not the temporary. */

36638

write_string (IDENTIFIER_POINTER (DECL_NAME (variable)) + 4);

36639

Index: gcc/cp/cp-tree.h

36640

===================================================================

36641

--- a/src/gcc/cp/cp-tree.h (.../tags/gcc_4_8_2_release)

36642

+++ b/src/gcc/cp/cp-tree.h (.../branches/gcc-4_8-branch)

36643

@@ -344,7 +344,8 @@

36644

/* Returns true iff NODE is a BASELINK. */

36645

#define BASELINK_P(NODE) \

36646

(TREE_CODE (NODE) == BASELINK)

36647

-/* The BINFO indicating the base from which the BASELINK_FUNCTIONS came. */

36648

+/* The BINFO indicating the base in which lookup found the

36649

+ BASELINK_FUNCTIONS. */

36650

#define BASELINK_BINFO(NODE) \

36651

(((struct tree_baselink*) BASELINK_CHECK (NODE))->binfo)

36652

/* The functions referred to by the BASELINK; either a FUNCTION_DECL,

36653

Index: gcc/cp/name-lookup.c

36654

===================================================================

36655

--- a/src/gcc/cp/name-lookup.c (.../tags/gcc_4_8_2_release)

36656

+++ b/src/gcc/cp/name-lookup.c (.../branches/gcc-4_8-branch)

36657

@@ -394,7 +394,8 @@

36658

}

36659

}

36660

36661

-/* Strip non dependent using declarations. */

36662

+/* Strip non dependent using declarations. If DECL is dependent,

36663

+ surreptitiously create a typename_type and return it. */

36664

36665

tree

36666

strip_using_decl (tree decl)

36667

@@ -404,6 +405,23 @@

36668

36669

while (TREE_CODE (decl) == USING_DECL && !DECL_DEPENDENT_P (decl))

36670

decl = USING_DECL_DECLS (decl);

36671

+

36672

+ if (TREE_CODE (decl) == USING_DECL && DECL_DEPENDENT_P (decl)

36673

+ && USING_DECL_TYPENAME_P (decl))

36674

+ {

36675

+ /* We have found a type introduced by a using

36676

+ declaration at class scope that refers to a dependent

36677

+ type.

36678

+

36679

+ using typename :: [opt] nested-name-specifier unqualified-id ;

36680

+ */

36681

+ decl = make_typename_type (TREE_TYPE (decl),

36682

+ DECL_NAME (decl),

36683

+ typename_type, tf_error);

36684

+ if (decl != error_mark_node)

36685

+ decl = TYPE_NAME (decl);

36686

+ }

36687

+

36688

return decl;

36689

}

36690

36691

@@ -5605,9 +5623,9 @@

36692

push_using_directive (tree used)

36693

{

36694

tree ret;

36695

- timevar_start (TV_NAME_LOOKUP);

36696

+ bool subtime = timevar_cond_start (TV_NAME_LOOKUP);

36697

ret = push_using_directive_1 (used);

36698

- timevar_stop (TV_NAME_LOOKUP);

36699

+ timevar_cond_stop (TV_NAME_LOOKUP, subtime);

36700

return ret;

36701

}

36702

36703

Index: gcc/builtins.def

36704

===================================================================

36705

--- a/src/gcc/builtins.def (.../tags/gcc_4_8_2_release)

36706

+++ b/src/gcc/builtins.def (.../branches/gcc-4_8-branch)

36707

@@ -252,6 +252,9 @@

36708

DEF_LIB_BUILTIN (BUILT_IN_FABS, "fabs", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)

36709

DEF_C99_C90RES_BUILTIN (BUILT_IN_FABSF, "fabsf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LEAF_LIST)

36710

DEF_C99_C90RES_BUILTIN (BUILT_IN_FABSL, "fabsl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)

36711

+DEF_GCC_BUILTIN (BUILT_IN_FABSD32, "fabsd32", BT_FN_DFLOAT32_DFLOAT32, ATTR_CONST_NOTHROW_LEAF_LIST)

36712

+DEF_GCC_BUILTIN (BUILT_IN_FABSD64, "fabsd64", BT_FN_DFLOAT64_DFLOAT64, ATTR_CONST_NOTHROW_LEAF_LIST)

36713

+DEF_GCC_BUILTIN (BUILT_IN_FABSD128, "fabsd128", BT_FN_DFLOAT128_DFLOAT128, ATTR_CONST_NOTHROW_LEAF_LIST)

36714

DEF_C99_BUILTIN (BUILT_IN_FDIM, "fdim", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)

36715

DEF_C99_BUILTIN (BUILT_IN_FDIMF, "fdimf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)

36716

DEF_C99_BUILTIN (BUILT_IN_FDIML, "fdiml", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)

36717

Index: gcc/mode-switching.c

36718

===================================================================

36719

--- a/src/gcc/mode-switching.c (.../tags/gcc_4_8_2_release)

36720

+++ b/src/gcc/mode-switching.c (.../branches/gcc-4_8-branch)

36721

@@ -568,12 +568,15 @@

36722

36723

info[bb->index].computing = last_mode;

36724

/* Check for blocks without ANY mode requirements.

36725

- N.B. because of MODE_AFTER, last_mode might still be different

36726

- from no_mode. */

36727

+ N.B. because of MODE_AFTER, last_mode might still

36728

+ be different from no_mode, in which case we need to

36729

+ mark the block as nontransparent. */

36730

if (!any_set_required)

36731

{

36732

ptr = new_seginfo (no_mode, BB_END (bb), bb->index, live_now);

36733

add_seginfo (info + bb->index, ptr);

36734

+ if (last_mode != no_mode)

36735

+ bitmap_clear_bit (transp[bb->index], j);

36736

}

36737

}

36738

#if defined (MODE_ENTRY) && defined (MODE_EXIT)

36739

Index: gcc/ipa-pure-const.c

36740

===================================================================

36741

--- a/src/gcc/ipa-pure-const.c (.../tags/gcc_4_8_2_release)

36742

+++ b/src/gcc/ipa-pure-const.c (.../branches/gcc-4_8-branch)

36743

@@ -588,7 +588,7 @@

36744

/* Wrapper around check_decl for loads in local more. */

36745

36746

static bool

36747

-check_load (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

36748

+check_load (gimple, tree op, tree, void *data)

36749

{

36750

if (DECL_P (op))

36751

check_decl ((funct_state)data, op, false, false);

36752

@@ -600,7 +600,7 @@

36753

/* Wrapper around check_decl for stores in local more. */

36754

36755

static bool

36756

-check_store (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

36757

+check_store (gimple, tree op, tree, void *data)

36758

{

36759

if (DECL_P (op))

36760

check_decl ((funct_state)data, op, true, false);

36761

@@ -612,7 +612,7 @@

36762

/* Wrapper around check_decl for loads in ipa mode. */

36763

36764

static bool

36765

-check_ipa_load (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

36766

+check_ipa_load (gimple, tree op, tree, void *data)

36767

{

36768

if (DECL_P (op))

36769

check_decl ((funct_state)data, op, false, true);

36770

@@ -624,7 +624,7 @@

36771

/* Wrapper around check_decl for stores in ipa mode. */

36772

36773

static bool

36774

-check_ipa_store (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

36775

+check_ipa_store (gimple, tree op, tree, void *data)

36776

{

36777

if (DECL_P (op))

36778

check_decl ((funct_state)data, op, true, true);

36779

Index: gcc/cse.c

36780

===================================================================

36781

--- a/src/gcc/cse.c (.../tags/gcc_4_8_2_release)

36782

+++ b/src/gcc/cse.c (.../branches/gcc-4_8-branch)

36783

@@ -1824,7 +1824,7 @@

36784

}

36785

}

36786

36787

-/* Function called for each rtx to check whether true dependence exist. */

36788

+/* Function called for each rtx to check whether an anti dependence exist. */

36789

struct check_dependence_data

36790

{

36791

enum machine_mode mode;

36792

@@ -1837,7 +1837,7 @@

36793

{

36794

struct check_dependence_data *d = (struct check_dependence_data *) data;

36795

if (*x && MEM_P (*x))

36796

- return canon_true_dependence (d->exp, d->mode, d->addr, *x, NULL_RTX);

36797

+ return canon_anti_dependence (*x, true, d->exp, d->mode, d->addr);

36798

else

36799

return 0;

36800

}

36801

@@ -6082,6 +6082,18 @@

36802

return x;

36803

}

36804

36805

+ case UNSIGNED_FLOAT:

36806

+ {

36807

+ rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);

36808

+ /* We don't substitute negative VOIDmode constants into these rtx,

36809

+ since they would impede folding. */

36810

+ if (GET_MODE (new_rtx) != VOIDmode

36811

+ || (CONST_INT_P (new_rtx) && INTVAL (new_rtx) >= 0)

36812

+ || (CONST_DOUBLE_P (new_rtx) && CONST_DOUBLE_HIGH (new_rtx) >= 0))

36813

+ validate_change (object, &XEXP (x, 0), new_rtx, 0);

36814

+ return x;

36815

+ }

36816

+

36817

case REG:

36818

i = REG_QTY (REGNO (x));

36819

36820

Index: gcc/tree-ssa-math-opts.c

36821

===================================================================

36822

--- a/src/gcc/tree-ssa-math-opts.c (.../tags/gcc_4_8_2_release)

36823

+++ b/src/gcc/tree-ssa-math-opts.c (.../branches/gcc-4_8-branch)

36824

@@ -1718,7 +1718,9 @@

36825

36826

if (rhs_class == GIMPLE_BINARY_RHS)

36827

{

36828

+ int i;

36829

struct symbolic_number n1, n2;

36830

+ unsigned HOST_WIDEST_INT mask;

36831

tree source_expr2;

36832

36833

if (code != BIT_IOR_EXPR)

36834

@@ -1744,6 +1746,15 @@

36835

return NULL_TREE;

36836

36837

n->size = n1.size;

36838

+ for (i = 0, mask = 0xff; i < n->size; i++, mask <<= BITS_PER_UNIT)

36839

+ {

36840

+ unsigned HOST_WIDEST_INT masked1, masked2;

36841

+

36842

+ masked1 = n1.n & mask;

36843

+ masked2 = n2.n & mask;

36844

+ if (masked1 && masked2 && masked1 != masked2)

36845

+ return NULL_TREE;

36846

+ }

36847

n->n = n1.n | n2.n;

36848

36849

if (!verify_symbolic_number_p (n, stmt))

36850

Index: gcc/sel-sched.c

36851

===================================================================

36852

--- a/src/gcc/sel-sched.c (.../tags/gcc_4_8_2_release)

36853

+++ b/src/gcc/sel-sched.c (.../branches/gcc-4_8-branch)

36854

@@ -1253,7 +1253,7 @@

36855

36856

if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)

36857

add_to_hard_reg_set (&reg_rename_p->unavailable_hard_regs,

36858

- Pmode, HARD_FRAME_POINTER_IS_FRAME_POINTER);

36859

+ Pmode, HARD_FRAME_POINTER_REGNUM);

36860

}

36861

36862

#ifdef STACK_REGS

36863

Index: gcc/gimple-low.c

36864

===================================================================

36865

--- a/src/gcc/gimple-low.c (.../tags/gcc_4_8_2_release)

36866

+++ b/src/gcc/gimple-low.c (.../branches/gcc-4_8-branch)

36867

@@ -238,6 +238,7 @@

36868

break;

36869

arg = gimple_call_arg (stmt, i);

36870

if (p == error_mark_node

36871

+ || DECL_ARG_TYPE (p) == error_mark_node

36872

|| arg == error_mark_node

36873

|| (!types_compatible_p (DECL_ARG_TYPE (p), TREE_TYPE (arg))

36874

&& !fold_convertible_p (DECL_ARG_TYPE (p), arg)))

36875

Index: gcc/tree-ssa-sink.c

36876

===================================================================

36877

--- a/src/gcc/tree-ssa-sink.c (.../tags/gcc_4_8_2_release)

36878

+++ b/src/gcc/tree-ssa-sink.c (.../branches/gcc-4_8-branch)

36879

@@ -559,7 +559,7 @@

36880

execute_sink_code (void)

36881

{

36882

loop_optimizer_init (LOOPS_NORMAL);

36883

-

36884

+ split_critical_edges ();

36885

connect_infinite_loops_to_exit ();

36886

memset (&sink_stats, 0, sizeof (sink_stats));

36887

calculate_dominance_info (CDI_DOMINATORS);

36888

Index: gcc/config.in

36889

===================================================================

36890

--- a/src/gcc/config.in (.../tags/gcc_4_8_2_release)

36891

+++ b/src/gcc/config.in (.../branches/gcc-4_8-branch)

36892

@@ -363,6 +363,12 @@

36893

#endif

36894

36895

36896

+/* Define if your assembler supports the 'ud2' mnemonic. */

36897

+#ifndef USED_FOR_TARGET

36898

+#undef HAVE_AS_IX86_UD2

36899

+#endif

36900

+

36901

+

36902

/* Define if your assembler supports the lituse_jsrdirect relocation. */

36903

#ifndef USED_FOR_TARGET

36904

#undef HAVE_AS_JSRDIRECT_RELOCS

36905

@@ -375,6 +381,12 @@

36906

#endif

36907

36908

36909

+/* Define if your assembler supports LEON instructions. */

36910

+#ifndef USED_FOR_TARGET

36911

+#undef HAVE_AS_LEON

36912

+#endif

36913

+

36914

+

36915

/* Define if the assembler won't complain about a line such as # 0 "" 2. */

36916

#ifndef USED_FOR_TARGET

36917

#undef HAVE_AS_LINE_ZERO

36918

Index: gcc/ifcvt.c

36919

===================================================================

36920

--- a/src/gcc/ifcvt.c (.../tags/gcc_4_8_2_release)

36921

+++ b/src/gcc/ifcvt.c (.../branches/gcc-4_8-branch)

36922

@@ -115,7 +115,11 @@

36923

36924

while (1)

36925

{

36926

- if (CALL_P (insn) || NONJUMP_INSN_P (insn))

36927

+ if ((CALL_P (insn) || NONJUMP_INSN_P (insn))

36928

+ /* Don't count USE/CLOBBER insns, flow_find_cross_jump etc.

36929

+ don't count them either and we need consistency. */

36930

+ && GET_CODE (PATTERN (insn)) != USE

36931

+ && GET_CODE (PATTERN (insn)) != CLOBBER)

36932

count++;

36933

36934

if (insn == BB_END (bb))

36935

@@ -505,7 +509,10 @@

36936

n_insns -= 2 * n_matching;

36937

}

36938

36939

- if (then_start && else_start)

36940

+ if (then_start

36941

+ && else_start

36942

+ && then_n_insns > n_matching

36943

+ && else_n_insns > n_matching)

36944

{

36945

int longest_match = MIN (then_n_insns - n_matching,

36946

else_n_insns - n_matching);

36947

Index: gcc/expr.c

36948

===================================================================

36949

--- a/src/gcc/expr.c (.../tags/gcc_4_8_2_release)

36950

+++ b/src/gcc/expr.c (.../branches/gcc-4_8-branch)

36951

@@ -1994,12 +1994,14 @@

36952

HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));

36953

enum machine_mode mode = GET_MODE (tmps[i]);

36954

unsigned int bytelen = GET_MODE_SIZE (mode);

36955

- unsigned int adj_bytelen = bytelen;

36956

+ unsigned int adj_bytelen;

36957

rtx dest = dst;

36958

36959

/* Handle trailing fragments that run over the size of the struct. */

36960

if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)

36961

adj_bytelen = ssize - bytepos;

36962

+ else

36963

+ adj_bytelen = bytelen;

36964

36965

if (GET_CODE (dst) == CONCAT)

36966

{

36967

@@ -2040,6 +2042,7 @@

36968

}

36969

}

36970

36971

+ /* Handle trailing fragments that run over the size of the struct. */

36972

if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)

36973

{

36974

/* store_bit_field always takes its value from the lsb.

36975

@@ -2057,16 +2060,22 @@

36976

tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],

36977

shift, tmps[i], 0);

36978

}

36979

- bytelen = adj_bytelen;

36980

+

36981

+ /* Make sure not to write past the end of the struct. */

36982

+ store_bit_field (dest,

36983

+ adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,

36984

+ bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,

36985

+ VOIDmode, tmps[i]);

36986

}

36987

36988

/* Optimize the access just a bit. */

36989

- if (MEM_P (dest)

36990

- && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))

36991

- || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))

36992

- && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0

36993

- && bytelen == GET_MODE_SIZE (mode))

36994

+ else if (MEM_P (dest)

36995

+ && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))

36996

+ || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))

36997

+ && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0

36998

+ && bytelen == GET_MODE_SIZE (mode))

36999

emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);

37000

+

37001

else

37002

store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,

37003

0, 0, mode, tmps[i]);

37004

@@ -3602,12 +3611,21 @@

37005

into a new pseudo. This constant may be used in different modes,

37006

and if not, combine will put things back together for us. */

37007

trunc_y = force_reg (srcmode, trunc_y);

37008

- emit_unop_insn (ic, x, trunc_y, UNKNOWN);

37009

+

37010

+ /* If x is a hard register, perform the extension into a pseudo,

37011

+ so that e.g. stack realignment code is aware of it. */

37012

+ rtx target = x;

37013

+ if (REG_P (x) && HARD_REGISTER_P (x))

37014

+ target = gen_reg_rtx (dstmode);

37015

+

37016

+ emit_unop_insn (ic, target, trunc_y, UNKNOWN);

37017

last_insn = get_last_insn ();

37018

37019

- if (REG_P (x))

37020

+ if (REG_P (target))

37021

set_unique_reg_note (last_insn, REG_EQUAL, y);

37022

37023

+ if (target != x)

37024

+ return emit_move_insn (x, target);

37025

return last_insn;

37026

}

37027

37028

@@ -4551,19 +4569,19 @@

37029

- tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));

37030

37031

/* If the adjustment is larger than bitpos, we would have a negative bit

37032

- position for the lower bound and this may wreak havoc later. This can

37033

- occur only if we have a non-null offset, so adjust offset and bitpos

37034

- to make the lower bound non-negative. */

37035

+ position for the lower bound and this may wreak havoc later. Adjust

37036

+ offset and bitpos to make the lower bound non-negative in that case. */

37037

if (bitoffset > *bitpos)

37038

{

37039

HOST_WIDE_INT adjust = bitoffset - *bitpos;

37040

-

37041

gcc_assert ((adjust % BITS_PER_UNIT) == 0);

37042

- gcc_assert (*offset != NULL_TREE);

37043

37044

*bitpos += adjust;

37045

- *offset

37046

- = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));

37047

+ if (*offset == NULL_TREE)

37048

+ *offset = size_int (-adjust / BITS_PER_UNIT);

37049

+ else

37050

+ *offset

37051

+ = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));

37052

*bitstart = 0;

37053

}

37054

else

37055

@@ -4668,8 +4686,7 @@

37056

expand_insn (icode, 2, ops);

37057

}

37058

else

37059

- store_bit_field (mem, GET_MODE_BITSIZE (mode),

37060

- 0, 0, 0, mode, reg);

37061

+ store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);

37062

return;

37063

}

37064

37065

@@ -4698,6 +4715,15 @@

37066

tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,

37067

&unsignedp, &volatilep, true);

37068

37069

+ /* Make sure bitpos is not negative, it can wreak havoc later. */

37070

+ if (bitpos < 0)

37071

+ {

37072

+ gcc_assert (offset == NULL_TREE);

37073

+ offset = size_int (bitpos >> (BITS_PER_UNIT == 8

37074

+ ? 3 : exact_log2 (BITS_PER_UNIT)));

37075

+ bitpos &= BITS_PER_UNIT - 1;

37076

+ }

37077

+

37078

if (TREE_CODE (to) == COMPONENT_REF

37079

&& DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))

37080

get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);

37081

Index: gcc/expr.h

37082

===================================================================

37083

--- a/src/gcc/expr.h (.../tags/gcc_4_8_2_release)

37084

+++ b/src/gcc/expr.h (.../branches/gcc-4_8-branch)

37085

@@ -521,8 +521,8 @@

37086

rtx, int);

37087

#endif

37088

37089

-extern void locate_and_pad_parm (enum machine_mode, tree, int, int, tree,

37090

- struct args_size *,

37091

+extern void locate_and_pad_parm (enum machine_mode, tree, int, int, int,

37092

+ tree, struct args_size *,

37093

struct locate_and_pad_arg_data *);

37094

37095

/* Return the CODE_LABEL rtx for a LABEL_DECL, creating it if necessary. */

37096

Index: gcc/go/go-gcc.cc

37097

===================================================================

37098

--- a/src/gcc/go/go-gcc.cc (.../tags/gcc_4_8_2_release)

37099

+++ b/src/gcc/go/go-gcc.cc (.../branches/gcc-4_8-branch)

37100

@@ -232,6 +232,9 @@

37101

Bexpression*

37102

convert_expression(Btype* type, Bexpression* expr, Location);

37103

37104

+ Bexpression*

37105

+ function_code_expression(Bfunction*, Location);

37106

+

37107

// Statements.

37108

37109

Bstatement*

37110

@@ -334,6 +337,17 @@

37111

Bexpression*

37112

label_address(Blabel*, Location);

37113

37114

+ // Functions.

37115

+

37116

+ Bfunction*

37117

+ error_function()

37118

+ { return this->make_function(error_mark_node); }

37119

+

37120

+ Bfunction*

37121

+ function(Btype* fntype, const std::string& name, const std::string& asm_name,

37122

+ bool is_visible, bool is_declaration, bool is_inlinable,

37123

+ bool disable_split_stack, bool in_unique_section, Location);

37124

+

37125

private:

37126

// Make a Bexpression from a tree.

37127

Bexpression*

37128

@@ -350,6 +364,10 @@

37129

make_type(tree t)

37130

{ return new Btype(t); }

37131

37132

+ Bfunction*

37133

+ make_function(tree t)

37134

+ { return new Bfunction(t); }

37135

+

37136

Btype*

37137

fill_in_struct(Btype*, const std::vector<Btyped_identifier>&);

37138

37139

@@ -966,6 +984,19 @@

37140

return tree_to_expr(ret);

37141

}

37142

37143

+// Get the address of a function.

37144

+

37145

+Bexpression*

37146

+Gcc_backend::function_code_expression(Bfunction* bfunc, Location location)

37147

+{

37148

+ tree func = bfunc->get_tree();

37149

+ if (func == error_mark_node)

37150

+ return this->error_expression();

37151

+

37152

+ tree ret = build_fold_addr_expr_loc(location.gcc_location(), func);

37153

+ return this->make_expression(ret);

37154

+}

37155

+

37156

// An expression as a statement.

37157

37158

Bstatement*

37159

@@ -1724,6 +1755,56 @@

37160

return this->make_expression(ret);

37161

}

37162

37163

+// Declare or define a new function.

37164

+

37165

+Bfunction*

37166

+Gcc_backend::function(Btype* fntype, const std::string& name,

37167

+ const std::string& asm_name, bool is_visible,

37168

+ bool is_declaration, bool is_inlinable,

37169

+ bool disable_split_stack, bool in_unique_section,

37170

+ Location location)

37171

+{

37172

+ tree functype = fntype->get_tree();

37173

+ if (functype != error_mark_node)

37174

+ {

37175

+ gcc_assert(FUNCTION_POINTER_TYPE_P(functype));

37176

+ functype = TREE_TYPE(functype);

37177

+ }

37178

+ tree id = get_identifier_from_string(name);

37179

+ if (functype == error_mark_node || id == error_mark_node)

37180

+ return this->error_function();

37181

+

37182

+ tree decl = build_decl(location.gcc_location(), FUNCTION_DECL, id, functype);

37183

+ if (!asm_name.empty())

37184

+ SET_DECL_ASSEMBLER_NAME(decl, get_identifier_from_string(asm_name));

37185

+ if (is_visible)

37186

+ TREE_PUBLIC(decl) = 1;

37187

+ if (is_declaration)

37188

+ DECL_EXTERNAL(decl) = 1;

37189

+ else

37190

+ {

37191

+ tree restype = TREE_TYPE(functype);

37192

+ tree resdecl =

37193

+ build_decl(location.gcc_location(), RESULT_DECL, NULL_TREE, restype);

37194

+ DECL_ARTIFICIAL(resdecl) = 1;

37195

+ DECL_IGNORED_P(resdecl) = 1;

37196

+ DECL_CONTEXT(resdecl) = decl;

37197

+ DECL_RESULT(decl) = resdecl;

37198

+ }

37199

+ if (!is_inlinable)

37200

+ DECL_UNINLINABLE(decl) = 1;

37201

+ if (disable_split_stack)

37202

+ {

37203

+ tree attr = get_identifier("__no_split_stack__");

37204

+ DECL_ATTRIBUTES(decl) = tree_cons(attr, NULL_TREE, NULL_TREE);

37205

+ }

37206

+ if (in_unique_section)

37207

+ resolve_unique_section(decl, 0, 1);

37208

+

37209

+ go_preserve_from_gc(decl);

37210

+ return new Bfunction(decl);

37211

+}

37212

+

37213

// The single backend.

37214

37215

static Gcc_backend gcc_backend;

37216

@@ -1799,3 +1880,9 @@

37217

{

37218

return bv->get_tree();

37219

}

37220

+

37221

+tree

37222

+function_to_tree(Bfunction* bf)

37223

+{

37224

+ return bf->get_tree();

37225

+}

37226

Index: gcc/go/ChangeLog

37227

===================================================================

37228

--- a/src/gcc/go/ChangeLog (.../tags/gcc_4_8_2_release)

37229

+++ b/src/gcc/go/ChangeLog (.../branches/gcc-4_8-branch)

37230

@@ -1,3 +1,22 @@

37231

+2013-12-11 Ian Lance Taylor <iant@google.com>

37232

+

37233

+ * go-lang.c (go_langhook_post_options): Disable sibling calls by

37234

+ default.

37235

+

37236

+2013-10-16 Ian Lance Taylor <iant@google.com>

37237

+

37238

+ Bring in from mainline:

37239

+

37240

+ 2013-10-11 Chris Manghane <cmang@google.com>

37241

+ * go-gcc.cc (Gcc_backend::function_code_expression): New

37242

+ function.

37243

+

37244

+ 2013-10-10 Chris Manghane <cmang@google.com>

37245

+ * go-gcc.cc (Backend::error_function): New function.

37246

+ (Backend::function): New function.

37247

+ (Backend::make_function): New function.

37248

+ (function_to_tree): New function.

37249

+

37250

2013-10-16 Release Manager

37251

37252

* GCC 4.8.2 released.

37253

Index: gcc/go/go-lang.c

37254

===================================================================

37255

--- a/src/gcc/go/go-lang.c (.../tags/gcc_4_8_2_release)

37256

+++ b/src/gcc/go/go-lang.c (.../branches/gcc-4_8-branch)

37257

@@ -269,6 +269,10 @@

37258

if (flag_excess_precision_cmdline == EXCESS_PRECISION_DEFAULT)

37259

flag_excess_precision_cmdline = EXCESS_PRECISION_STANDARD;

37260

37261

+ /* Tail call optimizations can confuse uses of runtime.Callers. */

37262

+ if (!global_options_set.x_flag_optimize_sibling_calls)

37263

+ global_options.x_flag_optimize_sibling_calls = 0;

37264

+

37265

/* Returning false means that the backend should be used. */

37266

return false;

37267

}

37268

Index: gcc/go/gofrontend/gogo.cc

37269

===================================================================

37270

--- a/src/gcc/go/gofrontend/gogo.cc (.../tags/gcc_4_8_2_release)

37271

+++ b/src/gcc/go/gofrontend/gogo.cc (.../branches/gcc-4_8-branch)

37272

@@ -2822,7 +2822,10 @@

37273

if (orig_fntype->is_varargs())

37274

new_fntype->set_is_varargs();

37275

37276

- std::string name = orig_no->name() + "$recover";

37277

+ std::string name = orig_no->name();

37278

+ if (orig_fntype->is_method())

37279

+ name += "$" + orig_fntype->receiver()->type()->mangled_name(gogo);

37280

+ name += "$recover";

37281

Named_object *new_no = gogo->start_function(name, new_fntype, false,

37282

location);

37283

Function *new_func = new_no->func_value();

37284

@@ -2916,7 +2919,25 @@

37285

&& !orig_rec_no->var_value()->is_receiver());

37286

orig_rec_no->var_value()->set_is_receiver();

37287

37288

- const std::string& new_receiver_name(orig_fntype->receiver()->name());

37289

+ std::string new_receiver_name(orig_fntype->receiver()->name());

37290

+ if (new_receiver_name.empty())

37291

+ {

37292

+ // Find the receiver. It was named "r.NNN" in

37293

+ // Gogo::start_function.

37294

+ for (Bindings::const_definitions_iterator p =

37295

+ new_bindings->begin_definitions();

37296

+ p != new_bindings->end_definitions();

37297

+ ++p)

37298

+ {

37299

+ const std::string& pname((*p)->name());

37300

+ if (pname[0] == 'r' && pname[1] == '.')

37301

+ {

37302

+ new_receiver_name = pname;

37303

+ break;

37304

+ }

37305

+ }

37306

+ go_assert(!new_receiver_name.empty());

37307

+ }

37308

Named_object* new_rec_no = new_bindings->lookup_local(new_receiver_name);

37309

if (new_rec_no == NULL)

37310

go_assert(saw_errors());

37311

@@ -3320,7 +3341,8 @@

37312

closure_var_(NULL), block_(block), location_(location), labels_(),

37313

local_type_count_(0), descriptor_(NULL), fndecl_(NULL), defer_stack_(NULL),

37314

is_sink_(false), results_are_named_(false), nointerface_(false),

37315

- calls_recover_(false), is_recover_thunk_(false), has_recover_thunk_(false),

37316

+ is_unnamed_type_stub_method_(false), calls_recover_(false),

37317

+ is_recover_thunk_(false), has_recover_thunk_(false),

37318

in_unique_section_(false)

37319

{

37320

}

37321

@@ -3819,6 +3841,81 @@

37322

*presults = results;

37323

}

37324

37325

+// Get the backend representation.

37326

+

37327

+Bfunction*

37328

+Function::get_or_make_decl(Gogo* gogo, Named_object* no)

37329

+{

37330

+ if (this->fndecl_ == NULL)

37331

+ {

37332

+ std::string asm_name;

37333

+ bool is_visible = false;

37334

+ if (no->package() != NULL)

37335

+ ;

37336

+ else if (this->enclosing_ != NULL || Gogo::is_thunk(no))

37337

+ ;

37338

+ else if (Gogo::unpack_hidden_name(no->name()) == "init"

37339

+ && !this->type_->is_method())

37340

+ ;

37341

+ else if (Gogo::unpack_hidden_name(no->name()) == "main"

37342

+ && gogo->is_main_package())

37343

+ is_visible = true;

37344

+ // Methods have to be public even if they are hidden because

37345

+ // they can be pulled into type descriptors when using

37346

+ // anonymous fields.

37347

+ else if (!Gogo::is_hidden_name(no->name())

37348

+ || this->type_->is_method())

37349

+ {

37350

+ if (!this->is_unnamed_type_stub_method_)

37351

+ is_visible = true;

37352

+ std::string pkgpath = gogo->pkgpath_symbol();

37353

+ if (this->type_->is_method()

37354

+ && Gogo::is_hidden_name(no->name())

37355

+ && Gogo::hidden_name_pkgpath(no->name()) != gogo->pkgpath())

37356

+ {

37357

+ // This is a method we created for an unexported

37358

+ // method of an imported embedded type. We need to

37359

+ // use the pkgpath of the imported package to avoid

37360

+ // a possible name collision. See bug478 for a test

37361

+ // case.

37362

+ pkgpath = Gogo::hidden_name_pkgpath(no->name());

37363

+ pkgpath = Gogo::pkgpath_for_symbol(pkgpath);

37364

+ }

37365

+

37366

+ asm_name = pkgpath;

37367

+ asm_name.append(1, '.');

37368

+ asm_name.append(Gogo::unpack_hidden_name(no->name()));

37369

+ if (this->type_->is_method())

37370

+ {

37371

+ asm_name.append(1, '.');

37372

+ Type* rtype = this->type_->receiver()->type();

37373

+ asm_name.append(rtype->mangled_name(gogo));

37374

+ }

37375

+ }

37376

+

37377

+ // If a function calls the predeclared recover function, we

37378

+ // can't inline it, because recover behaves differently in a

37379

+ // function passed directly to defer. If this is a recover

37380

+ // thunk that we built to test whether a function can be

37381

+ // recovered, we can't inline it, because that will mess up

37382

+ // our return address comparison.

37383

+ bool is_inlinable = !(this->calls_recover_ || this->is_recover_thunk_);

37384

+

37385

+ // If this is a thunk created to call a function which calls

37386

+ // the predeclared recover function, we need to disable

37387

+ // stack splitting for the thunk.

37388

+ bool disable_split_stack = this->is_recover_thunk_;

37389

+

37390

+ Btype* functype = this->type_->get_backend_fntype(gogo);

37391

+ this->fndecl_ =

37392

+ gogo->backend()->function(functype, no->get_id(gogo), asm_name,

37393

+ is_visible, false, is_inlinable,

37394

+ disable_split_stack,

37395

+ this->in_unique_section_, this->location());

37396

+ }

37397

+ return this->fndecl_;

37398

+}

37399

+

37400

// Class Block.

37401

37402

Block::Block(Block* enclosing, Location location)

37403

@@ -5110,6 +5207,75 @@

37404

go_unreachable();

37405

}

37406

37407

+

37408

+// Return the external identifier for this object.

37409

+

37410

+std::string

37411

+Named_object::get_id(Gogo* gogo)

37412

+{

37413

+ go_assert(!this->is_variable() && !this->is_result_variable());

37414

+ std::string decl_name;

37415

+ if (this->is_function_declaration()

37416

+ && !this->func_declaration_value()->asm_name().empty())

37417

+ decl_name = this->func_declaration_value()->asm_name();

37418

+ else if (this->is_type()

37419

+ && Linemap::is_predeclared_location(this->type_value()->location()))

37420

+ {

37421

+ // We don't need the package name for builtin types.

37422

+ decl_name = Gogo::unpack_hidden_name(this->name_);

37423

+ }

37424

+ else

37425

+ {

37426

+ std::string package_name;

37427

+ if (this->package_ == NULL)

37428

+ package_name = gogo->package_name();

37429

+ else

37430

+ package_name = this->package_->package_name();

37431

+

37432

+ // Note that this will be misleading if this is an unexported

37433

+ // method generated for an embedded imported type. In that case

37434

+ // the unexported method should have the package name of the

37435

+ // package from which it is imported, but we are going to give

37436

+ // it our package name. Fixing this would require knowing the

37437

+ // package name, but we only know the package path. It might be

37438

+ // better to use package paths here anyhow. This doesn't affect

37439

+ // the assembler code, because we always set that name in

37440

+ // Function::get_or_make_decl anyhow. FIXME.

37441

+

37442

+ decl_name = package_name + '.' + Gogo::unpack_hidden_name(this->name_);

37443

+

37444

+ Function_type* fntype;

37445

+ if (this->is_function())

37446

+ fntype = this->func_value()->type();

37447

+ else if (this->is_function_declaration())

37448

+ fntype = this->func_declaration_value()->type();

37449

+ else

37450

+ fntype = NULL;

37451

+ if (fntype != NULL && fntype->is_method())

37452

+ {

37453

+ decl_name.push_back('.');

37454

+ decl_name.append(fntype->receiver()->type()->mangled_name(gogo));

37455

+ }

37456

+ }

37457

+ if (this->is_type())

37458

+ {

37459

+ unsigned int index;

37460

+ const Named_object* in_function = this->type_value()->in_function(&index);

37461

+ if (in_function != NULL)

37462

+ {

37463

+ decl_name += '$' + Gogo::unpack_hidden_name(in_function->name());

37464

+ if (index > 0)

37465

+ {

37466

+ char buf[30];

37467

+ snprintf(buf, sizeof buf, "%u", index);

37468

+ decl_name += '$';

37469

+ decl_name += buf;

37470

+ }

37471

+ }

37472

+ }

37473

+ return decl_name;

37474

+}

37475

+

37476

// Class Bindings.

37477

37478

Bindings::Bindings(Bindings* enclosing)

37479

Index: gcc/go/gofrontend/runtime.def

37480

===================================================================

37481

--- a/src/gcc/go/gofrontend/runtime.def (.../tags/gcc_4_8_2_release)

37482

+++ b/src/gcc/go/gofrontend/runtime.def (.../branches/gcc-4_8-branch)

37483

@@ -68,6 +68,12 @@

37484

P1(STRING), R1(SLICE))

37485

37486

37487

+// Complex division.

37488

+DEF_GO_RUNTIME(COMPLEX64_DIV, "__go_complex64_div",

37489

+ P2(COMPLEX64, COMPLEX64), R1(COMPLEX64))

37490

+DEF_GO_RUNTIME(COMPLEX128_DIV, "__go_complex128_div",

37491

+ P2(COMPLEX128, COMPLEX128), R1(COMPLEX128))

37492

+

37493

// Make a slice.

37494

DEF_GO_RUNTIME(MAKESLICE1, "__go_make_slice1", P2(TYPE, UINTPTR), R1(SLICE))

37495

DEF_GO_RUNTIME(MAKESLICE2, "__go_make_slice2", P3(TYPE, UINTPTR, UINTPTR),

37496

Index: gcc/go/gofrontend/gogo.h

37497

===================================================================

37498

--- a/src/gcc/go/gofrontend/gogo.h (.../tags/gcc_4_8_2_release)

37499

+++ b/src/gcc/go/gofrontend/gogo.h (.../branches/gcc-4_8-branch)

37500

@@ -48,6 +48,7 @@

37501

class Bblock;

37502

class Bvariable;

37503

class Blabel;

37504

+class Bfunction;

37505

37506

// This file declares the basic classes used to hold the internal

37507

// representation of Go which is built by the parser.

37508

@@ -952,6 +953,15 @@

37509

this->nointerface_ = true;

37510

}

37511

37512

+ // Record that this function is a stub method created for an unnamed

37513

+ // type.

37514

+ void

37515

+ set_is_unnamed_type_stub_method()

37516

+ {

37517

+ go_assert(this->is_method());

37518

+ this->is_unnamed_type_stub_method_ = true;

37519

+ }

37520

+

37521

// Add a new field to the closure variable.

37522

void

37523

add_closure_field(Named_object* var, Location loc)

37524

@@ -1089,17 +1099,13 @@

37525

this->descriptor_ = descriptor;

37526

}

37527

37528

- // Return the function's decl given an identifier.

37529

- tree

37530

- get_or_make_decl(Gogo*, Named_object*, tree id);

37531

+ // Return the backend representation.

37532

+ Bfunction*

37533

+ get_or_make_decl(Gogo*, Named_object*);

37534

37535

// Return the function's decl after it has been built.

37536

tree

37537

- get_decl() const

37538

- {

37539

- go_assert(this->fndecl_ != NULL);

37540

- return this->fndecl_;

37541

- }

37542

+ get_decl() const;

37543

37544

// Set the function decl to hold a tree of the function code.

37545

void

37546

@@ -1170,7 +1176,7 @@

37547

// The function descriptor, if any.

37548

Expression* descriptor_;

37549

// The function decl.

37550

- tree fndecl_;

37551

+ Bfunction* fndecl_;

37552

// The defer stack variable. A pointer to this variable is used to

37553

// distinguish the defer stack for one function from another. This

37554

// is NULL unless we actually need a defer stack.

37555

@@ -1181,6 +1187,9 @@

37556

bool results_are_named_ : 1;

37557

// True if this method should not be included in the type descriptor.

37558

bool nointerface_ : 1;

37559

+ // True if this function is a stub method created for an unnamed

37560

+ // type.

37561

+ bool is_unnamed_type_stub_method_ : 1;

37562

// True if this function calls the predeclared recover function.

37563

bool calls_recover_ : 1;

37564

// True if this a thunk built for a function which calls recover.

37565

@@ -1265,9 +1274,9 @@

37566

has_descriptor() const

37567

{ return this->descriptor_ != NULL; }

37568

37569

- // Return a decl for the function given an identifier.

37570

- tree

37571

- get_or_make_decl(Gogo*, Named_object*, tree id);

37572

+ // Return a backend representation.

37573

+ Bfunction*

37574

+ get_or_make_decl(Gogo*, Named_object*);

37575

37576

// If there is a descriptor, build it into the backend

37577

// representation.

37578

@@ -1290,7 +1299,7 @@

37579

// The function descriptor, if any.

37580

Expression* descriptor_;

37581

// The function decl if needed.

37582

- tree fndecl_;

37583

+ Bfunction* fndecl_;

37584

};

37585

37586

// A variable.

37587

@@ -2181,8 +2190,8 @@

37588

Bvariable*

37589

get_backend_variable(Gogo*, Named_object* function);

37590

37591

- // Return a tree for the external identifier for this object.

37592

- tree

37593

+ // Return the external identifier for this object.

37594

+ std::string

37595

get_id(Gogo*);

37596

37597

// Return a tree representing this object.

37598

Index: gcc/go/gofrontend/types.h

37599

===================================================================

37600

--- a/src/gcc/go/gofrontend/types.h (.../tags/gcc_4_8_2_release)

37601

+++ b/src/gcc/go/gofrontend/types.h (.../branches/gcc-4_8-branch)

37602

@@ -1138,6 +1138,13 @@

37603

Function_type* equal_fntype, Named_object** hash_fn,

37604

Named_object** equal_fn);

37605

37606

+ void

37607

+ write_named_hash(Gogo*, Named_type*, Function_type* hash_fntype,

37608

+ Function_type* equal_fntype);

37609

+

37610

+ void

37611

+ write_named_equal(Gogo*, Named_type*);

37612

+

37613

// Build a composite literal for the uncommon type information.

37614

Expression*

37615

uncommon_type_constructor(Gogo*, Type* uncommon_type,

37616

@@ -1717,7 +1724,8 @@

37617

Typed_identifier_list* results, Location location)

37618

: Type(TYPE_FUNCTION),

37619

receiver_(receiver), parameters_(parameters), results_(results),

37620

- location_(location), is_varargs_(false), is_builtin_(false)

37621

+ location_(location), is_varargs_(false), is_builtin_(false),

37622

+ fnbtype_(NULL)

37623

{ }

37624

37625

// Get the receiver.

37626

@@ -1789,6 +1797,12 @@

37627

Function_type*

37628

copy_with_receiver(Type*) const;

37629

37630

+ // Return a copy of this type with the receiver treated as the first

37631

+ // parameter. If WANT_POINTER_RECEIVER is true, the receiver is

37632

+ // forced to be a pointer.

37633

+ Function_type*

37634

+ copy_with_receiver_as_param(bool want_pointer_receiver) const;

37635

+

37636

// Return a copy of this type ignoring any receiver and using dummy

37637

// names for all parameters. This is used for thunks for method

37638

// values.

37639

@@ -1798,6 +1812,11 @@

37640

static Type*

37641

make_function_type_descriptor_type();

37642

37643

+ // Return the backend representation of this function type. This is used

37644

+ // as the real type of a backend function declaration or defintion.

37645

+ Btype*

37646

+ get_backend_fntype(Gogo*);

37647

+

37648

protected:

37649

int

37650

do_traverse(Traverse*);

37651

@@ -1851,6 +1870,9 @@

37652

// Whether this is a special builtin function which can not simply

37653

// be called. This is used for len, cap, etc.

37654

bool is_builtin_;

37655

+ // The backend representation of this type for backend function

37656

+ // declarations and definitions.

37657

+ Btype* fnbtype_;

37658

};

37659

37660

// The type of a pointer.

37661

@@ -1915,7 +1937,7 @@

37662

{

37663

public:

37664

explicit Struct_field(const Typed_identifier& typed_identifier)

37665

- : typed_identifier_(typed_identifier), tag_(NULL)

37666

+ : typed_identifier_(typed_identifier), tag_(NULL), is_imported_(false)

37667

{ }

37668

37669

// The field name.

37670

@@ -1926,6 +1948,10 @@

37671

bool

37672

is_field_name(const std::string& name) const;

37673

37674

+ // Return whether this struct field is an unexported field named NAME.

37675

+ bool

37676

+ is_unexported_field_name(Gogo*, const std::string& name) const;

37677

+

37678

// Return whether this struct field is an embedded built-in type.

37679

bool

37680

is_embedded_builtin(Gogo*) const;

37681

@@ -1963,6 +1989,11 @@

37682

set_tag(const std::string& tag)

37683

{ this->tag_ = new std::string(tag); }

37684

37685

+ // Record that this field is defined in an imported struct.

37686

+ void

37687

+ set_is_imported()

37688

+ { this->is_imported_ = true; }

37689

+

37690

// Set the type. This is only used in error cases.

37691

void

37692

set_type(Type* type)

37693

@@ -1973,6 +2004,8 @@

37694

Typed_identifier typed_identifier_;

37695

// The field tag. This is NULL if the field has no tag.

37696

std::string* tag_;

37697

+ // Whether this field is defined in an imported struct.

37698

+ bool is_imported_;

37699

};

37700

37701

// A list of struct fields.

37702

Index: gcc/go/gofrontend/parse.cc

37703

===================================================================

37704

--- a/src/gcc/go/gofrontend/parse.cc (.../tags/gcc_4_8_2_release)

37705

+++ b/src/gcc/go/gofrontend/parse.cc (.../branches/gcc-4_8-branch)

37706

@@ -744,6 +744,8 @@

37707

return NULL;

37708

37709

Parse::Names names;

37710

+ if (receiver != NULL)

37711

+ names[receiver->name()] = receiver;

37712

if (params != NULL)

37713

this->check_signature_names(params, &names);

37714

if (results != NULL)

37715

Index: gcc/go/gofrontend/import.h

37716

===================================================================

37717

--- a/src/gcc/go/gofrontend/import.h (.../tags/gcc_4_8_2_release)

37718

+++ b/src/gcc/go/gofrontend/import.h (.../branches/gcc-4_8-branch)

37719

@@ -149,6 +149,11 @@

37720

location() const

37721

{ return this->location_; }

37722

37723

+ // Return the package we are importing.

37724

+ Package*

37725

+ package() const

37726

+ { return this->package_; }

37727

+

37728

// Return the next character.

37729

int

37730

peek_char()

37731

Index: gcc/go/gofrontend/runtime.cc

37732

===================================================================

37733

--- a/src/gcc/go/gofrontend/runtime.cc (.../tags/gcc_4_8_2_release)

37734

+++ b/src/gcc/go/gofrontend/runtime.cc (.../branches/gcc-4_8-branch)

37735

@@ -42,6 +42,8 @@

37736

RFT_RUNE,

37737

// Go type float64, C type double.

37738

RFT_FLOAT64,

37739

+ // Go type complex64, C type __complex float.

37740

+ RFT_COMPLEX64,

37741

// Go type complex128, C type __complex double.

37742

RFT_COMPLEX128,

37743

// Go type string, C type struct __go_string.

37744

@@ -126,6 +128,10 @@

37745

t = Type::lookup_float_type("float64");

37746

break;

37747

37748

+ case RFT_COMPLEX64:

37749

+ t = Type::lookup_complex_type("complex64");

37750

+ break;

37751

+

37752

case RFT_COMPLEX128:

37753

t = Type::lookup_complex_type("complex128");

37754

break;

37755

@@ -216,6 +222,7 @@

37756

case RFT_UINTPTR:

37757

case RFT_RUNE:

37758

case RFT_FLOAT64:

37759

+ case RFT_COMPLEX64:

37760

case RFT_COMPLEX128:

37761

case RFT_STRING:

37762

case RFT_POINTER:

37763

Index: gcc/go/gofrontend/expressions.h

37764

===================================================================

37765

--- a/src/gcc/go/gofrontend/expressions.h (.../tags/gcc_4_8_2_release)

37766

+++ b/src/gcc/go/gofrontend/expressions.h (.../branches/gcc-4_8-branch)

37767

@@ -1514,8 +1514,8 @@

37768

closure()

37769

{ return this->closure_; }

37770

37771

- // Return a tree for the code for a function.

37772

- static tree

37773

+ // Return a backend expression for the code of a function.

37774

+ static Bexpression*

37775

get_code_pointer(Gogo*, Named_object* function, Location loc);

37776

37777

protected:

37778

Index: gcc/go/gofrontend/gogo-tree.cc

37779

===================================================================

37780

--- a/src/gcc/go/gofrontend/gogo-tree.cc (.../tags/gcc_4_8_2_release)

37781

+++ b/src/gcc/go/gofrontend/gogo-tree.cc (.../branches/gcc-4_8-branch)

37782

@@ -985,74 +985,6 @@

37783

delete[] vec;

37784

}

37785

37786

-// Get a tree for the identifier for a named object.

37787

-

37788

-tree

37789

-Named_object::get_id(Gogo* gogo)

37790

-{

37791

- go_assert(!this->is_variable() && !this->is_result_variable());

37792

- std::string decl_name;

37793

- if (this->is_function_declaration()

37794

- && !this->func_declaration_value()->asm_name().empty())

37795

- decl_name = this->func_declaration_value()->asm_name();

37796

- else if (this->is_type()

37797

- && Linemap::is_predeclared_location(this->type_value()->location()))

37798

- {

37799

- // We don't need the package name for builtin types.

37800

- decl_name = Gogo::unpack_hidden_name(this->name_);

37801

- }

37802

- else

37803

- {

37804

- std::string package_name;

37805

- if (this->package_ == NULL)

37806

- package_name = gogo->package_name();

37807

- else

37808

- package_name = this->package_->package_name();

37809

-

37810

- // Note that this will be misleading if this is an unexported

37811

- // method generated for an embedded imported type. In that case

37812

- // the unexported method should have the package name of the

37813

- // package from which it is imported, but we are going to give

37814

- // it our package name. Fixing this would require knowing the

37815

- // package name, but we only know the package path. It might be

37816

- // better to use package paths here anyhow. This doesn't affect

37817

- // the assembler code, because we always set that name in

37818

- // Function::get_or_make_decl anyhow. FIXME.

37819

-

37820

- decl_name = package_name + '.' + Gogo::unpack_hidden_name(this->name_);

37821

-

37822

- Function_type* fntype;

37823

- if (this->is_function())

37824

- fntype = this->func_value()->type();

37825

- else if (this->is_function_declaration())

37826

- fntype = this->func_declaration_value()->type();

37827

- else

37828

- fntype = NULL;

37829

- if (fntype != NULL && fntype->is_method())

37830

- {

37831

- decl_name.push_back('.');

37832

- decl_name.append(fntype->receiver()->type()->mangled_name(gogo));

37833

- }

37834

- }

37835

- if (this->is_type())

37836

- {

37837

- unsigned int index;

37838

- const Named_object* in_function = this->type_value()->in_function(&index);

37839

- if (in_function != NULL)

37840

- {

37841

- decl_name += '$' + Gogo::unpack_hidden_name(in_function->name());

37842

- if (index > 0)

37843

- {

37844

- char buf[30];

37845

- snprintf(buf, sizeof buf, "%u", index);

37846

- decl_name += '$';

37847

- decl_name += buf;

37848

- }

37849

- }

37850

- }

37851

- return get_identifier_from_string(decl_name);

37852

-}

37853

-

37854

// Get a tree for a named object.

37855

37856

tree

37857

@@ -1067,11 +999,6 @@

37858

return error_mark_node;

37859

}

37860

37861

- tree name;

37862

- if (this->classification_ == NAMED_OBJECT_TYPE)

37863

- name = NULL_TREE;

37864

- else

37865

- name = this->get_id(gogo);

37866

tree decl;

37867

switch (this->classification_)

37868

{

37869

@@ -1099,6 +1026,7 @@

37870

decl = error_mark_node;

37871

else if (INTEGRAL_TYPE_P(TREE_TYPE(expr_tree)))

37872

{

37873

+ tree name = get_identifier_from_string(this->get_id(gogo));

37874

decl = build_decl(named_constant->location().gcc_location(),

37875

CONST_DECL, name, TREE_TYPE(expr_tree));

37876

DECL_INITIAL(decl) = expr_tree;

37877

@@ -1161,7 +1089,7 @@

37878

case NAMED_OBJECT_FUNC:

37879

{

37880

Function* func = this->u_.func_value;

37881

- decl = func->get_or_make_decl(gogo, this, name);

37882

+ decl = function_to_tree(func->get_or_make_decl(gogo, this));

37883

if (decl != error_mark_node)

37884

{

37885

if (func->block() != NULL)

37886

@@ -1286,124 +1214,13 @@

37887

return block_tree;

37888

}

37889

37890

-// Get a tree for a function decl.

37891

+// Get the backend representation.

37892

37893

-tree

37894

-Function::get_or_make_decl(Gogo* gogo, Named_object* no, tree id)

37895

+Bfunction*

37896

+Function_declaration::get_or_make_decl(Gogo* gogo, Named_object* no)

37897

{

37898

- if (this->fndecl_ == NULL_TREE)

37899

+ if (this->fndecl_ == NULL)

37900

{

37901

- tree functype = type_to_tree(this->type_->get_backend(gogo));

37902

-

37903

- if (functype != error_mark_node)

37904

- {

37905

- // The type of a function comes back as a pointer to a

37906

- // struct whose first field is the function, but we want the

37907

- // real function type for a function declaration.

37908

- go_assert(POINTER_TYPE_P(functype)

37909

- && TREE_CODE(TREE_TYPE(functype)) == RECORD_TYPE);

37910

- functype = TREE_TYPE(TYPE_FIELDS(TREE_TYPE(functype)));

37911

- go_assert(FUNCTION_POINTER_TYPE_P(functype));

37912

- functype = TREE_TYPE(functype);

37913

- }

37914

-

37915

- if (functype == error_mark_node)

37916

- this->fndecl_ = error_mark_node;

37917

- else

37918

- {

37919

- tree decl = build_decl(this->location().gcc_location(), FUNCTION_DECL,

37920

- id, functype);

37921

-

37922

- this->fndecl_ = decl;

37923

-

37924

- if (no->package() != NULL)

37925

- ;

37926

- else if (this->enclosing_ != NULL || Gogo::is_thunk(no))

37927

- ;

37928

- else if (Gogo::unpack_hidden_name(no->name()) == "init"

37929

- && !this->type_->is_method())

37930

- ;

37931

- else if (Gogo::unpack_hidden_name(no->name()) == "main"

37932

- && gogo->is_main_package())

37933

- TREE_PUBLIC(decl) = 1;

37934

- // Methods have to be public even if they are hidden because

37935

- // they can be pulled into type descriptors when using

37936

- // anonymous fields.

37937

- else if (!Gogo::is_hidden_name(no->name())

37938

- || this->type_->is_method())

37939

- {

37940

- TREE_PUBLIC(decl) = 1;

37941

- std::string pkgpath = gogo->pkgpath_symbol();

37942

- if (this->type_->is_method()

37943

- && Gogo::is_hidden_name(no->name())

37944

- && Gogo::hidden_name_pkgpath(no->name()) != gogo->pkgpath())

37945

- {

37946

- // This is a method we created for an unexported

37947

- // method of an imported embedded type. We need to

37948

- // use the pkgpath of the imported package to avoid

37949

- // a possible name collision. See bug478 for a test

37950

- // case.

37951

- pkgpath = Gogo::hidden_name_pkgpath(no->name());

37952

- pkgpath = Gogo::pkgpath_for_symbol(pkgpath);

37953

- }

37954

-

37955

- std::string asm_name = pkgpath;

37956

- asm_name.append(1, '.');

37957

- asm_name.append(Gogo::unpack_hidden_name(no->name()));

37958

- if (this->type_->is_method())

37959

- {

37960

- asm_name.append(1, '.');

37961

- Type* rtype = this->type_->receiver()->type();

37962

- asm_name.append(rtype->mangled_name(gogo));

37963

- }

37964

- SET_DECL_ASSEMBLER_NAME(decl,

37965

- get_identifier_from_string(asm_name));

37966

- }

37967

-

37968

- // Why do we have to do this in the frontend?

37969

- tree restype = TREE_TYPE(functype);

37970

- tree resdecl =

37971

- build_decl(this->location().gcc_location(), RESULT_DECL, NULL_TREE,

37972

- restype);

37973

- DECL_ARTIFICIAL(resdecl) = 1;

37974

- DECL_IGNORED_P(resdecl) = 1;

37975

- DECL_CONTEXT(resdecl) = decl;

37976

- DECL_RESULT(decl) = resdecl;

37977

-

37978

- // If a function calls the predeclared recover function, we

37979

- // can't inline it, because recover behaves differently in a

37980

- // function passed directly to defer. If this is a recover

37981

- // thunk that we built to test whether a function can be

37982

- // recovered, we can't inline it, because that will mess up

37983

- // our return address comparison.

37984

- if (this->calls_recover_ || this->is_recover_thunk_)

37985

- DECL_UNINLINABLE(decl) = 1;

37986

-

37987

- // If this is a thunk created to call a function which calls

37988

- // the predeclared recover function, we need to disable

37989

- // stack splitting for the thunk.

37990

- if (this->is_recover_thunk_)

37991

- {

37992

- tree attr = get_identifier("__no_split_stack__");

37993

- DECL_ATTRIBUTES(decl) = tree_cons(attr, NULL_TREE, NULL_TREE);

37994

- }

37995

-

37996

- if (this->in_unique_section_)

37997

- resolve_unique_section (decl, 0, 1);

37998

-

37999

- go_preserve_from_gc(decl);

38000

- }

38001

- }

38002

- return this->fndecl_;

38003

-}

38004

-

38005

-// Get a tree for a function declaration.

38006

-

38007

-tree

38008

-Function_declaration::get_or_make_decl(Gogo* gogo, Named_object* no, tree id)

38009

-{

38010

- if (this->fndecl_ == NULL_TREE)

38011

- {

38012

// Let Go code use an asm declaration to pick up a builtin

38013

// function.

38014

if (!this->asm_name_.empty())

38015

@@ -1412,58 +1229,46 @@

38016

builtin_functions.find(this->asm_name_);

38017

if (p != builtin_functions.end())

38018

{

38019

- this->fndecl_ = p->second;

38020

+ this->fndecl_ = tree_to_function(p->second);

38021

return this->fndecl_;

38022

}

38023

}

38024

38025

- tree functype = type_to_tree(this->fntype_->get_backend(gogo));

38026

+ std::string asm_name;

38027

+ if (this->asm_name_.empty())

38028

+ {

38029

+ asm_name = (no->package() == NULL

38030

+ ? gogo->pkgpath_symbol()

38031

+ : no->package()->pkgpath_symbol());

38032

+ asm_name.append(1, '.');

38033

+ asm_name.append(Gogo::unpack_hidden_name(no->name()));

38034

+ if (this->fntype_->is_method())

38035

+ {

38036

+ asm_name.append(1, '.');

38037

+ Type* rtype = this->fntype_->receiver()->type();

38038

+ asm_name.append(rtype->mangled_name(gogo));

38039

+ }

38040

+ }

38041

38042

- if (functype != error_mark_node)

38043

- {

38044

- // The type of a function comes back as a pointer to a

38045

- // struct whose first field is the function, but we want the

38046

- // real function type for a function declaration.

38047

- go_assert(POINTER_TYPE_P(functype)

38048

- && TREE_CODE(TREE_TYPE(functype)) == RECORD_TYPE);

38049

- functype = TREE_TYPE(TYPE_FIELDS(TREE_TYPE(functype)));

38050

- go_assert(FUNCTION_POINTER_TYPE_P(functype));

38051

- functype = TREE_TYPE(functype);

38052

- }

38053

+ Btype* functype = this->fntype_->get_backend_fntype(gogo);

38054

+ this->fndecl_ =

38055

+ gogo->backend()->function(functype, no->get_id(gogo), asm_name,

38056

+ true, true, true, false, false,

38057

+ this->location());

38058

+ }

38059

38060

- tree decl;

38061

- if (functype == error_mark_node)

38062

- decl = error_mark_node;

38063

- else

38064

- {

38065

- decl = build_decl(this->location().gcc_location(), FUNCTION_DECL, id,

38066

- functype);

38067

- TREE_PUBLIC(decl) = 1;

38068

- DECL_EXTERNAL(decl) = 1;

38069

-

38070

- if (this->asm_name_.empty())

38071

- {

38072

- std::string asm_name = (no->package() == NULL

38073

- ? gogo->pkgpath_symbol()

38074

- : no->package()->pkgpath_symbol());

38075

- asm_name.append(1, '.');

38076

- asm_name.append(Gogo::unpack_hidden_name(no->name()));

38077

- if (this->fntype_->is_method())

38078

- {

38079

- asm_name.append(1, '.');

38080

- Type* rtype = this->fntype_->receiver()->type();

38081

- asm_name.append(rtype->mangled_name(gogo));

38082

- }

38083

- SET_DECL_ASSEMBLER_NAME(decl,

38084

- get_identifier_from_string(asm_name));

38085

- }

38086

- }

38087

- this->fndecl_ = decl;

38088

- go_preserve_from_gc(decl);

38089

- }

38090

return this->fndecl_;

38091

}

38092

38093

+// Return the function's decl after it has been built.

38094

+

38095

+tree

38096

+Function::get_decl() const

38097

+{

38098

+ go_assert(this->fndecl_ != NULL);

38099

+ return function_to_tree(this->fndecl_);

38100

+}

38101

+

38102

// We always pass the receiver to a method as a pointer. If the

38103

// receiver is actually declared as a non-pointer type, then we copy

38104

// the value into a local variable, so that it has the right type. In

38105

@@ -1558,7 +1363,7 @@

38106

void

38107

Function::build_tree(Gogo* gogo, Named_object* named_function)

38108

{

38109

- tree fndecl = this->fndecl_;

38110

+ tree fndecl = this->get_decl();

38111

go_assert(fndecl != NULL_TREE);

38112

38113

tree params = NULL_TREE;

38114

@@ -1796,7 +1601,7 @@

38115

set = NULL_TREE;

38116

else

38117

set = fold_build2_loc(end_loc.gcc_location(), MODIFY_EXPR, void_type_node,

38118

- DECL_RESULT(this->fndecl_), retval);

38119

+ DECL_RESULT(this->get_decl()), retval);

38120

tree ret_stmt = fold_build1_loc(end_loc.gcc_location(), RETURN_EXPR,

38121

void_type_node, set);

38122

append_to_statement_list(ret_stmt, &stmt_list);

38123

@@ -1851,7 +1656,7 @@

38124

retval = this->return_value(gogo, named_function, end_loc,

38125

&stmt_list);

38126

set = fold_build2_loc(end_loc.gcc_location(), MODIFY_EXPR, void_type_node,

38127

- DECL_RESULT(this->fndecl_), retval);

38128

+ DECL_RESULT(this->get_decl()), retval);

38129

ret_stmt = fold_build1_loc(end_loc.gcc_location(), RETURN_EXPR,

38130

void_type_node, set);

38131

38132

@@ -1869,7 +1674,7 @@

38133

*fini = stmt_list;

38134

}

38135

38136

-// Return the value to assign to DECL_RESULT(this->fndecl_). This may

38137

+// Return the value to assign to DECL_RESULT(this->get_decl()). This may

38138

// also add statements to STMT_LIST, which need to be executed before

38139

// the assignment. This is used for a return statement with no

38140

// explicit values.

38141

@@ -1902,7 +1707,7 @@

38142

}

38143

else

38144

{

38145

- tree rettype = TREE_TYPE(DECL_RESULT(this->fndecl_));

38146

+ tree rettype = TREE_TYPE(DECL_RESULT(this->get_decl()));

38147

retval = create_tmp_var(rettype, "RESULT");

38148

tree field = TYPE_FIELDS(rettype);

38149

int index = 0;

38150

@@ -2323,18 +2128,14 @@

38151

go_assert(m != NULL);

38152

38153

Named_object* no = m->named_object();

38154

-

38155

- tree fnid = no->get_id(this);

38156

-

38157

- tree fndecl;

38158

+ Bfunction* bf;

38159

if (no->is_function())

38160

- fndecl = no->func_value()->get_or_make_decl(this, no, fnid);

38161

+ bf = no->func_value()->get_or_make_decl(this, no);

38162

else if (no->is_function_declaration())

38163

- fndecl = no->func_declaration_value()->get_or_make_decl(this, no,

38164

- fnid);

38165

+ bf = no->func_declaration_value()->get_or_make_decl(this, no);

38166

else

38167

go_unreachable();

38168

- fndecl = build_fold_addr_expr(fndecl);

38169

+ tree fndecl = build_fold_addr_expr(function_to_tree(bf));

38170

38171

elt = pointers->quick_push(empty);

38172

elt->index = size_int(i);

38173

@@ -2353,10 +2154,11 @@

38174

TREE_CONSTANT(decl) = 1;

38175

DECL_INITIAL(decl) = constructor;

38176

38177

- // If the interface type has hidden methods, then this is the only

38178

- // definition of the table. Otherwise it is a comdat table which

38179

- // may be defined in multiple packages.

38180

- if (has_hidden_methods)

38181

+ // If the interface type has hidden methods, and the table is for a

38182

+ // named type, then this is the only definition of the table.

38183

+ // Otherwise it is a comdat table which may be defined in multiple

38184

+ // packages.

38185

+ if (has_hidden_methods && type->named_type() != NULL)

38186

TREE_PUBLIC(decl) = 1;

38187

else

38188

{

38189

Index: gcc/go/gofrontend/lex.cc

38190

===================================================================

38191

--- a/src/gcc/go/gofrontend/lex.cc (.../tags/gcc_4_8_2_release)

38192

+++ b/src/gcc/go/gofrontend/lex.cc (.../branches/gcc-4_8-branch)

38193

@@ -873,7 +873,28 @@

38194

&& (cc < 'a' || cc > 'z')

38195

&& cc != '_'

38196

&& (cc < '0' || cc > '9'))

38197

- break;

38198

+ {

38199

+ // Check for an invalid character here, as we get better

38200

+ // error behaviour if we swallow them as part of the

38201

+ // identifier we are building.

38202

+ if ((cc >= ' ' && cc < 0x7f)

38203

+ || cc == '\t'

38204

+ || cc == '\r'

38205

+ || cc == '\n')

38206

+ break;

38207

+

38208

+ this->lineoff_ = p - this->linebuf_;

38209

+ error_at(this->location(),

38210

+ "invalid character 0x%x in identifier",

38211

+ cc);

38212

+ if (!has_non_ascii_char)

38213

+ {

38214

+ buf.assign(pstart, p - pstart);

38215

+ has_non_ascii_char = true;

38216

+ }

38217

+ if (!Lex::is_invalid_identifier(buf))

38218

+ buf.append("$INVALID$");

38219

+ }

38220

++p;

38221

if (is_first)

38222

{

38223

Index: gcc/go/gofrontend/backend.h

38224

===================================================================

38225

--- a/src/gcc/go/gofrontend/backend.h (.../tags/gcc_4_8_2_release)

38226

+++ b/src/gcc/go/gofrontend/backend.h (.../branches/gcc-4_8-branch)

38227

@@ -23,7 +23,7 @@

38228

// The backend representation of a statement.

38229

class Bstatement;

38230

38231

-// The backend representation of a function definition.

38232

+// The backend representation of a function definition or declaration.

38233

class Bfunction;

38234

38235

// The backend representation of a block.

38236

@@ -266,6 +266,11 @@

38237

virtual Bexpression*

38238

convert_expression(Btype* type, Bexpression* expr, Location) = 0;

38239

38240

+ // Create an expression for the address of a function. This is used to

38241

+ // get the address of the code for a function.

38242

+ virtual Bexpression*

38243

+ function_code_expression(Bfunction*, Location) = 0;

38244

+

38245

// Statements.

38246

38247

// Create an error statement. This is used for cases which should

38248

@@ -498,6 +503,32 @@

38249

// recover.

38250

virtual Bexpression*

38251

label_address(Blabel*, Location) = 0;

38252

+

38253

+ // Functions.

38254

+

38255

+ // Create an error function. This is used for cases which should

38256

+ // not occur in a correct program, in order to keep the compilation

38257

+ // going without crashing.

38258

+ virtual Bfunction*

38259

+ error_function() = 0;

38260

+

38261

+ // Declare or define a function of FNTYPE.

38262

+ // NAME is the Go name of the function. ASM_NAME, if not the empty string, is

38263

+ // the name that should be used in the symbol table; this will be non-empty if

38264

+ // a magic extern comment is used.

38265

+ // IS_VISIBLE is true if this function should be visible outside of the

38266

+ // current compilation unit. IS_DECLARATION is true if this is a function

38267

+ // declaration rather than a definition; the function definition will be in

38268

+ // another compilation unit.

38269

+ // IS_INLINABLE is true if the function can be inlined.

38270

+ // DISABLE_SPLIT_STACK is true if this function may not split the stack; this

38271

+ // is used for the implementation of recover.

38272

+ // IN_UNIQUE_SECTION is true if this function should be put into a unique

38273

+ // location if possible; this is used for field tracking.

38274

+ virtual Bfunction*

38275

+ function(Btype* fntype, const std::string& name, const std::string& asm_name,

38276

+ bool is_visible, bool is_declaration, bool is_inlinable,

38277

+ bool disable_split_stack, bool in_unique_section, Location) = 0;

38278

};

38279

38280

// The backend interface has to define this function.

38281

@@ -517,5 +548,6 @@

38282

extern tree stat_to_tree(Bstatement*);

38283

extern tree block_to_tree(Bblock*);

38284

extern tree var_to_tree(Bvariable*);

38285

+extern tree function_to_tree(Bfunction*);

38286

38287

#endif // !defined(GO_BACKEND_H)

38288

Index: gcc/go/gofrontend/types.cc

38289

===================================================================

38290

--- a/src/gcc/go/gofrontend/types.cc (.../tags/gcc_4_8_2_release)

38291

+++ b/src/gcc/go/gofrontend/types.cc (.../branches/gcc-4_8-branch)

38292

@@ -1834,7 +1834,9 @@

38293

bloc);

38294

gogo->start_block(bloc);

38295

38296

- if (this->struct_type() != NULL)

38297

+ if (name != NULL && name->real_type()->named_type() != NULL)

38298

+ this->write_named_hash(gogo, name, hash_fntype, equal_fntype);

38299

+ else if (this->struct_type() != NULL)

38300

this->struct_type()->write_hash_function(gogo, name, hash_fntype,

38301

equal_fntype);

38302

else if (this->array_type() != NULL)

38303

@@ -1852,7 +1854,9 @@

38304

false, bloc);

38305

gogo->start_block(bloc);

38306

38307

- if (this->struct_type() != NULL)

38308

+ if (name != NULL && name->real_type()->named_type() != NULL)

38309

+ this->write_named_equal(gogo, name);

38310

+ else if (this->struct_type() != NULL)

38311

this->struct_type()->write_equal_function(gogo, name);

38312

else if (this->array_type() != NULL)

38313

this->array_type()->write_equal_function(gogo, name);

38314

@@ -1865,6 +1869,100 @@

38315

gogo->finish_function(bloc);

38316

}

38317

38318

+// Write a hash function that simply calls the hash function for a

38319

+// named type. This is used when one named type is defined as

38320

+// another. This ensures that this case works when the other named

38321

+// type is defined in another package and relies on calling hash

38322

+// functions defined only in that package.

38323

+

38324

+void

38325

+Type::write_named_hash(Gogo* gogo, Named_type* name,

38326

+ Function_type* hash_fntype, Function_type* equal_fntype)

38327

+{

38328

+ Location bloc = Linemap::predeclared_location();

38329

+

38330

+ Named_type* base_type = name->real_type()->named_type();

38331

+ go_assert(base_type != NULL);

38332

+

38333

+ // The pointer to the type we are going to hash. This is an

38334

+ // unsafe.Pointer.

38335

+ Named_object* key_arg = gogo->lookup("key", NULL);

38336

+ go_assert(key_arg != NULL);

38337

+

38338

+ // The size of the type we are going to hash.

38339

+ Named_object* keysz_arg = gogo->lookup("key_size", NULL);

38340

+ go_assert(keysz_arg != NULL);

38341

+

38342

+ Named_object* hash_fn;

38343

+ Named_object* equal_fn;

38344

+ name->real_type()->type_functions(gogo, base_type, hash_fntype, equal_fntype,

38345

+ &hash_fn, &equal_fn);

38346

+

38347

+ // Call the hash function for the base type.

38348

+ Expression* key_ref = Expression::make_var_reference(key_arg, bloc);

38349

+ Expression* keysz_ref = Expression::make_var_reference(keysz_arg, bloc);

38350

+ Expression_list* args = new Expression_list();

38351

+ args->push_back(key_ref);

38352

+ args->push_back(keysz_ref);

38353

+ Expression* func = Expression::make_func_reference(hash_fn, NULL, bloc);

38354

+ Expression* call = Expression::make_call(func, args, false, bloc);

38355

+

38356

+ // Return the hash of the base type.

38357

+ Expression_list* vals = new Expression_list();

38358

+ vals->push_back(call);

38359

+ Statement* s = Statement::make_return_statement(vals, bloc);

38360

+ gogo->add_statement(s);

38361

+}

38362

+

38363

+// Write an equality function that simply calls the equality function

38364

+// for a named type. This is used when one named type is defined as

38365

+// another. This ensures that this case works when the other named

38366

+// type is defined in another package and relies on calling equality

38367

+// functions defined only in that package.

38368

+

38369

+void

38370

+Type::write_named_equal(Gogo* gogo, Named_type* name)

38371

+{

38372

+ Location bloc = Linemap::predeclared_location();

38373

+

38374

+ // The pointers to the types we are going to compare. These have

38375

+ // type unsafe.Pointer.

38376

+ Named_object* key1_arg = gogo->lookup("key1", NULL);

38377

+ Named_object* key2_arg = gogo->lookup("key2", NULL);

38378

+ go_assert(key1_arg != NULL && key2_arg != NULL);

38379

+

38380

+ Named_type* base_type = name->real_type()->named_type();

38381

+ go_assert(base_type != NULL);

38382

+

38383

+ // Build temporaries with the base type.

38384

+ Type* pt = Type::make_pointer_type(base_type);

38385

+

38386

+ Expression* ref = Expression::make_var_reference(key1_arg, bloc);

38387

+ ref = Expression::make_cast(pt, ref, bloc);

38388

+ Temporary_statement* p1 = Statement::make_temporary(pt, ref, bloc);

38389

+ gogo->add_statement(p1);

38390

+

38391

+ ref = Expression::make_var_reference(key2_arg, bloc);

38392

+ ref = Expression::make_cast(pt, ref, bloc);

38393

+ Temporary_statement* p2 = Statement::make_temporary(pt, ref, bloc);

38394

+ gogo->add_statement(p2);

38395

+

38396

+ // Compare the values for equality.

38397

+ Expression* t1 = Expression::make_temporary_reference(p1, bloc);

38398

+ t1 = Expression::make_unary(OPERATOR_MULT, t1, bloc);

38399

+

38400

+ Expression* t2 = Expression::make_temporary_reference(p2, bloc);

38401

+ t2 = Expression::make_unary(OPERATOR_MULT, t2, bloc);

38402

+

38403

+ Expression* cond = Expression::make_binary(OPERATOR_EQEQ, t1, t2, bloc);

38404

+

38405

+ // Return the equality comparison.

38406

+ Expression_list* vals = new Expression_list();

38407

+ vals->push_back(cond);

38408

+ Statement* s = Statement::make_return_statement(vals, bloc);

38409

+ gogo->add_statement(s);

38410

+}

38411

+

38412

// Return a composite literal for the type descriptor for a plain type

38413

// of kind RUNTIME_TYPE_KIND named NAME.

38414

38415

@@ -2164,26 +2262,9 @@

38416

38417

++p;

38418

go_assert(p->is_field_name("typ"));

38419

- if (!only_value_methods && m->is_value_method())

38420

- {

38421

- // This is a value method on a pointer type. Change the type of

38422

- // the method to use a pointer receiver. The implementation

38423

- // always uses a pointer receiver anyhow.

38424

- Type* rtype = mtype->receiver()->type();

38425

- Type* prtype = Type::make_pointer_type(rtype);

38426

- Typed_identifier* receiver =

38427

- new Typed_identifier(mtype->receiver()->name(), prtype,

38428

- mtype->receiver()->location());

38429

- mtype = Type::make_function_type(receiver,

38430

- (mtype->parameters() == NULL

38431

- ? NULL

38432

- : mtype->parameters()->copy()),

38433

- (mtype->results() == NULL

38434

- ? NULL

38435

- : mtype->results()->copy()),

38436

- mtype->location());

38437

- }

38438

- vals->push_back(Expression::make_type_descriptor(mtype, bloc));

38439

+ bool want_pointer_receiver = !only_value_methods && m->is_value_method();

38440

+ nonmethod_type = mtype->copy_with_receiver_as_param(want_pointer_receiver);

38441

+ vals->push_back(Expression::make_type_descriptor(nonmethod_type, bloc));

38442

38443

++p;

38444

go_assert(p->is_field_name("tfn"));

38445

@@ -3383,6 +3464,68 @@

38446

// Get the backend representation for a function type.

38447

38448

Btype*

38449

+Function_type::get_backend_fntype(Gogo* gogo)

38450

+{

38451

+ if (this->fnbtype_ == NULL)

38452

+ {

38453

+ Backend::Btyped_identifier breceiver;

38454

+ if (this->receiver_ != NULL)

38455

+ {

38456

+ breceiver.name = Gogo::unpack_hidden_name(this->receiver_->name());

38457

+

38458

+ // We always pass the address of the receiver parameter, in

38459

+ // order to make interface calls work with unknown types.

38460

+ Type* rtype = this->receiver_->type();

38461

+ if (rtype->points_to() == NULL)

38462

+ rtype = Type::make_pointer_type(rtype);

38463

+ breceiver.btype = rtype->get_backend(gogo);

38464

+ breceiver.location = this->receiver_->location();

38465

+ }

38466

+

38467

+ std::vector<Backend::Btyped_identifier> bparameters;

38468

+ if (this->parameters_ != NULL)

38469

+ {

38470

+ bparameters.resize(this->parameters_->size());

38471

+ size_t i = 0;

38472

+ for (Typed_identifier_list::const_iterator p =

38473

+ this->parameters_->begin(); p != this->parameters_->end();

38474

+ ++p, ++i)

38475

+ {

38476

+ bparameters[i].name = Gogo::unpack_hidden_name(p->name());

38477

+ bparameters[i].btype = p->type()->get_backend(gogo);

38478

+ bparameters[i].location = p->location();

38479

+ }

38480

+ go_assert(i == bparameters.size());

38481

+ }

38482

+

38483

+ std::vector<Backend::Btyped_identifier> bresults;

38484

+ if (this->results_ != NULL)

38485

+ {

38486

+ bresults.resize(this->results_->size());

38487

+ size_t i = 0;

38488

+ for (Typed_identifier_list::const_iterator p =

38489

+ this->results_->begin(); p != this->results_->end();

38490

+ ++p, ++i)

38491

+ {

38492

+ bresults[i].name = Gogo::unpack_hidden_name(p->name());

38493

+ bresults[i].btype = p->type()->get_backend(gogo);

38494

+ bresults[i].location = p->location();

38495

+ }

38496

+ go_assert(i == bresults.size());

38497

+ }

38498

+

38499

+ this->fnbtype_ = gogo->backend()->function_type(breceiver, bparameters,

38500

+ bresults,

38501

+ this->location());

38502

+

38503

+ }

38504

+

38505

+ return this->fnbtype_;

38506

+}

38507

+

38508

+// Get the backend representation for a Go function type.

38509

+

38510

+Btype*

38511

Function_type::do_get_backend(Gogo* gogo)

38512

{

38513

// When we do anything with a function value other than call it, it

38514

@@ -3395,57 +3538,9 @@

38515

gogo->backend()->placeholder_struct_type("__go_descriptor", loc);

38516

Btype* ptr_struct_type = gogo->backend()->pointer_type(struct_type);

38517

38518

- Backend::Btyped_identifier breceiver;

38519

- if (this->receiver_ != NULL)

38520

- {

38521

- breceiver.name = Gogo::unpack_hidden_name(this->receiver_->name());

38522

-

38523

- // We always pass the address of the receiver parameter, in

38524

- // order to make interface calls work with unknown types.

38525

- Type* rtype = this->receiver_->type();

38526

- if (rtype->points_to() == NULL)

38527

- rtype = Type::make_pointer_type(rtype);

38528

- breceiver.btype = rtype->get_backend(gogo);

38529

- breceiver.location = this->receiver_->location();

38530

- }

38531

-

38532

- std::vector<Backend::Btyped_identifier> bparameters;

38533

- if (this->parameters_ != NULL)

38534

- {

38535

- bparameters.resize(this->parameters_->size());

38536

- size_t i = 0;

38537

- for (Typed_identifier_list::const_iterator p = this->parameters_->begin();

38538

- p != this->parameters_->end();

38539

- ++p, ++i)

38540

- {

38541

- bparameters[i].name = Gogo::unpack_hidden_name(p->name());

38542

- bparameters[i].btype = p->type()->get_backend(gogo);

38543

- bparameters[i].location = p->location();

38544

- }

38545

- go_assert(i == bparameters.size());

38546

- }

38547

-

38548

- std::vector<Backend::Btyped_identifier> bresults;

38549

- if (this->results_ != NULL)

38550

- {

38551

- bresults.resize(this->results_->size());

38552

- size_t i = 0;

38553

- for (Typed_identifier_list::const_iterator p = this->results_->begin();

38554

- p != this->results_->end();

38555

- ++p, ++i)

38556

- {

38557

- bresults[i].name = Gogo::unpack_hidden_name(p->name());

38558

- bresults[i].btype = p->type()->get_backend(gogo);

38559

- bresults[i].location = p->location();

38560

- }

38561

- go_assert(i == bresults.size());

38562

- }

38563

-

38564

- Btype* fntype = gogo->backend()->function_type(breceiver, bparameters,

38565

- bresults, loc);

38566

std::vector<Backend::Btyped_identifier> fields(1);

38567

fields[0].name = "code";

38568

- fields[0].btype = fntype;

38569

+ fields[0].btype = this->get_backend_fntype(gogo);

38570

fields[0].location = loc;

38571

if (!gogo->backend()->set_placeholder_struct_type(struct_type, fields))

38572

return gogo->backend()->error_type();

38573

@@ -3821,6 +3916,32 @@

38574

return ret;

38575

}

38576

38577

+// Make a copy of a function type with the receiver as the first

38578

+// parameter.

38579

+

38580

+Function_type*

38581

+Function_type::copy_with_receiver_as_param(bool want_pointer_receiver) const

38582

+{

38583

+ go_assert(this->is_method());

38584

+ Typed_identifier_list* new_params = new Typed_identifier_list();

38585

+ Type* rtype = this->receiver_->type();

38586

+ if (want_pointer_receiver)

38587

+ rtype = Type::make_pointer_type(rtype);

38588

+ Typed_identifier receiver(this->receiver_->name(), rtype,

38589

+ this->receiver_->location());

38590

+ new_params->push_back(receiver);

38591

+ const Typed_identifier_list* orig_params = this->parameters_;

38592

+ if (orig_params != NULL && !orig_params->empty())

38593

+ {

38594

+ for (Typed_identifier_list::const_iterator p = orig_params->begin();

38595

+ p != orig_params->end();

38596

+ ++p)

38597

+ new_params->push_back(*p);

38598

+ }

38599

+ return Type::make_function_type(NULL, new_params, this->results_,

38600

+ this->location_);

38601

+}

38602

+

38603

// Make a copy of a function type ignoring any receiver and adding a

38604

// closure parameter.

38605

38606

@@ -4195,7 +4316,8 @@

38607

38608

// This is a horrible hack caused by the fact that we don't pack

38609

// the names of builtin types. FIXME.

38610

- if (nt != NULL

38611

+ if (!this->is_imported_

38612

+ && nt != NULL

38613

&& nt->is_builtin()

38614

&& nt->name() == Gogo::unpack_hidden_name(name))

38615

return true;

38616

@@ -4204,6 +4326,36 @@

38617

}

38618

}

38619

38620

+// Return whether this field is an unexported field named NAME.

38621

+

38622

+bool

38623

+Struct_field::is_unexported_field_name(Gogo* gogo,

38624

+ const std::string& name) const

38625

+{

38626

+ const std::string& field_name(this->field_name());

38627

+ if (Gogo::is_hidden_name(field_name)

38628

+ && name == Gogo::unpack_hidden_name(field_name)

38629

+ && gogo->pack_hidden_name(name, false) != field_name)

38630

+ return true;

38631

+

38632

+ // Check for the name of a builtin type. This is like the test in

38633

+ // is_field_name, only there we return false if this->is_imported_,

38634

+ // and here we return true.

38635

+ if (this->is_imported_ && this->is_anonymous())

38636

+ {

38637

+ Type* t = this->typed_identifier_.type();

38638

+ if (t->points_to() != NULL)

38639

+ t = t->points_to();

38640

+ Named_type* nt = t->named_type();

38641

+ if (nt != NULL

38642

+ && nt->is_builtin()

38643

+ && nt->name() == Gogo::unpack_hidden_name(name))

38644

+ return true;

38645

+ }

38646

+

38647

+ return false;

38648

+}

38649

+

38650

// Return whether this field is an embedded built-in type.

38651

38652

bool

38653

@@ -4264,13 +4416,8 @@

38654

++p)

38655

{

38656

Type* t = p->type();

38657

- if (t->is_undefined())

38658

+ if (p->is_anonymous())

38659

{

38660

- error_at(p->location(), "struct field type is incomplete");

38661

- p->set_type(Type::make_error_type());

38662

- }

38663

- else if (p->is_anonymous())

38664

- {

38665

if (t->named_type() != NULL && t->points_to() != NULL)

38666

{

38667

error_at(p->location(), "embedded type may not be a pointer");

38668

@@ -4641,13 +4788,8 @@

38669

for (Struct_field_list::const_iterator pf = fields->begin();

38670

pf != fields->end();

38671

++pf)

38672

- {

38673

- const std::string& field_name(pf->field_name());

38674

- if (Gogo::is_hidden_name(field_name)

38675

- && name == Gogo::unpack_hidden_name(field_name)

38676

- && gogo->pack_hidden_name(name, false) != field_name)

38677

- return true;

38678

- }

38679

+ if (pf->is_unexported_field_name(gogo, name))

38680

+ return true;

38681

}

38682

return false;

38683

}

38684

@@ -5250,6 +5392,7 @@

38685

Type* ftype = imp->read_type();

38686

38687

Struct_field sf(Typed_identifier(name, ftype, imp->location()));

38688

+ sf.set_is_imported();

38689

38690

if (imp->peek_char() == ' ')

38691

{

38692

@@ -9022,6 +9165,8 @@

38693

fntype->is_varargs(), location);

38694

gogo->finish_function(fntype->location());

38695

38696

+ if (type->named_type() == NULL && stub->is_function())

38697

+ stub->func_value()->set_is_unnamed_type_stub_method();

38698

if (m->nointerface() && stub->is_function())

38699

stub->func_value()->set_nointerface();

38700

}

38701

@@ -9289,7 +9434,9 @@

38702

else

38703

{

38704

bool is_unexported;

38705

- if (!Gogo::is_hidden_name(name))

38706

+ // The test for 'a' and 'z' is to handle builtin names,

38707

+ // which are not hidden.

38708

+ if (!Gogo::is_hidden_name(name) && (name[0] < 'a' || name[0] > 'z'))

38709

is_unexported = false;

38710

else

38711

{

38712

Index: gcc/go/gofrontend/expressions.cc

38713

===================================================================

38714

--- a/src/gcc/go/gofrontend/expressions.cc (.../tags/gcc_4_8_2_release)

38715

+++ b/src/gcc/go/gofrontend/expressions.cc (.../branches/gcc-4_8-branch)

38716

@@ -1219,7 +1219,7 @@

38717

38718

// Get the tree for the code of a function expression.

38719

38720

-tree

38721

+Bexpression*

38722

Func_expression::get_code_pointer(Gogo* gogo, Named_object* no, Location loc)

38723

{

38724

Function_type* fntype;

38725

@@ -1237,25 +1237,18 @@

38726

error_at(loc,

38727

"invalid use of special builtin function %qs; must be called",

38728

no->message_name().c_str());

38729

- return error_mark_node;

38730

+ return gogo->backend()->error_expression();

38731

}

38732

38733

- tree id = no->get_id(gogo);

38734

- if (id == error_mark_node)

38735

- return error_mark_node;

38736

-

38737

- tree fndecl;

38738

+ Bfunction* fndecl;

38739

if (no->is_function())

38740

- fndecl = no->func_value()->get_or_make_decl(gogo, no, id);

38741

+ fndecl = no->func_value()->get_or_make_decl(gogo, no);

38742

else if (no->is_function_declaration())

38743

- fndecl = no->func_declaration_value()->get_or_make_decl(gogo, no, id);

38744

+ fndecl = no->func_declaration_value()->get_or_make_decl(gogo, no);

38745

else

38746

go_unreachable();

38747

38748

- if (fndecl == error_mark_node)

38749

- return error_mark_node;

38750

-

38751

- return build_fold_addr_expr_loc(loc.gcc_location(), fndecl);

38752

+ return gogo->backend()->function_code_expression(fndecl, loc);

38753

}

38754

38755

// Get the tree for a function expression. This is used when we take

38756

@@ -1492,8 +1485,10 @@

38757

tree

38758

Func_code_reference_expression::do_get_tree(Translate_context* context)

38759

{

38760

- return Func_expression::get_code_pointer(context->gogo(), this->function_,

38761

- this->location());

38762

+ Bexpression* ret =

38763

+ Func_expression::get_code_pointer(context->gogo(), this->function_,

38764

+ this->location());

38765

+ return expr_to_tree(ret);

38766

}

38767

38768

// Make a reference to the code of a function.

38769

@@ -3055,8 +3050,7 @@

38770

do_lower(Gogo*, Named_object*, Statement_inserter*, int);

38771

38772

bool

38773

- do_is_constant() const

38774

- { return this->expr_->is_constant(); }

38775

+ do_is_constant() const;

38776

38777

bool

38778

do_numeric_constant_value(Numeric_constant*) const;

38779

@@ -3198,6 +3192,27 @@

38780

return this;

38781

}

38782

38783

+// Return whether a type conversion is a constant.

38784

+

38785

+bool

38786

+Type_conversion_expression::do_is_constant() const

38787

+{

38788

+ if (!this->expr_->is_constant())

38789

+ return false;

38790

+

38791

+ // A conversion to a type that may not be used as a constant is not

38792

+ // a constant. For example, []byte(nil).

38793

+ Type* type = this->type_;

38794

+ if (type->integer_type() == NULL

38795

+ && type->float_type() == NULL

38796

+ && type->complex_type() == NULL

38797

+ && !type->is_boolean_type()

38798

+ && !type->is_string_type())

38799

+ return false;

38800

+

38801

+ return true;

38802

+}

38803

+

38804

// Return the constant numeric value if there is one.

38805

38806

bool

38807

@@ -5586,6 +5601,15 @@

38808

subcontext.type = NULL;

38809

}

38810

38811

+ if (this->op_ == OPERATOR_ANDAND || this->op_ == OPERATOR_OROR)

38812

+ {

38813

+ // For a logical operation, the context does not determine the

38814

+ // types of the operands. The operands must be some boolean

38815

+ // type but if the context has a boolean type they do not

38816

+ // inherit it. See http://golang.org/issue/3924.

38817

+ subcontext.type = NULL;

38818

+ }

38819

+

38820

// Set the context for the left hand operand.

38821

if (is_shift_op)

38822

{

38823

@@ -5967,6 +5991,43 @@

38824

right);

38825

}

38826

38827

+ // For complex division Go wants slightly different results than the

38828

+ // GCC library provides, so we have our own runtime routine.

38829

+ if (this->op_ == OPERATOR_DIV && this->left_->type()->complex_type() != NULL)

38830

+ {

38831

+ const char *name;

38832

+ tree *pdecl;

38833

+ Type* ctype;

38834

+ static tree complex64_div_decl;

38835

+ static tree complex128_div_decl;

38836

+ switch (this->left_->type()->complex_type()->bits())

38837

+ {

38838

+ case 64:

38839

+ name = "__go_complex64_div";

38840

+ pdecl = &complex64_div_decl;

38841

+ ctype = Type::lookup_complex_type("complex64");

38842

+ break;

38843

+ case 128:

38844

+ name = "__go_complex128_div";

38845

+ pdecl = &complex128_div_decl;

38846

+ ctype = Type::lookup_complex_type("complex128");

38847

+ break;

38848

+ default:

38849

+ go_unreachable();

38850

+ }

38851

+ Btype* cbtype = ctype->get_backend(gogo);

38852

+ tree ctype_tree = type_to_tree(cbtype);

38853

+ return Gogo::call_builtin(pdecl,

38854

+ this->location(),

38855

+ name,

38856

+ 2,

38857

+ ctype_tree,

38858

+ ctype_tree,

38859

+ fold_convert_loc(gccloc, ctype_tree, left),

38860

+ type,

38861

+ fold_convert_loc(gccloc, ctype_tree, right));

38862

+ }

38863

+

38864

tree compute_type = excess_precision_type(type);

38865

if (compute_type != NULL_TREE)

38866

{

38867

@@ -7191,6 +7252,15 @@

38868

if (this->code_ == BUILTIN_OFFSETOF)

38869

{

38870

Expression* arg = this->one_arg();

38871

+

38872

+ if (arg->bound_method_expression() != NULL

38873

+ || arg->interface_field_reference_expression() != NULL)

38874

+ {

38875

+ this->report_error(_("invalid use of method value as argument "

38876

+ "of Offsetof"));

38877

+ return this;

38878

+ }

38879

+

38880

Field_reference_expression* farg = arg->field_reference_expression();

38881

while (farg != NULL)

38882

{

38883

@@ -7200,7 +7270,8 @@

38884

// it must not be reached through pointer indirections.

38885

if (farg->expr()->deref() != farg->expr())

38886

{

38887

- this->report_error(_("argument of Offsetof implies indirection of an embedded field"));

38888

+ this->report_error(_("argument of Offsetof implies "

38889

+ "indirection of an embedded field"));

38890

return this;

38891

}

38892

// Go up until we reach the original base.

38893

@@ -7476,7 +7547,7 @@

38894

switch (nc.to_unsigned_long(&v))

38895

{

38896

case Numeric_constant::NC_UL_VALID:

38897

- return true;

38898

+ break;

38899

case Numeric_constant::NC_UL_NOTINT:

38900

error_at(e->location(), "non-integer %s argument to make",

38901

is_length ? "len" : "cap");

38902

@@ -7488,8 +7559,23 @@

38903

case Numeric_constant::NC_UL_BIG:

38904

// We don't want to give a compile-time error for a 64-bit

38905

// value on a 32-bit target.

38906

- return true;

38907

+ break;

38908

}

38909

+

38910

+ mpz_t val;

38911

+ if (!nc.to_int(&val))

38912

+ go_unreachable();

38913

+ int bits = mpz_sizeinbase(val, 2);

38914

+ mpz_clear(val);

38915

+ Type* int_type = Type::lookup_integer_type("int");

38916

+ if (bits >= int_type->integer_type()->bits())

38917

+ {

38918

+ error_at(e->location(), "%s argument too large for make",

38919

+ is_length ? "len" : "cap");

38920

+ return false;

38921

+ }

38922

+

38923

+ return true;

38924

}

38925

38926

if (e->type()->integer_type() != NULL)

38927

@@ -7595,6 +7681,8 @@

38928

bool

38929

Builtin_call_expression::do_is_constant() const

38930

{

38931

+ if (this->is_error_expression())

38932

+ return true;

38933

switch (this->code_)

38934

{

38935

case BUILTIN_LEN:

38936

@@ -9744,15 +9832,9 @@

38937

}

38938

38939

tree fntype_tree = type_to_tree(fntype->get_backend(gogo));

38940

- if (fntype_tree == error_mark_node)

38941

+ tree fnfield_type = type_to_tree(fntype->get_backend_fntype(gogo));

38942

+ if (fntype_tree == error_mark_node || fnfield_type == error_mark_node)

38943

return error_mark_node;

38944

- go_assert(POINTER_TYPE_P(fntype_tree));

38945

- if (TREE_TYPE(fntype_tree) == error_mark_node)

38946

- return error_mark_node;

38947

- go_assert(TREE_CODE(TREE_TYPE(fntype_tree)) == RECORD_TYPE);

38948

- tree fnfield_type = TREE_TYPE(TYPE_FIELDS(TREE_TYPE(fntype_tree)));

38949

- if (fnfield_type == error_mark_node)

38950

- return error_mark_node;

38951

go_assert(FUNCTION_POINTER_TYPE_P(fnfield_type));

38952

tree rettype = TREE_TYPE(TREE_TYPE(fnfield_type));

38953

if (rettype == error_mark_node)

38954

@@ -9763,7 +9845,7 @@

38955

if (func != NULL)

38956

{

38957

Named_object* no = func->named_object();

38958

- fn = Func_expression::get_code_pointer(gogo, no, location);

38959

+ fn = expr_to_tree(Func_expression::get_code_pointer(gogo, no, location));

38960

if (!has_closure)

38961

closure_tree = NULL_TREE;

38962

else

38963

@@ -10817,11 +10899,20 @@

38964

void

38965

String_index_expression::do_check_types(Gogo*)

38966

{

38967

- if (this->start_->type()->integer_type() == NULL)

38968

+ Numeric_constant nc;

38969

+ unsigned long v;

38970

+ if (this->start_->type()->integer_type() == NULL

38971

+ && !this->start_->type()->is_error()

38972

+ && (!this->start_->numeric_constant_value(&nc)

38973

+ || nc.to_unsigned_long(&v) == Numeric_constant::NC_UL_NOTINT))

38974

this->report_error(_("index must be integer"));

38975

if (this->end_ != NULL

38976

&& this->end_->type()->integer_type() == NULL

38977

- && !this->end_->is_nil_expression())

38978

+ && !this->end_->type()->is_error()

38979

+ && !this->end_->is_nil_expression()

38980

+ && !this->end_->is_error_expression()

38981

+ && (!this->end_->numeric_constant_value(&nc)

38982

+ || nc.to_unsigned_long(&v) == Numeric_constant::NC_UL_NOTINT))

38983

this->report_error(_("slice end must be integer"));

38984

38985

std::string sval;

38986

Index: gcc/recog.c

38987

===================================================================

38988

--- a/src/gcc/recog.c (.../tags/gcc_4_8_2_release)

38989

+++ b/src/gcc/recog.c (.../branches/gcc-4_8-branch)

38990

@@ -3061,6 +3061,9 @@

38991

return 1;

38992

}

38993

38994

+/* Regno offset to be used in the register search. */

38995

+static int search_ofs;

38996

+

38997

/* Try to find a hard register of mode MODE, matching the register class in

38998

CLASS_STR, which is available at the beginning of insn CURRENT_INSN and

38999

remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,

39000

@@ -3076,7 +3079,6 @@

39001

peep2_find_free_register (int from, int to, const char *class_str,

39002

enum machine_mode mode, HARD_REG_SET *reg_set)

39003

{

39004

- static int search_ofs;

39005

enum reg_class cl;

39006

HARD_REG_SET live;

39007

df_ref *def_rec;

39008

@@ -3541,6 +3543,7 @@

39009

/* Initialize the regsets we're going to use. */

39010

for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)

39011

peep2_insn_data[i].live_before = BITMAP_ALLOC (&reg_obstack);

39012

+ search_ofs = 0;

39013

live = BITMAP_ALLOC (&reg_obstack);

39014

39015

FOR_EACH_BB_REVERSE (bb)

39016

Index: gcc/ada/system-linux-s390x.ads

39017

===================================================================

39018

--- a/src/gcc/ada/system-linux-s390x.ads (.../tags/gcc_4_8_2_release)

39019

+++ b/src/gcc/ada/system-linux-s390x.ads (.../branches/gcc-4_8-branch)

39020

@@ -7,7 +7,7 @@

39021

-- S p e c --

39022

-- (GNU-Linux/s390x Version) --

39023

-- --

39024

39025

39026

-- --

39027

-- This specification is derived from the Ada Reference Manual for use with --

39028

-- GNAT. The copyright notice above, and the license provisions that follow --

39029

@@ -35,9 +35,10 @@

39030

------------------------------------------------------------------------------

39031

39032

package System is

39033

-pragma Pure (System);

39034

--- Note that we take advantage of the implementation permission to

39035

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

39036

+ pragma Pure;

39037

+ -- Note that we take advantage of the implementation permission to make

39038

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

39039

+ -- 2005, this is Pure in any case (AI-362).

39040

39041

type Name is (SYSTEM_NAME_GNAT);

39042

System_Name : constant Name := SYSTEM_NAME_GNAT;

39043

@@ -61,6 +62,7 @@

39044

-- Storage-related Declarations

39045

39046

type Address is private;

39047

+ pragma Preelaborable_Initialization (Address);

39048

Null_Address : constant Address;

39049

39050

Storage_Unit : constant := 8;

39051

Index: gcc/ada/system-linux-alpha.ads

39052

===================================================================

39053

--- a/src/gcc/ada/system-linux-alpha.ads (.../tags/gcc_4_8_2_release)

39054

+++ b/src/gcc/ada/system-linux-alpha.ads (.../branches/gcc-4_8-branch)

39055

@@ -7,7 +7,7 @@

39056

-- S p e c --

39057

-- (GNU-Linux/alpha Version) --

39058

-- --

39059

39060

39061

-- --

39062

-- This specification is derived from the Ada Reference Manual for use with --

39063

-- GNAT. The copyright notice above, and the license provisions that follow --

39064

@@ -35,9 +35,10 @@

39065

------------------------------------------------------------------------------

39066

39067

package System is

39068

-pragma Pure (System);

39069

--- Note that we take advantage of the implementation permission to

39070

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

39071

+ pragma Pure;

39072

+ -- Note that we take advantage of the implementation permission to make

39073

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

39074

+ -- 2005, this is Pure in any case (AI-362).

39075

39076

type Name is (SYSTEM_NAME_GNAT);

39077

System_Name : constant Name := SYSTEM_NAME_GNAT;

39078

@@ -61,6 +62,7 @@

39079

-- Storage-related Declarations

39080

39081

type Address is private;

39082

+ pragma Preelaborable_Initialization (Address);

39083

Null_Address : constant Address;

39084

39085

Storage_Unit : constant := 8;

39086

Index: gcc/ada/system-vxworks-arm.ads

39087

===================================================================

39088

--- a/src/gcc/ada/system-vxworks-arm.ads (.../tags/gcc_4_8_2_release)

39089

+++ b/src/gcc/ada/system-vxworks-arm.ads (.../branches/gcc-4_8-branch)

39090

@@ -7,7 +7,7 @@

39091

-- S p e c --

39092

-- (VxWorks Version ARM) --

39093

-- --

39094

39095

39096

-- --

39097

-- This specification is derived from the Ada Reference Manual for use with --

39098

-- GNAT. The copyright notice above, and the license provisions that follow --

39099

@@ -35,10 +35,10 @@

39100

------------------------------------------------------------------------------

39101

39102

package System is

39103

-pragma Pure (System);

39104

--- Note that we take advantage of the implementation permission to make this

39105

--- unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada 2005, this is

39106

--- Pure in any case (AI-362).

39107

+ pragma Pure;

39108

+ -- Note that we take advantage of the implementation permission to make

39109

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

39110

+ -- 2005, this is Pure in any case (AI-362).

39111

39112

type Name is (SYSTEM_NAME_GNAT);

39113

System_Name : constant Name := SYSTEM_NAME_GNAT;

39114

Index: gcc/ada/system-linux-s390.ads

39115

===================================================================

39116

--- a/src/gcc/ada/system-linux-s390.ads (.../tags/gcc_4_8_2_release)

39117

+++ b/src/gcc/ada/system-linux-s390.ads (.../branches/gcc-4_8-branch)

39118

@@ -7,7 +7,7 @@

39119

-- S p e c --

39120

-- (GNU-Linux/s390 Version) --

39121

-- --

39122

39123

39124

-- --

39125

-- This specification is derived from the Ada Reference Manual for use with --

39126

-- GNAT. The copyright notice above, and the license provisions that follow --

39127

@@ -35,9 +35,10 @@

39128

------------------------------------------------------------------------------

39129

39130

package System is

39131

-pragma Pure (System);

39132

--- Note that we take advantage of the implementation permission to

39133

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

39134

+ pragma Pure;

39135

+ -- Note that we take advantage of the implementation permission to make

39136

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

39137

+ -- 2005, this is Pure in any case (AI-362).

39138

39139

type Name is (SYSTEM_NAME_GNAT);

39140

System_Name : constant Name := SYSTEM_NAME_GNAT;

39141

@@ -61,6 +62,7 @@

39142

-- Storage-related Declarations

39143

39144

type Address is private;

39145

+ pragma Preelaborable_Initialization (Address);

39146

Null_Address : constant Address;

39147

39148

Storage_Unit : constant := 8;

39149

Index: gcc/ada/indepsw-darwin.adb

39150

===================================================================

39151

--- a/src/gcc/ada/indepsw-darwin.adb (.../tags/gcc_4_8_2_release)

39152

+++ b/src/gcc/ada/indepsw-darwin.adb (.../branches/gcc-4_8-branch)

39153

@@ -0,0 +1,67 @@

39154

+------------------------------------------------------------------------------

39155

+-- --

39156

+-- GNAT COMPILER COMPONENTS --

39157

+-- --

39158

+-- I N D E P S W --

39159

+-- --

39160

+-- B o d y --

39161

+-- (Darwin version) --

39162

+-- --

39163

39164

+-- --

39165

+-- GNAT is free software; you can redistribute it and/or modify it under --

39166

+-- terms of the GNU General Public License as published by the Free Soft- --

39167

+-- ware Foundation; either version 3, or (at your option) any later ver- --

39168

+-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --

39169

+-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --

39170

+-- or FITNESS FOR A PARTICULAR PURPOSE. --

39171

+-- --

39172

+-- As a special exception under Section 7 of GPL version 3, you are granted --

39173

+-- additional permissions described in the GCC Runtime Library Exception, --

39174

+-- version 3.1, as published by the Free Software Foundation. --

39175

+-- --

39176

+-- You should have received a copy of the GNU General Public License and --

39177

+-- a copy of the GCC Runtime Library Exception along with this program; --

39178

+-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see --

39179

+-- <http://www.gnu.org/licenses/>. --

39180

+-- --

39181

+-- GNAT was originally developed by the GNAT team at New York University. --

39182

+-- Extensive contributions were provided by Ada Core Technologies Inc. --

39183

+-- --

39184

+------------------------------------------------------------------------------

39185

+

39186

+-- This is the Darwin version

39187

+

39188

+package body Indepsw is

39189

+

39190

+ Map_Switch : aliased constant String := "-Wl,-map,";

39191

+

39192

+ -------------

39193

+ -- Convert --

39194

+ -------------

39195

+

39196

+ procedure Convert

39197

+ (Switch : Switch_Kind;

39198

+ Argument : String;

39199

+ To : out String_List_Access)

39200

+ is

39201

+ begin

39202

+ case Switch is

39203

+ when Map_File =>

39204

+ To := new Argument_List'(1 => new String'(Map_Switch & Argument));

39205

+ end case;

39206

+ end Convert;

39207

+

39208

+ ------------------

39209

+ -- Is_Supported --

39210

+ ------------------

39211

+

39212

+ function Is_Supported (Switch : Switch_Kind) return Boolean is

39213

+ begin

39214

+ case Switch is

39215

+ when Map_File =>

39216

+ return True;

39217

+ end case;

39218

+ end Is_Supported;

39219

+

39220

+end Indepsw;

39221

Index: gcc/ada/system-linux-sparcv9.ads

39222

===================================================================

39223

--- a/src/gcc/ada/system-linux-sparcv9.ads (.../tags/gcc_4_8_2_release)

39224

+++ b/src/gcc/ada/system-linux-sparcv9.ads (.../branches/gcc-4_8-branch)

39225

@@ -7,7 +7,7 @@

39226

-- S p e c --

39227

-- (GNU/Linux-SPARCV9 Version) --

39228

-- --

39229

39230

39231

-- --

39232

-- This specification is derived from the Ada Reference Manual for use with --

39233

-- GNAT. The copyright notice above, and the license provisions that follow --

39234

@@ -35,9 +35,10 @@

39235

------------------------------------------------------------------------------

39236

39237

package System is

39238

-pragma Pure (System);

39239

--- Note that we take advantage of the implementation permission to

39240

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

39241

+ pragma Pure;

39242

+ -- Note that we take advantage of the implementation permission to make

39243

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

39244

+ -- 2005, this is Pure in any case (AI-362).

39245

39246

type Name is (SYSTEM_NAME_GNAT);

39247

System_Name : constant Name := SYSTEM_NAME_GNAT;

39248

@@ -61,6 +62,7 @@

39249

-- Storage-related Declarations

39250

39251

type Address is private;

39252

+ pragma Preelaborable_Initialization (Address);

39253

Null_Address : constant Address;

39254

39255

Storage_Unit : constant := 8;

39256

Index: gcc/ada/ChangeLog

39257

===================================================================

39258

--- a/src/gcc/ada/ChangeLog (.../tags/gcc_4_8_2_release)

39259

+++ b/src/gcc/ada/ChangeLog (.../branches/gcc-4_8-branch)

39260

@@ -1,3 +1,60 @@

39261

+2014-03-30 Eric Botcazou <ebotcazou@adacore.com>

39262

+

39263

+ PR ada/60703

39264

+ * system-linux-alpha.ads: Adjust for Ada 2005.

39265

+ * system-linux-mips.ads: Likewise.

39266

+ * system-linux-mips64el.ads: Likewise.

39267

+ * system-linux-mipsel.ads: Likewise.

39268

+ * system-linux-s390.ads: Likewise.

39269

+ * system-linux-s390x.ads: Likewise.

39270

+ * system-linux-sparc.ads: Likewise.

39271

+ * system-linux-sparcv9.ads: Likewise.

39272

+ * system-rtems.ads: Likewise.

39273

+ * system-vxworks-arm.ads: Likewise.

39274

+

39275

+2014-03-13 Eric Botcazou <ebotcazou@adacore.com>

39276

+

39277

+ PR ada/51483

39278

+ * back_end.ads (Register_Type_Proc): Add 'precision' parameter.

39279

+ * cstand.adb (Register_Float_Type): Add 'precision' parameter and use

39280

+ it to set the RM size. Use directly 'size' for the Esize.

39281

+ * gcc-interface/gigi.h (enumerate_modes): Add integer parameter.

39282

+ * gcc-interface/misc.c (enumerate_modes): Likewise. Do not register

39283

+ types for vector modes, pass the size in addition to the precision.

39284

+

39285

+2014-01-12 Eric Botcazou <ebotcazou@adacore.com>

39286

+

39287

+ PR ada/59772

39288

+ * gcc-interface/cuintp.c (build_cst_from_int): Use 32-bit integer type

39289

+ as intermediate type.

39290

+ (UI_To_gnu): Likewise.

39291

+

39292

+2013-12-12 Eric Botcazou <ebotcazou@adacore.com>

39293

+ Iain Sandoe <iain@codesourcery.com>

39294

+

39295

+ PR ada/55946

39296

+ * gcc-interface/Make-lang.in (ada/doctools/xgnatugn): Use gnatmake.

39297

+ * gcc-interface/Makefile.in (GCC_LINK): Add LDFLAGS.

39298

+ (../../gnatmake): Remove LDFLAGS.

39299

+ (../../gnatlink): Likewise.

39300

+

39301

+2013-12-04 Eric Botcazou <ebotcazou@adacore.com>

39302

+

39303

+ PR ada/59382

39304

+ * indepsw-darwin.adb: New file.

39305

+

39306

+2013-10-19 Eric Botcazou <ebotcazou@adacore.com>

39307

+

39308

+ * gcc-interface/utils.c (scale_by_factor_of): New function.

39309

+ (rest_of_record_type_compilation): Use scale_by_factor_of in order to

39310

+ scale the original offset for both rounding cases; in the second case,

39311

+ take into accout the addend to compute the alignment. Tidy up.

39312

+

39313

+2013-10-19 Eric Botcazou <ebotcazou@adacore.com>

39314

+

39315

+ * gcc-interface/utils.c (gnat_set_type_context): New function.

39316

+ (gnat_pushdecl): Use it to set the context of the type.

39317

+

39318

2013-10-16 Release Manager

39319

39320

* GCC 4.8.2 released.

39321

Index: gcc/ada/cstand.adb

39322

===================================================================

39323

--- a/src/gcc/ada/cstand.adb (.../tags/gcc_4_8_2_release)

39324

+++ b/src/gcc/ada/cstand.adb (.../branches/gcc-4_8-branch)

39325

@@ -151,6 +151,7 @@

39326

Complex : Boolean; -- True iff type has real and imaginary parts

39327

Count : Natural; -- Number of elements in vector, 0 otherwise

39328

Float_Rep : Float_Rep_Kind; -- Representation used for fpt type

39329

+ Precision : Positive; -- Precision of representation in bits

39330

Size : Positive; -- Size of representation in bits

39331

Alignment : Natural); -- Required alignment in bits

39332

pragma Convention (C, Register_Float_Type);

39333

@@ -2014,6 +2015,7 @@

39334

Complex : Boolean;

39335

Count : Natural;

39336

Float_Rep : Float_Rep_Kind;

39337

+ Precision : Positive;

39338

Size : Positive;

39339

Alignment : Natural)

39340

is

39341

@@ -2063,14 +2065,25 @@

39342

39343

else

39344

Write_Str ("mod 2**");

39345

- Write_Int (Int (Size / Positive'Max (1, Count)));

39346

+ Write_Int (Int (Precision / Positive'Max (1, Count)));

39347

Write_Line (";");

39348

end if;

39349

39350

- Write_Str ("for " & T & "'Size use ");

39351

- Write_Int (Int (Size));

39352

- Write_Line (";");

39353

+ if Precision = Size then

39354

+ Write_Str ("for " & T (1 .. Last) & "'Size use ");

39355

+ Write_Int (Int (Size));

39356

+ Write_Line (";");

39357

39358

+ else

39359

+ Write_Str ("for " & T (1 .. Last) & "'Value_Size use ");

39360

+ Write_Int (Int (Precision));

39361

+ Write_Line (";");

39362

+

39363

+ Write_Str ("for " & T (1 .. Last) & "'Object_Size use ");

39364

+ Write_Int (Int (Size));

39365

+ Write_Line (";");

39366

+ end if;

39367

+

39368

Write_Str ("for " & T & "'Alignment use ");

39369

Write_Int (Int (Alignment / 8));

39370

Write_Line (";");

39371

@@ -2092,15 +2105,13 @@

39372

if Digs > 0 and then not Complex and then Count = 0 then

39373

declare

39374

Ent : constant Entity_Id := New_Standard_Entity;

39375

- Esize : constant Pos := Pos ((Size + Alignment - 1)

39376

- / Alignment * Alignment);

39377

begin

39378

Set_Defining_Identifier

39379

(New_Node (N_Full_Type_Declaration, Stloc), Ent);

39380

Make_Name (Ent, T (1 .. Last));

39381

Set_Scope (Ent, Standard_Standard);

39382

- Build_Float_Type (Ent, Esize, Float_Rep, Pos (Digs));

39383

- Set_RM_Size (Ent, UI_From_Int (Int (Size)));

39384

+ Build_Float_Type (Ent, Int (Size), Float_Rep, Pos (Digs));

39385

+ Set_RM_Size (Ent, UI_From_Int (Int (Precision)));

39386

Set_Alignment (Ent, UI_From_Int (Int (Alignment / 8)));

39387

39388

if No (Back_End_Float_Types) then

39389

Index: gcc/ada/back_end.ads

39390

===================================================================

39391

--- a/src/gcc/ada/back_end.ads (.../tags/gcc_4_8_2_release)

39392

+++ b/src/gcc/ada/back_end.ads (.../branches/gcc-4_8-branch)

39393

@@ -55,6 +55,7 @@

39394

Complex : Boolean; -- True iff type has real and imaginary parts

39395

Count : Natural; -- Number of elements in vector, 0 otherwise

39396

Float_Rep : Float_Rep_Kind; -- Representation used for fpt type

39397

+ Precision : Positive; -- Precision of representation in bits

39398

Size : Positive; -- Size of representation in bits

39399

Alignment : Natural); -- Required alignment in bits

39400

pragma Convention (C, Register_Type_Proc);

39401

Index: gcc/ada/system-linux-mipsel.ads

39402

===================================================================

39403

--- a/src/gcc/ada/system-linux-mipsel.ads (.../tags/gcc_4_8_2_release)

39404

+++ b/src/gcc/ada/system-linux-mipsel.ads (.../branches/gcc-4_8-branch)

39405

@@ -7,7 +7,7 @@

39406

-- S p e c --

39407

-- (GNU-Linux/MIPSEL Version) --

39408

-- --

39409

39410

39411

-- --

39412

-- This specification is derived from the Ada Reference Manual for use with --

39413

-- GNAT. The copyright notice above, and the license provisions that follow --

39414

@@ -62,6 +62,7 @@

39415

-- Storage-related Declarations

39416

39417

type Address is private;

39418

+ pragma Preelaborable_Initialization (Address);

39419

Null_Address : constant Address;

39420

39421

Storage_Unit : constant := 8;

39422

Index: gcc/ada/system-linux-mips.ads

39423

===================================================================

39424

--- a/src/gcc/ada/system-linux-mips.ads (.../tags/gcc_4_8_2_release)

39425

+++ b/src/gcc/ada/system-linux-mips.ads (.../branches/gcc-4_8-branch)

39426

@@ -7,7 +7,7 @@

39427

-- S p e c --

39428

-- (GNU-Linux/MIPS Version) --

39429

-- --

39430

39431

39432

-- --

39433

-- This specification is derived from the Ada Reference Manual for use with --

39434

-- GNAT. The copyright notice above, and the license provisions that follow --

39435

@@ -62,6 +62,7 @@

39436

-- Storage-related Declarations

39437

39438

type Address is private;

39439

+ pragma Preelaborable_Initialization (Address);

39440

Null_Address : constant Address;

39441

39442

Storage_Unit : constant := 8;

39443

Index: gcc/ada/system-linux-mips64el.ads

39444

===================================================================

39445

--- a/src/gcc/ada/system-linux-mips64el.ads (.../tags/gcc_4_8_2_release)

39446

+++ b/src/gcc/ada/system-linux-mips64el.ads (.../branches/gcc-4_8-branch)

39447

@@ -7,7 +7,7 @@

39448

-- S p e c --

39449

-- (GNU-Linux/MIPS64EL Version) --

39450

-- --

39451

39452

39453

-- --

39454

-- This specification is derived from the Ada Reference Manual for use with --

39455

-- GNAT. The copyright notice above, and the license provisions that follow --

39456

@@ -62,6 +62,7 @@

39457

-- Storage-related Declarations

39458

39459

type Address is private;

39460

+ pragma Preelaborable_Initialization (Address);

39461

Null_Address : constant Address;

39462

39463

Storage_Unit : constant := 8;

39464

Index: gcc/ada/gcc-interface/utils.c

39465

===================================================================

39466

--- a/src/gcc/ada/gcc-interface/utils.c (.../tags/gcc_4_8_2_release)

39467

+++ b/src/gcc/ada/gcc-interface/utils.c (.../branches/gcc-4_8-branch)

39468

@@ -232,6 +232,7 @@

39469

static tree split_plus (tree, tree *);

39470

static tree float_type_for_precision (int, enum machine_mode);

39471

static tree convert_to_fat_pointer (tree, tree);

39472

+static unsigned int scale_by_factor_of (tree, unsigned int);

39473

static bool potential_alignment_gap (tree, tree, tree);

39474

static void process_attributes (tree, struct attrib *);

39475

39476

@@ -532,6 +533,22 @@

39477

free_binding_level = level;

39478

}

39479

39480

+/* Set the context of TYPE and its parallel types (if any) to CONTEXT. */

39481

+

39482

+static void

39483

+gnat_set_type_context (tree type, tree context)

39484

+{

39485

+ tree decl = TYPE_STUB_DECL (type);

39486

+

39487

+ TYPE_CONTEXT (type) = context;

39488

+

39489

+ while (decl && DECL_PARALLEL_TYPE (decl))

39490

+ {

39491

+ TYPE_CONTEXT (DECL_PARALLEL_TYPE (decl)) = context;

39492

+ decl = TYPE_STUB_DECL (DECL_PARALLEL_TYPE (decl));

39493

+ }

39494

+}

39495

+

39496

/* Record DECL as belonging to the current lexical scope and use GNAT_NODE

39497

for location information and flag propagation. */

39498

39499

@@ -613,7 +630,7 @@

39500

if (TREE_CODE (t) == POINTER_TYPE)

39501

TYPE_NEXT_PTR_TO (t) = tt;

39502

TYPE_NAME (tt) = DECL_NAME (decl);

39503

- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl);

39504

+ gnat_set_type_context (tt, DECL_CONTEXT (decl));

39505

TYPE_STUB_DECL (tt) = TYPE_STUB_DECL (t);

39506

DECL_ORIGINAL_TYPE (decl) = tt;

39507

}

39508

@@ -623,7 +640,7 @@

39509

/* We need a variant for the placeholder machinery to work. */

39510

tree tt = build_variant_type_copy (t);

39511

TYPE_NAME (tt) = decl;

39512

- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl);

39513

+ gnat_set_type_context (tt, DECL_CONTEXT (decl));

39514

TREE_USED (tt) = TREE_USED (t);

39515

TREE_TYPE (decl) = tt;

39516

if (DECL_ORIGINAL_TYPE (TYPE_NAME (t)))

39517

@@ -645,7 +662,7 @@

39518

if (!(TYPE_NAME (t) && TREE_CODE (TYPE_NAME (t)) == TYPE_DECL))

39519

{

39520

TYPE_NAME (t) = decl;

39521

- TYPE_CONTEXT (t) = DECL_CONTEXT (decl);

39522

+ gnat_set_type_context (t, DECL_CONTEXT (decl));

39523

}

39524

}

39525

}

39526

@@ -1692,93 +1709,74 @@

39527

TYPE_SIZE_UNIT (new_record_type)

39528

= size_int (TYPE_ALIGN (record_type) / BITS_PER_UNIT);

39529

39530

- /* Now scan all the fields, replacing each field with a new

39531

- field corresponding to the new encoding. */

39532

+ /* Now scan all the fields, replacing each field with a new field

39533

+ corresponding to the new encoding. */

39534

for (old_field = TYPE_FIELDS (record_type); old_field;

39535

old_field = DECL_CHAIN (old_field))

39536

{

39537

tree field_type = TREE_TYPE (old_field);

39538

tree field_name = DECL_NAME (old_field);

39539

- tree new_field;

39540

tree curpos = bit_position (old_field);

39541

+ tree pos, new_field;

39542

bool var = false;

39543

unsigned int align = 0;

39544

- tree pos;

39545

39546

+ /* We're going to do some pattern matching below so remove as many

39547

+ conversions as possible. */

39548

+ curpos = remove_conversions (curpos, true);

39549

+

39550

/* See how the position was modified from the last position.

39551

39552

- There are two basic cases we support: a value was added

39553

- to the last position or the last position was rounded to

39554

- a boundary and they something was added. Check for the

39555

- first case first. If not, see if there is any evidence

39556

- of rounding. If so, round the last position and try

39557

- again.

39558

+ There are two basic cases we support: a value was added

39559

+ to the last position or the last position was rounded to

39560

+ a boundary and they something was added. Check for the

39561

+ first case first. If not, see if there is any evidence

39562

+ of rounding. If so, round the last position and retry.

39563

39564

- If this is a union, the position can be taken as zero. */

39565

-

39566

- /* Some computations depend on the shape of the position expression,

39567

- so strip conversions to make sure it's exposed. */

39568

- curpos = remove_conversions (curpos, true);

39569

-

39570

+ If this is a union, the position can be taken as zero. */

39571

if (TREE_CODE (new_record_type) == UNION_TYPE)

39572

- pos = bitsize_zero_node, align = 0;

39573

+ pos = bitsize_zero_node;

39574

else

39575

pos = compute_related_constant (curpos, last_pos);

39576

39577

- if (!pos && TREE_CODE (curpos) == MULT_EXPR

39578

+ if (!pos

39579

+ && TREE_CODE (curpos) == MULT_EXPR

39580

&& host_integerp (TREE_OPERAND (curpos, 1), 1))

39581

{

39582

tree offset = TREE_OPERAND (curpos, 0);

39583

align = tree_low_cst (TREE_OPERAND (curpos, 1), 1);

39584

-

39585

- /* An offset which is a bitwise AND with a mask increases the

39586

- alignment according to the number of trailing zeros. */

39587

- offset = remove_conversions (offset, true);

39588

- if (TREE_CODE (offset) == BIT_AND_EXPR

39589

- && TREE_CODE (TREE_OPERAND (offset, 1)) == INTEGER_CST)

39590

- {

39591

- unsigned HOST_WIDE_INT mask

39592

- = TREE_INT_CST_LOW (TREE_OPERAND (offset, 1));

39593

- unsigned int i;

39594

-

39595

- for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)

39596

- {

39597

- if (mask & 1)

39598

- break;

39599

- mask >>= 1;

39600

- align *= 2;

39601

- }

39602

- }

39603

-

39604

- pos = compute_related_constant (curpos,

39605

- round_up (last_pos, align));

39606

+ align = scale_by_factor_of (offset, align);

39607

+ last_pos = round_up (last_pos, align);

39608

+ pos = compute_related_constant (curpos, last_pos);

39609

}

39610

- else if (!pos && TREE_CODE (curpos) == PLUS_EXPR

39611

- && TREE_CODE (TREE_OPERAND (curpos, 1)) == INTEGER_CST

39612

+ else if (!pos

39613

+ && TREE_CODE (curpos) == PLUS_EXPR

39614

+ && host_integerp (TREE_OPERAND (curpos, 1), 1)

39615

&& TREE_CODE (TREE_OPERAND (curpos, 0)) == MULT_EXPR

39616

- && host_integerp (TREE_OPERAND

39617

- (TREE_OPERAND (curpos, 0), 1),

39618

- 1))

39619

+ && host_integerp

39620

+ (TREE_OPERAND (TREE_OPERAND (curpos, 0), 1), 1))

39621

{

39622

+ tree offset = TREE_OPERAND (TREE_OPERAND (curpos, 0), 0);

39623

+ unsigned HOST_WIDE_INT addend

39624

+ = tree_low_cst (TREE_OPERAND (curpos, 1), 1);

39625

align

39626

- = tree_low_cst

39627

- (TREE_OPERAND (TREE_OPERAND (curpos, 0), 1), 1);

39628

- pos = compute_related_constant (curpos,

39629

- round_up (last_pos, align));

39630

+ = tree_low_cst (TREE_OPERAND (TREE_OPERAND (curpos, 0), 1), 1);

39631

+ align = scale_by_factor_of (offset, align);

39632

+ align = MIN (align, addend & -addend);

39633

+ last_pos = round_up (last_pos, align);

39634

+ pos = compute_related_constant (curpos, last_pos);

39635

}

39636

- else if (potential_alignment_gap (prev_old_field, old_field,

39637

- pos))

39638

+ else if (potential_alignment_gap (prev_old_field, old_field, pos))

39639

{

39640

align = TYPE_ALIGN (field_type);

39641

- pos = compute_related_constant (curpos,

39642

- round_up (last_pos, align));

39643

+ last_pos = round_up (last_pos, align);

39644

+ pos = compute_related_constant (curpos, last_pos);

39645

}

39646

39647

/* If we can't compute a position, set it to zero.

39648

39649

- ??? We really should abort here, but it's too much work

39650

- to get this correct for all cases. */

39651

-

39652

+ ??? We really should abort here, but it's too much work

39653

+ to get this correct for all cases. */

39654

if (!pos)

39655

pos = bitsize_zero_node;

39656

39657

@@ -2553,6 +2551,32 @@

39658

return false;

39659

}

39660

39661

+/* Return VALUE scaled by the biggest power-of-2 factor of EXPR. */

39662

+

39663

+static unsigned int

39664

+scale_by_factor_of (tree expr, unsigned int value)

39665

+{

39666

+ expr = remove_conversions (expr, true);

39667

+

39668

+ /* An expression which is a bitwise AND with a mask has a power-of-2 factor

39669

+ corresponding to the number of trailing zeros of the mask. */

39670

+ if (TREE_CODE (expr) == BIT_AND_EXPR

39671

+ && TREE_CODE (TREE_OPERAND (expr, 1)) == INTEGER_CST)

39672

+ {

39673

+ unsigned HOST_WIDE_INT mask = TREE_INT_CST_LOW (TREE_OPERAND (expr, 1));

39674

+ unsigned int i = 0;

39675

+

39676

+ while ((mask & 1) == 0 && i < HOST_BITS_PER_WIDE_INT)

39677

+ {

39678

+ mask >>= 1;

39679

+ value *= 2;

39680

+ i++;

39681

+ }

39682

+ }

39683

+

39684

+ return value;

39685

+}

39686

+

39687

/* Given two consecutive field decls PREV_FIELD and CURR_FIELD, return true

39688

unless we can prove these 2 fields are laid out in such a way that no gap

39689

exist between the end of PREV_FIELD and the beginning of CURR_FIELD. OFFSET

39690

Index: gcc/ada/gcc-interface/Makefile.in

39691

===================================================================

39692

--- a/src/gcc/ada/gcc-interface/Makefile.in (.../tags/gcc_4_8_2_release)

39693

+++ b/src/gcc/ada/gcc-interface/Makefile.in (.../branches/gcc-4_8-branch)

39694

@@ -2397,7 +2397,7 @@

39695

"GNATLINK=$(GNATLINK)" \

39696

"GNATBIND=$(GNATBIND)"

39697

39698

-GCC_LINK=$(CC) $(GCC_LINK_FLAGS) $(ADA_INCLUDES)

39699

+GCC_LINK=$(CC) $(GCC_LINK_FLAGS) $(ADA_INCLUDES) $(LDFLAGS)

39700

39701

# Build directory for the tools. Let's copy the target-dependent

39702

# sources using the same mechanism as for gnatlib. The other sources are

39703

@@ -2519,12 +2519,10 @@

39704

39705

# Likewise for the tools

39706

../../gnatmake$(exeext): $(P) b_gnatm.o link.o targext.o $(GNATMAKE_OBJS)

39707

- $(GCC_LINK) $(ALL_CFLAGS) $(LDFLAGS) -o $@ b_gnatm.o $(GNATMAKE_OBJS) \

39708

- $(TOOLS_LIBS)

39709

+ +$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatm.o $(GNATMAKE_OBJS) $(TOOLS_LIBS)

39710

39711

../../gnatlink$(exeext): $(P) b_gnatl.o link.o targext.o $(GNATLINK_OBJS)

39712

- $(GCC_LINK) $(ALL_CFLAGS) $(LDFLAGS) -o $@ b_gnatl.o $(GNATLINK_OBJS) \

39713

- $(TOOLS_LIBS)

39714

+ +$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatl.o $(GNATLINK_OBJS) $(TOOLS_LIBS)

39715

39716

../stamp-gnatlib-$(RTSDIR):

39717

@if [ ! -f stamp-gnatlib-$(RTSDIR) ] ; \

39718

Index: gcc/ada/gcc-interface/cuintp.c

39719

===================================================================

39720

--- a/src/gcc/ada/gcc-interface/cuintp.c (.../tags/gcc_4_8_2_release)

39721

+++ b/src/gcc/ada/gcc-interface/cuintp.c (.../branches/gcc-4_8-branch)

39722

@@ -6,7 +6,7 @@

39723

* *

39724

* C Implementation File *

39725

* *

39726

39727

39728

* *

39729

* GNAT is free software; you can redistribute it and/or modify it under *

39730

* terms of the GNU General Public License as published by the Free Soft- *

39731

@@ -59,8 +59,8 @@

39732

static tree

39733

build_cst_from_int (tree type, HOST_WIDE_INT low)

39734

{

39735

- if (TREE_CODE (type) == REAL_TYPE)

39736

- return convert (type, build_int_cst (NULL_TREE, low));

39737

+ if (SCALAR_FLOAT_TYPE_P (type))

39738

+ return convert (type, build_int_cst (gnat_type_for_size (32, 0), low));

39739

else

39740

return build_int_cst_type (type, low);

39741

}

39742

@@ -99,20 +99,13 @@

39743

gcc_assert (Length > 0);

39744

39745

/* The computations we perform below always require a type at least as

39746

- large as an integer not to overflow. REAL types are always fine, but

39747

+ large as an integer not to overflow. FP types are always fine, but

39748

INTEGER or ENUMERAL types we are handed may be too short. We use a

39749

base integer type node for the computations in this case and will

39750

- convert the final result back to the incoming type later on.

39751

- The base integer precision must be superior than 16. */

39752

+ convert the final result back to the incoming type later on. */

39753

+ if (!SCALAR_FLOAT_TYPE_P (comp_type) && TYPE_PRECISION (comp_type) < 32)

39754

+ comp_type = gnat_type_for_size (32, 0);

39755

39756

- if (TREE_CODE (comp_type) != REAL_TYPE

39757

- && TYPE_PRECISION (comp_type)

39758

- < TYPE_PRECISION (long_integer_type_node))

39759

- {

39760

- comp_type = long_integer_type_node;

39761

- gcc_assert (TYPE_PRECISION (comp_type) > 16);

39762

- }

39763

-

39764

gnu_base = build_cst_from_int (comp_type, Base);

39765

39766

gnu_ret = build_cst_from_int (comp_type, First);

39767

Index: gcc/ada/gcc-interface/Make-lang.in

39768

===================================================================

39769

--- a/src/gcc/ada/gcc-interface/Make-lang.in (.../tags/gcc_4_8_2_release)

39770

+++ b/src/gcc/ada/gcc-interface/Make-lang.in (.../branches/gcc-4_8-branch)

39771

@@ -625,7 +625,7 @@

39772

ada/doctools/xgnatugn$(build_exeext): ada/xgnatugn.adb

39773

-$(MKDIR) ada/doctools

39774

$(CP) $^ ada/doctools

39775

- cd ada/doctools && $(GNATMAKE) -q xgnatugn

39776

+ cd ada/doctools && gnatmake -q xgnatugn

39777

39778

# Note that doc/gnat_ugn.texi and doc/projects.texi do not depend on

39779

# xgnatugn being built so we can distribute a pregenerated doc/gnat_ugn.info

39780

Index: gcc/ada/gcc-interface/gigi.h

39781

===================================================================

39782

--- a/src/gcc/ada/gcc-interface/gigi.h (.../tags/gcc_4_8_2_release)

39783

+++ b/src/gcc/ada/gcc-interface/gigi.h (.../branches/gcc-4_8-branch)

39784

@@ -1014,7 +1014,7 @@

39785

/* This function is called by the front-end to enumerate all the supported

39786

modes for the machine, as well as some predefined C types. */

39787

extern void enumerate_modes (void (*f) (const char *, int, int, int, int, int,

39788

- int));

39789

+ int, int));

39790

39791

#ifdef __cplusplus

39792

}

39793

Index: gcc/ada/gcc-interface/misc.c

39794

===================================================================

39795

--- a/src/gcc/ada/gcc-interface/misc.c (.../tags/gcc_4_8_2_release)

39796

+++ b/src/gcc/ada/gcc-interface/misc.c (.../branches/gcc-4_8-branch)

39797

@@ -648,7 +648,7 @@

39798

/* This function is called by the front-end to enumerate all the supported

39799

modes for the machine, as well as some predefined C types. F is a function

39800

which is called back with the parameters as listed below, first a string,

39801

- then six ints. The name is any arbitrary null-terminated string and has

39802

+ then seven ints. The name is any arbitrary null-terminated string and has

39803

no particular significance, except for the case of predefined C types, where

39804

it should be the name of the C type. For integer types, only signed types

39805

should be listed, unsigned versions are assumed. The order of types should

39806

@@ -664,11 +664,12 @@

39807

COMPLEX_P nonzero is this represents a complex mode

39808

COUNT count of number of items, nonzero for vector mode

39809

FLOAT_REP Float_Rep_Kind for FP, otherwise undefined

39810

- SIZE number of bits used to store data

39811

+ PRECISION number of bits used to store data

39812

+ SIZE number of bits occupied by the mode

39813

ALIGN number of bits to which mode is aligned. */

39814

39815

void

39816

-enumerate_modes (void (*f) (const char *, int, int, int, int, int, int))

39817

+enumerate_modes (void (*f) (const char *, int, int, int, int, int, int, int))

39818

{

39819

const tree c_types[]

39820

= { float_type_node, double_type_node, long_double_type_node };

39821

@@ -742,28 +743,26 @@

39822

39823

/* First register any C types for this mode that the front end

39824

may need to know about, unless the mode should be skipped. */

39825

-

39826

- if (!skip_p)

39827

+ if (!skip_p && !vector_p)

39828

for (nameloop = 0; nameloop < ARRAY_SIZE (c_types); nameloop++)

39829

{

39830

- tree typ = c_types[nameloop];

39831

- const char *nam = c_names[nameloop];

39832

+ tree type = c_types[nameloop];

39833

+ const char *name = c_names[nameloop];

39834

39835

- if (TYPE_MODE (typ) == i)

39836

+ if (TYPE_MODE (type) == i)

39837

{

39838

- f (nam, digs, complex_p,

39839

- vector_p ? GET_MODE_NUNITS (i) : 0, float_rep,

39840

- TYPE_PRECISION (typ), TYPE_ALIGN (typ));

39841

+ f (name, digs, complex_p, 0, float_rep, TYPE_PRECISION (type),

39842

+ TREE_INT_CST_LOW (TYPE_SIZE (type)), TYPE_ALIGN (type));

39843

skip_p = true;

39844

}

39845

}

39846

39847

/* If no predefined C types were found, register the mode itself. */

39848

-

39849

if (!skip_p)

39850

f (GET_MODE_NAME (i), digs, complex_p,

39851

vector_p ? GET_MODE_NUNITS (i) : 0, float_rep,

39852

- GET_MODE_PRECISION (i), GET_MODE_ALIGNMENT (i));

39853

+ GET_MODE_PRECISION (i), GET_MODE_BITSIZE (i),

39854

+ GET_MODE_ALIGNMENT (i));

39855

}

39856

}

39857

39858

Index: gcc/ada/system-linux-sparc.ads

39859

===================================================================

39860

--- a/src/gcc/ada/system-linux-sparc.ads (.../tags/gcc_4_8_2_release)

39861

+++ b/src/gcc/ada/system-linux-sparc.ads (.../branches/gcc-4_8-branch)

39862

@@ -7,7 +7,7 @@

39863

-- S p e c --

39864

-- (GNU/Linux-SPARC Version) --

39865

-- --

39866

39867

39868

-- --

39869

-- This specification is derived from the Ada Reference Manual for use with --

39870

-- GNAT. The copyright notice above, and the license provisions that follow --

39871

@@ -35,9 +35,10 @@

39872

------------------------------------------------------------------------------

39873

39874

package System is

39875

-pragma Pure (System);

39876

--- Note that we take advantage of the implementation permission to

39877

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

39878

+ pragma Pure;

39879

+ -- Note that we take advantage of the implementation permission to make

39880

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

39881

+ -- 2005, this is Pure in any case (AI-362).

39882

39883

type Name is (SYSTEM_NAME_GNAT);

39884

System_Name : constant Name := SYSTEM_NAME_GNAT;

39885

@@ -61,6 +62,7 @@

39886

-- Storage-related Declarations

39887

39888

type Address is private;

39889

+ pragma Preelaborable_Initialization (Address);

39890

Null_Address : constant Address;

39891

39892

Storage_Unit : constant := 8;

39893

Index: gcc/ada/system-rtems.ads

39894

===================================================================

39895

--- a/src/gcc/ada/system-rtems.ads (.../tags/gcc_4_8_2_release)

39896

+++ b/src/gcc/ada/system-rtems.ads (.../branches/gcc-4_8-branch)

39897

@@ -7,7 +7,7 @@

39898

-- S p e c --

39899

-- (Compiler Version) --

39900

-- --

39901

39902

39903

-- --

39904

-- This specification is derived from the Ada Reference Manual for use with --

39905

-- GNAT. The copyright notice above, and the license provisions that follow --

39906

@@ -34,9 +34,8 @@

39907

-- --

39908

------------------------------------------------------------------------------

39909

39910

--- This version of System is a RTEMS version that is used in building

39911

--- the compiler. This is based as closely as possible on the generic

39912

--- version with the following exceptions:

39913

+-- This version is for RTEMS. It is based as closely as possible on the

39914

+-- generic version with the following exceptions:

39915

-- + priority definitions

39916

39917

package System is

39918

@@ -67,6 +66,7 @@

39919

-- Storage-related Declarations

39920

39921

type Address is private;

39922

+ pragma Preelaborable_Initialization (Address);

39923

Null_Address : constant Address;

39924

39925

Storage_Unit : constant := Standard'Storage_Unit;

39926

Index: gcc/tree-eh.c

39927

===================================================================

39928

--- a/src/gcc/tree-eh.c (.../tags/gcc_4_8_2_release)

39929

+++ b/src/gcc/tree-eh.c (.../branches/gcc-4_8-branch)

39930

@@ -1357,9 +1357,6 @@

39931

x = gimple_seq_last_stmt (finally);

39932

finally_loc = x ? gimple_location (x) : tf_loc;

39933

39934

- /* Lower the finally block itself. */

39935

- lower_eh_constructs_1 (state, &finally);

39936

-

39937

/* Prepare for switch statement generation. */

39938

nlabels = tf->dest_array.length ();

39939

return_index = nlabels;

39940

@@ -1445,6 +1442,7 @@

39941

x = gimple_build_label (finally_label);

39942

gimple_seq_add_stmt (&tf->top_p_seq, x);

39943

39944

+ lower_eh_constructs_1 (state, &finally);

39945

gimple_seq_add_seq (&tf->top_p_seq, finally);

39946

39947

/* Redirect each incoming goto edge. */

39948

@@ -2502,12 +2500,6 @@

39949

restart:

39950

switch (code)

39951

{

39952

- case TARGET_MEM_REF:

39953

- if (TREE_CODE (TMR_BASE (expr)) == ADDR_EXPR

39954

- && !TMR_INDEX (expr) && !TMR_INDEX2 (expr))

39955

- return false;

39956

- return !TREE_THIS_NOTRAP (expr);

39957

-

39958

case COMPONENT_REF:

39959

case REALPART_EXPR:

39960

case IMAGPART_EXPR:

39961

@@ -2534,10 +2526,36 @@

39962

return false;

39963

return !in_array_bounds_p (expr);

39964

39965

+ case TARGET_MEM_REF:

39966

case MEM_REF:

39967

+ if (TREE_CODE (TREE_OPERAND (expr, 0)) == ADDR_EXPR

39968

+ && tree_could_trap_p (TREE_OPERAND (TREE_OPERAND (expr, 0), 0)))

39969

+ return true;

39970

+ if (TREE_THIS_NOTRAP (expr))

39971

+ return false;

39972

+ /* We cannot prove that the access is in-bounds when we have

39973

+ variable-index TARGET_MEM_REFs. */

39974

+ if (code == TARGET_MEM_REF

39975

+ && (TMR_INDEX (expr) || TMR_INDEX2 (expr)))

39976

+ return true;

39977

if (TREE_CODE (TREE_OPERAND (expr, 0)) == ADDR_EXPR)

39978

- return false;

39979

- /* Fallthru. */

39980

+ {

39981

+ tree base = TREE_OPERAND (TREE_OPERAND (expr, 0), 0);

39982

+ double_int off = mem_ref_offset (expr);

39983

+ if (off.is_negative ())

39984

+ return true;

39985

+ if (TREE_CODE (base) == STRING_CST)

39986

+ return double_int::from_uhwi (TREE_STRING_LENGTH (base)).ule (off);

39987

+ else if (DECL_SIZE_UNIT (base) == NULL_TREE

39988

+ || TREE_CODE (DECL_SIZE_UNIT (base)) != INTEGER_CST

39989

+ || tree_to_double_int (DECL_SIZE_UNIT (base)).ule (off))

39990

+ return true;

39991

+ /* Now we are sure the first byte of the access is inside

39992

+ the object. */

39993

+ return false;

39994

+ }

39995

+ return true;

39996

+

39997

case INDIRECT_REF:

39998

return !TREE_THIS_NOTRAP (expr);

39999

40000

@@ -4166,8 +4184,11 @@

40001

/* If the block is totally empty, look for more unsplitting cases. */

40002

if (gsi_end_p (gsi))

40003

{

40004

- /* For the degenerate case of an infinite loop bail out. */

40005

- if (infinite_empty_loop_p (e_out))

40006

+ /* For the degenerate case of an infinite loop bail out.

40007

+ If bb has no successors and is totally empty, which can happen e.g.

40008

+ because of incorrect noreturn attribute, bail out too. */

40009

+ if (e_out == NULL

40010

+ || infinite_empty_loop_p (e_out))

40011

return ret;

40012

40013

return ret | cleanup_empty_eh_unsplit (bb, e_out, lp);

40014

@@ -4304,11 +4325,12 @@

40015

remove_unreachable_handlers ();

40016

40017

/* Watch out for the region tree vanishing due to all unreachable. */

40018

- if (cfun->eh->region_tree && optimize)

40019

+ if (cfun->eh->region_tree)

40020

{

40021

bool changed = false;

40022

40023

- changed |= unsplit_all_eh ();

40024

+ if (optimize)

40025

+ changed |= unsplit_all_eh ();

40026

changed |= cleanup_all_empty_eh ();

40027

40028

if (changed)

40029

Index: gcc/fortran/interface.c

40030

===================================================================

40031

--- a/src/gcc/fortran/interface.c (.../tags/gcc_4_8_2_release)

40032

+++ b/src/gcc/fortran/interface.c (.../branches/gcc-4_8-branch)

40033

@@ -1245,7 +1245,8 @@

40034

return FAILURE;

40035

}

40036

40037

- if (r1->ts.u.cl->length)

40038

+ if (s1->ts.u.cl && s1->ts.u.cl->length

40039

+ && s2->ts.u.cl && s2->ts.u.cl->length)

40040

{

40041

int compval = gfc_dep_compare_expr (r1->ts.u.cl->length,

40042

r2->ts.u.cl->length);

40043

@@ -1367,8 +1368,8 @@

40044

if (s1->attr.function && s2->attr.function)

40045

{

40046

/* If both are functions, check result characteristics. */

40047

- if (check_result_characteristics (s1, s2, errmsg, err_len)

40048

- == FAILURE)

40049

+ if (check_result_characteristics (s1, s2, errmsg, err_len) == FAILURE

40050

+ || check_result_characteristics (s2, s1, errmsg, err_len) == FAILURE)

40051

return 0;

40052

}

40053

40054

Index: gcc/fortran/intrinsic.c

40055

===================================================================

40056

--- a/src/gcc/fortran/intrinsic.c (.../tags/gcc_4_8_2_release)

40057

+++ b/src/gcc/fortran/intrinsic.c (.../branches/gcc-4_8-branch)

40058

@@ -4229,7 +4229,7 @@

40059

c->resolved_sym->attr.elemental = isym->elemental;

40060

}

40061

40062

- if (gfc_pure (NULL) && !isym->pure)

40063

+ if (!isym->pure && gfc_pure (NULL))

40064

{

40065

gfc_error ("Subroutine call to intrinsic '%s' at %L is not PURE", name,

40066

&c->loc);

40067

@@ -4236,6 +4236,9 @@

40068

return MATCH_ERROR;

40069

}

40070

40071

+ if (!isym->pure)

40072

+ gfc_unset_implicit_pure (NULL);

40073

+

40074

c->resolved_sym->attr.noreturn = isym->noreturn;

40075

40076

return MATCH_YES;

40077

Index: gcc/fortran/trans-expr.c

40078

===================================================================

40079

--- a/src/gcc/fortran/trans-expr.c (.../tags/gcc_4_8_2_release)

40080

+++ b/src/gcc/fortran/trans-expr.c (.../branches/gcc-4_8-branch)

40081

@@ -355,7 +355,11 @@

40082

gfc_conv_expr_descriptor (parmse, e);

40083

40084

if (e->rank != class_ts.u.derived->components->as->rank)

40085

- class_array_data_assign (&block, ctree, parmse->expr, true);

40086

+ {

40087

+ gcc_assert (class_ts.u.derived->components->as->type

40088

+ == AS_ASSUMED_RANK);

40089

+ class_array_data_assign (&block, ctree, parmse->expr, false);

40090

+ }

40091

else

40092

{

40093

if (gfc_expr_attr (e).codimension)

40094

@@ -670,7 +674,6 @@

40095

gfc_add_modify (&parmse->post, vptr,

40096

fold_convert (TREE_TYPE (vptr), ctree));

40097

40098

- gcc_assert (!optional || (optional && !copyback));

40099

if (optional)

40100

{

40101

tree tmp2;

40102

@@ -6343,7 +6346,13 @@

40103

/* Returns a reference to the scalar evaluated outside the loop

40104

for this case. */

40105

gfc_conv_expr (se, expr);

40106

- se->expr = gfc_build_addr_expr (NULL_TREE, se->expr);

40107

+

40108

+ if (expr->ts.type == BT_CHARACTER

40109

+ && expr->expr_type != EXPR_FUNCTION)

40110

+ gfc_conv_string_parameter (se);

40111

+ else

40112

+ se->expr = gfc_build_addr_expr (NULL_TREE, se->expr);

40113

+

40114

return;

40115

}

40116

40117

Index: gcc/fortran/trans-array.c

40118

===================================================================

40119

--- a/src/gcc/fortran/trans-array.c (.../tags/gcc_4_8_2_release)

40120

+++ b/src/gcc/fortran/trans-array.c (.../branches/gcc-4_8-branch)

40121

@@ -1,5 +1,5 @@

40122

/* Array translation routines

40123

40124

40125

Contributed by Paul Brook <paul@nowt.org>

40126

and Steven Bosscher <s.bosscher@student.tudelft.nl>

40127

40128

@@ -2487,6 +2487,11 @@

40129

a reference to the value. */

40130

gfc_conv_expr (&se, expr);

40131

}

40132

+

40133

+ /* Ensure that a pointer to the string is stored. */

40134

+ if (expr->ts.type == BT_CHARACTER)

40135

+ gfc_conv_string_parameter (&se);

40136

+

40137

gfc_add_block_to_block (&outer_loop->pre, &se.pre);

40138

gfc_add_block_to_block (&outer_loop->post, &se.post);

40139

if (gfc_is_class_scalar_expr (expr))

40140

@@ -7940,6 +7945,7 @@

40141

tree size1;

40142

tree size2;

40143

tree array1;

40144

+ tree cond_null;

40145

tree cond;

40146

tree tmp;

40147

tree tmp2;

40148

@@ -8015,9 +8021,9 @@

40149

jump_label2 = gfc_build_label_decl (NULL_TREE);

40150

40151

/* Allocate if data is NULL. */

40152

- cond = fold_build2_loc (input_location, EQ_EXPR, boolean_type_node,

40153

+ cond_null = fold_build2_loc (input_location, EQ_EXPR, boolean_type_node,

40154

array1, build_int_cst (TREE_TYPE (array1), 0));

40155

- tmp = build3_v (COND_EXPR, cond,

40156

+ tmp = build3_v (COND_EXPR, cond_null,

40157

build1_v (GOTO_EXPR, jump_label1),

40158

build_empty_stmt (input_location));

40159

gfc_add_expr_to_block (&fblock, tmp);

40160

@@ -8069,13 +8075,25 @@

40161

tmp = build1_v (LABEL_EXPR, jump_label1);

40162

gfc_add_expr_to_block (&fblock, tmp);

40163

40164

- size1 = gfc_conv_descriptor_size (desc, expr1->rank);

40165

+ /* If the lhs has not been allocated, its bounds will not have been

40166

+ initialized and so its size is set to zero. */

40167

+ size1 = gfc_create_var (gfc_array_index_type, NULL);

40168

+ gfc_init_block (&alloc_block);

40169

+ gfc_add_modify (&alloc_block, size1, gfc_index_zero_node);

40170

+ gfc_init_block (&realloc_block);

40171

+ gfc_add_modify (&realloc_block, size1,

40172

+ gfc_conv_descriptor_size (desc, expr1->rank));

40173

+ tmp = build3_v (COND_EXPR, cond_null,

40174

+ gfc_finish_block (&alloc_block),

40175

+ gfc_finish_block (&realloc_block));

40176

+ gfc_add_expr_to_block (&fblock, tmp);

40177

40178

- /* Get the rhs size. Fix both sizes. */

40179

+ /* Get the rhs size and fix it. */

40180

if (expr2)

40181

desc2 = rss->info->data.array.descriptor;

40182

else

40183

desc2 = NULL_TREE;

40184

+

40185

size2 = gfc_index_one_node;

40186

for (n = 0; n < expr2->rank; n++)

40187

{

40188

@@ -8089,8 +8107,6 @@

40189

gfc_array_index_type,

40190

tmp, size2);

40191

}

40192

-

40193

- size1 = gfc_evaluate_now (size1, &fblock);

40194

size2 = gfc_evaluate_now (size2, &fblock);

40195

40196

cond = fold_build2_loc (input_location, NE_EXPR, boolean_type_node,

40197

Index: gcc/fortran/symbol.c

40198

===================================================================

40199

--- a/src/gcc/fortran/symbol.c (.../tags/gcc_4_8_2_release)

40200

+++ b/src/gcc/fortran/symbol.c (.../branches/gcc-4_8-branch)

40201

@@ -1110,8 +1110,8 @@

40202

return FAILURE;

40203

}

40204

40205

- if (s == SAVE_EXPLICIT && gfc_implicit_pure (NULL))

40206

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40207

+ if (s == SAVE_EXPLICIT)

40208

+ gfc_unset_implicit_pure (NULL);

40209

40210

if (s == SAVE_EXPLICIT && attr->save == SAVE_EXPLICIT)

40211

{

40212

Index: gcc/fortran/class.c

40213

===================================================================

40214

--- a/src/gcc/fortran/class.c (.../tags/gcc_4_8_2_release)

40215

+++ b/src/gcc/fortran/class.c (.../branches/gcc-4_8-branch)

40216

@@ -2486,7 +2486,7 @@

40217

return NULL;

40218

40219

/* Sometimes the typespec is passed from a single call. */

40220

- if (ts->type == BT_DERIVED)

40221

+ if (ts->type == BT_DERIVED || ts->type == BT_CLASS)

40222

return gfc_find_derived_vtab (ts->u.derived);

40223

40224

/* Find the top-level namespace. */

40225

Index: gcc/fortran/decl.c

40226

===================================================================

40227

--- a/src/gcc/fortran/decl.c (.../tags/gcc_4_8_2_release)

40228

+++ b/src/gcc/fortran/decl.c (.../branches/gcc-4_8-branch)

40229

@@ -510,10 +510,8 @@

40230

free (newdata);

40231

return MATCH_ERROR;

40232

}

40233

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

40234

40235

- if (gfc_implicit_pure (NULL))

40236

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40237

-

40238

/* Mark the variable as having appeared in a data statement. */

40239

if (gfc_add_data (&sym->attr, sym->name, &sym->declared_at) == FAILURE)

40240

{

40241

@@ -571,10 +569,8 @@

40242

gfc_error ("DATA statement at %C is not allowed in a PURE procedure");

40243

return MATCH_ERROR;

40244

}

40245

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

40246

40247

- if (gfc_implicit_pure (NULL))

40248

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40249

-

40250

return MATCH_YES;

40251

40252

cleanup:

40253

@@ -1737,6 +1733,7 @@

40254

"a PURE procedure");

40255

return MATCH_ERROR;

40256

}

40257

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

40258

40259

/* Match NULL() initialization. */

40260

m = gfc_match_null (init);

40261

@@ -2045,6 +2042,10 @@

40262

m = MATCH_ERROR;

40263

}

40264

40265

+ if (current_attr.flavor != FL_PARAMETER

40266

+ && gfc_state_stack->state != COMP_DERIVED)

40267

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

40268

+

40269

if (m != MATCH_YES)

40270

goto cleanup;

40271

}

40272

@@ -5069,7 +5070,14 @@

40273

if (gfc_add_proc (&c->attr, name, NULL) == FAILURE)

40274

return MATCH_ERROR;

40275

40276

- c->tb = tb;

40277

+ if (num == 1)

40278

+ c->tb = tb;

40279

+ else

40280

+ {

40281

+ c->tb = XCNEW (gfc_typebound_proc);

40282

+ c->tb->where = gfc_current_locus;

40283

+ *c->tb = *tb;

40284

+ }

40285

40286

/* Set interface. */

40287

if (proc_if != NULL)

40288

@@ -7384,6 +7392,7 @@

40289

40290

40291

/* Check a derived type that is being extended. */

40292

+

40293

static gfc_symbol*

40294

check_extended_derived_type (char *name)

40295

{

40296

@@ -7395,14 +7404,15 @@

40297

return NULL;

40298

}

40299

40300

+ extended = gfc_find_dt_in_generic (extended);

40301

+

40302

+ /* F08:C428. */

40303

if (!extended)

40304

{

40305

- gfc_error ("No such symbol in TYPE definition at %C");

40306

+ gfc_error ("Symbol '%s' at %C has not been previously defined", name);

40307

return NULL;

40308

}

40309

40310

- extended = gfc_find_dt_in_generic (extended);

40311

-

40312

if (extended->attr.flavor != FL_DERIVED)

40313

{

40314

gfc_error ("'%s' in EXTENDS expression at %C is not a "

40315

Index: gcc/fortran/dump-parse-tree.c

40316

===================================================================

40317

--- a/src/gcc/fortran/dump-parse-tree.c (.../tags/gcc_4_8_2_release)

40318

+++ b/src/gcc/fortran/dump-parse-tree.c (.../branches/gcc-4_8-branch)

40319

@@ -110,7 +110,8 @@

40320

break;

40321

40322

case BT_CHARACTER:

40323

- show_expr (ts->u.cl->length);

40324

+ if (ts->u.cl)

40325

+ show_expr (ts->u.cl->length);

40326

fprintf(dumpfile, " %d", ts->kind);

40327

break;

40328

40329

Index: gcc/fortran/cpp.c

40330

===================================================================

40331

--- a/src/gcc/fortran/cpp.c (.../tags/gcc_4_8_2_release)

40332

+++ b/src/gcc/fortran/cpp.c (.../branches/gcc-4_8-branch)

40333

@@ -569,6 +569,7 @@

40334

if (gfc_option.flag_preprocessed)

40335

return;

40336

40337

+ cpp_change_file (cpp_in, LC_RENAME, _("<built-in>"));

40338

if (!gfc_cpp_option.no_predefined)

40339

{

40340

/* Make sure all of the builtins about to be declared have

40341

Index: gcc/fortran/gfortran.h

40342

===================================================================

40343

--- a/src/gcc/fortran/gfortran.h (.../tags/gcc_4_8_2_release)

40344

+++ b/src/gcc/fortran/gfortran.h (.../branches/gcc-4_8-branch)

40345

@@ -2830,6 +2830,7 @@

40346

int gfc_impure_variable (gfc_symbol *);

40347

int gfc_pure (gfc_symbol *);

40348

int gfc_implicit_pure (gfc_symbol *);

40349

+void gfc_unset_implicit_pure (gfc_symbol *);

40350

int gfc_elemental (gfc_symbol *);

40351

gfc_try gfc_resolve_iterator (gfc_iterator *, bool, bool);

40352

gfc_try find_forall_index (gfc_expr *, gfc_symbol *, int);

40353

Index: gcc/fortran/ChangeLog

40354

===================================================================

40355

--- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_8_2_release)

40356

+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_8-branch)

40357

@@ -1,3 +1,259 @@

40358

+2014-04-11 Janne Blomqvist <jb@gcc.gnu.org>

40359

+

40360

+ * intrinsic.texi (RANDOM_SEED): Improve example.

40361

+

40362

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

40363

+

40364

+ Backport from mainline

40365

+ 2014-03-22 Jakub Jelinek <jakub@redhat.com>

40366

+

40367

+ PR debug/60603

40368

+ * cpp.c (gfc_cpp_init): Restore cb_change_file call to

40369

+ <built-in>.

40370

+

40371

+2014-03-29 Mikael Morin <mikael@gcc.gnu.org>

40372

+

40373

+ PR fortran/60677

40374

+ * trans-intrinsic.c (gfc_conv_intrinsic_ichar): Enlarge argument

40375

+ list buffer.

40376

+

40377

+2014-03-28 Mikael Morin <mikael@gcc.gnu.org>

40378

+ Tobias Burnus <burnus@net-b.de>

40379

+

40380

+ PR fortran/60576

40381

+ * trans-expr.c (gfc_conv_derived_to_class): Avoid

40382

+ generation of out-of-bounds range expr.

40383

+

40384

+2014-03-28 Thomas Koenig <tkoenig@gcc.gnu.org>

40385

+

40386

+ PR fortran/60522

40387

+ * frontend-passes.c (cfe_code): Do not walk subtrees

40388

+ for WHERE.

40389

+

40390

+2014-03-20 Tobias Burnus <burnus@net-b.de>

40391

+

40392

+ PR fortran/60543

40393

+ PR fortran/60283

40394

+ * gfortran.h (gfc_unset_implicit_pure): New prototype.

40395

+ * resolve.c (gfc_unset_implicit_pure): New.

40396

+ (resolve_structure_cons, resolve_function,

40397

+ pure_subroutine, resolve_ordinary_assign): Use it.

40398

+ * decl.c (match_old_style_init, gfc_match_data,

40399

+ match_pointer_init, variable_decl): Ditto.

40400

+ * expr.c (gfc_check_pointer_assign): Ditto.

40401

+ * intrinsic.c (gfc_intrinsic_sub_interface): Ditto.

40402

+ * io.c (match_vtag, gfc_match_open, gfc_match_close,

40403

+ match_filepos, gfc_match_inquire, gfc_match_print,

40404

+ gfc_match_wait, check_io_constraints): Ditto.

40405

+ * match.c (gfc_match_critical, gfc_match_stopcode,

40406

+ lock_unlock_statement, sync_statement, gfc_match_allocate,

40407

+ gfc_match_deallocate): Ditto.

40408

+ * parse.c (decode_omp_directive): Ditto.

40409

+ * symbol.c (gfc_add_save): Ditto.

40410

+

40411

+2014-03-08 Janus Weil <janus@gcc.gnu.org>

40412

+

40413

+ PR fortran/60450

40414

+ * simplify.c (gfc_simplify_shape): Only clear shape if it was really

40415

+ created successfully.

40416

+

40417

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

40418

+

40419

+ Backport from mainline

40420

+ 2014-02-11 Jakub Jelinek <jakub@redhat.com>

40421

+

40422

+ PR fortran/52370

40423

+ * trans-decl.c (gfc_build_dummy_array_decl): Set TREE_NO_WARNING

40424

+ on decl if sym->attr.optional.

40425

+

40426

+2014-03-02 Mikael Morin <mikael@gcc.gnu.org>

40427

+

40428

+ PR fortran/60341

40429

+ * frontend-passes.c (optimize_comparison): Guard two union accesses

40430

+ with the corresponding tag checks.

40431

+

40432

+2014-02-22 Mikael Morin <mikael@gcc.gnu.org>

40433

+

40434

+ PR fortran/59599

40435

+ * trans-intrinsic.c (gfc_conv_intrinsic_ichar): Calculate the

40436

+ number of arguments.

40437

+

40438

+2014-02-19 Tobias Burnus <burnus@net-b.de>

40439

+

40440

+ PR fortran/49397

40441

+ * expr.c (gfc_check_pointer_assign): Add check for

40442

+ F2008Cor2, C729.

40443

+ * trans-decl.c (gfc_get_symbol_decl): Correctly generate

40444

+ external decl in a corner case.

40445

+

40446

+2014-02-19 Janus Weil <janus@gcc.gnu.org>

40447

+

40448

+ Backports from mainline:

40449

+ 2014-02-17 Janus Weil <janus@gcc.gnu.org>

40450

+

40451

+ PR fortran/55907

40452

+ * resolve.c (build_default_init_expr): Don't initialize character

40453

+ variable if -fno-automatic is given.

40454

+

40455

+ 2014-02-18 Janus Weil <janus@gcc.gnu.org>

40456

+

40457

+ PR fortran/60231

40458

+ * resolve.c (check_generic_tbp_ambiguity): Check for presence of dummy

40459

+ arguments to prevent ICE.

40460

+

40461

+2014-02-09 Janus Weil <janus@gcc.gnu.org>

40462

+

40463

+ Backport from mainline

40464

+ 2013-10-21 Tobias Burnus <burnus@net-b.de>

40465

+

40466

+ PR fortran/58803

40467

+ PR fortran/59395

40468

+ * decl.c (match_ppc_decl): Prevent later double free.

40469

+

40470

+2014-02-08 Mikael Morin <mikael@gcc.gnu.org>

40471

+

40472

+ PR fortran/57033

40473

+ * primary.c (gfc_convert_to_structure_constructor): Avoid null pointer

40474

+ dereference.

40475

+

40476

+2014-02-07 Paul Thomas <pault@gcc.gnu.org>

40477

+

40478

+ PR fortran/59906

40479

+ * trans-stmt.c (gfc_add_loop_ss_code): In the case of character

40480

+ SS_REFERENCE, use gfc_conv_string_parameter to ensure that a

40481

+ pointer to the string is stored.

40482

+ * trans-expr.c (gfc_conv_expr_reference): Likewise, use

40483

+ gfc_conv_string_parameter to ensure that a pointer to is passed

40484

+ to the elemental function.

40485

+

40486

+2014-02-01 Paul Thomas <pault@gcc.gnu.org>

40487

+

40488

+ PR fortran/59414

40489

+ * trans-stmt.c (gfc_trans_allocate): Before the pointer

40490

+ assignment to transfer the source _vptr to a class allocate

40491

+ expression, the final class reference should be exposed. The

40492

+ tail that includes the _data and array references is stored.

40493

+ This reduced expression is transferred to 'lhs' and the _vptr

40494

+ added. Then the tail is restored to the allocate expression.

40495

+

40496

+2014-01-26 Mikael Morin <mikael@gcc.gnu.org>

40497

+

40498

+ PR fortran/58007

40499

+ * module.c

40500

+ (fp2, find_pointer2): Remove.

40501

+ (mio_component_ref): Don't forcedfully set the containing derived type

40502

+ symbol for loading. Remove unused argument.

40503

+ (mio_ref): Update caller

40504

+ (skip_list): New argument nest_level. Initialize level with the new

40505

+ argument.

40506

+ (read_module): Add forced pointer components association for derived

40507

+ type symbols.

40508

+

40509

+2014-01-19 Paul Thomas <pault@gcc.gnu.org>

40510

+

40511

+ Backport from mainline

40512

+ 2013-12-01 Paul Thomas <pault@gcc.gnu.org>

40513

+

40514

+ PR fortran/58410

40515

+ * trans-array.c (gfc_alloc_allocatable_for_assignment): Do not

40516

+ use the array bounds of an unallocated array but set its size

40517

+ to zero instead.

40518

+

40519

+2014-01-19 Paul Thomas <pault@gcc.gnu.org>

40520

+

40521

+ Backport from mainline

40522

+ 2013-12-01 Paul Thomas <pault@gcc.gnu.org>

40523

+

40524

+ PR fortran/34547

40525

+ * resolve.c (resolve_transfer): EXPR_NULL is always in an

40526

+ invalid context in a transfer statement.

40527

+

40528

+2014-01-11 Janus Weil <janus@gcc.gnu.org>

40529

+

40530

+ Backport from mainline

40531

+ 2013-12-29 Janus Weil <janus@gcc.gnu.org>

40532

+

40533

+ PR fortran/59612

40534

+ PR fortran/57042

40535

+ * dump-parse-tree.c (show_typespec): Check for charlen.

40536

+ * invoke.texi: Fix documentation of -fdump-fortran-optimized and

40537

+ -fdump-parse-tree.

40538

+

40539

+2014-01-04 Janus Weil <janus@gcc.gnu.org>

40540

+

40541

+ Backport from mainline

40542

+ 2014-01-02 Janus Weil <janus@gcc.gnu.org>

40543

+

40544

+ PR fortran/59654

40545

+ * resolve.c (resolve_typebound_procedures): No need to create the vtab

40546

+ here.

40547

+

40548

+2013-12-31 Janus Weil <janus@gcc.gnu.org>

40549

+

40550

+ Backport from mainline

40551

+ 2013-12-30 Janus Weil <janus@gcc.gnu.org>

40552

+

40553

+ PR fortran/58998

40554

+ * resolve.c (resolve_symbol): Check that symbol is not only flavorless

40555

+ but also untyped.

40556

+

40557

+2013-12-18 Janus Weil <janus@gcc.gnu.org>

40558

+

40559

+ Backport from mainline

40560

+ 2013-12-15 Janus Weil <janus@gcc.gnu.org>

40561

+

40562

+ PR fortran/59493

40563

+ * class.c (gfc_find_intrinsic_vtab): Handle BT_CLASS.

40564

+

40565

+2013-11-30 Paul Thomas <pault@gcc.gnu.org>

40566

+

40567

+ Backport from mainline

40568

+ 2013-11-04 Paul Thomas <pault@gcc.gnu.org>

40569

+

40570

+ PR fortran/57445

40571

+ * trans-expr.c (gfc_conv_class_to_class): Remove spurious

40572

+ assert.

40573

+

40574

+2013-11-17 Janus Weil <janus@gcc.gnu.org>

40575

+

40576

+ Backport from mainline

40577

+ 2013-11-07 Janus Weil <janus@gcc.gnu.org>

40578

+

40579

+ PR fortran/58471

40580

+ * primary.c (gfc_expr_attr): Check for result symbol.

40581

+

40582

+2013-11-16 Janus Weil <janus@gcc.gnu.org>

40583

+

40584

+ Backport from mainline

40585

+ 2013-09-20 Janus Weil <janus@gcc.gnu.org>

40586

+

40587

+ PR fortran/58099

40588

+ * expr.c (gfc_check_pointer_assign): Remove second call to

40589

+ 'gfc_compare_interfaces' with swapped arguments.

40590

+ * interface.c (gfc_compare_interfaces): Symmetrize the call to

40591

+ 'check_result_characteristics' by calling it with swapped arguments.

40592

+

40593

+2013-11-16 Paul Thomas <pault@gcc.gnu.org>

40594

+

40595

+ PR fortran/58771

40596

+ * trans-io.c (transfer_expr): If the backend_decl for a derived

40597

+ type is missing, build it with gfc_typenode_for_spec.

40598

+

40599

+2013-11-05 Steven G. Kargl <kargl@gcc.gnu.org>

40600

+

40601

+ PR fortran/58989

40602

+ * check.c (gfc_check_reshape): ensure that shape is a constant

40603

+ expression.

40604

+

40605

+2013-11-02 Janus Weil <janus@gcc.gnu.org>

40606

+

40607

+ Backport from mainline

40608

+ 2013-09-23 Janus Weil <janus@gcc.gnu.org>

40609

+

40610

+ PR fortran/58355

40611

+ * decl.c (check_extended_derived_type): Prevent segfault, modify error

40612

+ message.

40613

+

40614

2013-10-16 Release Manager

40615

40616

* GCC 4.8.2 released.

40617

Index: gcc/fortran/trans-stmt.c

40618

===================================================================

40619

--- a/src/gcc/fortran/trans-stmt.c (.../tags/gcc_4_8_2_release)

40620

+++ b/src/gcc/fortran/trans-stmt.c (.../branches/gcc-4_8-branch)

40621

@@ -5104,10 +5104,49 @@

40622

{

40623

gfc_expr *lhs, *rhs;

40624

gfc_se lse;

40625

+ gfc_ref *ref, *class_ref, *tail;

40626

40627

+ /* Find the last class reference. */

40628

+ class_ref = NULL;

40629

+ for (ref = e->ref; ref; ref = ref->next)

40630

+ {

40631

+ if (ref->type == REF_COMPONENT

40632

+ && ref->u.c.component->ts.type == BT_CLASS)

40633

+ class_ref = ref;

40634

+

40635

+ if (ref->next == NULL)

40636

+ break;

40637

+ }

40638

+

40639

+ /* Remove and store all subsequent references after the

40640

+ CLASS reference. */

40641

+ if (class_ref)

40642

+ {

40643

+ tail = class_ref->next;

40644

+ class_ref->next = NULL;

40645

+ }

40646

+ else

40647

+ {

40648

+ tail = e->ref;

40649

+ e->ref = NULL;

40650

+ }

40651

+

40652

lhs = gfc_expr_to_initialize (e);

40653

gfc_add_vptr_component (lhs);

40654

40655

+ /* Remove the _vptr component and restore the original tail

40656

+ references. */

40657

+ if (class_ref)

40658

+ {

40659

+ gfc_free_ref_list (class_ref->next);

40660

+ class_ref->next = tail;

40661

+ }

40662

+ else

40663

+ {

40664

+ gfc_free_ref_list (e->ref);

40665

+ e->ref = tail;

40666

+ }

40667

+

40668

if (class_expr != NULL_TREE)

40669

{

40670

/* Polymorphic SOURCE: VPTR must be determined at run time. */

40671

Index: gcc/fortran/expr.c

40672

===================================================================

40673

--- a/src/gcc/fortran/expr.c (.../tags/gcc_4_8_2_release)

40674

+++ b/src/gcc/fortran/expr.c (.../branches/gcc-4_8-branch)

40675

@@ -3555,11 +3555,13 @@

40676

return FAILURE;

40677

}

40678

40679

- if (!gfc_compare_interfaces (s2, s1, name, 0, 1,

40680

- err, sizeof(err), NULL, NULL))

40681

+ /* Check F2008Cor2, C729. */

40682

+ if (!s2->attr.intrinsic && s2->attr.if_source == IFSRC_UNKNOWN

40683

+ && !s2->attr.external && !s2->attr.subroutine && !s2->attr.function)

40684

{

40685

- gfc_error ("Interface mismatch in procedure pointer assignment "

40686

- "at %L: %s", &rvalue->where, err);

40687

+ gfc_error ("Procedure pointer target '%s' at %L must be either an "

40688

+ "intrinsic, host or use associated, referenced or have "

40689

+ "the EXTERNAL attribute", s2->name, &rvalue->where);

40690

return FAILURE;

40691

}

40692

40693

@@ -3679,9 +3681,8 @@

40694

}

40695

40696

if (is_implicit_pure && gfc_impure_variable (rvalue->symtree->n.sym))

40697

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40698

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

40699

40700

-

40701

if (gfc_has_vector_index (rvalue))

40702

{

40703

gfc_error ("Pointer assignment with vector subscript "

40704

Index: gcc/fortran/module.c

40705

===================================================================

40706

--- a/src/gcc/fortran/module.c (.../tags/gcc_4_8_2_release)

40707

+++ b/src/gcc/fortran/module.c (.../branches/gcc-4_8-branch)

40708

@@ -386,37 +386,6 @@

40709

}

40710

40711

40712

-/* Recursive function to find a pointer within a tree by brute force. */

40713

-

40714

-static pointer_info *

40715

-fp2 (pointer_info *p, const void *target)

40716

-{

40717

- pointer_info *q;

40718

-

40719

- if (p == NULL)

40720

- return NULL;

40721

-

40722

- if (p->u.pointer == target)

40723

- return p;

40724

-

40725

- q = fp2 (p->left, target);

40726

- if (q != NULL)

40727

- return q;

40728

-

40729

- return fp2 (p->right, target);

40730

-}

40731

-

40732

-

40733

-/* During reading, find a pointer_info node from the pointer value.

40734

- This amounts to a brute-force search. */

40735

-

40736

-static pointer_info *

40737

-find_pointer2 (void *p)

40738

-{

40739

- return fp2 (pi_root, p);

40740

-}

40741

-

40742

-

40743

/* Resolve any fixups using a known pointer. */

40744

40745

static void

40746

@@ -2522,45 +2491,13 @@

40747

the namespace and is not loaded again. */

40748

40749

static void

40750

-mio_component_ref (gfc_component **cp, gfc_symbol *sym)

40751

+mio_component_ref (gfc_component **cp)

40752

{

40753

- char name[GFC_MAX_SYMBOL_LEN + 1];

40754

- gfc_component *q;

40755

pointer_info *p;

40756

40757

p = mio_pointer_ref (cp);

40758

if (p->type == P_UNKNOWN)

40759

p->type = P_COMPONENT;

40760

-

40761

- if (iomode == IO_OUTPUT)

40762

- mio_pool_string (&(*cp)->name);

40763

- else

40764

- {

40765

- mio_internal_string (name);

40766

-

40767

- if (sym && sym->attr.is_class)

40768

- sym = sym->components->ts.u.derived;

40769

-

40770

- /* It can happen that a component reference can be read before the

40771

- associated derived type symbol has been loaded. Return now and

40772

- wait for a later iteration of load_needed. */

40773

- if (sym == NULL)

40774

- return;

40775

-

40776

- if (sym->components != NULL && p->u.pointer == NULL)

40777

- {

40778

- /* Symbol already loaded, so search by name. */

40779

- q = gfc_find_component (sym, name, true, true);

40780

-

40781

- if (q)

40782

- associate_integer_pointer (p, q);

40783

- }

40784

-

40785

- /* Make sure this symbol will eventually be loaded. */

40786

- p = find_pointer2 (sym);

40787

- if (p->u.rsym.state == UNUSED)

40788

- p->u.rsym.state = NEEDED;

40789

- }

40790

}

40791

40792

40793

@@ -2917,7 +2854,7 @@

40794

40795

case REF_COMPONENT:

40796

mio_symbol_ref (&r->u.c.sym);

40797

- mio_component_ref (&r->u.c.component, r->u.c.sym);

40798

+ mio_component_ref (&r->u.c.component);

40799

break;

40800

40801

case REF_SUBSTRING:

40802

@@ -3772,7 +3709,9 @@

40803

40804

40805

/* Unlike most other routines, the address of the symbol node is already

40806

- fixed on input and the name/module has already been filled in. */

40807

+ fixed on input and the name/module has already been filled in.

40808

+ If you update the symbol format here, don't forget to update read_module

40809

+ as well (look for "seek to the symbol's component list"). */

40810

40811

static void

40812

mio_symbol (gfc_symbol *sym)

40813

@@ -3782,6 +3721,7 @@

40814

mio_lparen ();

40815

40816

mio_symbol_attribute (&sym->attr);

40817

+

40818

mio_typespec (&sym->ts);

40819

if (sym->ts.type == BT_CLASS)

40820

sym->attr.class_ok = 1;

40821

@@ -3812,7 +3752,6 @@

40822

40823

/* Note that components are always saved, even if they are supposed

40824

to be private. Component access is checked during searching. */

40825

-

40826

mio_component_list (&sym->components, sym->attr.vtype);

40827

40828

if (sym->components != NULL)

40829

@@ -3914,14 +3853,17 @@

40830

}

40831

40832

40833

-/* Skip a list between balanced left and right parens. */

40834

+/* Skip a list between balanced left and right parens.

40835

+ By setting NEST_LEVEL one assumes that a number of NEST_LEVEL opening parens

40836

+ have been already parsed by hand, and the remaining of the content is to be

40837

+ skipped here. The default value is 0 (balanced parens). */

40838

40839

static void

40840

-skip_list (void)

40841

+skip_list (int nest_level = 0)

40842

{

40843

int level;

40844

40845

- level = 0;

40846

+ level = nest_level;

40847

do

40848

{

40849

switch (parse_atom ())

40850

@@ -4555,7 +4497,6 @@

40851

info->u.rsym.ns = atom_int;

40852

40853

get_module_locus (&info->u.rsym.where);

40854

- skip_list ();

40855

40856

/* See if the symbol has already been loaded by a previous module.

40857

If so, we reference the existing symbol and prevent it from

40858

@@ -4566,11 +4507,57 @@

40859

40860

if (sym == NULL

40861

|| (sym->attr.flavor == FL_VARIABLE && info->u.rsym.ns !=1))

40862

- continue;

40863

+ {

40864

+ skip_list ();

40865

+ continue;

40866

+ }

40867

40868

info->u.rsym.state = USED;

40869

info->u.rsym.sym = sym;

40870

+ /* The current symbol has already been loaded, so we can avoid loading

40871

+ it again. However, if it is a derived type, some of its components

40872

+ can be used in expressions in the module. To avoid the module loading

40873

+ failing, we need to associate the module's component pointer indexes

40874

+ with the existing symbol's component pointers. */

40875

+ if (sym->attr.flavor == FL_DERIVED)

40876

+ {

40877

+ gfc_component *c;

40878

40879

+ /* First seek to the symbol's component list. */

40880

+ mio_lparen (); /* symbol opening. */

40881

+ skip_list (); /* skip symbol attribute. */

40882

+ skip_list (); /* typespec. */

40883

+ require_atom (ATOM_INTEGER); /* namespace ref. */

40884

+ require_atom (ATOM_INTEGER); /* common ref. */

40885

+ skip_list (); /* formal args. */

40886

+ /* no value. */

40887

+ skip_list (); /* array_spec. */

40888

+ require_atom (ATOM_INTEGER); /* result. */

40889

+ /* not a cray pointer. */

40890

+

40891

+ mio_lparen (); /* component list opening. */

40892

+ for (c = sym->components; c; c = c->next)

40893

+ {

40894

+ pointer_info *p;

40895

+ const char *comp_name;

40896

+ int n;

40897

+

40898

+ mio_lparen (); /* component opening. */

40899

+ mio_integer (&n);

40900

+ p = get_integer (n);

40901

+ if (p->u.pointer == NULL)

40902

+ associate_integer_pointer (p, c);

40903

+ mio_pool_string (&comp_name);

40904

+ gcc_assert (comp_name == c->name);

40905

+ skip_list (1); /* component end. */

40906

+ }

40907

+ mio_rparen (); /* component list closing. */

40908

+

40909

+ skip_list (1); /* symbol end. */

40910

+ }

40911

+ else

40912

+ skip_list ();

40913

+

40914

/* Some symbols do not have a namespace (eg. formal arguments),

40915

so the automatic "unique symtree" mechanism must be suppressed

40916

by marking them as referenced. */

40917

Index: gcc/fortran/io.c

40918

===================================================================

40919

--- a/src/gcc/fortran/io.c (.../tags/gcc_4_8_2_release)

40920

+++ b/src/gcc/fortran/io.c (.../branches/gcc-4_8-branch)

40921

@@ -1309,7 +1309,8 @@

40922

return MATCH_ERROR;

40923

}

40924

40925

- if (gfc_pure (NULL) && gfc_impure_variable (result->symtree->n.sym))

40926

+ bool impure = gfc_impure_variable (result->symtree->n.sym);

40927

+ if (impure && gfc_pure (NULL))

40928

{

40929

gfc_error ("Variable %s cannot be assigned in PURE procedure at %C",

40930

tag->name);

40931

@@ -1317,8 +1318,8 @@

40932

return MATCH_ERROR;

40933

}

40934

40935

- if (gfc_implicit_pure (NULL) && gfc_impure_variable (result->symtree->n.sym))

40936

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40937

+ if (impure)

40938

+ gfc_unset_implicit_pure (NULL);

40939

40940

*v = result;

40941

return MATCH_YES;

40942

@@ -1838,8 +1839,7 @@

40943

goto cleanup;

40944

}

40945

40946

- if (gfc_implicit_pure (NULL))

40947

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40948

+ gfc_unset_implicit_pure (NULL);

40949

40950

warn = (open->err || open->iostat) ? true : false;

40951

40952

@@ -2251,8 +2251,7 @@

40953

goto cleanup;

40954

}

40955

40956

- if (gfc_implicit_pure (NULL))

40957

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40958

+ gfc_unset_implicit_pure (NULL);

40959

40960

warn = (close->iostat || close->err) ? true : false;

40961

40962

@@ -2419,8 +2418,7 @@

40963

goto cleanup;

40964

}

40965

40966

- if (gfc_implicit_pure (NULL))

40967

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40968

+ gfc_unset_implicit_pure (NULL);

40969

40970

new_st.op = op;

40971

new_st.ext.filepos = fp;

40972

@@ -3276,9 +3274,8 @@

40973

"an internal file in a PURE procedure",

40974

io_kind_name (k));

40975

40976

- if (gfc_implicit_pure (NULL) && (k == M_READ || k == M_WRITE))

40977

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40978

-

40979

+ if (k == M_READ || k == M_WRITE)

40980

+ gfc_unset_implicit_pure (NULL);

40981

}

40982

40983

if (k != M_READ)

40984

@@ -3809,8 +3806,7 @@

40985

return MATCH_ERROR;

40986

}

40987

40988

- if (gfc_implicit_pure (NULL))

40989

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

40990

+ gfc_unset_implicit_pure (NULL);

40991

40992

return MATCH_YES;

40993

}

40994

@@ -3969,8 +3965,7 @@

40995

return MATCH_ERROR;

40996

}

40997

40998

- if (gfc_implicit_pure (NULL))

40999

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41000

+ gfc_unset_implicit_pure (NULL);

41001

41002

new_st.block = gfc_get_code ();

41003

new_st.block->op = EXEC_IOLENGTH;

41004

@@ -4023,8 +4018,7 @@

41005

goto cleanup;

41006

}

41007

41008

- if (gfc_implicit_pure (NULL))

41009

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41010

+ gfc_unset_implicit_pure (NULL);

41011

41012

if (inquire->id != NULL && inquire->pending == NULL)

41013

{

41014

@@ -4212,8 +4206,7 @@

41015

goto cleanup;

41016

}

41017

41018

- if (gfc_implicit_pure (NULL))

41019

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41020

+ gfc_unset_implicit_pure (NULL);

41021

41022

new_st.op = EXEC_WAIT;

41023

new_st.ext.wait = wait;

41024

Index: gcc/fortran/frontend-passes.c

41025

===================================================================

41026

--- a/src/gcc/fortran/frontend-passes.c (.../tags/gcc_4_8_2_release)

41027

+++ b/src/gcc/fortran/frontend-passes.c (.../branches/gcc-4_8-branch)

41028

@@ -623,12 +623,35 @@

41029

to insert statements as needed. */

41030

41031

static int

41032

-cfe_code (gfc_code **c, int *walk_subtrees ATTRIBUTE_UNUSED,

41033

- void *data ATTRIBUTE_UNUSED)

41034

+cfe_code (gfc_code **c, int *walk_subtrees, void *data ATTRIBUTE_UNUSED)

41035

{

41036

current_code = c;

41037

inserted_block = NULL;

41038

changed_statement = NULL;

41039

+

41040

+ /* Do not do anything inside a WHERE statement; scalar assignments, BLOCKs

41041

+ and allocation on assigment are prohibited inside WHERE, and finally

41042

+ masking an expression would lead to wrong-code when replacing

41043

+

41044

+ WHERE (a>0)

41045

+ b = sum(foo(a) + foo(a))

41046

+ END WHERE

41047

+

41048

+ with

41049

+

41050

+ WHERE (a > 0)

41051

+ tmp = foo(a)

41052

+ b = sum(tmp + tmp)

41053

+ END WHERE

41054

+*/

41055

+

41056

+ if ((*c)->op == EXEC_WHERE)

41057

+ {

41058

+ *walk_subtrees = 0;

41059

+ return 0;

41060

+ }

41061

+

41062

+

41063

return 0;

41064

}

41065

41066

@@ -1214,7 +1237,9 @@

41067

/* Replace A // B < A // C with B < C, and A // B < C // B

41068

with A < C. */

41069

if (op1->ts.type == BT_CHARACTER && op2->ts.type == BT_CHARACTER

41070

+ && op1->expr_type == EXPR_OP

41071

&& op1->value.op.op == INTRINSIC_CONCAT

41072

+ && op2->expr_type == EXPR_OP

41073

&& op2->value.op.op == INTRINSIC_CONCAT)

41074

{

41075

gfc_expr *op1_left = op1->value.op.op1;

41076

Index: gcc/fortran/resolve.c

41077

===================================================================

41078

--- a/src/gcc/fortran/resolve.c (.../tags/gcc_4_8_2_release)

41079

+++ b/src/gcc/fortran/resolve.c (.../branches/gcc-4_8-branch)

41080

@@ -1,5 +1,5 @@

41081

/* Perform type resolution on the various structures.

41082

41083

41084

Contributed by Andy Vaught

41085

41086

This file is part of GCC.

41087

@@ -1259,9 +1259,10 @@

41088

}

41089

41090

/* F2003, C1272 (3). */

41091

- if (gfc_pure (NULL) && cons->expr->expr_type == EXPR_VARIABLE

41092

- && (gfc_impure_variable (cons->expr->symtree->n.sym)

41093

- || gfc_is_coindexed (cons->expr)))

41094

+ bool impure = cons->expr->expr_type == EXPR_VARIABLE

41095

+ && (gfc_impure_variable (cons->expr->symtree->n.sym)

41096

+ || gfc_is_coindexed (cons->expr));

41097

+ if (impure && gfc_pure (NULL))

41098

{

41099

t = FAILURE;

41100

gfc_error ("Invalid expression in the structure constructor for "

41101

@@ -1269,12 +1270,8 @@

41102

comp->name, &cons->expr->where);

41103

}

41104

41105

- if (gfc_implicit_pure (NULL)

41106

- && cons->expr->expr_type == EXPR_VARIABLE

41107

- && (gfc_impure_variable (cons->expr->symtree->n.sym)

41108

- || gfc_is_coindexed (cons->expr)))

41109

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41110

-

41111

+ if (impure)

41112

+ gfc_unset_implicit_pure (NULL);

41113

}

41114

41115

return t;

41116

@@ -3295,8 +3292,7 @@

41117

t = FAILURE;

41118

}

41119

41120

- if (gfc_implicit_pure (NULL))

41121

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41122

+ gfc_unset_implicit_pure (NULL);

41123

}

41124

41125

/* Functions without the RECURSIVE attribution are not allowed to

41126

@@ -3361,8 +3357,7 @@

41127

gfc_error ("Subroutine call to '%s' at %L is not PURE", sym->name,

41128

&c->loc);

41129

41130

- if (gfc_implicit_pure (NULL))

41131

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41132

+ gfc_unset_implicit_pure (NULL);

41133

}

41134

41135

41136

@@ -8705,10 +8700,11 @@

41137

&& exp->value.op.op == INTRINSIC_PARENTHESES)

41138

exp = exp->value.op.op1;

41139

41140

- if (exp && exp->expr_type == EXPR_NULL && exp->ts.type == BT_UNKNOWN)

41141

+ if (exp && exp->expr_type == EXPR_NULL

41142

+ && code->ext.dt)

41143

{

41144

- gfc_error ("NULL intrinsic at %L in data transfer statement requires "

41145

- "MOLD=", &exp->where);

41146

+ gfc_error ("Invalid context for NULL () intrinsic at %L",

41147

+ &exp->where);

41148

return;

41149

}

41150

41151

@@ -9612,7 +9608,7 @@

41152

if (lhs->expr_type == EXPR_VARIABLE

41153

&& lhs->symtree->n.sym != gfc_current_ns->proc_name

41154

&& lhs->symtree->n.sym->ns != gfc_current_ns)

41155

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41156

+ gfc_unset_implicit_pure (NULL);

41157

41158

if (lhs->ts.type == BT_DERIVED

41159

&& lhs->expr_type == EXPR_VARIABLE

41160

@@ -9620,11 +9616,11 @@

41161

&& rhs->expr_type == EXPR_VARIABLE

41162

&& (gfc_impure_variable (rhs->symtree->n.sym)

41163

|| gfc_is_coindexed (rhs)))

41164

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41165

+ gfc_unset_implicit_pure (NULL);

41166

41167

/* Fortran 2008, C1283. */

41168

if (gfc_is_coindexed (lhs))

41169

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41170

+ gfc_unset_implicit_pure (NULL);

41171

}

41172

41173

/* F03:7.4.1.2. */

41174

@@ -11057,7 +11053,7 @@

41175

init_expr = NULL;

41176

}

41177

if (!init_expr && gfc_option.flag_init_character == GFC_INIT_CHARACTER_ON

41178

- && sym->ts.u.cl->length)

41179

+ && sym->ts.u.cl->length && gfc_option.flag_max_stack_var_size != 0)

41180

{

41181

gfc_actual_arglist *arg;

41182

init_expr = gfc_get_expr ();

41183

@@ -11877,6 +11873,7 @@

41184

{

41185

gfc_symbol *sym1, *sym2;

41186

const char *pass1, *pass2;

41187

+ gfc_formal_arglist *dummy_args;

41188

41189

gcc_assert (t1->specific && t2->specific);

41190

gcc_assert (!t1->specific->is_generic);

41191

@@ -11899,19 +11896,33 @@

41192

return FAILURE;

41193

}

41194

41195

- /* Compare the interfaces. */

41196

+ /* Determine PASS arguments. */

41197

if (t1->specific->nopass)

41198

pass1 = NULL;

41199

else if (t1->specific->pass_arg)

41200

pass1 = t1->specific->pass_arg;

41201

else

41202

- pass1 = gfc_sym_get_dummy_args (t1->specific->u.specific->n.sym)->sym->name;

41203

+ {

41204

+ dummy_args = gfc_sym_get_dummy_args (t1->specific->u.specific->n.sym);

41205

+ if (dummy_args)

41206

+ pass1 = dummy_args->sym->name;

41207

+ else

41208

+ pass1 = NULL;

41209

+ }

41210

if (t2->specific->nopass)

41211

pass2 = NULL;

41212

else if (t2->specific->pass_arg)

41213

pass2 = t2->specific->pass_arg;

41214

else

41215

- pass2 = gfc_sym_get_dummy_args (t2->specific->u.specific->n.sym)->sym->name;

41216

+ {

41217

+ dummy_args = gfc_sym_get_dummy_args (t2->specific->u.specific->n.sym);

41218

+ if (dummy_args)

41219

+ pass2 = dummy_args->sym->name;

41220

+ else

41221

+ pass2 = NULL;

41222

+ }

41223

+

41224

+ /* Compare the interfaces. */

41225

if (gfc_compare_interfaces (sym1, sym2, sym2->name, !t1->is_operator, 0,

41226

NULL, 0, pass1, pass2))

41227

{

41228

@@ -12425,9 +12436,6 @@

41229

resolve_bindings_derived = derived;

41230

resolve_bindings_result = SUCCESS;

41231

41232

- /* Make sure the vtab has been generated. */

41233

- gfc_find_derived_vtab (derived);

41234

-

41235

if (derived->f2k_derived->tb_sym_root)

41236

gfc_traverse_symtree (derived->f2k_derived->tb_sym_root,

41237

&resolve_typebound_procedure);

41238

@@ -13256,7 +13264,8 @@

41239

if (sym->attr.flavor == FL_UNKNOWN

41240

|| (sym->attr.flavor == FL_PROCEDURE && !sym->attr.intrinsic

41241

&& !sym->attr.generic && !sym->attr.external

41242

- && sym->attr.if_source == IFSRC_UNKNOWN))

41243

+ && sym->attr.if_source == IFSRC_UNKNOWN

41244

+ && sym->ts.type == BT_UNKNOWN))

41245

{

41246

41247

/* If we find that a flavorless symbol is an interface in one of the

41248

@@ -14376,6 +14385,33 @@

41249

}

41250

41251

41252

+void

41253

+gfc_unset_implicit_pure (gfc_symbol *sym)

41254

+{

41255

+ gfc_namespace *ns;

41256

+

41257

+ if (sym == NULL)

41258

+ {

41259

+ /* Check if the current procedure is implicit_pure. Walk up

41260

+ the procedure list until we find a procedure. */

41261

+ for (ns = gfc_current_ns; ns; ns = ns->parent)

41262

+ {

41263

+ sym = ns->proc_name;

41264

+ if (sym == NULL)

41265

+ return;

41266

+

41267

+ if (sym->attr.flavor == FL_PROCEDURE)

41268

+ break;

41269

+ }

41270

+ }

41271

+

41272

+ if (sym->attr.flavor == FL_PROCEDURE)

41273

+ sym->attr.implicit_pure = 0;

41274

+ else

41275

+ sym->attr.pure = 0;

41276

+}

41277

+

41278

+

41279

/* Test whether the current procedure is elemental or not. */

41280

41281

int

41282

Index: gcc/fortran/trans-io.c

41283

===================================================================

41284

--- a/src/gcc/fortran/trans-io.c (.../tags/gcc_4_8_2_release)

41285

+++ b/src/gcc/fortran/trans-io.c (.../branches/gcc-4_8-branch)

41286

@@ -243,16 +243,16 @@

41287

41288

/* The code to generate the error. */

41289

gfc_start_block (&block);

41290

-

41291

+

41292

arg1 = gfc_build_addr_expr (NULL_TREE, var);

41293

-

41294

+

41295

arg2 = build_int_cst (integer_type_node, error_code),

41296

-

41297

+

41298

asprintf (&message, "%s", _(msgid));

41299

arg3 = gfc_build_addr_expr (pchar_type_node,

41300

gfc_build_localized_cstring_const (message));

41301

free (message);

41302

-

41303

+

41304

tmp = build_call_expr_loc (input_location,

41305

gfor_fndecl_generate_error, 3, arg1, arg2, arg3);

41306

41307

@@ -521,7 +521,7 @@

41308

gfc_trans_io_runtime_check (cond, var, LIBERROR_BAD_UNIT,

41309

"Unit number in I/O statement too small",

41310

&se.pre);

41311

-

41312

+

41313

/* UNIT numbers should be less than the max. */

41314

val = gfc_conv_mpz_to_tree (gfc_integer_kinds[i].huge, 4);

41315

cond = fold_build2_loc (input_location, GT_EXPR, boolean_type_node,

41316

@@ -1000,7 +1000,7 @@

41317

if (p->convert)

41318

mask |= set_string (&block, &post_block, var, IOPARM_open_convert,

41319

p->convert);

41320

-

41321

+

41322

if (p->newunit)

41323

mask |= set_parameter_ref (&block, &post_block, var, IOPARM_open_newunit,

41324

p->newunit);

41325

@@ -1234,7 +1234,7 @@

41326

{

41327

mask |= set_parameter_ref (&block, &post_block, var, IOPARM_inquire_exist,

41328

p->exist);

41329

-

41330

+

41331

if (p->unit && !p->iostat)

41332

{

41333

p->iostat = create_dummy_iostat ();

41334

@@ -1322,7 +1322,7 @@

41335

if (p->pad)

41336

mask |= set_string (&block, &post_block, var, IOPARM_inquire_pad,

41337

p->pad);

41338

-

41339

+

41340

if (p->convert)

41341

mask |= set_string (&block, &post_block, var, IOPARM_inquire_convert,

41342

p->convert);

41343

@@ -1547,7 +1547,7 @@

41344

tree dtype;

41345

tree dt_parm_addr;

41346

tree decl = NULL_TREE;

41347

- int n_dim;

41348

+ int n_dim;

41349

int itype;

41350

int rank = 0;

41351

41352

@@ -2032,7 +2032,7 @@

41353

if (gfc_notification_std (GFC_STD_GNU) != SILENT)

41354

{

41355

gfc_error_now ("Derived type '%s' at %L has PRIVATE components",

41356

- ts->u.derived->name, code != NULL ? &(code->loc) :

41357

+ ts->u.derived->name, code != NULL ? &(code->loc) :

41358

&gfc_current_locus);

41359

return;

41360

}

41361

@@ -2041,7 +2041,7 @@

41362

ts->kind = ts->u.derived->ts.kind;

41363

ts->f90_type = ts->u.derived->ts.f90_type;

41364

}

41365

-

41366

+

41367

kind = ts->kind;

41368

function = NULL;

41369

arg2 = NULL;

41370

@@ -2123,7 +2123,7 @@

41371

function = iocall[IOCALL_X_CHARACTER_WIDE];

41372

else

41373

function = iocall[IOCALL_X_CHARACTER_WIDE_WRITE];

41374

-

41375

+

41376

tmp = gfc_build_addr_expr (NULL_TREE, dt_parm);

41377

tmp = build_call_expr_loc (input_location,

41378

function, 4, tmp, addr_expr, arg2, arg3);

41379

@@ -2158,6 +2158,12 @@

41380

expr = build_fold_indirect_ref_loc (input_location,

41381

expr);

41382

41383

+ /* Make sure that the derived type has been built. An external

41384

+ function, if only referenced in an io statement requires this

41385

+ check (see PR58771). */

41386

+ if (ts->u.derived->backend_decl == NULL_TREE)

41387

+ tmp = gfc_typenode_for_spec (ts);

41388

+

41389

for (c = ts->u.derived->components; c; c = c->next)

41390

{

41391

field = c->backend_decl;

41392

Index: gcc/fortran/trans-decl.c

41393

===================================================================

41394

--- a/src/gcc/fortran/trans-decl.c (.../tags/gcc_4_8_2_release)

41395

+++ b/src/gcc/fortran/trans-decl.c (.../branches/gcc-4_8-branch)

41396

@@ -1013,6 +1013,10 @@

41397

TREE_STATIC (decl) = 0;

41398

DECL_EXTERNAL (decl) = 0;

41399

41400

+ /* Avoid uninitialized warnings for optional dummy arguments. */

41401

+ if (sym->attr.optional)

41402

+ TREE_NO_WARNING (decl) = 1;

41403

+

41404

/* We should never get deferred shape arrays here. We used to because of

41405

frontend bugs. */

41406

gcc_assert (sym->as->type != AS_DEFERRED);

41407

@@ -1358,9 +1362,10 @@

41408

41409

if (sym->attr.flavor == FL_PROCEDURE)

41410

{

41411

- /* Catch function declarations. Only used for actual parameters,

41412

+ /* Catch functions. Only used for actual parameters,

41413

procedure pointers and procptr initialization targets. */

41414

- if (sym->attr.external || sym->attr.use_assoc || sym->attr.intrinsic)

41415

+ if (sym->attr.external || sym->attr.use_assoc || sym->attr.intrinsic

41416

+ || sym->attr.if_source != IFSRC_DECL)

41417

{

41418

decl = gfc_get_extern_function_decl (sym);

41419

gfc_set_decl_location (decl, &sym->declared_at);

41420

Index: gcc/fortran/match.c

41421

===================================================================

41422

--- a/src/gcc/fortran/match.c (.../tags/gcc_4_8_2_release)

41423

+++ b/src/gcc/fortran/match.c (.../branches/gcc-4_8-branch)

41424

@@ -1753,8 +1753,7 @@

41425

return MATCH_ERROR;

41426

}

41427

41428

- if (gfc_implicit_pure (NULL))

41429

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41430

+ gfc_unset_implicit_pure (NULL);

41431

41432

if (gfc_notify_std (GFC_STD_F2008, "CRITICAL statement at %C")

41433

== FAILURE)

41434

@@ -2683,8 +2682,7 @@

41435

goto cleanup;

41436

}

41437

41438

- if (gfc_implicit_pure (NULL))

41439

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41440

+ gfc_unset_implicit_pure (NULL);

41441

41442

if (st == ST_STOP && gfc_find_state (COMP_CRITICAL) == SUCCESS)

41443

{

41444

@@ -2824,8 +2822,7 @@

41445

return MATCH_ERROR;

41446

}

41447

41448

- if (gfc_implicit_pure (NULL))

41449

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41450

+ gfc_unset_implicit_pure (NULL);

41451

41452

if (gfc_option.coarray == GFC_FCOARRAY_NONE)

41453

{

41454

@@ -3020,8 +3017,7 @@

41455

return MATCH_ERROR;

41456

}

41457

41458

- if (gfc_implicit_pure (NULL))

41459

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41460

+ gfc_unset_implicit_pure (NULL);

41461

41462

if (gfc_notify_std (GFC_STD_F2008, "SYNC statement at %C")

41463

== FAILURE)

41464

@@ -3500,15 +3496,15 @@

41465

if (gfc_check_do_variable (tail->expr->symtree))

41466

goto cleanup;

41467

41468

- if (gfc_pure (NULL) && gfc_impure_variable (tail->expr->symtree->n.sym))

41469

+ bool impure = gfc_impure_variable (tail->expr->symtree->n.sym);

41470

+ if (impure && gfc_pure (NULL))

41471

{

41472

gfc_error ("Bad allocate-object at %C for a PURE procedure");

41473

goto cleanup;

41474

}

41475

41476

- if (gfc_implicit_pure (NULL)

41477

- && gfc_impure_variable (tail->expr->symtree->n.sym))

41478

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41479

+ if (impure)

41480

+ gfc_unset_implicit_pure (NULL);

41481

41482

if (tail->expr->ts.deferred)

41483

{

41484

@@ -3890,14 +3886,15 @@

41485

41486

sym = tail->expr->symtree->n.sym;

41487

41488

- if (gfc_pure (NULL) && gfc_impure_variable (sym))

41489

+ bool impure = gfc_impure_variable (sym);

41490

+ if (impure && gfc_pure (NULL))

41491

{

41492

gfc_error ("Illegal allocate-object at %C for a PURE procedure");

41493

goto cleanup;

41494

}

41495

41496

- if (gfc_implicit_pure (NULL) && gfc_impure_variable (sym))

41497

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41498

+ if (impure)

41499

+ gfc_unset_implicit_pure (NULL);

41500

41501

if (gfc_is_coarray (tail->expr)

41502

&& gfc_find_state (COMP_DO_CONCURRENT) == SUCCESS)

41503

Index: gcc/fortran/parse.c

41504

===================================================================

41505

--- a/src/gcc/fortran/parse.c (.../tags/gcc_4_8_2_release)

41506

+++ b/src/gcc/fortran/parse.c (.../branches/gcc-4_8-branch)

41507

@@ -550,8 +550,7 @@

41508

return ST_NONE;

41509

}

41510

41511

- if (gfc_implicit_pure (NULL))

41512

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

41513

+ gfc_unset_implicit_pure (NULL);

41514

41515

old_locus = gfc_current_locus;

41516

41517

Index: gcc/fortran/check.c

41518

===================================================================

41519

--- a/src/gcc/fortran/check.c (.../tags/gcc_4_8_2_release)

41520

+++ b/src/gcc/fortran/check.c (.../branches/gcc-4_8-branch)

41521

@@ -3208,7 +3208,7 @@

41522

"than %d elements", &shape->where, GFC_MAX_DIMENSIONS);

41523

return FAILURE;

41524

}

41525

- else if (shape->expr_type == EXPR_ARRAY)

41526

+ else if (shape->expr_type == EXPR_ARRAY && gfc_is_constant_expr (shape))

41527

{

41528

gfc_expr *e;

41529

int i, extent;

41530

Index: gcc/fortran/primary.c

41531

===================================================================

41532

--- a/src/gcc/fortran/primary.c (.../tags/gcc_4_8_2_release)

41533

+++ b/src/gcc/fortran/primary.c (.../branches/gcc-4_8-branch)

41534

@@ -2252,7 +2252,7 @@

41535

case EXPR_FUNCTION:

41536

gfc_clear_attr (&attr);

41537

41538

- if (e->value.function.esym != NULL)

41539

+ if (e->value.function.esym && e->value.function.esym->result)

41540

{

41541

gfc_symbol *sym = e->value.function.esym->result;

41542

attr = sym->attr;

41543

@@ -2540,7 +2540,8 @@

41544

if (parent && !comp)

41545

break;

41546

41547

- actual = actual->next;

41548

+ if (actual)

41549

+ actual = actual->next;

41550

}

41551

41552

if (build_actual_constructor (&comp_head, &ctor_head, sym) == FAILURE)

41553

Index: gcc/fortran/trans-intrinsic.c

41554

===================================================================

41555

--- a/src/gcc/fortran/trans-intrinsic.c (.../tags/gcc_4_8_2_release)

41556

+++ b/src/gcc/fortran/trans-intrinsic.c (.../branches/gcc-4_8-branch)

41557

@@ -4684,9 +4684,11 @@

41558

static void

41559

gfc_conv_intrinsic_ichar (gfc_se * se, gfc_expr * expr)

41560

{

41561

- tree args[2], type, pchartype;

41562

+ tree args[3], type, pchartype;

41563

+ int nargs;

41564

41565

- gfc_conv_intrinsic_function_args (se, expr, args, 2);

41566

+ nargs = gfc_intrinsic_argument_list_length (expr);

41567

+ gfc_conv_intrinsic_function_args (se, expr, args, nargs);

41568

gcc_assert (POINTER_TYPE_P (TREE_TYPE (args[1])));

41569

pchartype = gfc_get_pchar_type (expr->value.function.actual->expr->ts.kind);

41570

args[1] = fold_build1_loc (input_location, NOP_EXPR, pchartype, args[1]);

41571

Index: gcc/fortran/simplify.c

41572

===================================================================

41573

--- a/src/gcc/fortran/simplify.c (.../tags/gcc_4_8_2_release)

41574

+++ b/src/gcc/fortran/simplify.c (.../branches/gcc-4_8-branch)

41575

@@ -5528,7 +5528,7 @@

41576

if (e == &gfc_bad_expr || range_check (e, "SHAPE") == &gfc_bad_expr)

41577

{

41578

gfc_free_expr (result);

41579

- if (t)

41580

+ if (t == SUCCESS)

41581

gfc_clear_shape (shape, source->rank);

41582

return &gfc_bad_expr;

41583

}

41584

@@ -5536,7 +5536,7 @@

41585

gfc_constructor_append_expr (&result->value.constructor, e, NULL);

41586

}

41587

41588

- if (t)

41589

+ if (t == SUCCESS)

41590

gfc_clear_shape (shape, source->rank);

41591

41592

return result;

41593

Index: gcc/configure.ac

41594

===================================================================

41595

--- a/src/gcc/configure.ac (.../tags/gcc_4_8_2_release)

41596

+++ b/src/gcc/configure.ac (.../branches/gcc-4_8-branch)

41597

@@ -1516,13 +1516,16 @@

41598

/* | [A-Za-z]:[\\/]* ) realsrcdir=${srcdir};;

41599

*) realsrcdir=../${srcdir};;

41600

esac

41601

- saved_CFLAGS="${CFLAGS}"

41602

+ # Clearing GMPINC is necessary to prevent host headers being

41603

+ # used by the build compiler. Defining GENERATOR_FILE stops

41604

+ # system.h from including gmp.h.

41605

CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \

41606

- LDFLAGS="${LDFLAGS_FOR_BUILD}" \

41607

+ CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \

41608

+ LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \

41609

+ GMPINC="" CPPFLAGS="${CPPFLAGS} -DGENERATOR_FILE" \

41610

${realsrcdir}/configure \

41611

--enable-languages=${enable_languages-all} \

41612

--target=$target_alias --host=$build_alias --build=$build_alias

41613

- CFLAGS="${saved_CFLAGS}"

41614

41615

# We just finished tests for the build machine, so rename

41616

# the file auto-build.h in the gcc directory.

41617

@@ -1887,6 +1890,7 @@

41618

if test x$build != x$host || test "x$coverage_flags" != x

41619

then

41620

BUILD_CFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CFLAGS_FOR_BUILD)'

41621

+ BUILD_CXXFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CXXFLAGS_FOR_BUILD)'

41622

BUILD_LDFLAGS='$(LDFLAGS_FOR_BUILD)'

41623

fi

41624

41625

@@ -3611,6 +3615,19 @@

41626

kasumi_fi_xor %f46, %f48, %f50, %f52],,

41627

[AC_DEFINE(HAVE_AS_SPARC4, 1,

41628

[Define if your assembler supports SPARC4 instructions.])])

41629

+

41630

+ gcc_GAS_CHECK_FEATURE([LEON instructions],

41631

+ gcc_cv_as_sparc_leon,,

41632

+ [-Aleon],

41633

+ [.text

41634

+ .register %g2, #scratch

41635

+ .register %g3, #scratch

41636

+ .align 4

41637

+ smac %g2, %g3, %g1

41638

+ umac %g2, %g3, %g1

41639

+ cas [[%g2]], %g3, %g1],,

41640

+ [AC_DEFINE(HAVE_AS_LEON, 1,

41641

+ [Define if your assembler supports LEON instructions.])])

41642

;;

41643

41644

changequote(,)dnl

41645

@@ -3749,8 +3766,13 @@

41646

41647

# These two are used unconditionally by i386.[ch]; it is to be defined

41648

# to 1 if the feature is present, 0 otherwise.

41649

+ as_ix86_gotoff_in_data_opt=

41650

+ if test x$gas = xyes; then

41651

+ as_ix86_gotoff_in_data_opt="--32"

41652

+ fi

41653

gcc_GAS_CHECK_FEATURE([GOTOFF in data],

41654

- gcc_cv_as_ix86_gotoff_in_data, [2,11,0],,

41655

+ gcc_cv_as_ix86_gotoff_in_data, [2,11,0],

41656

+ [$as_ix86_gotoff_in_data_opt],

41657

[ .text

41658

.L0:

41659

nop

41660

@@ -3772,6 +3794,12 @@

41661

[AC_DEFINE(HAVE_AS_IX86_REP_LOCK_PREFIX, 1,

41662

[Define if the assembler supports 'rep <insn>, lock <insn>'.])])

41663

41664

+ gcc_GAS_CHECK_FEATURE([ud2 mnemonic],

41665

+ gcc_cv_as_ix86_ud2,,,

41666

+ [ud2],,

41667

+ [AC_DEFINE(HAVE_AS_IX86_UD2, 1,

41668

+ [Define if your assembler supports the 'ud2' mnemonic.])])

41669

+

41670

gcc_GAS_CHECK_FEATURE([R_386_TLS_GD_PLT reloc],

41671

gcc_cv_as_ix86_tlsgdplt,,,

41672

[call tls_gd@tlsgdplt],

41673

@@ -5193,15 +5221,15 @@

41674

AC_MSG_CHECKING([for exported symbols])

41675

if test "x$export_sym_check" != x; then

41676

echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c

41677

- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1

41678

- if $export_sym_check conftest | grep foobar > /dev/null; then

41679

+ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1

41680

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

41681

: # No need to use a flag

41682

AC_MSG_RESULT([yes])

41683

else

41684

AC_MSG_RESULT([yes])

41685

AC_MSG_CHECKING([for -rdynamic])

41686

- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1

41687

- if $export_sym_check conftest | grep foobar > /dev/null; then

41688

+ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1

41689

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

41690

plugin_rdynamic=yes

41691

pluginlibs="-rdynamic"

41692

else

41693

Index: gcc/function.c

41694

===================================================================

41695

--- a/src/gcc/function.c (.../tags/gcc_4_8_2_release)

41696

+++ b/src/gcc/function.c (.../branches/gcc-4_8-branch)

41697

@@ -2507,6 +2507,7 @@

41698

}

41699

41700

locate_and_pad_parm (data->promoted_mode, data->passed_type, in_regs,

41701

+ all->reg_parm_stack_space,

41702

entry_parm ? data->partial : 0, current_function_decl,

41703

&all->stack_args_size, &data->locate);

41704

41705

@@ -3485,11 +3486,7 @@

41706

/* Adjust function incoming argument size for alignment and

41707

minimum length. */

41708

41709

-#ifdef REG_PARM_STACK_SPACE

41710

- crtl->args.size = MAX (crtl->args.size,

41711

- REG_PARM_STACK_SPACE (fndecl));

41712

-#endif

41713

-

41714

+ crtl->args.size = MAX (crtl->args.size, all.reg_parm_stack_space);

41715

crtl->args.size = CEIL_ROUND (crtl->args.size,

41716

PARM_BOUNDARY / BITS_PER_UNIT);

41717

41718

@@ -3693,6 +3690,9 @@

41719

IN_REGS is nonzero if the argument will be passed in registers. It will

41720

never be set if REG_PARM_STACK_SPACE is not defined.

41721

41722

+ REG_PARM_STACK_SPACE is the number of bytes of stack space reserved

41723

+ for arguments which are passed in registers.

41724

+

41725

FNDECL is the function in which the argument was defined.

41726

41727

There are two types of rounding that are done. The first, controlled by

41728

@@ -3713,7 +3713,8 @@

41729

41730

void

41731

locate_and_pad_parm (enum machine_mode passed_mode, tree type, int in_regs,

41732

- int partial, tree fndecl ATTRIBUTE_UNUSED,

41733

+ int reg_parm_stack_space, int partial,

41734

+ tree fndecl ATTRIBUTE_UNUSED,

41735

struct args_size *initial_offset_ptr,

41736

struct locate_and_pad_arg_data *locate)

41737

{

41738

@@ -3720,12 +3721,8 @@

41739

tree sizetree;

41740

enum direction where_pad;

41741

unsigned int boundary, round_boundary;

41742

- int reg_parm_stack_space = 0;

41743

int part_size_in_regs;

41744

41745

-#ifdef REG_PARM_STACK_SPACE

41746

- reg_parm_stack_space = REG_PARM_STACK_SPACE (fndecl);

41747

-

41748

/* If we have found a stack parm before we reach the end of the

41749

area reserved for registers, skip that area. */

41750

if (! in_regs)

41751

@@ -3743,7 +3740,6 @@

41752

initial_offset_ptr->constant = reg_parm_stack_space;

41753

}

41754

}

41755

-#endif /* REG_PARM_STACK_SPACE */

41756

41757

part_size_in_regs = (reg_parm_stack_space == 0 ? partial : 0);

41758

41759

@@ -3806,11 +3802,7 @@

41760

41761

locate->slot_offset.constant += part_size_in_regs;

41762

41763

- if (!in_regs

41764

-#ifdef REG_PARM_STACK_SPACE

41765

- || REG_PARM_STACK_SPACE (fndecl) > 0

41766

-#endif

41767

- )

41768

+ if (!in_regs || reg_parm_stack_space > 0)

41769

pad_to_arg_alignment (&locate->slot_offset, boundary,

41770

&locate->alignment_pad);

41771

41772

@@ -3830,11 +3822,7 @@

41773

pad_below (&locate->offset, passed_mode, sizetree);

41774

41775

#else /* !ARGS_GROW_DOWNWARD */

41776

- if (!in_regs

41777

-#ifdef REG_PARM_STACK_SPACE

41778

- || REG_PARM_STACK_SPACE (fndecl) > 0

41779

-#endif

41780

- )

41781

+ if (!in_regs || reg_parm_stack_space > 0)

41782

pad_to_arg_alignment (initial_offset_ptr, boundary,

41783

&locate->alignment_pad);

41784

locate->slot_offset = *initial_offset_ptr;

41785

@@ -5093,6 +5081,7 @@

41786

amount. BLKmode results are handled using the group load/store

41787

machinery. */

41788

if (TYPE_MODE (TREE_TYPE (decl_result)) != BLKmode

41789

+ && REG_P (real_decl_rtl)

41790

&& targetm.calls.return_in_msb (TREE_TYPE (decl_result)))

41791

{

41792

emit_move_insn (gen_rtx_REG (GET_MODE (decl_rtl),

41793

@@ -5509,22 +5498,45 @@

41794

except for any part that overlaps SRC (next loop). */

41795

bb_uses = &DF_LR_BB_INFO (bb)->use;

41796

bb_defs = &DF_LR_BB_INFO (bb)->def;

41797

- for (i = dregno; i < end_dregno; i++)

41798

+ if (df_live)

41799

{

41800

- if (REGNO_REG_SET_P (bb_uses, i) || REGNO_REG_SET_P (bb_defs, i))

41801

- next_block = NULL;

41802

- CLEAR_REGNO_REG_SET (live_out, i);

41803

- CLEAR_REGNO_REG_SET (live_in, i);

41804

+ for (i = dregno; i < end_dregno; i++)

41805

+ {

41806

+ if (REGNO_REG_SET_P (bb_uses, i) || REGNO_REG_SET_P (bb_defs, i)

41807

+ || REGNO_REG_SET_P (&DF_LIVE_BB_INFO (bb)->gen, i))

41808

+ next_block = NULL;

41809

+ CLEAR_REGNO_REG_SET (live_out, i);

41810

+ CLEAR_REGNO_REG_SET (live_in, i);

41811

+ }

41812

+

41813

+ /* Check whether BB clobbers SRC. We need to add INSN to BB if so.

41814

+ Either way, SRC is now live on entry. */

41815

+ for (i = sregno; i < end_sregno; i++)

41816

+ {

41817

+ if (REGNO_REG_SET_P (bb_defs, i)

41818

+ || REGNO_REG_SET_P (&DF_LIVE_BB_INFO (bb)->gen, i))

41819

+ next_block = NULL;

41820

+ SET_REGNO_REG_SET (live_out, i);

41821

+ SET_REGNO_REG_SET (live_in, i);

41822

+ }

41823

}

41824

+ else

41825

+ {

41826

+ /* DF_LR_BB_INFO (bb)->def does not comprise the DF_REF_PARTIAL and

41827

+ DF_REF_CONDITIONAL defs. So if DF_LIVE doesn't exist, i.e.

41828

+ at -O1, just give up searching NEXT_BLOCK. */

41829

+ next_block = NULL;

41830

+ for (i = dregno; i < end_dregno; i++)

41831

+ {

41832

+ CLEAR_REGNO_REG_SET (live_out, i);

41833

+ CLEAR_REGNO_REG_SET (live_in, i);

41834

+ }

41835

41836

- /* Check whether BB clobbers SRC. We need to add INSN to BB if so.

41837

- Either way, SRC is now live on entry. */

41838

- for (i = sregno; i < end_sregno; i++)

41839

- {

41840

- if (REGNO_REG_SET_P (bb_defs, i))

41841

- next_block = NULL;

41842

- SET_REGNO_REG_SET (live_out, i);

41843

- SET_REGNO_REG_SET (live_in, i);

41844

+ for (i = sregno; i < end_sregno; i++)

41845

+ {

41846

+ SET_REGNO_REG_SET (live_out, i);

41847

+ SET_REGNO_REG_SET (live_in, i);

41848

+ }

41849

}

41850

41851

/* If we don't need to add the move to BB, look for a single

41852

Index: gcc/print-rtl.c

41853

===================================================================

41854

--- a/src/gcc/print-rtl.c (.../tags/gcc_4_8_2_release)

41855

+++ b/src/gcc/print-rtl.c (.../branches/gcc-4_8-branch)

41856

@@ -582,6 +582,8 @@

41857

41858

if (MEM_EXPR (in_rtx))

41859

print_mem_expr (outfile, MEM_EXPR (in_rtx));

41860

+ else

41861

+ fputc (' ', outfile);

41862

41863

if (MEM_OFFSET_KNOWN_P (in_rtx))

41864

fprintf (outfile, "+" HOST_WIDE_INT_PRINT_DEC, MEM_OFFSET (in_rtx));

41865

Index: gcc/tree-vectorizer.h

41866

===================================================================

41867

--- a/src/gcc/tree-vectorizer.h (.../tags/gcc_4_8_2_release)

41868

+++ b/src/gcc/tree-vectorizer.h (.../branches/gcc-4_8-branch)

41869

@@ -542,6 +542,10 @@

41870

is 1. */

41871

unsigned int gap;

41872

41873

+ /* The minimum negative dependence distance this stmt participates in

41874

+ or zero if none. */

41875

+ unsigned int min_neg_dist;

41876

+

41877

/* Not all stmts in the loop need to be vectorized. e.g, the increment

41878

of the loop induction variable and computation of array indexes. relevant

41879

indicates whether the stmt needs to be vectorized. */

41880

@@ -593,6 +597,7 @@

41881

#define STMT_VINFO_GROUP_READ_WRITE_DEPENDENCE(S) (S)->read_write_dep

41882

#define STMT_VINFO_GROUPED_ACCESS(S) ((S)->first_element != NULL && (S)->data_ref_info)

41883

#define STMT_VINFO_LOOP_PHI_EVOLUTION_PART(S) (S)->loop_phi_evolution_part

41884

+#define STMT_VINFO_MIN_NEG_DIST(S) (S)->min_neg_dist

41885

41886

#define GROUP_FIRST_ELEMENT(S) (S)->first_element

41887

#define GROUP_NEXT_ELEMENT(S) (S)->next_element

41888

Index: gcc/sdbout.c

41889

===================================================================

41890

--- a/src/gcc/sdbout.c (.../tags/gcc_4_8_2_release)

41891

+++ b/src/gcc/sdbout.c (.../branches/gcc-4_8-branch)

41892

@@ -1226,7 +1226,10 @@

41893

sdbout_parms (tree parms)

41894

{

41895

for (; parms; parms = TREE_CHAIN (parms))

41896

- if (DECL_NAME (parms))

41897

+ if (DECL_NAME (parms)

41898

+ && TREE_TYPE (parms) != error_mark_node

41899

+ && DECL_RTL_SET_P (parms)

41900

+ && DECL_INCOMING_RTL (parms))

41901

{

41902

int current_sym_value = 0;

41903

const char *name = IDENTIFIER_POINTER (DECL_NAME (parms));

41904

@@ -1358,7 +1361,10 @@

41905

sdbout_reg_parms (tree parms)

41906

{

41907

for (; parms; parms = TREE_CHAIN (parms))

41908

- if (DECL_NAME (parms))

41909

+ if (DECL_NAME (parms)

41910

+ && TREE_TYPE (parms) != error_mark_node

41911

+ && DECL_RTL_SET_P (parms)

41912

+ && DECL_INCOMING_RTL (parms))

41913

{

41914

const char *name = IDENTIFIER_POINTER (DECL_NAME (parms));

41915

41916

Index: gcc/ipa-split.c

41917

===================================================================

41918

--- a/src/gcc/ipa-split.c (.../tags/gcc_4_8_2_release)

41919

+++ b/src/gcc/ipa-split.c (.../branches/gcc-4_8-branch)

41920

@@ -136,7 +136,7 @@

41921

variable, check it if it is present in bitmap passed via DATA. */

41922

41923

static bool

41924

-test_nonssa_use (gimple stmt ATTRIBUTE_UNUSED, tree t, void *data)

41925

+test_nonssa_use (gimple, tree t, tree, void *data)

41926

{

41927

t = get_base_address (t);

41928

41929

@@ -229,7 +229,7 @@

41930

}

41931

if (gimple_code (stmt) == GIMPLE_LABEL

41932

&& test_nonssa_use (stmt, gimple_label_label (stmt),

41933

- non_ssa_vars))

41934

+ NULL_TREE, non_ssa_vars))

41935

{

41936

ok = false;

41937

goto done;

41938

@@ -258,7 +258,7 @@

41939

if (virtual_operand_p (gimple_phi_result (stmt)))

41940

continue;

41941

if (TREE_CODE (op) != SSA_NAME

41942

- && test_nonssa_use (stmt, op, non_ssa_vars))

41943

+ && test_nonssa_use (stmt, op, op, non_ssa_vars))

41944

{

41945

ok = false;

41946

goto done;

41947

@@ -670,7 +670,7 @@

41948

Return true when access to T prevents splitting the function. */

41949

41950

static bool

41951

-mark_nonssa_use (gimple stmt ATTRIBUTE_UNUSED, tree t, void *data)

41952

+mark_nonssa_use (gimple, tree t, tree, void *data)

41953

{

41954

t = get_base_address (t);

41955

41956

@@ -830,7 +830,7 @@

41957

if (TREE_CODE (op) == SSA_NAME)

41958

bitmap_set_bit (used_ssa_names, SSA_NAME_VERSION (op));

41959

else

41960

- can_split &= !mark_nonssa_use (stmt, op, non_ssa_vars);

41961

+ can_split &= !mark_nonssa_use (stmt, op, op, non_ssa_vars);

41962

}

41963

}

41964

return can_split;

41965

Index: gcc/alias.c

41966

===================================================================

41967

--- a/src/gcc/alias.c (.../tags/gcc_4_8_2_release)

41968

+++ b/src/gcc/alias.c (.../branches/gcc-4_8-branch)

41969

@@ -156,7 +156,9 @@

41970

static alias_set_entry get_alias_set_entry (alias_set_type);

41971

static bool nonoverlapping_component_refs_p (const_rtx, const_rtx);

41972

static tree decl_for_component_ref (tree);

41973

-static int write_dependence_p (const_rtx, const_rtx, int);

41974

+static int write_dependence_p (const_rtx,

41975

+ const_rtx, enum machine_mode, rtx,

41976

+ bool, bool, bool);

41977

41978

static void memory_modified_1 (rtx, const_rtx, void *);

41979

41980

@@ -2558,15 +2560,24 @@

41981

}

41982

41983

/* Returns nonzero if a write to X might alias a previous read from

41984

- (or, if WRITEP is nonzero, a write to) MEM. */

41985

+ (or, if WRITEP is true, a write to) MEM.

41986

+ If X_CANONCALIZED is true, then X_ADDR is the canonicalized address of X,

41987

+ and X_MODE the mode for that access.

41988

+ If MEM_CANONICALIZED is true, MEM is canonicalized. */

41989

41990

static int

41991

-write_dependence_p (const_rtx mem, const_rtx x, int writep)

41992

+write_dependence_p (const_rtx mem,

41993

+ const_rtx x, enum machine_mode x_mode, rtx x_addr,

41994

+ bool mem_canonicalized, bool x_canonicalized, bool writep)

41995

{

41996

- rtx x_addr, mem_addr;

41997

+ rtx mem_addr;

41998

rtx base;

41999

int ret;

42000

42001

+ gcc_checking_assert (x_canonicalized

42002

+ ? (x_addr != NULL_RTX && x_mode != VOIDmode)

42003

+ : (x_addr == NULL_RTX && x_mode == VOIDmode));

42004

+

42005

if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))

42006

return 1;

42007

42008

@@ -2590,17 +2601,21 @@

42009

if (MEM_ADDR_SPACE (mem) != MEM_ADDR_SPACE (x))

42010

return 1;

42011

42012

- x_addr = XEXP (x, 0);

42013

mem_addr = XEXP (mem, 0);

42014

- if (!((GET_CODE (x_addr) == VALUE

42015

- && GET_CODE (mem_addr) != VALUE

42016

- && reg_mentioned_p (x_addr, mem_addr))

42017

- || (GET_CODE (x_addr) != VALUE

42018

- && GET_CODE (mem_addr) == VALUE

42019

- && reg_mentioned_p (mem_addr, x_addr))))

42020

+ if (!x_addr)

42021

{

42022

- x_addr = get_addr (x_addr);

42023

- mem_addr = get_addr (mem_addr);

42024

+ x_addr = XEXP (x, 0);

42025

+ if (!((GET_CODE (x_addr) == VALUE

42026

+ && GET_CODE (mem_addr) != VALUE

42027

+ && reg_mentioned_p (x_addr, mem_addr))

42028

+ || (GET_CODE (x_addr) != VALUE

42029

+ && GET_CODE (mem_addr) == VALUE

42030

+ && reg_mentioned_p (mem_addr, x_addr))))

42031

+ {

42032

+ x_addr = get_addr (x_addr);

42033

+ if (!mem_canonicalized)

42034

+ mem_addr = get_addr (mem_addr);

42035

+ }

42036

}

42037

42038

if (! writep)

42039

@@ -2616,11 +2631,16 @@

42040

GET_MODE (mem)))

42041

return 0;

42042

42043

- x_addr = canon_rtx (x_addr);

42044

- mem_addr = canon_rtx (mem_addr);

42045

+ if (!x_canonicalized)

42046

+ {

42047

+ x_addr = canon_rtx (x_addr);

42048

+ x_mode = GET_MODE (x);

42049

+ }

42050

+ if (!mem_canonicalized)

42051

+ mem_addr = canon_rtx (mem_addr);

42052

42053

if ((ret = memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,

42054

- SIZE_FOR_MODE (x), x_addr, 0)) != -1)

42055

+ GET_MODE_SIZE (x_mode), x_addr, 0)) != -1)

42056

return ret;

42057

42058

if (nonoverlapping_memrefs_p (x, mem, false))

42059

@@ -2634,15 +2654,33 @@

42060

int

42061

anti_dependence (const_rtx mem, const_rtx x)

42062

{

42063

- return write_dependence_p (mem, x, /*writep=*/0);

42064

+ return write_dependence_p (mem, x, VOIDmode, NULL_RTX,

42065

+ /*mem_canonicalized=*/false,

42066

+ /*x_canonicalized*/false, /*writep=*/false);

42067

}

42068

42069

+/* Likewise, but we already have a canonicalized MEM, and X_ADDR for X.

42070

+ Also, consider X in X_MODE (which might be from an enclosing

42071

+ STRICT_LOW_PART / ZERO_EXTRACT).

42072

+ If MEM_CANONICALIZED is true, MEM is canonicalized. */

42073

+

42074

+int

42075

+canon_anti_dependence (const_rtx mem, bool mem_canonicalized,

42076

+ const_rtx x, enum machine_mode x_mode, rtx x_addr)

42077

+{

42078

+ return write_dependence_p (mem, x, x_mode, x_addr,

42079

+ mem_canonicalized, /*x_canonicalized=*/true,

42080

+ /*writep=*/false);

42081

+}

42082

+

42083

/* Output dependence: X is written after store in MEM takes place. */

42084

42085

int

42086

output_dependence (const_rtx mem, const_rtx x)

42087

{

42088

- return write_dependence_p (mem, x, /*writep=*/1);

42089

+ return write_dependence_p (mem, x, VOIDmode, NULL_RTX,

42090

+ /*mem_canonicalized=*/false,

42091

+ /*x_canonicalized*/false, /*writep=*/true);

42092

}

42093

42094

42095

@@ -2871,17 +2909,14 @@

42096

/* Wipe the reg_seen array clean. */

42097

bitmap_clear (reg_seen);

42098

42099

- /* Mark all hard registers which may contain an address.

42100

- The stack, frame and argument pointers may contain an address.

42101

- An argument register which can hold a Pmode value may contain

42102

- an address even if it is not in BASE_REGS.

42103

+ /* Initialize the alias information for this pass. */

42104

+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

42105

+ if (static_reg_base_value[i])

42106

+ {

42107

+ new_reg_base_value[i] = static_reg_base_value[i];

42108

+ bitmap_set_bit (reg_seen, i);

42109

+ }

42110

42111

- The address expression is VOIDmode for an argument and

42112

- Pmode for other registers. */

42113

-

42114

- memcpy (new_reg_base_value, static_reg_base_value,

42115

- FIRST_PSEUDO_REGISTER * sizeof (rtx));

42116

-

42117

/* Walk the insns adding values to the new_reg_base_value array. */

42118

for (i = 0; i < rpo_cnt; i++)

42119

{

42120

Index: gcc/tree-vect-loop.c

42121

===================================================================

42122

--- a/src/gcc/tree-vect-loop.c (.../tags/gcc_4_8_2_release)

42123

+++ b/src/gcc/tree-vect-loop.c (.../branches/gcc-4_8-branch)

42124

@@ -1537,7 +1537,7 @@

42125

42126

if (!LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo)

42127

|| LOOP_VINFO_INT_NITERS (loop_vinfo) % vectorization_factor != 0

42128

- || LOOP_PEELING_FOR_ALIGNMENT (loop_vinfo))

42129

+ || LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo))

42130

{

42131

if (dump_enabled_p ())

42132

dump_printf_loc (MSG_NOTE, vect_location, "epilog loop required.");

42133

@@ -2097,6 +2097,12 @@

42134

|| (!check_reduction && flow_loop_nested_p (vect_loop, loop)));

42135

42136

name = PHI_RESULT (phi);

42137

+ /* ??? If there are no uses of the PHI result the inner loop reduction

42138

+ won't be detected as possibly double-reduction by vectorizable_reduction

42139

+ because that tries to walk the PHI arg from the preheader edge which

42140

+ can be constant. See PR60382. */

42141

+ if (has_zero_uses (name))

42142

+ return NULL;

42143

nloop_uses = 0;

42144

FOR_EACH_IMM_USE_FAST (use_p, imm_iter, name)

42145

{

42146

@@ -3115,7 +3121,6 @@

42147

stmt_vec_info stmt_vinfo = vinfo_for_stmt (iv_phi);

42148

loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo);

42149

struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo);

42150

- tree scalar_type;

42151

tree vectype;

42152

int nunits;

42153

edge pe = loop_preheader_edge (loop);

42154

@@ -3122,7 +3127,6 @@

42155

struct loop *iv_loop;

42156

basic_block new_bb;

42157

tree new_vec, vec_init, vec_step, t;

42158

- tree access_fn;

42159

tree new_var;

42160

tree new_name;

42161

gimple init_stmt, induction_phi, new_stmt;

42162

@@ -3130,7 +3134,6 @@

42163

tree init_expr, step_expr;

42164

int vf = LOOP_VINFO_VECT_FACTOR (loop_vinfo);

42165

int i;

42166

- bool ok;

42167

int ncopies;

42168

tree expr;

42169

stmt_vec_info phi_info = vinfo_for_stmt (iv_phi);

42170

@@ -3159,16 +3162,14 @@

42171

latch_e = loop_latch_edge (iv_loop);

42172

loop_arg = PHI_ARG_DEF_FROM_EDGE (iv_phi, latch_e);

42173

42174

- access_fn = analyze_scalar_evolution (iv_loop, PHI_RESULT (iv_phi));

42175

- gcc_assert (access_fn);

42176

- STRIP_NOPS (access_fn);

42177

- ok = vect_is_simple_iv_evolution (iv_loop->num, access_fn,

42178

- &init_expr, &step_expr);

42179

- gcc_assert (ok);

42180

+ step_expr = STMT_VINFO_LOOP_PHI_EVOLUTION_PART (phi_info);

42181

+ gcc_assert (step_expr != NULL_TREE);

42182

+

42183

pe = loop_preheader_edge (iv_loop);

42184

+ init_expr = PHI_ARG_DEF_FROM_EDGE (iv_phi,

42185

+ loop_preheader_edge (iv_loop));

42186

42187

- scalar_type = TREE_TYPE (init_expr);

42188

- vectype = get_vectype_for_scalar_type (scalar_type);

42189

+ vectype = get_vectype_for_scalar_type (TREE_TYPE (init_expr));

42190

resvectype = get_vectype_for_scalar_type (TREE_TYPE (PHI_RESULT (iv_phi)));

42191

gcc_assert (vectype);

42192

nunits = TYPE_VECTOR_SUBPARTS (vectype);

42193

@@ -3177,6 +3178,16 @@

42194

gcc_assert (phi_info);

42195

gcc_assert (ncopies >= 1);

42196

42197

+ /* Convert the step to the desired type. */

42198

+ step_expr = force_gimple_operand (fold_convert (TREE_TYPE (vectype),

42199

+ step_expr),

42200

+ &stmts, true, NULL_TREE);

42201

+ if (stmts)

42202

+ {

42203

+ new_bb = gsi_insert_seq_on_edge_immediate (pe, stmts);

42204

+ gcc_assert (!new_bb);

42205

+ }

42206

+

42207

/* Find the first insertion point in the BB. */

42208

si = gsi_after_labels (bb);

42209

42210

@@ -3186,9 +3197,7 @@

42211

/* iv_loop is nested in the loop to be vectorized. init_expr had already

42212

been created during vectorization of previous stmts. We obtain it

42213

from the STMT_VINFO_VEC_STMT of the defining stmt. */

42214

- tree iv_def = PHI_ARG_DEF_FROM_EDGE (iv_phi,

42215

- loop_preheader_edge (iv_loop));

42216

- vec_init = vect_get_vec_def_for_operand (iv_def, iv_phi, NULL);

42217

+ vec_init = vect_get_vec_def_for_operand (init_expr, iv_phi, NULL);

42218

/* If the initial value is not of proper type, convert it. */

42219

if (!useless_type_conversion_p (vectype, TREE_TYPE (vec_init)))

42220

{

42221

@@ -3211,8 +3220,11 @@

42222

42223

/* iv_loop is the loop to be vectorized. Create:

42224

vec_init = [X, X+S, X+2*S, X+3*S] (S = step_expr, X = init_expr) */

42225

- new_var = vect_get_new_vect_var (scalar_type, vect_scalar_var, "var_");

42226

- new_name = force_gimple_operand (init_expr, &stmts, false, new_var);

42227

+ new_var = vect_get_new_vect_var (TREE_TYPE (vectype),

42228

+ vect_scalar_var, "var_");

42229

+ new_name = force_gimple_operand (fold_convert (TREE_TYPE (vectype),

42230

+ init_expr),

42231

+ &stmts, false, new_var);

42232

if (stmts)

42233

{

42234

new_bb = gsi_insert_seq_on_edge_immediate (pe, stmts);

42235

@@ -3224,9 +3236,7 @@

42236

for (i = 1; i < nunits; i++)

42237

{

42238

/* Create: new_name_i = new_name + step_expr */

42239

- enum tree_code code = POINTER_TYPE_P (scalar_type)

42240

- ? POINTER_PLUS_EXPR : PLUS_EXPR;

42241

- init_stmt = gimple_build_assign_with_ops (code, new_var,

42242

+ init_stmt = gimple_build_assign_with_ops (PLUS_EXPR, new_var,

42243

new_name, step_expr);

42244

new_name = make_ssa_name (new_var, init_stmt);

42245

gimple_assign_set_lhs (init_stmt, new_name);

42246

@@ -5564,8 +5574,9 @@

42247

&& !STMT_VINFO_LIVE_P (stmt_info))

42248

continue;

42249

42250

- if ((TYPE_VECTOR_SUBPARTS (STMT_VINFO_VECTYPE (stmt_info))

42251

- != (unsigned HOST_WIDE_INT) vectorization_factor)

42252

+ if (STMT_VINFO_VECTYPE (stmt_info)

42253

+ && (TYPE_VECTOR_SUBPARTS (STMT_VINFO_VECTYPE (stmt_info))

42254

+ != (unsigned HOST_WIDE_INT) vectorization_factor)

42255

&& dump_enabled_p ())

42256

dump_printf_loc (MSG_NOTE, vect_location, "multiple-types.");

42257

42258

Index: gcc/ipa.c

42259

===================================================================

42260

--- a/src/gcc/ipa.c (.../tags/gcc_4_8_2_release)

42261

+++ b/src/gcc/ipa.c (.../branches/gcc-4_8-branch)

42262

@@ -359,6 +359,8 @@

42263

{

42264

if (file)

42265

fprintf (file, " %s", cgraph_node_name (node));

42266

+ node->alias = false;

42267

+ node->thunk.thunk_p = false;

42268

cgraph_node_remove_callees (node);

42269

ipa_remove_all_references (&node->symbol.ref_list);

42270

changed = true;

42271

Index: gcc/lra-coalesce.c

42272

===================================================================

42273

--- a/src/gcc/lra-coalesce.c (.../tags/gcc_4_8_2_release)

42274

+++ b/src/gcc/lra-coalesce.c (.../branches/gcc-4_8-branch)

42275

@@ -221,9 +221,12 @@

42276

basic_block bb;

42277

rtx mv, set, insn, next, *sorted_moves;

42278

int i, mv_num, sregno, dregno;

42279

+ unsigned int regno;

42280

int coalesced_moves;

42281

int max_regno = max_reg_num ();

42282

bitmap_head involved_insns_bitmap;

42283

+ bitmap_head result_pseudo_vals_bitmap;

42284

+ bitmap_iterator bi;

42285

42286

timevar_push (TV_LRA_COALESCE);

42287

42288

@@ -318,6 +321,34 @@

42289

}

42290

}

42291

}

42292

+ /* If we have situation after inheritance pass:

42293

+

42294

+ r1 <- ... insn originally setting p1

42295

+ i1 <- r1 setting inheritance i1 from reload r1

42296

+ ...

42297

+ ... <- ... p2 ... dead p2

42298

+ ..

42299

+ p1 <- i1

42300

+ r2 <- i1

42301

+ ...<- ... r2 ...

42302

+

42303

+ And we are coalescing p1 and p2 using p1. In this case i1 and p1

42304

+ should have different values, otherwise they can get the same

42305

+ hard reg and this is wrong for insn using p2 before coalescing.

42306

+ So invalidate such inheritance pseudo values. */

42307

+ bitmap_initialize (&result_pseudo_vals_bitmap, &reg_obstack);

42308

+ EXECUTE_IF_SET_IN_BITMAP (&coalesced_pseudos_bitmap, 0, regno, bi)

42309

+ bitmap_set_bit (&result_pseudo_vals_bitmap,

42310

+ lra_reg_info[first_coalesced_pseudo[regno]].val);

42311

+ EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, regno, bi)

42312

+ if (bitmap_bit_p (&result_pseudo_vals_bitmap, lra_reg_info[regno].val))

42313

+ {

42314

+ lra_set_regno_unique_value (regno);

42315

+ if (lra_dump_file != NULL)

42316

+ fprintf (lra_dump_file,

42317

+ " Make unique value for inheritance r%d\n", regno);

42318

+ }

42319

+ bitmap_clear (&result_pseudo_vals_bitmap);

42320

bitmap_clear (&used_pseudos_bitmap);

42321

bitmap_clear (&involved_insns_bitmap);

42322

bitmap_clear (&coalesced_pseudos_bitmap);

42323

Index: gcc/tree-vect-data-refs.c

42324

===================================================================

42325

--- a/src/gcc/tree-vect-data-refs.c (.../tags/gcc_4_8_2_release)

42326

+++ b/src/gcc/tree-vect-data-refs.c (.../branches/gcc-4_8-branch)

42327

@@ -739,6 +739,13 @@

42328

if (dump_enabled_p ())

42329

dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,

42330

"dependence distance negative.");

42331

+ /* Record a negative dependence distance to later limit the

42332

+ amount of stmt copying / unrolling we can perform.

42333

+ Only need to handle read-after-write dependence. */

42334

+ if (DR_IS_READ (drb)

42335

+ && (STMT_VINFO_MIN_NEG_DIST (stmtinfo_b) == 0

42336

+ || STMT_VINFO_MIN_NEG_DIST (stmtinfo_b) > (unsigned)dist))

42337

+ STMT_VINFO_MIN_NEG_DIST (stmtinfo_b) = dist;

42338

continue;

42339

}

42340

42341

Index: gcc/gimplify.c

42342

===================================================================

42343

--- a/src/gcc/gimplify.c (.../tags/gcc_4_8_2_release)

42344

+++ b/src/gcc/gimplify.c (.../branches/gcc-4_8-branch)

42345

@@ -2060,6 +2060,9 @@

42346

/* Nonlocal VLAs seen in the current function. */

42347

static struct pointer_set_t *nonlocal_vlas;

42348

42349

+/* The VAR_DECLs created for nonlocal VLAs for debug info purposes. */

42350

+static tree nonlocal_vla_vars;

42351

+

42352

/* Gimplify a VAR_DECL or PARM_DECL. Return GS_OK if we expanded a

42353

DECL_VALUE_EXPR, and it's worth re-examining things. */

42354

42355

@@ -2106,14 +2109,13 @@

42356

ctx = ctx->outer_context;

42357

if (!ctx && !pointer_set_insert (nonlocal_vlas, decl))

42358

{

42359

- tree copy = copy_node (decl), block;

42360

+ tree copy = copy_node (decl);

42361

42362

lang_hooks.dup_lang_specific_decl (copy);

42363

SET_DECL_RTL (copy, 0);

42364

TREE_USED (copy) = 1;

42365

- block = DECL_INITIAL (current_function_decl);

42366

- DECL_CHAIN (copy) = BLOCK_VARS (block);

42367

- BLOCK_VARS (block) = copy;

42368

+ DECL_CHAIN (copy) = nonlocal_vla_vars;

42369

+ nonlocal_vla_vars = copy;

42370

SET_DECL_VALUE_EXPR (copy, unshare_expr (value_expr));

42371

DECL_HAS_VALUE_EXPR_P (copy) = 1;

42372

}

42373

@@ -4369,7 +4371,7 @@

42374

unsigned HOST_WIDE_INT indexi = offset * BITS_PER_UNIT;

42375

tree index = bitsize_int (indexi);

42376

if (offset / part_widthi

42377

- <= TYPE_VECTOR_SUBPARTS (TREE_TYPE (addrtype)))

42378

+ < TYPE_VECTOR_SUBPARTS (TREE_TYPE (addrtype)))

42379

return fold_build3 (BIT_FIELD_REF, type, TREE_OPERAND (addr, 0),

42380

part_width, index);

42381

}

42382

@@ -6131,7 +6133,7 @@

42383

region's REDUCTION clause. */

42384

42385

static bool

42386

-omp_check_private (struct gimplify_omp_ctx *ctx, tree decl)

42387

+omp_check_private (struct gimplify_omp_ctx *ctx, tree decl, bool copyprivate)

42388

{

42389

splay_tree_node n;

42390

42391

@@ -6140,8 +6142,11 @@

42392

ctx = ctx->outer_context;

42393

if (ctx == NULL)

42394

return !(is_global_var (decl)

42395

- /* References might be private, but might be shared too. */

42396

- || lang_hooks.decls.omp_privatize_by_reference (decl));

42397

+ /* References might be private, but might be shared too,

42398

+ when checking for copyprivate, assume they might be

42399

+ private, otherwise assume they might be shared. */

42400

+ || (!copyprivate

42401

+ && lang_hooks.decls.omp_privatize_by_reference (decl)));

42402

42403

n = splay_tree_lookup (ctx->variables, (splay_tree_key) decl);

42404

if (n != NULL)

42405

@@ -6267,12 +6272,36 @@

42406

remove = true;

42407

break;

42408

}

42409

+ if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_COPYPRIVATE

42410

+ && !remove

42411

+ && !omp_check_private (ctx, decl, true))

42412

+ {

42413

+ remove = true;

42414

+ if (is_global_var (decl))

42415

+ {

42416

+ if (DECL_THREAD_LOCAL_P (decl))

42417

+ remove = false;

42418

+ else if (DECL_HAS_VALUE_EXPR_P (decl))

42419

+ {

42420

+ tree value = get_base_address (DECL_VALUE_EXPR (decl));

42421

+

42422

+ if (value

42423

+ && DECL_P (value)

42424

+ && DECL_THREAD_LOCAL_P (value))

42425

+ remove = false;

42426

+ }

42427

+ }

42428

+ if (remove)

42429

+ error_at (OMP_CLAUSE_LOCATION (c),

42430

+ "copyprivate variable %qE is not threadprivate"

42431

+ " or private in outer context", DECL_NAME (decl));

42432

+ }

42433

do_notice:

42434

if (outer_ctx)

42435

omp_notice_variable (outer_ctx, decl, true);

42436

if (check_non_private

42437

&& region_type == ORT_WORKSHARE

42438

- && omp_check_private (ctx, decl))

42439

+ && omp_check_private (ctx, decl, false))

42440

{

42441

error ("%s variable %qE is private in outer context",

42442

check_non_private, DECL_NAME (decl));

42443

@@ -8261,6 +8290,21 @@

42444

42445

if (nonlocal_vlas)

42446

{

42447

+ if (nonlocal_vla_vars)

42448

+ {

42449

+ /* tree-nested.c may later on call declare_vars (..., true);

42450

+ which relies on BLOCK_VARS chain to be the tail of the

42451

+ gimple_bind_vars chain. Ensure we don't violate that

42452

+ assumption. */

42453

+ if (gimple_bind_block (outer_bind)

42454

+ == DECL_INITIAL (current_function_decl))

42455

+ declare_vars (nonlocal_vla_vars, outer_bind, true);

42456

+ else

42457

+ BLOCK_VARS (DECL_INITIAL (current_function_decl))

42458

+ = chainon (BLOCK_VARS (DECL_INITIAL (current_function_decl)),

42459

+ nonlocal_vla_vars);

42460

+ nonlocal_vla_vars = NULL_TREE;

42461

+ }

42462

pointer_set_destroy (nonlocal_vlas);

42463

nonlocal_vlas = NULL;

42464

}

42465

@@ -8588,6 +8632,8 @@

42466

gsi_insert_after (gsi_p, post_stmt, GSI_NEW_STMT);

42467

42468

pop_gimplify_context (NULL);

42469

+

42470

+ update_stmt (stmt);

42471

}

42472

42473

/* Expand EXPR to list of gimple statements STMTS. GIMPLE_TEST_F specifies

42474

Index: gcc/graphite-scop-detection.c

42475

===================================================================

42476

--- a/src/gcc/graphite-scop-detection.c (.../tags/gcc_4_8_2_release)

42477

+++ b/src/gcc/graphite-scop-detection.c (.../branches/gcc-4_8-branch)

42478

@@ -330,13 +330,10 @@

42479

42480

case GIMPLE_COND:

42481

{

42482

- tree op;

42483

- ssa_op_iter op_iter;

42484

- enum tree_code code = gimple_cond_code (stmt);

42485

-

42486

/* We can handle all binary comparisons. Inequalities are

42487

also supported as they can be represented with union of

42488

polyhedra. */

42489

+ enum tree_code code = gimple_cond_code (stmt);

42490

if (!(code == LT_EXPR

42491

|| code == GT_EXPR

42492

|| code == LE_EXPR

42493

@@ -345,11 +342,14 @@

42494

|| code == NE_EXPR))

42495

return false;

42496

42497

- FOR_EACH_SSA_TREE_OPERAND (op, stmt, op_iter, SSA_OP_ALL_USES)

42498

- if (!graphite_can_represent_expr (scop_entry, loop, op)

42499

- /* We can not handle REAL_TYPE. Failed for pr39260. */

42500

- || TREE_CODE (TREE_TYPE (op)) == REAL_TYPE)

42501

- return false;

42502

+ for (unsigned i = 0; i < 2; ++i)

42503

+ {

42504

+ tree op = gimple_op (stmt, i);

42505

+ if (!graphite_can_represent_expr (scop_entry, loop, op)

42506

+ /* We can not handle REAL_TYPE. Failed for pr39260. */

42507

+ || TREE_CODE (TREE_TYPE (op)) == REAL_TYPE)

42508

+ return false;

42509

+ }

42510

42511

return true;

42512

}

42513

Index: gcc/lra-constraints.c

42514

===================================================================

42515

--- a/src/gcc/lra-constraints.c (.../tags/gcc_4_8_2_release)

42516

+++ b/src/gcc/lra-constraints.c (.../branches/gcc-4_8-branch)

42517

@@ -1156,6 +1156,8 @@

42518

enum machine_mode mode;

42519

rtx reg, new_reg;

42520

rtx operand = *curr_id->operand_loc[nop];

42521

+ enum reg_class regclass;

42522

+ enum op_type type;

42523

42524

before = after = NULL_RTX;

42525

42526

@@ -1164,6 +1166,7 @@

42527

42528

mode = GET_MODE (operand);

42529

reg = SUBREG_REG (operand);

42530

+ type = curr_static_id->operand[nop].type;

42531

/* If we change address for paradoxical subreg of memory, the

42532

address might violate the necessary alignment or the access might

42533

be slow. So take this into consideration. We should not worry

42534

@@ -1236,6 +1239,55 @@

42535

"Inserting subreg reload");

42536

return true;

42537

}

42538

+ /* Force a reload for a paradoxical subreg. For paradoxical subreg,

42539

+ IRA allocates hardreg to the inner pseudo reg according to its mode

42540

+ instead of the outermode, so the size of the hardreg may not be enough

42541

+ to contain the outermode operand, in that case we may need to insert

42542

+ reload for the reg. For the following two types of paradoxical subreg,

42543

+ we need to insert reload:

42544

+ 1. If the op_type is OP_IN, and the hardreg could not be paired with

42545

+ other hardreg to contain the outermode operand

42546

+ (checked by in_hard_reg_set_p), we need to insert the reload.

42547

+ 2. If the op_type is OP_OUT or OP_INOUT. */

42548

+ else if (REG_P (reg)

42549

+ && REGNO (reg) >= FIRST_PSEUDO_REGISTER

42550

+ && (hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0

42551

+ && (hard_regno_nregs[hard_regno][GET_MODE (reg)]

42552

+ < hard_regno_nregs[hard_regno][mode])

42553

+ && (regclass = lra_get_allocno_class (REGNO (reg)))

42554

+ && (type != OP_IN

42555

+ || !in_hard_reg_set_p (reg_class_contents[regclass],

42556

+ mode, hard_regno)))

42557

+ {

42558

+ /* The class will be defined later in curr_insn_transform. */

42559

+ enum reg_class rclass

42560

+ = (enum reg_class) targetm.preferred_reload_class (reg, ALL_REGS);

42561

+ rtx subreg;

42562

+

42563

+ new_reg = lra_create_new_reg_with_unique_value (mode, reg, rclass,

42564

+ "paradoxical subreg");

42565

+ PUT_MODE (new_reg, mode);

42566

+ subreg = simplify_gen_subreg (GET_MODE (reg), new_reg, mode, 0);

42567

+ if (type != OP_OUT)

42568

+ {

42569

+ push_to_sequence (before);

42570

+ lra_emit_move (subreg, reg);

42571

+ before = get_insns ();

42572

+ end_sequence ();

42573

+ }

42574

+ if (type != OP_IN)

42575

+ {

42576

+ start_sequence ();

42577

+ lra_emit_move (reg, subreg);

42578

+ emit_insn (after);

42579

+ after = get_insns ();

42580

+ end_sequence ();

42581

+ }

42582

+ SUBREG_REG (operand) = new_reg;

42583

+ lra_process_new_insns (curr_insn, before, after,

42584

+ "Inserting paradoxical subreg reload");

42585

+ return true;

42586

+ }

42587

return false;

42588

}

42589

42590

Index: gcc/calls.c

42591

===================================================================

42592

--- a/src/gcc/calls.c (.../tags/gcc_4_8_2_release)

42593

+++ b/src/gcc/calls.c (.../branches/gcc-4_8-branch)

42594

@@ -983,6 +983,7 @@

42595

42596

for (i = 0; i < num_actuals; i++)

42597

if (args[i].reg != 0 && ! args[i].pass_on_stack

42598

+ && GET_CODE (args[i].reg) != PARALLEL

42599

&& args[i].mode == BLKmode

42600

&& MEM_P (args[i].value)

42601

&& (MEM_ALIGN (args[i].value)

42602

@@ -1327,6 +1328,7 @@

42603

#else

42604

args[i].reg != 0,

42605

#endif

42606

+ reg_parm_stack_space,

42607

args[i].pass_on_stack ? 0 : args[i].partial,

42608

fndecl, args_size, &args[i].locate);

42609

#ifdef BLOCK_REG_PADDING

42610

@@ -3171,7 +3173,9 @@

42611

group load/store machinery below. */

42612

if (!structure_value_addr

42613

&& !pcc_struct_value

42614

+ && TYPE_MODE (rettype) != VOIDmode

42615

&& TYPE_MODE (rettype) != BLKmode

42616

+ && REG_P (valreg)

42617

&& targetm.calls.return_in_msb (rettype))

42618

{

42619

if (shift_return_value (TYPE_MODE (rettype), false, valreg))

42620

@@ -3734,7 +3738,8 @@

42621

#else

42622

argvec[count].reg != 0,

42623

#endif

42624

- 0, NULL_TREE, &args_size, &argvec[count].locate);

42625

+ reg_parm_stack_space, 0,

42626

+ NULL_TREE, &args_size, &argvec[count].locate);

42627

42628

if (argvec[count].reg == 0 || argvec[count].partial != 0

42629

|| reg_parm_stack_space > 0)

42630

@@ -3821,7 +3826,7 @@

42631

#else

42632

argvec[count].reg != 0,

42633

#endif

42634

- argvec[count].partial,

42635

+ reg_parm_stack_space, argvec[count].partial,

42636

NULL_TREE, &args_size, &argvec[count].locate);

42637

args_size.constant += argvec[count].locate.size.constant;

42638

gcc_assert (!argvec[count].locate.size.var);

42639

Index: gcc/tree-dfa.c

42640

===================================================================

42641

--- a/src/gcc/tree-dfa.c (.../tags/gcc_4_8_2_release)

42642

+++ b/src/gcc/tree-dfa.c (.../branches/gcc-4_8-branch)

42643

@@ -386,7 +386,6 @@

42644

double_int bit_offset = double_int_zero;

42645

HOST_WIDE_INT hbit_offset;

42646

bool seen_variable_array_ref = false;

42647

- tree base_type;

42648

42649

/* First get the final access size from just the outermost expression. */

42650

if (TREE_CODE (exp) == COMPONENT_REF)

42651

@@ -417,8 +416,6 @@

42652

and find the ultimate containing object. */

42653

while (1)

42654

{

42655

- base_type = TREE_TYPE (exp);

42656

-

42657

switch (TREE_CODE (exp))

42658

{

42659

case BIT_FIELD_REF:

42660

@@ -543,7 +540,38 @@

42661

case VIEW_CONVERT_EXPR:

42662

break;

42663

42664

+ case TARGET_MEM_REF:

42665

+ /* Via the variable index or index2 we can reach the

42666

+ whole object. Still hand back the decl here. */

42667

+ if (TREE_CODE (TMR_BASE (exp)) == ADDR_EXPR

42668

+ && (TMR_INDEX (exp) || TMR_INDEX2 (exp)))

42669

+ {

42670

+ exp = TREE_OPERAND (TMR_BASE (exp), 0);

42671

+ bit_offset = double_int_zero;

42672

+ maxsize = -1;

42673

+ goto done;

42674

+ }

42675

+ /* Fallthru. */

42676

case MEM_REF:

42677

+ /* We need to deal with variable arrays ending structures such as

42678

+ struct { int length; int a[1]; } x; x.a[d]

42679

+ struct { struct { int a; int b; } a[1]; } x; x.a[d].a

42680

+ struct { struct { int a[1]; } a[1]; } x; x.a[0][d], x.a[d][0]

42681

+ struct { int len; union { int a[1]; struct X x; } u; } x; x.u.a[d]

42682

+ where we do not know maxsize for variable index accesses to

42683

+ the array. The simplest way to conservatively deal with this

42684

+ is to punt in the case that offset + maxsize reaches the

42685

+ base type boundary. This needs to include possible trailing

42686

+ padding that is there for alignment purposes. */

42687

+ if (seen_variable_array_ref

42688

+ && maxsize != -1

42689

+ && (!bit_offset.fits_shwi ()

42690

+ || !host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)

42691

+ || (bit_offset.to_shwi () + maxsize

42692

+ == (HOST_WIDE_INT) TREE_INT_CST_LOW

42693

+ (TYPE_SIZE (TREE_TYPE (exp))))))

42694

+ maxsize = -1;

42695

+

42696

/* Hand back the decl for MEM[&decl, off]. */

42697

if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)

42698

{

42699

@@ -565,37 +593,6 @@

42700

}

42701

goto done;

42702

42703

- case TARGET_MEM_REF:

42704

- /* Hand back the decl for MEM[&decl, off]. */

42705

- if (TREE_CODE (TMR_BASE (exp)) == ADDR_EXPR)

42706

- {

42707

- /* Via the variable index or index2 we can reach the

42708

- whole object. */

42709

- if (TMR_INDEX (exp) || TMR_INDEX2 (exp))

42710

- {

42711

- exp = TREE_OPERAND (TMR_BASE (exp), 0);

42712

- bit_offset = double_int_zero;

42713

- maxsize = -1;

42714

- goto done;

42715

- }

42716

- if (integer_zerop (TMR_OFFSET (exp)))

42717

- exp = TREE_OPERAND (TMR_BASE (exp), 0);

42718

- else

42719

- {

42720

- double_int off = mem_ref_offset (exp);

42721

- off = off.alshift (BITS_PER_UNIT == 8

42722

- ? 3 : exact_log2 (BITS_PER_UNIT),

42723

- HOST_BITS_PER_DOUBLE_INT);

42724

- off += bit_offset;

42725

- if (off.fits_shwi ())

42726

- {

42727

- bit_offset = off;

42728

- exp = TREE_OPERAND (TMR_BASE (exp), 0);

42729

- }

42730

- }

42731

- }

42732

- goto done;

42733

-

42734

default:

42735

goto done;

42736

}

42737

@@ -602,8 +599,18 @@

42738

42739

exp = TREE_OPERAND (exp, 0);

42740

}

42741

+

42742

+ /* We need to deal with variable arrays ending structures. */

42743

+ if (seen_variable_array_ref

42744

+ && maxsize != -1

42745

+ && (!bit_offset.fits_shwi ()

42746

+ || !host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)

42747

+ || (bit_offset.to_shwi () + maxsize

42748

+ == (HOST_WIDE_INT)

42749

+ TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp))))))

42750

+ maxsize = -1;

42751

+

42752

done:

42753

-

42754

if (!bit_offset.fits_shwi ())

42755

{

42756

*poffset = 0;

42757

@@ -615,24 +622,6 @@

42758

42759

hbit_offset = bit_offset.to_shwi ();

42760

42761

- /* We need to deal with variable arrays ending structures such as

42762

- struct { int length; int a[1]; } x; x.a[d]

42763

- struct { struct { int a; int b; } a[1]; } x; x.a[d].a

42764

- struct { struct { int a[1]; } a[1]; } x; x.a[0][d], x.a[d][0]

42765

- struct { int len; union { int a[1]; struct X x; } u; } x; x.u.a[d]

42766

- where we do not know maxsize for variable index accesses to

42767

- the array. The simplest way to conservatively deal with this

42768

- is to punt in the case that offset + maxsize reaches the

42769

- base type boundary. This needs to include possible trailing padding

42770

- that is there for alignment purposes. */

42771

-

42772

- if (seen_variable_array_ref

42773

- && maxsize != -1

42774

- && (!host_integerp (TYPE_SIZE (base_type), 1)

42775

- || (hbit_offset + maxsize

42776

- == (signed) TREE_INT_CST_LOW (TYPE_SIZE (base_type)))))

42777

- maxsize = -1;

42778

-

42779

/* In case of a decl or constant base object we can do better. */

42780

42781

if (DECL_P (exp))

42782

Index: gcc/gimple-fold.c

42783

===================================================================

42784

--- a/src/gcc/gimple-fold.c (.../tags/gcc_4_8_2_release)

42785

+++ b/src/gcc/gimple-fold.c (.../branches/gcc-4_8-branch)

42786

@@ -178,7 +178,7 @@

42787

/* Make sure we create a cgraph node for functions we'll reference.

42788

They can be non-existent if the reference comes from an entry

42789

of an external vtable for example. */

42790

- cgraph_get_create_node (base);

42791

+ cgraph_get_create_real_symbol_node (base);

42792

}

42793

/* Fixup types in global initializers. */

42794

if (TREE_TYPE (TREE_TYPE (cval)) != TREE_TYPE (TREE_OPERAND (cval, 0)))

42795

@@ -866,6 +866,7 @@

42796

break;

42797

case BUILT_IN_STRCPY:

42798

case BUILT_IN_STRNCPY:

42799

+ case BUILT_IN_STRCAT:

42800

arg_idx = 1;

42801

type = 0;

42802

break;

42803

@@ -941,6 +942,13 @@

42804

val[1]);

42805

break;

42806

42807

+ case BUILT_IN_STRCAT:

42808

+ if (val[1] && is_gimple_val (val[1]) && nargs == 2)

42809

+ result = fold_builtin_strcat (loc, gimple_call_arg (stmt, 0),

42810

+ gimple_call_arg (stmt, 1),

42811

+ val[1]);

42812

+ break;

42813

+

42814

case BUILT_IN_FPUTS:

42815

if (nargs == 2)

42816

result = fold_builtin_fputs (loc, gimple_call_arg (stmt, 0),

42817

Index: gcc/cfgexpand.c

42818

===================================================================

42819

--- a/src/gcc/cfgexpand.c (.../tags/gcc_4_8_2_release)

42820

+++ b/src/gcc/cfgexpand.c (.../branches/gcc-4_8-branch)

42821

@@ -331,7 +331,7 @@

42822

enter its partition number into bitmap DATA. */

42823

42824

static bool

42825

-visit_op (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

42826

+visit_op (gimple, tree op, tree, void *data)

42827

{

42828

bitmap active = (bitmap)data;

42829

op = get_base_address (op);

42830

@@ -351,7 +351,7 @@

42831

from bitmap DATA. */

42832

42833

static bool

42834

-visit_conflict (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

42835

+visit_conflict (gimple, tree op, tree, void *data)

42836

{

42837

bitmap active = (bitmap)data;

42838

op = get_base_address (op);

42839

@@ -385,7 +385,7 @@

42840

edge e;

42841

edge_iterator ei;

42842

gimple_stmt_iterator gsi;

42843

- bool (*visit)(gimple, tree, void *);

42844

+ walk_stmt_load_store_addr_fn visit;

42845

42846

bitmap_clear (work);

42847

FOR_EACH_EDGE (e, ei, bb->preds)

42848

@@ -4707,14 +4707,18 @@

42849

if (e->insns.r)

42850

{

42851

rebuild_jump_labels_chain (e->insns.r);

42852

- /* Avoid putting insns before parm_birth_insn. */

42853

+ /* Put insns after parm birth, but before

42854

+ NOTE_INSNS_FUNCTION_BEG. */

42855

if (e->src == ENTRY_BLOCK_PTR

42856

- && single_succ_p (ENTRY_BLOCK_PTR)

42857

- && parm_birth_insn)

42858

+ && single_succ_p (ENTRY_BLOCK_PTR))

42859

{

42860

rtx insns = e->insns.r;

42861

e->insns.r = NULL_RTX;

42862

- emit_insn_after_noloc (insns, parm_birth_insn, e->dest);

42863

+ if (NOTE_P (parm_birth_insn)

42864

+ && NOTE_KIND (parm_birth_insn) == NOTE_INSN_FUNCTION_BEG)

42865

+ emit_insn_before_noloc (insns, parm_birth_insn, e->dest);

42866

+ else

42867

+ emit_insn_after_noloc (insns, parm_birth_insn, e->dest);

42868

}

42869

else

42870

commit_one_edge_insertion (e);

42871

Index: gcc/cselib.c

42872

===================================================================

42873

--- a/src/gcc/cselib.c (.../tags/gcc_4_8_2_release)

42874

+++ b/src/gcc/cselib.c (.../branches/gcc-4_8-branch)

42875

@@ -2260,8 +2260,8 @@

42876

continue;

42877

}

42878

if (num_mems < PARAM_VALUE (PARAM_MAX_CSELIB_MEMORY_LOCATIONS)

42879

- && ! canon_true_dependence (mem_rtx, GET_MODE (mem_rtx),

42880

- mem_addr, x, NULL_RTX))

42881

+ && ! canon_anti_dependence (x, false, mem_rtx,

42882

+ GET_MODE (mem_rtx), mem_addr))

42883

{

42884

has_mem = true;

42885

num_mems++;

42886

Index: gcc/tree-ssa-pre.c

42887

===================================================================

42888

--- a/src/gcc/tree-ssa-pre.c (.../tags/gcc_4_8_2_release)

42889

+++ b/src/gcc/tree-ssa-pre.c (.../branches/gcc-4_8-branch)

42890

@@ -3664,6 +3664,12 @@

42891

if (dump_file && dump_flags & TDF_DETAILS)

42892

fprintf (dump_file, "Starting insert iteration %d\n", num_iterations);

42893

new_stuff = insert_aux (ENTRY_BLOCK_PTR);

42894

+

42895

+ /* Clear the NEW sets before the next iteration. We have already

42896

+ fully propagated its contents. */

42897

+ if (new_stuff)

42898

+ FOR_ALL_BB (bb)

42899

+ bitmap_set_free (NEW_SETS (bb));

42900

}

42901

statistics_histogram_event (cfun, "insert iterations", num_iterations);

42902

}

42903

Index: gcc/cfgcleanup.c

42904

===================================================================

42905

--- a/src/gcc/cfgcleanup.c (.../tags/gcc_4_8_2_release)

42906

+++ b/src/gcc/cfgcleanup.c (.../branches/gcc-4_8-branch)

42907

@@ -1293,7 +1293,6 @@

42908

{

42909

rtx i1, i2, last1, last2, afterlast1, afterlast2;

42910

int ninsns = 0;

42911

- rtx p1;

42912

enum replace_direction dir, last_dir, afterlast_dir;

42913

bool follow_fallthru, did_fallthru;

42914

42915

@@ -1321,8 +1320,9 @@

42916

|| (returnjump_p (i2) && !side_effects_p (PATTERN (i2))))

42917

{

42918

last2 = i2;

42919

- /* Count everything except for unconditional jump as insn. */

42920

- if (!simplejump_p (i2) && !returnjump_p (i2) && last1)

42921

+ /* Count everything except for unconditional jump as insn.

42922

+ Don't count any jumps if dir_p is NULL. */

42923

+ if (!simplejump_p (i2) && !returnjump_p (i2) && last1 && dir_p)

42924

ninsns++;

42925

i2 = PREV_INSN (i2);

42926

}

42927

@@ -1373,8 +1373,8 @@

42928

last1 = i1, last2 = i2;

42929

afterlast_dir = last_dir;

42930

last_dir = dir;

42931

- p1 = PATTERN (i1);

42932

- if (!(GET_CODE (p1) == USE || GET_CODE (p1) == CLOBBER))

42933

+ if (GET_CODE (PATTERN (i1)) != USE

42934

+ && GET_CODE (PATTERN (i1)) != CLOBBER)

42935

ninsns++;

42936

}

42937

42938

@@ -1420,7 +1420,8 @@

42939

/* Like flow_find_cross_jump, except start looking for a matching sequence from

42940

the head of the two blocks. Do not include jumps at the end.

42941

If STOP_AFTER is nonzero, stop after finding that many matching

42942

- instructions. */

42943

+ instructions. If STOP_AFTER is zero, count all INSN_P insns, if it is

42944

+ non-zero, only count active insns. */

42945

42946

int

42947

flow_find_head_matching_sequence (basic_block bb1, basic_block bb2, rtx *f1,

42948

@@ -1492,7 +1493,10 @@

42949

42950

beforelast1 = last1, beforelast2 = last2;

42951

last1 = i1, last2 = i2;

42952

- ninsns++;

42953

+ if (!stop_after

42954

+ || (GET_CODE (PATTERN (i1)) != USE

42955

+ && GET_CODE (PATTERN (i1)) != CLOBBER))

42956

+ ninsns++;

42957

}

42958

42959

if (i1 == BB_END (bb1) || i2 == BB_END (bb2)

42960

Index: gcc/simplify-rtx.c

42961

===================================================================

42962

--- a/src/gcc/simplify-rtx.c (.../tags/gcc_4_8_2_release)

42963

+++ b/src/gcc/simplify-rtx.c (.../branches/gcc-4_8-branch)

42964

@@ -639,11 +639,16 @@

42965

XEXP (op, 0), origmode);

42966

}

42967

42968

- /* Simplify (truncate:SI (op:DI (x:DI) (y:DI)))

42969

- to (op:SI (truncate:SI (x:DI)) (truncate:SI (x:DI))). */

42970

- if (GET_CODE (op) == PLUS

42971

- || GET_CODE (op) == MINUS

42972

- || GET_CODE (op) == MULT)

42973

+ /* If the machine can perform operations in the truncated mode, distribute

42974

+ the truncation, i.e. simplify (truncate:QI (op:SI (x:SI) (y:SI))) into

42975

+ (op:QI (truncate:QI (x:SI)) (truncate:QI (y:SI))). */

42976

+ if (1

42977

+#ifdef WORD_REGISTER_OPERATIONS

42978

+ && precision >= BITS_PER_WORD

42979

+#endif

42980

+ && (GET_CODE (op) == PLUS

42981

+ || GET_CODE (op) == MINUS

42982

+ || GET_CODE (op) == MULT))

42983

{

42984

rtx op0 = simplify_gen_unary (TRUNCATE, mode, XEXP (op, 0), op_mode);

42985

if (op0)

42986

Index: gcc/tree-ssa-live.c

42987

===================================================================

42988

--- a/src/gcc/tree-ssa-live.c (.../tags/gcc_4_8_2_release)

42989

+++ b/src/gcc/tree-ssa-live.c (.../branches/gcc-4_8-branch)

42990

@@ -394,7 +394,8 @@

42991

{

42992

/* When a global var becomes used for the first time also walk its

42993

initializer (non global ones don't have any). */

42994

- if (set_is_used (t) && is_global_var (t))

42995

+ if (set_is_used (t) && is_global_var (t)

42996

+ && DECL_CONTEXT (t) == current_function_decl)

42997

mark_all_vars_used (&DECL_INITIAL (t));

42998

}

42999

/* remove_unused_scope_block_p requires information about labels

43000

Index: gcc/tree-sra.c

43001

===================================================================

43002

--- a/src/gcc/tree-sra.c (.../tags/gcc_4_8_2_release)

43003

+++ b/src/gcc/tree-sra.c (.../branches/gcc-4_8-branch)

43004

@@ -1161,8 +1161,7 @@

43005

GIMPLE_ASM operands with memory constrains which cannot be scalarized. */

43006

43007

static bool

43008

-asm_visit_addr (gimple stmt ATTRIBUTE_UNUSED, tree op,

43009

- void *data ATTRIBUTE_UNUSED)

43010

+asm_visit_addr (gimple, tree op, tree, void *)

43011

{

43012

op = get_base_address (op);

43013

if (op

43014

@@ -2890,6 +2889,10 @@

43015

lacc);

43016

else

43017

drhs = NULL_TREE;

43018

+ if (drhs

43019

+ && !useless_type_conversion_p (lacc->type, TREE_TYPE (drhs)))

43020

+ drhs = fold_build1_loc (loc, VIEW_CONVERT_EXPR,

43021

+ lacc->type, drhs);

43022

ds = gimple_build_debug_bind (get_access_replacement (lacc),

43023

drhs, gsi_stmt (*old_gsi));

43024

gsi_insert_after (new_gsi, ds, GSI_NEW_STMT);

43025

@@ -4868,6 +4871,14 @@

43026

return false;

43027

}

43028

43029

+ if (!opt_for_fn (node->symbol.decl, optimize)

43030

+ || !opt_for_fn (node->symbol.decl, flag_ipa_sra))

43031

+ {

43032

+ if (dump_file)

43033

+ fprintf (dump_file, "Function not optimized.\n");

43034

+ return false;

43035

+ }

43036

+

43037

if (DECL_VIRTUAL_P (current_function_decl))

43038

{

43039

if (dump_file)

43040

Index: gcc/tree-predcom.c

43041

===================================================================

43042

--- a/src/gcc/tree-predcom.c (.../tags/gcc_4_8_2_release)

43043

+++ b/src/gcc/tree-predcom.c (.../branches/gcc-4_8-branch)

43044

@@ -1323,90 +1323,43 @@

43045

gsi_insert_after (&bsi, new_stmt, GSI_NEW_STMT);

43046

}

43047

43048

-/* Returns the reference to the address of REF in the ITER-th iteration of

43049

- LOOP, or NULL if we fail to determine it (ITER may be negative). We

43050

- try to preserve the original shape of the reference (not rewrite it

43051

- as an indirect ref to the address), to make tree_could_trap_p in

43052

- prepare_initializers_chain return false more often. */

43053

+/* Returns a memory reference to DR in the ITER-th iteration of

43054

+ the loop it was analyzed in. Append init stmts to STMTS. */

43055

43056

-static tree

43057

-ref_at_iteration (struct loop *loop, tree ref, int iter)

43058

+static tree

43059

+ref_at_iteration (data_reference_p dr, int iter, gimple_seq *stmts)

43060

{

43061

- tree idx, *idx_p, type, val, op0 = NULL_TREE, ret;

43062

- affine_iv iv;

43063

- bool ok;

43064

-

43065

- if (handled_component_p (ref))

43066

+ tree off = DR_OFFSET (dr);

43067

+ tree coff = DR_INIT (dr);

43068

+ if (iter == 0)

43069

+ ;

43070

+ else if (TREE_CODE (DR_STEP (dr)) == INTEGER_CST)

43071

+ coff = size_binop (PLUS_EXPR, coff,

43072

+ size_binop (MULT_EXPR, DR_STEP (dr), ssize_int (iter)));

43073

+ else

43074

+ off = size_binop (PLUS_EXPR, off,

43075

+ size_binop (MULT_EXPR, DR_STEP (dr), ssize_int (iter)));

43076

+ tree addr = fold_build_pointer_plus (DR_BASE_ADDRESS (dr), off);

43077

+ addr = force_gimple_operand_1 (addr, stmts, is_gimple_mem_ref_addr,

43078

+ NULL_TREE);

43079

+ tree alias_ptr = fold_convert (reference_alias_ptr_type (DR_REF (dr)), coff);

43080

+ /* While data-ref analysis punts on bit offsets it still handles

43081

+ bitfield accesses at byte boundaries. Cope with that. Note that

43082

+ we cannot simply re-apply the outer COMPONENT_REF because the

43083

+ byte-granular portion of it is already applied via DR_INIT and

43084

+ DR_OFFSET, so simply build a BIT_FIELD_REF knowing that the bits

43085

+ start at offset zero. */

43086

+ if (TREE_CODE (DR_REF (dr)) == COMPONENT_REF

43087

+ && DECL_BIT_FIELD (TREE_OPERAND (DR_REF (dr), 1)))

43088

{

43089

- op0 = ref_at_iteration (loop, TREE_OPERAND (ref, 0), iter);

43090

- if (!op0)

43091

- return NULL_TREE;

43092

+ tree field = TREE_OPERAND (DR_REF (dr), 1);

43093

+ return build3 (BIT_FIELD_REF, TREE_TYPE (DR_REF (dr)),

43094

+ build2 (MEM_REF, DECL_BIT_FIELD_TYPE (field),

43095

+ addr, alias_ptr),

43096

+ DECL_SIZE (field), bitsize_zero_node);

43097

}

43098

- else if (!INDIRECT_REF_P (ref)

43099

- && TREE_CODE (ref) != MEM_REF)

43100

- return unshare_expr (ref);

43101

-

43102

- if (TREE_CODE (ref) == MEM_REF)

43103

- {

43104

- ret = unshare_expr (ref);

43105

- idx = TREE_OPERAND (ref, 0);

43106

- idx_p = &TREE_OPERAND (ret, 0);

43107

- }

43108

- else if (TREE_CODE (ref) == COMPONENT_REF)

43109

- {

43110

- /* Check that the offset is loop invariant. */

43111

- if (TREE_OPERAND (ref, 2)

43112

- && !expr_invariant_in_loop_p (loop, TREE_OPERAND (ref, 2)))

43113

- return NULL_TREE;

43114

-

43115

- return build3 (COMPONENT_REF, TREE_TYPE (ref), op0,

43116

- unshare_expr (TREE_OPERAND (ref, 1)),

43117

- unshare_expr (TREE_OPERAND (ref, 2)));

43118

- }

43119

- else if (TREE_CODE (ref) == ARRAY_REF)

43120

- {

43121

- /* Check that the lower bound and the step are loop invariant. */

43122

- if (TREE_OPERAND (ref, 2)

43123

- && !expr_invariant_in_loop_p (loop, TREE_OPERAND (ref, 2)))

43124

- return NULL_TREE;

43125

- if (TREE_OPERAND (ref, 3)

43126

- && !expr_invariant_in_loop_p (loop, TREE_OPERAND (ref, 3)))

43127

- return NULL_TREE;

43128

-

43129

- ret = build4 (ARRAY_REF, TREE_TYPE (ref), op0, NULL_TREE,

43130

- unshare_expr (TREE_OPERAND (ref, 2)),

43131

- unshare_expr (TREE_OPERAND (ref, 3)));

43132

- idx = TREE_OPERAND (ref, 1);

43133

- idx_p = &TREE_OPERAND (ret, 1);

43134

- }

43135

else

43136

- return NULL_TREE;

43137

-

43138

- ok = simple_iv (loop, loop, idx, &iv, true);

43139

- if (!ok)

43140

- return NULL_TREE;

43141

- iv.base = expand_simple_operations (iv.base);

43142

- if (integer_zerop (iv.step))

43143

- *idx_p = unshare_expr (iv.base);

43144

- else

43145

- {

43146

- type = TREE_TYPE (iv.base);

43147

- if (POINTER_TYPE_P (type))

43148

- {

43149

- val = fold_build2 (MULT_EXPR, sizetype, iv.step,

43150

- size_int (iter));

43151

- val = fold_build_pointer_plus (iv.base, val);

43152

- }

43153

- else

43154

- {

43155

- val = fold_build2 (MULT_EXPR, type, iv.step,

43156

- build_int_cst_type (type, iter));

43157

- val = fold_build2 (PLUS_EXPR, type, iv.base, val);

43158

- }

43159

- *idx_p = unshare_expr (val);

43160

- }

43161

-

43162

- return ret;

43163

+ return fold_build2 (MEM_REF, TREE_TYPE (DR_REF (dr)), addr, alias_ptr);

43164

}

43165

43166

/* Get the initialization expression for the INDEX-th temporary variable

43167

@@ -2068,7 +2021,11 @@

43168

43169

stmt = find_common_use_stmt (&name1, &name2);

43170

43171

- if (!stmt)

43172

+ if (!stmt

43173

+ /* A simple post-dominance check - make sure the combination

43174

+ is executed under the same condition as the references. */

43175

+ || (gimple_bb (stmt) != gimple_bb (r1->stmt)

43176

+ && gimple_bb (stmt) != gimple_bb (r2->stmt)))

43177

return false;

43178

43179

acode = gimple_assign_rhs_code (stmt);

43180

@@ -2365,14 +2322,10 @@

43181

if (chain->inits[i] != NULL_TREE)

43182

continue;

43183

43184

- init = ref_at_iteration (loop, DR_REF (dr), (int) i - n);

43185

- if (!init)

43186

- return false;

43187

-

43188

+ init = ref_at_iteration (dr, (int) i - n, &stmts);

43189

if (!chain->all_always_accessed && tree_could_trap_p (init))

43190

return false;

43191

43192

- init = force_gimple_operand (init, &stmts, false, NULL_TREE);

43193

if (stmts)

43194

gsi_insert_seq_on_edge_immediate (entry, stmts);

43195

43196

@@ -2449,6 +2402,7 @@

43197

if (!components)

43198

{

43199

free_data_refs (datarefs);

43200

+ free_affine_expand_cache (&name_expansions);

43201

return false;

43202

}

43203

43204

Index: gcc/loop-iv.c

43205

===================================================================

43206

--- a/src/gcc/loop-iv.c (.../tags/gcc_4_8_2_release)

43207

+++ b/src/gcc/loop-iv.c (.../branches/gcc-4_8-branch)

43208

@@ -425,7 +425,9 @@

43209

&& !iv->first_special)

43210

{

43211

rtx val = get_iv_value (iv, const0_rtx);

43212

- val = lowpart_subreg (mode, val, iv->extend_mode);

43213

+ val = lowpart_subreg (mode, val,

43214

+ iv->extend == IV_UNKNOWN_EXTEND

43215

+ ? iv->mode : iv->extend_mode);

43216

43217

iv->base = val;

43218

iv->extend = IV_UNKNOWN_EXTEND;

43219

@@ -465,8 +467,14 @@

43220

&& !iv->first_special)

43221

{

43222

rtx val = get_iv_value (iv, const0_rtx);

43223

+ if (iv->extend_mode != iv->mode

43224

+ && iv->extend != IV_UNKNOWN_EXTEND

43225

+ && iv->extend != extend)

43226

+ val = lowpart_subreg (iv->mode, val, iv->extend_mode);

43227

val = simplify_gen_unary (iv_extend_to_rtx_code (extend), mode,

43228

- val, iv->extend_mode);

43229

+ val,

43230

+ iv->extend == extend

43231

+ ? iv->extend_mode : iv->mode);

43232

iv->base = val;

43233

iv->extend = IV_UNKNOWN_EXTEND;

43234

iv->mode = iv->extend_mode = mode;

43235

Index: gcc/ipa-prop.c

43236

===================================================================

43237

--- a/src/gcc/ipa-prop.c (.../tags/gcc_4_8_2_release)

43238

+++ b/src/gcc/ipa-prop.c (.../branches/gcc-4_8-branch)

43239

@@ -623,16 +623,22 @@

43240

if (parm_ainfo && parm_ainfo->parm_modified)

43241

return false;

43242

43243

- gcc_checking_assert (gimple_vuse (stmt) != NULL_TREE);

43244

- ao_ref_init (&refd, parm_load);

43245

- /* We can cache visited statements only when parm_ainfo is available and when

43246

- we are looking at a naked load of the whole parameter. */

43247

- if (!parm_ainfo || TREE_CODE (parm_load) != PARM_DECL)

43248

- visited_stmts = NULL;

43249

+ if (optimize)

43250

+ {

43251

+ gcc_checking_assert (gimple_vuse (stmt) != NULL_TREE);

43252

+ ao_ref_init (&refd, parm_load);

43253

+ /* We can cache visited statements only when parm_ainfo is available and

43254

+ when we are looking at a naked load of the whole parameter. */

43255

+ if (!parm_ainfo || TREE_CODE (parm_load) != PARM_DECL)

43256

+ visited_stmts = NULL;

43257

+ else

43258

+ visited_stmts = &parm_ainfo->parm_visited_statements;

43259

+ walk_aliased_vdefs (&refd, gimple_vuse (stmt), mark_modified, &modified,

43260

+ visited_stmts);

43261

+ }

43262

else

43263

- visited_stmts = &parm_ainfo->parm_visited_statements;

43264

- walk_aliased_vdefs (&refd, gimple_vuse (stmt), mark_modified, &modified,

43265

- visited_stmts);

43266

+ modified = true;

43267

+

43268

if (parm_ainfo && modified)

43269

parm_ainfo->parm_modified = true;

43270

return !modified;

43271

@@ -740,7 +746,7 @@

43272

ipa_load_from_parm_agg_1 (vec<ipa_param_descriptor_t> descriptors,

43273

struct param_analysis_info *parms_ainfo, gimple stmt,

43274

tree op, int *index_p, HOST_WIDE_INT *offset_p,

43275

- bool *by_ref_p)

43276

+ HOST_WIDE_INT *size_p, bool *by_ref_p)

43277

{

43278

int index;

43279

HOST_WIDE_INT size, max_size;

43280

@@ -758,6 +764,8 @@

43281

{

43282

*index_p = index;

43283

*by_ref_p = false;

43284

+ if (size_p)

43285

+ *size_p = size;

43286

return true;

43287

}

43288

return false;

43289

@@ -800,6 +808,8 @@

43290

{

43291

*index_p = index;

43292

*by_ref_p = true;

43293

+ if (size_p)

43294

+ *size_p = size;

43295

return true;

43296

}

43297

return false;

43298

@@ -814,7 +824,7 @@

43299

bool *by_ref_p)

43300

{

43301

return ipa_load_from_parm_agg_1 (info->descriptors, NULL, stmt, op, index_p,

43302

- offset_p, by_ref_p);

43303

+ offset_p, NULL, by_ref_p);

43304

}

43305

43306

/* Given that an actual argument is an SSA_NAME (given in NAME) and is a result

43307

@@ -1051,7 +1061,8 @@

43308

return;

43309

parm = TREE_OPERAND (expr, 0);

43310

index = ipa_get_param_decl_index (info, SSA_NAME_VAR (parm));

43311

- gcc_assert (index >= 0);

43312

+ if (index < 0)

43313

+ return;

43314

43315

cond_bb = single_pred (assign_bb);

43316

cond = last_stmt (cond_bb);

43317

@@ -1462,6 +1473,9 @@

43318

{

43319

struct cgraph_edge *cs;

43320

43321

+ if (!optimize)

43322

+ return;

43323

+

43324

for (cs = node->callees; cs; cs = cs->next_callee)

43325

{

43326

struct cgraph_node *callee = cgraph_function_or_thunk_node (cs->callee,

43327

@@ -1646,7 +1660,7 @@

43328

if (gimple_assign_single_p (def)

43329

&& ipa_load_from_parm_agg_1 (info->descriptors, parms_ainfo, def,

43330

gimple_assign_rhs1 (def), &index, &offset,

43331

- &by_ref))

43332

+ NULL, &by_ref))

43333

{

43334

struct cgraph_edge *cs = ipa_note_param_call (node, index, call);

43335

cs->indirect_info->offset = offset;

43336

@@ -1847,8 +1861,7 @@

43337

passed in DATA. */

43338

43339

static bool

43340

-visit_ref_for_mod_analysis (gimple stmt ATTRIBUTE_UNUSED,

43341

- tree op, void *data)

43342

+visit_ref_for_mod_analysis (gimple, tree op, tree, void *data)

43343

{

43344

struct ipa_node_params *info = (struct ipa_node_params *) data;

43345

43346

@@ -2126,7 +2139,6 @@

43347

we may create the first reference to the object in the unit. */

43348

if (!callee || callee->global.inlined_to)

43349

{

43350

- struct cgraph_node *first_clone = callee;

43351

43352

/* We are better to ensure we can refer to it.

43353

In the case of static functions we are out of luck, since we already

43354

@@ -2142,31 +2154,7 @@

43355

xstrdup (cgraph_node_name (ie->callee)), ie->callee->uid);

43356

return NULL;

43357

}

43358

-

43359

- /* Create symbol table node. Even if inline clone exists, we can not take

43360

- it as a target of non-inlined call. */

43361

- callee = cgraph_create_node (target);

43362

-

43363

- /* OK, we previously inlined the function, then removed the offline copy and

43364

- now we want it back for external call. This can happen when devirtualizing

43365

- while inlining function called once that happens after extern inlined and

43366

- virtuals are already removed. In this case introduce the external node

43367

- and make it available for call. */

43368

- if (first_clone)

43369

- {

43370

- first_clone->clone_of = callee;

43371

- callee->clones = first_clone;

43372

- symtab_prevail_in_asm_name_hash ((symtab_node)callee);

43373

- symtab_insert_node_to_hashtable ((symtab_node)callee);

43374

- if (dump_file)

43375

- fprintf (dump_file, "ipa-prop: Introduced new external node "

43376

- "(%s/%i) and turned into root of the clone tree.\n",

43377

- xstrdup (cgraph_node_name (callee)), callee->uid);

43378

- }

43379

- else if (dump_file)

43380

- fprintf (dump_file, "ipa-prop: Introduced new external node "

43381

- "(%s/%i).\n",

43382

- xstrdup (cgraph_node_name (callee)), callee->uid);

43383

+ callee = cgraph_get_create_real_symbol_node (target);

43384

}

43385

ipa_check_create_node_params ();

43386

43387

@@ -3902,7 +3890,7 @@

43388

struct ipa_agg_replacement_value *v;

43389

gimple stmt = gsi_stmt (gsi);

43390

tree rhs, val, t;

43391

- HOST_WIDE_INT offset;

43392

+ HOST_WIDE_INT offset, size;

43393

int index;

43394

bool by_ref, vce;

43395

43396

@@ -3929,13 +3917,15 @@

43397

continue;

43398

43399

if (!ipa_load_from_parm_agg_1 (descriptors, parms_ainfo, stmt,

43400

- rhs, &index, &offset, &by_ref))

43401

+ rhs, &index, &offset, &size, &by_ref))

43402

continue;

43403

for (v = aggval; v; v = v->next)

43404

if (v->index == index

43405

&& v->offset == offset)

43406

break;

43407

- if (!v || v->by_ref != by_ref)

43408

+ if (!v

43409

+ || v->by_ref != by_ref

43410

+ || tree_low_cst (TYPE_SIZE (TREE_TYPE (v->value)), 0) != size)

43411

continue;

43412

43413

gcc_checking_assert (is_gimple_ip_invariant (v->value));

43414

Index: gcc/tree-ssa-dce.c

43415

===================================================================

43416

--- a/src/gcc/tree-ssa-dce.c (.../tags/gcc_4_8_2_release)

43417

+++ b/src/gcc/tree-ssa-dce.c (.../branches/gcc-4_8-branch)

43418

@@ -1307,26 +1307,19 @@

43419

stats.total++;

43420

43421

/* We can mark a call to free as not necessary if the

43422

- defining statement of its argument is an allocation

43423

- function and that is not necessary itself. */

43424

- if (gimple_call_builtin_p (stmt, BUILT_IN_FREE))

43425

+ defining statement of its argument is not necessary

43426

+ (and thus is getting removed). */

43427

+ if (gimple_plf (stmt, STMT_NECESSARY)

43428

+ && gimple_call_builtin_p (stmt, BUILT_IN_FREE))

43429

{

43430

tree ptr = gimple_call_arg (stmt, 0);

43431

- tree callee2;

43432

- gimple def_stmt;

43433

- if (TREE_CODE (ptr) != SSA_NAME)

43434

- continue;

43435

- def_stmt = SSA_NAME_DEF_STMT (ptr);

43436

- if (!is_gimple_call (def_stmt)

43437

- || gimple_plf (def_stmt, STMT_NECESSARY))

43438

- continue;

43439

- callee2 = gimple_call_fndecl (def_stmt);

43440

- if (callee2 == NULL_TREE

43441

- || DECL_BUILT_IN_CLASS (callee2) != BUILT_IN_NORMAL

43442

- || (DECL_FUNCTION_CODE (callee2) != BUILT_IN_MALLOC

43443

- && DECL_FUNCTION_CODE (callee2) != BUILT_IN_CALLOC))

43444

- continue;

43445

- gimple_set_plf (stmt, STMT_NECESSARY, false);

43446

+ if (TREE_CODE (ptr) == SSA_NAME)

43447

+ {

43448

+ gimple def_stmt = SSA_NAME_DEF_STMT (ptr);

43449

+ if (!gimple_nop_p (def_stmt)

43450

+ && !gimple_plf (def_stmt, STMT_NECESSARY))

43451

+ gimple_set_plf (stmt, STMT_NECESSARY, false);

43452

+ }

43453

}

43454

43455

/* If GSI is not necessary then remove it. */

43456

Index: gcc/tree-ssa-ter.c

43457

===================================================================

43458

--- a/src/gcc/tree-ssa-ter.c (.../tags/gcc_4_8_2_release)

43459

+++ b/src/gcc/tree-ssa-ter.c (.../branches/gcc-4_8-branch)

43460

@@ -590,6 +590,30 @@

43461

}

43462

43463

43464

+/* Helper function for find_ssaname_in_stores. Called via walk_tree to

43465

+ find a SSA_NAME DATA somewhere in *TP. */

43466

+

43467

+static tree

43468

+find_ssaname (tree *tp, int *walk_subtrees, void *data)

43469

+{

43470

+ tree var = (tree) data;

43471

+ if (*tp == var)

43472

+ return var;

43473

+ else if (IS_TYPE_OR_DECL_P (*tp))

43474

+ *walk_subtrees = 0;

43475

+ return NULL_TREE;

43476

+}

43477

+

43478

+/* Helper function for find_replaceable_in_bb. Return true if SSA_NAME DATA

43479

+ is used somewhere in T, which is a store in the statement. Called via

43480

+ walk_stmt_load_store_addr_ops. */

43481

+

43482

+static bool

43483

+find_ssaname_in_store (gimple, tree, tree t, void *data)

43484

+{

43485

+ return walk_tree (&t, find_ssaname, data, NULL) != NULL_TREE;

43486

+}

43487

+

43488

/* This function processes basic block BB, and looks for variables which can

43489

be replaced by their expressions. Results are stored in the table TAB. */

43490

43491

@@ -643,8 +667,7 @@

43492

/* If the stmt does a memory store and the replacement

43493

is a load aliasing it avoid creating overlapping

43494

assignments which we cannot expand correctly. */

43495

- if (gimple_vdef (stmt)

43496

- && gimple_assign_single_p (stmt))

43497

+ if (gimple_vdef (stmt))

43498

{

43499

gimple def_stmt = SSA_NAME_DEF_STMT (use);

43500

while (is_gimple_assign (def_stmt)

43501

@@ -653,9 +676,29 @@

43502

= SSA_NAME_DEF_STMT (gimple_assign_rhs1 (def_stmt));

43503

if (gimple_vuse (def_stmt)

43504

&& gimple_assign_single_p (def_stmt)

43505

- && refs_may_alias_p (gimple_assign_lhs (stmt),

43506

- gimple_assign_rhs1 (def_stmt)))

43507

- same_root_var = true;

43508

+ && stmt_may_clobber_ref_p (stmt,

43509

+ gimple_assign_rhs1 (def_stmt)))

43510

+ {

43511

+ /* For calls, it is not a problem if USE is among

43512

+ call's arguments or say OBJ_TYPE_REF argument,

43513

+ all those necessarily need to be evaluated before

43514

+ the call that may clobber the memory. But if

43515

+ LHS of the call refers to USE, expansion might

43516

+ evaluate it after the call, prevent TER in that

43517

+ case.

43518

+ For inline asm, allow TER of loads into input

43519

+ arguments, but disallow TER for USEs that occur

43520

+ somewhere in outputs. */

43521

+ if (is_gimple_call (stmt)

43522

+ || gimple_code (stmt) == GIMPLE_ASM)

43523

+ {

43524

+ if (walk_stmt_load_store_ops (stmt, use, NULL,

43525

+ find_ssaname_in_store))

43526

+ same_root_var = true;

43527

+ }

43528

+ else

43529

+ same_root_var = true;

43530

+ }

43531

}

43532

43533

/* Mark expression as replaceable unless stmt is volatile, or the

43534

Index: gcc/ira.c

43535

===================================================================

43536

--- a/src/gcc/ira.c (.../tags/gcc_4_8_2_release)

43537

+++ b/src/gcc/ira.c (.../branches/gcc-4_8-branch)

43538

@@ -4742,6 +4742,18 @@

43539

if (need_dce && optimize)

43540

run_fast_dce ();

43541

43542

+ /* Diagnose uses of the hard frame pointer when it is used as a global

43543

+ register. Often we can get away with letting the user appropriate

43544

+ the frame pointer, but we should let them know when code generation

43545

+ makes that impossible. */

43546

+ if (global_regs[HARD_FRAME_POINTER_REGNUM] && frame_pointer_needed)

43547

+ {

43548

+ tree decl = global_regs_decl[HARD_FRAME_POINTER_REGNUM];

43549

+ error_at (DECL_SOURCE_LOCATION (current_function_decl),

43550

+ "frame pointer required, but reserved");

43551

+ inform (DECL_SOURCE_LOCATION (decl), "for %qD", decl);

43552

+ }

43553

+

43554

timevar_pop (TV_IRA);

43555

}

43556

43557

Index: gcc/rtl.h

43558

===================================================================

43559

--- a/src/gcc/rtl.h (.../tags/gcc_4_8_2_release)

43560

+++ b/src/gcc/rtl.h (.../branches/gcc-4_8-branch)

43561

@@ -2705,6 +2705,8 @@

43562

const_rtx, rtx);

43563

extern int read_dependence (const_rtx, const_rtx);

43564

extern int anti_dependence (const_rtx, const_rtx);

43565

+extern int canon_anti_dependence (const_rtx, bool,

43566

+ const_rtx, enum machine_mode, rtx);

43567

extern int output_dependence (const_rtx, const_rtx);

43568

extern int may_alias_p (const_rtx, const_rtx);

43569

extern void init_alias_target (void);

43570

@@ -2789,6 +2791,8 @@

43571

#define fatal_insn_not_found(insn) \

43572

_fatal_insn_not_found (insn, __FILE__, __LINE__, __FUNCTION__)

43573

43574

+/* reginfo.c */

43575

+extern tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];

43576

43577

43578

#endif /* ! GCC_RTL_H */

43579

Index: gcc/tree-vect-stmts.c

43580

===================================================================

43581

--- a/src/gcc/tree-vect-stmts.c (.../tags/gcc_4_8_2_release)

43582

+++ b/src/gcc/tree-vect-stmts.c (.../branches/gcc-4_8-branch)

43583

@@ -4369,6 +4369,20 @@

43584

return false;

43585

}

43586

43587

+ /* Invalidate assumptions made by dependence analysis when vectorization

43588

+ on the unrolled body effectively re-orders stmts. */

43589

+ if (ncopies > 1

43590

+ && STMT_VINFO_MIN_NEG_DIST (stmt_info) != 0

43591

+ && ((unsigned)LOOP_VINFO_VECT_FACTOR (loop_vinfo)

43592

+ > STMT_VINFO_MIN_NEG_DIST (stmt_info)))

43593

+ {

43594

+ if (dump_enabled_p ())

43595

+ dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,

43596

+ "cannot perform implicit CSE when unrolling "

43597

+ "with negative dependence distance\n");

43598

+ return false;

43599

+ }

43600

+

43601

if (!STMT_VINFO_RELEVANT_P (stmt_info) && !bb_vinfo)

43602

return false;

43603

43604

@@ -4425,6 +4439,20 @@

43605

else if (!vect_grouped_load_supported (vectype, group_size))

43606

return false;

43607

}

43608

+

43609

+ /* Invalidate assumptions made by dependence analysis when vectorization

43610

+ on the unrolled body effectively re-orders stmts. */

43611

+ if (!PURE_SLP_STMT (stmt_info)

43612

+ && STMT_VINFO_MIN_NEG_DIST (stmt_info) != 0

43613

+ && ((unsigned)LOOP_VINFO_VECT_FACTOR (loop_vinfo)

43614

+ > STMT_VINFO_MIN_NEG_DIST (stmt_info)))

43615

+ {

43616

+ if (dump_enabled_p ())

43617

+ dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,

43618

+ "cannot perform implicit CSE when performing "

43619

+ "group loads with negative dependence distance\n");

43620

+ return false;

43621

+ }

43622

}

43623

43624

43625

@@ -6054,8 +6082,7 @@

43626

corresponding to that mode. The theory is that any use that

43627

would cause problems with this will disable vectorization anyway. */

43628

else if (!SCALAR_FLOAT_TYPE_P (scalar_type)

43629

- && !INTEGRAL_TYPE_P (scalar_type)

43630

- && !POINTER_TYPE_P (scalar_type))

43631

+ && !INTEGRAL_TYPE_P (scalar_type))

43632

scalar_type = lang_hooks.types.type_for_mode (inner_mode, 1);

43633

43634

/* We can't build a vector type of elements with alignment bigger than

43635

Index: gcc/tree-ssa-phiprop.c

43636

===================================================================

43637

--- a/src/gcc/tree-ssa-phiprop.c (.../tags/gcc_4_8_2_release)

43638

+++ b/src/gcc/tree-ssa-phiprop.c (.../branches/gcc-4_8-branch)

43639

@@ -307,6 +307,12 @@

43640

gimple def_stmt;

43641

tree vuse;

43642

43643

+ /* Only replace loads in blocks that post-dominate the PHI node. That

43644

+ makes sure we don't end up speculating loads. */

43645

+ if (!dominated_by_p (CDI_POST_DOMINATORS,

43646

+ bb, gimple_bb (use_stmt)))

43647

+ continue;

43648

+

43649

/* Check whether this is a load of *ptr. */

43650

if (!(is_gimple_assign (use_stmt)

43651

&& TREE_CODE (gimple_assign_lhs (use_stmt)) == SSA_NAME

43652

@@ -378,6 +384,7 @@

43653

size_t n;

43654

43655

calculate_dominance_info (CDI_DOMINATORS);

43656

+ calculate_dominance_info (CDI_POST_DOMINATORS);

43657

43658

n = num_ssa_names;

43659

phivn = XCNEWVEC (struct phiprop_d, n);

43660

@@ -395,6 +402,8 @@

43661

bbs.release ();

43662

free (phivn);

43663

43664

+ free_dominance_info (CDI_POST_DOMINATORS);

43665

+

43666

return 0;

43667

}

43668

43669

Index: gcc/tree-object-size.c

43670

===================================================================

43671

--- a/src/gcc/tree-object-size.c (.../tags/gcc_4_8_2_release)

43672

+++ b/src/gcc/tree-object-size.c (.../branches/gcc-4_8-branch)

43673

@@ -64,7 +64,7 @@

43674

the subobject (innermost array or field with address taken).

43675

object_sizes[2] is lower bound for number of bytes till the end of

43676

the object and object_sizes[3] lower bound for subobject. */

43677

-static unsigned HOST_WIDE_INT *object_sizes[4];

43678

+static vec<unsigned HOST_WIDE_INT> object_sizes[4];

43679

43680

/* Bitmaps what object sizes have been computed already. */

43681

static bitmap computed[4];

43682

@@ -493,7 +493,7 @@

43683

43684

if (TREE_CODE (ptr) == SSA_NAME

43685

&& POINTER_TYPE_P (TREE_TYPE (ptr))

43686

- && object_sizes[object_size_type] != NULL)

43687

+ && computed[object_size_type] != NULL)

43688

{

43689

if (!bitmap_bit_p (computed[object_size_type], SSA_NAME_VERSION (ptr)))

43690

{

43691

@@ -501,6 +501,8 @@

43692

bitmap_iterator bi;

43693

unsigned int i;

43694

43695

+ if (num_ssa_names > object_sizes[object_size_type].length ())

43696

+ object_sizes[object_size_type].safe_grow (num_ssa_names);

43697

if (dump_file)

43698

{

43699

fprintf (dump_file, "Computing %s %sobject size for ",

43700

@@ -1162,12 +1164,12 @@

43701

{

43702

int object_size_type;

43703

43704

- if (object_sizes[0])

43705

+ if (computed[0])

43706

return;

43707

43708

for (object_size_type = 0; object_size_type <= 3; object_size_type++)

43709

{

43710

- object_sizes[object_size_type] = XNEWVEC (unsigned HOST_WIDE_INT, num_ssa_names);

43711

+ object_sizes[object_size_type].safe_grow (num_ssa_names);

43712

computed[object_size_type] = BITMAP_ALLOC (NULL);

43713

}

43714

43715

@@ -1184,9 +1186,8 @@

43716

43717

for (object_size_type = 0; object_size_type <= 3; object_size_type++)

43718

{

43719

- free (object_sizes[object_size_type]);

43720

+ object_sizes[object_size_type].release ();

43721

BITMAP_FREE (computed[object_size_type]);

43722

- object_sizes[object_size_type] = NULL;

43723

}

43724

}

43725

43726

@@ -1202,18 +1203,11 @@

43727

gimple_stmt_iterator i;

43728

for (i = gsi_start_bb (bb); !gsi_end_p (i); gsi_next (&i))

43729

{

43730

- tree callee, result;

43731

+ tree result;

43732

gimple call = gsi_stmt (i);

43733

-

43734

- if (gimple_code (call) != GIMPLE_CALL)

43735

+ if (!gimple_call_builtin_p (call, BUILT_IN_OBJECT_SIZE))

43736

continue;

43737

43738

- callee = gimple_call_fndecl (call);

43739

- if (!callee

43740

- || DECL_BUILT_IN_CLASS (callee) != BUILT_IN_NORMAL

43741

- || DECL_FUNCTION_CODE (callee) != BUILT_IN_OBJECT_SIZE)

43742

- continue;

43743

-

43744

init_object_sizes ();

43745

result = fold_call_stmt (call, false);

43746

if (!result)

43747

@@ -1240,20 +1234,32 @@

43748

continue;

43749

}

43750

43751

+ gcc_assert (TREE_CODE (result) == INTEGER_CST);

43752

+

43753

if (dump_file && (dump_flags & TDF_DETAILS))

43754

{

43755

fprintf (dump_file, "Simplified\n ");

43756

print_gimple_stmt (dump_file, call, 0, dump_flags);

43757

+ fprintf (dump_file, " to ");

43758

+ print_generic_expr (dump_file, result, 0);

43759

+ fprintf (dump_file, "\n");

43760

}

43761

43762

- if (!update_call_from_tree (&i, result))

43763

- gcc_unreachable ();

43764

+ tree lhs = gimple_call_lhs (call);

43765

+ if (!lhs)

43766

+ continue;

43767

43768

- if (dump_file && (dump_flags & TDF_DETAILS))

43769

+ /* Propagate into all uses and fold those stmts. */

43770

+ gimple use_stmt;

43771

+ imm_use_iterator iter;

43772

+ FOR_EACH_IMM_USE_STMT (use_stmt, iter, lhs)

43773

{

43774

- fprintf (dump_file, "to\n ");

43775

- print_gimple_stmt (dump_file, gsi_stmt (i), 0, dump_flags);

43776

- fprintf (dump_file, "\n");

43777

+ use_operand_p use_p;

43778

+ FOR_EACH_IMM_USE_ON_STMT (use_p, iter)

43779

+ SET_USE (use_p, result);

43780

+ gimple_stmt_iterator gsi = gsi_for_stmt (use_stmt);

43781

+ fold_stmt (&gsi);

43782

+ update_stmt (gsi_stmt (gsi));

43783

}

43784

}

43785

}

43786

Index: gcc/combine.c

43787

===================================================================

43788

--- a/src/gcc/combine.c (.../tags/gcc_4_8_2_release)

43789

+++ b/src/gcc/combine.c (.../branches/gcc-4_8-branch)

43790

@@ -3884,15 +3884,19 @@

43791

43792

PATTERN (undobuf.other_insn) = other_pat;

43793

43794

- /* If any of the notes in OTHER_INSN were REG_UNUSED, ensure that they

43795

- are still valid. Then add any non-duplicate notes added by

43796

- recog_for_combine. */

43797

+ /* If any of the notes in OTHER_INSN were REG_DEAD or REG_UNUSED,

43798

+ ensure that they are still valid. Then add any non-duplicate

43799

+ notes added by recog_for_combine. */

43800

for (note = REG_NOTES (undobuf.other_insn); note; note = next)

43801

{

43802

next = XEXP (note, 1);

43803

43804

- if (REG_NOTE_KIND (note) == REG_UNUSED

43805

- && ! reg_set_p (XEXP (note, 0), PATTERN (undobuf.other_insn)))

43806

+ if ((REG_NOTE_KIND (note) == REG_DEAD

43807

+ && !reg_referenced_p (XEXP (note, 0),

43808

+ PATTERN (undobuf.other_insn)))

43809

+ ||(REG_NOTE_KIND (note) == REG_UNUSED

43810

+ && !reg_set_p (XEXP (note, 0),

43811

+ PATTERN (undobuf.other_insn))))

43812

remove_note (undobuf.other_insn, note);

43813

}

43814

43815

@@ -5798,8 +5802,15 @@

43816

return x;

43817

}

43818

43819

- /* If the code changed, return a whole new comparison. */

43820

- if (new_code != code)

43821

+ /* If the code changed, return a whole new comparison.

43822

+ We also need to avoid using SUBST in cases where

43823

+ simplify_comparison has widened a comparison with a CONST_INT,

43824

+ since in that case the wider CONST_INT may fail the sanity

43825

+ checks in do_SUBST. */

43826

+ if (new_code != code

43827

+ || (CONST_INT_P (op1)

43828

+ && GET_MODE (op0) != GET_MODE (XEXP (x, 0))

43829

+ && GET_MODE (op0) != GET_MODE (XEXP (x, 1))))

43830

return gen_rtx_fmt_ee (new_code, mode, op0, op1);

43831

43832

/* Otherwise, keep this operation, but maybe change its operands.

43833

@@ -7991,7 +8002,7 @@

43834

if (code == CALL || code == ASM_OPERANDS || code == CLOBBER)

43835

return x;

43836

43837

- /* We want to perform the operation is its present mode unless we know

43838

+ /* We want to perform the operation in its present mode unless we know

43839

that the operation is valid in MODE, in which case we do the operation

43840

in MODE. */

43841

op_mode = ((GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (x))

43842

@@ -8427,9 +8438,10 @@

43843

GET_MODE (x), GEN_INT (mask),

43844

XEXP (x, 1));

43845

if (temp && CONST_INT_P (temp))

43846

- SUBST (XEXP (x, 0),

43847

- force_to_mode (XEXP (x, 0), GET_MODE (x),

43848

- INTVAL (temp), next_select));

43849

+ x = simplify_gen_binary (code, GET_MODE (x),

43850

+ force_to_mode (XEXP (x, 0), GET_MODE (x),

43851

+ INTVAL (temp), next_select),

43852

+ XEXP (x, 1));

43853

}

43854

break;

43855

43856

@@ -8497,14 +8509,16 @@

43857

/* We have no way of knowing if the IF_THEN_ELSE can itself be

43858

written in a narrower mode. We play it safe and do not do so. */

43859

43860

- SUBST (XEXP (x, 1),

43861

- gen_lowpart_or_truncate (GET_MODE (x),

43862

- force_to_mode (XEXP (x, 1), mode,

43863

- mask, next_select)));

43864

- SUBST (XEXP (x, 2),

43865

- gen_lowpart_or_truncate (GET_MODE (x),

43866

- force_to_mode (XEXP (x, 2), mode,

43867

- mask, next_select)));

43868

+ op0 = gen_lowpart_or_truncate (GET_MODE (x),

43869

+ force_to_mode (XEXP (x, 1), mode,

43870

+ mask, next_select));

43871

+ op1 = gen_lowpart_or_truncate (GET_MODE (x),

43872

+ force_to_mode (XEXP (x, 2), mode,

43873

+ mask, next_select));

43874

+ if (op0 != XEXP (x, 1) || op1 != XEXP (x, 2))

43875

+ x = simplify_gen_ternary (IF_THEN_ELSE, GET_MODE (x),

43876

+ GET_MODE (XEXP (x, 0)), XEXP (x, 0),

43877

+ op0, op1);

43878

break;

43879

43880

default:

43881

Index: gcc/bb-reorder.c

43882

===================================================================

43883

--- a/src/gcc/bb-reorder.c (.../tags/gcc_4_8_2_release)

43884

+++ b/src/gcc/bb-reorder.c (.../branches/gcc-4_8-branch)

43885

@@ -1685,9 +1685,8 @@

43886

edge e;

43887

edge_iterator ei;

43888

43889

- /* Find EDGE_CAN_FALLTHRU edge. */

43890

FOR_EACH_EDGE (e, ei, cur_bb->succs)

43891

- if (e->flags & EDGE_CAN_FALLTHRU)

43892

+ if (e->flags & EDGE_FALLTHRU)

43893

{

43894

fall_thru = e;

43895

break;

43896

Index: gcc/tree-flow.h

43897

===================================================================

43898

--- a/src/gcc/tree-flow.h (.../tags/gcc_4_8_2_release)

43899

+++ b/src/gcc/tree-flow.h (.../branches/gcc-4_8-branch)

43900

@@ -425,6 +425,7 @@

43901

basic_block, tree);

43902

void remove_edge_and_dominated_blocks (edge);

43903

bool tree_node_can_be_shared (tree);

43904

+extern unsigned int split_critical_edges (void);

43905

43906

/* In tree-cfgcleanup.c */

43907

extern bitmap cfgcleanup_altered_bbs;

43908

Index: gcc/config.gcc

43909

===================================================================

43910

--- a/src/gcc/config.gcc (.../tags/gcc_4_8_2_release)

43911

+++ b/src/gcc/config.gcc (.../branches/gcc-4_8-branch)

43912

@@ -420,7 +420,7 @@

43913

;;

43914

powerpc*-*-*)

43915

cpu_type=rs6000

43916

- extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h"

43917

+ extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h htmintrin.h htmxlintrin.h"

43918

need_64bit_hwint=yes

43919

case x$with_cpu in

43920

xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[345678]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)

43921

@@ -1761,6 +1761,14 @@

43922

tmake_file="${tmake_file} microblaze/t-microblaze-linux"

43923

;;

43924

microblaze*-*-rtems*)

43925

+ case $target in

43926

+ microblazeel-*)

43927

+ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=0"

43928

+ ;;

43929

+ microblaze-*)

43930

+ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=4321"

43931

+ ;;

43932

+ esac

43933

tm_file="${tm_file} dbxelf.h"

43934

tm_file="${tm_file} microblaze/rtems.h rtems.h newlib-stdint.h"

43935

c_target_objs="${c_target_objs} microblaze-c.o"

43936

@@ -2073,7 +2081,7 @@

43937

tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"

43938

case ${target} in

43939

powerpc*le-*-*)

43940

- tm_file="${tm_file} rs6000/sysv4le.h" ;;

43941

+ tm_file="${tm_file} rs6000/sysv4le.h" ;;

43942

esac

43943

maybe_biarch=yes

43944

case ${target} in

43945

@@ -2096,6 +2104,19 @@

43946

fi

43947

tm_file="rs6000/biarch64.h ${tm_file} rs6000/linux64.h glibc-stdint.h"

43948

tmake_file="$tmake_file rs6000/t-linux64"

43949

+ case ${target} in

43950

+ powerpc*le-*-*)

43951

+ tmake_file="$tmake_file rs6000/t-linux64le"

43952

+ case ${enable_targets} in

43953

+ all | *powerpc64-* | *powerpc-*)

43954

+ tmake_file="$tmake_file rs6000/t-linux64lebe" ;;

43955

+ esac ;;

43956

+ *)

43957

+ case ${enable_targets} in

43958

+ all | *powerpc64le-* | *powerpcle-*)

43959

+ tmake_file="$tmake_file rs6000/t-linux64bele" ;;

43960

+ esac ;;

43961

+ esac

43962

extra_options="${extra_options} rs6000/linux64.opt"

43963

;;

43964

*)

43965

@@ -2963,11 +2984,18 @@

43966

with_cpu=8540

43967

fi

43968

;;

43969

- sparc-leon*-*)

43970

- with_cpu=v8;

43971

- ;;

43972

sparc*-*-*)

43973

- with_cpu="`echo ${target} | sed 's/-.*$//'`"

43974

+ case ${target} in

43975

+ *-leon-*)

43976

+ with_cpu=leon

43977

+ ;;

43978

+ *-leon[3-9]*)

43979

+ with_cpu=leon3

43980

+ ;;

43981

+ *)

43982

+ with_cpu="`echo ${target} | sed 's/-.*$//'`"

43983

+ ;;

43984

+ esac

43985

;;

43986

esac

43987

43988

@@ -3494,7 +3522,7 @@

43989

;;

43990

43991

powerpc*-*-* | rs6000-*-*)

43992

- supported_defaults="cpu cpu_32 cpu_64 float tune tune_32 tune_64"

43993

+ supported_defaults="abi cpu cpu_32 cpu_64 float tune tune_32 tune_64"

43994

43995

for which in cpu cpu_32 cpu_64 tune tune_32 tune_64; do

43996

eval "val=\$with_$which"

43997

@@ -3531,6 +3559,16 @@

43998

;;

43999

esac

44000

done

44001

+

44002

+ case "$with_abi" in

44003

+ "" | elfv1 | elfv2 )

44004

+ #OK

44005

+ ;;

44006

+ *)

44007

+ echo "Unknown ABI used in --with-abi=$with_abi"

44008

+ exit 1

44009

+ ;;

44010

+ esac

44011

;;

44012

44013

s390*-*-*)

44014

@@ -3587,7 +3625,7 @@

44015

case ${val} in

44016

"" | sparc | sparcv9 | sparc64 \

44017

| v7 | cypress \

44018

- | v8 | supersparc | hypersparc | leon \

44019

44020

| sparclite | f930 | f934 | sparclite86x \

44021

| sparclet | tsc701 \

44022

44023

@@ -3745,15 +3783,6 @@

44024

cxx_target_objs="${cxx_target_objs} sh-c.o"

44025

;;

44026

44027

- sparc-leon*-*)

44028

- if test x$with_tune = x ; then

44029

- with_tune=leon;

44030

- fi

44031

-

44032

- # The SPARC port checks this value at compile-time.

44033

- target_cpu_default2="TARGET_CPU_$with_cpu"

44034

- ;;

44035

-

44036

sparc*-*-*)

44037

# Some standard aliases.

44038

case x$with_cpu in

44039

@@ -3765,6 +3794,17 @@

44040

;;

44041

esac

44042

44043

+ if test x$with_tune = x ; then

44044

+ case ${target} in

44045

+ *-leon-*)

44046

+ with_tune=leon

44047

+ ;;

44048

+ *-leon[3-9]*)

44049

+ with_tune=leon3

44050

+ ;;

44051

+ esac

44052

+ fi

44053

+

44054

# The SPARC port checks this value at compile-time.

44055

target_cpu_default2="TARGET_CPU_$with_cpu"

44056

;;

44057

Index: gcc/reginfo.c

44058

===================================================================

44059

--- a/src/gcc/reginfo.c (.../tags/gcc_4_8_2_release)

44060

+++ b/src/gcc/reginfo.c (.../branches/gcc-4_8-branch)

44061

@@ -85,7 +85,7 @@

44062

char global_regs[FIRST_PSEUDO_REGISTER];

44063

44064

/* Declaration for the global register. */

44065

-static tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];

44066

+tree global_regs_decl[FIRST_PSEUDO_REGISTER];

44067

44068

/* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used

44069

in dataflow more conveniently. */

44070

@@ -620,40 +620,35 @@

44071

mode = GET_MODE_WIDER_MODE (mode))

44072

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

44073

&& HARD_REGNO_MODE_OK (regno, mode)

44074

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

44075

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

44076

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

44077

found_mode = mode;

44078

44079

- if (found_mode != VOIDmode)

44080

- return found_mode;

44081

-

44082

for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);

44083

mode != VOIDmode;

44084

mode = GET_MODE_WIDER_MODE (mode))

44085

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

44086

&& HARD_REGNO_MODE_OK (regno, mode)

44087

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

44088

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

44089

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

44090

found_mode = mode;

44091

44092

- if (found_mode != VOIDmode)

44093

- return found_mode;

44094

-

44095

for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);

44096

mode != VOIDmode;

44097

mode = GET_MODE_WIDER_MODE (mode))

44098

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

44099

&& HARD_REGNO_MODE_OK (regno, mode)

44100

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

44101

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

44102

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

44103

found_mode = mode;

44104

44105

- if (found_mode != VOIDmode)

44106

- return found_mode;

44107

-

44108

for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);

44109

mode != VOIDmode;

44110

mode = GET_MODE_WIDER_MODE (mode))

44111

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

44112

&& HARD_REGNO_MODE_OK (regno, mode)

44113

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

44114

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

44115

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

44116

found_mode = mode;

44117

44118

if (found_mode != VOIDmode)

44119

Index: gcc/Makefile.in

44120

===================================================================

44121

--- a/src/gcc/Makefile.in (.../tags/gcc_4_8_2_release)

44122

+++ b/src/gcc/Makefile.in (.../branches/gcc-4_8-branch)

44123

@@ -747,7 +747,8 @@

44124

44125

# Native linker and preprocessor flags. For x-fragment overrides.

44126

BUILD_LDFLAGS=@BUILD_LDFLAGS@

44127

-BUILD_CPPFLAGS=$(ALL_CPPFLAGS)

44128

+BUILD_CPPFLAGS= -I. -I$(@D) -I$(srcdir) -I$(srcdir)/$(@D) \

44129

+ -I$(srcdir)/../include @INCINTL@ $(CPPINC) $(CPPFLAGS)

44130

44131

# Actual name to use when installing a native compiler.

44132

GCC_INSTALL_NAME := $(shell echo gcc|sed '$(program_transform_name)')

44133

@@ -1827,7 +1828,7 @@

44134

"$(MULTILIB_EXCLUSIONS)" \

44135

"$(MULTILIB_OSDIRNAMES)" \

44136

"$(MULTILIB_REQUIRED)" \

44137

- "$(MULTIARCH_DIRNAME)" \

44138

+ "$(if $(MULTILIB_OSDIRNAMES),,$(MULTIARCH_DIRNAME))" \

44139

"$(MULTILIB_REUSE)" \

44140

"@enable_multilib@" \

44141

> tmp-mlib.h; \

44142

@@ -2256,7 +2257,7 @@

44143

$(FUNCTION_H) $(TM_H) coretypes.h \

44144

$(TREE_PASS_H) $(BASIC_BLOCK_H) $(BITMAP_H) \

44145

$(FLAGS_H) $(HASHTAB_H) pointer-set.h \

44146

- $(GIMPLE_H) $(TREE_INLINE_H) $(GIMPLE_PRETTY_PRINT_H)

44147

+ $(GIMPLE_H) $(TREE_INLINE_H) $(GIMPLE_PRETTY_PRINT_H) $(PARAMS_H)

44148

tree-ssa.o : tree-ssa.c $(TREE_FLOW_H) $(CONFIG_H) $(SYSTEM_H) \

44149

$(TREE_H) $(TM_P_H) $(EXPR_H) $(DIAGNOSTIC_H) \

44150

toplev.h $(FUNCTION_H) $(TM_H) coretypes.h \

44151

@@ -3037,7 +3038,7 @@

44152

$(TM_H) coretypes.h $(GIMPLE_H) \

44153

$(TREE_PASS_H) $(FLAGS_H) $(EXPR_H) $(BASIC_BLOCK_H) \

44154

$(GGC_H) $(OBSTACK_H) $(PARAMS_H) $(CPPLIB_H) $(PARAMS_H) \

44155

- $(GIMPLE_PRETTY_PRINT_H) langhooks.h

44156

+ $(GIMPLE_PRETTY_PRINT_H) langhooks.h $(OPTABS_H)

44157

tree-complex.o : tree-complex.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TREE_H) \

44158

$(TM_H) $(FLAGS_H) $(TREE_FLOW_H) $(GIMPLE_H) \

44159

tree-iterator.h $(TREE_PASS_H) tree-ssa-propagate.h

44160

@@ -3276,12 +3277,12 @@

44161

$(TM_H) $(RTL_H) $(REGS_H) insn-config.h insn-codes.h $(DF_H) \

44162

$(RECOG_H) output.h addresses.h $(REGS_H) hard-reg-set.h $(FLAGS_H) \

44163

$(FUNCTION_H) $(EXPR_H) $(BASIC_BLOCK_H) $(TM_P_H) $(EXCEPT_H) \

44164

- ira.h rtl-error.h $(LRA_INT_H)

44165

+ ira.h rtl-error.h $(LRA_INT_H) $(OPTABS_H)

44166

lra-eliminations.o : lra-eliminations.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \

44167

$(TM_H) $(RTL_H) $(REGS_H) insn-config.h $(DF_H) \

44168

$(RECOG_H) output.h $(REGS_H) hard-reg-set.h $(FLAGS_H) $(FUNCTION_H) \

44169

$(EXPR_H) $(BASIC_BLOCK_H) $(TM_P_H) $(EXCEPT_H) ira.h \

44170

- rtl-error.h $(LRA_INT_H)

44171

+ rtl-error.h $(LRA_INT_H) $(OPTABS_H)

44172

lra-lives.o : lra-lives.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \

44173

$(RTL_H) $(REGS_H) insn-config.h $(DF_H) \

44174

$(RECOG_H) output.h $(REGS_H) hard-reg-set.h $(FLAGS_H) $(FUNCTION_H) \

44175

Index: gcc/gimple.c

44176

===================================================================

44177

--- a/src/gcc/gimple.c (.../tags/gcc_4_8_2_release)

44178

+++ b/src/gcc/gimple.c (.../branches/gcc-4_8-branch)

44179

@@ -3841,42 +3841,46 @@

44180

44181

/* For the statement STMT call the callbacks VISIT_LOAD, VISIT_STORE and

44182

VISIT_ADDR if non-NULL on loads, store and address-taken operands

44183

- passing the STMT, the base of the operand and DATA to it. The base

44184

- will be either a decl, an indirect reference (including TARGET_MEM_REF)

44185

- or the argument of an address expression.

44186

+ passing the STMT, the base of the operand, the operand itself containing

44187

+ the base and DATA to it. The base will be either a decl, an indirect

44188

+ reference (including TARGET_MEM_REF) or the argument of an address

44189

+ expression.

44190

Returns the results of these callbacks or'ed. */

44191

44192

bool

44193

walk_stmt_load_store_addr_ops (gimple stmt, void *data,

44194

- bool (*visit_load)(gimple, tree, void *),

44195

- bool (*visit_store)(gimple, tree, void *),

44196

- bool (*visit_addr)(gimple, tree, void *))

44197

+ walk_stmt_load_store_addr_fn visit_load,

44198

+ walk_stmt_load_store_addr_fn visit_store,

44199

+ walk_stmt_load_store_addr_fn visit_addr)

44200

{

44201

bool ret = false;

44202

unsigned i;

44203

if (gimple_assign_single_p (stmt))

44204

{

44205

- tree lhs, rhs;

44206

+ tree lhs, rhs, arg;

44207

if (visit_store)

44208

{

44209

- lhs = get_base_loadstore (gimple_assign_lhs (stmt));

44210

+ arg = gimple_assign_lhs (stmt);

44211

+ lhs = get_base_loadstore (arg);

44212

if (lhs)

44213

- ret |= visit_store (stmt, lhs, data);

44214

+ ret |= visit_store (stmt, lhs, arg, data);

44215

}

44216

- rhs = gimple_assign_rhs1 (stmt);

44217

+ arg = gimple_assign_rhs1 (stmt);

44218

+ rhs = arg;

44219

while (handled_component_p (rhs))

44220

rhs = TREE_OPERAND (rhs, 0);

44221

if (visit_addr)

44222

{

44223

if (TREE_CODE (rhs) == ADDR_EXPR)

44224

- ret |= visit_addr (stmt, TREE_OPERAND (rhs, 0), data);

44225

+ ret |= visit_addr (stmt, TREE_OPERAND (rhs, 0), arg, data);

44226

else if (TREE_CODE (rhs) == TARGET_MEM_REF

44227

&& TREE_CODE (TMR_BASE (rhs)) == ADDR_EXPR)

44228

- ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (rhs), 0), data);

44229

+ ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (rhs), 0), arg,

44230

+ data);

44231

else if (TREE_CODE (rhs) == OBJ_TYPE_REF

44232

&& TREE_CODE (OBJ_TYPE_REF_OBJECT (rhs)) == ADDR_EXPR)

44233

ret |= visit_addr (stmt, TREE_OPERAND (OBJ_TYPE_REF_OBJECT (rhs),

44234

- 0), data);

44235

+ 0), arg, data);

44236

else if (TREE_CODE (rhs) == CONSTRUCTOR)

44237

{

44238

unsigned int ix;

44239

@@ -3884,23 +3888,23 @@

44240

44241

FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (rhs), ix, val)

44242

if (TREE_CODE (val) == ADDR_EXPR)

44243

- ret |= visit_addr (stmt, TREE_OPERAND (val, 0), data);

44244

+ ret |= visit_addr (stmt, TREE_OPERAND (val, 0), arg, data);

44245

else if (TREE_CODE (val) == OBJ_TYPE_REF

44246

&& TREE_CODE (OBJ_TYPE_REF_OBJECT (val)) == ADDR_EXPR)

44247

ret |= visit_addr (stmt,

44248

TREE_OPERAND (OBJ_TYPE_REF_OBJECT (val),

44249

- 0), data);

44250

+ 0), arg, data);

44251

}

44252

lhs = gimple_assign_lhs (stmt);

44253

if (TREE_CODE (lhs) == TARGET_MEM_REF

44254

&& TREE_CODE (TMR_BASE (lhs)) == ADDR_EXPR)

44255

- ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (lhs), 0), data);

44256

+ ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (lhs), 0), lhs, data);

44257

}

44258

if (visit_load)

44259

{

44260

rhs = get_base_loadstore (rhs);

44261

if (rhs)

44262

- ret |= visit_load (stmt, rhs, data);

44263

+ ret |= visit_load (stmt, rhs, arg, data);

44264

}

44265

}

44266

else if (visit_addr

44267

@@ -3913,7 +3917,7 @@

44268

if (op == NULL_TREE)

44269

;

44270

else if (TREE_CODE (op) == ADDR_EXPR)

44271

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

44272

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

44273

/* COND_EXPR and VCOND_EXPR rhs1 argument is a comparison

44274

tree with two operands. */

44275

else if (i == 1 && COMPARISON_CLASS_P (op))

44276

@@ -3920,10 +3924,10 @@

44277

{

44278

if (TREE_CODE (TREE_OPERAND (op, 0)) == ADDR_EXPR)

44279

ret |= visit_addr (stmt, TREE_OPERAND (TREE_OPERAND (op, 0),

44280

- 0), data);

44281

+ 0), op, data);

44282

if (TREE_CODE (TREE_OPERAND (op, 1)) == ADDR_EXPR)

44283

ret |= visit_addr (stmt, TREE_OPERAND (TREE_OPERAND (op, 1),

44284

- 0), data);

44285

+ 0), op, data);

44286

}

44287

}

44288

}

44289

@@ -3931,26 +3935,26 @@

44290

{

44291

if (visit_store)

44292

{

44293

- tree lhs = gimple_call_lhs (stmt);

44294

- if (lhs)

44295

+ tree arg = gimple_call_lhs (stmt);

44296

+ if (arg)

44297

{

44298

- lhs = get_base_loadstore (lhs);

44299

+ tree lhs = get_base_loadstore (arg);

44300

if (lhs)

44301

- ret |= visit_store (stmt, lhs, data);

44302

+ ret |= visit_store (stmt, lhs, arg, data);

44303

}

44304

}

44305

if (visit_load || visit_addr)

44306

for (i = 0; i < gimple_call_num_args (stmt); ++i)

44307

{

44308

- tree rhs = gimple_call_arg (stmt, i);

44309

+ tree arg = gimple_call_arg (stmt, i);

44310

if (visit_addr

44311

- && TREE_CODE (rhs) == ADDR_EXPR)

44312

- ret |= visit_addr (stmt, TREE_OPERAND (rhs, 0), data);

44313

+ && TREE_CODE (arg) == ADDR_EXPR)

44314

+ ret |= visit_addr (stmt, TREE_OPERAND (arg, 0), arg, data);

44315

else if (visit_load)

44316

{

44317

- rhs = get_base_loadstore (rhs);

44318

+ tree rhs = get_base_loadstore (arg);

44319

if (rhs)

44320

- ret |= visit_load (stmt, rhs, data);

44321

+ ret |= visit_load (stmt, rhs, arg, data);

44322

}

44323

}

44324

if (visit_addr

44325

@@ -3957,12 +3961,13 @@

44326

&& gimple_call_chain (stmt)

44327

&& TREE_CODE (gimple_call_chain (stmt)) == ADDR_EXPR)

44328

ret |= visit_addr (stmt, TREE_OPERAND (gimple_call_chain (stmt), 0),

44329

- data);

44330

+ gimple_call_chain (stmt), data);

44331

if (visit_addr

44332

&& gimple_call_return_slot_opt_p (stmt)

44333

&& gimple_call_lhs (stmt) != NULL_TREE

44334

&& TREE_ADDRESSABLE (TREE_TYPE (gimple_call_lhs (stmt))))

44335

- ret |= visit_addr (stmt, gimple_call_lhs (stmt), data);

44336

+ ret |= visit_addr (stmt, gimple_call_lhs (stmt),

44337

+ gimple_call_lhs (stmt), data);

44338

}

44339

else if (gimple_code (stmt) == GIMPLE_ASM)

44340

{

44341

@@ -3978,7 +3983,7 @@

44342

tree link = gimple_asm_output_op (stmt, i);

44343

tree op = get_base_loadstore (TREE_VALUE (link));

44344

if (op && visit_store)

44345

- ret |= visit_store (stmt, op, data);

44346

+ ret |= visit_store (stmt, op, TREE_VALUE (link), data);

44347

if (visit_addr)

44348

{

44349

constraint = TREE_STRING_POINTER

44350

@@ -3987,7 +3992,7 @@

44351

parse_output_constraint (&constraint, i, 0, 0, &allows_mem,

44352

&allows_reg, &is_inout);

44353

if (op && !allows_reg && allows_mem)

44354

- ret |= visit_addr (stmt, op, data);

44355

+ ret |= visit_addr (stmt, op, TREE_VALUE (link), data);

44356

}

44357

}

44358

if (visit_load || visit_addr)

44359

@@ -3997,7 +4002,7 @@

44360

tree op = TREE_VALUE (link);

44361

if (visit_addr

44362

&& TREE_CODE (op) == ADDR_EXPR)

44363

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

44364

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

44365

else if (visit_load || visit_addr)

44366

{

44367

op = get_base_loadstore (op);

44368

@@ -4004,7 +4009,7 @@

44369

if (op)

44370

{

44371

if (visit_load)

44372

- ret |= visit_load (stmt, op, data);

44373

+ ret |= visit_load (stmt, op, TREE_VALUE (link), data);

44374

if (visit_addr)

44375

{

44376

constraint = TREE_STRING_POINTER

44377

@@ -4013,7 +4018,8 @@

44378

0, oconstraints,

44379

&allows_mem, &allows_reg);

44380

if (!allows_reg && allows_mem)

44381

- ret |= visit_addr (stmt, op, data);

44382

+ ret |= visit_addr (stmt, op, TREE_VALUE (link),

44383

+ data);

44384

}

44385

}

44386

}

44387

@@ -4026,12 +4032,12 @@

44388

{

44389

if (visit_addr

44390

&& TREE_CODE (op) == ADDR_EXPR)

44391

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

44392

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

44393

else if (visit_load)

44394

{

44395

- op = get_base_loadstore (op);

44396

- if (op)

44397

- ret |= visit_load (stmt, op, data);

44398

+ tree base = get_base_loadstore (op);

44399

+ if (base)

44400

+ ret |= visit_load (stmt, base, op, data);

44401

}

44402

}

44403

}

44404

@@ -4042,7 +4048,7 @@

44405

{

44406

tree op = PHI_ARG_DEF (stmt, i);

44407

if (TREE_CODE (op) == ADDR_EXPR)

44408

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

44409

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

44410

}

44411

}

44412

else if (visit_addr

44413

@@ -4050,7 +4056,7 @@

44414

{

44415

tree op = gimple_goto_dest (stmt);

44416

if (TREE_CODE (op) == ADDR_EXPR)

44417

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

44418

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

44419

}

44420

44421

return ret;

44422

@@ -4061,8 +4067,8 @@

44423

44424

bool

44425

walk_stmt_load_store_ops (gimple stmt, void *data,

44426

- bool (*visit_load)(gimple, tree, void *),

44427

- bool (*visit_store)(gimple, tree, void *))

44428

+ walk_stmt_load_store_addr_fn visit_load,

44429

+ walk_stmt_load_store_addr_fn visit_store)

44430

{

44431

return walk_stmt_load_store_addr_ops (stmt, data,

44432

visit_load, visit_store, NULL);

44433

@@ -4071,8 +4077,7 @@

44434

/* Helper for gimple_ior_addresses_taken_1. */

44435

44436

static bool

44437

-gimple_ior_addresses_taken_1 (gimple stmt ATTRIBUTE_UNUSED,

44438

- tree addr, void *data)

44439

+gimple_ior_addresses_taken_1 (gimple, tree addr, tree, void *data)

44440

{

44441

bitmap addresses_taken = (bitmap)data;

44442

addr = get_base_address (addr);

44443

Index: gcc/tree-ssa-structalias.c

44444

===================================================================

44445

--- a/src/gcc/tree-ssa-structalias.c (.../tags/gcc_4_8_2_release)

44446

+++ b/src/gcc/tree-ssa-structalias.c (.../branches/gcc-4_8-branch)

44447

@@ -949,24 +949,27 @@

44448

bitmap_set_bit (result, i);

44449

else

44450

{

44451

- unsigned HOST_WIDE_INT fieldoffset = vi->offset + offset;

44452

+ HOST_WIDE_INT fieldoffset = vi->offset + offset;

44453

+ unsigned HOST_WIDE_INT size = vi->size;

44454

44455

/* If the offset makes the pointer point to before the

44456

variable use offset zero for the field lookup. */

44457

- if (offset < 0

44458

- && fieldoffset > vi->offset)

44459

- fieldoffset = 0;

44460

-

44461

- if (offset != 0)

44462

+ if (fieldoffset < 0)

44463

+ vi = lookup_vi_for_tree (vi->decl);

44464

+ else

44465

vi = first_or_preceding_vi_for_offset (vi, fieldoffset);

44466

44467

- bitmap_set_bit (result, vi->id);

44468

- /* If the result is not exactly at fieldoffset include the next

44469

- field as well. See get_constraint_for_ptr_offset for more

44470

- rationale. */

44471

- if (vi->offset != fieldoffset

44472

- && vi->next != NULL)

44473

- bitmap_set_bit (result, vi->next->id);

44474

+ do

44475

+ {

44476

+ bitmap_set_bit (result, vi->id);

44477

+ if (!vi->next)

44478

+ break;

44479

+

44480

+ /* We have to include all fields that overlap the current field

44481

+ shifted by offset. */

44482

+ vi = vi->next;

44483

+ }

44484

+ while (vi->offset < fieldoffset + size);

44485

}

44486

}

44487

44488

@@ -1607,16 +1610,21 @@

44489

{

44490

varinfo_t v = get_varinfo (j);

44491

HOST_WIDE_INT fieldoffset = v->offset + roffset;

44492

+ unsigned HOST_WIDE_INT size = v->size;

44493

unsigned int t;

44494

44495

if (v->is_full_var)

44496

- fieldoffset = v->offset;

44497

+ ;

44498

else if (roffset != 0)

44499

- v = first_vi_for_offset (v, fieldoffset);

44500

- /* If the access is outside of the variable we can ignore it. */

44501

- if (!v)

44502

- continue;

44503

+ {

44504

+ if (fieldoffset < 0)

44505

+ v = lookup_vi_for_tree (v->decl);

44506

+ else

44507

+ v = first_or_preceding_vi_for_offset (v, fieldoffset);

44508

+ }

44509

44510

+ /* We have to include all fields that overlap the current field

44511

+ shifted by roffset. */

44512

do

44513

{

44514

t = find (v->id);

44515

@@ -1633,16 +1641,13 @@

44516

&& add_graph_edge (graph, lhs, t))

44517

flag |= bitmap_ior_into (sol, get_varinfo (t)->solution);

44518

44519

- /* If the variable is not exactly at the requested offset

44520

- we have to include the next one. */

44521

- if (v->offset == (unsigned HOST_WIDE_INT)fieldoffset

44522

+ if (v->is_full_var

44523

|| v->next == NULL)

44524

break;

44525

44526

v = v->next;

44527

- fieldoffset = v->offset;

44528

}

44529

- while (1);

44530

+ while (v->offset < fieldoffset + size);

44531

}

44532

44533

done:

44534

@@ -1705,15 +1710,20 @@

44535

varinfo_t v = get_varinfo (j);

44536

unsigned int t;

44537

HOST_WIDE_INT fieldoffset = v->offset + loff;

44538

+ unsigned HOST_WIDE_INT size = v->size;

44539

44540

if (v->is_full_var)

44541

- fieldoffset = v->offset;

44542

+ ;

44543

else if (loff != 0)

44544

- v = first_vi_for_offset (v, fieldoffset);

44545

- /* If the access is outside of the variable we can ignore it. */

44546

- if (!v)

44547

- continue;

44548

+ {

44549

+ if (fieldoffset < 0)

44550

+ v = lookup_vi_for_tree (v->decl);

44551

+ else

44552

+ v = first_or_preceding_vi_for_offset (v, fieldoffset);

44553

+ }

44554

44555

+ /* We have to include all fields that overlap the current field

44556

+ shifted by loff. */

44557

do

44558

{

44559

if (v->may_have_pointers)

44560

@@ -1739,16 +1749,13 @@

44561

bitmap_set_bit (changed, t);

44562

}

44563

44564

- /* If the variable is not exactly at the requested offset

44565

- we have to include the next one. */

44566

- if (v->offset == (unsigned HOST_WIDE_INT)fieldoffset

44567

+ if (v->is_full_var

44568

|| v->next == NULL)

44569

break;

44570

44571

v = v->next;

44572

- fieldoffset = v->offset;

44573

}

44574

- while (1);

44575

+ while (v->offset < fieldoffset + size);

44576

}

44577

}

44578

44579

@@ -2997,35 +3004,30 @@

44580

varinfo_t temp;

44581

unsigned HOST_WIDE_INT offset = curr->offset + rhsoffset;

44582

44583

- /* Search the sub-field which overlaps with the

44584

- pointed-to offset. If the result is outside of the variable

44585

- we have to provide a conservative result, as the variable is

44586

- still reachable from the resulting pointer (even though it

44587

- technically cannot point to anything). The last and first

44588

- sub-fields are such conservative results.

44589

- ??? If we always had a sub-field for &object + 1 then

44590

- we could represent this in a more precise way. */

44591

+ /* If curr->offset + rhsoffset is less than zero adjust it. */

44592

if (rhsoffset < 0

44593

&& curr->offset < offset)

44594

offset = 0;

44595

+

44596

+ /* We have to include all fields that overlap the current

44597

+ field shifted by rhsoffset. And we include at least

44598

+ the last or the first field of the variable to represent

44599

+ reachability of off-bound addresses, in particular &object + 1,

44600

+ conservatively correct. */

44601

temp = first_or_preceding_vi_for_offset (curr, offset);

44602

-

44603

- /* If the found variable is not exactly at the pointed to

44604

- result, we have to include the next variable in the

44605

- solution as well. Otherwise two increments by offset / 2

44606

- do not result in the same or a conservative superset

44607

- solution. */

44608

- if (temp->offset != offset

44609

- && temp->next != NULL)

44610

+ c.var = temp->id;

44611

+ c.offset = 0;

44612

+ temp = temp->next;

44613

+ while (temp

44614

+ && temp->offset < offset + curr->size)

44615

{

44616

struct constraint_expr c2;

44617

- c2.var = temp->next->id;

44618

+ c2.var = temp->id;

44619

c2.type = ADDRESSOF;

44620

c2.offset = 0;

44621

results->safe_push (c2);

44622

+ temp = temp->next;

44623

}

44624

- c.var = temp->id;

44625

- c.offset = 0;

44626

}

44627

else

44628

c.offset = rhsoffset;

44629

Index: gcc/gimple.h

44630

===================================================================

44631

--- a/src/gcc/gimple.h (.../tags/gcc_4_8_2_release)

44632

+++ b/src/gcc/gimple.h (.../branches/gcc-4_8-branch)

44633

@@ -176,6 +176,9 @@

44634

/* Nonzero if this statement contains volatile operands. */

44635

unsigned has_volatile_ops : 1;

44636

44637

+ /* Padding to get subcode to 16 bit alignment. */

44638

+ unsigned pad : 1;

44639

+

44640

/* The SUBCODE field can be used for tuple-specific flags for tuples

44641

that do not require subcodes. Note that SUBCODE should be at

44642

least as wide as tree codes, as several tuples store tree codes

44643

@@ -888,13 +891,14 @@

44644

extern alias_set_type gimple_get_alias_set (tree);

44645

extern void count_uses_and_derefs (tree, gimple, unsigned *, unsigned *,

44646

unsigned *);

44647

+typedef bool (*walk_stmt_load_store_addr_fn) (gimple, tree, tree, void *);

44648

extern bool walk_stmt_load_store_addr_ops (gimple, void *,

44649

- bool (*)(gimple, tree, void *),

44650

- bool (*)(gimple, tree, void *),

44651

- bool (*)(gimple, tree, void *));

44652

+ walk_stmt_load_store_addr_fn,

44653

+ walk_stmt_load_store_addr_fn,

44654

+ walk_stmt_load_store_addr_fn);

44655

extern bool walk_stmt_load_store_ops (gimple, void *,

44656

- bool (*)(gimple, tree, void *),

44657

- bool (*)(gimple, tree, void *));

44658

+ walk_stmt_load_store_addr_fn,

44659

+ walk_stmt_load_store_addr_fn);

44660

extern bool gimple_ior_addresses_taken (bitmap, gimple);

44661

extern bool gimple_call_builtin_p (gimple, enum built_in_class);

44662

extern bool gimple_call_builtin_p (gimple, enum built_in_function);

44663

Index: gcc/tree-cfg.c

44664

===================================================================

44665

--- a/src/gcc/tree-cfg.c (.../tags/gcc_4_8_2_release)

44666

+++ b/src/gcc/tree-cfg.c (.../branches/gcc-4_8-branch)

44667

@@ -104,7 +104,6 @@

44668

static void assign_discriminator (location_t, basic_block);

44669

static edge gimple_redirect_edge_and_branch (edge, basic_block);

44670

static edge gimple_try_redirect_by_replacing_jump (edge, basic_block);

44671

-static unsigned int split_critical_edges (void);

44672

44673

/* Various helpers. */

44674

static inline bool stmt_starts_bb_p (gimple, gimple);

44675

@@ -1535,6 +1534,11 @@

44676

44677

FOR_EACH_IMM_USE_STMT (stmt, imm_iter, name)

44678

{

44679

+ /* Mark the block if we change the last stmt in it. */

44680

+ if (cfgcleanup_altered_bbs

44681

+ && stmt_ends_bb_p (stmt))

44682

+ bitmap_set_bit (cfgcleanup_altered_bbs, gimple_bb (stmt)->index);

44683

+

44684

FOR_EACH_IMM_USE_ON_STMT (use, imm_iter)

44685

{

44686

replace_exp (use, val);

44687

@@ -1559,11 +1563,6 @@

44688

gimple orig_stmt = stmt;

44689

size_t i;

44690

44691

- /* Mark the block if we changed the last stmt in it. */

44692

- if (cfgcleanup_altered_bbs

44693

- && stmt_ends_bb_p (stmt))

44694

- bitmap_set_bit (cfgcleanup_altered_bbs, gimple_bb (stmt)->index);

44695

-

44696

/* FIXME. It shouldn't be required to keep TREE_CONSTANT

44697

on ADDR_EXPRs up-to-date on GIMPLE. Propagation will

44698

only change sth from non-invariant to invariant, and only

44699

@@ -3513,11 +3512,10 @@

44700

case PLUS_EXPR:

44701

case MINUS_EXPR:

44702

{

44703

- /* We use regular PLUS_EXPR and MINUS_EXPR for vectors.

44704

- ??? This just makes the checker happy and may not be what is

44705

- intended. */

44706

- if (TREE_CODE (lhs_type) == VECTOR_TYPE

44707

- && POINTER_TYPE_P (TREE_TYPE (lhs_type)))

44708

+ tree lhs_etype = lhs_type;

44709

+ tree rhs1_etype = rhs1_type;

44710

+ tree rhs2_etype = rhs2_type;

44711

+ if (TREE_CODE (lhs_type) == VECTOR_TYPE)

44712

{

44713

if (TREE_CODE (rhs1_type) != VECTOR_TYPE

44714

|| TREE_CODE (rhs2_type) != VECTOR_TYPE)

44715

@@ -3525,22 +3523,13 @@

44716

error ("invalid non-vector operands to vector valued plus");

44717

return true;

44718

}

44719

- lhs_type = TREE_TYPE (lhs_type);

44720

- rhs1_type = TREE_TYPE (rhs1_type);

44721

- rhs2_type = TREE_TYPE (rhs2_type);

44722

- /* PLUS_EXPR is commutative, so we might end up canonicalizing

44723

- the pointer to 2nd place. */

44724

- if (POINTER_TYPE_P (rhs2_type))

44725

- {

44726

- tree tem = rhs1_type;

44727

- rhs1_type = rhs2_type;

44728

- rhs2_type = tem;

44729

- }

44730

- goto do_pointer_plus_expr_check;

44731

+ lhs_etype = TREE_TYPE (lhs_type);

44732

+ rhs1_etype = TREE_TYPE (rhs1_type);

44733

+ rhs2_etype = TREE_TYPE (rhs2_type);

44734

}

44735

- if (POINTER_TYPE_P (lhs_type)

44736

- || POINTER_TYPE_P (rhs1_type)

44737

- || POINTER_TYPE_P (rhs2_type))

44738

+ if (POINTER_TYPE_P (lhs_etype)

44739

+ || POINTER_TYPE_P (rhs1_etype)

44740

+ || POINTER_TYPE_P (rhs2_etype))

44741

{

44742

error ("invalid (pointer) operands to plus/minus");

44743

return true;

44744

@@ -3552,7 +3541,6 @@

44745

44746

case POINTER_PLUS_EXPR:

44747

{

44748

-do_pointer_plus_expr_check:

44749

if (!POINTER_TYPE_P (rhs1_type)

44750

|| !useless_type_conversion_p (lhs_type, rhs1_type)

44751

|| !ptrofftype_p (rhs2_type))

44752

@@ -7658,7 +7646,7 @@

44753

44754

/* Split all critical edges. */

44755

44756

-static unsigned int

44757

+unsigned int

44758

split_critical_edges (void)

44759

{

44760

basic_block bb;

44761

Index: gcc/passes.c

44762

===================================================================

44763

--- a/src/gcc/passes.c (.../tags/gcc_4_8_2_release)

44764

+++ b/src/gcc/passes.c (.../branches/gcc-4_8-branch)

44765

@@ -1398,6 +1398,7 @@

44766

/* After CCP we rewrite no longer addressed locals into SSA

44767

form if possible. */

44768

NEXT_PASS (pass_forwprop);

44769

+ NEXT_PASS (pass_object_sizes);

44770

/* pass_build_alias is a dummy pass that ensures that we

44771

execute TODO_rebuild_alias at this point. */

44772

NEXT_PASS (pass_build_alias);

44773

@@ -1435,7 +1436,6 @@

44774

NEXT_PASS (pass_dce);

44775

NEXT_PASS (pass_forwprop);

44776

NEXT_PASS (pass_phiopt);

44777

- NEXT_PASS (pass_object_sizes);

44778

NEXT_PASS (pass_strlen);

44779

NEXT_PASS (pass_ccp);

44780

/* After CCP we rewrite no longer addressed locals into SSA

44781

Index: gcc/tree-ssa-reassoc.c

44782

===================================================================

44783

--- a/src/gcc/tree-ssa-reassoc.c (.../tags/gcc_4_8_2_release)

44784

+++ b/src/gcc/tree-ssa-reassoc.c (.../branches/gcc-4_8-branch)

44785

@@ -785,8 +785,7 @@

44786

if (opcode == BIT_AND_EXPR)

44787

oe->op = build_zero_cst (TREE_TYPE (oe->op));

44788

else if (opcode == BIT_IOR_EXPR)

44789

- oe->op = build_low_bits_mask (TREE_TYPE (oe->op),

44790

- TYPE_PRECISION (TREE_TYPE (oe->op)));

44791

+ oe->op = build_all_ones_cst (TREE_TYPE (oe->op));

44792

44793

reassociate_stats.ops_eliminated += ops->length () - 1;

44794

ops->truncate (0);

44795

@@ -1980,8 +1979,15 @@

44796

44797

tem = fold_convert_loc (loc, optype, tem);

44798

gsi = gsi_for_stmt (stmt);

44799

- tem = force_gimple_operand_gsi (&gsi, tem, true, NULL_TREE, true,

44800

- GSI_SAME_STMT);

44801

+ /* In rare cases range->exp can be equal to lhs of stmt.

44802

+ In that case we have to insert after the stmt rather then before

44803

+ it. */

44804

+ if (op == range->exp)

44805

+ tem = force_gimple_operand_gsi (&gsi, tem, true, NULL_TREE, false,

44806

+ GSI_SAME_STMT);

44807

+ else

44808

+ tem = force_gimple_operand_gsi (&gsi, tem, true, NULL_TREE, true,

44809

+ GSI_SAME_STMT);

44810

44811

/* If doing inter-bb range test optimization, update the

44812

stmts immediately. Start with changing the first range test

44813

Index: gcc/config/s390/s390.c

44814

===================================================================

44815

--- a/src/gcc/config/s390/s390.c (.../tags/gcc_4_8_2_release)

44816

+++ b/src/gcc/config/s390/s390.c (.../branches/gcc-4_8-branch)

44817

@@ -407,6 +407,65 @@

44818

bytes on a z10 (or higher) CPU. */

44819

#define PREDICT_DISTANCE (TARGET_Z10 ? 384 : 2048)

44820

44821

+static const int s390_hotpatch_trampoline_halfwords_default = 12;

44822

+static const int s390_hotpatch_trampoline_halfwords_max = 1000000;

44823

+static int s390_hotpatch_trampoline_halfwords = -1;

44824

+

44825

+/* Return the argument of the given hotpatch attribute or the default value if

44826

+ no argument is present. */

44827

+

44828

+static inline int

44829

+get_hotpatch_attribute (tree hotpatch_attr)

44830

+{

44831

+ const_tree args;

44832

+

44833

+ args = TREE_VALUE (hotpatch_attr);

44834

+

44835

+ return (args) ?

44836

+ TREE_INT_CST_LOW (TREE_VALUE (args)):

44837

+ s390_hotpatch_trampoline_halfwords_default;

44838

+}

44839

+

44840

+/* Check whether the hotpatch attribute is applied to a function and, if it has

44841

+ an argument, the argument is valid. */

44842

+

44843

+static tree

44844

+s390_handle_hotpatch_attribute (tree *node, tree name, tree args,

44845

+ int flags ATTRIBUTE_UNUSED, bool *no_add_attrs)

44846

+{

44847

+ if (TREE_CODE (*node) != FUNCTION_DECL)

44848

+ {

44849

+ warning (OPT_Wattributes, "%qE attribute only applies to functions",

44850

+ name);

44851

+ *no_add_attrs = true;

44852

+ }

44853

+ else if (args)

44854

+ {

44855

+ tree expr = TREE_VALUE (args);

44856

+

44857

+ if (TREE_CODE (expr) != INTEGER_CST

44858

+ || !INTEGRAL_TYPE_P (TREE_TYPE (expr))

44859

+ || TREE_INT_CST_HIGH (expr) != 0

44860

+ || TREE_INT_CST_LOW (expr) > (unsigned int)

44861

+ s390_hotpatch_trampoline_halfwords_max)

44862

+ {

44863

+ error ("requested %qE attribute is not a non-negative integer"

44864

+ " constant or too large (max. %d)", name,

44865

+ s390_hotpatch_trampoline_halfwords_max);

44866

+ *no_add_attrs = true;

44867

+ }

44868

+ }

44869

+

44870

+ return NULL_TREE;

44871

+}

44872

+

44873

+static const struct attribute_spec s390_attribute_table[] = {

44874

+ { "hotpatch", 0, 1, true, false, false, s390_handle_hotpatch_attribute, false

44875

+ },

44876

+ /* End element. */

44877

+ { NULL, 0, 0, false, false, false, NULL, false }

44878

+};

44879

+

44880

/* Return the alignment for LABEL. We default to the -falign-labels

44881

value except for the literal pool base label. */

44882

int

44883

@@ -883,7 +942,8 @@

44884

{

44885

/* For CCRAWmode put the required cc mask into the second

44886

operand. */

44887

- if (GET_MODE (XVECEXP (*op0, 0, 0)) == CCRAWmode)

44888

+ if (GET_MODE (XVECEXP (*op0, 0, 0)) == CCRAWmode

44889

+ && INTVAL (*op1) >= 0 && INTVAL (*op1) <= 3)

44890

*op1 = gen_rtx_CONST_INT (VOIDmode, 1 << (3 - INTVAL (*op1)));

44891

*op0 = XVECEXP (*op0, 0, 0);

44892

*code = new_code;

44893

@@ -1594,6 +1654,46 @@

44894

static void

44895

s390_option_override (void)

44896

{

44897

+ unsigned int i;

44898

+ cl_deferred_option *opt;

44899

+ vec<cl_deferred_option> *v =

44900

+ (vec<cl_deferred_option> *) s390_deferred_options;

44901

+

44902

+ if (v)

44903

+ FOR_EACH_VEC_ELT (*v, i, opt)

44904

+ {

44905

+ switch (opt->opt_index)

44906

+ {

44907

+ case OPT_mhotpatch:

44908

+ s390_hotpatch_trampoline_halfwords = (opt->value) ?

44909

+ s390_hotpatch_trampoline_halfwords_default : -1;

44910

+ break;

44911

+ case OPT_mhotpatch_:

44912

+ {

44913

+ int val;

44914

+

44915

+ val = integral_argument (opt->arg);

44916

+ if (val == -1)

44917

+ {

44918

+ /* argument is not a plain number */

44919

+ error ("argument to %qs should be a non-negative integer",

44920

+ "-mhotpatch=");

44921

+ break;

44922

+ }

44923

+ else if (val > s390_hotpatch_trampoline_halfwords_max)

44924

+ {

44925

+ error ("argument to %qs is too large (max. %d)",

44926

+ "-mhotpatch=", s390_hotpatch_trampoline_halfwords_max);

44927

+ break;

44928

+ }

44929

+ s390_hotpatch_trampoline_halfwords = val;

44930

+ break;

44931

+ }

44932

+ default:

44933

+ gcc_unreachable ();

44934

+ }

44935

+ }

44936

+

44937

/* Set up function hooks. */

44938

init_machine_status = s390_init_machine_status;

44939

44940

@@ -3015,15 +3115,22 @@

44941

prefer ADDR_REGS. If 'class' is not a superset

44942

of ADDR_REGS, e.g. FP_REGS, reject this reload. */

44943

case CONST:

44944

- /* A larl operand with odd addend will get fixed via secondary

44945

- reload. So don't request it to be pushed into literal

44946

- pool. */

44947

+ /* Symrefs cannot be pushed into the literal pool with -fPIC

44948

+ so we *MUST NOT* return NO_REGS for these cases

44949

+ (s390_cannot_force_const_mem will return true).

44950

+

44951

+ On the other hand we MUST return NO_REGS for symrefs with

44952

+ invalid addend which might have been pushed to the literal

44953

+ pool (no -fPIC). Usually we would expect them to be

44954

+ handled via secondary reload but this does not happen if

44955

+ they are used as literal pool slot replacement in reload

44956

+ inheritance (see emit_input_reload_insns). */

44957

if (TARGET_CPU_ZARCH

44958

&& GET_CODE (XEXP (op, 0)) == PLUS

44959

&& GET_CODE (XEXP (XEXP(op, 0), 0)) == SYMBOL_REF

44960

&& GET_CODE (XEXP (XEXP(op, 0), 1)) == CONST_INT)

44961

{

44962

- if (reg_class_subset_p (ADDR_REGS, rclass))

44963

+ if (flag_pic && reg_class_subset_p (ADDR_REGS, rclass))

44964

return ADDR_REGS;

44965

else

44966

return NO_REGS;

44967

@@ -4683,7 +4790,7 @@

44968

int smode_bsize, mode_bsize;

44969

rtx op, clobber;

44970

44971

- if (bitsize + bitpos > GET_MODE_SIZE (mode))

44972

+ if (bitsize + bitpos > GET_MODE_BITSIZE (mode))

44973

return false;

44974

44975

/* Generate INSERT IMMEDIATE (IILL et al). */

44976

@@ -5311,6 +5418,101 @@

44977

gcc_unreachable ();

44978

}

44979

44980

+/* Returns -1 if the function should not be made hotpatchable. Otherwise it

44981

+ returns a number >= 0 that is the desired size of the hotpatch trampoline

44982

+ in halfwords. */

44983

+

44984

+static int s390_function_num_hotpatch_trampoline_halfwords (tree decl,

44985

+ bool do_warn)

44986

+{

44987

+ tree attr;

44988

+

44989

+ if (DECL_DECLARED_INLINE_P (decl)

44990

+ || DECL_ARTIFICIAL (decl)

44991

+ || MAIN_NAME_P (DECL_NAME (decl)))

44992

+ {

44993

+ /* - Explicitly inlined functions cannot be hotpatched.

44994

+ - Artificial functions need not be hotpatched.

44995

+ - Making the main function hotpatchable is useless. */

44996

+ return -1;

44997

+ }

44998

+ attr = lookup_attribute ("hotpatch", DECL_ATTRIBUTES (decl));

44999

+ if (attr || s390_hotpatch_trampoline_halfwords >= 0)

45000

+ {

45001

+ if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (decl)))

45002

+ {

45003

+ if (do_warn)

45004

+ warning (OPT_Wattributes, "function %qE with the %qs attribute"

45005

+ " is not hotpatchable", DECL_NAME (decl), "always_inline");

45006

+ return -1;

45007

+ }

45008

+ else

45009

+ {

45010

+ return (attr) ?

45011

+ get_hotpatch_attribute (attr) : s390_hotpatch_trampoline_halfwords;

45012

+ }

45013

+ }

45014

+

45015

+ return -1;

45016

+}

45017

+

45018

+/* Hook to determine if one function can safely inline another. */

45019

+

45020

+static bool

45021

+s390_can_inline_p (tree caller, tree callee)

45022

+{

45023

+ if (s390_function_num_hotpatch_trampoline_halfwords (callee, false) >= 0)

45024

+ return false;

45025

+

45026

+ return default_target_can_inline_p (caller, callee);

45027

+}

45028

+

45029

+/* Write the extra assembler code needed to declare a function properly. */

45030

+

45031

+void

45032

+s390_asm_output_function_label (FILE *asm_out_file, const char *fname,

45033

+ tree decl)

45034

+{

45035

+ int hotpatch_trampoline_halfwords = -1;

45036

+

45037

+ if (decl)

45038

+ {

45039

+ hotpatch_trampoline_halfwords =

45040

+ s390_function_num_hotpatch_trampoline_halfwords (decl, true);

45041

+ if (hotpatch_trampoline_halfwords >= 0

45042

+ && decl_function_context (decl) != NULL_TREE)

45043

+ {

45044

+ warning_at (DECL_SOURCE_LOCATION (decl), OPT_mhotpatch,

45045

+ "hotpatching is not compatible with nested functions");

45046

+ hotpatch_trampoline_halfwords = -1;

45047

+ }

45048

+ }

45049

+

45050

+ if (hotpatch_trampoline_halfwords > 0)

45051

+ {

45052

+ int i;

45053

+

45054

+ /* Add a trampoline code area before the function label and initialize it

45055

+ with two-byte nop instructions. This area can be overwritten with code

45056

+ that jumps to a patched version of the function. */

45057

+ for (i = 0; i < hotpatch_trampoline_halfwords; i++)

45058

+ asm_fprintf (asm_out_file, "\tnopr\t%%r7\n");

45059

+ /* Note: The function label must be aligned so that (a) the bytes of the

45060

+ following nop do not cross a cacheline boundary, and (b) a jump address

45061

+ (eight bytes for 64 bit targets, 4 bytes for 32 bit targets) can be

45062

+ stored directly before the label without crossing a cacheline

45063

+ boundary. All this is necessary to make sure the trampoline code can

45064

+ be changed atomically. */

45065

+ }

45066

+

45067

+ ASM_OUTPUT_LABEL (asm_out_file, fname);

45068

+

45069

+ /* Output a four-byte nop if hotpatching is enabled. This can be overwritten

45070

+ atomically with a relative backwards jump to the trampoline area. */

45071

+ if (hotpatch_trampoline_halfwords >= 0)

45072

+ asm_fprintf (asm_out_file, "\tnop\t0\n");

45073

+}

45074

+

45075

/* Output machine-dependent UNSPECs occurring in address constant X

45076

in assembler syntax to stdio stream FILE. Returns true if the

45077

constant X could be recognized, false otherwise. */

45078

@@ -7846,6 +8048,9 @@

45079

{

45080

bb = BASIC_BLOCK (bb_index);

45081

45082

+ if (!bb)

45083

+ continue;

45084

+

45085

FOR_BB_INSNS (bb, insn)

45086

{

45087

rtx ite, cc, pat, target;

45088

@@ -7959,7 +8164,10 @@

45089

if (!result)

45090

return;

45091

45092

- PATTERN (tbegin_insn) = XVECEXP (PATTERN (tbegin_insn), 0, 0);

45093

+ PATTERN (tbegin_insn) = gen_rtx_PARALLEL (VOIDmode,

45094

+ gen_rtvec (2,

45095

+ XVECEXP (PATTERN (tbegin_insn), 0, 0),

45096

+ XVECEXP (PATTERN (tbegin_insn), 0, 1)));

45097

INSN_CODE (tbegin_insn) = -1;

45098

df_insn_rescan (tbegin_insn);

45099

45100

@@ -9568,61 +9776,47 @@

45101

void

45102

s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p)

45103

{

45104

- const int CC0 = 1 << 3;

45105

- const int CC1 = 1 << 2;

45106

- const int CC3 = 1 << 0;

45107

- rtx abort_label = gen_label_rtx ();

45108

- rtx leave_label = gen_label_rtx ();

45109

+ rtx retry_plus_two = gen_reg_rtx (SImode);

45110

rtx retry_reg = gen_reg_rtx (SImode);

45111

rtx retry_label = NULL_RTX;

45112

- rtx jump;

45113

- rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1);

45114

45115

if (retry != NULL_RTX)

45116

{

45117

emit_move_insn (retry_reg, retry);

45118

+ emit_insn (gen_addsi3 (retry_plus_two, retry_reg, const2_rtx));

45119

+ emit_insn (gen_addsi3 (retry_reg, retry_reg, const1_rtx));

45120

retry_label = gen_label_rtx ();

45121

emit_label (retry_label);

45122

}

45123

45124

if (clobber_fprs_p)

45125

- emit_insn (gen_tbegin_1 (tdb,

45126

- gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK)));

45127

+ emit_insn (gen_tbegin_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK), tdb));

45128

else

45129

- emit_insn (gen_tbegin_nofloat_1 (tdb,

45130

- gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK)));

45131

+ emit_insn (gen_tbegin_nofloat_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK),

45132

+ tdb));

45133

45134

- jump = s390_emit_jump (abort_label,

45135

- gen_rtx_NE (VOIDmode,

45136

- gen_rtx_REG (CCRAWmode, CC_REGNUM),

45137

- gen_rtx_CONST_INT (VOIDmode, CC0)));

45138

-

45139

- JUMP_LABEL (jump) = abort_label;

45140

- LABEL_NUSES (abort_label) = 1;

45141

- add_reg_note (jump, REG_BR_PROB, very_unlikely);

45142

-

45143

- /* Initialize CC return value. */

45144

- emit_move_insn (dest, const0_rtx);

45145

-

45146

- s390_emit_jump (leave_label, NULL_RTX);

45147

- LABEL_NUSES (leave_label) = 1;

45148

- emit_barrier ();

45149

-

45150

- /* Abort handler code. */

45151

-

45152

- emit_label (abort_label);

45153

+ emit_move_insn (dest, gen_rtx_UNSPEC (SImode,

45154

+ gen_rtvec (1, gen_rtx_REG (CCRAWmode,

45155

+ CC_REGNUM)),

45156

+ UNSPEC_CC_TO_INT));

45157

if (retry != NULL_RTX)

45158

{

45159

+ const int CC0 = 1 << 3;

45160

+ const int CC1 = 1 << 2;

45161

+ const int CC3 = 1 << 0;

45162

+ rtx jump;

45163

rtx count = gen_reg_rtx (SImode);

45164

+ rtx leave_label = gen_label_rtx ();

45165

+

45166

+ /* Exit for success and permanent failures. */

45167

jump = s390_emit_jump (leave_label,

45168

gen_rtx_EQ (VOIDmode,

45169

gen_rtx_REG (CCRAWmode, CC_REGNUM),

45170

- gen_rtx_CONST_INT (VOIDmode, CC1 | CC3)));

45171

- LABEL_NUSES (leave_label) = 2;

45172

- add_reg_note (jump, REG_BR_PROB, very_unlikely);

45173

+ gen_rtx_CONST_INT (VOIDmode, CC0 | CC1 | CC3)));

45174

+ LABEL_NUSES (leave_label) = 1;

45175

45176

/* CC2 - transient failure. Perform retry with ppa. */

45177

- emit_move_insn (count, retry);

45178

+ emit_move_insn (count, retry_plus_two);

45179

emit_insn (gen_subsi3 (count, count, retry_reg));

45180

emit_insn (gen_tx_assist (count));

45181

jump = emit_jump_insn (gen_doloop_si64 (retry_label,

45182

@@ -9630,13 +9824,8 @@

45183

retry_reg));

45184

JUMP_LABEL (jump) = retry_label;

45185

LABEL_NUSES (retry_label) = 1;

45186

+ emit_label (leave_label);

45187

}

45188

-

45189

- emit_move_insn (dest, gen_rtx_UNSPEC (SImode,

45190

- gen_rtvec (1, gen_rtx_REG (CCRAWmode,

45191

- CC_REGNUM)),

45192

- UNSPEC_CC_TO_INT));

45193

- emit_label (leave_label);

45194

}

45195

45196

/* Builtins. */

45197

@@ -9674,6 +9863,9 @@

45198

s390_init_builtins (void)

45199

{

45200

tree ftype, uint64_type;

45201

+ tree returns_twice_attr = tree_cons (get_identifier ("returns_twice"),

45202

+ NULL, NULL);

45203

+ tree noreturn_attr = tree_cons (get_identifier ("noreturn"), NULL, NULL);

45204

45205

/* void foo (void) */

45206

ftype = build_function_type_list (void_type_node, NULL_TREE);

45207

@@ -9684,7 +9876,7 @@

45208

ftype = build_function_type_list (void_type_node, integer_type_node,

45209

NULL_TREE);

45210

add_builtin_function ("__builtin_tabort", ftype,

45211

- S390_BUILTIN_TABORT, BUILT_IN_MD, NULL, NULL_TREE);

45212

+ S390_BUILTIN_TABORT, BUILT_IN_MD, NULL, noreturn_attr);

45213

add_builtin_function ("__builtin_tx_assist", ftype,

45214

S390_BUILTIN_TX_ASSIST, BUILT_IN_MD, NULL, NULL_TREE);

45215

45216

@@ -9691,10 +9883,10 @@

45217

/* int foo (void *) */

45218

ftype = build_function_type_list (integer_type_node, ptr_type_node, NULL_TREE);

45219

add_builtin_function ("__builtin_tbegin", ftype, S390_BUILTIN_TBEGIN,

45220

- BUILT_IN_MD, NULL, NULL_TREE);

45221

+ BUILT_IN_MD, NULL, returns_twice_attr);

45222

add_builtin_function ("__builtin_tbegin_nofloat", ftype,

45223

S390_BUILTIN_TBEGIN_NOFLOAT,

45224

- BUILT_IN_MD, NULL, NULL_TREE);

45225

+ BUILT_IN_MD, NULL, returns_twice_attr);

45226

45227

/* int foo (void *, int) */

45228

ftype = build_function_type_list (integer_type_node, ptr_type_node,

45229

@@ -9702,11 +9894,11 @@

45230

add_builtin_function ("__builtin_tbegin_retry", ftype,

45231

S390_BUILTIN_TBEGIN_RETRY,

45232

BUILT_IN_MD,

45233

- NULL, NULL_TREE);

45234

+ NULL, returns_twice_attr);

45235

add_builtin_function ("__builtin_tbegin_retry_nofloat", ftype,

45236

S390_BUILTIN_TBEGIN_RETRY_NOFLOAT,

45237

BUILT_IN_MD,

45238

- NULL, NULL_TREE);

45239

+ NULL, returns_twice_attr);

45240

45241

/* int foo (void) */

45242

ftype = build_function_type_list (integer_type_node, NULL_TREE);

45243

@@ -11622,6 +11814,12 @@

45244

#undef TARGET_CANONICALIZE_COMPARISON

45245

#define TARGET_CANONICALIZE_COMPARISON s390_canonicalize_comparison

45246

45247

+#undef TARGET_ATTRIBUTE_TABLE

45248

+#define TARGET_ATTRIBUTE_TABLE s390_attribute_table

45249

+

45250

+#undef TARGET_CAN_INLINE_P

45251

+#define TARGET_CAN_INLINE_P s390_can_inline_p

45252

+

45253

struct gcc_target targetm = TARGET_INITIALIZER;

45254

45255

#include "gt-s390.h"

45256

Index: gcc/config/s390/s390.h

45257

===================================================================

45258

--- a/src/gcc/config/s390/s390.h (.../tags/gcc_4_8_2_release)

45259

+++ b/src/gcc/config/s390/s390.h (.../branches/gcc-4_8-branch)

45260

@@ -217,7 +217,7 @@

45261

#define STACK_BOUNDARY 64

45262

45263

/* Allocation boundary (in *bits*) for the code of a function. */

45264

-#define FUNCTION_BOUNDARY 32

45265

+#define FUNCTION_BOUNDARY 64

45266

45267

/* There is no point aligning anything to a rounder boundary than this. */

45268

#define BIGGEST_ALIGNMENT 64

45269

@@ -878,6 +878,9 @@

45270

fputc ('\n', (FILE)); \

45271

} while (0)

45272

45273

+#undef ASM_OUTPUT_FUNCTION_LABEL

45274

+#define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \

45275

+ s390_asm_output_function_label (FILE, NAME, DECL)

45276

45277

/* Miscellaneous parameters. */

45278

45279

Index: gcc/config/s390/s390.md

45280

===================================================================

45281

--- a/src/gcc/config/s390/s390.md (.../tags/gcc_4_8_2_release)

45282

+++ b/src/gcc/config/s390/s390.md (.../branches/gcc-4_8-branch)

45283

@@ -147,6 +147,7 @@

45284

45285

; Transactional Execution support

45286

UNSPECV_TBEGIN

45287

+ UNSPECV_TBEGIN_TDB

45288

UNSPECV_TBEGINC

45289

UNSPECV_TEND

45290

UNSPECV_TABORT

45291

@@ -9896,9 +9897,10 @@

45292

45293

(define_insn "tbegin_1"

45294

[(set (reg:CCRAW CC_REGNUM)

45295

- (unspec_volatile:CCRAW [(match_operand:BLK 0 "memory_operand" "=Q")

45296

- (match_operand 1 "const_int_operand" " D")]

45297

+ (unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")]

45298

UNSPECV_TBEGIN))

45299

+ (set (match_operand:BLK 1 "memory_operand" "=Q")

45300

+ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_TBEGIN_TDB))

45301

(clobber (reg:DF 16))

45302

(clobber (reg:DF 17))

45303

(clobber (reg:DF 18))

45304

@@ -9917,18 +9919,19 @@

45305

(clobber (reg:DF 31))]

45306

; CONST_OK_FOR_CONSTRAINT_P does not work with D constraint since D is

45307

; not supposed to be used for immediates (see genpreds.c).

45308

- "TARGET_HTM && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 0xffff"

45309

- "tbegin\t%0,%x1"

45310

+ "TARGET_HTM && INTVAL (operands[0]) >= 0 && INTVAL (operands[0]) <= 0xffff"

45311

+ "tbegin\t%1,%x0"

45312

[(set_attr "op_type" "SIL")])

45313

45314

; Same as above but without the FPR clobbers

45315

(define_insn "tbegin_nofloat_1"

45316

[(set (reg:CCRAW CC_REGNUM)

45317

- (unspec_volatile:CCRAW [(match_operand:BLK 0 "memory_operand" "=Q")

45318

- (match_operand 1 "const_int_operand" " D")]

45319

- UNSPECV_TBEGIN))]

45320

- "TARGET_HTM && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 0xffff"

45321

- "tbegin\t%0,%x1"

45322

+ (unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")]

45323

+ UNSPECV_TBEGIN))

45324

+ (set (match_operand:BLK 1 "memory_operand" "=Q")

45325

+ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_TBEGIN_TDB))]

45326

+ "TARGET_HTM && INTVAL (operands[0]) >= 0 && INTVAL (operands[0]) <= 0xffff"

45327

+ "tbegin\t%1,%x0"

45328

[(set_attr "op_type" "SIL")])

45329

45330

45331

@@ -10012,15 +10015,12 @@

45332

; Transaction perform processor assist

45333

45334

(define_expand "tx_assist"

45335

- [(set (match_dup 1) (const_int 0))

45336

- (unspec_volatile [(match_operand:SI 0 "register_operand" "")

45337

- (match_dup 1)

45338

+ [(unspec_volatile [(match_operand:SI 0 "register_operand" "")

45339

+ (reg:SI GPR0_REGNUM)

45340

(const_int 1)]

45341

UNSPECV_PPA)]

45342

"TARGET_HTM"

45343

-{

45344

- operands[1] = gen_reg_rtx (SImode);

45345

-})

45346

+ "")

45347

45348

(define_insn "*ppa"

45349

[(unspec_volatile [(match_operand:SI 0 "register_operand" "d")

45350

@@ -10028,5 +10028,5 @@

45351

(match_operand 2 "const_int_operand" "I")]

45352

UNSPECV_PPA)]

45353

"TARGET_HTM && INTVAL (operands[2]) < 16"

45354

- "ppa\t%0,%1,1"

45355

+ "ppa\t%0,%1,%2"

45356

[(set_attr "op_type" "RRF")])

45357

Index: gcc/config/s390/s390.opt

45358

===================================================================

45359

--- a/src/gcc/config/s390/s390.opt (.../tags/gcc_4_8_2_release)

45360

+++ b/src/gcc/config/s390/s390.opt (.../branches/gcc-4_8-branch)

45361

@@ -96,6 +96,14 @@

45362

Target Report RejectNegative Negative(msoft-float) InverseMask(SOFT_FLOAT, HARD_FLOAT)

45363

Enable hardware floating point

45364

45365

+mhotpatch

45366

+Target Report Var(s390_deferred_options) Defer

45367

+Prepend the function label with 12 two-byte Nop instructions, and add a four byte Nop instruction after the label for hotpatching.

45368

+

45369

+mhotpatch=

45370

+Target RejectNegative Report Joined Var(s390_deferred_options) Defer

45371

+Prepend the function label with the given number of two-byte Nop instructions, and add a four byte Nop instruction after the label for hotpatching.

45372

+

45373

mlong-double-128

45374

Target Report RejectNegative Negative(mlong-double-64) Mask(LONG_DOUBLE_128)

45375

Use 128-bit long double

45376

Index: gcc/config/s390/htmxlintrin.h

45377

===================================================================

45378

--- a/src/gcc/config/s390/htmxlintrin.h (.../tags/gcc_4_8_2_release)

45379

+++ b/src/gcc/config/s390/htmxlintrin.h (.../branches/gcc-4_8-branch)

45380

@@ -33,13 +33,20 @@

45381

the IBM XL compiler. For documentation please see the "z/OS XL

45382

C/C++ Programming Guide" publically available on the web. */

45383

45384

-extern __inline long __attribute__((__gnu_inline__, __always_inline__, __artificial__))

45385

+/* FIXME: __TM_simple_begin and __TM_begin should be marked

45386

+ __always_inline__ as well but this currently produces an error

45387

+ since the tbegin builtins are "returns_twice" and setjmp_call_p

45388

+ (calls.c) therefore identifies the functions as calling setjmp.

45389

+ The tree inliner currently refuses to inline functions calling

45390

+ setjmp. */

45391

+

45392

+long

45393

__TM_simple_begin ()

45394

{

45395

return __builtin_tbegin_nofloat (0);

45396

}

45397

45398

-extern __inline long __attribute__((__gnu_inline__, __always_inline__, __artificial__))

45399

+long

45400

__TM_begin (void* const tdb)

45401

{

45402

return __builtin_tbegin_nofloat (tdb);

45403

@@ -78,7 +85,7 @@

45404

if (depth != 0)

45405

return depth;

45406

45407

- if (tdb->format == 0)

45408

+ if (tdb->format != 1)

45409

return 0;

45410

return tdb->nesting_depth;

45411

}

45412

@@ -90,7 +97,7 @@

45413

{

45414

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

45415

45416

- if (tdb->format == 0)

45417

+ if (tdb->format != 1)

45418

return 0;

45419

45420

return !!(tdb->abort_code >= _HTM_FIRST_USER_ABORT_CODE);

45421

@@ -101,7 +108,7 @@

45422

{

45423

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

45424

45425

- if (tdb->format == 0)

45426

+ if (tdb->format != 1)

45427

return 0;

45428

45429

if (tdb->abort_code >= _HTM_FIRST_USER_ABORT_CODE)

45430

@@ -117,7 +124,7 @@

45431

{

45432

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

45433

45434

- return (tdb->format == 0

45435

+ return (tdb->format == 1

45436

&& (tdb->abort_code == 4 /* unfiltered program interruption */

45437

|| tdb->abort_code == 11 /* restricted instruction */));

45438

}

45439

@@ -127,7 +134,7 @@

45440

{

45441

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

45442

45443

- return (tdb->format == 0

45444

+ return (tdb->format == 1

45445

&& (tdb->abort_code == 7 /* fetch overflow */

45446

|| tdb->abort_code == 8 /* store overflow */));

45447

}

45448

@@ -137,7 +144,7 @@

45449

{

45450

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

45451

45452

- return tdb->format == 0 && tdb->abort_code == 13; /* depth exceeded */

45453

+ return tdb->format == 1 && tdb->abort_code == 13; /* depth exceeded */

45454

}

45455

45456

extern __inline long __attribute__((__gnu_inline__, __always_inline__, __artificial__))

45457

@@ -145,7 +152,7 @@

45458

{

45459

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

45460

45461

- return (tdb->format == 0

45462

+ return (tdb->format == 1

45463

&& (tdb->abort_code == 9 /* fetch conflict */

45464

|| tdb->abort_code == 10 /* store conflict */));

45465

}

45466

Index: gcc/config/s390/s390-protos.h

45467

===================================================================

45468

--- a/src/gcc/config/s390/s390-protos.h (.../tags/gcc_4_8_2_release)

45469

+++ b/src/gcc/config/s390/s390-protos.h (.../branches/gcc-4_8-branch)

45470

@@ -110,5 +110,6 @@

45471

extern int s390_branch_condition_mask (rtx);

45472

extern int s390_compare_and_branch_condition_mask (rtx);

45473

extern bool s390_extzv_shift_ok (int, int, unsigned HOST_WIDE_INT);

45474

+extern void s390_asm_output_function_label (FILE *, const char *, tree);

45475

45476

#endif /* RTX_CODE */

45477

Index: gcc/config/sparc/t-rtems

45478

===================================================================

45479

--- a/src/gcc/config/sparc/t-rtems (.../tags/gcc_4_8_2_release)

45480

+++ b/src/gcc/config/sparc/t-rtems (.../branches/gcc-4_8-branch)

45481

@@ -17,6 +17,6 @@

45482

# <http://www.gnu.org/licenses/>.

45483

#

45484

45485

-MULTILIB_OPTIONS = msoft-float mcpu=v8

45486

-MULTILIB_DIRNAMES = soft v8

45487

+MULTILIB_OPTIONS = msoft-float mcpu=v8/mcpu=leon3

45488

+MULTILIB_DIRNAMES = soft v8 leon3

45489

MULTILIB_MATCHES = msoft-float=mno-fpu

45490

Index: gcc/config/sparc/sparc.md

45491

===================================================================

45492

--- a/src/gcc/config/sparc/sparc.md (.../tags/gcc_4_8_2_release)

45493

+++ b/src/gcc/config/sparc/sparc.md (.../branches/gcc-4_8-branch)

45494

@@ -206,7 +206,7 @@

45495

;; 'f' for all DF/TFmode values, including those that are specific to the v8.

45496

45497

;; Attribute for cpu type.

45498

-;; These must match the values for enum processor_type in sparc.h.

45499

+;; These must match the values of the enum processor_type in sparc-opts.h.

45500

(define_attr "cpu"

45501

"v7,

45502

cypress,

45503

@@ -214,6 +214,7 @@

45504

supersparc,

45505

hypersparc,

45506

leon,

45507

+ leon3,

45508

sparclite,

45509

f930,

45510

f934,

45511

@@ -284,7 +285,8 @@

45512

(const_string "none"))

45513

45514

(define_attr "pic" "false,true"

45515

- (symbol_ref "(flag_pic != 0 ? PIC_TRUE : PIC_FALSE)"))

45516

+ (symbol_ref "(flag_pic != 0

45517

+ ? PIC_TRUE : PIC_FALSE)"))

45518

45519

(define_attr "calls_alloca" "false,true"

45520

(symbol_ref "(cfun->calls_alloca != 0

45521

@@ -306,6 +308,10 @@

45522

(symbol_ref "(TARGET_FLAT != 0

45523

? FLAT_TRUE : FLAT_FALSE)"))

45524

45525

+(define_attr "fix_ut699" "false,true"

45526

+ (symbol_ref "(sparc_fix_ut699 != 0

45527

+ ? FIX_UT699_TRUE : FIX_UT699_FALSE)"))

45528

+

45529

;; Length (in # of insns).

45530

;; Beware that setting a length greater or equal to 3 for conditional branches

45531

;; has a side-effect (see output_cbranch and output_v9branch).

45532

@@ -420,32 +426,18 @@

45533

[(set_attr "length" "2")

45534

(set_attr "type" "multi")])

45535

45536

-;; Attributes for instruction and branch scheduling

45537

-(define_attr "tls_call_delay" "false,true"

45538

- (symbol_ref "(tls_call_delay (insn)

45539

- ? TLS_CALL_DELAY_TRUE : TLS_CALL_DELAY_FALSE)"))

45540

-

45541

+;; Attributes for branch scheduling

45542

(define_attr "in_call_delay" "false,true"

45543

- (cond [(eq_attr "type" "uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

45544

- (const_string "false")

45545

- (eq_attr "type" "load,fpload,store,fpstore")

45546

- (if_then_else (eq_attr "length" "1")

45547

- (const_string "true")

45548

- (const_string "false"))]

45549

- (if_then_else (and (eq_attr "length" "1")

45550

- (eq_attr "tls_call_delay" "true"))

45551

- (const_string "true")

45552

- (const_string "false"))))

45553

+ (symbol_ref "(eligible_for_call_delay (insn)

45554

+ ? IN_CALL_DELAY_TRUE : IN_CALL_DELAY_FALSE)"))

45555

45556

-(define_attr "eligible_for_sibcall_delay" "false,true"

45557

+(define_attr "in_sibcall_delay" "false,true"

45558

(symbol_ref "(eligible_for_sibcall_delay (insn)

45559

- ? ELIGIBLE_FOR_SIBCALL_DELAY_TRUE

45560

- : ELIGIBLE_FOR_SIBCALL_DELAY_FALSE)"))

45561

+ ? IN_SIBCALL_DELAY_TRUE : IN_SIBCALL_DELAY_FALSE)"))

45562

45563

-(define_attr "eligible_for_return_delay" "false,true"

45564

+(define_attr "in_return_delay" "false,true"

45565

(symbol_ref "(eligible_for_return_delay (insn)

45566

- ? ELIGIBLE_FOR_RETURN_DELAY_TRUE

45567

- : ELIGIBLE_FOR_RETURN_DELAY_FALSE)"))

45568

+ ? IN_RETURN_DELAY_TRUE : IN_RETURN_DELAY_FALSE)"))

45569

45570

;; ??? !v9: Should implement the notion of predelay slots for floating-point

45571

;; branches. This would allow us to remove the nop always inserted before

45572

@@ -460,41 +452,34 @@

45573

;; because it prevents us from moving back the final store of inner loops.

45574

45575

(define_attr "in_branch_delay" "false,true"

45576

- (if_then_else (and (eq_attr "type" "!uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

45577

- (eq_attr "length" "1"))

45578

- (const_string "true")

45579

- (const_string "false")))

45580

+ (cond [(eq_attr "type" "uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

45581

+ (const_string "false")

45582

+ (and (eq_attr "fix_ut699" "true") (eq_attr "type" "load,sload"))

45583

+ (const_string "false")

45584

+ (and (eq_attr "fix_ut699" "true")

45585

+ (and (eq_attr "type" "fpload,fp,fpmove,fpmul,fpdivs,fpsqrts")

45586

+ (eq_attr "fptype" "single")))

45587

+ (const_string "false")

45588

+ (eq_attr "length" "1")

45589

+ (const_string "true")

45590

+ ] (const_string "false")))

45591

45592

-(define_attr "in_uncond_branch_delay" "false,true"

45593

- (if_then_else (and (eq_attr "type" "!uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

45594

- (eq_attr "length" "1"))

45595

- (const_string "true")

45596

- (const_string "false")))

45597

-

45598

-(define_attr "in_annul_branch_delay" "false,true"

45599

- (if_then_else (and (eq_attr "type" "!uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

45600

- (eq_attr "length" "1"))

45601

- (const_string "true")

45602

- (const_string "false")))

45603

-

45604

(define_delay (eq_attr "type" "call")

45605

[(eq_attr "in_call_delay" "true") (nil) (nil)])

45606

45607

(define_delay (eq_attr "type" "sibcall")

45608

- [(eq_attr "eligible_for_sibcall_delay" "true") (nil) (nil)])

45609

+ [(eq_attr "in_sibcall_delay" "true") (nil) (nil)])

45610

45611

+(define_delay (eq_attr "type" "return")

45612

+ [(eq_attr "in_return_delay" "true") (nil) (nil)])

45613

+

45614

(define_delay (eq_attr "type" "branch")

45615

- [(eq_attr "in_branch_delay" "true")

45616

- (nil) (eq_attr "in_annul_branch_delay" "true")])

45617

+ [(eq_attr "in_branch_delay" "true") (nil) (eq_attr "in_branch_delay" "true")])

45618

45619

(define_delay (eq_attr "type" "uncond_branch")

45620

- [(eq_attr "in_uncond_branch_delay" "true")

45621

- (nil) (nil)])

45622

+ [(eq_attr "in_branch_delay" "true") (nil) (nil)])

45623

45624

-(define_delay (eq_attr "type" "return")

45625

- [(eq_attr "eligible_for_return_delay" "true") (nil) (nil)])

45626

45627

-

45628

;; Include SPARC DFA schedulers

45629

45630

(include "cypress.md")

45631

@@ -5548,7 +5533,7 @@

45632

[(set (match_operand:DF 0 "register_operand" "=e")

45633

(mult:DF (float_extend:DF (match_operand:SF 1 "register_operand" "f"))

45634

(float_extend:DF (match_operand:SF 2 "register_operand" "f"))))]

45635

- "(TARGET_V8 || TARGET_V9) && TARGET_FPU"

45636

+ "(TARGET_V8 || TARGET_V9) && TARGET_FPU && !sparc_fix_ut699"

45637

"fsmuld\t%1, %2, %0"

45638

[(set_attr "type" "fpmul")

45639

(set_attr "fptype" "double")])

45640

@@ -5575,22 +5560,39 @@

45641

(match_operand:TF 2 "register_operand" "e")))]

45642

"TARGET_FPU && TARGET_HARD_QUAD"

45643

"fdivq\t%1, %2, %0"

45644

- [(set_attr "type" "fpdivd")])

45645

+ [(set_attr "type" "fpdivs")])

45646

45647

-(define_insn "divdf3"

45648

+(define_expand "divdf3"

45649

[(set (match_operand:DF 0 "register_operand" "=e")

45650

(div:DF (match_operand:DF 1 "register_operand" "e")

45651

(match_operand:DF 2 "register_operand" "e")))]

45652

"TARGET_FPU"

45653

+ "")

45654

+

45655

+(define_insn "*divdf3_nofix"

45656

+ [(set (match_operand:DF 0 "register_operand" "=e")

45657

+ (div:DF (match_operand:DF 1 "register_operand" "e")

45658

+ (match_operand:DF 2 "register_operand" "e")))]

45659

+ "TARGET_FPU && !sparc_fix_ut699"

45660

"fdivd\t%1, %2, %0"

45661

[(set_attr "type" "fpdivd")

45662

(set_attr "fptype" "double")])

45663

45664

+(define_insn "*divdf3_fix"

45665

+ [(set (match_operand:DF 0 "register_operand" "=e")

45666

+ (div:DF (match_operand:DF 1 "register_operand" "e")

45667

+ (match_operand:DF 2 "register_operand" "e")))]

45668

+ "TARGET_FPU && sparc_fix_ut699"

45669

+ "fdivd\t%1, %2, %0\n\tstd\t%0, [%%sp-8]"

45670

+ [(set_attr "type" "fpdivd")

45671

+ (set_attr "fptype" "double")

45672

+ (set_attr "length" "2")])

45673

+

45674

(define_insn "divsf3"

45675

[(set (match_operand:SF 0 "register_operand" "=f")

45676

(div:SF (match_operand:SF 1 "register_operand" "f")

45677

(match_operand:SF 2 "register_operand" "f")))]

45678

- "TARGET_FPU"

45679

+ "TARGET_FPU && !sparc_fix_ut699"

45680

"fdivs\t%1, %2, %0"

45681

[(set_attr "type" "fpdivs")])

45682

45683

@@ -5789,20 +5791,35 @@

45684

(sqrt:TF (match_operand:TF 1 "register_operand" "e")))]

45685

"TARGET_FPU && TARGET_HARD_QUAD"

45686

"fsqrtq\t%1, %0"

45687

- [(set_attr "type" "fpsqrtd")])

45688

+ [(set_attr "type" "fpsqrts")])

45689

45690

-(define_insn "sqrtdf2"

45691

+(define_expand "sqrtdf2"

45692

[(set (match_operand:DF 0 "register_operand" "=e")

45693

(sqrt:DF (match_operand:DF 1 "register_operand" "e")))]

45694

"TARGET_FPU"

45695

+ "")

45696

+

45697

+(define_insn "*sqrtdf2_nofix"

45698

+ [(set (match_operand:DF 0 "register_operand" "=e")

45699

+ (sqrt:DF (match_operand:DF 1 "register_operand" "e")))]

45700

+ "TARGET_FPU && !sparc_fix_ut699"

45701

"fsqrtd\t%1, %0"

45702

[(set_attr "type" "fpsqrtd")

45703

(set_attr "fptype" "double")])

45704

45705

+(define_insn "*sqrtdf2_fix"

45706

+ [(set (match_operand:DF 0 "register_operand" "=e")

45707

+ (sqrt:DF (match_operand:DF 1 "register_operand" "e")))]

45708

+ "TARGET_FPU && sparc_fix_ut699"

45709

+ "fsqrtd\t%1, %0\n\tstd\t%0, [%%sp-8]"

45710

+ [(set_attr "type" "fpsqrtd")

45711

+ (set_attr "fptype" "double")

45712

+ (set_attr "length" "2")])

45713

+

45714

(define_insn "sqrtsf2"

45715

[(set (match_operand:SF 0 "register_operand" "=f")

45716

(sqrt:SF (match_operand:SF 1 "register_operand" "f")))]

45717

- "TARGET_FPU"

45718

+ "TARGET_FPU && !sparc_fix_ut699"

45719

"fsqrts\t%1, %0"

45720

[(set_attr "type" "fpsqrts")])

45721

45722

Index: gcc/config/sparc/t-sparc

45723

===================================================================

45724

--- a/src/gcc/config/sparc/t-sparc (.../tags/gcc_4_8_2_release)

45725

+++ b/src/gcc/config/sparc/t-sparc (.../branches/gcc-4_8-branch)

45726

@@ -23,7 +23,7 @@

45727

insn-codes.h conditions.h output.h $(INSN_ATTR_H) $(FLAGS_H) \

45728

$(FUNCTION_H) $(EXCEPT_H) $(EXPR_H) $(OPTABS_H) $(RECOG_H) \

45729

$(DIAGNOSTIC_CORE_H) $(GGC_H) $(TM_P_H) debug.h $(TARGET_H) \

45730

- $(TARGET_DEF_H) $(COMMON_TARGET_H) $(GIMPLE_H) \

45731

+ $(TARGET_DEF_H) $(COMMON_TARGET_H) $(GIMPLE_H) $(TREE_PASS_H) \

45732

langhooks.h reload.h $(PARAMS_H) $(DF_H) $(OPTS_H) \

45733

gt-sparc.h

45734

45735

Index: gcc/config/sparc/sparc.opt

45736

===================================================================

45737

--- a/src/gcc/config/sparc/sparc.opt (.../tags/gcc_4_8_2_release)

45738

+++ b/src/gcc/config/sparc/sparc.opt (.../branches/gcc-4_8-branch)

45739

@@ -146,6 +146,9 @@

45740

Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)

45741

45742

EnumValue

45743

+Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)

45744

+

45745

+EnumValue

45746

Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)

45747

45748

EnumValue

45749

@@ -201,9 +204,19 @@

45750

Enable workaround for single erratum of AT697F processor

45751

(corresponding to erratum #13 of AT697E processor)

45752

45753

+mfix-ut699

45754

+Target Report RejectNegative Var(sparc_fix_ut699)

45755

+Enable workarounds for the errata of the UT699 processor

45756

+

45757

Mask(LONG_DOUBLE_128)

45758

;; Use 128-bit long double

45759

45760

+Mask(LEON)

45761

+;; Generate code for LEON

45762

+

45763

+Mask(LEON3)

45764

+;; Generate code for LEON3

45765

+

45766

Mask(SPARCLITE)

45767

;; Generate code for SPARClite

45768

45769

Index: gcc/config/sparc/sync.md

45770

===================================================================

45771

--- a/src/gcc/config/sparc/sync.md (.../tags/gcc_4_8_2_release)

45772

+++ b/src/gcc/config/sparc/sync.md (.../branches/gcc-4_8-branch)

45773

@@ -161,7 +161,8 @@

45774

(match_operand:SI 5 "const_int_operand" "") ;; is_weak

45775

(match_operand:SI 6 "const_int_operand" "") ;; mod_s

45776

(match_operand:SI 7 "const_int_operand" "")] ;; mod_f

45777

- "TARGET_V9 && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)"

45778

+ "(TARGET_V9 || TARGET_LEON3)

45779

+ && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)"

45780

{

45781

sparc_expand_compare_and_swap (operands);

45782

DONE;

45783

@@ -176,7 +177,7 @@

45784

[(match_operand:I48MODE 2 "register_operand" "")

45785

(match_operand:I48MODE 3 "register_operand" "")]

45786

UNSPECV_CAS))])]

45787

- "TARGET_V9"

45788

+ "TARGET_V9 || TARGET_LEON3"

45789

"")

45790

45791

(define_insn "*atomic_compare_and_swap<mode>_1"

45792

@@ -187,7 +188,7 @@

45793

[(match_operand:I48MODE 2 "register_operand" "r")

45794

(match_operand:I48MODE 3 "register_operand" "0")]

45795

UNSPECV_CAS))]

45796

- "TARGET_V9 && (<MODE>mode == SImode || TARGET_ARCH64)"

45797

+ "(TARGET_V9 || TARGET_LEON3) && (<MODE>mode != DImode || TARGET_ARCH64)"

45798

"cas<modesuffix>\t%1, %2, %0"

45799

[(set_attr "type" "multi")])

45800

45801

@@ -220,7 +221,7 @@

45802

(match_operand:SI 1 "memory_operand" "")

45803

(match_operand:SI 2 "register_operand" "")

45804

(match_operand:SI 3 "const_int_operand" "")]

45805

- "TARGET_V8 || TARGET_V9"

45806

+ "(TARGET_V8 || TARGET_V9) && !sparc_fix_ut699"

45807

{

45808

enum memmodel model = (enum memmodel) INTVAL (operands[3]);

45809

45810

@@ -236,7 +237,7 @@

45811

UNSPECV_SWAP))

45812

(set (match_dup 1)

45813

(match_operand:SI 2 "register_operand" "0"))]

45814

- "TARGET_V8 || TARGET_V9"

45815

+ "(TARGET_V8 || TARGET_V9) && !sparc_fix_ut699"

45816

"swap\t%1, %0"

45817

[(set_attr "type" "multi")])

45818

45819

@@ -244,7 +245,7 @@

45820

[(match_operand:QI 0 "register_operand" "")

45821

(match_operand:QI 1 "memory_operand" "")

45822

(match_operand:SI 2 "const_int_operand" "")]

45823

- ""

45824

+ "!sparc_fix_ut699"

45825

{

45826

enum memmodel model = (enum memmodel) INTVAL (operands[2]);

45827

rtx ret;

45828

@@ -268,6 +269,6 @@

45829

(unspec_volatile:QI [(match_operand:QI 1 "memory_operand" "+m")]

45830

UNSPECV_LDSTUB))

45831

(set (match_dup 1) (const_int -1))]

45832

- ""

45833

+ "!sparc_fix_ut699"

45834

"ldstub\t%1, %0"

45835

[(set_attr "type" "multi")])

45836

Index: gcc/config/sparc/sparc-opts.h

45837

===================================================================

45838

--- a/src/gcc/config/sparc/sparc-opts.h (.../tags/gcc_4_8_2_release)

45839

+++ b/src/gcc/config/sparc/sparc-opts.h (.../branches/gcc-4_8-branch)

45840

@@ -30,6 +30,7 @@

45841

PROCESSOR_SUPERSPARC,

45842

PROCESSOR_HYPERSPARC,

45843

PROCESSOR_LEON,

45844

+ PROCESSOR_LEON3,

45845

PROCESSOR_SPARCLITE,

45846

PROCESSOR_F930,

45847

PROCESSOR_F934,

45848

Index: gcc/config/sparc/sparc-protos.h

45849

===================================================================

45850

--- a/src/gcc/config/sparc/sparc-protos.h (.../tags/gcc_4_8_2_release)

45851

+++ b/src/gcc/config/sparc/sparc-protos.h (.../branches/gcc-4_8-branch)

45852

@@ -84,9 +84,9 @@

45853

extern int mems_ok_for_ldd_peep (rtx, rtx, rtx);

45854

extern int empty_delay_slot (rtx);

45855

extern int emit_cbcond_nop (rtx);

45856

+extern int eligible_for_call_delay (rtx);

45857

extern int eligible_for_return_delay (rtx);

45858

extern int eligible_for_sibcall_delay (rtx);

45859

-extern int tls_call_delay (rtx);

45860

extern int emit_move_sequence (rtx, enum machine_mode);

45861

extern int fp_sethi_p (rtx);

45862

extern int fp_mov_p (rtx);

45863

Index: gcc/config/sparc/sparc.c

45864

===================================================================

45865

--- a/src/gcc/config/sparc/sparc.c (.../tags/gcc_4_8_2_release)

45866

+++ b/src/gcc/config/sparc/sparc.c (.../branches/gcc-4_8-branch)

45867

@@ -52,6 +52,7 @@

45868

#include "params.h"

45869

#include "df.h"

45870

#include "opts.h"

45871

+#include "tree-pass.h"

45872

45873

/* Processor costs */

45874

45875

@@ -226,6 +227,30 @@

45876

};

45877

45878

static const

45879

+struct processor_costs leon3_costs = {

45880

+ COSTS_N_INSNS (1), /* int load */

45881

+ COSTS_N_INSNS (1), /* int signed load */

45882

+ COSTS_N_INSNS (1), /* int zeroed load */

45883

+ COSTS_N_INSNS (1), /* float load */

45884

+ COSTS_N_INSNS (1), /* fmov, fneg, fabs */

45885

+ COSTS_N_INSNS (1), /* fadd, fsub */

45886

+ COSTS_N_INSNS (1), /* fcmp */

45887

+ COSTS_N_INSNS (1), /* fmov, fmovr */

45888

+ COSTS_N_INSNS (1), /* fmul */

45889

+ COSTS_N_INSNS (14), /* fdivs */

45890

+ COSTS_N_INSNS (15), /* fdivd */

45891

+ COSTS_N_INSNS (22), /* fsqrts */

45892

+ COSTS_N_INSNS (23), /* fsqrtd */

45893

+ COSTS_N_INSNS (5), /* imul */

45894

+ COSTS_N_INSNS (5), /* imulX */

45895

+ 0, /* imul bit factor */

45896

+ COSTS_N_INSNS (35), /* idiv */

45897

+ COSTS_N_INSNS (35), /* idivX */

45898

+ COSTS_N_INSNS (1), /* movcc/movr */

45899

+ 0, /* shift penalty */

45900

+};

45901

+

45902

+static const

45903

struct processor_costs sparclet_costs = {

45904

COSTS_N_INSNS (3), /* int load */

45905

COSTS_N_INSNS (3), /* int signed load */

45906

@@ -538,7 +563,6 @@

45907

HOST_WIDE_INT, tree);

45908

static bool sparc_can_output_mi_thunk (const_tree, HOST_WIDE_INT,

45909

HOST_WIDE_INT, const_tree);

45910

-static void sparc_reorg (void);

45911

static struct machine_function * sparc_init_machine_status (void);

45912

static bool sparc_cannot_force_const_mem (enum machine_mode, rtx);

45913

static rtx sparc_tls_get_addr (void);

45914

@@ -680,9 +704,6 @@

45915

#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK

45916

#define TARGET_ASM_CAN_OUTPUT_MI_THUNK sparc_can_output_mi_thunk

45917

45918

-#undef TARGET_MACHINE_DEPENDENT_REORG

45919

-#define TARGET_MACHINE_DEPENDENT_REORG sparc_reorg

45920

-

45921

#undef TARGET_RTX_COSTS

45922

#define TARGET_RTX_COSTS sparc_rtx_costs

45923

#undef TARGET_ADDRESS_COST

45924

@@ -804,6 +825,306 @@

45925

45926

struct gcc_target targetm = TARGET_INITIALIZER;

45927

45928

+/* Return the memory reference contained in X if any, zero otherwise. */

45929

+

45930

+static rtx

45931

+mem_ref (rtx x)

45932

+{

45933

+ if (GET_CODE (x) == SIGN_EXTEND || GET_CODE (x) == ZERO_EXTEND)

45934

+ x = XEXP (x, 0);

45935

+

45936

+ if (MEM_P (x))

45937

+ return x;

45938

+

45939

+ return NULL_RTX;

45940

+}

45941

+

45942

+/* We use a machine specific pass to enable workarounds for errata.

45943

+ We need to have the (essentially) final form of the insn stream in order

45944

+ to properly detect the various hazards. Therefore, this machine specific

45945

+ pass runs as late as possible. The pass is inserted in the pass pipeline

45946

+ at the end of sparc_option_override. */

45947

+

45948

+static bool

45949

+sparc_gate_work_around_errata (void)

45950

+{

45951

+ /* The only errata we handle are those of the AT697F and UT699. */

45952

+ return sparc_fix_at697f != 0 || sparc_fix_ut699 != 0;

45953

+}

45954

+

45955

+static unsigned int

45956

+sparc_do_work_around_errata (void)

45957

+{

45958

+ rtx insn, next;

45959

+

45960

+ /* Force all instructions to be split into their final form. */

45961

+ split_all_insns_noflow ();

45962

+

45963

+ /* Now look for specific patterns in the insn stream. */

45964

+ for (insn = get_insns (); insn; insn = next)

45965

+ {

45966

+ bool insert_nop = false;

45967

+ rtx set;

45968

+

45969

+ /* Look into the instruction in a delay slot. */

45970

+ if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)

45971

+ insn = XVECEXP (PATTERN (insn), 0, 1);

45972

+

45973

+ /* Look for a single-word load into an odd-numbered FP register. */

45974

+ if (sparc_fix_at697f

45975

+ && NONJUMP_INSN_P (insn)

45976

+ && (set = single_set (insn)) != NULL_RTX

45977

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

45978

+ && MEM_P (SET_SRC (set))

45979

+ && REG_P (SET_DEST (set))

45980

+ && REGNO (SET_DEST (set)) > 31

45981

+ && REGNO (SET_DEST (set)) % 2 != 0)

45982

+ {

45983

+ /* The wrong dependency is on the enclosing double register. */

45984

+ const unsigned int x = REGNO (SET_DEST (set)) - 1;

45985

+ unsigned int src1, src2, dest;

45986

+ int code;

45987

+

45988

+ next = next_active_insn (insn);

45989

+ if (!next)

45990

+ break;

45991

+ /* If the insn is a branch, then it cannot be problematic. */

45992

+ if (!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) == SEQUENCE)

45993

+ continue;

45994

+

45995

+ extract_insn (next);

45996

+ code = INSN_CODE (next);

45997

+

45998

+ switch (code)

45999

+ {

46000

+ case CODE_FOR_adddf3:

46001

+ case CODE_FOR_subdf3:

46002

+ case CODE_FOR_muldf3:

46003

+ case CODE_FOR_divdf3:

46004

+ dest = REGNO (recog_data.operand[0]);

46005

+ src1 = REGNO (recog_data.operand[1]);

46006

+ src2 = REGNO (recog_data.operand[2]);

46007

+ if (src1 != src2)

46008

+ {

46009

+ /* Case [1-4]:

46010

+ ld [address], %fx+1

46011

+ FPOPd %f{x,y}, %f{y,x}, %f{x,y} */

46012

+ if ((src1 == x || src2 == x)

46013

+ && (dest == src1 || dest == src2))

46014

+ insert_nop = true;

46015

+ }

46016

+ else

46017

+ {

46018

+ /* Case 5:

46019

+ ld [address], %fx+1

46020

+ FPOPd %fx, %fx, %fx */

46021

+ if (src1 == x

46022

+ && dest == src1

46023

+ && (code == CODE_FOR_adddf3 || code == CODE_FOR_muldf3))

46024

+ insert_nop = true;

46025

+ }

46026

+ break;

46027

+

46028

+ case CODE_FOR_sqrtdf2:

46029

+ dest = REGNO (recog_data.operand[0]);

46030

+ src1 = REGNO (recog_data.operand[1]);

46031

+ /* Case 6:

46032

+ ld [address], %fx+1

46033

+ fsqrtd %fx, %fx */

46034

+ if (src1 == x && dest == src1)

46035

+ insert_nop = true;

46036

+ break;

46037

+

46038

+ default:

46039

+ break;

46040

+ }

46041

+ }

46042

+

46043

+ /* Look for a single-word load into an integer register. */

46044

+ else if (sparc_fix_ut699

46045

+ && NONJUMP_INSN_P (insn)

46046

+ && (set = single_set (insn)) != NULL_RTX

46047

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) <= 4

46048

+ && mem_ref (SET_SRC (set)) != NULL_RTX

46049

+ && REG_P (SET_DEST (set))

46050

+ && REGNO (SET_DEST (set)) < 32)

46051

+ {

46052

+ /* There is no problem if the second memory access has a data

46053

+ dependency on the first single-cycle load. */

46054

+ rtx x = SET_DEST (set);

46055

+

46056

+ next = next_active_insn (insn);

46057

+ if (!next)

46058

+ break;

46059

+ /* If the insn is a branch, then it cannot be problematic. */

46060

+ if (!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) == SEQUENCE)

46061

+ continue;

46062

+

46063

+ /* Look for a second memory access to/from an integer register. */

46064

+ if ((set = single_set (next)) != NULL_RTX)

46065

+ {

46066

+ rtx src = SET_SRC (set);

46067

+ rtx dest = SET_DEST (set);

46068

+ rtx mem;

46069

+

46070

+ /* LDD is affected. */

46071

+ if ((mem = mem_ref (src)) != NULL_RTX

46072

+ && REG_P (dest)

46073

+ && REGNO (dest) < 32

46074

+ && !reg_mentioned_p (x, XEXP (mem, 0)))

46075

+ insert_nop = true;

46076

+

46077

+ /* STD is *not* affected. */

46078

+ else if (MEM_P (dest)

46079

+ && GET_MODE_SIZE (GET_MODE (dest)) <= 4

46080

+ && (src == CONST0_RTX (GET_MODE (dest))

46081

+ || (REG_P (src)

46082

+ && REGNO (src) < 32

46083

+ && REGNO (src) != REGNO (x)))

46084

+ && !reg_mentioned_p (x, XEXP (dest, 0)))

46085

+ insert_nop = true;

46086

+ }

46087

+ }

46088

+

46089

+ /* Look for a single-word load/operation into an FP register. */

46090

+ else if (sparc_fix_ut699

46091

+ && NONJUMP_INSN_P (insn)

46092

+ && (set = single_set (insn)) != NULL_RTX

46093

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

46094

+ && REG_P (SET_DEST (set))

46095

+ && REGNO (SET_DEST (set)) > 31)

46096

+ {

46097

+ /* Number of instructions in the problematic window. */

46098

+ const int n_insns = 4;

46099

+ /* The problematic combination is with the sibling FP register. */

46100

+ const unsigned int x = REGNO (SET_DEST (set));

46101

+ const unsigned int y = x ^ 1;

46102

+ rtx after;

46103

+ int i;

46104

+

46105

+ next = next_active_insn (insn);

46106

+ if (!next)

46107

+ break;

46108

+ /* If the insn is a branch, then it cannot be problematic. */

46109

+ if (!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) == SEQUENCE)

46110

+ continue;

46111

+

46112

+ /* Look for a second load/operation into the sibling FP register. */

46113

+ if (!((set = single_set (next)) != NULL_RTX

46114

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

46115

+ && REG_P (SET_DEST (set))

46116

+ && REGNO (SET_DEST (set)) == y))

46117

+ continue;

46118

+

46119

+ /* Look for a (possible) store from the FP register in the next N

46120

+ instructions, but bail out if it is again modified or if there

46121

+ is a store from the sibling FP register before this store. */

46122

+ for (after = next, i = 0; i < n_insns; i++)

46123

+ {

46124

+ bool branch_p;

46125

+

46126

+ after = next_active_insn (after);

46127

+ if (!after)

46128

+ break;

46129

+

46130

+ /* This is a branch with an empty delay slot. */

46131

+ if (!NONJUMP_INSN_P (after))

46132

+ {

46133

+ if (++i == n_insns)

46134

+ break;

46135

+ branch_p = true;

46136

+ after = NULL_RTX;

46137

+ }

46138

+ /* This is a branch with a filled delay slot. */

46139

+ else if (GET_CODE (PATTERN (after)) == SEQUENCE)

46140

+ {

46141

+ if (++i == n_insns)

46142

+ break;

46143

+ branch_p = true;

46144

+ after = XVECEXP (PATTERN (after), 0, 1);

46145

+ }

46146

+ /* This is a regular instruction. */

46147

+ else

46148

+ branch_p = false;

46149

+

46150

+ if (after && (set = single_set (after)) != NULL_RTX)

46151

+ {

46152

+ const rtx src = SET_SRC (set);

46153

+ const rtx dest = SET_DEST (set);

46154

+ const unsigned int size = GET_MODE_SIZE (GET_MODE (dest));

46155

+

46156

+ /* If the FP register is again modified before the store,

46157

+ then the store isn't affected. */

46158

+ if (REG_P (dest)

46159

+ && (REGNO (dest) == x

46160

+ || (REGNO (dest) == y && size == 8)))

46161

+ break;

46162

+

46163

+ if (MEM_P (dest) && REG_P (src))

46164

+ {

46165

+ /* If there is a store from the sibling FP register

46166

+ before the store, then the store is not affected. */

46167

+ if (REGNO (src) == y || (REGNO (src) == x && size == 8))

46168

+ break;

46169

+

46170

+ /* Otherwise, the store is affected. */

46171

+ if (REGNO (src) == x && size == 4)

46172

+ {

46173

+ insert_nop = true;

46174

+ break;

46175

+ }

46176

+ }

46177

+ }

46178

+

46179

+ /* If we have a branch in the first M instructions, then we

46180

+ cannot see the (M+2)th instruction so we play safe. */

46181

+ if (branch_p && i <= (n_insns - 2))

46182

+ {

46183

+ insert_nop = true;

46184

+ break;

46185

+ }

46186

+ }

46187

+ }

46188

+

46189

+ else

46190

+ next = NEXT_INSN (insn);

46191

+

46192

+ if (insert_nop)

46193

+ emit_insn_before (gen_nop (), next);

46194

+ }

46195

+

46196

+ return 0;

46197

+}

46198

+

46199

+struct rtl_opt_pass pass_work_around_errata =

46200

+{

46201

+ {

46202

+ RTL_PASS,

46203

+ "errata", /* name */

46204

+ OPTGROUP_NONE, /* optinfo_flags */

46205

+ sparc_gate_work_around_errata, /* gate */

46206

+ sparc_do_work_around_errata, /* execute */

46207

+ NULL, /* sub */

46208

+ NULL, /* next */

46209

+ 0, /* static_pass_number */

46210

+ TV_MACH_DEP, /* tv_id */

46211

+ 0, /* properties_required */

46212

+ 0, /* properties_provided */

46213

+ 0, /* properties_destroyed */

46214

+ 0, /* todo_flags_start */

46215

+ TODO_verify_rtl_sharing, /* todo_flags_finish */

46216

+ }

46217

+};

46218

+

46219

+struct register_pass_info insert_pass_work_around_errata =

46220

+{

46221

+ &pass_work_around_errata.pass, /* pass */

46222

+ "dbr", /* reference_pass_name */

46223

+ 1, /* ref_pass_instance_number */

46224

+ PASS_POS_INSERT_AFTER /* po_op */

46225

+};

46226

+

46227

+/* Helpers for TARGET_DEBUG_OPTIONS. */

46228

static void

46229

dump_target_flag_bits (const int flags)

46230

{

46231

@@ -888,6 +1209,7 @@

46232

{ TARGET_CPU_supersparc, PROCESSOR_SUPERSPARC },

46233

{ TARGET_CPU_hypersparc, PROCESSOR_HYPERSPARC },

46234

{ TARGET_CPU_leon, PROCESSOR_LEON },

46235

+ { TARGET_CPU_leon3, PROCESSOR_LEON3 },

46236

{ TARGET_CPU_sparclite, PROCESSOR_F930 },

46237

{ TARGET_CPU_sparclite86x, PROCESSOR_SPARCLITE86X },

46238

{ TARGET_CPU_sparclet, PROCESSOR_TSC701 },

46239

@@ -902,7 +1224,7 @@

46240

};

46241

const struct cpu_default *def;

46242

/* Table of values for -m{cpu,tune}=. This must match the order of

46243

- the PROCESSOR_* enumeration. */

46244

+ the enum processor_type in sparc-opts.h. */

46245

static struct cpu_table {

46246

const char *const name;

46247

const int disable;

46248

@@ -914,8 +1236,8 @@

46249

/* TI TMS390Z55 supersparc */

46250

{ "supersparc", MASK_ISA, MASK_V8 },

46251

{ "hypersparc", MASK_ISA, MASK_V8|MASK_FPU },

46252

- /* LEON */

46253

- { "leon", MASK_ISA, MASK_V8|MASK_FPU },

46254

+ { "leon", MASK_ISA, MASK_V8|MASK_LEON|MASK_FPU },

46255

+ { "leon3", MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU },

46256

{ "sparclite", MASK_ISA, MASK_SPARCLITE },

46257

/* The Fujitsu MB86930 is the original sparclite chip, with no FPU. */

46258

{ "f930", MASK_ISA|MASK_FPU, MASK_SPARCLITE },

46259

@@ -1075,6 +1397,9 @@

46260

#ifndef HAVE_AS_SPARC4

46261

& ~MASK_CBCOND

46262

#endif

46263

+#ifndef HAVE_AS_LEON

46264

+ & ~(MASK_LEON | MASK_LEON3)

46265

+#endif

46266

);

46267

46268

/* If -mfpu or -mno-fpu was explicitly used, don't override with

46269

@@ -1164,6 +1489,9 @@

46270

case PROCESSOR_LEON:

46271

sparc_costs = &leon_costs;

46272

break;

46273

+ case PROCESSOR_LEON3:

46274

+ sparc_costs = &leon3_costs;

46275

+ break;

46276

case PROCESSOR_SPARCLET:

46277

case PROCESSOR_TSC701:

46278

sparc_costs = &sparclet_costs;

46279

@@ -1200,6 +1528,10 @@

46280

/* Choose the most relaxed model for the processor. */

46281

else if (TARGET_V9)

46282

sparc_memory_model = SMM_RMO;

46283

+ else if (TARGET_LEON3)

46284

+ sparc_memory_model = SMM_TSO;

46285

+ else if (TARGET_LEON)

46286

+ sparc_memory_model = SMM_SC;

46287

else if (TARGET_V8)

46288

sparc_memory_model = SMM_PSO;

46289

else

46290

@@ -1241,6 +1573,13 @@

46291

pessimizes for double floating-point registers. */

46292

if (!global_options_set.x_flag_ira_share_save_slots)

46293

flag_ira_share_save_slots = 0;

46294

+

46295

+ /* We register a machine specific pass to work around errata, if any.

46296

+ The pass mut be scheduled as late as possible so that we have the

46297

+ (essentially) final form of the insn stream to work on.

46298

+ Registering the pass must be done at start up. It's convenient to

46299

+ do it here. */

46300

+ register_pass (&insert_pass_work_around_errata);

46301

}

46302

46303

/* Miscellaneous utilities. */

46304

@@ -3090,10 +3429,13 @@

46305

/* Return nonzero if TRIAL can go into the call delay slot. */

46306

46307

int

46308

-tls_call_delay (rtx trial)

46309

+eligible_for_call_delay (rtx trial)

46310

{

46311

rtx pat;

46312

46313

+ if (get_attr_in_branch_delay (trial) == IN_BRANCH_DELAY_FALSE)

46314

+ return 0;

46315

+

46316

/* Binutils allows

46317

call __tls_get_addr, %tgd_call (foo)

46318

add %l7, %o0, %o0, %tgd_add (foo)

46319

@@ -3175,11 +3517,7 @@

46320

46321

/* If we have the 'return' instruction, anything that does not use

46322

local or output registers and can go into a delay slot wins. */

46323

- else if (return_p

46324

- && TARGET_V9

46325

- && !epilogue_renumber (&pat, 1)

46326

- && get_attr_in_uncond_branch_delay (trial)

46327

- == IN_UNCOND_BRANCH_DELAY_TRUE)

46328

+ else if (return_p && TARGET_V9 && !epilogue_renumber (&pat, 1))

46329

return 1;

46330

46331

/* The 'restore src1,src2,dest' pattern for SImode. */

46332

@@ -3222,22 +3560,21 @@

46333

int regno;

46334

rtx pat;

46335

46336

- if (GET_CODE (trial) != INSN)

46337

- return 0;

46338

-

46339

- if (get_attr_length (trial) != 1)

46340

- return 0;

46341

-

46342

/* If the function uses __builtin_eh_return, the eh_return machinery

46343

occupies the delay slot. */

46344

if (crtl->calls_eh_return)

46345

return 0;

46346

46347

+ if (get_attr_in_branch_delay (trial) == IN_BRANCH_DELAY_FALSE)

46348

+ return 0;

46349

+

46350

/* In the case of a leaf or flat function, anything can go into the slot. */

46351

if (sparc_leaf_function_p || TARGET_FLAT)

46352

- return

46353

- get_attr_in_uncond_branch_delay (trial) == IN_UNCOND_BRANCH_DELAY_TRUE;

46354

+ return 1;

46355

46356

+ if (!NONJUMP_INSN_P (trial))

46357

+ return 0;

46358

+

46359

pat = PATTERN (trial);

46360

if (GET_CODE (pat) == PARALLEL)

46361

{

46362

@@ -3256,9 +3593,7 @@

46363

if (regno >= 8 && regno < 24)

46364

return 0;

46365

}

46366

- return !epilogue_renumber (&pat, 1)

46367

- && (get_attr_in_uncond_branch_delay (trial)

46368

- == IN_UNCOND_BRANCH_DELAY_TRUE);

46369

+ return !epilogue_renumber (&pat, 1);

46370

}

46371

46372

if (GET_CODE (pat) != SET)

46373

@@ -3278,10 +3613,7 @@

46374

instruction, it can probably go in. But restore will not work

46375

with FP_REGS. */

46376

if (! SPARC_INT_REG_P (regno))

46377

- return (TARGET_V9

46378

- && !epilogue_renumber (&pat, 1)

46379

- && get_attr_in_uncond_branch_delay (trial)

46380

- == IN_UNCOND_BRANCH_DELAY_TRUE);

46381

+ return TARGET_V9 && !epilogue_renumber (&pat, 1);

46382

46383

return eligible_for_restore_insn (trial, true);

46384

}

46385

@@ -3293,10 +3625,10 @@

46386

{

46387

rtx pat;

46388

46389

- if (GET_CODE (trial) != INSN || GET_CODE (PATTERN (trial)) != SET)

46390

+ if (get_attr_in_branch_delay (trial) == IN_BRANCH_DELAY_FALSE)

46391

return 0;

46392

46393

- if (get_attr_length (trial) != 1)

46394

+ if (!NONJUMP_INSN_P (trial))

46395

return 0;

46396

46397

pat = PATTERN (trial);

46398

@@ -3315,6 +3647,9 @@

46399

return 1;

46400

}

46401

46402

+ if (GET_CODE (pat) != SET)

46403

+ return 0;

46404

+

46405

/* Otherwise, only operations which can be done in tandem with

46406

a `restore' insn can go into the delay slot. */

46407

if (GET_CODE (SET_DEST (pat)) != REG

46408

@@ -10355,7 +10690,8 @@

46409

tmp = e0.add_with_sign (tmp, false, &add1_ovf);

46410

if (tmp.is_negative ())

46411

tmp = tmp.neg_with_overflow (&neg2_ovf);

46412

-

46413

+ else

46414

+ neg2_ovf = false;

46415

result = result.add_with_sign (tmp, false, &add2_ovf);

46416

overflow |= neg1_ovf | neg2_ovf | add1_ovf | add2_ovf;

46417

}

46418

@@ -10897,107 +11233,6 @@

46419

return (vcall_offset >= -32768 || ! fixed_regs[5]);

46420

}

46421

46422

-/* We use the machine specific reorg pass to enable workarounds for errata. */

46423

-

46424

-static void

46425

-sparc_reorg (void)

46426

-{

46427

- rtx insn, next;

46428

-

46429

- /* The only erratum we handle for now is that of the AT697F processor. */

46430

- if (!sparc_fix_at697f)

46431

- return;

46432

-

46433

- /* We need to have the (essentially) final form of the insn stream in order

46434

- to properly detect the various hazards. Run delay slot scheduling. */

46435

- if (optimize > 0 && flag_delayed_branch)

46436

- {

46437

- cleanup_barriers ();

46438

- dbr_schedule (get_insns ());

46439

- }

46440

-

46441

- /* Now look for specific patterns in the insn stream. */

46442

- for (insn = get_insns (); insn; insn = next)

46443

- {

46444

- bool insert_nop = false;

46445

- rtx set;

46446

-

46447

- /* Look for a single-word load into an odd-numbered FP register. */

46448

- if (NONJUMP_INSN_P (insn)

46449

- && (set = single_set (insn)) != NULL_RTX

46450

- && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

46451

- && MEM_P (SET_SRC (set))

46452

- && REG_P (SET_DEST (set))

46453

- && REGNO (SET_DEST (set)) > 31

46454

- && REGNO (SET_DEST (set)) % 2 != 0)

46455

- {

46456

- /* The wrong dependency is on the enclosing double register. */

46457

- unsigned int x = REGNO (SET_DEST (set)) - 1;

46458

- unsigned int src1, src2, dest;

46459

- int code;

46460

-

46461

- /* If the insn has a delay slot, then it cannot be problematic. */

46462

- next = next_active_insn (insn);

46463

- if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)

46464

- code = -1;

46465

- else

46466

- {

46467

- extract_insn (next);

46468

- code = INSN_CODE (next);

46469

- }

46470

-

46471

- switch (code)

46472

- {

46473

- case CODE_FOR_adddf3:

46474

- case CODE_FOR_subdf3:

46475

- case CODE_FOR_muldf3:

46476

- case CODE_FOR_divdf3:

46477

- dest = REGNO (recog_data.operand[0]);

46478

- src1 = REGNO (recog_data.operand[1]);

46479

- src2 = REGNO (recog_data.operand[2]);

46480

- if (src1 != src2)

46481

- {

46482

- /* Case [1-4]:

46483

- ld [address], %fx+1

46484

- FPOPd %f{x,y}, %f{y,x}, %f{x,y} */

46485

- if ((src1 == x || src2 == x)

46486

- && (dest == src1 || dest == src2))

46487

- insert_nop = true;

46488

- }

46489

- else

46490

- {

46491

- /* Case 5:

46492

- ld [address], %fx+1

46493

- FPOPd %fx, %fx, %fx */

46494

- if (src1 == x

46495

- && dest == src1

46496

- && (code == CODE_FOR_adddf3 || code == CODE_FOR_muldf3))

46497

- insert_nop = true;

46498

- }

46499

- break;

46500

-

46501

- case CODE_FOR_sqrtdf2:

46502

- dest = REGNO (recog_data.operand[0]);

46503

- src1 = REGNO (recog_data.operand[1]);

46504

- /* Case 6:

46505

- ld [address], %fx+1

46506

- fsqrtd %fx, %fx */

46507

- if (src1 == x && dest == src1)

46508

- insert_nop = true;

46509

- break;

46510

-

46511

- default:

46512

- break;

46513

- }

46514

- }

46515

- else

46516

- next = NEXT_INSN (insn);

46517

-

46518

- if (insert_nop)

46519

- emit_insn_after (gen_nop (), insn);

46520

- }

46521

-}

46522

-

46523

/* How to allocate a 'struct machine_function'. */

46524

46525

static struct machine_function *

46526

Index: gcc/config/sparc/leon.md

46527

===================================================================

46528

--- a/src/gcc/config/sparc/leon.md (.../tags/gcc_4_8_2_release)

46529

+++ b/src/gcc/config/sparc/leon.md (.../branches/gcc-4_8-branch)

46530

@@ -17,40 +17,48 @@

46531

;; along with GCC; see the file COPYING3. If not see

46532

;; <http://www.gnu.org/licenses/>.

46533

46534

+;; Leon is a single-issue processor.

46535

46536

(define_automaton "leon")

46537

46538

-(define_cpu_unit "leon_memory, leon_fpalu" "leon")

46539

-(define_cpu_unit "leon_fpmds" "leon")

46540

-(define_cpu_unit "write_buf" "leon")

46541

+(define_cpu_unit "leon_memory" "leon")

46542

46543

(define_insn_reservation "leon_load" 1

46544

- (and (eq_attr "cpu" "leon")

46545

- (eq_attr "type" "load,sload,fpload"))

46546

+ (and (eq_attr "cpu" "leon") (eq_attr "type" "load,sload"))

46547

"leon_memory")

46548

46549

-(define_insn_reservation "leon_store" 1

46550

- (and (eq_attr "cpu" "leon")

46551

- (eq_attr "type" "store,fpstore"))

46552

- "leon_memory+write_buf")

46553

-

46554

-(define_insn_reservation "leon_fp_alu" 1

46555

- (and (eq_attr "cpu" "leon")

46556

- (eq_attr "type" "fp,fpmove"))

46557

- "leon_fpalu, nothing")

46558

+;; Use a double reservation to work around the load pipeline hazard on UT699.

46559

+(define_insn_reservation "leon3_load" 1

46560

+ (and (eq_attr "cpu" "leon3") (eq_attr "type" "load,sload"))

46561

+ "leon_memory*2")

46562

46563

-(define_insn_reservation "leon_fp_mult" 1

46564

- (and (eq_attr "cpu" "leon")

46565

- (eq_attr "type" "fpmul"))

46566

- "leon_fpmds, nothing")

46567

+(define_insn_reservation "leon_store" 2

46568

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "store"))

46569

+ "leon_memory*2")

46570

46571

-(define_insn_reservation "leon_fp_div" 16

46572

- (and (eq_attr "cpu" "leon")

46573

- (eq_attr "type" "fpdivs,fpdivd"))

46574

- "leon_fpmds, nothing*15")

46575

+;; This describes Gaisler Research's FPU

46576

46577

-(define_insn_reservation "leon_fp_sqrt" 23

46578

- (and (eq_attr "cpu" "leon")

46579

- (eq_attr "type" "fpsqrts,fpsqrtd"))

46580

- "leon_fpmds, nothing*21")

46581

+(define_automaton "grfpu")

46582

46583

+(define_cpu_unit "grfpu_alu" "grfpu")

46584

+(define_cpu_unit "grfpu_ds" "grfpu")

46585

+

46586

+(define_insn_reservation "leon_fp_alu" 4

46587

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fp,fpcmp,fpmul"))

46588

+ "grfpu_alu, nothing*3")

46589

+

46590

+(define_insn_reservation "leon_fp_divs" 16

46591

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpdivs"))

46592

+ "grfpu_ds*14, nothing*2")

46593

+

46594

+(define_insn_reservation "leon_fp_divd" 17

46595

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpdivd"))

46596

+ "grfpu_ds*15, nothing*2")

46597

+

46598

+(define_insn_reservation "leon_fp_sqrts" 24

46599

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpsqrts"))

46600

+ "grfpu_ds*22, nothing*2")

46601

+

46602

+(define_insn_reservation "leon_fp_sqrtd" 25

46603

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpsqrtd"))

46604

+ "grfpu_ds*23, nothing*2")

46605

Index: gcc/config/sparc/sparc.h

46606

===================================================================

46607

--- a/src/gcc/config/sparc/sparc.h (.../tags/gcc_4_8_2_release)

46608

+++ b/src/gcc/config/sparc/sparc.h (.../branches/gcc-4_8-branch)

46609

@@ -136,21 +136,22 @@

46610

#define TARGET_CPU_supersparc 2

46611

#define TARGET_CPU_hypersparc 3

46612

#define TARGET_CPU_leon 4

46613

-#define TARGET_CPU_sparclite 5

46614

-#define TARGET_CPU_f930 5 /* alias */

46615

-#define TARGET_CPU_f934 5 /* alias */

46616

-#define TARGET_CPU_sparclite86x 6

46617

-#define TARGET_CPU_sparclet 7

46618

-#define TARGET_CPU_tsc701 7 /* alias */

46619

-#define TARGET_CPU_v9 8 /* generic v9 implementation */

46620

-#define TARGET_CPU_sparcv9 8 /* alias */

46621

-#define TARGET_CPU_sparc64 8 /* alias */

46622

-#define TARGET_CPU_ultrasparc 9

46623

-#define TARGET_CPU_ultrasparc3 10

46624

-#define TARGET_CPU_niagara 11

46625

-#define TARGET_CPU_niagara2 12

46626

-#define TARGET_CPU_niagara3 13

46627

-#define TARGET_CPU_niagara4 14

46628

+#define TARGET_CPU_leon3 5

46629

+#define TARGET_CPU_sparclite 6

46630

+#define TARGET_CPU_f930 6 /* alias */

46631

+#define TARGET_CPU_f934 6 /* alias */

46632

+#define TARGET_CPU_sparclite86x 7

46633

+#define TARGET_CPU_sparclet 8

46634

+#define TARGET_CPU_tsc701 8 /* alias */

46635

+#define TARGET_CPU_v9 9 /* generic v9 implementation */

46636

+#define TARGET_CPU_sparcv9 9 /* alias */

46637

+#define TARGET_CPU_sparc64 9 /* alias */

46638

+#define TARGET_CPU_ultrasparc 10

46639

+#define TARGET_CPU_ultrasparc3 11

46640

+#define TARGET_CPU_niagara 12

46641

+#define TARGET_CPU_niagara2 13

46642

+#define TARGET_CPU_niagara3 14

46643

+#define TARGET_CPU_niagara4 15

46644

46645

#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \

46646

|| TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \

46647

@@ -232,9 +233,10 @@

46648

#define ASM_CPU32_DEFAULT_SPEC ""

46649

#endif

46650

46651

-#if TARGET_CPU_DEFAULT == TARGET_CPU_leon

46652

+#if TARGET_CPU_DEFAULT == TARGET_CPU_leon \

46653

+ || TARGET_CPU_DEFAULT == TARGET_CPU_leon3

46654

#define CPP_CPU32_DEFAULT_SPEC "-D__leon__ -D__sparc_v8__"

46655

-#define ASM_CPU32_DEFAULT_SPEC ""

46656

+#define ASM_CPU32_DEFAULT_SPEC AS_LEON_FLAG

46657

#endif

46658

46659

#endif

46660

@@ -282,6 +284,7 @@

46661

%{mcpu=supersparc:-D__supersparc__ -D__sparc_v8__} \

46662

%{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \

46663

%{mcpu=leon:-D__leon__ -D__sparc_v8__} \

46664

+%{mcpu=leon3:-D__leon__ -D__sparc_v8__} \

46665

%{mcpu=v9:-D__sparc_v9__} \

46666

%{mcpu=ultrasparc:-D__sparc_v9__} \

46667

%{mcpu=ultrasparc3:-D__sparc_v9__} \

46668

@@ -329,7 +332,8 @@

46669

%{mcpu=v8:-Av8} \

46670

%{mcpu=supersparc:-Av8} \

46671

%{mcpu=hypersparc:-Av8} \

46672

-%{mcpu=leon:-Av8} \

46673

+%{mcpu=leon:" AS_LEON_FLAG "} \

46674

+%{mcpu=leon3:" AS_LEON_FLAG "} \

46675

%{mv8plus:-Av8plus} \

46676

%{mcpu=v9:-Av9} \

46677

%{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \

46678

@@ -1754,6 +1758,12 @@

46679

#define AS_NIAGARA4_FLAG "-Av9" AS_NIAGARA3_FLAG

46680

#endif

46681

46682

+#ifdef HAVE_AS_LEON

46683

+#define AS_LEON_FLAG "-Aleon"

46684

+#else

46685

+#define AS_LEON_FLAG "-Av8"

46686

+#endif

46687

+

46688

/* We use gcc _mcount for profiling. */

46689

#define NO_PROFILE_COUNTERS 0

46690

46691

Index: gcc/config/i386/i386.h

46692

===================================================================

46693

--- a/src/gcc/config/i386/i386.h (.../tags/gcc_4_8_2_release)

46694

+++ b/src/gcc/config/i386/i386.h (.../branches/gcc-4_8-branch)

46695

@@ -197,10 +197,10 @@

46696

46697

/* Macros used in the machine description to test the flags. */

46698

46699

-/* configure can arrange to make this 2, to force a 486. */

46700

+/* configure can arrange to change it. */

46701

46702

#ifndef TARGET_CPU_DEFAULT

46703

-#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_generic

46704

+#define TARGET_CPU_DEFAULT PROCESSOR_GENERIC32

46705

#endif

46706

46707

#ifndef TARGET_FPMATH_DEFAULT

46708

@@ -591,43 +591,6 @@

46709

/* Target Pragmas. */

46710

#define REGISTER_TARGET_PRAGMAS() ix86_register_pragmas ()

46711

46712

-enum target_cpu_default

46713

-{

46714

- TARGET_CPU_DEFAULT_generic = 0,

46715

-

46716

- TARGET_CPU_DEFAULT_i386,

46717

- TARGET_CPU_DEFAULT_i486,

46718

- TARGET_CPU_DEFAULT_pentium,

46719

- TARGET_CPU_DEFAULT_pentium_mmx,

46720

- TARGET_CPU_DEFAULT_pentiumpro,

46721

- TARGET_CPU_DEFAULT_pentium2,

46722

- TARGET_CPU_DEFAULT_pentium3,

46723

- TARGET_CPU_DEFAULT_pentium4,

46724

- TARGET_CPU_DEFAULT_pentium_m,

46725

- TARGET_CPU_DEFAULT_prescott,

46726

- TARGET_CPU_DEFAULT_nocona,

46727

- TARGET_CPU_DEFAULT_core2,

46728

- TARGET_CPU_DEFAULT_corei7,

46729

- TARGET_CPU_DEFAULT_haswell,

46730

- TARGET_CPU_DEFAULT_atom,

46731

-

46732

- TARGET_CPU_DEFAULT_geode,

46733

- TARGET_CPU_DEFAULT_k6,

46734

- TARGET_CPU_DEFAULT_k6_2,

46735

- TARGET_CPU_DEFAULT_k6_3,

46736

- TARGET_CPU_DEFAULT_athlon,

46737

- TARGET_CPU_DEFAULT_athlon_sse,

46738

- TARGET_CPU_DEFAULT_k8,

46739

- TARGET_CPU_DEFAULT_amdfam10,

46740

- TARGET_CPU_DEFAULT_bdver1,

46741

- TARGET_CPU_DEFAULT_bdver2,

46742

- TARGET_CPU_DEFAULT_bdver3,

46743

- TARGET_CPU_DEFAULT_btver1,

46744

- TARGET_CPU_DEFAULT_btver2,

46745

-

46746

- TARGET_CPU_DEFAULT_max

46747

-};

46748

-

46749

#ifndef CC1_SPEC

46750

#define CC1_SPEC "%(cc1_cpu) "

46751

#endif

46752

@@ -2089,25 +2052,27 @@

46753

with x86-64 medium memory model */

46754

#define DEFAULT_LARGE_SECTION_THRESHOLD 65536

46755

46756

-/* Which processor to tune code generation for. */

46757

+/* Which processor to tune code generation for. These must be in sync

46758

+ with processor_target_table in i386.c. */

46759

46760

enum processor_type

46761

{

46762

- PROCESSOR_I386 = 0, /* 80386 */

46763

+ PROCESSOR_GENERIC32 = 0,

46764

+ PROCESSOR_GENERIC64,

46765

+ PROCESSOR_I386, /* 80386 */

46766

PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */

46767

PROCESSOR_PENTIUM,

46768

PROCESSOR_PENTIUMPRO,

46769

- PROCESSOR_GEODE,

46770

- PROCESSOR_K6,

46771

- PROCESSOR_ATHLON,

46772

PROCESSOR_PENTIUM4,

46773

- PROCESSOR_K8,

46774

PROCESSOR_NOCONA,

46775

PROCESSOR_CORE2,

46776

PROCESSOR_COREI7,

46777

PROCESSOR_HASWELL,

46778

- PROCESSOR_GENERIC32,

46779

- PROCESSOR_GENERIC64,

46780

+ PROCESSOR_ATOM,

46781

+ PROCESSOR_GEODE,

46782

+ PROCESSOR_K6,

46783

+ PROCESSOR_ATHLON,

46784

+ PROCESSOR_K8,

46785

PROCESSOR_AMDFAM10,

46786

PROCESSOR_BDVER1,

46787

PROCESSOR_BDVER2,

46788

@@ -2114,7 +2079,6 @@

46789

PROCESSOR_BDVER3,

46790

PROCESSOR_BTVER1,

46791

PROCESSOR_BTVER2,

46792

- PROCESSOR_ATOM,

46793

PROCESSOR_max

46794

};

46795

46796

Index: gcc/config/i386/i386.md

46797

===================================================================

46798

--- a/src/gcc/config/i386/i386.md (.../tags/gcc_4_8_2_release)

46799

+++ b/src/gcc/config/i386/i386.md (.../branches/gcc-4_8-branch)

46800

@@ -363,6 +363,13 @@

46801

(const_string "unknown")]

46802

(const_string "integer")))

46803

46804

+;; The minimum required alignment of vector mode memory operands of the SSE

46805

+;; (non-VEX/EVEX) instruction in bits, if it is different from

46806

+;; GET_MODE_ALIGNMENT of the operand, otherwise 0. If an instruction has

46807

+;; multiple alternatives, this should be conservative maximum of those minimum

46808

+;; required alignments.

46809

+(define_attr "ssememalign" "" (const_int 0))

46810

+

46811

;; The (bounding maximum) length of an instruction immediate.

46812

(define_attr "length_immediate" ""

46813

(cond [(eq_attr "type" "incdec,setcc,icmov,str,lea,other,multi,idiv,leave,

46814

@@ -1570,7 +1577,7 @@

46815

split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]);

46816

46817

operands[1] = gen_lowpart (DImode, operands[2]);

46818

- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx,

46819

+ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx,

46820

GEN_INT (4)));

46821

})

46822

46823

@@ -1587,7 +1594,7 @@

46824

split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]);

46825

46826

operands[1] = gen_lowpart (DImode, operands[2]);

46827

- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx,

46828

+ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx,

46829

GEN_INT (4)));

46830

})

46831

46832

@@ -2715,7 +2722,20 @@

46833

"reload_completed"

46834

[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))

46835

(set (mem:SF (reg:P SP_REG)) (match_dup 1))]

46836

- "operands[2] = GEN_INT (-GET_MODE_SIZE (<P:MODE>mode));")

46837

+{

46838

+ rtx op = XEXP (operands[0], 0);

46839

+ if (GET_CODE (op) == PRE_DEC)

46840

+ {

46841

+ gcc_assert (!TARGET_64BIT);

46842

+ op = GEN_INT (-4);

46843

+ }

46844

+ else

46845

+ {

46846

+ op = XEXP (XEXP (op, 1), 1);

46847

+ gcc_assert (CONST_INT_P (op));

46848

+ }

46849

+ operands[2] = op;

46850

+})

46851

46852

(define_split

46853

[(set (match_operand:SF 0 "push_operand")

46854

@@ -5443,6 +5463,12 @@

46855

mode = SImode;

46856

46857

ix86_split_lea_for_addr (curr_insn, operands, mode);

46858

+

46859

+ /* Zero-extend return register to DImode for zero-extended addresses. */

46860

+ if (mode != <MODE>mode)

46861

+ emit_insn (gen_zero_extendsidi2

46862

+ (operands[0], gen_lowpart (mode, operands[0])));

46863

+

46864

DONE;

46865

}

46866

[(set_attr "type" "lea")

46867

@@ -6589,7 +6615,7 @@

46868

(set_attr "use_carry" "1")

46869

(set_attr "mode" "<MODE>")])

46870

46871

-;; Overflow setting add and subtract instructions

46872

+;; Overflow setting add instructions

46873

46874

(define_insn "*add<mode>3_cconly_overflow"

46875

[(set (reg:CCC FLAGS_REG)

46876

@@ -6604,43 +6630,31 @@

46877

[(set_attr "type" "alu")

46878

(set_attr "mode" "<MODE>")])

46879

46880

-(define_insn "*sub<mode>3_cconly_overflow"

46881

+(define_insn "*add<mode>3_cc_overflow"

46882

[(set (reg:CCC FLAGS_REG)

46883

(compare:CCC

46884

- (minus:SWI

46885

- (match_operand:SWI 0 "nonimmediate_operand" "<r>m,<r>")

46886

- (match_operand:SWI 1 "<general_operand>" "<r><i>,<r>m"))

46887

- (match_dup 0)))]

46888

- ""

46889

- "cmp{<imodesuffix>}\t{%1, %0|%0, %1}"

46890

- [(set_attr "type" "icmp")

46891

- (set_attr "mode" "<MODE>")])

46892

-

46893

-(define_insn "*<plusminus_insn><mode>3_cc_overflow"

46894

- [(set (reg:CCC FLAGS_REG)

46895

- (compare:CCC

46896

- (plusminus:SWI

46897

- (match_operand:SWI 1 "nonimmediate_operand" "<comm>0,0")

46898

+ (plus:SWI

46899

+ (match_operand:SWI 1 "nonimmediate_operand" "%0,0")

46900

(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))

46901

(match_dup 1)))

46902

(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")

46903

- (plusminus:SWI (match_dup 1) (match_dup 2)))]

46904

- "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"

46905

- "<plusminus_mnemonic>{<imodesuffix>}\t{%2, %0|%0, %2}"

46906

+ (plus:SWI (match_dup 1) (match_dup 2)))]

46907

+ "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"

46908

+ "add{<imodesuffix>}\t{%2, %0|%0, %2}"

46909

[(set_attr "type" "alu")

46910

(set_attr "mode" "<MODE>")])

46911

46912

-(define_insn "*<plusminus_insn>si3_zext_cc_overflow"

46913

+(define_insn "*addsi3_zext_cc_overflow"

46914

[(set (reg:CCC FLAGS_REG)

46915

(compare:CCC

46916

- (plusminus:SI

46917

- (match_operand:SI 1 "nonimmediate_operand" "<comm>0")

46918

+ (plus:SI

46919

+ (match_operand:SI 1 "nonimmediate_operand" "%0")

46920

(match_operand:SI 2 "x86_64_general_operand" "rme"))

46921

(match_dup 1)))

46922

(set (match_operand:DI 0 "register_operand" "=r")

46923

- (zero_extend:DI (plusminus:SI (match_dup 1) (match_dup 2))))]

46924

- "TARGET_64BIT && ix86_binary_operator_ok (<CODE>, SImode, operands)"

46925

- "<plusminus_mnemonic>{l}\t{%2, %k0|%k0, %2}"

46926

+ (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]

46927

+ "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"

46928

+ "add{l}\t{%2, %k0|%k0, %2}"

46929

[(set_attr "type" "alu")

46930

(set_attr "mode" "SI")])

46931

46932

@@ -8012,7 +8026,18 @@

46933

(const_int 0)))

46934

(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,rm")

46935

(and:DI (match_dup 1) (match_dup 2)))]

46936

- "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)

46937

+ "TARGET_64BIT

46938

+ && ix86_match_ccmode

46939

+ (insn,

46940

+ /* If we are going to emit andl instead of andq, and the operands[2]

46941

+ constant might have the SImode sign bit set, make sure the sign

46942

+ flag isn't tested, because the instruction will set the sign flag

46943

+ based on bit 31 rather than bit 63. If it isn't CONST_INT,

46944

+ conservatively assume it might have bit 31 set. */

46945

+ (satisfies_constraint_Z (operands[2])

46946

+ && (!CONST_INT_P (operands[2])

46947

+ || val_signbit_known_set_p (SImode, INTVAL (operands[2]))))

46948

+ ? CCZmode : CCNOmode)

46949

&& ix86_binary_operator_ok (AND, DImode, operands)"

46950

"@

46951

and{l}\t{%k2, %k0|%k0, %k2}

46952

@@ -17569,7 +17594,13 @@

46953

(define_insn "trap"

46954

[(trap_if (const_int 1) (const_int 6))]

46955

""

46956

- { return ASM_SHORT "0x0b0f"; }

46957

+{

46958

+#ifdef HAVE_AS_IX86_UD2

46959

+ return "ud2";

46960

+#else

46961

+ return ASM_SHORT "0x0b0f";

46962

+#endif

46963

+}

46964

[(set_attr "length" "2")])

46965

46966

(define_expand "prefetch"

46967

Index: gcc/config/i386/f16cintrin.h

46968

===================================================================

46969

--- a/src/gcc/config/i386/f16cintrin.h (.../tags/gcc_4_8_2_release)

46970

+++ b/src/gcc/config/i386/f16cintrin.h (.../branches/gcc-4_8-branch)

46971

@@ -35,7 +35,7 @@

46972

extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))

46973

_cvtsh_ss (unsigned short __S)

46974

{

46975

- __v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 };

46976

+ __v8hi __H = __extension__ (__v8hi){ (short) __S, 0, 0, 0, 0, 0, 0, 0 };

46977

__v4sf __A = __builtin_ia32_vcvtph2ps (__H);

46978

return __builtin_ia32_vec_ext_v4sf (__A, 0);

46979

}

46980

Index: gcc/config/i386/t-rtems

46981

===================================================================

46982

--- a/src/gcc/config/i386/t-rtems (.../tags/gcc_4_8_2_release)

46983

+++ b/src/gcc/config/i386/t-rtems (.../branches/gcc-4_8-branch)

46984

@@ -17,11 +17,10 @@

46985

# <http://www.gnu.org/licenses/>.

46986

#

46987

46988

-MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro \

46989

-msoft-float

46990

+MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro msoft-float

46991

MULTILIB_DIRNAMES= m486 mpentium mpentiumpro soft-float

46992

-MULTILIB_MATCHES = msoft-float=mno-m80387

46993

-MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?mathlon

46994

+MULTILIB_MATCHES = msoft-float=mno-80387

46995

+MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?athlon

46996

MULTILIB_EXCEPTIONS = \

46997

mtune=pentium/*msoft-float* \

46998

mtune=pentiumpro/*msoft-float*

46999

Index: gcc/config/i386/winnt.c

47000

===================================================================

47001

--- a/src/gcc/config/i386/winnt.c (.../tags/gcc_4_8_2_release)

47002

+++ b/src/gcc/config/i386/winnt.c (.../branches/gcc-4_8-branch)

47003

@@ -547,8 +547,9 @@

47004

sets 'discard' characteristic, rather than telling linker

47005

to warn of size or content mismatch, so do the same. */

47006

bool discard = (flags & SECTION_CODE)

47007

- || lookup_attribute ("selectany",

47008

- DECL_ATTRIBUTES (decl));

47009

+ || (TREE_CODE (decl) != IDENTIFIER_NODE

47010

+ && lookup_attribute ("selectany",

47011

+ DECL_ATTRIBUTES (decl)));

47012

fprintf (asm_out_file, "\t.linkonce %s\n",

47013

(discard ? "discard" : "same_size"));

47014

}

47015

Index: gcc/config/i386/sse.md

47016

===================================================================

47017

--- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_8_2_release)

47018

+++ b/src/gcc/config/i386/sse.md (.../branches/gcc-4_8-branch)

47019

@@ -605,6 +605,7 @@

47020

}

47021

[(set_attr "type" "ssemov")

47022

(set_attr "movu" "1")

47023

+ (set_attr "ssememalign" "8")

47024

(set_attr "prefix" "maybe_vex")

47025

(set (attr "mode")

47026

(cond [(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")

47027

@@ -634,6 +635,7 @@

47028

}

47029

[(set_attr "type" "ssemov")

47030

(set_attr "movu" "1")

47031

+ (set_attr "ssememalign" "8")

47032

(set_attr "prefix" "maybe_vex")

47033

(set (attr "mode")

47034

(cond [(ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")

47035

@@ -663,6 +665,7 @@

47036

}

47037

[(set_attr "type" "ssemov")

47038

(set_attr "movu" "1")

47039

+ (set_attr "ssememalign" "8")

47040

(set (attr "prefix_data16")

47041

(if_then_else

47042

(match_test "TARGET_AVX")

47043

@@ -696,6 +699,7 @@

47044

}

47045

[(set_attr "type" "ssemov")

47046

(set_attr "movu" "1")

47047

+ (set_attr "ssememalign" "8")

47048

(set (attr "prefix_data16")

47049

(if_then_else

47050

(match_test "TARGET_AVX")

47051

@@ -721,6 +725,7 @@

47052

"%vlddqu\t{%1, %0|%0, %1}"

47053

[(set_attr "type" "ssemov")

47054

(set_attr "movu" "1")

47055

+ (set_attr "ssememalign" "8")

47056

(set (attr "prefix_data16")

47057

(if_then_else

47058

(match_test "TARGET_AVX")

47059

@@ -1001,6 +1006,7 @@

47060

vrcpss\t{%1, %2, %0|%0, %2, %1}"

47061

[(set_attr "isa" "noavx,avx")

47062

(set_attr "type" "sse")

47063

+ (set_attr "ssememalign" "32")

47064

(set_attr "atom_sse_attr" "rcp")

47065

(set_attr "btver2_sse_attr" "rcp")

47066

(set_attr "prefix" "orig,vex")

47067

@@ -1089,6 +1095,7 @@

47068

vrsqrtss\t{%1, %2, %0|%0, %2, %1}"

47069

[(set_attr "isa" "noavx,avx")

47070

(set_attr "type" "sse")

47071

+ (set_attr "ssememalign" "32")

47072

(set_attr "prefix" "orig,vex")

47073

(set_attr "mode" "SF")])

47074

47075

@@ -2844,6 +2851,7 @@

47076

"%vcvtdq2pd\t{%1, %0|%0, %q1}"

47077

[(set_attr "type" "ssecvt")

47078

(set_attr "prefix" "maybe_vex")

47079

+ (set_attr "ssememalign" "64")

47080

(set_attr "mode" "V2DF")])

47081

47082

(define_insn "avx_cvtpd2dq256"

47083

@@ -3572,6 +3580,7 @@

47084

%vmovhps\t{%2, %0|%0, %2}"

47085

[(set_attr "isa" "noavx,avx,noavx,avx,*")

47086

(set_attr "type" "ssemov")

47087

+ (set_attr "ssememalign" "64")

47088

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

47089

(set_attr "mode" "V4SF,V4SF,V2SF,V2SF,V2SF")])

47090

47091

@@ -3617,6 +3626,7 @@

47092

%vmovlps\t{%2, %H0|%H0, %2}"

47093

[(set_attr "isa" "noavx,avx,noavx,avx,*")

47094

(set_attr "type" "ssemov")

47095

+ (set_attr "ssememalign" "64")

47096

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

47097

(set_attr "mode" "V4SF,V4SF,V2SF,V2SF,V2SF")])

47098

47099

@@ -3941,6 +3951,7 @@

47100

%vmovhlps\t{%1, %d0|%d0, %1}

47101

%vmovlps\t{%H1, %d0|%d0, %H1}"

47102

[(set_attr "type" "ssemov")

47103

+ (set_attr "ssememalign" "64")

47104

(set_attr "prefix" "maybe_vex")

47105

(set_attr "mode" "V2SF,V4SF,V2SF")])

47106

47107

@@ -3980,6 +3991,7 @@

47108

%vmovlps\t{%2, %H0|%H0, %2}"

47109

[(set_attr "isa" "noavx,avx,noavx,avx,*")

47110

(set_attr "type" "ssemov")

47111

+ (set_attr "ssememalign" "64")

47112

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

47113

(set_attr "mode" "V2SF,V2SF,V4SF,V4SF,V2SF")])

47114

47115

@@ -4033,6 +4045,7 @@

47116

%vmovlps\t{%2, %0|%0, %2}"

47117

[(set_attr "isa" "noavx,avx,noavx,avx,*")

47118

(set_attr "type" "sseshuf,sseshuf,ssemov,ssemov,ssemov")

47119

+ (set_attr "ssememalign" "64")

47120

(set_attr "length_immediate" "1,1,*,*,*")

47121

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

47122

(set_attr "mode" "V4SF,V4SF,V2SF,V2SF,V2SF")])

47123

@@ -4642,7 +4655,8 @@

47124

vmovlpd\t{%H1, %2, %0|%0, %2, %H1}

47125

%vmovhpd\t{%1, %0|%0, %1}"

47126

[(set_attr "isa" "noavx,avx,sse3,noavx,avx,*")

47127

- (set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")

47128

+ (set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")

47129

+ (set_attr "ssememalign" "64")

47130

(set_attr "prefix_data16" "*,*,*,1,*,1")

47131

(set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")

47132

(set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])

47133

@@ -4744,6 +4758,7 @@

47134

%vmovlpd\t{%2, %H0|%H0, %2}"

47135

[(set_attr "isa" "noavx,avx,sse3,noavx,avx,*")

47136

(set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")

47137

+ (set_attr "ssememalign" "64")

47138

(set_attr "prefix_data16" "*,*,*,1,*,1")

47139

(set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")

47140

(set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])

47141

@@ -4982,6 +4997,7 @@

47142

movhlps\t{%1, %0|%0, %1}

47143

movlps\t{%H1, %0|%0, %H1}"

47144

[(set_attr "type" "ssemov")

47145

+ (set_attr "ssememalign" "64")

47146

(set_attr "mode" "V2SF,V4SF,V2SF")])

47147

47148

;; Avoid combining registers from different units in a single alternative,

47149

@@ -5077,6 +5093,7 @@

47150

#"

47151

[(set_attr "isa" "noavx,avx,noavx,avx,*,*,*")

47152

(set_attr "type" "ssemov,ssemov,sselog,sselog,ssemov,fmov,imov")

47153

+ (set_attr "ssememalign" "64")

47154

(set_attr "prefix_data16" "1,*,*,*,*,*,*")

47155

(set_attr "prefix" "orig,vex,orig,vex,*,*,*")

47156

(set_attr "mode" "V1DF,V1DF,V2DF,V2DF,DF,DF,DF")])

47157

@@ -5145,6 +5162,7 @@

47158

(const_string "imov")

47159

]

47160

(const_string "ssemov")))

47161

+ (set_attr "ssememalign" "64")

47162

(set_attr "prefix_data16" "*,1,*,*,*,*,1,*,*,*,*")

47163

(set_attr "length_immediate" "*,*,*,*,*,1,*,*,*,*,*")

47164

(set_attr "prefix" "maybe_vex,orig,vex,orig,vex,orig,orig,vex,*,*,*")

47165

@@ -5189,6 +5207,7 @@

47166

(const_string "1")

47167

(const_string "*")))

47168

(set_attr "length_immediate" "*,*,*,*,*,1,*,*,*")

47169

+ (set_attr "ssememalign" "64")

47170

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex,orig,orig,vex,maybe_vex")

47171

(set_attr "mode" "DF,DF,V1DF,V1DF,V1DF,V2DF,V1DF,V1DF,V1DF")])

47172

47173

@@ -8736,6 +8755,7 @@

47174

"TARGET_SSE4_1"

47175

"%vpmov<extsuffix>bw\t{%1, %0|%0, %q1}"

47176

[(set_attr "type" "ssemov")

47177

+ (set_attr "ssememalign" "64")

47178

(set_attr "prefix_extra" "1")

47179

(set_attr "prefix" "maybe_vex")

47180

(set_attr "mode" "TI")])

47181

@@ -8766,6 +8786,7 @@

47182

"TARGET_SSE4_1"

47183

"%vpmov<extsuffix>bd\t{%1, %0|%0, %k1}"

47184

[(set_attr "type" "ssemov")

47185

+ (set_attr "ssememalign" "32")

47186

(set_attr "prefix_extra" "1")

47187

(set_attr "prefix" "maybe_vex")

47188

(set_attr "mode" "TI")])

47189

@@ -8791,6 +8812,7 @@

47190

"TARGET_SSE4_1"

47191

"%vpmov<extsuffix>wd\t{%1, %0|%0, %q1}"

47192

[(set_attr "type" "ssemov")

47193

+ (set_attr "ssememalign" "64")

47194

(set_attr "prefix_extra" "1")

47195

(set_attr "prefix" "maybe_vex")

47196

(set_attr "mode" "TI")])

47197

@@ -8818,6 +8840,7 @@

47198

"TARGET_SSE4_1"

47199

"%vpmov<extsuffix>bq\t{%1, %0|%0, %w1}"

47200

[(set_attr "type" "ssemov")

47201

+ (set_attr "ssememalign" "16")

47202

(set_attr "prefix_extra" "1")

47203

(set_attr "prefix" "maybe_vex")

47204

(set_attr "mode" "TI")])

47205

@@ -8845,6 +8868,7 @@

47206

"TARGET_SSE4_1"

47207

"%vpmov<extsuffix>wq\t{%1, %0|%0, %k1}"

47208

[(set_attr "type" "ssemov")

47209

+ (set_attr "ssememalign" "32")

47210

(set_attr "prefix_extra" "1")

47211

(set_attr "prefix" "maybe_vex")

47212

(set_attr "mode" "TI")])

47213

@@ -8868,6 +8892,7 @@

47214

"TARGET_SSE4_1"

47215

"%vpmov<extsuffix>dq\t{%1, %0|%0, %q1}"

47216

[(set_attr "type" "ssemov")

47217

+ (set_attr "ssememalign" "64")

47218

(set_attr "prefix_extra" "1")

47219

(set_attr "prefix" "maybe_vex")

47220

(set_attr "mode" "TI")])

47221

@@ -9151,6 +9176,7 @@

47222

[(set_attr "type" "sselog")

47223

(set_attr "prefix_data16" "1")

47224

(set_attr "prefix_extra" "1")

47225

+ (set_attr "ssememalign" "8")

47226

(set_attr "length_immediate" "1")

47227

(set_attr "memory" "none,load")

47228

(set_attr "mode" "TI")])

47229

@@ -9213,6 +9239,7 @@

47230

[(set_attr "type" "sselog")

47231

(set_attr "prefix_data16" "1")

47232

(set_attr "prefix_extra" "1")

47233

+ (set_attr "ssememalign" "8")

47234

(set_attr "length_immediate" "1")

47235

(set_attr "memory" "load")

47236

(set_attr "mode" "TI")])

47237

@@ -9240,6 +9267,7 @@

47238

(set_attr "prefix_data16" "1")

47239

(set_attr "prefix_extra" "1")

47240

(set_attr "prefix" "maybe_vex")

47241

+ (set_attr "ssememalign" "8")

47242

(set_attr "length_immediate" "1")

47243

(set_attr "btver2_decode" "vector")

47244

(set_attr "memory" "none,load")

47245

@@ -9267,6 +9295,7 @@

47246

[(set_attr "type" "sselog")

47247

(set_attr "prefix_data16" "1")

47248

(set_attr "prefix_extra" "1")

47249

+ (set_attr "ssememalign" "8")

47250

(set_attr "length_immediate" "1")

47251

(set_attr "prefix" "maybe_vex")

47252

(set_attr "btver2_decode" "vector")

47253

@@ -9293,6 +9322,7 @@

47254

[(set_attr "type" "sselog")

47255

(set_attr "prefix_data16" "1")

47256

(set_attr "prefix_extra" "1")

47257

+ (set_attr "ssememalign" "8")

47258

(set_attr "length_immediate" "1")

47259

(set_attr "memory" "none,load,none,load")

47260

(set_attr "btver2_decode" "vector,vector,vector,vector")

47261

@@ -9346,6 +9376,7 @@

47262

[(set_attr "type" "sselog")

47263

(set_attr "prefix_data16" "1")

47264

(set_attr "prefix_extra" "1")

47265

+ (set_attr "ssememalign" "8")

47266

(set_attr "length_immediate" "1")

47267

(set_attr "memory" "none,load")

47268

(set_attr "mode" "TI")])

47269

@@ -9399,6 +9430,7 @@

47270

[(set_attr "type" "sselog")

47271

(set_attr "prefix_data16" "1")

47272

(set_attr "prefix_extra" "1")

47273

+ (set_attr "ssememalign" "8")

47274

(set_attr "length_immediate" "1")

47275

(set_attr "memory" "load")

47276

(set_attr "mode" "TI")])

47277

@@ -9421,6 +9453,7 @@

47278

[(set_attr "type" "sselog")

47279

(set_attr "prefix_data16" "1")

47280

(set_attr "prefix_extra" "1")

47281

+ (set_attr "ssememalign" "8")

47282

(set_attr "length_immediate" "1")

47283

(set_attr "prefix" "maybe_vex")

47284

(set_attr "memory" "none,load")

47285

@@ -9445,6 +9478,7 @@

47286

[(set_attr "type" "sselog")

47287

(set_attr "prefix_data16" "1")

47288

(set_attr "prefix_extra" "1")

47289

+ (set_attr "ssememalign" "8")

47290

(set_attr "length_immediate" "1")

47291

(set_attr "prefix" "maybe_vex")

47292

(set_attr "memory" "none,load")

47293

@@ -9469,6 +9503,7 @@

47294

[(set_attr "type" "sselog")

47295

(set_attr "prefix_data16" "1")

47296

(set_attr "prefix_extra" "1")

47297

+ (set_attr "ssememalign" "8")

47298

(set_attr "length_immediate" "1")

47299

(set_attr "memory" "none,load,none,load")

47300

(set_attr "prefix" "maybe_vex")

47301

@@ -10213,7 +10248,6 @@

47302

[(set_attr "type" "ssecvt1")

47303

(set_attr "mode" "<MODE>")])

47304

47305

-;; scalar insns

47306

(define_expand "xop_vmfrcz<mode>2"

47307

[(set (match_operand:VF_128 0 "register_operand")

47308

(vec_merge:VF_128

47309

@@ -10220,14 +10254,12 @@

47310

(unspec:VF_128

47311

[(match_operand:VF_128 1 "nonimmediate_operand")]

47312

UNSPEC_FRCZ)

47313

- (match_dup 3)

47314

+ (match_dup 2)

47315

(const_int 1)))]

47316

"TARGET_XOP"

47317

-{

47318

- operands[3] = CONST0_RTX (<MODE>mode);

47319

-})

47320

+ "operands[2] = CONST0_RTX (<MODE>mode);")

47321

47322

-(define_insn "*xop_vmfrcz_<mode>"

47323

+(define_insn "*xop_vmfrcz<mode>2"

47324

[(set (match_operand:VF_128 0 "register_operand" "=x")

47325

(vec_merge:VF_128

47326

(unspec:VF_128

47327

Index: gcc/config/i386/xopintrin.h

47328

===================================================================

47329

--- a/src/gcc/config/i386/xopintrin.h (.../tags/gcc_4_8_2_release)

47330

+++ b/src/gcc/config/i386/xopintrin.h (.../branches/gcc-4_8-branch)

47331

@@ -745,13 +745,17 @@

47332

extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))

47333

_mm_frcz_ss (__m128 __A, __m128 __B)

47334

{

47335

- return (__m128) __builtin_ia32_vfrczss ((__v4sf)__A, (__v4sf)__B);

47336

+ return (__m128) __builtin_ia32_movss ((__v4sf)__A,

47337

+ (__v4sf)

47338

+ __builtin_ia32_vfrczss ((__v4sf)__B));

47339

}

47340

47341

extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))

47342

_mm_frcz_sd (__m128d __A, __m128d __B)

47343

{

47344

- return (__m128d) __builtin_ia32_vfrczsd ((__v2df)__A, (__v2df)__B);

47345

+ return (__m128d) __builtin_ia32_movsd ((__v2df)__A,

47346

+ (__v2df)

47347

+ __builtin_ia32_vfrczsd ((__v2df)__B));

47348

}

47349

47350

extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))

47351

Index: gcc/config/i386/driver-i386.c

47352

===================================================================

47353

--- a/src/gcc/config/i386/driver-i386.c (.../tags/gcc_4_8_2_release)

47354

+++ b/src/gcc/config/i386/driver-i386.c (.../branches/gcc-4_8-branch)

47355

@@ -126,6 +126,18 @@

47356

case 0x0c:

47357

level1->sizekb = 16; level1->assoc = 4; level1->line = 32;

47358

break;

47359

+ case 0x0d:

47360

+ level1->sizekb = 16; level1->assoc = 4; level1->line = 64;

47361

+ break;

47362

+ case 0x0e:

47363

+ level1->sizekb = 24; level1->assoc = 6; level1->line = 64;

47364

+ break;

47365

+ case 0x21:

47366

+ level2->sizekb = 256; level2->assoc = 8; level2->line = 64;

47367

+ break;

47368

+ case 0x24:

47369

+ level2->sizekb = 1024; level2->assoc = 16; level2->line = 64;

47370

+ break;

47371

case 0x2c:

47372

level1->sizekb = 32; level1->assoc = 8; level1->line = 64;

47373

break;

47374

@@ -162,6 +174,9 @@

47375

case 0x45:

47376

level2->sizekb = 2048; level2->assoc = 4; level2->line = 32;

47377

break;

47378

+ case 0x48:

47379

+ level2->sizekb = 3072; level2->assoc = 12; level2->line = 64;

47380

+ break;

47381

case 0x49:

47382

if (xeon_mp)

47383

break;

47384

@@ -203,6 +218,9 @@

47385

case 0x7f:

47386

level2->sizekb = 512; level2->assoc = 2; level2->line = 64;

47387

break;

47388

+ case 0x80:

47389

+ level2->sizekb = 512; level2->assoc = 8; level2->line = 64;

47390

+ break;

47391

case 0x82:

47392

level2->sizekb = 256; level2->assoc = 8; level2->line = 32;

47393

break;

47394

@@ -470,6 +488,28 @@

47395

has_xsaveopt = eax & bit_XSAVEOPT;

47396

}

47397

47398

+ /* Check cpuid level of extended features. */

47399

+ __cpuid (0x80000000, ext_level, ebx, ecx, edx);

47400

+

47401

+ if (ext_level > 0x80000000)

47402

+ {

47403

+ __cpuid (0x80000001, eax, ebx, ecx, edx);

47404

+

47405

+ has_lahf_lm = ecx & bit_LAHF_LM;

47406

+ has_sse4a = ecx & bit_SSE4a;

47407

+ has_abm = ecx & bit_ABM;

47408

+ has_lwp = ecx & bit_LWP;

47409

+ has_fma4 = ecx & bit_FMA4;

47410

+ has_xop = ecx & bit_XOP;

47411

+ has_tbm = ecx & bit_TBM;

47412

+ has_lzcnt = ecx & bit_LZCNT;

47413

+ has_prfchw = ecx & bit_PRFCHW;

47414

+

47415

+ has_longmode = edx & bit_LM;

47416

+ has_3dnowp = edx & bit_3DNOWP;

47417

+ has_3dnow = edx & bit_3DNOW;

47418

+ }

47419

+

47420

/* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */

47421

#define XCR_XFEATURE_ENABLED_MASK 0x0

47422

#define XSTATE_FP 0x1

47423

@@ -488,33 +528,12 @@

47424

has_avx2 = 0;

47425

has_fma = 0;

47426

has_fma4 = 0;

47427

+ has_f16c = 0;

47428

has_xop = 0;

47429

has_xsave = 0;

47430

has_xsaveopt = 0;

47431

}

47432

47433

- /* Check cpuid level of extended features. */

47434

- __cpuid (0x80000000, ext_level, ebx, ecx, edx);

47435

-

47436

- if (ext_level > 0x80000000)

47437

- {

47438

- __cpuid (0x80000001, eax, ebx, ecx, edx);

47439

-

47440

- has_lahf_lm = ecx & bit_LAHF_LM;

47441

- has_sse4a = ecx & bit_SSE4a;

47442

- has_abm = ecx & bit_ABM;

47443

- has_lwp = ecx & bit_LWP;

47444

- has_fma4 = ecx & bit_FMA4;

47445

- has_xop = ecx & bit_XOP;

47446

- has_tbm = ecx & bit_TBM;

47447

- has_lzcnt = ecx & bit_LZCNT;

47448

- has_prfchw = ecx & bit_PRFCHW;

47449

-

47450

- has_longmode = edx & bit_LM;

47451

- has_3dnowp = edx & bit_3DNOWP;

47452

- has_3dnow = edx & bit_3DNOW;

47453

- }

47454

-

47455

if (!arch)

47456

{

47457

if (vendor == signature_AMD_ebx

47458

Index: gcc/config/i386/i386.c

47459

===================================================================

47460

--- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_8_2_release)

47461

+++ b/src/gcc/config/i386/i386.c (.../branches/gcc-4_8-branch)

47462

@@ -1378,7 +1378,7 @@

47463

8, /* MMX or SSE register to integer */

47464

8, /* size of l1 cache. */

47465

1024, /* size of l2 cache. */

47466

- 128, /* size of prefetch block */

47467

+ 64, /* size of prefetch block */

47468

8, /* number of parallel prefetches */

47469

1, /* Branch cost */

47470

COSTS_N_INSNS (6), /* cost of FADD and FSUB insns. */

47471

@@ -1894,10 +1894,10 @@

47472

47473

47474

/* X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL */

47475

- m_COREI7 | m_AMDFAM10 | m_BDVER | m_BTVER,

47476

+ m_COREI7 | m_HASWELL | m_AMDFAM10 | m_BDVER | m_BTVER,

47477

47478

/* X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL */

47479

- m_COREI7 | m_BDVER,

47480

+ m_COREI7 | m_HASWELL| m_BDVER,

47481

47482

/* X86_TUNE_SSE_PACKED_SINGLE_INSN_OPTIMAL */

47483

m_BDVER ,

47484

@@ -2409,6 +2409,7 @@

47485

/* Processor target table, indexed by processor number */

47486

struct ptt

47487

{

47488

+ const char *const name; /* processor name */

47489

const struct processor_costs *cost; /* Processor costs */

47490

const int align_loop; /* Default alignments. */

47491

const int align_loop_max_skip;

47492

@@ -2417,67 +2418,32 @@

47493

const int align_func;

47494

};

47495

47496

+/* This table must be in sync with enum processor_type in i386.h. */

47497

static const struct ptt processor_target_table[PROCESSOR_max] =

47498

{

47499

- {&i386_cost, 4, 3, 4, 3, 4},

47500

- {&i486_cost, 16, 15, 16, 15, 16},

47501

- {&pentium_cost, 16, 7, 16, 7, 16},

47502

- {&pentiumpro_cost, 16, 15, 16, 10, 16},

47503

- {&geode_cost, 0, 0, 0, 0, 0},

47504

- {&k6_cost, 32, 7, 32, 7, 32},

47505

- {&athlon_cost, 16, 7, 16, 7, 16},

47506

- {&pentium4_cost, 0, 0, 0, 0, 0},

47507

- {&k8_cost, 16, 7, 16, 7, 16},

47508

- {&nocona_cost, 0, 0, 0, 0, 0},

47509

- /* Core 2 */

47510

- {&core_cost, 16, 10, 16, 10, 16},

47511

- /* Core i7 */

47512

- {&core_cost, 16, 10, 16, 10, 16},

47513

- /* Core avx2 */

47514

- {&core_cost, 16, 10, 16, 10, 16},

47515

- {&generic32_cost, 16, 7, 16, 7, 16},

47516

- {&generic64_cost, 16, 10, 16, 10, 16},

47517

- {&amdfam10_cost, 32, 24, 32, 7, 32},

47518

- {&bdver1_cost, 16, 10, 16, 7, 11},

47519

- {&bdver2_cost, 16, 10, 16, 7, 11},

47520

- {&bdver3_cost, 16, 10, 16, 7, 11},

47521

- {&btver1_cost, 16, 10, 16, 7, 11},

47522

- {&btver2_cost, 16, 10, 16, 7, 11},

47523

- {&atom_cost, 16, 15, 16, 7, 16}

47524

+ {"generic", &generic32_cost, 16, 7, 16, 7, 16},

47525

+ {"generic", &generic64_cost, 16, 10, 16, 10, 16},

47526

+ {"i386", &i386_cost, 4, 3, 4, 3, 4},

47527

+ {"i486", &i486_cost, 16, 15, 16, 15, 16},

47528

+ {"pentium", &pentium_cost, 16, 7, 16, 7, 16},

47529

+ {"pentiumpro", &pentiumpro_cost, 16, 15, 16, 10, 16},

47530

+ {"pentium4", &pentium4_cost, 0, 0, 0, 0, 0},

47531

+ {"nocona", &nocona_cost, 0, 0, 0, 0, 0},

47532

+ {"core2", &core_cost, 16, 10, 16, 10, 16},

47533

+ {"corei7", &core_cost, 16, 10, 16, 10, 16},

47534

+ {"core-avx2", &core_cost, 16, 10, 16, 10, 16},

47535

+ {"atom", &atom_cost, 16, 15, 16, 7, 16},

47536

+ {"geode", &geode_cost, 0, 0, 0, 0, 0},

47537

+ {"k6", &k6_cost, 32, 7, 32, 7, 32},

47538

+ {"athlon", &athlon_cost, 16, 7, 16, 7, 16},

47539

+ {"k8", &k8_cost, 16, 7, 16, 7, 16},

47540

+ {"amdfam10", &amdfam10_cost, 32, 24, 32, 7, 32},

47541

+ {"bdver1", &bdver1_cost, 16, 10, 16, 7, 11},

47542

+ {"bdver2", &bdver2_cost, 16, 10, 16, 7, 11},

47543

+ {"bdver3", &bdver3_cost, 16, 10, 16, 7, 11},

47544

+ {"btver1", &btver1_cost, 16, 10, 16, 7, 11},

47545

+ {"btver2", &btver2_cost, 16, 10, 16, 7, 11}

47546

};

47547

-

47548

-static const char *const cpu_names[TARGET_CPU_DEFAULT_max] =

47549

-{

47550

- "generic",

47551

- "i386",

47552

- "i486",

47553

- "pentium",

47554

- "pentium-mmx",

47555

- "pentiumpro",

47556

- "pentium2",

47557

- "pentium3",

47558

- "pentium4",

47559

- "pentium-m",

47560

- "prescott",

47561

- "nocona",

47562

- "core2",

47563

- "corei7",

47564

- "core-avx2",

47565

- "atom",

47566

- "geode",

47567

- "k6",

47568

- "k6-2",

47569

- "k6-3",

47570

- "athlon",

47571

- "athlon-4",

47572

- "k8",

47573

- "amdfam10",

47574

- "bdver1",

47575

- "bdver2",

47576

- "bdver3",

47577

- "btver1",

47578

- "btver2"

47579

-};

47580

47581

static bool

47582

gate_insert_vzeroupper (void)

47583

@@ -2983,7 +2949,7 @@

47584

{"bdver3", PROCESSOR_BDVER3, CPU_BDVER3,

47585

PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3

47586

47587

- | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX

47588

47589

47590

| PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE

47591

| PTA_XSAVEOPT},

47592

@@ -3125,7 +3091,8 @@

47593

ix86_tune_string = ix86_arch_string;

47594

if (!ix86_tune_string)

47595

{

47596

- ix86_tune_string = cpu_names[TARGET_CPU_DEFAULT];

47597

+ ix86_tune_string

47598

+ = processor_target_table[TARGET_CPU_DEFAULT].name;

47599

ix86_tune_defaulted = 1;

47600

}

47601

47602

@@ -4078,19 +4045,15 @@

47603

= ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_target_flags,

47604

NULL, NULL, ptr->x_ix86_fpmath, false);

47605

47606

+ gcc_assert (ptr->arch < PROCESSOR_max);

47607

fprintf (file, "%*sarch = %d (%s)\n",

47608

indent, "",

47609

- ptr->arch,

47610

- ((ptr->arch < TARGET_CPU_DEFAULT_max)

47611

- ? cpu_names[ptr->arch]

47612

- : "<unknown>"));

47613

+ ptr->arch, processor_target_table[ptr->arch].name);

47614

47615

+ gcc_assert (ptr->tune < PROCESSOR_max);

47616

fprintf (file, "%*stune = %d (%s)\n",

47617

indent, "",

47618

- ptr->tune,

47619

- ((ptr->tune < TARGET_CPU_DEFAULT_max)

47620

- ? cpu_names[ptr->tune]

47621

- : "<unknown>"));

47622

+ ptr->tune, processor_target_table[ptr->tune].name);

47623

47624

fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);

47625

47626

@@ -5213,7 +5176,12 @@

47627

/* Use register calling convention for local functions when possible. */

47628

if (decl

47629

&& TREE_CODE (decl) == FUNCTION_DECL

47630

- && optimize

47631

+ /* Caller and callee must agree on the calling convention, so

47632

+ checking here just optimize means that with

47633

+ __attribute__((optimize (...))) caller could use regparm convention

47634

+ and callee not, or vice versa. Instead look at whether the callee

47635

+ is optimized or not. */

47636

+ && opt_for_fn (decl, optimize)

47637

&& !(profile_flag && !flag_fentry))

47638

{

47639

/* FIXME: remove this CONST_CAST when cgraph.[ch] is constified. */

47640

@@ -5409,6 +5377,17 @@

47641

bool win;

47642

int j;

47643

47644

+ /* For pre-AVX disallow unaligned loads/stores where the

47645

+ instructions don't support it. */

47646

+ if (!TARGET_AVX

47647

+ && VECTOR_MODE_P (GET_MODE (op))

47648

+ && misaligned_operand (op, GET_MODE (op)))

47649

+ {

47650

+ int min_align = get_attr_ssememalign (insn);

47651

+ if (min_align == 0)

47652

+ return false;

47653

+ }

47654

+

47655

/* A unary operator may be accepted by the predicate, but it

47656

is irrelevant for matching constraints. */

47657

if (UNARY_P (op))

47658

@@ -5747,9 +5726,9 @@

47659

cum->nregs = 0;

47660

cum->sse_nregs = 0;

47661

cum->mmx_nregs = 0;

47662

- cum->warn_avx = 0;

47663

- cum->warn_sse = 0;

47664

- cum->warn_mmx = 0;

47665

+ cum->warn_avx = false;

47666

+ cum->warn_sse = false;

47667

+ cum->warn_mmx = false;

47668

return;

47669

}

47670

47671

@@ -5790,10 +5769,14 @@

47672

47673

The midde-end can't deal with the vector types > 16 bytes. In this

47674

case, we return the original mode and warn ABI change if CUM isn't

47675

- NULL. */

47676

+ NULL.

47677

47678

+ If INT_RETURN is true, warn ABI change if the vector mode isn't

47679

+ available for function return value. */

47680

+

47681

static enum machine_mode

47682

-type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum)

47683

+type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum,

47684

+ bool in_return)

47685

{

47686

enum machine_mode mode = TYPE_MODE (type);

47687

47688

@@ -5819,33 +5802,61 @@

47689

if (size == 32 && !TARGET_AVX)

47690

{

47691

static bool warnedavx;

47692

+ static bool warnedavx_ret;

47693

47694

- if (cum

47695

- && !warnedavx

47696

- && cum->warn_avx)

47697

+ if (cum && cum->warn_avx && !warnedavx)

47698

{

47699

- warnedavx = true;

47700

- warning (0, "AVX vector argument without AVX "

47701

- "enabled changes the ABI");

47702

+ if (warning (OPT_Wpsabi, "AVX vector argument "

47703

+ "without AVX enabled changes the ABI"))

47704

+ warnedavx = true;

47705

}

47706

+ else if (in_return && !warnedavx_ret)

47707

+ {

47708

+ if (warning (OPT_Wpsabi, "AVX vector return "

47709

+ "without AVX enabled changes the ABI"))

47710

+ warnedavx_ret = true;

47711

+ }

47712

+

47713

return TYPE_MODE (type);

47714

}

47715

- else if ((size == 8 || size == 16) && !TARGET_SSE)

47716

+ else if (((size == 8 && TARGET_64BIT) || size == 16)

47717

+ && !TARGET_SSE)

47718

{

47719

static bool warnedsse;

47720

+ static bool warnedsse_ret;

47721

47722

- if (cum

47723

- && !warnedsse

47724

- && cum->warn_sse)

47725

+ if (cum && cum->warn_sse && !warnedsse)

47726

{

47727

- warnedsse = true;

47728

- warning (0, "SSE vector argument without SSE "

47729

- "enabled changes the ABI");

47730

+ if (warning (OPT_Wpsabi, "SSE vector argument "

47731

+ "without SSE enabled changes the ABI"))

47732

+ warnedsse = true;

47733

}

47734

- return mode;

47735

+ else if (!TARGET_64BIT && in_return && !warnedsse_ret)

47736

+ {

47737

+ if (warning (OPT_Wpsabi, "SSE vector return "

47738

+ "without SSE enabled changes the ABI"))

47739

+ warnedsse_ret = true;

47740

+ }

47741

}

47742

- else

47743

- return mode;

47744

+ else if ((size == 8 && !TARGET_64BIT) && !TARGET_MMX)

47745

+ {

47746

+ static bool warnedmmx;

47747

+ static bool warnedmmx_ret;

47748

+

47749

+ if (cum && cum->warn_mmx && !warnedmmx)

47750

+ {

47751

+ if (warning (OPT_Wpsabi, "MMX vector argument "

47752

+ "without MMX enabled changes the ABI"))

47753

+ warnedmmx = true;

47754

+ }

47755

+ else if (in_return && !warnedmmx_ret)

47756

+ {

47757

+ if (warning (OPT_Wpsabi, "MMX vector return "

47758

+ "without MMX enabled changes the ABI"))

47759

+ warnedmmx_ret = true;

47760

+ }

47761

+ }

47762

+ return mode;

47763

}

47764

47765

gcc_unreachable ();

47766

@@ -6190,25 +6201,28 @@

47767

case CHImode:

47768

case CQImode:

47769

{

47770

- int size = (bit_offset % 64)+ (int) GET_MODE_BITSIZE (mode);

47771

+ int size = bit_offset + (int) GET_MODE_BITSIZE (mode);

47772

47773

- if (size <= 32)

47774

+ /* Analyze last 128 bits only. */

47775

+ size = (size - 1) & 0x7f;

47776

+

47777

+ if (size < 32)

47778

{

47779

classes[0] = X86_64_INTEGERSI_CLASS;

47780

return 1;

47781

}

47782

- else if (size <= 64)

47783

+ else if (size < 64)

47784

{

47785

classes[0] = X86_64_INTEGER_CLASS;

47786

return 1;

47787

}

47788

- else if (size <= 64+32)

47789

+ else if (size < 64+32)

47790

{

47791

classes[0] = X86_64_INTEGER_CLASS;

47792

classes[1] = X86_64_INTEGERSI_CLASS;

47793

return 2;

47794

}

47795

- else if (size <= 64+64)

47796

+ else if (size < 64+64)

47797

{

47798

classes[0] = classes[1] = X86_64_INTEGER_CLASS;

47799

return 2;

47800

@@ -6475,7 +6489,7 @@

47801

if (n == 2

47802

&& regclass[0] == X86_64_INTEGER_CLASS

47803

&& regclass[1] == X86_64_INTEGER_CLASS

47804

- && (mode == CDImode || mode == TImode || mode == TFmode)

47805

+ && (mode == CDImode || mode == TImode)

47806

&& intreg[0] + 1 == intreg[1])

47807

return gen_rtx_REG (mode, intreg[0]);

47808

47809

@@ -6725,7 +6739,7 @@

47810

words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;

47811

47812

if (type)

47813

- mode = type_natural_mode (type, NULL);

47814

+ mode = type_natural_mode (type, NULL, false);

47815

47816

if (TARGET_64BIT && (cum ? cum->call_abi : ix86_abi) == MS_ABI)

47817

function_arg_advance_ms_64 (cum, bytes, words);

47818

@@ -6753,8 +6767,6 @@

47819

enum machine_mode orig_mode, const_tree type,

47820

HOST_WIDE_INT bytes, HOST_WIDE_INT words)

47821

{

47822

- static bool warnedsse, warnedmmx;

47823

-

47824

/* Avoid the AL settings for the Unix64 ABI. */

47825

if (mode == VOIDmode)

47826

return constm1_rtx;

47827

@@ -6811,12 +6823,6 @@

47828

case V2DFmode:

47829

if (!type || !AGGREGATE_TYPE_P (type))

47830

{

47831

- if (!TARGET_SSE && !warnedsse && cum->warn_sse)

47832

- {

47833

- warnedsse = true;

47834

- warning (0, "SSE vector argument without SSE enabled "

47835

- "changes the ABI");

47836

- }

47837

if (cum->sse_nregs)

47838

return gen_reg_or_parallel (mode, orig_mode,

47839

cum->sse_regno + FIRST_SSE_REG);

47840

@@ -6849,12 +6855,6 @@

47841

case V1DImode:

47842

if (!type || !AGGREGATE_TYPE_P (type))

47843

{

47844

- if (!TARGET_MMX && !warnedmmx && cum->warn_mmx)

47845

- {

47846

- warnedmmx = true;

47847

- warning (0, "MMX vector argument without MMX enabled "

47848

- "changes the ABI");

47849

- }

47850

if (cum->mmx_nregs)

47851

return gen_reg_or_parallel (mode, orig_mode,

47852

cum->mmx_regno + FIRST_MMX_REG);

47853

@@ -6977,7 +6977,7 @@

47854

/* To simplify the code below, represent vector types with a vector mode

47855

even if MMX/SSE are not active. */

47856

if (type && TREE_CODE (type) == VECTOR_TYPE)

47857

- mode = type_natural_mode (type, cum);

47858

+ mode = type_natural_mode (type, cum, false);

47859

47860

if (TARGET_64BIT && (cum ? cum->call_abi : ix86_abi) == MS_ABI)

47861

arg = function_arg_ms_64 (cum, mode, omode, named, bytes);

47862

@@ -7235,9 +7235,15 @@

47863

switch (regno)

47864

{

47865

case AX_REG:

47866

+ case DX_REG:

47867

return true;

47868

+ case DI_REG:

47869

+ case SI_REG:

47870

+ return TARGET_64BIT && ix86_abi != MS_ABI;

47871

47872

- case FIRST_FLOAT_REG:

47873

+ /* Complex values are returned in %st(0)/%st(1) pair. */

47874

+ case ST0_REG:

47875

+ case ST1_REG:

47876

/* TODO: The function should depend on current function ABI but

47877

builtins.c would need updating then. Therefore we use the

47878

default ABI. */

47879

@@ -7245,10 +7251,12 @@

47880

return false;

47881

return TARGET_FLOAT_RETURNS_IN_80387;

47882

47883

- case FIRST_SSE_REG:

47884

+ /* Complex values are returned in %xmm0/%xmm1 pair. */

47885

+ case XMM0_REG:

47886

+ case XMM1_REG:

47887

return TARGET_SSE;

47888

47889

- case FIRST_MMX_REG:

47890

+ case MM0_REG:

47891

if (TARGET_MACHO || TARGET_64BIT)

47892

return false;

47893

return TARGET_MMX;

47894

@@ -7420,7 +7428,7 @@

47895

enum machine_mode mode, orig_mode;

47896

47897

orig_mode = TYPE_MODE (valtype);

47898

- mode = type_natural_mode (valtype, NULL);

47899

+ mode = type_natural_mode (valtype, NULL, true);

47900

return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode);

47901

}

47902

47903

@@ -7535,7 +7543,7 @@

47904

#ifdef SUBTARGET_RETURN_IN_MEMORY

47905

return SUBTARGET_RETURN_IN_MEMORY (type, fntype);

47906

#else

47907

- const enum machine_mode mode = type_natural_mode (type, NULL);

47908

+ const enum machine_mode mode = type_natural_mode (type, NULL, true);

47909

47910

if (TARGET_64BIT)

47911

{

47912

@@ -7549,52 +7557,6 @@

47913

#endif

47914

}

47915

47916

-/* When returning SSE vector types, we have a choice of either

47917

- (1) being abi incompatible with a -march switch, or

47918

- (2) generating an error.

47919

- Given no good solution, I think the safest thing is one warning.

47920

- The user won't be able to use -Werror, but....

47921

-

47922

- Choose the STRUCT_VALUE_RTX hook because that's (at present) only

47923

- called in response to actually generating a caller or callee that

47924

- uses such a type. As opposed to TARGET_RETURN_IN_MEMORY, which is called

47925

- via aggregate_value_p for general type probing from tree-ssa. */

47926

-

47927

-static rtx

47928

-ix86_struct_value_rtx (tree type, int incoming ATTRIBUTE_UNUSED)

47929

-{

47930

- static bool warnedsse, warnedmmx;

47931

-

47932

- if (!TARGET_64BIT && type)

47933

- {

47934

- /* Look at the return type of the function, not the function type. */

47935

- enum machine_mode mode = TYPE_MODE (TREE_TYPE (type));

47936

-

47937

- if (!TARGET_SSE && !warnedsse)

47938

- {

47939

- if (mode == TImode

47940

- || (VECTOR_MODE_P (mode) && GET_MODE_SIZE (mode) == 16))

47941

- {

47942

- warnedsse = true;

47943

- warning (0, "SSE vector return without SSE enabled "

47944

- "changes the ABI");

47945

- }

47946

- }

47947

-

47948

- if (!TARGET_MMX && !warnedmmx)

47949

- {

47950

- if (VECTOR_MODE_P (mode) && GET_MODE_SIZE (mode) == 8)

47951

- {

47952

- warnedmmx = true;

47953

- warning (0, "MMX vector return without MMX enabled "

47954

- "changes the ABI");

47955

- }

47956

- }

47957

- }

47958

-

47959

- return NULL;

47960

-}

47961

-

47962

47963

/* Create the va_list data type. */

47964

47965

@@ -8019,7 +7981,7 @@

47966

size = int_size_in_bytes (type);

47967

rsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;

47968

47969

- nat_mode = type_natural_mode (type, NULL);

47970

+ nat_mode = type_natural_mode (type, NULL, false);

47971

switch (nat_mode)

47972

{

47973

case V8SFmode:

47974

@@ -10560,18 +10522,20 @@

47975

}

47976

m->fs.sp_offset += allocate;

47977

47978

+ /* Use stack_pointer_rtx for relative addressing so that code

47979

+ works for realigned stack, too. */

47980

if (r10_live && eax_live)

47981

{

47982

- t = choose_baseaddr (m->fs.sp_offset - allocate);

47983

+ t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax);

47984

emit_move_insn (gen_rtx_REG (word_mode, R10_REG),

47985

gen_frame_mem (word_mode, t));

47986

- t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD);

47987

+ t = plus_constant (Pmode, t, UNITS_PER_WORD);

47988

emit_move_insn (gen_rtx_REG (word_mode, AX_REG),

47989

gen_frame_mem (word_mode, t));

47990

}

47991

else if (eax_live || r10_live)

47992

{

47993

- t = choose_baseaddr (m->fs.sp_offset - allocate);

47994

+ t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax);

47995

emit_move_insn (gen_rtx_REG (word_mode,

47996

(eax_live ? AX_REG : R10_REG)),

47997

gen_frame_mem (word_mode, t));

47998

@@ -11164,8 +11128,9 @@

47999

m->fs.cfa_offset -= UNITS_PER_WORD;

48000

m->fs.sp_offset -= UNITS_PER_WORD;

48001

48002

- add_reg_note (insn, REG_CFA_ADJUST_CFA,

48003

- copy_rtx (XVECEXP (PATTERN (insn), 0, 1)));

48004

+ rtx x = plus_constant (Pmode, stack_pointer_rtx, UNITS_PER_WORD);

48005

+ x = gen_rtx_SET (VOIDmode, stack_pointer_rtx, x);

48006

+ add_reg_note (insn, REG_CFA_ADJUST_CFA, x);

48007

add_reg_note (insn, REG_CFA_REGISTER,

48008

gen_rtx_SET (VOIDmode, ecx, pc_rtx));

48009

RTX_FRAME_RELATED_P (insn) = 1;

48010

@@ -11561,30 +11526,6 @@

48011

}

48012

}

48013

48014

-/* Determine if op is suitable SUBREG RTX for address. */

48015

-

48016

-static bool

48017

-ix86_address_subreg_operand (rtx op)

48018

-{

48019

- enum machine_mode mode;

48020

-

48021

- if (!REG_P (op))

48022

- return false;

48023

-

48024

- mode = GET_MODE (op);

48025

-

48026

- if (GET_MODE_CLASS (mode) != MODE_INT)

48027

- return false;

48028

-

48029

- /* Don't allow SUBREGs that span more than a word. It can lead to spill

48030

- failures when the register is one word out of a two word structure. */

48031

- if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)

48032

- return false;

48033

-

48034

- /* Allow only SUBREGs of non-eliminable hard registers. */

48035

- return register_no_elim_operand (op, mode);

48036

-}

48037

-

48038

/* Extract the parts of an RTL expression that is a valid memory address

48039

for an instruction. Return 0 if the structure of the address is

48040

grossly off. Return -1 if the address contains ASHIFT, so it is not

48041

@@ -11641,7 +11582,7 @@

48042

base = addr;

48043

else if (GET_CODE (addr) == SUBREG)

48044

{

48045

- if (ix86_address_subreg_operand (SUBREG_REG (addr)))

48046

+ if (REG_P (SUBREG_REG (addr)))

48047

base = addr;

48048

else

48049

return 0;

48050

@@ -11705,7 +11646,7 @@

48051

break;

48052

48053

case SUBREG:

48054

- if (!ix86_address_subreg_operand (SUBREG_REG (op)))

48055

+ if (!REG_P (SUBREG_REG (op)))

48056

return 0;

48057

/* FALLTHRU */

48058

48059

@@ -11750,19 +11691,6 @@

48060

scale = 1 << scale;

48061

retval = -1;

48062

}

48063

- else if (CONST_INT_P (addr))

48064

- {

48065

- if (!x86_64_immediate_operand (addr, VOIDmode))

48066

- return 0;

48067

-

48068

- /* Constant addresses are sign extended to 64bit, we have to

48069

- prevent addresses from 0x80000000 to 0xffffffff in x32 mode. */

48070

- if (TARGET_X32

48071

- && val_signbit_known_set_p (SImode, INTVAL (addr)))

48072

- return 0;

48073

-

48074

- disp = addr;

48075

- }

48076

else

48077

disp = addr; /* displacement */

48078

48079

@@ -11771,18 +11699,12 @@

48080

if (REG_P (index))

48081

;

48082

else if (GET_CODE (index) == SUBREG

48083

- && ix86_address_subreg_operand (SUBREG_REG (index)))

48084

+ && REG_P (SUBREG_REG (index)))

48085

;

48086

else

48087

return 0;

48088

}

48089

48090

-/* Address override works only on the (%reg) part of %fs:(%reg). */

48091

- if (seg != SEG_DEFAULT

48092

- && ((base && GET_MODE (base) != word_mode)

48093

- || (index && GET_MODE (index) != word_mode)))

48094

- return 0;

48095

-

48096

/* Extract the integral value of scale. */

48097

if (scale_rtx)

48098

{

48099

@@ -12258,6 +12180,45 @@

48100

return false;

48101

}

48102

48103

+/* Determine if op is suitable RTX for an address register.

48104

+ Return naked register if a register or a register subreg is

48105

+ found, otherwise return NULL_RTX. */

48106

+

48107

+static rtx

48108

+ix86_validate_address_register (rtx op)

48109

+{

48110

+ enum machine_mode mode = GET_MODE (op);

48111

+

48112

+ /* Only SImode or DImode registers can form the address. */

48113

+ if (mode != SImode && mode != DImode)

48114

+ return NULL_RTX;

48115

+

48116

+ if (REG_P (op))

48117

+ return op;

48118

+ else if (GET_CODE (op) == SUBREG)

48119

+ {

48120

+ rtx reg = SUBREG_REG (op);

48121

+

48122

+ if (!REG_P (reg))

48123

+ return NULL_RTX;

48124

+

48125

+ mode = GET_MODE (reg);

48126

+

48127

+ /* Don't allow SUBREGs that span more than a word. It can

48128

+ lead to spill failures when the register is one word out

48129

+ of a two word structure. */

48130

+ if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)

48131

+ return NULL_RTX;

48132

+

48133

+ /* Allow only SUBREGs of non-eliminable hard registers. */

48134

+ if (register_no_elim_operand (reg, mode))

48135

+ return reg;

48136

+ }

48137

+

48138

+ /* Op is not a register. */

48139

+ return NULL_RTX;

48140

+}

48141

+

48142

/* Recognizes RTL expressions that are valid memory addresses for an

48143

instruction. The MODE argument is the machine mode for the MEM

48144

expression that wants to use this address.

48145

@@ -12273,6 +12234,7 @@

48146

struct ix86_address parts;

48147

rtx base, index, disp;

48148

HOST_WIDE_INT scale;

48149

+ enum ix86_address_seg seg;

48150

48151

if (ix86_decompose_address (addr, &parts) <= 0)

48152

/* Decomposition failed. */

48153

@@ -12282,23 +12244,16 @@

48154

index = parts.index;

48155

disp = parts.disp;

48156

scale = parts.scale;

48157

+ seg = parts.seg;

48158

48159

/* Validate base register. */

48160

if (base)

48161

{

48162

- rtx reg;

48163

+ rtx reg = ix86_validate_address_register (base);

48164

48165

- if (REG_P (base))

48166

- reg = base;

48167

- else if (GET_CODE (base) == SUBREG && REG_P (SUBREG_REG (base)))

48168

- reg = SUBREG_REG (base);

48169

- else

48170

- /* Base is not a register. */

48171

+ if (reg == NULL_RTX)

48172

return false;

48173

48174

- if (GET_MODE (base) != SImode && GET_MODE (base) != DImode)

48175

- return false;

48176

-

48177

if ((strict && ! REG_OK_FOR_BASE_STRICT_P (reg))

48178

|| (! strict && ! REG_OK_FOR_BASE_NONSTRICT_P (reg)))

48179

/* Base is not valid. */

48180

@@ -12308,19 +12263,11 @@

48181

/* Validate index register. */

48182

if (index)

48183

{

48184

- rtx reg;

48185

+ rtx reg = ix86_validate_address_register (index);

48186

48187

- if (REG_P (index))

48188

- reg = index;

48189

- else if (GET_CODE (index) == SUBREG && REG_P (SUBREG_REG (index)))

48190

- reg = SUBREG_REG (index);

48191

- else

48192

- /* Index is not a register. */

48193

+ if (reg == NULL_RTX)

48194

return false;

48195

48196

- if (GET_MODE (index) != SImode && GET_MODE (index) != DImode)

48197

- return false;

48198

-

48199

if ((strict && ! REG_OK_FOR_INDEX_STRICT_P (reg))

48200

|| (! strict && ! REG_OK_FOR_INDEX_NONSTRICT_P (reg)))

48201

/* Index is not valid. */

48202

@@ -12332,6 +12279,12 @@

48203

&& GET_MODE (base) != GET_MODE (index))

48204

return false;

48205

48206

+ /* Address override works only on the (%reg) part of %fs:(%reg). */

48207

+ if (seg != SEG_DEFAULT

48208

+ && ((base && GET_MODE (base) != word_mode)

48209

+ || (index && GET_MODE (index) != word_mode)))

48210

+ return false;

48211

+

48212

/* Validate scale factor. */

48213

if (scale != 1)

48214

{

48215

@@ -12453,6 +12406,12 @@

48216

&& !x86_64_immediate_operand (disp, VOIDmode))

48217

/* Displacement is out of range. */

48218

return false;

48219

+ /* In x32 mode, constant addresses are sign extended to 64bit, so

48220

+ we have to prevent addresses from 0x80000000 to 0xffffffff. */

48221

+ else if (TARGET_X32 && !(index || base)

48222

+ && CONST_INT_P (disp)

48223

+ && val_signbit_known_set_p (SImode, INTVAL (disp)))

48224

+ return false;

48225

}

48226

48227

/* Everything looks valid. */

48228

@@ -13817,8 +13776,6 @@

48229

Those same assemblers have the same but opposite lossage on cmov. */

48230

if (mode == CCmode)

48231

suffix = fp ? "nbe" : "a";

48232

- else if (mode == CCCmode)

48233

- suffix = "b";

48234

else

48235

gcc_unreachable ();

48236

break;

48237

@@ -13840,8 +13797,12 @@

48238

}

48239

break;

48240

case LTU:

48241

- gcc_assert (mode == CCmode || mode == CCCmode);

48242

- suffix = "b";

48243

+ if (mode == CCmode)

48244

+ suffix = "b";

48245

+ else if (mode == CCCmode)

48246

+ suffix = "c";

48247

+ else

48248

+ gcc_unreachable ();

48249

break;

48250

case GE:

48251

switch (mode)

48252

@@ -13861,9 +13822,12 @@

48253

}

48254

break;

48255

case GEU:

48256

- /* ??? As above. */

48257

- gcc_assert (mode == CCmode || mode == CCCmode);

48258

- suffix = fp ? "nb" : "ae";

48259

+ if (mode == CCmode)

48260

+ suffix = fp ? "nb" : "ae";

48261

+ else if (mode == CCCmode)

48262

+ suffix = "nc";

48263

+ else

48264

+ gcc_unreachable ();

48265

break;

48266

case LE:

48267

gcc_assert (mode == CCmode || mode == CCGCmode || mode == CCNOmode);

48268

@@ -13870,11 +13834,8 @@

48269

suffix = "le";

48270

break;

48271

case LEU:

48272

- /* ??? As above. */

48273

if (mode == CCmode)

48274

suffix = "be";

48275

- else if (mode == CCCmode)

48276

- suffix = fp ? "nb" : "ae";

48277

else

48278

gcc_unreachable ();

48279

break;

48280

@@ -15340,7 +15301,7 @@

48281

rtx arg = XEXP (XEXP (link, 0), 0);

48282

48283

if (ix86_check_avx256_register (&arg, NULL))

48284

- return AVX_U128_ANY;

48285

+ return AVX_U128_DIRTY;

48286

}

48287

}

48288

48289

@@ -15460,8 +15421,8 @@

48290

{

48291

bool avx_reg256_found = false;

48292

note_stores (pat, ix86_check_avx256_stores, &avx_reg256_found);

48293

- if (!avx_reg256_found)

48294

- return AVX_U128_CLEAN;

48295

+

48296

+ return avx_reg256_found ? AVX_U128_DIRTY : AVX_U128_CLEAN;

48297

}

48298

48299

/* Otherwise, return current mode. Remember that if insn

48300

@@ -17350,10 +17311,20 @@

48301

if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun))

48302

return false;

48303

48304

- /* Check it is correct to split here. */

48305

- if (!ix86_ok_to_clobber_flags(insn))

48306

+ /* The "at least two components" test below might not catch simple

48307

+ move or zero extension insns if parts.base is non-NULL and parts.disp

48308

+ is const0_rtx as the only components in the address, e.g. if the

48309

+ register is %rbp or %r13. As this test is much cheaper and moves or

48310

+ zero extensions are the common case, do this check first. */

48311

+ if (REG_P (operands[1])

48312

+ || (SImode_address_operand (operands[1], VOIDmode)

48313

+ && REG_P (XEXP (operands[1], 0))))

48314

return false;

48315

48316

+ /* Check if it is OK to split here. */

48317

+ if (!ix86_ok_to_clobber_flags (insn))

48318

+ return false;

48319

+

48320

ok = ix86_decompose_address (operands[1], &parts);

48321

gcc_assert (ok);

48322

48323

@@ -18486,12 +18457,7 @@

48324

return CCmode;

48325

case GTU: /* CF=0 & ZF=0 */

48326

case LEU: /* CF=1 | ZF=1 */

48327

- /* Detect overflow checks. They need just the carry flag. */

48328

- if (GET_CODE (op0) == MINUS

48329

- && rtx_equal_p (op1, XEXP (op0, 0)))

48330

- return CCCmode;

48331

- else

48332

- return CCmode;

48333

+ return CCmode;

48334

/* Codes possibly doable only with sign flag when

48335

comparing against zero. */

48336

case GE: /* SF=OF or SF=0 */

48337

@@ -20500,7 +20466,7 @@

48338

return;

48339

48340

case V8SFmode:

48341

- mask = gen_lowpart (V8SFmode, mask);

48342

+ mask = gen_lowpart (V8SImode, mask);

48343

if (one_operand_shuffle)

48344

emit_insn (gen_avx2_permvarv8sf (target, op0, mask));

48345

else

48346

@@ -21740,6 +21706,21 @@

48347

return SImode;

48348

}

48349

48350

+/* Copy the address to a Pmode register. This is used for x32 to

48351

+ truncate DImode TLS address to a SImode register. */

48352

+

48353

+static rtx

48354

+ix86_copy_addr_to_reg (rtx addr)

48355

+{

48356

+ if (GET_MODE (addr) == Pmode || GET_MODE (addr) == VOIDmode)

48357

+ return copy_addr_to_reg (addr);

48358

+ else

48359

+ {

48360

+ gcc_assert (GET_MODE (addr) == DImode && Pmode == SImode);

48361

+ return gen_rtx_SUBREG (SImode, copy_to_mode_reg (DImode, addr), 0);

48362

+ }

48363

+}

48364

+

48365

/* When SRCPTR is non-NULL, output simple loop to move memory

48366

pointer to SRCPTR to DESTPTR via chunks of MODE unrolled UNROLL times,

48367

overall size is COUNT specified in bytes. When SRCPTR is NULL, output the

48368

@@ -22728,8 +22709,8 @@

48369

gcc_assert (alg != no_stringop);

48370

if (!count)

48371

count_exp = copy_to_mode_reg (GET_MODE (count_exp), count_exp);

48372

- destreg = copy_addr_to_reg (XEXP (dst, 0));

48373

- srcreg = copy_addr_to_reg (XEXP (src, 0));

48374

+ destreg = ix86_copy_addr_to_reg (XEXP (dst, 0));

48375

+ srcreg = ix86_copy_addr_to_reg (XEXP (src, 0));

48376

switch (alg)

48377

{

48378

case libcall:

48379

@@ -23119,7 +23100,7 @@

48380

gcc_assert (alg != no_stringop);

48381

if (!count)

48382

count_exp = copy_to_mode_reg (counter_mode (count_exp), count_exp);

48383

- destreg = copy_addr_to_reg (XEXP (dst, 0));

48384

+ destreg = ix86_copy_addr_to_reg (XEXP (dst, 0));

48385

switch (alg)

48386

{

48387

case libcall:

48388

@@ -24988,7 +24969,8 @@

48389

int

48390

ix86_data_alignment (tree type, int align)

48391

{

48392

- int max_align = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT);

48393

+ int max_align

48394

+ = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT);

48395

48396

if (AGGREGATE_TYPE_P (type)

48397

&& TYPE_SIZE (type)

48398

@@ -27984,8 +27966,8 @@

48399

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv8hi3, "__builtin_ia32_vpshlw", IX86_BUILTIN_VPSHLW, UNKNOWN, (int)MULTI_ARG_2_HI },

48400

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv16qi3, "__builtin_ia32_vpshlb", IX86_BUILTIN_VPSHLB, UNKNOWN, (int)MULTI_ARG_2_QI },

48401

48402

- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_2_SF },

48403

- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_2_DF },

48404

+ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_1_SF },

48405

+ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_1_DF },

48406

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv4sf2, "__builtin_ia32_vfrczps", IX86_BUILTIN_VFRCZPS, UNKNOWN, (int)MULTI_ARG_1_SF },

48407

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv2df2, "__builtin_ia32_vfrczpd", IX86_BUILTIN_VFRCZPD, UNKNOWN, (int)MULTI_ARG_1_DF },

48408

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv8sf2, "__builtin_ia32_vfrczps256", IX86_BUILTIN_VFRCZPS256, UNKNOWN, (int)MULTI_ARG_1_SF2 },

48409

@@ -31245,11 +31227,12 @@

48410

48411

static rtx

48412

ix86_expand_special_args_builtin (const struct builtin_description *d,

48413

- tree exp, rtx target)

48414

+ tree exp, rtx target)

48415

{

48416

tree arg;

48417

rtx pat, op;

48418

unsigned int i, nargs, arg_adjust, memory;

48419

+ bool aligned_mem = false;

48420

struct

48421

{

48422

rtx op;

48423

@@ -31295,6 +31278,15 @@

48424

nargs = 1;

48425

klass = load;

48426

memory = 0;

48427

+ switch (icode)

48428

+ {

48429

+ case CODE_FOR_sse4_1_movntdqa:

48430

+ case CODE_FOR_avx2_movntdqa:

48431

+ aligned_mem = true;

48432

+ break;

48433

+ default:

48434

+ break;

48435

+ }

48436

break;

48437

case VOID_FTYPE_PV2SF_V4SF:

48438

case VOID_FTYPE_PV4DI_V4DI:

48439

@@ -31312,6 +31304,26 @@

48440

klass = store;

48441

/* Reserve memory operand for target. */

48442

memory = ARRAY_SIZE (args);

48443

+ switch (icode)

48444

+ {

48445

+ /* These builtins and instructions require the memory

48446

+ to be properly aligned. */

48447

+ case CODE_FOR_avx_movntv4di:

48448

+ case CODE_FOR_sse2_movntv2di:

48449

+ case CODE_FOR_avx_movntv8sf:

48450

+ case CODE_FOR_sse_movntv4sf:

48451

+ case CODE_FOR_sse4a_vmmovntv4sf:

48452

+ case CODE_FOR_avx_movntv4df:

48453

+ case CODE_FOR_sse2_movntv2df:

48454

+ case CODE_FOR_sse4a_vmmovntv2df:

48455

+ case CODE_FOR_sse2_movntidi:

48456

+ case CODE_FOR_sse_movntq:

48457

+ case CODE_FOR_sse2_movntisi:

48458

+ aligned_mem = true;

48459

+ break;

48460

+ default:

48461

+ break;

48462

+ }

48463

break;

48464

case V4SF_FTYPE_V4SF_PCV2SF:

48465

case V2DF_FTYPE_V2DF_PCDOUBLE:

48466

@@ -31368,6 +31380,17 @@

48467

{

48468

op = force_reg (Pmode, convert_to_mode (Pmode, op, 1));

48469

target = gen_rtx_MEM (tmode, op);

48470

+ /* target at this point has just BITS_PER_UNIT MEM_ALIGN

48471

+ on it. Try to improve it using get_pointer_alignment,

48472

+ and if the special builtin is one that requires strict

48473

+ mode alignment, also from it's GET_MODE_ALIGNMENT.

48474

+ Failure to do so could lead to ix86_legitimate_combined_insn

48475

+ rejecting all changes to such insns. */

48476

+ unsigned int align = get_pointer_alignment (arg);

48477

+ if (aligned_mem && align < GET_MODE_ALIGNMENT (tmode))

48478

+ align = GET_MODE_ALIGNMENT (tmode);

48479

+ if (MEM_ALIGN (target) < align)

48480

+ set_mem_align (target, align);

48481

}

48482

else

48483

target = force_reg (tmode, op);

48484

@@ -31413,8 +31436,17 @@

48485

/* This must be the memory operand. */

48486

op = force_reg (Pmode, convert_to_mode (Pmode, op, 1));

48487

op = gen_rtx_MEM (mode, op);

48488

- gcc_assert (GET_MODE (op) == mode

48489

- || GET_MODE (op) == VOIDmode);

48490

+ /* op at this point has just BITS_PER_UNIT MEM_ALIGN

48491

+ on it. Try to improve it using get_pointer_alignment,

48492

+ and if the special builtin is one that requires strict

48493

+ mode alignment, also from it's GET_MODE_ALIGNMENT.

48494

+ Failure to do so could lead to ix86_legitimate_combined_insn

48495

+ rejecting all changes to such insns. */

48496

+ unsigned int align = get_pointer_alignment (arg);

48497

+ if (aligned_mem && align < GET_MODE_ALIGNMENT (mode))

48498

+ align = GET_MODE_ALIGNMENT (mode);

48499

+ if (MEM_ALIGN (op) < align)

48500

+ set_mem_align (op, align);

48501

}

48502

else

48503

{

48504

@@ -32027,7 +32059,8 @@

48505

else

48506

op2 = gen_rtx_SUBREG (SImode, op0, 0);

48507

48508

- if (target == 0)

48509

+ if (target == 0

48510

+ || !register_operand (target, SImode))

48511

target = gen_reg_rtx (SImode);

48512

48513

pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG),

48514

@@ -32069,7 +32102,8 @@

48515

const0_rtx);

48516

emit_insn (gen_rtx_SET (VOIDmode, op2, pat));

48517

48518

- if (target == 0)

48519

+ if (target == 0

48520

+ || !register_operand (target, SImode))

48521

target = gen_reg_rtx (SImode);

48522

48523

emit_insn (gen_zero_extendqisi2 (target, op2));

48524

@@ -32208,7 +32242,9 @@

48525

mode4 = insn_data[icode].operand[5].mode;

48526

48527

if (target == NULL_RTX

48528

- || GET_MODE (target) != insn_data[icode].operand[0].mode)

48529

+ || GET_MODE (target) != insn_data[icode].operand[0].mode

48530

+ || !insn_data[icode].operand[0].predicate (target,

48531

+ GET_MODE (target)))

48532

subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);

48533

else

48534

subtarget = target;

48535

@@ -33879,10 +33915,10 @@

48536

{

48537

/* We implement the move patterns for all vector modes into and

48538

out of SSE registers, even when no operation instructions

48539

- are available. OImode move is available only when AVX is

48540

- enabled. */

48541

- return ((TARGET_AVX && mode == OImode)

48542

- || VALID_AVX256_REG_MODE (mode)

48543

+ are available. OImode and AVX modes are available only when

48544

+ AVX is enabled. */

48545

+ return ((TARGET_AVX

48546

+ && VALID_AVX256_REG_OR_OI_MODE (mode))

48547

|| VALID_SSE_REG_MODE (mode)

48548

|| VALID_SSE2_REG_MODE (mode)

48549

|| VALID_MMX_REG_MODE (mode)

48550

@@ -35020,7 +35056,7 @@

48551

{

48552

tmp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, fnaddr), UNSPEC_GOTPCREL);

48553

tmp = gen_rtx_CONST (Pmode, tmp);

48554

- fnaddr = gen_rtx_MEM (Pmode, tmp);

48555

+ fnaddr = gen_const_mem (Pmode, tmp);

48556

}

48557

}

48558

else

48559

@@ -35040,8 +35076,9 @@

48560

output_set_got (tmp, NULL_RTX);

48561

48562

fnaddr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, fnaddr), UNSPEC_GOT);

48563

- fnaddr = gen_rtx_PLUS (Pmode, fnaddr, tmp);

48564

- fnaddr = gen_rtx_MEM (Pmode, fnaddr);

48565

+ fnaddr = gen_rtx_CONST (Pmode, fnaddr);

48566

+ fnaddr = gen_rtx_PLUS (Pmode, tmp, fnaddr);

48567

+ fnaddr = gen_const_mem (Pmode, fnaddr);

48568

}

48569

}

48570

48571

@@ -35232,7 +35269,10 @@

48572

The smallest offset in the page INSN can start is the case where START

48573

ends on the offset 0. Offset of INSN is then NBYTES - sizeof (INSN).

48574

We add p2align to 16byte window with maxskip 15 - NBYTES + sizeof (INSN).

48575

- */

48576

+

48577

+ Don't consider asm goto as jump, while it can contain a jump, it doesn't

48578

+ have to, control transfer to label(s) can be performed through other

48579

+ means, and also we estimate minimum length of all asm stmts as 0. */

48580

for (insn = start; insn; insn = NEXT_INSN (insn))

48581

{

48582

int min_size;

48583

@@ -35260,6 +35300,7 @@

48584

{

48585

start = NEXT_INSN (start);

48586

if ((JUMP_P (start)

48587

+ && asm_noperands (PATTERN (start)) < 0

48588

&& GET_CODE (PATTERN (start)) != ADDR_VEC

48589

&& GET_CODE (PATTERN (start)) != ADDR_DIFF_VEC)

48590

|| CALL_P (start))

48591

@@ -35278,6 +35319,7 @@

48592

fprintf (dump_file, "Insn %i estimated to %i bytes\n",

48593

INSN_UID (insn), min_size);

48594

if ((JUMP_P (insn)

48595

+ && asm_noperands (PATTERN (insn)) < 0

48596

&& GET_CODE (PATTERN (insn)) != ADDR_VEC

48597

&& GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)

48598

|| CALL_P (insn))

48599

@@ -35289,6 +35331,7 @@

48600

{

48601

start = NEXT_INSN (start);

48602

if ((JUMP_P (start)

48603

+ && asm_noperands (PATTERN (start)) < 0

48604

&& GET_CODE (PATTERN (start)) != ADDR_VEC

48605

&& GET_CODE (PATTERN (start)) != ADDR_DIFF_VEC)

48606

|| CALL_P (start))

48607

@@ -39371,7 +39414,9 @@

48608

else

48609

dfinal.perm[i] = e;

48610

}

48611

- dfinal.op0 = gen_reg_rtx (dfinal.vmode);

48612

+

48613

+ if (!d->testing_p)

48614

+ dfinal.op0 = gen_reg_rtx (dfinal.vmode);

48615

dfinal.op1 = dfinal.op0;

48616

dfinal.one_operand_p = true;

48617

dremap.target = dfinal.op0;

48618

@@ -39806,6 +39851,9 @@

48619

return false;

48620

gcc_assert (!d->one_operand_p);

48621

48622

+ if (d->testing_p)

48623

+ return true;

48624

+

48625

nelt = d->nelt;

48626

eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));

48627

48628

@@ -40005,6 +40053,8 @@

48629

switch (d->vmode)

48630

{

48631

case V4DFmode:

48632

+ if (d->testing_p)

48633

+ break;

48634

t1 = gen_reg_rtx (V4DFmode);

48635

t2 = gen_reg_rtx (V4DFmode);

48636

48637

@@ -40024,6 +40074,8 @@

48638

{

48639

int mask = odd ? 0xdd : 0x88;

48640

48641

+ if (d->testing_p)

48642

+ break;

48643

t1 = gen_reg_rtx (V8SFmode);

48644

t2 = gen_reg_rtx (V8SFmode);

48645

t3 = gen_reg_rtx (V8SFmode);

48646

@@ -40065,6 +40117,8 @@

48647

return expand_vec_perm_pshufb2 (d);

48648

else

48649

{

48650

+ if (d->testing_p)

48651

+ break;

48652

/* We need 2*log2(N)-1 operations to achieve odd/even

48653

with interleave. */

48654

t1 = gen_reg_rtx (V8HImode);

48655

@@ -40086,6 +40140,8 @@

48656

return expand_vec_perm_pshufb2 (d);

48657

else

48658

{

48659

+ if (d->testing_p)

48660

+ break;

48661

t1 = gen_reg_rtx (V16QImode);

48662

t2 = gen_reg_rtx (V16QImode);

48663

t3 = gen_reg_rtx (V16QImode);

48664

@@ -40118,6 +40174,9 @@

48665

return expand_vec_perm_even_odd_1 (&d_copy, odd);

48666

}

48667

48668

+ if (d->testing_p)

48669

+ break;

48670

+

48671

t1 = gen_reg_rtx (V4DImode);

48672

t2 = gen_reg_rtx (V4DImode);

48673

48674

@@ -40144,6 +40203,9 @@

48675

return expand_vec_perm_even_odd_1 (&d_copy, odd);

48676

}

48677

48678

+ if (d->testing_p)

48679

+ break;

48680

+

48681

t1 = gen_reg_rtx (V8SImode);

48682

t2 = gen_reg_rtx (V8SImode);

48683

48684

@@ -40236,6 +40298,8 @@

48685

case V16QImode:

48686

/* These can be implemented via interleave. We save one insn by

48687

stopping once we have promoted to V4SImode and then use pshufd. */

48688

+ if (d->testing_p)

48689

+ return true;

48690

do

48691

{

48692

rtx dest;

48693

@@ -42473,8 +42537,6 @@

48694

48695

#undef TARGET_PROMOTE_PROTOTYPES

48696

#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true

48697

-#undef TARGET_STRUCT_VALUE_RTX

48698

-#define TARGET_STRUCT_VALUE_RTX ix86_struct_value_rtx

48699

#undef TARGET_SETUP_INCOMING_VARARGS

48700

#define TARGET_SETUP_INCOMING_VARARGS ix86_setup_incoming_varargs

48701

#undef TARGET_MUST_PASS_IN_STACK

48702

Index: gcc/config/tilegx/tilegx.md

48703

===================================================================

48704

--- a/src/gcc/config/tilegx/tilegx.md (.../tags/gcc_4_8_2_release)

48705

+++ b/src/gcc/config/tilegx/tilegx.md (.../branches/gcc-4_8-branch)

48706

@@ -5076,10 +5076,8 @@

48707

48708

;; Network intrinsics

48709

48710

-;; Note the "pseudo" text is handled specially by the

48711

-;; asm_output_opcode routine. If the output is an empty string, the

48712

-;; instruction would bypass the asm_output_opcode routine, bypassing

48713

-;; the bundle handling code.

48714

+;; Note the this barrier is of type "nothing," which is deleted after

48715

+;; the final scheduling pass so that nothing is emitted for it.

48716

(define_insn "tilegx_network_barrier"

48717

[(unspec_volatile:SI [(const_int 0)] UNSPEC_NETWORK_BARRIER)]

48718

""

48719

Index: gcc/config/tilegx/tilegx-c.c

48720

===================================================================

48721

--- a/src/gcc/config/tilegx/tilegx-c.c (.../tags/gcc_4_8_2_release)

48722

+++ b/src/gcc/config/tilegx/tilegx-c.c (.../branches/gcc-4_8-branch)

48723

@@ -47,6 +47,9 @@

48724

if (TARGET_32BIT)

48725

builtin_define ("__tilegx32__");

48726

48727

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");

48728

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");

48729

+

48730

TILEGX_CPU_CPP_ENDIAN_BUILTINS ();

48731

GNU_USER_TARGET_OS_CPP_BUILTINS ();

48732

}

48733

Index: gcc/config/tilegx/sync.md

48734

===================================================================

48735

--- a/src/gcc/config/tilegx/sync.md (.../tags/gcc_4_8_2_release)

48736

+++ b/src/gcc/config/tilegx/sync.md (.../branches/gcc-4_8-branch)

48737

@@ -150,15 +150,22 @@

48738

(match_operand:SI 3 "const_int_operand" "")] ;; model

48739

""

48740

{

48741

+ rtx addend;

48742

enum memmodel model = (enum memmodel) INTVAL (operands[3]);

48743

48744

if (operands[2] != const0_rtx)

48745

- emit_move_insn (operands[2], gen_rtx_NEG (<MODE>mode, operands[2]));

48746

+ {

48747

+ addend = gen_reg_rtx (<MODE>mode);

48748

+ emit_move_insn (addend,

48749

+ gen_rtx_MINUS (<MODE>mode, const0_rtx, operands[2]));

48750

+ }

48751

+ else

48752

+ addend = operands[2];

48753

48754

tilegx_pre_atomic_barrier (model);

48755

emit_insn (gen_atomic_fetch_add_bare<mode> (operands[0],

48756

operands[1],

48757

- operands[2]));

48758

+ addend));

48759

tilegx_post_atomic_barrier (model);

48760

DONE;

48761

})

48762

Index: gcc/config/tilegx/tilegx.c

48763

===================================================================

48764

--- a/src/gcc/config/tilegx/tilegx.c (.../tags/gcc_4_8_2_release)

48765

+++ b/src/gcc/config/tilegx/tilegx.c (.../branches/gcc-4_8-branch)

48766

@@ -702,6 +702,16 @@

48767

}

48768

48769

48770

+/* Implement TARGET_EXPAND_TO_RTL_HOOK. */

48771

+static void

48772

+tilegx_expand_to_rtl_hook (void)

48773

+{

48774

+ /* Exclude earlier sets of crtl->uses_pic_offset_table, because we

48775

+ only care about uses actually emitted. */

48776

+ crtl->uses_pic_offset_table = 0;

48777

+}

48778

+

48779

+

48780

/* Implement TARGET_SHIFT_TRUNCATION_MASK. DImode shifts use the mode

48781

matching insns and therefore guarantee that the shift count is

48782

modulo 64. SImode shifts sometimes use the 64 bit version so do

48783

@@ -3543,6 +3553,12 @@

48784

}

48785

if (!pat)

48786

return NULL_RTX;

48787

+

48788

+ /* If we are generating a prefetch, tell the scheduler not to move

48789

+ it around. */

48790

+ if (GET_CODE (pat) == PREFETCH)

48791

+ PREFETCH_SCHEDULE_BARRIER_P (pat) = true;

48792

+

48793

emit_insn (pat);

48794

48795

if (nonvoid)

48796

@@ -4368,10 +4384,12 @@

48797

basic_block bb;

48798

FOR_EACH_BB (bb)

48799

{

48800

- rtx insn, next;

48801

+ rtx insn, next, prev;

48802

rtx end = NEXT_INSN (BB_END (bb));

48803

48804

- for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; insn = next)

48805

+ prev = NULL_RTX;

48806

+ for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn;

48807

+ prev = insn, insn = next)

48808

{

48809

next = next_insn_to_bundle (NEXT_INSN (insn), end);

48810

48811

@@ -4396,6 +4414,18 @@

48812

PUT_MODE (insn, SImode);

48813

}

48814

}

48815

+

48816

+ /* Delete barrier insns, because they can mess up the

48817

+ emitting of bundle braces. If it is end-of-bundle, then

48818

+ the previous insn must be marked end-of-bundle. */

48819

+ if (get_attr_type (insn) == TYPE_NOTHING) {

48820

+ if (GET_MODE (insn) == QImode && prev != NULL

48821

+ && GET_MODE (prev) == SImode)

48822

+ {

48823

+ PUT_MODE (prev, QImode);

48824

+ }

48825

+ delete_insn (insn);

48826

+ }

48827

}

48828

}

48829

}

48830

@@ -5498,6 +5528,9 @@

48831

#undef TARGET_RTX_COSTS

48832

#define TARGET_RTX_COSTS tilegx_rtx_costs

48833

48834

+#undef TARGET_EXPAND_TO_RTL_HOOK

48835

+#define TARGET_EXPAND_TO_RTL_HOOK tilegx_expand_to_rtl_hook

48836

+

48837

#undef TARGET_SHIFT_TRUNCATION_MASK

48838

#define TARGET_SHIFT_TRUNCATION_MASK tilegx_shift_truncation_mask

48839

48840

Index: gcc/config/sh/predicates.md

48841

===================================================================

48842

--- a/src/gcc/config/sh/predicates.md (.../tags/gcc_4_8_2_release)

48843

+++ b/src/gcc/config/sh/predicates.md (.../branches/gcc-4_8-branch)

48844

@@ -389,6 +389,12 @@

48845

XEXP (XEXP (op, 0), 1),

48846

TARGET_SH2A, true)")))

48847

48848

+;; Returns true if OP is a displacement address that can fit into a

48849

+;; 16 bit (non-SH2A) memory load / store insn.

48850

+(define_predicate "short_displacement_mem_operand"

48851

+ (match_test "sh_disp_addr_displacement (op)

48852

+ <= sh_max_mov_insn_displacement (GET_MODE (op), false)"))

48853

+

48854

;; Returns 1 if the operand can be used in an SH2A movu.{b|w} insn.

48855

(define_predicate "zero_extend_movu_operand"

48856

(and (match_operand 0 "displacement_mem_operand")

48857

@@ -413,6 +419,11 @@

48858

if (t_reg_operand (op, mode))

48859

return 0;

48860

48861

+ /* Disallow PC relative QImode loads, since these is no insn to do that

48862

+ and an imm8 load should be used instead. */

48863

+ if (IS_PC_RELATIVE_LOAD_ADDR_P (op) && GET_MODE (op) == QImode)

48864

+ return false;

48865

+

48866

if (MEM_P (op))

48867

{

48868

rtx inside = XEXP (op, 0);

48869

Index: gcc/config/sh/sh-protos.h

48870

===================================================================

48871

--- a/src/gcc/config/sh/sh-protos.h (.../tags/gcc_4_8_2_release)

48872

+++ b/src/gcc/config/sh/sh-protos.h (.../branches/gcc-4_8-branch)

48873

@@ -159,6 +159,8 @@

48874

extern bool sh_cfun_trap_exit_p (void);

48875

extern rtx sh_find_equiv_gbr_addr (rtx cur_insn, rtx mem);

48876

extern int sh_eval_treg_value (rtx op);

48877

+extern HOST_WIDE_INT sh_disp_addr_displacement (rtx mem_op);

48878

+extern int sh_max_mov_insn_displacement (machine_mode mode, bool consider_sh2a);

48879

48880

/* Result value of sh_find_set_of_reg. */

48881

struct set_of_reg

48882

Index: gcc/config/sh/sh.c

48883

===================================================================

48884

--- a/src/gcc/config/sh/sh.c (.../tags/gcc_4_8_2_release)

48885

+++ b/src/gcc/config/sh/sh.c (.../branches/gcc-4_8-branch)

48886

@@ -310,9 +310,7 @@

48887

static void sh_conditional_register_usage (void);

48888

static bool sh_legitimate_constant_p (enum machine_mode, rtx);

48889

static int mov_insn_size (enum machine_mode, bool);

48890

-static int max_mov_insn_displacement (enum machine_mode, bool);

48891

static int mov_insn_alignment_mask (enum machine_mode, bool);

48892

-static HOST_WIDE_INT disp_addr_displacement (rtx);

48893

static bool sequence_insn_p (rtx);

48894

static void sh_canonicalize_comparison (int *, rtx *, rtx *, bool);

48895

static void sh_canonicalize_comparison (enum rtx_code&, rtx&, rtx&,

48896

@@ -3628,8 +3626,8 @@

48897

48898

/* Determine the maximum possible displacement for a move insn for the

48899

specified mode. */

48900

-static int

48901

-max_mov_insn_displacement (enum machine_mode mode, bool consider_sh2a)

48902

+int

48903

+sh_max_mov_insn_displacement (machine_mode mode, bool consider_sh2a)

48904

{

48905

/* The 4 byte displacement move insns are the same as the 2 byte

48906

versions but take a 12 bit displacement. All we need to do is to

48907

@@ -3665,8 +3663,8 @@

48908

}

48909

48910

/* Return the displacement value of a displacement address. */

48911

-static inline HOST_WIDE_INT

48912

-disp_addr_displacement (rtx x)

48913

+HOST_WIDE_INT

48914

+sh_disp_addr_displacement (rtx x)

48915

{

48916

gcc_assert (satisfies_constraint_Sdd (x));

48917

return INTVAL (XEXP (XEXP (x, 0), 1));

48918

@@ -3703,12 +3701,12 @@

48919

HImode and QImode loads/stores with displacement put pressure on

48920

R0 which will most likely require another reg copy. Thus account

48921

a higher cost for that. */

48922

- if (offset > 0 && offset <= max_mov_insn_displacement (mode, false))

48923

+ if (offset > 0 && offset <= sh_max_mov_insn_displacement (mode, false))

48924

return (mode == HImode || mode == QImode) ? 2 : 1;

48925

48926

/* The displacement would fit into a 4 byte move insn (SH2A). */

48927

if (TARGET_SH2A

48928

- && offset > 0 && offset <= max_mov_insn_displacement (mode, true))

48929

+ && offset > 0 && offset <= sh_max_mov_insn_displacement (mode, true))

48930

return 2;

48931

48932

/* The displacement is probably out of range and will require extra

48933

@@ -10218,7 +10216,7 @@

48934

else

48935

{

48936

const HOST_WIDE_INT offset = INTVAL (op);

48937

- const int max_disp = max_mov_insn_displacement (mode, consider_sh2a);

48938

+ const int max_disp = sh_max_mov_insn_displacement (mode, consider_sh2a);

48939

const int align_mask = mov_insn_alignment_mask (mode, consider_sh2a);

48940

48941

/* If the mode does not support any displacement always return false.

48942

@@ -10404,7 +10402,7 @@

48943

effectively disable the small displacement insns. */

48944

const int mode_sz = GET_MODE_SIZE (mode);

48945

const int mov_insn_sz = mov_insn_size (mode, false);

48946

- const int max_disp = max_mov_insn_displacement (mode, false);

48947

+ const int max_disp = sh_max_mov_insn_displacement (mode, false);

48948

const int max_disp_next = max_disp + mov_insn_sz;

48949

HOST_WIDE_INT align_modifier = offset > 127 ? mov_insn_sz : 0;

48950

HOST_WIDE_INT offset_adjust;

48951

@@ -13165,7 +13163,8 @@

48952

the insns must have the appropriate alternatives. */

48953

if ((mode == QImode || mode == HImode) && rclass != R0_REGS

48954

&& satisfies_constraint_Sdd (x)

48955

- && disp_addr_displacement (x) <= max_mov_insn_displacement (mode, false))

48956

+ && sh_disp_addr_displacement (x)

48957

+ <= sh_max_mov_insn_displacement (mode, false))

48958

return R0_REGS;

48959

48960

/* When reload is trying to address a QImode or HImode subreg on the stack,

48961

Index: gcc/config/sh/constraints.md

48962

===================================================================

48963

--- a/src/gcc/config/sh/constraints.md (.../tags/gcc_4_8_2_release)

48964

+++ b/src/gcc/config/sh/constraints.md (.../branches/gcc-4_8-branch)

48965

@@ -221,6 +221,7 @@

48966

(define_constraint "Q"

48967

"A pc relative load operand."

48968

(and (match_code "mem")

48969

+ (match_test "GET_MODE (op) != QImode")

48970

(match_test "IS_PC_RELATIVE_LOAD_ADDR_P (XEXP (op, 0))")))

48971

48972

(define_constraint "Bsc"

48973

@@ -295,13 +296,15 @@

48974

48975

(define_memory_constraint "Sdd"

48976

"A memory reference that uses displacement addressing."

48977

- (and (match_test "MEM_P (op) && GET_CODE (XEXP (op, 0)) == PLUS")

48978

+ (and (match_code "mem")

48979

+ (match_test "GET_CODE (XEXP (op, 0)) == PLUS")

48980

(match_test "REG_P (XEXP (XEXP (op, 0), 0))")

48981

(match_test "CONST_INT_P (XEXP (XEXP (op, 0), 1))")))

48982

48983

(define_memory_constraint "Snd"

48984

"A memory reference that excludes displacement addressing."

48985

- (match_test "! satisfies_constraint_Sdd (op)"))

48986

+ (and (match_code "mem")

48987

+ (match_test "! satisfies_constraint_Sdd (op)")))

48988

48989

(define_memory_constraint "Sbv"

48990

"A memory reference, as used in SH2A bclr.b, bset.b, etc."

48991

Index: gcc/config/sh/sh.md

48992

===================================================================

48993

--- a/src/gcc/config/sh/sh.md (.../tags/gcc_4_8_2_release)

48994

+++ b/src/gcc/config/sh/sh.md (.../branches/gcc-4_8-branch)

48995

@@ -2152,6 +2152,7 @@

48996

(udiv:SI (reg:SI R4_REG) (reg:SI R5_REG)))

48997

(clobber (reg:SI T_REG))

48998

(clobber (reg:SI PR_REG))

48999

+ (clobber (reg:SI R1_REG))

49000

(clobber (reg:SI R4_REG))

49001

(use (match_operand:SI 1 "arith_reg_operand" "r"))]

49002

"TARGET_SH1 && TARGET_DIVIDE_CALL_DIV1"

49003

@@ -6831,34 +6832,9 @@

49004

prepare_move_operands (operands, QImode);

49005

})

49006

49007

-;; If movqi_reg_reg is specified as an alternative of movqi, movqi will be

49008

-;; selected to copy QImode regs. If one of them happens to be allocated

49009

-;; on the stack, reload will stick to movqi insn and generate wrong

49010

-;; displacement addressing because of the generic m alternatives.

49011

-;; With the movqi_reg_reg being specified before movqi it will be initially

49012

-;; picked to load/store regs. If the regs regs are on the stack reload

49013

-;; try other insns and not stick to movqi_reg_reg, unless there were spilled

49014

-;; pseudos in which case 'm' constraints pertain.

49015

-;; The same applies to the movhi variants.

49016

-;;

49017

-;; Notice, that T bit is not allowed as a mov src operand here. This is to

49018

-;; avoid things like (set (reg:QI) (subreg:QI (reg:SI T_REG) 0)), which

49019

-;; introduces zero extensions after T bit stores and redundant reg copies.

49020

-;;

49021

-;; FIXME: We can't use 'arith_reg_operand' (which disallows T_REG) as a

49022

-;; predicate for the mov src operand because reload will have trouble

49023

-;; reloading MAC subregs otherwise. For that probably special patterns

49024

-;; would be required.

49025

-(define_insn "*mov<mode>_reg_reg"

49026

- [(set (match_operand:QIHI 0 "arith_reg_dest" "=r,m,*z")

49027

- (match_operand:QIHI 1 "register_operand" "r,*z,m"))]

49028

- "TARGET_SH1 && !t_reg_operand (operands[1], VOIDmode)"

49029

- "@

49030

- mov %1,%0

49031

- mov.<bw> %1,%0

49032

- mov.<bw> %1,%0"

49033

- [(set_attr "type" "move,store,load")])

49034

-

49035

+;; Specifying the displacement addressing load / store patterns separately

49036

+;; before the generic movqi / movhi pattern allows controlling the order

49037

+;; in which load / store insns are selected in a more fine grained way.

49038

;; FIXME: The non-SH2A and SH2A variants should be combined by adding

49039

;; "enabled" attribute as it is done in other targets.

49040

(define_insn "*mov<mode>_store_mem_disp04"

49041

@@ -6908,38 +6884,44 @@

49042

[(set_attr "type" "load")

49043

(set_attr "length" "2,2,4")])

49044

49045

-;; The m constraints basically allow any kind of addresses to be used with any

49046

-;; source/target register as the other operand. This is not true for

49047

-;; displacement addressing modes on anything but SH2A. That's why the

49048

-;; specialized load/store insns are specified above.

49049

-(define_insn "*movqi"

49050

- [(set (match_operand:QI 0 "general_movdst_operand" "=r,r,m,r,l")

49051

- (match_operand:QI 1 "general_movsrc_operand" "i,m,r,l,r"))]

49052

+;; The order of the constraint alternatives is important here.

49053

+;; Q/r has to come first, otherwise PC relative loads might wrongly get

49054

+;; placed into delay slots. Since there is no QImode PC relative load, the

49055

+;; Q constraint and general_movsrc_operand will reject it for QImode.

49056

+;; The Snd alternatives should come before Sdd in order to avoid a preference

49057

+;; of using r0 als the register operand for addressing modes other than

49058

+;; displacement addressing.

49059

+;; The Sdd alternatives allow only r0 as register operand, even though on

49060

+;; SH2A any register could be allowed by switching to a 32 bit insn.

49061

+;; Generally sticking to the r0 is preferrable, since it generates smaller

49062

+;; code. Obvious r0 reloads can then be eliminated with a peephole on SH2A.

49063

+(define_insn "*mov<mode>"

49064

+ [(set (match_operand:QIHI 0 "general_movdst_operand"

49065

+ "=r,r,r,Snd,r, Sdd,z, r,l")

49066

+ (match_operand:QIHI 1 "general_movsrc_operand"

49067

+ "Q,r,i,r, Snd,z, Sdd,l,r"))]

49068

"TARGET_SH1

49069

- && (arith_reg_operand (operands[0], QImode)

49070

- || arith_reg_operand (operands[1], QImode))"

49071

+ && (arith_reg_operand (operands[0], <MODE>mode)

49072

+ || arith_reg_operand (operands[1], <MODE>mode))"

49073

"@

49074

+ mov.<bw> %1,%0

49075

mov %1,%0

49076

- mov.b %1,%0

49077

- mov.b %1,%0

49078

- sts %1,%0

49079

- lds %1,%0"

49080

- [(set_attr "type" "movi8,load,store,prget,prset")])

49081

-

49082

-(define_insn "*movhi"

49083

- [(set (match_operand:HI 0 "general_movdst_operand" "=r,r,r,m,r,l")

49084

- (match_operand:HI 1 "general_movsrc_operand" "Q,i,m,r,l,r"))]

49085

- "TARGET_SH1

49086

- && (arith_reg_operand (operands[0], HImode)

49087

- || arith_reg_operand (operands[1], HImode))"

49088

- "@

49089

- mov.w %1,%0

49090

mov %1,%0

49091

- mov.w %1,%0

49092

- mov.w %1,%0

49093

+ mov.<bw> %1,%0

49094

+ mov.<bw> %1,%0

49095

+ mov.<bw> %1,%0

49096

+ mov.<bw> %1,%0

49097

sts %1,%0

49098

lds %1,%0"

49099

- [(set_attr "type" "pcload,movi8,load,store,prget,prset")])

49100

+ [(set_attr "type" "pcload,move,movi8,store,load,store,load,prget,prset")

49101

+ (set (attr "length")

49102

+ (cond [(and (match_operand 0 "displacement_mem_operand")

49103

+ (not (match_operand 0 "short_displacement_mem_operand")))

49104

+ (const_int 4)

49105

+ (and (match_operand 1 "displacement_mem_operand")

49106

+ (not (match_operand 1 "short_displacement_mem_operand")))

49107

+ (const_int 4)]

49108

+ (const_int 2)))])

49109

49110

(define_insn "*movqi_media"

49111

[(set (match_operand:QI 0 "general_movdst_operand" "=r,r,r,m")

49112

@@ -8427,11 +8409,9 @@

49113

49114

while (true)

49115

{

49116

- /* It's not safe to go beyond the current basic block after reload. */

49117

set_of_reg s1 = sh_find_set_of_reg (tested_reg, s0.insn,

49118

- reload_completed

49119

- ? prev_nonnote_insn_bb

49120

- : prev_nonnote_insn);

49121

+ prev_nonnote_insn);

49122

+

49123

if (s1.set_src == NULL_RTX)

49124

break;

49125

49126

@@ -8449,15 +8429,25 @@

49127

continue;

49128

}

49129

49130

- /* It's only safe to remove the testing insn if the T bit is not

49131

- modified between the testing insn and the insn that stores the

49132

- T bit. Notice that some T bit stores such as negc also modify

49133

- the T bit. */

49134

- if (modified_between_p (get_t_reg_rtx (), s1.insn, testing_insn)

49135

- || modified_in_p (get_t_reg_rtx (), s1.insn))

49136

- operands[2] = NULL_RTX;

49137

+ /* It's only safe to remove the testing insn if the T bit is not

49138

+ modified between the testing insn and the insn that stores the

49139

+ T bit. Notice that some T bit stores such as negc also modify

49140

+ the T bit. */

49141

+ if (modified_between_p (get_t_reg_rtx (), s1.insn, testing_insn)

49142

+ || modified_in_p (get_t_reg_rtx (), s1.insn)

49143

+ || !no_labels_between_p (s1.insn, testing_insn))

49144

+ operands[2] = NULL_RTX;

49145

+ else

49146

+ {

49147

+ /* If the insn that sets the tested reg has a REG_DEAD note on

49148

+ the T bit remove that note since we're extending the usage

49149

+ of the T bit. */

49150

+ rtx n = find_regno_note (s1.insn, REG_DEAD, T_REG);

49151

+ if (n != NULL_RTX)

49152

+ remove_note (s1.insn, n);

49153

+ }

49154

49155

- break;

49156

+ break;

49157

}

49158

49159

if (operands[2] == NULL_RTX)

49160

Index: gcc/config/sh/sh.opt

49161

===================================================================

49162

--- a/src/gcc/config/sh/sh.opt (.../tags/gcc_4_8_2_release)

49163

+++ b/src/gcc/config/sh/sh.opt (.../branches/gcc-4_8-branch)

49164

@@ -21,7 +21,7 @@

49165

;; Used for various architecture options.

49166

Mask(SH_E)

49167

49168

-;; Set if the default precision of th FPU is single.

49169

+;; Set if the default precision of the FPU is single.

49170

Mask(FPU_SINGLE)

49171

49172

;; Set if the a double-precision FPU is present but is restricted to

49173

Index: gcc/config/microblaze/predicates.md

49174

===================================================================

49175

--- a/src/gcc/config/microblaze/predicates.md (.../tags/gcc_4_8_2_release)

49176

+++ b/src/gcc/config/microblaze/predicates.md (.../branches/gcc-4_8-branch)

49177

@@ -85,6 +85,10 @@

49178

(ior (match_operand 0 "const_0_operand")

49179

(match_operand 0 "register_operand")))

49180

49181

+(define_predicate "reg_or_mem_operand"

49182

+ (ior (match_operand 0 "memory_operand")

49183

+ (match_operand 0 "register_operand")))

49184

+

49185

;; Return if the operand is either the PC or a label_ref.

49186

(define_special_predicate "pc_or_label_operand"

49187

(ior (match_code "pc,label_ref")

49188

@@ -119,3 +123,7 @@

49189

;; Test for valid PIC call operand

49190

(define_predicate "call_insn_plt_operand"

49191

(match_test "PLT_ADDR_P (op)"))

49192

+

49193

+;; Return if the code of this rtx pattern is a comparison.

49194

+(define_predicate "cmp_op"

49195

+ (match_code "gt,ge,gtu,geu,lt,le,ltu,leu"))

49196

Index: gcc/config/microblaze/microblaze.md

49197

===================================================================

49198

--- a/src/gcc/config/microblaze/microblaze.md (.../tags/gcc_4_8_2_release)

49199

+++ b/src/gcc/config/microblaze/microblaze.md (.../branches/gcc-4_8-branch)

49200

@@ -74,7 +74,7 @@

49201

;; bshift Shift operations

49202

49203

(define_attr "type"

49204

- "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt"

49205

+ "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap"

49206

(const_string "unknown"))

49207

49208

;; Main data type used by the insn

49209

@@ -365,7 +365,8 @@

49210

[(set (match_operand:HI 0 "register_operand" "=r")

49211

(bswap:HI (match_operand:HI 1 "register_operand" "r")))]

49212

"TARGET_REORDER"

49213

- "swaph %0, %1"

49214

+ "swapb %0, %1

49215

+ swaph %0, %0"

49216

)

49217

49218

;;----------------------------------------------------------------

49219

@@ -1118,6 +1119,18 @@

49220

}

49221

)

49222

49223

+;;Load and store reverse

49224

+(define_insn "movsi4_rev"

49225

+ [(set (match_operand:SI 0 "reg_or_mem_operand" "=r,Q")

49226

+ (bswap:SI (match_operand:SF 1 "reg_or_mem_operand" "Q,r")))]

49227

+ "TARGET_REORDER"

49228

+ "@

49229

+ lwr\t%0,%y1,r0

49230

+ swr\t%1,%y0,r0"

49231

+ [(set_attr "type" "load,store")

49232

+ (set_attr "mode" "SI")

49233

+ (set_attr "length" "4,4")])

49234

+

49235

;; 32-bit floating point moves

49236

49237

(define_expand "movsf"

49238

@@ -1472,7 +1485,7 @@

49239

(set_attr "length" "124")]

49240

)

49241

49242

-(define_insn "*ashlri_reg"

49243

+(define_insn "*ashrsi_reg"

49244

[(set (match_operand:SI 0 "register_operand" "=&d")

49245

(ashiftrt:SI (match_operand:SI 1 "register_operand" "d")

49246

(match_operand:SI 2 "register_operand" "d")))]

49247

@@ -1561,7 +1574,7 @@

49248

(set_attr "length" "124")]

49249

)

49250

49251

-(define_insn "*lshlri_reg"

49252

+(define_insn "*lshrsi_reg"

49253

[(set (match_operand:SI 0 "register_operand" "=&d")

49254

(lshiftrt:SI (match_operand:SI 1 "register_operand" "d")

49255

(match_operand:SI 2 "register_operand" "d")))]

49256

@@ -1622,34 +1635,12 @@

49257

(set_attr "length" "4")]

49258

)

49259

49260

-(define_insn "signed_compare"

49261

- [(set (match_operand:SI 0 "register_operand" "=d")

49262

- (unspec

49263

- [(match_operand:SI 1 "register_operand" "d")

49264

- (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMP))]

49265

- ""

49266

- "cmp\t%0,%1,%2"

49267

- [(set_attr "type" "arith")

49268

- (set_attr "mode" "SI")

49269

- (set_attr "length" "4")])

49270

-

49271

-(define_insn "unsigned_compare"

49272

- [(set (match_operand:SI 0 "register_operand" "=d")

49273

- (unspec

49274

- [(match_operand:SI 1 "register_operand" "d")

49275

- (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMPU))]

49276

- ""

49277

- "cmpu\t%0,%1,%2"

49278

- [(set_attr "type" "arith")

49279

- (set_attr "mode" "SI")

49280

- (set_attr "length" "4")])

49281

-

49282

;;----------------------------------------------------------------

49283

;; Setting a register from an floating point comparison.

49284

;;----------------------------------------------------------------

49285

(define_insn "cstoresf4"

49286

[(set (match_operand:SI 0 "register_operand" "=r")

49287

- (match_operator 1 "comparison_operator"

49288

+ (match_operator:SI 1 "ordered_comparison_operator"

49289

[(match_operand:SF 2 "register_operand" "r")

49290

(match_operand:SF 3 "register_operand" "r")]))]

49291

"TARGET_HARD_FLOAT"

49292

@@ -1678,7 +1669,7 @@

49293

49294

(define_expand "cbranchsf4"

49295

[(set (pc)

49296

- (if_then_else (match_operator 0 "comparison_operator"

49297

+ (if_then_else (match_operator 0 "ordered_comparison_operator"

49298

[(match_operand:SF 1 "register_operand")

49299

(match_operand:SF 2 "register_operand")])

49300

(label_ref (match_operand 3 ""))

49301

@@ -1717,6 +1708,47 @@

49302

(set_attr "length" "4")]

49303

)

49304

49305

+(define_insn "branch_compare"

49306

+ [(set (pc)

49307

+ (if_then_else (match_operator:SI 0 "cmp_op"

49308

+ [(match_operand:SI 1 "register_operand" "d")

49309

+ (match_operand:SI 2 "register_operand" "d")

49310

+ ])

49311

+ (label_ref (match_operand 3))

49312

+ (pc)))

49313

+ (clobber(reg:SI R_TMP))]

49314

+ ""

49315

+ {

49316

+ operands[4] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);

49317

+ enum rtx_code code = GET_CODE (operands[0]);

49318

+

49319

+ if (code == GT || code == LE)

49320

+ {

49321

+ output_asm_insn ("cmp\tr18,%z1,%z2", operands);

49322

+ code = swap_condition (code);

49323

+ }

49324

+ else if (code == GTU || code == LEU)

49325

+ {

49326

+ output_asm_insn ("cmpu\tr18,%z1,%z2", operands);

49327

+ code = swap_condition (code);

49328

+ }

49329

+ else if (code == GE || code == LT)

49330

+ {

49331

+ output_asm_insn ("cmp\tr18,%z2,%z1", operands);

49332

+ }

49333

+ else if (code == GEU || code == LTU)

49334

+ {

49335

+ output_asm_insn ("cmpu\tr18,%z2,%z1", operands);

49336

+ }

49337

+

49338

+ operands[0] = gen_rtx_fmt_ee (signed_condition (code), SImode, operands[4], const0_rtx);

49339

+ return "b%C0i%?\tr18,%3";

49340

+ }

49341

+ [(set_attr "type" "branch")

49342

+ (set_attr "mode" "none")

49343

+ (set_attr "length" "12")]

49344

+)

49345

+

49346

;;----------------------------------------------------------------

49347

;; Unconditional branches

49348

;;----------------------------------------------------------------

49349

@@ -2201,6 +2233,14 @@

49350

(set_attr "mode" "none")

49351

(set_attr "length" "4")])

49352

49353

+;; Trap instruction pattern for __builtin_trap. Same as the glibc ABORT_INSTRUCTION

49354

+(define_insn "trap"

49355

+ [(trap_if (const_int 1) (const_int 0))]

49356

+ ""

49357

+ "brki\tr0,-1"

49358

+ [(set_attr "type" "trap")]

49359

+)

49360

+

49361

;; The insn to set GOT. The hardcoded number "8" accounts for $pc difference

49362

;; between "mfs" and "addik" instructions.

49363

(define_insn "set_got"

49364

Index: gcc/config/microblaze/microblaze.c

49365

===================================================================

49366

--- a/src/gcc/config/microblaze/microblaze.c (.../tags/gcc_4_8_2_release)

49367

+++ b/src/gcc/config/microblaze/microblaze.c (.../branches/gcc-4_8-branch)

49368

@@ -1609,21 +1609,28 @@

49369

microblaze_version_to_int (const char *version)

49370

{

49371

const char *p, *v;

49372

- const char *tmpl = "vX.YY.Z";

49373

+ const char *tmpl = "vXX.YY.Z";

49374

int iver = 0;

49375

49376

p = version;

49377

v = tmpl;

49378

49379

- while (*v)

49380

+ while (*p)

49381

{

49382

if (*v == 'X')

49383

{ /* Looking for major */

49384

- if (!(*p >= '0' && *p <= '9'))

49385

- return -1;

49386

- iver += (int) (*p - '0');

49387

- iver *= 10;

49388

- }

49389

+ if (*p == '.')

49390

+ {

49391

+ *v++;

49392

+ }

49393

+ else

49394

+ {

49395

+ if (!(*p >= '0' && *p <= '9'))

49396

+ return -1;

49397

+ iver += (int) (*p - '0');

49398

+ iver *= 10;

49399

+ }

49400

+ }

49401

else if (*v == 'Y')

49402

{ /* Looking for minor */

49403

if (!(*p >= '0' && *p <= '9'))

49404

@@ -3064,6 +3071,73 @@

49405

return result;

49406

}

49407

49408

+static void

49409

+microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,

49410

+ HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,

49411

+ tree function)

49412

+{

49413

+ rtx this_rtx, insn, funexp;

49414

+

49415

+ reload_completed = 1;

49416

+ epilogue_completed = 1;

49417

+

49418

+ /* Mark the end of the (empty) prologue. */

49419

+ emit_note (NOTE_INSN_PROLOGUE_END);

49420

+

49421

+ /* Find the "this" pointer. If the function returns a structure,

49422

+ the structure return pointer is in MB_ABI_FIRST_ARG_REGNUM. */

49423

+ if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))

49424

+ this_rtx = gen_rtx_REG (Pmode, (MB_ABI_FIRST_ARG_REGNUM + 1));

49425

+ else

49426

+ this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM);

49427

+

49428

+ /* Apply the constant offset, if required. */

49429

+ if (delta)

49430

+ emit_insn (gen_addsi3 (this_rtx, this_rtx, GEN_INT (delta)));

49431

+

49432

+ /* Apply the offset from the vtable, if required. */

49433

+ if (vcall_offset)

49434

+ {

49435

+ rtx vcall_offset_rtx = GEN_INT (vcall_offset);

49436

+ rtx temp1 = gen_rtx_REG (Pmode, MB_ABI_TEMP1_REGNUM);

49437

+

49438

+ emit_move_insn (temp1, gen_rtx_MEM (Pmode, this_rtx));

49439

+

49440

+ rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx);

49441

+ emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc));

49442

+

49443

+ emit_insn (gen_addsi3 (this_rtx, this_rtx, temp1));

49444

+ }

49445

+

49446

+ /* Generate a tail call to the target function. */

49447

+ if (!TREE_USED (function))

49448

+ {

49449

+ assemble_external (function);

49450

+ TREE_USED (function) = 1;

49451

+ }

49452

+

49453

+ funexp = XEXP (DECL_RTL (function), 0);

49454

+ rtx temp2 = gen_rtx_REG (Pmode, MB_ABI_TEMP2_REGNUM);

49455

+

49456

+ if (flag_pic)

49457

+ emit_move_insn (temp2, expand_pic_symbol_ref (Pmode, funexp));

49458

+ else

49459

+ emit_move_insn (temp2, funexp);

49460

+

49461

+ emit_insn (gen_indirect_jump (temp2));

49462

+

49463

+ /* Run just enough of rest_of_compilation. This sequence was

49464

+ "borrowed" from rs6000.c. */

49465

+ insn = get_insns ();

49466

+ shorten_branches (insn);

49467

+ final_start_function (insn, file, 1);

49468

+ final (insn, file, 1);

49469

+ final_end_function ();

49470

+

49471

+ reload_completed = 0;

49472

+ epilogue_completed = 0;

49473

+}

49474

+

49475

bool

49476

microblaze_expand_move (enum machine_mode mode, rtx operands[])

49477

{

49478

@@ -3234,67 +3308,47 @@

49479

emit_move_insn (mem, fnaddr);

49480

}

49481

49482

-/* Emit instruction to perform compare.

49483

- cmp is (compare_op op0 op1). */

49484

-static rtx

49485

-microblaze_emit_compare (enum machine_mode mode, rtx cmp, enum rtx_code *cmp_code)

49486

+/* Generate conditional branch -- first, generate test condition,

49487

+ second, generate correct branch instruction. */

49488

+

49489

+void

49490

+microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[])

49491

{

49492

- rtx cmp_op0 = XEXP (cmp, 0);

49493

- rtx cmp_op1 = XEXP (cmp, 1);

49494

+ enum rtx_code code = GET_CODE (operands[0]);

49495

+ rtx cmp_op0 = operands[1];

49496

+ rtx cmp_op1 = operands[2];

49497

+ rtx label1 = operands[3];

49498

rtx comp_reg = gen_reg_rtx (SImode);

49499

- enum rtx_code code = *cmp_code;

49500

-

49501

+ rtx condition;

49502

+

49503

gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG));

49504

49505

/* If comparing against zero, just test source reg. */

49506

- if (cmp_op1 == const0_rtx)

49507

- return cmp_op0;

49508

+ if (cmp_op1 == const0_rtx)

49509

+ {

49510

+ comp_reg = cmp_op0;

49511

+ condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx);

49512

+ emit_jump_insn (gen_condjump (condition, label1));

49513

+ }

49514

49515

- if (code == EQ || code == NE)

49516

+ else if (code == EQ || code == NE)

49517

{

49518

/* Use xor for equal/not-equal comparison. */

49519

emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));

49520

+ condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx);

49521

+ emit_jump_insn (gen_condjump (condition, label1));

49522

}

49523

- else if (code == GT || code == GTU || code == LE || code == LEU)

49524

+ else

49525

{

49526

- /* MicroBlaze compare is not symmetrical. */

49527

- /* Swap argument order. */

49528

+ /* Generate compare and branch in single instruction. */

49529

cmp_op1 = force_reg (mode, cmp_op1);

49530

- if (code == GT || code == LE)

49531

- emit_insn (gen_signed_compare (comp_reg, cmp_op0, cmp_op1));

49532

- else

49533

- emit_insn (gen_unsigned_compare (comp_reg, cmp_op0, cmp_op1));

49534

- /* Translate test condition. */

49535

- *cmp_code = swap_condition (code);

49536

+ condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1);

49537

+ emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1));

49538

}

49539

- else /* if (code == GE || code == GEU || code == LT || code == LTU) */

49540

- {

49541

- cmp_op1 = force_reg (mode, cmp_op1);

49542

- if (code == GE || code == LT)

49543

- emit_insn (gen_signed_compare (comp_reg, cmp_op1, cmp_op0));

49544

- else

49545

- emit_insn (gen_unsigned_compare (comp_reg, cmp_op1, cmp_op0));

49546

- }

49547

-

49548

- return comp_reg;

49549

}

49550

49551

-/* Generate conditional branch -- first, generate test condition,

49552

- second, generate correct branch instruction. */

49553

49554

void

49555

-microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[])

49556

-{

49557

- enum rtx_code code = GET_CODE (operands[0]);

49558

- rtx comp;

49559

- rtx condition;

49560

-

49561

- comp = microblaze_emit_compare (mode, operands[0], &code);

49562

- condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp, const0_rtx);

49563

- emit_jump_insn (gen_condjump (condition, operands[3]));

49564

-}

49565

-

49566

-void

49567

microblaze_expand_conditional_branch_sf (rtx operands[])

49568

{

49569

rtx condition;

49570

@@ -3501,6 +3555,12 @@

49571

#undef TARGET_SECONDARY_RELOAD

49572

#define TARGET_SECONDARY_RELOAD microblaze_secondary_reload

49573

49574

+#undef TARGET_ASM_OUTPUT_MI_THUNK

49575

+#define TARGET_ASM_OUTPUT_MI_THUNK microblaze_asm_output_mi_thunk

49576

+

49577

+#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK

49578

+#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true

49579

+

49580

#undef TARGET_SCHED_ADJUST_COST

49581

#define TARGET_SCHED_ADJUST_COST microblaze_adjust_cost

49582

49583

Index: gcc/config/microblaze/microblaze.h

49584

===================================================================

49585

--- a/src/gcc/config/microblaze/microblaze.h (.../tags/gcc_4_8_2_release)

49586

+++ b/src/gcc/config/microblaze/microblaze.h (.../branches/gcc-4_8-branch)

49587

@@ -213,6 +213,12 @@

49588

#define STRICT_ALIGNMENT 1

49589

#define PCC_BITFIELD_TYPE_MATTERS 1

49590

49591

+#undef SIZE_TYPE

49592

+#define SIZE_TYPE "unsigned int"

49593

+

49594

+#undef PTRDIFF_TYPE

49595

+#define PTRDIFF_TYPE "int"

49596

+

49597

#define CONSTANT_ALIGNMENT(EXP, ALIGN) \

49598

((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \

49599

&& (ALIGN) < BITS_PER_WORD \

49600

@@ -407,9 +413,6 @@

49601

|| GET_MODE (X) == VOIDmode) \

49602

? (GR_REGS) : (CLASS))))

49603

49604

-#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \

49605

- (GET_MODE_CLASS (MODE) == MODE_INT)

49606

-

49607

/* Stack layout; function entry, exit and calling. */

49608

49609

#define STACK_GROWS_DOWNWARD

49610

Index: gcc/config/avr/avr.c

49611

===================================================================

49612

--- a/src/gcc/config/avr/avr.c (.../tags/gcc_4_8_2_release)

49613

+++ b/src/gcc/config/avr/avr.c (.../branches/gcc-4_8-branch)

49614

@@ -587,10 +587,14 @@

49615

const char *name;

49616

49617

name = DECL_ASSEMBLER_NAME_SET_P (decl)

49618

- /* Remove the leading '*' added in set_user_assembler_name. */

49619

- ? 1 + IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))

49620

+ ? IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))

49621

: IDENTIFIER_POINTER (DECL_NAME (decl));

49622

49623

+ /* Skip a leading '*' that might still prefix the assembler name,

49624

+ e.g. in non-LTO runs. */

49625

+

49626

+ name = default_strip_name_encoding (name);

49627

+

49628

/* Silently ignore 'signal' if 'interrupt' is present. AVR-LibC startet

49629

using this when it switched from SIGNAL and INTERRUPT to ISR. */

49630

49631

@@ -6806,8 +6810,8 @@

49632

49633

/* Work out the shortest sequence. */

49634

49635

- avr_out_plus_1 (op, &len_minus, MINUS, &cc_plus, code_sat, sign, out_label);

49636

- avr_out_plus_1 (op, &len_plus, PLUS, &cc_minus, code_sat, sign, out_label);

49637

+ avr_out_plus_1 (op, &len_minus, MINUS, &cc_minus, code_sat, sign, out_label);

49638

+ avr_out_plus_1 (op, &len_plus, PLUS, &cc_plus, code_sat, sign, out_label);

49639

49640

if (plen)

49641

{

49642

Index: gcc/config/cris/cris.md

49643

===================================================================

49644

--- a/src/gcc/config/cris/cris.md (.../tags/gcc_4_8_2_release)

49645

+++ b/src/gcc/config/cris/cris.md (.../branches/gcc-4_8-branch)

49646

@@ -758,7 +758,7 @@

49647

(match_operand:SI 1 "const_int_operand" ""))

49648

(match_operand:SI 2 "register_operand" ""))])

49649

(match_operand 3 "register_operand" ""))

49650

- (set (match_operand:SI 4 "register_operand" "")

49651

+ (set (match_operand:SI 4 "cris_nonsp_register_operand" "")

49652

(plus:SI (mult:SI (match_dup 0)

49653

(match_dup 1))

49654

(match_dup 2)))])]

49655

@@ -859,7 +859,7 @@

49656

(match_operand:SI 0 "cris_bdap_operand" "")

49657

(match_operand:SI 1 "cris_bdap_operand" ""))])

49658

(match_operand 2 "register_operand" ""))

49659

- (set (match_operand:SI 3 "register_operand" "")

49660

+ (set (match_operand:SI 3 "cris_nonsp_register_operand" "")

49661

(plus:SI (match_dup 0) (match_dup 1)))])]

49662

"reload_completed && reg_overlap_mentioned_p (operands[3], operands[2])"

49663

[(set (match_dup 4) (match_dup 2))

49664

@@ -3960,7 +3960,7 @@

49665

;; up.

49666

49667

(define_split

49668

- [(set (match_operand 0 "register_operand" "")

49669

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49670

(match_operator

49671

4 "cris_operand_extend_operator"

49672

[(match_operand 1 "register_operand" "")

49673

@@ -3990,7 +3990,7 @@

49674

;; Call this op-extend-split-rx=rz

49675

49676

(define_split

49677

- [(set (match_operand 0 "register_operand" "")

49678

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49679

(match_operator

49680

4 "cris_plus_or_bound_operator"

49681

[(match_operand 1 "register_operand" "")

49682

@@ -4018,7 +4018,7 @@

49683

;; Call this op-extend-split-swapped

49684

49685

(define_split

49686

- [(set (match_operand 0 "register_operand" "")

49687

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49688

(match_operator

49689

4 "cris_plus_or_bound_operator"

49690

[(match_operator

49691

@@ -4044,7 +4044,7 @@

49692

;; bound. Call this op-extend-split-swapped-rx=rz.

49693

49694

(define_split

49695

- [(set (match_operand 0 "register_operand" "")

49696

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49697

(match_operator

49698

4 "cris_plus_or_bound_operator"

49699

[(match_operator

49700

@@ -4075,7 +4075,7 @@

49701

;; Call this op-extend.

49702

49703

(define_split

49704

- [(set (match_operand 0 "register_operand" "")

49705

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49706

(match_operator

49707

3 "cris_orthogonal_operator"

49708

[(match_operand 1 "register_operand" "")

49709

@@ -4099,7 +4099,7 @@

49710

;; Call this op-split-rx=rz

49711

49712

(define_split

49713

- [(set (match_operand 0 "register_operand" "")

49714

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49715

(match_operator

49716

3 "cris_commutative_orth_op"

49717

[(match_operand 2 "memory_operand" "")

49718

@@ -4123,7 +4123,7 @@

49719

;; Call this op-split-swapped.

49720

49721

(define_split

49722

- [(set (match_operand 0 "register_operand" "")

49723

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49724

(match_operator

49725

3 "cris_commutative_orth_op"

49726

[(match_operand 1 "register_operand" "")

49727

@@ -4146,7 +4146,7 @@

49728

;; Call this op-split-swapped-rx=rz.

49729

49730

(define_split

49731

- [(set (match_operand 0 "register_operand" "")

49732

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49733

(match_operator

49734

3 "cris_orthogonal_operator"

49735

[(match_operand 2 "memory_operand" "")

49736

@@ -4555,10 +4555,11 @@

49737

;; We're not allowed to generate copies of registers with different mode

49738

;; until after reload; copying pseudos upsets reload. CVS as of

49739

;; 2001-08-24, unwind-dw2-fde.c, _Unwind_Find_FDE ICE in

49740

-;; cselib_invalidate_regno.

49741

+;; cselib_invalidate_regno. Also, don't do this for the stack-pointer,

49742

+;; as we don't want it set temporarily to an invalid value.

49743

49744

(define_split ; indir_to_reg_split

49745

- [(set (match_operand 0 "register_operand" "")

49746

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49747

(match_operand 1 "indirect_operand" ""))]

49748

"reload_completed

49749

&& REG_P (operands[0])

49750

@@ -4574,7 +4575,7 @@

49751

;; As the above, but MOVS and MOVU.

49752

49753

(define_split

49754

- [(set (match_operand 0 "register_operand" "")

49755

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

49756

(match_operator

49757

4 "cris_extend_operator"

49758

[(match_operand 1 "indirect_operand" "")]))]

49759

Index: gcc/config/cris/predicates.md

49760

===================================================================

49761

--- a/src/gcc/config/cris/predicates.md (.../tags/gcc_4_8_2_release)

49762

+++ b/src/gcc/config/cris/predicates.md (.../branches/gcc-4_8-branch)

49763

@@ -76,6 +76,10 @@

49764

(match_test "cris_simple_address_operand (XEXP (op, 0),

49765

Pmode)"))))

49766

49767

+(define_predicate "cris_nonsp_register_operand"

49768

+ (and (match_operand 0 "register_operand")

49769

+ (match_test "op != stack_pointer_rtx")))

49770

+

49771

;; The caller needs to use :SI.

49772

(define_predicate "cris_bdap_sign_extend_operand"

49773

; Disabled until <URL:http://gcc.gnu.org/ml/gcc-patches/2005-10/msg01376.html>

49774

Index: gcc/config/m68k/m68k.c

49775

===================================================================

49776

--- a/src/gcc/config/m68k/m68k.c (.../tags/gcc_4_8_2_release)

49777

+++ b/src/gcc/config/m68k/m68k.c (.../branches/gcc-4_8-branch)

49778

@@ -3325,12 +3325,12 @@

49779

latehalf[1] = adjust_address (operands[1], SImode, 0);

49780

}

49781

49782

- /* If insn is effectively movd N(sp),-(sp) then we will do the

49783

- high word first. We should use the adjusted operand 1 (which is N+4(sp))

49784

- for the low word as well, to compensate for the first decrement of sp. */

49785

+ /* If insn is effectively movd N(REG),-(REG) then we will do the high

49786

+ word first. We should use the adjusted operand 1 (which is N+4(REG))

49787

+ for the low word as well, to compensate for the first decrement of

49788

+ REG. */

49789

if (optype0 == PUSHOP

49790

- && REGNO (XEXP (XEXP (operands[0], 0), 0)) == STACK_POINTER_REGNUM

49791

- && reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))

49792

+ && reg_overlap_mentioned_p (XEXP (XEXP (operands[0], 0), 0), operands[1]))

49793

operands[1] = middlehalf[1] = latehalf[1];

49794

49795

/* For (set (reg:DI N) (mem:DI ... (reg:SI N) ...)),

49796

Index: gcc/config/aarch64/aarch64-simd.md

49797

===================================================================

49798

--- a/src/gcc/config/aarch64/aarch64-simd.md (.../tags/gcc_4_8_2_release)

49799

+++ b/src/gcc/config/aarch64/aarch64-simd.md (.../branches/gcc-4_8-branch)

49800

@@ -21,7 +21,7 @@

49801

49802

; Main data types used by the insntructions

49803

49804

-(define_attr "simd_mode" "unknown,none,V8QI,V16QI,V4HI,V8HI,V2SI,V4SI,V2DI,V2SF,V4SF,V2DF,OI,CI,XI,DI,DF,SI,HI,QI"

49805

+(define_attr "simd_mode" "unknown,none,V8QI,V16QI,V4HI,V8HI,V2SI,V4SI,V2DI,V2SF,V4SF,V2DF,OI,CI,XI,DI,DF,SI,SF,HI,QI"

49806

(const_string "unknown"))

49807

49808

49809

@@ -1548,12 +1548,12 @@

49810

49811

case LTU:

49812

case GEU:

49813

- emit_insn (gen_aarch64_cmhs<mode> (mask, operands[4], operands[5]));

49814

+ emit_insn (gen_aarch64_cmgeu<mode> (mask, operands[4], operands[5]));

49815

break;

49816

49817

case LEU:

49818

case GTU:

49819

- emit_insn (gen_aarch64_cmhi<mode> (mask, operands[4], operands[5]));

49820

+ emit_insn (gen_aarch64_cmgtu<mode> (mask, operands[4], operands[5]));

49821

break;

49822

49823

case NE:

49824

@@ -3034,48 +3034,181 @@

49825

)

49826

49827

49828

-;; cm(eq|ge|le|lt|gt)

49829

+;; cm(eq|ge|gt|lt|le)

49830

+;; Note, we have constraints for Dz and Z as different expanders

49831

+;; have different ideas of what should be passed to this pattern.

49832

49833

-(define_insn "aarch64_cm<cmp><mode>"

49834

+(define_insn "aarch64_cm<optab><mode>"

49835

[(set (match_operand:<V_cmp_result> 0 "register_operand" "=w,w")

49836

- (unspec:<V_cmp_result>

49837

- [(match_operand:VSDQ_I_DI 1 "register_operand" "w,w")

49838

- (match_operand:VSDQ_I_DI 2 "aarch64_simd_reg_or_zero" "w,Z")]

49839

- VCMP_S))]

49840

+ (neg:<V_cmp_result>

49841

+ (COMPARISONS:<V_cmp_result>

49842

+ (match_operand:VDQ 1 "register_operand" "w,w")

49843

+ (match_operand:VDQ 2 "aarch64_simd_reg_or_zero" "w,ZDz")

49844

+ )))]

49845

"TARGET_SIMD"

49846

"@

49847

- cm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>

49848

- cm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, #0"

49849

+ cm<n_optab>\t%<v>0<Vmtype>, %<v><cmp_1><Vmtype>, %<v><cmp_2><Vmtype>

49850

+ cm<optab>\t%<v>0<Vmtype>, %<v>1<Vmtype>, #0"

49851

[(set_attr "simd_type" "simd_cmp")

49852

(set_attr "simd_mode" "<MODE>")]

49853

)

49854

49855

-;; cm(hs|hi|tst)

49856

+(define_insn_and_split "aarch64_cm<optab>di"

49857

+ [(set (match_operand:DI 0 "register_operand" "=w,w,r")

49858

+ (neg:DI

49859

+ (COMPARISONS:DI

49860

+ (match_operand:DI 1 "register_operand" "w,w,r")

49861

+ (match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,ZDz,r")

49862

+ )))]

49863

+ "TARGET_SIMD"

49864

+ "@

49865

+ cm<n_optab>\t%d0, %d<cmp_1>, %d<cmp_2>

49866

+ cm<optab>\t%d0, %d1, #0

49867

+ #"

49868

+ "reload_completed

49869

+ /* We need to prevent the split from

49870

+ happening in the 'w' constraint cases. */

49871

+ && GP_REGNUM_P (REGNO (operands[0]))

49872

+ && GP_REGNUM_P (REGNO (operands[1]))"

49873

+ [(set (reg:CC CC_REGNUM)

49874

+ (compare:CC

49875

+ (match_dup 1)

49876

+ (match_dup 2)))

49877

+ (set (match_dup 0)

49878

+ (neg:DI

49879

+ (COMPARISONS:DI

49880

+ (match_operand 3 "cc_register" "")

49881

+ (const_int 0))))]

49882

+ {

49883

+ enum machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]);

49884

+ rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]);

49885

+ rtx comparison = gen_rtx_<CMP> (mode, operands[1], operands[2]);

49886

+ emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));

49887

+ DONE;

49888

+ }

49889

+ [(set_attr "simd_type" "simd_cmp")

49890

+ (set_attr "simd_mode" "DI")]

49891

+)

49892

49893

-(define_insn "aarch64_cm<cmp><mode>"

49894

+;; cm(hs|hi)

49895

+

49896

+(define_insn "aarch64_cm<optab><mode>"

49897

[(set (match_operand:<V_cmp_result> 0 "register_operand" "=w")

49898

- (unspec:<V_cmp_result>

49899

- [(match_operand:VSDQ_I_DI 1 "register_operand" "w")

49900

- (match_operand:VSDQ_I_DI 2 "register_operand" "w")]

49901

- VCMP_U))]

49902

+ (neg:<V_cmp_result>

49903

+ (UCOMPARISONS:<V_cmp_result>

49904

+ (match_operand:VDQ 1 "register_operand" "w")

49905

+ (match_operand:VDQ 2 "register_operand" "w")

49906

+ )))]

49907

"TARGET_SIMD"

49908

- "cm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"

49909

+ "cm<n_optab>\t%<v>0<Vmtype>, %<v><cmp_1><Vmtype>, %<v><cmp_2><Vmtype>"

49910

[(set_attr "simd_type" "simd_cmp")

49911

(set_attr "simd_mode" "<MODE>")]

49912

)

49913

49914

-;; fcm(eq|ge|le|lt|gt)

49915

+(define_insn_and_split "aarch64_cm<optab>di"

49916

+ [(set (match_operand:DI 0 "register_operand" "=w,r")

49917

+ (neg:DI

49918

+ (UCOMPARISONS:DI

49919

+ (match_operand:DI 1 "register_operand" "w,r")

49920

+ (match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,r")

49921

+ )))]

49922

+ "TARGET_SIMD"

49923

+ "@

49924

+ cm<n_optab>\t%d0, %d<cmp_1>, %d<cmp_2>

49925

+ #"

49926

+ "reload_completed

49927

+ /* We need to prevent the split from

49928

+ happening in the 'w' constraint cases. */

49929

+ && GP_REGNUM_P (REGNO (operands[0]))

49930

+ && GP_REGNUM_P (REGNO (operands[1]))"

49931

+ [(set (reg:CC CC_REGNUM)

49932

+ (compare:CC

49933

+ (match_dup 1)

49934

+ (match_dup 2)))

49935

+ (set (match_dup 0)

49936

+ (neg:DI

49937

+ (UCOMPARISONS:DI

49938

+ (match_operand 3 "cc_register" "")

49939

+ (const_int 0))))]

49940

+ {

49941

+ enum machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]);

49942

+ rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]);

49943

+ rtx comparison = gen_rtx_<CMP> (mode, operands[1], operands[2]);

49944

+ emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));

49945

+ DONE;

49946

+ }

49947

+ [(set_attr "simd_type" "simd_cmp")

49948

+ (set_attr "simd_mode" "DI")]

49949

+)

49950

49951

-(define_insn "aarch64_cm<cmp><mode>"

49952

+;; cmtst

49953

+

49954

+(define_insn "aarch64_cmtst<mode>"

49955

+ [(set (match_operand:<V_cmp_result> 0 "register_operand" "=w")

49956

+ (neg:<V_cmp_result>

49957

+ (ne:<V_cmp_result>

49958

+ (and:VDQ

49959

+ (match_operand:VDQ 1 "register_operand" "w")

49960

+ (match_operand:VDQ 2 "register_operand" "w"))

49961

+ (vec_duplicate:<V_cmp_result> (const_int 0)))))]

49962

+ "TARGET_SIMD"

49963

+ "cmtst\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"

49964

+ [(set_attr "simd_type" "simd_cmp")

49965

+ (set_attr "simd_mode" "<MODE>")]

49966

+)

49967

+

49968

+(define_insn_and_split "aarch64_cmtstdi"

49969

+ [(set (match_operand:DI 0 "register_operand" "=w,r")

49970

+ (neg:DI

49971

+ (ne:DI

49972

+ (and:DI

49973

+ (match_operand:DI 1 "register_operand" "w,r")

49974

+ (match_operand:DI 2 "register_operand" "w,r"))

49975

+ (const_int 0))))]

49976

+ "TARGET_SIMD"

49977

+ "@

49978

+ cmtst\t%d0, %d1, %d2

49979

+ #"

49980

+ "reload_completed

49981

+ /* We need to prevent the split from

49982

+ happening in the 'w' constraint cases. */

49983

+ && GP_REGNUM_P (REGNO (operands[0]))

49984

+ && GP_REGNUM_P (REGNO (operands[1]))"

49985

+ [(set (reg:CC_NZ CC_REGNUM)

49986

+ (compare:CC_NZ

49987

+ (and:DI (match_dup 1)

49988

+ (match_dup 2))

49989

+ (const_int 0)))

49990

+ (set (match_dup 0)

49991

+ (neg:DI

49992

+ (ne:DI

49993

+ (match_operand 3 "cc_register" "")

49994

+ (const_int 0))))]

49995

+ {

49996

+ rtx and_tree = gen_rtx_AND (DImode, operands[1], operands[2]);

49997

+ enum machine_mode mode = SELECT_CC_MODE (NE, and_tree, const0_rtx);

49998

+ rtx cc_reg = aarch64_gen_compare_reg (NE, and_tree, const0_rtx);

49999

+ rtx comparison = gen_rtx_NE (mode, and_tree, const0_rtx);

50000

+ emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));

50001

+ DONE;

50002

+ }

50003

+ [(set_attr "simd_type" "simd_cmp")

50004

+ (set_attr "simd_mode" "DI")]

50005

+)

50006

+

50007

+;; fcm(eq|ge|gt|le|lt)

50008

+

50009

+(define_insn "aarch64_cm<optab><mode>"

50010

[(set (match_operand:<V_cmp_result> 0 "register_operand" "=w,w")

50011

- (unspec:<V_cmp_result>

50012

- [(match_operand:VDQF 1 "register_operand" "w,w")

50013

- (match_operand:VDQF 2 "aarch64_simd_reg_or_zero" "w,Dz")]

50014

- VCMP_S))]

50015

+ (neg:<V_cmp_result>

50016

+ (COMPARISONS:<V_cmp_result>

50017

+ (match_operand:VALLF 1 "register_operand" "w,w")

50018

+ (match_operand:VALLF 2 "aarch64_simd_reg_or_zero" "w,YDz")

50019

+ )))]

50020

"TARGET_SIMD"

50021

"@

50022

- fcm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>

50023

- fcm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, 0"

50024

+ fcm<n_optab>\t%<v>0<Vmtype>, %<v><cmp_1><Vmtype>, %<v><cmp_2><Vmtype>

50025

+ fcm<optab>\t%<v>0<Vmtype>, %<v>1<Vmtype>, 0"

50026

[(set_attr "simd_type" "simd_fcmp")

50027

(set_attr "simd_mode" "<MODE>")]

50028

)

50029

Index: gcc/config/aarch64/predicates.md

50030

===================================================================

50031

--- a/src/gcc/config/aarch64/predicates.md (.../tags/gcc_4_8_2_release)

50032

+++ b/src/gcc/config/aarch64/predicates.md (.../branches/gcc-4_8-branch)

50033

@@ -31,6 +31,11 @@

50034

(ior (match_operand 0 "register_operand")

50035

(match_test "op == const0_rtx"))))

50036

50037

+(define_predicate "aarch64_reg_or_fp_zero"

50038

+ (and (match_code "reg,subreg,const_double")

50039

+ (ior (match_operand 0 "register_operand")

50040

+ (match_test "aarch64_float_const_zero_rtx_p (op)"))))

50041

+

50042

(define_predicate "aarch64_reg_zero_or_m1_or_1"

50043

(and (match_code "reg,subreg,const_int")

50044

(ior (match_operand 0 "register_operand")

50045

Index: gcc/config/aarch64/arm_neon.h

50046

===================================================================

50047

--- a/src/gcc/config/aarch64/arm_neon.h (.../tags/gcc_4_8_2_release)

50048

+++ b/src/gcc/config/aarch64/arm_neon.h (.../branches/gcc-4_8-branch)

50049

@@ -19551,7 +19551,7 @@

50050

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

50051

vcge_u8 (uint8x8_t __a, uint8x8_t __b)

50052

{

50053

- return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __a,

50054

+ return (uint8x8_t) __builtin_aarch64_cmgeuv8qi ((int8x8_t) __a,

50055

(int8x8_t) __b);

50056

}

50057

50058

@@ -19558,7 +19558,7 @@

50059

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

50060

vcge_u16 (uint16x4_t __a, uint16x4_t __b)

50061

{

50062

- return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __a,

50063

+ return (uint16x4_t) __builtin_aarch64_cmgeuv4hi ((int16x4_t) __a,

50064

(int16x4_t) __b);

50065

}

50066

50067

@@ -19565,7 +19565,7 @@

50068

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

50069

vcge_u32 (uint32x2_t __a, uint32x2_t __b)

50070

{

50071

- return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __a,

50072

+ return (uint32x2_t) __builtin_aarch64_cmgeuv2si ((int32x2_t) __a,

50073

(int32x2_t) __b);

50074

}

50075

50076

@@ -19572,7 +19572,7 @@

50077

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

50078

vcge_u64 (uint64x1_t __a, uint64x1_t __b)

50079

{

50080

- return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a,

50081

+ return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __a,

50082

(int64x1_t) __b);

50083

}

50084

50085

@@ -19603,7 +19603,7 @@

50086

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

50087

vcgeq_u8 (uint8x16_t __a, uint8x16_t __b)

50088

{

50089

- return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __a,

50090

+ return (uint8x16_t) __builtin_aarch64_cmgeuv16qi ((int8x16_t) __a,

50091

(int8x16_t) __b);

50092

}

50093

50094

@@ -19610,7 +19610,7 @@

50095

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

50096

vcgeq_u16 (uint16x8_t __a, uint16x8_t __b)

50097

{

50098

- return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __a,

50099

+ return (uint16x8_t) __builtin_aarch64_cmgeuv8hi ((int16x8_t) __a,

50100

(int16x8_t) __b);

50101

}

50102

50103

@@ -19617,7 +19617,7 @@

50104

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

50105

vcgeq_u32 (uint32x4_t __a, uint32x4_t __b)

50106

{

50107

- return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __a,

50108

+ return (uint32x4_t) __builtin_aarch64_cmgeuv4si ((int32x4_t) __a,

50109

(int32x4_t) __b);

50110

}

50111

50112

@@ -19624,7 +19624,7 @@

50113

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

50114

vcgeq_u64 (uint64x2_t __a, uint64x2_t __b)

50115

{

50116

- return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __a,

50117

+ return (uint64x2_t) __builtin_aarch64_cmgeuv2di ((int64x2_t) __a,

50118

(int64x2_t) __b);

50119

}

50120

50121

@@ -19637,7 +19637,7 @@

50122

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

50123

vcged_u64 (uint64x1_t __a, uint64x1_t __b)

50124

{

50125

- return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a,

50126

+ return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __a,

50127

(int64x1_t) __b);

50128

}

50129

50130

@@ -19676,7 +19676,7 @@

50131

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

50132

vcgt_u8 (uint8x8_t __a, uint8x8_t __b)

50133

{

50134

- return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __a,

50135

+ return (uint8x8_t) __builtin_aarch64_cmgtuv8qi ((int8x8_t) __a,

50136

(int8x8_t) __b);

50137

}

50138

50139

@@ -19683,7 +19683,7 @@

50140

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

50141

vcgt_u16 (uint16x4_t __a, uint16x4_t __b)

50142

{

50143

- return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __a,

50144

+ return (uint16x4_t) __builtin_aarch64_cmgtuv4hi ((int16x4_t) __a,

50145

(int16x4_t) __b);

50146

}

50147

50148

@@ -19690,7 +19690,7 @@

50149

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

50150

vcgt_u32 (uint32x2_t __a, uint32x2_t __b)

50151

{

50152

- return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __a,

50153

+ return (uint32x2_t) __builtin_aarch64_cmgtuv2si ((int32x2_t) __a,

50154

(int32x2_t) __b);

50155

}

50156

50157

@@ -19697,7 +19697,7 @@

50158

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

50159

vcgt_u64 (uint64x1_t __a, uint64x1_t __b)

50160

{

50161

- return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a,

50162

+ return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __a,

50163

(int64x1_t) __b);

50164

}

50165

50166

@@ -19728,7 +19728,7 @@

50167

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

50168

vcgtq_u8 (uint8x16_t __a, uint8x16_t __b)

50169

{

50170

- return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __a,

50171

+ return (uint8x16_t) __builtin_aarch64_cmgtuv16qi ((int8x16_t) __a,

50172

(int8x16_t) __b);

50173

}

50174

50175

@@ -19735,7 +19735,7 @@

50176

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

50177

vcgtq_u16 (uint16x8_t __a, uint16x8_t __b)

50178

{

50179

- return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __a,

50180

+ return (uint16x8_t) __builtin_aarch64_cmgtuv8hi ((int16x8_t) __a,

50181

(int16x8_t) __b);

50182

}

50183

50184

@@ -19742,7 +19742,7 @@

50185

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

50186

vcgtq_u32 (uint32x4_t __a, uint32x4_t __b)

50187

{

50188

- return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __a,

50189

+ return (uint32x4_t) __builtin_aarch64_cmgtuv4si ((int32x4_t) __a,

50190

(int32x4_t) __b);

50191

}

50192

50193

@@ -19749,7 +19749,7 @@

50194

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

50195

vcgtq_u64 (uint64x2_t __a, uint64x2_t __b)

50196

{

50197

- return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __a,

50198

+ return (uint64x2_t) __builtin_aarch64_cmgtuv2di ((int64x2_t) __a,

50199

(int64x2_t) __b);

50200

}

50201

50202

@@ -19762,7 +19762,7 @@

50203

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

50204

vcgtd_u64 (uint64x1_t __a, uint64x1_t __b)

50205

{

50206

- return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a,

50207

+ return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __a,

50208

(int64x1_t) __b);

50209

}

50210

50211

@@ -19801,7 +19801,7 @@

50212

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

50213

vcle_u8 (uint8x8_t __a, uint8x8_t __b)

50214

{

50215

- return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __b,

50216

+ return (uint8x8_t) __builtin_aarch64_cmgeuv8qi ((int8x8_t) __b,

50217

(int8x8_t) __a);

50218

}

50219

50220

@@ -19808,7 +19808,7 @@

50221

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

50222

vcle_u16 (uint16x4_t __a, uint16x4_t __b)

50223

{

50224

- return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __b,

50225

+ return (uint16x4_t) __builtin_aarch64_cmgeuv4hi ((int16x4_t) __b,

50226

(int16x4_t) __a);

50227

}

50228

50229

@@ -19815,7 +19815,7 @@

50230

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

50231

vcle_u32 (uint32x2_t __a, uint32x2_t __b)

50232

{

50233

- return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __b,

50234

+ return (uint32x2_t) __builtin_aarch64_cmgeuv2si ((int32x2_t) __b,

50235

(int32x2_t) __a);

50236

}

50237

50238

@@ -19822,7 +19822,7 @@

50239

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

50240

vcle_u64 (uint64x1_t __a, uint64x1_t __b)

50241

{

50242

- return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __b,

50243

+ return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __b,

50244

(int64x1_t) __a);

50245

}

50246

50247

@@ -19853,7 +19853,7 @@

50248

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

50249

vcleq_u8 (uint8x16_t __a, uint8x16_t __b)

50250

{

50251

- return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __b,

50252

+ return (uint8x16_t) __builtin_aarch64_cmgeuv16qi ((int8x16_t) __b,

50253

(int8x16_t) __a);

50254

}

50255

50256

@@ -19860,7 +19860,7 @@

50257

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

50258

vcleq_u16 (uint16x8_t __a, uint16x8_t __b)

50259

{

50260

- return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __b,

50261

+ return (uint16x8_t) __builtin_aarch64_cmgeuv8hi ((int16x8_t) __b,

50262

(int16x8_t) __a);

50263

}

50264

50265

@@ -19867,7 +19867,7 @@

50266

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

50267

vcleq_u32 (uint32x4_t __a, uint32x4_t __b)

50268

{

50269

- return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __b,

50270

+ return (uint32x4_t) __builtin_aarch64_cmgeuv4si ((int32x4_t) __b,

50271

(int32x4_t) __a);

50272

}

50273

50274

@@ -19874,7 +19874,7 @@

50275

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

50276

vcleq_u64 (uint64x2_t __a, uint64x2_t __b)

50277

{

50278

- return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __b,

50279

+ return (uint64x2_t) __builtin_aarch64_cmgeuv2di ((int64x2_t) __b,

50280

(int64x2_t) __a);

50281

}

50282

50283

@@ -19919,7 +19919,7 @@

50284

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

50285

vclt_u8 (uint8x8_t __a, uint8x8_t __b)

50286

{

50287

- return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __b,

50288

+ return (uint8x8_t) __builtin_aarch64_cmgtuv8qi ((int8x8_t) __b,

50289

(int8x8_t) __a);

50290

}

50291

50292

@@ -19926,7 +19926,7 @@

50293

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

50294

vclt_u16 (uint16x4_t __a, uint16x4_t __b)

50295

{

50296

- return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __b,

50297

+ return (uint16x4_t) __builtin_aarch64_cmgtuv4hi ((int16x4_t) __b,

50298

(int16x4_t) __a);

50299

}

50300

50301

@@ -19933,7 +19933,7 @@

50302

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

50303

vclt_u32 (uint32x2_t __a, uint32x2_t __b)

50304

{

50305

- return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __b,

50306

+ return (uint32x2_t) __builtin_aarch64_cmgtuv2si ((int32x2_t) __b,

50307

(int32x2_t) __a);

50308

}

50309

50310

@@ -19940,7 +19940,7 @@

50311

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

50312

vclt_u64 (uint64x1_t __a, uint64x1_t __b)

50313

{

50314

- return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __b,

50315

+ return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __b,

50316

(int64x1_t) __a);

50317

}

50318

50319

@@ -19971,7 +19971,7 @@

50320

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

50321

vcltq_u8 (uint8x16_t __a, uint8x16_t __b)

50322

{

50323

- return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __b,

50324

+ return (uint8x16_t) __builtin_aarch64_cmgtuv16qi ((int8x16_t) __b,

50325

(int8x16_t) __a);

50326

}

50327

50328

@@ -19978,7 +19978,7 @@

50329

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

50330

vcltq_u16 (uint16x8_t __a, uint16x8_t __b)

50331

{

50332

- return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __b,

50333

+ return (uint16x8_t) __builtin_aarch64_cmgtuv8hi ((int16x8_t) __b,

50334

(int16x8_t) __a);

50335

}

50336

50337

@@ -19985,7 +19985,7 @@

50338

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

50339

vcltq_u32 (uint32x4_t __a, uint32x4_t __b)

50340

{

50341

- return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __b,

50342

+ return (uint32x4_t) __builtin_aarch64_cmgtuv4si ((int32x4_t) __b,

50343

(int32x4_t) __a);

50344

}

50345

50346

@@ -19992,7 +19992,7 @@

50347

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

50348

vcltq_u64 (uint64x2_t __a, uint64x2_t __b)

50349

{

50350

- return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __b,

50351

+ return (uint64x2_t) __builtin_aarch64_cmgtuv2di ((int64x2_t) __b,

50352

(int64x2_t) __a);

50353

}

50354

50355

Index: gcc/config/aarch64/aarch64.md

50356

===================================================================

50357

--- a/src/gcc/config/aarch64/aarch64.md (.../tags/gcc_4_8_2_release)

50358

+++ b/src/gcc/config/aarch64/aarch64.md (.../branches/gcc-4_8-branch)

50359

@@ -2211,7 +2211,7 @@

50360

(set_attr "mode" "SI")]

50361

)

50362

50363

-(define_insn "*cstore<mode>_neg"

50364

+(define_insn "cstore<mode>_neg"

50365

[(set (match_operand:ALLI 0 "register_operand" "=r")

50366

(neg:ALLI (match_operator:ALLI 1 "aarch64_comparison_operator"

50367

[(match_operand 2 "cc_register" "") (const_int 0)])))]

50368

Index: gcc/config/aarch64/aarch64-simd-builtins.def

50369

===================================================================

50370

--- a/src/gcc/config/aarch64/aarch64-simd-builtins.def (.../tags/gcc_4_8_2_release)

50371

+++ b/src/gcc/config/aarch64/aarch64-simd-builtins.def (.../branches/gcc-4_8-branch)

50372

@@ -217,8 +217,8 @@

50373

BUILTIN_VSDQ_I_DI (BINOP, cmle)

50374

BUILTIN_VSDQ_I_DI (BINOP, cmlt)

50375

/* Implemented by aarch64_cm<cmp><mode>. */

50376

- BUILTIN_VSDQ_I_DI (BINOP, cmhs)

50377

- BUILTIN_VSDQ_I_DI (BINOP, cmhi)

50378

+ BUILTIN_VSDQ_I_DI (BINOP, cmgeu)

50379

+ BUILTIN_VSDQ_I_DI (BINOP, cmgtu)

50380

BUILTIN_VSDQ_I_DI (BINOP, cmtst)

50381

50382

/* Implemented by aarch64_<fmaxmin><mode>. */

50383

Index: gcc/config/aarch64/aarch64.c

50384

===================================================================

50385

--- a/src/gcc/config/aarch64/aarch64.c (.../tags/gcc_4_8_2_release)

50386

+++ b/src/gcc/config/aarch64/aarch64.c (.../branches/gcc-4_8-branch)

50387

@@ -2274,7 +2274,7 @@

50388

if (ncount < zcount)

50389

{

50390

emit_move_insn (gen_rtx_REG (Pmode, regnum),

50391

- GEN_INT ((~val) & 0xffff));

50392

+ GEN_INT (val | ~(HOST_WIDE_INT) 0xffff));

50393

tval = 0xffff;

50394

}

50395

else

50396

@@ -4568,9 +4568,11 @@

50397

}

50398

50399

static int

50400

-aarch64_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,

50401

- reg_class_t from, reg_class_t to)

50402

+aarch64_register_move_cost (enum machine_mode mode,

50403

+ reg_class_t from_i, reg_class_t to_i)

50404

{

50405

+ enum reg_class from = (enum reg_class) from_i;

50406

+ enum reg_class to = (enum reg_class) to_i;

50407

const struct cpu_regmove_cost *regmove_cost

50408

= aarch64_tune_params->regmove_cost;

50409

50410

@@ -4586,8 +4588,7 @@

50411

secondary reload. A general register is used as a scratch to move

50412

the upper DI value and the lower DI value is moved directly,

50413

hence the cost is the sum of three moves. */

50414

-

50415

- if (! TARGET_SIMD && GET_MODE_SIZE (from) == 128 && GET_MODE_SIZE (to) == 128)

50416

+ if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 128)

50417

return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP;

50418

50419

return regmove_cost->FP2FP;

50420

Index: gcc/config/aarch64/iterators.md

50421

===================================================================

50422

--- a/src/gcc/config/aarch64/iterators.md (.../tags/gcc_4_8_2_release)

50423

+++ b/src/gcc/config/aarch64/iterators.md (.../branches/gcc-4_8-branch)

50424

@@ -83,6 +83,9 @@

50425

;; Vector Float modes.

50426

(define_mode_iterator VDQF [V2SF V4SF V2DF])

50427

50428

+;; All Float modes.

50429

+(define_mode_iterator VALLF [V2SF V4SF V2DF SF DF])

50430

+

50431

;; Vector Float modes with 2 elements.

50432

(define_mode_iterator V2F [V2SF V2DF])

50433

50434

@@ -213,13 +216,6 @@

50435

UNSPEC_URSHL ; Used in aarch64-simd.md.

50436

UNSPEC_SQRSHL ; Used in aarch64-simd.md.

50437

UNSPEC_UQRSHL ; Used in aarch64-simd.md.

50438

- UNSPEC_CMEQ ; Used in aarch64-simd.md.

50439

- UNSPEC_CMLE ; Used in aarch64-simd.md.

50440

- UNSPEC_CMLT ; Used in aarch64-simd.md.

50441

- UNSPEC_CMGE ; Used in aarch64-simd.md.

50442

- UNSPEC_CMGT ; Used in aarch64-simd.md.

50443

- UNSPEC_CMHS ; Used in aarch64-simd.md.

50444

- UNSPEC_CMHI ; Used in aarch64-simd.md.

50445

UNSPEC_SSLI ; Used in aarch64-simd.md.

50446

UNSPEC_USLI ; Used in aarch64-simd.md.

50447

UNSPEC_SSRI ; Used in aarch64-simd.md.

50448

@@ -227,7 +223,6 @@

50449

UNSPEC_SSHLL ; Used in aarch64-simd.md.

50450

UNSPEC_USHLL ; Used in aarch64-simd.md.

50451

UNSPEC_ADDP ; Used in aarch64-simd.md.

50452

- UNSPEC_CMTST ; Used in aarch64-simd.md.

50453

UNSPEC_FMAX ; Used in aarch64-simd.md.

50454

UNSPEC_FMIN ; Used in aarch64-simd.md.

50455

UNSPEC_BSL ; Used in aarch64-simd.md.

50456

@@ -251,6 +246,7 @@

50457

50458

;; For scalar usage of vector/FP registers

50459

(define_mode_attr v [(QI "b") (HI "h") (SI "s") (DI "d")

50460

+ (SF "s") (DF "d")

50461

(V8QI "") (V16QI "")

50462

(V4HI "") (V8HI "")

50463

(V2SI "") (V4SI "")

50464

@@ -305,7 +301,8 @@

50465

(V4SF ".4s") (V2DF ".2d")

50466

(DI "") (SI "")

50467

(HI "") (QI "")

50468

- (TI "")])

50469

+ (TI "") (SF "")

50470

+ (DF "")])

50471

50472

;; Register suffix narrowed modes for VQN.

50473

(define_mode_attr Vmntype [(V8HI ".8b") (V4SI ".4h")

50474

@@ -444,7 +441,8 @@

50475

(V2SI "V2SI") (V4SI "V4SI")

50476

(DI "DI") (V2DI "V2DI")

50477

(V2SF "V2SI") (V4SF "V4SI")

50478

- (V2DF "V2DI")])

50479

+ (V2DF "V2DI") (DF "DI")

50480

+ (SF "SI")])

50481

50482

;; Lower case mode of results of comparison operations.

50483

(define_mode_attr v_cmp_result [(V8QI "v8qi") (V16QI "v16qi")

50484

@@ -452,7 +450,8 @@

50485

(V2SI "v2si") (V4SI "v4si")

50486

(DI "di") (V2DI "v2di")

50487

(V2SF "v2si") (V4SF "v4si")

50488

- (V2DF "v2di")])

50489

+ (V2DF "v2di") (DF "di")

50490

+ (SF "si")])

50491

50492

;; Vm for lane instructions is restricted to FP_LO_REGS.

50493

(define_mode_attr vwx [(V4HI "x") (V8HI "x") (HI "x")

50494

@@ -543,6 +542,12 @@

50495

;; Code iterator for signed variants of vector saturating binary ops.

50496

(define_code_iterator SBINQOPS [ss_plus ss_minus])

50497

50498

+;; Comparison operators for <F>CM.

50499

+(define_code_iterator COMPARISONS [lt le eq ge gt])

50500

+

50501

+;; Unsigned comparison operators.

50502

+(define_code_iterator UCOMPARISONS [ltu leu geu gtu])

50503

+

50504

;; -------------------------------------------------------------------

50505

;; Code Attributes

50506

;; -------------------------------------------------------------------

50507

@@ -571,8 +576,29 @@

50508

(eq "eq")

50509

(ne "ne")

50510

(lt "lt")

50511

- (ge "ge")])

50512

+ (ge "ge")

50513

+ (le "le")

50514

+ (gt "gt")

50515

+ (ltu "ltu")

50516

+ (leu "leu")

50517

+ (geu "geu")

50518

+ (gtu "gtu")])

50519

50520

+;; For comparison operators we use the FCM* and CM* instructions.

50521

+;; As there are no CMLE or CMLT instructions which act on 3 vector

50522

+;; operands, we must use CMGE or CMGT and swap the order of the

50523

+;; source operands.

50524

+

50525

+(define_code_attr n_optab [(lt "gt") (le "ge") (eq "eq") (ge "ge") (gt "gt")

50526

+ (ltu "hi") (leu "hs") (geu "hs") (gtu "hi")])

50527

+(define_code_attr cmp_1 [(lt "2") (le "2") (eq "1") (ge "1") (gt "1")

50528

+ (ltu "2") (leu "2") (geu "1") (gtu "1")])

50529

+(define_code_attr cmp_2 [(lt "1") (le "1") (eq "2") (ge "2") (gt "2")

50530

+ (ltu "1") (leu "1") (geu "2") (gtu "2")])

50531

+

50532

+(define_code_attr CMP [(lt "LT") (le "LE") (eq "EQ") (ge "GE") (gt "GT")

50533

+ (ltu "LTU") (leu "LEU") (geu "GEU") (gtu "GTU")])

50534

+

50535

;; Optab prefix for sign/zero-extending operations

50536

(define_code_attr su_optab [(sign_extend "") (zero_extend "u")

50537

(div "") (udiv "u")

50538

@@ -680,11 +706,6 @@

50539

UNSPEC_SQSHRN UNSPEC_UQSHRN

50540

UNSPEC_SQRSHRN UNSPEC_UQRSHRN])

50541

50542

-(define_int_iterator VCMP_S [UNSPEC_CMEQ UNSPEC_CMGE UNSPEC_CMGT

50543

- UNSPEC_CMLE UNSPEC_CMLT])

50544

-

50545

-(define_int_iterator VCMP_U [UNSPEC_CMHS UNSPEC_CMHI UNSPEC_CMTST])

50546

-

50547

(define_int_iterator PERMUTE [UNSPEC_ZIP1 UNSPEC_ZIP2

50548

UNSPEC_TRN1 UNSPEC_TRN2

50549

UNSPEC_UZP1 UNSPEC_UZP2])

50550

@@ -768,12 +789,6 @@

50551

(UNSPEC_RADDHN2 "add")

50552

(UNSPEC_RSUBHN2 "sub")])

50553

50554

-(define_int_attr cmp [(UNSPEC_CMGE "ge") (UNSPEC_CMGT "gt")

50555

- (UNSPEC_CMLE "le") (UNSPEC_CMLT "lt")

50556

- (UNSPEC_CMEQ "eq")

50557

- (UNSPEC_CMHS "hs") (UNSPEC_CMHI "hi")

50558

- (UNSPEC_CMTST "tst")])

50559

-

50560

(define_int_attr offsetlr [(UNSPEC_SSLI "1") (UNSPEC_USLI "1")

50561

(UNSPEC_SSRI "0") (UNSPEC_USRI "0")])

50562

50563

Index: gcc/config/rs6000/power8.md

50564

===================================================================

50565

--- a/src/gcc/config/rs6000/power8.md (.../tags/gcc_4_8_2_release)

50566

+++ b/src/gcc/config/rs6000/power8.md (.../branches/gcc-4_8-branch)

50567

@@ -0,0 +1,373 @@

50568

+;; Scheduling description for IBM POWER8 processor.

50569

50570

+;;

50571

+;; Contributed by Pat Haugen (pthaugen@us.ibm.com).

50572

+

50573

+;; This file is part of GCC.

50574

+;;

50575

+;; GCC is free software; you can redistribute it and/or modify it

50576

+;; under the terms of the GNU General Public License as published

50577

+;; by the Free Software Foundation; either version 3, or (at your

50578

+;; option) any later version.

50579

+;;

50580

+;; GCC is distributed in the hope that it will be useful, but WITHOUT

50581

+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

50582

+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public

50583

+;; License for more details.

50584

+;;

50585

+;; You should have received a copy of the GNU General Public License

50586

+;; along with GCC; see the file COPYING3. If not see

50587

+;; <http://www.gnu.org/licenses/>.

50588

+

50589

+(define_automaton "power8fxu,power8lsu,power8vsu,power8misc")

50590

+

50591

+(define_cpu_unit "fxu0_power8,fxu1_power8" "power8fxu")

50592

+(define_cpu_unit "lu0_power8,lu1_power8" "power8lsu")

50593

+(define_cpu_unit "lsu0_power8,lsu1_power8" "power8lsu")

50594

+(define_cpu_unit "vsu0_power8,vsu1_power8" "power8vsu")

50595

+(define_cpu_unit "bpu_power8,cru_power8" "power8misc")

50596

+(define_cpu_unit "du0_power8,du1_power8,du2_power8,du3_power8,du4_power8,\

50597

+ du5_power8,du6_power8" "power8misc")

50598

+

50599

+

50600

+; Dispatch group reservations

50601

+(define_reservation "DU_any_power8"

50602

50603

+ du5_power8")

50604

+

50605

+; 2-way Cracked instructions go in slots 0-1

50606

+; (can also have a second in slots 3-4 if insns are adjacent)

50607

+(define_reservation "DU_cracked_power8"

50608

+ "du0_power8+du1_power8")

50609

+

50610

+; Insns that are first in group

50611

+(define_reservation "DU_first_power8"

50612

+ "du0_power8")

50613

+

50614

+; Insns that are first and last in group

50615

+(define_reservation "DU_both_power8"

50616

+ "du0_power8+du1_power8+du2_power8+du3_power8+du4_power8+\

50617

+ du5_power8+du6_power8")

50618

+

50619

+; Dispatch slots are allocated in order conforming to program order.

50620

+(absence_set "du0_power8" "du1_power8,du2_power8,du3_power8,du4_power8,\

50621

+ du5_power8,du6_power8")

50622

+(absence_set "du1_power8" "du2_power8,du3_power8,du4_power8,du5_power8,\

50623

+ du6_power8")

50624

+(absence_set "du2_power8" "du3_power8,du4_power8,du5_power8,du6_power8")

50625

+(absence_set "du3_power8" "du4_power8,du5_power8,du6_power8")

50626

+(absence_set "du4_power8" "du5_power8,du6_power8")

50627

+(absence_set "du5_power8" "du6_power8")

50628

+

50629

+

50630

+; Execution unit reservations

50631

+(define_reservation "FXU_power8"

50632

+ "fxu0_power8|fxu1_power8")

50633

+

50634

+(define_reservation "LU_power8"

50635

+ "lu0_power8|lu1_power8")

50636

+

50637

+(define_reservation "LSU_power8"

50638

+ "lsu0_power8|lsu1_power8")

50639

+

50640

+(define_reservation "LU_or_LSU_power8"

50641

+ "lu0_power8|lu1_power8|lsu0_power8|lsu1_power8")

50642

+

50643

+(define_reservation "VSU_power8"

50644

+ "vsu0_power8|vsu1_power8")

50645

+

50646

+

50647

+; LS Unit

50648

+(define_insn_reservation "power8-load" 3

50649

+ (and (eq_attr "type" "load")

50650

+ (eq_attr "cpu" "power8"))

50651

+ "DU_any_power8,LU_or_LSU_power8")

50652

+

50653

+(define_insn_reservation "power8-load-update" 3

50654

+ (and (eq_attr "type" "load_u,load_ux")

50655

+ (eq_attr "cpu" "power8"))

50656

+ "DU_cracked_power8,LU_or_LSU_power8+FXU_power8")

50657

+

50658

+(define_insn_reservation "power8-load-ext" 3

50659

+ (and (eq_attr "type" "load_ext")

50660

+ (eq_attr "cpu" "power8"))

50661

+ "DU_cracked_power8,LU_or_LSU_power8,FXU_power8")

50662

+

50663

+(define_insn_reservation "power8-load-ext-update" 3

50664

+ (and (eq_attr "type" "load_ext_u,load_ext_ux")

50665

+ (eq_attr "cpu" "power8"))

50666

+ "DU_both_power8,LU_or_LSU_power8+FXU_power8,FXU_power8")

50667

+

50668

+(define_insn_reservation "power8-fpload" 5

50669

+ (and (eq_attr "type" "fpload,vecload")

50670

+ (eq_attr "cpu" "power8"))

50671

+ "DU_any_power8,LU_power8")

50672

+

50673

+(define_insn_reservation "power8-fpload-update" 5

50674

+ (and (eq_attr "type" "fpload_u,fpload_ux")

50675

+ (eq_attr "cpu" "power8"))

50676

+ "DU_cracked_power8,LU_power8+FXU_power8")

50677

+

50678

+(define_insn_reservation "power8-store" 5 ; store-forwarding latency

50679

+ (and (eq_attr "type" "store,store_u")

50680

+ (eq_attr "cpu" "power8"))

50681

+ "DU_any_power8,LSU_power8+LU_power8")

50682

+

50683

+(define_insn_reservation "power8-store-update-indexed" 5

50684

+ (and (eq_attr "type" "store_ux")

50685

+ (eq_attr "cpu" "power8"))

50686

+ "DU_cracked_power8,LSU_power8+LU_power8")

50687

+

50688

+(define_insn_reservation "power8-fpstore" 5

50689

+ (and (eq_attr "type" "fpstore")

50690

+ (eq_attr "cpu" "power8"))

50691

+ "DU_any_power8,LSU_power8+VSU_power8")

50692

+

50693

+(define_insn_reservation "power8-fpstore-update" 5

50694

+ (and (eq_attr "type" "fpstore_u,fpstore_ux")

50695

+ (eq_attr "cpu" "power8"))

50696

+ "DU_any_power8,LSU_power8+VSU_power8")

50697

+

50698

+(define_insn_reservation "power8-vecstore" 5

50699

+ (and (eq_attr "type" "vecstore")

50700

+ (eq_attr "cpu" "power8"))

50701

+ "DU_cracked_power8,LSU_power8+VSU_power8")

50702

+

50703

+(define_insn_reservation "power8-larx" 3

50704

+ (and (eq_attr "type" "load_l")

50705

+ (eq_attr "cpu" "power8"))

50706

+ "DU_both_power8,LU_or_LSU_power8")

50707

+

50708

+(define_insn_reservation "power8-stcx" 10

50709

+ (and (eq_attr "type" "store_c")

50710

+ (eq_attr "cpu" "power8"))

50711

+ "DU_both_power8,LSU_power8+LU_power8")

50712

+

50713

+(define_insn_reservation "power8-sync" 1

50714

+ (and (eq_attr "type" "sync,isync")

50715

+ (eq_attr "cpu" "power8"))

50716

+ "DU_both_power8,LSU_power8")

50717

+

50718

+

50719

+; FX Unit

50720

+(define_insn_reservation "power8-1cyc" 1

50721

+ (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\

50722

+ var_shift_rotate,exts,isel")

50723

+ (eq_attr "cpu" "power8"))

50724

+ "DU_any_power8,FXU_power8")

50725

+

50726

+; Extra cycle to LU/LSU

50727

+(define_bypass 2 "power8-1cyc"

50728

+ "power8-load*,power8-fpload*,power8-store*,power8-fpstore*,\

50729

+ power8-vecstore,power8-larx,power8-stcx")

50730

+; "power8-load,power8-load-update,power8-load-ext,\

50731

+; power8-load-ext-update,power8-fpload,power8-fpload-update,\

50732

+; power8-store,power8-store-update,power8-store-update-indexed,\

50733

+; power8-fpstore,power8-fpstore-update,power8-vecstore,\

50734

+; power8-larx,power8-stcx")

50735

+

50736

+(define_insn_reservation "power8-2cyc" 2

50737

+ (and (eq_attr "type" "cntlz,popcnt")

50738

+ (eq_attr "cpu" "power8"))

50739

+ "DU_any_power8,FXU_power8")

50740

+

50741

+(define_insn_reservation "power8-two" 2

50742

+ (and (eq_attr "type" "two")

50743

+ (eq_attr "cpu" "power8"))

50744

+ "DU_any_power8+DU_any_power8,FXU_power8,FXU_power8")

50745

+

50746

+(define_insn_reservation "power8-three" 3

50747

+ (and (eq_attr "type" "three")

50748

+ (eq_attr "cpu" "power8"))

50749

+ "DU_any_power8+DU_any_power8+DU_any_power8,FXU_power8,FXU_power8,FXU_power8")

50750

+

50751

+; cmp - Normal compare insns

50752

+(define_insn_reservation "power8-cmp" 2

50753

+ (and (eq_attr "type" "cmp")

50754

+ (eq_attr "cpu" "power8"))

50755

+ "DU_any_power8,FXU_power8")

50756

+

50757

+; fast_compare : add./and./nor./etc

50758

+(define_insn_reservation "power8-fast-compare" 2

50759

+ (and (eq_attr "type" "fast_compare")

50760

+ (eq_attr "cpu" "power8"))

50761

+ "DU_any_power8,FXU_power8")

50762

+

50763

+; compare : rldicl./exts./etc

50764

+; delayed_compare : rlwinm./slwi./etc

50765

+; var_delayed_compare : rlwnm./slw./etc

50766

+(define_insn_reservation "power8-compare" 2

50767

+ (and (eq_attr "type" "compare,delayed_compare,var_delayed_compare")

50768

+ (eq_attr "cpu" "power8"))

50769

+ "DU_cracked_power8,FXU_power8,FXU_power8")

50770

+

50771

+; Extra cycle to LU/LSU

50772

+(define_bypass 3 "power8-fast-compare,power8-compare"

50773

+ "power8-load*,power8-fpload*,power8-store*,power8-fpstore*,\

50774

+ power8-vecstore,power8-larx,power8-stcx")

50775

+

50776

+; 5 cycle CR latency

50777

+(define_bypass 5 "power8-fast-compare,power8-compare"

50778

+ "power8-crlogical,power8-mfcr,power8-mfcrf,power8-branch")

50779

+

50780

+(define_insn_reservation "power8-mul" 4

50781

+ (and (eq_attr "type" "imul,imul2,imul3,lmul")

50782

+ (eq_attr "cpu" "power8"))

50783

+ "DU_any_power8,FXU_power8")

50784

+

50785

+(define_insn_reservation "power8-mul-compare" 4

50786

+ (and (eq_attr "type" "imul_compare,lmul_compare")

50787

+ (eq_attr "cpu" "power8"))

50788

+ "DU_cracked_power8,FXU_power8")

50789

+

50790

+; Extra cycle to LU/LSU

50791

+(define_bypass 5 "power8-mul,power8-mul-compare"

50792

+ "power8-load*,power8-fpload*,power8-store*,power8-fpstore*,\

50793

+ power8-vecstore,power8-larx,power8-stcx")

50794

+

50795

+; 7 cycle CR latency

50796

+(define_bypass 7 "power8-mul,power8-mul-compare"

50797

+ "power8-crlogical,power8-mfcr,power8-mfcrf,power8-branch")

50798

+

50799

+; FXU divides are not pipelined

50800

+(define_insn_reservation "power8-idiv" 37

50801

+ (and (eq_attr "type" "idiv")

50802

+ (eq_attr "cpu" "power8"))

50803

+ "DU_any_power8,fxu0_power8*37|fxu1_power8*37")

50804

+

50805

+(define_insn_reservation "power8-ldiv" 68

50806

+ (and (eq_attr "type" "ldiv")

50807

+ (eq_attr "cpu" "power8"))

50808

+ "DU_any_power8,fxu0_power8*68|fxu1_power8*68")

50809

+

50810

+(define_insn_reservation "power8-mtjmpr" 5

50811

+ (and (eq_attr "type" "mtjmpr")

50812

+ (eq_attr "cpu" "power8"))

50813

+ "DU_first_power8,FXU_power8")

50814

+

50815

+; Should differentiate between 1 cr field and > 1 since mtocrf is not microcode

50816

+(define_insn_reservation "power8-mtcr" 3

50817

+ (and (eq_attr "type" "mtcr")

50818

+ (eq_attr "cpu" "power8"))

50819

+ "DU_both_power8,FXU_power8")

50820

+

50821

+

50822

+; CR Unit

50823

+(define_insn_reservation "power8-mfjmpr" 5

50824

+ (and (eq_attr "type" "mfjmpr")

50825

+ (eq_attr "cpu" "power8"))

50826

+ "DU_first_power8,cru_power8+FXU_power8")

50827

+

50828

+(define_insn_reservation "power8-crlogical" 3

50829

+ (and (eq_attr "type" "cr_logical,delayed_cr")

50830

+ (eq_attr "cpu" "power8"))

50831

+ "DU_first_power8,cru_power8")

50832

+

50833

+(define_insn_reservation "power8-mfcr" 5

50834

+ (and (eq_attr "type" "mfcr")

50835

+ (eq_attr "cpu" "power8"))

50836

+ "DU_both_power8,cru_power8")

50837

+

50838

+(define_insn_reservation "power8-mfcrf" 3

50839

+ (and (eq_attr "type" "mfcrf")

50840

+ (eq_attr "cpu" "power8"))

50841

+ "DU_first_power8,cru_power8")

50842

+

50843

+

50844

+; BR Unit

50845

+; Branches take dispatch slot 7, but reserve any remaining prior slots to

50846

+; prevent other insns from grabbing them once this is assigned.

50847

+(define_insn_reservation "power8-branch" 3

50848

+ (and (eq_attr "type" "jmpreg,branch")

50849

+ (eq_attr "cpu" "power8"))

50850

+ "(du6_power8\

50851

+ |du5_power8+du6_power8\

50852

+ |du4_power8+du5_power8+du6_power8\

50853

+ |du3_power8+du4_power8+du5_power8+du6_power8\

50854

+ |du2_power8+du3_power8+du4_power8+du5_power8+du6_power8\

50855

+ |du1_power8+du2_power8+du3_power8+du4_power8+du5_power8+du6_power8\

50856

+ |du0_power8+du1_power8+du2_power8+du3_power8+du4_power8+du5_power8+\

50857

+ du6_power8),bpu_power8")

50858

+

50859

+; Branch updating LR/CTR feeding mf[lr|ctr]

50860

+(define_bypass 4 "power8-branch" "power8-mfjmpr")

50861

+

50862

+

50863

+; VS Unit (includes FP/VSX/VMX/DFP/Crypto)

50864

+(define_insn_reservation "power8-fp" 6

50865

+ (and (eq_attr "type" "fp,dmul")

50866

+ (eq_attr "cpu" "power8"))

50867

+ "DU_any_power8,VSU_power8")

50868

+

50869

+; Additional 3 cycles for any CR result

50870

+(define_bypass 9 "power8-fp" "power8-crlogical,power8-mfcr*,power8-branch")

50871

+

50872

+(define_insn_reservation "power8-fpcompare" 8

50873

+ (and (eq_attr "type" "fpcompare")

50874

+ (eq_attr "cpu" "power8"))

50875

+ "DU_any_power8,VSU_power8")

50876

+

50877

+(define_insn_reservation "power8-sdiv" 27

50878

+ (and (eq_attr "type" "sdiv")

50879

+ (eq_attr "cpu" "power8"))

50880

+ "DU_any_power8,VSU_power8")

50881

+

50882

+(define_insn_reservation "power8-ddiv" 33

50883

+ (and (eq_attr "type" "ddiv")

50884

+ (eq_attr "cpu" "power8"))

50885

+ "DU_any_power8,VSU_power8")

50886

+

50887

+(define_insn_reservation "power8-sqrt" 32

50888

+ (and (eq_attr "type" "ssqrt")

50889

+ (eq_attr "cpu" "power8"))

50890

+ "DU_any_power8,VSU_power8")

50891

+

50892

+(define_insn_reservation "power8-dsqrt" 44

50893

+ (and (eq_attr "type" "dsqrt")

50894

+ (eq_attr "cpu" "power8"))

50895

+ "DU_any_power8,VSU_power8")

50896

+

50897

+(define_insn_reservation "power8-vecsimple" 2

50898

+ (and (eq_attr "type" "vecperm,vecsimple,veccmp")

50899

+ (eq_attr "cpu" "power8"))

50900

+ "DU_any_power8,VSU_power8")

50901

+

50902

+(define_insn_reservation "power8-vecnormal" 6

50903

+ (and (eq_attr "type" "vecfloat,vecdouble")

50904

+ (eq_attr "cpu" "power8"))

50905

+ "DU_any_power8,VSU_power8")

50906

+

50907

+(define_bypass 7 "power8-vecnormal"

50908

+ "power8-vecsimple,power8-veccomplex,power8-fpstore*,\

50909

+ power8-vecstore")

50910

+

50911

+(define_insn_reservation "power8-veccomplex" 7

50912

+ (and (eq_attr "type" "veccomplex")

50913

+ (eq_attr "cpu" "power8"))

50914

+ "DU_any_power8,VSU_power8")

50915

+

50916

+(define_insn_reservation "power8-vecfdiv" 25

50917

+ (and (eq_attr "type" "vecfdiv")

50918

+ (eq_attr "cpu" "power8"))

50919

+ "DU_any_power8,VSU_power8")

50920

+

50921

+(define_insn_reservation "power8-vecdiv" 31

50922

+ (and (eq_attr "type" "vecdiv")

50923

+ (eq_attr "cpu" "power8"))

50924

+ "DU_any_power8,VSU_power8")

50925

+

50926

+(define_insn_reservation "power8-mffgpr" 5

50927

+ (and (eq_attr "type" "mffgpr")

50928

+ (eq_attr "cpu" "power8"))

50929

+ "DU_any_power8,VSU_power8")

50930

+

50931

+(define_insn_reservation "power8-mftgpr" 6

50932

+ (and (eq_attr "type" "mftgpr")

50933

+ (eq_attr "cpu" "power8"))

50934

+ "DU_any_power8,VSU_power8")

50935

+

50936

+(define_insn_reservation "power8-crypto" 7

50937

+ (and (eq_attr "type" "crypto")

50938

+ (eq_attr "cpu" "power8"))

50939

+ "DU_any_power8,VSU_power8")

50940

+

50941

Index: gcc/config/rs6000/vector.md

50942

===================================================================

50943

--- a/src/gcc/config/rs6000/vector.md (.../tags/gcc_4_8_2_release)

50944

+++ b/src/gcc/config/rs6000/vector.md (.../branches/gcc-4_8-branch)

50945

@@ -24,28 +24,28 @@

50946

50947

50948

;; Vector int modes

50949

-(define_mode_iterator VEC_I [V16QI V8HI V4SI])

50950

+(define_mode_iterator VEC_I [V16QI V8HI V4SI V2DI])

50951

50952

;; Vector float modes

50953

(define_mode_iterator VEC_F [V4SF V2DF])

50954

50955

;; Vector arithmetic modes

50956

-(define_mode_iterator VEC_A [V16QI V8HI V4SI V4SF V2DF])

50957

+(define_mode_iterator VEC_A [V16QI V8HI V4SI V2DI V4SF V2DF])

50958

50959

;; Vector modes that need alginment via permutes

50960

(define_mode_iterator VEC_K [V16QI V8HI V4SI V4SF])

50961

50962

;; Vector logical modes

50963

-(define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF TI])

50964

+(define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI])

50965

50966

;; Vector modes for moves. Don't do TImode here.

50967

-(define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF])

50968

+(define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI])

50969

50970

;; Vector modes for types that don't need a realignment under VSX

50971

-(define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF])

50972

+(define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF V1TI])

50973

50974

;; Vector comparison modes

50975

-(define_mode_iterator VEC_C [V16QI V8HI V4SI V4SF V2DF])

50976

+(define_mode_iterator VEC_C [V16QI V8HI V4SI V2DI V4SF V2DF])

50977

50978

;; Vector init/extract modes

50979

(define_mode_iterator VEC_E [V16QI V8HI V4SI V2DI V4SF V2DF])

50980

@@ -54,7 +54,8 @@

50981

(define_mode_iterator VEC_64 [V2DI V2DF])

50982

50983

;; Vector reload iterator

50984

-(define_mode_iterator VEC_R [V16QI V8HI V4SI V2DI V4SF V2DF DF TI])

50985

+(define_mode_iterator VEC_R [V16QI V8HI V4SI V2DI V4SF V2DF V1TI

50986

+ SF SD SI DF DD DI TI])

50987

50988

;; Base type from vector mode

50989

(define_mode_attr VEC_base [(V16QI "QI")

50990

@@ -63,6 +64,7 @@

50991

(V2DI "DI")

50992

(V4SF "SF")

50993

(V2DF "DF")

50994

+ (V1TI "TI")

50995

(TI "TI")])

50996

50997

;; Same size integer type for floating point data

50998

@@ -88,7 +90,8 @@

50999

(smax "smax")])

51000

51001

51002

-;; Vector move instructions.

51003

+;; Vector move instructions. Little-endian VSX loads and stores require

51004

+;; special handling to circumvent "element endianness."

51005

(define_expand "mov<mode>"

51006

[(set (match_operand:VEC_M 0 "nonimmediate_operand" "")

51007

(match_operand:VEC_M 1 "any_operand" ""))]

51008

@@ -104,6 +107,15 @@

51009

&& !vlogical_operand (operands[1], <MODE>mode))

51010

operands[1] = force_reg (<MODE>mode, operands[1]);

51011

}

51012

+ if (!BYTES_BIG_ENDIAN

51013

+ && VECTOR_MEM_VSX_P (<MODE>mode)

51014

+ && !gpr_or_gpr_p (operands[0], operands[1])

51015

+ && (memory_operand (operands[0], <MODE>mode)

51016

+ ^ memory_operand (operands[1], <MODE>mode)))

51017

+ {

51018

+ rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode);

51019

+ DONE;

51020

+ }

51021

})

51022

51023

;; Generic vector floating point load/store instructions. These will match

51024

@@ -126,7 +138,9 @@

51025

(match_operand:VEC_L 1 "input_operand" ""))]

51026

"VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)

51027

&& reload_completed

51028

- && gpr_or_gpr_p (operands[0], operands[1])"

51029

+ && gpr_or_gpr_p (operands[0], operands[1])

51030

+ && !direct_move_p (operands[0], operands[1])

51031

+ && !quad_load_store_p (operands[0], operands[1])"

51032

[(pc)]

51033

{

51034

rs6000_split_multireg_move (operands[0], operands[1]);

51035

@@ -249,7 +263,7 @@

51036

[(set (match_operand:VEC_F 0 "vfloat_operand" "")

51037

(mult:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")

51038

(match_operand:VEC_F 2 "vfloat_operand" "")))]

51039

- "VECTOR_UNIT_VSX_P (<MODE>mode) || VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

51040

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51041

{

51042

if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))

51043

{

51044

@@ -395,7 +409,7 @@

51045

(match_operand:VEC_I 5 "vint_operand" "")])

51046

(match_operand:VEC_I 1 "vint_operand" "")

51047

(match_operand:VEC_I 2 "vint_operand" "")))]

51048

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

51049

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51050

"

51051

{

51052

if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],

51053

@@ -451,7 +465,7 @@

51054

(match_operand:VEC_I 5 "vint_operand" "")])

51055

(match_operand:VEC_I 1 "vint_operand" "")

51056

(match_operand:VEC_I 2 "vint_operand" "")))]

51057

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

51058

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51059

"

51060

{

51061

if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],

51062

@@ -505,7 +519,7 @@

51063

[(set (match_operand:VEC_I 0 "vint_operand" "")

51064

(gtu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

51065

(match_operand:VEC_I 2 "vint_operand" "")))]

51066

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

51067

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51068

"")

51069

51070

(define_expand "vector_geu<mode>"

51071

@@ -512,7 +526,7 @@

51072

[(set (match_operand:VEC_I 0 "vint_operand" "")

51073

(geu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

51074

(match_operand:VEC_I 2 "vint_operand" "")))]

51075

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

51076

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51077

"")

51078

51079

(define_insn_and_split "*vector_uneq<mode>"

51080

@@ -595,8 +609,8 @@

51081

(ge:VEC_F (match_dup 2)

51082

(match_dup 1)))

51083

(set (match_dup 0)

51084

- (not:VEC_F (ior:VEC_F (match_dup 3)

51085

- (match_dup 4))))]

51086

+ (and:VEC_F (not:VEC_F (match_dup 3))

51087

+ (not:VEC_F (match_dup 4))))]

51088

"

51089

{

51090

operands[3] = gen_reg_rtx (<MODE>mode);

51091

@@ -708,48 +722,19 @@

51092

"")

51093

51094

51095

-;; Vector logical instructions

51096

-(define_expand "xor<mode>3"

51097

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

51098

- (xor:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

51099

- (match_operand:VEC_L 2 "vlogical_operand" "")))]

51100

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

51101

- "")

51102

+;; Vector count leading zeros

51103

+(define_expand "clz<mode>2"

51104

+ [(set (match_operand:VEC_I 0 "register_operand" "")

51105

+ (clz:VEC_I (match_operand:VEC_I 1 "register_operand" "")))]

51106

+ "TARGET_P8_VECTOR")

51107

51108

-(define_expand "ior<mode>3"

51109

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

51110

- (ior:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

51111

- (match_operand:VEC_L 2 "vlogical_operand" "")))]

51112

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

51113

- "")

51114

+;; Vector population count

51115

+(define_expand "popcount<mode>2"

51116

+ [(set (match_operand:VEC_I 0 "register_operand" "")

51117

+ (popcount:VEC_I (match_operand:VEC_I 1 "register_operand" "")))]

51118

+ "TARGET_P8_VECTOR")

51119

51120

-(define_expand "and<mode>3"

51121

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

51122

- (and:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

51123

- (match_operand:VEC_L 2 "vlogical_operand" "")))]

51124

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

51125

- "")

51126

-

51127

-(define_expand "one_cmpl<mode>2"

51128

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

51129

- (not:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")))]

51130

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

51131

- "")

51132

-

51133

-(define_expand "nor<mode>3"

51134

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

51135

- (not:VEC_L (ior:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

51136

- (match_operand:VEC_L 2 "vlogical_operand" ""))))]

51137

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

51138

- "")

51139

-

51140

-(define_expand "andc<mode>3"

51141

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

51142

- (and:VEC_L (not:VEC_L (match_operand:VEC_L 2 "vlogical_operand" ""))

51143

- (match_operand:VEC_L 1 "vlogical_operand" "")))]

51144

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

51145

- "")

51146

-

51147

+

51148

;; Same size conversions

51149

(define_expand "float<VEC_int><mode>2"

51150

[(set (match_operand:VEC_F 0 "vfloat_operand" "")

51151

@@ -889,7 +874,7 @@

51152

{

51153

rtx reg = gen_reg_rtx (V4SFmode);

51154

51155

- rs6000_expand_interleave (reg, operands[1], operands[1], true);

51156

+ rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);

51157

emit_insn (gen_vsx_xvcvspdp (operands[0], reg));

51158

DONE;

51159

})

51160

@@ -901,7 +886,7 @@

51161

{

51162

rtx reg = gen_reg_rtx (V4SFmode);

51163

51164

- rs6000_expand_interleave (reg, operands[1], operands[1], false);

51165

+ rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);

51166

emit_insn (gen_vsx_xvcvspdp (operands[0], reg));

51167

DONE;

51168

})

51169

@@ -913,7 +898,7 @@

51170

{

51171

rtx reg = gen_reg_rtx (V4SImode);

51172

51173

- rs6000_expand_interleave (reg, operands[1], operands[1], true);

51174

+ rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);

51175

emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));

51176

DONE;

51177

})

51178

@@ -925,7 +910,7 @@

51179

{

51180

rtx reg = gen_reg_rtx (V4SImode);

51181

51182

- rs6000_expand_interleave (reg, operands[1], operands[1], false);

51183

+ rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);

51184

emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));

51185

DONE;

51186

})

51187

@@ -937,7 +922,7 @@

51188

{

51189

rtx reg = gen_reg_rtx (V4SImode);

51190

51191

- rs6000_expand_interleave (reg, operands[1], operands[1], true);

51192

+ rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);

51193

emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));

51194

DONE;

51195

})

51196

@@ -949,7 +934,7 @@

51197

{

51198

rtx reg = gen_reg_rtx (V4SImode);

51199

51200

- rs6000_expand_interleave (reg, operands[1], operands[1], false);

51201

+ rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);

51202

emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));

51203

DONE;

51204

})

51205

@@ -963,8 +948,19 @@

51206

(match_operand:V16QI 3 "vlogical_operand" "")]

51207

"VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

51208

{

51209

- emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1], operands[2],

51210

- operands[3]));

51211

+ if (BYTES_BIG_ENDIAN)

51212

+ emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],

51213

+ operands[2], operands[3]));

51214

+ else

51215

+ {

51216

+ /* We have changed lvsr to lvsl, so to complete the transformation

51217

+ of vperm for LE, we must swap the inputs. */

51218

+ rtx unspec = gen_rtx_UNSPEC (<MODE>mode,

51219

+ gen_rtvec (3, operands[2],

51220

+ operands[1], operands[3]),

51221

+ UNSPEC_VPERM);

51222

+ emit_move_insn (operands[0], unspec);

51223

+ }

51224

DONE;

51225

})

51226

51227

@@ -1064,7 +1060,7 @@

51228

[(set (match_operand:VEC_I 0 "vint_operand" "")

51229

(rotate:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

51230

(match_operand:VEC_I 2 "vint_operand" "")))]

51231

- "TARGET_ALTIVEC"

51232

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51233

"")

51234

51235

;; Expanders for arithmetic shift left on each vector element

51236

@@ -1072,7 +1068,7 @@

51237

[(set (match_operand:VEC_I 0 "vint_operand" "")

51238

(ashift:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

51239

(match_operand:VEC_I 2 "vint_operand" "")))]

51240

- "TARGET_ALTIVEC"

51241

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51242

"")

51243

51244

;; Expanders for logical shift right on each vector element

51245

@@ -1080,7 +1076,7 @@

51246

[(set (match_operand:VEC_I 0 "vint_operand" "")

51247

(lshiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

51248

(match_operand:VEC_I 2 "vint_operand" "")))]

51249

- "TARGET_ALTIVEC"

51250

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51251

"")

51252

51253

;; Expanders for arithmetic shift right on each vector element

51254

@@ -1088,7 +1084,7 @@

51255

[(set (match_operand:VEC_I 0 "vint_operand" "")

51256

(ashiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

51257

(match_operand:VEC_I 2 "vint_operand" "")))]

51258

- "TARGET_ALTIVEC"

51259

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

51260

"")

51261

51262

;; Vector reduction expanders for VSX

51263

Index: gcc/config/rs6000/constraints.md

51264

===================================================================

51265

--- a/src/gcc/config/rs6000/constraints.md (.../tags/gcc_4_8_2_release)

51266

+++ b/src/gcc/config/rs6000/constraints.md (.../branches/gcc-4_8-branch)

51267

@@ -52,22 +52,62 @@

51268

"@internal")

51269

51270

;; Use w as a prefix to add VSX modes

51271

-;; vector double (V2DF)

51272

+;; any VSX register

51273

+(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"

51274

+ "Any VSX register if the -mvsx option was used or NO_REGS.")

51275

+

51276

(define_register_constraint "wd" "rs6000_constraints[RS6000_CONSTRAINT_wd]"

51277

- "@internal")

51278

+ "VSX vector register to hold vector double data or NO_REGS.")

51279

51280

-;; vector float (V4SF)

51281

(define_register_constraint "wf" "rs6000_constraints[RS6000_CONSTRAINT_wf]"

51282

- "@internal")

51283

+ "VSX vector register to hold vector float data or NO_REGS.")

51284

51285

-;; scalar double (DF)

51286

+(define_register_constraint "wg" "rs6000_constraints[RS6000_CONSTRAINT_wg]"

51287

+ "If -mmfpgpr was used, a floating point register or NO_REGS.")

51288

+

51289

+(define_register_constraint "wl" "rs6000_constraints[RS6000_CONSTRAINT_wl]"

51290

+ "Floating point register if the LFIWAX instruction is enabled or NO_REGS.")

51291

+

51292

+(define_register_constraint "wm" "rs6000_constraints[RS6000_CONSTRAINT_wm]"

51293

+ "VSX register if direct move instructions are enabled, or NO_REGS.")

51294

+

51295

+;; NO_REGs register constraint, used to merge mov{sd,sf}, since movsd can use

51296

+;; direct move directly, and movsf can't to move between the register sets.

51297

+;; There is a mode_attr that resolves to wm for SDmode and wn for SFmode

51298

+(define_register_constraint "wn" "NO_REGS" "No register (NO_REGS).")

51299

+

51300

+(define_register_constraint "wr" "rs6000_constraints[RS6000_CONSTRAINT_wr]"

51301

+ "General purpose register if 64-bit instructions are enabled or NO_REGS.")

51302

+

51303

(define_register_constraint "ws" "rs6000_constraints[RS6000_CONSTRAINT_ws]"

51304

- "@internal")

51305

+ "VSX vector register to hold scalar double values or NO_REGS.")

51306

51307

-;; any VSX register

51308

-(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"

51309

- "@internal")

51310

+(define_register_constraint "wt" "rs6000_constraints[RS6000_CONSTRAINT_wt]"

51311

+ "VSX vector register to hold 128 bit integer or NO_REGS.")

51312

51313

+(define_register_constraint "wu" "rs6000_constraints[RS6000_CONSTRAINT_wu]"

51314

+ "Altivec register to use for float/32-bit int loads/stores or NO_REGS.")

51315

+

51316

+(define_register_constraint "wv" "rs6000_constraints[RS6000_CONSTRAINT_wv]"

51317

+ "Altivec register to use for double loads/stores or NO_REGS.")

51318

+

51319

+(define_register_constraint "ww" "rs6000_constraints[RS6000_CONSTRAINT_ww]"

51320

+ "FP or VSX register to perform float operations under -mvsx or NO_REGS.")

51321

+

51322

+(define_register_constraint "wx" "rs6000_constraints[RS6000_CONSTRAINT_wx]"

51323

+ "Floating point register if the STFIWX instruction is enabled or NO_REGS.")

51324

+

51325

+(define_register_constraint "wy" "rs6000_constraints[RS6000_CONSTRAINT_wy]"

51326

+ "VSX vector register to hold scalar float values or NO_REGS.")

51327

+

51328

+(define_register_constraint "wz" "rs6000_constraints[RS6000_CONSTRAINT_wz]"

51329

+ "Floating point register if the LFIWZX instruction is enabled or NO_REGS.")

51330

+

51331

+;; Lq/stq validates the address for load/store quad

51332

+(define_memory_constraint "wQ"

51333

+ "Memory operand suitable for the load/store quad instructions"

51334

+ (match_operand 0 "quad_memory_operand"))

51335

+

51336

;; Altivec style load/store that ignores the bottom bits of the address

51337

(define_memory_constraint "wZ"

51338

"Indexed or indirect memory operand, ignoring the bottom 4 bits"

51339

Index: gcc/config/rs6000/predicates.md

51340

===================================================================

51341

--- a/src/gcc/config/rs6000/predicates.md (.../tags/gcc_4_8_2_release)

51342

+++ b/src/gcc/config/rs6000/predicates.md (.../branches/gcc-4_8-branch)

51343

@@ -124,6 +124,11 @@

51344

(and (match_code "const_int")

51345

(match_test "INTVAL (op) >= -16 && INTVAL (op) <= 15")))

51346

51347

+;; Return 1 if op is a unsigned 3-bit constant integer.

51348

+(define_predicate "u3bit_cint_operand"

51349

+ (and (match_code "const_int")

51350

+ (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))

51351

+

51352

;; Return 1 if op is a unsigned 5-bit constant integer.

51353

(define_predicate "u5bit_cint_operand"

51354

(and (match_code "const_int")

51355

@@ -135,6 +140,11 @@

51356

(and (match_code "const_int")

51357

(match_test "INTVAL (op) >= -128 && INTVAL (op) <= 127")))

51358

51359

+;; Return 1 if op is a unsigned 10-bit constant integer.

51360

+(define_predicate "u10bit_cint_operand"

51361

+ (and (match_code "const_int")

51362

+ (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 1023")))

51363

+

51364

;; Return 1 if op is a constant integer that can fit in a D field.

51365

(define_predicate "short_cint_operand"

51366

(and (match_code "const_int")

51367

@@ -166,6 +176,11 @@

51368

(and (match_code "const_int")

51369

(match_test "IN_RANGE (INTVAL (op), 2, 3)")))

51370

51371

+;; Match op = 0..15

51372

+(define_predicate "const_0_to_15_operand"

51373

+ (and (match_code "const_int")

51374

+ (match_test "IN_RANGE (INTVAL (op), 0, 15)")))

51375

+

51376

;; Return 1 if op is a register that is not special.

51377

(define_predicate "gpc_reg_operand"

51378

(match_operand 0 "register_operand")

51379

@@ -182,9 +197,95 @@

51380

if (REGNO (op) >= ARG_POINTER_REGNUM && !CA_REGNO_P (REGNO (op)))

51381

return 1;

51382

51383

+ if (TARGET_VSX && VSX_REGNO_P (REGNO (op)))

51384

+ return 1;

51385

+

51386

return INT_REGNO_P (REGNO (op)) || FP_REGNO_P (REGNO (op));

51387

})

51388

51389

+;; Return 1 if op is a general purpose register. Unlike gpc_reg_operand, don't

51390

+;; allow floating point or vector registers.

51391

+(define_predicate "int_reg_operand"

51392

+ (match_operand 0 "register_operand")

51393

+{

51394

+ if ((TARGET_E500_DOUBLE || TARGET_SPE) && invalid_e500_subreg (op, mode))

51395

+ return 0;

51396

+

51397

+ if (GET_CODE (op) == SUBREG)

51398

+ op = SUBREG_REG (op);

51399

+

51400

+ if (!REG_P (op))

51401

+ return 0;

51402

+

51403

+ if (REGNO (op) >= FIRST_PSEUDO_REGISTER)

51404

+ return 1;

51405

+

51406

+ return INT_REGNO_P (REGNO (op));

51407

+})

51408

+

51409

+;; Like int_reg_operand, but only return true for base registers

51410

+(define_predicate "base_reg_operand"

51411

+ (match_operand 0 "int_reg_operand")

51412

+{

51413

+ if (GET_CODE (op) == SUBREG)

51414

+ op = SUBREG_REG (op);

51415

+

51416

+ if (!REG_P (op))

51417

+ return 0;

51418

+

51419

+ return (REGNO (op) != FIRST_GPR_REGNO);

51420

+})

51421

+

51422

+;; Return 1 if op is a HTM specific SPR register.

51423

+(define_predicate "htm_spr_reg_operand"

51424

+ (match_operand 0 "register_operand")

51425

+{

51426

+ if (!TARGET_HTM)

51427

+ return 0;

51428

+

51429

+ if (GET_CODE (op) == SUBREG)

51430

+ op = SUBREG_REG (op);

51431

+

51432

+ if (!REG_P (op))

51433

+ return 0;

51434

+

51435

+ switch (REGNO (op))

51436

+ {

51437

+ case TFHAR_REGNO:

51438

+ case TFIAR_REGNO:

51439

+ case TEXASR_REGNO:

51440

+ return 1;

51441

+ default:

51442

+ break;

51443

+ }

51444

+

51445

+ /* Unknown SPR. */

51446

+ return 0;

51447

+})

51448

+

51449

+;; Return 1 if op is a general purpose register that is an even register

51450

+;; which suitable for a load/store quad operation

51451

+(define_predicate "quad_int_reg_operand"

51452

+ (match_operand 0 "register_operand")

51453

+{

51454

+ HOST_WIDE_INT r;

51455

+

51456

+ if (!TARGET_QUAD_MEMORY && !TARGET_QUAD_MEMORY_ATOMIC)

51457

+ return 0;

51458

+

51459

+ if (GET_CODE (op) == SUBREG)

51460

+ op = SUBREG_REG (op);

51461

+

51462

+ if (!REG_P (op))

51463

+ return 0;

51464

+

51465

+ r = REGNO (op);

51466

+ if (r >= FIRST_PSEUDO_REGISTER)

51467

+ return 1;

51468

+

51469

+ return (INT_REGNO_P (r) && ((r & 1) == 0));

51470

+})

51471

+

51472

;; Return 1 if op is a register that is a condition register field.

51473

(define_predicate "cc_reg_operand"

51474

(match_operand 0 "register_operand")

51475

@@ -315,6 +416,11 @@

51476

&& CONST_DOUBLE_HIGH (op) == 0")

51477

(match_operand 0 "gpc_reg_operand"))))

51478

51479

+;; Like reg_or_logical_cint_operand, but allow vsx registers

51480

+(define_predicate "vsx_reg_or_cint_operand"

51481

+ (ior (match_operand 0 "vsx_register_operand")

51482

+ (match_operand 0 "reg_or_logical_cint_operand")))

51483

+

51484

;; Return 1 if operand is a CONST_DOUBLE that can be set in a register

51485

;; with no more than one instruction per word.

51486

(define_predicate "easy_fp_constant"

51487

@@ -333,6 +439,11 @@

51488

&& mode != DImode)

51489

return 1;

51490

51491

+ /* The constant 0.0 is easy under VSX. */

51492

+ if ((mode == SFmode || mode == DFmode || mode == SDmode || mode == DDmode)

51493

+ && VECTOR_UNIT_VSX_P (DFmode) && op == CONST0_RTX (mode))

51494

+ return 1;

51495

+

51496

if (DECIMAL_FLOAT_MODE_P (mode))

51497

return 0;

51498

51499

@@ -521,6 +632,55 @@

51500

(and (match_operand 0 "memory_operand")

51501

(match_test "offsettable_nonstrict_memref_p (op)")))

51502

51503

+;; Return 1 if the operand is suitable for load/store quad memory.

51504

+;; This predicate only checks for non-atomic loads/stores.

51505

+(define_predicate "quad_memory_operand"

51506

+ (match_code "mem")

51507

+{

51508

+ rtx addr, op0, op1;

51509

+ int ret;

51510

+

51511

+ if (!TARGET_QUAD_MEMORY)

51512

+ ret = 0;

51513

+

51514

+ else if (!memory_operand (op, mode))

51515

+ ret = 0;

51516

+

51517

+ else if (GET_MODE_SIZE (GET_MODE (op)) != 16)

51518

+ ret = 0;

51519

+

51520

+ else if (MEM_ALIGN (op) < 128)

51521

+ ret = 0;

51522

+

51523

+ else

51524

+ {

51525

+ addr = XEXP (op, 0);

51526

+ if (int_reg_operand (addr, Pmode))

51527

+ ret = 1;

51528

+

51529

+ else if (GET_CODE (addr) != PLUS)

51530

+ ret = 0;

51531

+

51532

+ else

51533

+ {

51534

+ op0 = XEXP (addr, 0);

51535

+ op1 = XEXP (addr, 1);

51536

+ ret = (int_reg_operand (op0, Pmode)

51537

+ && GET_CODE (op1) == CONST_INT

51538

+ && IN_RANGE (INTVAL (op1), -32768, 32767)

51539

+ && (INTVAL (op1) & 15) == 0);

51540

+ }

51541

+ }

51542

+

51543

+ if (TARGET_DEBUG_ADDR)

51544

+ {

51545

+ fprintf (stderr, "\nquad_memory_operand, ret = %s\n", ret ? "true" : "false");

51546

+ debug_rtx (op);

51547

+ }

51548

+

51549

+ return ret;

51550

+})

51551

+

51552

;; Return 1 if the operand is an indexed or indirect memory operand.

51553

(define_predicate "indexed_or_indirect_operand"

51554

(match_code "mem")

51555

@@ -535,6 +695,19 @@

51556

return indexed_or_indirect_address (op, mode);

51557

})

51558

51559

+;; Like indexed_or_indirect_operand, but also allow a GPR register if direct

51560

+;; moves are supported.

51561

+(define_predicate "reg_or_indexed_operand"

51562

+ (match_code "mem,reg")

51563

+{

51564

+ if (MEM_P (op))

51565

+ return indexed_or_indirect_operand (op, mode);

51566

+ else if (TARGET_DIRECT_MOVE)

51567

+ return register_operand (op, mode);

51568

+ return

51569

+ 0;

51570

+})

51571

+

51572

;; Return 1 if the operand is an indexed or indirect memory operand with an

51573

;; AND -16 in it, used to recognize when we need to switch to Altivec loads

51574

;; to realign loops instead of VSX (altivec silently ignores the bottom bits,

51575

@@ -560,6 +733,28 @@

51576

&& REG_P (XEXP (op, 1)))")

51577

(match_operand 0 "address_operand")))

51578

51579

+;; Return 1 if the operand is an index-form address.

51580

+(define_special_predicate "indexed_address"

51581

+ (match_test "(GET_CODE (op) == PLUS

51582

+ && REG_P (XEXP (op, 0))

51583

+ && REG_P (XEXP (op, 1)))"))

51584

+

51585

+;; Return 1 if the operand is a MEM with an update-form address. This may

51586

+;; also include update-indexed form.

51587

+(define_special_predicate "update_address_mem"

51588

+ (match_test "(MEM_P (op)

51589

+ && (GET_CODE (XEXP (op, 0)) == PRE_INC

51590

+ || GET_CODE (XEXP (op, 0)) == PRE_DEC

51591

+ || GET_CODE (XEXP (op, 0)) == PRE_MODIFY))"))

51592

+

51593

+;; Return 1 if the operand is a MEM with an update-indexed-form address. Note

51594

+;; that PRE_INC/PRE_DEC will always be non-indexed (i.e. non X-form) since the

51595

+;; increment is based on the mode size and will therefor always be a const.

51596

+(define_special_predicate "update_indexed_address_mem"

51597

+ (match_test "(MEM_P (op)

51598

+ && GET_CODE (XEXP (op, 0)) == PRE_MODIFY

51599

+ && indexed_address (XEXP (XEXP (op, 0), 1), mode))"))

51600

+

51601

;; Used for the destination of the fix_truncdfsi2 expander.

51602

;; If stfiwx will be used, the result goes to memory; otherwise,

51603

;; we're going to emit a store and a load of a subreg, so the dest is a

51604

@@ -883,7 +1078,8 @@

51605

(and (match_code "symbol_ref")

51606

(match_test "(DEFAULT_ABI != ABI_AIX || SYMBOL_REF_FUNCTION_P (op))

51607

&& ((SYMBOL_REF_LOCAL_P (op)

51608

- && (DEFAULT_ABI != ABI_AIX

51609

+ && ((DEFAULT_ABI != ABI_AIX

51610

+ && DEFAULT_ABI != ABI_ELFv2)

51611

|| !SYMBOL_REF_EXTERNAL_P (op)))

51612

|| (op == XEXP (DECL_RTL (current_function_decl),

51613

0)))")))

51614

@@ -1364,6 +1560,26 @@

51615

return 1;

51616

})

51617

51618

+;; Return 1 if OP is valid for crsave insn, known to be a PARALLEL.

51619

+(define_predicate "crsave_operation"

51620

+ (match_code "parallel")

51621

+{

51622

+ int count = XVECLEN (op, 0);

51623

+ int i;

51624

+

51625

+ for (i = 1; i < count; i++)

51626

+ {

51627

+ rtx exp = XVECEXP (op, 0, i);

51628

+

51629

+ if (GET_CODE (exp) != USE

51630

+ || GET_CODE (XEXP (exp, 0)) != REG

51631

+ || GET_MODE (XEXP (exp, 0)) != CCmode

51632

+ || ! CR_REGNO_P (REGNO (XEXP (exp, 0))))

51633

+ return 0;

51634

+ }

51635

+ return 1;

51636

+})

51637

+

51638

;; Return 1 if OP is valid for lmw insn, known to be a PARALLEL.

51639

(define_predicate "lmw_operation"

51640

(match_code "parallel")

51641

@@ -1534,3 +1750,99 @@

51642

51643

return GET_CODE (op) == UNSPEC && XINT (op, 1) == UNSPEC_TOCREL;

51644

})

51645

+

51646

+;; Match the first insn (addis) in fusing the combination of addis and loads to

51647

+;; GPR registers on power8.

51648

+(define_predicate "fusion_gpr_addis"

51649

+ (match_code "const_int,high,plus")

51650

+{

51651

+ HOST_WIDE_INT value;

51652

+ rtx int_const;

51653

+

51654

+ if (GET_CODE (op) == HIGH)

51655

+ return 1;

51656

+

51657

+ if (CONST_INT_P (op))

51658

+ int_const = op;

51659

+

51660

+ else if (GET_CODE (op) == PLUS

51661

+ && base_reg_operand (XEXP (op, 0), Pmode)

51662

+ && CONST_INT_P (XEXP (op, 1)))

51663

+ int_const = XEXP (op, 1);

51664

+

51665

+ else

51666

+ return 0;

51667

+

51668

+ /* Power8 currently will only do the fusion if the top 11 bits of the addis

51669

+ value are all 1's or 0's. */

51670

+ value = INTVAL (int_const);

51671

+ if ((value & (HOST_WIDE_INT)0xffff) != 0)

51672

+ return 0;

51673

+

51674

+ if ((value & (HOST_WIDE_INT)0xffff0000) == 0)

51675

+ return 0;

51676

+

51677

+ return (IN_RANGE (value >> 16, -32, 31));

51678

+})

51679

+

51680

+;; Match the second insn (lbz, lhz, lwz, ld) in fusing the combination of addis

51681

+;; and loads to GPR registers on power8.

51682

+(define_predicate "fusion_gpr_mem_load"

51683

+ (match_code "mem,sign_extend,zero_extend")

51684

+{

51685

+ rtx addr;

51686

+

51687

+ /* Handle sign/zero extend. */

51688

+ if (GET_CODE (op) == ZERO_EXTEND

51689

+ || (TARGET_P8_FUSION_SIGN && GET_CODE (op) == SIGN_EXTEND))

51690

+ {

51691

+ op = XEXP (op, 0);

51692

+ mode = GET_MODE (op);

51693

+ }

51694

+

51695

+ if (!MEM_P (op))

51696

+ return 0;

51697

+

51698

+ switch (mode)

51699

+ {

51700

+ case QImode:

51701

+ case HImode:

51702

+ case SImode:

51703

+ break;

51704

+

51705

+ case DImode:

51706

+ if (!TARGET_POWERPC64)

51707

+ return 0;

51708

+ break;

51709

+

51710

+ default:

51711

+ return 0;

51712

+ }

51713

+

51714

+ addr = XEXP (op, 0);

51715

+ if (GET_CODE (addr) == PLUS)

51716

+ {

51717

+ rtx base = XEXP (addr, 0);

51718

+ rtx offset = XEXP (addr, 1);

51719

+

51720

+ return (base_reg_operand (base, GET_MODE (base))

51721

+ && satisfies_constraint_I (offset));

51722

+ }

51723

+

51724

+ else if (GET_CODE (addr) == LO_SUM)

51725

+ {

51726

+ rtx base = XEXP (addr, 0);

51727

+ rtx offset = XEXP (addr, 1);

51728

+

51729

+ if (!base_reg_operand (base, GET_MODE (base)))

51730

+ return 0;

51731

+

51732

+ else if (TARGET_XCOFF || (TARGET_ELF && TARGET_POWERPC64))

51733

+ return small_toc_ref (offset, GET_MODE (offset));

51734

+

51735

+ else if (TARGET_ELF && !TARGET_POWERPC64)

51736

+ return CONSTANT_P (offset);

51737

+ }

51738

+

51739

+ return 0;

51740

+})

51741

Index: gcc/config/rs6000/ppc-asm.h

51742

===================================================================

51743

--- a/src/gcc/config/rs6000/ppc-asm.h (.../tags/gcc_4_8_2_release)

51744

+++ b/src/gcc/config/rs6000/ppc-asm.h (.../branches/gcc-4_8-branch)

51745

@@ -256,7 +256,30 @@

51746

* the real function with one or two leading periods respectively.

51747

*/

51748

51749

-#if defined (__powerpc64__)

51750

+#if defined(__powerpc64__) && _CALL_ELF == 2

51751

+

51752

+/* Defining "toc" above breaks @toc in assembler code. */

51753

+#undef toc

51754

+

51755

+#define FUNC_NAME(name) GLUE(__USER_LABEL_PREFIX__,name)

51756

+#define JUMP_TARGET(name) FUNC_NAME(name)

51757

+#define FUNC_START(name) \

51758

+ .type FUNC_NAME(name),@function; \

51759

+ .globl FUNC_NAME(name); \

51760

+FUNC_NAME(name): \

51761

+0: addis 2,12,(.TOC.-0b)@ha; \

51762

+ addi 2,2,(.TOC.-0b)@l; \

51763

+ .localentry FUNC_NAME(name),.-FUNC_NAME(name)

51764

+

51765

+#define HIDDEN_FUNC(name) \

51766

+ FUNC_START(name) \

51767

+ .hidden FUNC_NAME(name);

51768

+

51769

+#define FUNC_END(name) \

51770

+ .size FUNC_NAME(name),.-FUNC_NAME(name)

51771

+

51772

+#elif defined (__powerpc64__)

51773

+

51774

#define FUNC_NAME(name) GLUE(.,name)

51775

#define JUMP_TARGET(name) FUNC_NAME(name)

51776

#define FUNC_START(name) \

51777

Index: gcc/config/rs6000/htm.md

51778

===================================================================

51779

--- a/src/gcc/config/rs6000/htm.md (.../tags/gcc_4_8_2_release)

51780

+++ b/src/gcc/config/rs6000/htm.md (.../branches/gcc-4_8-branch)

51781

@@ -0,0 +1,366 @@

51782

+;; Hardware Transactional Memory (HTM) patterns.

51783

51784

+;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.

51785

+

51786

+;; This file is part of GCC.

51787

+

51788

+;; GCC is free software; you can redistribute it and/or modify it

51789

+;; under the terms of the GNU General Public License as published

51790

+;; by the Free Software Foundation; either version 3, or (at your

51791

+;; option) any later version.

51792

+

51793

+;; GCC is distributed in the hope that it will be useful, but WITHOUT

51794

+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

51795

+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public

51796

+;; License for more details.

51797

+

51798

+;; You should have received a copy of the GNU General Public License

51799

+;; along with GCC; see the file COPYING3. If not see

51800

+;; <http://www.gnu.org/licenses/>.

51801

+

51802

+(define_constants

51803

+ [(TFHAR_SPR 128)

51804

+ (TFIAR_SPR 129)

51805

+ (TEXASR_SPR 130)

51806

+ (TEXASRU_SPR 131)

51807

+ (MAX_HTM_OPERANDS 4)

51808

+ ])

51809

+

51810

+;;

51811

+;; UNSPEC_VOLATILE usage

51812

+;;

51813

+

51814

+(define_c_enum "unspecv"

51815

+ [UNSPECV_HTM_TABORT

51816

+ UNSPECV_HTM_TABORTDC

51817

+ UNSPECV_HTM_TABORTDCI

51818

+ UNSPECV_HTM_TABORTWC

51819

+ UNSPECV_HTM_TABORTWCI

51820

+ UNSPECV_HTM_TBEGIN

51821

+ UNSPECV_HTM_TCHECK

51822

+ UNSPECV_HTM_TEND

51823

+ UNSPECV_HTM_TRECHKPT

51824

+ UNSPECV_HTM_TRECLAIM

51825

+ UNSPECV_HTM_TSR

51826

+ UNSPECV_HTM_MFSPR

51827

+ UNSPECV_HTM_MTSPR

51828

+ ])

51829

+

51830

+

51831

+(define_expand "tabort"

51832

+ [(set (match_dup 2)

51833

+ (unspec_volatile:CC [(match_operand:SI 1 "int_reg_operand" "")]

51834

+ UNSPECV_HTM_TABORT))

51835

+ (set (match_dup 3)

51836

+ (eq:SI (match_dup 2)

51837

+ (const_int 0)))

51838

+ (set (match_operand:SI 0 "int_reg_operand" "")

51839

+ (minus:SI (const_int 1) (match_dup 3)))]

51840

+ "TARGET_HTM"

51841

+{

51842

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

51843

+ operands[3] = gen_reg_rtx (SImode);

51844

+})

51845

+

51846

+(define_insn "*tabort_internal"

51847

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

51848

+ (unspec_volatile:CC [(match_operand:SI 0 "int_reg_operand" "r")]

51849

+ UNSPECV_HTM_TABORT))]

51850

+ "TARGET_HTM"

51851

+ "tabort. %0"

51852

+ [(set_attr "type" "htm")

51853

+ (set_attr "length" "4")])

51854

+

51855

+(define_expand "tabortdc"

51856

+ [(set (match_dup 4)

51857

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

51858

+ (match_operand:SI 2 "gpc_reg_operand" "r")

51859

+ (match_operand:SI 3 "gpc_reg_operand" "r")]

51860

+ UNSPECV_HTM_TABORTDC))

51861

+ (set (match_dup 5)

51862

+ (eq:SI (match_dup 4)

51863

+ (const_int 0)))

51864

+ (set (match_operand:SI 0 "int_reg_operand" "")

51865

+ (minus:SI (const_int 1) (match_dup 5)))]

51866

+ "TARGET_HTM"

51867

+{

51868

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

51869

+ operands[5] = gen_reg_rtx (SImode);

51870

+})

51871

+

51872

+(define_insn "*tabortdc_internal"

51873

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

51874

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

51875

+ (match_operand:SI 1 "gpc_reg_operand" "r")

51876

+ (match_operand:SI 2 "gpc_reg_operand" "r")]

51877

+ UNSPECV_HTM_TABORTDC))]

51878

+ "TARGET_HTM"

51879

+ "tabortdc. %0,%1,%2"

51880

+ [(set_attr "type" "htm")

51881

+ (set_attr "length" "4")])

51882

+

51883

+(define_expand "tabortdci"

51884

+ [(set (match_dup 4)

51885

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

51886

+ (match_operand:SI 2 "gpc_reg_operand" "r")

51887

+ (match_operand 3 "s5bit_cint_operand" "n")]

51888

+ UNSPECV_HTM_TABORTDCI))

51889

+ (set (match_dup 5)

51890

+ (eq:SI (match_dup 4)

51891

+ (const_int 0)))

51892

+ (set (match_operand:SI 0 "int_reg_operand" "")

51893

+ (minus:SI (const_int 1) (match_dup 5)))]

51894

+ "TARGET_HTM"

51895

+{

51896

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

51897

+ operands[5] = gen_reg_rtx (SImode);

51898

+})

51899

+

51900

+(define_insn "*tabortdci_internal"

51901

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

51902

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

51903

+ (match_operand:SI 1 "gpc_reg_operand" "r")

51904

+ (match_operand 2 "s5bit_cint_operand" "n")]

51905

+ UNSPECV_HTM_TABORTDCI))]

51906

+ "TARGET_HTM"

51907

+ "tabortdci. %0,%1,%2"

51908

+ [(set_attr "type" "htm")

51909

+ (set_attr "length" "4")])

51910

+

51911

+(define_expand "tabortwc"

51912

+ [(set (match_dup 4)

51913

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

51914

+ (match_operand:SI 2 "gpc_reg_operand" "r")

51915

+ (match_operand:SI 3 "gpc_reg_operand" "r")]

51916

+ UNSPECV_HTM_TABORTWC))

51917

+ (set (match_dup 5)

51918

+ (eq:SI (match_dup 4)

51919

+ (const_int 0)))

51920

+ (set (match_operand:SI 0 "int_reg_operand" "")

51921

+ (minus:SI (const_int 1) (match_dup 5)))]

51922

+ "TARGET_HTM"

51923

+{

51924

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

51925

+ operands[5] = gen_reg_rtx (SImode);

51926

+})

51927

+

51928

+(define_insn "*tabortwc_internal"

51929

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

51930

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

51931

+ (match_operand:SI 1 "gpc_reg_operand" "r")

51932

+ (match_operand:SI 2 "gpc_reg_operand" "r")]

51933

+ UNSPECV_HTM_TABORTWC))]

51934

+ "TARGET_HTM"

51935

+ "tabortwc. %0,%1,%2"

51936

+ [(set_attr "type" "htm")

51937

+ (set_attr "length" "4")])

51938

+

51939

+(define_expand "tabortwci"

51940

+ [(set (match_dup 4)

51941

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

51942

+ (match_operand:SI 2 "gpc_reg_operand" "r")

51943

+ (match_operand 3 "s5bit_cint_operand" "n")]

51944

+ UNSPECV_HTM_TABORTWCI))

51945

+ (set (match_dup 5)

51946

+ (eq:SI (match_dup 4)

51947

+ (const_int 0)))

51948

+ (set (match_operand:SI 0 "int_reg_operand" "")

51949

+ (minus:SI (const_int 1) (match_dup 5)))]

51950

+ "TARGET_HTM"

51951

+{

51952

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

51953

+ operands[5] = gen_reg_rtx (SImode);

51954

+})

51955

+

51956

+(define_expand "ttest"

51957

+ [(set (match_dup 1)

51958

+ (unspec_volatile:CC [(const_int 0)

51959

+ (reg:SI 0)

51960

+ (const_int 0)]

51961

+ UNSPECV_HTM_TABORTWCI))

51962

+ (set (subreg:CC (match_dup 2) 0) (match_dup 1))

51963

+ (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 24)))

51964

+ (parallel [(set (match_operand:SI 0 "int_reg_operand" "")

51965

+ (and:SI (match_dup 3) (const_int 15)))

51966

+ (clobber (scratch:CC))])]

51967

+ "TARGET_HTM"

51968

+{

51969

+ operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);

51970

+ operands[2] = gen_reg_rtx (SImode);

51971

+ operands[3] = gen_reg_rtx (SImode);

51972

+})

51973

+

51974

+(define_insn "*tabortwci_internal"

51975

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

51976

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

51977

+ (match_operand:SI 1 "gpc_reg_operand" "r")

51978

+ (match_operand 2 "s5bit_cint_operand" "n")]

51979

+ UNSPECV_HTM_TABORTWCI))]

51980

+ "TARGET_HTM"

51981

+ "tabortwci. %0,%1,%2"

51982

+ [(set_attr "type" "htm")

51983

+ (set_attr "length" "4")])

51984

+

51985

+(define_expand "tbegin"

51986

+ [(set (match_dup 2)

51987

+ (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]

51988

+ UNSPECV_HTM_TBEGIN))

51989

+ (set (match_dup 3)

51990

+ (eq:SI (match_dup 2)

51991

+ (const_int 0)))

51992

+ (set (match_operand:SI 0 "int_reg_operand" "")

51993

+ (minus:SI (const_int 1) (match_dup 3)))]

51994

+ "TARGET_HTM"

51995

+{

51996

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

51997

+ operands[3] = gen_reg_rtx (SImode);

51998

+})

51999

+

52000

+(define_insn "*tbegin_internal"

52001

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

52002

+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]

52003

+ UNSPECV_HTM_TBEGIN))]

52004

+ "TARGET_HTM"

52005

+ "tbegin. %0"

52006

+ [(set_attr "type" "htm")

52007

+ (set_attr "length" "4")])

52008

+

52009

+(define_expand "tcheck"

52010

+ [(set (match_dup 2)

52011

+ (unspec_volatile:CC [(match_operand 1 "u3bit_cint_operand" "n")]

52012

+ UNSPECV_HTM_TCHECK))

52013

+ (set (match_dup 3)

52014

+ (eq:SI (match_dup 2)

52015

+ (const_int 0)))

52016

+ (set (match_operand:SI 0 "int_reg_operand" "")

52017

+ (minus:SI (const_int 1) (match_dup 3)))]

52018

+ "TARGET_HTM"

52019

+{

52020

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

52021

+ operands[3] = gen_reg_rtx (SImode);

52022

+})

52023

+

52024

+(define_insn "*tcheck_internal"

52025

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

52026

+ (unspec_volatile:CC [(match_operand 0 "u3bit_cint_operand" "n")]

52027

+ UNSPECV_HTM_TCHECK))]

52028

+ "TARGET_HTM"

52029

+ "tcheck. %0"

52030

+ [(set_attr "type" "htm")

52031

+ (set_attr "length" "4")])

52032

+

52033

+(define_expand "tend"

52034

+ [(set (match_dup 2)

52035

+ (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]

52036

+ UNSPECV_HTM_TEND))

52037

+ (set (match_dup 3)

52038

+ (eq:SI (match_dup 2)

52039

+ (const_int 0)))

52040

+ (set (match_operand:SI 0 "int_reg_operand" "")

52041

+ (minus:SI (const_int 1) (match_dup 3)))]

52042

+ "TARGET_HTM"

52043

+{

52044

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

52045

+ operands[3] = gen_reg_rtx (SImode);

52046

+})

52047

+

52048

+(define_insn "*tend_internal"

52049

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

52050

+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]

52051

+ UNSPECV_HTM_TEND))]

52052

+ "TARGET_HTM"

52053

+ "tend. %0"

52054

+ [(set_attr "type" "htm")

52055

+ (set_attr "length" "4")])

52056

+

52057

+(define_expand "trechkpt"

52058

+ [(set (match_dup 1)

52059

+ (unspec_volatile:CC [(const_int 0)]

52060

+ UNSPECV_HTM_TRECHKPT))

52061

+ (set (match_dup 2)

52062

+ (eq:SI (match_dup 1)

52063

+ (const_int 0)))

52064

+ (set (match_operand:SI 0 "int_reg_operand" "")

52065

+ (minus:SI (const_int 1) (match_dup 2)))]

52066

+ "TARGET_HTM"

52067

+{

52068

+ operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);

52069

+ operands[2] = gen_reg_rtx (SImode);

52070

+})

52071

+

52072

+(define_insn "*trechkpt_internal"

52073

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x")

52074

+ (unspec_volatile:CC [(const_int 0)]

52075

+ UNSPECV_HTM_TRECHKPT))]

52076

+ "TARGET_HTM"

52077

+ "trechkpt."

52078

+ [(set_attr "type" "htm")

52079

+ (set_attr "length" "4")])

52080

+

52081

+(define_expand "treclaim"

52082

+ [(set (match_dup 2)

52083

+ (unspec_volatile:CC [(match_operand:SI 1 "gpc_reg_operand" "r")]

52084

+ UNSPECV_HTM_TRECLAIM))

52085

+ (set (match_dup 3)

52086

+ (eq:SI (match_dup 2)

52087

+ (const_int 0)))

52088

+ (set (match_operand:SI 0 "int_reg_operand" "")

52089

+ (minus:SI (const_int 1) (match_dup 3)))]

52090

+ "TARGET_HTM"

52091

+{

52092

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

52093

+ operands[3] = gen_reg_rtx (SImode);

52094

+})

52095

+

52096

+(define_insn "*treclaim_internal"

52097

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

52098

+ (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]

52099

+ UNSPECV_HTM_TRECLAIM))]

52100

+ "TARGET_HTM"

52101

+ "treclaim. %0"

52102

+ [(set_attr "type" "htm")

52103

+ (set_attr "length" "4")])

52104

+

52105

+(define_expand "tsr"

52106

+ [(set (match_dup 2)

52107

+ (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]

52108

+ UNSPECV_HTM_TSR))

52109

+ (set (match_dup 3)

52110

+ (eq:SI (match_dup 2)

52111

+ (const_int 0)))

52112

+ (set (match_operand:SI 0 "int_reg_operand" "")

52113

+ (minus:SI (const_int 1) (match_dup 3)))]

52114

+ "TARGET_HTM"

52115

+{

52116

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

52117

+ operands[3] = gen_reg_rtx (SImode);

52118

+})

52119

+

52120

+(define_insn "*tsr_internal"

52121

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

52122

+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]

52123

+ UNSPECV_HTM_TSR))]

52124

+ "TARGET_HTM"

52125

+ "tsr. %0"

52126

+ [(set_attr "type" "htm")

52127

+ (set_attr "length" "4")])

52128

+

52129

+(define_insn "htm_mfspr_<mode>"

52130

+ [(set (match_operand:P 0 "gpc_reg_operand" "=r")

52131

+ (unspec_volatile:P [(match_operand 1 "u10bit_cint_operand" "n")

52132

+ (match_operand:P 2 "htm_spr_reg_operand" "")]

52133

+ UNSPECV_HTM_MFSPR))]

52134

+ "TARGET_HTM"

52135

+ "mfspr %0,%1";

52136

+ [(set_attr "type" "htm")

52137

+ (set_attr "length" "4")])

52138

+

52139

+(define_insn "htm_mtspr_<mode>"

52140

+ [(set (match_operand:P 2 "htm_spr_reg_operand" "")

52141

+ (unspec_volatile:P [(match_operand:P 0 "gpc_reg_operand" "r")

52142

+ (match_operand 1 "u10bit_cint_operand" "n")]

52143

+ UNSPECV_HTM_MTSPR))]

52144

+ "TARGET_HTM"

52145

+ "mtspr %1,%0";

52146

+ [(set_attr "type" "htm")

52147

+ (set_attr "length" "4")])

52148

Index: gcc/config/rs6000/rs6000-modes.def

52149

===================================================================

52150

--- a/src/gcc/config/rs6000/rs6000-modes.def (.../tags/gcc_4_8_2_release)

52151

+++ b/src/gcc/config/rs6000/rs6000-modes.def (.../branches/gcc-4_8-branch)

52152

@@ -38,6 +38,12 @@

52153

VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */

52154

VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */

52155

VECTOR_MODE (INT, DI, 1);

52156

+VECTOR_MODE (INT, TI, 1);

52157

VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */

52158

VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */

52159

VECTOR_MODES (FLOAT, 32); /* V16HF V8SF V4DF */

52160

+

52161

+/* Replacement for TImode that only is allowed in GPRs. We also use PTImode

52162

+ for quad memory atomic operations to force getting an even/odd register

52163

+ combination. */

52164

+PARTIAL_INT_MODE (TI);

52165

Index: gcc/config/rs6000/rs6000-cpus.def

52166

===================================================================

52167

--- a/src/gcc/config/rs6000/rs6000-cpus.def (.../tags/gcc_4_8_2_release)

52168

+++ b/src/gcc/config/rs6000/rs6000-cpus.def (.../branches/gcc-4_8-branch)

52169

@@ -28,7 +28,7 @@

52170

ALTIVEC, since in general it isn't a win on power6. In ISA 2.04, fsel,

52171

fre, fsqrt, etc. were no longer documented as optional. Group masks by

52172

server and embedded. */

52173

-#define ISA_2_5_MASKS_EMBEDDED (ISA_2_2_MASKS \

52174

+#define ISA_2_5_MASKS_EMBEDDED (ISA_2_4_MASKS \

52175

| OPTION_MASK_CMPB \

52176

| OPTION_MASK_RECIP_PRECISION \

52177

| OPTION_MASK_PPC_GFXOPT \

52178

@@ -38,6 +38,8 @@

52179

52180

/* For ISA 2.06, don't add ISEL, since in general it isn't a win, but

52181

altivec is a win so enable it. */

52182

+ /* OPTION_MASK_VSX_TIMODE should be set, but disable it for now until

52183

+ PR 58587 is fixed. */

52184

#define ISA_2_6_MASKS_EMBEDDED (ISA_2_5_MASKS_EMBEDDED | OPTION_MASK_POPCNTD)

52185

#define ISA_2_6_MASKS_SERVER (ISA_2_5_MASKS_SERVER \

52186

| OPTION_MASK_POPCNTD \

52187

@@ -44,6 +46,16 @@

52188

| OPTION_MASK_ALTIVEC \

52189

| OPTION_MASK_VSX)

52190

52191

+/* For now, don't provide an embedded version of ISA 2.07. */

52192

+#define ISA_2_7_MASKS_SERVER (ISA_2_6_MASKS_SERVER \

52193

+ | OPTION_MASK_P8_FUSION \

52194

+ | OPTION_MASK_P8_VECTOR \

52195

+ | OPTION_MASK_CRYPTO \

52196

+ | OPTION_MASK_DIRECT_MOVE \

52197

+ | OPTION_MASK_HTM \

52198

+ | OPTION_MASK_QUAD_MEMORY \

52199

+ | OPTION_MASK_QUAD_MEMORY_ATOMIC)

52200

+

52201

#define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)

52202

52203

/* Deal with ports that do not have -mstrict-align. */

52204

@@ -60,23 +72,30 @@

52205

/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */

52206

#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \

52207

| OPTION_MASK_CMPB \

52208

+ | OPTION_MASK_CRYPTO \

52209

| OPTION_MASK_DFP \

52210

+ | OPTION_MASK_DIRECT_MOVE \

52211

| OPTION_MASK_DLMZB \

52212

| OPTION_MASK_FPRND \

52213

+ | OPTION_MASK_HTM \

52214

| OPTION_MASK_ISEL \

52215

| OPTION_MASK_MFCRF \

52216

| OPTION_MASK_MFPGPR \

52217

| OPTION_MASK_MULHW \

52218

| OPTION_MASK_NO_UPDATE \

52219

+ | OPTION_MASK_P8_FUSION \

52220

+ | OPTION_MASK_P8_VECTOR \

52221

| OPTION_MASK_POPCNTB \

52222

| OPTION_MASK_POPCNTD \

52223

| OPTION_MASK_POWERPC64 \

52224

| OPTION_MASK_PPC_GFXOPT \

52225

| OPTION_MASK_PPC_GPOPT \

52226

+ | OPTION_MASK_QUAD_MEMORY \

52227

| OPTION_MASK_RECIP_PRECISION \

52228

| OPTION_MASK_SOFT_FLOAT \

52229

| OPTION_MASK_STRICT_ALIGN_OPTIONAL \

52230

- | OPTION_MASK_VSX)

52231

+ | OPTION_MASK_VSX \

52232

+ | OPTION_MASK_VSX_TIMODE)

52233

52234

#endif

52235

52236

@@ -166,10 +185,7 @@

52237

POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF

52238

52239

| MASK_VSX | MASK_RECIP_PRECISION)

52240

-RS6000_CPU ("power8", PROCESSOR_POWER7, /* Don't add MASK_ISEL by default */

52241

- POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF

52242

52243

- | MASK_VSX | MASK_RECIP_PRECISION)

52244

+RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)

52245

RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)

52246

RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)

52247

RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)

52248

Index: gcc/config/rs6000/t-linux64bele

52249

===================================================================

52250

--- a/src/gcc/config/rs6000/t-linux64bele (.../tags/gcc_4_8_2_release)

52251

+++ b/src/gcc/config/rs6000/t-linux64bele (.../branches/gcc-4_8-branch)

52252

@@ -0,0 +1,7 @@

52253

+#rs6000/t-linux64end

52254

+

52255

+MULTILIB_OPTIONS += mlittle

52256

+MULTILIB_DIRNAMES += le

52257

+MULTILIB_OSDIRNAMES += $(subst =,.mlittle=,$(subst lible32,lib32le,$(subst lible64,lib64le,$(subst lib,lible,$(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))))))

52258

+MULTILIB_OSDIRNAMES += $(subst $(if $(findstring 64,$(target)),m64,m32).,,$(filter $(if $(findstring 64,$(target)),m64,m32).mlittle%,$(MULTILIB_OSDIRNAMES)))

52259

+MULTILIB_MATCHES := ${MULTILIB_MATCHES_ENDIAN}

52260

Index: gcc/config/rs6000/htmintrin.h

52261

===================================================================

52262

--- a/src/gcc/config/rs6000/htmintrin.h (.../tags/gcc_4_8_2_release)

52263

+++ b/src/gcc/config/rs6000/htmintrin.h (.../branches/gcc-4_8-branch)

52264

@@ -0,0 +1,131 @@

52265

+/* Hardware Transactional Memory (HTM) intrinsics.

52266

52267

+ Contributed by Peter Bergner <bergner@vnet.ibm.com>.

52268

+

52269

+ This file is free software; you can redistribute it and/or modify it under

52270

+ the terms of the GNU General Public License as published by the Free

52271

+ Software Foundation; either version 3 of the License, or (at your option)

52272

+ any later version.

52273

+

52274

+ This file is distributed in the hope that it will be useful, but WITHOUT

52275

+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

52276

+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License

52277

+ for more details.

52278

+

52279

+ Under Section 7 of GPL version 3, you are granted additional

52280

+ permissions described in the GCC Runtime Library Exception, version

52281

+ 3.1, as published by the Free Software Foundation.

52282

+

52283

+ You should have received a copy of the GNU General Public License and

52284

+ a copy of the GCC Runtime Library Exception along with this program;

52285

+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see

52286

+ <http://www.gnu.org/licenses/>. */

52287

+

52288

+#ifndef __HTM__

52289

+# error "HTM instruction set not enabled"

52290

+#endif /* __HTM__ */

52291

+

52292

+#ifndef _HTMINTRIN_H

52293

+#define _HTMINTRIN_H

52294

+

52295

+#include <stdint.h>

52296

+

52297

+typedef uint64_t texasr_t;

52298

+typedef uint32_t texasru_t;

52299

+typedef uint32_t texasrl_t;

52300

+typedef uintptr_t tfiar_t;

52301

+typedef uintptr_t tfhar_t;

52302

+

52303

+#define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)

52304

+#define _HTM_NONTRANSACTIONAL 0x0

52305

+#define _HTM_SUSPENDED 0x1

52306

+#define _HTM_TRANSACTIONAL 0x2

52307

+

52308

+/* The following macros use the IBM bit numbering for BITNUM

52309

+ as used in the ISA documentation. */

52310

+

52311

+#define _TEXASR_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \

52312

+ (((TEXASR) >> (63-(BITNUM))) & ((1<<(SIZE))-1))

52313

+#define _TEXASRU_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \

52314

+ (((TEXASR) >> (31-(BITNUM))) & ((1<<(SIZE))-1))

52315

+

52316

+#define _TEXASR_FAILURE_CODE(TEXASR) \

52317

+ _TEXASR_EXTRACT_BITS(TEXASR, 7, 8)

52318

+#define _TEXASRU_FAILURE_CODE(TEXASRU) \

52319

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 8)

52320

+

52321

+#define _TEXASR_FAILURE_PERSISTENT(TEXASR) \

52322

+ _TEXASR_EXTRACT_BITS(TEXASR, 7, 1)

52323

+#define _TEXASRU_FAILURE_PERSISTENT(TEXASRU) \

52324

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 1)

52325

+

52326

+#define _TEXASR_DISALLOWED(TEXASR) \

52327

+ _TEXASR_EXTRACT_BITS(TEXASR, 8, 1)

52328

+#define _TEXASRU_DISALLOWED(TEXASRU) \

52329

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 8, 1)

52330

+

52331

+#define _TEXASR_NESTING_OVERFLOW(TEXASR) \

52332

+ _TEXASR_EXTRACT_BITS(TEXASR, 9, 1)

52333

+#define _TEXASRU_NESTING_OVERFLOW(TEXASRU) \

52334

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 9, 1)

52335

+

52336

+#define _TEXASR_FOOTPRINT_OVERFLOW(TEXASR) \

52337

+ _TEXASR_EXTRACT_BITS(TEXASR, 10, 1)

52338

+#define _TEXASRU_FOOTPRINT_OVERFLOW(TEXASRU) \

52339

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 10, 1)

52340

+

52341

+#define _TEXASR_SELF_INDUCED_CONFLICT(TEXASR) \

52342

+ _TEXASR_EXTRACT_BITS(TEXASR, 11, 1)

52343

+#define _TEXASRU_SELF_INDUCED_CONFLICT(TEXASRU) \

52344

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 11, 1)

52345

+

52346

+#define _TEXASR_NON_TRANSACTIONAL_CONFLICT(TEXASR) \

52347

+ _TEXASR_EXTRACT_BITS(TEXASR, 12, 1)

52348

+#define _TEXASRU_NON_TRANSACTIONAL_CONFLICT(TEXASRU) \

52349

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 12, 1)

52350

+

52351

+#define _TEXASR_TRANSACTION_CONFLICT(TEXASR) \

52352

+ _TEXASR_EXTRACT_BITS(TEXASR, 13, 1)

52353

+#define _TEXASRU_TRANSACTION_CONFLICT(TEXASRU) \

52354

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 13, 1)

52355

+

52356

+#define _TEXASR_TRANSLATION_INVALIDATION_CONFLICT(TEXASR) \

52357

+ _TEXASR_EXTRACT_BITS(TEXASR, 14, 1)

52358

+#define _TEXASRU_TRANSLATION_INVALIDATION_CONFLICT(TEXASRU) \

52359

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 14, 1)

52360

+

52361

+#define _TEXASR_IMPLEMENTAION_SPECIFIC(TEXASR) \

52362

+ _TEXASR_EXTRACT_BITS(TEXASR, 15, 1)

52363

+#define _TEXASRU_IMPLEMENTAION_SPECIFIC(TEXASRU) \

52364

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 15, 1)

52365

+

52366

+#define _TEXASR_INSTRUCTION_FETCH_CONFLICT(TEXASR) \

52367

+ _TEXASR_EXTRACT_BITS(TEXASR, 16, 1)

52368

+#define _TEXASRU_INSTRUCTION_FETCH_CONFLICT(TEXASRU) \

52369

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 16, 1)

52370

+

52371

+#define _TEXASR_ABORT(TEXASR) \

52372

+ _TEXASR_EXTRACT_BITS(TEXASR, 31, 1)

52373

+#define _TEXASRU_ABORT(TEXASRU) \

52374

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 31, 1)

52375

+

52376

+

52377

+#define _TEXASR_SUSPENDED(TEXASR) \

52378

+ _TEXASR_EXTRACT_BITS(TEXASR, 32, 1)

52379

+

52380

+#define _TEXASR_PRIVILEGE(TEXASR) \

52381

+ _TEXASR_EXTRACT_BITS(TEXASR, 35, 2)

52382

+

52383

+#define _TEXASR_FAILURE_SUMMARY(TEXASR) \

52384

+ _TEXASR_EXTRACT_BITS(TEXASR, 36, 1)

52385

+

52386

+#define _TEXASR_TFIAR_EXACT(TEXASR) \

52387

+ _TEXASR_EXTRACT_BITS(TEXASR, 37, 1)

52388

+

52389

+#define _TEXASR_ROT(TEXASR) \

52390

+ _TEXASR_EXTRACT_BITS(TEXASR, 38, 1)

52391

+

52392

+#define _TEXASR_TRANSACTION_LEVEL(TEXASR) \

52393

+ _TEXASR_EXTRACT_BITS(TEXASR, 63, 12)

52394

+

52395

+#endif /* _HTMINTRIN_H */

52396

Index: gcc/config/rs6000/rs6000-protos.h

52397

===================================================================

52398

--- a/src/gcc/config/rs6000/rs6000-protos.h (.../tags/gcc_4_8_2_release)

52399

+++ b/src/gcc/config/rs6000/rs6000-protos.h (.../branches/gcc-4_8-branch)

52400

@@ -50,12 +50,19 @@

52401

extern rtx find_addr_reg (rtx);

52402

extern rtx gen_easy_altivec_constant (rtx);

52403

extern const char *output_vec_const_move (rtx *);

52404

+extern const char *rs6000_output_move_128bit (rtx *);

52405

+extern bool rs6000_move_128bit_ok_p (rtx []);

52406

+extern bool rs6000_split_128bit_ok_p (rtx []);

52407

extern void rs6000_expand_vector_init (rtx, rtx);

52408

extern void paired_expand_vector_init (rtx, rtx);

52409

extern void rs6000_expand_vector_set (rtx, rtx, int);

52410

extern void rs6000_expand_vector_extract (rtx, rtx, int);

52411

extern bool altivec_expand_vec_perm_const (rtx op[4]);

52412

+extern void altivec_expand_vec_perm_le (rtx op[4]);

52413

extern bool rs6000_expand_vec_perm_const (rtx op[4]);

52414

+extern void altivec_expand_lvx_be (rtx, rtx, enum machine_mode, unsigned);

52415

+extern void altivec_expand_stvx_be (rtx, rtx, enum machine_mode, unsigned);

52416

+extern void altivec_expand_stvex_be (rtx, rtx, enum machine_mode, unsigned);

52417

extern void rs6000_expand_extract_even (rtx, rtx, rtx);

52418

extern void rs6000_expand_interleave (rtx, rtx, rtx, bool);

52419

extern void build_mask64_2_operands (rtx, rtx *);

52420

@@ -70,6 +77,11 @@

52421

extern int registers_ok_for_quad_peep (rtx, rtx);

52422

extern int mems_ok_for_quad_peep (rtx, rtx);

52423

extern bool gpr_or_gpr_p (rtx, rtx);

52424

+extern bool direct_move_p (rtx, rtx);

52425

+extern bool quad_load_store_p (rtx, rtx);

52426

+extern bool fusion_gpr_load_p (rtx *, bool);

52427

+extern void expand_fusion_gpr_load (rtx *);

52428

+extern const char *emit_fusion_gpr_load (rtx *);

52429

extern enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx,

52430

enum reg_class);

52431

extern enum reg_class (*rs6000_secondary_reload_class_ptr) (enum reg_class,

52432

@@ -116,6 +128,7 @@

52433

extern void rs6000_fatal_bad_address (rtx);

52434

extern rtx create_TOC_reference (rtx, rtx);

52435

extern void rs6000_split_multireg_move (rtx, rtx);

52436

+extern void rs6000_emit_le_vsx_move (rtx, rtx, enum machine_mode);

52437

extern void rs6000_emit_move (rtx, rtx, enum machine_mode);

52438

extern rtx rs6000_secondary_memory_needed_rtx (enum machine_mode);

52439

extern rtx (*rs6000_legitimize_reload_address_ptr) (rtx, enum machine_mode,

52440

@@ -135,9 +148,11 @@

52441

extern rtx rs6000_address_for_altivec (rtx);

52442

extern rtx rs6000_allocate_stack_temp (enum machine_mode, bool, bool);

52443

extern int rs6000_loop_align (rtx);

52444

+extern void rs6000_split_logical (rtx [], enum rtx_code, bool, bool, bool, rtx);

52445

#endif /* RTX_CODE */

52446

52447

#ifdef TREE_CODE

52448

+extern unsigned int rs6000_data_alignment (tree, unsigned int, enum data_align);

52449

extern unsigned int rs6000_special_round_type_align (tree, unsigned int,

52450

unsigned int);

52451

extern unsigned int darwin_rs6000_special_round_type_align (tree, unsigned int,

52452

@@ -146,6 +161,7 @@

52453

extern rtx rs6000_libcall_value (enum machine_mode);

52454

extern rtx rs6000_va_arg (tree, tree);

52455

extern int function_ok_for_sibcall (tree);

52456

+extern int rs6000_reg_parm_stack_space (tree);

52457

extern void rs6000_elf_declare_function_name (FILE *, const char *, tree);

52458

extern bool rs6000_elf_in_small_data_p (const_tree);

52459

#ifdef ARGS_SIZE_RTX

52460

@@ -170,7 +186,8 @@

52461

extern void rs6000_emit_epilogue (int);

52462

extern void rs6000_emit_eh_reg_restore (rtx, rtx);

52463

extern const char * output_isel (rtx *);

52464

-extern void rs6000_call_indirect_aix (rtx, rtx, rtx);

52465

+extern void rs6000_call_aix (rtx, rtx, rtx, rtx);

52466

+extern void rs6000_sibcall_aix (rtx, rtx, rtx, rtx);

52467

extern void rs6000_aix_asm_output_dwarf_table_ref (char *);

52468

extern void get_ppc476_thunk_name (char name[32]);

52469

extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins);

52470

Index: gcc/config/rs6000/t-rs6000

52471

===================================================================

52472

--- a/src/gcc/config/rs6000/t-rs6000 (.../tags/gcc_4_8_2_release)

52473

+++ b/src/gcc/config/rs6000/t-rs6000 (.../branches/gcc-4_8-branch)

52474

@@ -60,6 +60,7 @@

52475

$(srcdir)/config/rs6000/power5.md \

52476

$(srcdir)/config/rs6000/power6.md \

52477

$(srcdir)/config/rs6000/power7.md \

52478

+ $(srcdir)/config/rs6000/power8.md \

52479

$(srcdir)/config/rs6000/cell.md \

52480

$(srcdir)/config/rs6000/xfpu.md \

52481

$(srcdir)/config/rs6000/a2.md \

52482

@@ -70,6 +71,8 @@

52483

$(srcdir)/config/rs6000/vector.md \

52484

$(srcdir)/config/rs6000/vsx.md \

52485

$(srcdir)/config/rs6000/altivec.md \

52486

+ $(srcdir)/config/rs6000/crypto.md \

52487

+ $(srcdir)/config/rs6000/htm.md \

52488

$(srcdir)/config/rs6000/spe.md \

52489

$(srcdir)/config/rs6000/dfp.md \

52490

$(srcdir)/config/rs6000/paired.md

52491

Index: gcc/config/rs6000/htmxlintrin.h

52492

===================================================================

52493

--- a/src/gcc/config/rs6000/htmxlintrin.h (.../tags/gcc_4_8_2_release)

52494

+++ b/src/gcc/config/rs6000/htmxlintrin.h (.../branches/gcc-4_8-branch)

52495

@@ -0,0 +1,208 @@

52496

+/* XL compiler Hardware Transactional Memory (HTM) execution intrinsics.

52497

52498

+ Contributed by Peter Bergner <bergner@vnet.ibm.com>.

52499

+

52500

+ This file is free software; you can redistribute it and/or modify it under

52501

+ the terms of the GNU General Public License as published by the Free

52502

+ Software Foundation; either version 3 of the License, or (at your option)

52503

+ any later version.

52504

+

52505

+ This file is distributed in the hope that it will be useful, but WITHOUT

52506

+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

52507

+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License

52508

+ for more details.

52509

+

52510

+ Under Section 7 of GPL version 3, you are granted additional

52511

+ permissions described in the GCC Runtime Library Exception, version

52512

+ 3.1, as published by the Free Software Foundation.

52513

+

52514

+ You should have received a copy of the GNU General Public License and

52515

+ a copy of the GCC Runtime Library Exception along with this program;

52516

+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see

52517

+ <http://www.gnu.org/licenses/>. */

52518

+

52519

+#ifndef __HTM__

52520

+# error "HTM instruction set not enabled"

52521

+#endif /* __HTM__ */

52522

+

52523

+#ifndef _HTMXLINTRIN_H

52524

+#define _HTMXLINTRIN_H

52525

+

52526

+#include <stdint.h>

52527

+#include <htmintrin.h>

52528

+

52529

+#ifdef __cplusplus

52530

+extern "C" {

52531

+#endif

52532

+

52533

+#define _TEXASR_PTR(TM_BUF) \

52534

+ ((texasr_t *)((TM_BUF)+0))

52535

+#define _TEXASRU_PTR(TM_BUF) \

52536

+ ((texasru_t *)((TM_BUF)+0))

52537

+#define _TEXASRL_PTR(TM_BUF) \

52538

+ ((texasrl_t *)((TM_BUF)+4))

52539

+#define _TFIAR_PTR(TM_BUF) \

52540

+ ((tfiar_t *)((TM_BUF)+8))

52541

+

52542

+typedef char TM_buff_type[16];

52543

+

52544

+extern __inline long

52545

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52546

+__TM_simple_begin (void)

52547

+{

52548

+ if (__builtin_expect (__builtin_tbegin (0), 1))

52549

+ return 1;

52550

+ return 0;

52551

+}

52552

+

52553

+extern __inline long

52554

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52555

+__TM_begin (void* const TM_buff)

52556

+{

52557

+ *_TEXASRL_PTR (TM_buff) = 0;

52558

+ if (__builtin_expect (__builtin_tbegin (0), 1))

52559

+ return 1;

52560

+#ifdef __powerpc64__

52561

+ *_TEXASR_PTR (TM_buff) = __builtin_get_texasr ();

52562

+#else

52563

+ *_TEXASRU_PTR (TM_buff) = __builtin_get_texasru ();

52564

+ *_TEXASRL_PTR (TM_buff) = __builtin_get_texasr ();

52565

+#endif

52566

+ *_TFIAR_PTR (TM_buff) = __builtin_get_tfiar ();

52567

+ return 0;

52568

+}

52569

+

52570

+extern __inline long

52571

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52572

+__TM_end (void)

52573

+{

52574

+ if (__builtin_expect (__builtin_tend (0), 1))

52575

+ return 1;

52576

+ return 0;

52577

+}

52578

+

52579

+extern __inline void

52580

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52581

+__TM_abort (void)

52582

+{

52583

+ __builtin_tabort (0);

52584

+}

52585

+

52586

+extern __inline void

52587

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52588

+__TM_named_abort (unsigned char const code)

52589

+{

52590

+ __builtin_tabort (code);

52591

+}

52592

+

52593

+extern __inline void

52594

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52595

+__TM_resume (void)

52596

+{

52597

+ __builtin_tresume ();

52598

+}

52599

+

52600

+extern __inline void

52601

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52602

+__TM_suspend (void)

52603

+{

52604

+ __builtin_tsuspend ();

52605

+}

52606

+

52607

+extern __inline long

52608

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52609

+__TM_is_user_abort (void* const TM_buff)

52610

+{

52611

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

52612

+ return _TEXASRU_ABORT (texasru);

52613

+}

52614

+

52615

+extern __inline long

52616

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52617

+__TM_is_named_user_abort (void* const TM_buff, unsigned char *code)

52618

+{

52619

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

52620

+

52621

+ *code = _TEXASRU_FAILURE_CODE (texasru);

52622

+ return _TEXASRU_ABORT (texasru);

52623

+}

52624

+

52625

+extern __inline long

52626

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52627

+__TM_is_illegal (void* const TM_buff)

52628

+{

52629

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

52630

+ return _TEXASRU_DISALLOWED (texasru);

52631

+}

52632

+

52633

+extern __inline long

52634

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52635

+__TM_is_footprint_exceeded (void* const TM_buff)

52636

+{

52637

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

52638

+ return _TEXASRU_FOOTPRINT_OVERFLOW (texasru);

52639

+}

52640

+

52641

+extern __inline long

52642

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52643

+__TM_nesting_depth (void* const TM_buff)

52644

+{

52645

+ texasrl_t texasrl;

52646

+

52647

+ if (_HTM_STATE (__builtin_ttest ()) == _HTM_NONTRANSACTIONAL)

52648

+ {

52649

+ texasrl = *_TEXASRL_PTR (TM_buff);

52650

+ if (!_TEXASR_FAILURE_SUMMARY (texasrl))

52651

+ texasrl = 0;

52652

+ }

52653

+ else

52654

+ texasrl = (texasrl_t) __builtin_get_texasr ();

52655

+

52656

+ return _TEXASR_TRANSACTION_LEVEL (texasrl);

52657

+}

52658

+

52659

+extern __inline long

52660

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52661

+__TM_is_nested_too_deep(void* const TM_buff)

52662

+{

52663

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

52664

+ return _TEXASRU_NESTING_OVERFLOW (texasru);

52665

+}

52666

+

52667

+extern __inline long

52668

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52669

+__TM_is_conflict(void* const TM_buff)

52670

+{

52671

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

52672

+ /* Return TEXASR bits 11 (Self-Induced Conflict) through

52673

+ 14 (Translation Invalidation Conflict). */

52674

+ return (_TEXASRU_EXTRACT_BITS (texasru, 14, 4)) ? 1 : 0;

52675

+}

52676

+

52677

+extern __inline long

52678

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52679

+__TM_is_failure_persistent(void* const TM_buff)

52680

+{

52681

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

52682

+ return _TEXASRU_FAILURE_PERSISTENT (texasru);

52683

+}

52684

+

52685

+extern __inline long

52686

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52687

+__TM_failure_address(void* const TM_buff)

52688

+{

52689

+ return *_TFIAR_PTR (TM_buff);

52690

+}

52691

+

52692

+extern __inline long long

52693

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

52694

+__TM_failure_code(void* const TM_buff)

52695

+{

52696

+ return *_TEXASR_PTR (TM_buff);

52697

+}

52698

+

52699

+#ifdef __cplusplus

52700

+}

52701

+#endif

52702

+

52703

+#endif /* _HTMXLINTRIN_H */

52704

Index: gcc/config/rs6000/rs6000-builtin.def

52705

===================================================================

52706

--- a/src/gcc/config/rs6000/rs6000-builtin.def (.../tags/gcc_4_8_2_release)

52707

+++ b/src/gcc/config/rs6000/rs6000-builtin.def (.../branches/gcc-4_8-branch)

52708

@@ -30,7 +30,8 @@

52709

RS6000_BUILTIN_A -- ABS builtins

52710

RS6000_BUILTIN_D -- DST builtins

52711

RS6000_BUILTIN_E -- SPE EVSEL builtins.

52712

- RS6000_BUILTIN_P -- Altivec and VSX predicate builtins

52713

+ RS6000_BUILTIN_H -- HTM builtins

52714

+ RS6000_BUILTIN_P -- Altivec, VSX, ISA 2.07 vector predicate builtins

52715

RS6000_BUILTIN_Q -- Paired floating point VSX predicate builtins

52716

RS6000_BUILTIN_S -- SPE predicate builtins

52717

RS6000_BUILTIN_X -- special builtins

52718

@@ -66,6 +67,10 @@

52719

#error "RS6000_BUILTIN_E is not defined."

52720

#endif

52721

52722

+#ifndef RS6000_BUILTIN_H

52723

+ #error "RS6000_BUILTIN_H is not defined."

52724

+#endif

52725

+

52726

#ifndef RS6000_BUILTIN_P

52727

#error "RS6000_BUILTIN_P is not defined."

52728

#endif

52729

@@ -301,6 +306,174 @@

52730

| RS6000_BTC_SPECIAL), \

52731

CODE_FOR_nothing) /* ICODE */

52732

52733

+/* ISA 2.07 (power8) vector convenience macros. */

52734

+/* For the instructions that are encoded as altivec instructions use

52735

+ __builtin_altivec_ as the builtin name. */

52736

+#define BU_P8V_AV_1(ENUM, NAME, ATTR, ICODE) \

52737

+ RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

52738

+ "__builtin_altivec_" NAME, /* NAME */ \

52739

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52740

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52741

+ | RS6000_BTC_UNARY), \

52742

+ CODE_FOR_ ## ICODE) /* ICODE */

52743

+

52744

+#define BU_P8V_AV_2(ENUM, NAME, ATTR, ICODE) \

52745

+ RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

52746

+ "__builtin_altivec_" NAME, /* NAME */ \

52747

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52748

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52749

+ | RS6000_BTC_BINARY), \

52750

+ CODE_FOR_ ## ICODE) /* ICODE */

52751

+

52752

+#define BU_P8V_AV_3(ENUM, NAME, ATTR, ICODE) \

52753

+ RS6000_BUILTIN_3 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

52754

+ "__builtin_altivec_" NAME, /* NAME */ \

52755

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52756

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52757

+ | RS6000_BTC_TERNARY), \

52758

+ CODE_FOR_ ## ICODE) /* ICODE */

52759

+

52760

+#define BU_P8V_AV_P(ENUM, NAME, ATTR, ICODE) \

52761

+ RS6000_BUILTIN_P (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

52762

+ "__builtin_altivec_" NAME, /* NAME */ \

52763

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52764

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52765

+ | RS6000_BTC_PREDICATE), \

52766

+ CODE_FOR_ ## ICODE) /* ICODE */

52767

+

52768

+/* For the instructions encoded as VSX instructions use __builtin_vsx as the

52769

+ builtin name. */

52770

+#define BU_P8V_VSX_1(ENUM, NAME, ATTR, ICODE) \

52771

+ RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

52772

+ "__builtin_vsx_" NAME, /* NAME */ \

52773

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52774

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52775

+ | RS6000_BTC_UNARY), \

52776

+ CODE_FOR_ ## ICODE) /* ICODE */

52777

+

52778

+#define BU_P8V_OVERLOAD_1(ENUM, NAME) \

52779

+ RS6000_BUILTIN_1 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \

52780

+ "__builtin_vec_" NAME, /* NAME */ \

52781

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52782

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

52783

+ | RS6000_BTC_UNARY), \

52784

+ CODE_FOR_nothing) /* ICODE */

52785

+

52786

+#define BU_P8V_OVERLOAD_2(ENUM, NAME) \

52787

+ RS6000_BUILTIN_2 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \

52788

+ "__builtin_vec_" NAME, /* NAME */ \

52789

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52790

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

52791

+ | RS6000_BTC_BINARY), \

52792

+ CODE_FOR_nothing) /* ICODE */

52793

+

52794

+#define BU_P8V_OVERLOAD_3(ENUM, NAME) \

52795

+ RS6000_BUILTIN_3 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \

52796

+ "__builtin_vec_" NAME, /* NAME */ \

52797

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

52798

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

52799

+ | RS6000_BTC_TERNARY), \

52800

+ CODE_FOR_nothing) /* ICODE */

52801

+

52802

+/* Crypto convenience macros. */

52803

+#define BU_CRYPTO_1(ENUM, NAME, ATTR, ICODE) \

52804

+ RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

52805

+ "__builtin_crypto_" NAME, /* NAME */ \

52806

+ RS6000_BTM_CRYPTO, /* MASK */ \

52807

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52808

+ | RS6000_BTC_UNARY), \

52809

+ CODE_FOR_ ## ICODE) /* ICODE */

52810

+

52811

+#define BU_CRYPTO_2(ENUM, NAME, ATTR, ICODE) \

52812

+ RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

52813

+ "__builtin_crypto_" NAME, /* NAME */ \

52814

+ RS6000_BTM_CRYPTO, /* MASK */ \

52815

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52816

+ | RS6000_BTC_BINARY), \

52817

+ CODE_FOR_ ## ICODE) /* ICODE */

52818

+

52819

+#define BU_CRYPTO_3(ENUM, NAME, ATTR, ICODE) \

52820

+ RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

52821

+ "__builtin_crypto_" NAME, /* NAME */ \

52822

+ RS6000_BTM_CRYPTO, /* MASK */ \

52823

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52824

+ | RS6000_BTC_TERNARY), \

52825

+ CODE_FOR_ ## ICODE) /* ICODE */

52826

+

52827

+#define BU_CRYPTO_OVERLOAD_1(ENUM, NAME) \

52828

+ RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

52829

+ "__builtin_crypto_" NAME, /* NAME */ \

52830

+ RS6000_BTM_CRYPTO, /* MASK */ \

52831

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

52832

+ | RS6000_BTC_UNARY), \

52833

+ CODE_FOR_nothing) /* ICODE */

52834

+

52835

+#define BU_CRYPTO_OVERLOAD_2(ENUM, NAME) \

52836

+ RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

52837

+ "__builtin_crypto_" NAME, /* NAME */ \

52838

+ RS6000_BTM_CRYPTO, /* MASK */ \

52839

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

52840

+ | RS6000_BTC_BINARY), \

52841

+ CODE_FOR_nothing) /* ICODE */

52842

+

52843

+#define BU_CRYPTO_OVERLOAD_3(ENUM, NAME) \

52844

+ RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

52845

+ "__builtin_crypto_" NAME, /* NAME */ \

52846

+ RS6000_BTM_CRYPTO, /* MASK */ \

52847

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

52848

+ | RS6000_BTC_TERNARY), \

52849

+ CODE_FOR_nothing) /* ICODE */

52850

+

52851

+/* HTM convenience macros. */

52852

+#define BU_HTM_0(ENUM, NAME, ATTR, ICODE) \

52853

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

52854

+ "__builtin_" NAME, /* NAME */ \

52855

+ RS6000_BTM_HTM, /* MASK */ \

52856

+ RS6000_BTC_ ## ATTR, /* ATTR */ \

52857

+ CODE_FOR_ ## ICODE) /* ICODE */

52858

+

52859

+#define BU_HTM_1(ENUM, NAME, ATTR, ICODE) \

52860

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

52861

+ "__builtin_" NAME, /* NAME */ \

52862

+ RS6000_BTM_HTM, /* MASK */ \

52863

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52864

+ | RS6000_BTC_UNARY), \

52865

+ CODE_FOR_ ## ICODE) /* ICODE */

52866

+

52867

+#define BU_HTM_2(ENUM, NAME, ATTR, ICODE) \

52868

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

52869

+ "__builtin_" NAME, /* NAME */ \

52870

+ RS6000_BTM_HTM, /* MASK */ \

52871

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52872

+ | RS6000_BTC_BINARY), \

52873

+ CODE_FOR_ ## ICODE) /* ICODE */

52874

+

52875

+#define BU_HTM_3(ENUM, NAME, ATTR, ICODE) \

52876

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

52877

+ "__builtin_" NAME, /* NAME */ \

52878

+ RS6000_BTM_HTM, /* MASK */ \

52879

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52880

+ | RS6000_BTC_TERNARY), \

52881

+ CODE_FOR_ ## ICODE) /* ICODE */

52882

+

52883

+#define BU_HTM_SPR0(ENUM, NAME, ATTR, ICODE) \

52884

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

52885

+ "__builtin_" NAME, /* NAME */ \

52886

+ RS6000_BTM_HTM, /* MASK */ \

52887

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52888

+ | RS6000_BTC_SPR), \

52889

+ CODE_FOR_ ## ICODE) /* ICODE */

52890

+

52891

+#define BU_HTM_SPR1(ENUM, NAME, ATTR, ICODE) \

52892

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

52893

+ "__builtin_" NAME, /* NAME */ \

52894

+ RS6000_BTM_HTM, /* MASK */ \

52895

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

52896

+ | RS6000_BTC_UNARY \

52897

+ | RS6000_BTC_SPR \

52898

+ | RS6000_BTC_VOID), \

52899

+ CODE_FOR_ ## ICODE) /* ICODE */

52900

+

52901

/* SPE convenience macros. */

52902

#define BU_SPE_1(ENUM, NAME, ATTR, ICODE) \

52903

RS6000_BUILTIN_1 (SPE_BUILTIN_ ## ENUM, /* ENUM */ \

52904

@@ -414,6 +587,7 @@

52905

BU_ALTIVEC_3 (VMSUMUHS, "vmsumuhs", SAT, altivec_vmsumuhs)

52906

BU_ALTIVEC_3 (VMSUMSHS, "vmsumshs", SAT, altivec_vmsumshs)

52907

BU_ALTIVEC_3 (VNMSUBFP, "vnmsubfp", FP, nfmsv4sf4)

52908

+BU_ALTIVEC_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti)

52909

BU_ALTIVEC_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df)

52910

BU_ALTIVEC_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di)

52911

BU_ALTIVEC_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf)

52912

@@ -420,6 +594,7 @@

52913

BU_ALTIVEC_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si)

52914

BU_ALTIVEC_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi)

52915

BU_ALTIVEC_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi_uns)

52916

+BU_ALTIVEC_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns)

52917

BU_ALTIVEC_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns)

52918

BU_ALTIVEC_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns)

52919

BU_ALTIVEC_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns)

52920

@@ -430,10 +605,12 @@

52921

BU_ALTIVEC_3 (VSEL_16QI, "vsel_16qi", CONST, vector_select_v16qi)

52922

BU_ALTIVEC_3 (VSEL_2DF, "vsel_2df", CONST, vector_select_v2df)

52923

BU_ALTIVEC_3 (VSEL_2DI, "vsel_2di", CONST, vector_select_v2di)

52924

+BU_ALTIVEC_3 (VSEL_1TI, "vsel_1ti", CONST, vector_select_v1ti)

52925

BU_ALTIVEC_3 (VSEL_4SI_UNS, "vsel_4si_uns", CONST, vector_select_v4si_uns)

52926

BU_ALTIVEC_3 (VSEL_8HI_UNS, "vsel_8hi_uns", CONST, vector_select_v8hi_uns)

52927

BU_ALTIVEC_3 (VSEL_16QI_UNS, "vsel_16qi_uns", CONST, vector_select_v16qi_uns)

52928

BU_ALTIVEC_3 (VSEL_2DI_UNS, "vsel_2di_uns", CONST, vector_select_v2di_uns)

52929

+BU_ALTIVEC_3 (VSEL_1TI_UNS, "vsel_1ti_uns", CONST, vector_select_v1ti_uns)

52930

BU_ALTIVEC_3 (VSLDOI_16QI, "vsldoi_16qi", CONST, altivec_vsldoi_v16qi)

52931

BU_ALTIVEC_3 (VSLDOI_8HI, "vsldoi_8hi", CONST, altivec_vsldoi_v8hi)

52932

BU_ALTIVEC_3 (VSLDOI_4SI, "vsldoi_4si", CONST, altivec_vsldoi_v4si)

52933

@@ -626,6 +803,8 @@

52934

BU_ALTIVEC_X (LD_INTERNAL_2df, "ld_internal_2df", MEM)

52935

BU_ALTIVEC_X (ST_INTERNAL_2di, "st_internal_2di", MEM)

52936

BU_ALTIVEC_X (LD_INTERNAL_2di, "ld_internal_2di", MEM)

52937

+BU_ALTIVEC_X (ST_INTERNAL_1ti, "st_internal_1ti", MEM)

52938

+BU_ALTIVEC_X (LD_INTERNAL_1ti, "ld_internal_1ti", MEM)

52939

BU_ALTIVEC_X (MTVSCR, "mtvscr", MISC)

52940

BU_ALTIVEC_X (MFVSCR, "mfvscr", MISC)

52941

BU_ALTIVEC_X (DSSALL, "dssall", MISC)

52942

@@ -636,8 +815,26 @@

52943

BU_ALTIVEC_X (LVEHX, "lvehx", MEM)

52944

BU_ALTIVEC_X (LVEWX, "lvewx", MEM)

52945

BU_ALTIVEC_X (LVXL, "lvxl", MEM)

52946

+BU_ALTIVEC_X (LVXL_V2DF, "lvxl_v2df", MEM)

52947

+BU_ALTIVEC_X (LVXL_V2DI, "lvxl_v2di", MEM)

52948

+BU_ALTIVEC_X (LVXL_V4SF, "lvxl_v4sf", MEM)

52949

+BU_ALTIVEC_X (LVXL_V4SI, "lvxl_v4si", MEM)

52950

+BU_ALTIVEC_X (LVXL_V8HI, "lvxl_v8hi", MEM)

52951

+BU_ALTIVEC_X (LVXL_V16QI, "lvxl_v16qi", MEM)

52952

BU_ALTIVEC_X (LVX, "lvx", MEM)

52953

+BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", MEM)

52954

+BU_ALTIVEC_X (LVX_V2DI, "lvx_v2di", MEM)

52955

+BU_ALTIVEC_X (LVX_V4SF, "lvx_v4sf", MEM)

52956

+BU_ALTIVEC_X (LVX_V4SI, "lvx_v4si", MEM)

52957

+BU_ALTIVEC_X (LVX_V8HI, "lvx_v8hi", MEM)

52958

+BU_ALTIVEC_X (LVX_V16QI, "lvx_v16qi", MEM)

52959

BU_ALTIVEC_X (STVX, "stvx", MEM)

52960

+BU_ALTIVEC_X (STVX_V2DF, "stvx_v2df", MEM)

52961

+BU_ALTIVEC_X (STVX_V2DI, "stvx_v2di", MEM)

52962

+BU_ALTIVEC_X (STVX_V4SF, "stvx_v4sf", MEM)

52963

+BU_ALTIVEC_X (STVX_V4SI, "stvx_v4si", MEM)

52964

+BU_ALTIVEC_X (STVX_V8HI, "stvx_v8hi", MEM)

52965

+BU_ALTIVEC_X (STVX_V16QI, "stvx_v16qi", MEM)

52966

BU_ALTIVEC_C (LVLX, "lvlx", MEM)

52967

BU_ALTIVEC_C (LVLXL, "lvlxl", MEM)

52968

BU_ALTIVEC_C (LVRX, "lvrx", MEM)

52969

@@ -646,6 +843,12 @@

52970

BU_ALTIVEC_X (STVEHX, "stvehx", MEM)

52971

BU_ALTIVEC_X (STVEWX, "stvewx", MEM)

52972

BU_ALTIVEC_X (STVXL, "stvxl", MEM)

52973

+BU_ALTIVEC_X (STVXL_V2DF, "stvxl_v2df", MEM)

52974

+BU_ALTIVEC_X (STVXL_V2DI, "stvxl_v2di", MEM)

52975

+BU_ALTIVEC_X (STVXL_V4SF, "stvxl_v4sf", MEM)

52976

+BU_ALTIVEC_X (STVXL_V4SI, "stvxl_v4si", MEM)

52977

+BU_ALTIVEC_X (STVXL_V8HI, "stvxl_v8hi", MEM)

52978

+BU_ALTIVEC_X (STVXL_V16QI, "stvxl_v16qi", MEM)

52979

BU_ALTIVEC_C (STVLX, "stvlx", MEM)

52980

BU_ALTIVEC_C (STVLXL, "stvlxl", MEM)

52981

BU_ALTIVEC_C (STVRX, "stvrx", MEM)

52982

@@ -904,6 +1107,7 @@

52983

BU_VSX_3 (XVNMADDDP, "xvnmadddp", CONST, nfmav2df4)

52984

BU_VSX_3 (XVNMSUBDP, "xvnmsubdp", CONST, nfmsv2df4)

52985

52986

+BU_VSX_3 (XXSEL_1TI, "xxsel_1ti", CONST, vector_select_v1ti)

52987

BU_VSX_3 (XXSEL_2DI, "xxsel_2di", CONST, vector_select_v2di)

52988

BU_VSX_3 (XXSEL_2DF, "xxsel_2df", CONST, vector_select_v2df)

52989

BU_VSX_3 (XXSEL_4SF, "xxsel_4sf", CONST, vector_select_v4sf)

52990

@@ -910,11 +1114,13 @@

52991

BU_VSX_3 (XXSEL_4SI, "xxsel_4si", CONST, vector_select_v4si)

52992

BU_VSX_3 (XXSEL_8HI, "xxsel_8hi", CONST, vector_select_v8hi)

52993

BU_VSX_3 (XXSEL_16QI, "xxsel_16qi", CONST, vector_select_v16qi)

52994

+BU_VSX_3 (XXSEL_1TI_UNS, "xxsel_1ti_uns", CONST, vector_select_v1ti_uns)

52995

BU_VSX_3 (XXSEL_2DI_UNS, "xxsel_2di_uns", CONST, vector_select_v2di_uns)

52996

BU_VSX_3 (XXSEL_4SI_UNS, "xxsel_4si_uns", CONST, vector_select_v4si_uns)

52997

BU_VSX_3 (XXSEL_8HI_UNS, "xxsel_8hi_uns", CONST, vector_select_v8hi_uns)

52998

BU_VSX_3 (XXSEL_16QI_UNS, "xxsel_16qi_uns", CONST, vector_select_v16qi_uns)

52999

53000

+BU_VSX_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti)

53001

BU_VSX_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di)

53002

BU_VSX_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df)

53003

BU_VSX_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf)

53004

@@ -921,11 +1127,13 @@

53005

BU_VSX_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si)

53006

BU_VSX_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi)

53007

BU_VSX_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi)

53008

+BU_VSX_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns)

53009

BU_VSX_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns)

53010

BU_VSX_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns)

53011

BU_VSX_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns)

53012

BU_VSX_3 (VPERM_16QI_UNS, "vperm_16qi_uns", CONST, altivec_vperm_v16qi_uns)

53013

53014

+BU_VSX_3 (XXPERMDI_1TI, "xxpermdi_1ti", CONST, vsx_xxpermdi_v1ti)

53015

BU_VSX_3 (XXPERMDI_2DF, "xxpermdi_2df", CONST, vsx_xxpermdi_v2df)

53016

BU_VSX_3 (XXPERMDI_2DI, "xxpermdi_2di", CONST, vsx_xxpermdi_v2di)

53017

BU_VSX_3 (XXPERMDI_4SF, "xxpermdi_4sf", CONST, vsx_xxpermdi_v4sf)

53018

@@ -932,6 +1140,7 @@

53019

BU_VSX_3 (XXPERMDI_4SI, "xxpermdi_4si", CONST, vsx_xxpermdi_v4si)

53020

BU_VSX_3 (XXPERMDI_8HI, "xxpermdi_8hi", CONST, vsx_xxpermdi_v8hi)

53021

BU_VSX_3 (XXPERMDI_16QI, "xxpermdi_16qi", CONST, vsx_xxpermdi_v16qi)

53022

+BU_VSX_3 (SET_1TI, "set_1ti", CONST, vsx_set_v1ti)

53023

BU_VSX_3 (SET_2DF, "set_2df", CONST, vsx_set_v2df)

53024

BU_VSX_3 (SET_2DI, "set_2di", CONST, vsx_set_v2di)

53025

BU_VSX_3 (XXSLDWI_2DI, "xxsldwi_2di", CONST, vsx_xxsldwi_v2di)

53026

@@ -1012,7 +1221,7 @@

53027

BU_VSX_1 (XVRESP, "xvresp", CONST, vsx_frev4sf2)

53028

53029

BU_VSX_1 (XSCVDPSP, "xscvdpsp", CONST, vsx_xscvdpsp)

53030

-BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvdpsp)

53031

+BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvspdp)

53032

BU_VSX_1 (XVCVDPSP, "xvcvdpsp", CONST, vsx_xvcvdpsp)

53033

BU_VSX_1 (XVCVSPDP, "xvcvspdp", CONST, vsx_xvcvspdp)

53034

BU_VSX_1 (XSTSQRTDP_FE, "xstsqrtdp_fe", CONST, vsx_tsqrtdf2_fe)

53035

@@ -1052,9 +1261,9 @@

53036

53037

BU_VSX_1 (XSRDPI, "xsrdpi", CONST, vsx_xsrdpi)

53038

BU_VSX_1 (XSRDPIC, "xsrdpic", CONST, vsx_xsrdpic)

53039

-BU_VSX_1 (XSRDPIM, "xsrdpim", CONST, vsx_floordf2)

53040

-BU_VSX_1 (XSRDPIP, "xsrdpip", CONST, vsx_ceildf2)

53041

-BU_VSX_1 (XSRDPIZ, "xsrdpiz", CONST, vsx_btruncdf2)

53042

+BU_VSX_1 (XSRDPIM, "xsrdpim", CONST, floordf2)

53043

+BU_VSX_1 (XSRDPIP, "xsrdpip", CONST, ceildf2)

53044

+BU_VSX_1 (XSRDPIZ, "xsrdpiz", CONST, btruncdf2)

53045

53046

/* VSX predicate functions. */

53047

BU_VSX_P (XVCMPEQSP_P, "xvcmpeqsp_p", CONST, vector_eq_v4sf_p)

53048

@@ -1066,6 +1275,7 @@

53049

53050

/* VSX builtins that are handled as special cases. */

53051

BU_VSX_X (LXSDX, "lxsdx", MEM)

53052

+BU_VSX_X (LXVD2X_V1TI, "lxvd2x_v1ti", MEM)

53053

BU_VSX_X (LXVD2X_V2DF, "lxvd2x_v2df", MEM)

53054

BU_VSX_X (LXVD2X_V2DI, "lxvd2x_v2di", MEM)

53055

BU_VSX_X (LXVDSX, "lxvdsx", MEM)

53056

@@ -1074,6 +1284,7 @@

53057

BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", MEM)

53058

BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", MEM)

53059

BU_VSX_X (STXSDX, "stxsdx", MEM)

53060

+BU_VSX_X (STXVD2X_V1TI, "stxsdx_v1ti", MEM)

53061

BU_VSX_X (STXVD2X_V2DF, "stxsdx_v2df", MEM)

53062

BU_VSX_X (STXVD2X_V2DI, "stxsdx_v2di", MEM)

53063

BU_VSX_X (STXVW4X_V4SF, "stxsdx_v4sf", MEM)

53064

@@ -1104,10 +1315,13 @@

53065

BU_VSX_X (XSNMSUBADP, "xsnmsubadp", FP)

53066

BU_VSX_X (XSNMSUBMDP, "xsnmsubmdp", FP)

53067

BU_VSX_X (XSSUBDP, "xssubdp", FP)

53068

+BU_VSX_X (VEC_INIT_V1TI, "vec_init_v1ti", CONST)

53069

BU_VSX_X (VEC_INIT_V2DF, "vec_init_v2df", CONST)

53070

BU_VSX_X (VEC_INIT_V2DI, "vec_init_v2di", CONST)

53071

+BU_VSX_X (VEC_SET_V1TI, "vec_set_v1ti", CONST)

53072

BU_VSX_X (VEC_SET_V2DF, "vec_set_v2df", CONST)

53073

BU_VSX_X (VEC_SET_V2DI, "vec_set_v2di", CONST)

53074

+BU_VSX_X (VEC_EXT_V1TI, "vec_ext_v1ti", CONST)

53075

BU_VSX_X (VEC_EXT_V2DF, "vec_ext_v2df", CONST)

53076

BU_VSX_X (VEC_EXT_V2DI, "vec_ext_v2di", CONST)

53077

53078

@@ -1132,6 +1346,191 @@

53079

BU_VSX_OVERLOAD_X (LD, "ld")

53080

BU_VSX_OVERLOAD_X (ST, "st")

53081

53082

+/* 1 argument VSX instructions added in ISA 2.07. */

53083

+BU_P8V_VSX_1 (XSCVSPDPN, "xscvspdpn", CONST, vsx_xscvspdpn)

53084

+BU_P8V_VSX_1 (XSCVDPSPN, "xscvdpspn", CONST, vsx_xscvdpspn)

53085

+

53086

+/* 1 argument altivec instructions added in ISA 2.07. */

53087

+BU_P8V_AV_1 (ABS_V2DI, "abs_v2di", CONST, absv2di2)

53088

+BU_P8V_AV_1 (VUPKHSW, "vupkhsw", CONST, altivec_vupkhsw)

53089

+BU_P8V_AV_1 (VUPKLSW, "vupklsw", CONST, altivec_vupklsw)

53090

+BU_P8V_AV_1 (VCLZB, "vclzb", CONST, clzv16qi2)

53091

+BU_P8V_AV_1 (VCLZH, "vclzh", CONST, clzv8hi2)

53092

+BU_P8V_AV_1 (VCLZW, "vclzw", CONST, clzv4si2)

53093

+BU_P8V_AV_1 (VCLZD, "vclzd", CONST, clzv2di2)

53094

+BU_P8V_AV_1 (VPOPCNTB, "vpopcntb", CONST, popcountv16qi2)

53095

+BU_P8V_AV_1 (VPOPCNTH, "vpopcnth", CONST, popcountv8hi2)

53096

+BU_P8V_AV_1 (VPOPCNTW, "vpopcntw", CONST, popcountv4si2)

53097

+BU_P8V_AV_1 (VPOPCNTD, "vpopcntd", CONST, popcountv2di2)

53098

+BU_P8V_AV_1 (VGBBD, "vgbbd", CONST, p8v_vgbbd)

53099

+

53100

+/* 2 argument altivec instructions added in ISA 2.07. */

53101

+BU_P8V_AV_2 (VADDCUQ, "vaddcuq", CONST, altivec_vaddcuq)

53102

+BU_P8V_AV_2 (VADDUDM, "vaddudm", CONST, addv2di3)

53103

+BU_P8V_AV_2 (VADDUQM, "vadduqm", CONST, altivec_vadduqm)

53104

+BU_P8V_AV_2 (VMINSD, "vminsd", CONST, sminv2di3)

53105

+BU_P8V_AV_2 (VMAXSD, "vmaxsd", CONST, smaxv2di3)

53106

+BU_P8V_AV_2 (VMINUD, "vminud", CONST, uminv2di3)

53107

+BU_P8V_AV_2 (VMAXUD, "vmaxud", CONST, umaxv2di3)

53108

+BU_P8V_AV_2 (VMRGEW, "vmrgew", CONST, p8_vmrgew)

53109

+BU_P8V_AV_2 (VMRGOW, "vmrgow", CONST, p8_vmrgow)

53110

+BU_P8V_AV_2 (VBPERMQ, "vbpermq", CONST, altivec_vbpermq)

53111

+BU_P8V_AV_2 (VPKUDUM, "vpkudum", CONST, altivec_vpkudum)

53112

+BU_P8V_AV_2 (VPKSDSS, "vpksdss", CONST, altivec_vpksdss)

53113

+BU_P8V_AV_2 (VPKUDUS, "vpkudus", CONST, altivec_vpkudus)

53114

+BU_P8V_AV_2 (VPKSDUS, "vpksdus", CONST, altivec_vpksdus)

53115

+BU_P8V_AV_2 (VRLD, "vrld", CONST, vrotlv2di3)

53116

+BU_P8V_AV_2 (VSLD, "vsld", CONST, vashlv2di3)

53117

+BU_P8V_AV_2 (VSRD, "vsrd", CONST, vlshrv2di3)

53118

+BU_P8V_AV_2 (VSRAD, "vsrad", CONST, vashrv2di3)

53119

+BU_P8V_AV_2 (VSUBCUQ, "vsubcuq", CONST, altivec_vsubcuq)

53120

+BU_P8V_AV_2 (VSUBUDM, "vsubudm", CONST, subv2di3)

53121

+BU_P8V_AV_2 (VSUBUQM, "vsubuqm", CONST, altivec_vsubuqm)

53122

+

53123

+BU_P8V_AV_2 (EQV_V16QI, "eqv_v16qi", CONST, eqvv16qi3)

53124

+BU_P8V_AV_2 (EQV_V8HI, "eqv_v8hi", CONST, eqvv8hi3)

53125

+BU_P8V_AV_2 (EQV_V4SI, "eqv_v4si", CONST, eqvv4si3)

53126

+BU_P8V_AV_2 (EQV_V2DI, "eqv_v2di", CONST, eqvv2di3)

53127

+BU_P8V_AV_2 (EQV_V1TI, "eqv_v1ti", CONST, eqvv1ti3)

53128

+BU_P8V_AV_2 (EQV_V4SF, "eqv_v4sf", CONST, eqvv4sf3)

53129

+BU_P8V_AV_2 (EQV_V2DF, "eqv_v2df", CONST, eqvv2df3)

53130

+

53131

+BU_P8V_AV_2 (NAND_V16QI, "nand_v16qi", CONST, nandv16qi3)

53132

+BU_P8V_AV_2 (NAND_V8HI, "nand_v8hi", CONST, nandv8hi3)

53133

+BU_P8V_AV_2 (NAND_V4SI, "nand_v4si", CONST, nandv4si3)

53134

+BU_P8V_AV_2 (NAND_V2DI, "nand_v2di", CONST, nandv2di3)

53135

+BU_P8V_AV_2 (NAND_V1TI, "nand_v1ti", CONST, nandv1ti3)

53136

+BU_P8V_AV_2 (NAND_V4SF, "nand_v4sf", CONST, nandv4sf3)

53137

+BU_P8V_AV_2 (NAND_V2DF, "nand_v2df", CONST, nandv2df3)

53138

+

53139

+BU_P8V_AV_2 (ORC_V16QI, "orc_v16qi", CONST, orcv16qi3)

53140

+BU_P8V_AV_2 (ORC_V8HI, "orc_v8hi", CONST, orcv8hi3)

53141

+BU_P8V_AV_2 (ORC_V4SI, "orc_v4si", CONST, orcv4si3)

53142

+BU_P8V_AV_2 (ORC_V2DI, "orc_v2di", CONST, orcv2di3)

53143

+BU_P8V_AV_2 (ORC_V1TI, "orc_v1ti", CONST, orcv1ti3)

53144

+BU_P8V_AV_2 (ORC_V4SF, "orc_v4sf", CONST, orcv4sf3)

53145

+BU_P8V_AV_2 (ORC_V2DF, "orc_v2df", CONST, orcv2df3)

53146

+

53147

+/* 3 argument altivec instructions added in ISA 2.07. */

53148

+BU_P8V_AV_3 (VADDEUQM, "vaddeuqm", CONST, altivec_vaddeuqm)

53149

+BU_P8V_AV_3 (VADDECUQ, "vaddecuq", CONST, altivec_vaddecuq)

53150

+BU_P8V_AV_3 (VSUBEUQM, "vsubeuqm", CONST, altivec_vsubeuqm)

53151

+BU_P8V_AV_3 (VSUBECUQ, "vsubecuq", CONST, altivec_vsubecuq)

53152

+

53153

+/* Vector comparison instructions added in ISA 2.07. */

53154

+BU_P8V_AV_2 (VCMPEQUD, "vcmpequd", CONST, vector_eqv2di)

53155

+BU_P8V_AV_2 (VCMPGTSD, "vcmpgtsd", CONST, vector_gtv2di)

53156

+BU_P8V_AV_2 (VCMPGTUD, "vcmpgtud", CONST, vector_gtuv2di)

53157

+

53158

+/* Vector comparison predicate instructions added in ISA 2.07. */

53159

+BU_P8V_AV_P (VCMPEQUD_P, "vcmpequd_p", CONST, vector_eq_v2di_p)

53160

+BU_P8V_AV_P (VCMPGTSD_P, "vcmpgtsd_p", CONST, vector_gt_v2di_p)

53161

+BU_P8V_AV_P (VCMPGTUD_P, "vcmpgtud_p", CONST, vector_gtu_v2di_p)

53162

+

53163

+/* ISA 2.07 vector overloaded 1 argument functions. */

53164

+BU_P8V_OVERLOAD_1 (VUPKHSW, "vupkhsw")

53165

+BU_P8V_OVERLOAD_1 (VUPKLSW, "vupklsw")

53166

+BU_P8V_OVERLOAD_1 (VCLZ, "vclz")

53167

+BU_P8V_OVERLOAD_1 (VCLZB, "vclzb")

53168

+BU_P8V_OVERLOAD_1 (VCLZH, "vclzh")

53169

+BU_P8V_OVERLOAD_1 (VCLZW, "vclzw")

53170

+BU_P8V_OVERLOAD_1 (VCLZD, "vclzd")

53171

+BU_P8V_OVERLOAD_1 (VPOPCNT, "vpopcnt")

53172

+BU_P8V_OVERLOAD_1 (VPOPCNTB, "vpopcntb")

53173

+BU_P8V_OVERLOAD_1 (VPOPCNTH, "vpopcnth")

53174

+BU_P8V_OVERLOAD_1 (VPOPCNTW, "vpopcntw")

53175

+BU_P8V_OVERLOAD_1 (VPOPCNTD, "vpopcntd")

53176

+BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd")

53177

+

53178

+/* ISA 2.07 vector overloaded 2 argument functions. */

53179

+BU_P8V_OVERLOAD_2 (EQV, "eqv")

53180

+BU_P8V_OVERLOAD_2 (NAND, "nand")

53181

+BU_P8V_OVERLOAD_2 (ORC, "orc")

53182

+BU_P8V_OVERLOAD_2 (VADDCUQ, "vaddcuq")

53183

+BU_P8V_OVERLOAD_2 (VADDUDM, "vaddudm")

53184

+BU_P8V_OVERLOAD_2 (VADDUQM, "vadduqm")

53185

+BU_P8V_OVERLOAD_2 (VBPERMQ, "vbpermq")

53186

+BU_P8V_OVERLOAD_2 (VMAXSD, "vmaxsd")

53187

+BU_P8V_OVERLOAD_2 (VMAXUD, "vmaxud")

53188

+BU_P8V_OVERLOAD_2 (VMINSD, "vminsd")

53189

+BU_P8V_OVERLOAD_2 (VMINUD, "vminud")

53190

+BU_P8V_OVERLOAD_2 (VMRGEW, "vmrgew")

53191

+BU_P8V_OVERLOAD_2 (VMRGOW, "vmrgow")

53192

+BU_P8V_OVERLOAD_2 (VPKSDSS, "vpksdss")

53193

+BU_P8V_OVERLOAD_2 (VPKSDUS, "vpksdus")

53194

+BU_P8V_OVERLOAD_2 (VPKUDUM, "vpkudum")

53195

+BU_P8V_OVERLOAD_2 (VPKUDUS, "vpkudus")

53196

+BU_P8V_OVERLOAD_2 (VRLD, "vrld")

53197

+BU_P8V_OVERLOAD_2 (VSLD, "vsld")

53198

+BU_P8V_OVERLOAD_2 (VSRAD, "vsrad")

53199

+BU_P8V_OVERLOAD_2 (VSRD, "vsrd")

53200

+BU_P8V_OVERLOAD_2 (VSUBCUQ, "vsubcuq")

53201

+BU_P8V_OVERLOAD_2 (VSUBUDM, "vsubudm")

53202

+BU_P8V_OVERLOAD_2 (VSUBUQM, "vsubuqm")

53203

+

53204

+/* ISA 2.07 vector overloaded 3 argument functions. */

53205

+BU_P8V_OVERLOAD_3 (VADDECUQ, "vaddecuq")

53206

+BU_P8V_OVERLOAD_3 (VADDEUQM, "vaddeuqm")

53207

+BU_P8V_OVERLOAD_3 (VSUBECUQ, "vsubecuq")

53208

+BU_P8V_OVERLOAD_3 (VSUBEUQM, "vsubeuqm")

53209

+

53210

+

53211

+/* 1 argument crypto functions. */

53212

+BU_CRYPTO_1 (VSBOX, "vsbox", CONST, crypto_vsbox)

53213

+

53214

+/* 2 argument crypto functions. */

53215

+BU_CRYPTO_2 (VCIPHER, "vcipher", CONST, crypto_vcipher)

53216

+BU_CRYPTO_2 (VCIPHERLAST, "vcipherlast", CONST, crypto_vcipherlast)

53217

+BU_CRYPTO_2 (VNCIPHER, "vncipher", CONST, crypto_vncipher)

53218

+BU_CRYPTO_2 (VNCIPHERLAST, "vncipherlast", CONST, crypto_vncipherlast)

53219

+BU_CRYPTO_2 (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb)

53220

+BU_CRYPTO_2 (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh)

53221

+BU_CRYPTO_2 (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw)

53222

+BU_CRYPTO_2 (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd)

53223

+

53224

+/* 3 argument crypto functions. */

53225

+BU_CRYPTO_3 (VPERMXOR_V2DI, "vpermxor_v2di", CONST, crypto_vpermxor_v2di)

53226

+BU_CRYPTO_3 (VPERMXOR_V4SI, "vpermxor_v4si", CONST, crypto_vpermxor_v4si)

53227

+BU_CRYPTO_3 (VPERMXOR_V8HI, "vpermxor_v8hi", CONST, crypto_vpermxor_v8hi)

53228

+BU_CRYPTO_3 (VPERMXOR_V16QI, "vpermxor_v16qi", CONST, crypto_vpermxor_v16qi)

53229

+BU_CRYPTO_3 (VSHASIGMAW, "vshasigmaw", CONST, crypto_vshasigmaw)

53230

+BU_CRYPTO_3 (VSHASIGMAD, "vshasigmad", CONST, crypto_vshasigmad)

53231

+

53232

+/* 2 argument crypto overloaded functions. */

53233

+BU_CRYPTO_OVERLOAD_2 (VPMSUM, "vpmsum")

53234

+

53235

+/* 3 argument crypto overloaded functions. */

53236

+BU_CRYPTO_OVERLOAD_3 (VPERMXOR, "vpermxor")

53237

+BU_CRYPTO_OVERLOAD_3 (VSHASIGMA, "vshasigma")

53238

+

53239

+

53240

+/* HTM functions. */

53241

+BU_HTM_1 (TABORT, "tabort", MISC, tabort)

53242

+BU_HTM_3 (TABORTDC, "tabortdc", MISC, tabortdc)

53243

+BU_HTM_3 (TABORTDCI, "tabortdci", MISC, tabortdci)

53244

+BU_HTM_3 (TABORTWC, "tabortwc", MISC, tabortwc)

53245

+BU_HTM_3 (TABORTWCI, "tabortwci", MISC, tabortwci)

53246

+BU_HTM_1 (TBEGIN, "tbegin", MISC, tbegin)

53247

+BU_HTM_1 (TCHECK, "tcheck", MISC, tcheck)

53248

+BU_HTM_1 (TEND, "tend", MISC, tend)

53249

+BU_HTM_0 (TENDALL, "tendall", MISC, tend)

53250

+BU_HTM_0 (TRECHKPT, "trechkpt", MISC, trechkpt)

53251

+BU_HTM_1 (TRECLAIM, "treclaim", MISC, treclaim)

53252

+BU_HTM_0 (TRESUME, "tresume", MISC, tsr)

53253

+BU_HTM_0 (TSUSPEND, "tsuspend", MISC, tsr)

53254

+BU_HTM_1 (TSR, "tsr", MISC, tsr)

53255

+BU_HTM_0 (TTEST, "ttest", MISC, ttest)

53256

+

53257

+BU_HTM_SPR0 (GET_TFHAR, "get_tfhar", MISC, nothing)

53258

+BU_HTM_SPR1 (SET_TFHAR, "set_tfhar", MISC, nothing)

53259

+BU_HTM_SPR0 (GET_TFIAR, "get_tfiar", MISC, nothing)

53260

+BU_HTM_SPR1 (SET_TFIAR, "set_tfiar", MISC, nothing)

53261

+BU_HTM_SPR0 (GET_TEXASR, "get_texasr", MISC, nothing)

53262

+BU_HTM_SPR1 (SET_TEXASR, "set_texasr", MISC, nothing)

53263

+BU_HTM_SPR0 (GET_TEXASRU, "get_texasru", MISC, nothing)

53264

+BU_HTM_SPR1 (SET_TEXASRU, "set_texasru", MISC, nothing)

53265

+

53266

+

53267

/* 3 argument paired floating point builtins. */

53268

BU_PAIRED_3 (MSUB, "msub", FP, fmsv2sf4)

53269

BU_PAIRED_3 (MADD, "madd", FP, fmav2sf4)

53270

@@ -1430,10 +1829,10 @@

53271

RS6000_BTC_FP)

53272

53273

BU_SPECIAL_X (RS6000_BUILTIN_GET_TB, "__builtin_ppc_get_timebase",

53274

- RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

53275

+ RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

53276

53277

BU_SPECIAL_X (RS6000_BUILTIN_MFTB, "__builtin_ppc_mftb",

53278

- RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

53279

+ RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

53280

53281

/* Darwin CfString builtin. */

53282

BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS,

53283

Index: gcc/config/rs6000/rs6000-c.c

53284

===================================================================

53285

--- a/src/gcc/config/rs6000/rs6000-c.c (.../tags/gcc_4_8_2_release)

53286

+++ b/src/gcc/config/rs6000/rs6000-c.c (.../branches/gcc-4_8-branch)

53287

@@ -90,6 +90,8 @@

53288

static GTY(()) tree __bool_keyword;

53289

static GTY(()) tree bool_keyword;

53290

static GTY(()) tree _Bool_keyword;

53291

+static GTY(()) tree __int128_type;

53292

+static GTY(()) tree __uint128_type;

53293

53294

/* Preserved across calls. */

53295

static tree expand_bool_pixel;

53296

@@ -122,9 +124,10 @@

53297

static void

53298

init_vector_keywords (void)

53299

{

53300

- /* Keywords without two leading underscores are context-sensitive,

53301

- and hence implemented as conditional macros, controlled by the

53302

- rs6000_macro_to_expand() function below. */

53303

+ /* Keywords without two leading underscores are context-sensitive, and hence

53304

+ implemented as conditional macros, controlled by the

53305

+ rs6000_macro_to_expand() function below. If we have ISA 2.07 64-bit

53306

+ support, record the __int128_t and __uint128_t types. */

53307

53308

__vector_keyword = get_identifier ("__vector");

53309

C_CPP_HASHNODE (__vector_keyword)->flags |= NODE_CONDITIONAL;

53310

@@ -146,6 +149,12 @@

53311

53312

_Bool_keyword = get_identifier ("_Bool");

53313

C_CPP_HASHNODE (_Bool_keyword)->flags |= NODE_CONDITIONAL;

53314

+

53315

+ if (TARGET_VADDUQM)

53316

+ {

53317

+ __int128_type = get_identifier ("__int128_t");

53318

+ __uint128_type = get_identifier ("__uint128_t");

53319

+ }

53320

}

53321

53322

/* Called to decide whether a conditional macro should be expanded.

53323

@@ -221,7 +230,8 @@

53324

|| rid_code == RID_SHORT || rid_code == RID_SIGNED

53325

|| rid_code == RID_INT || rid_code == RID_CHAR

53326

|| rid_code == RID_FLOAT

53327

- || (rid_code == RID_DOUBLE && TARGET_VSX))

53328

+ || (rid_code == RID_DOUBLE && TARGET_VSX)

53329

+ || (rid_code == RID_INT128 && TARGET_VADDUQM))

53330

{

53331

expand_this = C_CPP_HASHNODE (__vector_keyword);

53332

/* If the next keyword is bool or pixel, it

53333

@@ -248,6 +258,13 @@

53334

expand_bool_pixel = __bool_keyword;

53335

}

53336

}

53337

+

53338

+ /* Support vector __int128_t, but we don't need to worry about bool

53339

+ or pixel on this type. */

53340

+ else if (TARGET_VADDUQM

53341

+ && (ident == C_CPP_HASHNODE (__int128_type)

53342

+ || ident == C_CPP_HASHNODE (__uint128_type)))

53343

+ expand_this = C_CPP_HASHNODE (__vector_keyword);

53344

}

53345

}

53346

else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__pixel_keyword))

53347

@@ -315,6 +332,8 @@

53348

rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6X");

53349

if ((flags & OPTION_MASK_POPCNTD) != 0)

53350

rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");

53351

+ if ((flags & OPTION_MASK_DIRECT_MOVE) != 0)

53352

+ rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");

53353

if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)

53354

rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");

53355

if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)

53356

@@ -331,6 +350,16 @@

53357

}

53358

if ((flags & OPTION_MASK_VSX) != 0)

53359

rs6000_define_or_undefine_macro (define_p, "__VSX__");

53360

+ if ((flags & OPTION_MASK_HTM) != 0)

53361

+ rs6000_define_or_undefine_macro (define_p, "__HTM__");

53362

+ if ((flags & OPTION_MASK_P8_VECTOR) != 0)

53363

+ rs6000_define_or_undefine_macro (define_p, "__POWER8_VECTOR__");

53364

+ if ((flags & OPTION_MASK_QUAD_MEMORY) != 0)

53365

+ rs6000_define_or_undefine_macro (define_p, "__QUAD_MEMORY__");

53366

+ if ((flags & OPTION_MASK_QUAD_MEMORY_ATOMIC) != 0)

53367

+ rs6000_define_or_undefine_macro (define_p, "__QUAD_MEMORY_ATOMIC__");

53368

+ if ((flags & OPTION_MASK_CRYPTO) != 0)

53369

+ rs6000_define_or_undefine_macro (define_p, "__CRYPTO__");

53370

53371

/* options from the builtin masks. */

53372

if ((bu_mask & RS6000_BTM_SPE) != 0)

53373

@@ -453,7 +482,11 @@

53374

case ABI_AIX:

53375

builtin_define ("_CALL_AIXDESC");

53376

builtin_define ("_CALL_AIX");

53377

+ builtin_define ("_CALL_ELF=1");

53378

break;

53379

+ case ABI_ELFv2:

53380

+ builtin_define ("_CALL_ELF=2");

53381

+ break;

53382

case ABI_DARWIN:

53383

builtin_define ("_CALL_DARWIN");

53384

break;

53385

@@ -465,6 +498,13 @@

53386

if (TARGET_SOFT_FLOAT || !TARGET_FPRS)

53387

builtin_define ("__NO_FPRS__");

53388

53389

+ /* Whether aggregates passed by value are aligned to a 16 byte boundary

53390

+ if their alignment is 16 bytes or larger. */

53391

+ if ((TARGET_MACHO && rs6000_darwin64_abi)

53392

+ || DEFAULT_ABI == ABI_ELFv2

53393

+ || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm))

53394

+ builtin_define ("__STRUCT_PARM_ALIGN__=16");

53395

+

53396

/* Generate defines for Xilinx FPU. */

53397

if (rs6000_xilinx_fpu)

53398

{

53399

@@ -505,6 +545,8 @@

53400

RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

53401

{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI,

53402

RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

53403

+ { ALTIVEC_BUILTIN_VEC_ABS, P8V_BUILTIN_ABS_V2DI,

53404

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

53405

{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF,

53406

RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

53407

{ ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP,

53408

@@ -577,6 +619,10 @@

53409

RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

53410

{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,

53411

RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

53412

+ { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW,

53413

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

53414

+ { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW,

53415

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

53416

{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,

53417

RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },

53418

{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,

53419

@@ -583,6 +629,10 @@

53420

RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

53421

{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,

53422

RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

53423

+ { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW,

53424

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

53425

+ { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW,

53426

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

53427

{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,

53428

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },

53429

{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,

53430

@@ -601,6 +651,10 @@

53431

RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

53432

{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,

53433

RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

53434

+ { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW,

53435

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

53436

+ { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW,

53437

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

53438

{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,

53439

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },

53440

{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,

53441

@@ -651,10 +705,27 @@

53442

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },

53443

{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

53444

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53445

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

53446

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

53447

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

53448

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

53449

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

53450

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53451

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

53452

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53453

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

53454

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

53455

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

53456

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53457

{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP,

53458

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53459

{ ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP,

53460

RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

53461

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM,

53462

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

53463

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM,

53464

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

53465

+ RS6000_BTI_unsigned_V1TI, 0 },

53466

{ ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP,

53467

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53468

{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

53469

@@ -937,6 +1008,10 @@

53470

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53471

{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW,

53472

RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53473

+ { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD,

53474

+ RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53475

+ { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD,

53476

+ RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53477

{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP,

53478

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53479

{ ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP,

53480

@@ -975,6 +1050,10 @@

53481

RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53482

{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW,

53483

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53484

+ { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTUD,

53485

+ RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53486

+ { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTSD,

53487

+ RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53488

{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP,

53489

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53490

{ ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP,

53491

@@ -1021,6 +1100,10 @@

53492

RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53493

{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW,

53494

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53495

+ { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTUD,

53496

+ RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53497

+ { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTSD,

53498

+ RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53499

{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP,

53500

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53501

{ ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP,

53502

@@ -1045,54 +1128,54 @@

53503

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53504

{ VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP,

53505

RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

53506

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53507

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF,

53508

RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },

53509

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53510

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,

53511

RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },

53512

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53513

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,

53514

RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

53515

~RS6000_BTI_unsigned_V2DI, 0 },

53516

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53517

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,

53518

RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },

53519

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53520

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF,

53521

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },

53522

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53523

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF,

53524

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },

53525

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53526

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

53527

RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },

53528

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53529

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

53530

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },

53531

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53532

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

53533

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },

53534

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53535

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

53536

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },

53537

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53538

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

53539

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },

53540

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53541

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

53542

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },

53543

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53544

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

53545

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },

53546

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53547

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

53548

RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },

53549

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53550

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

53551

RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },

53552

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53553

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

53554

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },

53555

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53556

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

53557

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },

53558

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53559

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

53560

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },

53561

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53562

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

53563

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },

53564

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53565

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

53566

RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },

53567

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53568

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

53569

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },

53570

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53571

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

53572

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

53573

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53574

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

53575

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },

53576

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

53577

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

53578

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

53579

{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX,

53580

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

53581

@@ -1130,55 +1213,55 @@

53582

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

53583

{ ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX,

53584

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

53585

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53586

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF,

53587

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },

53588

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53589

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF,

53590

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },

53591

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53592

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

53593

RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },

53594

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53595

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

53596

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },

53597

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53598

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

53599

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },

53600

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53601

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

53602

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },

53603

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53604

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

53605

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },

53606

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53607

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

53608

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },

53609

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53610

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

53611

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },

53612

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53613

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

53614

RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },

53615

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53616

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

53617

RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },

53618

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53619

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

53620

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },

53621

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53622

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

53623

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },

53624

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53625

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

53626

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },

53627

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53628

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

53629

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },

53630

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53631

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

53632

RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },

53633

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53634

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

53635

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },

53636

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53637

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

53638

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

53639

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53640

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

53641

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,

53642

~RS6000_BTI_unsigned_V16QI, 0 },

53643

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53644

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

53645

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

53646

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53647

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF,

53648

RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },

53649

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53650

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,

53651

RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },

53652

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53653

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,

53654

RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

53655

~RS6000_BTI_unsigned_V2DI, 0 },

53656

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

53657

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,

53658

RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },

53659

{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,

53660

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

53661

@@ -1418,6 +1501,18 @@

53662

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

53663

{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,

53664

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53665

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,

53666

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53667

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,

53668

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

53669

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,

53670

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53671

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,

53672

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

53673

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,

53674

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

53675

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,

53676

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53677

{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP,

53678

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53679

{ ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP,

53680

@@ -1604,6 +1699,18 @@

53681

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

53682

{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,

53683

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53684

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,

53685

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53686

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,

53687

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

53688

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,

53689

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53690

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,

53691

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

53692

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,

53693

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

53694

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,

53695

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53696

{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP,

53697

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53698

{ ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP,

53699

@@ -1786,6 +1893,12 @@

53700

RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53701

{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,

53702

RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },

53703

+ { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,

53704

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53705

+ { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,

53706

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53707

+ { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,

53708

+ RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },

53709

{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,

53710

RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53711

{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,

53712

@@ -1812,6 +1925,10 @@

53713

RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53714

{ ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,

53715

RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53716

+ { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS,

53717

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53718

+ { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS,

53719

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53720

{ ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS,

53721

RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

53722

{ ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS,

53723

@@ -1824,6 +1941,8 @@

53724

RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53725

{ ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS,

53726

RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53727

+ { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS,

53728

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53729

{ ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS,

53730

RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

53731

{ ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS,

53732

@@ -1844,6 +1963,10 @@

53733

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53734

{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW,

53735

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53736

+ { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD,

53737

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53738

+ { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD,

53739

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53740

{ ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,

53741

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53742

{ ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,

53743

@@ -1868,6 +1991,10 @@

53744

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53745

{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW,

53746

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53747

+ { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD,

53748

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53749

+ { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD,

53750

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53751

{ ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP,

53752

RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },

53753

{ ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP,

53754

@@ -2032,6 +2159,10 @@

53755

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53756

{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW,

53757

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53758

+ { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD,

53759

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53760

+ { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD,

53761

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53762

{ ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,

53763

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53764

{ ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,

53765

@@ -2056,6 +2187,10 @@

53766

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53767

{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW,

53768

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53769

+ { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,

53770

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53771

+ { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRD,

53772

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53773

{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,

53774

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53775

{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,

53776

@@ -2196,10 +2331,27 @@

53777

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },

53778

{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,

53779

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

53780

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

53781

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

53782

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

53783

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

53784

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

53785

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

53786

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

53787

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53788

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

53789

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

53790

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

53791

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

53792

{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP,

53793

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53794

{ ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP,

53795

RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

53796

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM,

53797

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

53798

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM,

53799

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

53800

+ RS6000_BTI_unsigned_V1TI, 0 },

53801

{ ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP,

53802

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

53803

{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,

53804

@@ -2730,63 +2882,63 @@

53805

RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_NOT_OPAQUE },

53806

{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,

53807

RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_NOT_OPAQUE },

53808

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53809

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF,

53810

RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },

53811

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53812

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,

53813

RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },

53814

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53815

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,

53816

RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

53817

~RS6000_BTI_unsigned_V2DI },

53818

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53819

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,

53820

RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,

53821

~RS6000_BTI_bool_V2DI },

53822

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53823

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF,

53824

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },

53825

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53826

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF,

53827

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },

53828

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53829

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

53830

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },

53831

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53832

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

53833

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

53834

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53835

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

53836

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },

53837

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53838

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

53839

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

53840

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53841

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

53842

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },

53843

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53844

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

53845

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

53846

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53847

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

53848

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

53849

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53850

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53851

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },

53852

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53853

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53854

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

53855

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53856

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53857

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },

53858

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53859

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53860

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

53861

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53862

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53863

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },

53864

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53865

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53866

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

53867

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53868

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53869

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

53870

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53871

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

53872

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },

53873

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53874

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

53875

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

53876

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53877

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

53878

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },

53879

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53880

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

53881

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

53882

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53883

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

53884

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },

53885

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53886

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

53887

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

53888

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53889

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

53890

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

53891

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

53892

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

53893

RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },

53894

{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,

53895

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

53896

@@ -2858,64 +3010,64 @@

53897

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },

53898

{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,

53899

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },

53900

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53901

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF,

53902

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },

53903

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53904

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF,

53905

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },

53906

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53907

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

53908

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },

53909

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53910

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

53911

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

53912

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53913

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

53914

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },

53915

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53916

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

53917

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

53918

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53919

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

53920

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },

53921

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53922

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

53923

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

53924

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53925

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

53926

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

53927

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53928

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53929

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },

53930

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53931

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53932

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

53933

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53934

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53935

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },

53936

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53937

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53938

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

53939

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53940

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53941

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },

53942

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53943

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53944

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

53945

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53946

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53947

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

53948

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53949

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

53950

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },

53951

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53952

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

53953

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

53954

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53955

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

53956

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },

53957

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53958

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

53959

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

53960

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53961

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

53962

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },

53963

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53964

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

53965

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

53966

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53967

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

53968

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

53969

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53970

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

53971

RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },

53972

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53973

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF,

53974

RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },

53975

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53976

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF,

53977

RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },

53978

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53979

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,

53980

RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },

53981

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53982

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,

53983

RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

53984

~RS6000_BTI_unsigned_V2DI },

53985

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

53986

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,

53987

RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,

53988

~RS6000_BTI_bool_V2DI },

53989

{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,

53990

@@ -3327,6 +3479,20 @@

53991

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },

53992

{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,

53993

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },

53994

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

53995

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },

53996

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

53997

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },

53998

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

53999

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },

54000

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

54001

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },

54002

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

54003

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },

54004

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

54005

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },

54006

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

54007

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI },

54008

{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P,

54009

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },

54010

{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P,

54011

@@ -3372,11 +3538,509 @@

54012

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },

54013

{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,

54014

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },

54015

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,

54016

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },

54017

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,

54018

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },

54019

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,

54020

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },

54021

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,

54022

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },

54023

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,

54024

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },

54025

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,

54026

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },

54027

{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P,

54028

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },

54029

{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P,

54030

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },

54031

54032

+ /* Power8 vector overloaded functions. */

54033

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

54034

+ RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

54035

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

54036

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

54037

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

54038

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

54039

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

54040

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,

54041

+ RS6000_BTI_unsigned_V16QI, 0 },

54042

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

54043

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54044

+ RS6000_BTI_bool_V16QI, 0 },

54045

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

54046

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54047

+ RS6000_BTI_unsigned_V16QI, 0 },

54048

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

54049

+ RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

54050

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

54051

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

54052

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

54053

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

54054

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

54055

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,

54056

+ RS6000_BTI_unsigned_V8HI, 0 },

54057

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

54058

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54059

+ RS6000_BTI_bool_V8HI, 0 },

54060

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

54061

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54062

+ RS6000_BTI_unsigned_V8HI, 0 },

54063

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

54064

+ RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

54065

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

54066

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

54067

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

54068

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

54069

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

54070

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,

54071

+ RS6000_BTI_unsigned_V4SI, 0 },

54072

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

54073

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54074

+ RS6000_BTI_bool_V4SI, 0 },

54075

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

54076

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54077

+ RS6000_BTI_unsigned_V4SI, 0 },

54078

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

54079

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

54080

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

54081

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

54082

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

54083

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54084

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

54085

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

54086

+ RS6000_BTI_unsigned_V2DI, 0 },

54087

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

54088

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54089

+ RS6000_BTI_bool_V2DI, 0 },

54090

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

54091

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54092

+ RS6000_BTI_unsigned_V2DI, 0 },

54093

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SF,

54094

+ RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

54095

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DF,

54096

+ RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

54097

+

54098

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

54099

+ RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

54100

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

54101

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

54102

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

54103

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

54104

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

54105

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,

54106

+ RS6000_BTI_unsigned_V16QI, 0 },

54107

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

54108

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54109

+ RS6000_BTI_bool_V16QI, 0 },

54110

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

54111

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54112

+ RS6000_BTI_unsigned_V16QI, 0 },

54113

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

54114

+ RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

54115

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

54116

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

54117

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

54118

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

54119

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

54120

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,

54121

+ RS6000_BTI_unsigned_V8HI, 0 },

54122

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

54123

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54124

+ RS6000_BTI_bool_V8HI, 0 },

54125

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

54126

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54127

+ RS6000_BTI_unsigned_V8HI, 0 },

54128

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

54129

+ RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

54130

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

54131

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

54132

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

54133

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

54134

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

54135

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,

54136

+ RS6000_BTI_unsigned_V4SI, 0 },

54137

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

54138

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54139

+ RS6000_BTI_bool_V4SI, 0 },

54140

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

54141

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54142

+ RS6000_BTI_unsigned_V4SI, 0 },

54143

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

54144

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

54145

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

54146

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

54147

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

54148

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54149

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

54150

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

54151

+ RS6000_BTI_unsigned_V2DI, 0 },

54152

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

54153

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54154

+ RS6000_BTI_bool_V2DI, 0 },

54155

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

54156

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54157

+ RS6000_BTI_unsigned_V2DI, 0 },

54158

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SF,

54159

+ RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

54160

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DF,

54161

+ RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

54162

+

54163

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

54164

+ RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

54165

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

54166

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

54167

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

54168

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

54169

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

54170

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,

54171

+ RS6000_BTI_unsigned_V16QI, 0 },

54172

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

54173

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54174

+ RS6000_BTI_bool_V16QI, 0 },

54175

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

54176

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54177

+ RS6000_BTI_unsigned_V16QI, 0 },

54178

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

54179

+ RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

54180

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

54181

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

54182

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

54183

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

54184

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

54185

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,

54186

+ RS6000_BTI_unsigned_V8HI, 0 },

54187

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

54188

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54189

+ RS6000_BTI_bool_V8HI, 0 },

54190

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

54191

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54192

+ RS6000_BTI_unsigned_V8HI, 0 },

54193

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

54194

+ RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

54195

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

54196

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

54197

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

54198

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

54199

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

54200

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,

54201

+ RS6000_BTI_unsigned_V4SI, 0 },

54202

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

54203

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54204

+ RS6000_BTI_bool_V4SI, 0 },

54205

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

54206

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54207

+ RS6000_BTI_unsigned_V4SI, 0 },

54208

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

54209

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

54210

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

54211

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

54212

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

54213

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54214

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

54215

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

54216

+ RS6000_BTI_unsigned_V2DI, 0 },

54217

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

54218

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54219

+ RS6000_BTI_bool_V2DI, 0 },

54220

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

54221

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54222

+ RS6000_BTI_unsigned_V2DI, 0 },

54223

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SF,

54224

+ RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

54225

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DF,

54226

+ RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

54227

+

54228

+ { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ,

54229

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

54230

+ { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ,

54231

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54232

+ RS6000_BTI_unsigned_V1TI, 0 },

54233

+

54234

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

54235

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

54236

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

54237

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

54238

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

54239

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54240

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

54241

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54242

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

54243

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

54244

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

54245

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54246

+

54247

+ { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM,

54248

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

54249

+ { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM,

54250

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54251

+ RS6000_BTI_unsigned_V1TI, 0 },

54252

+

54253

+ { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,

54254

+ RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

54255

+ { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,

54256

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI,

54257

+ RS6000_BTI_unsigned_V16QI, 0 },

54258

+

54259

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,

54260

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

54261

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,

54262

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

54263

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH,

54264

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

54265

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH,

54266

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

54267

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW,

54268

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

54269

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW,

54270

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

54271

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD,

54272

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

54273

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD,

54274

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

54275

+

54276

+ { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB,

54277

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

54278

+ { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB,

54279

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

54280

+

54281

+ { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH,

54282

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

54283

+ { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH,

54284

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

54285

+

54286

+ { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW,

54287

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

54288

+ { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW,

54289

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

54290

+

54291

+ { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,

54292

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

54293

+ { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,

54294

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

54295

+

54296

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

54297

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

54298

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

54299

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

54300

+

54301

+ { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ,

54302

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

54303

+ { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ,

54304

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54305

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

54306

+

54307

+ { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM,

54308

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

54309

+ { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM,

54310

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54311

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

54312

+

54313

+ { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ,

54314

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

54315

+ { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ,

54316

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54317

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

54318

+

54319

+ { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM,

54320

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

54321

+ { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM,

54322

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54323

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

54324

+

54325

+ { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,

54326

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

54327

+ { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,

54328

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

54329

+ { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,

54330

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54331

+

54332

+ { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,

54333

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

54334

+ { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,

54335

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

54336

+ { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,

54337

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54338

+

54339

+ { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,

54340

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

54341

+ RS6000_BTI_unsigned_V2DI, 0 },

54342

+ { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,

54343

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54344

+ RS6000_BTI_bool_V2DI, 0 },

54345

+ { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,

54346

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54347

+ RS6000_BTI_unsigned_V2DI, 0 },

54348

+

54349

+ { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,

54350

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

54351

+ RS6000_BTI_unsigned_V2DI, 0 },

54352

+ { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,

54353

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54354

+ RS6000_BTI_bool_V2DI, 0 },

54355

+ { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,

54356

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54357

+ RS6000_BTI_unsigned_V2DI, 0 },

54358

+

54359

+ { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW,

54360

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

54361

+ { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW,

54362

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54363

+ RS6000_BTI_unsigned_V4SI, 0 },

54364

+

54365

+ { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW,

54366

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

54367

+ { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW,

54368

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54369

+ RS6000_BTI_unsigned_V4SI, 0 },

54370

+

54371

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,

54372

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

54373

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,

54374

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

54375

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH,

54376

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

54377

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH,

54378

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

54379

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW,

54380

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

54381

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW,

54382

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

54383

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD,

54384

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

54385

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD,

54386

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

54387

+

54388

+ { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB,

54389

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

54390

+ { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB,

54391

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

54392

+

54393

+ { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,

54394

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

54395

+ { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,

54396

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

54397

+

54398

+ { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW,

54399

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

54400

+ { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW,

54401

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

54402

+

54403

+ { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD,

54404

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

54405

+ { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD,

54406

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

54407

+

54408

+ { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,

54409

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54410

+ { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,

54411

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54412

+ { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,

54413

+ RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },

54414

+

54415

+ { P8V_BUILTIN_VEC_VPKSDSS, P8V_BUILTIN_VPKSDSS,

54416

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54417

+

54418

+ { P8V_BUILTIN_VEC_VPKUDUS, P8V_BUILTIN_VPKUDUS,

54419

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54420

+

54421

+ { P8V_BUILTIN_VEC_VPKSDUS, P8V_BUILTIN_VPKSDUS,

54422

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54423

+

54424

+ { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD,

54425

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54426

+ { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD,

54427

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54428

+

54429

+ { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD,

54430

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54431

+ { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD,

54432

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54433

+

54434

+ { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD,

54435

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54436

+ { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD,

54437

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54438

+

54439

+ { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,

54440

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54441

+ { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRD,

54442

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54443

+

54444

+ { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,

54445

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

54446

+ { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,

54447

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54448

+ RS6000_BTI_unsigned_V1TI, 0 },

54449

+

54450

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

54451

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

54452

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

54453

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

54454

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

54455

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

54456

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

54457

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54458

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

54459

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

54460

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

54461

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

54462

+

54463

+ { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM,

54464

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

54465

+ { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM,

54466

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

54467

+ RS6000_BTI_unsigned_V1TI, 0 },

54468

+

54469

+ { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW,

54470

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

54471

+ { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW,

54472

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

54473

+

54474

+ { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,

54475

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

54476

+ { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,

54477

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

54478

+

54479

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

54480

+ RS6000_BTI_V16QI, 0, 0, 0 },

54481

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

54482

+ RS6000_BTI_unsigned_V16QI, 0, 0, 0 },

54483

+

54484

+ /* Crypto builtins. */

54485

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI,

54486

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54487

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },

54488

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI,

54489

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54490

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },

54491

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI,

54492

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54493

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },

54494

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI,

54495

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54496

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },

54497

+

54498

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB,

54499

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

54500

+ RS6000_BTI_unsigned_V16QI, 0 },

54501

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH,

54502

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

54503

+ RS6000_BTI_unsigned_V8HI, 0 },

54504

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW,

54505

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54506

+ RS6000_BTI_unsigned_V4SI, 0 },

54507

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD,

54508

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54509

+ RS6000_BTI_unsigned_V2DI, 0 },

54510

+

54511

+ { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW,

54512

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

54513

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI },

54514

+ { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD,

54515

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

54516

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI },

54517

+

54518

{ (enum rs6000_builtins) 0, (enum rs6000_builtins) 0, 0, 0, 0, 0 }

54519

};

54520

54521

@@ -3560,6 +4224,10 @@

54522

unsigned_p = TYPE_UNSIGNED (type);

54523

switch (TYPE_MODE (type))

54524

{

54525

+ case TImode:

54526

+ type = (unsigned_p ? unsigned_V1TI_type_node : V1TI_type_node);

54527

+ size = 1;

54528

+ break;

54529

case DImode:

54530

type = (unsigned_p ? unsigned_V2DI_type_node : V2DI_type_node);

54531

size = 2;

54532

@@ -3591,7 +4259,7 @@

54533

return build_constructor (type, vec);

54534

}

54535

54536

- /* For now use pointer tricks to do the extaction, unless we are on VSX

54537

+ /* For now use pointer tricks to do the extraction, unless we are on VSX

54538

extracting a double from a constant offset. */

54539

if (fcode == ALTIVEC_BUILTIN_VEC_EXTRACT)

54540

{

54541

@@ -3619,6 +4287,17 @@

54542

if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2)))

54543

goto bad;

54544

54545

+ /* If we are targeting little-endian, but -maltivec=be has been

54546

+ specified to override the element order, adjust the element

54547

+ number accordingly. */

54548

+ if (!BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 2)

54549

+ {

54550

+ unsigned int last_elem = TYPE_VECTOR_SUBPARTS (arg1_type) - 1;

54551

+ arg2 = fold_build2_loc (loc, MINUS_EXPR, TREE_TYPE (arg2),

54552

+ build_int_cstu (TREE_TYPE (arg2), last_elem),

54553

+ arg2);

54554

+ }

54555

+

54556

/* If we can use the VSX xxpermdi instruction, use that for extract. */

54557

mode = TYPE_MODE (arg1_type);

54558

if ((mode == V2DFmode || mode == V2DImode) && VECTOR_MEM_VSX_P (mode)

54559

@@ -3636,6 +4315,14 @@

54560

if (call)

54561

return build_call_expr (call, 2, arg1, arg2);

54562

}

54563

+ else if (mode == V1TImode && VECTOR_MEM_VSX_P (mode)

54564

+ && TREE_CODE (arg2) == INTEGER_CST

54565

+ && TREE_INT_CST_HIGH (arg2) == 0

54566

+ && TREE_INT_CST_LOW (arg2) == 0)

54567

+ {

54568

+ tree call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V1TI];

54569

+ return build_call_expr (call, 2, arg1, arg2);

54570

+ }

54571

54572

/* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */

54573

arg1_inner_type = TREE_TYPE (arg1_type);

54574

@@ -3666,7 +4353,7 @@

54575

return stmt;

54576

}

54577

54578

- /* For now use pointer tricks to do the insertation, unless we are on VSX

54579

+ /* For now use pointer tricks to do the insertion, unless we are on VSX

54580

inserting a double to a constant offset.. */

54581

if (fcode == ALTIVEC_BUILTIN_VEC_INSERT)

54582

{

54583

@@ -3696,6 +4383,17 @@

54584

if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2)))

54585

goto bad;

54586

54587

+ /* If we are targeting little-endian, but -maltivec=be has been

54588

+ specified to override the element order, adjust the element

54589

+ number accordingly. */

54590

+ if (!BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 2)

54591

+ {

54592

+ unsigned int last_elem = TYPE_VECTOR_SUBPARTS (arg1_type) - 1;

54593

+ arg2 = fold_build2_loc (loc, MINUS_EXPR, TREE_TYPE (arg2),

54594

+ build_int_cstu (TREE_TYPE (arg2), last_elem),

54595

+ arg2);

54596

+ }

54597

+

54598

/* If we can use the VSX xxpermdi instruction, use that for insert. */

54599

mode = TYPE_MODE (arg1_type);

54600

if ((mode == V2DFmode || mode == V2DImode) && VECTOR_UNIT_VSX_P (mode)

54601

@@ -3715,7 +4413,18 @@

54602

if (call)

54603

return build_call_expr (call, 3, arg1, arg0, arg2);

54604

}

54605

+ else if (mode == V1TImode && VECTOR_UNIT_VSX_P (mode)

54606

+ && TREE_CODE (arg2) == INTEGER_CST

54607

+ && TREE_INT_CST_HIGH (arg2) == 0

54608

+ && TREE_INT_CST_LOW (arg2) == 0)

54609

+ {

54610

+ tree call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V1TI];

54611

54612

+ /* Note, __builtin_vec_insert_<xxx> has vector and scalar types

54613

+ reversed. */

54614

+ return build_call_expr (call, 3, arg1, arg0, arg2);

54615

+ }

54616

+

54617

/* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2) = arg0. */

54618

arg1_inner_type = TREE_TYPE (arg1_type);

54619

arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2,

54620

@@ -3824,7 +4533,8 @@

54621

&& (desc->op2 == RS6000_BTI_NOT_OPAQUE

54622

|| rs6000_builtin_type_compatible (types[1], desc->op2))

54623

&& (desc->op3 == RS6000_BTI_NOT_OPAQUE

54624

- || rs6000_builtin_type_compatible (types[2], desc->op3)))

54625

+ || rs6000_builtin_type_compatible (types[2], desc->op3))

54626

+ && rs6000_builtin_decls[desc->overloaded_code] != NULL_TREE)

54627

return altivec_build_resolved_builtin (args, n, desc);

54628

54629

bad:

54630

Index: gcc/config/rs6000/rs6000.opt

54631

===================================================================

54632

--- a/src/gcc/config/rs6000/rs6000.opt (.../tags/gcc_4_8_2_release)

54633

+++ b/src/gcc/config/rs6000/rs6000.opt (.../branches/gcc-4_8-branch)

54634

@@ -1,6 +1,6 @@

54635

; Options for the rs6000 port of the compiler

54636

;

54637

54638

54639

; Contributed by Aldy Hernandez <aldy@quesejoda.com>.

54640

;

54641

; This file is part of GCC.

54642

@@ -137,6 +137,14 @@

54643

Target Report Mask(ALTIVEC) Var(rs6000_isa_flags)

54644

Use AltiVec instructions

54645

54646

+maltivec=le

54647

+Target Report RejectNegative Var(rs6000_altivec_element_order, 1) Save

54648

+Generate Altivec instructions using little-endian element order

54649

+

54650

+maltivec=be

54651

+Target Report RejectNegative Var(rs6000_altivec_element_order, 2)

54652

+Generate Altivec instructions using big-endian element order

54653

+

54654

mhard-dfp

54655

Target Report Mask(DFP) Var(rs6000_isa_flags)

54656

Use decimal floating point instructions

54657

@@ -181,13 +189,16 @@

54658

Target Report Mask(VSX) Var(rs6000_isa_flags)

54659

Use vector/scalar (VSX) instructions

54660

54661

+mvsx-scalar-float

54662

+Target Undocumented Report Var(TARGET_VSX_SCALAR_FLOAT) Init(1)

54663

+; If -mpower8-vector, use VSX arithmetic instructions for SFmode (on by default)

54664

+

54665

mvsx-scalar-double

54666

-Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(-1)

54667

-; If -mvsx, use VSX arithmetic instructions for scalar double (on by default)

54668

+Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(1)

54669

+; If -mvsx, use VSX arithmetic instructions for DFmode (on by default)

54670

54671

mvsx-scalar-memory

54672

-Target Undocumented Report Var(TARGET_VSX_SCALAR_MEMORY)

54673

-; If -mvsx, use VSX scalar memory reference instructions for scalar double (off by default)

54674

+Target Undocumented Report Alias(mupper-regs-df)

54675

54676

mvsx-align-128

54677

Target Undocumented Report Var(TARGET_VSX_ALIGN_128)

54678

@@ -363,6 +374,14 @@

54679

Target RejectNegative Var(rs6000_spe_abi, 0)

54680

Do not use the SPE ABI extensions

54681

54682

+mabi=elfv1

54683

+Target RejectNegative Var(rs6000_elf_abi, 1) Save

54684

+Use the ELFv1 ABI

54685

+

54686

+mabi=elfv2

54687

+Target RejectNegative Var(rs6000_elf_abi, 2)

54688

+Use the ELFv2 ABI

54689

+

54690

; These are here for testing during development only, do not document

54691

; in the manual please.

54692

54693

@@ -443,6 +462,10 @@

54694

Target RejectNegative Joined UInteger Var(rs6000_long_double_type_size) Save

54695

-mlong-double-<n> Specify size of long double (64 or 128 bits)

54696

54697

+mlra

54698

+Target Report Var(rs6000_lra_flag) Init(0) Save

54699

+Use LRA instead of reload

54700

+

54701

msched-costly-dep=

54702

Target RejectNegative Joined Var(rs6000_sched_costly_dep_str)

54703

Determine which dependences between insns are considered costly

54704

@@ -514,3 +537,51 @@

54705

msave-toc-indirect

54706

Target Report Var(TARGET_SAVE_TOC_INDIRECT) Save

54707

Control whether we save the TOC in the prologue for indirect calls or generate the save inline

54708

+

54709

+mvsx-timode

54710

+Target Undocumented Mask(VSX_TIMODE) Var(rs6000_isa_flags)

54711

+Allow 128-bit integers in VSX registers

54712

+

54713

+mpower8-fusion

54714

+Target Report Mask(P8_FUSION) Var(rs6000_isa_flags)

54715

+Fuse certain integer operations together for better performance on power8

54716

+

54717

+mpower8-fusion-sign

54718

+Target Undocumented Mask(P8_FUSION_SIGN) Var(rs6000_isa_flags)

54719

+Allow sign extension in fusion operations

54720

+

54721

+mpower8-vector

54722

+Target Report Mask(P8_VECTOR) Var(rs6000_isa_flags)

54723

+Use/do not use vector and scalar instructions added in ISA 2.07.

54724

+

54725

+mcrypto

54726

+Target Report Mask(CRYPTO) Var(rs6000_isa_flags)

54727

+Use ISA 2.07 crypto instructions

54728

+

54729

+mdirect-move

54730

+Target Report Mask(DIRECT_MOVE) Var(rs6000_isa_flags)

54731

+Use ISA 2.07 direct move between GPR & VSX register instructions

54732

+

54733

+mhtm

54734

+Target Report Mask(HTM) Var(rs6000_isa_flags)

54735

+Use ISA 2.07 transactional memory (HTM) instructions

54736

+

54737

+mquad-memory

54738

+Target Report Mask(QUAD_MEMORY) Var(rs6000_isa_flags)

54739

+Generate the quad word memory instructions (lq/stq).

54740

+

54741

+mquad-memory-atomic

54742

+Target Report Mask(QUAD_MEMORY_ATOMIC) Var(rs6000_isa_flags)

54743

+Generate the quad word memory atomic instructions (lqarx/stqcx).

54744

+

54745

+mcompat-align-parm

54746

+Target Report Var(rs6000_compat_align_parm) Init(1) Save

54747

+Generate aggregate parameter passing code with at most 64-bit alignment.

54748

+

54749

+mupper-regs-df

54750

+Target Undocumented Mask(UPPER_REGS_DF) Var(rs6000_isa_flags)

54751

+Allow double variables in upper registers with -mcpu=power7 or -mvsx

54752

+

54753

+mupper-regs-sf

54754

+Target Undocumented Mask(UPPER_REGS_SF) Var(rs6000_isa_flags)

54755

+Allow float variables in upper registers with -mcpu=power8 or -mp8-vector

54756

Index: gcc/config/rs6000/linux64.h

54757

===================================================================

54758

--- a/src/gcc/config/rs6000/linux64.h (.../tags/gcc_4_8_2_release)

54759

+++ b/src/gcc/config/rs6000/linux64.h (.../branches/gcc-4_8-branch)

54760

@@ -25,9 +25,6 @@

54761

54762

#ifndef RS6000_BI_ARCH

54763

54764

-#undef DEFAULT_ABI

54765

-#define DEFAULT_ABI ABI_AIX

54766

-

54767

#undef TARGET_64BIT

54768

#define TARGET_64BIT 1

54769

54770

@@ -74,7 +71,11 @@

54771

#undef PROCESSOR_DEFAULT

54772

#define PROCESSOR_DEFAULT PROCESSOR_POWER7

54773

#undef PROCESSOR_DEFAULT64

54774

+#ifdef LINUX64_DEFAULT_ABI_ELFv2

54775

+#define PROCESSOR_DEFAULT64 PROCESSOR_POWER8

54776

+#else

54777

#define PROCESSOR_DEFAULT64 PROCESSOR_POWER7

54778

+#endif

54779

54780

/* We don't need to generate entries in .fixup, except when

54781

-mrelocatable or -mrelocatable-lib is given. */

54782

@@ -88,6 +89,12 @@

54783

#define INVALID_64BIT "-m%s not supported in this configuration"

54784

#define INVALID_32BIT INVALID_64BIT

54785

54786

+#ifdef LINUX64_DEFAULT_ABI_ELFv2

54787

+#define ELFv2_ABI_CHECK (rs6000_elf_abi != 1)

54788

+#else

54789

+#define ELFv2_ABI_CHECK (rs6000_elf_abi == 2)

54790

+#endif

54791

+

54792

#undef SUBSUBTARGET_OVERRIDE_OPTIONS

54793

#define SUBSUBTARGET_OVERRIDE_OPTIONS \

54794

do \

54795

@@ -102,6 +109,12 @@

54796

error (INVALID_64BIT, "call"); \

54797

} \

54798

dot_symbols = !strcmp (rs6000_abi_name, "aixdesc"); \

54799

+ if (ELFv2_ABI_CHECK) \

54800

+ { \

54801

+ rs6000_current_abi = ABI_ELFv2; \

54802

+ if (dot_symbols) \

54803

+ error ("-mcall-aixdesc incompatible with -mabi=elfv2"); \

54804

+ } \

54805

if (rs6000_isa_flags & OPTION_MASK_RELOCATABLE) \

54806

{ \

54807

rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \

54808

@@ -136,8 +149,11 @@

54809

SET_CMODEL (CMODEL_MEDIUM); \

54810

if (rs6000_current_cmodel != CMODEL_SMALL) \

54811

{ \

54812

- TARGET_NO_FP_IN_TOC = 0; \

54813

- TARGET_NO_SUM_IN_TOC = 0; \

54814

+ if (!global_options_set.x_TARGET_NO_FP_IN_TOC) \

54815

+ TARGET_NO_FP_IN_TOC \

54816

+ = rs6000_current_cmodel == CMODEL_MEDIUM; \

54817

+ if (!global_options_set.x_TARGET_NO_SUM_IN_TOC) \

54818

+ TARGET_NO_SUM_IN_TOC = 0; \

54819

} \

54820

} \

54821

} \

54822

@@ -351,7 +367,11 @@

54823

#define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"

54824

54825

#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"

54826

-#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld64.so.1"

54827

+#ifdef LINUX64_DEFAULT_ABI_ELFv2

54828

+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"

54829

+#else

54830

+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"

54831

+#endif

54832

#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"

54833

#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"

54834

#if DEFAULT_LIBC == LIBC_UCLIBC

54835

Index: gcc/config/rs6000/darwin.h

54836

===================================================================

54837

--- a/src/gcc/config/rs6000/darwin.h (.../tags/gcc_4_8_2_release)

54838

+++ b/src/gcc/config/rs6000/darwin.h (.../branches/gcc-4_8-branch)

54839

@@ -205,7 +205,8 @@

54840

"v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \

54841

"vrsave", "vscr", \

54842

"spe_acc", "spefscr", \

54843

- "sfp" \

54844

+ "sfp", \

54845

+ "tfhar", "tfiar", "texasr" \

54846

}

54847

54848

/* This outputs NAME to FILE. */

54849

Index: gcc/config/rs6000/rs6000.c

54850

===================================================================

54851

--- a/src/gcc/config/rs6000/rs6000.c (.../tags/gcc_4_8_2_release)

54852

+++ b/src/gcc/config/rs6000/rs6000.c (.../branches/gcc-4_8-branch)

54853

@@ -1,5 +1,5 @@

54854

/* Subroutines used for code generation on IBM RS/6000.

54855

54856

54857

Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)

54858

54859

This file is part of GCC.

54860

@@ -56,6 +56,7 @@

54861

#include "intl.h"

54862

#include "params.h"

54863

#include "tm-constrs.h"

54864

+#include "ira.h"

54865

#include "opts.h"

54866

#include "tree-vectorizer.h"

54867

#include "dumpfile.h"

54868

@@ -96,6 +97,7 @@

54869

int spe_gp_save_offset; /* offset to save spe 64-bit gprs */

54870

int varargs_save_offset; /* offset to save the varargs registers */

54871

int ehrd_offset; /* offset to EH return data */

54872

+ int ehcr_offset; /* offset to EH CR field data */

54873

int reg_size; /* register size (4 or 8) */

54874

HOST_WIDE_INT vars_size; /* variable save area size */

54875

int parm_size; /* outgoing parameter size */

54876

@@ -139,6 +141,8 @@

54877

64-bits wide and is allocated early enough so that the offset

54878

does not overflow the 16-bit load/store offset field. */

54879

rtx sdmode_stack_slot;

54880

+ /* Flag if r2 setup is needed with ELFv2 ABI. */

54881

+ bool r2_setup_needed;

54882

} machine_function;

54883

54884

/* Support targetm.vectorize.builtin_mask_for_load. */

54885

@@ -189,9 +193,6 @@

54886

/* Map register number to register class. */

54887

enum reg_class rs6000_regno_regclass[FIRST_PSEUDO_REGISTER];

54888

54889

-/* Reload functions based on the type and the vector unit. */

54890

-static enum insn_code rs6000_vector_reload[NUM_MACHINE_MODES][2];

54891

-

54892

static int dbg_cost_ctrl;

54893

54894

/* Built in types. */

54895

@@ -289,6 +290,105 @@

54896

don't link in rs6000-c.c, so we can't call it directly. */

54897

void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, HOST_WIDE_INT);

54898

54899

+/* Simplfy register classes into simpler classifications. We assume

54900

+ GPR_REG_TYPE - FPR_REG_TYPE are ordered so that we can use a simple range

54901

+ check for standard register classes (gpr/floating/altivec/vsx) and

54902

+ floating/vector classes (float/altivec/vsx). */

54903

+

54904

+enum rs6000_reg_type {

54905

+ NO_REG_TYPE,

54906

+ PSEUDO_REG_TYPE,

54907

+ GPR_REG_TYPE,

54908

+ VSX_REG_TYPE,

54909

+ ALTIVEC_REG_TYPE,

54910

+ FPR_REG_TYPE,

54911

+ SPR_REG_TYPE,

54912

+ CR_REG_TYPE,

54913

+ SPE_ACC_TYPE,

54914

+ SPEFSCR_REG_TYPE

54915

+};

54916

+

54917

+/* Map register class to register type. */

54918

+static enum rs6000_reg_type reg_class_to_reg_type[N_REG_CLASSES];

54919

+

54920

+/* First/last register type for the 'normal' register types (i.e. general

54921

+ purpose, floating point, altivec, and VSX registers). */

54922

+#define IS_STD_REG_TYPE(RTYPE) IN_RANGE(RTYPE, GPR_REG_TYPE, FPR_REG_TYPE)

54923

+

54924

+#define IS_FP_VECT_REG_TYPE(RTYPE) IN_RANGE(RTYPE, VSX_REG_TYPE, FPR_REG_TYPE)

54925

+

54926

+

54927

+/* Register classes we care about in secondary reload or go if legitimate

54928

+ address. We only need to worry about GPR, FPR, and Altivec registers here,

54929

+ along an ANY field that is the OR of the 3 register classes. */

54930

+

54931

+enum rs6000_reload_reg_type {

54932

+ RELOAD_REG_GPR, /* General purpose registers. */

54933

+ RELOAD_REG_FPR, /* Traditional floating point regs. */

54934

+ RELOAD_REG_VMX, /* Altivec (VMX) registers. */

54935

+ RELOAD_REG_ANY, /* OR of GPR, FPR, Altivec masks. */

54936

+ N_RELOAD_REG

54937

+};

54938

+

54939

+/* For setting up register classes, loop through the 3 register classes mapping

54940

+ into real registers, and skip the ANY class, which is just an OR of the

54941

+ bits. */

54942

+#define FIRST_RELOAD_REG_CLASS RELOAD_REG_GPR

54943

+#define LAST_RELOAD_REG_CLASS RELOAD_REG_VMX

54944

+

54945

+/* Map reload register type to a register in the register class. */

54946

+struct reload_reg_map_type {

54947

+ const char *name; /* Register class name. */

54948

+ int reg; /* Register in the register class. */

54949

+};

54950

+

54951

+static const struct reload_reg_map_type reload_reg_map[N_RELOAD_REG] = {

54952

+ { "Gpr", FIRST_GPR_REGNO }, /* RELOAD_REG_GPR. */

54953

+ { "Fpr", FIRST_FPR_REGNO }, /* RELOAD_REG_FPR. */

54954

+ { "VMX", FIRST_ALTIVEC_REGNO }, /* RELOAD_REG_VMX. */

54955

+ { "Any", -1 }, /* RELOAD_REG_ANY. */

54956

+};

54957

+

54958

+/* Mask bits for each register class, indexed per mode. Historically the

54959

+ compiler has been more restrictive which types can do PRE_MODIFY instead of

54960

+ PRE_INC and PRE_DEC, so keep track of sepaate bits for these two. */

54961

+typedef unsigned char addr_mask_type;

54962

+

54963

+#define RELOAD_REG_VALID 0x01 /* Mode valid in register.. */

54964

+#define RELOAD_REG_MULTIPLE 0x02 /* Mode takes multiple registers. */

54965

+#define RELOAD_REG_INDEXED 0x04 /* Reg+reg addressing. */

54966

+#define RELOAD_REG_OFFSET 0x08 /* Reg+offset addressing. */

54967

+#define RELOAD_REG_PRE_INCDEC 0x10 /* PRE_INC/PRE_DEC valid. */

54968

+#define RELOAD_REG_PRE_MODIFY 0x20 /* PRE_MODIFY valid. */

54969

+

54970

+/* Register type masks based on the type, of valid addressing modes. */

54971

+struct rs6000_reg_addr {

54972

+ enum insn_code reload_load; /* INSN to reload for loading. */

54973

+ enum insn_code reload_store; /* INSN to reload for storing. */

54974

+ enum insn_code reload_fpr_gpr; /* INSN to move from FPR to GPR. */

54975

+ enum insn_code reload_gpr_vsx; /* INSN to move from GPR to VSX. */

54976

+ enum insn_code reload_vsx_gpr; /* INSN to move from VSX to GPR. */

54977

+ addr_mask_type addr_mask[(int)N_RELOAD_REG]; /* Valid address masks. */

54978

+};

54979

+

54980

+static struct rs6000_reg_addr reg_addr[NUM_MACHINE_MODES];

54981

+

54982

+/* Helper function to say whether a mode supports PRE_INC or PRE_DEC. */

54983

+static inline bool

54984

+mode_supports_pre_incdec_p (enum machine_mode mode)

54985

+{

54986

+ return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] & RELOAD_REG_PRE_INCDEC)

54987

+ != 0);

54988

+}

54989

+

54990

+/* Helper function to say whether a mode supports PRE_MODIFY. */

54991

+static inline bool

54992

+mode_supports_pre_modify_p (enum machine_mode mode)

54993

+{

54994

+ return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] & RELOAD_REG_PRE_MODIFY)

54995

+ != 0);

54996

+}

54997

+

54998

54999

/* Target cpu costs. */

55000

55001

@@ -828,6 +928,25 @@

55002

12, /* prefetch streams */

55003

};

55004

55005

+/* Instruction costs on POWER8 processors. */

55006

+static const

55007

+struct processor_costs power8_cost = {

55008

+ COSTS_N_INSNS (3), /* mulsi */

55009

+ COSTS_N_INSNS (3), /* mulsi_const */

55010

+ COSTS_N_INSNS (3), /* mulsi_const9 */

55011

+ COSTS_N_INSNS (3), /* muldi */

55012

+ COSTS_N_INSNS (19), /* divsi */

55013

+ COSTS_N_INSNS (35), /* divdi */

55014

+ COSTS_N_INSNS (3), /* fp */

55015

+ COSTS_N_INSNS (3), /* dmul */

55016

+ COSTS_N_INSNS (14), /* sdiv */

55017

+ COSTS_N_INSNS (17), /* ddiv */

55018

+ 128, /* cache line size */

55019

+ 32, /* l1 cache */

55020

+ 256, /* l2 cache */

55021

+ 12, /* prefetch streams */

55022

+};

55023

+

55024

/* Instruction costs on POWER A2 processors. */

55025

static const

55026

struct processor_costs ppca2_cost = {

55027

@@ -855,6 +974,7 @@

55028

#undef RS6000_BUILTIN_A

55029

#undef RS6000_BUILTIN_D

55030

#undef RS6000_BUILTIN_E

55031

+#undef RS6000_BUILTIN_H

55032

#undef RS6000_BUILTIN_P

55033

#undef RS6000_BUILTIN_Q

55034

#undef RS6000_BUILTIN_S

55035

@@ -878,6 +998,9 @@

55036

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) \

55037

{ NAME, ICODE, MASK, ATTR },

55038

55039

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \

55040

+ { NAME, ICODE, MASK, ATTR },

55041

+

55042

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \

55043

{ NAME, ICODE, MASK, ATTR },

55044

55045

@@ -908,6 +1031,7 @@

55046

#undef RS6000_BUILTIN_A

55047

#undef RS6000_BUILTIN_D

55048

#undef RS6000_BUILTIN_E

55049

+#undef RS6000_BUILTIN_H

55050

#undef RS6000_BUILTIN_P

55051

#undef RS6000_BUILTIN_Q

55052

#undef RS6000_BUILTIN_S

55053

@@ -948,6 +1072,7 @@

55054

static void paired_init_builtins (void);

55055

static rtx paired_expand_predicate_builtin (enum insn_code, tree, rtx);

55056

static void spe_init_builtins (void);

55057

+static void htm_init_builtins (void);

55058

static rtx spe_expand_predicate_builtin (enum insn_code, tree, rtx);

55059

static rtx spe_expand_evsel_builtin (enum insn_code, tree, rtx);

55060

static int rs6000_emit_int_cmove (rtx, rtx, rtx, rtx);

55061

@@ -1020,6 +1145,13 @@

55062

static void rs6000_print_builtin_options (FILE *, int, const char *,

55063

HOST_WIDE_INT);

55064

55065

+static enum rs6000_reg_type register_to_reg_type (rtx, bool *);

55066

+static bool rs6000_secondary_reload_move (enum rs6000_reg_type,

55067

+ enum rs6000_reg_type,

55068

+ enum machine_mode,

55069

+ secondary_reload_info *,

55070

+ bool);

55071

+

55072

/* Hash table stuff for keeping track of TOC entries. */

55073

55074

struct GTY(()) toc_hash_struct

55075

@@ -1068,7 +1200,9 @@

55076

/* SPE registers. */

55077

"spe_acc", "spefscr",

55078

/* Soft frame pointer. */

55079

- "sfp"

55080

+ "sfp",

55081

+ /* HTM SPR registers. */

55082

+ "tfhar", "tfiar", "texasr"

55083

};

55084

55085

#ifdef TARGET_REGNAMES

55086

@@ -1094,7 +1228,9 @@

55087

/* SPE registers. */

55088

"spe_acc", "spefscr",

55089

/* Soft frame pointer. */

55090

- "sfp"

55091

+ "sfp",

55092

+ /* HTM SPR registers. */

55093

+ "tfhar", "tfiar", "texasr"

55094

};

55095

#endif

55096

55097

@@ -1316,6 +1452,9 @@

55098

#undef TARGET_RETURN_IN_MEMORY

55099

#define TARGET_RETURN_IN_MEMORY rs6000_return_in_memory

55100

55101

+#undef TARGET_RETURN_IN_MSB

55102

+#define TARGET_RETURN_IN_MSB rs6000_return_in_msb

55103

+

55104

#undef TARGET_SETUP_INCOMING_VARARGS

55105

#define TARGET_SETUP_INCOMING_VARARGS setup_incoming_varargs

55106

55107

@@ -1425,6 +1564,9 @@

55108

#undef TARGET_MODE_DEPENDENT_ADDRESS_P

55109

#define TARGET_MODE_DEPENDENT_ADDRESS_P rs6000_mode_dependent_address_p

55110

55111

+#undef TARGET_LRA_P

55112

+#define TARGET_LRA_P rs6000_lra_p

55113

+

55114

#undef TARGET_CAN_ELIMINATE

55115

#define TARGET_CAN_ELIMINATE rs6000_can_eliminate

55116

55117

@@ -1513,8 +1655,9 @@

55118

{

55119

unsigned HOST_WIDE_INT reg_size;

55120

55121

+ /* TF/TD modes are special in that they always take 2 registers. */

55122

if (FP_REGNO_P (regno))

55123

- reg_size = (VECTOR_MEM_VSX_P (mode)

55124

+ reg_size = ((VECTOR_MEM_VSX_P (mode) && mode != TDmode && mode != TFmode)

55125

? UNITS_PER_VSX_WORD

55126

: UNITS_PER_FP_WORD);

55127

55128

@@ -1546,16 +1689,39 @@

55129

{

55130

int last_regno = regno + rs6000_hard_regno_nregs[mode][regno] - 1;

55131

55132

+ /* PTImode can only go in GPRs. Quad word memory operations require even/odd

55133

+ register combinations, and use PTImode where we need to deal with quad

55134

+ word memory operations. Don't allow quad words in the argument or frame

55135

+ pointer registers, just registers 0..31. */

55136

+ if (mode == PTImode)

55137

+ return (IN_RANGE (regno, FIRST_GPR_REGNO, LAST_GPR_REGNO)

55138

+ && IN_RANGE (last_regno, FIRST_GPR_REGNO, LAST_GPR_REGNO)

55139

+ && ((regno & 1) == 0));

55140

+

55141

/* VSX registers that overlap the FPR registers are larger than for non-VSX

55142

implementations. Don't allow an item to be split between a FP register

55143

- and an Altivec register. */

55144

- if (VECTOR_MEM_VSX_P (mode))

55145

+ and an Altivec register. Allow TImode in all VSX registers if the user

55146

+ asked for it. */

55147

+ if (TARGET_VSX && VSX_REGNO_P (regno)

55148

+ && (VECTOR_MEM_VSX_P (mode)

55149

+ || (TARGET_VSX_SCALAR_FLOAT && mode == SFmode)

55150

+ || (TARGET_VSX_SCALAR_DOUBLE && (mode == DFmode || mode == DImode))

55151

+ || (TARGET_VSX_TIMODE && mode == TImode)

55152

+ || (TARGET_VADDUQM && mode == V1TImode)))

55153

{

55154

if (FP_REGNO_P (regno))

55155

return FP_REGNO_P (last_regno);

55156

55157

if (ALTIVEC_REGNO_P (regno))

55158

- return ALTIVEC_REGNO_P (last_regno);

55159

+ {

55160

+ if (mode == SFmode && !TARGET_UPPER_REGS_SF)

55161

+ return 0;

55162

+

55163

+ if ((mode == DFmode || mode == DImode) && !TARGET_UPPER_REGS_DF)

55164

+ return 0;

55165

+

55166

+ return ALTIVEC_REGNO_P (last_regno);

55167

+ }

55168

}

55169

55170

/* The GPRs can hold any mode, but values bigger than one register

55171

@@ -1564,8 +1730,7 @@

55172

return INT_REGNO_P (last_regno);

55173

55174

/* The float registers (except for VSX vector modes) can only hold floating

55175

- modes and DImode. This excludes the 32-bit decimal float mode for

55176

- now. */

55177

+ modes and DImode. */

55178

if (FP_REGNO_P (regno))

55179

{

55180

if (SCALAR_FLOAT_MODE_P (mode)

55181

@@ -1593,15 +1758,15 @@

55182

55183

/* AltiVec only in AldyVec registers. */

55184

if (ALTIVEC_REGNO_P (regno))

55185

- return VECTOR_MEM_ALTIVEC_OR_VSX_P (mode);

55186

+ return (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)

55187

+ || mode == V1TImode);

55188

55189

/* ...but GPRs can hold SIMD data on the SPE in one register. */

55190

if (SPE_SIMD_REGNO_P (regno) && TARGET_SPE && SPE_VECTOR_MODE (mode))

55191

return 1;

55192

55193

- /* We cannot put TImode anywhere except general register and it must be able

55194

- to fit within the register set. In the future, allow TImode in the

55195

- Altivec or VSX registers. */

55196

+ /* We cannot put non-VSX TImode or PTImode anywhere except general register

55197

+ and it must be able to fit within the register set. */

55198

55199

return GET_MODE_SIZE (mode) <= UNITS_PER_WORD;

55200

}

55201

@@ -1674,10 +1839,77 @@

55202

comma = "";

55203

}

55204

55205

+ len += fprintf (stderr, "%sreg-class = %s", comma,

55206

+ reg_class_names[(int)rs6000_regno_regclass[r]]);

55207

+ comma = ", ";

55208

+

55209

+ if (len > 70)

55210

+ {

55211

+ fprintf (stderr, ",\n\t");

55212

+ comma = "";

55213

+ }

55214

+

55215

fprintf (stderr, "%sregno = %d\n", comma, r);

55216

}

55217

}

55218

55219

+static const char *

55220

+rs6000_debug_vector_unit (enum rs6000_vector v)

55221

+{

55222

+ const char *ret;

55223

+

55224

+ switch (v)

55225

+ {

55226

+ case VECTOR_NONE: ret = "none"; break;

55227

+ case VECTOR_ALTIVEC: ret = "altivec"; break;

55228

+ case VECTOR_VSX: ret = "vsx"; break;

55229

+ case VECTOR_P8_VECTOR: ret = "p8_vector"; break;

55230

+ case VECTOR_PAIRED: ret = "paired"; break;

55231

+ case VECTOR_SPE: ret = "spe"; break;

55232

+ case VECTOR_OTHER: ret = "other"; break;

55233

+ default: ret = "unknown"; break;

55234

+ }

55235

+

55236

+ return ret;

55237

+}

55238

+

55239

+/* Print the address masks in a human readble fashion. */

55240

+DEBUG_FUNCTION void

55241

+rs6000_debug_print_mode (ssize_t m)

55242

+{

55243

+ ssize_t rc;

55244

+

55245

+ fprintf (stderr, "Mode: %-5s", GET_MODE_NAME (m));

55246

+ for (rc = 0; rc < N_RELOAD_REG; rc++)

55247

+ {

55248

+ addr_mask_type mask = reg_addr[m].addr_mask[rc];

55249

+ fprintf (stderr,

55250

+ " %s: %c%c%c%c%c%c",

55251

+ reload_reg_map[rc].name,

55252

+ (mask & RELOAD_REG_VALID) != 0 ? 'v' : ' ',

55253

+ (mask & RELOAD_REG_MULTIPLE) != 0 ? 'm' : ' ',

55254

+ (mask & RELOAD_REG_INDEXED) != 0 ? 'i' : ' ',

55255

+ (mask & RELOAD_REG_OFFSET) != 0 ? 'o' : ' ',

55256

+ (mask & RELOAD_REG_PRE_INCDEC) != 0 ? '+' : ' ',

55257

+ (mask & RELOAD_REG_PRE_MODIFY) != 0 ? '+' : ' ');

55258

+ }

55259

+

55260

+ if (rs6000_vector_unit[m] != VECTOR_NONE

55261

+ || rs6000_vector_mem[m] != VECTOR_NONE

55262

+ || (reg_addr[m].reload_store != CODE_FOR_nothing)

55263

+ || (reg_addr[m].reload_load != CODE_FOR_nothing))

55264

+ {

55265

+ fprintf (stderr,

55266

+ " Vector-arith=%-10s Vector-mem=%-10s Reload=%c%c",

55267

+ rs6000_debug_vector_unit (rs6000_vector_unit[m]),

55268

+ rs6000_debug_vector_unit (rs6000_vector_mem[m]),

55269

+ (reg_addr[m].reload_store != CODE_FOR_nothing) ? 's' : '*',

55270

+ (reg_addr[m].reload_load != CODE_FOR_nothing) ? 'l' : '*');

55271

+ }

55272

+

55273

+ fputs ("\n", stderr);

55274

+}

55275

+

55276

#define DEBUG_FMT_ID "%-32s= "

55277

#define DEBUG_FMT_D DEBUG_FMT_ID "%d\n"

55278

#define DEBUG_FMT_WX DEBUG_FMT_ID "%#.12" HOST_WIDE_INT_PRINT "x: "

55279

@@ -1690,6 +1922,7 @@

55280

static const char *const tf[2] = { "false", "true" };

55281

const char *nl = (const char *)0;

55282

int m;

55283

+ size_t m1, m2, v;

55284

char costly_num[20];

55285

char nop_num[20];

55286

char flags_buffer[40];

55287

@@ -1700,20 +1933,69 @@

55288

const char *cmodel_str;

55289

struct cl_target_option cl_opts;

55290

55291

- /* Map enum rs6000_vector to string. */

55292

- static const char *rs6000_debug_vector_unit[] = {

55293

- "none",

55294

- "altivec",

55295

- "vsx",

55296

- "paired",

55297

- "spe",

55298

- "other"

55299

+ /* Modes we want tieable information on. */

55300

+ static const enum machine_mode print_tieable_modes[] = {

55301

+ QImode,

55302

+ HImode,

55303

+ SImode,

55304

+ DImode,

55305

+ TImode,

55306

+ PTImode,

55307

+ SFmode,

55308

+ DFmode,

55309

+ TFmode,

55310

+ SDmode,

55311

+ DDmode,

55312

+ TDmode,

55313

+ V8QImode,

55314

+ V4HImode,

55315

+ V2SImode,

55316

+ V16QImode,

55317

+ V8HImode,

55318

+ V4SImode,

55319

+ V2DImode,

55320

+ V1TImode,

55321

+ V32QImode,

55322

+ V16HImode,

55323

+ V8SImode,

55324

+ V4DImode,

55325

+ V2TImode,

55326

+ V2SFmode,

55327

+ V4SFmode,

55328

+ V2DFmode,

55329

+ V8SFmode,

55330

+ V4DFmode,

55331

+ CCmode,

55332

+ CCUNSmode,

55333

+ CCEQmode,

55334

};

55335

55336

- fprintf (stderr, "Register information: (last virtual reg = %d)\n",

55337

- LAST_VIRTUAL_REGISTER);

55338

- rs6000_debug_reg_print (0, 31, "gr");

55339

- rs6000_debug_reg_print (32, 63, "fp");

55340

+ /* Virtual regs we are interested in. */

55341

+ const static struct {

55342

+ int regno; /* register number. */

55343

+ const char *name; /* register name. */

55344

+ } virtual_regs[] = {

55345

+ { STACK_POINTER_REGNUM, "stack pointer:" },

55346

+ { TOC_REGNUM, "toc: " },

55347

+ { STATIC_CHAIN_REGNUM, "static chain: " },

55348

+ { RS6000_PIC_OFFSET_TABLE_REGNUM, "pic offset: " },

55349

+ { HARD_FRAME_POINTER_REGNUM, "hard frame: " },

55350

+ { ARG_POINTER_REGNUM, "arg pointer: " },

55351

+ { FRAME_POINTER_REGNUM, "frame pointer:" },

55352

+ { FIRST_PSEUDO_REGISTER, "first pseudo: " },

55353

+ { FIRST_VIRTUAL_REGISTER, "first virtual:" },

55354

+ { VIRTUAL_INCOMING_ARGS_REGNUM, "incoming_args:" },

55355

+ { VIRTUAL_STACK_VARS_REGNUM, "stack_vars: " },

55356

+ { VIRTUAL_STACK_DYNAMIC_REGNUM, "stack_dynamic:" },

55357

+ { VIRTUAL_OUTGOING_ARGS_REGNUM, "outgoing_args:" },

55358

+ { VIRTUAL_CFA_REGNUM, "cfa (frame): " },

55359

+ { VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM, "stack boundry:" },

55360

+ { LAST_VIRTUAL_REGISTER, "last virtual: " },

55361

+ };

55362

+

55363

+ fputs ("\nHard register information:\n", stderr);

55364

+ rs6000_debug_reg_print (FIRST_GPR_REGNO, LAST_GPR_REGNO, "gr");

55365

+ rs6000_debug_reg_print (FIRST_FPR_REGNO, LAST_FPR_REGNO, "fp");

55366

rs6000_debug_reg_print (FIRST_ALTIVEC_REGNO,

55367

LAST_ALTIVEC_REGNO,

55368

"vs");

55369

@@ -1726,6 +2008,10 @@

55370

rs6000_debug_reg_print (SPE_ACC_REGNO, SPE_ACC_REGNO, "spe_a");

55371

rs6000_debug_reg_print (SPEFSCR_REGNO, SPEFSCR_REGNO, "spe_f");

55372

55373

+ fputs ("\nVirtual/stack/frame registers:\n", stderr);

55374

+ for (v = 0; v < ARRAY_SIZE (virtual_regs); v++)

55375

+ fprintf (stderr, "%s regno = %3d\n", virtual_regs[v].name, virtual_regs[v].regno);

55376

+

55377

fprintf (stderr,

55378

"\n"

55379

"d reg_class = %s\n"

55380

@@ -1734,7 +2020,19 @@

55381

"wa reg_class = %s\n"

55382

"wd reg_class = %s\n"

55383

"wf reg_class = %s\n"

55384

- "ws reg_class = %s\n\n",

55385

+ "wg reg_class = %s\n"

55386

+ "wl reg_class = %s\n"

55387

+ "wm reg_class = %s\n"

55388

+ "wr reg_class = %s\n"

55389

+ "ws reg_class = %s\n"

55390

+ "wt reg_class = %s\n"

55391

+ "wu reg_class = %s\n"

55392

+ "wv reg_class = %s\n"

55393

+ "ww reg_class = %s\n"

55394

+ "wx reg_class = %s\n"

55395

+ "wy reg_class = %s\n"

55396

+ "wz reg_class = %s\n"

55397

+ "\n",

55398

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_d]],

55399

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_f]],

55400

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_v]],

55401

@@ -1741,18 +2039,51 @@

55402

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wa]],

55403

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wd]],

55404

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wf]],

55405

- reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_ws]]);

55406

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wg]],

55407

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wl]],

55408

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wm]],

55409

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wr]],

55410

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_ws]],

55411

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wt]],

55412

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wu]],

55413

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wv]],

55414

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_ww]],

55415

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wx]],

55416

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wy]],

55417

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wz]]);

55418

55419

+ nl = "\n";

55420

for (m = 0; m < NUM_MACHINE_MODES; ++m)

55421

- if (rs6000_vector_unit[m] || rs6000_vector_mem[m])

55422

- {

55423

- nl = "\n";

55424

- fprintf (stderr, "Vector mode: %-5s arithmetic: %-8s move: %-8s\n",

55425

- GET_MODE_NAME (m),

55426

- rs6000_debug_vector_unit[ rs6000_vector_unit[m] ],

55427

- rs6000_debug_vector_unit[ rs6000_vector_mem[m] ]);

55428

- }

55429

+ rs6000_debug_print_mode (m);

55430

55431

+ fputs ("\n", stderr);

55432

+

55433

+ for (m1 = 0; m1 < ARRAY_SIZE (print_tieable_modes); m1++)

55434

+ {

55435

+ enum machine_mode mode1 = print_tieable_modes[m1];

55436

+ bool first_time = true;

55437

+

55438

+ nl = (const char *)0;

55439

+ for (m2 = 0; m2 < ARRAY_SIZE (print_tieable_modes); m2++)

55440

+ {

55441

+ enum machine_mode mode2 = print_tieable_modes[m2];

55442

+ if (mode1 != mode2 && MODES_TIEABLE_P (mode1, mode2))

55443

+ {

55444

+ if (first_time)

55445

+ {

55446

+ fprintf (stderr, "Tieable modes %s:", GET_MODE_NAME (mode1));

55447

+ nl = "\n";

55448

+ first_time = false;

55449

+ }

55450

+

55451

+ fprintf (stderr, " %s", GET_MODE_NAME (mode2));

55452

+ }

55453

+ }

55454

+

55455

+ if (!first_time)

55456

+ fputs ("\n", stderr);

55457

+ }

55458

+

55459

if (nl)

55460

fputs (nl, stderr);

55461

55462

@@ -1913,6 +2244,7 @@

55463

{

55464

case ABI_NONE: abi_str = "none"; break;

55465

case ABI_AIX: abi_str = "aix"; break;

55466

+ case ABI_ELFv2: abi_str = "ELFv2"; break;

55467

case ABI_V4: abi_str = "V4"; break;

55468

case ABI_DARWIN: abi_str = "darwin"; break;

55469

default: abi_str = "unknown"; break;

55470

@@ -1932,9 +2264,34 @@

55471

if (rs6000_float_gprs)

55472

fprintf (stderr, DEBUG_FMT_S, "float_gprs", "true");

55473

55474

+ fprintf (stderr, DEBUG_FMT_S, "fprs",

55475

+ (TARGET_FPRS ? "true" : "false"));

55476

+

55477

+ fprintf (stderr, DEBUG_FMT_S, "single_float",

55478

+ (TARGET_SINGLE_FLOAT ? "true" : "false"));

55479

+

55480

+ fprintf (stderr, DEBUG_FMT_S, "double_float",

55481

+ (TARGET_DOUBLE_FLOAT ? "true" : "false"));

55482

+

55483

+ fprintf (stderr, DEBUG_FMT_S, "soft_float",

55484

+ (TARGET_SOFT_FLOAT ? "true" : "false"));

55485

+

55486

+ fprintf (stderr, DEBUG_FMT_S, "e500_single",

55487

+ (TARGET_E500_SINGLE ? "true" : "false"));

55488

+

55489

+ fprintf (stderr, DEBUG_FMT_S, "e500_double",

55490

+ (TARGET_E500_DOUBLE ? "true" : "false"));

55491

+

55492

if (TARGET_LINK_STACK)

55493

fprintf (stderr, DEBUG_FMT_S, "link_stack", "true");

55494

55495

+ if (targetm.lra_p ())

55496

+ fprintf (stderr, DEBUG_FMT_S, "lra", "true");

55497

+

55498

+ if (TARGET_P8_FUSION)

55499

+ fprintf (stderr, DEBUG_FMT_S, "p8 fusion",

55500

+ (TARGET_P8_FUSION_SIGN) ? "zero+sign" : "zero");

55501

+

55502

fprintf (stderr, DEBUG_FMT_S, "plt-format",

55503

TARGET_SECURE_PLT ? "secure" : "bss");

55504

fprintf (stderr, DEBUG_FMT_S, "struct-return",

55505

@@ -1954,11 +2311,106 @@

55506

(int)RS6000_BUILTIN_COUNT);

55507

}

55508

55509

+

55510

+/* Update the addr mask bits in reg_addr to help secondary reload and go if

55511

+ legitimate address support to figure out the appropriate addressing to

55512

+ use. */

55513

+

55514

+static void

55515

+rs6000_setup_reg_addr_masks (void)

55516

+{

55517

+ ssize_t rc, reg, m, nregs;

55518

+ addr_mask_type any_addr_mask, addr_mask;

55519

+

55520

+ for (m = 0; m < NUM_MACHINE_MODES; ++m)

55521

+ {

55522

+ /* SDmode is special in that we want to access it only via REG+REG

55523

+ addressing on power7 and above, since we want to use the LFIWZX and

55524

+ STFIWZX instructions to load it. */

55525

+ bool indexed_only_p = (m == SDmode && TARGET_NO_SDMODE_STACK);

55526

+

55527

+ any_addr_mask = 0;

55528

+ for (rc = FIRST_RELOAD_REG_CLASS; rc <= LAST_RELOAD_REG_CLASS; rc++)

55529

+ {

55530

+ addr_mask = 0;

55531

+ reg = reload_reg_map[rc].reg;

55532

+

55533

+ /* Can mode values go in the GPR/FPR/Altivec registers? */

55534

+ if (reg >= 0 && rs6000_hard_regno_mode_ok_p[m][reg])

55535

+ {

55536

+ nregs = rs6000_hard_regno_nregs[m][reg];

55537

+ addr_mask |= RELOAD_REG_VALID;

55538

+

55539

+ /* Indicate if the mode takes more than 1 physical register. If

55540

+ it takes a single register, indicate it can do REG+REG

55541

+ addressing. */

55542

+ if (nregs > 1 || m == BLKmode)

55543

+ addr_mask |= RELOAD_REG_MULTIPLE;

55544

+ else

55545

+ addr_mask |= RELOAD_REG_INDEXED;

55546

+

55547

+ /* Figure out if we can do PRE_INC, PRE_DEC, or PRE_MODIFY

55548

+ addressing. Restrict addressing on SPE for 64-bit types

55549

+ because of the SUBREG hackery used to address 64-bit floats in

55550

+ '32-bit' GPRs. To simplify secondary reload, don't allow

55551

+ update forms on scalar floating point types that can go in the

55552

+ upper registers. */

55553

+

55554

+ if (TARGET_UPDATE

55555

+ && (rc == RELOAD_REG_GPR || rc == RELOAD_REG_FPR)

55556

+ && GET_MODE_SIZE (m) <= 8

55557

+ && !VECTOR_MODE_P (m)

55558

+ && !COMPLEX_MODE_P (m)

55559

+ && !indexed_only_p

55560

+ && !(TARGET_E500_DOUBLE && GET_MODE_SIZE (m) == 8)

55561

+ && !(m == DFmode && TARGET_UPPER_REGS_DF)

55562

+ && !(m == SFmode && TARGET_UPPER_REGS_SF))

55563

+ {

55564

+ addr_mask |= RELOAD_REG_PRE_INCDEC;

55565

+

55566

+ /* PRE_MODIFY is more restricted than PRE_INC/PRE_DEC in that

55567

+ we don't allow PRE_MODIFY for some multi-register

55568

+ operations. */

55569

+ switch (m)

55570

+ {

55571

+ default:

55572

+ addr_mask |= RELOAD_REG_PRE_MODIFY;

55573

+ break;

55574

+

55575

+ case DImode:

55576

+ if (TARGET_POWERPC64)

55577

+ addr_mask |= RELOAD_REG_PRE_MODIFY;

55578

+ break;

55579

+

55580

+ case DFmode:

55581

+ case DDmode:

55582

+ if (TARGET_DF_INSN)

55583

+ addr_mask |= RELOAD_REG_PRE_MODIFY;

55584

+ break;

55585

+ }

55586

+ }

55587

+ }

55588

+

55589

+ /* GPR and FPR registers can do REG+OFFSET addressing, except

55590

+ possibly for SDmode. */

55591

+ if ((addr_mask != 0) && !indexed_only_p

55592

+ && (rc == RELOAD_REG_GPR || rc == RELOAD_REG_FPR))

55593

+ addr_mask |= RELOAD_REG_OFFSET;

55594

+

55595

+ reg_addr[m].addr_mask[rc] = addr_mask;

55596

+ any_addr_mask |= addr_mask;

55597

+ }

55598

+

55599

+ reg_addr[m].addr_mask[RELOAD_REG_ANY] = any_addr_mask;

55600

+ }

55601

+}

55602

+

55603

+

55604

/* Initialize the various global tables that are based on register size. */

55605

static void

55606

rs6000_init_hard_regno_mode_ok (bool global_init_p)

55607

{

55608

- int r, m, c;

55609

+ ssize_t r, m, c;

55610

int align64;

55611

int align32;

55612

55613

@@ -1987,21 +2439,55 @@

55614

rs6000_regno_regclass[VSCR_REGNO] = VRSAVE_REGS;

55615

rs6000_regno_regclass[SPE_ACC_REGNO] = SPE_ACC_REGS;

55616

rs6000_regno_regclass[SPEFSCR_REGNO] = SPEFSCR_REGS;

55617

+ rs6000_regno_regclass[TFHAR_REGNO] = SPR_REGS;

55618

+ rs6000_regno_regclass[TFIAR_REGNO] = SPR_REGS;

55619

+ rs6000_regno_regclass[TEXASR_REGNO] = SPR_REGS;

55620

rs6000_regno_regclass[ARG_POINTER_REGNUM] = BASE_REGS;

55621

rs6000_regno_regclass[FRAME_POINTER_REGNUM] = BASE_REGS;

55622

55623

- /* Precalculate vector information, this must be set up before the

55624

- rs6000_hard_regno_nregs_internal below. */

55625

- for (m = 0; m < NUM_MACHINE_MODES; ++m)

55626

+ /* Precalculate register class to simpler reload register class. We don't

55627

+ need all of the register classes that are combinations of different

55628

+ classes, just the simple ones that have constraint letters. */

55629

+ for (c = 0; c < N_REG_CLASSES; c++)

55630

+ reg_class_to_reg_type[c] = NO_REG_TYPE;

55631

+

55632

+ reg_class_to_reg_type[(int)GENERAL_REGS] = GPR_REG_TYPE;

55633

+ reg_class_to_reg_type[(int)BASE_REGS] = GPR_REG_TYPE;

55634

+ reg_class_to_reg_type[(int)VSX_REGS] = VSX_REG_TYPE;

55635

+ reg_class_to_reg_type[(int)VRSAVE_REGS] = SPR_REG_TYPE;

55636

+ reg_class_to_reg_type[(int)VSCR_REGS] = SPR_REG_TYPE;

55637

+ reg_class_to_reg_type[(int)LINK_REGS] = SPR_REG_TYPE;

55638

+ reg_class_to_reg_type[(int)CTR_REGS] = SPR_REG_TYPE;

55639

+ reg_class_to_reg_type[(int)LINK_OR_CTR_REGS] = SPR_REG_TYPE;

55640

+ reg_class_to_reg_type[(int)CR_REGS] = CR_REG_TYPE;

55641

+ reg_class_to_reg_type[(int)CR0_REGS] = CR_REG_TYPE;

55642

+ reg_class_to_reg_type[(int)SPE_ACC_REGS] = SPE_ACC_TYPE;

55643

+ reg_class_to_reg_type[(int)SPEFSCR_REGS] = SPEFSCR_REG_TYPE;

55644

+

55645

+ if (TARGET_VSX)

55646

{

55647

- rs6000_vector_unit[m] = rs6000_vector_mem[m] = VECTOR_NONE;

55648

- rs6000_vector_reload[m][0] = CODE_FOR_nothing;

55649

- rs6000_vector_reload[m][1] = CODE_FOR_nothing;

55650

+ reg_class_to_reg_type[(int)FLOAT_REGS] = VSX_REG_TYPE;

55651

+ reg_class_to_reg_type[(int)ALTIVEC_REGS] = VSX_REG_TYPE;

55652

}

55653

+ else

55654

+ {

55655

+ reg_class_to_reg_type[(int)FLOAT_REGS] = FPR_REG_TYPE;

55656

+ reg_class_to_reg_type[(int)ALTIVEC_REGS] = ALTIVEC_REG_TYPE;

55657

+ }

55658

55659

- for (c = 0; c < (int)(int)RS6000_CONSTRAINT_MAX; c++)

55660

- rs6000_constraints[c] = NO_REGS;

55661

+ /* Precalculate the valid memory formats as well as the vector information,

55662

+ this must be set up before the rs6000_hard_regno_nregs_internal calls

55663

+ below. */

55664

+ gcc_assert ((int)VECTOR_NONE == 0);

55665

+ memset ((void *) &rs6000_vector_unit[0], '\0', sizeof (rs6000_vector_unit));

55666

+ memset ((void *) &rs6000_vector_mem[0], '\0', sizeof (rs6000_vector_unit));

55667

55668

+ gcc_assert ((int)CODE_FOR_nothing == 0);

55669

+ memset ((void *) &reg_addr[0], '\0', sizeof (reg_addr));

55670

+

55671

+ gcc_assert ((int)NO_REGS == 0);

55672

+ memset ((void *) &rs6000_constraints[0], '\0', sizeof (rs6000_constraints));

55673

+

55674

/* The VSX hardware allows native alignment for vectors, but control whether the compiler

55675

believes it can use native alignment or still uses 128-bit alignment. */

55676

if (TARGET_VSX && !TARGET_VSX_ALIGN_128)

55677

@@ -2062,13 +2548,19 @@

55678

}

55679

}

55680

55681

- /* V2DImode, only allow under VSX, which can do V2DI insert/splat/extract.

55682

- Altivec doesn't have 64-bit support. */

55683

+ /* V2DImode, full mode depends on ISA 2.07 vector mode. Allow under VSX to

55684

+ do insert/splat/extract. Altivec doesn't have 64-bit integer support. */

55685

if (TARGET_VSX)

55686

{

55687

rs6000_vector_mem[V2DImode] = VECTOR_VSX;

55688

- rs6000_vector_unit[V2DImode] = VECTOR_NONE;

55689

+ rs6000_vector_unit[V2DImode]

55690

+ = (TARGET_P8_VECTOR) ? VECTOR_P8_VECTOR : VECTOR_NONE;

55691

rs6000_vector_align[V2DImode] = align64;

55692

+

55693

+ rs6000_vector_mem[V1TImode] = VECTOR_VSX;

55694

+ rs6000_vector_unit[V1TImode]

55695

+ = (TARGET_P8_VECTOR) ? VECTOR_P8_VECTOR : VECTOR_NONE;

55696

+ rs6000_vector_align[V1TImode] = 128;

55697

}

55698

55699

/* DFmode, see if we want to use the VSX unit. */

55700

@@ -2076,14 +2568,48 @@

55701

{

55702

rs6000_vector_unit[DFmode] = VECTOR_VSX;

55703

rs6000_vector_mem[DFmode]

55704

- = (TARGET_VSX_SCALAR_MEMORY ? VECTOR_VSX : VECTOR_NONE);

55705

+ = (TARGET_UPPER_REGS_DF ? VECTOR_VSX : VECTOR_NONE);

55706

rs6000_vector_align[DFmode] = align64;

55707

}

55708

55709

+ /* Allow TImode in VSX register and set the VSX memory macros. */

55710

+ if (TARGET_VSX && TARGET_VSX_TIMODE)

55711

+ {

55712

+ rs6000_vector_mem[TImode] = VECTOR_VSX;

55713

+ rs6000_vector_align[TImode] = align64;

55714

+ }

55715

+

55716

/* TODO add SPE and paired floating point vector support. */

55717

55718

/* Register class constraints for the constraints that depend on compile

55719

- switches. */

55720

+ switches. When the VSX code was added, different constraints were added

55721

+ based on the type (DFmode, V2DFmode, V4SFmode). For the vector types, all

55722

+ of the VSX registers are used. The register classes for scalar floating

55723

+ point types is set, based on whether we allow that type into the upper

55724

+ (Altivec) registers. GCC has register classes to target the Altivec

55725

+ registers for load/store operations, to select using a VSX memory

55726

+ operation instead of the traditional floating point operation. The

55727

+ constraints are:

55728

+

55729

+ d - Register class to use with traditional DFmode instructions.

55730

+ f - Register class to use with traditional SFmode instructions.

55731

+ v - Altivec register.

55732

+ wa - Any VSX register.

55733

+ wd - Preferred register class for V2DFmode.

55734

+ wf - Preferred register class for V4SFmode.

55735

+ wg - Float register for power6x move insns.

55736

+ wl - Float register if we can do 32-bit signed int loads.

55737

+ wm - VSX register for ISA 2.07 direct move operations.

55738

+ wr - GPR if 64-bit mode is permitted.

55739

+ ws - Register class to do ISA 2.06 DF operations.

55740

+ wu - Altivec register for ISA 2.07 VSX SF/SI load/stores.

55741

+ wv - Altivec register for ISA 2.06 VSX DF/DI load/stores.

55742

+ wt - VSX register for TImode in VSX registers.

55743

+ ww - Register class to do SF conversions in with VSX operations.

55744

+ wx - Float register if we can do 32-bit int stores.

55745

+ wy - Register class to do ISA 2.07 SF operations.

55746

+ wz - Float register if we can do 32-bit unsigned int loads. */

55747

+

55748

if (TARGET_HARD_FLOAT && TARGET_FPRS)

55749

rs6000_constraints[RS6000_CONSTRAINT_f] = FLOAT_REGS;

55750

55751

@@ -2092,64 +2618,164 @@

55752

55753

if (TARGET_VSX)

55754

{

55755

- /* At present, we just use VSX_REGS, but we have different constraints

55756

- based on the use, in case we want to fine tune the default register

55757

- class used. wa = any VSX register, wf = register class to use for

55758

- V4SF, wd = register class to use for V2DF, and ws = register classs to

55759

- use for DF scalars. */

55760

rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;

55761

+ rs6000_constraints[RS6000_CONSTRAINT_wd] = VSX_REGS;

55762

rs6000_constraints[RS6000_CONSTRAINT_wf] = VSX_REGS;

55763

- rs6000_constraints[RS6000_CONSTRAINT_wd] = VSX_REGS;

55764

- rs6000_constraints[RS6000_CONSTRAINT_ws] = (TARGET_VSX_SCALAR_MEMORY

55765

- ? VSX_REGS

55766

- : FLOAT_REGS);

55767

+

55768

+ if (TARGET_VSX_TIMODE)

55769

+ rs6000_constraints[RS6000_CONSTRAINT_wt] = VSX_REGS;

55770

+

55771

+ if (TARGET_UPPER_REGS_DF)

55772

+ {

55773

+ rs6000_constraints[RS6000_CONSTRAINT_ws] = VSX_REGS;

55774

+ rs6000_constraints[RS6000_CONSTRAINT_wv] = ALTIVEC_REGS;

55775

+ }

55776

+ else

55777

+ rs6000_constraints[RS6000_CONSTRAINT_ws] = FLOAT_REGS;

55778

}

55779

55780

+ /* Add conditional constraints based on various options, to allow us to

55781

+ collapse multiple insn patterns. */

55782

if (TARGET_ALTIVEC)

55783

rs6000_constraints[RS6000_CONSTRAINT_v] = ALTIVEC_REGS;

55784

55785

- /* Set up the reload helper functions. */

55786

+ if (TARGET_MFPGPR)

55787

+ rs6000_constraints[RS6000_CONSTRAINT_wg] = FLOAT_REGS;

55788

+

55789

+ if (TARGET_LFIWAX)

55790

+ rs6000_constraints[RS6000_CONSTRAINT_wl] = FLOAT_REGS;

55791

+

55792

+ if (TARGET_DIRECT_MOVE)

55793

+ rs6000_constraints[RS6000_CONSTRAINT_wm] = VSX_REGS;

55794

+

55795

+ if (TARGET_POWERPC64)

55796

+ rs6000_constraints[RS6000_CONSTRAINT_wr] = GENERAL_REGS;

55797

+

55798

+ if (TARGET_P8_VECTOR && TARGET_UPPER_REGS_SF)

55799

+ {

55800

+ rs6000_constraints[RS6000_CONSTRAINT_wu] = ALTIVEC_REGS;

55801

+ rs6000_constraints[RS6000_CONSTRAINT_wy] = VSX_REGS;

55802

+ rs6000_constraints[RS6000_CONSTRAINT_ww] = VSX_REGS;

55803

+ }

55804

+ else if (TARGET_P8_VECTOR)

55805

+ {

55806

+ rs6000_constraints[RS6000_CONSTRAINT_wy] = FLOAT_REGS;

55807

+ rs6000_constraints[RS6000_CONSTRAINT_ww] = FLOAT_REGS;

55808

+ }

55809

+ else if (TARGET_VSX)

55810

+ rs6000_constraints[RS6000_CONSTRAINT_ww] = FLOAT_REGS;

55811

+

55812

+ if (TARGET_STFIWX)

55813

+ rs6000_constraints[RS6000_CONSTRAINT_wx] = FLOAT_REGS;

55814

+

55815

+ if (TARGET_LFIWZX)

55816

+ rs6000_constraints[RS6000_CONSTRAINT_wz] = FLOAT_REGS;

55817

+

55818

+ /* Set up the reload helper and direct move functions. */

55819

if (TARGET_VSX || TARGET_ALTIVEC)

55820

{

55821

if (TARGET_64BIT)

55822

{

55823

- rs6000_vector_reload[V16QImode][0] = CODE_FOR_reload_v16qi_di_store;

55824

- rs6000_vector_reload[V16QImode][1] = CODE_FOR_reload_v16qi_di_load;

55825

- rs6000_vector_reload[V8HImode][0] = CODE_FOR_reload_v8hi_di_store;

55826

- rs6000_vector_reload[V8HImode][1] = CODE_FOR_reload_v8hi_di_load;

55827

- rs6000_vector_reload[V4SImode][0] = CODE_FOR_reload_v4si_di_store;

55828

- rs6000_vector_reload[V4SImode][1] = CODE_FOR_reload_v4si_di_load;

55829

- rs6000_vector_reload[V2DImode][0] = CODE_FOR_reload_v2di_di_store;

55830

- rs6000_vector_reload[V2DImode][1] = CODE_FOR_reload_v2di_di_load;

55831

- rs6000_vector_reload[V4SFmode][0] = CODE_FOR_reload_v4sf_di_store;

55832

- rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_di_load;

55833

- rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_di_store;

55834

- rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_di_load;

55835

- if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)

55836

+ reg_addr[V16QImode].reload_store = CODE_FOR_reload_v16qi_di_store;

55837

+ reg_addr[V16QImode].reload_load = CODE_FOR_reload_v16qi_di_load;

55838

+ reg_addr[V8HImode].reload_store = CODE_FOR_reload_v8hi_di_store;

55839

+ reg_addr[V8HImode].reload_load = CODE_FOR_reload_v8hi_di_load;

55840

+ reg_addr[V4SImode].reload_store = CODE_FOR_reload_v4si_di_store;

55841

+ reg_addr[V4SImode].reload_load = CODE_FOR_reload_v4si_di_load;

55842

+ reg_addr[V2DImode].reload_store = CODE_FOR_reload_v2di_di_store;

55843

+ reg_addr[V2DImode].reload_load = CODE_FOR_reload_v2di_di_load;

55844

+ reg_addr[V1TImode].reload_store = CODE_FOR_reload_v1ti_di_store;

55845

+ reg_addr[V1TImode].reload_load = CODE_FOR_reload_v1ti_di_load;

55846

+ reg_addr[V4SFmode].reload_store = CODE_FOR_reload_v4sf_di_store;

55847

+ reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_di_load;

55848

+ reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_di_store;

55849

+ reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_di_load;

55850

+ if (TARGET_VSX && TARGET_UPPER_REGS_DF)

55851

{

55852

- rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_di_store;

55853

- rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_di_load;

55854

+ reg_addr[DFmode].reload_store = CODE_FOR_reload_df_di_store;

55855

+ reg_addr[DFmode].reload_load = CODE_FOR_reload_df_di_load;

55856

+ reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_di_store;

55857

+ reg_addr[DDmode].reload_load = CODE_FOR_reload_dd_di_load;

55858

}

55859

+ if (TARGET_P8_VECTOR)

55860

+ {

55861

+ reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_di_store;

55862

+ reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_di_load;

55863

+ reg_addr[SDmode].reload_store = CODE_FOR_reload_sd_di_store;

55864

+ reg_addr[SDmode].reload_load = CODE_FOR_reload_sd_di_load;

55865

+ }

55866

+ if (TARGET_VSX_TIMODE)

55867

+ {

55868

+ reg_addr[TImode].reload_store = CODE_FOR_reload_ti_di_store;

55869

+ reg_addr[TImode].reload_load = CODE_FOR_reload_ti_di_load;

55870

+ }

55871

+ if (TARGET_DIRECT_MOVE)

55872

+ {

55873

+ if (TARGET_POWERPC64)

55874

+ {

55875

+ reg_addr[TImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxti;

55876

+ reg_addr[V1TImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv1ti;

55877

+ reg_addr[V2DFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv2df;

55878

+ reg_addr[V2DImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv2di;

55879

+ reg_addr[V4SFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv4sf;

55880

+ reg_addr[V4SImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv4si;

55881

+ reg_addr[V8HImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv8hi;

55882

+ reg_addr[V16QImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv16qi;

55883

+ reg_addr[SFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxsf;

55884

+

55885

+ reg_addr[TImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprti;

55886

+ reg_addr[V1TImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv1ti;

55887

+ reg_addr[V2DFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv2df;

55888

+ reg_addr[V2DImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv2di;

55889

+ reg_addr[V4SFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv4sf;

55890

+ reg_addr[V4SImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv4si;

55891

+ reg_addr[V8HImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv8hi;

55892

+ reg_addr[V16QImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv16qi;

55893

+ reg_addr[SFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprsf;

55894

+ }

55895

+ else

55896

+ {

55897

+ reg_addr[DImode].reload_fpr_gpr = CODE_FOR_reload_fpr_from_gprdi;

55898

+ reg_addr[DDmode].reload_fpr_gpr = CODE_FOR_reload_fpr_from_gprdd;

55899

+ reg_addr[DFmode].reload_fpr_gpr = CODE_FOR_reload_fpr_from_gprdf;

55900

+ }

55901

+ }

55902

}

55903

else

55904

{

55905

- rs6000_vector_reload[V16QImode][0] = CODE_FOR_reload_v16qi_si_store;

55906

- rs6000_vector_reload[V16QImode][1] = CODE_FOR_reload_v16qi_si_load;

55907

- rs6000_vector_reload[V8HImode][0] = CODE_FOR_reload_v8hi_si_store;

55908

- rs6000_vector_reload[V8HImode][1] = CODE_FOR_reload_v8hi_si_load;

55909

- rs6000_vector_reload[V4SImode][0] = CODE_FOR_reload_v4si_si_store;

55910

- rs6000_vector_reload[V4SImode][1] = CODE_FOR_reload_v4si_si_load;

55911

- rs6000_vector_reload[V2DImode][0] = CODE_FOR_reload_v2di_si_store;

55912

- rs6000_vector_reload[V2DImode][1] = CODE_FOR_reload_v2di_si_load;

55913

- rs6000_vector_reload[V4SFmode][0] = CODE_FOR_reload_v4sf_si_store;

55914

- rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_si_load;

55915

- rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_si_store;

55916

- rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_si_load;

55917

- if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)

55918

+ reg_addr[V16QImode].reload_store = CODE_FOR_reload_v16qi_si_store;

55919

+ reg_addr[V16QImode].reload_load = CODE_FOR_reload_v16qi_si_load;

55920

+ reg_addr[V8HImode].reload_store = CODE_FOR_reload_v8hi_si_store;

55921

+ reg_addr[V8HImode].reload_load = CODE_FOR_reload_v8hi_si_load;

55922

+ reg_addr[V4SImode].reload_store = CODE_FOR_reload_v4si_si_store;

55923

+ reg_addr[V4SImode].reload_load = CODE_FOR_reload_v4si_si_load;

55924

+ reg_addr[V2DImode].reload_store = CODE_FOR_reload_v2di_si_store;

55925

+ reg_addr[V2DImode].reload_load = CODE_FOR_reload_v2di_si_load;

55926

+ reg_addr[V1TImode].reload_store = CODE_FOR_reload_v1ti_si_store;

55927

+ reg_addr[V1TImode].reload_load = CODE_FOR_reload_v1ti_si_load;

55928

+ reg_addr[V4SFmode].reload_store = CODE_FOR_reload_v4sf_si_store;

55929

+ reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_si_load;

55930

+ reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_si_store;

55931

+ reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_si_load;

55932

+ if (TARGET_VSX && TARGET_UPPER_REGS_DF)

55933

{

55934

- rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_si_store;

55935

- rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_si_load;

55936

+ reg_addr[DFmode].reload_store = CODE_FOR_reload_df_si_store;

55937

+ reg_addr[DFmode].reload_load = CODE_FOR_reload_df_si_load;

55938

+ reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_si_store;

55939

+ reg_addr[DDmode].reload_load = CODE_FOR_reload_dd_si_load;

55940

}

55941

+ if (TARGET_P8_VECTOR)

55942

+ {

55943

+ reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_si_store;

55944

+ reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_si_load;

55945

+ reg_addr[SDmode].reload_store = CODE_FOR_reload_sd_si_store;

55946

+ reg_addr[SDmode].reload_load = CODE_FOR_reload_sd_si_load;

55947

+ }

55948

+ if (TARGET_VSX_TIMODE)

55949

+ {

55950

+ reg_addr[TImode].reload_store = CODE_FOR_reload_ti_si_store;

55951

+ reg_addr[TImode].reload_load = CODE_FOR_reload_ti_si_load;

55952

+ }

55953

}

55954

}

55955

55956

@@ -2267,6 +2893,11 @@

55957

}

55958

}

55959

55960

+ /* Update the addr mask bits in reg_addr to help secondary reload and go if

55961

+ legitimate address support to figure out the appropriate addressing to

55962

+ use. */

55963

+ rs6000_setup_reg_addr_masks ();

55964

+

55965

if (global_init_p || TARGET_DEBUG_TARGET)

55966

{

55967

if (TARGET_DEBUG_REG)

55968

@@ -2369,16 +3000,19 @@

55969

HOST_WIDE_INT

55970

rs6000_builtin_mask_calculate (void)

55971

{

55972

- return (((TARGET_ALTIVEC) ? RS6000_BTM_ALTIVEC : 0)

55973

- | ((TARGET_VSX) ? RS6000_BTM_VSX : 0)

55974

- | ((TARGET_SPE) ? RS6000_BTM_SPE : 0)

55975

- | ((TARGET_PAIRED_FLOAT) ? RS6000_BTM_PAIRED : 0)

55976

- | ((TARGET_FRE) ? RS6000_BTM_FRE : 0)

55977

- | ((TARGET_FRES) ? RS6000_BTM_FRES : 0)

55978

- | ((TARGET_FRSQRTE) ? RS6000_BTM_FRSQRTE : 0)

55979

- | ((TARGET_FRSQRTES) ? RS6000_BTM_FRSQRTES : 0)

55980

- | ((TARGET_POPCNTD) ? RS6000_BTM_POPCNTD : 0)

55981

- | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0));

55982

+ return (((TARGET_ALTIVEC) ? RS6000_BTM_ALTIVEC : 0)

55983

+ | ((TARGET_VSX) ? RS6000_BTM_VSX : 0)

55984

+ | ((TARGET_SPE) ? RS6000_BTM_SPE : 0)

55985

+ | ((TARGET_PAIRED_FLOAT) ? RS6000_BTM_PAIRED : 0)

55986

+ | ((TARGET_FRE) ? RS6000_BTM_FRE : 0)

55987

+ | ((TARGET_FRES) ? RS6000_BTM_FRES : 0)

55988

+ | ((TARGET_FRSQRTE) ? RS6000_BTM_FRSQRTE : 0)

55989

+ | ((TARGET_FRSQRTES) ? RS6000_BTM_FRSQRTES : 0)

55990

+ | ((TARGET_POPCNTD) ? RS6000_BTM_POPCNTD : 0)

55991

+ | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0)

55992

+ | ((TARGET_P8_VECTOR) ? RS6000_BTM_P8_VECTOR : 0)

55993

+ | ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0)

55994

+ | ((TARGET_HTM) ? RS6000_BTM_HTM : 0));

55995

}

55996

55997

/* Override command line options. Mostly we process the processor type and

55998

@@ -2415,7 +3049,8 @@

55999

calculation works better for RTL loop invariant motion on targets

56000

with enough (>= 32) registers. It is an expensive optimization.

56001

So it is on only for peak performance. */

56002

- if (optimize >= 3 && global_init_p)

56003

+ if (optimize >= 3 && global_init_p

56004

+ && !global_options_set.x_flag_ira_loop_pressure)

56005

flag_ira_loop_pressure = 1;

56006

56007

/* Set the pointer size. */

56008

@@ -2609,6 +3244,24 @@

56009

}

56010

}

56011

56012

+ /* If little-endian, default to -mstrict-align on older processors.

56013

+ Testing for htm matches power8 and later. */

56014

+ if (!BYTES_BIG_ENDIAN

56015

+ && !(processor_target_table[tune_index].target_enable & OPTION_MASK_HTM))

56016

+ rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;

56017

+

56018

+ /* -maltivec={le,be} implies -maltivec. */

56019

+ if (rs6000_altivec_element_order != 0)

56020

+ rs6000_isa_flags |= OPTION_MASK_ALTIVEC;

56021

+

56022

+ /* Disallow -maltivec=le in big endian mode for now. This is not

56023

+ known to be useful for anyone. */

56024

+ if (BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 1)

56025

+ {

56026

+ warning (0, N_("-maltivec=le not allowed for big-endian targets"));

56027

+ rs6000_altivec_element_order = 0;

56028

+ }

56029

+

56030

/* Add some warnings for VSX. */

56031

if (TARGET_VSX)

56032

{

56033

@@ -2619,15 +3272,13 @@

56034

if (rs6000_isa_flags_explicit & OPTION_MASK_VSX)

56035

msg = N_("-mvsx requires hardware floating point");

56036

else

56037

- rs6000_isa_flags &= ~ OPTION_MASK_VSX;

56038

+ {

56039

+ rs6000_isa_flags &= ~ OPTION_MASK_VSX;

56040

+ rs6000_isa_flags_explicit |= OPTION_MASK_VSX;

56041

+ }

56042

}

56043

else if (TARGET_PAIRED_FLOAT)

56044

msg = N_("-mvsx and -mpaired are incompatible");

56045

- /* The hardware will allow VSX and little endian, but until we make sure

56046

- things like vector select, etc. work don't allow VSX on little endian

56047

- systems at this point. */

56048

- else if (!BYTES_BIG_ENDIAN)

56049

- msg = N_("-mvsx used with little endian code");

56050

else if (TARGET_AVOID_XFORM > 0)

56051

msg = N_("-mvsx needs indexed addressing");

56052

else if (!TARGET_ALTIVEC && (rs6000_isa_flags_explicit

56053

@@ -2647,9 +3298,24 @@

56054

}

56055

}

56056

56057

+ /* If hard-float/altivec/vsx were explicitly turned off then don't allow

56058

+ the -mcpu setting to enable options that conflict. */

56059

+ if ((!TARGET_HARD_FLOAT || !TARGET_ALTIVEC || !TARGET_VSX)

56060

+ && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT

56061

+ | OPTION_MASK_ALTIVEC

56062

+ | OPTION_MASK_VSX)) != 0)

56063

+ rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO

56064

+ | OPTION_MASK_DIRECT_MOVE)

56065

+ & ~rs6000_isa_flags_explicit);

56066

+

56067

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

56068

+ rs6000_print_isa_options (stderr, 0, "before defaults", rs6000_isa_flags);

56069

+

56070

/* For the newer switches (vsx, dfp, etc.) set some of the older options,

56071

unless the user explicitly used the -mno-<option> to disable the code. */

56072

- if (TARGET_VSX)

56073

+ if (TARGET_P8_VECTOR || TARGET_DIRECT_MOVE || TARGET_CRYPTO)

56074

+ rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~rs6000_isa_flags_explicit);

56075

+ else if (TARGET_VSX)

56076

rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~rs6000_isa_flags_explicit);

56077

else if (TARGET_POPCNTD)

56078

rs6000_isa_flags |= (ISA_2_6_MASKS_EMBEDDED & ~rs6000_isa_flags_explicit);

56079

@@ -2664,6 +3330,92 @@

56080

else if (TARGET_ALTIVEC)

56081

rs6000_isa_flags |= (OPTION_MASK_PPC_GFXOPT & ~rs6000_isa_flags_explicit);

56082

56083

+ if (TARGET_CRYPTO && !TARGET_ALTIVEC)

56084

+ {

56085

+ if (rs6000_isa_flags_explicit & OPTION_MASK_CRYPTO)

56086

+ error ("-mcrypto requires -maltivec");

56087

+ rs6000_isa_flags &= ~OPTION_MASK_CRYPTO;

56088

+ }

56089

+

56090

+ if (TARGET_DIRECT_MOVE && !TARGET_VSX)

56091

+ {

56092

+ if (rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE)

56093

+ error ("-mdirect-move requires -mvsx");

56094

+ rs6000_isa_flags &= ~OPTION_MASK_DIRECT_MOVE;

56095

+ }

56096

+

56097

+ if (TARGET_P8_VECTOR && !TARGET_ALTIVEC)

56098

+ {

56099

+ if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)

56100

+ error ("-mpower8-vector requires -maltivec");

56101

+ rs6000_isa_flags &= ~OPTION_MASK_P8_VECTOR;

56102

+ }

56103

+

56104

+ if (TARGET_P8_VECTOR && !TARGET_VSX)

56105

+ {

56106

+ if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)

56107

+ error ("-mpower8-vector requires -mvsx");

56108

+ rs6000_isa_flags &= ~OPTION_MASK_P8_VECTOR;

56109

+ }

56110

+

56111

+ if (TARGET_VSX_TIMODE && !TARGET_VSX)

56112

+ {

56113

+ if (rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE)

56114

+ error ("-mvsx-timode requires -mvsx");

56115

+ rs6000_isa_flags &= ~OPTION_MASK_VSX_TIMODE;

56116

+ }

56117

+

56118

+ /* The quad memory instructions only works in 64-bit mode. In 32-bit mode,

56119

+ silently turn off quad memory mode. */

56120

+ if ((TARGET_QUAD_MEMORY || TARGET_QUAD_MEMORY_ATOMIC) && !TARGET_POWERPC64)

56121

+ {

56122

+ if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY) != 0)

56123

+ warning (0, N_("-mquad-memory requires 64-bit mode"));

56124

+

56125

+ if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY_ATOMIC) != 0)

56126

+ warning (0, N_("-mquad-memory-atomic requires 64-bit mode"));

56127

+

56128

+ rs6000_isa_flags &= ~(OPTION_MASK_QUAD_MEMORY

56129

+ | OPTION_MASK_QUAD_MEMORY_ATOMIC);

56130

+ }

56131

+

56132

+ /* Non-atomic quad memory load/store are disabled for little endian, since

56133

+ the words are reversed, but atomic operations can still be done by

56134

+ swapping the words. */

56135

+ if (TARGET_QUAD_MEMORY && !WORDS_BIG_ENDIAN)

56136

+ {

56137

+ if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY) != 0)

56138

+ warning (0, N_("-mquad-memory is not available in little endian mode"));

56139

+

56140

+ rs6000_isa_flags &= ~OPTION_MASK_QUAD_MEMORY;

56141

+ }

56142

+

56143

+ /* Assume if the user asked for normal quad memory instructions, they want

56144

+ the atomic versions as well, unless they explicity told us not to use quad

56145

+ word atomic instructions. */

56146

+ if (TARGET_QUAD_MEMORY

56147

+ && !TARGET_QUAD_MEMORY_ATOMIC

56148

+ && ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY_ATOMIC) == 0))

56149

+ rs6000_isa_flags |= OPTION_MASK_QUAD_MEMORY_ATOMIC;

56150

+

56151

+ /* Enable power8 fusion if we are tuning for power8, even if we aren't

56152

+ generating power8 instructions. */

56153

+ if (!(rs6000_isa_flags_explicit & OPTION_MASK_P8_FUSION))

56154

+ rs6000_isa_flags |= (processor_target_table[tune_index].target_enable

56155

+ & OPTION_MASK_P8_FUSION);

56156

+

56157

+ /* Power8 does not fuse sign extended loads with the addis. If we are

56158

+ optimizing at high levels for speed, convert a sign extended load into a

56159

+ zero extending load, and an explicit sign extension. */

56160

+ if (TARGET_P8_FUSION

56161

+ && !(rs6000_isa_flags_explicit & OPTION_MASK_P8_FUSION_SIGN)

56162

+ && optimize_function_for_speed_p (cfun)

56163

+ && optimize >= 3)

56164

+ rs6000_isa_flags |= OPTION_MASK_P8_FUSION_SIGN;

56165

+

56166

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

56167

+ rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags);

56168

+

56169

/* E500mc does "better" if we inline more aggressively. Respect the

56170

user's opinion, though. */

56171

if (rs6000_block_move_inline_limit == 0

56172

@@ -2787,9 +3539,13 @@

56173

56174

/* Place FP constants in the constant pool instead of TOC

56175

if section anchors enabled. */

56176

- if (flag_section_anchors)

56177

+ if (flag_section_anchors

56178

+ && !global_options_set.x_TARGET_NO_FP_IN_TOC)

56179

TARGET_NO_FP_IN_TOC = 1;

56180

56181

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

56182

+ rs6000_print_isa_options (stderr, 0, "before subtarget", rs6000_isa_flags);

56183

+

56184

#ifdef SUBTARGET_OVERRIDE_OPTIONS

56185

SUBTARGET_OVERRIDE_OPTIONS;

56186

#endif

56187

@@ -2800,6 +3556,9 @@

56188

SUB3TARGET_OVERRIDE_OPTIONS;

56189

#endif

56190

56191

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

56192

+ rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags);

56193

+

56194

/* For the E500 family of cores, reset the single/double FP flags to let us

56195

check that they remain constant across attributes or pragmas. Also,

56196

clear a possible request for string instructions, not supported and which

56197

@@ -2849,16 +3608,19 @@

56198

&& rs6000_cpu != PROCESSOR_POWER5

56199

&& rs6000_cpu != PROCESSOR_POWER6

56200

&& rs6000_cpu != PROCESSOR_POWER7

56201

+ && rs6000_cpu != PROCESSOR_POWER8

56202

&& rs6000_cpu != PROCESSOR_PPCA2

56203

&& rs6000_cpu != PROCESSOR_CELL

56204

&& rs6000_cpu != PROCESSOR_PPC476);

56205

rs6000_sched_groups = (rs6000_cpu == PROCESSOR_POWER4

56206

|| rs6000_cpu == PROCESSOR_POWER5

56207

- || rs6000_cpu == PROCESSOR_POWER7);

56208

+ || rs6000_cpu == PROCESSOR_POWER7

56209

+ || rs6000_cpu == PROCESSOR_POWER8);

56210

rs6000_align_branch_targets = (rs6000_cpu == PROCESSOR_POWER4

56211

|| rs6000_cpu == PROCESSOR_POWER5

56212

|| rs6000_cpu == PROCESSOR_POWER6

56213

|| rs6000_cpu == PROCESSOR_POWER7

56214

+ || rs6000_cpu == PROCESSOR_POWER8

56215

|| rs6000_cpu == PROCESSOR_PPCE500MC

56216

|| rs6000_cpu == PROCESSOR_PPCE500MC64

56217

|| rs6000_cpu == PROCESSOR_PPCE5500

56218

@@ -2988,7 +3750,7 @@

56219

56220

/* We should always be splitting complex arguments, but we can't break

56221

Linux and Darwin ABIs at the moment. For now, only AIX is fixed. */

56222

- if (DEFAULT_ABI != ABI_AIX)

56223

+ if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN)

56224

targetm.calls.split_complex_arg = NULL;

56225

}

56226

56227

@@ -3102,6 +3864,10 @@

56228

rs6000_cost = &power7_cost;

56229

break;

56230

56231

+ case PROCESSOR_POWER8:

56232

+ rs6000_cost = &power8_cost;

56233

+ break;

56234

+

56235

case PROCESSOR_PPCA2:

56236

rs6000_cost = &ppca2_cost;

56237

break;

56238

@@ -3274,7 +4040,8 @@

56239

&& (rs6000_cpu == PROCESSOR_POWER4

56240

|| rs6000_cpu == PROCESSOR_POWER5

56241

|| rs6000_cpu == PROCESSOR_POWER6

56242

- || rs6000_cpu == PROCESSOR_POWER7))

56243

+ || rs6000_cpu == PROCESSOR_POWER7

56244

+ || rs6000_cpu == PROCESSOR_POWER8))

56245

return 5;

56246

else

56247

return align_loops_log;

56248

@@ -3493,6 +4260,8 @@

56249

{

56250

case SFmode:

56251

return V4SFmode;

56252

+ case TImode:

56253

+ return V1TImode;

56254

case DImode:

56255

return V2DImode;

56256

case SImode:

56257

@@ -3813,6 +4582,22 @@

56258

enum built_in_function fn = DECL_FUNCTION_CODE (fndecl);

56259

switch (fn)

56260

{

56261

+ case BUILT_IN_CLZIMAX:

56262

+ case BUILT_IN_CLZLL:

56263

+ case BUILT_IN_CLZL:

56264

+ case BUILT_IN_CLZ:

56265

+ if (TARGET_P8_VECTOR && in_mode == out_mode && out_n == in_n)

56266

+ {

56267

+ if (out_mode == QImode && out_n == 16)

56268

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZB];

56269

+ else if (out_mode == HImode && out_n == 8)

56270

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZH];

56271

+ else if (out_mode == SImode && out_n == 4)

56272

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZW];

56273

+ else if (out_mode == DImode && out_n == 2)

56274

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZD];

56275

+ }

56276

+ break;

56277

case BUILT_IN_COPYSIGN:

56278

if (VECTOR_UNIT_VSX_P (V2DFmode)

56279

&& out_mode == DFmode && out_n == 2

56280

@@ -3828,6 +4613,22 @@

56281

if (VECTOR_UNIT_ALTIVEC_P (V4SFmode))

56282

return rs6000_builtin_decls[ALTIVEC_BUILTIN_COPYSIGN_V4SF];

56283

break;

56284

+ case BUILT_IN_POPCOUNTIMAX:

56285

+ case BUILT_IN_POPCOUNTLL:

56286

+ case BUILT_IN_POPCOUNTL:

56287

+ case BUILT_IN_POPCOUNT:

56288

+ if (TARGET_P8_VECTOR && in_mode == out_mode && out_n == in_n)

56289

+ {

56290

+ if (out_mode == QImode && out_n == 16)

56291

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTB];

56292

+ else if (out_mode == HImode && out_n == 8)

56293

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTH];

56294

+ else if (out_mode == SImode && out_n == 4)

56295

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTW];

56296

+ else if (out_mode == DImode && out_n == 2)

56297

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTD];

56298

+ }

56299

+ break;

56300

case BUILT_IN_SQRT:

56301

if (VECTOR_UNIT_VSX_P (V2DFmode)

56302

&& out_mode == DFmode && out_n == 2

56303

@@ -4043,7 +4844,11 @@

56304

putc ('\n', file);

56305

}

56306

56307

- if (DEFAULT_ABI == ABI_AIX || (TARGET_ELF && flag_pic == 2))

56308

+ if (DEFAULT_ABI == ABI_ELFv2)

56309

+ fprintf (file, "\t.abiversion 2\n");

56310

+

56311

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2

56312

+ || (TARGET_ELF && flag_pic == 2))

56313

{

56314

switch_to_section (toc_section);

56315

switch_to_section (text_section);

56316

@@ -4230,7 +5035,7 @@

56317

HOST_WIDE_INT splat_val;

56318

HOST_WIDE_INT msb_val;

56319

56320

- if (mode == V2DImode || mode == V2DFmode)

56321

+ if (mode == V2DImode || mode == V2DFmode || mode == V1TImode)

56322

return false;

56323

56324

nunits = GET_MODE_NUNITS (mode);

56325

@@ -4239,7 +5044,7 @@

56326

56327

val = const_vector_elt_as_int (op, BYTES_BIG_ENDIAN ? nunits - 1 : 0);

56328

splat_val = val;

56329

- msb_val = val > 0 ? 0 : -1;

56330

+ msb_val = val >= 0 ? 0 : -1;

56331

56332

/* Construct the value to be splatted, if possible. If not, return 0. */

56333

for (i = 2; i <= copies; i *= 2)

56334

@@ -4274,15 +5079,16 @@

56335

56336

/* Check if VAL is present in every STEP-th element, and the

56337

other elements are filled with its most significant bit. */

56338

- for (i = 0; i < nunits - 1; ++i)

56339

+ for (i = 1; i < nunits; ++i)

56340

{

56341

HOST_WIDE_INT desired_val;

56342

- if (((BYTES_BIG_ENDIAN ? i + 1 : i) & (step - 1)) == 0)

56343

+ unsigned elt = BYTES_BIG_ENDIAN ? nunits - 1 - i : i;

56344

+ if ((i & (step - 1)) == 0)

56345

desired_val = val;

56346

else

56347

desired_val = msb_val;

56348

56349

- if (desired_val != const_vector_elt_as_int (op, i))

56350

+ if (desired_val != const_vector_elt_as_int (op, elt))

56351

return false;

56352

}

56353

56354

@@ -4308,7 +5114,7 @@

56355

if (mode == V2DFmode)

56356

return zero_constant (op, mode);

56357

56358

- if (mode == V2DImode)

56359

+ else if (mode == V2DImode)

56360

{

56361

/* In case the compiler is built 32-bit, CONST_DOUBLE constants are not

56362

easy. */

56363

@@ -4326,6 +5132,10 @@

56364

return false;

56365

}

56366

56367

+ /* V1TImode is a special container for TImode. Ignore for now. */

56368

+ else if (mode == V1TImode)

56369

+ return false;

56370

+

56371

/* Start with a vspltisw. */

56372

step = GET_MODE_NUNITS (mode) / 4;

56373

copies = 1;

56374

@@ -4407,7 +5217,7 @@

56375

if (zero_constant (vec, mode))

56376

return "xxlxor %x0,%x0,%x0";

56377

56378

- if (mode == V2DImode

56379

+ if ((mode == V2DImode || mode == V1TImode)

56380

&& INTVAL (CONST_VECTOR_ELT (vec, 0)) == -1

56381

&& INTVAL (CONST_VECTOR_ELT (vec, 1)) == -1)

56382

return "vspltisw %0,-1";

56383

@@ -4698,9 +5508,12 @@

56384

{

56385

rtx freg = gen_reg_rtx (V4SFmode);

56386

rtx sreg = force_reg (SFmode, XVECEXP (vals, 0, 0));

56387

+ rtx cvt = ((TARGET_XSCVDPSPN)

56388

+ ? gen_vsx_xscvdpspn_scalar (freg, sreg)

56389

+ : gen_vsx_xscvdpsp_scalar (freg, sreg));

56390

56391

- emit_insn (gen_vsx_xscvdpsp_scalar (freg, sreg));

56392

- emit_insn (gen_vsx_xxspltw_v4sf (target, freg, const0_rtx));

56393

+ emit_insn (cvt);

56394

+ emit_insn (gen_vsx_xxspltw_v4sf_direct (target, freg, const0_rtx));

56395

}

56396

else

56397

{

56398

@@ -4790,6 +5603,13 @@

56399

return;

56400

}

56401

56402

+ /* Simplify setting single element vectors like V1TImode. */

56403

+ if (GET_MODE_SIZE (mode) == GET_MODE_SIZE (inner_mode) && elt == 0)

56404

+ {

56405

+ emit_move_insn (target, gen_lowpart (mode, val));

56406

+ return;

56407

+ }

56408

+

56409

/* Load single variable value. */

56410

mem = assign_stack_temp (mode, GET_MODE_SIZE (inner_mode));

56411

emit_move_insn (adjust_address_nv (mem, inner_mode, 0), val);

56412

@@ -4811,10 +5631,29 @@

56413

XVECEXP (mask, 0, elt*width + i)

56414

= GEN_INT (i + 0x10);

56415

x = gen_rtx_CONST_VECTOR (V16QImode, XVEC (mask, 0));

56416

- x = gen_rtx_UNSPEC (mode,

56417

- gen_rtvec (3, target, reg,

56418

- force_reg (V16QImode, x)),

56419

- UNSPEC_VPERM);

56420

+

56421

+ if (BYTES_BIG_ENDIAN)

56422

+ x = gen_rtx_UNSPEC (mode,

56423

+ gen_rtvec (3, target, reg,

56424

+ force_reg (V16QImode, x)),

56425

+ UNSPEC_VPERM);

56426

+ else

56427

+ {

56428

+ /* Invert selector. We prefer to generate VNAND on P8 so

56429

+ that future fusion opportunities can kick in, but must

56430

+ generate VNOR elsewhere. */

56431

+ rtx notx = gen_rtx_NOT (V16QImode, force_reg (V16QImode, x));

56432

+ rtx iorx = (TARGET_P8_VECTOR

56433

+ ? gen_rtx_IOR (V16QImode, notx, notx)

56434

+ : gen_rtx_AND (V16QImode, notx, notx));

56435

+ rtx tmp = gen_reg_rtx (V16QImode);

56436

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, iorx));

56437

+

56438

+ /* Permute with operands reversed and adjusted selector. */

56439

+ x = gen_rtx_UNSPEC (mode, gen_rtvec (3, reg, target, tmp),

56440

+ UNSPEC_VPERM);

56441

+ }

56442

+

56443

emit_insn (gen_rtx_SET (VOIDmode, target, x));

56444

}

56445

56446

@@ -4833,6 +5672,10 @@

56447

{

56448

default:

56449

break;

56450

+ case V1TImode:

56451

+ gcc_assert (elt == 0 && inner_mode == TImode);

56452

+ emit_move_insn (target, gen_lowpart (TImode, vec));

56453

+ break;

56454

case V2DFmode:

56455

emit_insn (gen_vsx_extract_v2df (target, vec, GEN_INT (elt)));

56456

return;

56457

@@ -4938,7 +5781,7 @@

56458

purpose. */

56459

if (GET_CODE (op) == SUBREG

56460

&& (mode == SImode || mode == DImode || mode == TImode

56461

- || mode == DDmode || mode == TDmode)

56462

+ || mode == DDmode || mode == TDmode || mode == PTImode)

56463

&& REG_P (SUBREG_REG (op))

56464

&& (GET_MODE (SUBREG_REG (op)) == DFmode

56465

|| GET_MODE (SUBREG_REG (op)) == TFmode))

56466

@@ -4951,6 +5794,7 @@

56467

&& REG_P (SUBREG_REG (op))

56468

&& (GET_MODE (SUBREG_REG (op)) == DImode

56469

|| GET_MODE (SUBREG_REG (op)) == TImode

56470

+ || GET_MODE (SUBREG_REG (op)) == PTImode

56471

|| GET_MODE (SUBREG_REG (op)) == DDmode

56472

|| GET_MODE (SUBREG_REG (op)) == TDmode))

56473

return true;

56474

@@ -4966,6 +5810,48 @@

56475

return false;

56476

}

56477

56478

+/* Return alignment of TYPE. Existing alignment is ALIGN. HOW

56479

+ selects whether the alignment is abi mandated, optional, or

56480

+ both abi and optional alignment. */

56481

+

56482

+unsigned int

56483

+rs6000_data_alignment (tree type, unsigned int align, enum data_align how)

56484

+{

56485

+ if (how != align_opt)

56486

+ {

56487

+ if (TREE_CODE (type) == VECTOR_TYPE)

56488

+ {

56489

+ if ((TARGET_SPE && SPE_VECTOR_MODE (TYPE_MODE (type)))

56490

+ || (TARGET_PAIRED_FLOAT && PAIRED_VECTOR_MODE (TYPE_MODE (type))))

56491

+ {

56492

+ if (align < 64)

56493

+ align = 64;

56494

+ }

56495

+ else if (align < 128)

56496

+ align = 128;

56497

+ }

56498

+ else if (TARGET_E500_DOUBLE

56499

+ && TREE_CODE (type) == REAL_TYPE

56500

+ && TYPE_MODE (type) == DFmode)

56501

+ {

56502

+ if (align < 64)

56503

+ align = 64;

56504

+ }

56505

+ }

56506

+

56507

+ if (how != align_abi)

56508

+ {

56509

+ if (TREE_CODE (type) == ARRAY_TYPE

56510

+ && TYPE_MODE (TREE_TYPE (type)) == QImode)

56511

+ {

56512

+ if (align < BITS_PER_WORD)

56513

+ align = BITS_PER_WORD;

56514

+ }

56515

+ }

56516

+

56517

+ return align;

56518

+}

56519

+

56520

/* AIX increases natural record alignment to doubleword if the first

56521

field is an FP double while the FP fields remain word aligned. */

56522

56523

@@ -5087,6 +5973,73 @@

56524

|| (REG_P (op1) && INT_REGNO_P (REGNO (op1))));

56525

}

56526

56527

+/* Return true if this is a move direct operation between GPR registers and

56528

+ floating point/VSX registers. */

56529

+

56530

+bool

56531

+direct_move_p (rtx op0, rtx op1)

56532

+{

56533

+ int regno0, regno1;

56534

+

56535

+ if (!REG_P (op0) || !REG_P (op1))

56536

+ return false;

56537

+

56538

+ if (!TARGET_DIRECT_MOVE && !TARGET_MFPGPR)

56539

+ return false;

56540

+

56541

+ regno0 = REGNO (op0);

56542

+ regno1 = REGNO (op1);

56543

+ if (regno0 >= FIRST_PSEUDO_REGISTER || regno1 >= FIRST_PSEUDO_REGISTER)

56544

+ return false;

56545

+

56546

+ if (INT_REGNO_P (regno0))

56547

+ return (TARGET_DIRECT_MOVE) ? VSX_REGNO_P (regno1) : FP_REGNO_P (regno1);

56548

+

56549

+ else if (INT_REGNO_P (regno1))

56550

+ {

56551

+ if (TARGET_MFPGPR && FP_REGNO_P (regno0))

56552

+ return true;

56553

+

56554

+ else if (TARGET_DIRECT_MOVE && VSX_REGNO_P (regno0))

56555

+ return true;

56556

+ }

56557

+

56558

+ return false;

56559

+}

56560

+

56561

+/* Return true if this is a load or store quad operation. This function does

56562

+ not handle the atomic quad memory instructions. */

56563

+

56564

+bool

56565

+quad_load_store_p (rtx op0, rtx op1)

56566

+{

56567

+ bool ret;

56568

+

56569

+ if (!TARGET_QUAD_MEMORY)

56570

+ ret = false;

56571

+

56572

+ else if (REG_P (op0) && MEM_P (op1))

56573

+ ret = (quad_int_reg_operand (op0, GET_MODE (op0))

56574

+ && quad_memory_operand (op1, GET_MODE (op1))

56575

+ && !reg_overlap_mentioned_p (op0, op1));

56576

+

56577

+ else if (MEM_P (op0) && REG_P (op1))

56578

+ ret = (quad_memory_operand (op0, GET_MODE (op0))

56579

+ && quad_int_reg_operand (op1, GET_MODE (op1)));

56580

+

56581

+ else

56582

+ ret = false;

56583

+

56584

+ if (TARGET_DEBUG_ADDR)

56585

+ {

56586

+ fprintf (stderr, "\n========== quad_load_store, return %s\n",

56587

+ ret ? "true" : "false");

56588

+ debug_rtx (gen_rtx_SET (VOIDmode, op0, op1));

56589

+ }

56590

+

56591

+ return ret;

56592

+}

56593

+

56594

/* Given an address, return a constant offset term if one exists. */

56595

56596

static rtx

56597

@@ -5170,7 +6123,12 @@

56598

case V4SImode:

56599

case V2DFmode:

56600

case V2DImode:

56601

- /* AltiVec/VSX vector modes. Only reg+reg addressing is valid. */

56602

+ case V1TImode:

56603

+ case TImode:

56604

+ /* AltiVec/VSX vector modes. Only reg+reg addressing is valid. While

56605

+ TImode is not a vector mode, if we want to use the VSX registers to

56606

+ move it around, we need to restrict ourselves to reg+reg

56607

+ addressing. */

56608

if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode))

56609

return false;

56610

break;

56611

@@ -5184,6 +6142,13 @@

56612

return false;

56613

break;

56614

56615

+ case SDmode:

56616

+ /* If we can do direct load/stores of SDmode, restrict it to reg+reg

56617

+ addressing for the LFIWZX and STFIWX instructions. */

56618

+ if (TARGET_NO_SDMODE_STACK)

56619

+ return false;

56620

+ break;

56621

+

56622

default:

56623

break;

56624

}

56625

@@ -5211,8 +6176,8 @@

56626

&& regnum <= LAST_VIRTUAL_POINTER_REGISTER);

56627

}

56628

56629

-/* Return true if memory accesses to OP are known to never straddle

56630

- a 32k boundary. */

56631

+/* Return true if a MODE sized memory accesses to OP plus OFFSET

56632

+ is known to not straddle a 32k boundary. */

56633

56634

static bool

56635

offsettable_ok_by_alignment (rtx op, HOST_WIDE_INT offset,

56636

@@ -5219,15 +6184,16 @@

56637

enum machine_mode mode)

56638

{

56639

tree decl, type;

56640

- unsigned HOST_WIDE_INT dsize, dalign;

56641

+ unsigned HOST_WIDE_INT dsize, dalign, lsb, mask;

56642

56643

if (GET_CODE (op) != SYMBOL_REF)

56644

return false;

56645

56646

+ dsize = GET_MODE_SIZE (mode);

56647

decl = SYMBOL_REF_DECL (op);

56648

if (!decl)

56649

{

56650

- if (GET_MODE_SIZE (mode) == 0)

56651

+ if (dsize == 0)

56652

return false;

56653

56654

/* -fsection-anchors loses the original SYMBOL_REF_DECL when

56655

@@ -5234,68 +6200,78 @@

56656

replacing memory addresses with an anchor plus offset. We

56657

could find the decl by rummaging around in the block->objects

56658

VEC for the given offset but that seems like too much work. */

56659

- dalign = 1;

56660

+ dalign = BITS_PER_UNIT;

56661

if (SYMBOL_REF_HAS_BLOCK_INFO_P (op)

56662

&& SYMBOL_REF_ANCHOR_P (op)

56663

&& SYMBOL_REF_BLOCK (op) != NULL)

56664

{

56665

struct object_block *block = SYMBOL_REF_BLOCK (op);

56666

- HOST_WIDE_INT lsb, mask;

56667

56668

- /* Given the alignment of the block.. */

56669

dalign = block->alignment;

56670

- mask = dalign / BITS_PER_UNIT - 1;

56671

-

56672

- /* ..and the combined offset of the anchor and any offset

56673

- to this block object.. */

56674

offset += SYMBOL_REF_BLOCK_OFFSET (op);

56675

- lsb = offset & -offset;

56676

+ }

56677

+ else if (CONSTANT_POOL_ADDRESS_P (op))

56678

+ {

56679

+ /* It would be nice to have get_pool_align().. */

56680

+ enum machine_mode cmode = get_pool_mode (op);

56681

56682

- /* ..find how many bits of the alignment we know for the

56683

- object. */

56684

- mask &= lsb - 1;

56685

- dalign = mask + 1;

56686

+ dalign = GET_MODE_ALIGNMENT (cmode);

56687

}

56688

- return dalign >= GET_MODE_SIZE (mode);

56689

}

56690

-

56691

- if (DECL_P (decl))

56692

+ else if (DECL_P (decl))

56693

{

56694

- if (TREE_CODE (decl) == FUNCTION_DECL)

56695

- return true;

56696

+ dalign = DECL_ALIGN (decl);

56697

56698

- if (!DECL_SIZE_UNIT (decl))

56699

- return false;

56700

+ if (dsize == 0)

56701

+ {

56702

+ /* Allow BLKmode when the entire object is known to not

56703

+ cross a 32k boundary. */

56704

+ if (!DECL_SIZE_UNIT (decl))

56705

+ return false;

56706

56707

- if (!host_integerp (DECL_SIZE_UNIT (decl), 1))

56708

- return false;

56709

+ if (!host_integerp (DECL_SIZE_UNIT (decl), 1))

56710

+ return false;

56711

56712

- dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);

56713

- if (dsize > 32768)

56714

- return false;

56715

+ dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);

56716

+ if (dsize > 32768)

56717

+ return false;

56718

56719

- dalign = DECL_ALIGN_UNIT (decl);

56720

- return dalign >= dsize;

56721

+ return dalign / BITS_PER_UNIT >= dsize;

56722

+ }

56723

}

56724

+ else

56725

+ {

56726

+ type = TREE_TYPE (decl);

56727

56728

- type = TREE_TYPE (decl);

56729

+ dalign = TYPE_ALIGN (type);

56730

+ if (CONSTANT_CLASS_P (decl))

56731

+ dalign = CONSTANT_ALIGNMENT (decl, dalign);

56732

+ else

56733

+ dalign = DATA_ALIGNMENT (decl, dalign);

56734

56735

- if (TREE_CODE (decl) == STRING_CST)

56736

- dsize = TREE_STRING_LENGTH (decl);

56737

- else if (TYPE_SIZE_UNIT (type)

56738

- && host_integerp (TYPE_SIZE_UNIT (type), 1))

56739

- dsize = tree_low_cst (TYPE_SIZE_UNIT (type), 1);

56740

- else

56741

- return false;

56742

- if (dsize > 32768)

56743

- return false;

56744

+ if (dsize == 0)

56745

+ {

56746

+ /* BLKmode, check the entire object. */

56747

+ if (TREE_CODE (decl) == STRING_CST)

56748

+ dsize = TREE_STRING_LENGTH (decl);

56749

+ else if (TYPE_SIZE_UNIT (type)

56750

+ && host_integerp (TYPE_SIZE_UNIT (type), 1))

56751

+ dsize = tree_low_cst (TYPE_SIZE_UNIT (type), 1);

56752

+ else

56753

+ return false;

56754

+ if (dsize > 32768)

56755

+ return false;

56756

56757

- dalign = TYPE_ALIGN (type);

56758

- if (CONSTANT_CLASS_P (decl))

56759

- dalign = CONSTANT_ALIGNMENT (decl, dalign);

56760

- else

56761

- dalign = DATA_ALIGNMENT (decl, dalign);

56762

- dalign /= BITS_PER_UNIT;

56763

+ return dalign / BITS_PER_UNIT >= dsize;

56764

+ }

56765

+ }

56766

+

56767

+ /* Find how many bits of the alignment we know for this access. */

56768

+ mask = dalign / BITS_PER_UNIT - 1;

56769

+ lsb = offset & -offset;

56770

+ mask &= lsb - 1;

56771

+ dalign = mask + 1;

56772

+

56773

return dalign >= dsize;

56774

}

56775

56776

@@ -5387,7 +6363,7 @@

56777

return false;

56778

if (!reg_offset_addressing_ok_p (mode))

56779

return virtual_stack_registers_memory_p (x);

56780

- if (legitimate_constant_pool_address_p (x, mode, strict))

56781

+ if (legitimate_constant_pool_address_p (x, mode, strict || lra_in_progress))

56782

return true;

56783

if (GET_CODE (XEXP (x, 1)) != CONST_INT)

56784

return false;

56785

@@ -5416,7 +6392,7 @@

56786

56787

/* If we are using VSX scalar loads, restrict ourselves to reg+reg

56788

addressing. */

56789

- if (mode == DFmode && VECTOR_MEM_VSX_P (DFmode))

56790

+ if (VECTOR_MEM_VSX_P (mode))

56791

return false;

56792

56793

if (!worst_case)

56794

@@ -5428,12 +6404,14 @@

56795

break;

56796

56797

case TFmode:

56798

- case TDmode:

56799

- case TImode:

56800

if (TARGET_E500_DOUBLE)

56801

return (SPE_CONST_OFFSET_OK (offset)

56802

&& SPE_CONST_OFFSET_OK (offset + 8));

56803

+ /* fall through */

56804

56805

+ case TDmode:

56806

+ case TImode:

56807

+ case PTImode:

56808

extra = 8;

56809

if (!worst_case)

56810

break;

56811

@@ -5526,9 +6504,21 @@

56812

56813

if (TARGET_ELF || TARGET_MACHO)

56814

{

56815

- if (DEFAULT_ABI != ABI_AIX && DEFAULT_ABI != ABI_DARWIN && flag_pic)

56816

+ bool large_toc_ok;

56817

+

56818

+ if (DEFAULT_ABI == ABI_V4 && flag_pic)

56819

return false;

56820

- if (TARGET_TOC)

56821

+ /* LRA don't use LEGITIMIZE_RELOAD_ADDRESS as it usually calls

56822

+ push_reload from reload pass code. LEGITIMIZE_RELOAD_ADDRESS

56823

+ recognizes some LO_SUM addresses as valid although this

56824

+ function says opposite. In most cases, LRA through different

56825

+ transformations can generate correct code for address reloads.

56826

+ It can not manage only some LO_SUM cases. So we need to add

56827

+ code analogous to one in rs6000_legitimize_reload_address for

56828

+ LOW_SUM here saying that some addresses are still valid. */

56829

+ large_toc_ok = (lra_in_progress && TARGET_CMODEL != CMODEL_SMALL

56830

+ && small_toc_ref (x, VOIDmode));

56831

+ if (TARGET_TOC && ! large_toc_ok)

56832

return false;

56833

if (GET_MODE_NUNITS (mode) != 1)

56834

return false;

56835

@@ -5538,7 +6528,7 @@

56836

&& (mode == DFmode || mode == DDmode)))

56837

return false;

56838

56839

- return CONSTANT_P (x);

56840

+ return CONSTANT_P (x) || large_toc_ok;

56841

}

56842

56843

return false;

56844

@@ -5582,8 +6572,11 @@

56845

if (GET_CODE (x) == PLUS && XEXP (x, 1) == const0_rtx)

56846

return force_reg (Pmode, XEXP (x, 0));

56847

56848

+ /* For TImode with load/store quad, restrict addresses to just a single

56849

+ pointer, so it works with both GPRs and VSX registers. */

56850

/* Make sure both operands are registers. */

56851

- else if (GET_CODE (x) == PLUS)

56852

+ else if (GET_CODE (x) == PLUS

56853

+ && (mode != TImode || !TARGET_QUAD_MEMORY))

56854

return gen_rtx_PLUS (Pmode,

56855

force_reg (Pmode, XEXP (x, 0)),

56856

force_reg (Pmode, XEXP (x, 1)));

56857

@@ -5603,11 +6596,12 @@

56858

case TFmode:

56859

case TDmode:

56860

case TImode:

56861

+ case PTImode:

56862

/* As in legitimate_offset_address_p we do not assume

56863

worst-case. The mode here is just a hint as to the registers

56864

used. A TImode is usually in gprs, but may actually be in

56865

fprs. Leave worst-case scenario for reload to handle via

56866

- insn constraints. */

56867

+ insn constraints. PTImode is only GPRs. */

56868

extra = 8;

56869

break;

56870

default:

56871

@@ -6099,10 +7093,13 @@

56872

1, const0_rtx, Pmode);

56873

56874

r3 = gen_rtx_REG (Pmode, 3);

56875

- if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

56876

- insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx);

56877

- else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)

56878

- insn = gen_tls_gd_aix32 (r3, got, addr, tga, const0_rtx);

56879

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

56880

+ {

56881

+ if (TARGET_64BIT)

56882

+ insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx);

56883

+ else

56884

+ insn = gen_tls_gd_aix32 (r3, got, addr, tga, const0_rtx);

56885

+ }

56886

else if (DEFAULT_ABI == ABI_V4)

56887

insn = gen_tls_gd_sysvsi (r3, got, addr, tga, const0_rtx);

56888

else

56889

@@ -6121,10 +7118,13 @@

56890

1, const0_rtx, Pmode);

56891

56892

r3 = gen_rtx_REG (Pmode, 3);

56893

- if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

56894

- insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx);

56895

- else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)

56896

- insn = gen_tls_ld_aix32 (r3, got, tga, const0_rtx);

56897

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

56898

+ {

56899

+ if (TARGET_64BIT)

56900

+ insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx);

56901

+ else

56902

+ insn = gen_tls_ld_aix32 (r3, got, tga, const0_rtx);

56903

+ }

56904

else if (DEFAULT_ABI == ABI_V4)

56905

insn = gen_tls_ld_sysvsi (r3, got, tga, const0_rtx);

56906

else

56907

@@ -6239,7 +7239,6 @@

56908

&& ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (sym),

56909

get_pool_mode (sym)))

56910

|| (TARGET_CMODEL == CMODEL_MEDIUM

56911

- && !CONSTANT_POOL_ADDRESS_P (sym)

56912

&& SYMBOL_REF_LOCAL_P (sym)));

56913

}

56914

56915

@@ -6338,7 +7337,7 @@

56916

&& !(TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode

56917

|| mode == DDmode || mode == TDmode

56918

|| mode == DImode))

56919

- && VECTOR_MEM_NONE_P (mode))

56920

+ && (!VECTOR_MODE_P (mode) || VECTOR_MEM_NONE_P (mode)))

56921

{

56922

HOST_WIDE_INT val = INTVAL (XEXP (x, 1));

56923

HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;

56924

@@ -6369,7 +7368,7 @@

56925

56926

if (GET_CODE (x) == SYMBOL_REF

56927

&& reg_offset_p

56928

- && VECTOR_MEM_NONE_P (mode)

56929

+ && (!VECTOR_MODE_P (mode) || VECTOR_MEM_NONE_P (mode))

56930

&& !SPE_VECTOR_MODE (mode)

56931

#if TARGET_MACHO

56932

&& DEFAULT_ABI == ABI_DARWIN

56933

@@ -6395,6 +7394,8 @@

56934

mem is sufficiently aligned. */

56935

&& mode != TFmode

56936

&& mode != TDmode

56937

+ && (mode != TImode || !TARGET_VSX_TIMODE)

56938

+ && mode != PTImode

56939

&& (mode != DImode || TARGET_POWERPC64)

56940

&& ((mode != DFmode && mode != DDmode) || TARGET_POWERPC64

56941

|| (TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)))

56942

@@ -6515,15 +7516,9 @@

56943

return 0;

56944

if (legitimate_indirect_address_p (x, reg_ok_strict))

56945

return 1;

56946

- if ((GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC)

56947

- && !VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)

56948

- && !SPE_VECTOR_MODE (mode)

56949

- && mode != TFmode

56950

- && mode != TDmode

56951

- /* Restrict addressing for DI because of our SUBREG hackery. */

56952

- && !(TARGET_E500_DOUBLE

56953

- && (mode == DFmode || mode == DDmode || mode == DImode))

56954

- && TARGET_UPDATE

56955

+ if (TARGET_UPDATE

56956

+ && (GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC)

56957

+ && mode_supports_pre_incdec_p (mode)

56958

&& legitimate_indirect_address_p (XEXP (x, 0), reg_ok_strict))

56959

return 1;

56960

if (virtual_stack_registers_memory_p (x))

56961

@@ -6531,8 +7526,16 @@

56962

if (reg_offset_p && legitimate_small_data_p (mode, x))

56963

return 1;

56964

if (reg_offset_p

56965

- && legitimate_constant_pool_address_p (x, mode, reg_ok_strict))

56966

+ && legitimate_constant_pool_address_p (x, mode,

56967

+ reg_ok_strict || lra_in_progress))

56968

return 1;

56969

+ /* For TImode, if we have load/store quad and TImode in VSX registers, only

56970

+ allow register indirect addresses. This will allow the values to go in

56971

+ either GPRs or VSX registers without reloading. The vector types would

56972

+ tend to go into VSX registers, so we allow REG+REG, while TImode seems

56973

+ somewhat split, in that some uses are GPR based, and some VSX based. */

56974

+ if (mode == TImode && TARGET_QUAD_MEMORY && TARGET_VSX_TIMODE)

56975

+ return 0;

56976

/* If not REG_OK_STRICT (before reload) let pass any stack offset. */

56977

if (! reg_ok_strict

56978

&& reg_offset_p

56979

@@ -6544,8 +7547,7 @@

56980

return 1;

56981

if (rs6000_legitimate_offset_address_p (mode, x, reg_ok_strict, false))

56982

return 1;

56983

- if (mode != TImode

56984

- && mode != TFmode

56985

+ if (mode != TFmode

56986

&& mode != TDmode

56987

&& ((TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)

56988

|| TARGET_POWERPC64

56989

@@ -6552,23 +7554,13 @@

56990

|| (mode != DFmode && mode != DDmode)

56991

|| (TARGET_E500_DOUBLE && mode != DDmode))

56992

&& (TARGET_POWERPC64 || mode != DImode)

56993

+ && (mode != TImode || VECTOR_MEM_VSX_P (TImode))

56994

+ && mode != PTImode

56995

&& !avoiding_indexed_address_p (mode)

56996

&& legitimate_indexed_address_p (x, reg_ok_strict))

56997

return 1;

56998

- if (GET_CODE (x) == PRE_MODIFY

56999

- && mode != TImode

57000

- && mode != TFmode

57001

- && mode != TDmode

57002

- && ((TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)

57003

- || TARGET_POWERPC64

57004

- || ((mode != DFmode && mode != DDmode) || TARGET_E500_DOUBLE))

57005

- && (TARGET_POWERPC64 || mode != DImode)

57006

- && !VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)

57007

- && !SPE_VECTOR_MODE (mode)

57008

- /* Restrict addressing for DI because of our SUBREG hackery. */

57009

- && !(TARGET_E500_DOUBLE

57010

- && (mode == DFmode || mode == DDmode || mode == DImode))

57011

- && TARGET_UPDATE

57012

+ if (TARGET_UPDATE && GET_CODE (x) == PRE_MODIFY

57013

+ && mode_supports_pre_modify_p (mode)

57014

&& legitimate_indirect_address_p (XEXP (x, 0), reg_ok_strict)

57015

&& (rs6000_legitimate_offset_address_p (mode, XEXP (x, 1),

57016

reg_ok_strict, false)

57017

@@ -6589,10 +7581,13 @@

57018

bool ret = rs6000_legitimate_address_p (mode, x, reg_ok_strict);

57019

fprintf (stderr,

57020

"\nrs6000_legitimate_address_p: return = %s, mode = %s, "

57021

- "strict = %d, code = %s\n",

57022

+ "strict = %d, reload = %s, code = %s\n",

57023

ret ? "true" : "false",

57024

GET_MODE_NAME (mode),

57025

reg_ok_strict,

57026

+ (reload_completed

57027

+ ? "after"

57028

+ : (reload_in_progress ? "progress" : "before")),

57029

GET_RTX_NAME (GET_CODE (x)));

57030

debug_rtx (x);

57031

57032

@@ -6758,7 +7753,7 @@

57033

57034

/* The TOC register is not killed across calls in a way that is

57035

visible to the compiler. */

57036

- if (DEFAULT_ABI == ABI_AIX)

57037

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

57038

call_really_used_regs[2] = 0;

57039

57040

if (DEFAULT_ABI == ABI_V4

57041

@@ -6818,6 +7813,7 @@

57042

fixed_regs[i] = call_used_regs[i] = call_really_used_regs[i] = 1;

57043

}

57044

}

57045

+

57046

57047

/* Try to output insns to set TARGET equal to the constant C if it can

57048

be done in less than N insns. Do all computations in MODE.

57049

@@ -7006,7 +8002,7 @@

57050

}

57051

57052

/* Helper for the following. Get rid of [r+r] memory refs

57053

- in cases where it won't work (TImode, TFmode, TDmode). */

57054

+ in cases where it won't work (TImode, TFmode, TDmode, PTImode). */

57055

57056

static void

57057

rs6000_eliminate_indexed_memrefs (rtx operands[2])

57058

@@ -7031,6 +8027,131 @@

57059

copy_addr_to_reg (XEXP (operands[1], 0)));

57060

}

57061

57062

+/* Generate a vector of constants to permute MODE for a little-endian

57063

+ storage operation by swapping the two halves of a vector. */

57064

+static rtvec

57065

+rs6000_const_vec (enum machine_mode mode)

57066

+{

57067

+ int i, subparts;

57068

+ rtvec v;

57069

+

57070

+ switch (mode)

57071

+ {

57072

+ case V1TImode:

57073

+ subparts = 1;

57074

+ break;

57075

+ case V2DFmode:

57076

+ case V2DImode:

57077

+ subparts = 2;

57078

+ break;

57079

+ case V4SFmode:

57080

+ case V4SImode:

57081

+ subparts = 4;

57082

+ break;

57083

+ case V8HImode:

57084

+ subparts = 8;

57085

+ break;

57086

+ case V16QImode:

57087

+ subparts = 16;

57088

+ break;

57089

+ default:

57090

+ gcc_unreachable();

57091

+ }

57092

+

57093

+ v = rtvec_alloc (subparts);

57094

+

57095

+ for (i = 0; i < subparts / 2; ++i)

57096

+ RTVEC_ELT (v, i) = gen_rtx_CONST_INT (DImode, i + subparts / 2);

57097

+ for (i = subparts / 2; i < subparts; ++i)

57098

+ RTVEC_ELT (v, i) = gen_rtx_CONST_INT (DImode, i - subparts / 2);

57099

+

57100

+ return v;

57101

+}

57102

+

57103

+/* Generate a permute rtx that represents an lxvd2x, stxvd2x, or xxpermdi

57104

+ for a VSX load or store operation. */

57105

+rtx

57106

+rs6000_gen_le_vsx_permute (rtx source, enum machine_mode mode)

57107

+{

57108

+ rtx par = gen_rtx_PARALLEL (VOIDmode, rs6000_const_vec (mode));

57109

+ return gen_rtx_VEC_SELECT (mode, source, par);

57110

+}

57111

+

57112

+/* Emit a little-endian load from vector memory location SOURCE to VSX

57113

+ register DEST in mode MODE. The load is done with two permuting

57114

+ insn's that represent an lxvd2x and xxpermdi. */

57115

+void

57116

+rs6000_emit_le_vsx_load (rtx dest, rtx source, enum machine_mode mode)

57117

+{

57118

+ rtx tmp, permute_mem, permute_reg;

57119

+

57120

+ /* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,

57121

+ V1TImode). */

57122

+ if (mode == TImode || mode == V1TImode)

57123

+ {

57124

+ mode = V2DImode;

57125

+ dest = gen_lowpart (V2DImode, dest);

57126

+ source = adjust_address (source, V2DImode, 0);

57127

+ }

57128

+

57129

+ tmp = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (dest) : dest;

57130

+ permute_mem = rs6000_gen_le_vsx_permute (source, mode);

57131

+ permute_reg = rs6000_gen_le_vsx_permute (tmp, mode);

57132

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, permute_mem));

57133

+ emit_insn (gen_rtx_SET (VOIDmode, dest, permute_reg));

57134

+}

57135

+

57136

+/* Emit a little-endian store to vector memory location DEST from VSX

57137

+ register SOURCE in mode MODE. The store is done with two permuting

57138

+ insn's that represent an xxpermdi and an stxvd2x. */

57139

+void

57140

+rs6000_emit_le_vsx_store (rtx dest, rtx source, enum machine_mode mode)

57141

+{

57142

+ rtx tmp, permute_src, permute_tmp;

57143

+

57144

+ /* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,

57145

+ V1TImode). */

57146

+ if (mode == TImode || mode == V1TImode)

57147

+ {

57148

+ mode = V2DImode;

57149

+ dest = adjust_address (dest, V2DImode, 0);

57150

+ source = gen_lowpart (V2DImode, source);

57151

+ }

57152

+

57153

+ tmp = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (source) : source;

57154

+ permute_src = rs6000_gen_le_vsx_permute (source, mode);

57155

+ permute_tmp = rs6000_gen_le_vsx_permute (tmp, mode);

57156

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, permute_src));

57157

+ emit_insn (gen_rtx_SET (VOIDmode, dest, permute_tmp));

57158

+}

57159

+

57160

+/* Emit a sequence representing a little-endian VSX load or store,

57161

+ moving data from SOURCE to DEST in mode MODE. This is done

57162

+ separately from rs6000_emit_move to ensure it is called only

57163

+ during expand. LE VSX loads and stores introduced later are

57164

+ handled with a split. The expand-time RTL generation allows

57165

+ us to optimize away redundant pairs of register-permutes. */

57166

+void

57167

+rs6000_emit_le_vsx_move (rtx dest, rtx source, enum machine_mode mode)

57168

+{

57169

+ gcc_assert (!BYTES_BIG_ENDIAN

57170

+ && VECTOR_MEM_VSX_P (mode)

57171

+ && !gpr_or_gpr_p (dest, source)

57172

+ && (MEM_P (source) ^ MEM_P (dest)));

57173

+

57174

+ if (MEM_P (source))

57175

+ {

57176

+ gcc_assert (REG_P (dest) || GET_CODE (dest) == SUBREG);

57177

+ rs6000_emit_le_vsx_load (dest, source, mode);

57178

+ }

57179

+ else

57180

+ {

57181

+ if (!REG_P (source))

57182

+ source = force_reg (mode, source);

57183

+ rs6000_emit_le_vsx_store (dest, source, mode);

57184

+ }

57185

+}

57186

+

57187

/* Emit a move from SOURCE to DEST in mode MODE. */

57188

void

57189

rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)

57190

@@ -7149,8 +8270,71 @@

57191

cfun->machine->sdmode_stack_slot =

57192

eliminate_regs (cfun->machine->sdmode_stack_slot, VOIDmode, NULL_RTX);

57193

57194

+

57195

+ if (lra_in_progress

57196

+ && mode == SDmode

57197

+ && REG_P (operands[0]) && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER

57198

+ && reg_preferred_class (REGNO (operands[0])) == NO_REGS

57199

+ && (REG_P (operands[1])

57200

+ || (GET_CODE (operands[1]) == SUBREG

57201

+ && REG_P (SUBREG_REG (operands[1])))))

57202

+ {

57203

+ int regno = REGNO (GET_CODE (operands[1]) == SUBREG

57204

+ ? SUBREG_REG (operands[1]) : operands[1]);

57205

+ enum reg_class cl;

57206

+

57207

+ if (regno >= FIRST_PSEUDO_REGISTER)

57208

+ {

57209

+ cl = reg_preferred_class (regno);

57210

+ gcc_assert (cl != NO_REGS);

57211

+ regno = ira_class_hard_regs[cl][0];

57212

+ }

57213

+ if (FP_REGNO_P (regno))

57214

+ {

57215

+ if (GET_MODE (operands[0]) != DDmode)

57216

+ operands[0] = gen_rtx_SUBREG (DDmode, operands[0], 0);

57217

+ emit_insn (gen_movsd_store (operands[0], operands[1]));

57218

+ }

57219

+ else if (INT_REGNO_P (regno))

57220

+ emit_insn (gen_movsd_hardfloat (operands[0], operands[1]));

57221

+ else

57222

+ gcc_unreachable();

57223

+ return;

57224

+ }

57225

+ if (lra_in_progress

57226

+ && mode == SDmode

57227

+ && (REG_P (operands[0])

57228

+ || (GET_CODE (operands[0]) == SUBREG

57229

+ && REG_P (SUBREG_REG (operands[0]))))

57230

+ && REG_P (operands[1]) && REGNO (operands[1]) >= FIRST_PSEUDO_REGISTER

57231

+ && reg_preferred_class (REGNO (operands[1])) == NO_REGS)

57232

+ {

57233

+ int regno = REGNO (GET_CODE (operands[0]) == SUBREG

57234

+ ? SUBREG_REG (operands[0]) : operands[0]);

57235

+ enum reg_class cl;

57236

+

57237

+ if (regno >= FIRST_PSEUDO_REGISTER)

57238

+ {

57239

+ cl = reg_preferred_class (regno);

57240

+ gcc_assert (cl != NO_REGS);

57241

+ regno = ira_class_hard_regs[cl][0];

57242

+ }

57243

+ if (FP_REGNO_P (regno))

57244

+ {

57245

+ if (GET_MODE (operands[1]) != DDmode)

57246

+ operands[1] = gen_rtx_SUBREG (DDmode, operands[1], 0);

57247

+ emit_insn (gen_movsd_load (operands[0], operands[1]));

57248

+ }

57249

+ else if (INT_REGNO_P (regno))

57250

+ emit_insn (gen_movsd_hardfloat (operands[0], operands[1]));

57251

+ else

57252

+ gcc_unreachable();

57253

+ return;

57254

+ }

57255

+

57256

if (reload_in_progress

57257

&& mode == SDmode

57258

+ && cfun->machine->sdmode_stack_slot != NULL_RTX

57259

&& MEM_P (operands[0])

57260

&& rtx_equal_p (operands[0], cfun->machine->sdmode_stack_slot)

57261

&& REG_P (operands[1]))

57262

@@ -7163,7 +8347,9 @@

57263

}

57264

else if (INT_REGNO_P (REGNO (operands[1])))

57265

{

57266

- rtx mem = adjust_address_nv (operands[0], mode, 4);

57267

+ rtx mem = operands[0];

57268

+ if (BYTES_BIG_ENDIAN)

57269

+ mem = adjust_address_nv (mem, mode, 4);

57270

mem = eliminate_regs (mem, VOIDmode, NULL_RTX);

57271

emit_insn (gen_movsd_hardfloat (mem, operands[1]));

57272

}

57273

@@ -7175,6 +8361,7 @@

57274

&& mode == SDmode

57275

&& REG_P (operands[0])

57276

&& MEM_P (operands[1])

57277

+ && cfun->machine->sdmode_stack_slot != NULL_RTX

57278

&& rtx_equal_p (operands[1], cfun->machine->sdmode_stack_slot))

57279

{

57280

if (FP_REGNO_P (REGNO (operands[0])))

57281

@@ -7185,7 +8372,9 @@

57282

}

57283

else if (INT_REGNO_P (REGNO (operands[0])))

57284

{

57285

- rtx mem = adjust_address_nv (operands[1], mode, 4);

57286

+ rtx mem = operands[1];

57287

+ if (BYTES_BIG_ENDIAN)

57288

+ mem = adjust_address_nv (mem, mode, 4);

57289

mem = eliminate_regs (mem, VOIDmode, NULL_RTX);

57290

emit_insn (gen_movsd_hardfloat (operands[0], mem));

57291

}

57292

@@ -7230,6 +8419,7 @@

57293

case V1DImode:

57294

case V2DFmode:

57295

case V2DImode:

57296

+ case V1TImode:

57297

if (CONSTANT_P (operands[1])

57298

&& !easy_vector_constant (operands[1], mode))

57299

operands[1] = force_const_mem (mode, operands[1]);

57300

@@ -7388,6 +8578,11 @@

57301

break;

57302

57303

case TImode:

57304

+ if (!VECTOR_MEM_VSX_P (TImode))

57305

+ rs6000_eliminate_indexed_memrefs (operands);

57306

+ break;

57307

+

57308

+ case PTImode:

57309

rs6000_eliminate_indexed_memrefs (operands);

57310

break;

57311

57312

@@ -7426,18 +8621,231 @@

57313

}

57314

57315

/* Nonzero if we can use a floating-point register to pass this arg. */

57316

-#define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \

57317

+#define USE_FP_FOR_ARG_P(CUM,MODE) \

57318

(SCALAR_FLOAT_MODE_P (MODE) \

57319

&& (CUM)->fregno <= FP_ARG_MAX_REG \

57320

&& TARGET_HARD_FLOAT && TARGET_FPRS)

57321

57322

/* Nonzero if we can use an AltiVec register to pass this arg. */

57323

-#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \

57324

+#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,NAMED) \

57325

(ALTIVEC_OR_VSX_VECTOR_MODE (MODE) \

57326

&& (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \

57327

&& TARGET_ALTIVEC_ABI \

57328

&& (NAMED))

57329

57330

+/* Walk down the type tree of TYPE counting consecutive base elements.

57331

+ If *MODEP is VOIDmode, then set it to the first valid floating point

57332

+ or vector type. If a non-floating point or vector type is found, or

57333

+ if a floating point or vector type that doesn't match a non-VOIDmode

57334

+ *MODEP is found, then return -1, otherwise return the count in the

57335

+ sub-tree. */

57336

+

57337

+static int

57338

+rs6000_aggregate_candidate (const_tree type, enum machine_mode *modep)

57339

+{

57340

+ enum machine_mode mode;

57341

+ HOST_WIDE_INT size;

57342

+

57343

+ switch (TREE_CODE (type))

57344

+ {

57345

+ case REAL_TYPE:

57346

+ mode = TYPE_MODE (type);

57347

+ if (!SCALAR_FLOAT_MODE_P (mode))

57348

+ return -1;

57349

+

57350

+ if (*modep == VOIDmode)

57351

+ *modep = mode;

57352

+

57353

+ if (*modep == mode)

57354

+ return 1;

57355

+

57356

+ break;

57357

+

57358

+ case COMPLEX_TYPE:

57359

+ mode = TYPE_MODE (TREE_TYPE (type));

57360

+ if (!SCALAR_FLOAT_MODE_P (mode))

57361

+ return -1;

57362

+

57363

+ if (*modep == VOIDmode)

57364

+ *modep = mode;

57365

+

57366

+ if (*modep == mode)

57367

+ return 2;

57368

+

57369

+ break;

57370

+

57371

+ case VECTOR_TYPE:

57372

+ if (!TARGET_ALTIVEC_ABI || !TARGET_ALTIVEC)

57373

+ return -1;

57374

+

57375

+ /* Use V4SImode as representative of all 128-bit vector types. */

57376

+ size = int_size_in_bytes (type);

57377

+ switch (size)

57378

+ {

57379

+ case 16:

57380

+ mode = V4SImode;

57381

+ break;

57382

+ default:

57383

+ return -1;

57384

+ }

57385

+

57386

+ if (*modep == VOIDmode)

57387

+ *modep = mode;

57388

+

57389

+ /* Vector modes are considered to be opaque: two vectors are

57390

+ equivalent for the purposes of being homogeneous aggregates

57391

+ if they are the same size. */

57392

+ if (*modep == mode)

57393

+ return 1;

57394

+

57395

+ break;

57396

+

57397

+ case ARRAY_TYPE:

57398

+ {

57399

+ int count;

57400

+ tree index = TYPE_DOMAIN (type);

57401

+

57402

+ /* Can't handle incomplete types. */

57403

+ if (!COMPLETE_TYPE_P (type))

57404

+ return -1;

57405

+

57406

+ count = rs6000_aggregate_candidate (TREE_TYPE (type), modep);

57407

+ if (count == -1

57408

+ || !index

57409

+ || !TYPE_MAX_VALUE (index)

57410

+ || !host_integerp (TYPE_MAX_VALUE (index), 1)

57411

+ || !TYPE_MIN_VALUE (index)

57412

+ || !host_integerp (TYPE_MIN_VALUE (index), 1)

57413

+ || count < 0)

57414

+ return -1;

57415

+

57416

+ count *= (1 + tree_low_cst (TYPE_MAX_VALUE (index), 1)

57417

+ - tree_low_cst (TYPE_MIN_VALUE (index), 1));

57418

+

57419

+ /* There must be no padding. */

57420

+ if (!host_integerp (TYPE_SIZE (type), 1)

57421

+ || (tree_low_cst (TYPE_SIZE (type), 1)

57422

+ != count * GET_MODE_BITSIZE (*modep)))

57423

+ return -1;

57424

+

57425

+ return count;

57426

+ }

57427

+

57428

+ case RECORD_TYPE:

57429

+ {

57430

+ int count = 0;

57431

+ int sub_count;

57432

+ tree field;

57433

+

57434

+ /* Can't handle incomplete types. */

57435

+ if (!COMPLETE_TYPE_P (type))

57436

+ return -1;

57437

+

57438

+ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))

57439

+ {

57440

+ if (TREE_CODE (field) != FIELD_DECL)

57441

+ continue;

57442

+

57443

+ sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep);

57444

+ if (sub_count < 0)

57445

+ return -1;

57446

+ count += sub_count;

57447

+ }

57448

+

57449

+ /* There must be no padding. */

57450

+ if (!host_integerp (TYPE_SIZE (type), 1)

57451

+ || (tree_low_cst (TYPE_SIZE (type), 1)

57452

+ != count * GET_MODE_BITSIZE (*modep)))

57453

+ return -1;

57454

+

57455

+ return count;

57456

+ }

57457

+

57458

+ case UNION_TYPE:

57459

+ case QUAL_UNION_TYPE:

57460

+ {

57461

+ /* These aren't very interesting except in a degenerate case. */

57462

+ int count = 0;

57463

+ int sub_count;

57464

+ tree field;

57465

+

57466

+ /* Can't handle incomplete types. */

57467

+ if (!COMPLETE_TYPE_P (type))

57468

+ return -1;

57469

+

57470

+ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))

57471

+ {

57472

+ if (TREE_CODE (field) != FIELD_DECL)

57473

+ continue;

57474

+

57475

+ sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep);

57476

+ if (sub_count < 0)

57477

+ return -1;

57478

+ count = count > sub_count ? count : sub_count;

57479

+ }

57480

+

57481

+ /* There must be no padding. */

57482

+ if (!host_integerp (TYPE_SIZE (type), 1)

57483

+ || (tree_low_cst (TYPE_SIZE (type), 1)

57484

+ != count * GET_MODE_BITSIZE (*modep)))

57485

+ return -1;

57486

+

57487

+ return count;

57488

+ }

57489

+

57490

+ default:

57491

+ break;

57492

+ }

57493

+

57494

+ return -1;

57495

+}

57496

+

57497

+/* If an argument, whose type is described by TYPE and MODE, is a homogeneous

57498

+ float or vector aggregate that shall be passed in FP/vector registers

57499

+ according to the ELFv2 ABI, return the homogeneous element mode in

57500

+ *ELT_MODE and the number of elements in *N_ELTS, and return TRUE.

57501

+

57502

+ Otherwise, set *ELT_MODE to MODE and *N_ELTS to 1, and return FALSE. */

57503

+

57504

+static bool

57505

+rs6000_discover_homogeneous_aggregate (enum machine_mode mode, const_tree type,

57506

+ enum machine_mode *elt_mode,

57507

+ int *n_elts)

57508

+{

57509

+ /* Note that we do not accept complex types at the top level as

57510

+ homogeneous aggregates; these types are handled via the

57511

+ targetm.calls.split_complex_arg mechanism. Complex types

57512

+ can be elements of homogeneous aggregates, however. */

57513

+ if (DEFAULT_ABI == ABI_ELFv2 && type && AGGREGATE_TYPE_P (type))

57514

+ {

57515

+ enum machine_mode field_mode = VOIDmode;

57516

+ int field_count = rs6000_aggregate_candidate (type, &field_mode);

57517

+

57518

+ if (field_count > 0)

57519

+ {

57520

+ int n_regs = (SCALAR_FLOAT_MODE_P (field_mode)?

57521

+ (GET_MODE_SIZE (field_mode) + 7) >> 3 : 1);

57522

+

57523

+ /* The ELFv2 ABI allows homogeneous aggregates to occupy

57524

+ up to AGGR_ARG_NUM_REG registers. */

57525

+ if (field_count * n_regs <= AGGR_ARG_NUM_REG)

57526

+ {

57527

+ if (elt_mode)

57528

+ *elt_mode = field_mode;

57529

+ if (n_elts)

57530

+ *n_elts = field_count;

57531

+ return true;

57532

+ }

57533

+ }

57534

+ }

57535

+

57536

+ if (elt_mode)

57537

+ *elt_mode = mode;

57538

+ if (n_elts)

57539

+ *n_elts = 1;

57540

+ return false;

57541

+}

57542

+

57543

/* Return a nonzero value to say to return the function value in

57544

memory, just as large structures are always returned. TYPE will be

57545

the data type of the value, and FNTYPE will be the type of the

57546

@@ -7490,6 +8898,16 @@

57547

/* Otherwise fall through to more conventional ABI rules. */

57548

}

57549

57550

+ /* The ELFv2 ABI returns homogeneous VFP aggregates in registers */

57551

+ if (rs6000_discover_homogeneous_aggregate (TYPE_MODE (type), type,

57552

+ NULL, NULL))

57553

+ return false;

57554

+

57555

+ /* The ELFv2 ABI returns aggregates up to 16B in registers */

57556

+ if (DEFAULT_ABI == ABI_ELFv2 && AGGREGATE_TYPE_P (type)

57557

+ && (unsigned HOST_WIDE_INT) int_size_in_bytes (type) <= 16)

57558

+ return false;

57559

+

57560

if (AGGREGATE_TYPE_P (type)

57561

&& (aix_struct_return

57562

|| (unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 8))

57563

@@ -7521,6 +8939,19 @@

57564

return false;

57565

}

57566

57567

+/* Specify whether values returned in registers should be at the most

57568

+ significant end of a register. We want aggregates returned by

57569

+ value to match the way aggregates are passed to functions. */

57570

+

57571

+static bool

57572

+rs6000_return_in_msb (const_tree valtype)

57573

+{

57574

+ return (DEFAULT_ABI == ABI_ELFv2

57575

+ && BYTES_BIG_ENDIAN

57576

+ && AGGREGATE_TYPE_P (valtype)

57577

+ && FUNCTION_ARG_PADDING (TYPE_MODE (valtype), valtype) == upward);

57578

+}

57579

+

57580

#ifdef HAVE_AS_GNU_ATTRIBUTE

57581

/* Return TRUE if a call to function FNDECL may be one that

57582

potentially affects the function calling ABI of the object file. */

57583

@@ -7657,7 +9088,7 @@

57584

static bool

57585

rs6000_must_pass_in_stack (enum machine_mode mode, const_tree type)

57586

{

57587

- if (DEFAULT_ABI == ABI_AIX || TARGET_64BIT)

57588

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2 || TARGET_64BIT)

57589

return must_pass_in_stack_var_size (mode, type);

57590

else

57591

return must_pass_in_stack_var_size_or_pad (mode, type);

57592

@@ -7738,6 +9169,11 @@

57593

static unsigned int

57594

rs6000_function_arg_boundary (enum machine_mode mode, const_tree type)

57595

{

57596

+ enum machine_mode elt_mode;

57597

+ int n_elts;

57598

+

57599

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

57600

+

57601

if (DEFAULT_ABI == ABI_V4

57602

&& (GET_MODE_SIZE (mode) == 8

57603

|| (TARGET_HARD_FLOAT

57604

@@ -7749,12 +9185,13 @@

57605

&& int_size_in_bytes (type) >= 8

57606

&& int_size_in_bytes (type) < 16))

57607

return 64;

57608

- else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

57609

+ else if (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode)

57610

|| (type && TREE_CODE (type) == VECTOR_TYPE

57611

&& int_size_in_bytes (type) >= 16))

57612

return 128;

57613

- else if (TARGET_MACHO

57614

- && rs6000_darwin64_abi

57615

+ else if (((TARGET_MACHO && rs6000_darwin64_abi)

57616

+ || DEFAULT_ABI == ABI_ELFv2

57617

+ || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm))

57618

&& mode == BLKmode

57619

&& type && TYPE_ALIGN (type) > 64)

57620

return 128;

57621

@@ -7762,6 +9199,16 @@

57622

return PARM_BOUNDARY;

57623

}

57624

57625

+/* The offset in words to the start of the parameter save area. */

57626

+

57627

+static unsigned int

57628

+rs6000_parm_offset (void)

57629

+{

57630

+ return (DEFAULT_ABI == ABI_V4 ? 2

57631

+ : DEFAULT_ABI == ABI_ELFv2 ? 4

57632

+ : 6);

57633

+}

57634

+

57635

/* For a function parm of MODE and TYPE, return the starting word in

57636

the parameter area. NWORDS of the parameter area are already used. */

57637

57638

@@ -7770,11 +9217,9 @@

57639

unsigned int nwords)

57640

{

57641

unsigned int align;

57642

- unsigned int parm_offset;

57643

57644

align = rs6000_function_arg_boundary (mode, type) / PARM_BOUNDARY - 1;

57645

- parm_offset = DEFAULT_ABI == ABI_V4 ? 2 : 6;

57646

- return nwords + (-(parm_offset + nwords) & align);

57647

+ return nwords + (-(rs6000_parm_offset () + nwords) & align);

57648

}

57649

57650

/* Compute the size (in words) of a function argument. */

57651

@@ -7881,7 +9326,7 @@

57652

57653

if (TREE_CODE (ftype) == RECORD_TYPE)

57654

rs6000_darwin64_record_arg_advance_recurse (cum, ftype, bitpos);

57655

- else if (USE_FP_FOR_ARG_P (cum, mode, ftype))

57656

+ else if (USE_FP_FOR_ARG_P (cum, mode))

57657

{

57658

unsigned n_fpregs = (GET_MODE_SIZE (mode) + 7) >> 3;

57659

rs6000_darwin64_record_arg_advance_flush (cum, bitpos, 0);

57660

@@ -7922,7 +9367,7 @@

57661

else

57662

cum->words += n_fpregs;

57663

}

57664

- else if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, 1))

57665

+ else if (USE_ALTIVEC_FOR_ARG_P (cum, mode, 1))

57666

{

57667

rs6000_darwin64_record_arg_advance_flush (cum, bitpos, 0);

57668

cum->vregno++;

57669

@@ -7959,6 +9404,11 @@

57670

rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode,

57671

const_tree type, bool named, int depth)

57672

{

57673

+ enum machine_mode elt_mode;

57674

+ int n_elts;

57675

+

57676

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

57677

+

57678

/* Only tick off an argument if we're not recursing. */

57679

if (depth == 0)

57680

cum->nargs_prototype--;

57681

@@ -7979,15 +9429,16 @@

57682

#endif

57683

57684

if (TARGET_ALTIVEC_ABI

57685

- && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

57686

+ && (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode)

57687

|| (type && TREE_CODE (type) == VECTOR_TYPE

57688

&& int_size_in_bytes (type) == 16)))

57689

{

57690

bool stack = false;

57691

57692

- if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))

57693

+ if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named))

57694

{

57695

- cum->vregno++;

57696

+ cum->vregno += n_elts;

57697

+

57698

if (!TARGET_ALTIVEC)

57699

error ("cannot pass argument in vector register because"

57700

" altivec instructions are disabled, use -maltivec"

57701

@@ -7996,7 +9447,8 @@

57702

/* PowerPC64 Linux and AIX allocate GPRs for a vector argument

57703

even if it is going to be passed in a vector register.

57704

Darwin does the same for variable-argument functions. */

57705

- if ((DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

57706

+ if (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

57707

+ && TARGET_64BIT)

57708

|| (cum->stdarg && DEFAULT_ABI != ABI_V4))

57709

stack = true;

57710

}

57711

@@ -8007,15 +9459,13 @@

57712

{

57713

int align;

57714

57715

- /* Vector parameters must be 16-byte aligned. This places

57716

- them at 2 mod 4 in terms of words in 32-bit mode, since

57717

- the parameter save area starts at offset 24 from the

57718

- stack. In 64-bit mode, they just have to start on an

57719

- even word, since the parameter save area is 16-byte

57720

- aligned. Space for GPRs is reserved even if the argument

57721

- will be passed in memory. */

57722

+ /* Vector parameters must be 16-byte aligned. In 32-bit

57723

+ mode this means we need to take into account the offset

57724

+ to the parameter save area. In 64-bit mode, they just

57725

+ have to start on an even word, since the parameter save

57726

+ area is 16-byte aligned. */

57727

if (TARGET_32BIT)

57728

- align = (2 - cum->words) & 3;

57729

+ align = -(rs6000_parm_offset () + cum->words) & 3;

57730

else

57731

align = cum->words & 1;

57732

cum->words += align + rs6000_arg_size (mode, type);

57733

@@ -8140,15 +9590,15 @@

57734

57735

cum->words = align_words + n_words;

57736

57737

- if (SCALAR_FLOAT_MODE_P (mode)

57738

+ if (SCALAR_FLOAT_MODE_P (elt_mode)

57739

&& TARGET_HARD_FLOAT && TARGET_FPRS)

57740

{

57741

/* _Decimal128 must be passed in an even/odd float register pair.

57742

This assumes that the register number is odd when fregno is

57743

odd. */

57744

- if (mode == TDmode && (cum->fregno % 2) == 1)

57745

+ if (elt_mode == TDmode && (cum->fregno % 2) == 1)

57746

cum->fregno++;

57747

- cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3;

57748

+ cum->fregno += n_elts * ((GET_MODE_SIZE (elt_mode) + 7) >> 3);

57749

}

57750

57751

if (TARGET_DEBUG_ARG)

57752

@@ -8358,7 +9808,7 @@

57753

57754

if (TREE_CODE (ftype) == RECORD_TYPE)

57755

rs6000_darwin64_record_arg_recurse (cum, ftype, bitpos, rvec, k);

57756

- else if (cum->named && USE_FP_FOR_ARG_P (cum, mode, ftype))

57757

+ else if (cum->named && USE_FP_FOR_ARG_P (cum, mode))

57758

{

57759

unsigned n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3;

57760

#if 0

57761

@@ -8386,7 +9836,7 @@

57762

if (mode == TFmode || mode == TDmode)

57763

cum->fregno++;

57764

}

57765

- else if (cum->named && USE_ALTIVEC_FOR_ARG_P (cum, mode, ftype, 1))

57766

+ else if (cum->named && USE_ALTIVEC_FOR_ARG_P (cum, mode, 1))

57767

{

57768

rs6000_darwin64_record_arg_flush (cum, bitpos, rvec, k);

57769

rvec[(*k)++]

57770

@@ -8503,6 +9953,84 @@

57771

return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec));

57772

}

57773

57774

+/* We have an argument of MODE and TYPE that goes into FPRs or VRs,

57775

+ but must also be copied into the parameter save area starting at

57776

+ offset ALIGN_WORDS. Fill in RVEC with the elements corresponding

57777

+ to the GPRs and/or memory. Return the number of elements used. */

57778

+

57779

+static int

57780

+rs6000_psave_function_arg (enum machine_mode mode, const_tree type,

57781

+ int align_words, rtx *rvec)

57782

+{

57783

+ int k = 0;

57784

+

57785

+ if (align_words < GP_ARG_NUM_REG)

57786

+ {

57787

+ int n_words = rs6000_arg_size (mode, type);

57788

+

57789

+ if (align_words + n_words > GP_ARG_NUM_REG

57790

+ || mode == BLKmode

57791

+ || (TARGET_32BIT && TARGET_POWERPC64))

57792

+ {

57793

+ /* If this is partially on the stack, then we only

57794

+ include the portion actually in registers here. */

57795

+ enum machine_mode rmode = TARGET_32BIT ? SImode : DImode;

57796

+ int i = 0;

57797

+

57798

+ if (align_words + n_words > GP_ARG_NUM_REG)

57799

+ {

57800

+ /* Not all of the arg fits in gprs. Say that it goes in memory

57801

+ too, using a magic NULL_RTX component. Also see comment in

57802

+ rs6000_mixed_function_arg for why the normal

57803

+ function_arg_partial_nregs scheme doesn't work in this case. */

57804

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx);

57805

+ }

57806

+

57807

+ do

57808

+ {

57809

+ rtx r = gen_rtx_REG (rmode, GP_ARG_MIN_REG + align_words);

57810

+ rtx off = GEN_INT (i++ * GET_MODE_SIZE (rmode));

57811

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

57812

+ }

57813

+ while (++align_words < GP_ARG_NUM_REG && --n_words != 0);

57814

+ }

57815

+ else

57816

+ {

57817

+ /* The whole arg fits in gprs. */

57818

+ rtx r = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

57819

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx);

57820

+ }

57821

+ }

57822

+ else

57823

+ {

57824

+ /* It's entirely in memory. */

57825

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx);

57826

+ }

57827

+

57828

+ return k;

57829

+}

57830

+

57831

+/* RVEC is a vector of K components of an argument of mode MODE.

57832

+ Construct the final function_arg return value from it. */

57833

+

57834

+static rtx

57835

+rs6000_finish_function_arg (enum machine_mode mode, rtx *rvec, int k)

57836

+{

57837

+ gcc_assert (k >= 1);

57838

+

57839

+ /* Avoid returning a PARALLEL in the trivial cases. */

57840

+ if (k == 1)

57841

+ {

57842

+ if (XEXP (rvec[0], 0) == NULL_RTX)

57843

+ return NULL_RTX;

57844

+

57845

+ if (GET_MODE (XEXP (rvec[0], 0)) == mode)

57846

+ return XEXP (rvec[0], 0);

57847

+ }

57848

+

57849

+ return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec));

57850

+}

57851

+

57852

/* Determine where to put an argument to a function.

57853

Value is zero to push the argument on the stack,

57854

or a hard register in which to store the argument.

57855

@@ -8537,6 +10065,8 @@

57856

{

57857

CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);

57858

enum rs6000_abi abi = DEFAULT_ABI;

57859

+ enum machine_mode elt_mode;

57860

+ int n_elts;

57861

57862

/* Return a marker to indicate whether CR1 needs to set or clear the

57863

bit that V.4 uses to say fp args were passed in registers.

57864

@@ -8563,6 +10093,8 @@

57865

return GEN_INT (cum->call_cookie & ~CALL_LIBCALL);

57866

}

57867

57868

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

57869

+

57870

if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type))

57871

{

57872

rtx rslt = rs6000_darwin64_record_arg (cum, type, named, /*retval= */false);

57873

@@ -8571,33 +10103,30 @@

57874

/* Else fall through to usual handling. */

57875

}

57876

57877

- if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))

57878

- if (TARGET_64BIT && ! cum->prototype)

57879

- {

57880

- /* Vector parameters get passed in vector register

57881

- and also in GPRs or memory, in absence of prototype. */

57882

- int align_words;

57883

- rtx slot;

57884

- align_words = (cum->words + 1) & ~1;

57885

+ if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named))

57886

+ {

57887

+ rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1];

57888

+ rtx r, off;

57889

+ int i, k = 0;

57890

57891

- if (align_words >= GP_ARG_NUM_REG)

57892

- {

57893

- slot = NULL_RTX;

57894

- }

57895

- else

57896

- {

57897

- slot = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

57898

- }

57899

- return gen_rtx_PARALLEL (mode,

57900

- gen_rtvec (2,

57901

- gen_rtx_EXPR_LIST (VOIDmode,

57902

- slot, const0_rtx),

57903

- gen_rtx_EXPR_LIST (VOIDmode,

57904

- gen_rtx_REG (mode, cum->vregno),

57905

- const0_rtx)));

57906

- }

57907

- else

57908

- return gen_rtx_REG (mode, cum->vregno);

57909

+ /* Do we also need to pass this argument in the parameter

57910

+ save area? */

57911

+ if (TARGET_64BIT && ! cum->prototype)

57912

+ {

57913

+ int align_words = (cum->words + 1) & ~1;

57914

+ k = rs6000_psave_function_arg (mode, type, align_words, rvec);

57915

+ }

57916

+

57917

+ /* Describe where this argument goes in the vector registers. */

57918

+ for (i = 0; i < n_elts && cum->vregno + i <= ALTIVEC_ARG_MAX_REG; i++)

57919

+ {

57920

+ r = gen_rtx_REG (elt_mode, cum->vregno + i);

57921

+ off = GEN_INT (i * GET_MODE_SIZE (elt_mode));

57922

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

57923

+ }

57924

+

57925

+ return rs6000_finish_function_arg (mode, rvec, k);

57926

+ }

57927

else if (TARGET_ALTIVEC_ABI

57928

&& (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

57929

|| (type && TREE_CODE (type) == VECTOR_TYPE

57930

@@ -8612,13 +10141,13 @@

57931

int align, align_words, n_words;

57932

enum machine_mode part_mode;

57933

57934

- /* Vector parameters must be 16-byte aligned. This places them at

57935

- 2 mod 4 in terms of words in 32-bit mode, since the parameter

57936

- save area starts at offset 24 from the stack. In 64-bit mode,

57937

- they just have to start on an even word, since the parameter

57938

- save area is 16-byte aligned. */

57939

+ /* Vector parameters must be 16-byte aligned. In 32-bit

57940

+ mode this means we need to take into account the offset

57941

+ to the parameter save area. In 64-bit mode, they just

57942

+ have to start on an even word, since the parameter save

57943

+ area is 16-byte aligned. */

57944

if (TARGET_32BIT)

57945

- align = (2 - cum->words) & 3;

57946

+ align = -(rs6000_parm_offset () + cum->words) & 3;

57947

else

57948

align = cum->words & 1;

57949

align_words = cum->words + align;

57950

@@ -8696,92 +10225,44 @@

57951

57952

/* _Decimal128 must be passed in an even/odd float register pair.

57953

This assumes that the register number is odd when fregno is odd. */

57954

- if (mode == TDmode && (cum->fregno % 2) == 1)

57955

+ if (elt_mode == TDmode && (cum->fregno % 2) == 1)

57956

cum->fregno++;

57957

57958

- if (USE_FP_FOR_ARG_P (cum, mode, type))

57959

+ if (USE_FP_FOR_ARG_P (cum, elt_mode))

57960

{

57961

- rtx rvec[GP_ARG_NUM_REG + 1];

57962

- rtx r;

57963

- int k;

57964

- bool needs_psave;

57965

- enum machine_mode fmode = mode;

57966

- unsigned long n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3;

57967

+ rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1];

57968

+ rtx r, off;

57969

+ int i, k = 0;

57970

+ unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3;

57971

57972

- if (cum->fregno + n_fpreg > FP_ARG_MAX_REG + 1)

57973

- {

57974

- /* Currently, we only ever need one reg here because complex

57975

- doubles are split. */

57976

- gcc_assert (cum->fregno == FP_ARG_MAX_REG

57977

- && (fmode == TFmode || fmode == TDmode));

57978

+ /* Do we also need to pass this argument in the parameter

57979

+ save area? */

57980

+ if (type && (cum->nargs_prototype <= 0

57981

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

57982

+ && TARGET_XL_COMPAT

57983

+ && align_words >= GP_ARG_NUM_REG)))

57984

+ k = rs6000_psave_function_arg (mode, type, align_words, rvec);

57985

57986

- /* Long double or _Decimal128 split over regs and memory. */

57987

- fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode;

57988

- }

57989

-

57990

- /* Do we also need to pass this arg in the parameter save

57991

- area? */

57992

- needs_psave = (type

57993

- && (cum->nargs_prototype <= 0

57994

- || (DEFAULT_ABI == ABI_AIX

57995

- && TARGET_XL_COMPAT

57996

- && align_words >= GP_ARG_NUM_REG)));

57997

-

57998

- if (!needs_psave && mode == fmode)

57999

- return gen_rtx_REG (fmode, cum->fregno);

58000

-

58001

- k = 0;

58002

- if (needs_psave)

58003

+ /* Describe where this argument goes in the fprs. */

58004

+ for (i = 0; i < n_elts

58005

+ && cum->fregno + i * n_fpreg <= FP_ARG_MAX_REG; i++)

58006

{

58007

- /* Describe the part that goes in gprs or the stack.

58008

- This piece must come first, before the fprs. */

58009

- if (align_words < GP_ARG_NUM_REG)

58010

+ /* Check if the argument is split over registers and memory.

58011

+ This can only ever happen for long double or _Decimal128;

58012

+ complex types are handled via split_complex_arg. */

58013

+ enum machine_mode fmode = elt_mode;

58014

+ if (cum->fregno + (i + 1) * n_fpreg > FP_ARG_MAX_REG + 1)

58015

{

58016

- unsigned long n_words = rs6000_arg_size (mode, type);

58017

+ gcc_assert (fmode == TFmode || fmode == TDmode);

58018

+ fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode;

58019

+ }

58020

58021

- if (align_words + n_words > GP_ARG_NUM_REG

58022

- || (TARGET_32BIT && TARGET_POWERPC64))

58023

- {

58024

- /* If this is partially on the stack, then we only

58025

- include the portion actually in registers here. */

58026

- enum machine_mode rmode = TARGET_32BIT ? SImode : DImode;

58027

- rtx off;

58028

- int i = 0;

58029

- if (align_words + n_words > GP_ARG_NUM_REG)

58030

- /* Not all of the arg fits in gprs. Say that it

58031

- goes in memory too, using a magic NULL_RTX

58032

- component. Also see comment in

58033

- rs6000_mixed_function_arg for why the normal

58034

- function_arg_partial_nregs scheme doesn't work

58035

- in this case. */

58036

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX,

58037

- const0_rtx);

58038

- do

58039

- {

58040

- r = gen_rtx_REG (rmode,

58041

- GP_ARG_MIN_REG + align_words);

58042

- off = GEN_INT (i++ * GET_MODE_SIZE (rmode));

58043

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

58044

- }

58045

- while (++align_words < GP_ARG_NUM_REG && --n_words != 0);

58046

- }

58047

- else

58048

- {

58049

- /* The whole arg fits in gprs. */

58050

- r = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

58051

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx);

58052

- }

58053

- }

58054

- else

58055

- /* It's entirely in memory. */

58056

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx);

58057

+ r = gen_rtx_REG (fmode, cum->fregno + i * n_fpreg);

58058

+ off = GEN_INT (i * GET_MODE_SIZE (elt_mode));

58059

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

58060

}

58061

58062

- /* Describe where this piece goes in the fprs. */

58063

- r = gen_rtx_REG (fmode, cum->fregno);

58064

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx);

58065

-

58066

- return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec));

58067

+ return rs6000_finish_function_arg (mode, rvec, k);

58068

}

58069

else if (align_words < GP_ARG_NUM_REG)

58070

{

58071

@@ -8788,9 +10269,6 @@

58072

if (TARGET_32BIT && TARGET_POWERPC64)

58073

return rs6000_mixed_function_arg (mode, type, align_words);

58074

58075

- if (mode == BLKmode)

58076

- mode = Pmode;

58077

-

58078

return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

58079

}

58080

else

58081

@@ -8809,16 +10287,32 @@

58082

tree type, bool named)

58083

{

58084

CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);

58085

+ bool passed_in_gprs = true;

58086

int ret = 0;

58087

int align_words;

58088

+ enum machine_mode elt_mode;

58089

+ int n_elts;

58090

58091

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

58092

+

58093

if (DEFAULT_ABI == ABI_V4)

58094

return 0;

58095

58096

- if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named)

58097

- && cum->nargs_prototype >= 0)

58098

- return 0;

58099

+ if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named))

58100

+ {

58101

+ /* If we are passing this arg in the fixed parameter save area

58102

+ (gprs or memory) as well as VRs, we do not use the partial

58103

+ bytes mechanism; instead, rs6000_function_arg will return a

58104

+ PARALLEL including a memory element as necessary. */

58105

+ if (TARGET_64BIT && ! cum->prototype)

58106

+ return 0;

58107

58108

+ /* Otherwise, we pass in VRs only. Check for partial copies. */

58109

+ passed_in_gprs = false;

58110

+ if (cum->vregno + n_elts > ALTIVEC_ARG_MAX_REG + 1)

58111

+ ret = (ALTIVEC_ARG_MAX_REG + 1 - cum->vregno) * 16;

58112

+ }

58113

+

58114

/* In this complicated case we just disable the partial_nregs code. */

58115

if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type))

58116

return 0;

58117

@@ -8825,26 +10319,30 @@

58118

58119

align_words = rs6000_parm_start (mode, type, cum->words);

58120

58121

- if (USE_FP_FOR_ARG_P (cum, mode, type))

58122

+ if (USE_FP_FOR_ARG_P (cum, elt_mode))

58123

{

58124

+ unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3;

58125

+

58126

/* If we are passing this arg in the fixed parameter save area

58127

- (gprs or memory) as well as fprs, then this function should

58128

- return the number of partial bytes passed in the parameter

58129

- save area rather than partial bytes passed in fprs. */

58130

+ (gprs or memory) as well as FPRs, we do not use the partial

58131

+ bytes mechanism; instead, rs6000_function_arg will return a

58132

+ PARALLEL including a memory element as necessary. */

58133

if (type

58134

&& (cum->nargs_prototype <= 0

58135

- || (DEFAULT_ABI == ABI_AIX

58136

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

58137

&& TARGET_XL_COMPAT

58138

&& align_words >= GP_ARG_NUM_REG)))

58139

return 0;

58140

- else if (cum->fregno + ((GET_MODE_SIZE (mode) + 7) >> 3)

58141

- > FP_ARG_MAX_REG + 1)

58142

- ret = (FP_ARG_MAX_REG + 1 - cum->fregno) * 8;

58143

- else if (cum->nargs_prototype >= 0)

58144

- return 0;

58145

+

58146

+ /* Otherwise, we pass in FPRs only. Check for partial copies. */

58147

+ passed_in_gprs = false;

58148

+ if (cum->fregno + n_elts * n_fpreg > FP_ARG_MAX_REG + 1)

58149

+ ret = ((FP_ARG_MAX_REG + 1 - cum->fregno)

58150

+ * MIN (8, GET_MODE_SIZE (elt_mode)));

58151

}

58152

58153

- if (align_words < GP_ARG_NUM_REG

58154

+ if (passed_in_gprs

58155

+ && align_words < GP_ARG_NUM_REG

58156

&& GP_ARG_NUM_REG < align_words + rs6000_arg_size (mode, type))

58157

ret = (GP_ARG_NUM_REG - align_words) * (TARGET_32BIT ? 4 : 8);

58158

58159

@@ -8925,6 +10423,139 @@

58160

return 0;

58161

}

58162

58163

+/* Process parameter of type TYPE after ARGS_SO_FAR parameters were

58164

+ already processes. Return true if the parameter must be passed

58165

+ (fully or partially) on the stack. */

58166

+

58167

+static bool

58168

+rs6000_parm_needs_stack (cumulative_args_t args_so_far, tree type)

58169

+{

58170

+ enum machine_mode mode;

58171

+ int unsignedp;

58172

+ rtx entry_parm;

58173

+

58174

+ /* Catch errors. */

58175

+ if (type == NULL || type == error_mark_node)

58176

+ return true;

58177

+

58178

+ /* Handle types with no storage requirement. */

58179

+ if (TYPE_MODE (type) == VOIDmode)

58180

+ return false;

58181

+

58182

+ /* Handle complex types. */

58183

+ if (TREE_CODE (type) == COMPLEX_TYPE)

58184

+ return (rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type))

58185

+ || rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type)));

58186

+

58187

+ /* Handle transparent aggregates. */

58188

+ if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE)

58189

+ && TYPE_TRANSPARENT_AGGR (type))

58190

+ type = TREE_TYPE (first_field (type));

58191

+

58192

+ /* See if this arg was passed by invisible reference. */

58193

+ if (pass_by_reference (get_cumulative_args (args_so_far),

58194

+ TYPE_MODE (type), type, true))

58195

+ type = build_pointer_type (type);

58196

+

58197

+ /* Find mode as it is passed by the ABI. */

58198

+ unsignedp = TYPE_UNSIGNED (type);

58199

+ mode = promote_mode (type, TYPE_MODE (type), &unsignedp);

58200

+

58201

+ /* If we must pass in stack, we need a stack. */

58202

+ if (rs6000_must_pass_in_stack (mode, type))

58203

+ return true;

58204

+

58205

+ /* If there is no incoming register, we need a stack. */

58206

+ entry_parm = rs6000_function_arg (args_so_far, mode, type, true);

58207

+ if (entry_parm == NULL)

58208

+ return true;

58209

+

58210

+ /* Likewise if we need to pass both in registers and on the stack. */

58211

+ if (GET_CODE (entry_parm) == PARALLEL

58212

+ && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX)

58213

+ return true;

58214

+

58215

+ /* Also true if we're partially in registers and partially not. */

58216

+ if (rs6000_arg_partial_bytes (args_so_far, mode, type, true) != 0)

58217

+ return true;

58218

+

58219

+ /* Update info on where next arg arrives in registers. */

58220

+ rs6000_function_arg_advance (args_so_far, mode, type, true);

58221

+ return false;

58222

+}

58223

+

58224

+/* Return true if FUN has no prototype, has a variable argument

58225

+ list, or passes any parameter in memory. */

58226

+

58227

+static bool

58228

+rs6000_function_parms_need_stack (tree fun)

58229

+{

58230

+ function_args_iterator args_iter;

58231

+ tree arg_type;

58232

+ CUMULATIVE_ARGS args_so_far_v;

58233

+ cumulative_args_t args_so_far;

58234

+

58235

+ if (!fun)

58236

+ /* Must be a libcall, all of which only use reg parms. */

58237

+ return false;

58238

+ if (!TYPE_P (fun))

58239

+ fun = TREE_TYPE (fun);

58240

+

58241

+ /* Varargs functions need the parameter save area. */

58242

+ if (!prototype_p (fun) || stdarg_p (fun))

58243

+ return true;

58244

+

58245

+ INIT_CUMULATIVE_INCOMING_ARGS (args_so_far_v, fun, NULL_RTX);

58246

+ args_so_far = pack_cumulative_args (&args_so_far_v);

58247

+

58248

+ if (aggregate_value_p (TREE_TYPE (fun), fun))

58249

+ {

58250

+ tree type = build_pointer_type (TREE_TYPE (fun));

58251

+ rs6000_parm_needs_stack (args_so_far, type);

58252

+ }

58253

+

58254

+ FOREACH_FUNCTION_ARGS (fun, arg_type, args_iter)

58255

+ if (rs6000_parm_needs_stack (args_so_far, arg_type))

58256

+ return true;

58257

+

58258

+ return false;

58259

+}

58260

+

58261

+/* Return the size of the REG_PARM_STACK_SPACE are for FUN. This is

58262

+ usually a constant depending on the ABI. However, in the ELFv2 ABI

58263

+ the register parameter area is optional when calling a function that

58264

+ has a prototype is scope, has no variable argument list, and passes

58265

+ all parameters in registers. */

58266

+

58267

+int

58268

+rs6000_reg_parm_stack_space (tree fun)

58269

+{

58270

+ int reg_parm_stack_space;

58271

+

58272

+ switch (DEFAULT_ABI)

58273

+ {

58274

+ default:

58275

+ reg_parm_stack_space = 0;

58276

+ break;

58277

+

58278

+ case ABI_AIX:

58279

+ case ABI_DARWIN:

58280

+ reg_parm_stack_space = TARGET_64BIT ? 64 : 32;

58281

+ break;

58282

+

58283

+ case ABI_ELFv2:

58284

+ /* ??? Recomputing this every time is a bit expensive. Is there

58285

+ a place to cache this information? */

58286

+ if (rs6000_function_parms_need_stack (fun))

58287

+ reg_parm_stack_space = TARGET_64BIT ? 64 : 32;

58288

+ else

58289

+ reg_parm_stack_space = 0;

58290

+ break;

58291

+ }

58292

+

58293

+ return reg_parm_stack_space;

58294

+}

58295

+

58296

static void

58297

rs6000_move_block_from_reg (int regno, rtx x, int nregs)

58298

{

58299

@@ -9306,8 +10937,10 @@

58300

We don't need to check for pass-by-reference because of the test above.

58301

We can return a simplifed answer, since we know there's no offset to add. */

58302

58303

- if (TARGET_MACHO

58304

- && rs6000_darwin64_abi

58305

+ if (((TARGET_MACHO

58306

+ && rs6000_darwin64_abi)

58307

+ || DEFAULT_ABI == ABI_ELFv2

58308

+ || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm))

58309

&& integer_zerop (TYPE_SIZE (type)))

58310

{

58311

unsigned HOST_WIDE_INT align, boundary;

58312

@@ -9602,6 +11235,7 @@

58313

#undef RS6000_BUILTIN_A

58314

#undef RS6000_BUILTIN_D

58315

#undef RS6000_BUILTIN_E

58316

+#undef RS6000_BUILTIN_H

58317

#undef RS6000_BUILTIN_P

58318

#undef RS6000_BUILTIN_Q

58319

#undef RS6000_BUILTIN_S

58320

@@ -9615,6 +11249,7 @@

58321

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

58322

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58323

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58324

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58325

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58326

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58327

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

58328

@@ -9633,6 +11268,7 @@

58329

#undef RS6000_BUILTIN_A

58330

#undef RS6000_BUILTIN_D

58331

#undef RS6000_BUILTIN_E

58332

+#undef RS6000_BUILTIN_H

58333

#undef RS6000_BUILTIN_P

58334

#undef RS6000_BUILTIN_Q

58335

#undef RS6000_BUILTIN_S

58336

@@ -9646,6 +11282,7 @@

58337

{ MASK, ICODE, NAME, ENUM },

58338

58339

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58340

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58341

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58342

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58343

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

58344

@@ -9664,6 +11301,7 @@

58345

#undef RS6000_BUILTIN_A

58346

#undef RS6000_BUILTIN_D

58347

#undef RS6000_BUILTIN_E

58348

+#undef RS6000_BUILTIN_H

58349

#undef RS6000_BUILTIN_P

58350

#undef RS6000_BUILTIN_Q

58351

#undef RS6000_BUILTIN_S

58352

@@ -9677,6 +11315,7 @@

58353

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

58354

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58355

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58356

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58357

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58358

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58359

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

58360

@@ -9693,6 +11332,7 @@

58361

#undef RS6000_BUILTIN_A

58362

#undef RS6000_BUILTIN_D

58363

#undef RS6000_BUILTIN_E

58364

+#undef RS6000_BUILTIN_H

58365

#undef RS6000_BUILTIN_P

58366

#undef RS6000_BUILTIN_Q

58367

#undef RS6000_BUILTIN_S

58368

@@ -9704,6 +11344,7 @@

58369

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

58370

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58371

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58372

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58373

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \

58374

{ MASK, ICODE, NAME, ENUM },

58375

58376

@@ -9725,6 +11366,7 @@

58377

#undef RS6000_BUILTIN_A

58378

#undef RS6000_BUILTIN_D

58379

#undef RS6000_BUILTIN_E

58380

+#undef RS6000_BUILTIN_H

58381

#undef RS6000_BUILTIN_P

58382

#undef RS6000_BUILTIN_Q

58383

#undef RS6000_BUILTIN_S

58384

@@ -9736,6 +11378,7 @@

58385

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

58386

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58387

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58388

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58389

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58390

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58391

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE) \

58392

@@ -9755,6 +11398,7 @@

58393

#undef RS6000_BUILTIN_A

58394

#undef RS6000_BUILTIN_D

58395

#undef RS6000_BUILTIN_E

58396

+#undef RS6000_BUILTIN_H

58397

#undef RS6000_BUILTIN_P

58398

#undef RS6000_BUILTIN_Q

58399

#undef RS6000_BUILTIN_S

58400

@@ -9768,6 +11412,7 @@

58401

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) \

58402

{ MASK, ICODE, NAME, ENUM },

58403

58404

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58405

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58406

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58407

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

58408

@@ -9785,6 +11430,7 @@

58409

#undef RS6000_BUILTIN_A

58410

#undef RS6000_BUILTIN_D

58411

#undef RS6000_BUILTIN_E

58412

+#undef RS6000_BUILTIN_H

58413

#undef RS6000_BUILTIN_P

58414

#undef RS6000_BUILTIN_Q

58415

#undef RS6000_BUILTIN_S

58416

@@ -9796,6 +11442,7 @@

58417

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

58418

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58419

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58420

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58421

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58422

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE) \

58423

{ MASK, ICODE, NAME, ENUM },

58424

@@ -9816,6 +11463,7 @@

58425

#undef RS6000_BUILTIN_A

58426

#undef RS6000_BUILTIN_D

58427

#undef RS6000_BUILTIN_E

58428

+#undef RS6000_BUILTIN_H

58429

#undef RS6000_BUILTIN_P

58430

#undef RS6000_BUILTIN_Q

58431

#undef RS6000_BUILTIN_S

58432

@@ -9829,6 +11477,7 @@

58433

58434

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58435

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58436

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58437

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58438

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58439

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

58440

@@ -9846,8 +11495,9 @@

58441

#undef RS6000_BUILTIN_2

58442

#undef RS6000_BUILTIN_3

58443

#undef RS6000_BUILTIN_A

58444

+#undef RS6000_BUILTIN_D

58445

#undef RS6000_BUILTIN_E

58446

-#undef RS6000_BUILTIN_D

58447

+#undef RS6000_BUILTIN_H

58448

#undef RS6000_BUILTIN_P

58449

#undef RS6000_BUILTIN_Q

58450

#undef RS6000_BUILTIN_S

58451

@@ -9861,6 +11511,7 @@

58452

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

58453

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58454

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58455

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

58456

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58457

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58458

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

58459

@@ -9871,6 +11522,7 @@

58460

#include "rs6000-builtin.def"

58461

};

58462

58463

+/* HTM builtins. */

58464

#undef RS6000_BUILTIN_1

58465

#undef RS6000_BUILTIN_2

58466

#undef RS6000_BUILTIN_3

58467

@@ -9877,11 +11529,42 @@

58468

#undef RS6000_BUILTIN_A

58469

#undef RS6000_BUILTIN_D

58470

#undef RS6000_BUILTIN_E

58471

+#undef RS6000_BUILTIN_H

58472

#undef RS6000_BUILTIN_P

58473

#undef RS6000_BUILTIN_Q

58474

#undef RS6000_BUILTIN_S

58475

#undef RS6000_BUILTIN_X

58476

58477

+#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)

58478

+#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)

58479

+#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)

58480

+#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

58481

+#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

58482

+#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

58483

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \

58484

+ { MASK, ICODE, NAME, ENUM },

58485

+

58486

+#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

58487

+#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

58488

+#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

58489

+#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)

58490

+

58491

+static const struct builtin_description bdesc_htm[] =

58492

+{

58493

+#include "rs6000-builtin.def"

58494

+};

58495

+

58496

+#undef RS6000_BUILTIN_1

58497

+#undef RS6000_BUILTIN_2

58498

+#undef RS6000_BUILTIN_3

58499

+#undef RS6000_BUILTIN_A

58500

+#undef RS6000_BUILTIN_D

58501

+#undef RS6000_BUILTIN_E

58502

+#undef RS6000_BUILTIN_H

58503

+#undef RS6000_BUILTIN_P

58504

+#undef RS6000_BUILTIN_Q

58505

+#undef RS6000_BUILTIN_S

58506

+

58507

/* Return true if a builtin function is overloaded. */

58508

bool

58509

rs6000_overloaded_builtin_p (enum rs6000_builtins fncode)

58510

@@ -10189,7 +11872,101 @@

58511

return target;

58512

}

58513

58514

+/* Return a constant vector for use as a little-endian permute control vector

58515

+ to reverse the order of elements of the given vector mode. */

58516

static rtx

58517

+swap_selector_for_mode (enum machine_mode mode)

58518

+{

58519

+ /* These are little endian vectors, so their elements are reversed

58520

+ from what you would normally expect for a permute control vector. */

58521

+ unsigned int swap2[16] = {7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8};

58522

+ unsigned int swap4[16] = {3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12};

58523

+ unsigned int swap8[16] = {1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14};

58524

+ unsigned int swap16[16] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

58525

+ unsigned int *swaparray, i;

58526

+ rtx perm[16];

58527

+

58528

+ switch (mode)

58529

+ {

58530

+ case V2DFmode:

58531

+ case V2DImode:

58532

+ swaparray = swap2;

58533

+ break;

58534

+ case V4SFmode:

58535

+ case V4SImode:

58536

+ swaparray = swap4;

58537

+ break;

58538

+ case V8HImode:

58539

+ swaparray = swap8;

58540

+ break;

58541

+ case V16QImode:

58542

+ swaparray = swap16;

58543

+ break;

58544

+ default:

58545

+ gcc_unreachable ();

58546

+ }

58547

+

58548

+ for (i = 0; i < 16; ++i)

58549

+ perm[i] = GEN_INT (swaparray[i]);

58550

+

58551

+ return force_reg (V16QImode, gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm)));

58552

+}

58553

+

58554

+/* Generate code for an "lvx", "lvxl", or "lve*x" built-in for a little endian target

58555

+ with -maltivec=be specified. Issue the load followed by an element-reversing

58556

+ permute. */

58557

+void

58558

+altivec_expand_lvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec)

58559

+{

58560

+ rtx tmp = gen_reg_rtx (mode);

58561

+ rtx load = gen_rtx_SET (VOIDmode, tmp, op1);

58562

+ rtx lvx = gen_rtx_UNSPEC (mode, gen_rtvec (1, const0_rtx), unspec);

58563

+ rtx par = gen_rtx_PARALLEL (mode, gen_rtvec (2, load, lvx));

58564

+ rtx sel = swap_selector_for_mode (mode);

58565

+ rtx vperm = gen_rtx_UNSPEC (mode, gen_rtvec (3, tmp, tmp, sel), UNSPEC_VPERM);

58566

+

58567

+ gcc_assert (REG_P (op0));

58568

+ emit_insn (par);

58569

+ emit_insn (gen_rtx_SET (VOIDmode, op0, vperm));

58570

+}

58571

+

58572

+/* Generate code for a "stvx" or "stvxl" built-in for a little endian target

58573

+ with -maltivec=be specified. Issue the store preceded by an element-reversing

58574

+ permute. */

58575

+void

58576

+altivec_expand_stvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec)

58577

+{

58578

+ rtx tmp = gen_reg_rtx (mode);

58579

+ rtx store = gen_rtx_SET (VOIDmode, op0, tmp);

58580

+ rtx stvx = gen_rtx_UNSPEC (mode, gen_rtvec (1, const0_rtx), unspec);

58581

+ rtx par = gen_rtx_PARALLEL (mode, gen_rtvec (2, store, stvx));

58582

+ rtx sel = swap_selector_for_mode (mode);

58583

+ rtx vperm;

58584

+

58585

+ gcc_assert (REG_P (op1));

58586

+ vperm = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op1, sel), UNSPEC_VPERM);

58587

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, vperm));

58588

+ emit_insn (par);

58589

+}

58590

+

58591

+/* Generate code for a "stve*x" built-in for a little endian target with -maltivec=be

58592

+ specified. Issue the store preceded by an element-reversing permute. */

58593

+void

58594

+altivec_expand_stvex_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec)

58595

+{

58596

+ enum machine_mode inner_mode = GET_MODE_INNER (mode);

58597

+ rtx tmp = gen_reg_rtx (mode);

58598

+ rtx stvx = gen_rtx_UNSPEC (inner_mode, gen_rtvec (1, tmp), unspec);

58599

+ rtx sel = swap_selector_for_mode (mode);

58600

+ rtx vperm;

58601

+

58602

+ gcc_assert (REG_P (op1));

58603

+ vperm = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op1, sel), UNSPEC_VPERM);

58604

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, vperm));

58605

+ emit_insn (gen_rtx_SET (VOIDmode, op0, stvx));

58606

+}

58607

+

58608

+static rtx

58609

altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk)

58610

{

58611

rtx pat, addr;

58612

@@ -10351,7 +12128,198 @@

58613

return NULL_RTX;

58614

}

58615

58616

+/* Return the appropriate SPR number associated with the given builtin. */

58617

+static inline HOST_WIDE_INT

58618

+htm_spr_num (enum rs6000_builtins code)

58619

+{

58620

+ if (code == HTM_BUILTIN_GET_TFHAR

58621

+ || code == HTM_BUILTIN_SET_TFHAR)

58622

+ return TFHAR_SPR;

58623

+ else if (code == HTM_BUILTIN_GET_TFIAR

58624

+ || code == HTM_BUILTIN_SET_TFIAR)

58625

+ return TFIAR_SPR;

58626

+ else if (code == HTM_BUILTIN_GET_TEXASR

58627

+ || code == HTM_BUILTIN_SET_TEXASR)

58628

+ return TEXASR_SPR;

58629

+ gcc_assert (code == HTM_BUILTIN_GET_TEXASRU

58630

+ || code == HTM_BUILTIN_SET_TEXASRU);

58631

+ return TEXASRU_SPR;

58632

+}

58633

+

58634

+/* Return the appropriate SPR regno associated with the given builtin. */

58635

+static inline HOST_WIDE_INT

58636

+htm_spr_regno (enum rs6000_builtins code)

58637

+{

58638

+ if (code == HTM_BUILTIN_GET_TFHAR

58639

+ || code == HTM_BUILTIN_SET_TFHAR)

58640

+ return TFHAR_REGNO;

58641

+ else if (code == HTM_BUILTIN_GET_TFIAR

58642

+ || code == HTM_BUILTIN_SET_TFIAR)

58643

+ return TFIAR_REGNO;

58644

+ gcc_assert (code == HTM_BUILTIN_GET_TEXASR

58645

+ || code == HTM_BUILTIN_SET_TEXASR

58646

+ || code == HTM_BUILTIN_GET_TEXASRU

58647

+ || code == HTM_BUILTIN_SET_TEXASRU);

58648

+ return TEXASR_REGNO;

58649

+}

58650

+

58651

+/* Return the correct ICODE value depending on whether we are

58652

+ setting or reading the HTM SPRs. */

58653

+static inline enum insn_code

58654

+rs6000_htm_spr_icode (bool nonvoid)

58655

+{

58656

+ if (nonvoid)

58657

+ return (TARGET_64BIT) ? CODE_FOR_htm_mfspr_di : CODE_FOR_htm_mfspr_si;

58658

+ else

58659

+ return (TARGET_64BIT) ? CODE_FOR_htm_mtspr_di : CODE_FOR_htm_mtspr_si;

58660

+}

58661

+

58662

+/* Expand the HTM builtin in EXP and store the result in TARGET.

58663

+ Store true in *EXPANDEDP if we found a builtin to expand. */

58664

static rtx

58665

+htm_expand_builtin (tree exp, rtx target, bool * expandedp)

58666

+{

58667

+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);

58668

+ bool nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;

58669

+ enum rs6000_builtins fcode = (enum rs6000_builtins) DECL_FUNCTION_CODE (fndecl);

58670

+ const struct builtin_description *d;

58671

+ size_t i;

58672

+

58673

+ *expandedp = false;

58674

+

58675

+ /* Expand the HTM builtins. */

58676

+ d = bdesc_htm;

58677

+ for (i = 0; i < ARRAY_SIZE (bdesc_htm); i++, d++)

58678

+ if (d->code == fcode)

58679

+ {

58680

+ rtx op[MAX_HTM_OPERANDS], pat;

58681

+ int nopnds = 0;

58682

+ tree arg;

58683

+ call_expr_arg_iterator iter;

58684

+ unsigned attr = rs6000_builtin_info[fcode].attr;

58685

+ enum insn_code icode = d->icode;

58686

+

58687

+ if (attr & RS6000_BTC_SPR)

58688

+ icode = rs6000_htm_spr_icode (nonvoid);

58689

+

58690

+ if (nonvoid)

58691

+ {

58692

+ enum machine_mode tmode = insn_data[icode].operand[0].mode;

58693

+ if (!target

58694

+ || GET_MODE (target) != tmode

58695

+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))

58696

+ target = gen_reg_rtx (tmode);

58697

+ op[nopnds++] = target;

58698

+ }

58699

+

58700

+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)

58701

+ {

58702

+ const struct insn_operand_data *insn_op;

58703

+

58704

+ if (arg == error_mark_node || nopnds >= MAX_HTM_OPERANDS)

58705

+ return NULL_RTX;

58706

+

58707

+ insn_op = &insn_data[icode].operand[nopnds];

58708

+

58709

+ op[nopnds] = expand_normal (arg);

58710

+

58711

+ if (!(*insn_op->predicate) (op[nopnds], insn_op->mode))

58712

+ {

58713

+ if (!strcmp (insn_op->constraint, "n"))

58714

+ {

58715

+ int arg_num = (nonvoid) ? nopnds : nopnds + 1;

58716

+ if (!CONST_INT_P (op[nopnds]))

58717

+ error ("argument %d must be an unsigned literal", arg_num);

58718

+ else

58719

+ error ("argument %d is an unsigned literal that is "

58720

+ "out of range", arg_num);

58721

+ return const0_rtx;

58722

+ }

58723

+ op[nopnds] = copy_to_mode_reg (insn_op->mode, op[nopnds]);

58724

+ }

58725

+

58726

+ nopnds++;

58727

+ }

58728

+

58729

+ /* Handle the builtins for extended mnemonics. These accept

58730

+ no arguments, but map to builtins that take arguments. */

58731

+ switch (fcode)

58732

+ {

58733

+ case HTM_BUILTIN_TENDALL: /* Alias for: tend. 1 */

58734

+ case HTM_BUILTIN_TRESUME: /* Alias for: tsr. 1 */

58735

+ op[nopnds++] = GEN_INT (1);

58736

+#ifdef ENABLE_CHECKING

58737

+ attr |= RS6000_BTC_UNARY;

58738

+#endif

58739

+ break;

58740

+ case HTM_BUILTIN_TSUSPEND: /* Alias for: tsr. 0 */

58741

+ op[nopnds++] = GEN_INT (0);

58742

+#ifdef ENABLE_CHECKING

58743

+ attr |= RS6000_BTC_UNARY;

58744

+#endif

58745

+ break;

58746

+ default:

58747

+ break;

58748

+ }

58749

+

58750

+ /* If this builtin accesses SPRs, then pass in the appropriate

58751

+ SPR number and SPR regno as the last two operands. */

58752

+ if (attr & RS6000_BTC_SPR)

58753

+ {

58754

+ op[nopnds++] = gen_rtx_CONST_INT (Pmode, htm_spr_num (fcode));

58755

+ op[nopnds++] = gen_rtx_REG (Pmode, htm_spr_regno (fcode));

58756

+ }

58757

+

58758

+#ifdef ENABLE_CHECKING

58759

+ int expected_nopnds = 0;

58760

+ if ((attr & RS6000_BTC_TYPE_MASK) == RS6000_BTC_UNARY)

58761

+ expected_nopnds = 1;

58762

+ else if ((attr & RS6000_BTC_TYPE_MASK) == RS6000_BTC_BINARY)

58763

+ expected_nopnds = 2;

58764

+ else if ((attr & RS6000_BTC_TYPE_MASK) == RS6000_BTC_TERNARY)

58765

+ expected_nopnds = 3;

58766

+ if (!(attr & RS6000_BTC_VOID))

58767

+ expected_nopnds += 1;

58768

+ if (attr & RS6000_BTC_SPR)

58769

+ expected_nopnds += 2;

58770

+

58771

+ gcc_assert (nopnds == expected_nopnds && nopnds <= MAX_HTM_OPERANDS);

58772

+#endif

58773

+

58774

+ switch (nopnds)

58775

+ {

58776

+ case 0:

58777

+ pat = GEN_FCN (icode) (NULL_RTX);

58778

+ break;

58779

+ case 1:

58780

+ pat = GEN_FCN (icode) (op[0]);

58781

+ break;

58782

+ case 2:

58783

+ pat = GEN_FCN (icode) (op[0], op[1]);

58784

+ break;

58785

+ case 3:

58786

+ pat = GEN_FCN (icode) (op[0], op[1], op[2]);

58787

+ break;

58788

+ case 4:

58789

+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);

58790

+ break;

58791

+ default:

58792

+ gcc_unreachable ();

58793

+ }

58794

+ if (!pat)

58795

+ return NULL_RTX;

58796

+ emit_insn (pat);

58797

+

58798

+ *expandedp = true;

58799

+ if (nonvoid)

58800

+ return target;

58801

+ return const0_rtx;

58802

+ }

58803

+

58804

+ return NULL_RTX;

58805

+}

58806

+

58807

+static rtx

58808

rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)

58809

{

58810

rtx pat;

58811

@@ -10427,7 +12395,28 @@

58812

return const0_rtx;

58813

}

58814

}

58815

+ else if (icode == CODE_FOR_crypto_vshasigmaw

58816

+ || icode == CODE_FOR_crypto_vshasigmad)

58817

+ {

58818

+ /* Check whether the 2nd and 3rd arguments are integer constants and in

58819

+ range and prepare arguments. */

58820

+ STRIP_NOPS (arg1);

58821

+ if (TREE_CODE (arg1) != INTEGER_CST

58822

+ || !IN_RANGE (TREE_INT_CST_LOW (arg1), 0, 1))

58823

+ {

58824

+ error ("argument 2 must be 0 or 1");

58825

+ return const0_rtx;

58826

+ }

58827

58828

+ STRIP_NOPS (arg2);

58829

+ if (TREE_CODE (arg2) != INTEGER_CST

58830

+ || !IN_RANGE (TREE_INT_CST_LOW (arg2), 0, 15))

58831

+ {

58832

+ error ("argument 3 must be in the range 0..15");

58833

+ return const0_rtx;

58834

+ }

58835

+ }

58836

+

58837

if (target == 0

58838

|| GET_MODE (target) != tmode

58839

|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))

58840

@@ -10481,6 +12470,8 @@

58841

break;

58842

case ALTIVEC_BUILTIN_LD_INTERNAL_2di:

58843

icode = CODE_FOR_vector_altivec_load_v2di;

58844

+ case ALTIVEC_BUILTIN_LD_INTERNAL_1ti:

58845

+ icode = CODE_FOR_vector_altivec_load_v1ti;

58846

break;

58847

default:

58848

*expandedp = false;

58849

@@ -10540,6 +12531,8 @@

58850

break;

58851

case ALTIVEC_BUILTIN_ST_INTERNAL_2di:

58852

icode = CODE_FOR_vector_altivec_store_v2di;

58853

+ case ALTIVEC_BUILTIN_ST_INTERNAL_1ti:

58854

+ icode = CODE_FOR_vector_altivec_store_v1ti;

58855

break;

58856

default:

58857

*expandedp = false;

58858

@@ -10632,21 +12625,33 @@

58859

enum machine_mode tmode = TYPE_MODE (type);

58860

enum machine_mode inner_mode = GET_MODE_INNER (tmode);

58861

int i, n_elt = GET_MODE_NUNITS (tmode);

58862

- rtvec v = rtvec_alloc (n_elt);

58863

58864

gcc_assert (VECTOR_MODE_P (tmode));

58865

gcc_assert (n_elt == call_expr_nargs (exp));

58866

58867

- for (i = 0; i < n_elt; ++i)

58868

+ if (!target || !register_operand (target, tmode))

58869

+ target = gen_reg_rtx (tmode);

58870

+

58871

+ /* If we have a vector compromised of a single element, such as V1TImode, do

58872

+ the initialization directly. */

58873

+ if (n_elt == 1 && GET_MODE_SIZE (tmode) == GET_MODE_SIZE (inner_mode))

58874

{

58875

- rtx x = expand_normal (CALL_EXPR_ARG (exp, i));

58876

- RTVEC_ELT (v, i) = gen_lowpart (inner_mode, x);

58877

+ rtx x = expand_normal (CALL_EXPR_ARG (exp, 0));

58878

+ emit_move_insn (target, gen_lowpart (tmode, x));

58879

}

58880

+ else

58881

+ {

58882

+ rtvec v = rtvec_alloc (n_elt);

58883

58884

- if (!target || !register_operand (target, tmode))

58885

- target = gen_reg_rtx (tmode);

58886

+ for (i = 0; i < n_elt; ++i)

58887

+ {

58888

+ rtx x = expand_normal (CALL_EXPR_ARG (exp, i));

58889

+ RTVEC_ELT (v, i) = gen_lowpart (inner_mode, x);

58890

+ }

58891

58892

- rs6000_expand_vector_init (target, gen_rtx_PARALLEL (tmode, v));

58893

+ rs6000_expand_vector_init (target, gen_rtx_PARALLEL (tmode, v));

58894

+ }

58895

+

58896

return target;

58897

}

58898

58899

@@ -10769,8 +12774,19 @@

58900

58901

switch (fcode)

58902

{

58903

+ case ALTIVEC_BUILTIN_STVX_V2DF:

58904

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v2df, exp);

58905

+ case ALTIVEC_BUILTIN_STVX_V2DI:

58906

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v2di, exp);

58907

+ case ALTIVEC_BUILTIN_STVX_V4SF:

58908

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v4sf, exp);

58909

case ALTIVEC_BUILTIN_STVX:

58910

+ case ALTIVEC_BUILTIN_STVX_V4SI:

58911

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v4si, exp);

58912

+ case ALTIVEC_BUILTIN_STVX_V8HI:

58913

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v8hi, exp);

58914

+ case ALTIVEC_BUILTIN_STVX_V16QI:

58915

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v16qi, exp);

58916

case ALTIVEC_BUILTIN_STVEBX:

58917

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvebx, exp);

58918

case ALTIVEC_BUILTIN_STVEHX:

58919

@@ -10777,8 +12793,19 @@

58920

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvehx, exp);

58921

case ALTIVEC_BUILTIN_STVEWX:

58922

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvewx, exp);

58923

+ case ALTIVEC_BUILTIN_STVXL_V2DF:

58924

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v2df, exp);

58925

+ case ALTIVEC_BUILTIN_STVXL_V2DI:

58926

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v2di, exp);

58927

+ case ALTIVEC_BUILTIN_STVXL_V4SF:

58928

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v4sf, exp);

58929

case ALTIVEC_BUILTIN_STVXL:

58930

- return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl, exp);

58931

+ case ALTIVEC_BUILTIN_STVXL_V4SI:

58932

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v4si, exp);

58933

+ case ALTIVEC_BUILTIN_STVXL_V8HI:

58934

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v8hi, exp);

58935

+ case ALTIVEC_BUILTIN_STVXL_V16QI:

58936

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v16qi, exp);

58937

58938

case ALTIVEC_BUILTIN_STVLX:

58939

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvlx, exp);

58940

@@ -10789,6 +12816,8 @@

58941

case ALTIVEC_BUILTIN_STVRXL:

58942

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvrxl, exp);

58943

58944

+ case VSX_BUILTIN_STXVD2X_V1TI:

58945

+ return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v1ti, exp);

58946

case VSX_BUILTIN_STXVD2X_V2DF:

58947

return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v2df, exp);

58948

case VSX_BUILTIN_STXVD2X_V2DI:

58949

@@ -10869,6 +12898,7 @@

58950

case ALTIVEC_BUILTIN_VEC_INIT_V4SF:

58951

case VSX_BUILTIN_VEC_INIT_V2DF:

58952

case VSX_BUILTIN_VEC_INIT_V2DI:

58953

+ case VSX_BUILTIN_VEC_INIT_V1TI:

58954

return altivec_expand_vec_init_builtin (TREE_TYPE (exp), exp, target);

58955

58956

case ALTIVEC_BUILTIN_VEC_SET_V4SI:

58957

@@ -10877,6 +12907,7 @@

58958

case ALTIVEC_BUILTIN_VEC_SET_V4SF:

58959

case VSX_BUILTIN_VEC_SET_V2DF:

58960

case VSX_BUILTIN_VEC_SET_V2DI:

58961

+ case VSX_BUILTIN_VEC_SET_V1TI:

58962

return altivec_expand_vec_set_builtin (exp);

58963

58964

case ALTIVEC_BUILTIN_VEC_EXT_V4SI:

58965

@@ -10885,6 +12916,7 @@

58966

case ALTIVEC_BUILTIN_VEC_EXT_V4SF:

58967

case VSX_BUILTIN_VEC_EXT_V2DF:

58968

case VSX_BUILTIN_VEC_EXT_V2DI:

58969

+ case VSX_BUILTIN_VEC_EXT_V1TI:

58970

return altivec_expand_vec_ext_builtin (exp, target);

58971

58972

default:

58973

@@ -10922,12 +12954,44 @@

58974

case ALTIVEC_BUILTIN_LVEWX:

58975

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvewx,

58976

exp, target, false);

58977

+ case ALTIVEC_BUILTIN_LVXL_V2DF:

58978

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v2df,

58979

+ exp, target, false);

58980

+ case ALTIVEC_BUILTIN_LVXL_V2DI:

58981

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v2di,

58982

+ exp, target, false);

58983

+ case ALTIVEC_BUILTIN_LVXL_V4SF:

58984

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v4sf,

58985

+ exp, target, false);

58986

case ALTIVEC_BUILTIN_LVXL:

58987

- return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl,

58988

+ case ALTIVEC_BUILTIN_LVXL_V4SI:

58989

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v4si,

58990

exp, target, false);

58991

+ case ALTIVEC_BUILTIN_LVXL_V8HI:

58992

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v8hi,

58993

+ exp, target, false);

58994

+ case ALTIVEC_BUILTIN_LVXL_V16QI:

58995

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v16qi,

58996

+ exp, target, false);

58997

+ case ALTIVEC_BUILTIN_LVX_V2DF:

58998

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v2df,

58999

+ exp, target, false);

59000

+ case ALTIVEC_BUILTIN_LVX_V2DI:

59001

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v2di,

59002

+ exp, target, false);

59003

+ case ALTIVEC_BUILTIN_LVX_V4SF:

59004

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v4sf,

59005

+ exp, target, false);

59006

case ALTIVEC_BUILTIN_LVX:

59007

+ case ALTIVEC_BUILTIN_LVX_V4SI:

59008

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v4si,

59009

exp, target, false);

59010

+ case ALTIVEC_BUILTIN_LVX_V8HI:

59011

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v8hi,

59012

+ exp, target, false);

59013

+ case ALTIVEC_BUILTIN_LVX_V16QI:

59014

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v16qi,

59015

+ exp, target, false);

59016

case ALTIVEC_BUILTIN_LVLX:

59017

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvlx,

59018

exp, target, true);

59019

@@ -10940,6 +13004,9 @@

59020

case ALTIVEC_BUILTIN_LVRXL:

59021

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvrxl,

59022

exp, target, true);

59023

+ case VSX_BUILTIN_LXVD2X_V1TI:

59024

+ return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v1ti,

59025

+ exp, target, false);

59026

case VSX_BUILTIN_LXVD2X_V2DF:

59027

return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v2df,

59028

exp, target, false);

59029

@@ -11411,6 +13478,8 @@

59030

error ("Builtin function %s is only valid for the cell processor", name);

59031

else if ((fnmask & RS6000_BTM_VSX) != 0)

59032

error ("Builtin function %s requires the -mvsx option", name);

59033

+ else if ((fnmask & RS6000_BTM_HTM) != 0)

59034

+ error ("Builtin function %s requires the -mhtm option", name);

59035

else if ((fnmask & RS6000_BTM_ALTIVEC) != 0)

59036

error ("Builtin function %s requires the -maltivec option", name);

59037

else if ((fnmask & RS6000_BTM_PAIRED) != 0)

59038

@@ -11515,7 +13584,8 @@

59039

case ALTIVEC_BUILTIN_MASK_FOR_LOAD:

59040

case ALTIVEC_BUILTIN_MASK_FOR_STORE:

59041

{

59042

- int icode = (int) CODE_FOR_altivec_lvsr;

59043

+ int icode = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr

59044

+ : (int) CODE_FOR_altivec_lvsl);

59045

enum machine_mode tmode = insn_data[icode].operand[0].mode;

59046

enum machine_mode mode = insn_data[icode].operand[1].mode;

59047

tree arg;

59048

@@ -11590,7 +13660,14 @@

59049

if (success)

59050

return ret;

59051

}

59052

+ if (TARGET_HTM)

59053

+ {

59054

+ ret = htm_expand_builtin (exp, target, &success);

59055

59056

+ if (success)

59057

+ return ret;

59058

+ }

59059

+

59060

gcc_assert (TARGET_ALTIVEC || TARGET_VSX || TARGET_SPE || TARGET_PAIRED_FLOAT);

59061

59062

/* Handle simple unary operations. */

59063

@@ -11648,6 +13725,14 @@

59064

opaque_p_V2SI_type_node = build_pointer_type (opaque_V2SI_type_node);

59065

opaque_V4SI_type_node = build_opaque_vector_type (intSI_type_node, 4);

59066

59067

+ /* We use V1TI mode as a special container to hold __int128_t items that

59068

+ must live in VSX registers. */

59069

+ if (intTI_type_node)

59070

+ {

59071

+ V1TI_type_node = build_vector_type (intTI_type_node, 1);

59072

+ unsigned_V1TI_type_node = build_vector_type (unsigned_intTI_type_node, 1);

59073

+ }

59074

+

59075

/* The 'vector bool ...' types must be kept distinct from 'vector unsigned ...'

59076

types, especially in C++ land. Similarly, 'vector pixel' is distinct from

59077

'vector unsigned short'. */

59078

@@ -11670,6 +13755,8 @@

59079

uintSI_type_internal_node = unsigned_intSI_type_node;

59080

intDI_type_internal_node = intDI_type_node;

59081

uintDI_type_internal_node = unsigned_intDI_type_node;

59082

+ intTI_type_internal_node = intTI_type_node;

59083

+ uintTI_type_internal_node = unsigned_intTI_type_node;

59084

float_type_internal_node = float_type_node;

59085

double_type_internal_node = double_type_node;

59086

void_type_internal_node = void_type_node;

59087

@@ -11682,8 +13769,12 @@

59088

builtin_mode_to_type[SImode][1] = unsigned_intSI_type_node;

59089

builtin_mode_to_type[DImode][0] = intDI_type_node;

59090

builtin_mode_to_type[DImode][1] = unsigned_intDI_type_node;

59091

+ builtin_mode_to_type[TImode][0] = intTI_type_node;

59092

+ builtin_mode_to_type[TImode][1] = unsigned_intTI_type_node;

59093

builtin_mode_to_type[SFmode][0] = float_type_node;

59094

builtin_mode_to_type[DFmode][0] = double_type_node;

59095

+ builtin_mode_to_type[V1TImode][0] = V1TI_type_node;

59096

+ builtin_mode_to_type[V1TImode][1] = unsigned_V1TI_type_node;

59097

builtin_mode_to_type[V2SImode][0] = V2SI_type_node;

59098

builtin_mode_to_type[V2SFmode][0] = V2SF_type_node;

59099

builtin_mode_to_type[V2DImode][0] = V2DI_type_node;

59100

@@ -11752,15 +13843,42 @@

59101

tdecl = add_builtin_type ("__vector double", V2DF_type_node);

59102

TYPE_NAME (V2DF_type_node) = tdecl;

59103

59104

- tdecl = add_builtin_type ("__vector long", V2DI_type_node);

59105

- TYPE_NAME (V2DI_type_node) = tdecl;

59106

+ if (TARGET_POWERPC64)

59107

+ {

59108

+ tdecl = add_builtin_type ("__vector long", V2DI_type_node);

59109

+ TYPE_NAME (V2DI_type_node) = tdecl;

59110

59111

- tdecl = add_builtin_type ("__vector unsigned long", unsigned_V2DI_type_node);

59112

- TYPE_NAME (unsigned_V2DI_type_node) = tdecl;

59113

+ tdecl = add_builtin_type ("__vector unsigned long",

59114

+ unsigned_V2DI_type_node);

59115

+ TYPE_NAME (unsigned_V2DI_type_node) = tdecl;

59116

59117

- tdecl = add_builtin_type ("__vector __bool long", bool_V2DI_type_node);

59118

- TYPE_NAME (bool_V2DI_type_node) = tdecl;

59119

+ tdecl = add_builtin_type ("__vector __bool long", bool_V2DI_type_node);

59120

+ TYPE_NAME (bool_V2DI_type_node) = tdecl;

59121

+ }

59122

+ else

59123

+ {

59124

+ tdecl = add_builtin_type ("__vector long long", V2DI_type_node);

59125

+ TYPE_NAME (V2DI_type_node) = tdecl;

59126

59127

+ tdecl = add_builtin_type ("__vector unsigned long long",

59128

+ unsigned_V2DI_type_node);

59129

+ TYPE_NAME (unsigned_V2DI_type_node) = tdecl;

59130

+

59131

+ tdecl = add_builtin_type ("__vector __bool long long",

59132

+ bool_V2DI_type_node);

59133

+ TYPE_NAME (bool_V2DI_type_node) = tdecl;

59134

+ }

59135

+

59136

+ if (V1TI_type_node)

59137

+ {

59138

+ tdecl = add_builtin_type ("__vector __int128", V1TI_type_node);

59139

+ TYPE_NAME (V1TI_type_node) = tdecl;

59140

+

59141

+ tdecl = add_builtin_type ("__vector unsigned __int128",

59142

+ unsigned_V1TI_type_node);

59143

+ TYPE_NAME (unsigned_V1TI_type_node) = tdecl;

59144

+ }

59145

+

59146

/* Paired and SPE builtins are only available if you build a compiler with

59147

the appropriate options, so only create those builtins with the

59148

appropriate compiler option. Create Altivec and VSX builtins on machines

59149

@@ -11772,6 +13890,9 @@

59150

spe_init_builtins ();

59151

if (TARGET_EXTRA_BUILTINS)

59152

altivec_init_builtins ();

59153

+ if (TARGET_HTM)

59154

+ htm_init_builtins ();

59155

+

59156

if (TARGET_EXTRA_BUILTINS || TARGET_SPE || TARGET_PAIRED_FLOAT)

59157

rs6000_common_init_builtins ();

59158

59159

@@ -12117,6 +14238,10 @@

59160

= build_function_type_list (integer_type_node,

59161

integer_type_node, V4SI_type_node,

59162

V4SI_type_node, NULL_TREE);

59163

+ tree int_ftype_int_v2di_v2di

59164

+ = build_function_type_list (integer_type_node,

59165

+ integer_type_node, V2DI_type_node,

59166

+ V2DI_type_node, NULL_TREE);

59167

tree void_ftype_v4si

59168

= build_function_type_list (void_type_node, V4SI_type_node, NULL_TREE);

59169

tree v8hi_ftype_void

59170

@@ -12199,6 +14324,8 @@

59171

= build_function_type_list (integer_type_node,

59172

integer_type_node, V2DF_type_node,

59173

V2DF_type_node, NULL_TREE);

59174

+ tree v2di_ftype_v2di

59175

+ = build_function_type_list (V2DI_type_node, V2DI_type_node, NULL_TREE);

59176

tree v4si_ftype_v4si

59177

= build_function_type_list (V4SI_type_node, V4SI_type_node, NULL_TREE);

59178

tree v8hi_ftype_v8hi

59179

@@ -12224,10 +14351,58 @@

59180

def_builtin ("__builtin_altivec_lvehx", v8hi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVEHX);

59181

def_builtin ("__builtin_altivec_lvewx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVEWX);

59182

def_builtin ("__builtin_altivec_lvxl", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVXL);

59183

+ def_builtin ("__builtin_altivec_lvxl_v2df", v2df_ftype_long_pcvoid,

59184

+ ALTIVEC_BUILTIN_LVXL_V2DF);

59185

+ def_builtin ("__builtin_altivec_lvxl_v2di", v2di_ftype_long_pcvoid,

59186

+ ALTIVEC_BUILTIN_LVXL_V2DI);

59187

+ def_builtin ("__builtin_altivec_lvxl_v4sf", v4sf_ftype_long_pcvoid,

59188

+ ALTIVEC_BUILTIN_LVXL_V4SF);

59189

+ def_builtin ("__builtin_altivec_lvxl_v4si", v4si_ftype_long_pcvoid,

59190

+ ALTIVEC_BUILTIN_LVXL_V4SI);

59191

+ def_builtin ("__builtin_altivec_lvxl_v8hi", v8hi_ftype_long_pcvoid,

59192

+ ALTIVEC_BUILTIN_LVXL_V8HI);

59193

+ def_builtin ("__builtin_altivec_lvxl_v16qi", v16qi_ftype_long_pcvoid,

59194

+ ALTIVEC_BUILTIN_LVXL_V16QI);

59195

def_builtin ("__builtin_altivec_lvx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVX);

59196

+ def_builtin ("__builtin_altivec_lvx_v2df", v2df_ftype_long_pcvoid,

59197

+ ALTIVEC_BUILTIN_LVX_V2DF);

59198

+ def_builtin ("__builtin_altivec_lvx_v2di", v2di_ftype_long_pcvoid,

59199

+ ALTIVEC_BUILTIN_LVX_V2DI);

59200

+ def_builtin ("__builtin_altivec_lvx_v4sf", v4sf_ftype_long_pcvoid,

59201

+ ALTIVEC_BUILTIN_LVX_V4SF);

59202

+ def_builtin ("__builtin_altivec_lvx_v4si", v4si_ftype_long_pcvoid,

59203

+ ALTIVEC_BUILTIN_LVX_V4SI);

59204

+ def_builtin ("__builtin_altivec_lvx_v8hi", v8hi_ftype_long_pcvoid,

59205

+ ALTIVEC_BUILTIN_LVX_V8HI);

59206

+ def_builtin ("__builtin_altivec_lvx_v16qi", v16qi_ftype_long_pcvoid,

59207

+ ALTIVEC_BUILTIN_LVX_V16QI);

59208

def_builtin ("__builtin_altivec_stvx", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVX);

59209

+ def_builtin ("__builtin_altivec_stvx_v2df", void_ftype_v2df_long_pvoid,

59210

+ ALTIVEC_BUILTIN_STVX_V2DF);

59211

+ def_builtin ("__builtin_altivec_stvx_v2di", void_ftype_v2di_long_pvoid,

59212

+ ALTIVEC_BUILTIN_STVX_V2DI);

59213

+ def_builtin ("__builtin_altivec_stvx_v4sf", void_ftype_v4sf_long_pvoid,

59214

+ ALTIVEC_BUILTIN_STVX_V4SF);

59215

+ def_builtin ("__builtin_altivec_stvx_v4si", void_ftype_v4si_long_pvoid,

59216

+ ALTIVEC_BUILTIN_STVX_V4SI);

59217

+ def_builtin ("__builtin_altivec_stvx_v8hi", void_ftype_v8hi_long_pvoid,

59218

+ ALTIVEC_BUILTIN_STVX_V8HI);

59219

+ def_builtin ("__builtin_altivec_stvx_v16qi", void_ftype_v16qi_long_pvoid,

59220

+ ALTIVEC_BUILTIN_STVX_V16QI);

59221

def_builtin ("__builtin_altivec_stvewx", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVEWX);

59222

def_builtin ("__builtin_altivec_stvxl", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVXL);

59223

+ def_builtin ("__builtin_altivec_stvxl_v2df", void_ftype_v2df_long_pvoid,

59224

+ ALTIVEC_BUILTIN_STVXL_V2DF);

59225

+ def_builtin ("__builtin_altivec_stvxl_v2di", void_ftype_v2di_long_pvoid,

59226

+ ALTIVEC_BUILTIN_STVXL_V2DI);

59227

+ def_builtin ("__builtin_altivec_stvxl_v4sf", void_ftype_v4sf_long_pvoid,

59228

+ ALTIVEC_BUILTIN_STVXL_V4SF);

59229

+ def_builtin ("__builtin_altivec_stvxl_v4si", void_ftype_v4si_long_pvoid,

59230

+ ALTIVEC_BUILTIN_STVXL_V4SI);

59231

+ def_builtin ("__builtin_altivec_stvxl_v8hi", void_ftype_v8hi_long_pvoid,

59232

+ ALTIVEC_BUILTIN_STVXL_V8HI);

59233

+ def_builtin ("__builtin_altivec_stvxl_v16qi", void_ftype_v16qi_long_pvoid,

59234

+ ALTIVEC_BUILTIN_STVXL_V16QI);

59235

def_builtin ("__builtin_altivec_stvebx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVEBX);

59236

def_builtin ("__builtin_altivec_stvehx", void_ftype_v8hi_long_pvoid, ALTIVEC_BUILTIN_STVEHX);

59237

def_builtin ("__builtin_vec_ld", opaque_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LD);

59238

@@ -12334,6 +14509,9 @@

59239

case VOIDmode:

59240

type = int_ftype_int_opaque_opaque;

59241

break;

59242

+ case V2DImode:

59243

+ type = int_ftype_int_v2di_v2di;

59244

+ break;

59245

case V4SImode:

59246

type = int_ftype_int_v4si_v4si;

59247

break;

59248

@@ -12367,6 +14545,9 @@

59249

59250

switch (mode0)

59251

{

59252

+ case V2DImode:

59253

+ type = v2di_ftype_v2di;

59254

+ break;

59255

case V4SImode:

59256

type = v4si_ftype_v4si;

59257

break;

59258

@@ -12497,8 +14678,109 @@

59259

ftype = build_function_type_list (intDI_type_node, V2DI_type_node,

59260

integer_type_node, NULL_TREE);

59261

def_builtin ("__builtin_vec_ext_v2di", ftype, VSX_BUILTIN_VEC_EXT_V2DI);

59262

+

59263

+

59264

+ if (V1TI_type_node)

59265

+ {

59266

+ tree v1ti_ftype_long_pcvoid

59267

+ = build_function_type_list (V1TI_type_node,

59268

+ long_integer_type_node, pcvoid_type_node,

59269

+ NULL_TREE);

59270

+ tree void_ftype_v1ti_long_pvoid

59271

+ = build_function_type_list (void_type_node,

59272

+ V1TI_type_node, long_integer_type_node,

59273

+ pvoid_type_node, NULL_TREE);

59274

+ def_builtin ("__builtin_vsx_lxvd2x_v1ti", v1ti_ftype_long_pcvoid,

59275

+ VSX_BUILTIN_LXVD2X_V1TI);

59276

+ def_builtin ("__builtin_vsx_stxvd2x_v1ti", void_ftype_v1ti_long_pvoid,

59277

+ VSX_BUILTIN_STXVD2X_V1TI);

59278

+ ftype = build_function_type_list (V1TI_type_node, intTI_type_node,

59279

+ NULL_TREE, NULL_TREE);

59280

+ def_builtin ("__builtin_vec_init_v1ti", ftype, VSX_BUILTIN_VEC_INIT_V1TI);

59281

+ ftype = build_function_type_list (V1TI_type_node, V1TI_type_node,

59282

+ intTI_type_node,

59283

+ integer_type_node, NULL_TREE);

59284

+ def_builtin ("__builtin_vec_set_v1ti", ftype, VSX_BUILTIN_VEC_SET_V1TI);

59285

+ ftype = build_function_type_list (intTI_type_node, V1TI_type_node,

59286

+ integer_type_node, NULL_TREE);

59287

+ def_builtin ("__builtin_vec_ext_v1ti", ftype, VSX_BUILTIN_VEC_EXT_V1TI);

59288

+ }

59289

+

59290

}

59291

59292

+static void

59293

+htm_init_builtins (void)

59294

+{

59295

+ HOST_WIDE_INT builtin_mask = rs6000_builtin_mask;

59296

+ const struct builtin_description *d;

59297

+ size_t i;

59298

+

59299

+ d = bdesc_htm;

59300

+ for (i = 0; i < ARRAY_SIZE (bdesc_htm); i++, d++)

59301

+ {

59302

+ tree op[MAX_HTM_OPERANDS], type;

59303

+ HOST_WIDE_INT mask = d->mask;

59304

+ unsigned attr = rs6000_builtin_info[d->code].attr;

59305

+ bool void_func = (attr & RS6000_BTC_VOID);

59306

+ int attr_args = (attr & RS6000_BTC_TYPE_MASK);

59307

+ int nopnds = 0;

59308

+ tree argtype = (attr & RS6000_BTC_SPR) ? long_unsigned_type_node

59309

+ : unsigned_type_node;

59310

+

59311

+ if ((mask & builtin_mask) != mask)

59312

+ {

59313

+ if (TARGET_DEBUG_BUILTIN)

59314

+ fprintf (stderr, "htm_builtin, skip binary %s\n", d->name);

59315

+ continue;

59316

+ }

59317

+

59318

+ if (d->name == 0)

59319

+ {

59320

+ if (TARGET_DEBUG_BUILTIN)

59321

+ fprintf (stderr, "htm_builtin, bdesc_htm[%ld] no name\n",

59322

+ (long unsigned) i);

59323

+ continue;

59324

+ }

59325

+

59326

+ op[nopnds++] = (void_func) ? void_type_node : argtype;

59327

+

59328

+ if (attr_args == RS6000_BTC_UNARY)

59329

+ op[nopnds++] = argtype;

59330

+ else if (attr_args == RS6000_BTC_BINARY)

59331

+ {

59332

+ op[nopnds++] = argtype;

59333

+ op[nopnds++] = argtype;

59334

+ }

59335

+ else if (attr_args == RS6000_BTC_TERNARY)

59336

+ {

59337

+ op[nopnds++] = argtype;

59338

+ op[nopnds++] = argtype;

59339

+ op[nopnds++] = argtype;

59340

+ }

59341

+

59342

+ switch (nopnds)

59343

+ {

59344

+ case 1:

59345

+ type = build_function_type_list (op[0], NULL_TREE);

59346

+ break;

59347

+ case 2:

59348

+ type = build_function_type_list (op[0], op[1], NULL_TREE);

59349

+ break;

59350

+ case 3:

59351

+ type = build_function_type_list (op[0], op[1], op[2], NULL_TREE);

59352

+ break;

59353

+ case 4:

59354

+ type = build_function_type_list (op[0], op[1], op[2], op[3],

59355

+ NULL_TREE);

59356

+ break;

59357

+ default:

59358

+ gcc_unreachable ();

59359

+ }

59360

+

59361

+ def_builtin (d->name, type, d->code);

59362

+ }

59363

+}

59364

+

59365

/* Hash function for builtin functions with up to 3 arguments and a return

59366

type. */

59367

static unsigned

59368

@@ -12572,11 +14854,27 @@

59369

are type correct. */

59370

switch (builtin)

59371

{

59372

+ /* unsigned 1 argument functions. */

59373

+ case CRYPTO_BUILTIN_VSBOX:

59374

+ case P8V_BUILTIN_VGBBD:

59375

+ h.uns_p[0] = 1;

59376

+ h.uns_p[1] = 1;

59377

+ break;

59378

+

59379

/* unsigned 2 argument functions. */

59380

case ALTIVEC_BUILTIN_VMULEUB_UNS:

59381

case ALTIVEC_BUILTIN_VMULEUH_UNS:

59382

case ALTIVEC_BUILTIN_VMULOUB_UNS:

59383

case ALTIVEC_BUILTIN_VMULOUH_UNS:

59384

+ case CRYPTO_BUILTIN_VCIPHER:

59385

+ case CRYPTO_BUILTIN_VCIPHERLAST:

59386

+ case CRYPTO_BUILTIN_VNCIPHER:

59387

+ case CRYPTO_BUILTIN_VNCIPHERLAST:

59388

+ case CRYPTO_BUILTIN_VPMSUMB:

59389

+ case CRYPTO_BUILTIN_VPMSUMH:

59390

+ case CRYPTO_BUILTIN_VPMSUMW:

59391

+ case CRYPTO_BUILTIN_VPMSUMD:

59392

+ case CRYPTO_BUILTIN_VPMSUM:

59393

h.uns_p[0] = 1;

59394

h.uns_p[1] = 1;

59395

h.uns_p[2] = 1;

59396

@@ -12599,6 +14897,14 @@

59397

case VSX_BUILTIN_XXSEL_8HI_UNS:

59398

case VSX_BUILTIN_XXSEL_4SI_UNS:

59399

case VSX_BUILTIN_XXSEL_2DI_UNS:

59400

+ case CRYPTO_BUILTIN_VPERMXOR:

59401

+ case CRYPTO_BUILTIN_VPERMXOR_V2DI:

59402

+ case CRYPTO_BUILTIN_VPERMXOR_V4SI:

59403

+ case CRYPTO_BUILTIN_VPERMXOR_V8HI:

59404

+ case CRYPTO_BUILTIN_VPERMXOR_V16QI:

59405

+ case CRYPTO_BUILTIN_VSHASIGMAW:

59406

+ case CRYPTO_BUILTIN_VSHASIGMAD:

59407

+ case CRYPTO_BUILTIN_VSHASIGMA:

59408

h.uns_p[0] = 1;

59409

h.uns_p[1] = 1;

59410

h.uns_p[2] = 1;

59411

@@ -12740,9 +15046,24 @@

59412

else

59413

{

59414

enum insn_code icode = d->icode;

59415

- if (d->name == 0 || icode == CODE_FOR_nothing)

59416

- continue;

59417

+ if (d->name == 0)

59418

+ {

59419

+ if (TARGET_DEBUG_BUILTIN)

59420

+ fprintf (stderr, "rs6000_builtin, bdesc_3arg[%ld] no name\n",

59421

+ (long unsigned)i);

59422

59423

+ continue;

59424

+ }

59425

+

59426

+ if (icode == CODE_FOR_nothing)

59427

+ {

59428

+ if (TARGET_DEBUG_BUILTIN)

59429

+ fprintf (stderr, "rs6000_builtin, skip ternary %s (no code)\n",

59430

+ d->name);

59431

+

59432

+ continue;

59433

+ }

59434

+

59435

type = builtin_function_type (insn_data[icode].operand[0].mode,

59436

insn_data[icode].operand[1].mode,

59437

insn_data[icode].operand[2].mode,

59438

@@ -12780,9 +15101,24 @@

59439

else

59440

{

59441

enum insn_code icode = d->icode;

59442

- if (d->name == 0 || icode == CODE_FOR_nothing)

59443

- continue;

59444

+ if (d->name == 0)

59445

+ {

59446

+ if (TARGET_DEBUG_BUILTIN)

59447

+ fprintf (stderr, "rs6000_builtin, bdesc_2arg[%ld] no name\n",

59448

+ (long unsigned)i);

59449

59450

+ continue;

59451

+ }

59452

+

59453

+ if (icode == CODE_FOR_nothing)

59454

+ {

59455

+ if (TARGET_DEBUG_BUILTIN)

59456

+ fprintf (stderr, "rs6000_builtin, skip binary %s (no code)\n",

59457

+ d->name);

59458

+

59459

+ continue;

59460

+ }

59461

+

59462

mode0 = insn_data[icode].operand[0].mode;

59463

mode1 = insn_data[icode].operand[1].mode;

59464

mode2 = insn_data[icode].operand[2].mode;

59465

@@ -12842,9 +15178,24 @@

59466

else

59467

{

59468

enum insn_code icode = d->icode;

59469

- if (d->name == 0 || icode == CODE_FOR_nothing)

59470

- continue;

59471

+ if (d->name == 0)

59472

+ {

59473

+ if (TARGET_DEBUG_BUILTIN)

59474

+ fprintf (stderr, "rs6000_builtin, bdesc_1arg[%ld] no name\n",

59475

+ (long unsigned)i);

59476

59477

+ continue;

59478

+ }

59479

+

59480

+ if (icode == CODE_FOR_nothing)

59481

+ {

59482

+ if (TARGET_DEBUG_BUILTIN)

59483

+ fprintf (stderr, "rs6000_builtin, skip unary %s (no code)\n",

59484

+ d->name);

59485

+

59486

+ continue;

59487

+ }

59488

+

59489

mode0 = insn_data[icode].operand[0].mode;

59490

mode1 = insn_data[icode].operand[1].mode;

59491

59492

@@ -13631,7 +15982,7 @@

59493

static bool eliminated = false;

59494

rtx ret;

59495

59496

- if (mode != SDmode)

59497

+ if (mode != SDmode || TARGET_NO_SDMODE_STACK)

59498

ret = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);

59499

else

59500

{

59501

@@ -13660,6 +16011,17 @@

59502

return ret;

59503

}

59504

59505

+/* Return the mode to be used for memory when a secondary memory

59506

+ location is needed. For SDmode values we need to use DDmode, in

59507

+ all other cases we can use the same mode. */

59508

+enum machine_mode

59509

+rs6000_secondary_memory_needed_mode (enum machine_mode mode)

59510

+{

59511

+ if (mode == SDmode)

59512

+ return DDmode;

59513

+ return mode;

59514

+}

59515

+

59516

static tree

59517

rs6000_check_sdmode (tree *tp, int *walk_subtrees, void *data ATTRIBUTE_UNUSED)

59518

{

59519

@@ -13690,31 +16052,228 @@

59520

return NULL_TREE;

59521

}

59522

59523

-enum reload_reg_type {

59524

- GPR_REGISTER_TYPE,

59525

- VECTOR_REGISTER_TYPE,

59526

- OTHER_REGISTER_TYPE

59527

-};

59528

+/* Classify a register type. Because the FMRGOW/FMRGEW instructions only work

59529

+ on traditional floating point registers, and the VMRGOW/VMRGEW instructions

59530

+ only work on the traditional altivec registers, note if an altivec register

59531

+ was chosen. */

59532

59533

-static enum reload_reg_type

59534

-rs6000_reload_register_type (enum reg_class rclass)

59535

+static enum rs6000_reg_type

59536

+register_to_reg_type (rtx reg, bool *is_altivec)

59537

{

59538

- switch (rclass)

59539

+ HOST_WIDE_INT regno;

59540

+ enum reg_class rclass;

59541

+

59542

+ if (GET_CODE (reg) == SUBREG)

59543

+ reg = SUBREG_REG (reg);

59544

+

59545

+ if (!REG_P (reg))

59546

+ return NO_REG_TYPE;

59547

+

59548

+ regno = REGNO (reg);

59549

+ if (regno >= FIRST_PSEUDO_REGISTER)

59550

{

59551

- case GENERAL_REGS:

59552

- case BASE_REGS:

59553

- return GPR_REGISTER_TYPE;

59554

+ if (!lra_in_progress && !reload_in_progress && !reload_completed)

59555

+ return PSEUDO_REG_TYPE;

59556

59557

- case FLOAT_REGS:

59558

- case ALTIVEC_REGS:

59559

- case VSX_REGS:

59560

- return VECTOR_REGISTER_TYPE;

59561

+ regno = true_regnum (reg);

59562

+ if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)

59563

+ return PSEUDO_REG_TYPE;

59564

+ }

59565

59566

- default:

59567

- return OTHER_REGISTER_TYPE;

59568

+ gcc_assert (regno >= 0);

59569

+

59570

+ if (is_altivec && ALTIVEC_REGNO_P (regno))

59571

+ *is_altivec = true;

59572

+

59573

+ rclass = rs6000_regno_regclass[regno];

59574

+ return reg_class_to_reg_type[(int)rclass];

59575

+}

59576

+

59577

+/* Helper function for rs6000_secondary_reload to return true if a move to a

59578

+ different register classe is really a simple move. */

59579

+

59580

+static bool

59581

+rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type,

59582

+ enum rs6000_reg_type from_type,

59583

+ enum machine_mode mode)

59584

+{

59585

+ int size;

59586

+

59587

+ /* Add support for various direct moves available. In this function, we only

59588

+ look at cases where we don't need any extra registers, and one or more

59589

+ simple move insns are issued. At present, 32-bit integers are not allowed

59590

+ in FPR/VSX registers. Single precision binary floating is not a simple

59591

+ move because we need to convert to the single precision memory layout.

59592

+ The 4-byte SDmode can be moved. */

59593

+ size = GET_MODE_SIZE (mode);

59594

+ if (TARGET_DIRECT_MOVE

59595

+ && ((mode == SDmode) || (TARGET_POWERPC64 && size == 8))

59596

+ && ((to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

59597

+ || (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)))

59598

+ return true;

59599

+

59600

+ else if (TARGET_MFPGPR && TARGET_POWERPC64 && size == 8

59601

+ && ((to_type == GPR_REG_TYPE && from_type == FPR_REG_TYPE)

59602

+ || (to_type == FPR_REG_TYPE && from_type == GPR_REG_TYPE)))

59603

+ return true;

59604

+

59605

+ else if ((size == 4 || (TARGET_POWERPC64 && size == 8))

59606

+ && ((to_type == GPR_REG_TYPE && from_type == SPR_REG_TYPE)

59607

+ || (to_type == SPR_REG_TYPE && from_type == GPR_REG_TYPE)))

59608

+ return true;

59609

+

59610

+ return false;

59611

+}

59612

+

59613

+/* Power8 helper function for rs6000_secondary_reload, handle all of the

59614

+ special direct moves that involve allocating an extra register, return the

59615

+ insn code of the helper function if there is such a function or

59616

+ CODE_FOR_nothing if not. */

59617

+

59618

+static bool

59619

+rs6000_secondary_reload_direct_move (enum rs6000_reg_type to_type,

59620

+ enum rs6000_reg_type from_type,

59621

+ enum machine_mode mode,

59622

+ secondary_reload_info *sri,

59623

+ bool altivec_p)

59624

+{

59625

+ bool ret = false;

59626

+ enum insn_code icode = CODE_FOR_nothing;

59627

+ int cost = 0;

59628

+ int size = GET_MODE_SIZE (mode);

59629

+

59630

+ if (TARGET_POWERPC64)

59631

+ {

59632

+ if (size == 16)

59633

+ {

59634

+ /* Handle moving 128-bit values from GPRs to VSX point registers on

59635

+ power8 when running in 64-bit mode using XXPERMDI to glue the two

59636

+ 64-bit values back together. */

59637

+ if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)

59638

+ {

59639

+ cost = 3; /* 2 mtvsrd's, 1 xxpermdi. */

59640

+ icode = reg_addr[mode].reload_vsx_gpr;

59641

+ }

59642

+

59643

+ /* Handle moving 128-bit values from VSX point registers to GPRs on

59644

+ power8 when running in 64-bit mode using XXPERMDI to get access to the

59645

+ bottom 64-bit value. */

59646

+ else if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

59647

+ {

59648

+ cost = 3; /* 2 mfvsrd's, 1 xxpermdi. */

59649

+ icode = reg_addr[mode].reload_gpr_vsx;

59650

+ }

59651

+ }

59652

+

59653

+ else if (mode == SFmode)

59654

+ {

59655

+ if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

59656

+ {

59657

+ cost = 3; /* xscvdpspn, mfvsrd, and. */

59658

+ icode = reg_addr[mode].reload_gpr_vsx;

59659

+ }

59660

+

59661

+ else if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)

59662

+ {

59663

+ cost = 2; /* mtvsrz, xscvspdpn. */

59664

+ icode = reg_addr[mode].reload_vsx_gpr;

59665

+ }

59666

+ }

59667

}

59668

+

59669

+ if (TARGET_POWERPC64 && size == 16)

59670

+ {

59671

+ /* Handle moving 128-bit values from GPRs to VSX point registers on

59672

+ power8 when running in 64-bit mode using XXPERMDI to glue the two

59673

+ 64-bit values back together. */

59674

+ if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)

59675

+ {

59676

+ cost = 3; /* 2 mtvsrd's, 1 xxpermdi. */

59677

+ icode = reg_addr[mode].reload_vsx_gpr;

59678

+ }

59679

+

59680

+ /* Handle moving 128-bit values from VSX point registers to GPRs on

59681

+ power8 when running in 64-bit mode using XXPERMDI to get access to the

59682

+ bottom 64-bit value. */

59683

+ else if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

59684

+ {

59685

+ cost = 3; /* 2 mfvsrd's, 1 xxpermdi. */

59686

+ icode = reg_addr[mode].reload_gpr_vsx;

59687

+ }

59688

+ }

59689

+

59690

+ else if (!TARGET_POWERPC64 && size == 8)

59691

+ {

59692

+ /* Handle moving 64-bit values from GPRs to floating point registers on

59693

+ power8 when running in 32-bit mode using FMRGOW to glue the two 32-bit

59694

+ values back together. Altivec register classes must be handled

59695

+ specially since a different instruction is used, and the secondary

59696

+ reload support requires a single instruction class in the scratch

59697

+ register constraint. However, right now TFmode is not allowed in

59698

+ Altivec registers, so the pattern will never match. */

59699

+ if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE && !altivec_p)

59700

+ {

59701

+ cost = 3; /* 2 mtvsrwz's, 1 fmrgow. */

59702

+ icode = reg_addr[mode].reload_fpr_gpr;

59703

+ }

59704

+ }

59705

+

59706

+ if (icode != CODE_FOR_nothing)

59707

+ {

59708

+ ret = true;

59709

+ if (sri)

59710

+ {

59711

+ sri->icode = icode;

59712

+ sri->extra_cost = cost;

59713

+ }

59714

+ }

59715

+

59716

+ return ret;

59717

}

59718

59719

+/* Return whether a move between two register classes can be done either

59720

+ directly (simple move) or via a pattern that uses a single extra temporary

59721

+ (using power8's direct move in this case. */

59722

+

59723

+static bool

59724

+rs6000_secondary_reload_move (enum rs6000_reg_type to_type,

59725

+ enum rs6000_reg_type from_type,

59726

+ enum machine_mode mode,

59727

+ secondary_reload_info *sri,

59728

+ bool altivec_p)

59729

+{

59730

+ /* Fall back to load/store reloads if either type is not a register. */

59731

+ if (to_type == NO_REG_TYPE || from_type == NO_REG_TYPE)

59732

+ return false;

59733

+

59734

+ /* If we haven't allocated registers yet, assume the move can be done for the

59735

+ standard register types. */

59736

+ if ((to_type == PSEUDO_REG_TYPE && from_type == PSEUDO_REG_TYPE)

59737

+ || (to_type == PSEUDO_REG_TYPE && IS_STD_REG_TYPE (from_type))

59738

+ || (from_type == PSEUDO_REG_TYPE && IS_STD_REG_TYPE (to_type)))

59739

+ return true;

59740

+

59741

+ /* Moves to the same set of registers is a simple move for non-specialized

59742

+ registers. */

59743

+ if (to_type == from_type && IS_STD_REG_TYPE (to_type))

59744

+ return true;

59745

+

59746

+ /* Check whether a simple move can be done directly. */

59747

+ if (rs6000_secondary_reload_simple_move (to_type, from_type, mode))

59748

+ {

59749

+ if (sri)

59750

+ {

59751

+ sri->icode = CODE_FOR_nothing;

59752

+ sri->extra_cost = 0;

59753

+ }

59754

+ return true;

59755

+ }

59756

+

59757

+ /* Now check if we can do it in a few steps. */

59758

+ return rs6000_secondary_reload_direct_move (to_type, from_type, mode, sri,

59759

+ altivec_p);

59760

+}

59761

+

59762

/* Inform reload about cases where moving X with a mode MODE to a register in

59763

RCLASS requires an extra scratch or immediate register. Return the class

59764

needed for the immediate register.

59765

@@ -13738,12 +16297,36 @@

59766

bool default_p = false;

59767

59768

sri->icode = CODE_FOR_nothing;

59769

+ icode = ((in_p)

59770

+ ? reg_addr[mode].reload_load

59771

+ : reg_addr[mode].reload_store);

59772

59773

- /* Convert vector loads and stores into gprs to use an additional base

59774

- register. */

59775

- icode = rs6000_vector_reload[mode][in_p != false];

59776

- if (icode != CODE_FOR_nothing)

59777

+ if (REG_P (x) || register_operand (x, mode))

59778

{

59779

+ enum rs6000_reg_type to_type = reg_class_to_reg_type[(int)rclass];

59780

+ bool altivec_p = (rclass == ALTIVEC_REGS);

59781

+ enum rs6000_reg_type from_type = register_to_reg_type (x, &altivec_p);

59782

+

59783

+ if (!in_p)

59784

+ {

59785

+ enum rs6000_reg_type exchange = to_type;

59786

+ to_type = from_type;

59787

+ from_type = exchange;

59788

+ }

59789

+

59790

+ /* Can we do a direct move of some sort? */

59791

+ if (rs6000_secondary_reload_move (to_type, from_type, mode, sri,

59792

+ altivec_p))

59793

+ {

59794

+ icode = (enum insn_code)sri->icode;

59795

+ default_p = false;

59796

+ ret = NO_REGS;

59797

+ }

59798

+ }

59799

+

59800

+ /* Handle vector moves with reload helper functions. */

59801

+ if (ret == ALL_REGS && icode != CODE_FOR_nothing)

59802

+ {

59803

ret = NO_REGS;

59804

sri->icode = CODE_FOR_nothing;

59805

sri->extra_cost = 0;

59806

@@ -13754,14 +16337,23 @@

59807

59808

/* Loads to and stores from gprs can do reg+offset, and wouldn't need

59809

an extra register in that case, but it would need an extra

59810

- register if the addressing is reg+reg or (reg+reg)&(-16). */

59811

+ register if the addressing is reg+reg or (reg+reg)&(-16). Special

59812

+ case load/store quad. */

59813

if (rclass == GENERAL_REGS || rclass == BASE_REGS)

59814

{

59815

- if (!legitimate_indirect_address_p (addr, false)

59816

- && !rs6000_legitimate_offset_address_p (TImode, addr,

59817

- false, true))

59818

+ if (TARGET_POWERPC64 && TARGET_QUAD_MEMORY

59819

+ && GET_MODE_SIZE (mode) == 16

59820

+ && quad_memory_operand (x, mode))

59821

{

59822

sri->icode = icode;

59823

+ sri->extra_cost = 2;

59824

+ }

59825

+

59826

+ else if (!legitimate_indirect_address_p (addr, false)

59827

+ && !rs6000_legitimate_offset_address_p (PTImode, addr,

59828

+ false, true))

59829

+ {

59830

+ sri->icode = icode;

59831

/* account for splitting the loads, and converting the

59832

address from reg+reg to reg. */

59833

sri->extra_cost = (((TARGET_64BIT) ? 3 : 5)

59834

@@ -13768,8 +16360,20 @@

59835

+ ((GET_CODE (addr) == AND) ? 1 : 0));

59836

}

59837

}

59838

- /* Loads to and stores from vector registers can only do reg+reg

59839

- addressing. Altivec registers can also do (reg+reg)&(-16). */

59840

+ /* Allow scalar loads to/from the traditional floating point

59841

+ registers, even if VSX memory is set. */

59842

+ else if ((rclass == FLOAT_REGS || rclass == NO_REGS)

59843

+ && (GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8)

59844

+ && (legitimate_indirect_address_p (addr, false)

59845

+ || legitimate_indirect_address_p (addr, false)

59846

+ || rs6000_legitimate_offset_address_p (mode, addr,

59847

+ false, true)))

59848

+

59849

+ ;

59850

+ /* Loads to and stores from vector registers can only do reg+reg

59851

+ addressing. Altivec registers can also do (reg+reg)&(-16). Allow

59852

+ scalar modes loading up the traditional floating point registers

59853

+ to use offset addresses. */

59854

else if (rclass == VSX_REGS || rclass == ALTIVEC_REGS

59855

|| rclass == FLOAT_REGS || rclass == NO_REGS)

59856

{

59857

@@ -13813,12 +16417,12 @@

59858

else

59859

{

59860

enum reg_class xclass = REGNO_REG_CLASS (regno);

59861

- enum reload_reg_type rtype1 = rs6000_reload_register_type (rclass);

59862

- enum reload_reg_type rtype2 = rs6000_reload_register_type (xclass);

59863

+ enum rs6000_reg_type rtype1 = reg_class_to_reg_type[(int)rclass];

59864

+ enum rs6000_reg_type rtype2 = reg_class_to_reg_type[(int)xclass];

59865

59866

/* If memory is needed, use default_secondary_reload to create the

59867

stack slot. */

59868

- if (rtype1 != rtype2 || rtype1 == OTHER_REGISTER_TYPE)

59869

+ if (rtype1 != rtype2 || !IS_STD_REG_TYPE (rtype1))

59870

default_p = true;

59871

else

59872

ret = NO_REGS;

59873

@@ -13828,7 +16432,7 @@

59874

default_p = true;

59875

}

59876

else if (TARGET_POWERPC64

59877

- && rs6000_reload_register_type (rclass) == GPR_REGISTER_TYPE

59878

+ && reg_class_to_reg_type[(int)rclass] == GPR_REG_TYPE

59879

&& MEM_P (x)

59880

&& GET_MODE_SIZE (GET_MODE (x)) >= UNITS_PER_WORD)

59881

{

59882

@@ -13867,7 +16471,7 @@

59883

default_p = true;

59884

}

59885

else if (!TARGET_POWERPC64

59886

- && rs6000_reload_register_type (rclass) == GPR_REGISTER_TYPE

59887

+ && reg_class_to_reg_type[(int)rclass] == GPR_REG_TYPE

59888

&& MEM_P (x)

59889

&& GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)

59890

{

59891

@@ -13945,6 +16549,36 @@

59892

return ret;

59893

}

59894

59895

+/* Better tracing for rs6000_secondary_reload_inner. */

59896

+

59897

+static void

59898

+rs6000_secondary_reload_trace (int line, rtx reg, rtx mem, rtx scratch,

59899

+ bool store_p)

59900

+{

59901

+ rtx set, clobber;

59902

+

59903

+ gcc_assert (reg != NULL_RTX && mem != NULL_RTX && scratch != NULL_RTX);

59904

+

59905

+ fprintf (stderr, "rs6000_secondary_reload_inner:%d, type = %s\n", line,

59906

+ store_p ? "store" : "load");

59907

+

59908

+ if (store_p)

59909

+ set = gen_rtx_SET (VOIDmode, mem, reg);

59910

+ else

59911

+ set = gen_rtx_SET (VOIDmode, reg, mem);

59912

+

59913

+ clobber = gen_rtx_CLOBBER (VOIDmode, scratch);

59914

+ debug_rtx (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber)));

59915

+}

59916

+

59917

+static void

59918

+rs6000_secondary_reload_fail (int line, rtx reg, rtx mem, rtx scratch,

59919

+ bool store_p)

59920

+{

59921

+ rs6000_secondary_reload_trace (line, reg, mem, scratch, store_p);

59922

+ gcc_unreachable ();

59923

+}

59924

+

59925

/* Fixup reload addresses for Altivec or VSX loads/stores to change SP+offset

59926

to SP+reg addressing. */

59927

59928

@@ -13963,21 +16597,16 @@

59929

rtx cc_clobber;

59930

59931

if (TARGET_DEBUG_ADDR)

59932

- {

59933

- fprintf (stderr, "\nrs6000_secondary_reload_inner, type = %s\n",

59934

- store_p ? "store" : "load");

59935

- fprintf (stderr, "reg:\n");

59936

- debug_rtx (reg);

59937

- fprintf (stderr, "mem:\n");

59938

- debug_rtx (mem);

59939

- fprintf (stderr, "scratch:\n");

59940

- debug_rtx (scratch);

59941

- }

59942

+ rs6000_secondary_reload_trace (__LINE__, reg, mem, scratch, store_p);

59943

59944

- gcc_assert (regno >= 0 && regno < FIRST_PSEUDO_REGISTER);

59945

- gcc_assert (GET_CODE (mem) == MEM);

59946

+ if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)

59947

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

59948

+

59949

+ if (GET_CODE (mem) != MEM)

59950

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

59951

+

59952

rclass = REGNO_REG_CLASS (regno);

59953

- addr = XEXP (mem, 0);

59954

+ addr = find_replacement (&XEXP (mem, 0));

59955

59956

switch (rclass)

59957

{

59958

@@ -13988,25 +16617,31 @@

59959

if (GET_CODE (addr) == AND)

59960

{

59961

and_op2 = XEXP (addr, 1);

59962

- addr = XEXP (addr, 0);

59963

+ addr = find_replacement (&XEXP (addr, 0));

59964

}

59965

59966

if (GET_CODE (addr) == PRE_MODIFY)

59967

{

59968

- scratch_or_premodify = XEXP (addr, 0);

59969

- gcc_assert (REG_P (scratch_or_premodify));

59970

- gcc_assert (GET_CODE (XEXP (addr, 1)) == PLUS);

59971

- addr = XEXP (addr, 1);

59972

+ scratch_or_premodify = find_replacement (&XEXP (addr, 0));

59973

+ if (!REG_P (scratch_or_premodify))

59974

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

59975

+

59976

+ addr = find_replacement (&XEXP (addr, 1));

59977

+ if (GET_CODE (addr) != PLUS)

59978

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

59979

}

59980

59981

if (GET_CODE (addr) == PLUS

59982

&& (and_op2 != NULL_RTX

59983

- || !rs6000_legitimate_offset_address_p (TImode, addr,

59984

+ || !rs6000_legitimate_offset_address_p (PTImode, addr,

59985

false, true)))

59986

{

59987

+ /* find_replacement already recurses into both operands of

59988

+ PLUS so we don't need to call it here. */

59989

addr_op1 = XEXP (addr, 0);

59990

addr_op2 = XEXP (addr, 1);

59991

- gcc_assert (legitimate_indirect_address_p (addr_op1, false));

59992

+ if (!legitimate_indirect_address_p (addr_op1, false))

59993

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

59994

59995

if (!REG_P (addr_op2)

59996

&& (GET_CODE (addr_op2) != CONST_INT

59997

@@ -14034,7 +16669,7 @@

59998

scratch_or_premodify = scratch;

59999

}

60000

else if (!legitimate_indirect_address_p (addr, false)

60001

- && !rs6000_legitimate_offset_address_p (TImode, addr,

60002

+ && !rs6000_legitimate_offset_address_p (PTImode, addr,

60003

false, true))

60004

{

60005

if (TARGET_DEBUG_ADDR)

60006

@@ -14050,9 +16685,21 @@

60007

}

60008

break;

60009

60010

- /* Float/Altivec registers can only handle reg+reg addressing. Move

60011

- other addresses into a scratch register. */

60012

+ /* Float registers can do offset+reg addressing for scalar types. */

60013

case FLOAT_REGS:

60014

+ if (legitimate_indirect_address_p (addr, false) /* reg */

60015

+ || legitimate_indexed_address_p (addr, false) /* reg+reg */

60016

+ || ((GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8)

60017

+ && and_op2 == NULL_RTX

60018

+ && scratch_or_premodify == scratch

60019

+ && rs6000_legitimate_offset_address_p (mode, addr, false, false)))

60020

+ break;

60021

+

60022

+ /* If this isn't a legacy floating point load/store, fall through to the

60023

+ VSX defaults. */

60024

+

60025

+ /* VSX/Altivec registers can only handle reg+reg addressing. Move other

60026

+ addresses into a scratch register. */

60027

case VSX_REGS:

60028

case ALTIVEC_REGS:

60029

60030

@@ -14066,35 +16713,35 @@

60031

|| !VECTOR_MEM_ALTIVEC_P (mode)))

60032

{

60033

and_op2 = XEXP (addr, 1);

60034

- addr = XEXP (addr, 0);

60035

+ addr = find_replacement (&XEXP (addr, 0));

60036

}

60037

60038

/* If we aren't using a VSX load, save the PRE_MODIFY register and use it

60039

as the address later. */

60040

if (GET_CODE (addr) == PRE_MODIFY

60041

- && (!VECTOR_MEM_VSX_P (mode)

60042

+ && ((ALTIVEC_OR_VSX_VECTOR_MODE (mode)

60043

+ && (rclass != FLOAT_REGS

60044

+ || (GET_MODE_SIZE (mode) != 4 && GET_MODE_SIZE (mode) != 8)))

60045

|| and_op2 != NULL_RTX

60046

|| !legitimate_indexed_address_p (XEXP (addr, 1), false)))

60047

{

60048

- scratch_or_premodify = XEXP (addr, 0);

60049

- gcc_assert (legitimate_indirect_address_p (scratch_or_premodify,

60050

- false));

60051

- gcc_assert (GET_CODE (XEXP (addr, 1)) == PLUS);

60052

- addr = XEXP (addr, 1);

60053

+ scratch_or_premodify = find_replacement (&XEXP (addr, 0));

60054

+ if (!legitimate_indirect_address_p (scratch_or_premodify, false))

60055

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

60056

+

60057

+ addr = find_replacement (&XEXP (addr, 1));

60058

+ if (GET_CODE (addr) != PLUS)

60059

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

60060

}

60061

60062

if (legitimate_indirect_address_p (addr, false) /* reg */

60063

|| legitimate_indexed_address_p (addr, false) /* reg+reg */

60064

- || GET_CODE (addr) == PRE_MODIFY /* VSX pre-modify */

60065

|| (GET_CODE (addr) == AND /* Altivec memory */

60066

+ && rclass == ALTIVEC_REGS

60067

&& GET_CODE (XEXP (addr, 1)) == CONST_INT

60068

&& INTVAL (XEXP (addr, 1)) == -16

60069

- && VECTOR_MEM_ALTIVEC_P (mode))

60070

- || (rclass == FLOAT_REGS /* legacy float mem */

60071

- && GET_MODE_SIZE (mode) == 8

60072

- && and_op2 == NULL_RTX

60073

- && scratch_or_premodify == scratch

60074

- && rs6000_legitimate_offset_address_p (mode, addr, false, false)))

60075

+ && (legitimate_indirect_address_p (XEXP (addr, 0), false)

60076

+ || legitimate_indexed_address_p (XEXP (addr, 0), false))))

60077

;

60078

60079

else if (GET_CODE (addr) == PLUS)

60080

@@ -14101,7 +16748,8 @@

60081

{

60082

addr_op1 = XEXP (addr, 0);

60083

addr_op2 = XEXP (addr, 1);

60084

- gcc_assert (REG_P (addr_op1));

60085

+ if (!REG_P (addr_op1))

60086

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

60087

60088

if (TARGET_DEBUG_ADDR)

60089

{

60090

@@ -14120,7 +16768,8 @@

60091

}

60092

60093

else if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == CONST

60094

- || GET_CODE (addr) == CONST_INT || REG_P (addr))

60095

+ || GET_CODE (addr) == CONST_INT || GET_CODE (addr) == LO_SUM

60096

+ || REG_P (addr))

60097

{

60098

if (TARGET_DEBUG_ADDR)

60099

{

60100

@@ -14136,12 +16785,12 @@

60101

}

60102

60103

else

60104

- gcc_unreachable ();

60105

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

60106

60107

break;

60108

60109

default:

60110

- gcc_unreachable ();

60111

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

60112

}

60113

60114

/* If the original address involved a pre-modify that we couldn't use the VSX

60115

@@ -14188,7 +16837,7 @@

60116

/* Adjust the address if it changed. */

60117

if (addr != XEXP (mem, 0))

60118

{

60119

- mem = change_address (mem, mode, addr);

60120

+ mem = replace_equiv_address_nv (mem, addr);

60121

if (TARGET_DEBUG_ADDR)

60122

fprintf (stderr, "\nrs6000_secondary_reload_inner, mem adjusted.\n");

60123

}

60124

@@ -14253,8 +16902,10 @@

60125

return;

60126

}

60127

60128

-/* Allocate a 64-bit stack slot to be used for copying SDmode

60129

- values through if this function has any SDmode references. */

60130

+/* Allocate a 64-bit stack slot to be used for copying SDmode values through if

60131

+ this function has any SDmode references. If we are on a power7 or later, we

60132

+ don't need the 64-bit stack slot since the LFIWZX and STIFWX instructions

60133

+ can load/store the value. */

60134

60135

static void

60136

rs6000_alloc_sdmode_stack_slot (void)

60137

@@ -14264,7 +16915,14 @@

60138

gimple_stmt_iterator gsi;

60139

60140

gcc_assert (cfun->machine->sdmode_stack_slot == NULL_RTX);

60141

+ /* We use a different approach for dealing with the secondary

60142

+ memory in LRA. */

60143

+ if (ira_use_lra_p)

60144

+ return;

60145

60146

+ if (TARGET_NO_SDMODE_STACK)

60147

+ return;

60148

+

60149

FOR_EACH_BB (bb)

60150

for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))

60151

{

60152

@@ -14325,8 +16983,7 @@

60153

{

60154

enum machine_mode mode = GET_MODE (x);

60155

60156

- if (VECTOR_UNIT_VSX_P (mode)

60157

- && x == CONST0_RTX (mode) && VSX_REG_CLASS_P (rclass))

60158

+ if (TARGET_VSX && x == CONST0_RTX (mode) && VSX_REG_CLASS_P (rclass))

60159

return rclass;

60160

60161

if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)

60162

@@ -14334,8 +16991,14 @@

60163

&& easy_vector_constant (x, mode))

60164

return ALTIVEC_REGS;

60165

60166

- if (CONSTANT_P (x) && reg_classes_intersect_p (rclass, FLOAT_REGS))

60167

- return NO_REGS;

60168

+ if ((CONSTANT_P (x) || GET_CODE (x) == PLUS))

60169

+ {

60170

+ if (reg_class_subset_p (GENERAL_REGS, rclass))

60171

+ return GENERAL_REGS;

60172

+ if (reg_class_subset_p (BASE_REGS, rclass))

60173

+ return BASE_REGS;

60174

+ return NO_REGS;

60175

+ }

60176

60177

if (GET_MODE_CLASS (mode) == MODE_INT && rclass == NON_SPECIAL_REGS)

60178

return GENERAL_REGS;

60179

@@ -14349,7 +17012,8 @@

60180

if (GET_MODE_SIZE (mode) <= 8)

60181

return FLOAT_REGS;

60182

60183

- if (VECTOR_UNIT_ALTIVEC_P (mode) || VECTOR_MEM_ALTIVEC_P (mode))

60184

+ if (VECTOR_UNIT_ALTIVEC_P (mode) || VECTOR_MEM_ALTIVEC_P (mode)

60185

+ || mode == V1TImode)

60186

return ALTIVEC_REGS;

60187

60188

return rclass;

60189

@@ -14381,60 +17045,45 @@

60190

set and vice versa. */

60191

60192

static bool

60193

-rs6000_secondary_memory_needed (enum reg_class class1,

60194

- enum reg_class class2,

60195

+rs6000_secondary_memory_needed (enum reg_class from_class,

60196

+ enum reg_class to_class,

60197

enum machine_mode mode)

60198

{

60199

- if (class1 == class2)

60200

- return false;

60201

+ enum rs6000_reg_type from_type, to_type;

60202

+ bool altivec_p = ((from_class == ALTIVEC_REGS)

60203

+ || (to_class == ALTIVEC_REGS));

60204

60205

- /* Under VSX, there are 3 register classes that values could be in (VSX_REGS,

60206

- ALTIVEC_REGS, and FLOAT_REGS). We don't need to use memory to copy

60207

- between these classes. But we need memory for other things that can go in

60208

- FLOAT_REGS like SFmode. */

60209

- if (TARGET_VSX

60210

- && (VECTOR_MEM_VSX_P (mode) || VECTOR_UNIT_VSX_P (mode))

60211

- && (class1 == VSX_REGS || class1 == ALTIVEC_REGS

60212

- || class1 == FLOAT_REGS))

60213

- return (class2 != VSX_REGS && class2 != ALTIVEC_REGS

60214

- && class2 != FLOAT_REGS);

60215

+ /* If a simple/direct move is available, we don't need secondary memory */

60216

+ from_type = reg_class_to_reg_type[(int)from_class];

60217

+ to_type = reg_class_to_reg_type[(int)to_class];

60218

60219

- if (class1 == VSX_REGS || class2 == VSX_REGS)

60220

- return true;

60221

+ if (rs6000_secondary_reload_move (to_type, from_type, mode,

60222

+ (secondary_reload_info *)0, altivec_p))

60223

+ return false;

60224

60225

- if (class1 == FLOAT_REGS

60226

- && (!TARGET_MFPGPR || !TARGET_POWERPC64

60227

- || ((mode != DFmode)

60228

- && (mode != DDmode)

60229

- && (mode != DImode))))

60230

+ /* If we have a floating point or vector register class, we need to use

60231

+ memory to transfer the data. */

60232

+ if (IS_FP_VECT_REG_TYPE (from_type) || IS_FP_VECT_REG_TYPE (to_type))

60233

return true;

60234

60235

- if (class2 == FLOAT_REGS

60236

- && (!TARGET_MFPGPR || !TARGET_POWERPC64

60237

- || ((mode != DFmode)

60238

- && (mode != DDmode)

60239

- && (mode != DImode))))

60240

- return true;

60241

-

60242

- if (class1 == ALTIVEC_REGS || class2 == ALTIVEC_REGS)

60243

- return true;

60244

-

60245

return false;

60246

}

60247

60248

/* Debug version of rs6000_secondary_memory_needed. */

60249

static bool

60250

-rs6000_debug_secondary_memory_needed (enum reg_class class1,

60251

- enum reg_class class2,

60252

+rs6000_debug_secondary_memory_needed (enum reg_class from_class,

60253

+ enum reg_class to_class,

60254

enum machine_mode mode)

60255

{

60256

- bool ret = rs6000_secondary_memory_needed (class1, class2, mode);

60257

+ bool ret = rs6000_secondary_memory_needed (from_class, to_class, mode);

60258

60259

fprintf (stderr,

60260

- "rs6000_secondary_memory_needed, return: %s, class1 = %s, "

60261

- "class2 = %s, mode = %s\n",

60262

- ret ? "true" : "false", reg_class_names[class1],

60263

- reg_class_names[class2], GET_MODE_NAME (mode));

60264

+ "rs6000_secondary_memory_needed, return: %s, from_class = %s, "

60265

+ "to_class = %s, mode = %s\n",

60266

+ ret ? "true" : "false",

60267

+ reg_class_names[from_class],

60268

+ reg_class_names[to_class],

60269

+ GET_MODE_NAME (mode));

60270

60271

return ret;

60272

}

60273

@@ -14498,15 +17147,21 @@

60274

/* Constants, memory, and FP registers can go into FP registers. */

60275

if ((regno == -1 || FP_REGNO_P (regno))

60276

&& (rclass == FLOAT_REGS || rclass == NON_SPECIAL_REGS))

60277

- return (mode != SDmode) ? NO_REGS : GENERAL_REGS;

60278

+ return (mode != SDmode || lra_in_progress) ? NO_REGS : GENERAL_REGS;

60279

60280

/* Memory, and FP/altivec registers can go into fp/altivec registers under

60281

- VSX. */

60282

+ VSX. However, for scalar variables, use the traditional floating point

60283

+ registers so that we can use offset+register addressing. */

60284

if (TARGET_VSX

60285

&& (regno == -1 || VSX_REGNO_P (regno))

60286

&& VSX_REG_CLASS_P (rclass))

60287

- return NO_REGS;

60288

+ {

60289

+ if (GET_MODE_SIZE (mode) < 16)

60290

+ return FLOAT_REGS;

60291

60292

+ return NO_REGS;

60293

+ }

60294

+

60295

/* Memory, and AltiVec registers can go into AltiVec registers. */

60296

if ((regno == -1 || ALTIVEC_REGNO_P (regno))

60297

&& rclass == ALTIVEC_REGS)

60298

@@ -14550,8 +17205,42 @@

60299

if (from_size != to_size)

60300

{

60301

enum reg_class xclass = (TARGET_VSX) ? VSX_REGS : FLOAT_REGS;

60302

- return ((from_size < 8 || to_size < 8 || TARGET_IEEEQUAD)

60303

- && reg_classes_intersect_p (xclass, rclass));

60304

+

60305

+ if (reg_classes_intersect_p (xclass, rclass))

60306

+ {

60307

+ unsigned to_nregs = hard_regno_nregs[FIRST_FPR_REGNO][to];

60308

+ unsigned from_nregs = hard_regno_nregs[FIRST_FPR_REGNO][from];

60309

+

60310

+ /* Don't allow 64-bit types to overlap with 128-bit types that take a

60311

+ single register under VSX because the scalar part of the register

60312

+ is in the upper 64-bits, and not the lower 64-bits. Types like

60313

+ TFmode/TDmode that take 2 scalar register can overlap. 128-bit

60314

+ IEEE floating point can't overlap, and neither can small

60315

+ values. */

60316

+

60317

+ if (TARGET_IEEEQUAD && (to == TFmode || from == TFmode))

60318

+ return true;

60319

+

60320

+ /* TDmode in floating-mode registers must always go into a register

60321

+ pair with the most significant word in the even-numbered register

60322

+ to match ISA requirements. In little-endian mode, this does not

60323

+ match subreg numbering, so we cannot allow subregs. */

60324

+ if (!BYTES_BIG_ENDIAN && (to == TDmode || from == TDmode))

60325

+ return true;

60326

+

60327

+ if (from_size < 8 || to_size < 8)

60328

+ return true;

60329

+

60330

+ if (from_size == 8 && (8 * to_nregs) != to_size)

60331

+ return true;

60332

+

60333

+ if (to_size == 8 && (8 * from_nregs) != from_size)

60334

+ return true;

60335

+

60336

+ return false;

60337

+ }

60338

+ else

60339

+ return false;

60340

}

60341

60342

if (TARGET_E500_DOUBLE

60343

@@ -14565,10 +17254,19 @@

60344

/* Since the VSX register set includes traditional floating point registers

60345

and altivec registers, just check for the size being different instead of

60346

trying to check whether the modes are vector modes. Otherwise it won't

60347

- allow say DF and DI to change classes. */

60348

+ allow say DF and DI to change classes. For types like TFmode and TDmode

60349

+ that take 2 64-bit registers, rather than a single 128-bit register, don't

60350

+ allow subregs of those types to other 128 bit types. */

60351

if (TARGET_VSX && VSX_REG_CLASS_P (rclass))

60352

- return (from_size != 8 && from_size != 16);

60353

+ {

60354

+ unsigned num_regs = (from_size + 15) / 16;

60355

+ if (hard_regno_nregs[FIRST_FPR_REGNO][to] > num_regs

60356

+ || hard_regno_nregs[FIRST_FPR_REGNO][from] > num_regs)

60357

+ return true;

60358

60359

+ return (from_size != 8 && from_size != 16);

60360

+ }

60361

+

60362

if (TARGET_ALTIVEC && rclass == ALTIVEC_REGS

60363

&& (ALTIVEC_VECTOR_MODE (from) + ALTIVEC_VECTOR_MODE (to)) == 1)

60364

return true;

60365

@@ -14598,6 +17296,186 @@

60366

return ret;

60367

}

60368

60369

+/* Return a string to do a move operation of 128 bits of data. */

60370

+

60371

+const char *

60372

+rs6000_output_move_128bit (rtx operands[])

60373

+{

60374

+ rtx dest = operands[0];

60375

+ rtx src = operands[1];

60376

+ enum machine_mode mode = GET_MODE (dest);

60377

+ int dest_regno;

60378

+ int src_regno;

60379

+ bool dest_gpr_p, dest_fp_p, dest_vmx_p, dest_vsx_p;

60380

+ bool src_gpr_p, src_fp_p, src_vmx_p, src_vsx_p;

60381

+

60382

+ if (REG_P (dest))

60383

+ {

60384

+ dest_regno = REGNO (dest);

60385

+ dest_gpr_p = INT_REGNO_P (dest_regno);

60386

+ dest_fp_p = FP_REGNO_P (dest_regno);

60387

+ dest_vmx_p = ALTIVEC_REGNO_P (dest_regno);

60388

+ dest_vsx_p = dest_fp_p | dest_vmx_p;

60389

+ }

60390

+ else

60391

+ {

60392

+ dest_regno = -1;

60393

+ dest_gpr_p = dest_fp_p = dest_vmx_p = dest_vsx_p = false;

60394

+ }

60395

+

60396

+ if (REG_P (src))

60397

+ {

60398

+ src_regno = REGNO (src);

60399

+ src_gpr_p = INT_REGNO_P (src_regno);

60400

+ src_fp_p = FP_REGNO_P (src_regno);

60401

+ src_vmx_p = ALTIVEC_REGNO_P (src_regno);

60402

+ src_vsx_p = src_fp_p | src_vmx_p;

60403

+ }

60404

+ else

60405

+ {

60406

+ src_regno = -1;

60407

+ src_gpr_p = src_fp_p = src_vmx_p = src_vsx_p = false;

60408

+ }

60409

+

60410

+ /* Register moves. */

60411

+ if (dest_regno >= 0 && src_regno >= 0)

60412

+ {

60413

+ if (dest_gpr_p)

60414

+ {

60415

+ if (src_gpr_p)

60416

+ return "#";

60417

+

60418

+ else if (TARGET_VSX && TARGET_DIRECT_MOVE && src_vsx_p)

60419

+ return "#";

60420

+ }

60421

+

60422

+ else if (TARGET_VSX && dest_vsx_p)

60423

+ {

60424

+ if (src_vsx_p)

60425

+ return "xxlor %x0,%x1,%x1";

60426

+

60427

+ else if (TARGET_DIRECT_MOVE && src_gpr_p)

60428

+ return "#";

60429

+ }

60430

+

60431

+ else if (TARGET_ALTIVEC && dest_vmx_p && src_vmx_p)

60432

+ return "vor %0,%1,%1";

60433

+

60434

+ else if (dest_fp_p && src_fp_p)

60435

+ return "#";

60436

+ }

60437

+

60438

+ /* Loads. */

60439

+ else if (dest_regno >= 0 && MEM_P (src))

60440

+ {

60441

+ if (dest_gpr_p)

60442

+ {

60443

+ if (TARGET_QUAD_MEMORY && quad_load_store_p (dest, src))

60444

+ return "lq %0,%1";

60445

+ else

60446

+ return "#";

60447

+ }

60448

+

60449

+ else if (TARGET_ALTIVEC && dest_vmx_p

60450

+ && altivec_indexed_or_indirect_operand (src, mode))

60451

+ return "lvx %0,%y1";

60452

+

60453

+ else if (TARGET_VSX && dest_vsx_p)

60454

+ {

60455

+ if (mode == V16QImode || mode == V8HImode || mode == V4SImode)

60456

+ return "lxvw4x %x0,%y1";

60457

+ else

60458

+ return "lxvd2x %x0,%y1";

60459

+ }

60460

+

60461

+ else if (TARGET_ALTIVEC && dest_vmx_p)

60462

+ return "lvx %0,%y1";

60463

+

60464

+ else if (dest_fp_p)

60465

+ return "#";

60466

+ }

60467

+

60468

+ /* Stores. */

60469

+ else if (src_regno >= 0 && MEM_P (dest))

60470

+ {

60471

+ if (src_gpr_p)

60472

+ {

60473

+ if (TARGET_QUAD_MEMORY && quad_load_store_p (dest, src))

60474

+ return "stq %1,%0";

60475

+ else

60476

+ return "#";

60477

+ }

60478

+

60479

+ else if (TARGET_ALTIVEC && src_vmx_p

60480

+ && altivec_indexed_or_indirect_operand (src, mode))

60481

+ return "stvx %1,%y0";

60482

+

60483

+ else if (TARGET_VSX && src_vsx_p)

60484

+ {

60485

+ if (mode == V16QImode || mode == V8HImode || mode == V4SImode)

60486

+ return "stxvw4x %x1,%y0";

60487

+ else

60488

+ return "stxvd2x %x1,%y0";

60489

+ }

60490

+

60491

+ else if (TARGET_ALTIVEC && src_vmx_p)

60492

+ return "stvx %1,%y0";

60493

+

60494

+ else if (src_fp_p)

60495

+ return "#";

60496

+ }

60497

+

60498

+ /* Constants. */

60499

+ else if (dest_regno >= 0

60500

+ && (GET_CODE (src) == CONST_INT

60501

+ || GET_CODE (src) == CONST_DOUBLE

60502

+ || GET_CODE (src) == CONST_VECTOR))

60503

+ {

60504

+ if (dest_gpr_p)

60505

+ return "#";

60506

+

60507

+ else if (TARGET_VSX && dest_vsx_p && zero_constant (src, mode))

60508

+ return "xxlxor %x0,%x0,%x0";

60509

+

60510

+ else if (TARGET_ALTIVEC && dest_vmx_p)

60511

+ return output_vec_const_move (operands);

60512

+ }

60513

+

60514

+ if (TARGET_DEBUG_ADDR)

60515

+ {

60516

+ fprintf (stderr, "\n===== Bad 128 bit move:\n");

60517

+ debug_rtx (gen_rtx_SET (VOIDmode, dest, src));

60518

+ }

60519

+

60520

+ gcc_unreachable ();

60521

+}

60522

+

60523

+/* Validate a 128-bit move. */

60524

+bool

60525

+rs6000_move_128bit_ok_p (rtx operands[])

60526

+{

60527

+ enum machine_mode mode = GET_MODE (operands[0]);

60528

+ return (gpc_reg_operand (operands[0], mode)

60529

+ || gpc_reg_operand (operands[1], mode));

60530

+}

60531

+

60532

+/* Return true if a 128-bit move needs to be split. */

60533

+bool

60534

+rs6000_split_128bit_ok_p (rtx operands[])

60535

+{

60536

+ if (!reload_completed)

60537

+ return false;

60538

+

60539

+ if (!gpr_or_gpr_p (operands[0], operands[1]))

60540

+ return false;

60541

+

60542

+ if (quad_load_store_p (operands[0], operands[1]))

60543

+ return false;

60544

+

60545

+ return true;

60546

+}

60547

+

60548

+

60549

/* Given a comparison operation, return the bit number in CCR to test. We

60550

know this is a valid comparison.

60551

60552

@@ -14823,6 +17701,7 @@

60553

ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "L.");

60554

break;

60555

60556

+ case ABI_ELFv2:

60557

case ABI_V4:

60558

case ABI_DARWIN:

60559

break;

60560

@@ -15302,7 +18181,7 @@

60561

return;

60562

60563

case 'Y':

60564

- /* Like 'L', for third word of TImode */

60565

+ /* Like 'L', for third word of TImode/PTImode */

60566

if (REG_P (x))

60567

fputs (reg_names[REGNO (x) + 2], file);

60568

else if (MEM_P (x))

60569

@@ -15352,7 +18231,7 @@

60570

return;

60571

60572

case 'Z':

60573

- /* Like 'L', for last word of TImode. */

60574

+ /* Like 'L', for last word of TImode/PTImode. */

60575

if (REG_P (x))

60576

fputs (reg_names[REGNO (x) + 3], file);

60577

else if (MEM_P (x))

60578

@@ -15383,7 +18262,8 @@

60579

if ((TARGET_SPE || TARGET_E500_DOUBLE)

60580

&& (GET_MODE_SIZE (GET_MODE (x)) == 8

60581

|| GET_MODE (x) == TFmode

60582

- || GET_MODE (x) == TImode))

60583

+ || GET_MODE (x) == TImode

60584

+ || GET_MODE (x) == PTImode))

60585

{

60586

/* Handle [reg]. */

60587

if (REG_P (tmp))

60588

@@ -16766,7 +19646,8 @@

60589

}

60590

60591

/* A subroutine of the atomic operation splitters. Emit a load-locked

60592

- instruction in MODE. */

60593

+ instruction in MODE. For QI/HImode, possibly use a pattern than includes

60594

+ the zero_extend operation. */

60595

60596

static void

60597

emit_load_locked (enum machine_mode mode, rtx reg, rtx mem)

60598

@@ -16775,12 +19656,26 @@

60599

60600

switch (mode)

60601

{

60602

+ case QImode:

60603

+ fn = gen_load_lockedqi;

60604

+ break;

60605

+ case HImode:

60606

+ fn = gen_load_lockedhi;

60607

+ break;

60608

case SImode:

60609

- fn = gen_load_lockedsi;

60610

+ if (GET_MODE (mem) == QImode)

60611

+ fn = gen_load_lockedqi_si;

60612

+ else if (GET_MODE (mem) == HImode)

60613

+ fn = gen_load_lockedhi_si;

60614

+ else

60615

+ fn = gen_load_lockedsi;

60616

break;

60617

case DImode:

60618

fn = gen_load_lockeddi;

60619

break;

60620

+ case TImode:

60621

+ fn = gen_load_lockedti;

60622

+ break;

60623

default:

60624

gcc_unreachable ();

60625

}

60626

@@ -16797,6 +19692,12 @@

60627

60628

switch (mode)

60629

{

60630

+ case QImode:

60631

+ fn = gen_store_conditionalqi;

60632

+ break;

60633

+ case HImode:

60634

+ fn = gen_store_conditionalhi;

60635

+ break;

60636

case SImode:

60637

fn = gen_store_conditionalsi;

60638

break;

60639

@@ -16803,6 +19704,9 @@

60640

case DImode:

60641

fn = gen_store_conditionaldi;

60642

break;

60643

+ case TImode:

60644

+ fn = gen_store_conditionalti;

60645

+ break;

60646

default:

60647

gcc_unreachable ();

60648

}

60649

@@ -16949,7 +19853,7 @@

60650

{

60651

rtx boolval, retval, mem, oldval, newval, cond;

60652

rtx label1, label2, x, mask, shift;

60653

- enum machine_mode mode;

60654

+ enum machine_mode mode, orig_mode;

60655

enum memmodel mod_s, mod_f;

60656

bool is_weak;

60657

60658

@@ -16961,23 +19865,30 @@

60659

is_weak = (INTVAL (operands[5]) != 0);

60660

mod_s = (enum memmodel) INTVAL (operands[6]);

60661

mod_f = (enum memmodel) INTVAL (operands[7]);

60662

- mode = GET_MODE (mem);

60663

+ orig_mode = mode = GET_MODE (mem);

60664

60665

mask = shift = NULL_RTX;

60666

if (mode == QImode || mode == HImode)

60667

{

60668

- mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

60669

-

60670

- /* Shift and mask OLDVAL into position with the word. */

60671

+ /* Before power8, we didn't have access to lbarx/lharx, so generate a

60672

+ lwarx and shift/mask operations. With power8, we need to do the

60673

+ comparison in SImode, but the store is still done in QI/HImode. */

60674

oldval = convert_modes (SImode, mode, oldval, 1);

60675

- oldval = expand_simple_binop (SImode, ASHIFT, oldval, shift,

60676

- NULL_RTX, 1, OPTAB_LIB_WIDEN);

60677

60678

- /* Shift and mask NEWVAL into position within the word. */

60679

- newval = convert_modes (SImode, mode, newval, 1);

60680

- newval = expand_simple_binop (SImode, ASHIFT, newval, shift,

60681

- NULL_RTX, 1, OPTAB_LIB_WIDEN);

60682

+ if (!TARGET_SYNC_HI_QI)

60683

+ {

60684

+ mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

60685

60686

+ /* Shift and mask OLDVAL into position with the word. */

60687

+ oldval = expand_simple_binop (SImode, ASHIFT, oldval, shift,

60688

+ NULL_RTX, 1, OPTAB_LIB_WIDEN);

60689

+

60690

+ /* Shift and mask NEWVAL into position within the word. */

60691

+ newval = convert_modes (SImode, mode, newval, 1);

60692

+ newval = expand_simple_binop (SImode, ASHIFT, newval, shift,

60693

+ NULL_RTX, 1, OPTAB_LIB_WIDEN);

60694

+ }

60695

+

60696

/* Prepare to adjust the return value. */

60697

retval = gen_reg_rtx (SImode);

60698

mode = SImode;

60699

@@ -17005,7 +19916,25 @@

60700

}

60701

60702

cond = gen_reg_rtx (CCmode);

60703

- x = gen_rtx_COMPARE (CCmode, x, oldval);

60704

+ /* If we have TImode, synthesize a comparison. */

60705

+ if (mode != TImode)

60706

+ x = gen_rtx_COMPARE (CCmode, x, oldval);

60707

+ else

60708

+ {

60709

+ rtx xor1_result = gen_reg_rtx (DImode);

60710

+ rtx xor2_result = gen_reg_rtx (DImode);

60711

+ rtx or_result = gen_reg_rtx (DImode);

60712

+ rtx new_word0 = simplify_gen_subreg (DImode, x, TImode, 0);

60713

+ rtx new_word1 = simplify_gen_subreg (DImode, x, TImode, 8);

60714

+ rtx old_word0 = simplify_gen_subreg (DImode, oldval, TImode, 0);

60715

+ rtx old_word1 = simplify_gen_subreg (DImode, oldval, TImode, 8);

60716

+

60717

+ emit_insn (gen_xordi3 (xor1_result, new_word0, old_word0));

60718

+ emit_insn (gen_xordi3 (xor2_result, new_word1, old_word1));

60719

+ emit_insn (gen_iordi3 (or_result, xor1_result, xor2_result));

60720

+ x = gen_rtx_COMPARE (CCmode, or_result, const0_rtx);

60721

+ }

60722

+

60723

emit_insn (gen_rtx_SET (VOIDmode, cond, x));

60724

60725

x = gen_rtx_NE (VOIDmode, cond, const0_rtx);

60726

@@ -17015,7 +19944,7 @@

60727

if (mask)

60728

x = rs6000_mask_atomic_subword (retval, newval, mask);

60729

60730

- emit_store_conditional (mode, cond, mem, x);

60731

+ emit_store_conditional (orig_mode, cond, mem, x);

60732

60733

if (!is_weak)

60734

{

60735

@@ -17033,6 +19962,8 @@

60736

60737

if (shift)

60738

rs6000_finish_atomic_subword (operands[1], retval, shift);

60739

+ else if (mode != GET_MODE (operands[1]))

60740

+ convert_move (operands[1], retval, 1);

60741

60742

/* In all cases, CR0 contains EQ on success, and NE on failure. */

60743

x = gen_rtx_EQ (SImode, cond, const0_rtx);

60744

@@ -17056,7 +19987,7 @@

60745

mode = GET_MODE (mem);

60746

60747

mask = shift = NULL_RTX;

60748

- if (mode == QImode || mode == HImode)

60749

+ if (!TARGET_SYNC_HI_QI && (mode == QImode || mode == HImode))

60750

{

60751

mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

60752

60753

@@ -17105,53 +20036,70 @@

60754

{

60755

enum memmodel model = (enum memmodel) INTVAL (model_rtx);

60756

enum machine_mode mode = GET_MODE (mem);

60757

+ enum machine_mode store_mode = mode;

60758

rtx label, x, cond, mask, shift;

60759

rtx before = orig_before, after = orig_after;

60760

60761

mask = shift = NULL_RTX;

60762

+ /* On power8, we want to use SImode for the operation. On previous systems,

60763

+ use the operation in a subword and shift/mask to get the proper byte or

60764

+ halfword. */

60765

if (mode == QImode || mode == HImode)

60766

{

60767

- mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

60768

+ if (TARGET_SYNC_HI_QI)

60769

+ {

60770

+ val = convert_modes (SImode, mode, val, 1);

60771

60772

- /* Shift and mask VAL into position with the word. */

60773

- val = convert_modes (SImode, mode, val, 1);

60774

- val = expand_simple_binop (SImode, ASHIFT, val, shift,

60775

- NULL_RTX, 1, OPTAB_LIB_WIDEN);

60776

-

60777

- switch (code)

60778

+ /* Prepare to adjust the return value. */

60779

+ before = gen_reg_rtx (SImode);

60780

+ if (after)

60781

+ after = gen_reg_rtx (SImode);

60782

+ mode = SImode;

60783

+ }

60784

+ else

60785

{

60786

- case IOR:

60787

- case XOR:

60788

- /* We've already zero-extended VAL. That is sufficient to

60789

- make certain that it does not affect other bits. */

60790

- mask = NULL;

60791

- break;

60792

+ mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

60793

60794

- case AND:

60795

- /* If we make certain that all of the other bits in VAL are

60796

- set, that will be sufficient to not affect other bits. */

60797

- x = gen_rtx_NOT (SImode, mask);

60798

- x = gen_rtx_IOR (SImode, x, val);

60799

- emit_insn (gen_rtx_SET (VOIDmode, val, x));

60800

- mask = NULL;

60801

- break;

60802

+ /* Shift and mask VAL into position with the word. */

60803

+ val = convert_modes (SImode, mode, val, 1);

60804

+ val = expand_simple_binop (SImode, ASHIFT, val, shift,

60805

+ NULL_RTX, 1, OPTAB_LIB_WIDEN);

60806

60807

- case NOT:

60808

- case PLUS:

60809

- case MINUS:

60810

- /* These will all affect bits outside the field and need

60811

- adjustment via MASK within the loop. */

60812

- break;

60813

+ switch (code)

60814

+ {

60815

+ case IOR:

60816

+ case XOR:

60817

+ /* We've already zero-extended VAL. That is sufficient to

60818

+ make certain that it does not affect other bits. */

60819

+ mask = NULL;

60820

+ break;

60821

60822

- default:

60823

- gcc_unreachable ();

60824

+ case AND:

60825

+ /* If we make certain that all of the other bits in VAL are

60826

+ set, that will be sufficient to not affect other bits. */

60827

+ x = gen_rtx_NOT (SImode, mask);

60828

+ x = gen_rtx_IOR (SImode, x, val);

60829

+ emit_insn (gen_rtx_SET (VOIDmode, val, x));

60830

+ mask = NULL;

60831

+ break;

60832

+

60833

+ case NOT:

60834

+ case PLUS:

60835

+ case MINUS:

60836

+ /* These will all affect bits outside the field and need

60837

+ adjustment via MASK within the loop. */

60838

+ break;

60839

+

60840

+ default:

60841

+ gcc_unreachable ();

60842

+ }

60843

+

60844

+ /* Prepare to adjust the return value. */

60845

+ before = gen_reg_rtx (SImode);

60846

+ if (after)

60847

+ after = gen_reg_rtx (SImode);

60848

+ store_mode = mode = SImode;

60849

}

60850

-

60851

- /* Prepare to adjust the return value. */

60852

- before = gen_reg_rtx (SImode);

60853

- if (after)

60854

- after = gen_reg_rtx (SImode);

60855

- mode = SImode;

60856

}

60857

60858

mem = rs6000_pre_atomic_barrier (mem, model);

60859

@@ -17184,9 +20132,11 @@

60860

NULL_RTX, 1, OPTAB_LIB_WIDEN);

60861

x = rs6000_mask_atomic_subword (before, x, mask);

60862

}

60863

+ else if (store_mode != mode)

60864

+ x = convert_modes (store_mode, mode, x, 1);

60865

60866

cond = gen_reg_rtx (CCmode);

60867

- emit_store_conditional (mode, cond, mem, x);

60868

+ emit_store_conditional (store_mode, cond, mem, x);

60869

60870

x = gen_rtx_NE (VOIDmode, cond, const0_rtx);

60871

emit_unlikely_jump (x, label);

60872

@@ -17195,11 +20145,22 @@

60873

60874

if (shift)

60875

{

60876

+ /* QImode/HImode on machines without lbarx/lharx where we do a lwarx and

60877

+ then do the calcuations in a SImode register. */

60878

if (orig_before)

60879

rs6000_finish_atomic_subword (orig_before, before, shift);

60880

if (orig_after)

60881

rs6000_finish_atomic_subword (orig_after, after, shift);

60882

}

60883

+ else if (store_mode != mode)

60884

+ {

60885

+ /* QImode/HImode on machines with lbarx/lharx where we do the native

60886

+ operation and then do the calcuations in a SImode register. */

60887

+ if (orig_before)

60888

+ convert_move (orig_before, before, 1);

60889

+ if (orig_after)

60890

+ convert_move (orig_after, after, 1);

60891

+ }

60892

else if (orig_after && after != orig_after)

60893

emit_move_insn (orig_after, after);

60894

}

60895

@@ -17239,6 +20200,39 @@

60896

60897

gcc_assert (reg_mode_size * nregs == GET_MODE_SIZE (mode));

60898

60899

+ /* TDmode residing in FP registers is special, since the ISA requires that

60900

+ the lower-numbered word of a register pair is always the most significant

60901

+ word, even in little-endian mode. This does not match the usual subreg

60902

+ semantics, so we cannnot use simplify_gen_subreg in those cases. Access

60903

+ the appropriate constituent registers "by hand" in little-endian mode.

60904

+

60905

+ Note we do not need to check for destructive overlap here since TDmode

60906

+ can only reside in even/odd register pairs. */

60907

+ if (FP_REGNO_P (reg) && DECIMAL_FLOAT_MODE_P (mode) && !BYTES_BIG_ENDIAN)

60908

+ {

60909

+ rtx p_src, p_dst;

60910

+ int i;

60911

+

60912

+ for (i = 0; i < nregs; i++)

60913

+ {

60914

+ if (REG_P (src) && FP_REGNO_P (REGNO (src)))

60915

+ p_src = gen_rtx_REG (reg_mode, REGNO (src) + nregs - 1 - i);

60916

+ else

60917

+ p_src = simplify_gen_subreg (reg_mode, src, mode,

60918

+ i * reg_mode_size);

60919

+

60920

+ if (REG_P (dst) && FP_REGNO_P (REGNO (dst)))

60921

+ p_dst = gen_rtx_REG (reg_mode, REGNO (dst) + nregs - 1 - i);

60922

+ else

60923

+ p_dst = simplify_gen_subreg (reg_mode, dst, mode,

60924

+ i * reg_mode_size);

60925

+

60926

+ emit_insn (gen_rtx_SET (VOIDmode, p_dst, p_src));

60927

+ }

60928

+

60929

+ return;

60930

+ }

60931

+

60932

if (REG_P (src) && REG_P (dst) && (REGNO (src) < REGNO (dst)))

60933

{

60934

/* Move register range backwards, if we might have destructive

60935

@@ -17693,7 +20687,7 @@

60936

}

60937

else

60938

{

60939

- gcc_checking_assert (DEFAULT_ABI == ABI_AIX);

60940

+ gcc_checking_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2);

60941

if (info->first_fp_reg_save > 61)

60942

strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS;

60943

strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS;

60944

@@ -17704,7 +20698,8 @@

60945

by the static chain. It would require too much fiddling and the

60946

static chain is rarely used anyway. FPRs are saved w.r.t the stack

60947

pointer on Darwin, and AIX uses r1 or r12. */

60948

- if (using_static_chain_p && DEFAULT_ABI != ABI_AIX)

60949

+ if (using_static_chain_p

60950

+ && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN))

60951

strategy |= ((DEFAULT_ABI == ABI_DARWIN ? 0 : SAVE_INLINE_FPRS)

60952

| SAVE_INLINE_GPRS

60953

| SAVE_INLINE_VRS | REST_INLINE_VRS);

60954

@@ -17837,7 +20832,35 @@

60955

The required alignment for AIX configurations is two words (i.e., 8

60956

or 16 bytes).

60957

60958

+ The ELFv2 ABI is a variant of the AIX ABI. Stack frames look like:

60959

60960

+ SP----> +---------------------------------------+

60961

+ | Back chain to caller | 0

60962

+ +---------------------------------------+

60963

+ | Save area for CR | 8

60964

+ +---------------------------------------+

60965

+ | Saved LR | 16

60966

+ +---------------------------------------+

60967

+ | Saved TOC pointer | 24

60968

+ +---------------------------------------+

60969

+ | Parameter save area (P) | 32

60970

+ +---------------------------------------+

60971

+ | Alloca space (A) | 32+P

60972

+ +---------------------------------------+

60973

+ | Local variable space (L) | 32+P+A

60974

+ +---------------------------------------+

60975

+ | Save area for AltiVec registers (W) | 32+P+A+L

60976

+ +---------------------------------------+

60977

+ | AltiVec alignment padding (Y) | 32+P+A+L+W

60978

+ +---------------------------------------+

60979

+ | Save area for GP registers (G) | 32+P+A+L+W+Y

60980

+ +---------------------------------------+

60981

+ | Save area for FP registers (F) | 32+P+A+L+W+Y+G

60982

+ +---------------------------------------+

60983

+ old SP->| back chain to caller's caller | 32+P+A+L+W+Y+G+F

60984

+ +---------------------------------------+

60985

+

60986

+

60987

V.4 stack frames look like:

60988

60989

SP----> +---------------------------------------+

60990

@@ -17897,6 +20920,7 @@

60991

rs6000_stack_t *info_ptr = &stack_info;

60992

int reg_size = TARGET_32BIT ? 4 : 8;

60993

int ehrd_size;

60994

+ int ehcr_size;

60995

int save_align;

60996

int first_gp;

60997

HOST_WIDE_INT non_fixed_size;

60998

@@ -17990,6 +21014,18 @@

60999

else

61000

ehrd_size = 0;

61001

61002

+ /* In the ELFv2 ABI, we also need to allocate space for separate

61003

+ CR field save areas if the function calls __builtin_eh_return. */

61004

+ if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return)

61005

+ {

61006

+ /* This hard-codes that we have three call-saved CR fields. */

61007

+ ehcr_size = 3 * reg_size;

61008

+ /* We do *not* use the regular CR save mechanism. */

61009

+ info_ptr->cr_save_p = 0;

61010

+ }

61011

+ else

61012

+ ehcr_size = 0;

61013

+

61014

/* Determine various sizes. */

61015

info_ptr->reg_size = reg_size;

61016

info_ptr->fixed_size = RS6000_SAVE_AREA;

61017

@@ -18029,6 +21065,7 @@

61018

gcc_unreachable ();

61019

61020

case ABI_AIX:

61021

+ case ABI_ELFv2:

61022

case ABI_DARWIN:

61023

info_ptr->fp_save_offset = - info_ptr->fp_size;

61024

info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;

61025

@@ -18058,6 +21095,8 @@

61026

}

61027

else

61028

info_ptr->ehrd_offset = info_ptr->gp_save_offset - ehrd_size;

61029

+

61030

+ info_ptr->ehcr_offset = info_ptr->ehrd_offset - ehcr_size;

61031

info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */

61032

info_ptr->lr_save_offset = 2*reg_size;

61033

break;

61034

@@ -18120,6 +21159,7 @@

61035

+ info_ptr->spe_gp_size

61036

+ info_ptr->spe_padding_size

61037

+ ehrd_size

61038

+ + ehcr_size

61039

+ info_ptr->cr_size

61040

+ info_ptr->vrsave_size,

61041

save_align);

61042

@@ -18133,7 +21173,7 @@

61043

61044

/* Determine if we need to save the link register. */

61045

if (info_ptr->calls_p

61046

- || (DEFAULT_ABI == ABI_AIX

61047

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61048

&& crtl->profile

61049

&& !TARGET_PROFILE_KERNEL)

61050

|| (DEFAULT_ABI == ABI_V4 && cfun->calls_alloca)

61051

@@ -18279,6 +21319,7 @@

61052

default: abi_string = "Unknown"; break;

61053

case ABI_NONE: abi_string = "NONE"; break;

61054

case ABI_AIX: abi_string = "AIX"; break;

61055

+ case ABI_ELFv2: abi_string = "ELFv2"; break;

61056

case ABI_DARWIN: abi_string = "Darwin"; break;

61057

case ABI_V4: abi_string = "V.4"; break;

61058

}

61059

@@ -18400,7 +21441,8 @@

61060

/* Currently we don't optimize very well between prolog and body

61061

code and for PIC code the code can be actually quite bad, so

61062

don't try to be too clever here. */

61063

- if (count != 0 || (DEFAULT_ABI != ABI_AIX && flag_pic))

61064

+ if (count != 0

61065

+ || ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN) && flag_pic))

61066

{

61067

cfun->machine->ra_needs_full_frame = 1;

61068

61069

@@ -18459,13 +21501,13 @@

61070

return false;

61071

}

61072

61073

- /* Under the AIX ABI we can't allow calls to non-local functions,

61074

- because the callee may have a different TOC pointer to the

61075

- caller and there's no way to ensure we restore the TOC when we

61076

- return. With the secure-plt SYSV ABI we can't make non-local

61077

+ /* Under the AIX or ELFv2 ABIs we can't allow calls to non-local

61078

+ functions, because the callee may have a different TOC pointer to

61079

+ the caller and there's no way to ensure we restore the TOC when

61080

+ we return. With the secure-plt SYSV ABI we can't make non-local

61081

calls when -fpic/PIC because the plt call stubs use r30. */

61082

if (DEFAULT_ABI == ABI_DARWIN

61083

- || (DEFAULT_ABI == ABI_AIX

61084

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61085

&& decl

61086

&& !DECL_EXTERNAL (decl)

61087

&& (*targetm.binds_local_p) (decl))

61088

@@ -18566,7 +21608,7 @@

61089

rtx dest;

61090

dest = gen_rtx_REG (Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);

61091

61092

- if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic)

61093

+ if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI == ABI_V4 && flag_pic)

61094

{

61095

char buf[30];

61096

rtx lab, tmp1, tmp2, got;

61097

@@ -18594,7 +21636,7 @@

61098

emit_insn (gen_load_toc_v4_pic_si ());

61099

emit_move_insn (dest, gen_rtx_REG (Pmode, LR_REGNO));

61100

}

61101

- else if (TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2)

61102

+ else if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2)

61103

{

61104

char buf[30];

61105

rtx temp0 = (fromprolog

61106

@@ -18642,7 +21684,7 @@

61107

}

61108

else

61109

{

61110

- gcc_assert (DEFAULT_ABI == ABI_AIX);

61111

+ gcc_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2);

61112

61113

if (TARGET_32BIT)

61114

emit_insn (gen_load_toc_aix_si (dest));

61115

@@ -19047,7 +22089,7 @@

61116

61117

static rtx

61118

rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,

61119

- rtx reg2, rtx rreg)

61120

+ rtx reg2, rtx rreg, rtx split_reg)

61121

{

61122

rtx real, temp;

61123

61124

@@ -19138,6 +22180,11 @@

61125

}

61126

}

61127

61128

+ /* If a store insn has been split into multiple insns, the

61129

+ true source register is given by split_reg. */

61130

+ if (split_reg != NULL_RTX)

61131

+ real = gen_rtx_SET (VOIDmode, SET_DEST (real), split_reg);

61132

+

61133

RTX_FRAME_RELATED_P (insn) = 1;

61134

add_reg_note (insn, REG_FRAME_RELATED_EXPR, real);

61135

61136

@@ -19245,7 +22292,7 @@

61137

reg = gen_rtx_REG (mode, regno);

61138

insn = emit_insn (gen_frame_store (reg, frame_reg, offset));

61139

return rs6000_frame_related (insn, frame_reg, frame_reg_to_sp,

61140

- NULL_RTX, NULL_RTX);

61141

+ NULL_RTX, NULL_RTX, NULL_RTX);

61142

}

61143

61144

/* Emit an offset memory reference suitable for a frame store, while

61145

@@ -19361,7 +22408,7 @@

61146

if ((sel & SAVRES_LR))

61147

suffix = "_x";

61148

}

61149

- else if (DEFAULT_ABI == ABI_AIX)

61150

+ else if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61151

{

61152

#if !defined (POWERPC_LINUX) && !defined (POWERPC_FREEBSD)

61153

/* No out-of-line save/restore routines for GPRs on AIX. */

61154

@@ -19502,7 +22549,7 @@

61155

static inline unsigned

61156

ptr_regno_for_savres (int sel)

61157

{

61158

- if (DEFAULT_ABI == ABI_AIX)

61159

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61160

return (sel & SAVRES_REG) == SAVRES_FPR || (sel & SAVRES_LR) ? 1 : 12;

61161

return DEFAULT_ABI == ABI_DARWIN && (sel & SAVRES_REG) == SAVRES_FPR ? 1 : 11;

61162

}

61163

@@ -19587,6 +22634,43 @@

61164

return insn;

61165

}

61166

61167

+/* Emit code to store CR fields that need to be saved into REG. */

61168

+

61169

+static void

61170

+rs6000_emit_move_from_cr (rtx reg)

61171

+{

61172

+ /* Only the ELFv2 ABI allows storing only selected fields. */

61173

+ if (DEFAULT_ABI == ABI_ELFv2 && TARGET_MFCRF)

61174

+ {

61175

+ int i, cr_reg[8], count = 0;

61176

+

61177

+ /* Collect CR fields that must be saved. */

61178

+ for (i = 0; i < 8; i++)

61179

+ if (save_reg_p (CR0_REGNO + i))

61180

+ cr_reg[count++] = i;

61181

+

61182

+ /* If it's just a single one, use mfcrf. */

61183

+ if (count == 1)

61184

+ {

61185

+ rtvec p = rtvec_alloc (1);

61186

+ rtvec r = rtvec_alloc (2);

61187

+ RTVEC_ELT (r, 0) = gen_rtx_REG (CCmode, CR0_REGNO + cr_reg[0]);

61188

+ RTVEC_ELT (r, 1) = GEN_INT (1 << (7 - cr_reg[0]));

61189

+ RTVEC_ELT (p, 0)

61190

+ = gen_rtx_SET (VOIDmode, reg,

61191

+ gen_rtx_UNSPEC (SImode, r, UNSPEC_MOVESI_FROM_CR));

61192

+

61193

+ emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

61194

+ return;

61195

+ }

61196

+

61197

+ /* ??? It might be better to handle count == 2 / 3 cases here

61198

+ as well, using logical operations to combine the values. */

61199

+ }

61200

+

61201

+ emit_insn (gen_movesi_from_cr (reg));

61202

+}

61203

+

61204

/* Determine whether the gp REG is really used. */

61205

61206

static bool

61207

@@ -19652,6 +22736,17 @@

61208

#define NOT_INUSE(R) do {} while (0)

61209

#endif

61210

61211

+ if (DEFAULT_ABI == ABI_ELFv2)

61212

+ {

61213

+ cfun->machine->r2_setup_needed = df_regs_ever_live_p (TOC_REGNUM);

61214

+

61215

+ /* With -mminimal-toc we may generate an extra use of r2 below. */

61216

+ if (!TARGET_SINGLE_PIC_BASE

61217

+ && TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)

61218

+ cfun->machine->r2_setup_needed = true;

61219

+ }

61220

+

61221

+

61222

if (flag_stack_usage_info)

61223

current_function_static_stack_size = info->total_size;

61224

61225

@@ -19766,7 +22861,7 @@

61226

61227

insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

61228

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

61229

- treg, GEN_INT (-info->total_size));

61230

+ treg, GEN_INT (-info->total_size), NULL_RTX);

61231

sp_off = frame_off = info->total_size;

61232

}

61233

61234

@@ -19851,7 +22946,7 @@

61235

61236

insn = emit_move_insn (mem, reg);

61237

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

61238

- NULL_RTX, NULL_RTX);

61239

+ NULL_RTX, NULL_RTX, NULL_RTX);

61240

END_USE (0);

61241

}

61242

}

61243

@@ -19858,7 +22953,7 @@

61244

61245

/* If we need to save CR, put it into r12 or r11. Choose r12 except when

61246

r12 will be needed by out-of-line gpr restore. */

61247

- cr_save_regno = (DEFAULT_ABI == ABI_AIX

61248

+ cr_save_regno = ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61249

&& !(strategy & (SAVE_INLINE_GPRS

61250

| SAVE_NOINLINE_GPRS_SAVES_LR))

61251

? 11 : 12);

61252

@@ -19867,21 +22962,9 @@

61253

&& REGNO (frame_reg_rtx) != cr_save_regno

61254

&& !(using_static_chain_p && cr_save_regno == 11))

61255

{

61256

- rtx set;

61257

-

61258

cr_save_rtx = gen_rtx_REG (SImode, cr_save_regno);

61259

START_USE (cr_save_regno);

61260

- insn = emit_insn (gen_movesi_from_cr (cr_save_rtx));

61261

- RTX_FRAME_RELATED_P (insn) = 1;

61262

- /* Now, there's no way that dwarf2out_frame_debug_expr is going

61263

- to understand '(unspec:SI [(reg:CC 68) ...] UNSPEC_MOVESI_FROM_CR)'.

61264

- But that's OK. All we have to do is specify that _one_ condition

61265

- code register is saved in this stack slot. The thrower's epilogue

61266

- will then restore all the call-saved registers.

61267

- We use CR2_REGNO (70) to be compatible with gcc-2.95 on Linux. */

61268

- set = gen_rtx_SET (VOIDmode, cr_save_rtx,

61269

- gen_rtx_REG (SImode, CR2_REGNO));

61270

- add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);

61271

+ rs6000_emit_move_from_cr (cr_save_rtx);

61272

}

61273

61274

/* Do any required saving of fpr's. If only one or two to save, do

61275

@@ -19919,7 +23002,7 @@

61276

info->lr_save_offset,

61277

DFmode, sel);

61278

rs6000_frame_related (insn, ptr_reg, sp_off,

61279

- NULL_RTX, NULL_RTX);

61280

+ NULL_RTX, NULL_RTX, NULL_RTX);

61281

if (lr)

61282

END_USE (0);

61283

}

61284

@@ -19998,7 +23081,7 @@

61285

SAVRES_SAVE | SAVRES_GPR);

61286

61287

rs6000_frame_related (insn, spe_save_area_ptr, sp_off - save_off,

61288

- NULL_RTX, NULL_RTX);

61289

+ NULL_RTX, NULL_RTX, NULL_RTX);

61290

}

61291

61292

/* Move the static chain pointer back. */

61293

@@ -20048,7 +23131,7 @@

61294

info->lr_save_offset + ptr_off,

61295

reg_mode, sel);

61296

rs6000_frame_related (insn, ptr_reg, sp_off - ptr_off,

61297

- NULL_RTX, NULL_RTX);

61298

+ NULL_RTX, NULL_RTX, NULL_RTX);

61299

if (lr)

61300

END_USE (0);

61301

}

61302

@@ -20064,7 +23147,7 @@

61303

info->gp_save_offset + frame_off + reg_size * i);

61304

insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

61305

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

61306

- NULL_RTX, NULL_RTX);

61307

+ NULL_RTX, NULL_RTX, NULL_RTX);

61308

}

61309

else if (!WORLD_SAVE_P (info))

61310

{

61311

@@ -20133,7 +23216,8 @@

61312

be updated if we arrived at this function via a plt call or

61313

toc adjusting stub. */

61314

emit_move_insn (tmp_reg_si, gen_rtx_MEM (SImode, tmp_reg));

61315

- toc_restore_insn = TARGET_32BIT ? 0x80410014 : 0xE8410028;

61316

+ toc_restore_insn = ((TARGET_32BIT ? 0x80410000 : 0xE8410000)

61317

+ + RS6000_TOC_SAVE_SLOT);

61318

hi = gen_int_mode (toc_restore_insn & ~0xffff, SImode);

61319

emit_insn (gen_xorsi3 (tmp_reg_si, tmp_reg_si, hi));

61320

compare_result = gen_rtx_REG (CCUNSmode, CR0_REGNO);

61321

@@ -20152,7 +23236,7 @@

61322

LABEL_NUSES (toc_save_done) += 1;

61323

61324

save_insn = emit_frame_save (frame_reg_rtx, reg_mode,

61325

- TOC_REGNUM, frame_off + 5 * reg_size,

61326

+ TOC_REGNUM, frame_off + RS6000_TOC_SAVE_SLOT,

61327

sp_off - frame_off);

61328

61329

emit_label (toc_save_done);

61330

@@ -20192,28 +23276,123 @@

61331

rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,

61332

GEN_INT (info->cr_save_offset + frame_off));

61333

rtx mem = gen_frame_mem (SImode, addr);

61334

- /* See the large comment above about why CR2_REGNO is used. */

61335

- rtx magic_eh_cr_reg = gen_rtx_REG (SImode, CR2_REGNO);

61336

61337

/* If we didn't copy cr before, do so now using r0. */

61338

if (cr_save_rtx == NULL_RTX)

61339

{

61340

- rtx set;

61341

-

61342

START_USE (0);

61343

cr_save_rtx = gen_rtx_REG (SImode, 0);

61344

- insn = emit_insn (gen_movesi_from_cr (cr_save_rtx));

61345

- RTX_FRAME_RELATED_P (insn) = 1;

61346

- set = gen_rtx_SET (VOIDmode, cr_save_rtx, magic_eh_cr_reg);

61347

- add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);

61348

+ rs6000_emit_move_from_cr (cr_save_rtx);

61349

}

61350

- insn = emit_move_insn (mem, cr_save_rtx);

61351

+

61352

+ /* Saving CR requires a two-instruction sequence: one instruction

61353

+ to move the CR to a general-purpose register, and a second

61354

+ instruction that stores the GPR to memory.

61355

+

61356

+ We do not emit any DWARF CFI records for the first of these,

61357

+ because we cannot properly represent the fact that CR is saved in

61358

+ a register. One reason is that we cannot express that multiple

61359

+ CR fields are saved; another reason is that on 64-bit, the size

61360

+ of the CR register in DWARF (4 bytes) differs from the size of

61361

+ a general-purpose register.

61362

+

61363

+ This means if any intervening instruction were to clobber one of

61364

+ the call-saved CR fields, we'd have incorrect CFI. To prevent

61365

+ this from happening, we mark the store to memory as a use of

61366

+ those CR fields, which prevents any such instruction from being

61367

+ scheduled in between the two instructions. */

61368

+ rtx crsave_v[9];

61369

+ int n_crsave = 0;

61370

+ int i;

61371

+

61372

+ crsave_v[n_crsave++] = gen_rtx_SET (VOIDmode, mem, cr_save_rtx);

61373

+ for (i = 0; i < 8; i++)

61374

+ if (save_reg_p (CR0_REGNO + i))

61375

+ crsave_v[n_crsave++]

61376

+ = gen_rtx_USE (VOIDmode, gen_rtx_REG (CCmode, CR0_REGNO + i));

61377

+

61378

+ insn = emit_insn (gen_rtx_PARALLEL (VOIDmode,

61379

+ gen_rtvec_v (n_crsave, crsave_v)));

61380

END_USE (REGNO (cr_save_rtx));

61381

61382

- rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

61383

- NULL_RTX, NULL_RTX);

61384

+ /* Now, there's no way that dwarf2out_frame_debug_expr is going to

61385

+ understand '(unspec:SI [(reg:CC 68) ...] UNSPEC_MOVESI_FROM_CR)',

61386

+ so we need to construct a frame expression manually. */

61387

+ RTX_FRAME_RELATED_P (insn) = 1;

61388

+

61389

+ /* Update address to be stack-pointer relative, like

61390

+ rs6000_frame_related would do. */

61391

+ addr = gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM),

61392

+ GEN_INT (info->cr_save_offset + sp_off));

61393

+ mem = gen_frame_mem (SImode, addr);

61394

+

61395

+ if (DEFAULT_ABI == ABI_ELFv2)

61396

+ {

61397

+ /* In the ELFv2 ABI we generate separate CFI records for each

61398

+ CR field that was actually saved. They all point to the

61399

+ same 32-bit stack slot. */

61400

+ rtx crframe[8];

61401

+ int n_crframe = 0;

61402

+

61403

+ for (i = 0; i < 8; i++)

61404

+ if (save_reg_p (CR0_REGNO + i))

61405

+ {

61406

+ crframe[n_crframe]

61407

+ = gen_rtx_SET (VOIDmode, mem,

61408

+ gen_rtx_REG (SImode, CR0_REGNO + i));

61409

+

61410

+ RTX_FRAME_RELATED_P (crframe[n_crframe]) = 1;

61411

+ n_crframe++;

61412

+ }

61413

+

61414

+ add_reg_note (insn, REG_FRAME_RELATED_EXPR,

61415

+ gen_rtx_PARALLEL (VOIDmode,

61416

+ gen_rtvec_v (n_crframe, crframe)));

61417

+ }

61418

+ else

61419

+ {

61420

+ /* In other ABIs, by convention, we use a single CR regnum to

61421

+ represent the fact that all call-saved CR fields are saved.

61422

+ We use CR2_REGNO to be compatible with gcc-2.95 on Linux. */

61423

+ rtx set = gen_rtx_SET (VOIDmode, mem,

61424

+ gen_rtx_REG (SImode, CR2_REGNO));

61425

+ add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);

61426

+ }

61427

}

61428

61429

+ /* In the ELFv2 ABI we need to save all call-saved CR fields into

61430

+ *separate* slots if the routine calls __builtin_eh_return, so

61431

+ that they can be independently restored by the unwinder. */

61432

+ if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return)

61433

+ {

61434

+ int i, cr_off = info->ehcr_offset;

61435

+ rtx crsave;

61436

+

61437

+ /* ??? We might get better performance by using multiple mfocrf

61438

+ instructions. */

61439

+ crsave = gen_rtx_REG (SImode, 0);

61440

+ emit_insn (gen_movesi_from_cr (crsave));

61441

+

61442

+ for (i = 0; i < 8; i++)

61443

+ if (!call_used_regs[CR0_REGNO + i])

61444

+ {

61445

+ rtvec p = rtvec_alloc (2);

61446

+ RTVEC_ELT (p, 0)

61447

+ = gen_frame_store (crsave, frame_reg_rtx, cr_off + frame_off);

61448

+ RTVEC_ELT (p, 1)

61449

+ = gen_rtx_USE (VOIDmode, gen_rtx_REG (CCmode, CR0_REGNO + i));

61450

+

61451

+ insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

61452

+

61453

+ RTX_FRAME_RELATED_P (insn) = 1;

61454

+ add_reg_note (insn, REG_FRAME_RELATED_EXPR,

61455

+ gen_frame_store (gen_rtx_REG (SImode, CR0_REGNO + i),

61456

+ sp_reg_rtx, cr_off + sp_off));

61457

+

61458

+ cr_off += reg_size;

61459

+ }

61460

+ }

61461

+

61462

/* Update stack and set back pointer unless this is V.4,

61463

for which it was done previously. */

61464

if (!WORLD_SAVE_P (info) && info->push_p

61465

@@ -20291,7 +23470,7 @@

61466

info->altivec_save_offset + ptr_off,

61467

0, V4SImode, SAVRES_SAVE | SAVRES_VR);

61468

rs6000_frame_related (insn, scratch_reg, sp_off - ptr_off,

61469

- NULL_RTX, NULL_RTX);

61470

+ NULL_RTX, NULL_RTX, NULL_RTX);

61471

if (REGNO (frame_reg_rtx) == REGNO (scratch_reg))

61472

{

61473

/* The oddity mentioned above clobbered our frame reg. */

61474

@@ -20307,7 +23486,7 @@

61475

for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)

61476

if (info->vrsave_mask & ALTIVEC_REG_BIT (i))

61477

{

61478

- rtx areg, savereg, mem;

61479

+ rtx areg, savereg, mem, split_reg;

61480

int offset;

61481

61482

offset = (info->altivec_save_offset + frame_off

61483

@@ -20325,8 +23504,18 @@

61484

61485

insn = emit_move_insn (mem, savereg);

61486

61487

+ /* When we split a VSX store into two insns, we need to make

61488

+ sure the DWARF info knows which register we are storing.

61489

+ Pass it in to be used on the appropriate note. */

61490

+ if (!BYTES_BIG_ENDIAN

61491

+ && GET_CODE (PATTERN (insn)) == SET

61492

+ && GET_CODE (SET_SRC (PATTERN (insn))) == VEC_SELECT)

61493

+ split_reg = savereg;

61494

+ else

61495

+ split_reg = NULL_RTX;

61496

+

61497

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

61498

- areg, GEN_INT (offset));

61499

+ areg, GEN_INT (offset), split_reg);

61500

}

61501

}

61502

61503

@@ -20350,7 +23539,8 @@

61504

be using r12 as frame_reg_rtx and r11 as the static chain

61505

pointer for nested functions. */

61506

save_regno = 12;

61507

- if (DEFAULT_ABI == ABI_AIX && !using_static_chain_p)

61508

+ if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61509

+ && !using_static_chain_p)

61510

save_regno = 11;

61511

else if (REGNO (frame_reg_rtx) == 12)

61512

{

61513

@@ -20389,7 +23579,7 @@

61514

can use register 0. This allows us to use a plain 'blr' to return

61515

from the procedure more often. */

61516

int save_LR_around_toc_setup = (TARGET_ELF

61517

- && DEFAULT_ABI != ABI_AIX

61518

+ && DEFAULT_ABI == ABI_V4

61519

&& flag_pic

61520

&& ! info->lr_save_p

61521

&& EDGE_COUNT (EXIT_BLOCK_PTR->preds) > 0);

61522

@@ -20451,7 +23641,7 @@

61523

if (rs6000_save_toc_in_prologue_p ())

61524

{

61525

rtx reg = gen_rtx_REG (reg_mode, TOC_REGNUM);

61526

- emit_insn (gen_frame_store (reg, sp_reg_rtx, 5 * reg_size));

61527

+ emit_insn (gen_frame_store (reg, sp_reg_rtx, RS6000_TOC_SAVE_SLOT));

61528

}

61529

}

61530

61531

@@ -20492,6 +23682,49 @@

61532

}

61533

}

61534

61535

+ /* ELFv2 ABI r2 setup code and local entry point. This must follow

61536

+ immediately after the global entry point label. */

61537

+ if (DEFAULT_ABI == ABI_ELFv2 && cfun->machine->r2_setup_needed)

61538

+ {

61539

+ const char *name = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);

61540

+

61541

+ fprintf (file, "0:\taddis 2,12,.TOC.-0b@ha\n");

61542

+ fprintf (file, "\taddi 2,2,.TOC.-0b@l\n");

61543

+

61544

+ fputs ("\t.localentry\t", file);

61545

+ assemble_name (file, name);

61546

+ fputs (",.-", file);

61547

+ assemble_name (file, name);

61548

+ fputs ("\n", file);

61549

+ }

61550

+

61551

+ /* Output -mprofile-kernel code. This needs to be done here instead of

61552

+ in output_function_profile since it must go after the ELFv2 ABI

61553

+ local entry point. */

61554

+ if (TARGET_PROFILE_KERNEL)

61555

+ {

61556

+ gcc_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2);

61557

+ gcc_assert (!TARGET_32BIT);

61558

+

61559

+ asm_fprintf (file, "\tmflr %s\n", reg_names[0]);

61560

+ asm_fprintf (file, "\tstd %s,16(%s)\n", reg_names[0], reg_names[1]);

61561

+

61562

+ /* In the ELFv2 ABI we have no compiler stack word. It must be

61563

+ the resposibility of _mcount to preserve the static chain

61564

+ register if required. */

61565

+ if (DEFAULT_ABI != ABI_ELFv2

61566

+ && cfun->static_chain_decl != NULL)

61567

+ {

61568

+ asm_fprintf (file, "\tstd %s,24(%s)\n",

61569

+ reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

61570

+ fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

61571

+ asm_fprintf (file, "\tld %s,24(%s)\n",

61572

+ reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

61573

+ }

61574

+ else

61575

+ fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

61576

+ }

61577

+

61578

rs6000_pic_labelno++;

61579

}

61580

61581

@@ -20544,6 +23777,7 @@

61582

61583

if (using_mfcr_multiple && count > 1)

61584

{

61585

+ rtx insn;

61586

rtvec p;

61587

int ndx;

61588

61589

@@ -20561,16 +23795,43 @@

61590

gen_rtx_UNSPEC (CCmode, r, UNSPEC_MOVESI_TO_CR));

61591

ndx++;

61592

}

61593

- emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

61594

+ insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

61595

gcc_assert (ndx == count);

61596

+

61597

+ /* For the ELFv2 ABI we generate a CFA_RESTORE for each

61598

+ CR field separately. */

61599

+ if (!exit_func && DEFAULT_ABI == ABI_ELFv2 && flag_shrink_wrap)

61600

+ {

61601

+ for (i = 0; i < 8; i++)

61602

+ if (save_reg_p (CR0_REGNO + i))

61603

+ add_reg_note (insn, REG_CFA_RESTORE,

61604

+ gen_rtx_REG (SImode, CR0_REGNO + i));

61605

+

61606

+ RTX_FRAME_RELATED_P (insn) = 1;

61607

+ }

61608

}

61609

else

61610

for (i = 0; i < 8; i++)

61611

if (save_reg_p (CR0_REGNO + i))

61612

- emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode, CR0_REGNO + i),

61613

- reg));

61614

+ {

61615

+ rtx insn = emit_insn (gen_movsi_to_cr_one

61616

+ (gen_rtx_REG (CCmode, CR0_REGNO + i), reg));

61617

61618

- if (!exit_func && (DEFAULT_ABI == ABI_V4 || flag_shrink_wrap))

61619

+ /* For the ELFv2 ABI we generate a CFA_RESTORE for each

61620

+ CR field separately, attached to the insn that in fact

61621

+ restores this particular CR field. */

61622

+ if (!exit_func && DEFAULT_ABI == ABI_ELFv2 && flag_shrink_wrap)

61623

+ {

61624

+ add_reg_note (insn, REG_CFA_RESTORE,

61625

+ gen_rtx_REG (SImode, CR0_REGNO + i));

61626

+

61627

+ RTX_FRAME_RELATED_P (insn) = 1;

61628

+ }

61629

+ }

61630

+

61631

+ /* For other ABIs, we just generate a single CFA_RESTORE for CR2. */

61632

+ if (!exit_func && DEFAULT_ABI != ABI_ELFv2

61633

+ && (DEFAULT_ABI == ABI_V4 || flag_shrink_wrap))

61634

{

61635

rtx insn = get_last_insn ();

61636

rtx cr = gen_rtx_REG (SImode, CR2_REGNO);

61637

@@ -20611,10 +23872,22 @@

61638

static rtx

61639

add_crlr_cfa_restore (const rs6000_stack_t *info, rtx cfa_restores)

61640

{

61641

- if (info->cr_save_p)

61642

+ if (DEFAULT_ABI == ABI_ELFv2)

61643

+ {

61644

+ int i;

61645

+ for (i = 0; i < 8; i++)

61646

+ if (save_reg_p (CR0_REGNO + i))

61647

+ {

61648

+ rtx cr = gen_rtx_REG (SImode, CR0_REGNO + i);

61649

+ cfa_restores = alloc_reg_note (REG_CFA_RESTORE, cr,

61650

+ cfa_restores);

61651

+ }

61652

+ }

61653

+ else if (info->cr_save_p)

61654

cfa_restores = alloc_reg_note (REG_CFA_RESTORE,

61655

gen_rtx_REG (SImode, CR2_REGNO),

61656

cfa_restores);

61657

+

61658

if (info->lr_save_p)

61659

cfa_restores = alloc_reg_note (REG_CFA_RESTORE,

61660

gen_rtx_REG (Pmode, LR_REGNO),

61661

@@ -21112,6 +24385,35 @@

61662

|| (!restoring_GPRs_inline

61663

&& info->first_fp_reg_save == 64));

61664

61665

+ /* In the ELFv2 ABI we need to restore all call-saved CR fields from

61666

+ *separate* slots if the routine calls __builtin_eh_return, so

61667

+ that they can be independently restored by the unwinder. */

61668

+ if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return)

61669

+ {

61670

+ int i, cr_off = info->ehcr_offset;

61671

+

61672

+ for (i = 0; i < 8; i++)

61673

+ if (!call_used_regs[CR0_REGNO + i])

61674

+ {

61675

+ rtx reg = gen_rtx_REG (SImode, 0);

61676

+ emit_insn (gen_frame_load (reg, frame_reg_rtx,

61677

+ cr_off + frame_off));

61678

+

61679

+ insn = emit_insn (gen_movsi_to_cr_one

61680

+ (gen_rtx_REG (CCmode, CR0_REGNO + i), reg));

61681

+

61682

+ if (!exit_func && flag_shrink_wrap)

61683

+ {

61684

+ add_reg_note (insn, REG_CFA_RESTORE,

61685

+ gen_rtx_REG (SImode, CR0_REGNO + i));

61686

+

61687

+ RTX_FRAME_RELATED_P (insn) = 1;

61688

+ }

61689

+

61690

+ cr_off += reg_size;

61691

+ }

61692

+ }

61693

+

61694

/* Get the old lr if we saved it. If we are restoring registers

61695

out-of-line, then the out-of-line routines can do this for us. */

61696

if (restore_lr && restoring_GPRs_inline)

61697

@@ -21155,7 +24457,7 @@

61698

{

61699

rtx reg = gen_rtx_REG (reg_mode, 2);

61700

emit_insn (gen_frame_load (reg, frame_reg_rtx,

61701

- frame_off + 5 * reg_size));

61702

+ frame_off + RS6000_TOC_SAVE_SLOT));

61703

}

61704

61705

for (i = 0; ; ++i)

61706

@@ -21441,6 +24743,7 @@

61707

if (! restoring_FPRs_inline)

61708

{

61709

int i;

61710

+ int reg;

61711

rtx sym;

61712

61713

if (flag_shrink_wrap)

61714

@@ -21449,10 +24752,9 @@

61715

sym = rs6000_savres_routine_sym (info,

61716

SAVRES_FPR | (lr ? SAVRES_LR : 0));

61717

RTVEC_ELT (p, 2) = gen_rtx_USE (VOIDmode, sym);

61718

- RTVEC_ELT (p, 3) = gen_rtx_USE (VOIDmode,

61719

- gen_rtx_REG (Pmode,

61720

- DEFAULT_ABI == ABI_AIX

61721

- ? 1 : 11));

61722

+ reg = (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)? 1 : 11;

61723

+ RTVEC_ELT (p, 3) = gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, reg));

61724

+

61725

for (i = 0; i < 64 - info->first_fp_reg_save; i++)

61726

{

61727

rtx reg = gen_rtx_REG (DFmode, info->first_fp_reg_save + i);

61728

@@ -21530,7 +24832,8 @@

61729

61730

System V.4 Powerpc's (and the embedded ABI derived from it) use a

61731

different traceback table. */

61732

- if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive

61733

+ if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61734

+ && ! flag_inhibit_size_directive

61735

&& rs6000_traceback != traceback_none && !cfun->is_thunk)

61736

{

61737

const char *fname = NULL;

61738

@@ -21858,6 +25161,12 @@

61739

SIBLING_CALL_P (insn) = 1;

61740

emit_barrier ();

61741

61742

+ /* Ensure we have a global entry point for the thunk. ??? We could

61743

+ avoid that if the target routine doesn't need a global entry point,

61744

+ but we do not know whether this is the case at this point. */

61745

+ if (DEFAULT_ABI == ABI_ELFv2)

61746

+ cfun->machine->r2_setup_needed = true;

61747

+

61748

/* Run just enough of rest_of_compilation to get the insns emitted.

61749

There's not really enough bulk here to make other passes such as

61750

instruction scheduling worth while. Note that use_thunk calls

61751

@@ -22554,7 +25863,7 @@

61752

if (TARGET_PROFILE_KERNEL)

61753

return;

61754

61755

- if (DEFAULT_ABI == ABI_AIX)

61756

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61757

{

61758

#ifndef NO_PROFILE_COUNTERS

61759

# define NO_PROFILE_COUNTERS 0

61760

@@ -22698,29 +26007,9 @@

61761

break;

61762

61763

case ABI_AIX:

61764

+ case ABI_ELFv2:

61765

case ABI_DARWIN:

61766

- if (!TARGET_PROFILE_KERNEL)

61767

- {

61768

- /* Don't do anything, done in output_profile_hook (). */

61769

- }

61770

- else

61771

- {

61772

- gcc_assert (!TARGET_32BIT);

61773

-

61774

- asm_fprintf (file, "\tmflr %s\n", reg_names[0]);

61775

- asm_fprintf (file, "\tstd %s,16(%s)\n", reg_names[0], reg_names[1]);

61776

-

61777

- if (cfun->static_chain_decl != NULL)

61778

- {

61779

- asm_fprintf (file, "\tstd %s,24(%s)\n",

61780

- reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

61781

- fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

61782

- asm_fprintf (file, "\tld %s,24(%s)\n",

61783

- reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

61784

- }

61785

- else

61786

- fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

61787

- }

61788

+ /* Don't do anything, done in output_profile_hook (). */

61789

break;

61790

}

61791

}

61792

@@ -22846,6 +26135,7 @@

61793

|| rs6000_cpu_attr == CPU_POWER4

61794

|| rs6000_cpu_attr == CPU_POWER5

61795

|| rs6000_cpu_attr == CPU_POWER7

61796

+ || rs6000_cpu_attr == CPU_POWER8

61797

|| rs6000_cpu_attr == CPU_CELL)

61798

&& recog_memoized (dep_insn)

61799

&& (INSN_CODE (dep_insn) >= 0))

61800

@@ -23128,7 +26418,8 @@

61801

if (rs6000_cpu_attr == CPU_CELL)

61802

return get_attr_cell_micro (insn) == CELL_MICRO_ALWAYS;

61803

61804

- if (rs6000_sched_groups)

61805

+ if (rs6000_sched_groups

61806

+ && (rs6000_cpu == PROCESSOR_POWER4 || rs6000_cpu == PROCESSOR_POWER5))

61807

{

61808

enum attr_type type = get_attr_type (insn);

61809

if (type == TYPE_LOAD_EXT_U

61810

@@ -23153,7 +26444,8 @@

61811

|| GET_CODE (PATTERN (insn)) == CLOBBER)

61812

return false;

61813

61814

- if (rs6000_sched_groups)

61815

+ if (rs6000_sched_groups

61816

+ && (rs6000_cpu == PROCESSOR_POWER4 || rs6000_cpu == PROCESSOR_POWER5))

61817

{

61818

enum attr_type type = get_attr_type (insn);

61819

if (type == TYPE_LOAD_U || type == TYPE_STORE_U

61820

@@ -23432,6 +26724,8 @@

61821

case CPU_POWER6:

61822

case CPU_POWER7:

61823

return 5;

61824

+ case CPU_POWER8:

61825

+ return 7;

61826

default:

61827

return 1;

61828

}

61829

@@ -24059,6 +27353,39 @@

61830

break;

61831

}

61832

break;

61833

+ case PROCESSOR_POWER8:

61834

+ type = get_attr_type (insn);

61835

+

61836

+ switch (type)

61837

+ {

61838

+ case TYPE_CR_LOGICAL:

61839

+ case TYPE_DELAYED_CR:

61840

+ case TYPE_MFCR:

61841

+ case TYPE_MFCRF:

61842

+ case TYPE_MTCR:

61843

+ case TYPE_COMPARE:

61844

+ case TYPE_DELAYED_COMPARE:

61845

+ case TYPE_VAR_DELAYED_COMPARE:

61846

+ case TYPE_IMUL_COMPARE:

61847

+ case TYPE_LMUL_COMPARE:

61848

+ case TYPE_SYNC:

61849

+ case TYPE_ISYNC:

61850

+ case TYPE_LOAD_L:

61851

+ case TYPE_STORE_C:

61852

+ case TYPE_LOAD_U:

61853

+ case TYPE_LOAD_UX:

61854

+ case TYPE_LOAD_EXT:

61855

+ case TYPE_LOAD_EXT_U:

61856

+ case TYPE_LOAD_EXT_UX:

61857

+ case TYPE_STORE_UX:

61858

+ case TYPE_VECSTORE:

61859

+ case TYPE_MFJMPR:

61860

+ case TYPE_MTJMPR:

61861

+ return true;

61862

+ default:

61863

+ break;

61864

+ }

61865

+ break;

61866

default:

61867

break;

61868

}

61869

@@ -24137,6 +27464,25 @@

61870

break;

61871

}

61872

break;

61873

+ case PROCESSOR_POWER8:

61874

+ type = get_attr_type (insn);

61875

+

61876

+ switch (type)

61877

+ {

61878

+ case TYPE_MFCR:

61879

+ case TYPE_MTCR:

61880

+ case TYPE_ISYNC:

61881

+ case TYPE_SYNC:

61882

+ case TYPE_LOAD_L:

61883

+ case TYPE_STORE_C:

61884

+ case TYPE_LOAD_EXT_U:

61885

+ case TYPE_LOAD_EXT_UX:

61886

+ case TYPE_STORE_UX:

61887

+ return true;

61888

+ default:

61889

+ break;

61890

+ }

61891

+ break;

61892

default:

61893

break;

61894

}

61895

@@ -24226,8 +27572,9 @@

61896

if (can_issue_more && !is_branch_slot_insn (next_insn))

61897

can_issue_more--;

61898

61899

- /* Power6 and Power7 have special group ending nop. */

61900

- if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7)

61901

+ /* Do we have a special group ending nop? */

61902

+ if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7

61903

+ || rs6000_cpu_attr == CPU_POWER8)

61904

{

61905

nop = gen_group_ending_nop ();

61906

emit_insn_before (nop, next_insn);

61907

@@ -24598,6 +27945,11 @@

61908

ret = (TARGET_32BIT) ? 12 : 24;

61909

break;

61910

61911

+ case ABI_ELFv2:

61912

+ gcc_assert (!TARGET_32BIT);

61913

+ ret = 32;

61914

+ break;

61915

+

61916

case ABI_DARWIN:

61917

case ABI_V4:

61918

ret = (TARGET_32BIT) ? 40 : 48;

61919

@@ -24653,6 +28005,7 @@

61920

break;

61921

61922

/* Under V.4/eabi/darwin, __trampoline_setup does the real work. */

61923

+ case ABI_ELFv2:

61924

case ABI_DARWIN:

61925

case ABI_V4:

61926

emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__trampoline_setup"),

61927

@@ -24743,6 +28096,9 @@

61928

unsigned_p = TYPE_UNSIGNED (type);

61929

switch (mode)

61930

{

61931

+ case TImode:

61932

+ result = (unsigned_p ? unsigned_V1TI_type_node : V1TI_type_node);

61933

+ break;

61934

case DImode:

61935

result = (unsigned_p ? unsigned_V2DI_type_node : V2DI_type_node);

61936

break;

61937

@@ -24947,7 +28303,7 @@

61938

static void

61939

rs6000_elf_output_toc_section_asm_op (const void *data ATTRIBUTE_UNUSED)

61940

{

61941

- if (DEFAULT_ABI == ABI_AIX

61942

+ if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61943

&& TARGET_MINIMAL_TOC

61944

&& !TARGET_RELOCATABLE)

61945

{

61946

@@ -24968,7 +28324,8 @@

61947

else

61948

fprintf (asm_out_file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP);

61949

}

61950

- else if (DEFAULT_ABI == ABI_AIX && !TARGET_RELOCATABLE)

61951

+ else if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61952

+ && !TARGET_RELOCATABLE)

61953

fprintf (asm_out_file, "%s\n", TOC_SECTION_ASM_OP);

61954

else

61955

{

61956

@@ -25518,7 +28875,7 @@

61957

{

61958

if (flag_pic)

61959

return 3;

61960

- else if (DEFAULT_ABI == ABI_AIX)

61961

+ else if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61962

return 2;

61963

else

61964

return 0;

61965

@@ -25594,7 +28951,7 @@

61966

void

61967

rs6000_elf_declare_function_name (FILE *file, const char *name, tree decl)

61968

{

61969

- if (TARGET_64BIT)

61970

+ if (TARGET_64BIT && DEFAULT_ABI != ABI_ELFv2)

61971

{

61972

fputs ("\t.section\t\".opd\",\"aw\"\n\t.align 3\n", file);

61973

ASM_OUTPUT_LABEL (file, name);

61974

@@ -25660,8 +29017,7 @@

61975

fprintf (file, "%s:\n", desc_name);

61976

fprintf (file, "\t.long %s\n", orig_name);

61977

fputs ("\t.long _GLOBAL_OFFSET_TABLE_\n", file);

61978

- if (DEFAULT_ABI == ABI_AIX)

61979

- fputs ("\t.long 0\n", file);

61980

+ fputs ("\t.long 0\n", file);

61981

fprintf (file, "\t.previous\n");

61982

}

61983

ASM_OUTPUT_LABEL (file, name);

61984

@@ -25690,7 +29046,7 @@

61985

}

61986

#endif

61987

#if defined (POWERPC_LINUX) || defined (POWERPC_FREEBSD)

61988

- if (TARGET_32BIT)

61989

+ if (TARGET_32BIT || DEFAULT_ABI == ABI_ELFv2)

61990

file_end_indicate_exec_stack ();

61991

#endif

61992

}

61993

@@ -25829,10 +29185,23 @@

61994

name, suffix[smclass], flags & SECTION_ENTSIZE);

61995

}

61996

61997

+#define IN_NAMED_SECTION(DECL) \

61998

+ ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \

61999

+ && DECL_SECTION_NAME (DECL) != NULL_TREE)

62000

+

62001

static section *

62002

rs6000_xcoff_select_section (tree decl, int reloc,

62003

- unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)

62004

+ unsigned HOST_WIDE_INT align)

62005

{

62006

+ /* Place variables with alignment stricter than BIGGEST_ALIGNMENT into

62007

+ named section. */

62008

+ if (align > BIGGEST_ALIGNMENT)

62009

+ {

62010

+ resolve_unique_section (decl, reloc, true);

62011

+ if (IN_NAMED_SECTION (decl))

62012

+ return get_named_section (decl, NULL, reloc);

62013

+ }

62014

+

62015

if (decl_readonly_section (decl, reloc))

62016

{

62017

if (TREE_PUBLIC (decl))

62018

@@ -25870,10 +29239,12 @@

62019

{

62020

const char *name;

62021

62022

- /* Use select_section for private and uninitialized data. */

62023

+ /* Use select_section for private data and uninitialized data with

62024

+ alignment <= BIGGEST_ALIGNMENT. */

62025

if (!TREE_PUBLIC (decl)

62026

|| DECL_COMMON (decl)

62027

- || DECL_INITIAL (decl) == NULL_TREE

62028

+ || (DECL_INITIAL (decl) == NULL_TREE

62029

+ && DECL_ALIGN (decl) <= BIGGEST_ALIGNMENT)

62030

|| DECL_INITIAL (decl) == error_mark_node

62031

|| (flag_zero_initialized_in_bss

62032

&& initializer_zerop (DECL_INITIAL (decl))))

62033

@@ -26430,7 +29801,8 @@

62034

/* For those processors that have slow LR/CTR moves, make them more

62035

expensive than memory in order to bias spills to memory .*/

62036

else if ((rs6000_cpu == PROCESSOR_POWER6

62037

- || rs6000_cpu == PROCESSOR_POWER7)

62038

+ || rs6000_cpu == PROCESSOR_POWER7

62039

+ || rs6000_cpu == PROCESSOR_POWER8)

62040

&& reg_classes_intersect_p (rclass, LINK_OR_CTR_REGS))

62041

ret = 6 * hard_regno_nregs[0][mode];

62042

62043

@@ -26440,7 +29812,7 @@

62044

}

62045

62046

/* If we have VSX, we can easily move between FPR or Altivec registers. */

62047

- else if (VECTOR_UNIT_VSX_P (mode)

62048

+ else if (VECTOR_MEM_VSX_P (mode)

62049

&& reg_classes_intersect_p (to, VSX_REGS)

62050

&& reg_classes_intersect_p (from, VSX_REGS))

62051

ret = 2 * hard_regno_nregs[32][mode];

62052

@@ -26481,7 +29853,8 @@

62053

62054

if (reg_classes_intersect_p (rclass, GENERAL_REGS))

62055

ret = 4 * hard_regno_nregs[0][mode];

62056

- else if (reg_classes_intersect_p (rclass, FLOAT_REGS))

62057

+ else if ((reg_classes_intersect_p (rclass, FLOAT_REGS)

62058

+ || reg_classes_intersect_p (rclass, VSX_REGS)))

62059

ret = 4 * hard_regno_nregs[32][mode];

62060

else if (reg_classes_intersect_p (rclass, ALTIVEC_REGS))

62061

ret = 4 * hard_regno_nregs[FIRST_ALTIVEC_REGNO][mode];

62062

@@ -26643,54 +30016,26 @@

62063

emit_insn (gen_rtx_SET (VOIDmode, dst, r));

62064

}

62065

62066

-/* Newton-Raphson approximation of floating point divide with just 2 passes

62067

- (either single precision floating point, or newer machines with higher

62068

- accuracy estimates). Support both scalar and vector divide. Assumes no

62069

- trapping math and finite arguments. */

62070

+/* Newton-Raphson approximation of floating point divide DST = N/D. If NOTE_P,

62071

+ add a reg_note saying that this was a division. Support both scalar and

62072

+ vector divide. Assumes no trapping math and finite arguments. */

62073

62074

-static void

62075

-rs6000_emit_swdiv_high_precision (rtx dst, rtx n, rtx d)

62076

+void

62077

+rs6000_emit_swdiv (rtx dst, rtx n, rtx d, bool note_p)

62078

{

62079

enum machine_mode mode = GET_MODE (dst);

62080

- rtx x0, e0, e1, y1, u0, v0;

62081

- enum insn_code code = optab_handler (smul_optab, mode);

62082

- insn_gen_fn gen_mul = GEN_FCN (code);

62083

- rtx one = rs6000_load_constant_and_splat (mode, dconst1);

62084

+ rtx one, x0, e0, x1, xprev, eprev, xnext, enext, u, v;

62085

+ int i;

62086

62087

- gcc_assert (code != CODE_FOR_nothing);

62088

+ /* Low precision estimates guarantee 5 bits of accuracy. High

62089

+ precision estimates guarantee 14 bits of accuracy. SFmode

62090

+ requires 23 bits of accuracy. DFmode requires 52 bits of

62091

+ accuracy. Each pass at least doubles the accuracy, leading

62092

+ to the following. */

62093

+ int passes = (TARGET_RECIP_PRECISION) ? 1 : 3;

62094

+ if (mode == DFmode || mode == V2DFmode)

62095

+ passes++;

62096

62097

- /* x0 = 1./d estimate */

62098

- x0 = gen_reg_rtx (mode);

62099

- emit_insn (gen_rtx_SET (VOIDmode, x0,

62100

- gen_rtx_UNSPEC (mode, gen_rtvec (1, d),

62101

- UNSPEC_FRES)));

62102

-

62103

- e0 = gen_reg_rtx (mode);

62104

- rs6000_emit_nmsub (e0, d, x0, one); /* e0 = 1. - (d * x0) */

62105

-

62106

- e1 = gen_reg_rtx (mode);

62107

- rs6000_emit_madd (e1, e0, e0, e0); /* e1 = (e0 * e0) + e0 */

62108

-

62109

- y1 = gen_reg_rtx (mode);

62110

- rs6000_emit_madd (y1, e1, x0, x0); /* y1 = (e1 * x0) + x0 */

62111

-

62112

- u0 = gen_reg_rtx (mode);

62113

- emit_insn (gen_mul (u0, n, y1)); /* u0 = n * y1 */

62114

-

62115

- v0 = gen_reg_rtx (mode);

62116

- rs6000_emit_nmsub (v0, d, u0, n); /* v0 = n - (d * u0) */

62117

-

62118

- rs6000_emit_madd (dst, v0, y1, u0); /* dst = (v0 * y1) + u0 */

62119

-}

62120

-

62121

-/* Newton-Raphson approximation of floating point divide that has a low

62122

- precision estimate. Assumes no trapping math and finite arguments. */

62123

-

62124

-static void

62125

-rs6000_emit_swdiv_low_precision (rtx dst, rtx n, rtx d)

62126

-{

62127

- enum machine_mode mode = GET_MODE (dst);

62128

- rtx x0, e0, e1, e2, y1, y2, y3, u0, v0, one;

62129

enum insn_code code = optab_handler (smul_optab, mode);

62130

insn_gen_fn gen_mul = GEN_FCN (code);

62131

62132

@@ -26704,47 +30049,45 @@

62133

gen_rtx_UNSPEC (mode, gen_rtvec (1, d),

62134

UNSPEC_FRES)));

62135

62136

- e0 = gen_reg_rtx (mode);

62137

- rs6000_emit_nmsub (e0, d, x0, one); /* e0 = 1. - d * x0 */

62138

+ /* Each iteration but the last calculates x_(i+1) = x_i * (2 - d * x_i). */

62139

+ if (passes > 1) {

62140

62141

- y1 = gen_reg_rtx (mode);

62142

- rs6000_emit_madd (y1, e0, x0, x0); /* y1 = x0 + e0 * x0 */

62143

+ /* e0 = 1. - d * x0 */

62144

+ e0 = gen_reg_rtx (mode);

62145

+ rs6000_emit_nmsub (e0, d, x0, one);

62146

62147

- e1 = gen_reg_rtx (mode);

62148

- emit_insn (gen_mul (e1, e0, e0)); /* e1 = e0 * e0 */

62149

+ /* x1 = x0 + e0 * x0 */

62150

+ x1 = gen_reg_rtx (mode);

62151

+ rs6000_emit_madd (x1, e0, x0, x0);

62152

62153

- y2 = gen_reg_rtx (mode);

62154

- rs6000_emit_madd (y2, e1, y1, y1); /* y2 = y1 + e1 * y1 */

62155

+ for (i = 0, xprev = x1, eprev = e0; i < passes - 2;

62156

+ ++i, xprev = xnext, eprev = enext) {

62157

+

62158

+ /* enext = eprev * eprev */

62159

+ enext = gen_reg_rtx (mode);

62160

+ emit_insn (gen_mul (enext, eprev, eprev));

62161

62162

- e2 = gen_reg_rtx (mode);

62163

- emit_insn (gen_mul (e2, e1, e1)); /* e2 = e1 * e1 */

62164

+ /* xnext = xprev + enext * xprev */

62165

+ xnext = gen_reg_rtx (mode);

62166

+ rs6000_emit_madd (xnext, enext, xprev, xprev);

62167

+ }

62168

62169

- y3 = gen_reg_rtx (mode);

62170

- rs6000_emit_madd (y3, e2, y2, y2); /* y3 = y2 + e2 * y2 */

62171

+ } else

62172

+ xprev = x0;

62173

62174

- u0 = gen_reg_rtx (mode);

62175

- emit_insn (gen_mul (u0, n, y3)); /* u0 = n * y3 */

62176

+ /* The last iteration calculates x_(i+1) = n * x_i * (2 - d * x_i). */

62177

62178

- v0 = gen_reg_rtx (mode);

62179

- rs6000_emit_nmsub (v0, d, u0, n); /* v0 = n - d * u0 */

62180

+ /* u = n * xprev */

62181

+ u = gen_reg_rtx (mode);

62182

+ emit_insn (gen_mul (u, n, xprev));

62183

62184

- rs6000_emit_madd (dst, v0, y3, u0); /* dst = u0 + v0 * y3 */

62185

-}

62186

+ /* v = n - (d * u) */

62187

+ v = gen_reg_rtx (mode);

62188

+ rs6000_emit_nmsub (v, d, u, n);

62189

62190

-/* Newton-Raphson approximation of floating point divide DST = N/D. If NOTE_P,

62191

- add a reg_note saying that this was a division. Support both scalar and

62192

- vector divide. Assumes no trapping math and finite arguments. */

62193

+ /* dst = (v * xprev) + u */

62194

+ rs6000_emit_madd (dst, v, xprev, u);

62195

62196

-void

62197

-rs6000_emit_swdiv (rtx dst, rtx n, rtx d, bool note_p)

62198

-{

62199

- enum machine_mode mode = GET_MODE (dst);

62200

-

62201

- if (RS6000_RECIP_HIGH_PRECISION_P (mode))

62202

- rs6000_emit_swdiv_high_precision (dst, n, d);

62203

- else

62204

- rs6000_emit_swdiv_low_precision (dst, n, d);

62205

-

62206

if (note_p)

62207

add_reg_note (get_last_insn (), REG_EQUAL, gen_rtx_DIV (mode, n, d));

62208

}

62209

@@ -26758,7 +30101,16 @@

62210

enum machine_mode mode = GET_MODE (src);

62211

rtx x0 = gen_reg_rtx (mode);

62212

rtx y = gen_reg_rtx (mode);

62213

- int passes = (TARGET_RECIP_PRECISION) ? 2 : 3;

62214

+

62215

+ /* Low precision estimates guarantee 5 bits of accuracy. High

62216

+ precision estimates guarantee 14 bits of accuracy. SFmode

62217

+ requires 23 bits of accuracy. DFmode requires 52 bits of

62218

+ accuracy. Each pass at least doubles the accuracy, leading

62219

+ to the following. */

62220

+ int passes = (TARGET_RECIP_PRECISION) ? 1 : 3;

62221

+ if (mode == DFmode || mode == V2DFmode)

62222

+ passes++;

62223

+

62224

REAL_VALUE_TYPE dconst3_2;

62225

int i;

62226

rtx halfthree;

62227

@@ -26920,6 +30272,136 @@

62228

}

62229

}

62230

62231

+/* Expand an Altivec constant permutation for little endian mode.

62232

+ There are two issues: First, the two input operands must be

62233

+ swapped so that together they form a double-wide array in LE

62234

+ order. Second, the vperm instruction has surprising behavior

62235

+ in LE mode: it interprets the elements of the source vectors

62236

+ in BE mode ("left to right") and interprets the elements of

62237

+ the destination vector in LE mode ("right to left"). To

62238

+ correct for this, we must subtract each element of the permute

62239

+ control vector from 31.

62240

+

62241

+ For example, suppose we want to concatenate vr10 = {0, 1, 2, 3}

62242

+ with vr11 = {4, 5, 6, 7} and extract {0, 2, 4, 6} using a vperm.

62243

+ We place {0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27} in vr12 to

62244

+ serve as the permute control vector. Then, in BE mode,

62245

+

62246

+ vperm 9,10,11,12

62247

+

62248

+ places the desired result in vr9. However, in LE mode the

62249

+ vector contents will be

62250

+

62251

+ vr10 = 00000003 00000002 00000001 00000000

62252

+ vr11 = 00000007 00000006 00000005 00000004

62253

+

62254

+ The result of the vperm using the same permute control vector is

62255

+

62256

+ vr9 = 05000000 07000000 01000000 03000000

62257

+

62258

+ That is, the leftmost 4 bytes of vr10 are interpreted as the

62259

+ source for the rightmost 4 bytes of vr9, and so on.

62260

+

62261

+ If we change the permute control vector to

62262

+

62263

+ vr12 = {31,20,29,28,23,22,21,20,15,14,13,12,7,6,5,4}

62264

+

62265

+ and issue

62266

+

62267

+ vperm 9,11,10,12

62268

+

62269

+ we get the desired

62270

+

62271

+ vr9 = 00000006 00000004 00000002 00000000. */

62272

+

62273

+void

62274

+altivec_expand_vec_perm_const_le (rtx operands[4])

62275

+{

62276

+ unsigned int i;

62277

+ rtx perm[16];

62278

+ rtx constv, unspec;

62279

+ rtx target = operands[0];

62280

+ rtx op0 = operands[1];

62281

+ rtx op1 = operands[2];

62282

+ rtx sel = operands[3];

62283

+

62284

+ /* Unpack and adjust the constant selector. */

62285

+ for (i = 0; i < 16; ++i)

62286

+ {

62287

+ rtx e = XVECEXP (sel, 0, i);

62288

+ unsigned int elt = 31 - (INTVAL (e) & 31);

62289

+ perm[i] = GEN_INT (elt);

62290

+ }

62291

+

62292

+ /* Expand to a permute, swapping the inputs and using the

62293

+ adjusted selector. */

62294

+ if (!REG_P (op0))

62295

+ op0 = force_reg (V16QImode, op0);

62296

+ if (!REG_P (op1))

62297

+ op1 = force_reg (V16QImode, op1);

62298

+

62299

+ constv = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm));

62300

+ constv = force_reg (V16QImode, constv);

62301

+ unspec = gen_rtx_UNSPEC (V16QImode, gen_rtvec (3, op1, op0, constv),

62302

+ UNSPEC_VPERM);

62303

+ if (!REG_P (target))

62304

+ {

62305

+ rtx tmp = gen_reg_rtx (V16QImode);

62306

+ emit_move_insn (tmp, unspec);

62307

+ unspec = tmp;

62308

+ }

62309

+

62310

+ emit_move_insn (target, unspec);

62311

+}

62312

+

62313

+/* Similarly to altivec_expand_vec_perm_const_le, we must adjust the

62314

+ permute control vector. But here it's not a constant, so we must

62315

+ generate a vector NAND or NOR to do the adjustment. */

62316

+

62317

+void

62318

+altivec_expand_vec_perm_le (rtx operands[4])

62319

+{

62320

+ rtx notx, iorx, unspec;

62321

+ rtx target = operands[0];

62322

+ rtx op0 = operands[1];

62323

+ rtx op1 = operands[2];

62324

+ rtx sel = operands[3];

62325

+ rtx tmp = target;

62326

+ rtx norreg = gen_reg_rtx (V16QImode);

62327

+ enum machine_mode mode = GET_MODE (target);

62328

+

62329

+ /* Get everything in regs so the pattern matches. */

62330

+ if (!REG_P (op0))

62331

+ op0 = force_reg (mode, op0);

62332

+ if (!REG_P (op1))

62333

+ op1 = force_reg (mode, op1);

62334

+ if (!REG_P (sel))

62335

+ sel = force_reg (V16QImode, sel);

62336

+ if (!REG_P (target))

62337

+ tmp = gen_reg_rtx (mode);

62338

+

62339

+ /* Invert the selector with a VNAND if available, else a VNOR.

62340

+ The VNAND is preferred for future fusion opportunities. */

62341

+ notx = gen_rtx_NOT (V16QImode, sel);

62342

+ iorx = (TARGET_P8_VECTOR

62343

+ ? gen_rtx_IOR (V16QImode, notx, notx)

62344

+ : gen_rtx_AND (V16QImode, notx, notx));

62345

+ emit_insn (gen_rtx_SET (VOIDmode, norreg, iorx));

62346

+

62347

+ /* Permute with operands reversed and adjusted selector. */

62348

+ unspec = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op0, norreg),

62349

+ UNSPEC_VPERM);

62350

+

62351

+ /* Copy into target, possibly by way of a register. */

62352

+ if (!REG_P (target))

62353

+ {

62354

+ emit_move_insn (tmp, unspec);

62355

+ unspec = tmp;

62356

+ }

62357

+

62358

+ emit_move_insn (target, unspec);

62359

+}

62360

+

62361

/* Expand an Altivec constant permutation. Return true if we match

62362

an efficient implementation; false to fall back to VPERM. */

62363

62364

@@ -26927,26 +30409,43 @@

62365

altivec_expand_vec_perm_const (rtx operands[4])

62366

{

62367

struct altivec_perm_insn {

62368

+ HOST_WIDE_INT mask;

62369

enum insn_code impl;

62370

unsigned char perm[16];

62371

};

62372

static const struct altivec_perm_insn patterns[] = {

62373

- { CODE_FOR_altivec_vpkuhum,

62374

+ { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuhum_direct,

62375

{ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 } },

62376

- { CODE_FOR_altivec_vpkuwum,

62377

+ { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuwum_direct,

62378

{ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 } },

62379

- { CODE_FOR_altivec_vmrghb,

62380

+ { OPTION_MASK_ALTIVEC,

62381

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghb_direct

62382

+ : CODE_FOR_altivec_vmrglb_direct),

62383

{ 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23 } },

62384

- { CODE_FOR_altivec_vmrghh,

62385

+ { OPTION_MASK_ALTIVEC,

62386

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghh_direct

62387

+ : CODE_FOR_altivec_vmrglh_direct),

62388

{ 0, 1, 16, 17, 2, 3, 18, 19, 4, 5, 20, 21, 6, 7, 22, 23 } },

62389

- { CODE_FOR_altivec_vmrghw,

62390

+ { OPTION_MASK_ALTIVEC,

62391

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghw_direct

62392

+ : CODE_FOR_altivec_vmrglw_direct),

62393

{ 0, 1, 2, 3, 16, 17, 18, 19, 4, 5, 6, 7, 20, 21, 22, 23 } },

62394

- { CODE_FOR_altivec_vmrglb,

62395

+ { OPTION_MASK_ALTIVEC,

62396

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglb_direct

62397

+ : CODE_FOR_altivec_vmrghb_direct),

62398

{ 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31 } },

62399

- { CODE_FOR_altivec_vmrglh,

62400

+ { OPTION_MASK_ALTIVEC,

62401

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglh_direct

62402

+ : CODE_FOR_altivec_vmrghh_direct),

62403

{ 8, 9, 24, 25, 10, 11, 26, 27, 12, 13, 28, 29, 14, 15, 30, 31 } },

62404

- { CODE_FOR_altivec_vmrglw,

62405

- { 8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31 } }

62406

+ { OPTION_MASK_ALTIVEC,

62407

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglw_direct

62408

+ : CODE_FOR_altivec_vmrghw_direct),

62409

+ { 8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31 } },

62410

+ { OPTION_MASK_P8_VECTOR, CODE_FOR_p8_vmrgew,

62411

+ { 0, 1, 2, 3, 16, 17, 18, 19, 8, 9, 10, 11, 24, 25, 26, 27 } },

62412

+ { OPTION_MASK_P8_VECTOR, CODE_FOR_p8_vmrgow,

62413

+ { 4, 5, 6, 7, 20, 21, 22, 23, 12, 13, 14, 15, 28, 29, 30, 31 } }

62414

};

62415

62416

unsigned int i, j, elt, which;

62417

@@ -27003,7 +30502,9 @@

62418

break;

62419

if (i == 16)

62420

{

62421

- emit_insn (gen_altivec_vspltb (target, op0, GEN_INT (elt)));

62422

+ if (!BYTES_BIG_ENDIAN)

62423

+ elt = 15 - elt;

62424

+ emit_insn (gen_altivec_vspltb_direct (target, op0, GEN_INT (elt)));

62425

return true;

62426

}

62427

62428

@@ -27014,9 +30515,10 @@

62429

break;

62430

if (i == 16)

62431

{

62432

+ int field = BYTES_BIG_ENDIAN ? elt / 2 : 7 - elt / 2;

62433

x = gen_reg_rtx (V8HImode);

62434

- emit_insn (gen_altivec_vsplth (x, gen_lowpart (V8HImode, op0),

62435

- GEN_INT (elt / 2)));

62436

+ emit_insn (gen_altivec_vsplth_direct (x, gen_lowpart (V8HImode, op0),

62437

+ GEN_INT (field)));

62438

emit_move_insn (target, gen_lowpart (V16QImode, x));

62439

return true;

62440

}

62441

@@ -27032,9 +30534,10 @@

62442

break;

62443

if (i == 16)

62444

{

62445

+ int field = BYTES_BIG_ENDIAN ? elt / 4 : 3 - elt / 4;

62446

x = gen_reg_rtx (V4SImode);

62447

- emit_insn (gen_altivec_vspltw (x, gen_lowpart (V4SImode, op0),

62448

- GEN_INT (elt / 4)));

62449

+ emit_insn (gen_altivec_vspltw_direct (x, gen_lowpart (V4SImode, op0),

62450

+ GEN_INT (field)));

62451

emit_move_insn (target, gen_lowpart (V16QImode, x));

62452

return true;

62453

}

62454

@@ -27046,6 +30549,9 @@

62455

{

62456

bool swapped;

62457

62458

+ if ((patterns[j].mask & rs6000_isa_flags) == 0)

62459

+ continue;

62460

+

62461

elt = patterns[j].perm[0];

62462

if (perm[0] == elt)

62463

swapped = false;

62464

@@ -27069,7 +30575,30 @@

62465

enum machine_mode omode = insn_data[icode].operand[0].mode;

62466

enum machine_mode imode = insn_data[icode].operand[1].mode;

62467

62468

- if (swapped)

62469

+ /* For little-endian, don't use vpkuwum and vpkuhum if the

62470

+ underlying vector type is not V4SI and V8HI, respectively.

62471

+ For example, using vpkuwum with a V8HI picks up the even

62472

+ halfwords (BE numbering) when the even halfwords (LE

62473

+ numbering) are what we need. */

62474

+ if (!BYTES_BIG_ENDIAN

62475

+ && icode == CODE_FOR_altivec_vpkuwum_direct

62476

+ && ((GET_CODE (op0) == REG

62477

+ && GET_MODE (op0) != V4SImode)

62478

+ || (GET_CODE (op0) == SUBREG

62479

+ && GET_MODE (XEXP (op0, 0)) != V4SImode)))

62480

+ continue;

62481

+ if (!BYTES_BIG_ENDIAN

62482

+ && icode == CODE_FOR_altivec_vpkuhum_direct

62483

+ && ((GET_CODE (op0) == REG

62484

+ && GET_MODE (op0) != V8HImode)

62485

+ || (GET_CODE (op0) == SUBREG

62486

+ && GET_MODE (XEXP (op0, 0)) != V8HImode)))

62487

+ continue;

62488

+

62489

+ /* For little-endian, the two input operands must be swapped

62490

+ (or swapped back) to ensure proper right-to-left numbering

62491

+ from 0 to 2N-1. */

62492

+ if (swapped ^ !BYTES_BIG_ENDIAN)

62493

x = op0, op0 = op1, op1 = x;

62494

if (imode != V16QImode)

62495

{

62496

@@ -27087,6 +30616,12 @@

62497

}

62498

}

62499

62500

+ if (!BYTES_BIG_ENDIAN)

62501

+ {

62502

+ altivec_expand_vec_perm_const_le (operands);

62503

+ return true;

62504

+ }

62505

+

62506

return false;

62507

}

62508

62509

@@ -27135,7 +30670,6 @@

62510

vmode = GET_MODE (target);

62511

gcc_assert (GET_MODE_NUNITS (vmode) == 2);

62512

dmode = mode_for_vector (GET_MODE_INNER (vmode), 4);

62513

-

62514

x = gen_rtx_VEC_CONCAT (dmode, op0, op1);

62515

v = gen_rtvec (2, GEN_INT (perm0), GEN_INT (perm1));

62516

x = gen_rtx_VEC_SELECT (vmode, x, gen_rtx_PARALLEL (VOIDmode, v));

62517

@@ -27231,7 +30765,7 @@

62518

unsigned i, high, nelt = GET_MODE_NUNITS (vmode);

62519

rtx perm[16];

62520

62521

- high = (highp == BYTES_BIG_ENDIAN ? 0 : nelt / 2);

62522

+ high = (highp ? 0 : nelt / 2);

62523

for (i = 0; i < nelt / 2; i++)

62524

{

62525

perm[i * 2] = GEN_INT (i + high);

62526

@@ -27286,6 +30820,8 @@

62527

{

62528

enum machine_mode mode;

62529

unsigned int regno;

62530

+ enum machine_mode elt_mode;

62531

+ int n_elts;

62532

62533

/* Special handling for structs in darwin64. */

62534

if (TARGET_MACHO

62535

@@ -27305,6 +30841,36 @@

62536

/* Otherwise fall through to standard ABI rules. */

62537

}

62538

62539

+ /* The ELFv2 ABI returns homogeneous VFP aggregates in registers. */

62540

+ if (rs6000_discover_homogeneous_aggregate (TYPE_MODE (valtype), valtype,

62541

+ &elt_mode, &n_elts))

62542

+ {

62543

+ int first_reg, n_regs, i;

62544

+ rtx par;

62545

+

62546

+ if (SCALAR_FLOAT_MODE_P (elt_mode))

62547

+ {

62548

+ /* _Decimal128 must use even/odd register pairs. */

62549

+ first_reg = (elt_mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN;

62550

+ n_regs = (GET_MODE_SIZE (elt_mode) + 7) >> 3;

62551

+ }

62552

+ else

62553

+ {

62554

+ first_reg = ALTIVEC_ARG_RETURN;

62555

+ n_regs = 1;

62556

+ }

62557

+

62558

+ par = gen_rtx_PARALLEL (TYPE_MODE (valtype), rtvec_alloc (n_elts));

62559

+ for (i = 0; i < n_elts; i++)

62560

+ {

62561

+ rtx r = gen_rtx_REG (elt_mode, first_reg + i * n_regs);

62562

+ rtx off = GEN_INT (i * GET_MODE_SIZE (elt_mode));

62563

+ XVECEXP (par, 0, i) = gen_rtx_EXPR_LIST (VOIDmode, r, off);

62564

+ }

62565

+

62566

+ return par;

62567

+ }

62568

+

62569

if (TARGET_32BIT && TARGET_POWERPC64 && TYPE_MODE (valtype) == DImode)

62570

{

62571

/* Long long return value need be split in -mpowerpc64, 32bit ABI. */

62572

@@ -27417,6 +30983,13 @@

62573

}

62574

62575

62576

+/* Return true if we use LRA instead of reload pass. */

62577

+static bool

62578

+rs6000_lra_p (void)

62579

+{

62580

+ return rs6000_lra_flag;

62581

+}

62582

+

62583

/* Given FROM and TO register numbers, say whether this elimination is allowed.

62584

Frame pointer elimination is automatically handled.

62585

62586

@@ -27679,22 +31252,33 @@

62587

{

62588

{ "altivec", OPTION_MASK_ALTIVEC, false, true },

62589

{ "cmpb", OPTION_MASK_CMPB, false, true },

62590

+ { "crypto", OPTION_MASK_CRYPTO, false, true },

62591

+ { "direct-move", OPTION_MASK_DIRECT_MOVE, false, true },

62592

{ "dlmzb", OPTION_MASK_DLMZB, false, true },

62593

{ "fprnd", OPTION_MASK_FPRND, false, true },

62594

{ "hard-dfp", OPTION_MASK_DFP, false, true },

62595

+ { "htm", OPTION_MASK_HTM, false, true },

62596

{ "isel", OPTION_MASK_ISEL, false, true },

62597

{ "mfcrf", OPTION_MASK_MFCRF, false, true },

62598

{ "mfpgpr", OPTION_MASK_MFPGPR, false, true },

62599

{ "mulhw", OPTION_MASK_MULHW, false, true },

62600

{ "multiple", OPTION_MASK_MULTIPLE, false, true },

62601

- { "update", OPTION_MASK_NO_UPDATE, true , true },

62602

{ "popcntb", OPTION_MASK_POPCNTB, false, true },

62603

{ "popcntd", OPTION_MASK_POPCNTD, false, true },

62604

+ { "power8-fusion", OPTION_MASK_P8_FUSION, false, true },

62605

+ { "power8-fusion-sign", OPTION_MASK_P8_FUSION_SIGN, false, true },

62606

+ { "power8-vector", OPTION_MASK_P8_VECTOR, false, true },

62607

{ "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true },

62608

{ "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true },

62609

+ { "quad-memory", OPTION_MASK_QUAD_MEMORY, false, true },

62610

+ { "quad-memory-atomic", OPTION_MASK_QUAD_MEMORY_ATOMIC, false, true },

62611

{ "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true },

62612

{ "string", OPTION_MASK_STRING, false, true },

62613

+ { "update", OPTION_MASK_NO_UPDATE, true , true },

62614

+ { "upper-regs-df", OPTION_MASK_UPPER_REGS_DF, false, false },

62615

+ { "upper-regs-sf", OPTION_MASK_UPPER_REGS_SF, false, false },

62616

{ "vsx", OPTION_MASK_VSX, false, true },

62617

+ { "vsx-timode", OPTION_MASK_VSX_TIMODE, false, true },

62618

#ifdef OPTION_MASK_64BIT

62619

#if TARGET_AIX_OS

62620

{ "aix64", OPTION_MASK_64BIT, false, false },

62621

@@ -27734,6 +31318,9 @@

62622

{ "frsqrtes", RS6000_BTM_FRSQRTES, false, false },

62623

{ "popcntd", RS6000_BTM_POPCNTD, false, false },

62624

{ "cell", RS6000_BTM_CELL, false, false },

62625

+ { "power8-vector", RS6000_BTM_P8_VECTOR, false, false },

62626

+ { "crypto", RS6000_BTM_CRYPTO, false, false },

62627

+ { "htm", RS6000_BTM_HTM, false, false },

62628

};

62629

62630

/* Option variables that we want to support inside attribute((target)) and

62631

@@ -28250,7 +31837,6 @@

62632

size_t cur_column;

62633

size_t max_column = 76;

62634

const char *comma = "";

62635

- const char *nl = "\n";

62636

62637

if (indent)

62638

start_column += fprintf (file, "%*s", indent, "");

62639

@@ -28281,7 +31867,6 @@

62640

fprintf (stderr, ", \\\n%*s", (int)start_column, "");

62641

cur_column = start_column + len;

62642

comma = "";

62643

- nl = "\n\n";

62644

}

62645

62646

fprintf (file, "%s%s%s%s", comma, prefix, no_str,

62647

@@ -28291,7 +31876,7 @@

62648

}

62649

}

62650

62651

- fputs (nl, file);

62652

+ fputs ("\n", file);

62653

}

62654

62655

/* Helper function to print the current isa options on a line. */

62656

@@ -28467,118 +32052,149 @@

62657

}

62658

62659

62660

-/* A function pointer under AIX is a pointer to a data area whose first word

62661

- contains the actual address of the function, whose second word contains a

62662

- pointer to its TOC, and whose third word contains a value to place in the

62663

- static chain register (r11). Note that if we load the static chain, our

62664

- "trampoline" need not have any executable code. */

62665

62666

+/* Expand code to perform a call under the AIX or ELFv2 ABI. */

62667

+

62668

void

62669

-rs6000_call_indirect_aix (rtx value, rtx func_desc, rtx flag)

62670

+rs6000_call_aix (rtx value, rtx func_desc, rtx flag, rtx cookie)

62671

{

62672

+ rtx toc_reg = gen_rtx_REG (Pmode, TOC_REGNUM);

62673

+ rtx toc_load = NULL_RTX;

62674

+ rtx toc_restore = NULL_RTX;

62675

rtx func_addr;

62676

- rtx toc_reg;

62677

- rtx sc_reg;

62678

- rtx stack_ptr;

62679

- rtx stack_toc_offset;

62680

- rtx stack_toc_mem;

62681

- rtx func_toc_offset;

62682

- rtx func_toc_mem;

62683

- rtx func_sc_offset;

62684

- rtx func_sc_mem;

62685

+ rtx abi_reg = NULL_RTX;

62686

+ rtx call[4];

62687

+ int n_call;

62688

rtx insn;

62689

- rtx (*call_func) (rtx, rtx, rtx, rtx);

62690

- rtx (*call_value_func) (rtx, rtx, rtx, rtx, rtx);

62691

62692

- stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);

62693

- toc_reg = gen_rtx_REG (Pmode, TOC_REGNUM);

62694

+ /* Handle longcall attributes. */

62695

+ if (INTVAL (cookie) & CALL_LONG)

62696

+ func_desc = rs6000_longcall_ref (func_desc);

62697

62698

- /* Load up address of the actual function. */

62699

- func_desc = force_reg (Pmode, func_desc);

62700

- func_addr = gen_reg_rtx (Pmode);

62701

- emit_move_insn (func_addr, gen_rtx_MEM (Pmode, func_desc));

62702

-

62703

- if (TARGET_32BIT)

62704

+ /* Handle indirect calls. */

62705

+ if (GET_CODE (func_desc) != SYMBOL_REF

62706

+ || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (func_desc)))

62707

{

62708

+ /* Save the TOC into its reserved slot before the call,

62709

+ and prepare to restore it after the call. */

62710

+ rtx stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);

62711

+ rtx stack_toc_offset = GEN_INT (RS6000_TOC_SAVE_SLOT);

62712

+ rtx stack_toc_mem = gen_frame_mem (Pmode,

62713

+ gen_rtx_PLUS (Pmode, stack_ptr,

62714

+ stack_toc_offset));

62715

+ toc_restore = gen_rtx_SET (VOIDmode, toc_reg, stack_toc_mem);

62716

62717

- stack_toc_offset = GEN_INT (TOC_SAVE_OFFSET_32BIT);

62718

- func_toc_offset = GEN_INT (AIX_FUNC_DESC_TOC_32BIT);

62719

- func_sc_offset = GEN_INT (AIX_FUNC_DESC_SC_32BIT);

62720

- if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

62721

- {

62722

- call_func = gen_call_indirect_aix32bit;

62723

- call_value_func = gen_call_value_indirect_aix32bit;

62724

- }

62725

+ /* Can we optimize saving the TOC in the prologue or

62726

+ do we need to do it at every call? */

62727

+ if (TARGET_SAVE_TOC_INDIRECT && !cfun->calls_alloca)

62728

+ cfun->machine->save_toc_in_prologue = true;

62729

else

62730

{

62731

- call_func = gen_call_indirect_aix32bit_nor11;

62732

- call_value_func = gen_call_value_indirect_aix32bit_nor11;

62733

+ MEM_VOLATILE_P (stack_toc_mem) = 1;

62734

+ emit_move_insn (stack_toc_mem, toc_reg);

62735

}

62736

- }

62737

- else

62738

- {

62739

- stack_toc_offset = GEN_INT (TOC_SAVE_OFFSET_64BIT);

62740

- func_toc_offset = GEN_INT (AIX_FUNC_DESC_TOC_64BIT);

62741

- func_sc_offset = GEN_INT (AIX_FUNC_DESC_SC_64BIT);

62742

- if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

62743

+

62744

+ if (DEFAULT_ABI == ABI_ELFv2)

62745

{

62746

- call_func = gen_call_indirect_aix64bit;

62747

- call_value_func = gen_call_value_indirect_aix64bit;

62748

+ /* A function pointer in the ELFv2 ABI is just a plain address, but

62749

+ the ABI requires it to be loaded into r12 before the call. */

62750

+ func_addr = gen_rtx_REG (Pmode, 12);

62751

+ emit_move_insn (func_addr, func_desc);

62752

+ abi_reg = func_addr;

62753

}

62754

else

62755

{

62756

- call_func = gen_call_indirect_aix64bit_nor11;

62757

- call_value_func = gen_call_value_indirect_aix64bit_nor11;

62758

- }

62759

- }

62760

+ /* A function pointer under AIX is a pointer to a data area whose

62761

+ first word contains the actual address of the function, whose

62762

+ second word contains a pointer to its TOC, and whose third word

62763

+ contains a value to place in the static chain register (r11).

62764

+ Note that if we load the static chain, our "trampoline" need

62765

+ not have any executable code. */

62766

62767

- /* Reserved spot to store the TOC. */

62768

- stack_toc_mem = gen_frame_mem (Pmode,

62769

- gen_rtx_PLUS (Pmode,

62770

- stack_ptr,

62771

- stack_toc_offset));

62772

+ /* Load up address of the actual function. */

62773

+ func_desc = force_reg (Pmode, func_desc);

62774

+ func_addr = gen_reg_rtx (Pmode);

62775

+ emit_move_insn (func_addr, gen_rtx_MEM (Pmode, func_desc));

62776

62777

- gcc_assert (cfun);

62778

- gcc_assert (cfun->machine);

62779

+ /* Prepare to load the TOC of the called function. Note that the

62780

+ TOC load must happen immediately before the actual call so

62781

+ that unwinding the TOC registers works correctly. See the

62782

+ comment in frob_update_context. */

62783

+ rtx func_toc_offset = GEN_INT (GET_MODE_SIZE (Pmode));

62784

+ rtx func_toc_mem = gen_rtx_MEM (Pmode,

62785

+ gen_rtx_PLUS (Pmode, func_desc,

62786

+ func_toc_offset));

62787

+ toc_load = gen_rtx_USE (VOIDmode, func_toc_mem);

62788

62789

- /* Can we optimize saving the TOC in the prologue or do we need to do it at

62790

- every call? */

62791

- if (TARGET_SAVE_TOC_INDIRECT && !cfun->calls_alloca)

62792

- cfun->machine->save_toc_in_prologue = true;

62793

-

62794

+ /* If we have a static chain, load it up. */

62795

+ if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

62796

+ {

62797

+ rtx sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);

62798

+ rtx func_sc_offset = GEN_INT (2 * GET_MODE_SIZE (Pmode));

62799

+ rtx func_sc_mem = gen_rtx_MEM (Pmode,

62800

+ gen_rtx_PLUS (Pmode, func_desc,

62801

+ func_sc_offset));

62802

+ emit_move_insn (sc_reg, func_sc_mem);

62803

+ abi_reg = sc_reg;

62804

+ }

62805

+ }

62806

+ }

62807

else

62808

{

62809

- MEM_VOLATILE_P (stack_toc_mem) = 1;

62810

- emit_move_insn (stack_toc_mem, toc_reg);

62811

+ /* Direct calls use the TOC: for local calls, the callee will

62812

+ assume the TOC register is set; for non-local calls, the

62813

+ PLT stub needs the TOC register. */

62814

+ abi_reg = toc_reg;

62815

+ func_addr = func_desc;

62816

}

62817

62818

- /* Calculate the address to load the TOC of the called function. We don't

62819

- actually load this until the split after reload. */

62820

- func_toc_mem = gen_rtx_MEM (Pmode,

62821

- gen_rtx_PLUS (Pmode,

62822

- func_desc,

62823

- func_toc_offset));

62824

+ /* Create the call. */

62825

+ call[0] = gen_rtx_CALL (VOIDmode, gen_rtx_MEM (SImode, func_addr), flag);

62826

+ if (value != NULL_RTX)

62827

+ call[0] = gen_rtx_SET (VOIDmode, value, call[0]);

62828

+ n_call = 1;

62829

62830

- /* If we have a static chain, load it up. */

62831

- if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

62832

- {

62833

- func_sc_mem = gen_rtx_MEM (Pmode,

62834

- gen_rtx_PLUS (Pmode,

62835

- func_desc,

62836

- func_sc_offset));

62837

+ if (toc_load)

62838

+ call[n_call++] = toc_load;

62839

+ if (toc_restore)

62840

+ call[n_call++] = toc_restore;

62841

62842

- sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);

62843

- emit_move_insn (sc_reg, func_sc_mem);

62844

- }

62845

+ call[n_call++] = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, LR_REGNO));

62846

62847

+ insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (n_call, call));

62848

+ insn = emit_call_insn (insn);

62849

+

62850

+ /* Mention all registers defined by the ABI to hold information

62851

+ as uses in CALL_INSN_FUNCTION_USAGE. */

62852

+ if (abi_reg)

62853

+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), abi_reg);

62854

+}

62855

+

62856

+/* Expand code to perform a sibling call under the AIX or ELFv2 ABI. */

62857

+

62858

+void

62859

+rs6000_sibcall_aix (rtx value, rtx func_desc, rtx flag, rtx cookie)

62860

+{

62861

+ rtx call[2];

62862

+ rtx insn;

62863

+

62864

+ gcc_assert (INTVAL (cookie) == 0);

62865

+

62866

/* Create the call. */

62867

- if (value)

62868

- insn = call_value_func (value, func_addr, flag, func_toc_mem,

62869

- stack_toc_mem);

62870

- else

62871

- insn = call_func (func_addr, flag, func_toc_mem, stack_toc_mem);

62872

+ call[0] = gen_rtx_CALL (VOIDmode, gen_rtx_MEM (SImode, func_desc), flag);

62873

+ if (value != NULL_RTX)

62874

+ call[0] = gen_rtx_SET (VOIDmode, value, call[0]);

62875

62876

- emit_call_insn (insn);

62877

+ call[1] = simple_return_rtx;

62878

+

62879

+ insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (2, call));

62880

+ insn = emit_call_insn (insn);

62881

+

62882

+ /* Note use of the TOC register. */

62883

+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), gen_rtx_REG (Pmode, TOC_REGNUM));

62884

+ /* We need to also mark a use of the link register since the function we

62885

+ sibling-call to will use it to return to our caller. */

62886

+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), gen_rtx_REG (Pmode, LR_REGNO));

62887

}

62888

62889

/* Return whether we need to always update the saved TOC pointer when we update

62890

@@ -28679,6 +32295,661 @@

62891

add_to_hard_reg_set (&set->set, Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);

62892

}

62893

62894

+

62895

+/* Helper function for rs6000_split_logical to emit a logical instruction after

62896

+ spliting the operation to single GPR registers.

62897

+

62898

+ DEST is the destination register.

62899

+ OP1 and OP2 are the input source registers.

62900

+ CODE is the base operation (AND, IOR, XOR, NOT).

62901

+ MODE is the machine mode.

62902

+ If COMPLEMENT_FINAL_P is true, wrap the whole operation with NOT.

62903

+ If COMPLEMENT_OP1_P is true, wrap operand1 with NOT.

62904

+ If COMPLEMENT_OP2_P is true, wrap operand2 with NOT.

62905

+ CLOBBER_REG is either NULL or a scratch register of type CC to allow

62906

+ formation of the AND instructions. */

62907

+

62908

+static void

62909

+rs6000_split_logical_inner (rtx dest,

62910

+ rtx op1,

62911

+ rtx op2,

62912

+ enum rtx_code code,

62913

+ enum machine_mode mode,

62914

+ bool complement_final_p,

62915

+ bool complement_op1_p,

62916

+ bool complement_op2_p,

62917

+ rtx clobber_reg)

62918

+{

62919

+ rtx bool_rtx;

62920

+ rtx set_rtx;

62921

+

62922

+ /* Optimize AND of 0/0xffffffff and IOR/XOR of 0. */

62923

+ if (op2 && GET_CODE (op2) == CONST_INT

62924

+ && (mode == SImode || (mode == DImode && TARGET_POWERPC64))

62925

+ && !complement_final_p && !complement_op1_p && !complement_op2_p)

62926

+ {

62927

+ HOST_WIDE_INT mask = GET_MODE_MASK (mode);

62928

+ HOST_WIDE_INT value = INTVAL (op2) & mask;

62929

+

62930

+ /* Optimize AND of 0 to just set 0. Optimize AND of -1 to be a move. */

62931

+ if (code == AND)

62932

+ {

62933

+ if (value == 0)

62934

+ {

62935

+ emit_insn (gen_rtx_SET (VOIDmode, dest, const0_rtx));

62936

+ return;

62937

+ }

62938

+

62939

+ else if (value == mask)

62940

+ {

62941

+ if (!rtx_equal_p (dest, op1))

62942

+ emit_insn (gen_rtx_SET (VOIDmode, dest, op1));

62943

+ return;

62944

+ }

62945

+ }

62946

+

62947

+ /* Optimize IOR/XOR of 0 to be a simple move. Split large operations

62948

+ into separate ORI/ORIS or XORI/XORIS instrucitons. */

62949

+ else if (code == IOR || code == XOR)

62950

+ {

62951

+ if (value == 0)

62952

+ {

62953

+ if (!rtx_equal_p (dest, op1))

62954

+ emit_insn (gen_rtx_SET (VOIDmode, dest, op1));

62955

+ return;

62956

+ }

62957

+ }

62958

+ }

62959

+

62960

+ if (complement_op1_p)

62961

+ op1 = gen_rtx_NOT (mode, op1);

62962

+

62963

+ if (complement_op2_p)

62964

+ op2 = gen_rtx_NOT (mode, op2);

62965

+

62966

+ bool_rtx = ((code == NOT)

62967

+ ? gen_rtx_NOT (mode, op1)

62968

+ : gen_rtx_fmt_ee (code, mode, op1, op2));

62969

+

62970

+ if (complement_final_p)

62971

+ bool_rtx = gen_rtx_NOT (mode, bool_rtx);

62972

+

62973

+ set_rtx = gen_rtx_SET (VOIDmode, dest, bool_rtx);

62974

+

62975

+ /* Is this AND with an explicit clobber? */

62976

+ if (clobber_reg)

62977

+ {

62978

+ rtx clobber = gen_rtx_CLOBBER (VOIDmode, clobber_reg);

62979

+ set_rtx = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set_rtx, clobber));

62980

+ }

62981

+

62982

+ emit_insn (set_rtx);

62983

+ return;

62984

+}

62985

+

62986

+/* Split a DImode AND/IOR/XOR with a constant on a 32-bit system. These

62987

+ operations are split immediately during RTL generation to allow for more

62988

+ optimizations of the AND/IOR/XOR.

62989

+

62990

+ OPERANDS is an array containing the destination and two input operands.

62991

+ CODE is the base operation (AND, IOR, XOR, NOT).

62992

+ MODE is the machine mode.

62993

+ If COMPLEMENT_FINAL_P is true, wrap the whole operation with NOT.

62994

+ If COMPLEMENT_OP1_P is true, wrap operand1 with NOT.

62995

+ If COMPLEMENT_OP2_P is true, wrap operand2 with NOT.

62996

+ CLOBBER_REG is either NULL or a scratch register of type CC to allow

62997

+ formation of the AND instructions. */

62998

+

62999

+static void

63000

+rs6000_split_logical_di (rtx operands[3],

63001

+ enum rtx_code code,

63002

+ bool complement_final_p,

63003

+ bool complement_op1_p,

63004

+ bool complement_op2_p,

63005

+ rtx clobber_reg)

63006

+{

63007

+ const HOST_WIDE_INT lower_32bits = HOST_WIDE_INT_C(0xffffffff);

63008

+ const HOST_WIDE_INT upper_32bits = ~ lower_32bits;

63009

+ const HOST_WIDE_INT sign_bit = HOST_WIDE_INT_C(0x80000000);

63010

+ enum hi_lo { hi = 0, lo = 1 };

63011

+ rtx op0_hi_lo[2], op1_hi_lo[2], op2_hi_lo[2];

63012

+ size_t i;

63013

+

63014

+ op0_hi_lo[hi] = gen_highpart (SImode, operands[0]);

63015

+ op1_hi_lo[hi] = gen_highpart (SImode, operands[1]);

63016

+ op0_hi_lo[lo] = gen_lowpart (SImode, operands[0]);

63017

+ op1_hi_lo[lo] = gen_lowpart (SImode, operands[1]);

63018

+

63019

+ if (code == NOT)

63020

+ op2_hi_lo[hi] = op2_hi_lo[lo] = NULL_RTX;

63021

+ else

63022

+ {

63023

+ if (GET_CODE (operands[2]) != CONST_INT)

63024

+ {

63025

+ op2_hi_lo[hi] = gen_highpart_mode (SImode, DImode, operands[2]);

63026

+ op2_hi_lo[lo] = gen_lowpart (SImode, operands[2]);

63027

+ }

63028

+ else

63029

+ {

63030

+ HOST_WIDE_INT value = INTVAL (operands[2]);

63031

+ HOST_WIDE_INT value_hi_lo[2];

63032

+

63033

+ gcc_assert (!complement_final_p);

63034

+ gcc_assert (!complement_op1_p);

63035

+ gcc_assert (!complement_op2_p);

63036

+

63037

+ value_hi_lo[hi] = value >> 32;

63038

+ value_hi_lo[lo] = value & lower_32bits;

63039

+

63040

+ for (i = 0; i < 2; i++)

63041

+ {

63042

+ HOST_WIDE_INT sub_value = value_hi_lo[i];

63043

+

63044

+ if (sub_value & sign_bit)

63045

+ sub_value |= upper_32bits;

63046

+

63047

+ op2_hi_lo[i] = GEN_INT (sub_value);

63048

+

63049

+ /* If this is an AND instruction, check to see if we need to load

63050

+ the value in a register. */

63051

+ if (code == AND && sub_value != -1 && sub_value != 0

63052

+ && !and_operand (op2_hi_lo[i], SImode))

63053

+ op2_hi_lo[i] = force_reg (SImode, op2_hi_lo[i]);

63054

+ }

63055

+ }

63056

+ }

63057

+

63058

+ for (i = 0; i < 2; i++)

63059

+ {

63060

+ /* Split large IOR/XOR operations. */

63061

+ if ((code == IOR || code == XOR)

63062

+ && GET_CODE (op2_hi_lo[i]) == CONST_INT

63063

+ && !complement_final_p

63064

+ && !complement_op1_p

63065

+ && !complement_op2_p

63066

+ && clobber_reg == NULL_RTX

63067

+ && !logical_const_operand (op2_hi_lo[i], SImode))

63068

+ {

63069

+ HOST_WIDE_INT value = INTVAL (op2_hi_lo[i]);

63070

+ HOST_WIDE_INT hi_16bits = value & HOST_WIDE_INT_C(0xffff0000);

63071

+ HOST_WIDE_INT lo_16bits = value & HOST_WIDE_INT_C(0x0000ffff);

63072

+ rtx tmp = gen_reg_rtx (SImode);

63073

+

63074

+ /* Make sure the constant is sign extended. */

63075

+ if ((hi_16bits & sign_bit) != 0)

63076

+ hi_16bits |= upper_32bits;

63077

+

63078

+ rs6000_split_logical_inner (tmp, op1_hi_lo[i], GEN_INT (hi_16bits),

63079

+ code, SImode, false, false, false,

63080

+ NULL_RTX);

63081

+

63082

+ rs6000_split_logical_inner (op0_hi_lo[i], tmp, GEN_INT (lo_16bits),

63083

+ code, SImode, false, false, false,

63084

+ NULL_RTX);

63085

+ }

63086

+ else

63087

+ rs6000_split_logical_inner (op0_hi_lo[i], op1_hi_lo[i], op2_hi_lo[i],

63088

+ code, SImode, complement_final_p,

63089

+ complement_op1_p, complement_op2_p,

63090

+ clobber_reg);

63091

+ }

63092

+

63093

+ return;

63094

+}

63095

+

63096

+/* Split the insns that make up boolean operations operating on multiple GPR

63097

+ registers. The boolean MD patterns ensure that the inputs either are

63098

+ exactly the same as the output registers, or there is no overlap.

63099

+

63100

+ OPERANDS is an array containing the destination and two input operands.

63101

+ CODE is the base operation (AND, IOR, XOR, NOT).

63102

+ MODE is the machine mode.

63103

+ If COMPLEMENT_FINAL_P is true, wrap the whole operation with NOT.

63104

+ If COMPLEMENT_OP1_P is true, wrap operand1 with NOT.

63105

+ If COMPLEMENT_OP2_P is true, wrap operand2 with NOT.

63106

+ CLOBBER_REG is either NULL or a scratch register of type CC to allow

63107

+ formation of the AND instructions. */

63108

+

63109

+void

63110

+rs6000_split_logical (rtx operands[3],

63111

+ enum rtx_code code,

63112

+ bool complement_final_p,

63113

+ bool complement_op1_p,

63114

+ bool complement_op2_p,

63115

+ rtx clobber_reg)

63116

+{

63117

+ enum machine_mode mode = GET_MODE (operands[0]);

63118

+ enum machine_mode sub_mode;

63119

+ rtx op0, op1, op2;

63120

+ int sub_size, regno0, regno1, nregs, i;

63121

+

63122

+ /* If this is DImode, use the specialized version that can run before

63123

+ register allocation. */

63124

+ if (mode == DImode && !TARGET_POWERPC64)

63125

+ {

63126

+ rs6000_split_logical_di (operands, code, complement_final_p,

63127

+ complement_op1_p, complement_op2_p,

63128

+ clobber_reg);

63129

+ return;

63130

+ }

63131

+

63132

+ op0 = operands[0];

63133

+ op1 = operands[1];

63134

+ op2 = (code == NOT) ? NULL_RTX : operands[2];

63135

+ sub_mode = (TARGET_POWERPC64) ? DImode : SImode;

63136

+ sub_size = GET_MODE_SIZE (sub_mode);

63137

+ regno0 = REGNO (op0);

63138

+ regno1 = REGNO (op1);

63139

+

63140

+ gcc_assert (reload_completed);

63141

+ gcc_assert (IN_RANGE (regno0, FIRST_GPR_REGNO, LAST_GPR_REGNO));

63142

+ gcc_assert (IN_RANGE (regno1, FIRST_GPR_REGNO, LAST_GPR_REGNO));

63143

+

63144

+ nregs = rs6000_hard_regno_nregs[(int)mode][regno0];

63145

+ gcc_assert (nregs > 1);

63146

+

63147

+ if (op2 && REG_P (op2))

63148

+ gcc_assert (IN_RANGE (REGNO (op2), FIRST_GPR_REGNO, LAST_GPR_REGNO));

63149

+

63150

+ for (i = 0; i < nregs; i++)

63151

+ {

63152

+ int offset = i * sub_size;

63153

+ rtx sub_op0 = simplify_subreg (sub_mode, op0, mode, offset);

63154

+ rtx sub_op1 = simplify_subreg (sub_mode, op1, mode, offset);

63155

+ rtx sub_op2 = ((code == NOT)

63156

+ ? NULL_RTX

63157

+ : simplify_subreg (sub_mode, op2, mode, offset));

63158

+

63159

+ rs6000_split_logical_inner (sub_op0, sub_op1, sub_op2, code, sub_mode,

63160

+ complement_final_p, complement_op1_p,

63161

+ complement_op2_p, clobber_reg);

63162

+ }

63163

+

63164

+ return;

63165

+}

63166

+

63167

+

63168

+/* Return true if the peephole2 can combine a load involving a combination of

63169

+ an addis instruction and a load with an offset that can be fused together on

63170

+ a power8.

63171

+

63172

+ The operands are:

63173

+ operands[0] register set with addis

63174

+ operands[1] value set via addis

63175

+ operands[2] target register being loaded

63176

+ operands[3] D-form memory reference using operands[0].

63177

+

63178

+ In addition, we are passed a boolean that is true if this is a peephole2,

63179

+ and we can use see if the addis_reg is dead after the insn and can be

63180

+ replaced by the target register. */

63181

+

63182

+bool

63183

+fusion_gpr_load_p (rtx *operands, bool peep2_p)

63184

+{

63185

+ rtx addis_reg = operands[0];

63186

+ rtx addis_value = operands[1];

63187

+ rtx target = operands[2];

63188

+ rtx mem = operands[3];

63189

+ rtx addr;

63190

+ rtx base_reg;

63191

+

63192

+ /* Validate arguments. */

63193

+ if (!base_reg_operand (addis_reg, GET_MODE (addis_reg)))

63194

+ return false;

63195

+

63196

+ if (!base_reg_operand (target, GET_MODE (target)))

63197

+ return false;

63198

+

63199

+ if (!fusion_gpr_addis (addis_value, GET_MODE (addis_value)))

63200

+ return false;

63201

+

63202

+ if (!fusion_gpr_mem_load (mem, GET_MODE (mem)))

63203

+ return false;

63204

+

63205

+ /* Allow sign/zero extension. */

63206

+ if (GET_CODE (mem) == ZERO_EXTEND

63207

+ || (GET_CODE (mem) == SIGN_EXTEND && TARGET_P8_FUSION_SIGN))

63208

+ mem = XEXP (mem, 0);

63209

+

63210

+ if (!MEM_P (mem))

63211

+ return false;

63212

+

63213

+ addr = XEXP (mem, 0); /* either PLUS or LO_SUM. */

63214

+ if (GET_CODE (addr) != PLUS && GET_CODE (addr) != LO_SUM)

63215

+ return false;

63216

+

63217

+ /* Validate that the register used to load the high value is either the

63218

+ register being loaded, or we can safely replace its use in a peephole2.

63219

+

63220

+ If this is a peephole2, we assume that there are 2 instructions in the

63221

+ peephole (addis and load), so we want to check if the target register was

63222

+ not used in the memory address and the register to hold the addis result

63223

+ is dead after the peephole. */

63224

+ if (REGNO (addis_reg) != REGNO (target))

63225

+ {

63226

+ if (!peep2_p)

63227

+ return false;

63228

+

63229

+ if (reg_mentioned_p (target, mem))

63230

+ return false;

63231

+

63232

+ if (!peep2_reg_dead_p (2, addis_reg))

63233

+ return false;

63234

+

63235

+ /* If the target register being loaded is the stack pointer, we must

63236

+ avoid loading any other value into it, even temporarily. */

63237

+ if (REG_P (target) && REGNO (target) == STACK_POINTER_REGNUM)

63238

+ return false;

63239

+ }

63240

+

63241

+ base_reg = XEXP (addr, 0);

63242

+ return REGNO (addis_reg) == REGNO (base_reg);

63243

+}

63244

+

63245

+/* During the peephole2 pass, adjust and expand the insns for a load fusion

63246

+ sequence. We adjust the addis register to use the target register. If the

63247

+ load sign extends, we adjust the code to do the zero extending load, and an

63248

+ explicit sign extension later since the fusion only covers zero extending

63249

+ loads.

63250

+

63251

+ The operands are:

63252

+ operands[0] register set with addis (to be replaced with target)

63253

+ operands[1] value set via addis

63254

+ operands[2] target register being loaded

63255

+ operands[3] D-form memory reference using operands[0]. */

63256

+

63257

+void

63258

+expand_fusion_gpr_load (rtx *operands)

63259

+{

63260

+ rtx addis_value = operands[1];

63261

+ rtx target = operands[2];

63262

+ rtx orig_mem = operands[3];

63263

+ rtx new_addr, new_mem, orig_addr, offset;

63264

+ enum rtx_code plus_or_lo_sum;

63265

+ enum machine_mode target_mode = GET_MODE (target);

63266

+ enum machine_mode extend_mode = target_mode;

63267

+ enum machine_mode ptr_mode = Pmode;

63268

+ enum rtx_code extend = UNKNOWN;

63269

+ rtx addis_reg = ((ptr_mode == target_mode)

63270

+ ? target

63271

+ : simplify_subreg (ptr_mode, target, target_mode, 0));

63272

+

63273

+ if (GET_CODE (orig_mem) == ZERO_EXTEND

63274

+ || (TARGET_P8_FUSION_SIGN && GET_CODE (orig_mem) == SIGN_EXTEND))

63275

+ {

63276

+ extend = GET_CODE (orig_mem);

63277

+ orig_mem = XEXP (orig_mem, 0);

63278

+ target_mode = GET_MODE (orig_mem);

63279

+ }

63280

+

63281

+ gcc_assert (MEM_P (orig_mem));

63282

+

63283

+ orig_addr = XEXP (orig_mem, 0);

63284

+ plus_or_lo_sum = GET_CODE (orig_addr);

63285

+ gcc_assert (plus_or_lo_sum == PLUS || plus_or_lo_sum == LO_SUM);

63286

+

63287

+ offset = XEXP (orig_addr, 1);

63288

+ new_addr = gen_rtx_fmt_ee (plus_or_lo_sum, ptr_mode, addis_reg, offset);

63289

+ new_mem = change_address (orig_mem, target_mode, new_addr);

63290

+

63291

+ if (extend != UNKNOWN)

63292

+ new_mem = gen_rtx_fmt_e (ZERO_EXTEND, extend_mode, new_mem);

63293

+

63294

+ emit_insn (gen_rtx_SET (VOIDmode, addis_reg, addis_value));

63295

+ emit_insn (gen_rtx_SET (VOIDmode, target, new_mem));

63296

+

63297

+ if (extend == SIGN_EXTEND)

63298

+ {

63299

+ int sub_off = ((BYTES_BIG_ENDIAN)

63300

+ ? GET_MODE_SIZE (extend_mode) - GET_MODE_SIZE (target_mode)

63301

+ : 0);

63302

+ rtx sign_reg

63303

+ = simplify_subreg (target_mode, target, extend_mode, sub_off);

63304

+

63305

+ emit_insn (gen_rtx_SET (VOIDmode, target,

63306

+ gen_rtx_SIGN_EXTEND (extend_mode, sign_reg)));

63307

+ }

63308

+

63309

+ return;

63310

+}

63311

+

63312

+/* Return a string to fuse an addis instruction with a gpr load to the same

63313

+ register that we loaded up the addis instruction. The code is complicated,

63314

+ so we call output_asm_insn directly, and just return "".

63315

+

63316

+ The operands are:

63317

+ operands[0] register set with addis (must be same reg as target).

63318

+ operands[1] value set via addis

63319

+ operands[2] target register being loaded

63320

+ operands[3] D-form memory reference using operands[0]. */

63321

+

63322

+const char *

63323

+emit_fusion_gpr_load (rtx *operands)

63324

+{

63325

+ rtx addis_reg = operands[0];

63326

+ rtx addis_value = operands[1];

63327

+ rtx target = operands[2];

63328

+ rtx mem = operands[3];

63329

+ rtx fuse_ops[10];

63330

+ rtx addr;

63331

+ rtx load_offset;

63332

+ const char *addis_str = NULL;

63333

+ const char *load_str = NULL;

63334

+ const char *extend_insn = NULL;

63335

+ const char *mode_name = NULL;

63336

+ char insn_template[80];

63337

+ enum machine_mode mode;

63338

+ const char *comment_str = ASM_COMMENT_START;

63339

+ bool sign_p = false;

63340

+

63341

+ gcc_assert (REG_P (addis_reg) && REG_P (target));

63342

+ gcc_assert (REGNO (addis_reg) == REGNO (target));

63343

+

63344

+ if (*comment_str == ' ')

63345

+ comment_str++;

63346

+

63347

+ /* Allow sign/zero extension. */

63348

+ if (GET_CODE (mem) == ZERO_EXTEND)

63349

+ mem = XEXP (mem, 0);

63350

+

63351

+ else if (GET_CODE (mem) == SIGN_EXTEND && TARGET_P8_FUSION_SIGN)

63352

+ {

63353

+ sign_p = true;

63354

+ mem = XEXP (mem, 0);

63355

+ }

63356

+

63357

+ gcc_assert (MEM_P (mem));

63358

+ addr = XEXP (mem, 0);

63359

+ if (GET_CODE (addr) != PLUS && GET_CODE (addr) != LO_SUM)

63360

+ gcc_unreachable ();

63361

+

63362

+ load_offset = XEXP (addr, 1);

63363

+

63364

+ /* Now emit the load instruction to the same register. */

63365

+ mode = GET_MODE (mem);

63366

+ switch (mode)

63367

+ {

63368

+ case QImode:

63369

+ mode_name = "char";

63370

+ load_str = "lbz";

63371

+ extend_insn = "extsb %0,%0";

63372

+ break;

63373

+

63374

+ case HImode:

63375

+ mode_name = "short";

63376

+ load_str = "lhz";

63377

+ extend_insn = "extsh %0,%0";

63378

+ break;

63379

+

63380

+ case SImode:

63381

+ mode_name = "int";

63382

+ load_str = "lwz";

63383

+ extend_insn = "extsw %0,%0";

63384

+ break;

63385

+

63386

+ case DImode:

63387

+ if (TARGET_POWERPC64)

63388

+ {

63389

+ mode_name = "long";

63390

+ load_str = "ld";

63391

+ }

63392

+ else

63393

+ gcc_unreachable ();

63394

+ break;

63395

+

63396

+ default:

63397

+ gcc_unreachable ();

63398

+ }

63399

+

63400

+ /* Emit the addis instruction. */

63401

+ fuse_ops[0] = target;

63402

+ if (satisfies_constraint_L (addis_value))

63403

+ {

63404

+ fuse_ops[1] = addis_value;

63405

+ addis_str = "lis %0,%v1";

63406

+ }

63407

+

63408

+ else if (GET_CODE (addis_value) == PLUS)

63409

+ {

63410

+ rtx op0 = XEXP (addis_value, 0);

63411

+ rtx op1 = XEXP (addis_value, 1);

63412

+

63413

+ if (REG_P (op0) && CONST_INT_P (op1)

63414

+ && satisfies_constraint_L (op1))

63415

+ {

63416

+ fuse_ops[1] = op0;

63417

+ fuse_ops[2] = op1;

63418

+ addis_str = "addis %0,%1,%v2";

63419

+ }

63420

+ }

63421

+

63422

+ else if (GET_CODE (addis_value) == HIGH)

63423

+ {

63424

+ rtx value = XEXP (addis_value, 0);

63425

+ if (GET_CODE (value) == UNSPEC && XINT (value, 1) == UNSPEC_TOCREL)

63426

+ {

63427

+ fuse_ops[1] = XVECEXP (value, 0, 0); /* symbol ref. */

63428

+ fuse_ops[2] = XVECEXP (value, 0, 1); /* TOC register. */

63429

+ if (TARGET_ELF)

63430

+ addis_str = "addis %0,%2,%1@toc@ha";

63431

+

63432

+ else if (TARGET_XCOFF)

63433

+ addis_str = "addis %0,%1@u(%2)";

63434

+

63435

+ else

63436

+ gcc_unreachable ();

63437

+ }

63438

+

63439

+ else if (GET_CODE (value) == PLUS)

63440

+ {

63441

+ rtx op0 = XEXP (value, 0);

63442

+ rtx op1 = XEXP (value, 1);

63443

+

63444

+ if (GET_CODE (op0) == UNSPEC

63445

+ && XINT (op0, 1) == UNSPEC_TOCREL

63446

+ && CONST_INT_P (op1))

63447

+ {

63448

+ fuse_ops[1] = XVECEXP (op0, 0, 0); /* symbol ref. */

63449

+ fuse_ops[2] = XVECEXP (op0, 0, 1); /* TOC register. */

63450

+ fuse_ops[3] = op1;

63451

+ if (TARGET_ELF)

63452

+ addis_str = "addis %0,%2,%1+%3@toc@ha";

63453

+

63454

+ else if (TARGET_XCOFF)

63455

+ addis_str = "addis %0,%1+%3@u(%2)";

63456

+

63457

+ else

63458

+ gcc_unreachable ();

63459

+ }

63460

+ }

63461

+

63462

+ else if (satisfies_constraint_L (value))

63463

+ {

63464

+ fuse_ops[1] = value;

63465

+ addis_str = "lis %0,%v1";

63466

+ }

63467

+

63468

+ else if (TARGET_ELF && !TARGET_POWERPC64 && CONSTANT_P (value))

63469

+ {

63470

+ fuse_ops[1] = value;

63471

+ addis_str = "lis %0,%1@ha";

63472

+ }

63473

+ }

63474

+

63475

+ if (!addis_str)

63476

+ fatal_insn ("Could not generate addis value for fusion", addis_value);

63477

+

63478

+ sprintf (insn_template, "%s\t\t%s gpr load fusion, type %s", addis_str,

63479

+ comment_str, mode_name);

63480

+ output_asm_insn (insn_template, fuse_ops);

63481

+

63482

+ /* Emit the D-form load instruction. */

63483

+ if (CONST_INT_P (load_offset) && satisfies_constraint_I (load_offset))

63484

+ {

63485

+ sprintf (insn_template, "%s %%0,%%1(%%0)", load_str);

63486

+ fuse_ops[1] = load_offset;

63487

+ output_asm_insn (insn_template, fuse_ops);

63488

+ }

63489

+

63490

+ else if (GET_CODE (load_offset) == UNSPEC

63491

+ && XINT (load_offset, 1) == UNSPEC_TOCREL)

63492

+ {

63493

+ if (TARGET_ELF)

63494

+ sprintf (insn_template, "%s %%0,%%1@toc@l(%%0)", load_str);

63495

+

63496

+ else if (TARGET_XCOFF)

63497

+ sprintf (insn_template, "%s %%0,%%1@l(%%0)", load_str);

63498

+

63499

+ else

63500

+ gcc_unreachable ();

63501

+

63502

+ fuse_ops[1] = XVECEXP (load_offset, 0, 0);

63503

+ output_asm_insn (insn_template, fuse_ops);

63504

+ }

63505

+

63506

+ else if (GET_CODE (load_offset) == PLUS

63507

+ && GET_CODE (XEXP (load_offset, 0)) == UNSPEC

63508

+ && XINT (XEXP (load_offset, 0), 1) == UNSPEC_TOCREL

63509

+ && CONST_INT_P (XEXP (load_offset, 1)))

63510

+ {

63511

+ rtx tocrel_unspec = XEXP (load_offset, 0);

63512

+ if (TARGET_ELF)

63513

+ sprintf (insn_template, "%s %%0,%%1+%%2@toc@l(%%0)", load_str);

63514

+

63515

+ else if (TARGET_XCOFF)

63516

+ sprintf (insn_template, "%s %%0,%%1+%%2@l(%%0)", load_str);

63517

+

63518

+ else

63519

+ gcc_unreachable ();

63520

+

63521

+ fuse_ops[1] = XVECEXP (tocrel_unspec, 0, 0);

63522

+ fuse_ops[2] = XEXP (load_offset, 1);

63523

+ output_asm_insn (insn_template, fuse_ops);

63524

+ }

63525

+

63526

+ else if (TARGET_ELF && !TARGET_POWERPC64 && CONSTANT_P (load_offset))

63527

+ {

63528

+ sprintf (insn_template, "%s %%0,%%1@l(%%0)", load_str);

63529

+

63530

+ fuse_ops[1] = load_offset;

63531

+ output_asm_insn (insn_template, fuse_ops);

63532

+ }

63533

+

63534

+ else

63535

+ fatal_insn ("Unable to generate load offset for fusion", load_offset);

63536

+

63537

+ /* Handle sign extension. The peephole2 pass generates this as a separate

63538

+ insn, but we handle it just in case it got reattached. */

63539

+ if (sign_p)

63540

+ {

63541

+ gcc_assert (extend_insn != NULL);

63542

+ output_asm_insn (extend_insn, fuse_ops);

63543

+ }

63544

+

63545

+ return "";

63546

+}

63547

+

63548

+

63549

struct gcc_target targetm = TARGET_INITIALIZER;

63550

63551

#include "gt-rs6000.h"

63552

Index: gcc/config/rs6000/vsx.md

63553

===================================================================

63554

--- a/src/gcc/config/rs6000/vsx.md (.../tags/gcc_4_8_2_release)

63555

+++ b/src/gcc/config/rs6000/vsx.md (.../branches/gcc-4_8-branch)

63556

@@ -34,12 +34,21 @@

63557

(define_mode_iterator VSX_F [V4SF V2DF])

63558

63559

;; Iterator for logical types supported by VSX

63560

-(define_mode_iterator VSX_L [V16QI V8HI V4SI V2DI V4SF V2DF TI])

63561

+(define_mode_iterator VSX_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI])

63562

63563

;; Iterator for memory move. Handle TImode specially to allow

63564

;; it to use gprs as well as vsx registers.

63565

-(define_mode_iterator VSX_M [V16QI V8HI V4SI V2DI V4SF V2DF])

63566

+(define_mode_iterator VSX_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI])

63567

63568

+(define_mode_iterator VSX_M2 [V16QI

63569

+ V8HI

63570

+ V4SI

63571

+ V2DI

63572

+ V4SF

63573

+ V2DF

63574

+ V1TI

63575

+ (TI "TARGET_VSX_TIMODE")])

63576

+

63577

;; Map into the appropriate load/store name based on the type

63578

(define_mode_attr VSm [(V16QI "vw4")

63579

(V8HI "vw4")

63580

@@ -48,7 +57,8 @@

63581

(V2DF "vd2")

63582

(V2DI "vd2")

63583

(DF "d")

63584

- (TI "vw4")])

63585

+ (V1TI "vd2")

63586

+ (TI "vd2")])

63587

63588

;; Map into the appropriate suffix based on the type

63589

(define_mode_attr VSs [(V16QI "sp")

63590

@@ -59,7 +69,8 @@

63591

(V2DI "dp")

63592

(DF "dp")

63593

(SF "sp")

63594

- (TI "sp")])

63595

+ (V1TI "dp")

63596

+ (TI "dp")])

63597

63598

;; Map the register class used

63599

(define_mode_attr VSr [(V16QI "v")

63600

@@ -70,7 +81,8 @@

63601

(V2DF "wd")

63602

(DF "ws")

63603

(SF "d")

63604

- (TI "wd")])

63605

+ (V1TI "v")

63606

+ (TI "wt")])

63607

63608

;; Map the register class used for float<->int conversions

63609

(define_mode_attr VSr2 [(V2DF "wd")

63610

@@ -115,7 +127,7 @@

63611

(V4SF "v")

63612

(V2DI "v")

63613

(V2DF "v")

63614

- (TI "v")

63615

+ (V1TI "v")

63616

(DF "s")])

63617

63618

;; Appropriate type for add ops (and other simple FP ops)

63619

@@ -173,7 +185,8 @@

63620

(V2DF "vecdouble")])

63621

63622

;; Map the scalar mode for a vector type

63623

-(define_mode_attr VS_scalar [(V2DF "DF")

63624

+(define_mode_attr VS_scalar [(V1TI "TI")

63625

+ (V2DF "DF")

63626

(V2DI "DI")

63627

(V4SF "SF")

63628

(V4SI "SI")

63629

@@ -184,7 +197,8 @@

63630

(define_mode_attr VS_double [(V4SI "V8SI")

63631

(V4SF "V8SF")

63632

(V2DI "V4DI")

63633

- (V2DF "V4DF")])

63634

+ (V2DF "V4DF")

63635

+ (V1TI "V2TI")])

63636

63637

;; Constants for creating unspecs

63638

(define_c_enum "unspec"

63639

@@ -192,6 +206,8 @@

63640

UNSPEC_VSX_CVDPSXWS

63641

UNSPEC_VSX_CVDPUXWS

63642

UNSPEC_VSX_CVSPDP

63643

+ UNSPEC_VSX_CVSPDPN

63644

+ UNSPEC_VSX_CVDPSPN

63645

UNSPEC_VSX_CVSXWDP

63646

UNSPEC_VSX_CVUXWDP

63647

UNSPEC_VSX_CVSXDSP

63648

@@ -204,80 +220,397 @@

63649

UNSPEC_VSX_ROUND_I

63650

UNSPEC_VSX_ROUND_IC

63651

UNSPEC_VSX_SLDWI

63652

+ UNSPEC_VSX_XXSPLTW

63653

])

63654

63655

;; VSX moves

63656

-(define_insn "*vsx_mov<mode>"

63657

- [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,*Y,*r,*r,<VSr>,?wa,*r,v,wZ,v")

63658

- (match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,wa,Z,wa,r,Y,r,j,j,j,W,v,wZ"))]

63659

- "VECTOR_MEM_VSX_P (<MODE>mode)

63660

- && (register_operand (operands[0], <MODE>mode)

63661

- || register_operand (operands[1], <MODE>mode))"

63662

+

63663

+;; The patterns for LE permuted loads and stores come before the general

63664

+;; VSX moves so they match first.

63665

+(define_insn_and_split "*vsx_le_perm_load_<mode>"

63666

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")

63667

+ (match_operand:VSX_D 1 "memory_operand" "Z"))]

63668

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63669

+ "#"

63670

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63671

+ [(set (match_dup 2)

63672

+ (vec_select:<MODE>

63673

+ (match_dup 1)

63674

+ (parallel [(const_int 1) (const_int 0)])))

63675

+ (set (match_dup 0)

63676

+ (vec_select:<MODE>

63677

+ (match_dup 2)

63678

+ (parallel [(const_int 1) (const_int 0)])))]

63679

+ "

63680

{

63681

- switch (which_alternative)

63682

- {

63683

- case 0:

63684

- case 3:

63685

- gcc_assert (MEM_P (operands[0])

63686

- && GET_CODE (XEXP (operands[0], 0)) != PRE_INC

63687

- && GET_CODE (XEXP (operands[0], 0)) != PRE_DEC

63688

- && GET_CODE (XEXP (operands[0], 0)) != PRE_MODIFY);

63689

- return "stx<VSm>x %x1,%y0";

63690

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

63691

+ : operands[0];

63692

+}

63693

+ "

63694

+ [(set_attr "type" "vecload")

63695

+ (set_attr "length" "8")])

63696

63697

- case 1:

63698

- case 4:

63699

- gcc_assert (MEM_P (operands[1])

63700

- && GET_CODE (XEXP (operands[1], 0)) != PRE_INC

63701

- && GET_CODE (XEXP (operands[1], 0)) != PRE_DEC

63702

- && GET_CODE (XEXP (operands[1], 0)) != PRE_MODIFY);

63703

- return "lx<VSm>x %x0,%y1";

63704

+(define_insn_and_split "*vsx_le_perm_load_<mode>"

63705

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa")

63706

+ (match_operand:VSX_W 1 "memory_operand" "Z"))]

63707

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63708

+ "#"

63709

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63710

+ [(set (match_dup 2)

63711

+ (vec_select:<MODE>

63712

+ (match_dup 1)

63713

+ (parallel [(const_int 2) (const_int 3)

63714

+ (const_int 0) (const_int 1)])))

63715

+ (set (match_dup 0)

63716

+ (vec_select:<MODE>

63717

+ (match_dup 2)

63718

+ (parallel [(const_int 2) (const_int 3)

63719

+ (const_int 0) (const_int 1)])))]

63720

+ "

63721

+{

63722

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

63723

+ : operands[0];

63724

+}

63725

+ "

63726

+ [(set_attr "type" "vecload")

63727

+ (set_attr "length" "8")])

63728

63729

- case 2:

63730

- case 5:

63731

- return "xxlor %x0,%x1,%x1";

63732

+(define_insn_and_split "*vsx_le_perm_load_v8hi"

63733

+ [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")

63734

+ (match_operand:V8HI 1 "memory_operand" "Z"))]

63735

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63736

+ "#"

63737

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63738

+ [(set (match_dup 2)

63739

+ (vec_select:V8HI

63740

+ (match_dup 1)

63741

+ (parallel [(const_int 4) (const_int 5)

63742

+ (const_int 6) (const_int 7)

63743

+ (const_int 0) (const_int 1)

63744

+ (const_int 2) (const_int 3)])))

63745

+ (set (match_dup 0)

63746

+ (vec_select:V8HI

63747

+ (match_dup 2)

63748

+ (parallel [(const_int 4) (const_int 5)

63749

+ (const_int 6) (const_int 7)

63750

+ (const_int 0) (const_int 1)

63751

+ (const_int 2) (const_int 3)])))]

63752

+ "

63753

+{

63754

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

63755

+ : operands[0];

63756

+}

63757

+ "

63758

+ [(set_attr "type" "vecload")

63759

+ (set_attr "length" "8")])

63760

63761

- case 6:

63762

- case 7:

63763

- case 8:

63764

- case 11:

63765

- return "#";

63766

+(define_insn_and_split "*vsx_le_perm_load_v16qi"

63767

+ [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")

63768

+ (match_operand:V16QI 1 "memory_operand" "Z"))]

63769

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63770

+ "#"

63771

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63772

+ [(set (match_dup 2)

63773

+ (vec_select:V16QI

63774

+ (match_dup 1)

63775

+ (parallel [(const_int 8) (const_int 9)

63776

+ (const_int 10) (const_int 11)

63777

+ (const_int 12) (const_int 13)

63778

+ (const_int 14) (const_int 15)

63779

+ (const_int 0) (const_int 1)

63780

+ (const_int 2) (const_int 3)

63781

+ (const_int 4) (const_int 5)

63782

+ (const_int 6) (const_int 7)])))

63783

+ (set (match_dup 0)

63784

+ (vec_select:V16QI

63785

+ (match_dup 2)

63786

+ (parallel [(const_int 8) (const_int 9)

63787

+ (const_int 10) (const_int 11)

63788

+ (const_int 12) (const_int 13)

63789

+ (const_int 14) (const_int 15)

63790

+ (const_int 0) (const_int 1)

63791

+ (const_int 2) (const_int 3)

63792

+ (const_int 4) (const_int 5)

63793

+ (const_int 6) (const_int 7)])))]

63794

+ "

63795

+{

63796

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

63797

+ : operands[0];

63798

+}

63799

+ "

63800

+ [(set_attr "type" "vecload")

63801

+ (set_attr "length" "8")])

63802

63803

- case 9:

63804

- case 10:

63805

- return "xxlxor %x0,%x0,%x0";

63806

+(define_insn "*vsx_le_perm_store_<mode>"

63807

+ [(set (match_operand:VSX_D 0 "memory_operand" "=Z")

63808

+ (match_operand:VSX_D 1 "vsx_register_operand" "+wa"))]

63809

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63810

+ "#"

63811

+ [(set_attr "type" "vecstore")

63812

+ (set_attr "length" "12")])

63813

63814

- case 12:

63815

- return output_vec_const_move (operands);

63816

+(define_split

63817

+ [(set (match_operand:VSX_D 0 "memory_operand" "")

63818

+ (match_operand:VSX_D 1 "vsx_register_operand" ""))]

63819

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

63820

+ [(set (match_dup 2)

63821

+ (vec_select:<MODE>

63822

+ (match_dup 1)

63823

+ (parallel [(const_int 1) (const_int 0)])))

63824

+ (set (match_dup 0)

63825

+ (vec_select:<MODE>

63826

+ (match_dup 2)

63827

+ (parallel [(const_int 1) (const_int 0)])))]

63828

+{

63829

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

63830

+ : operands[1];

63831

+})

63832

63833

- case 13:

63834

- gcc_assert (MEM_P (operands[0])

63835

- && GET_CODE (XEXP (operands[0], 0)) != PRE_INC

63836

- && GET_CODE (XEXP (operands[0], 0)) != PRE_DEC

63837

- && GET_CODE (XEXP (operands[0], 0)) != PRE_MODIFY);

63838

- return "stvx %1,%y0";

63839

+;; The post-reload split requires that we re-permute the source

63840

+;; register in case it is still live.

63841

+(define_split

63842

+ [(set (match_operand:VSX_D 0 "memory_operand" "")

63843

+ (match_operand:VSX_D 1 "vsx_register_operand" ""))]

63844

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

63845

+ [(set (match_dup 1)

63846

+ (vec_select:<MODE>

63847

+ (match_dup 1)

63848

+ (parallel [(const_int 1) (const_int 0)])))

63849

+ (set (match_dup 0)

63850

+ (vec_select:<MODE>

63851

+ (match_dup 1)

63852

+ (parallel [(const_int 1) (const_int 0)])))

63853

+ (set (match_dup 1)

63854

+ (vec_select:<MODE>

63855

+ (match_dup 1)

63856

+ (parallel [(const_int 1) (const_int 0)])))]

63857

+ "")

63858

63859

- case 14:

63860

- gcc_assert (MEM_P (operands[0])

63861

- && GET_CODE (XEXP (operands[0], 0)) != PRE_INC

63862

- && GET_CODE (XEXP (operands[0], 0)) != PRE_DEC

63863

- && GET_CODE (XEXP (operands[0], 0)) != PRE_MODIFY);

63864

- return "lvx %0,%y1";

63865

+(define_insn "*vsx_le_perm_store_<mode>"

63866

+ [(set (match_operand:VSX_W 0 "memory_operand" "=Z")

63867

+ (match_operand:VSX_W 1 "vsx_register_operand" "+wa"))]

63868

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63869

+ "#"

63870

+ [(set_attr "type" "vecstore")

63871

+ (set_attr "length" "12")])

63872

63873

- default:

63874

- gcc_unreachable ();

63875

- }

63876

+(define_split

63877

+ [(set (match_operand:VSX_W 0 "memory_operand" "")

63878

+ (match_operand:VSX_W 1 "vsx_register_operand" ""))]

63879

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

63880

+ [(set (match_dup 2)

63881

+ (vec_select:<MODE>

63882

+ (match_dup 1)

63883

+ (parallel [(const_int 2) (const_int 3)

63884

+ (const_int 0) (const_int 1)])))

63885

+ (set (match_dup 0)

63886

+ (vec_select:<MODE>

63887

+ (match_dup 2)

63888

+ (parallel [(const_int 2) (const_int 3)

63889

+ (const_int 0) (const_int 1)])))]

63890

+{

63891

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

63892

+ : operands[1];

63893

+})

63894

+

63895

+;; The post-reload split requires that we re-permute the source

63896

+;; register in case it is still live.

63897

+(define_split

63898

+ [(set (match_operand:VSX_W 0 "memory_operand" "")

63899

+ (match_operand:VSX_W 1 "vsx_register_operand" ""))]

63900

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

63901

+ [(set (match_dup 1)

63902

+ (vec_select:<MODE>

63903

+ (match_dup 1)

63904

+ (parallel [(const_int 2) (const_int 3)

63905

+ (const_int 0) (const_int 1)])))

63906

+ (set (match_dup 0)

63907

+ (vec_select:<MODE>

63908

+ (match_dup 1)

63909

+ (parallel [(const_int 2) (const_int 3)

63910

+ (const_int 0) (const_int 1)])))

63911

+ (set (match_dup 1)

63912

+ (vec_select:<MODE>

63913

+ (match_dup 1)

63914

+ (parallel [(const_int 2) (const_int 3)

63915

+ (const_int 0) (const_int 1)])))]

63916

+ "")

63917

+

63918

+(define_insn "*vsx_le_perm_store_v8hi"

63919

+ [(set (match_operand:V8HI 0 "memory_operand" "=Z")

63920

+ (match_operand:V8HI 1 "vsx_register_operand" "+wa"))]

63921

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63922

+ "#"

63923

+ [(set_attr "type" "vecstore")

63924

+ (set_attr "length" "12")])

63925

+

63926

+(define_split

63927

+ [(set (match_operand:V8HI 0 "memory_operand" "")

63928

+ (match_operand:V8HI 1 "vsx_register_operand" ""))]

63929

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

63930

+ [(set (match_dup 2)

63931

+ (vec_select:V8HI

63932

+ (match_dup 1)

63933

+ (parallel [(const_int 4) (const_int 5)

63934

+ (const_int 6) (const_int 7)

63935

+ (const_int 0) (const_int 1)

63936

+ (const_int 2) (const_int 3)])))

63937

+ (set (match_dup 0)

63938

+ (vec_select:V8HI

63939

+ (match_dup 2)

63940

+ (parallel [(const_int 4) (const_int 5)

63941

+ (const_int 6) (const_int 7)

63942

+ (const_int 0) (const_int 1)

63943

+ (const_int 2) (const_int 3)])))]

63944

+{

63945

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

63946

+ : operands[1];

63947

+})

63948

+

63949

+;; The post-reload split requires that we re-permute the source

63950

+;; register in case it is still live.

63951

+(define_split

63952

+ [(set (match_operand:V8HI 0 "memory_operand" "")

63953

+ (match_operand:V8HI 1 "vsx_register_operand" ""))]

63954

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

63955

+ [(set (match_dup 1)

63956

+ (vec_select:V8HI

63957

+ (match_dup 1)

63958

+ (parallel [(const_int 4) (const_int 5)

63959

+ (const_int 6) (const_int 7)

63960

+ (const_int 0) (const_int 1)

63961

+ (const_int 2) (const_int 3)])))

63962

+ (set (match_dup 0)

63963

+ (vec_select:V8HI

63964

+ (match_dup 1)

63965

+ (parallel [(const_int 4) (const_int 5)

63966

+ (const_int 6) (const_int 7)

63967

+ (const_int 0) (const_int 1)

63968

+ (const_int 2) (const_int 3)])))

63969

+ (set (match_dup 1)

63970

+ (vec_select:V8HI

63971

+ (match_dup 1)

63972

+ (parallel [(const_int 4) (const_int 5)

63973

+ (const_int 6) (const_int 7)

63974

+ (const_int 0) (const_int 1)

63975

+ (const_int 2) (const_int 3)])))]

63976

+ "")

63977

+

63978

+(define_insn "*vsx_le_perm_store_v16qi"

63979

+ [(set (match_operand:V16QI 0 "memory_operand" "=Z")

63980

+ (match_operand:V16QI 1 "vsx_register_operand" "+wa"))]

63981

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

63982

+ "#"

63983

+ [(set_attr "type" "vecstore")

63984

+ (set_attr "length" "12")])

63985

+

63986

+(define_split

63987

+ [(set (match_operand:V16QI 0 "memory_operand" "")

63988

+ (match_operand:V16QI 1 "vsx_register_operand" ""))]

63989

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

63990

+ [(set (match_dup 2)

63991

+ (vec_select:V16QI

63992

+ (match_dup 1)

63993

+ (parallel [(const_int 8) (const_int 9)

63994

+ (const_int 10) (const_int 11)

63995

+ (const_int 12) (const_int 13)

63996

+ (const_int 14) (const_int 15)

63997

+ (const_int 0) (const_int 1)

63998

+ (const_int 2) (const_int 3)

63999

+ (const_int 4) (const_int 5)

64000

+ (const_int 6) (const_int 7)])))

64001

+ (set (match_dup 0)

64002

+ (vec_select:V16QI

64003

+ (match_dup 2)

64004

+ (parallel [(const_int 8) (const_int 9)

64005

+ (const_int 10) (const_int 11)

64006

+ (const_int 12) (const_int 13)

64007

+ (const_int 14) (const_int 15)

64008

+ (const_int 0) (const_int 1)

64009

+ (const_int 2) (const_int 3)

64010

+ (const_int 4) (const_int 5)

64011

+ (const_int 6) (const_int 7)])))]

64012

+{

64013

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

64014

+ : operands[1];

64015

+})

64016

+

64017

+;; The post-reload split requires that we re-permute the source

64018

+;; register in case it is still live.

64019

+(define_split

64020

+ [(set (match_operand:V16QI 0 "memory_operand" "")

64021

+ (match_operand:V16QI 1 "vsx_register_operand" ""))]

64022

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

64023

+ [(set (match_dup 1)

64024

+ (vec_select:V16QI

64025

+ (match_dup 1)

64026

+ (parallel [(const_int 8) (const_int 9)

64027

+ (const_int 10) (const_int 11)

64028

+ (const_int 12) (const_int 13)

64029

+ (const_int 14) (const_int 15)

64030

+ (const_int 0) (const_int 1)

64031

+ (const_int 2) (const_int 3)

64032

+ (const_int 4) (const_int 5)

64033

+ (const_int 6) (const_int 7)])))

64034

+ (set (match_dup 0)

64035

+ (vec_select:V16QI

64036

+ (match_dup 1)

64037

+ (parallel [(const_int 8) (const_int 9)

64038

+ (const_int 10) (const_int 11)

64039

+ (const_int 12) (const_int 13)

64040

+ (const_int 14) (const_int 15)

64041

+ (const_int 0) (const_int 1)

64042

+ (const_int 2) (const_int 3)

64043

+ (const_int 4) (const_int 5)

64044

+ (const_int 6) (const_int 7)])))

64045

+ (set (match_dup 1)

64046

+ (vec_select:V16QI

64047

+ (match_dup 1)

64048

+ (parallel [(const_int 8) (const_int 9)

64049

+ (const_int 10) (const_int 11)

64050

+ (const_int 12) (const_int 13)

64051

+ (const_int 14) (const_int 15)

64052

+ (const_int 0) (const_int 1)

64053

+ (const_int 2) (const_int 3)

64054

+ (const_int 4) (const_int 5)

64055

+ (const_int 6) (const_int 7)])))]

64056

+ "")

64057

+

64058

+

64059

+(define_insn "*vsx_mov<mode>"

64060

+ [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,wQ,?&r,??Y,??r,??r,<VSr>,?wa,*r,v,wZ, v")

64061

+ (match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,wa,Z,wa,r,wQ,r,Y,r,j,j,j,W,v,wZ"))]

64062

+ "VECTOR_MEM_VSX_P (<MODE>mode)

64063

+ && (register_operand (operands[0], <MODE>mode)

64064

+ || register_operand (operands[1], <MODE>mode))"

64065

+{

64066

+ return rs6000_output_move_128bit (operands);

64067

}

64068

- [(set_attr "type" "vecstore,vecload,vecsimple,vecstore,vecload,vecsimple,*,*,*,vecsimple,vecsimple,*,*,vecstore,vecload")])

64069

+ [(set_attr "type" "vecstore,vecload,vecsimple,vecstore,vecload,vecsimple,load,store,store,load, *,vecsimple,vecsimple,*, *,vecstore,vecload")

64070

+ (set_attr "length" "4,4,4,4,4,4,12,12,12,12,16,4,4,*,16,4,4")])

64071

64072

-;; Unlike other VSX moves, allow the GPRs, since a normal use of TImode is for

64073

-;; unions. However for plain data movement, slightly favor the vector loads

64074

-(define_insn "*vsx_movti"

64075

- [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,?Y,?r,?r,wa,v,v,wZ")

64076

- (match_operand:TI 1 "input_operand" "wa,Z,wa,r,Y,r,j,W,wZ,v"))]

64077

- "VECTOR_MEM_VSX_P (TImode)

64078

+;; Unlike other VSX moves, allow the GPRs even for reloading, since a normal

64079

+;; use of TImode is for unions. However for plain data movement, slightly

64080

+;; favor the vector loads

64081

+(define_insn "*vsx_movti_64bit"

64082

+ [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,v,v,wZ,wQ,&r,Y,r,r,?r")

64083

+ (match_operand:TI 1 "input_operand" "wa,Z,wa,O,W,wZ,v,r,wQ,r,Y,r,n"))]

64084

+ "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)

64085

&& (register_operand (operands[0], TImode)

64086

|| register_operand (operands[1], TImode))"

64087

{

64088

+ return rs6000_output_move_128bit (operands);

64089

+}

64090

+ [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,vecsimple,vecstore,vecload,store,load,store,load,*,*")

64091

+ (set_attr "length" "4,4,4,4,16,4,4,8,8,8,8,8,8")])

64092

+

64093

+(define_insn "*vsx_movti_32bit"

64094

+ [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,v, v,wZ,Q,Y,????r,????r,????r,r")

64095

+ (match_operand:TI 1 "input_operand" "wa, Z,wa, O,W,wZ, v,r,r, Q, Y, r,n"))]

64096

+ "! TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)

64097

+ && (register_operand (operands[0], TImode)

64098

+ || register_operand (operands[1], TImode))"

64099

+{

64100

switch (which_alternative)

64101

{

64102

case 0:

64103

@@ -290,27 +623,45 @@

64104

return "xxlor %x0,%x1,%x1";

64105

64106

case 3:

64107

+ return "xxlxor %x0,%x0,%x0";

64108

+

64109

case 4:

64110

+ return output_vec_const_move (operands);

64111

+

64112

case 5:

64113

- return "#";

64114

+ return "stvx %1,%y0";

64115

64116

case 6:

64117

- return "xxlxor %x0,%x0,%x0";

64118

+ return "lvx %0,%y1";

64119

64120

case 7:

64121

- return output_vec_const_move (operands);

64122

+ if (TARGET_STRING)

64123

+ return \"stswi %1,%P0,16\";

64124

64125

case 8:

64126

- return "stvx %1,%y0";

64127

+ return \"#\";

64128

64129

case 9:

64130

- return "lvx %0,%y1";

64131

+ /* If the address is not used in the output, we can use lsi. Otherwise,

64132

+ fall through to generating four loads. */

64133

+ if (TARGET_STRING

64134

+ && ! reg_overlap_mentioned_p (operands[0], operands[1]))

64135

+ return \"lswi %0,%P1,16\";

64136

+ /* ... fall through ... */

64137

64138

+ case 10:

64139

+ case 11:

64140

+ case 12:

64141

+ return \"#\";

64142

default:

64143

gcc_unreachable ();

64144

}

64145

}

64146

- [(set_attr "type" "vecstore,vecload,vecsimple,*,*,*,vecsimple,*,vecstore,vecload")])

64147

+ [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,vecsimple,vecstore,vecload,store_ux,store_ux,load_ux,load_ux, *, *")

64148

+ (set_attr "length" " 4, 4, 4, 4, 8, 4, 4, 16, 16, 16, 16,16,16")

64149

+ (set (attr "cell_micro") (if_then_else (match_test "TARGET_STRING")

64150

+ (const_string "always")

64151

+ (const_string "conditional")))])

64152

64153

;; Explicit load/store expanders for the builtin functions

64154

(define_expand "vsx_load_<mode>"

64155

@@ -320,46 +671,48 @@

64156

"")

64157

64158

(define_expand "vsx_store_<mode>"

64159

- [(set (match_operand:VEC_M 0 "memory_operand" "")

64160

- (match_operand:VEC_M 1 "vsx_register_operand" ""))]

64161

+ [(set (match_operand:VSX_M 0 "memory_operand" "")

64162

+ (match_operand:VSX_M 1 "vsx_register_operand" ""))]

64163

"VECTOR_MEM_VSX_P (<MODE>mode)"

64164

"")

64165

64166

64167

-;; VSX scalar and vector floating point arithmetic instructions

64168

+;; VSX vector floating point arithmetic instructions. The VSX scalar

64169

+;; instructions are now combined with the insn for the traditional floating

64170

+;; point unit.

64171

(define_insn "*vsx_add<mode>3"

64172

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64173

- (plus:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

64174

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

64175

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64176

+ (plus:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

64177

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

64178

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64179

- "x<VSv>add<VSs> %x0,%x1,%x2"

64180

+ "xvadd<VSs> %x0,%x1,%x2"

64181

[(set_attr "type" "<VStype_simple>")

64182

(set_attr "fp_type" "<VSfptype_simple>")])

64183

64184

(define_insn "*vsx_sub<mode>3"

64185

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64186

- (minus:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

64187

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

64188

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64189

+ (minus:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

64190

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

64191

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64192

- "x<VSv>sub<VSs> %x0,%x1,%x2"

64193

+ "xvsub<VSs> %x0,%x1,%x2"

64194

[(set_attr "type" "<VStype_simple>")

64195

(set_attr "fp_type" "<VSfptype_simple>")])

64196

64197

(define_insn "*vsx_mul<mode>3"

64198

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64199

- (mult:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

64200

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

64201

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64202

+ (mult:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

64203

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

64204

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64205

- "x<VSv>mul<VSs> %x0,%x1,%x2"

64206

- [(set_attr "type" "<VStype_mul>")

64207

+ "xvmul<VSs> %x0,%x1,%x2"

64208

+ [(set_attr "type" "<VStype_simple>")

64209

(set_attr "fp_type" "<VSfptype_mul>")])

64210

64211

(define_insn "*vsx_div<mode>3"

64212

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64213

- (div:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

64214

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

64215

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64216

+ (div:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

64217

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

64218

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64219

- "x<VSv>div<VSs> %x0,%x1,%x2"

64220

+ "xvdiv<VSs> %x0,%x1,%x2"

64221

[(set_attr "type" "<VStype_div>")

64222

(set_attr "fp_type" "<VSfptype_div>")])

64223

64224

@@ -402,94 +755,72 @@

64225

(set_attr "fp_type" "<VSfptype_simple>")])

64226

64227

(define_insn "vsx_fre<mode>2"

64228

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64229

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

64230

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64231

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

64232

UNSPEC_FRES))]

64233

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64234

- "x<VSv>re<VSs> %x0,%x1"

64235

+ "xvre<VSs> %x0,%x1"

64236

[(set_attr "type" "<VStype_simple>")

64237

(set_attr "fp_type" "<VSfptype_simple>")])

64238

64239

(define_insn "*vsx_neg<mode>2"

64240

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64241

- (neg:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

64242

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64243

+ (neg:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

64244

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64245

- "x<VSv>neg<VSs> %x0,%x1"

64246

+ "xvneg<VSs> %x0,%x1"

64247

[(set_attr "type" "<VStype_simple>")

64248

(set_attr "fp_type" "<VSfptype_simple>")])

64249

64250

(define_insn "*vsx_abs<mode>2"

64251

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64252

- (abs:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

64253

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64254

+ (abs:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

64255

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64256

- "x<VSv>abs<VSs> %x0,%x1"

64257

+ "xvabs<VSs> %x0,%x1"

64258

[(set_attr "type" "<VStype_simple>")

64259

(set_attr "fp_type" "<VSfptype_simple>")])

64260

64261

(define_insn "vsx_nabs<mode>2"

64262

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64263

- (neg:VSX_B

64264

- (abs:VSX_B

64265

- (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa"))))]

64266

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64267

+ (neg:VSX_F

64268

+ (abs:VSX_F

64269

+ (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa"))))]

64270

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64271

- "x<VSv>nabs<VSs> %x0,%x1"

64272

+ "xvnabs<VSs> %x0,%x1"

64273

[(set_attr "type" "<VStype_simple>")

64274

(set_attr "fp_type" "<VSfptype_simple>")])

64275

64276

(define_insn "vsx_smax<mode>3"

64277

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64278

- (smax:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

64279

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

64280

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64281

+ (smax:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

64282

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

64283

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64284

- "x<VSv>max<VSs> %x0,%x1,%x2"

64285

+ "xvmax<VSs> %x0,%x1,%x2"

64286

[(set_attr "type" "<VStype_simple>")

64287

(set_attr "fp_type" "<VSfptype_simple>")])

64288

64289

(define_insn "*vsx_smin<mode>3"

64290

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64291

- (smin:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

64292

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

64293

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64294

+ (smin:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

64295

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

64296

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64297

- "x<VSv>min<VSs> %x0,%x1,%x2"

64298

+ "xvmin<VSs> %x0,%x1,%x2"

64299

[(set_attr "type" "<VStype_simple>")

64300

(set_attr "fp_type" "<VSfptype_simple>")])

64301

64302

-;; Special VSX version of smin/smax for single precision floating point. Since

64303

-;; both numbers are rounded to single precision, we can just use the DP version

64304

-;; of the instruction.

64305

-

64306

-(define_insn "*vsx_smaxsf3"

64307

- [(set (match_operand:SF 0 "vsx_register_operand" "=f")

64308

- (smax:SF (match_operand:SF 1 "vsx_register_operand" "f")

64309

- (match_operand:SF 2 "vsx_register_operand" "f")))]

64310

- "VECTOR_UNIT_VSX_P (DFmode)"

64311

- "xsmaxdp %x0,%x1,%x2"

64312

- [(set_attr "type" "fp")

64313

- (set_attr "fp_type" "fp_addsub_d")])

64314

-

64315

-(define_insn "*vsx_sminsf3"

64316

- [(set (match_operand:SF 0 "vsx_register_operand" "=f")

64317

- (smin:SF (match_operand:SF 1 "vsx_register_operand" "f")

64318

- (match_operand:SF 2 "vsx_register_operand" "f")))]

64319

- "VECTOR_UNIT_VSX_P (DFmode)"

64320

- "xsmindp %x0,%x1,%x2"

64321

- [(set_attr "type" "fp")

64322

- (set_attr "fp_type" "fp_addsub_d")])

64323

-

64324

(define_insn "*vsx_sqrt<mode>2"

64325

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64326

- (sqrt:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

64327

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64328

+ (sqrt:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

64329

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64330

- "x<VSv>sqrt<VSs> %x0,%x1"

64331

+ "xvsqrt<VSs> %x0,%x1"

64332

[(set_attr "type" "<VStype_sqrt>")

64333

(set_attr "fp_type" "<VSfptype_sqrt>")])

64334

64335

(define_insn "*vsx_rsqrte<mode>2"

64336

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64337

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

64338

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64339

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

64340

UNSPEC_RSQRT))]

64341

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64342

- "x<VSv>rsqrte<VSs> %x0,%x1"

64343

+ "xvrsqrte<VSs> %x0,%x1"

64344

[(set_attr "type" "<VStype_simple>")

64345

(set_attr "fp_type" "<VSfptype_simple>")])

64346

64347

@@ -528,27 +859,11 @@

64348

[(set_attr "type" "<VStype_simple>")

64349

(set_attr "fp_type" "<VSfptype_simple>")])

64350

64351

-;; Fused vector multiply/add instructions Support the classical DF versions of

64352

-;; fma, which allows the target to be a separate register from the 3 inputs.

64353

-;; Under VSX, the target must be either the addend or the first multiply.

64354

-;; Where we can, also do the same for the Altivec V4SF fmas.

64355

+;; Fused vector multiply/add instructions. Support the classical Altivec

64356

+;; versions of fma, which allows the target to be a separate register from the

64357

+;; 3 inputs. Under VSX, the target must be either the addend or the first

64358

+;; multiply.

64359

64360

-(define_insn "*vsx_fmadf4"

64361

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

64362

- (fma:DF

64363

- (match_operand:DF 1 "vsx_register_operand" "%ws,ws,wa,wa,d")

64364

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

64365

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d")))]

64366

- "VECTOR_UNIT_VSX_P (DFmode)"

64367

- "@

64368

- xsmaddadp %x0,%x1,%x2

64369

- xsmaddmdp %x0,%x1,%x3

64370

- xsmaddadp %x0,%x1,%x2

64371

- xsmaddmdp %x0,%x1,%x3

64372

- fmadd %0,%1,%2,%3"

64373

- [(set_attr "type" "fp")

64374

- (set_attr "fp_type" "fp_maddsub_d")])

64375

-

64376

(define_insn "*vsx_fmav4sf4"

64377

[(set (match_operand:V4SF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,v")

64378

(fma:V4SF

64379

@@ -578,23 +893,6 @@

64380

xvmaddmdp %x0,%x1,%x3"

64381

[(set_attr "type" "vecdouble")])

64382

64383

-(define_insn "*vsx_fmsdf4"

64384

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

64385

- (fma:DF

64386

- (match_operand:DF 1 "vsx_register_operand" "%ws,ws,wa,wa,d")

64387

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

64388

- (neg:DF

64389

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d"))))]

64390

- "VECTOR_UNIT_VSX_P (DFmode)"

64391

- "@

64392

- xsmsubadp %x0,%x1,%x2

64393

- xsmsubmdp %x0,%x1,%x3

64394

- xsmsubadp %x0,%x1,%x2

64395

- xsmsubmdp %x0,%x1,%x3

64396

- fmsub %0,%1,%2,%3"

64397

- [(set_attr "type" "fp")

64398

- (set_attr "fp_type" "fp_maddsub_d")])

64399

-

64400

(define_insn "*vsx_fms<mode>4"

64401

[(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,<VSr>,?wa,?wa")

64402

(fma:VSX_F

64403

@@ -604,29 +902,12 @@

64404

(match_operand:VSX_F 3 "vsx_register_operand" "0,<VSr>,0,wa"))))]

64405

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64406

"@

64407

- x<VSv>msuba<VSs> %x0,%x1,%x2

64408

- x<VSv>msubm<VSs> %x0,%x1,%x3

64409

- x<VSv>msuba<VSs> %x0,%x1,%x2

64410

- x<VSv>msubm<VSs> %x0,%x1,%x3"

64411

+ xvmsuba<VSs> %x0,%x1,%x2

64412

+ xvmsubm<VSs> %x0,%x1,%x3

64413

+ xvmsuba<VSs> %x0,%x1,%x2

64414

+ xvmsubm<VSs> %x0,%x1,%x3"

64415

[(set_attr "type" "<VStype_mul>")])

64416

64417

-(define_insn "*vsx_nfmadf4"

64418

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

64419

- (neg:DF

64420

- (fma:DF

64421

- (match_operand:DF 1 "vsx_register_operand" "ws,ws,wa,wa,d")

64422

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

64423

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d"))))]

64424

- "VECTOR_UNIT_VSX_P (DFmode)"

64425

- "@

64426

- xsnmaddadp %x0,%x1,%x2

64427

- xsnmaddmdp %x0,%x1,%x3

64428

- xsnmaddadp %x0,%x1,%x2

64429

- xsnmaddmdp %x0,%x1,%x3

64430

- fnmadd %0,%1,%2,%3"

64431

- [(set_attr "type" "fp")

64432

- (set_attr "fp_type" "fp_maddsub_d")])

64433

-

64434

(define_insn "*vsx_nfma<mode>4"

64435

[(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,<VSr>,?wa,?wa")

64436

(neg:VSX_F

64437

@@ -636,31 +917,13 @@

64438

(match_operand:VSX_F 3 "vsx_register_operand" "0,<VSr>,0,wa"))))]

64439

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64440

"@

64441

- x<VSv>nmadda<VSs> %x0,%x1,%x2

64442

- x<VSv>nmaddm<VSs> %x0,%x1,%x3

64443

- x<VSv>nmadda<VSs> %x0,%x1,%x2

64444

- x<VSv>nmaddm<VSs> %x0,%x1,%x3"

64445

+ xvnmadda<VSs> %x0,%x1,%x2

64446

+ xvnmaddm<VSs> %x0,%x1,%x3

64447

+ xvnmadda<VSs> %x0,%x1,%x2

64448

+ xvnmaddm<VSs> %x0,%x1,%x3"

64449

[(set_attr "type" "<VStype_mul>")

64450

(set_attr "fp_type" "<VSfptype_mul>")])

64451

64452

-(define_insn "*vsx_nfmsdf4"

64453

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

64454

- (neg:DF

64455

- (fma:DF

64456

- (match_operand:DF 1 "vsx_register_operand" "%ws,ws,wa,wa,d")

64457

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

64458

- (neg:DF

64459

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d")))))]

64460

- "VECTOR_UNIT_VSX_P (DFmode)"

64461

- "@

64462

- xsnmsubadp %x0,%x1,%x2

64463

- xsnmsubmdp %x0,%x1,%x3

64464

- xsnmsubadp %x0,%x1,%x2

64465

- xsnmsubmdp %x0,%x1,%x3

64466

- fnmsub %0,%1,%2,%3"

64467

- [(set_attr "type" "fp")

64468

- (set_attr "fp_type" "fp_maddsub_d")])

64469

-

64470

(define_insn "*vsx_nfmsv4sf4"

64471

[(set (match_operand:V4SF 0 "vsx_register_operand" "=wf,wf,?wa,?wa,v")

64472

(neg:V4SF

64473

@@ -722,16 +985,6 @@

64474

[(set_attr "type" "<VStype_simple>")

64475

(set_attr "fp_type" "<VSfptype_simple>")])

64476

64477

-;; Floating point scalar compare

64478

-(define_insn "*vsx_cmpdf_internal1"

64479

- [(set (match_operand:CCFP 0 "cc_reg_operand" "=y,?y")

64480

- (compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "ws,wa")

64481

- (match_operand:DF 2 "gpc_reg_operand" "ws,wa")))]

64482

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

64483

- && VECTOR_UNIT_VSX_P (DFmode)"

64484

- "xscmpudp %0,%x1,%x2"

64485

- [(set_attr "type" "fpcompare")])

64486

-

64487

;; Compare vectors producing a vector result and a predicate, setting CR6 to

64488

;; indicate a combined status

64489

(define_insn "*vsx_eq_<mode>_p"

64490

@@ -798,13 +1051,13 @@

64491

64492

;; Copy sign

64493

(define_insn "vsx_copysign<mode>3"

64494

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64495

- (unspec:VSX_B

64496

- [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

64497

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")]

64498

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64499

+ (unspec:VSX_F

64500

+ [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

64501

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")]

64502

UNSPEC_COPYSIGN))]

64503

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64504

- "x<VSv>cpsgn<VSs> %x0,%x2,%x1"

64505

+ "xvcpsgn<VSs> %x0,%x2,%x1"

64506

[(set_attr "type" "<VStype_simple>")

64507

(set_attr "fp_type" "<VSfptype_simple>")])

64508

64509

@@ -865,10 +1118,10 @@

64510

(set_attr "fp_type" "<VSfptype_simple>")])

64511

64512

(define_insn "vsx_btrunc<mode>2"

64513

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64514

- (fix:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

64515

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64516

+ (fix:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

64517

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64518

- "x<VSv>r<VSs>iz %x0,%x1"

64519

+ "xvr<VSs>iz %x0,%x1"

64520

[(set_attr "type" "<VStype_simple>")

64521

(set_attr "fp_type" "<VSfptype_simple>")])

64522

64523

@@ -882,20 +1135,20 @@

64524

(set_attr "fp_type" "<VSfptype_simple>")])

64525

64526

(define_insn "vsx_floor<mode>2"

64527

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64528

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

64529

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64530

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

64531

UNSPEC_FRIM))]

64532

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64533

- "x<VSv>r<VSs>im %x0,%x1"

64534

+ "xvr<VSs>im %x0,%x1"

64535

[(set_attr "type" "<VStype_simple>")

64536

(set_attr "fp_type" "<VSfptype_simple>")])

64537

64538

(define_insn "vsx_ceil<mode>2"

64539

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

64540

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

64541

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

64542

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

64543

UNSPEC_FRIP))]

64544

"VECTOR_UNIT_VSX_P (<MODE>mode)"

64545

- "x<VSv>r<VSs>ip %x0,%x1"

64546

+ "xvr<VSs>ip %x0,%x1"

64547

[(set_attr "type" "<VStype_simple>")

64548

(set_attr "fp_type" "<VSfptype_simple>")])

64549

64550

@@ -942,6 +1195,40 @@

64551

"xscvspdp %x0,%x1"

64552

[(set_attr "type" "fp")])

64553

64554

+;; ISA 2.07 xscvdpspn/xscvspdpn that does not raise an error on signalling NaNs

64555

+(define_insn "vsx_xscvdpspn"

64556

+ [(set (match_operand:V4SF 0 "vsx_register_operand" "=ws,?wa")

64557

+ (unspec:V4SF [(match_operand:DF 1 "vsx_register_operand" "wd,wa")]

64558

+ UNSPEC_VSX_CVDPSPN))]

64559

+ "TARGET_XSCVDPSPN"

64560

+ "xscvdpspn %x0,%x1"

64561

+ [(set_attr "type" "fp")])

64562

+

64563

+(define_insn "vsx_xscvspdpn"

64564

+ [(set (match_operand:DF 0 "vsx_register_operand" "=ws,?wa")

64565

+ (unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wa,wa")]

64566

+ UNSPEC_VSX_CVSPDPN))]

64567

+ "TARGET_XSCVSPDPN"

64568

+ "xscvspdpn %x0,%x1"

64569

+ [(set_attr "type" "fp")])

64570

+

64571

+(define_insn "vsx_xscvdpspn_scalar"

64572

+ [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa")

64573

+ (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "f")]

64574

+ UNSPEC_VSX_CVDPSPN))]

64575

+ "TARGET_XSCVDPSPN"

64576

+ "xscvdpspn %x0,%x1"

64577

+ [(set_attr "type" "fp")])

64578

+

64579

+;; Used by direct move to move a SFmode value from GPR to VSX register

64580

+(define_insn "vsx_xscvspdpn_directmove"

64581

+ [(set (match_operand:SF 0 "vsx_register_operand" "=wa")

64582

+ (unspec:SF [(match_operand:SF 1 "vsx_register_operand" "wa")]

64583

+ UNSPEC_VSX_CVSPDPN))]

64584

+ "TARGET_XSCVSPDPN"

64585

+ "xscvspdpn %x0,%x1"

64586

+ [(set_attr "type" "fp")])

64587

+

64588

;; Convert from 64-bit to 32-bit types

64589

;; Note, favor the Altivec registers since the usual use of these instructions

64590

;; is in vector converts and we need to use the Altivec vperm instruction.

64591

@@ -1027,73 +1314,21 @@

64592

(set_attr "fp_type" "<VSfptype_simple>")])

64593

64594

64595

-;; Logical and permute operations

64596

-(define_insn "*vsx_and<mode>3"

64597

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

64598

- (and:VSX_L

64599

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

64600

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa")))]

64601

- "VECTOR_MEM_VSX_P (<MODE>mode)"

64602

- "xxland %x0,%x1,%x2"

64603

- [(set_attr "type" "vecsimple")])

64604

-

64605

-(define_insn "*vsx_ior<mode>3"

64606

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

64607

- (ior:VSX_L (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

64608

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa")))]

64609

- "VECTOR_MEM_VSX_P (<MODE>mode)"

64610

- "xxlor %x0,%x1,%x2"

64611

- [(set_attr "type" "vecsimple")])

64612

-

64613

-(define_insn "*vsx_xor<mode>3"

64614

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

64615

- (xor:VSX_L

64616

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

64617

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa")))]

64618

- "VECTOR_MEM_VSX_P (<MODE>mode)"

64619

- "xxlxor %x0,%x1,%x2"

64620

- [(set_attr "type" "vecsimple")])

64621

-

64622

-(define_insn "*vsx_one_cmpl<mode>2"

64623

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

64624

- (not:VSX_L

64625

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")))]

64626

- "VECTOR_MEM_VSX_P (<MODE>mode)"

64627

- "xxlnor %x0,%x1,%x1"

64628

- [(set_attr "type" "vecsimple")])

64629

-

64630

-(define_insn "*vsx_nor<mode>3"

64631

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

64632

- (not:VSX_L

64633

- (ior:VSX_L

64634

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

64635

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa"))))]

64636

- "VECTOR_MEM_VSX_P (<MODE>mode)"

64637

- "xxlnor %x0,%x1,%x2"

64638

- [(set_attr "type" "vecsimple")])

64639

-

64640

-(define_insn "*vsx_andc<mode>3"

64641

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

64642

- (and:VSX_L

64643

- (not:VSX_L

64644

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa"))

64645

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")))]

64646

- "VECTOR_MEM_VSX_P (<MODE>mode)"

64647

- "xxlandc %x0,%x1,%x2"

64648

- [(set_attr "type" "vecsimple")])

64649

-

64650

-

64651

;; Permute operations

64652

64653

;; Build a V2DF/V2DI vector from two scalars

64654

(define_insn "vsx_concat_<mode>"

64655

- [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,?wa")

64656

- (unspec:VSX_D

64657

- [(match_operand:<VS_scalar> 1 "vsx_register_operand" "ws,wa")

64658

- (match_operand:<VS_scalar> 2 "vsx_register_operand" "ws,wa")]

64659

- UNSPEC_VSX_CONCAT))]

64660

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=<VSr>,?wa")

64661

+ (vec_concat:VSX_D

64662

+ (match_operand:<VS_scalar> 1 "vsx_register_operand" "ws,wa")

64663

+ (match_operand:<VS_scalar> 2 "vsx_register_operand" "ws,wa")))]

64664

"VECTOR_MEM_VSX_P (<MODE>mode)"

64665

- "xxpermdi %x0,%x1,%x2,0"

64666

+{

64667

+ if (BYTES_BIG_ENDIAN)

64668

+ return "xxpermdi %x0,%x1,%x2,0";

64669

+ else

64670

+ return "xxpermdi %x0,%x2,%x1,0";

64671

+}

64672

[(set_attr "type" "vecperm")])

64673

64674

;; Special purpose concat using xxpermdi to glue two single precision values

64675

@@ -1106,9 +1341,176 @@

64676

(match_operand:SF 2 "vsx_register_operand" "f,f")]

64677

UNSPEC_VSX_CONCAT))]

64678

"VECTOR_MEM_VSX_P (V2DFmode)"

64679

- "xxpermdi %x0,%x1,%x2,0"

64680

+{

64681

+ if (BYTES_BIG_ENDIAN)

64682

+ return "xxpermdi %x0,%x1,%x2,0";

64683

+ else

64684

+ return "xxpermdi %x0,%x2,%x1,0";

64685

+}

64686

[(set_attr "type" "vecperm")])

64687

64688

+;; xxpermdi for little endian loads and stores. We need several of

64689

+;; these since the form of the PARALLEL differs by mode.

64690

+(define_insn "*vsx_xxpermdi2_le_<mode>"

64691

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")

64692

+ (vec_select:VSX_D

64693

+ (match_operand:VSX_D 1 "vsx_register_operand" "wa")

64694

+ (parallel [(const_int 1) (const_int 0)])))]

64695

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

64696

+ "xxpermdi %x0,%x1,%x1,2"

64697

+ [(set_attr "type" "vecperm")])

64698

+

64699

+(define_insn "*vsx_xxpermdi4_le_<mode>"

64700

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa")

64701

+ (vec_select:VSX_W

64702

+ (match_operand:VSX_W 1 "vsx_register_operand" "wa")

64703

+ (parallel [(const_int 2) (const_int 3)

64704

+ (const_int 0) (const_int 1)])))]

64705

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

64706

+ "xxpermdi %x0,%x1,%x1,2"

64707

+ [(set_attr "type" "vecperm")])

64708

+

64709

+(define_insn "*vsx_xxpermdi8_le_V8HI"

64710

+ [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")

64711

+ (vec_select:V8HI

64712

+ (match_operand:V8HI 1 "vsx_register_operand" "wa")

64713

+ (parallel [(const_int 4) (const_int 5)

64714

+ (const_int 6) (const_int 7)

64715

+ (const_int 0) (const_int 1)

64716

+ (const_int 2) (const_int 3)])))]

64717

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"

64718

+ "xxpermdi %x0,%x1,%x1,2"

64719

+ [(set_attr "type" "vecperm")])

64720

+

64721

+(define_insn "*vsx_xxpermdi16_le_V16QI"

64722

+ [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")

64723

+ (vec_select:V16QI

64724

+ (match_operand:V16QI 1 "vsx_register_operand" "wa")

64725

+ (parallel [(const_int 8) (const_int 9)

64726

+ (const_int 10) (const_int 11)

64727

+ (const_int 12) (const_int 13)

64728

+ (const_int 14) (const_int 15)

64729

+ (const_int 0) (const_int 1)

64730

+ (const_int 2) (const_int 3)

64731

+ (const_int 4) (const_int 5)

64732

+ (const_int 6) (const_int 7)])))]

64733

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"

64734

+ "xxpermdi %x0,%x1,%x1,2"

64735

+ [(set_attr "type" "vecperm")])

64736

+

64737

+;; lxvd2x for little endian loads. We need several of

64738

+;; these since the form of the PARALLEL differs by mode.

64739

+(define_insn "*vsx_lxvd2x2_le_<mode>"

64740

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")

64741

+ (vec_select:VSX_D

64742

+ (match_operand:VSX_D 1 "memory_operand" "Z")

64743

+ (parallel [(const_int 1) (const_int 0)])))]

64744

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

64745

+ "lxvd2x %x0,%y1"

64746

+ [(set_attr "type" "vecload")])

64747

+

64748

+(define_insn "*vsx_lxvd2x4_le_<mode>"

64749

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa")

64750

+ (vec_select:VSX_W

64751

+ (match_operand:VSX_W 1 "memory_operand" "Z")

64752

+ (parallel [(const_int 2) (const_int 3)

64753

+ (const_int 0) (const_int 1)])))]

64754

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

64755

+ "lxvd2x %x0,%y1"

64756

+ [(set_attr "type" "vecload")])

64757

+

64758

+(define_insn "*vsx_lxvd2x8_le_V8HI"

64759

+ [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")

64760

+ (vec_select:V8HI

64761

+ (match_operand:V8HI 1 "memory_operand" "Z")

64762

+ (parallel [(const_int 4) (const_int 5)

64763

+ (const_int 6) (const_int 7)

64764

+ (const_int 0) (const_int 1)

64765

+ (const_int 2) (const_int 3)])))]

64766

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"

64767

+ "lxvd2x %x0,%y1"

64768

+ [(set_attr "type" "vecload")])

64769

+

64770

+(define_insn "*vsx_lxvd2x16_le_V16QI"

64771

+ [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")

64772

+ (vec_select:V16QI

64773

+ (match_operand:V16QI 1 "memory_operand" "Z")

64774

+ (parallel [(const_int 8) (const_int 9)

64775

+ (const_int 10) (const_int 11)

64776

+ (const_int 12) (const_int 13)

64777

+ (const_int 14) (const_int 15)

64778

+ (const_int 0) (const_int 1)

64779

+ (const_int 2) (const_int 3)

64780

+ (const_int 4) (const_int 5)

64781

+ (const_int 6) (const_int 7)])))]

64782

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"

64783

+ "lxvd2x %x0,%y1"

64784

+ [(set_attr "type" "vecload")])

64785

+

64786

+;; stxvd2x for little endian stores. We need several of

64787

+;; these since the form of the PARALLEL differs by mode.

64788

+(define_insn "*vsx_stxvd2x2_le_<mode>"

64789

+ [(set (match_operand:VSX_D 0 "memory_operand" "=Z")

64790

+ (vec_select:VSX_D

64791

+ (match_operand:VSX_D 1 "vsx_register_operand" "wa")

64792

+ (parallel [(const_int 1) (const_int 0)])))]

64793

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

64794

+ "stxvd2x %x1,%y0"

64795

+ [(set_attr "type" "vecstore")])

64796

+

64797

+(define_insn "*vsx_stxvd2x4_le_<mode>"

64798

+ [(set (match_operand:VSX_W 0 "memory_operand" "=Z")

64799

+ (vec_select:VSX_W

64800

+ (match_operand:VSX_W 1 "vsx_register_operand" "wa")

64801

+ (parallel [(const_int 2) (const_int 3)

64802

+ (const_int 0) (const_int 1)])))]

64803

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

64804

+ "stxvd2x %x1,%y0"

64805

+ [(set_attr "type" "vecstore")])

64806

+

64807

+(define_insn "*vsx_stxvd2x8_le_V8HI"

64808

+ [(set (match_operand:V8HI 0 "memory_operand" "=Z")

64809

+ (vec_select:V8HI

64810

+ (match_operand:V8HI 1 "vsx_register_operand" "wa")

64811

+ (parallel [(const_int 4) (const_int 5)

64812

+ (const_int 6) (const_int 7)

64813

+ (const_int 0) (const_int 1)

64814

+ (const_int 2) (const_int 3)])))]

64815

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"

64816

+ "stxvd2x %x1,%y0"

64817

+ [(set_attr "type" "vecstore")])

64818

+

64819

+(define_insn "*vsx_stxvd2x16_le_V16QI"

64820

+ [(set (match_operand:V16QI 0 "memory_operand" "=Z")

64821

+ (vec_select:V16QI

64822

+ (match_operand:V16QI 1 "vsx_register_operand" "wa")

64823

+ (parallel [(const_int 8) (const_int 9)

64824

+ (const_int 10) (const_int 11)

64825

+ (const_int 12) (const_int 13)

64826

+ (const_int 14) (const_int 15)

64827

+ (const_int 0) (const_int 1)

64828

+ (const_int 2) (const_int 3)

64829

+ (const_int 4) (const_int 5)

64830

+ (const_int 6) (const_int 7)])))]

64831

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"

64832

+ "stxvd2x %x1,%y0"

64833

+ [(set_attr "type" "vecstore")])

64834

+

64835

+;; Convert a TImode value into V1TImode

64836

+(define_expand "vsx_set_v1ti"

64837

+ [(match_operand:V1TI 0 "nonimmediate_operand" "")

64838

+ (match_operand:V1TI 1 "nonimmediate_operand" "")

64839

+ (match_operand:TI 2 "input_operand" "")

64840

+ (match_operand:QI 3 "u5bit_cint_operand" "")]

64841

+ "VECTOR_MEM_VSX_P (V1TImode)"

64842

+{

64843

+ if (operands[3] != const0_rtx)

64844

+ gcc_unreachable ();

64845

+

64846

+ emit_move_insn (operands[0], gen_lowpart (V1TImode, operands[1]));

64847

+ DONE;

64848

+})

64849

+

64850

;; Set the element of a V2DI/VD2F mode

64851

(define_insn "vsx_set_<mode>"

64852

[(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,?wa")

64853

@@ -1118,9 +1520,10 @@

64854

UNSPEC_VSX_SET))]

64855

"VECTOR_MEM_VSX_P (<MODE>mode)"

64856

{

64857

- if (INTVAL (operands[3]) == 0)

64858

+ int idx_first = BYTES_BIG_ENDIAN ? 0 : 1;

64859

+ if (INTVAL (operands[3]) == idx_first)

64860

return \"xxpermdi %x0,%x2,%x1,1\";

64861

- else if (INTVAL (operands[3]) == 1)

64862

+ else if (INTVAL (operands[3]) == 1 - idx_first)

64863

return \"xxpermdi %x0,%x1,%x2,0\";

64864

else

64865

gcc_unreachable ();

64866

@@ -1135,8 +1538,12 @@

64867

[(match_operand:QI 2 "u5bit_cint_operand" "i,i,i")])))]

64868

"VECTOR_MEM_VSX_P (<MODE>mode)"

64869

{

64870

+ int fldDM;

64871

gcc_assert (UINTVAL (operands[2]) <= 1);

64872

- operands[3] = GEN_INT (INTVAL (operands[2]) << 1);

64873

+ fldDM = INTVAL (operands[2]) << 1;

64874

+ if (!BYTES_BIG_ENDIAN)

64875

+ fldDM = 3 - fldDM;

64876

+ operands[3] = GEN_INT (fldDM);

64877

return \"xxpermdi %x0,%x1,%x1,%3\";

64878

}

64879

[(set_attr "type" "vecperm")])

64880

@@ -1149,9 +1556,28 @@

64881

(parallel [(const_int 0)])))]

64882

"VECTOR_MEM_VSX_P (<MODE>mode) && WORDS_BIG_ENDIAN"

64883

"lxsd%U1x %x0,%y1"

64884

- [(set_attr "type" "fpload")

64885

+ [(set (attr "type")

64886

+ (if_then_else

64887

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

64888

+ (const_string "fpload_ux")

64889

+ (const_string "fpload")))

64890

(set_attr "length" "4")])

64891

64892

+;; Optimize extracting element 1 from memory for little endian

64893

+(define_insn "*vsx_extract_<mode>_one_le"

64894

+ [(set (match_operand:<VS_scalar> 0 "vsx_register_operand" "=ws,d,?wa")

64895

+ (vec_select:<VS_scalar>

64896

+ (match_operand:VSX_D 1 "indexed_or_indirect_operand" "Z,Z,Z")

64897

+ (parallel [(const_int 1)])))]

64898

+ "VECTOR_MEM_VSX_P (<MODE>mode) && !WORDS_BIG_ENDIAN"

64899

+ "lxsd%U1x %x0,%y1"

64900

+ [(set (attr "type")

64901

+ (if_then_else

64902

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

64903

+ (const_string "fpload_ux")

64904

+ (const_string "fpload")))

64905

+ (set_attr "length" "4")])

64906

+

64907

;; Extract a SF element from V4SF

64908

(define_insn_and_split "vsx_extract_v4sf"

64909

[(set (match_operand:SF 0 "vsx_register_operand" "=f,f")

64910

@@ -1172,7 +1598,7 @@

64911

rtx op2 = operands[2];

64912

rtx op3 = operands[3];

64913

rtx tmp;

64914

- HOST_WIDE_INT ele = INTVAL (op2);

64915

+ HOST_WIDE_INT ele = BYTES_BIG_ENDIAN ? INTVAL (op2) : 3 - INTVAL (op2);

64916

64917

if (ele == 0)

64918

tmp = op1;

64919

@@ -1213,11 +1639,22 @@

64920

if (<MODE>mode != V2DImode)

64921

{

64922

target = gen_lowpart (V2DImode, target);

64923

- op0 = gen_lowpart (V2DImode, target);

64924

- op1 = gen_lowpart (V2DImode, target);

64925

+ op0 = gen_lowpart (V2DImode, op0);

64926

+ op1 = gen_lowpart (V2DImode, op1);

64927

}

64928

}

64929

- emit_insn (gen (target, op0, op1, perm0, perm1));

64930

+ /* In little endian mode, vsx_xxpermdi2_<mode>_1 will perform a

64931

+ transformation we don't want; it is necessary for

64932

+ rs6000_expand_vec_perm_const_1 but not for this use. So we

64933

+ prepare for that by reversing the transformation here. */

64934

+ if (BYTES_BIG_ENDIAN)

64935

+ emit_insn (gen (target, op0, op1, perm0, perm1));

64936

+ else

64937

+ {

64938

+ rtx p0 = GEN_INT (3 - INTVAL (perm1));

64939

+ rtx p1 = GEN_INT (3 - INTVAL (perm0));

64940

+ emit_insn (gen (target, op1, op0, p0, p1));

64941

+ }

64942

DONE;

64943

})

64944

64945

@@ -1231,9 +1668,32 @@

64946

(match_operand 4 "const_2_to_3_operand" "")])))]

64947

"VECTOR_MEM_VSX_P (<MODE>mode)"

64948

{

64949

- int mask = (INTVAL (operands[3]) << 1) | (INTVAL (operands[4]) - 2);

64950

+ int op3, op4, mask;

64951

+

64952

+ /* For little endian, swap operands and invert/swap selectors

64953

+ to get the correct xxpermdi. The operand swap sets up the

64954

+ inputs as a little endian array. The selectors are swapped

64955

+ because they are defined to use big endian ordering. The

64956

+ selectors are inverted to get the correct doublewords for

64957

+ little endian ordering. */

64958

+ if (BYTES_BIG_ENDIAN)

64959

+ {

64960

+ op3 = INTVAL (operands[3]);

64961

+ op4 = INTVAL (operands[4]);

64962

+ }

64963

+ else

64964

+ {

64965

+ op3 = 3 - INTVAL (operands[4]);

64966

+ op4 = 3 - INTVAL (operands[3]);

64967

+ }

64968

+

64969

+ mask = (op3 << 1) | (op4 - 2);

64970

operands[3] = GEN_INT (mask);

64971

- return "xxpermdi %x0,%x1,%x2,%3";

64972

+

64973

+ if (BYTES_BIG_ENDIAN)

64974

+ return "xxpermdi %x0,%x1,%x2,%3";

64975

+ else

64976

+ return "xxpermdi %x0,%x2,%x1,%3";

64977

}

64978

[(set_attr "type" "vecperm")])

64979

64980

@@ -1252,25 +1712,57 @@

64981

64982

;; Expanders for builtins

64983

(define_expand "vsx_mergel_<mode>"

64984

- [(set (match_operand:VSX_D 0 "vsx_register_operand" "")

64985

- (vec_select:VSX_D

64986

- (vec_concat:<VS_double>

64987

- (match_operand:VSX_D 1 "vsx_register_operand" "")

64988

- (match_operand:VSX_D 2 "vsx_register_operand" ""))

64989

- (parallel [(const_int 1) (const_int 3)])))]

64990

+ [(use (match_operand:VSX_D 0 "vsx_register_operand" ""))

64991

+ (use (match_operand:VSX_D 1 "vsx_register_operand" ""))

64992

+ (use (match_operand:VSX_D 2 "vsx_register_operand" ""))]

64993

"VECTOR_MEM_VSX_P (<MODE>mode)"

64994

- "")

64995

+{

64996

+ rtvec v;

64997

+ rtx x;

64998

64999

+ /* Special handling for LE with -maltivec=be. */

65000

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

65001

+ {

65002

+ v = gen_rtvec (2, GEN_INT (0), GEN_INT (2));

65003

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[2], operands[1]);

65004

+ }

65005

+ else

65006

+ {

65007

+ v = gen_rtvec (2, GEN_INT (1), GEN_INT (3));

65008

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[1], operands[2]);

65009

+ }

65010

+

65011

+ x = gen_rtx_VEC_SELECT (<MODE>mode, x, gen_rtx_PARALLEL (VOIDmode, v));

65012

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

65013

+ DONE;

65014

+})

65015

+

65016

(define_expand "vsx_mergeh_<mode>"

65017

- [(set (match_operand:VSX_D 0 "vsx_register_operand" "")

65018

- (vec_select:VSX_D

65019

- (vec_concat:<VS_double>

65020

- (match_operand:VSX_D 1 "vsx_register_operand" "")

65021

- (match_operand:VSX_D 2 "vsx_register_operand" ""))

65022

- (parallel [(const_int 0) (const_int 2)])))]

65023

+ [(use (match_operand:VSX_D 0 "vsx_register_operand" ""))

65024

+ (use (match_operand:VSX_D 1 "vsx_register_operand" ""))

65025

+ (use (match_operand:VSX_D 2 "vsx_register_operand" ""))]

65026

"VECTOR_MEM_VSX_P (<MODE>mode)"

65027

- "")

65028

+{

65029

+ rtvec v;

65030

+ rtx x;

65031

65032

+ /* Special handling for LE with -maltivec=be. */

65033

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

65034

+ {

65035

+ v = gen_rtvec (2, GEN_INT (1), GEN_INT (3));

65036

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[2], operands[1]);

65037

+ }

65038

+ else

65039

+ {

65040

+ v = gen_rtvec (2, GEN_INT (0), GEN_INT (2));

65041

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[1], operands[2]);

65042

+ }

65043

+

65044

+ x = gen_rtx_VEC_SELECT (<MODE>mode, x, gen_rtx_PARALLEL (VOIDmode, v));

65045

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

65046

+ DONE;

65047

+})

65048

+

65049

;; V2DF/V2DI splat

65050

(define_insn "vsx_splat_<mode>"

65051

[(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,wd,wd,?wa,?wa,?wa")

65052

@@ -1295,6 +1787,20 @@

65053

(parallel

65054

[(match_operand:QI 2 "u5bit_cint_operand" "i,i")]))))]

65055

"VECTOR_MEM_VSX_P (<MODE>mode)"

65056

+{

65057

+ if (!BYTES_BIG_ENDIAN)

65058

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

65059

+

65060

+ return "xxspltw %x0,%x1,%2";

65061

+}

65062

+ [(set_attr "type" "vecperm")])

65063

+

65064

+(define_insn "vsx_xxspltw_<mode>_direct"

65065

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wf,?wa")

65066

+ (unspec:VSX_W [(match_operand:VSX_W 1 "vsx_register_operand" "wf,wa")

65067

+ (match_operand:QI 2 "u5bit_cint_operand" "i,i")]

65068

+ UNSPEC_VSX_XXSPLTW))]

65069

+ "VECTOR_MEM_VSX_P (<MODE>mode)"

65070

"xxspltw %x0,%x1,%2"

65071

[(set_attr "type" "vecperm")])

65072

65073

@@ -1308,7 +1814,12 @@

65074

(parallel [(const_int 0) (const_int 4)

65075

(const_int 1) (const_int 5)])))]

65076

"VECTOR_MEM_VSX_P (<MODE>mode)"

65077

- "xxmrghw %x0,%x1,%x2"

65078

+{

65079

+ if (BYTES_BIG_ENDIAN)

65080

+ return "xxmrghw %x0,%x1,%x2";

65081

+ else

65082

+ return "xxmrglw %x0,%x2,%x1";

65083

+}

65084

[(set_attr "type" "vecperm")])

65085

65086

(define_insn "vsx_xxmrglw_<mode>"

65087

@@ -1320,7 +1831,12 @@

65088

(parallel [(const_int 2) (const_int 6)

65089

(const_int 3) (const_int 7)])))]

65090

"VECTOR_MEM_VSX_P (<MODE>mode)"

65091

- "xxmrglw %x0,%x1,%x2"

65092

+{

65093

+ if (BYTES_BIG_ENDIAN)

65094

+ return "xxmrglw %x0,%x1,%x2";

65095

+ else

65096

+ return "xxmrghw %x0,%x2,%x1";

65097

+}

65098

[(set_attr "type" "vecperm")])

65099

65100

;; Shift left double by word immediate

65101

@@ -1483,3 +1999,27 @@

65102

}"

65103

[(set_attr "length" "20")

65104

(set_attr "type" "veccomplex")])

65105

+

65106

+

65107

+;; Power8 Vector fusion. The fused ops must be physically adjacent.

65108

+(define_peephole

65109

+ [(set (match_operand:P 0 "base_reg_operand" "")

65110

+ (match_operand:P 1 "short_cint_operand" ""))

65111

+ (set (match_operand:VSX_M2 2 "vsx_register_operand" "")

65112

+ (mem:VSX_M2 (plus:P (match_dup 0)

65113

+ (match_operand:P 3 "int_reg_operand" ""))))]

65114

+ "TARGET_VSX && TARGET_P8_FUSION"

65115

+ "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"

65116

+ [(set_attr "length" "8")

65117

+ (set_attr "type" "vecload")])

65118

+

65119

+(define_peephole

65120

+ [(set (match_operand:P 0 "base_reg_operand" "")

65121

+ (match_operand:P 1 "short_cint_operand" ""))

65122

+ (set (match_operand:VSX_M2 2 "vsx_register_operand" "")

65123

+ (mem:VSX_M2 (plus:P (match_operand:P 3 "int_reg_operand" "")

65124

+ (match_dup 0))))]

65125

+ "TARGET_VSX && TARGET_P8_FUSION"

65126

+ "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"

65127

+ [(set_attr "length" "8")

65128

+ (set_attr "type" "vecload")])

65129

Index: gcc/config/rs6000/rs6000.h

65130

===================================================================

65131

--- a/src/gcc/config/rs6000/rs6000.h (.../tags/gcc_4_8_2_release)

65132

+++ b/src/gcc/config/rs6000/rs6000.h (.../branches/gcc-4_8-branch)

65133

@@ -92,7 +92,7 @@

65134

#ifdef HAVE_AS_POWER8

65135

#define ASM_CPU_POWER8_SPEC "-mpower8"

65136

#else

65137

-#define ASM_CPU_POWER8_SPEC "-mpower4 -maltivec"

65138

+#define ASM_CPU_POWER8_SPEC ASM_CPU_POWER7_SPEC

65139

#endif

65140

65141

#ifdef HAVE_AS_DCI

65142

@@ -164,6 +164,7 @@

65143

%{mcpu=e6500: -me6500} \

65144

%{maltivec: -maltivec} \

65145

%{mvsx: -mvsx %{!maltivec: -maltivec} %{!mcpu*: %(asm_cpu_power7)}} \

65146

+%{mpower8-vector|mcrypto|mdirect-move|mhtm: %{!mcpu*: %(asm_cpu_power8)}} \

65147

-many"

65148

65149

#define CPP_DEFAULT_SPEC ""

65150

@@ -277,6 +278,21 @@

65151

#define TARGET_POPCNTD 0

65152

#endif

65153

65154

+/* Define the ISA 2.07 flags as 0 if the target assembler does not support the

65155

+ waitasecond instruction. Allow -mpower8-fusion, since it does not add new

65156

+ instructions. */

65157

+

65158

+#ifndef HAVE_AS_POWER8

65159

+#undef TARGET_DIRECT_MOVE

65160

+#undef TARGET_CRYPTO

65161

+#undef TARGET_HTM

65162

+#undef TARGET_P8_VECTOR

65163

+#define TARGET_DIRECT_MOVE 0

65164

+#define TARGET_CRYPTO 0

65165

+#define TARGET_HTM 0

65166

+#define TARGET_P8_VECTOR 0

65167

+#endif

65168

+

65169

/* Define TARGET_LWSYNC_INSTRUCTION if the assembler knows about lwsync. If

65170

not, generate the lwsync code as an integer constant. */

65171

#ifdef HAVE_AS_LWSYNC

65172

@@ -386,6 +402,7 @@

65173

#define TARGET_DEBUG_TARGET (rs6000_debug & MASK_DEBUG_TARGET)

65174

#define TARGET_DEBUG_BUILTIN (rs6000_debug & MASK_DEBUG_BUILTIN)

65175

65176

+/* Describe the vector unit used for arithmetic operations. */

65177

extern enum rs6000_vector rs6000_vector_unit[];

65178

65179

#define VECTOR_UNIT_NONE_P(MODE) \

65180

@@ -394,12 +411,25 @@

65181

#define VECTOR_UNIT_VSX_P(MODE) \

65182

(rs6000_vector_unit[(MODE)] == VECTOR_VSX)

65183

65184

+#define VECTOR_UNIT_P8_VECTOR_P(MODE) \

65185

+ (rs6000_vector_unit[(MODE)] == VECTOR_P8_VECTOR)

65186

+

65187

#define VECTOR_UNIT_ALTIVEC_P(MODE) \

65188

(rs6000_vector_unit[(MODE)] == VECTOR_ALTIVEC)

65189

65190

+#define VECTOR_UNIT_VSX_OR_P8_VECTOR_P(MODE) \

65191

+ (IN_RANGE ((int)rs6000_vector_unit[(MODE)], \

65192

+ (int)VECTOR_VSX, \

65193

+ (int)VECTOR_P8_VECTOR))

65194

+

65195

+/* VECTOR_UNIT_ALTIVEC_OR_VSX_P is used in places where we are using either

65196

+ altivec (VMX) or VSX vector instructions. P8 vector support is upwards

65197

+ compatible, so allow it as well, rather than changing all of the uses of the

65198

+ macro. */

65199

#define VECTOR_UNIT_ALTIVEC_OR_VSX_P(MODE) \

65200

- (rs6000_vector_unit[(MODE)] == VECTOR_ALTIVEC \

65201

- || rs6000_vector_unit[(MODE)] == VECTOR_VSX)

65202

+ (IN_RANGE ((int)rs6000_vector_unit[(MODE)], \

65203

+ (int)VECTOR_ALTIVEC, \

65204

+ (int)VECTOR_P8_VECTOR))

65205

65206

/* Describe whether to use VSX loads or Altivec loads. For now, just use the

65207

same unit as the vector unit we are using, but we may want to migrate to

65208

@@ -412,12 +442,21 @@

65209

#define VECTOR_MEM_VSX_P(MODE) \

65210

(rs6000_vector_mem[(MODE)] == VECTOR_VSX)

65211

65212

+#define VECTOR_MEM_P8_VECTOR_P(MODE) \

65213

+ (rs6000_vector_mem[(MODE)] == VECTOR_VSX)

65214

+

65215

#define VECTOR_MEM_ALTIVEC_P(MODE) \

65216

(rs6000_vector_mem[(MODE)] == VECTOR_ALTIVEC)

65217

65218

+#define VECTOR_MEM_VSX_OR_P8_VECTOR_P(MODE) \

65219

+ (IN_RANGE ((int)rs6000_vector_mem[(MODE)], \

65220

+ (int)VECTOR_VSX, \

65221

+ (int)VECTOR_P8_VECTOR))

65222

+

65223

#define VECTOR_MEM_ALTIVEC_OR_VSX_P(MODE) \

65224

- (rs6000_vector_mem[(MODE)] == VECTOR_ALTIVEC \

65225

- || rs6000_vector_mem[(MODE)] == VECTOR_VSX)

65226

+ (IN_RANGE ((int)rs6000_vector_mem[(MODE)], \

65227

+ (int)VECTOR_ALTIVEC, \

65228

+ (int)VECTOR_P8_VECTOR))

65229

65230

/* Return the alignment of a given vector type, which is set based on the

65231

vector unit use. VSX for instance can load 32 or 64 bit aligned words

65232

@@ -429,6 +468,15 @@

65233

? rs6000_vector_align[(MODE)] \

65234

: (int)GET_MODE_BITSIZE ((MODE)))

65235

65236

+/* Determine the element order to use for vector instructions. By

65237

+ default we use big-endian element order when targeting big-endian,

65238

+ and little-endian element order when targeting little-endian. For

65239

+ programs being ported from BE Power to LE Power, it can sometimes

65240

+ be useful to use big-endian element order when targeting little-endian.

65241

+ This is set via -maltivec=be, for example. */

65242

+#define VECTOR_ELT_ORDER_BIG \

65243

+ (BYTES_BIG_ENDIAN || (rs6000_altivec_element_order == 2))

65244

+

65245

/* Alignment options for fields in structures for sub-targets following

65246

AIX-like ABI.

65247

ALIGN_POWER word-aligns FP doubles (default AIX ABI).

65248

@@ -479,16 +527,38 @@

65249

#define TARGET_FCTIDUZ TARGET_POPCNTD

65250

#define TARGET_FCTIWUZ TARGET_POPCNTD

65251

65252

+#define TARGET_XSCVDPSPN (TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)

65253

+#define TARGET_XSCVSPDPN (TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)

65254

+#define TARGET_VADDUQM (TARGET_P8_VECTOR && TARGET_POWERPC64)

65255

+

65256

+/* Byte/char syncs were added as phased in for ISA 2.06B, but are not present

65257

+ in power7, so conditionalize them on p8 features. TImode syncs need quad

65258

+ memory support. */

65259

+#define TARGET_SYNC_HI_QI (TARGET_QUAD_MEMORY \

65260

+ || TARGET_QUAD_MEMORY_ATOMIC \

65261

+ || TARGET_DIRECT_MOVE)

65262

+

65263

+#define TARGET_SYNC_TI TARGET_QUAD_MEMORY_ATOMIC

65264

+

65265

+/* Power7 has both 32-bit load and store integer for the FPRs, so we don't need

65266

+ to allocate the SDmode stack slot to get the value into the proper location

65267

+ in the register. */

65268

+#define TARGET_NO_SDMODE_STACK (TARGET_LFIWZX && TARGET_STFIWX && TARGET_DFP)

65269

+

65270

/* In switching from using target_flags to using rs6000_isa_flags, the options

65271

machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. For now map

65272

OPTION_MASK_<xxx> back into MASK_<xxx>. */

65273

#define MASK_ALTIVEC OPTION_MASK_ALTIVEC

65274

#define MASK_CMPB OPTION_MASK_CMPB

65275

+#define MASK_CRYPTO OPTION_MASK_CRYPTO

65276

#define MASK_DFP OPTION_MASK_DFP

65277

+#define MASK_DIRECT_MOVE OPTION_MASK_DIRECT_MOVE

65278

#define MASK_DLMZB OPTION_MASK_DLMZB

65279

#define MASK_EABI OPTION_MASK_EABI

65280

#define MASK_FPRND OPTION_MASK_FPRND

65281

+#define MASK_P8_FUSION OPTION_MASK_P8_FUSION

65282

#define MASK_HARD_FLOAT OPTION_MASK_HARD_FLOAT

65283

+#define MASK_HTM OPTION_MASK_HTM

65284

#define MASK_ISEL OPTION_MASK_ISEL

65285

#define MASK_MFCRF OPTION_MASK_MFCRF

65286

#define MASK_MFPGPR OPTION_MASK_MFPGPR

65287

@@ -495,6 +565,7 @@

65288

#define MASK_MULHW OPTION_MASK_MULHW

65289

#define MASK_MULTIPLE OPTION_MASK_MULTIPLE

65290

#define MASK_NO_UPDATE OPTION_MASK_NO_UPDATE

65291

+#define MASK_P8_VECTOR OPTION_MASK_P8_VECTOR

65292

#define MASK_POPCNTB OPTION_MASK_POPCNTB

65293

#define MASK_POPCNTD OPTION_MASK_POPCNTD

65294

#define MASK_PPC_GFXOPT OPTION_MASK_PPC_GFXOPT

65295

@@ -505,6 +576,7 @@

65296

#define MASK_STRING OPTION_MASK_STRING

65297

#define MASK_UPDATE OPTION_MASK_UPDATE

65298

#define MASK_VSX OPTION_MASK_VSX

65299

+#define MASK_VSX_TIMODE OPTION_MASK_VSX_TIMODE

65300

65301

#ifndef IN_LIBGCC2

65302

#define MASK_POWERPC64 OPTION_MASK_POWERPC64

65303

@@ -558,6 +630,25 @@

65304

|| rs6000_cpu == PROCESSOR_PPC8548)

65305

65306

65307

+/* Whether SF/DF operations are supported on the E500. */

65308

+#define TARGET_SF_SPE (TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT \

65309

+ && !TARGET_FPRS)

65310

+

65311

+#define TARGET_DF_SPE (TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT \

65312

+ && !TARGET_FPRS && TARGET_E500_DOUBLE)

65313

+

65314

+/* Whether SF/DF operations are supported by by the normal floating point unit

65315

+ (or the vector/scalar unit). */

65316

+#define TARGET_SF_FPR (TARGET_HARD_FLOAT && TARGET_FPRS \

65317

+ && TARGET_SINGLE_FLOAT)

65318

+

65319

+#define TARGET_DF_FPR (TARGET_HARD_FLOAT && TARGET_FPRS \

65320

+ && TARGET_DOUBLE_FLOAT)

65321

+

65322

+/* Whether SF/DF operations are supported by any hardware. */

65323

+#define TARGET_SF_INSN (TARGET_SF_FPR || TARGET_SF_SPE)

65324

+#define TARGET_DF_INSN (TARGET_DF_FPR || TARGET_DF_SPE)

65325

+

65326

/* Which machine supports the various reciprocal estimate instructions. */

65327

#define TARGET_FRES (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT \

65328

&& TARGET_FPRS && TARGET_SINGLE_FLOAT)

65329

@@ -595,9 +686,6 @@

65330

#define RS6000_RECIP_AUTO_RSQRTE_P(MODE) \

65331

(rs6000_recip_bits[(int)(MODE)] & RS6000_RECIP_MASK_AUTO_RSQRTE)

65332

65333

-#define RS6000_RECIP_HIGH_PRECISION_P(MODE) \

65334

- ((MODE) == SFmode || (MODE) == V4SFmode || TARGET_RECIP_PRECISION)

65335

-

65336

/* The default CPU for TARGET_OPTION_OVERRIDE. */

65337

#define OPTION_TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT

65338

65339

@@ -760,12 +848,6 @@

65340

/* No data type wants to be aligned rounder than this. */

65341

#define BIGGEST_ALIGNMENT 128

65342

65343

-/* A C expression to compute the alignment for a variables in the

65344

- local store. TYPE is the data type, and ALIGN is the alignment

65345

- that the object would ordinarily have. */

65346

-#define LOCAL_ALIGNMENT(TYPE, ALIGN) \

65347

- DATA_ALIGNMENT (TYPE, ALIGN)

65348

-

65349

/* Alignment of field after `int : 0' in a structure. */

65350

#define EMPTY_FIELD_BOUNDARY 32

65351

65352

@@ -775,8 +857,15 @@

65353

/* A bit-field declared as `int' forces `int' alignment for the struct. */

65354

#define PCC_BITFIELD_TYPE_MATTERS 1

65355

65356

-/* Make strings word-aligned so strcpy from constants will be faster.

65357

- Make vector constants quadword aligned. */

65358

+enum data_align { align_abi, align_opt, align_both };

65359

+

65360

+/* A C expression to compute the alignment for a variables in the

65361

+ local store. TYPE is the data type, and ALIGN is the alignment

65362

+ that the object would ordinarily have. */

65363

+#define LOCAL_ALIGNMENT(TYPE, ALIGN) \

65364

+ rs6000_data_alignment (TYPE, ALIGN, align_both)

65365

+

65366

+/* Make strings word-aligned so strcpy from constants will be faster. */

65367

#define CONSTANT_ALIGNMENT(EXP, ALIGN) \

65368

(TREE_CODE (EXP) == STRING_CST \

65369

&& (STRICT_ALIGNMENT || !optimize_size) \

65370

@@ -784,21 +873,14 @@

65371

? BITS_PER_WORD \

65372

: (ALIGN))

65373

65374

-/* Make arrays of chars word-aligned for the same reasons.

65375

- Align vectors to 128 bits. Align SPE vectors and E500 v2 doubles to

65376

+/* Make arrays of chars word-aligned for the same reasons. */

65377

+#define DATA_ALIGNMENT(TYPE, ALIGN) \

65378

+ rs6000_data_alignment (TYPE, ALIGN, align_opt)

65379

+

65380

+/* Align vectors to 128 bits. Align SPE vectors and E500 v2 doubles to

65381

64 bits. */

65382

-#define DATA_ALIGNMENT(TYPE, ALIGN) \

65383

- (TREE_CODE (TYPE) == VECTOR_TYPE \

65384

- ? (((TARGET_SPE && SPE_VECTOR_MODE (TYPE_MODE (TYPE))) \

65385

- || (TARGET_PAIRED_FLOAT && PAIRED_VECTOR_MODE (TYPE_MODE (TYPE)))) \

65386

- ? 64 : 128) \

65387

- : ((TARGET_E500_DOUBLE \

65388

- && TREE_CODE (TYPE) == REAL_TYPE \

65389

- && TYPE_MODE (TYPE) == DFmode) \

65390

- ? 64 \

65391

- : (TREE_CODE (TYPE) == ARRAY_TYPE \

65392

- && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \

65393

- && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN)))

65394

+#define DATA_ABI_ALIGNMENT(TYPE, ALIGN) \

65395

+ rs6000_data_alignment (TYPE, ALIGN, align_abi)

65396

65397

/* Nonzero if move instructions will actually fail to work

65398

when given unaligned data. */

65399

@@ -842,15 +924,17 @@

65400

in inline functions.

65401

65402

Another pseudo (not included in DWARF_FRAME_REGISTERS) is soft frame

65403

- pointer, which is eventually eliminated in favor of SP or FP. */

65404

+ pointer, which is eventually eliminated in favor of SP or FP.

65405

65406

-#define FIRST_PSEUDO_REGISTER 114

65407

+ The 3 HTM registers aren't also included in DWARF_FRAME_REGISTERS. */

65408

65409

+#define FIRST_PSEUDO_REGISTER 117

65410

+

65411

/* This must be included for pre gcc 3.0 glibc compatibility. */

65412

#define PRE_GCC3_DWARF_FRAME_REGISTERS 77

65413

65414

/* Add 32 dwarf columns for synthetic SPE registers. */

65415

-#define DWARF_FRAME_REGISTERS ((FIRST_PSEUDO_REGISTER - 1) + 32)

65416

+#define DWARF_FRAME_REGISTERS ((FIRST_PSEUDO_REGISTER - 4) + 32)

65417

65418

/* The SPE has an additional 32 synthetic registers, with DWARF debug

65419

info numbering for these registers starting at 1200. While eh_frame

65420

@@ -866,7 +950,7 @@

65421

We must map them here to avoid huge unwinder tables mostly consisting

65422

of unused space. */

65423

#define DWARF_REG_TO_UNWIND_COLUMN(r) \

65424

- ((r) > 1200 ? ((r) - 1200 + FIRST_PSEUDO_REGISTER - 1) : (r))

65425

+ ((r) > 1200 ? ((r) - 1200 + (DWARF_FRAME_REGISTERS - 32)) : (r))

65426

65427

/* Use standard DWARF numbering for DWARF debugging information. */

65428

#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO)

65429

@@ -906,7 +990,7 @@

65430

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

65431

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

65432

1, 1 \

65433

- , 1, 1, 1 \

65434

+ , 1, 1, 1, 1, 1, 1 \

65435

}

65436

65437

/* 1 for registers not available across function calls.

65438

@@ -926,7 +1010,7 @@

65439

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

65440

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

65441

1, 1 \

65442

- , 1, 1, 1 \

65443

+ , 1, 1, 1, 1, 1, 1 \

65444

}

65445

65446

/* Like `CALL_USED_REGISTERS' except this macro doesn't require that

65447

@@ -945,7 +1029,7 @@

65448

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

65449

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

65450

0, 0 \

65451

- , 0, 0, 0 \

65452

+ , 0, 0, 0, 0, 0, 0 \

65453

}

65454

65455

#define TOTAL_ALTIVEC_REGS (LAST_ALTIVEC_REGNO - FIRST_ALTIVEC_REGNO + 1)

65456

@@ -984,6 +1068,9 @@

65457

vrsave, vscr (fixed)

65458

spe_acc, spefscr (fixed)

65459

sfp (fixed)

65460

+ tfhar (fixed)

65461

+ tfiar (fixed)

65462

+ texasr (fixed)

65463

*/

65464

65465

#if FIXED_R2 == 1

65466

@@ -1004,7 +1091,9 @@

65467

65468

#define REG_ALLOC_ORDER \

65469

{32, \

65470

- 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \

65471

+ /* move fr13 (ie 45) later, so if we need TFmode, it does */ \

65472

+ /* not use fr14 which is a saved register. */ \

65473

+ 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 45, \

65474

33, \

65475

63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \

65476

50, 49, 48, 47, 46, \

65477

@@ -1023,7 +1112,7 @@

65478

96, 95, 94, 93, 92, 91, \

65479

108, 107, 106, 105, 104, 103, 102, 101, 100, 99, 98, 97, \

65480

109, 110, \

65481

- 111, 112, 113 \

65482

+ 111, 112, 113, 114, 115, 116 \

65483

}

65484

65485

/* True if register is floating-point. */

65486

@@ -1064,8 +1153,11 @@

65487

#define VINT_REGNO_P(N) ALTIVEC_REGNO_P (N)

65488

65489

/* Alternate name for any vector register supporting logical operations, no

65490

- matter which instruction set(s) are available. */

65491

-#define VLOGICAL_REGNO_P(N) VFLOAT_REGNO_P (N)

65492

+ matter which instruction set(s) are available. Allow GPRs as well as the

65493

+ vector registers. */

65494

+#define VLOGICAL_REGNO_P(N) \

65495

+ (INT_REGNO_P (N) || ALTIVEC_REGNO_P (N) \

65496

+ || (TARGET_VSX && FP_REGNO_P (N))) \

65497

65498

/* Return number of consecutive hard regs needed starting at reg REGNO

65499

to hold something of mode MODE. */

65500

@@ -1106,7 +1198,7 @@

65501

65502

#define ALTIVEC_OR_VSX_VECTOR_MODE(MODE) \

65503

(ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE) \

65504

- || (MODE) == V2DImode)

65505

+ || (MODE) == V2DImode || (MODE) == V1TImode)

65506

65507

#define SPE_VECTOR_MODE(MODE) \

65508

((MODE) == V4HImode \

65509

@@ -1125,28 +1217,32 @@

65510

/* Value is 1 if it is a good idea to tie two pseudo registers

65511

when one has mode MODE1 and one has mode MODE2.

65512

If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,

65513

- for any hard reg, then this must be 0 for correct output. */

65514

-#define MODES_TIEABLE_P(MODE1, MODE2) \

65515

- (SCALAR_FLOAT_MODE_P (MODE1) \

65516

+ for any hard reg, then this must be 0 for correct output.

65517

+

65518

+ PTImode cannot tie with other modes because PTImode is restricted to even

65519

+ GPR registers, and TImode can go in any GPR as well as VSX registers (PR

65520

+ 57744). */

65521

+#define MODES_TIEABLE_P(MODE1, MODE2) \

65522

+ ((MODE1) == PTImode \

65523

+ ? (MODE2) == PTImode \

65524

+ : (MODE2) == PTImode \

65525

+ ? 0 \

65526

+ : SCALAR_FLOAT_MODE_P (MODE1) \

65527

? SCALAR_FLOAT_MODE_P (MODE2) \

65528

: SCALAR_FLOAT_MODE_P (MODE2) \

65529

- ? SCALAR_FLOAT_MODE_P (MODE1) \

65530

+ ? 0 \

65531

: GET_MODE_CLASS (MODE1) == MODE_CC \

65532

? GET_MODE_CLASS (MODE2) == MODE_CC \

65533

: GET_MODE_CLASS (MODE2) == MODE_CC \

65534

- ? GET_MODE_CLASS (MODE1) == MODE_CC \

65535

+ ? 0 \

65536

: SPE_VECTOR_MODE (MODE1) \

65537

? SPE_VECTOR_MODE (MODE2) \

65538

: SPE_VECTOR_MODE (MODE2) \

65539

- ? SPE_VECTOR_MODE (MODE1) \

65540

- : ALTIVEC_VECTOR_MODE (MODE1) \

65541

- ? ALTIVEC_VECTOR_MODE (MODE2) \

65542

- : ALTIVEC_VECTOR_MODE (MODE2) \

65543

- ? ALTIVEC_VECTOR_MODE (MODE1) \

65544

+ ? 0 \

65545

: ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \

65546

? ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \

65547

: ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \

65548

- ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \

65549

+ ? 0 \

65550

: 1)

65551

65552

/* Post-reload, we can't use any new AltiVec registers, as we already

65553

@@ -1240,6 +1336,7 @@

65554

VSCR_REGS,

65555

SPE_ACC_REGS,

65556

SPEFSCR_REGS,

65557

+ SPR_REGS,

65558

NON_SPECIAL_REGS,

65559

LINK_REGS,

65560

CTR_REGS,

65561

@@ -1270,6 +1367,7 @@

65562

"VSCR_REGS", \

65563

"SPE_ACC_REGS", \

65564

"SPEFSCR_REGS", \

65565

+ "SPR_REGS", \

65566

"NON_SPECIAL_REGS", \

65567

"LINK_REGS", \

65568

"CTR_REGS", \

65569

@@ -1299,6 +1397,7 @@

65570

{ 0x00000000, 0x00000000, 0x00000000, 0x00004000 }, /* VSCR_REGS */ \

65571

{ 0x00000000, 0x00000000, 0x00000000, 0x00008000 }, /* SPE_ACC_REGS */ \

65572

{ 0x00000000, 0x00000000, 0x00000000, 0x00010000 }, /* SPEFSCR_REGS */ \

65573

+ { 0x00000000, 0x00000000, 0x00000000, 0x00040000 }, /* SPR_REGS */ \

65574

{ 0xffffffff, 0xffffffff, 0x00000008, 0x00020000 }, /* NON_SPECIAL_REGS */ \

65575

{ 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, /* LINK_REGS */ \

65576

{ 0x00000000, 0x00000000, 0x00000004, 0x00000000 }, /* CTR_REGS */ \

65577

@@ -1309,7 +1408,7 @@

65578

{ 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, /* CR_REGS */ \

65579

{ 0xffffffff, 0x00000000, 0x00000ffe, 0x00020000 }, /* NON_FLOAT_REGS */ \

65580

{ 0x00000000, 0x00000000, 0x00001000, 0x00000000 }, /* CA_REGS */ \

65581

- { 0xffffffff, 0xffffffff, 0xfffffffe, 0x0003ffff } /* ALL_REGS */ \

65582

+ { 0xffffffff, 0xffffffff, 0xfffffffe, 0x0007ffff } /* ALL_REGS */ \

65583

}

65584

65585

/* The same information, inverted:

65586

@@ -1337,7 +1436,18 @@

65587

RS6000_CONSTRAINT_wa, /* Any VSX register */

65588

RS6000_CONSTRAINT_wd, /* VSX register for V2DF */

65589

RS6000_CONSTRAINT_wf, /* VSX register for V4SF */

65590

+ RS6000_CONSTRAINT_wg, /* FPR register for -mmfpgpr */

65591

+ RS6000_CONSTRAINT_wl, /* FPR register for LFIWAX */

65592

+ RS6000_CONSTRAINT_wm, /* VSX register for direct move */

65593

+ RS6000_CONSTRAINT_wr, /* GPR register if 64-bit */

65594

RS6000_CONSTRAINT_ws, /* VSX register for DF */

65595

+ RS6000_CONSTRAINT_wt, /* VSX register for TImode */

65596

+ RS6000_CONSTRAINT_wu, /* Altivec register for float load/stores. */

65597

+ RS6000_CONSTRAINT_wv, /* Altivec register for double load/stores. */

65598

+ RS6000_CONSTRAINT_ww, /* FP or VSX register for vsx float ops. */

65599

+ RS6000_CONSTRAINT_wx, /* FPR register for STFIWX */

65600

+ RS6000_CONSTRAINT_wy, /* VSX register for SF */

65601

+ RS6000_CONSTRAINT_wz, /* FPR register for LFIWZX */

65602

RS6000_CONSTRAINT_MAX

65603

};

65604

65605

@@ -1425,21 +1535,14 @@

65606

arguments. */

65607

#define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0 || flag_asan != 0)

65608

65609

-/* Size of the outgoing register save area */

65610

-#define RS6000_REG_SAVE ((DEFAULT_ABI == ABI_AIX \

65611

- || DEFAULT_ABI == ABI_DARWIN) \

65612

- ? (TARGET_64BIT ? 64 : 32) \

65613

- : 0)

65614

-

65615

/* Size of the fixed area on the stack */

65616

#define RS6000_SAVE_AREA \

65617

- (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) ? 24 : 8) \

65618

+ ((DEFAULT_ABI == ABI_V4 ? 8 : DEFAULT_ABI == ABI_ELFv2 ? 16 : 24) \

65619

<< (TARGET_64BIT ? 1 : 0))

65620

65621

-/* MEM representing address to save the TOC register */

65622

-#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \

65623

- plus_constant (Pmode, stack_pointer_rtx, \

65624

- (TARGET_32BIT ? 20 : 40)))

65625

+/* Stack offset for toc save slot. */

65626

+#define RS6000_TOC_SAVE_SLOT \

65627

+ ((DEFAULT_ABI == ABI_ELFv2 ? 12 : 20) << (TARGET_64BIT ? 1 : 0))

65628

65629

/* Align an address */

65630

#define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1))

65631

@@ -1489,7 +1592,7 @@

65632

/* Define this if stack space is still allocated for a parameter passed

65633

in a register. The value is the number of bytes allocated to this

65634

area. */

65635

-#define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE

65636

+#define REG_PARM_STACK_SPACE(FNDECL) rs6000_reg_parm_stack_space((FNDECL))

65637

65638

/* Define this if the above stack space is to be considered part of the

65639

space allocated by the caller. */

65640

@@ -1522,7 +1625,7 @@

65641

NONLOCAL needs twice Pmode to maintain both backchain and SP. */

65642

#define STACK_SAVEAREA_MODE(LEVEL) \

65643

(LEVEL == SAVE_FUNCTION ? VOIDmode \

65644

- : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode)

65645

+ : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : PTImode) : Pmode)

65646

65647

/* Minimum and maximum general purpose registers used to hold arguments. */

65648

#define GP_ARG_MIN_REG 3

65649

@@ -1533,9 +1636,8 @@

65650

#define FP_ARG_MIN_REG 33

65651

#define FP_ARG_AIX_MAX_REG 45

65652

#define FP_ARG_V4_MAX_REG 40

65653

-#define FP_ARG_MAX_REG ((DEFAULT_ABI == ABI_AIX \

65654

- || DEFAULT_ABI == ABI_DARWIN) \

65655

- ? FP_ARG_AIX_MAX_REG : FP_ARG_V4_MAX_REG)

65656

+#define FP_ARG_MAX_REG (DEFAULT_ABI == ABI_V4 \

65657

+ ? FP_ARG_V4_MAX_REG : FP_ARG_AIX_MAX_REG)

65658

#define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1)

65659

65660

/* Minimum and maximum AltiVec registers used to hold arguments. */

65661

@@ -1543,10 +1645,17 @@

65662

#define ALTIVEC_ARG_MAX_REG (ALTIVEC_ARG_MIN_REG + 11)

65663

#define ALTIVEC_ARG_NUM_REG (ALTIVEC_ARG_MAX_REG - ALTIVEC_ARG_MIN_REG + 1)

65664

65665

+/* Maximum number of registers per ELFv2 homogeneous aggregate argument. */

65666

+#define AGGR_ARG_NUM_REG 8

65667

+

65668

/* Return registers */

65669

#define GP_ARG_RETURN GP_ARG_MIN_REG

65670

#define FP_ARG_RETURN FP_ARG_MIN_REG

65671

#define ALTIVEC_ARG_RETURN (FIRST_ALTIVEC_REGNO + 2)

65672

+#define FP_ARG_MAX_RETURN (DEFAULT_ABI != ABI_ELFv2 ? FP_ARG_RETURN \

65673

+ : (FP_ARG_RETURN + AGGR_ARG_NUM_REG - 1))

65674

+#define ALTIVEC_ARG_MAX_RETURN (DEFAULT_ABI != ABI_ELFv2 ? ALTIVEC_ARG_RETURN \

65675

+ : (ALTIVEC_ARG_RETURN + AGGR_ARG_NUM_REG - 1))

65676

65677

/* Flags for the call/call_value rtl operations set up by function_arg */

65678

#define CALL_NORMAL 0x00000000 /* no special processing */

65679

@@ -1566,8 +1675,10 @@

65680

On RS/6000, this is r3, fp1, and v2 (for AltiVec). */

65681

#define FUNCTION_VALUE_REGNO_P(N) \

65682

((N) == GP_ARG_RETURN \

65683

- || ((N) == FP_ARG_RETURN && TARGET_HARD_FLOAT && TARGET_FPRS) \

65684

- || ((N) == ALTIVEC_ARG_RETURN && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI))

65685

+ || ((N) >= FP_ARG_RETURN && (N) <= FP_ARG_MAX_RETURN \

65686

+ && TARGET_HARD_FLOAT && TARGET_FPRS) \

65687

+ || ((N) >= ALTIVEC_ARG_RETURN && (N) <= ALTIVEC_ARG_MAX_RETURN \

65688

+ && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI))

65689

65690

/* 1 if N is a possible register number for function argument passing.

65691

On RS/6000, these are r3-r10 and fp1-fp13.

65692

@@ -1691,11 +1802,8 @@

65693

/* Number of bytes into the frame return addresses can be found. See

65694

rs6000_stack_info in rs6000.c for more information on how the different

65695

abi's store the return address. */

65696

-#define RETURN_ADDRESS_OFFSET \

65697

- ((DEFAULT_ABI == ABI_AIX \

65698

- || DEFAULT_ABI == ABI_DARWIN) ? (TARGET_32BIT ? 8 : 16) : \

65699

- (DEFAULT_ABI == ABI_V4) ? 4 : \

65700

- (internal_error ("RETURN_ADDRESS_OFFSET not supported"), 0))

65701

+#define RETURN_ADDRESS_OFFSET \

65702

+ ((DEFAULT_ABI == ABI_V4 ? 4 : 8) << (TARGET_64BIT ? 1 : 0))

65703

65704

/* The current return address is in link register (65). The return address

65705

of anything farther back is accessed normally at an offset of 8 from the

65706

@@ -2215,6 +2323,9 @@

65707

&rs6000_reg_names[111][0], /* spe_acc */ \

65708

&rs6000_reg_names[112][0], /* spefscr */ \

65709

&rs6000_reg_names[113][0], /* sfp */ \

65710

+ &rs6000_reg_names[114][0], /* tfhar */ \

65711

+ &rs6000_reg_names[115][0], /* tfiar */ \

65712

+ &rs6000_reg_names[116][0], /* texasr */ \

65713

}

65714

65715

/* Table of additional register names to use in user input. */

65716

@@ -2268,7 +2379,9 @@

65717

{"vs48", 93}, {"vs49", 94}, {"vs50", 95}, {"vs51", 96}, \

65718

{"vs52", 97}, {"vs53", 98}, {"vs54", 99}, {"vs55", 100}, \

65719

{"vs56", 101},{"vs57", 102},{"vs58", 103},{"vs59", 104}, \

65720

- {"vs60", 105},{"vs61", 106},{"vs62", 107},{"vs63", 108} }

65721

+ {"vs60", 105},{"vs61", 106},{"vs62", 107},{"vs63", 108}, \

65722

+ /* Transactional Memory Facility (HTM) Registers. */ \

65723

+ {"tfhar", 114}, {"tfiar", 115}, {"texasr", 116} }

65724

65725

/* This is how to output an element of a case-vector that is relative. */

65726

65727

@@ -2357,7 +2470,12 @@

65728

#define RS6000_BTC_ATTR_MASK 0x00000700 /* Mask of the attributes. */

65729

65730

/* Miscellaneous information. */

65731

-#define RS6000_BTC_OVERLOADED 0x4000000 /* function is overloaded. */

65732

+#define RS6000_BTC_SPR 0x01000000 /* function references SPRs. */

65733

+#define RS6000_BTC_VOID 0x02000000 /* function has no return value. */

65734

+#define RS6000_BTC_OVERLOADED 0x04000000 /* function is overloaded. */

65735

+#define RS6000_BTC_32BIT 0x08000000 /* function references SPRs. */

65736

+#define RS6000_BTC_64BIT 0x10000000 /* function references SPRs. */

65737

+#define RS6000_BTC_MISC_MASK 0x1f000000 /* Mask of the misc info. */

65738

65739

/* Convenience macros to document the instruction type. */

65740

#define RS6000_BTC_MEM RS6000_BTC_MISC /* load/store touches mem. */

65741

@@ -2369,6 +2487,9 @@

65742

#define RS6000_BTM_ALWAYS 0 /* Always enabled. */

65743

#define RS6000_BTM_ALTIVEC MASK_ALTIVEC /* VMX/altivec vectors. */

65744

#define RS6000_BTM_VSX MASK_VSX /* VSX (vector/scalar). */

65745

+#define RS6000_BTM_P8_VECTOR MASK_P8_VECTOR /* ISA 2.07 vector. */

65746

+#define RS6000_BTM_CRYPTO MASK_CRYPTO /* crypto funcs. */

65747

+#define RS6000_BTM_HTM MASK_HTM /* hardware TM funcs. */

65748

#define RS6000_BTM_SPE MASK_STRING /* E500 */

65749

#define RS6000_BTM_PAIRED MASK_MULHW /* 750CL paired insns. */

65750

#define RS6000_BTM_FRE MASK_POPCNTB /* FRE instruction. */

65751

@@ -2380,10 +2501,13 @@

65752

65753

#define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \

65754

| RS6000_BTM_VSX \

65755

+ | RS6000_BTM_P8_VECTOR \

65756

+ | RS6000_BTM_CRYPTO \

65757

| RS6000_BTM_FRE \

65758

| RS6000_BTM_FRES \

65759

| RS6000_BTM_FRSQRTE \

65760

| RS6000_BTM_FRSQRTES \

65761

+ | RS6000_BTM_HTM \

65762

| RS6000_BTM_POPCNTD \

65763

| RS6000_BTM_CELL)

65764

65765

@@ -2395,6 +2519,7 @@

65766

#undef RS6000_BUILTIN_A

65767

#undef RS6000_BUILTIN_D

65768

#undef RS6000_BUILTIN_E

65769

+#undef RS6000_BUILTIN_H

65770

#undef RS6000_BUILTIN_P

65771

#undef RS6000_BUILTIN_Q

65772

#undef RS6000_BUILTIN_S

65773

@@ -2406,6 +2531,7 @@

65774

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

65775

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

65776

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

65777

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

65778

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

65779

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

65780

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

65781

@@ -2424,6 +2550,7 @@

65782

#undef RS6000_BUILTIN_A

65783

#undef RS6000_BUILTIN_D

65784

#undef RS6000_BUILTIN_E

65785

+#undef RS6000_BUILTIN_H

65786

#undef RS6000_BUILTIN_P

65787

#undef RS6000_BUILTIN_Q

65788

#undef RS6000_BUILTIN_S

65789

@@ -2437,6 +2564,7 @@

65790

RS6000_BTI_opaque_p_V2SI,

65791

RS6000_BTI_opaque_V4SI,

65792

RS6000_BTI_V16QI,

65793

+ RS6000_BTI_V1TI,

65794

RS6000_BTI_V2SI,

65795

RS6000_BTI_V2SF,

65796

RS6000_BTI_V2DI,

65797

@@ -2446,6 +2574,7 @@

65798

RS6000_BTI_V4SF,

65799

RS6000_BTI_V8HI,

65800

RS6000_BTI_unsigned_V16QI,

65801

+ RS6000_BTI_unsigned_V1TI,

65802

RS6000_BTI_unsigned_V8HI,

65803

RS6000_BTI_unsigned_V4SI,

65804

RS6000_BTI_unsigned_V2DI,

65805

@@ -2471,6 +2600,8 @@

65806

RS6000_BTI_UINTSI, /* unsigned_intSI_type_node */

65807

RS6000_BTI_INTDI, /* intDI_type_node */

65808

RS6000_BTI_UINTDI, /* unsigned_intDI_type_node */

65809

+ RS6000_BTI_INTTI, /* intTI_type_node */

65810

+ RS6000_BTI_UINTTI, /* unsigned_intTI_type_node */

65811

RS6000_BTI_float, /* float_type_node */

65812

RS6000_BTI_double, /* double_type_node */

65813

RS6000_BTI_void, /* void_type_node */

65814

@@ -2483,6 +2614,7 @@

65815

#define opaque_p_V2SI_type_node (rs6000_builtin_types[RS6000_BTI_opaque_p_V2SI])

65816

#define opaque_V4SI_type_node (rs6000_builtin_types[RS6000_BTI_opaque_V4SI])

65817

#define V16QI_type_node (rs6000_builtin_types[RS6000_BTI_V16QI])

65818

+#define V1TI_type_node (rs6000_builtin_types[RS6000_BTI_V1TI])

65819

#define V2DI_type_node (rs6000_builtin_types[RS6000_BTI_V2DI])

65820

#define V2DF_type_node (rs6000_builtin_types[RS6000_BTI_V2DF])

65821

#define V2SI_type_node (rs6000_builtin_types[RS6000_BTI_V2SI])

65822

@@ -2492,6 +2624,7 @@

65823

#define V4SF_type_node (rs6000_builtin_types[RS6000_BTI_V4SF])

65824

#define V8HI_type_node (rs6000_builtin_types[RS6000_BTI_V8HI])

65825

#define unsigned_V16QI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V16QI])

65826

+#define unsigned_V1TI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V1TI])

65827

#define unsigned_V8HI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V8HI])

65828

#define unsigned_V4SI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V4SI])

65829

#define unsigned_V2DI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V2DI])

65830

@@ -2518,6 +2651,8 @@

65831

#define uintSI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTSI])

65832

#define intDI_type_internal_node (rs6000_builtin_types[RS6000_BTI_INTDI])

65833

#define uintDI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTDI])

65834

+#define intTI_type_internal_node (rs6000_builtin_types[RS6000_BTI_INTTI])

65835

+#define uintTI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTTI])

65836

#define float_type_internal_node (rs6000_builtin_types[RS6000_BTI_float])

65837

#define double_type_internal_node (rs6000_builtin_types[RS6000_BTI_double])

65838

#define void_type_internal_node (rs6000_builtin_types[RS6000_BTI_void])

65839

Index: gcc/config/rs6000/altivec.md

65840

===================================================================

65841

--- a/src/gcc/config/rs6000/altivec.md (.../tags/gcc_4_8_2_release)

65842

+++ b/src/gcc/config/rs6000/altivec.md (.../branches/gcc-4_8-branch)

65843

@@ -41,15 +41,12 @@

65844

UNSPEC_VMULOSB

65845

UNSPEC_VMULOUH

65846

UNSPEC_VMULOSH

65847

- UNSPEC_VPKUHUM

65848

- UNSPEC_VPKUWUM

65849

UNSPEC_VPKPX

65850

- UNSPEC_VPKSHSS

65851

- UNSPEC_VPKSWSS

65852

- UNSPEC_VPKUHUS

65853

- UNSPEC_VPKSHUS

65854

- UNSPEC_VPKUWUS

65855

- UNSPEC_VPKSWUS

65856

+ UNSPEC_VPACK_SIGN_SIGN_SAT

65857

+ UNSPEC_VPACK_SIGN_UNS_SAT

65858

+ UNSPEC_VPACK_UNS_UNS_SAT

65859

+ UNSPEC_VPACK_UNS_UNS_MOD

65860

+ UNSPEC_VPACK_UNS_UNS_MOD_DIRECT

65861

UNSPEC_VSLV4SI

65862

UNSPEC_VSLO

65863

UNSPEC_VSR

65864

@@ -71,12 +68,12 @@

65865

UNSPEC_VLOGEFP

65866

UNSPEC_VEXPTEFP

65867

UNSPEC_VLSDOI

65868

- UNSPEC_VUPKHSB

65869

+ UNSPEC_VUNPACK_HI_SIGN

65870

+ UNSPEC_VUNPACK_LO_SIGN

65871

+ UNSPEC_VUNPACK_HI_SIGN_DIRECT

65872

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT

65873

UNSPEC_VUPKHPX

65874

- UNSPEC_VUPKHSH

65875

- UNSPEC_VUPKLSB

65876

UNSPEC_VUPKLPX

65877

- UNSPEC_VUPKLSH

65878

UNSPEC_DST

65879

UNSPEC_DSTT

65880

UNSPEC_DSTST

65881

@@ -134,6 +131,18 @@

65882

UNSPEC_VUPKLS_V4SF

65883

UNSPEC_VUPKHU_V4SF

65884

UNSPEC_VUPKLU_V4SF

65885

+ UNSPEC_VGBBD

65886

+ UNSPEC_VMRGH_DIRECT

65887

+ UNSPEC_VMRGL_DIRECT

65888

+ UNSPEC_VSPLT_DIRECT

65889

+ UNSPEC_VSUMSWS_DIRECT

65890

+ UNSPEC_VADDCUQ

65891

+ UNSPEC_VADDEUQM

65892

+ UNSPEC_VADDECUQ

65893

+ UNSPEC_VSUBCUQ

65894

+ UNSPEC_VSUBEUQM

65895

+ UNSPEC_VSUBECUQ

65896

+ UNSPEC_VBPERMQ

65897

])

65898

65899

(define_c_enum "unspecv"

65900

@@ -146,6 +155,8 @@

65901

65902

;; Vec int modes

65903

(define_mode_iterator VI [V4SI V8HI V16QI])

65904

+;; Like VI, but add ISA 2.07 integer vector ops

65905

+(define_mode_iterator VI2 [V4SI V8HI V16QI V2DI])

65906

;; Short vec in modes

65907

(define_mode_iterator VIshort [V8HI V16QI])

65908

;; Vec float modes

65909

@@ -154,14 +165,25 @@

65910

(define_mode_iterator V [V4SI V8HI V16QI V4SF])

65911

;; Vec modes for move/logical/permute ops, include vector types for move not

65912

;; otherwise handled by altivec (v2df, v2di, ti)

65913

-(define_mode_iterator VM [V4SI V8HI V16QI V4SF V2DF V2DI TI])

65914

+(define_mode_iterator VM [V4SI V8HI V16QI V4SF V2DF V2DI V1TI TI])

65915

65916

;; Like VM, except don't do TImode

65917

-(define_mode_iterator VM2 [V4SI V8HI V16QI V4SF V2DF V2DI])

65918

+(define_mode_iterator VM2 [V4SI V8HI V16QI V4SF V2DF V2DI V1TI])

65919

65920

-(define_mode_attr VI_char [(V4SI "w") (V8HI "h") (V16QI "b")])

65921

-(define_mode_attr VI_scalar [(V4SI "SI") (V8HI "HI") (V16QI "QI")])

65922

+(define_mode_attr VI_char [(V2DI "d") (V4SI "w") (V8HI "h") (V16QI "b")])

65923

+(define_mode_attr VI_scalar [(V2DI "DI") (V4SI "SI") (V8HI "HI") (V16QI "QI")])

65924

+(define_mode_attr VI_unit [(V16QI "VECTOR_UNIT_ALTIVEC_P (V16QImode)")

65925

+ (V8HI "VECTOR_UNIT_ALTIVEC_P (V8HImode)")

65926

+ (V4SI "VECTOR_UNIT_ALTIVEC_P (V4SImode)")

65927

+ (V2DI "VECTOR_UNIT_P8_VECTOR_P (V2DImode)")

65928

+ (V1TI "VECTOR_UNIT_ALTIVEC_P (V1TImode)")])

65929

65930

+;; Vector pack/unpack

65931

+(define_mode_iterator VP [V2DI V4SI V8HI])

65932

+(define_mode_attr VP_small [(V2DI "V4SI") (V4SI "V8HI") (V8HI "V16QI")])

65933

+(define_mode_attr VP_small_lc [(V2DI "v4si") (V4SI "v8hi") (V8HI "v16qi")])

65934

+(define_mode_attr VU_char [(V2DI "w") (V4SI "h") (V8HI "b")])

65935

+

65936

;; Vector move instructions.

65937

(define_insn "*altivec_mov<mode>"

65938

[(set (match_operand:VM2 0 "nonimmediate_operand" "=Z,v,v,*Y,*r,*r,v,v")

65939

@@ -378,10 +400,10 @@

65940

65941

;; add

65942

(define_insn "add<mode>3"

65943

- [(set (match_operand:VI 0 "register_operand" "=v")

65944

- (plus:VI (match_operand:VI 1 "register_operand" "v")

65945

- (match_operand:VI 2 "register_operand" "v")))]

65946

- "TARGET_ALTIVEC"

65947

+ [(set (match_operand:VI2 0 "register_operand" "=v")

65948

+ (plus:VI2 (match_operand:VI2 1 "register_operand" "v")

65949

+ (match_operand:VI2 2 "register_operand" "v")))]

65950

+ "<VI_unit>"

65951

"vaddu<VI_char>m %0,%1,%2"

65952

[(set_attr "type" "vecsimple")])

65953

65954

@@ -398,7 +420,7 @@

65955

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

65956

(match_operand:V4SI 2 "register_operand" "v")]

65957

UNSPEC_VADDCUW))]

65958

- "TARGET_ALTIVEC"

65959

+ "VECTOR_UNIT_ALTIVEC_P (V4SImode)"

65960

"vaddcuw %0,%1,%2"

65961

[(set_attr "type" "vecsimple")])

65962

65963

@@ -405,10 +427,10 @@

65964

(define_insn "altivec_vaddu<VI_char>s"

65965

[(set (match_operand:VI 0 "register_operand" "=v")

65966

(unspec:VI [(match_operand:VI 1 "register_operand" "v")

65967

- (match_operand:VI 2 "register_operand" "v")]

65968

+ (match_operand:VI 2 "register_operand" "v")]

65969

UNSPEC_VADDU))

65970

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

65971

- "TARGET_ALTIVEC"

65972

+ "<VI_unit>"

65973

"vaddu<VI_char>s %0,%1,%2"

65974

[(set_attr "type" "vecsimple")])

65975

65976

@@ -418,16 +440,16 @@

65977

(match_operand:VI 2 "register_operand" "v")]

65978

UNSPEC_VADDS))

65979

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

65980

- "TARGET_ALTIVEC"

65981

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

65982

"vadds<VI_char>s %0,%1,%2"

65983

[(set_attr "type" "vecsimple")])

65984

65985

;; sub

65986

(define_insn "sub<mode>3"

65987

- [(set (match_operand:VI 0 "register_operand" "=v")

65988

- (minus:VI (match_operand:VI 1 "register_operand" "v")

65989

- (match_operand:VI 2 "register_operand" "v")))]

65990

- "TARGET_ALTIVEC"

65991

+ [(set (match_operand:VI2 0 "register_operand" "=v")

65992

+ (minus:VI2 (match_operand:VI2 1 "register_operand" "v")

65993

+ (match_operand:VI2 2 "register_operand" "v")))]

65994

+ "<VI_unit>"

65995

"vsubu<VI_char>m %0,%1,%2"

65996

[(set_attr "type" "vecsimple")])

65997

65998

@@ -444,7 +466,7 @@

65999

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

66000

(match_operand:V4SI 2 "register_operand" "v")]

66001

UNSPEC_VSUBCUW))]

66002

- "TARGET_ALTIVEC"

66003

+ "VECTOR_UNIT_ALTIVEC_P (V4SImode)"

66004

"vsubcuw %0,%1,%2"

66005

[(set_attr "type" "vecsimple")])

66006

66007

@@ -454,7 +476,7 @@

66008

(match_operand:VI 2 "register_operand" "v")]

66009

UNSPEC_VSUBU))

66010

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66011

- "TARGET_ALTIVEC"

66012

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

66013

"vsubu<VI_char>s %0,%1,%2"

66014

[(set_attr "type" "vecsimple")])

66015

66016

@@ -464,7 +486,7 @@

66017

(match_operand:VI 2 "register_operand" "v")]

66018

UNSPEC_VSUBS))

66019

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66020

- "TARGET_ALTIVEC"

66021

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

66022

"vsubs<VI_char>s %0,%1,%2"

66023

[(set_attr "type" "vecsimple")])

66024

66025

@@ -483,7 +505,7 @@

66026

(unspec:VI [(match_operand:VI 1 "register_operand" "v")

66027

(match_operand:VI 2 "register_operand" "v")]

66028

UNSPEC_VAVGS))]

66029

- "TARGET_ALTIVEC"

66030

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

66031

"vavgs<VI_char> %0,%1,%2"

66032

[(set_attr "type" "vecsimple")])

66033

66034

@@ -492,31 +514,31 @@

66035

(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")

66036

(match_operand:V4SF 2 "register_operand" "v")]

66037

UNSPEC_VCMPBFP))]

66038

- "TARGET_ALTIVEC"

66039

+ "VECTOR_UNIT_ALTIVEC_P (V4SImode)"

66040

"vcmpbfp %0,%1,%2"

66041

[(set_attr "type" "veccmp")])

66042

66043

(define_insn "*altivec_eq<mode>"

66044

- [(set (match_operand:VI 0 "altivec_register_operand" "=v")

66045

- (eq:VI (match_operand:VI 1 "altivec_register_operand" "v")

66046

- (match_operand:VI 2 "altivec_register_operand" "v")))]

66047

- "TARGET_ALTIVEC"

66048

+ [(set (match_operand:VI2 0 "altivec_register_operand" "=v")

66049

+ (eq:VI2 (match_operand:VI2 1 "altivec_register_operand" "v")

66050

+ (match_operand:VI2 2 "altivec_register_operand" "v")))]

66051

+ "<VI_unit>"

66052

"vcmpequ<VI_char> %0,%1,%2"

66053

[(set_attr "type" "veccmp")])

66054

66055

(define_insn "*altivec_gt<mode>"

66056

- [(set (match_operand:VI 0 "altivec_register_operand" "=v")

66057

- (gt:VI (match_operand:VI 1 "altivec_register_operand" "v")

66058

- (match_operand:VI 2 "altivec_register_operand" "v")))]

66059

- "TARGET_ALTIVEC"

66060

+ [(set (match_operand:VI2 0 "altivec_register_operand" "=v")

66061

+ (gt:VI2 (match_operand:VI2 1 "altivec_register_operand" "v")

66062

+ (match_operand:VI2 2 "altivec_register_operand" "v")))]

66063

+ "<VI_unit>"

66064

"vcmpgts<VI_char> %0,%1,%2"

66065

[(set_attr "type" "veccmp")])

66066

66067

(define_insn "*altivec_gtu<mode>"

66068

- [(set (match_operand:VI 0 "altivec_register_operand" "=v")

66069

- (gtu:VI (match_operand:VI 1 "altivec_register_operand" "v")

66070

- (match_operand:VI 2 "altivec_register_operand" "v")))]

66071

- "TARGET_ALTIVEC"

66072

+ [(set (match_operand:VI2 0 "altivec_register_operand" "=v")

66073

+ (gtu:VI2 (match_operand:VI2 1 "altivec_register_operand" "v")

66074

+ (match_operand:VI2 2 "altivec_register_operand" "v")))]

66075

+ "<VI_unit>"

66076

"vcmpgtu<VI_char> %0,%1,%2"

66077

[(set_attr "type" "veccmp")])

66078

66079

@@ -642,7 +664,7 @@

66080

convert_move (small_swap, swap, 0);

66081

66082

low_product = gen_reg_rtx (V4SImode);

66083

- emit_insn (gen_vec_widen_umult_odd_v8hi (low_product, one, two));

66084

+ emit_insn (gen_altivec_vmulouh (low_product, one, two));

66085

66086

high_product = gen_reg_rtx (V4SImode);

66087

emit_insn (gen_altivec_vmsumuhm (high_product, one, small_swap, zero));

66088

@@ -666,14 +688,23 @@

66089

rtx high = gen_reg_rtx (V4SImode);

66090

rtx low = gen_reg_rtx (V4SImode);

66091

66092

- emit_insn (gen_vec_widen_smult_even_v8hi (even, operands[1], operands[2]));

66093

- emit_insn (gen_vec_widen_smult_odd_v8hi (odd, operands[1], operands[2]));

66094

+ if (BYTES_BIG_ENDIAN)

66095

+ {

66096

+ emit_insn (gen_altivec_vmulesh (even, operands[1], operands[2]));

66097

+ emit_insn (gen_altivec_vmulosh (odd, operands[1], operands[2]));

66098

+ emit_insn (gen_altivec_vmrghw_direct (high, even, odd));

66099

+ emit_insn (gen_altivec_vmrglw_direct (low, even, odd));

66100

+ emit_insn (gen_altivec_vpkuwum_direct (operands[0], high, low));

66101

+ }

66102

+ else

66103

+ {

66104

+ emit_insn (gen_altivec_vmulosh (even, operands[1], operands[2]));

66105

+ emit_insn (gen_altivec_vmulesh (odd, operands[1], operands[2]));

66106

+ emit_insn (gen_altivec_vmrghw_direct (high, odd, even));

66107

+ emit_insn (gen_altivec_vmrglw_direct (low, odd, even));

66108

+ emit_insn (gen_altivec_vpkuwum_direct (operands[0], low, high));

66109

+ }

66110

66111

- emit_insn (gen_altivec_vmrghw (high, even, odd));

66112

- emit_insn (gen_altivec_vmrglw (low, even, odd));

66113

-

66114

- emit_insn (gen_altivec_vpkuwum (operands[0], high, low));

66115

-

66116

DONE;

66117

}")

66118

66119

@@ -744,18 +775,18 @@

66120

;; max

66121

66122

(define_insn "umax<mode>3"

66123

- [(set (match_operand:VI 0 "register_operand" "=v")

66124

- (umax:VI (match_operand:VI 1 "register_operand" "v")

66125

- (match_operand:VI 2 "register_operand" "v")))]

66126

- "TARGET_ALTIVEC"

66127

+ [(set (match_operand:VI2 0 "register_operand" "=v")

66128

+ (umax:VI2 (match_operand:VI2 1 "register_operand" "v")

66129

+ (match_operand:VI2 2 "register_operand" "v")))]

66130

+ "<VI_unit>"

66131

"vmaxu<VI_char> %0,%1,%2"

66132

[(set_attr "type" "vecsimple")])

66133

66134

(define_insn "smax<mode>3"

66135

- [(set (match_operand:VI 0 "register_operand" "=v")

66136

- (smax:VI (match_operand:VI 1 "register_operand" "v")

66137

- (match_operand:VI 2 "register_operand" "v")))]

66138

- "TARGET_ALTIVEC"

66139

+ [(set (match_operand:VI2 0 "register_operand" "=v")

66140

+ (smax:VI2 (match_operand:VI2 1 "register_operand" "v")

66141

+ (match_operand:VI2 2 "register_operand" "v")))]

66142

+ "<VI_unit>"

66143

"vmaxs<VI_char> %0,%1,%2"

66144

[(set_attr "type" "vecsimple")])

66145

66146

@@ -768,18 +799,18 @@

66147

[(set_attr "type" "veccmp")])

66148

66149

(define_insn "umin<mode>3"

66150

- [(set (match_operand:VI 0 "register_operand" "=v")

66151

- (umin:VI (match_operand:VI 1 "register_operand" "v")

66152

- (match_operand:VI 2 "register_operand" "v")))]

66153

- "TARGET_ALTIVEC"

66154

+ [(set (match_operand:VI2 0 "register_operand" "=v")

66155

+ (umin:VI2 (match_operand:VI2 1 "register_operand" "v")

66156

+ (match_operand:VI2 2 "register_operand" "v")))]

66157

+ "<VI_unit>"

66158

"vminu<VI_char> %0,%1,%2"

66159

[(set_attr "type" "vecsimple")])

66160

66161

(define_insn "smin<mode>3"

66162

- [(set (match_operand:VI 0 "register_operand" "=v")

66163

- (smin:VI (match_operand:VI 1 "register_operand" "v")

66164

- (match_operand:VI 2 "register_operand" "v")))]

66165

- "TARGET_ALTIVEC"

66166

+ [(set (match_operand:VI2 0 "register_operand" "=v")

66167

+ (smin:VI2 (match_operand:VI2 1 "register_operand" "v")

66168

+ (match_operand:VI2 2 "register_operand" "v")))]

66169

+ "<VI_unit>"

66170

"vmins<VI_char> %0,%1,%2"

66171

[(set_attr "type" "vecsimple")])

66172

66173

@@ -823,9 +854,41 @@

66174

"vmladduhm %0,%1,%2,%3"

66175

[(set_attr "type" "veccomplex")])

66176

66177

-(define_insn "altivec_vmrghb"

66178

+(define_expand "altivec_vmrghb"

66179

+ [(use (match_operand:V16QI 0 "register_operand" ""))

66180

+ (use (match_operand:V16QI 1 "register_operand" ""))

66181

+ (use (match_operand:V16QI 2 "register_operand" ""))]

66182

+ "TARGET_ALTIVEC"

66183

+{

66184

+ rtvec v;

66185

+ rtx x;

66186

+

66187

+ /* Special handling for LE with -maltivec=be. */

66188

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

66189

+ {

66190

+ v = gen_rtvec (16, GEN_INT (8), GEN_INT (24), GEN_INT (9), GEN_INT (25),

66191

+ GEN_INT (10), GEN_INT (26), GEN_INT (11), GEN_INT (27),

66192

+ GEN_INT (12), GEN_INT (28), GEN_INT (13), GEN_INT (29),

66193

+ GEN_INT (14), GEN_INT (30), GEN_INT (15), GEN_INT (31));

66194

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[2], operands[1]);

66195

+ }

66196

+ else

66197

+ {

66198

+ v = gen_rtvec (16, GEN_INT (0), GEN_INT (16), GEN_INT (1), GEN_INT (17),

66199

+ GEN_INT (2), GEN_INT (18), GEN_INT (3), GEN_INT (19),

66200

+ GEN_INT (4), GEN_INT (20), GEN_INT (5), GEN_INT (21),

66201

+ GEN_INT (6), GEN_INT (22), GEN_INT (7), GEN_INT (23));

66202

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[1], operands[2]);

66203

+ }

66204

+

66205

+ x = gen_rtx_VEC_SELECT (V16QImode, x, gen_rtx_PARALLEL (VOIDmode, v));

66206

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

66207

+ DONE;

66208

+})

66209

+

66210

+(define_insn "*altivec_vmrghb_internal"

66211

[(set (match_operand:V16QI 0 "register_operand" "=v")

66212

- (vec_select:V16QI

66213

+ (vec_select:V16QI

66214

(vec_concat:V32QI

66215

(match_operand:V16QI 1 "register_operand" "v")

66216

(match_operand:V16QI 2 "register_operand" "v"))

66217

@@ -838,12 +901,54 @@

66218

(const_int 6) (const_int 22)

66219

(const_int 7) (const_int 23)])))]

66220

"TARGET_ALTIVEC"

66221

+{

66222

+ if (BYTES_BIG_ENDIAN)

66223

+ return "vmrghb %0,%1,%2";

66224

+ else

66225

+ return "vmrglb %0,%2,%1";

66226

+}

66227

+ [(set_attr "type" "vecperm")])

66228

+

66229

+(define_insn "altivec_vmrghb_direct"

66230

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

66231

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")

66232

+ (match_operand:V16QI 2 "register_operand" "v")]

66233

+ UNSPEC_VMRGH_DIRECT))]

66234

+ "TARGET_ALTIVEC"

66235

"vmrghb %0,%1,%2"

66236

[(set_attr "type" "vecperm")])

66237

66238

-(define_insn "altivec_vmrghh"

66239

+(define_expand "altivec_vmrghh"

66240

+ [(use (match_operand:V8HI 0 "register_operand" ""))

66241

+ (use (match_operand:V8HI 1 "register_operand" ""))

66242

+ (use (match_operand:V8HI 2 "register_operand" ""))]

66243

+ "TARGET_ALTIVEC"

66244

+{

66245

+ rtvec v;

66246

+ rtx x;

66247

+

66248

+ /* Special handling for LE with -maltivec=be. */

66249

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

66250

+ {

66251

+ v = gen_rtvec (8, GEN_INT (4), GEN_INT (12), GEN_INT (5), GEN_INT (13),

66252

+ GEN_INT (6), GEN_INT (14), GEN_INT (7), GEN_INT (15));

66253

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[2], operands[1]);

66254

+ }

66255

+ else

66256

+ {

66257

+ v = gen_rtvec (8, GEN_INT (0), GEN_INT (8), GEN_INT (1), GEN_INT (9),

66258

+ GEN_INT (2), GEN_INT (10), GEN_INT (3), GEN_INT (11));

66259

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[1], operands[2]);

66260

+ }

66261

+

66262

+ x = gen_rtx_VEC_SELECT (V8HImode, x, gen_rtx_PARALLEL (VOIDmode, v));

66263

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

66264

+ DONE;

66265

+})

66266

+

66267

+(define_insn "*altivec_vmrghh_internal"

66268

[(set (match_operand:V8HI 0 "register_operand" "=v")

66269

- (vec_select:V8HI

66270

+ (vec_select:V8HI

66271

(vec_concat:V16HI

66272

(match_operand:V8HI 1 "register_operand" "v")

66273

(match_operand:V8HI 2 "register_operand" "v"))

66274

@@ -852,10 +957,50 @@

66275

(const_int 2) (const_int 10)

66276

(const_int 3) (const_int 11)])))]

66277

"TARGET_ALTIVEC"

66278

+{

66279

+ if (BYTES_BIG_ENDIAN)

66280

+ return "vmrghh %0,%1,%2";

66281

+ else

66282

+ return "vmrglh %0,%2,%1";

66283

+}

66284

+ [(set_attr "type" "vecperm")])

66285

+

66286

+(define_insn "altivec_vmrghh_direct"

66287

+ [(set (match_operand:V8HI 0 "register_operand" "=v")

66288

+ (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "v")

66289

+ (match_operand:V8HI 2 "register_operand" "v")]

66290

+ UNSPEC_VMRGH_DIRECT))]

66291

+ "TARGET_ALTIVEC"

66292

"vmrghh %0,%1,%2"

66293

[(set_attr "type" "vecperm")])

66294

66295

-(define_insn "altivec_vmrghw"

66296

+(define_expand "altivec_vmrghw"

66297

+ [(use (match_operand:V4SI 0 "register_operand" ""))

66298

+ (use (match_operand:V4SI 1 "register_operand" ""))

66299

+ (use (match_operand:V4SI 2 "register_operand" ""))]

66300

+ "VECTOR_MEM_ALTIVEC_P (V4SImode)"

66301

+{

66302

+ rtvec v;

66303

+ rtx x;

66304

+

66305

+ /* Special handling for LE with -maltivec=be. */

66306

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

66307

+ {

66308

+ v = gen_rtvec (4, GEN_INT (2), GEN_INT (6), GEN_INT (3), GEN_INT (7));

66309

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[2], operands[1]);

66310

+ }

66311

+ else

66312

+ {

66313

+ v = gen_rtvec (4, GEN_INT (0), GEN_INT (4), GEN_INT (1), GEN_INT (5));

66314

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[1], operands[2]);

66315

+ }

66316

+

66317

+ x = gen_rtx_VEC_SELECT (V4SImode, x, gen_rtx_PARALLEL (VOIDmode, v));

66318

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

66319

+ DONE;

66320

+})

66321

+

66322

+(define_insn "*altivec_vmrghw_internal"

66323

[(set (match_operand:V4SI 0 "register_operand" "=v")

66324

(vec_select:V4SI

66325

(vec_concat:V8SI

66326

@@ -864,6 +1009,20 @@

66327

(parallel [(const_int 0) (const_int 4)

66328

(const_int 1) (const_int 5)])))]

66329

"VECTOR_MEM_ALTIVEC_P (V4SImode)"

66330

+{

66331

+ if (BYTES_BIG_ENDIAN)

66332

+ return "vmrghw %0,%1,%2";

66333

+ else

66334

+ return "vmrglw %0,%2,%1";

66335

+}

66336

+ [(set_attr "type" "vecperm")])

66337

+

66338

+(define_insn "altivec_vmrghw_direct"

66339

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

66340

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

66341

+ (match_operand:V4SI 2 "register_operand" "v")]

66342

+ UNSPEC_VMRGH_DIRECT))]

66343

+ "TARGET_ALTIVEC"

66344

"vmrghw %0,%1,%2"

66345

[(set_attr "type" "vecperm")])

66346

66347

@@ -876,10 +1035,47 @@

66348

(parallel [(const_int 0) (const_int 4)

66349

(const_int 1) (const_int 5)])))]

66350

"VECTOR_MEM_ALTIVEC_P (V4SFmode)"

66351

- "vmrghw %0,%1,%2"

66352

+{

66353

+ if (BYTES_BIG_ENDIAN)

66354

+ return "vmrghw %0,%1,%2";

66355

+ else

66356

+ return "vmrglw %0,%2,%1";

66357

+}

66358

[(set_attr "type" "vecperm")])

66359

66360

-(define_insn "altivec_vmrglb"

66361

+(define_expand "altivec_vmrglb"

66362

+ [(use (match_operand:V16QI 0 "register_operand" ""))

66363

+ (use (match_operand:V16QI 1 "register_operand" ""))

66364

+ (use (match_operand:V16QI 2 "register_operand" ""))]

66365

+ "TARGET_ALTIVEC"

66366

+{

66367

+ rtvec v;

66368

+ rtx x;

66369

+

66370

+ /* Special handling for LE with -maltivec=be. */

66371

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

66372

+ {

66373

+ v = gen_rtvec (16, GEN_INT (0), GEN_INT (16), GEN_INT (1), GEN_INT (17),

66374

+ GEN_INT (2), GEN_INT (18), GEN_INT (3), GEN_INT (19),

66375

+ GEN_INT (4), GEN_INT (20), GEN_INT (5), GEN_INT (21),

66376

+ GEN_INT (6), GEN_INT (22), GEN_INT (7), GEN_INT (23));

66377

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[2], operands[1]);

66378

+ }

66379

+ else

66380

+ {

66381

+ v = gen_rtvec (16, GEN_INT (8), GEN_INT (24), GEN_INT (9), GEN_INT (25),

66382

+ GEN_INT (10), GEN_INT (26), GEN_INT (11), GEN_INT (27),

66383

+ GEN_INT (12), GEN_INT (28), GEN_INT (13), GEN_INT (29),

66384

+ GEN_INT (14), GEN_INT (30), GEN_INT (15), GEN_INT (31));

66385

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[1], operands[2]);

66386

+ }

66387

+

66388

+ x = gen_rtx_VEC_SELECT (V16QImode, x, gen_rtx_PARALLEL (VOIDmode, v));

66389

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

66390

+ DONE;

66391

+})

66392

+

66393

+(define_insn "*altivec_vmrglb_internal"

66394

[(set (match_operand:V16QI 0 "register_operand" "=v")

66395

(vec_select:V16QI

66396

(vec_concat:V32QI

66397

@@ -894,10 +1090,52 @@

66398

(const_int 14) (const_int 30)

66399

(const_int 15) (const_int 31)])))]

66400

"TARGET_ALTIVEC"

66401

+{

66402

+ if (BYTES_BIG_ENDIAN)

66403

+ return "vmrglb %0,%1,%2";

66404

+ else

66405

+ return "vmrghb %0,%2,%1";

66406

+}

66407

+ [(set_attr "type" "vecperm")])

66408

+

66409

+(define_insn "altivec_vmrglb_direct"

66410

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

66411

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")

66412

+ (match_operand:V16QI 2 "register_operand" "v")]

66413

+ UNSPEC_VMRGL_DIRECT))]

66414

+ "TARGET_ALTIVEC"

66415

"vmrglb %0,%1,%2"

66416

[(set_attr "type" "vecperm")])

66417

66418

-(define_insn "altivec_vmrglh"

66419

+(define_expand "altivec_vmrglh"

66420

+ [(use (match_operand:V8HI 0 "register_operand" ""))

66421

+ (use (match_operand:V8HI 1 "register_operand" ""))

66422

+ (use (match_operand:V8HI 2 "register_operand" ""))]

66423

+ "TARGET_ALTIVEC"

66424

+{

66425

+ rtvec v;

66426

+ rtx x;

66427

+

66428

+ /* Special handling for LE with -maltivec=be. */

66429

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

66430

+ {

66431

+ v = gen_rtvec (8, GEN_INT (0), GEN_INT (8), GEN_INT (1), GEN_INT (9),

66432

+ GEN_INT (2), GEN_INT (10), GEN_INT (3), GEN_INT (11));

66433

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[2], operands[1]);

66434

+ }

66435

+ else

66436

+ {

66437

+ v = gen_rtvec (8, GEN_INT (4), GEN_INT (12), GEN_INT (5), GEN_INT (13),

66438

+ GEN_INT (6), GEN_INT (14), GEN_INT (7), GEN_INT (15));

66439

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[1], operands[2]);

66440

+ }

66441

+

66442

+ x = gen_rtx_VEC_SELECT (V8HImode, x, gen_rtx_PARALLEL (VOIDmode, v));

66443

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

66444

+ DONE;

66445

+})

66446

+

66447

+(define_insn "*altivec_vmrglh_internal"

66448

[(set (match_operand:V8HI 0 "register_operand" "=v")

66449

(vec_select:V8HI

66450

(vec_concat:V16HI

66451

@@ -908,10 +1146,50 @@

66452

(const_int 6) (const_int 14)

66453

(const_int 7) (const_int 15)])))]

66454

"TARGET_ALTIVEC"

66455

+{

66456

+ if (BYTES_BIG_ENDIAN)

66457

+ return "vmrglh %0,%1,%2";

66458

+ else

66459

+ return "vmrghh %0,%2,%1";

66460

+}

66461

+ [(set_attr "type" "vecperm")])

66462

+

66463

+(define_insn "altivec_vmrglh_direct"

66464

+ [(set (match_operand:V8HI 0 "register_operand" "=v")

66465

+ (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "v")

66466

+ (match_operand:V8HI 2 "register_operand" "v")]

66467

+ UNSPEC_VMRGL_DIRECT))]

66468

+ "TARGET_ALTIVEC"

66469

"vmrglh %0,%1,%2"

66470

[(set_attr "type" "vecperm")])

66471

66472

-(define_insn "altivec_vmrglw"

66473

+(define_expand "altivec_vmrglw"

66474

+ [(use (match_operand:V4SI 0 "register_operand" ""))

66475

+ (use (match_operand:V4SI 1 "register_operand" ""))

66476

+ (use (match_operand:V4SI 2 "register_operand" ""))]

66477

+ "VECTOR_MEM_ALTIVEC_P (V4SImode)"

66478

+{

66479

+ rtvec v;

66480

+ rtx x;

66481

+

66482

+ /* Special handling for LE with -maltivec=be. */

66483

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

66484

+ {

66485

+ v = gen_rtvec (4, GEN_INT (0), GEN_INT (4), GEN_INT (1), GEN_INT (5));

66486

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[2], operands[1]);

66487

+ }

66488

+ else

66489

+ {

66490

+ v = gen_rtvec (4, GEN_INT (2), GEN_INT (6), GEN_INT (3), GEN_INT (7));

66491

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[1], operands[2]);

66492

+ }

66493

+

66494

+ x = gen_rtx_VEC_SELECT (V4SImode, x, gen_rtx_PARALLEL (VOIDmode, v));

66495

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

66496

+ DONE;

66497

+})

66498

+

66499

+(define_insn "*altivec_vmrglw_internal"

66500

[(set (match_operand:V4SI 0 "register_operand" "=v")

66501

(vec_select:V4SI

66502

(vec_concat:V8SI

66503

@@ -920,6 +1198,20 @@

66504

(parallel [(const_int 2) (const_int 6)

66505

(const_int 3) (const_int 7)])))]

66506

"VECTOR_MEM_ALTIVEC_P (V4SImode)"

66507

+{

66508

+ if (BYTES_BIG_ENDIAN)

66509

+ return "vmrglw %0,%1,%2";

66510

+ else

66511

+ return "vmrghw %0,%2,%1";

66512

+}

66513

+ [(set_attr "type" "vecperm")])

66514

+

66515

+(define_insn "altivec_vmrglw_direct"

66516

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

66517

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

66518

+ (match_operand:V4SI 2 "register_operand" "v")]

66519

+ UNSPEC_VMRGL_DIRECT))]

66520

+ "TARGET_ALTIVEC"

66521

"vmrglw %0,%1,%2"

66522

[(set_attr "type" "vecperm")])

66523

66524

@@ -932,10 +1224,154 @@

66525

(parallel [(const_int 2) (const_int 6)

66526

(const_int 3) (const_int 7)])))]

66527

"VECTOR_MEM_ALTIVEC_P (V4SFmode)"

66528

- "vmrglw %0,%1,%2"

66529

+{

66530

+ if (BYTES_BIG_ENDIAN)

66531

+ return "vmrglw %0,%1,%2";

66532

+ else

66533

+ return "vmrghw %0,%2,%1";

66534

+}

66535

[(set_attr "type" "vecperm")])

66536

66537

-(define_insn "vec_widen_umult_even_v16qi"

66538

+;; Power8 vector merge even/odd

66539

+(define_insn "p8_vmrgew"

66540

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

66541

+ (vec_select:V4SI

66542

+ (vec_concat:V8SI

66543

+ (match_operand:V4SI 1 "register_operand" "v")

66544

+ (match_operand:V4SI 2 "register_operand" "v"))

66545

+ (parallel [(const_int 0) (const_int 4)

66546

+ (const_int 2) (const_int 6)])))]

66547

+ "TARGET_P8_VECTOR"

66548

+{

66549

+ if (BYTES_BIG_ENDIAN)

66550

+ return "vmrgew %0,%1,%2";

66551

+ else

66552

+ return "vmrgow %0,%2,%1";

66553

+}

66554

+ [(set_attr "type" "vecperm")])

66555

+

66556

+(define_insn "p8_vmrgow"

66557

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

66558

+ (vec_select:V4SI

66559

+ (vec_concat:V8SI

66560

+ (match_operand:V4SI 1 "register_operand" "v")

66561

+ (match_operand:V4SI 2 "register_operand" "v"))

66562

+ (parallel [(const_int 1) (const_int 5)

66563

+ (const_int 3) (const_int 7)])))]

66564

+ "TARGET_P8_VECTOR"

66565

+{

66566

+ if (BYTES_BIG_ENDIAN)

66567

+ return "vmrgow %0,%1,%2";

66568

+ else

66569

+ return "vmrgew %0,%2,%1";

66570

+}

66571

+ [(set_attr "type" "vecperm")])

66572

+

66573

+(define_expand "vec_widen_umult_even_v16qi"

66574

+ [(use (match_operand:V8HI 0 "register_operand" ""))

66575

+ (use (match_operand:V16QI 1 "register_operand" ""))

66576

+ (use (match_operand:V16QI 2 "register_operand" ""))]

66577

+ "TARGET_ALTIVEC"

66578

+{

66579

+ if (VECTOR_ELT_ORDER_BIG)

66580

+ emit_insn (gen_altivec_vmuleub (operands[0], operands[1], operands[2]));

66581

+ else

66582

+ emit_insn (gen_altivec_vmuloub (operands[0], operands[1], operands[2]));

66583

+ DONE;

66584

+})

66585

+

66586

+(define_expand "vec_widen_smult_even_v16qi"

66587

+ [(use (match_operand:V8HI 0 "register_operand" ""))

66588

+ (use (match_operand:V16QI 1 "register_operand" ""))

66589

+ (use (match_operand:V16QI 2 "register_operand" ""))]

66590

+ "TARGET_ALTIVEC"

66591

+{

66592

+ if (VECTOR_ELT_ORDER_BIG)

66593

+ emit_insn (gen_altivec_vmulesb (operands[0], operands[1], operands[2]));

66594

+ else

66595

+ emit_insn (gen_altivec_vmulosb (operands[0], operands[1], operands[2]));

66596

+ DONE;

66597

+})

66598

+

66599

+(define_expand "vec_widen_umult_even_v8hi"

66600

+ [(use (match_operand:V4SI 0 "register_operand" ""))

66601

+ (use (match_operand:V8HI 1 "register_operand" ""))

66602

+ (use (match_operand:V8HI 2 "register_operand" ""))]

66603

+ "TARGET_ALTIVEC"

66604

+{

66605

+ if (VECTOR_ELT_ORDER_BIG)

66606

+ emit_insn (gen_altivec_vmuleuh (operands[0], operands[1], operands[2]));

66607

+ else

66608

+ emit_insn (gen_altivec_vmulouh (operands[0], operands[1], operands[2]));

66609

+ DONE;

66610

+})

66611

+

66612

+(define_expand "vec_widen_smult_even_v8hi"

66613

+ [(use (match_operand:V4SI 0 "register_operand" ""))

66614

+ (use (match_operand:V8HI 1 "register_operand" ""))

66615

+ (use (match_operand:V8HI 2 "register_operand" ""))]

66616

+ "TARGET_ALTIVEC"

66617

+{

66618

+ if (VECTOR_ELT_ORDER_BIG)

66619

+ emit_insn (gen_altivec_vmulesh (operands[0], operands[1], operands[2]));

66620

+ else

66621

+ emit_insn (gen_altivec_vmulosh (operands[0], operands[1], operands[2]));

66622

+ DONE;

66623

+})

66624

+

66625

+(define_expand "vec_widen_umult_odd_v16qi"

66626

+ [(use (match_operand:V8HI 0 "register_operand" ""))

66627

+ (use (match_operand:V16QI 1 "register_operand" ""))

66628

+ (use (match_operand:V16QI 2 "register_operand" ""))]

66629

+ "TARGET_ALTIVEC"

66630

+{

66631

+ if (VECTOR_ELT_ORDER_BIG)

66632

+ emit_insn (gen_altivec_vmuloub (operands[0], operands[1], operands[2]));

66633

+ else

66634

+ emit_insn (gen_altivec_vmuleub (operands[0], operands[1], operands[2]));

66635

+ DONE;

66636

+})

66637

+

66638

+(define_expand "vec_widen_smult_odd_v16qi"

66639

+ [(use (match_operand:V8HI 0 "register_operand" ""))

66640

+ (use (match_operand:V16QI 1 "register_operand" ""))

66641

+ (use (match_operand:V16QI 2 "register_operand" ""))]

66642

+ "TARGET_ALTIVEC"

66643

+{

66644

+ if (VECTOR_ELT_ORDER_BIG)

66645

+ emit_insn (gen_altivec_vmulosb (operands[0], operands[1], operands[2]));

66646

+ else

66647

+ emit_insn (gen_altivec_vmulesb (operands[0], operands[1], operands[2]));

66648

+ DONE;

66649

+})

66650

+

66651

+(define_expand "vec_widen_umult_odd_v8hi"

66652

+ [(use (match_operand:V4SI 0 "register_operand" ""))

66653

+ (use (match_operand:V8HI 1 "register_operand" ""))

66654

+ (use (match_operand:V8HI 2 "register_operand" ""))]

66655

+ "TARGET_ALTIVEC"

66656

+{

66657

+ if (VECTOR_ELT_ORDER_BIG)

66658

+ emit_insn (gen_altivec_vmulouh (operands[0], operands[1], operands[2]));

66659

+ else

66660

+ emit_insn (gen_altivec_vmuleuh (operands[0], operands[1], operands[2]));

66661

+ DONE;

66662

+})

66663

+

66664

+(define_expand "vec_widen_smult_odd_v8hi"

66665

+ [(use (match_operand:V4SI 0 "register_operand" ""))

66666

+ (use (match_operand:V8HI 1 "register_operand" ""))

66667

+ (use (match_operand:V8HI 2 "register_operand" ""))]

66668

+ "TARGET_ALTIVEC"

66669

+{

66670

+ if (VECTOR_ELT_ORDER_BIG)

66671

+ emit_insn (gen_altivec_vmulosh (operands[0], operands[1], operands[2]));

66672

+ else

66673

+ emit_insn (gen_altivec_vmulesh (operands[0], operands[1], operands[2]));

66674

+ DONE;

66675

+})

66676

+

66677

+(define_insn "altivec_vmuleub"

66678

[(set (match_operand:V8HI 0 "register_operand" "=v")

66679

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

66680

(match_operand:V16QI 2 "register_operand" "v")]

66681

@@ -944,43 +1380,25 @@

66682

"vmuleub %0,%1,%2"

66683

[(set_attr "type" "veccomplex")])

66684

66685

-(define_insn "vec_widen_smult_even_v16qi"

66686

+(define_insn "altivec_vmuloub"

66687

[(set (match_operand:V8HI 0 "register_operand" "=v")

66688

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

66689

(match_operand:V16QI 2 "register_operand" "v")]

66690

- UNSPEC_VMULESB))]

66691

+ UNSPEC_VMULOUB))]

66692

"TARGET_ALTIVEC"

66693

- "vmulesb %0,%1,%2"

66694

+ "vmuloub %0,%1,%2"

66695

[(set_attr "type" "veccomplex")])

66696

66697

-(define_insn "vec_widen_umult_even_v8hi"

66698

- [(set (match_operand:V4SI 0 "register_operand" "=v")

66699

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

66700

- (match_operand:V8HI 2 "register_operand" "v")]

66701

- UNSPEC_VMULEUH))]

66702

- "TARGET_ALTIVEC"

66703

- "vmuleuh %0,%1,%2"

66704

- [(set_attr "type" "veccomplex")])

66705

-

66706

-(define_insn "vec_widen_smult_even_v8hi"

66707

- [(set (match_operand:V4SI 0 "register_operand" "=v")

66708

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

66709

- (match_operand:V8HI 2 "register_operand" "v")]

66710

- UNSPEC_VMULESH))]

66711

- "TARGET_ALTIVEC"

66712

- "vmulesh %0,%1,%2"

66713

- [(set_attr "type" "veccomplex")])

66714

-

66715

-(define_insn "vec_widen_umult_odd_v16qi"

66716

+(define_insn "altivec_vmulesb"

66717

[(set (match_operand:V8HI 0 "register_operand" "=v")

66718

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

66719

(match_operand:V16QI 2 "register_operand" "v")]

66720

- UNSPEC_VMULOUB))]

66721

+ UNSPEC_VMULESB))]

66722

"TARGET_ALTIVEC"

66723

- "vmuloub %0,%1,%2"

66724

+ "vmulesb %0,%1,%2"

66725

[(set_attr "type" "veccomplex")])

66726

66727

-(define_insn "vec_widen_smult_odd_v16qi"

66728

+(define_insn "altivec_vmulosb"

66729

[(set (match_operand:V8HI 0 "register_operand" "=v")

66730

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

66731

(match_operand:V16QI 2 "register_operand" "v")]

66732

@@ -989,19 +1407,37 @@

66733

"vmulosb %0,%1,%2"

66734

[(set_attr "type" "veccomplex")])

66735

66736

-(define_insn "vec_widen_umult_odd_v8hi"

66737

+(define_insn "altivec_vmuleuh"

66738

[(set (match_operand:V4SI 0 "register_operand" "=v")

66739

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

66740

(match_operand:V8HI 2 "register_operand" "v")]

66741

+ UNSPEC_VMULEUH))]

66742

+ "TARGET_ALTIVEC"

66743

+ "vmuleuh %0,%1,%2"

66744

+ [(set_attr "type" "veccomplex")])

66745

+

66746

+(define_insn "altivec_vmulouh"

66747

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

66748

+ (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

66749

+ (match_operand:V8HI 2 "register_operand" "v")]

66750

UNSPEC_VMULOUH))]

66751

"TARGET_ALTIVEC"

66752

"vmulouh %0,%1,%2"

66753

[(set_attr "type" "veccomplex")])

66754

66755

-(define_insn "vec_widen_smult_odd_v8hi"

66756

+(define_insn "altivec_vmulesh"

66757

[(set (match_operand:V4SI 0 "register_operand" "=v")

66758

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

66759

(match_operand:V8HI 2 "register_operand" "v")]

66760

+ UNSPEC_VMULESH))]

66761

+ "TARGET_ALTIVEC"

66762

+ "vmulesh %0,%1,%2"

66763

+ [(set_attr "type" "veccomplex")])

66764

+

66765

+(define_insn "altivec_vmulosh"

66766

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

66767

+ (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

66768

+ (match_operand:V8HI 2 "register_operand" "v")]

66769

UNSPEC_VMULOSH))]

66770

"TARGET_ALTIVEC"

66771

"vmulosh %0,%1,%2"

66772

@@ -1008,74 +1444,7 @@

66773

[(set_attr "type" "veccomplex")])

66774

66775

66776

-;; logical ops. Have the logical ops follow the memory ops in

66777

-;; terms of whether to prefer VSX or Altivec

66778

-

66779

-(define_insn "*altivec_and<mode>3"

66780

- [(set (match_operand:VM 0 "register_operand" "=v")

66781

- (and:VM (match_operand:VM 1 "register_operand" "v")

66782

- (match_operand:VM 2 "register_operand" "v")))]

66783

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

66784

- "vand %0,%1,%2"

66785

- [(set_attr "type" "vecsimple")])

66786

-

66787

-(define_insn "*altivec_ior<mode>3"

66788

- [(set (match_operand:VM 0 "register_operand" "=v")

66789

- (ior:VM (match_operand:VM 1 "register_operand" "v")

66790

- (match_operand:VM 2 "register_operand" "v")))]

66791

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

66792

- "vor %0,%1,%2"

66793

- [(set_attr "type" "vecsimple")])

66794

-

66795

-(define_insn "*altivec_xor<mode>3"

66796

- [(set (match_operand:VM 0 "register_operand" "=v")

66797

- (xor:VM (match_operand:VM 1 "register_operand" "v")

66798

- (match_operand:VM 2 "register_operand" "v")))]

66799

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

66800

- "vxor %0,%1,%2"

66801

- [(set_attr "type" "vecsimple")])

66802

-

66803

-(define_insn "*altivec_one_cmpl<mode>2"

66804

- [(set (match_operand:VM 0 "register_operand" "=v")

66805

- (not:VM (match_operand:VM 1 "register_operand" "v")))]

66806

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

66807

- "vnor %0,%1,%1"

66808

- [(set_attr "type" "vecsimple")])

66809

-

66810

-(define_insn "*altivec_nor<mode>3"

66811

- [(set (match_operand:VM 0 "register_operand" "=v")

66812

- (not:VM (ior:VM (match_operand:VM 1 "register_operand" "v")

66813

- (match_operand:VM 2 "register_operand" "v"))))]

66814

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

66815

- "vnor %0,%1,%2"

66816

- [(set_attr "type" "vecsimple")])

66817

-

66818

-(define_insn "*altivec_andc<mode>3"

66819

- [(set (match_operand:VM 0 "register_operand" "=v")

66820

- (and:VM (not:VM (match_operand:VM 2 "register_operand" "v"))

66821

- (match_operand:VM 1 "register_operand" "v")))]

66822

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

66823

- "vandc %0,%1,%2"

66824

- [(set_attr "type" "vecsimple")])

66825

-

66826

-(define_insn "altivec_vpkuhum"

66827

- [(set (match_operand:V16QI 0 "register_operand" "=v")

66828

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

66829

- (match_operand:V8HI 2 "register_operand" "v")]

66830

- UNSPEC_VPKUHUM))]

66831

- "TARGET_ALTIVEC"

66832

- "vpkuhum %0,%1,%2"

66833

- [(set_attr "type" "vecperm")])

66834

-

66835

-(define_insn "altivec_vpkuwum"

66836

- [(set (match_operand:V8HI 0 "register_operand" "=v")

66837

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

66838

- (match_operand:V4SI 2 "register_operand" "v")]

66839

- UNSPEC_VPKUWUM))]

66840

- "TARGET_ALTIVEC"

66841

- "vpkuwum %0,%1,%2"

66842

- [(set_attr "type" "vecperm")])

66843

-

66844

+;; Vector pack/unpack

66845

(define_insn "altivec_vpkpx"

66846

[(set (match_operand:V8HI 0 "register_operand" "=v")

66847

(unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

66848

@@ -1082,74 +1451,95 @@

66849

(match_operand:V4SI 2 "register_operand" "v")]

66850

UNSPEC_VPKPX))]

66851

"TARGET_ALTIVEC"

66852

- "vpkpx %0,%1,%2"

66853

+ "*

66854

+ {

66855

+ if (VECTOR_ELT_ORDER_BIG)

66856

+ return \"vpkpx %0,%1,%2\";

66857

+ else

66858

+ return \"vpkpx %0,%2,%1\";

66859

+ }"

66860

[(set_attr "type" "vecperm")])

66861

66862

-(define_insn "altivec_vpkshss"

66863

- [(set (match_operand:V16QI 0 "register_operand" "=v")

66864

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

66865

- (match_operand:V8HI 2 "register_operand" "v")]

66866

- UNSPEC_VPKSHSS))

66867

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66868

- "TARGET_ALTIVEC"

66869

- "vpkshss %0,%1,%2"

66870

+(define_insn "altivec_vpks<VI_char>ss"

66871

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

66872

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

66873

+ (match_operand:VP 2 "register_operand" "v")]

66874

+ UNSPEC_VPACK_SIGN_SIGN_SAT))]

66875

+ "<VI_unit>"

66876

+ "*

66877

+ {

66878

+ if (VECTOR_ELT_ORDER_BIG)

66879

+ return \"vpks<VI_char>ss %0,%1,%2\";

66880

+ else

66881

+ return \"vpks<VI_char>ss %0,%2,%1\";

66882

+ }"

66883

[(set_attr "type" "vecperm")])

66884

66885

-(define_insn "altivec_vpkswss"

66886

- [(set (match_operand:V8HI 0 "register_operand" "=v")

66887

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

66888

- (match_operand:V4SI 2 "register_operand" "v")]

66889

- UNSPEC_VPKSWSS))

66890

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66891

- "TARGET_ALTIVEC"

66892

- "vpkswss %0,%1,%2"

66893

+(define_insn "altivec_vpks<VI_char>us"

66894

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

66895

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

66896

+ (match_operand:VP 2 "register_operand" "v")]

66897

+ UNSPEC_VPACK_SIGN_UNS_SAT))]

66898

+ "<VI_unit>"

66899

+ "*

66900

+ {

66901

+ if (VECTOR_ELT_ORDER_BIG)

66902

+ return \"vpks<VI_char>us %0,%1,%2\";

66903

+ else

66904

+ return \"vpks<VI_char>us %0,%2,%1\";

66905

+ }"

66906

[(set_attr "type" "vecperm")])

66907

66908

-(define_insn "altivec_vpkuhus"

66909

- [(set (match_operand:V16QI 0 "register_operand" "=v")

66910

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

66911

- (match_operand:V8HI 2 "register_operand" "v")]

66912

- UNSPEC_VPKUHUS))

66913

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66914

- "TARGET_ALTIVEC"

66915

- "vpkuhus %0,%1,%2"

66916

+(define_insn "altivec_vpku<VI_char>us"

66917

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

66918

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

66919

+ (match_operand:VP 2 "register_operand" "v")]

66920

+ UNSPEC_VPACK_UNS_UNS_SAT))]

66921

+ "<VI_unit>"

66922

+ "*

66923

+ {

66924

+ if (VECTOR_ELT_ORDER_BIG)

66925

+ return \"vpku<VI_char>us %0,%1,%2\";

66926

+ else

66927

+ return \"vpku<VI_char>us %0,%2,%1\";

66928

+ }"

66929

[(set_attr "type" "vecperm")])

66930

66931

-(define_insn "altivec_vpkshus"

66932

- [(set (match_operand:V16QI 0 "register_operand" "=v")

66933

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

66934

- (match_operand:V8HI 2 "register_operand" "v")]

66935

- UNSPEC_VPKSHUS))

66936

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66937

- "TARGET_ALTIVEC"

66938

- "vpkshus %0,%1,%2"

66939

+(define_insn "altivec_vpku<VI_char>um"

66940

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

66941

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

66942

+ (match_operand:VP 2 "register_operand" "v")]

66943

+ UNSPEC_VPACK_UNS_UNS_MOD))]

66944

+ "<VI_unit>"

66945

+ "*

66946

+ {

66947

+ if (VECTOR_ELT_ORDER_BIG)

66948

+ return \"vpku<VI_char>um %0,%1,%2\";

66949

+ else

66950

+ return \"vpku<VI_char>um %0,%2,%1\";

66951

+ }"

66952

[(set_attr "type" "vecperm")])

66953

66954

-(define_insn "altivec_vpkuwus"

66955

- [(set (match_operand:V8HI 0 "register_operand" "=v")

66956

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

66957

- (match_operand:V4SI 2 "register_operand" "v")]

66958

- UNSPEC_VPKUWUS))

66959

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66960

- "TARGET_ALTIVEC"

66961

- "vpkuwus %0,%1,%2"

66962

+(define_insn "altivec_vpku<VI_char>um_direct"

66963

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

66964

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

66965

+ (match_operand:VP 2 "register_operand" "v")]

66966

+ UNSPEC_VPACK_UNS_UNS_MOD_DIRECT))]

66967

+ "<VI_unit>"

66968

+ "*

66969

+ {

66970

+ if (BYTES_BIG_ENDIAN)

66971

+ return \"vpku<VI_char>um %0,%1,%2\";

66972

+ else

66973

+ return \"vpku<VI_char>um %0,%2,%1\";

66974

+ }"

66975

[(set_attr "type" "vecperm")])

66976

66977

-(define_insn "altivec_vpkswus"

66978

- [(set (match_operand:V8HI 0 "register_operand" "=v")

66979

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

66980

- (match_operand:V4SI 2 "register_operand" "v")]

66981

- UNSPEC_VPKSWUS))

66982

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

66983

- "TARGET_ALTIVEC"

66984

- "vpkswus %0,%1,%2"

66985

- [(set_attr "type" "vecperm")])

66986

-

66987

(define_insn "*altivec_vrl<VI_char>"

66988

- [(set (match_operand:VI 0 "register_operand" "=v")

66989

- (rotate:VI (match_operand:VI 1 "register_operand" "v")

66990

- (match_operand:VI 2 "register_operand" "v")))]

66991

- "TARGET_ALTIVEC"

66992

+ [(set (match_operand:VI2 0 "register_operand" "=v")

66993

+ (rotate:VI2 (match_operand:VI2 1 "register_operand" "v")

66994

+ (match_operand:VI2 2 "register_operand" "v")))]

66995

+ "<VI_unit>"

66996

"vrl<VI_char> %0,%1,%2"

66997

[(set_attr "type" "vecsimple")])

66998

66999

@@ -1172,26 +1562,26 @@

67000

[(set_attr "type" "vecperm")])

67001

67002

(define_insn "*altivec_vsl<VI_char>"

67003

- [(set (match_operand:VI 0 "register_operand" "=v")

67004

- (ashift:VI (match_operand:VI 1 "register_operand" "v")

67005

- (match_operand:VI 2 "register_operand" "v")))]

67006

- "TARGET_ALTIVEC"

67007

+ [(set (match_operand:VI2 0 "register_operand" "=v")

67008

+ (ashift:VI2 (match_operand:VI2 1 "register_operand" "v")

67009

+ (match_operand:VI2 2 "register_operand" "v")))]

67010

+ "<VI_unit>"

67011

"vsl<VI_char> %0,%1,%2"

67012

[(set_attr "type" "vecsimple")])

67013

67014

(define_insn "*altivec_vsr<VI_char>"

67015

- [(set (match_operand:VI 0 "register_operand" "=v")

67016

- (lshiftrt:VI (match_operand:VI 1 "register_operand" "v")

67017

- (match_operand:VI 2 "register_operand" "v")))]

67018

- "TARGET_ALTIVEC"

67019

+ [(set (match_operand:VI2 0 "register_operand" "=v")

67020

+ (lshiftrt:VI2 (match_operand:VI2 1 "register_operand" "v")

67021

+ (match_operand:VI2 2 "register_operand" "v")))]

67022

+ "<VI_unit>"

67023

"vsr<VI_char> %0,%1,%2"

67024

[(set_attr "type" "vecsimple")])

67025

67026

(define_insn "*altivec_vsra<VI_char>"

67027

- [(set (match_operand:VI 0 "register_operand" "=v")

67028

- (ashiftrt:VI (match_operand:VI 1 "register_operand" "v")

67029

- (match_operand:VI 2 "register_operand" "v")))]

67030

- "TARGET_ALTIVEC"

67031

+ [(set (match_operand:VI2 0 "register_operand" "=v")

67032

+ (ashiftrt:VI2 (match_operand:VI2 1 "register_operand" "v")

67033

+ (match_operand:VI2 2 "register_operand" "v")))]

67034

+ "<VI_unit>"

67035

"vsra<VI_char> %0,%1,%2"

67036

[(set_attr "type" "vecsimple")])

67037

67038

@@ -1233,15 +1623,29 @@

67039

"vsum4s<VI_char>s %0,%1,%2"

67040

[(set_attr "type" "veccomplex")])

67041

67042

+;; FIXME: For the following two patterns, the scratch should only be

67043

+;; allocated for !VECTOR_ELT_ORDER_BIG, and the instructions should

67044

+;; be emitted separately.

67045

(define_insn "altivec_vsum2sws"

67046

[(set (match_operand:V4SI 0 "register_operand" "=v")

67047

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

67048

(match_operand:V4SI 2 "register_operand" "v")]

67049

UNSPEC_VSUM2SWS))

67050

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

67051

+ (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))

67052

+ (clobber (match_scratch:V4SI 3 "=v"))]

67053

"TARGET_ALTIVEC"

67054

- "vsum2sws %0,%1,%2"

67055

- [(set_attr "type" "veccomplex")])

67056

+{

67057

+ if (VECTOR_ELT_ORDER_BIG)

67058

+ return "vsum2sws %0,%1,%2";

67059

+ else

67060

+ return "vsldoi %3,%2,%2,12\n\tvsum2sws %3,%1,%3\n\tvsldoi %0,%3,%3,4";

67061

+}

67062

+ [(set_attr "type" "veccomplex")

67063

+ (set (attr "length")

67064

+ (if_then_else

67065

+ (match_test "VECTOR_ELT_ORDER_BIG")

67066

+ (const_string "4")

67067

+ (const_string "12")))])

67068

67069

(define_insn "altivec_vsumsws"

67070

[(set (match_operand:V4SI 0 "register_operand" "=v")

67071

@@ -1248,12 +1652,54 @@

67072

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

67073

(match_operand:V4SI 2 "register_operand" "v")]

67074

UNSPEC_VSUMSWS))

67075

+ (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))

67076

+ (clobber (match_scratch:V4SI 3 "=v"))]

67077

+ "TARGET_ALTIVEC"

67078

+{

67079

+ if (VECTOR_ELT_ORDER_BIG)

67080

+ return "vsumsws %0,%1,%2";

67081

+ else

67082

+ return "vspltw %3,%2,0\n\tvsumsws %3,%1,%3\n\tvsldoi %0,%3,%3,12";

67083

+}

67084

+ [(set_attr "type" "veccomplex")

67085

+ (set (attr "length")

67086

+ (if_then_else

67087

+ (match_test "(VECTOR_ELT_ORDER_BIG)")

67088

+ (const_string "4")

67089

+ (const_string "12")))])

67090

+

67091

+(define_insn "altivec_vsumsws_direct"

67092

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

67093

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

67094

+ (match_operand:V4SI 2 "register_operand" "v")]

67095

+ UNSPEC_VSUMSWS_DIRECT))

67096

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

67097

"TARGET_ALTIVEC"

67098

"vsumsws %0,%1,%2"

67099

[(set_attr "type" "veccomplex")])

67100

67101

-(define_insn "altivec_vspltb"

67102

+(define_expand "altivec_vspltb"

67103

+ [(use (match_operand:V16QI 0 "register_operand" ""))

67104

+ (use (match_operand:V16QI 1 "register_operand" ""))

67105

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

67106

+ "TARGET_ALTIVEC"

67107

+{

67108

+ rtvec v;

67109

+ rtx x;

67110

+

67111

+ /* Special handling for LE with -maltivec=be. We have to reflect

67112

+ the actual selected index for the splat in the RTL. */

67113

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67114

+ operands[2] = GEN_INT (15 - INTVAL (operands[2]));

67115

+

67116

+ v = gen_rtvec (1, operands[2]);

67117

+ x = gen_rtx_VEC_SELECT (QImode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

67118

+ x = gen_rtx_VEC_DUPLICATE (V16QImode, x);

67119

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

67120

+ DONE;

67121

+})

67122

+

67123

+(define_insn "*altivec_vspltb_internal"

67124

[(set (match_operand:V16QI 0 "register_operand" "=v")

67125

(vec_duplicate:V16QI

67126

(vec_select:QI (match_operand:V16QI 1 "register_operand" "v")

67127

@@ -1260,10 +1706,48 @@

67128

(parallel

67129

[(match_operand:QI 2 "u5bit_cint_operand" "")]))))]

67130

"TARGET_ALTIVEC"

67131

+{

67132

+ /* For true LE, this adjusts the selected index. For LE with

67133

+ -maltivec=be, this reverses what was done in the define_expand

67134

+ because the instruction already has big-endian bias. */

67135

+ if (!BYTES_BIG_ENDIAN)

67136

+ operands[2] = GEN_INT (15 - INTVAL (operands[2]));

67137

+

67138

+ return "vspltb %0,%1,%2";

67139

+}

67140

+ [(set_attr "type" "vecperm")])

67141

+

67142

+(define_insn "altivec_vspltb_direct"

67143

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

67144

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")

67145

+ (match_operand:QI 2 "u5bit_cint_operand" "i")]

67146

+ UNSPEC_VSPLT_DIRECT))]

67147

+ "TARGET_ALTIVEC"

67148

"vspltb %0,%1,%2"

67149

[(set_attr "type" "vecperm")])

67150

67151

-(define_insn "altivec_vsplth"

67152

+(define_expand "altivec_vsplth"

67153

+ [(use (match_operand:V8HI 0 "register_operand" ""))

67154

+ (use (match_operand:V8HI 1 "register_operand" ""))

67155

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

67156

+ "TARGET_ALTIVEC"

67157

+{

67158

+ rtvec v;

67159

+ rtx x;

67160

+

67161

+ /* Special handling for LE with -maltivec=be. We have to reflect

67162

+ the actual selected index for the splat in the RTL. */

67163

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67164

+ operands[2] = GEN_INT (7 - INTVAL (operands[2]));

67165

+

67166

+ v = gen_rtvec (1, operands[2]);

67167

+ x = gen_rtx_VEC_SELECT (HImode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

67168

+ x = gen_rtx_VEC_DUPLICATE (V8HImode, x);

67169

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

67170

+ DONE;

67171

+})

67172

+

67173

+(define_insn "*altivec_vsplth_internal"

67174

[(set (match_operand:V8HI 0 "register_operand" "=v")

67175

(vec_duplicate:V8HI

67176

(vec_select:HI (match_operand:V8HI 1 "register_operand" "v")

67177

@@ -1270,10 +1754,48 @@

67178

(parallel

67179

[(match_operand:QI 2 "u5bit_cint_operand" "")]))))]

67180

"TARGET_ALTIVEC"

67181

+{

67182

+ /* For true LE, this adjusts the selected index. For LE with

67183

+ -maltivec=be, this reverses what was done in the define_expand

67184

+ because the instruction already has big-endian bias. */

67185

+ if (!BYTES_BIG_ENDIAN)

67186

+ operands[2] = GEN_INT (7 - INTVAL (operands[2]));

67187

+

67188

+ return "vsplth %0,%1,%2";

67189

+}

67190

+ [(set_attr "type" "vecperm")])

67191

+

67192

+(define_insn "altivec_vsplth_direct"

67193

+ [(set (match_operand:V8HI 0 "register_operand" "=v")

67194

+ (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "v")

67195

+ (match_operand:QI 2 "u5bit_cint_operand" "i")]

67196

+ UNSPEC_VSPLT_DIRECT))]

67197

+ "TARGET_ALTIVEC"

67198

"vsplth %0,%1,%2"

67199

[(set_attr "type" "vecperm")])

67200

67201

-(define_insn "altivec_vspltw"

67202

+(define_expand "altivec_vspltw"

67203

+ [(use (match_operand:V4SI 0 "register_operand" ""))

67204

+ (use (match_operand:V4SI 1 "register_operand" ""))

67205

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

67206

+ "TARGET_ALTIVEC"

67207

+{

67208

+ rtvec v;

67209

+ rtx x;

67210

+

67211

+ /* Special handling for LE with -maltivec=be. We have to reflect

67212

+ the actual selected index for the splat in the RTL. */

67213

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67214

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

67215

+

67216

+ v = gen_rtvec (1, operands[2]);

67217

+ x = gen_rtx_VEC_SELECT (SImode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

67218

+ x = gen_rtx_VEC_DUPLICATE (V4SImode, x);

67219

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

67220

+ DONE;

67221

+})

67222

+

67223

+(define_insn "*altivec_vspltw_internal"

67224

[(set (match_operand:V4SI 0 "register_operand" "=v")

67225

(vec_duplicate:V4SI

67226

(vec_select:SI (match_operand:V4SI 1 "register_operand" "v")

67227

@@ -1280,10 +1802,48 @@

67228

(parallel

67229

[(match_operand:QI 2 "u5bit_cint_operand" "i")]))))]

67230

"TARGET_ALTIVEC"

67231

+{

67232

+ /* For true LE, this adjusts the selected index. For LE with

67233

+ -maltivec=be, this reverses what was done in the define_expand

67234

+ because the instruction already has big-endian bias. */

67235

+ if (!BYTES_BIG_ENDIAN)

67236

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

67237

+

67238

+ return "vspltw %0,%1,%2";

67239

+}

67240

+ [(set_attr "type" "vecperm")])

67241

+

67242

+(define_insn "altivec_vspltw_direct"

67243

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

67244

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

67245

+ (match_operand:QI 2 "u5bit_cint_operand" "i")]

67246

+ UNSPEC_VSPLT_DIRECT))]

67247

+ "TARGET_ALTIVEC"

67248

"vspltw %0,%1,%2"

67249

[(set_attr "type" "vecperm")])

67250

67251

-(define_insn "altivec_vspltsf"

67252

+(define_expand "altivec_vspltsf"

67253

+ [(use (match_operand:V4SF 0 "register_operand" ""))

67254

+ (use (match_operand:V4SF 1 "register_operand" ""))

67255

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

67256

+ "TARGET_ALTIVEC"

67257

+{

67258

+ rtvec v;

67259

+ rtx x;

67260

+

67261

+ /* Special handling for LE with -maltivec=be. We have to reflect

67262

+ the actual selected index for the splat in the RTL. */

67263

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67264

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

67265

+

67266

+ v = gen_rtvec (1, operands[2]);

67267

+ x = gen_rtx_VEC_SELECT (SFmode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

67268

+ x = gen_rtx_VEC_DUPLICATE (V4SFmode, x);

67269

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

67270

+ DONE;

67271

+})

67272

+

67273

+(define_insn "*altivec_vspltsf_internal"

67274

[(set (match_operand:V4SF 0 "register_operand" "=v")

67275

(vec_duplicate:V4SF

67276

(vec_select:SF (match_operand:V4SF 1 "register_operand" "v")

67277

@@ -1290,7 +1850,15 @@

67278

(parallel

67279

[(match_operand:QI 2 "u5bit_cint_operand" "i")]))))]

67280

"VECTOR_UNIT_ALTIVEC_P (V4SFmode)"

67281

- "vspltw %0,%1,%2"

67282

+{

67283

+ /* For true LE, this adjusts the selected index. For LE with

67284

+ -maltivec=be, this reverses what was done in the define_expand

67285

+ because the instruction already has big-endian bias. */

67286

+ if (!BYTES_BIG_ENDIAN)

67287

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

67288

+

67289

+ return "vspltw %0,%1,%2";

67290

+}

67291

[(set_attr "type" "vecperm")])

67292

67293

(define_insn "altivec_vspltis<VI_char>"

67294

@@ -1308,7 +1876,7 @@

67295

"vrfiz %0,%1"

67296

[(set_attr "type" "vecfloat")])

67297

67298

-(define_insn "altivec_vperm_<mode>"

67299

+(define_expand "altivec_vperm_<mode>"

67300

[(set (match_operand:VM 0 "register_operand" "=v")

67301

(unspec:VM [(match_operand:VM 1 "register_operand" "v")

67302

(match_operand:VM 2 "register_operand" "v")

67303

@@ -1315,10 +1883,25 @@

67304

(match_operand:V16QI 3 "register_operand" "v")]

67305

UNSPEC_VPERM))]

67306

"TARGET_ALTIVEC"

67307

+{

67308

+ if (!VECTOR_ELT_ORDER_BIG)

67309

+ {

67310

+ altivec_expand_vec_perm_le (operands);

67311

+ DONE;

67312

+ }

67313

+})

67314

+

67315

+(define_insn "*altivec_vperm_<mode>_internal"

67316

+ [(set (match_operand:VM 0 "register_operand" "=v")

67317

+ (unspec:VM [(match_operand:VM 1 "register_operand" "v")

67318

+ (match_operand:VM 2 "register_operand" "v")

67319

+ (match_operand:V16QI 3 "register_operand" "v")]

67320

+ UNSPEC_VPERM))]

67321

+ "TARGET_ALTIVEC"

67322

"vperm %0,%1,%2,%3"

67323

[(set_attr "type" "vecperm")])

67324

67325

-(define_insn "altivec_vperm_<mode>_uns"

67326

+(define_expand "altivec_vperm_<mode>_uns"

67327

[(set (match_operand:VM 0 "register_operand" "=v")

67328

(unspec:VM [(match_operand:VM 1 "register_operand" "v")

67329

(match_operand:VM 2 "register_operand" "v")

67330

@@ -1325,6 +1908,21 @@

67331

(match_operand:V16QI 3 "register_operand" "v")]

67332

UNSPEC_VPERM_UNS))]

67333

"TARGET_ALTIVEC"

67334

+{

67335

+ if (!VECTOR_ELT_ORDER_BIG)

67336

+ {

67337

+ altivec_expand_vec_perm_le (operands);

67338

+ DONE;

67339

+ }

67340

+})

67341

+

67342

+(define_insn "*altivec_vperm_<mode>_uns_internal"

67343

+ [(set (match_operand:VM 0 "register_operand" "=v")

67344

+ (unspec:VM [(match_operand:VM 1 "register_operand" "v")

67345

+ (match_operand:VM 2 "register_operand" "v")

67346

+ (match_operand:V16QI 3 "register_operand" "v")]

67347

+ UNSPEC_VPERM_UNS))]

67348

+ "TARGET_ALTIVEC"

67349

"vperm %0,%1,%2,%3"

67350

[(set_attr "type" "vecperm")])

67351

67352

@@ -1335,7 +1933,12 @@

67353

(match_operand:V16QI 3 "register_operand" "")]

67354

UNSPEC_VPERM))]

67355

"TARGET_ALTIVEC"

67356

- "")

67357

+{

67358

+ if (!BYTES_BIG_ENDIAN) {

67359

+ altivec_expand_vec_perm_le (operands);

67360

+ DONE;

67361

+ }

67362

+})

67363

67364

(define_expand "vec_perm_constv16qi"

67365

[(match_operand:V16QI 0 "register_operand" "")

67366

@@ -1476,52 +2079,72 @@

67367

"vsldoi %0,%1,%2,%3"

67368

[(set_attr "type" "vecperm")])

67369

67370

-(define_insn "altivec_vupkhsb"

67371

- [(set (match_operand:V8HI 0 "register_operand" "=v")

67372

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

67373

- UNSPEC_VUPKHSB))]

67374

- "TARGET_ALTIVEC"

67375

- "vupkhsb %0,%1"

67376

+(define_insn "altivec_vupkhs<VU_char>"

67377

+ [(set (match_operand:VP 0 "register_operand" "=v")

67378

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

67379

+ UNSPEC_VUNPACK_HI_SIGN))]

67380

+ "<VI_unit>"

67381

+{

67382

+ if (VECTOR_ELT_ORDER_BIG)

67383

+ return "vupkhs<VU_char> %0,%1";

67384

+ else

67385

+ return "vupkls<VU_char> %0,%1";

67386

+}

67387

[(set_attr "type" "vecperm")])

67388

67389

-(define_insn "altivec_vupkhpx"

67390

- [(set (match_operand:V4SI 0 "register_operand" "=v")

67391

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

67392

- UNSPEC_VUPKHPX))]

67393

- "TARGET_ALTIVEC"

67394

- "vupkhpx %0,%1"

67395

+(define_insn "*altivec_vupkhs<VU_char>_direct"

67396

+ [(set (match_operand:VP 0 "register_operand" "=v")

67397

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

67398

+ UNSPEC_VUNPACK_HI_SIGN_DIRECT))]

67399

+ "<VI_unit>"

67400

+ "vupkhs<VU_char> %0,%1"

67401

[(set_attr "type" "vecperm")])

67402

67403

-(define_insn "altivec_vupkhsh"

67404

- [(set (match_operand:V4SI 0 "register_operand" "=v")

67405

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

67406

- UNSPEC_VUPKHSH))]

67407

- "TARGET_ALTIVEC"

67408

- "vupkhsh %0,%1"

67409

+(define_insn "altivec_vupkls<VU_char>"

67410

+ [(set (match_operand:VP 0 "register_operand" "=v")

67411

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

67412

+ UNSPEC_VUNPACK_LO_SIGN))]

67413

+ "<VI_unit>"

67414

+{

67415

+ if (VECTOR_ELT_ORDER_BIG)

67416

+ return "vupkls<VU_char> %0,%1";

67417

+ else

67418

+ return "vupkhs<VU_char> %0,%1";

67419

+}

67420

[(set_attr "type" "vecperm")])

67421

67422

-(define_insn "altivec_vupklsb"

67423

- [(set (match_operand:V8HI 0 "register_operand" "=v")

67424

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

67425

- UNSPEC_VUPKLSB))]

67426

- "TARGET_ALTIVEC"

67427

- "vupklsb %0,%1"

67428

+(define_insn "*altivec_vupkls<VU_char>_direct"

67429

+ [(set (match_operand:VP 0 "register_operand" "=v")

67430

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

67431

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT))]

67432

+ "<VI_unit>"

67433

+ "vupkls<VU_char> %0,%1"

67434

[(set_attr "type" "vecperm")])

67435

67436

-(define_insn "altivec_vupklpx"

67437

+(define_insn "altivec_vupkhpx"

67438

[(set (match_operand:V4SI 0 "register_operand" "=v")

67439

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

67440

- UNSPEC_VUPKLPX))]

67441

+ UNSPEC_VUPKHPX))]

67442

"TARGET_ALTIVEC"

67443

- "vupklpx %0,%1"

67444

+{

67445

+ if (VECTOR_ELT_ORDER_BIG)

67446

+ return "vupkhpx %0,%1";

67447

+ else

67448

+ return "vupklpx %0,%1";

67449

+}

67450

[(set_attr "type" "vecperm")])

67451

67452

-(define_insn "altivec_vupklsh"

67453

+(define_insn "altivec_vupklpx"

67454

[(set (match_operand:V4SI 0 "register_operand" "=v")

67455

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

67456

- UNSPEC_VUPKLSH))]

67457

+ UNSPEC_VUPKLPX))]

67458

"TARGET_ALTIVEC"

67459

- "vupklsh %0,%1"

67460

+{

67461

+ if (VECTOR_ELT_ORDER_BIG)

67462

+ return "vupklpx %0,%1";

67463

+ else

67464

+ return "vupkhpx %0,%1";

67465

+}

67466

[(set_attr "type" "vecperm")])

67467

67468

;; Compare vectors producing a vector result and a predicate, setting CR6 to

67469

@@ -1528,37 +2151,37 @@

67470

;; indicate a combined status

67471

(define_insn "*altivec_vcmpequ<VI_char>_p"

67472

[(set (reg:CC 74)

67473

- (unspec:CC [(eq:CC (match_operand:VI 1 "register_operand" "v")

67474

- (match_operand:VI 2 "register_operand" "v"))]

67475

+ (unspec:CC [(eq:CC (match_operand:VI2 1 "register_operand" "v")

67476

+ (match_operand:VI2 2 "register_operand" "v"))]

67477

UNSPEC_PREDICATE))

67478

- (set (match_operand:VI 0 "register_operand" "=v")

67479

- (eq:VI (match_dup 1)

67480

- (match_dup 2)))]

67481

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

67482

+ (set (match_operand:VI2 0 "register_operand" "=v")

67483

+ (eq:VI2 (match_dup 1)

67484

+ (match_dup 2)))]

67485

+ "<VI_unit>"

67486

"vcmpequ<VI_char>. %0,%1,%2"

67487

[(set_attr "type" "veccmp")])

67488

67489

(define_insn "*altivec_vcmpgts<VI_char>_p"

67490

[(set (reg:CC 74)

67491

- (unspec:CC [(gt:CC (match_operand:VI 1 "register_operand" "v")

67492

- (match_operand:VI 2 "register_operand" "v"))]

67493

+ (unspec:CC [(gt:CC (match_operand:VI2 1 "register_operand" "v")

67494

+ (match_operand:VI2 2 "register_operand" "v"))]

67495

UNSPEC_PREDICATE))

67496

- (set (match_operand:VI 0 "register_operand" "=v")

67497

- (gt:VI (match_dup 1)

67498

- (match_dup 2)))]

67499

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

67500

+ (set (match_operand:VI2 0 "register_operand" "=v")

67501

+ (gt:VI2 (match_dup 1)

67502

+ (match_dup 2)))]

67503

+ "<VI_unit>"

67504

"vcmpgts<VI_char>. %0,%1,%2"

67505

[(set_attr "type" "veccmp")])

67506

67507

(define_insn "*altivec_vcmpgtu<VI_char>_p"

67508

[(set (reg:CC 74)

67509

- (unspec:CC [(gtu:CC (match_operand:VI 1 "register_operand" "v")

67510

- (match_operand:VI 2 "register_operand" "v"))]

67511

+ (unspec:CC [(gtu:CC (match_operand:VI2 1 "register_operand" "v")

67512

+ (match_operand:VI2 2 "register_operand" "v"))]

67513

UNSPEC_PREDICATE))

67514

- (set (match_operand:VI 0 "register_operand" "=v")

67515

- (gtu:VI (match_dup 1)

67516

- (match_dup 2)))]

67517

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

67518

+ (set (match_operand:VI2 0 "register_operand" "=v")

67519

+ (gtu:VI2 (match_dup 1)

67520

+ (match_dup 2)))]

67521

+ "<VI_unit>"

67522

"vcmpgtu<VI_char>. %0,%1,%2"

67523

[(set_attr "type" "veccmp")])

67524

67525

@@ -1710,12 +2333,26 @@

67526

;; Parallel some of the LVE* and STV*'s with unspecs because some have

67527

;; identical rtl but different instructions-- and gcc gets confused.

67528

67529

-(define_insn "altivec_lve<VI_char>x"

67530

+(define_expand "altivec_lve<VI_char>x"

67531

[(parallel

67532

[(set (match_operand:VI 0 "register_operand" "=v")

67533

(match_operand:VI 1 "memory_operand" "Z"))

67534

(unspec [(const_int 0)] UNSPEC_LVE)])]

67535

"TARGET_ALTIVEC"

67536

+{

67537

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67538

+ {

67539

+ altivec_expand_lvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_LVE);

67540

+ DONE;

67541

+ }

67542

+})

67543

+

67544

+(define_insn "*altivec_lve<VI_char>x_internal"

67545

+ [(parallel

67546

+ [(set (match_operand:VI 0 "register_operand" "=v")

67547

+ (match_operand:VI 1 "memory_operand" "Z"))

67548

+ (unspec [(const_int 0)] UNSPEC_LVE)])]

67549

+ "TARGET_ALTIVEC"

67550

"lve<VI_char>x %0,%y1"

67551

[(set_attr "type" "vecload")])

67552

67553

@@ -1728,46 +2365,114 @@

67554

"lvewx %0,%y1"

67555

[(set_attr "type" "vecload")])

67556

67557

-(define_insn "altivec_lvxl"

67558

+(define_expand "altivec_lvxl_<mode>"

67559

[(parallel

67560

- [(set (match_operand:V4SI 0 "register_operand" "=v")

67561

- (match_operand:V4SI 1 "memory_operand" "Z"))

67562

+ [(set (match_operand:VM2 0 "register_operand" "=v")

67563

+ (match_operand:VM2 1 "memory_operand" "Z"))

67564

(unspec [(const_int 0)] UNSPEC_SET_VSCR)])]

67565

"TARGET_ALTIVEC"

67566

- "lvxl %0,%y1"

67567

+{

67568

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67569

+ {

67570

+ altivec_expand_lvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_SET_VSCR);

67571

+ DONE;

67572

+ }

67573

+})

67574

+

67575

+(define_insn "*altivec_lvxl_<mode>_internal"

67576

+ [(parallel

67577

+ [(set (match_operand:VM2 0 "register_operand" "=v")

67578

+ (match_operand:VM2 1 "memory_operand" "Z"))

67579

+ (unspec [(const_int 0)] UNSPEC_SET_VSCR)])]

67580

+ "TARGET_ALTIVEC"

67581

+ "lvx %0,%y1"

67582

[(set_attr "type" "vecload")])

67583

67584

-(define_insn "altivec_lvx_<mode>"

67585

+(define_expand "altivec_lvx_<mode>"

67586

[(parallel

67587

[(set (match_operand:VM2 0 "register_operand" "=v")

67588

(match_operand:VM2 1 "memory_operand" "Z"))

67589

(unspec [(const_int 0)] UNSPEC_LVX)])]

67590

"TARGET_ALTIVEC"

67591

+{

67592

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67593

+ {

67594

+ altivec_expand_lvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_LVX);

67595

+ DONE;

67596

+ }

67597

+})

67598

+

67599

+(define_insn "*altivec_lvx_<mode>_internal"

67600

+ [(parallel

67601

+ [(set (match_operand:VM2 0 "register_operand" "=v")

67602

+ (match_operand:VM2 1 "memory_operand" "Z"))

67603

+ (unspec [(const_int 0)] UNSPEC_LVX)])]

67604

+ "TARGET_ALTIVEC"

67605

"lvx %0,%y1"

67606

[(set_attr "type" "vecload")])

67607

67608

-(define_insn "altivec_stvx_<mode>"

67609

+(define_expand "altivec_stvx_<mode>"

67610

[(parallel

67611

[(set (match_operand:VM2 0 "memory_operand" "=Z")

67612

(match_operand:VM2 1 "register_operand" "v"))

67613

(unspec [(const_int 0)] UNSPEC_STVX)])]

67614

"TARGET_ALTIVEC"

67615

+{

67616

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67617

+ {

67618

+ altivec_expand_stvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_STVX);

67619

+ DONE;

67620

+ }

67621

+})

67622

+

67623

+(define_insn "*altivec_stvx_<mode>_internal"

67624

+ [(parallel

67625

+ [(set (match_operand:VM2 0 "memory_operand" "=Z")

67626

+ (match_operand:VM2 1 "register_operand" "v"))

67627

+ (unspec [(const_int 0)] UNSPEC_STVX)])]

67628

+ "TARGET_ALTIVEC"

67629

"stvx %1,%y0"

67630

[(set_attr "type" "vecstore")])

67631

67632

-(define_insn "altivec_stvxl"

67633

+(define_expand "altivec_stvxl_<mode>"

67634

[(parallel

67635

- [(set (match_operand:V4SI 0 "memory_operand" "=Z")

67636

- (match_operand:V4SI 1 "register_operand" "v"))

67637

+ [(set (match_operand:VM2 0 "memory_operand" "=Z")

67638

+ (match_operand:VM2 1 "register_operand" "v"))

67639

(unspec [(const_int 0)] UNSPEC_STVXL)])]

67640

"TARGET_ALTIVEC"

67641

+{

67642

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67643

+ {

67644

+ altivec_expand_stvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_STVXL);

67645

+ DONE;

67646

+ }

67647

+})

67648

+

67649

+(define_insn "*altivec_stvxl_<mode>_internal"

67650

+ [(parallel

67651

+ [(set (match_operand:VM2 0 "memory_operand" "=Z")

67652

+ (match_operand:VM2 1 "register_operand" "v"))

67653

+ (unspec [(const_int 0)] UNSPEC_STVXL)])]

67654

+ "TARGET_ALTIVEC"

67655

"stvxl %1,%y0"

67656

[(set_attr "type" "vecstore")])

67657

67658

-(define_insn "altivec_stve<VI_char>x"

67659

+(define_expand "altivec_stve<VI_char>x"

67660

[(set (match_operand:<VI_scalar> 0 "memory_operand" "=Z")

67661

(unspec:<VI_scalar> [(match_operand:VI 1 "register_operand" "v")] UNSPEC_STVE))]

67662

"TARGET_ALTIVEC"

67663

+{

67664

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

67665

+ {

67666

+ altivec_expand_stvex_be (operands[0], operands[1], <MODE>mode, UNSPEC_STVE);

67667

+ DONE;

67668

+ }

67669

+})

67670

+

67671

+(define_insn "*altivec_stve<VI_char>x_internal"

67672

+ [(set (match_operand:<VI_scalar> 0 "memory_operand" "=Z")

67673

+ (unspec:<VI_scalar> [(match_operand:VI 1 "register_operand" "v")] UNSPEC_STVE))]

67674

+ "TARGET_ALTIVEC"

67675

"stve<VI_char>x %1,%y0"

67676

[(set_attr "type" "vecstore")])

67677

67678

@@ -1779,20 +2484,28 @@

67679

[(set_attr "type" "vecstore")])

67680

67681

;; Generate

67682

-;; vspltis? SCRATCH0,0

67683

+;; xxlxor/vxor SCRATCH0,SCRATCH0,SCRATCH0

67684

;; vsubu?m SCRATCH2,SCRATCH1,%1

67685

;; vmaxs? %0,%1,SCRATCH2"

67686

(define_expand "abs<mode>2"

67687

- [(set (match_dup 2) (vec_duplicate:VI (const_int 0)))

67688

- (set (match_dup 3)

67689

- (minus:VI (match_dup 2)

67690

- (match_operand:VI 1 "register_operand" "v")))

67691

- (set (match_operand:VI 0 "register_operand" "=v")

67692

- (smax:VI (match_dup 1) (match_dup 3)))]

67693

- "TARGET_ALTIVEC"

67694

+ [(set (match_dup 2) (match_dup 3))

67695

+ (set (match_dup 4)

67696

+ (minus:VI2 (match_dup 2)

67697

+ (match_operand:VI2 1 "register_operand" "v")))

67698

+ (set (match_operand:VI2 0 "register_operand" "=v")

67699

+ (smax:VI2 (match_dup 1) (match_dup 4)))]

67700

+ "<VI_unit>"

67701

{

67702

- operands[2] = gen_reg_rtx (GET_MODE (operands[0]));

67703

- operands[3] = gen_reg_rtx (GET_MODE (operands[0]));

67704

+ int i, n_elt = GET_MODE_NUNITS (<MODE>mode);

67705

+ rtvec v = rtvec_alloc (n_elt);

67706

+

67707

+ /* Create an all 0 constant. */

67708

+ for (i = 0; i < n_elt; ++i)

67709

+ RTVEC_ELT (v, i) = const0_rtx;

67710

+

67711

+ operands[2] = gen_reg_rtx (<MODE>mode);

67712

+ operands[3] = gen_rtx_CONST_VECTOR (<MODE>mode, v);

67713

+ operands[4] = gen_reg_rtx (<MODE>mode);

67714

})

67715

67716

;; Generate

67717

@@ -1844,7 +2557,7 @@

67718

67719

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

67720

emit_insn (gen_altivec_vsum4s<VI_char>s (vtmp1, operands[1], vzero));

67721

- emit_insn (gen_altivec_vsumsws (dest, vtmp1, vzero));

67722

+ emit_insn (gen_altivec_vsumsws_direct (dest, vtmp1, vzero));

67723

DONE;

67724

})

67725

67726

@@ -1860,7 +2573,7 @@

67727

67728

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

67729

emit_insn (gen_altivec_vsum4ubs (vtmp1, operands[1], vzero));

67730

- emit_insn (gen_altivec_vsumsws (dest, vtmp1, vzero));

67731

+ emit_insn (gen_altivec_vsumsws_direct (dest, vtmp1, vzero));

67732

DONE;

67733

})

67734

67735

@@ -1950,50 +2663,20 @@

67736

DONE;

67737

}")

67738

67739

-(define_expand "vec_unpacks_hi_v16qi"

67740

- [(set (match_operand:V8HI 0 "register_operand" "=v")

67741

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

67742

- UNSPEC_VUPKHSB))]

67743

- "TARGET_ALTIVEC"

67744

- "

67745

-{

67746

- emit_insn (gen_altivec_vupkhsb (operands[0], operands[1]));

67747

- DONE;

67748

-}")

67749

+(define_expand "vec_unpacks_hi_<VP_small_lc>"

67750

+ [(set (match_operand:VP 0 "register_operand" "=v")

67751

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

67752

+ UNSPEC_VUNPACK_HI_SIGN_DIRECT))]

67753

+ "<VI_unit>"

67754

+ "")

67755

67756

-(define_expand "vec_unpacks_hi_v8hi"

67757

- [(set (match_operand:V4SI 0 "register_operand" "=v")

67758

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

67759

- UNSPEC_VUPKHSH))]

67760

- "TARGET_ALTIVEC"

67761

- "

67762

-{

67763

- emit_insn (gen_altivec_vupkhsh (operands[0], operands[1]));

67764

- DONE;

67765

-}")

67766

+(define_expand "vec_unpacks_lo_<VP_small_lc>"

67767

+ [(set (match_operand:VP 0 "register_operand" "=v")

67768

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

67769

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT))]

67770

+ "<VI_unit>"

67771

+ "")

67772

67773

-(define_expand "vec_unpacks_lo_v16qi"

67774

- [(set (match_operand:V8HI 0 "register_operand" "=v")

67775

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

67776

- UNSPEC_VUPKLSB))]

67777

- "TARGET_ALTIVEC"

67778

- "

67779

-{

67780

- emit_insn (gen_altivec_vupklsb (operands[0], operands[1]));

67781

- DONE;

67782

-}")

67783

-

67784

-(define_expand "vec_unpacks_lo_v8hi"

67785

- [(set (match_operand:V4SI 0 "register_operand" "=v")

67786

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

67787

- UNSPEC_VUPKLSH))]

67788

- "TARGET_ALTIVEC"

67789

- "

67790

-{

67791

- emit_insn (gen_altivec_vupklsh (operands[0], operands[1]));

67792

- DONE;

67793

-}")

67794

-

67795

(define_insn "vperm_v8hiv4si"

67796

[(set (match_operand:V4SI 0 "register_operand" "=v")

67797

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

67798

@@ -2025,25 +2708,26 @@

67799

rtx vzero = gen_reg_rtx (V8HImode);

67800

rtx mask = gen_reg_rtx (V16QImode);

67801

rtvec v = rtvec_alloc (16);

67802

+ bool be = BYTES_BIG_ENDIAN;

67803

67804

emit_insn (gen_altivec_vspltish (vzero, const0_rtx));

67805

67806

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

67807

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 0);

67808

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 16);

67809

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 1);

67810

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

67811

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 2);

67812

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 16);

67813

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 3);

67814

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

67815

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 4);

67816

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 16);

67817

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 5);

67818

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

67819

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 6);

67820

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 16);

67821

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 7);

67822

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 7);

67823

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 0 : 16);

67824

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 16 : 6);

67825

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 1 : 16);

67826

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 5);

67827

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 2 : 16);

67828

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 16 : 4);

67829

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 3 : 16);

67830

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 3);

67831

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 4 : 16);

67832

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 16 : 2);

67833

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 5 : 16);

67834

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 1);

67835

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 6 : 16);

67836

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 16 : 0);

67837

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 7 : 16);

67838

67839

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

67840

emit_insn (gen_vperm_v16qiv8hi (operands[0], operands[1], vzero, mask));

67841

@@ -2060,25 +2744,26 @@

67842

rtx vzero = gen_reg_rtx (V4SImode);

67843

rtx mask = gen_reg_rtx (V16QImode);

67844

rtvec v = rtvec_alloc (16);

67845

+ bool be = BYTES_BIG_ENDIAN;

67846

67847

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

67848

67849

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

67850

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 17);

67851

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 0);

67852

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 1);

67853

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

67854

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 17);

67855

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 2);

67856

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 3);

67857

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

67858

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 17);

67859

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 4);

67860

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 5);

67861

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

67862

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 17);

67863

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 6);

67864

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 7);

67865

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 7);

67866

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 17 : 6);

67867

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 0 : 17);

67868

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 1 : 16);

67869

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 5);

67870

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 17 : 4);

67871

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 2 : 17);

67872

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 3 : 16);

67873

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 3);

67874

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 17 : 2);

67875

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 4 : 17);

67876

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 5 : 16);

67877

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 1);

67878

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 17 : 0);

67879

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 6 : 17);

67880

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 7 : 16);

67881

67882

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

67883

emit_insn (gen_vperm_v8hiv4si (operands[0], operands[1], vzero, mask));

67884

@@ -2095,25 +2780,26 @@

67885

rtx vzero = gen_reg_rtx (V8HImode);

67886

rtx mask = gen_reg_rtx (V16QImode);

67887

rtvec v = rtvec_alloc (16);

67888

+ bool be = BYTES_BIG_ENDIAN;

67889

67890

emit_insn (gen_altivec_vspltish (vzero, const0_rtx));

67891

67892

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

67893

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 8);

67894

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 16);

67895

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 9);

67896

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

67897

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 10);

67898

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 16);

67899

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 11);

67900

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

67901

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 12);

67902

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 16);

67903

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 13);

67904

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

67905

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 14);

67906

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 16);

67907

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 15);

67908

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 15);

67909

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 8 : 16);

67910

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 16 : 14);

67911

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 9 : 16);

67912

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 13);

67913

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 10 : 16);

67914

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 16 : 12);

67915

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 11 : 16);

67916

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 11);

67917

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 12 : 16);

67918

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 16 : 10);

67919

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 13 : 16);

67920

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 9);

67921

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 14 : 16);

67922

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 16 : 8);

67923

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 15 : 16);

67924

67925

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

67926

emit_insn (gen_vperm_v16qiv8hi (operands[0], operands[1], vzero, mask));

67927

@@ -2130,25 +2816,26 @@

67928

rtx vzero = gen_reg_rtx (V4SImode);

67929

rtx mask = gen_reg_rtx (V16QImode);

67930

rtvec v = rtvec_alloc (16);

67931

+ bool be = BYTES_BIG_ENDIAN;

67932

67933

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

67934

67935

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

67936

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 17);

67937

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 8);

67938

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 9);

67939

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

67940

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 17);

67941

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 10);

67942

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 11);

67943

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

67944

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 17);

67945

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 12);

67946

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 13);

67947

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

67948

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 17);

67949

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 14);

67950

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 15);

67951

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 15);

67952

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 17 : 14);

67953

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 8 : 17);

67954

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 9 : 16);

67955

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 13);

67956

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 17 : 12);

67957

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 10 : 17);

67958

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 11 : 16);

67959

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 11);

67960

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 17 : 10);

67961

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 12 : 17);

67962

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 13 : 16);

67963

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 9);

67964

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 17 : 8);

67965

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 14 : 17);

67966

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 15 : 16);

67967

67968

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

67969

emit_insn (gen_vperm_v8hiv4si (operands[0], operands[1], vzero, mask));

67970

@@ -2166,9 +2853,18 @@

67971

rtx ve = gen_reg_rtx (V8HImode);

67972

rtx vo = gen_reg_rtx (V8HImode);

67973

67974

- emit_insn (gen_vec_widen_umult_even_v16qi (ve, operands[1], operands[2]));

67975

- emit_insn (gen_vec_widen_umult_odd_v16qi (vo, operands[1], operands[2]));

67976

- emit_insn (gen_altivec_vmrghh (operands[0], ve, vo));

67977

+ if (BYTES_BIG_ENDIAN)

67978

+ {

67979

+ emit_insn (gen_altivec_vmuleub (ve, operands[1], operands[2]));

67980

+ emit_insn (gen_altivec_vmuloub (vo, operands[1], operands[2]));

67981

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], ve, vo));

67982

+ }

67983

+ else

67984

+ {

67985

+ emit_insn (gen_altivec_vmuloub (ve, operands[1], operands[2]));

67986

+ emit_insn (gen_altivec_vmuleub (vo, operands[1], operands[2]));

67987

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], vo, ve));

67988

+ }

67989

DONE;

67990

}")

67991

67992

@@ -2183,9 +2879,18 @@

67993

rtx ve = gen_reg_rtx (V8HImode);

67994

rtx vo = gen_reg_rtx (V8HImode);

67995

67996

- emit_insn (gen_vec_widen_umult_even_v16qi (ve, operands[1], operands[2]));

67997

- emit_insn (gen_vec_widen_umult_odd_v16qi (vo, operands[1], operands[2]));

67998

- emit_insn (gen_altivec_vmrglh (operands[0], ve, vo));

67999

+ if (BYTES_BIG_ENDIAN)

68000

+ {

68001

+ emit_insn (gen_altivec_vmuleub (ve, operands[1], operands[2]));

68002

+ emit_insn (gen_altivec_vmuloub (vo, operands[1], operands[2]));

68003

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], ve, vo));

68004

+ }

68005

+ else

68006

+ {

68007

+ emit_insn (gen_altivec_vmuloub (ve, operands[1], operands[2]));

68008

+ emit_insn (gen_altivec_vmuleub (vo, operands[1], operands[2]));

68009

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], vo, ve));

68010

+ }

68011

DONE;

68012

}")

68013

68014

@@ -2200,9 +2905,18 @@

68015

rtx ve = gen_reg_rtx (V8HImode);

68016

rtx vo = gen_reg_rtx (V8HImode);

68017

68018

- emit_insn (gen_vec_widen_smult_even_v16qi (ve, operands[1], operands[2]));

68019

- emit_insn (gen_vec_widen_smult_odd_v16qi (vo, operands[1], operands[2]));

68020

- emit_insn (gen_altivec_vmrghh (operands[0], ve, vo));

68021

+ if (BYTES_BIG_ENDIAN)

68022

+ {

68023

+ emit_insn (gen_altivec_vmulesb (ve, operands[1], operands[2]));

68024

+ emit_insn (gen_altivec_vmulosb (vo, operands[1], operands[2]));

68025

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], ve, vo));

68026

+ }

68027

+ else

68028

+ {

68029

+ emit_insn (gen_altivec_vmulosb (ve, operands[1], operands[2]));

68030

+ emit_insn (gen_altivec_vmulesb (vo, operands[1], operands[2]));

68031

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], vo, ve));

68032

+ }

68033

DONE;

68034

}")

68035

68036

@@ -2217,9 +2931,18 @@

68037

rtx ve = gen_reg_rtx (V8HImode);

68038

rtx vo = gen_reg_rtx (V8HImode);

68039

68040

- emit_insn (gen_vec_widen_smult_even_v16qi (ve, operands[1], operands[2]));

68041

- emit_insn (gen_vec_widen_smult_odd_v16qi (vo, operands[1], operands[2]));

68042

- emit_insn (gen_altivec_vmrglh (operands[0], ve, vo));

68043

+ if (BYTES_BIG_ENDIAN)

68044

+ {

68045

+ emit_insn (gen_altivec_vmulesb (ve, operands[1], operands[2]));

68046

+ emit_insn (gen_altivec_vmulosb (vo, operands[1], operands[2]));

68047

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], ve, vo));

68048

+ }

68049

+ else

68050

+ {

68051

+ emit_insn (gen_altivec_vmulosb (ve, operands[1], operands[2]));

68052

+ emit_insn (gen_altivec_vmulesb (vo, operands[1], operands[2]));

68053

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], vo, ve));

68054

+ }

68055

DONE;

68056

}")

68057

68058

@@ -2234,9 +2957,18 @@

68059

rtx ve = gen_reg_rtx (V4SImode);

68060

rtx vo = gen_reg_rtx (V4SImode);

68061

68062

- emit_insn (gen_vec_widen_umult_even_v8hi (ve, operands[1], operands[2]));

68063

- emit_insn (gen_vec_widen_umult_odd_v8hi (vo, operands[1], operands[2]));

68064

- emit_insn (gen_altivec_vmrghw (operands[0], ve, vo));

68065

+ if (BYTES_BIG_ENDIAN)

68066

+ {

68067

+ emit_insn (gen_altivec_vmuleuh (ve, operands[1], operands[2]));

68068

+ emit_insn (gen_altivec_vmulouh (vo, operands[1], operands[2]));

68069

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], ve, vo));

68070

+ }

68071

+ else

68072

+ {

68073

+ emit_insn (gen_altivec_vmulouh (ve, operands[1], operands[2]));

68074

+ emit_insn (gen_altivec_vmuleuh (vo, operands[1], operands[2]));

68075

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], vo, ve));

68076

+ }

68077

DONE;

68078

}")

68079

68080

@@ -2251,9 +2983,18 @@

68081

rtx ve = gen_reg_rtx (V4SImode);

68082

rtx vo = gen_reg_rtx (V4SImode);

68083

68084

- emit_insn (gen_vec_widen_umult_even_v8hi (ve, operands[1], operands[2]));

68085

- emit_insn (gen_vec_widen_umult_odd_v8hi (vo, operands[1], operands[2]));

68086

- emit_insn (gen_altivec_vmrglw (operands[0], ve, vo));

68087

+ if (BYTES_BIG_ENDIAN)

68088

+ {

68089

+ emit_insn (gen_altivec_vmuleuh (ve, operands[1], operands[2]));

68090

+ emit_insn (gen_altivec_vmulouh (vo, operands[1], operands[2]));

68091

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], ve, vo));

68092

+ }

68093

+ else

68094

+ {

68095

+ emit_insn (gen_altivec_vmulouh (ve, operands[1], operands[2]));

68096

+ emit_insn (gen_altivec_vmuleuh (vo, operands[1], operands[2]));

68097

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], vo, ve));

68098

+ }

68099

DONE;

68100

}")

68101

68102

@@ -2268,9 +3009,18 @@

68103

rtx ve = gen_reg_rtx (V4SImode);

68104

rtx vo = gen_reg_rtx (V4SImode);

68105

68106

- emit_insn (gen_vec_widen_smult_even_v8hi (ve, operands[1], operands[2]));

68107

- emit_insn (gen_vec_widen_smult_odd_v8hi (vo, operands[1], operands[2]));

68108

- emit_insn (gen_altivec_vmrghw (operands[0], ve, vo));

68109

+ if (BYTES_BIG_ENDIAN)

68110

+ {

68111

+ emit_insn (gen_altivec_vmulesh (ve, operands[1], operands[2]));

68112

+ emit_insn (gen_altivec_vmulosh (vo, operands[1], operands[2]));

68113

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], ve, vo));

68114

+ }

68115

+ else

68116

+ {

68117

+ emit_insn (gen_altivec_vmulosh (ve, operands[1], operands[2]));

68118

+ emit_insn (gen_altivec_vmulesh (vo, operands[1], operands[2]));

68119

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], vo, ve));

68120

+ }

68121

DONE;

68122

}")

68123

68124

@@ -2285,35 +3035,28 @@

68125

rtx ve = gen_reg_rtx (V4SImode);

68126

rtx vo = gen_reg_rtx (V4SImode);

68127

68128

- emit_insn (gen_vec_widen_smult_even_v8hi (ve, operands[1], operands[2]));

68129

- emit_insn (gen_vec_widen_smult_odd_v8hi (vo, operands[1], operands[2]));

68130

- emit_insn (gen_altivec_vmrglw (operands[0], ve, vo));

68131

+ if (BYTES_BIG_ENDIAN)

68132

+ {

68133

+ emit_insn (gen_altivec_vmulesh (ve, operands[1], operands[2]));

68134

+ emit_insn (gen_altivec_vmulosh (vo, operands[1], operands[2]));

68135

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], ve, vo));

68136

+ }

68137

+ else

68138

+ {

68139

+ emit_insn (gen_altivec_vmulosh (ve, operands[1], operands[2]));

68140

+ emit_insn (gen_altivec_vmulesh (vo, operands[1], operands[2]));

68141

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], vo, ve));

68142

+ }

68143

DONE;

68144

}")

68145

68146

-(define_expand "vec_pack_trunc_v8hi"

68147

- [(set (match_operand:V16QI 0 "register_operand" "=v")

68148

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

68149

- (match_operand:V8HI 2 "register_operand" "v")]

68150

- UNSPEC_VPKUHUM))]

68151

- "TARGET_ALTIVEC"

68152

- "

68153

-{

68154

- emit_insn (gen_altivec_vpkuhum (operands[0], operands[1], operands[2]));

68155

- DONE;

68156

-}")

68157

-

68158

-(define_expand "vec_pack_trunc_v4si"

68159

- [(set (match_operand:V8HI 0 "register_operand" "=v")

68160

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

68161

- (match_operand:V4SI 2 "register_operand" "v")]

68162

- UNSPEC_VPKUWUM))]

68163

- "TARGET_ALTIVEC"

68164

- "

68165

-{

68166

- emit_insn (gen_altivec_vpkuwum (operands[0], operands[1], operands[2]));

68167

- DONE;

68168

-}")

68169

+(define_expand "vec_pack_trunc_<mode>"

68170

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

68171

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

68172

+ (match_operand:VP 2 "register_operand" "v")]

68173

+ UNSPEC_VPACK_UNS_UNS_MOD))]

68174

+ "<VI_unit>"

68175

+ "")

68176

68177

(define_expand "altivec_negv4sf2"

68178

[(use (match_operand:V4SF 0 "register_operand" ""))

68179

@@ -2460,3 +3203,134 @@

68180

emit_insn (gen_altivec_vcfux (operands[0], tmp, const0_rtx));

68181

DONE;

68182

}")

68183

+

68184

+

68185

+;; Power8 vector instructions encoded as Altivec instructions

68186

+

68187

+;; Vector count leading zeros

68188

+(define_insn "*p8v_clz<mode>2"

68189

+ [(set (match_operand:VI2 0 "register_operand" "=v")

68190

+ (clz:VI2 (match_operand:VI2 1 "register_operand" "v")))]

68191

+ "TARGET_P8_VECTOR"

68192

+ "vclz<wd> %0,%1"

68193

+ [(set_attr "length" "4")

68194

+ (set_attr "type" "vecsimple")])

68195

+

68196

+;; Vector population count

68197

+(define_insn "*p8v_popcount<mode>2"

68198

+ [(set (match_operand:VI2 0 "register_operand" "=v")

68199

+ (popcount:VI2 (match_operand:VI2 1 "register_operand" "v")))]

68200

+ "TARGET_P8_VECTOR"

68201

+ "vpopcnt<wd> %0,%1"

68202

+ [(set_attr "length" "4")

68203

+ (set_attr "type" "vecsimple")])

68204

+

68205

+;; Vector Gather Bits by Bytes by Doubleword

68206

+(define_insn "p8v_vgbbd"

68207

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

68208

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")]

68209

+ UNSPEC_VGBBD))]

68210

+ "TARGET_P8_VECTOR"

68211

+ "vgbbd %0,%1"

68212

+ [(set_attr "length" "4")

68213

+ (set_attr "type" "vecsimple")])

68214

+

68215

+

68216

+;; 128-bit binary integer arithmetic

68217

+;; We have a special container type (V1TImode) to allow operations using the

68218

+;; ISA 2.07 128-bit binary support to target the VMX/altivec registers without

68219

+;; having to worry about the register allocator deciding GPRs are better.

68220

+

68221

+(define_insn "altivec_vadduqm"

68222

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68223

+ (plus:V1TI (match_operand:V1TI 1 "register_operand" "v")

68224

+ (match_operand:V1TI 2 "register_operand" "v")))]

68225

+ "TARGET_VADDUQM"

68226

+ "vadduqm %0,%1,%2"

68227

+ [(set_attr "length" "4")

68228

+ (set_attr "type" "vecsimple")])

68229

+

68230

+(define_insn "altivec_vaddcuq"

68231

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68232

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

68233

+ (match_operand:V1TI 2 "register_operand" "v")]

68234

+ UNSPEC_VADDCUQ))]

68235

+ "TARGET_VADDUQM"

68236

+ "vaddcuq %0,%1,%2"

68237

+ [(set_attr "length" "4")

68238

+ (set_attr "type" "vecsimple")])

68239

+

68240

+(define_insn "altivec_vsubuqm"

68241

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68242

+ (minus:V1TI (match_operand:V1TI 1 "register_operand" "v")

68243

+ (match_operand:V1TI 2 "register_operand" "v")))]

68244

+ "TARGET_VADDUQM"

68245

+ "vsubuqm %0,%1,%2"

68246

+ [(set_attr "length" "4")

68247

+ (set_attr "type" "vecsimple")])

68248

+

68249

+(define_insn "altivec_vsubcuq"

68250

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68251

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

68252

+ (match_operand:V1TI 2 "register_operand" "v")]

68253

+ UNSPEC_VSUBCUQ))]

68254

+ "TARGET_VADDUQM"

68255

+ "vsubcuq %0,%1,%2"

68256

+ [(set_attr "length" "4")

68257

+ (set_attr "type" "vecsimple")])

68258

+

68259

+(define_insn "altivec_vaddeuqm"

68260

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68261

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

68262

+ (match_operand:V1TI 2 "register_operand" "v")

68263

+ (match_operand:V1TI 3 "register_operand" "v")]

68264

+ UNSPEC_VADDEUQM))]

68265

+ "TARGET_VADDUQM"

68266

+ "vaddeuqm %0,%1,%2,%3"

68267

+ [(set_attr "length" "4")

68268

+ (set_attr "type" "vecsimple")])

68269

+

68270

+(define_insn "altivec_vaddecuq"

68271

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68272

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

68273

+ (match_operand:V1TI 2 "register_operand" "v")

68274

+ (match_operand:V1TI 3 "register_operand" "v")]

68275

+ UNSPEC_VADDECUQ))]

68276

+ "TARGET_VADDUQM"

68277

+ "vaddecuq %0,%1,%2,%3"

68278

+ [(set_attr "length" "4")

68279

+ (set_attr "type" "vecsimple")])

68280

+

68281

+(define_insn "altivec_vsubeuqm"

68282

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68283

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

68284

+ (match_operand:V1TI 2 "register_operand" "v")

68285

+ (match_operand:V1TI 3 "register_operand" "v")]

68286

+ UNSPEC_VSUBEUQM))]

68287

+ "TARGET_VADDUQM"

68288

+ "vsubeuqm %0,%1,%2,%3"

68289

+ [(set_attr "length" "4")

68290

+ (set_attr "type" "vecsimple")])

68291

+

68292

+(define_insn "altivec_vsubecuq"

68293

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

68294

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

68295

+ (match_operand:V1TI 2 "register_operand" "v")

68296

+ (match_operand:V1TI 3 "register_operand" "v")]

68297

+ UNSPEC_VSUBECUQ))]

68298

+ "TARGET_VADDUQM"

68299

+ "vsubecuq %0,%1,%2,%3"

68300

+ [(set_attr "length" "4")

68301

+ (set_attr "type" "vecsimple")])

68302

+

68303

+;; We use V2DI as the output type to simplify converting the permute

68304

+;; bits into an integer

68305

+(define_insn "altivec_vbpermq"

68306

+ [(set (match_operand:V2DI 0 "register_operand" "=v")

68307

+ (unspec:V2DI [(match_operand:V16QI 1 "register_operand" "v")

68308

+ (match_operand:V16QI 2 "register_operand" "v")]

68309

+ UNSPEC_VBPERMQ))]

68310

+ "TARGET_P8_VECTOR"

68311

+ "vbpermq %0,%1,%2"

68312

+ [(set_attr "length" "4")

68313

+ (set_attr "type" "vecsimple")])

68314

Index: gcc/config/rs6000/sysv4le.h

68315

===================================================================

68316

--- a/src/gcc/config/rs6000/sysv4le.h (.../tags/gcc_4_8_2_release)

68317

+++ b/src/gcc/config/rs6000/sysv4le.h (.../branches/gcc-4_8-branch)

68318

@@ -22,9 +22,6 @@

68319

#undef TARGET_DEFAULT

68320

#define TARGET_DEFAULT MASK_LITTLE_ENDIAN

68321

68322

-#undef CC1_ENDIAN_DEFAULT_SPEC

68323

-#define CC1_ENDIAN_DEFAULT_SPEC "%(cc1_endian_little)"

68324

-

68325

#undef DEFAULT_ASM_ENDIAN

68326

#define DEFAULT_ASM_ENDIAN " -mlittle"

68327

68328

@@ -34,3 +31,7 @@

68329

68330

#undef MULTILIB_DEFAULTS

68331

#define MULTILIB_DEFAULTS { "mlittle", "mcall-sysv" }

68332

+

68333

+/* Little-endian PowerPC64 Linux uses the ELF v2 ABI by default. */

68334

+#define LINUX64_DEFAULT_ABI_ELFv2

68335

+

68336

Index: gcc/config/rs6000/dfp.md

68337

===================================================================

68338

--- a/src/gcc/config/rs6000/dfp.md (.../tags/gcc_4_8_2_release)

68339

+++ b/src/gcc/config/rs6000/dfp.md (.../branches/gcc-4_8-branch)

68340

@@ -29,77 +29,6 @@

68341

])

68342

68343

68344

-(define_expand "movsd"

68345

- [(set (match_operand:SD 0 "nonimmediate_operand" "")

68346

- (match_operand:SD 1 "any_operand" ""))]

68347

- "TARGET_HARD_FLOAT && TARGET_FPRS"

68348

- "{ rs6000_emit_move (operands[0], operands[1], SDmode); DONE; }")

68349

-

68350

-(define_split

68351

- [(set (match_operand:SD 0 "gpc_reg_operand" "")

68352

- (match_operand:SD 1 "const_double_operand" ""))]

68353

- "reload_completed

68354

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

68355

- || (GET_CODE (operands[0]) == SUBREG

68356

- && GET_CODE (SUBREG_REG (operands[0])) == REG

68357

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

68358

- [(set (match_dup 2) (match_dup 3))]

68359

- "

68360

-{

68361

- long l;

68362

- REAL_VALUE_TYPE rv;

68363

-

68364

- REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

68365

- REAL_VALUE_TO_TARGET_DECIMAL32 (rv, l);

68366

-

68367

- if (! TARGET_POWERPC64)

68368

- operands[2] = operand_subword (operands[0], 0, 0, SDmode);

68369

- else

68370

- operands[2] = gen_lowpart (SImode, operands[0]);

68371

-

68372

- operands[3] = gen_int_mode (l, SImode);

68373

-}")

68374

-

68375

-(define_insn "movsd_hardfloat"

68376

- [(set (match_operand:SD 0 "nonimmediate_operand" "=r,r,m,f,*c*l,!r,*h,!r,!r")

68377

- (match_operand:SD 1 "input_operand" "r,m,r,f,r,h,0,G,Fn"))]

68378

- "(gpc_reg_operand (operands[0], SDmode)

68379

- || gpc_reg_operand (operands[1], SDmode))

68380

- && (TARGET_HARD_FLOAT && TARGET_FPRS)"

68381

- "@

68382

- mr %0,%1

68383

- lwz%U1%X1 %0,%1

68384

- stw%U0%X0 %1,%0

68385

- fmr %0,%1

68386

- mt%0 %1

68387

- mf%1 %0

68388

- nop

68389

- #

68390

- #"

68391

- [(set_attr "type" "*,load,store,fp,mtjmpr,mfjmpr,*,*,*")

68392

- (set_attr "length" "4,4,4,4,4,4,4,4,8")])

68393

-

68394

-(define_insn "movsd_softfloat"

68395

- [(set (match_operand:SD 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,r,r,*h")

68396

- (match_operand:SD 1 "input_operand" "r,r,h,m,r,I,L,R,G,Fn,0"))]

68397

- "(gpc_reg_operand (operands[0], SDmode)

68398

- || gpc_reg_operand (operands[1], SDmode))

68399

- && (TARGET_SOFT_FLOAT || !TARGET_FPRS)"

68400

- "@

68401

- mr %0,%1

68402

- mt%0 %1

68403

- mf%1 %0

68404

- lwz%U1%X1 %0,%1

68405

- stw%U0%X0 %1,%0

68406

- li %0,%1

68407

- lis %0,%v1

68408

- la %0,%a1

68409

- #

68410

- #

68411

- nop"

68412

- [(set_attr "type" "*,mtjmpr,mfjmpr,load,store,*,*,*,*,*,*")

68413

- (set_attr "length" "4,4,4,4,4,4,4,4,4,8,4")])

68414

-

68415

(define_insn "movsd_store"

68416

[(set (match_operand:DD 0 "nonimmediate_operand" "=m")

68417

(unspec:DD [(match_operand:SD 1 "input_operand" "d")]

68418

@@ -108,7 +37,14 @@

68419

|| gpc_reg_operand (operands[1], SDmode))

68420

&& TARGET_HARD_FLOAT && TARGET_FPRS"

68421

"stfd%U0%X0 %1,%0"

68422

- [(set_attr "type" "fpstore")

68423

+ [(set (attr "type")

68424

+ (if_then_else

68425

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

68426

+ (const_string "fpstore_ux")

68427

+ (if_then_else

68428

+ (match_test "update_address_mem (operands[0], VOIDmode)")

68429

+ (const_string "fpstore_u")

68430

+ (const_string "fpstore"))))

68431

(set_attr "length" "4")])

68432

68433

(define_insn "movsd_load"

68434

@@ -119,7 +55,14 @@

68435

|| gpc_reg_operand (operands[1], DDmode))

68436

&& TARGET_HARD_FLOAT && TARGET_FPRS"

68437

"lfd%U1%X1 %0,%1"

68438

- [(set_attr "type" "fpload")

68439

+ [(set (attr "type")

68440

+ (if_then_else

68441

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

68442

+ (const_string "fpload_ux")

68443

+ (if_then_else

68444

+ (match_test "update_address_mem (operands[1], VOIDmode)")

68445

+ (const_string "fpload_u")

68446

+ (const_string "fpload"))))

68447

(set_attr "length" "4")])

68448

68449

;; Hardware support for decimal floating point operations.

68450

@@ -182,211 +125,6 @@

68451

"fnabs %0,%1"

68452

[(set_attr "type" "fp")])

68453

68454

-(define_expand "movdd"

68455

- [(set (match_operand:DD 0 "nonimmediate_operand" "")

68456

- (match_operand:DD 1 "any_operand" ""))]

68457

- ""

68458

- "{ rs6000_emit_move (operands[0], operands[1], DDmode); DONE; }")

68459

-

68460

-(define_split

68461

- [(set (match_operand:DD 0 "gpc_reg_operand" "")

68462

- (match_operand:DD 1 "const_int_operand" ""))]

68463

- "! TARGET_POWERPC64 && reload_completed

68464

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

68465

- || (GET_CODE (operands[0]) == SUBREG

68466

- && GET_CODE (SUBREG_REG (operands[0])) == REG

68467

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

68468

- [(set (match_dup 2) (match_dup 4))

68469

- (set (match_dup 3) (match_dup 1))]

68470

- "

68471

-{

68472

- int endian = (WORDS_BIG_ENDIAN == 0);

68473

- HOST_WIDE_INT value = INTVAL (operands[1]);

68474

-

68475

- operands[2] = operand_subword (operands[0], endian, 0, DDmode);

68476

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DDmode);

68477

-#if HOST_BITS_PER_WIDE_INT == 32

68478

- operands[4] = (value & 0x80000000) ? constm1_rtx : const0_rtx;

68479

-#else

68480

- operands[4] = GEN_INT (value >> 32);

68481

- operands[1] = GEN_INT (((value & 0xffffffff) ^ 0x80000000) - 0x80000000);

68482

-#endif

68483

-}")

68484

-

68485

-(define_split

68486

- [(set (match_operand:DD 0 "gpc_reg_operand" "")

68487

- (match_operand:DD 1 "const_double_operand" ""))]

68488

- "! TARGET_POWERPC64 && reload_completed

68489

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

68490

- || (GET_CODE (operands[0]) == SUBREG

68491

- && GET_CODE (SUBREG_REG (operands[0])) == REG

68492

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

68493

- [(set (match_dup 2) (match_dup 4))

68494

- (set (match_dup 3) (match_dup 5))]

68495

- "

68496

-{

68497

- int endian = (WORDS_BIG_ENDIAN == 0);

68498

- long l[2];

68499

- REAL_VALUE_TYPE rv;

68500

-

68501

- REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

68502

- REAL_VALUE_TO_TARGET_DECIMAL64 (rv, l);

68503

-

68504

- operands[2] = operand_subword (operands[0], endian, 0, DDmode);

68505

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DDmode);

68506

- operands[4] = gen_int_mode (l[endian], SImode);

68507

- operands[5] = gen_int_mode (l[1 - endian], SImode);

68508

-}")

68509

-

68510

-(define_split

68511

- [(set (match_operand:DD 0 "gpc_reg_operand" "")

68512

- (match_operand:DD 1 "const_double_operand" ""))]

68513

- "TARGET_POWERPC64 && reload_completed

68514

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

68515

- || (GET_CODE (operands[0]) == SUBREG

68516

- && GET_CODE (SUBREG_REG (operands[0])) == REG

68517

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

68518

- [(set (match_dup 2) (match_dup 3))]

68519

- "

68520

-{

68521

- int endian = (WORDS_BIG_ENDIAN == 0);

68522

- long l[2];

68523

- REAL_VALUE_TYPE rv;

68524

-#if HOST_BITS_PER_WIDE_INT >= 64

68525

- HOST_WIDE_INT val;

68526

-#endif

68527

-

68528

- REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

68529

- REAL_VALUE_TO_TARGET_DECIMAL64 (rv, l);

68530

-

68531

- operands[2] = gen_lowpart (DImode, operands[0]);

68532

- /* HIGHPART is lower memory address when WORDS_BIG_ENDIAN. */

68533

-#if HOST_BITS_PER_WIDE_INT >= 64

68534

- val = ((HOST_WIDE_INT)(unsigned long)l[endian] << 32

68535

- | ((HOST_WIDE_INT)(unsigned long)l[1 - endian]));

68536

-

68537

- operands[3] = gen_int_mode (val, DImode);

68538

-#else

68539

- operands[3] = immed_double_const (l[1 - endian], l[endian], DImode);

68540

-#endif

68541

-}")

68542

-

68543

-;; Don't have reload use general registers to load a constant. First,

68544

-;; it might not work if the output operand is the equivalent of

68545

-;; a non-offsettable memref, but also it is less efficient than loading

68546

-;; the constant into an FP register, since it will probably be used there.

68547

-;; The "??" is a kludge until we can figure out a more reasonable way

68548

-;; of handling these non-offsettable values.

68549

-(define_insn "*movdd_hardfloat32"

68550

- [(set (match_operand:DD 0 "nonimmediate_operand" "=!r,??r,m,d,d,m,!r,!r,!r")

68551

- (match_operand:DD 1 "input_operand" "r,m,r,d,m,d,G,H,F"))]

68552

- "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS

68553

- && (gpc_reg_operand (operands[0], DDmode)

68554

- || gpc_reg_operand (operands[1], DDmode))"

68555

- "*

68556

-{

68557

- switch (which_alternative)

68558

- {

68559

- default:

68560

- gcc_unreachable ();

68561

- case 0:

68562

- case 1:

68563

- case 2:

68564

- return \"#\";

68565

- case 3:

68566

- return \"fmr %0,%1\";

68567

- case 4:

68568

- return \"lfd%U1%X1 %0,%1\";

68569

- case 5:

68570

- return \"stfd%U0%X0 %1,%0\";

68571

- case 6:

68572

- case 7:

68573

- case 8:

68574

- return \"#\";

68575

- }

68576

-}"

68577

- [(set_attr "type" "two,load,store,fp,fpload,fpstore,*,*,*")

68578

- (set_attr "length" "8,16,16,4,4,4,8,12,16")])

68579

-

68580

-(define_insn "*movdd_softfloat32"

68581

- [(set (match_operand:DD 0 "nonimmediate_operand" "=r,r,m,r,r,r")

68582

- (match_operand:DD 1 "input_operand" "r,m,r,G,H,F"))]

68583

- "! TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS)

68584

- && (gpc_reg_operand (operands[0], DDmode)

68585

- || gpc_reg_operand (operands[1], DDmode))"

68586

- "#"

68587

- [(set_attr "type" "two,load,store,*,*,*")

68588

- (set_attr "length" "8,8,8,8,12,16")])

68589

-

68590

-; ld/std require word-aligned displacements -> 'Y' constraint.

68591

-; List Y->r and r->Y before r->r for reload.

68592

-(define_insn "*movdd_hardfloat64_mfpgpr"

68593

- [(set (match_operand:DD 0 "nonimmediate_operand" "=Y,r,!r,d,d,m,*c*l,!r,*h,!r,!r,!r,r,d")

68594

- (match_operand:DD 1 "input_operand" "r,Y,r,d,m,d,r,h,0,G,H,F,d,r"))]

68595

- "TARGET_POWERPC64 && TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

68596

- && (gpc_reg_operand (operands[0], DDmode)

68597

- || gpc_reg_operand (operands[1], DDmode))"

68598

- "@

68599

- std%U0%X0 %1,%0

68600

- ld%U1%X1 %0,%1

68601

- mr %0,%1

68602

- fmr %0,%1

68603

- lfd%U1%X1 %0,%1

68604

- stfd%U0%X0 %1,%0

68605

- mt%0 %1

68606

- mf%1 %0

68607

- nop

68608

- #

68609

- #

68610

- #

68611

- mftgpr %0,%1

68612

- mffgpr %0,%1"

68613

- [(set_attr "type" "store,load,*,fp,fpload,fpstore,mtjmpr,mfjmpr,*,*,*,*,mftgpr,mffgpr")

68614

- (set_attr "length" "4,4,4,4,4,4,4,4,4,8,12,16,4,4")])

68615

-

68616

-; ld/std require word-aligned displacements -> 'Y' constraint.

68617

-; List Y->r and r->Y before r->r for reload.

68618

-(define_insn "*movdd_hardfloat64"

68619

- [(set (match_operand:DD 0 "nonimmediate_operand" "=Y,r,!r,d,d,m,*c*l,!r,*h,!r,!r,!r")

68620

- (match_operand:DD 1 "input_operand" "r,Y,r,d,m,d,r,h,0,G,H,F"))]

68621

- "TARGET_POWERPC64 && !TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

68622

- && (gpc_reg_operand (operands[0], DDmode)

68623

- || gpc_reg_operand (operands[1], DDmode))"

68624

- "@

68625

- std%U0%X0 %1,%0

68626

- ld%U1%X1 %0,%1

68627

- mr %0,%1

68628

- fmr %0,%1

68629

- lfd%U1%X1 %0,%1

68630

- stfd%U0%X0 %1,%0

68631

- mt%0 %1

68632

- mf%1 %0

68633

- nop

68634

- #

68635

- #

68636

- #"

68637

- [(set_attr "type" "store,load,*,fp,fpload,fpstore,mtjmpr,mfjmpr,*,*,*,*")

68638

- (set_attr "length" "4,4,4,4,4,4,4,4,4,8,12,16")])

68639

-

68640

-(define_insn "*movdd_softfloat64"

68641

- [(set (match_operand:DD 0 "nonimmediate_operand" "=r,Y,r,cl,r,r,r,r,*h")

68642

- (match_operand:DD 1 "input_operand" "Y,r,r,r,h,G,H,F,0"))]

68643

- "TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS)

68644

- && (gpc_reg_operand (operands[0], DDmode)

68645

- || gpc_reg_operand (operands[1], DDmode))"

68646

- "@

68647

- ld%U1%X1 %0,%1

68648

- std%U0%X0 %1,%0

68649

- mr %0,%1

68650

- mt%0 %1

68651

- mf%1 %0

68652

- #

68653

- #

68654

- #

68655

- nop"

68656

- [(set_attr "type" "load,store,*,mtjmpr,mfjmpr,*,*,*,*")

68657

- (set_attr "length" "4,4,4,4,4,8,12,16,4")])

68658

-

68659

(define_expand "negtd2"

68660

[(set (match_operand:TD 0 "gpc_reg_operand" "")

68661

(neg:TD (match_operand:TD 1 "gpc_reg_operand" "")))]

68662

@@ -410,40 +148,25 @@

68663

"")

68664

68665

(define_insn "*abstd2_fpr"

68666

- [(set (match_operand:TD 0 "gpc_reg_operand" "=d")

68667

- (abs:TD (match_operand:TD 1 "gpc_reg_operand" "d")))]

68668

+ [(set (match_operand:TD 0 "gpc_reg_operand" "=d,d")

68669

+ (abs:TD (match_operand:TD 1 "gpc_reg_operand" "0,d")))]

68670

"TARGET_HARD_FLOAT && TARGET_FPRS"

68671

- "fabs %0,%1"

68672

- [(set_attr "type" "fp")])

68673

+ "@

68674

+ fabs %0,%1

68675

+ fabs %0,%1\;fmr %L0,%L1"

68676

+ [(set_attr "type" "fp")

68677

+ (set_attr "length" "4,8")])

68678

68679

(define_insn "*nabstd2_fpr"

68680

- [(set (match_operand:TD 0 "gpc_reg_operand" "=d")

68681

- (neg:TD (abs:TD (match_operand:TD 1 "gpc_reg_operand" "d"))))]

68682

+ [(set (match_operand:TD 0 "gpc_reg_operand" "=d,d")

68683

+ (neg:TD (abs:TD (match_operand:TD 1 "gpc_reg_operand" "0,d"))))]

68684

"TARGET_HARD_FLOAT && TARGET_FPRS"

68685

- "fnabs %0,%1"

68686

- [(set_attr "type" "fp")])

68687

+ "@

68688

+ fnabs %0,%1

68689

+ fnabs %0,%1\;fmr %L0,%L1"

68690

+ [(set_attr "type" "fp")

68691

+ (set_attr "length" "4,8")])

68692

68693

-(define_expand "movtd"

68694

- [(set (match_operand:TD 0 "general_operand" "")

68695

- (match_operand:TD 1 "any_operand" ""))]

68696

- "TARGET_HARD_FLOAT && TARGET_FPRS"

68697

- "{ rs6000_emit_move (operands[0], operands[1], TDmode); DONE; }")

68698

-

68699

-; It's important to list the Y->r and r->Y moves before r->r because

68700

-; otherwise reload, given m->r, will try to pick r->r and reload it,

68701

-; which doesn't make progress.

68702

-(define_insn_and_split "*movtd_internal"

68703

- [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

68704

- (match_operand:TD 1 "input_operand" "d,m,d,r,YGHF,r"))]

68705

- "TARGET_HARD_FLOAT && TARGET_FPRS

68706

- && (gpc_reg_operand (operands[0], TDmode)

68707

- || gpc_reg_operand (operands[1], TDmode))"

68708

- "#"

68709

- "&& reload_completed"

68710

- [(pc)]

68711

-{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

68712

- [(set_attr "length" "8,8,8,20,20,16")])

68713

-

68714

;; Hardware support for decimal floating point operations.

68715

68716

(define_insn "extendddtd2"

68717

Index: gcc/config/rs6000/t-linux64

68718

===================================================================

68719

--- a/src/gcc/config/rs6000/t-linux64 (.../tags/gcc_4_8_2_release)

68720

+++ b/src/gcc/config/rs6000/t-linux64 (.../branches/gcc-4_8-branch)

68721

@@ -25,8 +25,8 @@

68722

# it doesn't tell anything about the 32bit libraries on those systems. Set

68723

# MULTILIB_OSDIRNAMES according to what is found on the target.

68724

68725

-MULTILIB_OPTIONS = m64/m32

68726

-MULTILIB_DIRNAMES = 64 32

68727

-MULTILIB_EXTRA_OPTS = fPIC

68728

-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu)

68729

-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu)

68730

+MULTILIB_OPTIONS := m64/m32

68731

+MULTILIB_DIRNAMES := 64 32

68732

+MULTILIB_EXTRA_OPTS :=

68733

+MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu)

68734

+MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu)

68735

Index: gcc/config/rs6000/sync.md

68736

===================================================================

68737

--- a/src/gcc/config/rs6000/sync.md (.../tags/gcc_4_8_2_release)

68738

+++ b/src/gcc/config/rs6000/sync.md (.../branches/gcc-4_8-branch)

68739

@@ -1,5 +1,5 @@

68740

;; Machine description for PowerPC synchronization instructions.

68741

68742

68743

;; Contributed by Geoffrey Keating.

68744

68745

;; This file is part of GCC.

68746

@@ -18,14 +18,23 @@

68747

;; along with GCC; see the file COPYING3. If not see

68748

;; <http://www.gnu.org/licenses/>.

68749

68750

-(define_mode_attr larx [(SI "lwarx") (DI "ldarx")])

68751

-(define_mode_attr stcx [(SI "stwcx.") (DI "stdcx.")])

68752

+(define_mode_attr larx [(QI "lbarx")

68753

+ (HI "lharx")

68754

+ (SI "lwarx")

68755

+ (DI "ldarx")

68756

+ (TI "lqarx")])

68757

68758

+(define_mode_attr stcx [(QI "stbcx.")

68759

+ (HI "sthcx.")

68760

+ (SI "stwcx.")

68761

+ (DI "stdcx.")

68762

+ (TI "stqcx.")])

68763

+

68764

(define_code_iterator FETCHOP [plus minus ior xor and])

68765

(define_code_attr fetchop_name

68766

[(plus "add") (minus "sub") (ior "or") (xor "xor") (and "and")])

68767

(define_code_attr fetchop_pred

68768

- [(plus "add_operand") (minus "gpc_reg_operand")

68769

+ [(plus "add_operand") (minus "int_reg_operand")

68770

(ior "logical_operand") (xor "logical_operand") (and "and_operand")])

68771

68772

(define_expand "mem_thread_fence"

68773

@@ -129,16 +138,7 @@

68774

case MEMMODEL_CONSUME:

68775

case MEMMODEL_ACQUIRE:

68776

case MEMMODEL_SEQ_CST:

68777

- if (GET_MODE (operands[0]) == QImode)

68778

- emit_insn (gen_loadsync_qi (operands[0]));

68779

- else if (GET_MODE (operands[0]) == HImode)

68780

- emit_insn (gen_loadsync_hi (operands[0]));

68781

- else if (GET_MODE (operands[0]) == SImode)

68782

- emit_insn (gen_loadsync_si (operands[0]));

68783

- else if (GET_MODE (operands[0]) == DImode)

68784

- emit_insn (gen_loadsync_di (operands[0]));

68785

- else

68786

- gcc_unreachable ();

68787

+ emit_insn (gen_loadsync_<mode> (operands[0]));

68788

break;

68789

default:

68790

gcc_unreachable ();

68791

@@ -170,14 +170,26 @@

68792

DONE;

68793

})

68794

68795

-;; ??? Power ISA 2.06B says that there *is* a load-{byte,half}-and-reserve

68796

-;; opcode that is "phased-in". Not implemented as of Power7, so not yet used,

68797

-;; but let's prepare the macros anyway.

68798

+;; Any supported integer mode that has atomic l<x>arx/st<x>cx. instrucitons

68799

+;; other than the quad memory operations, which have special restrictions.

68800

+;; Byte/halfword atomic instructions were added in ISA 2.06B, but were phased

68801

+;; in and did not show up until power8. TImode atomic lqarx/stqcx. require

68802

+;; special handling due to even/odd register requirements.

68803

+(define_mode_iterator ATOMIC [(QI "TARGET_SYNC_HI_QI")

68804

+ (HI "TARGET_SYNC_HI_QI")

68805

+ SI

68806

+ (DI "TARGET_POWERPC64")])

68807

68808

-(define_mode_iterator ATOMIC [SI (DI "TARGET_POWERPC64")])

68809

+;; Types that we should provide atomic instructions for.

68810

68811

+(define_mode_iterator AINT [QI

68812

+ HI

68813

+ SI

68814

+ (DI "TARGET_POWERPC64")

68815

+ (TI "TARGET_SYNC_TI")])

68816

+

68817

(define_insn "load_locked<mode>"

68818

- [(set (match_operand:ATOMIC 0 "gpc_reg_operand" "=r")

68819

+ [(set (match_operand:ATOMIC 0 "int_reg_operand" "=r")

68820

(unspec_volatile:ATOMIC

68821

[(match_operand:ATOMIC 1 "memory_operand" "Z")] UNSPECV_LL))]

68822

""

68823

@@ -184,21 +196,159 @@

68824

"<larx> %0,%y1"

68825

[(set_attr "type" "load_l")])

68826

68827

+(define_insn "load_locked<QHI:mode>_si"

68828

+ [(set (match_operand:SI 0 "int_reg_operand" "=r")

68829

+ (unspec_volatile:SI

68830

+ [(match_operand:QHI 1 "memory_operand" "Z")] UNSPECV_LL))]

68831

+ "TARGET_SYNC_HI_QI"

68832

+ "<QHI:larx> %0,%y1"

68833

+ [(set_attr "type" "load_l")])

68834

+

68835

+;; Use PTImode to get even/odd register pairs.

68836

+

68837

+;; Use a temporary register to force getting an even register for the

68838

+;; lqarx/stqcrx. instructions. Under AT 7.0, we need use an explicit copy,

68839

+;; even in big endian mode, unless we are using the LRA register allocator. In

68840

+;; GCC 4.9, the register allocator is smart enough to assign a even/odd

68841

+;; register pair.

68842

+

68843

+;; On little endian systems where non-atomic quad word load/store instructions

68844

+;; are not used, the address can be register+offset, so make sure the address

68845

+;; is indexed or indirect before register allocation.

68846

+

68847

+(define_expand "load_lockedti"

68848

+ [(use (match_operand:TI 0 "quad_int_reg_operand" ""))

68849

+ (use (match_operand:TI 1 "memory_operand" ""))]

68850

+ "TARGET_SYNC_TI"

68851

+{

68852

+ rtx op0 = operands[0];

68853

+ rtx op1 = operands[1];

68854

+ rtx pti = gen_reg_rtx (PTImode);

68855

+

68856

+ if (!indexed_or_indirect_operand (op1, TImode))

68857

+ {

68858

+ rtx old_addr = XEXP (op1, 0);

68859

+ rtx new_addr = force_reg (Pmode, old_addr);

68860

+ operands[1] = op1 = change_address (op1, TImode, new_addr);

68861

+ }

68862

+

68863

+ emit_insn (gen_load_lockedpti (pti, op1));

68864

+ if (WORDS_BIG_ENDIAN && rs6000_lra_flag)

68865

+ emit_move_insn (op0, gen_lowpart (TImode, pti));

68866

+ else

68867

+ {

68868

+ rtx op0_lo = gen_lowpart (DImode, op0);

68869

+ rtx op0_hi = gen_highpart (DImode, op0);

68870

+ rtx pti_lo = gen_lowpart (DImode, pti);

68871

+ rtx pti_hi = gen_highpart (DImode, pti);

68872

+

68873

+ emit_insn (gen_rtx_CLOBBER (VOIDmode, op0));

68874

+ if (WORDS_BIG_ENDIAN)

68875

+ {

68876

+ emit_move_insn (op0_hi, pti_hi);

68877

+ emit_move_insn (op0_lo, pti_lo);

68878

+ }

68879

+ else

68880

+ {

68881

+ emit_move_insn (op0_hi, pti_lo);

68882

+ emit_move_insn (op0_lo, pti_hi);

68883

+ }

68884

+ }

68885

+ DONE;

68886

+})

68887

+

68888

+(define_insn "load_lockedpti"

68889

+ [(set (match_operand:PTI 0 "quad_int_reg_operand" "=&r")

68890

+ (unspec_volatile:PTI

68891

+ [(match_operand:TI 1 "indexed_or_indirect_operand" "Z")] UNSPECV_LL))]

68892

+ "TARGET_SYNC_TI

68893

+ && !reg_mentioned_p (operands[0], operands[1])

68894

+ && quad_int_reg_operand (operands[0], PTImode)"

68895

+ "lqarx %0,%y1"

68896

+ [(set_attr "type" "load_l")])

68897

+

68898

(define_insn "store_conditional<mode>"

68899

[(set (match_operand:CC 0 "cc_reg_operand" "=x")

68900

(unspec_volatile:CC [(const_int 0)] UNSPECV_SC))

68901

(set (match_operand:ATOMIC 1 "memory_operand" "=Z")

68902

- (match_operand:ATOMIC 2 "gpc_reg_operand" "r"))]

68903

+ (match_operand:ATOMIC 2 "int_reg_operand" "r"))]

68904

""

68905

"<stcx> %2,%y1"

68906

[(set_attr "type" "store_c")])

68907

68908

+;; Use a temporary register to force getting an even register for the

68909

+;; lqarx/stqcrx. instructions. Under AT 7.0, we need use an explicit copy,

68910

+;; even in big endian mode. In GCC 4.9, the register allocator is smart enough

68911

+;; to assign a even/odd register pair.

68912

+

68913

+;; On little endian systems where non-atomic quad word load/store instructions

68914

+;; are not used, the address can be register+offset, so make sure the address

68915

+;; is indexed or indirect before register allocation.

68916

+

68917

+(define_expand "store_conditionalti"

68918

+ [(use (match_operand:CC 0 "cc_reg_operand" ""))

68919

+ (use (match_operand:TI 1 "memory_operand" ""))

68920

+ (use (match_operand:TI 2 "quad_int_reg_operand" ""))]

68921

+ "TARGET_SYNC_TI"

68922

+{

68923

+ rtx op0 = operands[0];

68924

+ rtx op1 = operands[1];

68925

+ rtx op2 = operands[2];

68926

+ rtx addr = XEXP (op1, 0);

68927

+ rtx pti_mem;

68928

+ rtx pti_reg;

68929

+

68930

+ if (!indexed_or_indirect_operand (op1, TImode))

68931

+ {

68932

+ rtx new_addr = force_reg (Pmode, addr);

68933

+ operands[1] = op1 = change_address (op1, TImode, new_addr);

68934

+ addr = new_addr;

68935

+ }

68936

+

68937

+ pti_mem = change_address (op1, PTImode, addr);

68938

+ pti_reg = gen_reg_rtx (PTImode);

68939

+

68940

+ if (WORDS_BIG_ENDIAN && rs6000_lra_flag)

68941

+ emit_move_insn (pti_reg, gen_lowpart (PTImode, op2));

68942

+ else

68943

+ {

68944

+ rtx op2_lo = gen_lowpart (DImode, op2);

68945

+ rtx op2_hi = gen_highpart (DImode, op2);

68946

+ rtx pti_lo = gen_lowpart (DImode, pti_reg);

68947

+ rtx pti_hi = gen_highpart (DImode, pti_reg);

68948

+

68949

+ emit_insn (gen_rtx_CLOBBER (VOIDmode, op0));

68950

+ if (WORDS_BIG_ENDIAN)

68951

+ {

68952

+ emit_move_insn (pti_hi, op2_hi);

68953

+ emit_move_insn (pti_lo, op2_lo);

68954

+ }

68955

+ else

68956

+ {

68957

+ emit_move_insn (pti_hi, op2_lo);

68958

+ emit_move_insn (pti_lo, op2_hi);

68959

+ }

68960

+ }

68961

+

68962

+ emit_insn (gen_store_conditionalpti (op0, pti_mem, pti_reg));

68963

+ DONE;

68964

+})

68965

+

68966

+(define_insn "store_conditionalpti"

68967

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x")

68968

+ (unspec_volatile:CC [(const_int 0)] UNSPECV_SC))

68969

+ (set (match_operand:PTI 1 "indexed_or_indirect_operand" "=Z")

68970

+ (match_operand:PTI 2 "quad_int_reg_operand" "r"))]

68971

+ "TARGET_SYNC_TI && quad_int_reg_operand (operands[2], PTImode)"

68972

+ "stqcx. %2,%y1"

68973

+ [(set_attr "type" "store_c")])

68974

+

68975

(define_expand "atomic_compare_and_swap<mode>"

68976

- [(match_operand:SI 0 "gpc_reg_operand" "") ;; bool out

68977

- (match_operand:INT1 1 "gpc_reg_operand" "") ;; val out

68978

- (match_operand:INT1 2 "memory_operand" "") ;; memory

68979

- (match_operand:INT1 3 "reg_or_short_operand" "") ;; expected

68980

- (match_operand:INT1 4 "gpc_reg_operand" "") ;; desired

68981

+ [(match_operand:SI 0 "int_reg_operand" "") ;; bool out

68982

+ (match_operand:AINT 1 "int_reg_operand" "") ;; val out

68983

+ (match_operand:AINT 2 "memory_operand" "") ;; memory

68984

+ (match_operand:AINT 3 "reg_or_short_operand" "") ;; expected

68985

+ (match_operand:AINT 4 "int_reg_operand" "") ;; desired

68986

(match_operand:SI 5 "const_int_operand" "") ;; is_weak

68987

(match_operand:SI 6 "const_int_operand" "") ;; model succ

68988

(match_operand:SI 7 "const_int_operand" "")] ;; model fail

68989

@@ -209,9 +359,9 @@

68990

})

68991

68992

(define_expand "atomic_exchange<mode>"

68993

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

68994

- (match_operand:INT1 1 "memory_operand" "") ;; memory

68995

- (match_operand:INT1 2 "gpc_reg_operand" "") ;; input

68996

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

68997

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

68998

+ (match_operand:AINT 2 "int_reg_operand" "") ;; input

68999

(match_operand:SI 3 "const_int_operand" "")] ;; model

69000

""

69001

{

69002

@@ -220,9 +370,9 @@

69003

})

69004

69005

(define_expand "atomic_<fetchop_name><mode>"

69006

- [(match_operand:INT1 0 "memory_operand" "") ;; memory

69007

- (FETCHOP:INT1 (match_dup 0)

69008

- (match_operand:INT1 1 "<fetchop_pred>" "")) ;; operand

69009

+ [(match_operand:AINT 0 "memory_operand" "") ;; memory

69010

+ (FETCHOP:AINT (match_dup 0)

69011

+ (match_operand:AINT 1 "<fetchop_pred>" "")) ;; operand

69012

(match_operand:SI 2 "const_int_operand" "")] ;; model

69013

""

69014

{

69015

@@ -232,8 +382,8 @@

69016

})

69017

69018

(define_expand "atomic_nand<mode>"

69019

- [(match_operand:INT1 0 "memory_operand" "") ;; memory

69020

- (match_operand:INT1 1 "gpc_reg_operand" "") ;; operand

69021

+ [(match_operand:AINT 0 "memory_operand" "") ;; memory

69022

+ (match_operand:AINT 1 "int_reg_operand" "") ;; operand

69023

(match_operand:SI 2 "const_int_operand" "")] ;; model

69024

""

69025

{

69026

@@ -243,10 +393,10 @@

69027

})

69028

69029

(define_expand "atomic_fetch_<fetchop_name><mode>"

69030

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

69031

- (match_operand:INT1 1 "memory_operand" "") ;; memory

69032

- (FETCHOP:INT1 (match_dup 1)

69033

- (match_operand:INT1 2 "<fetchop_pred>" "")) ;; operand

69034

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

69035

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

69036

+ (FETCHOP:AINT (match_dup 1)

69037

+ (match_operand:AINT 2 "<fetchop_pred>" "")) ;; operand

69038

(match_operand:SI 3 "const_int_operand" "")] ;; model

69039

""

69040

{

69041

@@ -256,9 +406,9 @@

69042

})

69043

69044

(define_expand "atomic_fetch_nand<mode>"

69045

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

69046

- (match_operand:INT1 1 "memory_operand" "") ;; memory

69047

- (match_operand:INT1 2 "gpc_reg_operand" "") ;; operand

69048

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

69049

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

69050

+ (match_operand:AINT 2 "int_reg_operand" "") ;; operand

69051

(match_operand:SI 3 "const_int_operand" "")] ;; model

69052

""

69053

{

69054

@@ -268,10 +418,10 @@

69055

})

69056

69057

(define_expand "atomic_<fetchop_name>_fetch<mode>"

69058

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

69059

- (match_operand:INT1 1 "memory_operand" "") ;; memory

69060

- (FETCHOP:INT1 (match_dup 1)

69061

- (match_operand:INT1 2 "<fetchop_pred>" "")) ;; operand

69062

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

69063

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

69064

+ (FETCHOP:AINT (match_dup 1)

69065

+ (match_operand:AINT 2 "<fetchop_pred>" "")) ;; operand

69066

(match_operand:SI 3 "const_int_operand" "")] ;; model

69067

""

69068

{

69069

@@ -281,9 +431,9 @@

69070

})

69071

69072

(define_expand "atomic_nand_fetch<mode>"

69073

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

69074

- (match_operand:INT1 1 "memory_operand" "") ;; memory

69075

- (match_operand:INT1 2 "gpc_reg_operand" "") ;; operand

69076

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

69077

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

69078

+ (match_operand:AINT 2 "int_reg_operand" "") ;; operand

69079

(match_operand:SI 3 "const_int_operand" "")] ;; model

69080

""

69081

{

69082

Index: gcc/config/rs6000/crypto.md

69083

===================================================================

69084

--- a/src/gcc/config/rs6000/crypto.md (.../tags/gcc_4_8_2_release)

69085

+++ b/src/gcc/config/rs6000/crypto.md (.../branches/gcc-4_8-branch)

69086

@@ -0,0 +1,101 @@

69087

+;; Cryptographic instructions added in ISA 2.07

69088

69089

+;; Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)

69090

+

69091

+;; This file is part of GCC.

69092

+

69093

+;; GCC is free software; you can redistribute it and/or modify it

69094

+;; under the terms of the GNU General Public License as published

69095

+;; by the Free Software Foundation; either version 3, or (at your

69096

+;; option) any later version.

69097

+

69098

+;; GCC is distributed in the hope that it will be useful, but WITHOUT

69099

+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

69100

+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public

69101

+;; License for more details.

69102

+

69103

+;; You should have received a copy of the GNU General Public License

69104

+;; along with GCC; see the file COPYING3. If not see

69105

+;; <http://www.gnu.org/licenses/>.

69106

+

69107

+(define_c_enum "unspec"

69108

+ [UNSPEC_VCIPHER

69109

+ UNSPEC_VNCIPHER

69110

+ UNSPEC_VCIPHERLAST

69111

+ UNSPEC_VNCIPHERLAST

69112

+ UNSPEC_VSBOX

69113

+ UNSPEC_VSHASIGMA

69114

+ UNSPEC_VPERMXOR

69115

+ UNSPEC_VPMSUM])

69116

+

69117

+;; Iterator for VPMSUM/VPERMXOR

69118

+(define_mode_iterator CR_mode [V16QI V8HI V4SI V2DI])

69119

+

69120

+(define_mode_attr CR_char [(V16QI "b")

69121

+ (V8HI "h")

69122

+ (V4SI "w")

69123

+ (V2DI "d")])

69124

+

69125

+;; Iterator for VSHASIGMAD/VSHASIGMAW

69126

+(define_mode_iterator CR_hash [V4SI V2DI])

69127

+

69128

+;; Iterator for the other crypto functions

69129

+(define_int_iterator CR_code [UNSPEC_VCIPHER

69130

+ UNSPEC_VNCIPHER

69131

+ UNSPEC_VCIPHERLAST

69132

+ UNSPEC_VNCIPHERLAST])

69133

+

69134

+(define_int_attr CR_insn [(UNSPEC_VCIPHER "vcipher")

69135

+ (UNSPEC_VNCIPHER "vncipher")

69136

+ (UNSPEC_VCIPHERLAST "vcipherlast")

69137

+ (UNSPEC_VNCIPHERLAST "vncipherlast")])

69138

+

69139

+;; 2 operand crypto instructions

69140

+(define_insn "crypto_<CR_insn>"

69141

+ [(set (match_operand:V2DI 0 "register_operand" "=v")

69142

+ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "v")

69143

+ (match_operand:V2DI 2 "register_operand" "v")]

69144

+ CR_code))]

69145

+ "TARGET_CRYPTO"

69146

+ "<CR_insn> %0,%1,%2"

69147

+ [(set_attr "type" "crypto")])

69148

+

69149

+(define_insn "crypto_vpmsum<CR_char>"

69150

+ [(set (match_operand:CR_mode 0 "register_operand" "=v")

69151

+ (unspec:CR_mode [(match_operand:CR_mode 1 "register_operand" "v")

69152

+ (match_operand:CR_mode 2 "register_operand" "v")]

69153

+ UNSPEC_VPMSUM))]

69154

+ "TARGET_CRYPTO"

69155

+ "vpmsum<CR_char> %0,%1,%2"

69156

+ [(set_attr "type" "crypto")])

69157

+

69158

+;; 3 operand crypto instructions

69159

+(define_insn "crypto_vpermxor_<mode>"

69160

+ [(set (match_operand:CR_mode 0 "register_operand" "=v")

69161

+ (unspec:CR_mode [(match_operand:CR_mode 1 "register_operand" "v")

69162

+ (match_operand:CR_mode 2 "register_operand" "v")

69163

+ (match_operand:CR_mode 3 "register_operand" "v")]

69164

+ UNSPEC_VPERMXOR))]

69165

+ "TARGET_CRYPTO"

69166

+ "vpermxor %0,%1,%2,%3"

69167

+ [(set_attr "type" "crypto")])

69168

+

69169

+;; 1 operand crypto instruction

69170

+(define_insn "crypto_vsbox"

69171

+ [(set (match_operand:V2DI 0 "register_operand" "=v")

69172

+ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "v")]

69173

+ UNSPEC_VSBOX))]

69174

+ "TARGET_CRYPTO"

69175

+ "vsbox %0,%1"

69176

+ [(set_attr "type" "crypto")])

69177

+

69178

+;; Hash crypto instructions

69179

+(define_insn "crypto_vshasigma<CR_char>"

69180

+ [(set (match_operand:CR_hash 0 "register_operand" "=v")

69181

+ (unspec:CR_hash [(match_operand:CR_hash 1 "register_operand" "v")

69182

+ (match_operand:SI 2 "const_0_to_1_operand" "n")

69183

+ (match_operand:SI 3 "const_0_to_15_operand" "n")]

69184

+ UNSPEC_VSHASIGMA))]

69185

+ "TARGET_CRYPTO"

69186

+ "vshasigma<CR_char> %0,%1,%2,%3"

69187

+ [(set_attr "type" "crypto")])

69188

Index: gcc/config/rs6000/rs6000.md

69189

===================================================================

69190

--- a/src/gcc/config/rs6000/rs6000.md (.../tags/gcc_4_8_2_release)

69191

+++ b/src/gcc/config/rs6000/rs6000.md (.../branches/gcc-4_8-branch)

69192

@@ -25,10 +25,14 @@

69193

;;

69194

69195

(define_constants

69196

- [(STACK_POINTER_REGNUM 1)

69197

+ [(FIRST_GPR_REGNO 0)

69198

+ (STACK_POINTER_REGNUM 1)

69199

(TOC_REGNUM 2)

69200

(STATIC_CHAIN_REGNUM 11)

69201

(HARD_FRAME_POINTER_REGNUM 31)

69202

+ (LAST_GPR_REGNO 31)

69203

+ (FIRST_FPR_REGNO 32)

69204

+ (LAST_FPR_REGNO 63)

69205

(LR_REGNO 65)

69206

(CTR_REGNO 66)

69207

(ARG_POINTER_REGNUM 67)

69208

@@ -49,18 +53,9 @@

69209

(SPE_ACC_REGNO 111)

69210

(SPEFSCR_REGNO 112)

69211

(FRAME_POINTER_REGNUM 113)

69212

-

69213

- ; ABI defined stack offsets for storing the TOC pointer with AIX calls.

69214

- (TOC_SAVE_OFFSET_32BIT 20)

69215

- (TOC_SAVE_OFFSET_64BIT 40)

69216

-

69217

- ; Function TOC offset in the AIX function descriptor.

69218

- (AIX_FUNC_DESC_TOC_32BIT 4)

69219

- (AIX_FUNC_DESC_TOC_64BIT 8)

69220

-

69221

- ; Static chain offset in the AIX function descriptor.

69222

- (AIX_FUNC_DESC_SC_32BIT 8)

69223

- (AIX_FUNC_DESC_SC_64BIT 16)

69224

+ (TFHAR_REGNO 114)

69225

+ (TFIAR_REGNO 115)

69226

+ (TEXASR_REGNO 116)

69227

])

69228

69229

;;

69230

@@ -123,6 +118,12 @@

69231

UNSPEC_LFIWZX

69232

UNSPEC_FCTIWUZ

69233

UNSPEC_GRP_END_NOP

69234

+ UNSPEC_P8V_FMRGOW

69235

+ UNSPEC_P8V_MTVSRWZ

69236

+ UNSPEC_P8V_RELOAD_FROM_GPR

69237

+ UNSPEC_P8V_MTVSRD

69238

+ UNSPEC_P8V_XXPERMDI

69239

+ UNSPEC_P8V_RELOAD_FROM_VSX

69240

])

69241

69242

;;

69243

@@ -142,7 +143,7 @@

69244

69245

;; Define an insn type attribute. This is used in function unit delay

69246

;; computations.

69247

-(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt"

69248

+(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt,crypto,htm"

69249

(const_string "integer"))

69250

69251

;; Define floating point instruction sub-types for use with Xfpu.md

69252

@@ -164,7 +165,7 @@

69253

;; Processor type -- this attribute must exactly match the processor_type

69254

;; enumeration in rs6000.h.

69255

69256

-(define_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,power4,power5,power6,power7,cell,ppca2,titan"

69257

+(define_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,power4,power5,power6,power7,cell,ppca2,titan,power8"

69258

(const (symbol_ref "rs6000_cpu_attr")))

69259

69260

69261

@@ -197,6 +198,7 @@

69262

(include "power5.md")

69263

(include "power6.md")

69264

(include "power7.md")

69265

+(include "power8.md")

69266

(include "cell.md")

69267

(include "xfpu.md")

69268

(include "a2.md")

69269

@@ -215,7 +217,7 @@

69270

(define_mode_iterator GPR [SI (DI "TARGET_POWERPC64")])

69271

69272

; Any supported integer mode.

69273

-(define_mode_iterator INT [QI HI SI DI TI])

69274

+(define_mode_iterator INT [QI HI SI DI TI PTI])

69275

69276

; Any supported integer mode that fits in one register.

69277

(define_mode_iterator INT1 [QI HI SI (DI "TARGET_POWERPC64")])

69278

@@ -223,6 +225,12 @@

69279

; extend modes for DImode

69280

(define_mode_iterator QHSI [QI HI SI])

69281

69282

+; QImode or HImode for small atomic ops

69283

+(define_mode_iterator QHI [QI HI])

69284

+

69285

+; HImode or SImode for sign extended fusion ops

69286

+(define_mode_iterator HSI [HI SI])

69287

+

69288

; SImode or DImode, even if DImode doesn't fit in GPRs.

69289

(define_mode_iterator SDI [SI DI])

69290

69291

@@ -230,6 +238,10 @@

69292

; (one with a '.') will compare; and the size used for arithmetic carries.

69293

(define_mode_iterator P [(SI "TARGET_32BIT") (DI "TARGET_64BIT")])

69294

69295

+; Iterator to add PTImode along with TImode (TImode can go in VSX registers,

69296

+; PTImode is GPR only)

69297

+(define_mode_iterator TI2 [TI PTI])

69298

+

69299

; Any hardware-supported floating-point mode

69300

(define_mode_iterator FP [

69301

(SF "TARGET_HARD_FLOAT

69302

@@ -253,6 +265,50 @@

69303

(V2DF "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DFmode)")

69304

])

69305

69306

+; Floating point move iterators to combine binary and decimal moves

69307

+(define_mode_iterator FMOVE32 [SF SD])

69308

+(define_mode_iterator FMOVE64 [DF DD])

69309

+(define_mode_iterator FMOVE64X [DI DF DD])

69310

+(define_mode_iterator FMOVE128 [(TF "!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128")

69311

+ (TD "TARGET_HARD_FLOAT && TARGET_FPRS")])

69312

+

69313

+; Iterators for 128 bit types for direct move

69314

+(define_mode_iterator FMOVE128_GPR [(TI "TARGET_VSX_TIMODE")

69315

+ (V16QI "")

69316

+ (V8HI "")

69317

+ (V4SI "")

69318

+ (V4SF "")

69319

+ (V2DI "")

69320

+ (V2DF "")

69321

+ (V1TI "")])

69322

+

69323

+; Whether a floating point move is ok, don't allow SD without hardware FP

69324

+(define_mode_attr fmove_ok [(SF "")

69325

+ (DF "")

69326

+ (SD "TARGET_HARD_FLOAT && TARGET_FPRS")

69327

+ (DD "")])

69328

+

69329

+; Convert REAL_VALUE to the appropriate bits

69330

+(define_mode_attr real_value_to_target [(SF "REAL_VALUE_TO_TARGET_SINGLE")

69331

+ (DF "REAL_VALUE_TO_TARGET_DOUBLE")

69332

+ (SD "REAL_VALUE_TO_TARGET_DECIMAL32")

69333

+ (DD "REAL_VALUE_TO_TARGET_DECIMAL64")])

69334

+

69335

+; Definitions for load to 32-bit fpr register

69336

+(define_mode_attr f32_lr [(SF "f") (SD "wz")])

69337

+(define_mode_attr f32_lm [(SF "m") (SD "Z")])

69338

+(define_mode_attr f32_li [(SF "lfs%U1%X1 %0,%1") (SD "lfiwzx %0,%y1")])

69339

+(define_mode_attr f32_lv [(SF "lxsspx %x0,%y1") (SD "lxsiwzx %x0,%y1")])

69340

+

69341

+; Definitions for store from 32-bit fpr register

69342

+(define_mode_attr f32_sr [(SF "f") (SD "wx")])

69343

+(define_mode_attr f32_sm [(SF "m") (SD "Z")])

69344

+(define_mode_attr f32_si [(SF "stfs%U0%X0 %1,%0") (SD "stfiwx %1,%y0")])

69345

+(define_mode_attr f32_sv [(SF "stxsspx %x1,%y0") (SD "stxsiwzx %x1,%y0")])

69346

+

69347

+; Definitions for 32-bit fpr direct move

69348

+(define_mode_attr f32_dm [(SF "wn") (SD "wm")])

69349

+

69350

; These modes do not fit in integer registers in 32-bit mode.

69351

; but on e500v2, the gpr are 64 bit registers

69352

(define_mode_iterator DIFD [DI (DF "!TARGET_E500_DOUBLE") DD])

69353

@@ -263,6 +319,25 @@

69354

; Iterator for just SF/DF

69355

(define_mode_iterator SFDF [SF DF])

69356

69357

+; SF/DF suffix for traditional floating instructions

69358

+(define_mode_attr Ftrad [(SF "s") (DF "")])

69359

+

69360

+; SF/DF suffix for VSX instructions

69361

+(define_mode_attr Fvsx [(SF "sp") (DF "dp")])

69362

+

69363

+; SF/DF constraint for arithmetic on traditional floating point registers

69364

+(define_mode_attr Ff [(SF "f") (DF "d")])

69365

+

69366

+; SF/DF constraint for arithmetic on VSX registers

69367

+(define_mode_attr Fv [(SF "wy") (DF "ws")])

69368

+

69369

+; s/d suffix for things like fp_addsub_s/fp_addsub_d

69370

+(define_mode_attr Fs [(SF "s") (DF "d")])

69371

+

69372

+; FRE/FRES support

69373

+(define_mode_attr Ffre [(SF "fres") (DF "fre")])

69374

+(define_mode_attr FFRE [(SF "FRES") (DF "FRE")])

69375

+

69376

; Conditional returns.

69377

(define_code_iterator any_return [return simple_return])

69378

(define_code_attr return_pred [(return "direct_return ()")

69379

@@ -271,7 +346,14 @@

69380

69381

; Various instructions that come in SI and DI forms.

69382

; A generic w/d attribute, for things like cmpw/cmpd.

69383

-(define_mode_attr wd [(QI "b") (HI "h") (SI "w") (DI "d")])

69384

+(define_mode_attr wd [(QI "b")

69385

+ (HI "h")

69386

+ (SI "w")

69387

+ (DI "d")

69388

+ (V16QI "b")

69389

+ (V8HI "h")

69390

+ (V4SI "w")

69391

+ (V2DI "d")])

69392

69393

; DImode bits

69394

(define_mode_attr dbits [(QI "56") (HI "48") (SI "32")])

69395

@@ -297,6 +379,8 @@

69396

69397

(define_mode_attr rreg [(SF "f")

69398

(DF "ws")

69399

+ (TF "f")

69400

+ (TD "f")

69401

(V4SF "wf")

69402

(V2DF "wd")])

69403

69404

@@ -311,6 +395,83 @@

69405

69406

(define_mode_attr TARGET_FLOAT [(SF "TARGET_SINGLE_FLOAT")

69407

(DF "TARGET_DOUBLE_FLOAT")])

69408

+

69409

+;; Mode iterator for logical operations on 128-bit types

69410

+(define_mode_iterator BOOL_128 [TI

69411

+ PTI

69412

+ (V16QI "TARGET_ALTIVEC")

69413

+ (V8HI "TARGET_ALTIVEC")

69414

+ (V4SI "TARGET_ALTIVEC")

69415

+ (V4SF "TARGET_ALTIVEC")

69416

+ (V2DI "TARGET_ALTIVEC")

69417

+ (V2DF "TARGET_ALTIVEC")

69418

+ (V1TI "TARGET_ALTIVEC")])

69419

+

69420

+;; For the GPRs we use 3 constraints for register outputs, two that are the

69421

+;; same as the output register, and a third where the output register is an

69422

+;; early clobber, so we don't have to deal with register overlaps. For the

69423

+;; vector types, we prefer to use the vector registers. For TI mode, allow

69424

+;; either.

69425

+

69426

+;; Mode attribute for boolean operation register constraints for output

69427

+(define_mode_attr BOOL_REGS_OUTPUT [(TI "&r,r,r,wa,v")

69428

+ (PTI "&r,r,r")

69429

+ (V16QI "wa,v,&?r,?r,?r")

69430

+ (V8HI "wa,v,&?r,?r,?r")

69431

+ (V4SI "wa,v,&?r,?r,?r")

69432

+ (V4SF "wa,v,&?r,?r,?r")

69433

+ (V2DI "wa,v,&?r,?r,?r")

69434

+ (V2DF "wa,v,&?r,?r,?r")

69435

+ (V1TI "wa,v,&?r,?r,?r")])

69436

+

69437

+;; Mode attribute for boolean operation register constraints for operand1

69438

+(define_mode_attr BOOL_REGS_OP1 [(TI "r,0,r,wa,v")

69439

+ (PTI "r,0,r")

69440

+ (V16QI "wa,v,r,0,r")

69441

+ (V8HI "wa,v,r,0,r")

69442

+ (V4SI "wa,v,r,0,r")

69443

+ (V4SF "wa,v,r,0,r")

69444

+ (V2DI "wa,v,r,0,r")

69445

+ (V2DF "wa,v,r,0,r")

69446

+ (V1TI "wa,v,r,0,r")])

69447

+

69448

+;; Mode attribute for boolean operation register constraints for operand2

69449

+(define_mode_attr BOOL_REGS_OP2 [(TI "r,r,0,wa,v")

69450

+ (PTI "r,r,0")

69451

+ (V16QI "wa,v,r,r,0")

69452

+ (V8HI "wa,v,r,r,0")

69453

+ (V4SI "wa,v,r,r,0")

69454

+ (V4SF "wa,v,r,r,0")

69455

+ (V2DI "wa,v,r,r,0")

69456

+ (V2DF "wa,v,r,r,0")

69457

+ (V1TI "wa,v,r,r,0")])

69458

+

69459

+;; Mode attribute for boolean operation register constraints for operand1

69460

+;; for one_cmpl. To simplify things, we repeat the constraint where 0

69461

+;; is used for operand1 or operand2

69462

+(define_mode_attr BOOL_REGS_UNARY [(TI "r,0,0,wa,v")

69463

+ (PTI "r,0,0")

69464

+ (V16QI "wa,v,r,0,0")

69465

+ (V8HI "wa,v,r,0,0")

69466

+ (V4SI "wa,v,r,0,0")

69467

+ (V4SF "wa,v,r,0,0")

69468

+ (V2DI "wa,v,r,0,0")

69469

+ (V2DF "wa,v,r,0,0")

69470

+ (V1TI "wa,v,r,0,0")])

69471

+

69472

+;; Mode attribute for the clobber of CC0 for AND expansion.

69473

+;; For the 128-bit types, we never do AND immediate, but we need to

69474

+;; get the correct number of X's for the number of operands.

69475

+(define_mode_attr BOOL_REGS_AND_CR0 [(TI "X,X,X,X,X")

69476

+ (PTI "X,X,X")

69477

+ (V16QI "X,X,X,X,X")

69478

+ (V8HI "X,X,X,X,X")

69479

+ (V4SI "X,X,X,X,X")

69480

+ (V4SF "X,X,X,X,X")

69481

+ (V2DI "X,X,X,X,X")

69482

+ (V2DF "X,X,X,X,X")

69483

+ (V1TI "X,X,X,X,X")])

69484

+

69485

69486

;; Start with fixed-point load and store insns. Here we put only the more

69487

;; complex forms. Basic data transfer is done later.

69488

@@ -324,11 +485,19 @@

69489

(define_insn "*zero_extend<mode>di2_internal1"

69490

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

69491

(zero_extend:DI (match_operand:QHSI 1 "reg_or_mem_operand" "m,r")))]

69492

- "TARGET_POWERPC64"

69493

+ "TARGET_POWERPC64 && (<MODE>mode != SImode || !TARGET_LFIWZX)"

69494

"@

69495

l<wd>z%U1%X1 %0,%1

69496

rldicl %0,%1,0,<dbits>"

69497

- [(set_attr "type" "load,*")])

69498

+ [(set_attr_alternative "type"

69499

+ [(if_then_else

69500

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69501

+ (const_string "load_ux")

69502

+ (if_then_else

69503

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69504

+ (const_string "load_u")

69505

+ (const_string "load")))

69506

+ (const_string "*")])])

69507

69508

(define_insn "*zero_extend<mode>di2_internal2"

69509

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

69510

@@ -382,6 +551,29 @@

69511

(const_int 0)))]

69512

"")

69513

69514

+(define_insn "*zero_extendsidi2_lfiwzx"

69515

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,??wm,!wz,!wu")

69516

+ (zero_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "m,r,r,Z,Z")))]

69517

+ "TARGET_POWERPC64 && TARGET_LFIWZX"

69518

+ "@

69519

+ lwz%U1%X1 %0,%1

69520

+ rldicl %0,%1,0,32

69521

+ mtvsrwz %x0,%1

69522

+ lfiwzx %0,%y1

69523

+ lxsiwzx %x0,%y1"

69524

+ [(set_attr_alternative "type"

69525

+ [(if_then_else

69526

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69527

+ (const_string "load_ux")

69528

+ (if_then_else

69529

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69530

+ (const_string "load_u")

69531

+ (const_string "load")))

69532

+ (const_string "*")

69533

+ (const_string "mffgpr")

69534

+ (const_string "fpload")

69535

+ (const_string "fpload")])])

69536

+

69537

(define_insn "extendqidi2"

69538

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

69539

(sign_extend:DI (match_operand:QI 1 "gpc_reg_operand" "r")))]

69540

@@ -454,7 +646,15 @@

69541

"@

69542

lha%U1%X1 %0,%1

69543

extsh %0,%1"

69544

- [(set_attr "type" "load_ext,exts")])

69545

+ [(set_attr_alternative "type"

69546

+ [(if_then_else

69547

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69548

+ (const_string "load_ext_ux")

69549

+ (if_then_else

69550

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69551

+ (const_string "load_ext_u")

69552

+ (const_string "load_ext")))

69553

+ (const_string "exts")])])

69554

69555

(define_insn ""

69556

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

69557

@@ -521,16 +721,47 @@

69558

"TARGET_POWERPC64"

69559

"")

69560

69561

-(define_insn ""

69562

+(define_insn "*extendsidi2_lfiwax"

69563

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,??wm,!wl,!wu")

69564

+ (sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r,r,Z,Z")))]

69565

+ "TARGET_POWERPC64 && TARGET_LFIWAX"

69566

+ "@

69567

+ lwa%U1%X1 %0,%1

69568

+ extsw %0,%1

69569

+ mtvsrwa %x0,%1

69570

+ lfiwax %0,%y1

69571

+ lxsiwax %x0,%y1"

69572

+ [(set_attr_alternative "type"

69573

+ [(if_then_else

69574

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69575

+ (const_string "load_ext_ux")

69576

+ (if_then_else

69577

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69578

+ (const_string "load_ext_u")

69579

+ (const_string "load_ext")))

69580

+ (const_string "exts")

69581

+ (const_string "mffgpr")

69582

+ (const_string "fpload")

69583

+ (const_string "fpload")])])

69584

+

69585

+(define_insn "*extendsidi2_nocell"

69586

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

69587

(sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r")))]

69588

- "TARGET_POWERPC64 && rs6000_gen_cell_microcode"

69589

+ "TARGET_POWERPC64 && rs6000_gen_cell_microcode && !TARGET_LFIWAX"

69590

"@

69591

lwa%U1%X1 %0,%1

69592

extsw %0,%1"

69593

- [(set_attr "type" "load_ext,exts")])

69594

+ [(set_attr_alternative "type"

69595

+ [(if_then_else

69596

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69597

+ (const_string "load_ext_ux")

69598

+ (if_then_else

69599

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69600

+ (const_string "load_ext_u")

69601

+ (const_string "load_ext")))

69602

+ (const_string "exts")])])

69603

69604

-(define_insn ""

69605

+(define_insn "*extendsidi2_nocell"

69606

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

69607

(sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" "r")))]

69608

"TARGET_POWERPC64 && !rs6000_gen_cell_microcode"

69609

@@ -602,7 +833,15 @@

69610

"@

69611

lbz%U1%X1 %0,%1

69612

rlwinm %0,%1,0,0xff"

69613

- [(set_attr "type" "load,*")])

69614

+ [(set_attr_alternative "type"

69615

+ [(if_then_else

69616

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69617

+ (const_string "load_ux")

69618

+ (if_then_else

69619

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69620

+ (const_string "load_u")

69621

+ (const_string "load")))

69622

+ (const_string "*")])])

69623

69624

(define_insn ""

69625

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

69626

@@ -722,7 +961,15 @@

69627

"@

69628

lbz%U1%X1 %0,%1

69629

rlwinm %0,%1,0,0xff"

69630

- [(set_attr "type" "load,*")])

69631

+ [(set_attr_alternative "type"

69632

+ [(if_then_else

69633

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69634

+ (const_string "load_ux")

69635

+ (if_then_else

69636

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69637

+ (const_string "load_u")

69638

+ (const_string "load")))

69639

+ (const_string "*")])])

69640

69641

(define_insn ""

69642

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

69643

@@ -848,7 +1095,15 @@

69644

"@

69645

lhz%U1%X1 %0,%1

69646

rlwinm %0,%1,0,0xffff"

69647

- [(set_attr "type" "load,*")])

69648

+ [(set_attr_alternative "type"

69649

+ [(if_then_else

69650

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69651

+ (const_string "load_ux")

69652

+ (if_then_else

69653

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69654

+ (const_string "load_u")

69655

+ (const_string "load")))

69656

+ (const_string "*")])])

69657

69658

(define_insn ""

69659

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

69660

@@ -915,7 +1170,15 @@

69661

"@

69662

lha%U1%X1 %0,%1

69663

extsh %0,%1"

69664

- [(set_attr "type" "load_ext,exts")])

69665

+ [(set_attr_alternative "type"

69666

+ [(if_then_else

69667

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

69668

+ (const_string "load_ext_ux")

69669

+ (if_then_else

69670

+ (match_test "update_address_mem (operands[1], VOIDmode)")

69671

+ (const_string "load_ext_u")

69672

+ (const_string "load_ext")))

69673

+ (const_string "exts")])])

69674

69675

(define_insn ""

69676

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

69677

@@ -1658,7 +1921,19 @@

69678

FAIL;

69679

})

69680

69681

-(define_insn "one_cmpl<mode>2"

69682

+(define_expand "one_cmpl<mode>2"

69683

+ [(set (match_operand:SDI 0 "gpc_reg_operand" "")

69684

+ (not:SDI (match_operand:SDI 1 "gpc_reg_operand" "")))]

69685

+ ""

69686

+{

69687

+ if (<MODE>mode == DImode && !TARGET_POWERPC64)

69688

+ {

69689

+ rs6000_split_logical (operands, NOT, false, false, false, NULL_RTX);

69690

+ DONE;

69691

+ }

69692

+})

69693

+

69694

+(define_insn "*one_cmpl<mode>2"

69695

[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")

69696

(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")))]

69697

""

69698

@@ -1935,7 +2210,9 @@

69699

[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")

69700

(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")] UNSPEC_PARITY))]

69701

"TARGET_CMPB && TARGET_POPCNTB"

69702

- "prty<wd> %0,%1")

69703

+ "prty<wd> %0,%1"

69704

+ [(set_attr "length" "4")

69705

+ (set_attr "type" "popcnt")])

69706

69707

(define_expand "parity<mode>2"

69708

[(set (match_operand:GPR 0 "gpc_reg_operand" "")

69709

@@ -2412,7 +2689,7 @@

69710

(match_operand:SI 2 "gpc_reg_operand" "r,r"))

69711

(const_int 0)))

69712

(clobber (match_scratch:SI 3 "=r,r"))]

69713

- ""

69714

+ "TARGET_32BIT"

69715

"@

69716

mullw. %3,%1,%2

69717

#"

69718

@@ -2425,7 +2702,7 @@

69719

(match_operand:SI 2 "gpc_reg_operand" ""))

69720

(const_int 0)))

69721

(clobber (match_scratch:SI 3 ""))]

69722

- "reload_completed"

69723

+ "TARGET_32BIT && reload_completed"

69724

[(set (match_dup 3)

69725

(mult:SI (match_dup 1) (match_dup 2)))

69726

(set (match_dup 0)

69727

@@ -2440,7 +2717,7 @@

69728

(const_int 0)))

69729

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

69730

(mult:SI (match_dup 1) (match_dup 2)))]

69731

- ""

69732

+ "TARGET_32BIT"

69733

"@

69734

mullw. %0,%1,%2

69735

#"

69736

@@ -2454,7 +2731,7 @@

69737

(const_int 0)))

69738

(set (match_operand:SI 0 "gpc_reg_operand" "")

69739

(mult:SI (match_dup 1) (match_dup 2)))]

69740

- "reload_completed"

69741

+ "TARGET_32BIT && reload_completed"

69742

[(set (match_dup 0)

69743

(mult:SI (match_dup 1) (match_dup 2)))

69744

(set (match_dup 3)

69745

@@ -3698,13 +3975,13 @@

69746

(const_int 0)))]

69747

"")

69748

69749

-(define_insn "*rotlsi3_internal7"

69750

+(define_insn "*rotlsi3_internal7le"

69751

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

69752

(zero_extend:SI

69753

(subreg:QI

69754

(rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r")

69755

(match_operand:SI 2 "reg_or_cint_operand" "ri")) 0)))]

69756

- ""

69757

+ "!BYTES_BIG_ENDIAN"

69758

"rlw%I2nm %0,%1,%h2,0xff"

69759

[(set (attr "cell_micro")

69760

(if_then_else (match_operand:SI 2 "const_int_operand" "")

69761

@@ -3711,7 +3988,20 @@

69762

(const_string "not")

69763

(const_string "always")))])

69764

69765

-(define_insn "*rotlsi3_internal8"

69766

+(define_insn "*rotlsi3_internal7be"

69767

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

69768

+ (zero_extend:SI

69769

+ (subreg:QI

69770

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r")

69771

+ (match_operand:SI 2 "reg_or_cint_operand" "ri")) 3)))]

69772

+ "BYTES_BIG_ENDIAN"

69773

+ "rlw%I2nm %0,%1,%h2,0xff"

69774

+ [(set (attr "cell_micro")

69775

+ (if_then_else (match_operand:SI 2 "const_int_operand" "")

69776

+ (const_string "not")

69777

+ (const_string "always")))])

69778

+

69779

+(define_insn "*rotlsi3_internal8le"

69780

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

69781

(compare:CC (zero_extend:SI

69782

(subreg:QI

69783

@@ -3719,7 +4009,7 @@

69784

(match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

69785

(const_int 0)))

69786

(clobber (match_scratch:SI 3 "=r,r,r,r"))]

69787

- ""

69788

+ "!BYTES_BIG_ENDIAN"

69789

"@

69790

rlwnm. %3,%1,%2,0xff

69791

rlwinm. %3,%1,%h2,0xff

69792

@@ -3728,6 +4018,23 @@

69793

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

69794

(set_attr "length" "4,4,8,8")])

69795

69796

+(define_insn "*rotlsi3_internal8be"

69797

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

69798

+ (compare:CC (zero_extend:SI

69799

+ (subreg:QI

69800

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

69801

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 3))

69802

+ (const_int 0)))

69803

+ (clobber (match_scratch:SI 3 "=r,r,r,r"))]

69804

+ "BYTES_BIG_ENDIAN"

69805

+ "@

69806

+ rlwnm. %3,%1,%2,0xff

69807

+ rlwinm. %3,%1,%h2,0xff

69808

+ #

69809

+ #"

69810

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

69811

+ (set_attr "length" "4,4,8,8")])

69812

+

69813

(define_split

69814

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

69815

(compare:CC (zero_extend:SI

69816

@@ -3736,7 +4043,7 @@

69817

(match_operand:SI 2 "reg_or_cint_operand" "")) 0))

69818

(const_int 0)))

69819

(clobber (match_scratch:SI 3 ""))]

69820

- "reload_completed"

69821

+ "!BYTES_BIG_ENDIAN && reload_completed"

69822

[(set (match_dup 3)

69823

(zero_extend:SI (subreg:QI

69824

(rotate:SI (match_dup 1)

69825

@@ -3746,7 +4053,25 @@

69826

(const_int 0)))]

69827

"")

69828

69829

-(define_insn "*rotlsi3_internal9"

69830

+(define_split

69831

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

69832

+ (compare:CC (zero_extend:SI

69833

+ (subreg:QI

69834

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

69835

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 3))

69836

+ (const_int 0)))

69837

+ (clobber (match_scratch:SI 3 ""))]

69838

+ "BYTES_BIG_ENDIAN && reload_completed"

69839

+ [(set (match_dup 3)

69840

+ (zero_extend:SI (subreg:QI

69841

+ (rotate:SI (match_dup 1)

69842

+ (match_dup 2)) 3)))

69843

+ (set (match_dup 0)

69844

+ (compare:CC (match_dup 3)

69845

+ (const_int 0)))]

69846

+ "")

69847

+

69848

+(define_insn "*rotlsi3_internal9le"

69849

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

69850

(compare:CC (zero_extend:SI

69851

(subreg:QI

69852

@@ -3755,7 +4080,7 @@

69853

(const_int 0)))

69854

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

69855

(zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

69856

- ""

69857

+ "!BYTES_BIG_ENDIAN"

69858

"@

69859

rlwnm. %0,%1,%2,0xff

69860

rlwinm. %0,%1,%h2,0xff

69861

@@ -3764,6 +4089,24 @@

69862

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

69863

(set_attr "length" "4,4,8,8")])

69864

69865

+(define_insn "*rotlsi3_internal9be"

69866

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

69867

+ (compare:CC (zero_extend:SI

69868

+ (subreg:QI

69869

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

69870

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 3))

69871

+ (const_int 0)))

69872

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

69873

+ (zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 3)))]

69874

+ "BYTES_BIG_ENDIAN"

69875

+ "@

69876

+ rlwnm. %0,%1,%2,0xff

69877

+ rlwinm. %0,%1,%h2,0xff

69878

+ #

69879

+ #"

69880

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

69881

+ (set_attr "length" "4,4,8,8")])

69882

+

69883

(define_split

69884

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

69885

(compare:CC (zero_extend:SI

69886

@@ -3773,7 +4116,7 @@

69887

(const_int 0)))

69888

(set (match_operand:SI 0 "gpc_reg_operand" "")

69889

(zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

69890

- "reload_completed"

69891

+ "!BYTES_BIG_ENDIAN && reload_completed"

69892

[(set (match_dup 0)

69893

(zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 0)))

69894

(set (match_dup 3)

69895

@@ -3781,20 +4124,48 @@

69896

(const_int 0)))]

69897

"")

69898

69899

-(define_insn "*rotlsi3_internal10"

69900

+(define_split

69901

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

69902

+ (compare:CC (zero_extend:SI

69903

+ (subreg:QI

69904

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

69905

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 3))

69906

+ (const_int 0)))

69907

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

69908

+ (zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 3)))]

69909

+ "BYTES_BIG_ENDIAN && reload_completed"

69910

+ [(set (match_dup 0)

69911

+ (zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 3)))

69912

+ (set (match_dup 3)

69913

+ (compare:CC (match_dup 0)

69914

+ (const_int 0)))]

69915

+ "")

69916

+

69917

+(define_insn "*rotlsi3_internal10le"

69918

[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

69919

(zero_extend:SI

69920

(subreg:HI

69921

(rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

69922

(match_operand:SI 2 "reg_or_cint_operand" "r,i")) 0)))]

69923

- ""

69924

+ "!BYTES_BIG_ENDIAN"

69925

"@

69926

rlwnm %0,%1,%2,0xffff

69927

rlwinm %0,%1,%h2,0xffff"

69928

[(set_attr "type" "var_shift_rotate,integer")])

69929

69930

+(define_insn "*rotlsi3_internal10be"

69931

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

69932

+ (zero_extend:SI

69933

+ (subreg:HI

69934

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

69935

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i")) 2)))]

69936

+ "BYTES_BIG_ENDIAN"

69937

+ "@

69938

+ rlwnm %0,%1,%2,0xffff

69939

+ rlwinm %0,%1,%h2,0xffff"

69940

+ [(set_attr "type" "var_shift_rotate,integer")])

69941

69942

-(define_insn "*rotlsi3_internal11"

69943

+(define_insn "*rotlsi3_internal11le"

69944

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

69945

(compare:CC (zero_extend:SI

69946

(subreg:HI

69947

@@ -3802,7 +4173,7 @@

69948

(match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

69949

(const_int 0)))

69950

(clobber (match_scratch:SI 3 "=r,r,r,r"))]

69951

- ""

69952

+ "!BYTES_BIG_ENDIAN"

69953

"@

69954

rlwnm. %3,%1,%2,0xffff

69955

rlwinm. %3,%1,%h2,0xffff

69956

@@ -3811,6 +4182,23 @@

69957

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

69958

(set_attr "length" "4,4,8,8")])

69959

69960

+(define_insn "*rotlsi3_internal11be"

69961

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

69962

+ (compare:CC (zero_extend:SI

69963

+ (subreg:HI

69964

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

69965

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 2))

69966

+ (const_int 0)))

69967

+ (clobber (match_scratch:SI 3 "=r,r,r,r"))]

69968

+ "BYTES_BIG_ENDIAN"

69969

+ "@

69970

+ rlwnm. %3,%1,%2,0xffff

69971

+ rlwinm. %3,%1,%h2,0xffff

69972

+ #

69973

+ #"

69974

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

69975

+ (set_attr "length" "4,4,8,8")])

69976

+

69977

(define_split

69978

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

69979

(compare:CC (zero_extend:SI

69980

@@ -3819,7 +4207,7 @@

69981

(match_operand:SI 2 "reg_or_cint_operand" "")) 0))

69982

(const_int 0)))

69983

(clobber (match_scratch:SI 3 ""))]

69984

- "reload_completed"

69985

+ "!BYTES_BIG_ENDIAN && reload_completed"

69986

[(set (match_dup 3)

69987

(zero_extend:SI (subreg:HI

69988

(rotate:SI (match_dup 1)

69989

@@ -3829,7 +4217,25 @@

69990

(const_int 0)))]

69991

"")

69992

69993

-(define_insn "*rotlsi3_internal12"

69994

+(define_split

69995

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

69996

+ (compare:CC (zero_extend:SI

69997

+ (subreg:HI

69998

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

69999

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 2))

70000

+ (const_int 0)))

70001

+ (clobber (match_scratch:SI 3 ""))]

70002

+ "BYTES_BIG_ENDIAN && reload_completed"

70003

+ [(set (match_dup 3)

70004

+ (zero_extend:SI (subreg:HI

70005

+ (rotate:SI (match_dup 1)

70006

+ (match_dup 2)) 2)))

70007

+ (set (match_dup 0)

70008

+ (compare:CC (match_dup 3)

70009

+ (const_int 0)))]

70010

+ "")

70011

+

70012

+(define_insn "*rotlsi3_internal12le"

70013

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

70014

(compare:CC (zero_extend:SI

70015

(subreg:HI

70016

@@ -3838,7 +4244,7 @@

70017

(const_int 0)))

70018

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

70019

(zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

70020

- ""

70021

+ "!BYTES_BIG_ENDIAN"

70022

"@

70023

rlwnm. %0,%1,%2,0xffff

70024

rlwinm. %0,%1,%h2,0xffff

70025

@@ -3847,6 +4253,24 @@

70026

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

70027

(set_attr "length" "4,4,8,8")])

70028

70029

+(define_insn "*rotlsi3_internal12be"

70030

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

70031

+ (compare:CC (zero_extend:SI

70032

+ (subreg:HI

70033

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

70034

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 2))

70035

+ (const_int 0)))

70036

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

70037

+ (zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 2)))]

70038

+ "BYTES_BIG_ENDIAN"

70039

+ "@

70040

+ rlwnm. %0,%1,%2,0xffff

70041

+ rlwinm. %0,%1,%h2,0xffff

70042

+ #

70043

+ #"

70044

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

70045

+ (set_attr "length" "4,4,8,8")])

70046

+

70047

(define_split

70048

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

70049

(compare:CC (zero_extend:SI

70050

@@ -3856,7 +4280,7 @@

70051

(const_int 0)))

70052

(set (match_operand:SI 0 "gpc_reg_operand" "")

70053

(zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

70054

- "reload_completed"

70055

+ "!BYTES_BIG_ENDIAN && reload_completed"

70056

[(set (match_dup 0)

70057

(zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 0)))

70058

(set (match_dup 3)

70059

@@ -3864,6 +4288,23 @@

70060

(const_int 0)))]

70061

"")

70062

70063

+(define_split

70064

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

70065

+ (compare:CC (zero_extend:SI

70066

+ (subreg:HI

70067

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

70068

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 2))

70069

+ (const_int 0)))

70070

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

70071

+ (zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 2)))]

70072

+ "BYTES_BIG_ENDIAN && reload_completed"

70073

+ [(set (match_dup 0)

70074

+ (zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 2)))

70075

+ (set (match_dup 3)

70076

+ (compare:CC (match_dup 0)

70077

+ (const_int 0)))]

70078

+ "")

70079

+

70080

(define_insn "ashlsi3"

70081

[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

70082

(ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

70083

@@ -4054,7 +4495,7 @@

70084

#

70085

#

70086

#"

70087

- [(set_attr "type" "delayed_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

70088

+ [(set_attr "type" "fast_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

70089

(set_attr "length" "4,4,4,8,8,8")])

70090

70091

(define_split

70092

@@ -4086,7 +4527,7 @@

70093

#

70094

#

70095

#"

70096

- [(set_attr "type" "delayed_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

70097

+ [(set_attr "type" "fast_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

70098

(set_attr "length" "4,4,4,8,8,8")])

70099

70100

(define_split

70101

@@ -4177,16 +4618,25 @@

70102

(const_int 0)))]

70103

"")

70104

70105

-(define_insn ""

70106

+(define_insn "*lshiftrt_internal1le"

70107

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

70108

(zero_extend:SI

70109

(subreg:QI

70110

(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

70111

(match_operand:SI 2 "const_int_operand" "i")) 0)))]

70112

- "includes_rshift_p (operands[2], GEN_INT (255))"

70113

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

70114

"rlwinm %0,%1,%s2,0xff")

70115

70116

-(define_insn ""

70117

+(define_insn "*lshiftrt_internal1be"

70118

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

70119

+ (zero_extend:SI

70120

+ (subreg:QI

70121

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

70122

+ (match_operand:SI 2 "const_int_operand" "i")) 3)))]

70123

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

70124

+ "rlwinm %0,%1,%s2,0xff")

70125

+

70126

+(define_insn "*lshiftrt_internal2le"

70127

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

70128

(compare:CC

70129

(zero_extend:SI

70130

@@ -4195,7 +4645,7 @@

70131

(match_operand:SI 2 "const_int_operand" "i,i")) 0))

70132

(const_int 0)))

70133

(clobber (match_scratch:SI 3 "=r,r"))]

70134

- "includes_rshift_p (operands[2], GEN_INT (255))"

70135

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

70136

"@

70137

rlwinm. %3,%1,%s2,0xff

70138

#"

70139

@@ -4202,6 +4652,22 @@

70140

[(set_attr "type" "delayed_compare")

70141

(set_attr "length" "4,8")])

70142

70143

+(define_insn "*lshiftrt_internal2be"

70144

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

70145

+ (compare:CC

70146

+ (zero_extend:SI

70147

+ (subreg:QI

70148

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

70149

+ (match_operand:SI 2 "const_int_operand" "i,i")) 3))

70150

+ (const_int 0)))

70151

+ (clobber (match_scratch:SI 3 "=r,r"))]

70152

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

70153

+ "@

70154

+ rlwinm. %3,%1,%s2,0xff

70155

+ #"

70156

+ [(set_attr "type" "delayed_compare")

70157

+ (set_attr "length" "4,8")])

70158

+

70159

(define_split

70160

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

70161

(compare:CC

70162

@@ -4211,7 +4677,7 @@

70163

(match_operand:SI 2 "const_int_operand" "")) 0))

70164

(const_int 0)))

70165

(clobber (match_scratch:SI 3 ""))]

70166

- "includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

70167

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

70168

[(set (match_dup 3)

70169

(zero_extend:SI (subreg:QI

70170

(lshiftrt:SI (match_dup 1)

70171

@@ -4221,7 +4687,26 @@

70172

(const_int 0)))]

70173

"")

70174

70175

-(define_insn ""

70176

+(define_split

70177

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

70178

+ (compare:CC

70179

+ (zero_extend:SI

70180

+ (subreg:QI

70181

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

70182

+ (match_operand:SI 2 "const_int_operand" "")) 3))

70183

+ (const_int 0)))

70184

+ (clobber (match_scratch:SI 3 ""))]

70185

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

70186

+ [(set (match_dup 3)

70187

+ (zero_extend:SI (subreg:QI

70188

+ (lshiftrt:SI (match_dup 1)

70189

+ (match_dup 2)) 3)))

70190

+ (set (match_dup 0)

70191

+ (compare:CC (match_dup 3)

70192

+ (const_int 0)))]

70193

+ "")

70194

+

70195

+(define_insn "*lshiftrt_internal3le"

70196

[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

70197

(compare:CC

70198

(zero_extend:SI

70199

@@ -4231,7 +4716,7 @@

70200

(const_int 0)))

70201

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

70202

(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

70203

- "includes_rshift_p (operands[2], GEN_INT (255))"

70204

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

70205

"@

70206

rlwinm. %0,%1,%s2,0xff

70207

#"

70208

@@ -4238,6 +4723,23 @@

70209

[(set_attr "type" "delayed_compare")

70210

(set_attr "length" "4,8")])

70211

70212

+(define_insn "*lshiftrt_internal3be"

70213

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

70214

+ (compare:CC

70215

+ (zero_extend:SI

70216

+ (subreg:QI

70217

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

70218

+ (match_operand:SI 2 "const_int_operand" "i,i")) 3))

70219

+ (const_int 0)))

70220

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

70221

+ (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 3)))]

70222

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

70223

+ "@

70224

+ rlwinm. %0,%1,%s2,0xff

70225

+ #"

70226

+ [(set_attr "type" "delayed_compare")

70227

+ (set_attr "length" "4,8")])

70228

+

70229

(define_split

70230

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

70231

(compare:CC

70232

@@ -4248,7 +4750,7 @@

70233

(const_int 0)))

70234

(set (match_operand:SI 0 "gpc_reg_operand" "")

70235

(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

70236

- "includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

70237

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

70238

[(set (match_dup 0)

70239

(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))

70240

(set (match_dup 3)

70241

@@ -4256,16 +4758,43 @@

70242

(const_int 0)))]

70243

"")

70244

70245

-(define_insn ""

70246

+(define_split

70247

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

70248

+ (compare:CC

70249

+ (zero_extend:SI

70250

+ (subreg:QI

70251

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

70252

+ (match_operand:SI 2 "const_int_operand" "")) 3))

70253

+ (const_int 0)))

70254

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

70255

+ (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 3)))]

70256

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

70257

+ [(set (match_dup 0)

70258

+ (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 3)))

70259

+ (set (match_dup 3)

70260

+ (compare:CC (match_dup 0)

70261

+ (const_int 0)))]

70262

+ "")

70263

+

70264

+(define_insn "*lshiftrt_internal4le"

70265

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

70266

(zero_extend:SI

70267

(subreg:HI

70268

(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

70269

(match_operand:SI 2 "const_int_operand" "i")) 0)))]

70270

- "includes_rshift_p (operands[2], GEN_INT (65535))"

70271

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

70272

"rlwinm %0,%1,%s2,0xffff")

70273

70274

-(define_insn ""

70275

+(define_insn "*lshiftrt_internal4be"

70276

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

70277

+ (zero_extend:SI

70278

+ (subreg:HI

70279

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

70280

+ (match_operand:SI 2 "const_int_operand" "i")) 2)))]

70281

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

70282

+ "rlwinm %0,%1,%s2,0xffff")

70283

+

70284

+(define_insn "*lshiftrt_internal5le"

70285

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

70286

(compare:CC

70287

(zero_extend:SI

70288

@@ -4274,7 +4803,7 @@

70289

(match_operand:SI 2 "const_int_operand" "i,i")) 0))

70290

(const_int 0)))

70291

(clobber (match_scratch:SI 3 "=r,r"))]

70292

- "includes_rshift_p (operands[2], GEN_INT (65535))"

70293

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

70294

"@

70295

rlwinm. %3,%1,%s2,0xffff

70296

#"

70297

@@ -4281,6 +4810,22 @@

70298

[(set_attr "type" "delayed_compare")

70299

(set_attr "length" "4,8")])

70300

70301

+(define_insn "*lshiftrt_internal5be"

70302

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

70303

+ (compare:CC

70304

+ (zero_extend:SI

70305

+ (subreg:HI

70306

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

70307

+ (match_operand:SI 2 "const_int_operand" "i,i")) 2))

70308

+ (const_int 0)))

70309

+ (clobber (match_scratch:SI 3 "=r,r"))]

70310

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

70311

+ "@

70312

+ rlwinm. %3,%1,%s2,0xffff

70313

+ #"

70314

+ [(set_attr "type" "delayed_compare")

70315

+ (set_attr "length" "4,8")])

70316

+

70317

(define_split

70318

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

70319

(compare:CC

70320

@@ -4290,7 +4835,7 @@

70321

(match_operand:SI 2 "const_int_operand" "")) 0))

70322

(const_int 0)))

70323

(clobber (match_scratch:SI 3 ""))]

70324

- "includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

70325

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

70326

[(set (match_dup 3)

70327

(zero_extend:SI (subreg:HI

70328

(lshiftrt:SI (match_dup 1)

70329

@@ -4300,7 +4845,26 @@

70330

(const_int 0)))]

70331

"")

70332

70333

-(define_insn ""

70334

+(define_split

70335

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

70336

+ (compare:CC

70337

+ (zero_extend:SI

70338

+ (subreg:HI

70339

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

70340

+ (match_operand:SI 2 "const_int_operand" "")) 2))

70341

+ (const_int 0)))

70342

+ (clobber (match_scratch:SI 3 ""))]

70343

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

70344

+ [(set (match_dup 3)

70345

+ (zero_extend:SI (subreg:HI

70346

+ (lshiftrt:SI (match_dup 1)

70347

+ (match_dup 2)) 2)))

70348

+ (set (match_dup 0)

70349

+ (compare:CC (match_dup 3)

70350

+ (const_int 0)))]

70351

+ "")

70352

+

70353

+(define_insn "*lshiftrt_internal5le"

70354

[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

70355

(compare:CC

70356

(zero_extend:SI

70357

@@ -4310,7 +4874,7 @@

70358

(const_int 0)))

70359

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

70360

(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

70361

- "includes_rshift_p (operands[2], GEN_INT (65535))"

70362

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

70363

"@

70364

rlwinm. %0,%1,%s2,0xffff

70365

#"

70366

@@ -4317,6 +4881,23 @@

70367

[(set_attr "type" "delayed_compare")

70368

(set_attr "length" "4,8")])

70369

70370

+(define_insn "*lshiftrt_internal5be"

70371

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

70372

+ (compare:CC

70373

+ (zero_extend:SI

70374

+ (subreg:HI

70375

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

70376

+ (match_operand:SI 2 "const_int_operand" "i,i")) 2))

70377

+ (const_int 0)))

70378

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

70379

+ (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 2)))]

70380

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

70381

+ "@

70382

+ rlwinm. %0,%1,%s2,0xffff

70383

+ #"

70384

+ [(set_attr "type" "delayed_compare")

70385

+ (set_attr "length" "4,8")])

70386

+

70387

(define_split

70388

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

70389

(compare:CC

70390

@@ -4327,7 +4908,7 @@

70391

(const_int 0)))

70392

(set (match_operand:SI 0 "gpc_reg_operand" "")

70393

(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

70394

- "includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

70395

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

70396

[(set (match_dup 0)

70397

(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))

70398

(set (match_dup 3)

70399

@@ -4335,6 +4916,24 @@

70400

(const_int 0)))]

70401

"")

70402

70403

+(define_split

70404

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

70405

+ (compare:CC

70406

+ (zero_extend:SI

70407

+ (subreg:HI

70408

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

70409

+ (match_operand:SI 2 "const_int_operand" "")) 2))

70410

+ (const_int 0)))

70411

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

70412

+ (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 2)))]

70413

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

70414

+ [(set (match_dup 0)

70415

+ (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 2)))

70416

+ (set (match_dup 3)

70417

+ (compare:CC (match_dup 0)

70418

+ (const_int 0)))]

70419

+ "")

70420

+

70421

(define_insn "ashrsi3"

70422

[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

70423

(ashiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

70424

@@ -4455,224 +5054,226 @@

70425

(const_int 0)))]

70426

"")

70427

70428

-;; Floating-point insns, excluding normal data motion.

70429

-;;

70430

-;; PowerPC has a full set of single-precision floating point instructions.

70431

-;;

70432

-;; For the POWER architecture, we pretend that we have both SFmode and

70433

-;; DFmode insns, while, in fact, all fp insns are actually done in double.

70434

-;; The only conversions we will do will be when storing to memory. In that

70435

-;; case, we will use the "frsp" instruction before storing.

70436

-;;

70437

-;; Note that when we store into a single-precision memory location, we need to

70438

-;; use the frsp insn first. If the register being stored isn't dead, we

70439

-;; need a scratch register for the frsp. But this is difficult when the store

70440

-;; is done by reload. It is not incorrect to do the frsp on the register in

70441

-;; this case, we just lose precision that we would have otherwise gotten but

70442

-;; is not guaranteed. Perhaps this should be tightened up at some point.

70443

+

70444

+;; Floating-point insns, excluding normal data motion. We combine the SF/DF

70445

+;; modes here, and also add in conditional vsx/power8-vector support to access

70446

+;; values in the traditional Altivec registers if the appropriate

70447

+;; -mupper-regs-{df,sf} option is enabled.

70448

70449

-(define_expand "extendsfdf2"

70450

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

70451

- (float_extend:DF (match_operand:SF 1 "reg_or_none500mem_operand" "")))]

70452

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

70453

+(define_expand "abs<mode>2"

70454

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70455

+ (abs:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")))]

70456

+ "TARGET_<MODE>_INSN"

70457

"")

70458

70459

-(define_insn_and_split "*extendsfdf2_fpr"

70460

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d,d")

70461

- (float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m")))]

70462

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

70463

+(define_insn "*abs<mode>2_fpr"

70464

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70465

+ (abs:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")))]

70466

+ "TARGET_<MODE>_FPR"

70467

"@

70468

- #

70469

- fmr %0,%1

70470

- lfs%U1%X1 %0,%1"

70471

- "&& reload_completed && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1])"

70472

- [(const_int 0)]

70473

-{

70474

- emit_note (NOTE_INSN_DELETED);

70475

- DONE;

70476

-}

70477

- [(set_attr "type" "fp,fp,fpload")])

70478

+ fabs %0,%1

70479

+ xsabsdp %x0,%x1"

70480

+ [(set_attr "type" "fp")

70481

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

70482

70483

-(define_expand "truncdfsf2"

70484

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70485

- (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "")))]

70486

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

70487

- "")

70488

+(define_insn "*nabs<mode>2_fpr"

70489

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70490

+ (neg:SFDF

70491

+ (abs:SFDF

70492

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>"))))]

70493

+ "TARGET_<MODE>_FPR"

70494

+ "@

70495

+ fnabs %0,%1

70496

+ xsnabsdp %x0,%x1"

70497

+ [(set_attr "type" "fp")

70498

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

70499

70500

-(define_insn "*truncdfsf2_fpr"

70501

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70502

- (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "d")))]

70503

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

70504

- "frsp %0,%1"

70505

- [(set_attr "type" "fp")])

70506

-

70507

-(define_expand "negsf2"

70508

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70509

- (neg:SF (match_operand:SF 1 "gpc_reg_operand" "")))]

70510

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

70511

+(define_expand "neg<mode>2"

70512

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70513

+ (neg:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")))]

70514

+ "TARGET_<MODE>_INSN"

70515

"")

70516

70517

-(define_insn "*negsf2"

70518

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70519

- (neg:SF (match_operand:SF 1 "gpc_reg_operand" "f")))]

70520

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70521

- "fneg %0,%1"

70522

- [(set_attr "type" "fp")])

70523

+(define_insn "*neg<mode>2_fpr"

70524

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70525

+ (neg:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")))]

70526

+ "TARGET_<MODE>_FPR"

70527

+ "@

70528

+ fneg %0,%1

70529

+ xsnegdp %x0,%x1"

70530

+ [(set_attr "type" "fp")

70531

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

70532

70533

-(define_expand "abssf2"

70534

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70535

- (abs:SF (match_operand:SF 1 "gpc_reg_operand" "")))]

70536

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

70537

+(define_expand "add<mode>3"

70538

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70539

+ (plus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

70540

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

70541

+ "TARGET_<MODE>_INSN"

70542

"")

70543

70544

-(define_insn "*abssf2"

70545

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70546

- (abs:SF (match_operand:SF 1 "gpc_reg_operand" "f")))]

70547

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70548

- "fabs %0,%1"

70549

- [(set_attr "type" "fp")])

70550

+(define_insn "*add<mode>3_fpr"

70551

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70552

+ (plus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

70553

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

70554

+ "TARGET_<MODE>_FPR"

70555

+ "@

70556

+ fadd<Ftrad> %0,%1,%2

70557

+ xsadd<Fvsx> %x0,%x1,%x2"

70558

+ [(set_attr "type" "fp")

70559

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

70560

70561

-(define_insn ""

70562

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70563

- (neg:SF (abs:SF (match_operand:SF 1 "gpc_reg_operand" "f"))))]

70564

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70565

- "fnabs %0,%1"

70566

- [(set_attr "type" "fp")])

70567

-

70568

-(define_expand "addsf3"

70569

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70570

- (plus:SF (match_operand:SF 1 "gpc_reg_operand" "")

70571

- (match_operand:SF 2 "gpc_reg_operand" "")))]

70572

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

70573

+(define_expand "sub<mode>3"

70574

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70575

+ (minus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

70576

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

70577

+ "TARGET_<MODE>_INSN"

70578

"")

70579

70580

-(define_insn ""

70581

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70582

- (plus:SF (match_operand:SF 1 "gpc_reg_operand" "%f")

70583

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

70584

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70585

- "fadds %0,%1,%2"

70586

+(define_insn "*sub<mode>3_fpr"

70587

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70588

+ (minus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

70589

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

70590

+ "TARGET_<MODE>_FPR"

70591

+ "@

70592

+ fsub<Ftrad> %0,%1,%2

70593

+ xssub<Fvsx> %x0,%x1,%x2"

70594

[(set_attr "type" "fp")

70595

- (set_attr "fp_type" "fp_addsub_s")])

70596

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

70597

70598

-(define_expand "subsf3"

70599

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70600

- (minus:SF (match_operand:SF 1 "gpc_reg_operand" "")

70601

- (match_operand:SF 2 "gpc_reg_operand" "")))]

70602

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

70603

+(define_expand "mul<mode>3"

70604

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70605

+ (mult:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

70606

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

70607

+ "TARGET_<MODE>_INSN"

70608

"")

70609

70610

-(define_insn ""

70611

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70612

- (minus:SF (match_operand:SF 1 "gpc_reg_operand" "f")

70613

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

70614

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70615

- "fsubs %0,%1,%2"

70616

- [(set_attr "type" "fp")

70617

- (set_attr "fp_type" "fp_addsub_s")])

70618

+(define_insn "*mul<mode>3_fpr"

70619

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70620

+ (mult:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

70621

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

70622

+ "TARGET_<MODE>_FPR"

70623

+ "@

70624

+ fmul<Ftrad> %0,%1,%2

70625

+ xsmul<Fvsx> %x0,%x1,%x2"

70626

+ [(set_attr "type" "dmul")

70627

+ (set_attr "fp_type" "fp_mul_<Fs>")])

70628

70629

-(define_expand "mulsf3"

70630

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70631

- (mult:SF (match_operand:SF 1 "gpc_reg_operand" "")

70632

- (match_operand:SF 2 "gpc_reg_operand" "")))]

70633

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

70634

+(define_expand "div<mode>3"

70635

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70636

+ (div:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

70637

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

70638

+ "TARGET_<MODE>_INSN && !TARGET_SIMPLE_FPU"

70639

"")

70640

70641

-(define_insn ""

70642

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70643

- (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")

70644

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

70645

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70646

- "fmuls %0,%1,%2"

70647

- [(set_attr "type" "fp")

70648

- (set_attr "fp_type" "fp_mul_s")])

70649

+(define_insn "*div<mode>3_fpr"

70650

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70651

+ (div:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

70652

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

70653

+ "TARGET_<MODE>_FPR && !TARGET_SIMPLE_FPU"

70654

+ "@

70655

+ fdiv<Ftrad> %0,%1,%2

70656

+ xsdiv<Fvsx> %x0,%x1,%x2"

70657

+ [(set_attr "type" "<Fs>div")

70658

+ (set_attr "fp_type" "fp_div_<Fs>")])

70659

70660

-(define_expand "divsf3"

70661

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70662

- (div:SF (match_operand:SF 1 "gpc_reg_operand" "")

70663

- (match_operand:SF 2 "gpc_reg_operand" "")))]

70664

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT && !TARGET_SIMPLE_FPU"

70665

- "")

70666

+(define_insn "sqrt<mode>2"

70667

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70668

+ (sqrt:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")))]

70669

+ "TARGET_<MODE>_FPR && !TARGET_SIMPLE_FPU

70670

+ && (TARGET_PPC_GPOPT || (<MODE>mode == SFmode && TARGET_XILINX_FPU))"

70671

+ "@

70672

+ fsqrt<Ftrad> %0,%1

70673

+ xssqrt<Fvsx> %x0,%x1"

70674

+ [(set_attr "type" "<Fs>sqrt")

70675

+ (set_attr "fp_type" "fp_sqrt_<Fs>")])

70676

70677

-(define_insn ""

70678

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70679

- (div:SF (match_operand:SF 1 "gpc_reg_operand" "f")

70680

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

70681

- "TARGET_HARD_FLOAT && TARGET_FPRS

70682

- && TARGET_SINGLE_FLOAT && !TARGET_SIMPLE_FPU"

70683

- "fdivs %0,%1,%2"

70684

- [(set_attr "type" "sdiv")])

70685

+;; Floating point reciprocal approximation

70686

+(define_insn "fre<Fs>"

70687

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70688

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

70689

+ UNSPEC_FRES))]

70690

+ "TARGET_<FFRE>"

70691

+ "@

70692

+ fre<Ftrad> %0,%1

70693

+ xsre<Fvsx> %x0,%x1"

70694

+ [(set_attr "type" "fp")])

70695

70696

-(define_insn "fres"

70697

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70698

- (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRES))]

70699

- "TARGET_FRES"

70700

- "fres %0,%1"

70701

+(define_insn "*rsqrt<mode>2"

70702

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70703

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

70704

+ UNSPEC_RSQRT))]

70705

+ "RS6000_RECIP_HAVE_RSQRTE_P (<MODE>mode)"

70706

+ "@

70707

+ frsqrte<Ftrad> %0,%1

70708

+ xsrsqrte<Fvsx> %x0,%x1"

70709

[(set_attr "type" "fp")])

70710

70711

-; builtin fmaf support

70712

-(define_insn "*fmasf4_fpr"

70713

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70714

- (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

70715

- (match_operand:SF 2 "gpc_reg_operand" "f")

70716

- (match_operand:SF 3 "gpc_reg_operand" "f")))]

70717

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70718

- "fmadds %0,%1,%2,%3"

70719

- [(set_attr "type" "fp")

70720

- (set_attr "fp_type" "fp_maddsub_s")])

70721

+;; Floating point comparisons

70722

+(define_insn "*cmp<mode>_fpr"

70723

+ [(set (match_operand:CCFP 0 "cc_reg_operand" "=y,y")

70724

+ (compare:CCFP (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

70725

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

70726

+ "TARGET_<MODE>_FPR"

70727

+ "@

70728

+ fcmpu %0,%1,%2

70729

+ xscmpudp %0,%x1,%x2"

70730

+ [(set_attr "type" "fpcompare")])

70731

70732

-(define_insn "*fmssf4_fpr"

70733

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70734

- (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

70735

- (match_operand:SF 2 "gpc_reg_operand" "f")

70736

- (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f"))))]

70737

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70738

- "fmsubs %0,%1,%2,%3"

70739

- [(set_attr "type" "fp")

70740

- (set_attr "fp_type" "fp_maddsub_s")])

70741

+;; Floating point conversions

70742

+(define_expand "extendsfdf2"

70743

+ [(set (match_operand:DF 0 "gpc_reg_operand" "")

70744

+ (float_extend:DF (match_operand:SF 1 "reg_or_none500mem_operand" "")))]

70745

+ "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

70746

+ "")

70747

70748

-(define_insn "*nfmasf4_fpr"

70749

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70750

- (neg:SF (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

70751

- (match_operand:SF 2 "gpc_reg_operand" "f")

70752

- (match_operand:SF 3 "gpc_reg_operand" "f"))))]

70753

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70754

- "fnmadds %0,%1,%2,%3"

70755

- [(set_attr "type" "fp")

70756

- (set_attr "fp_type" "fp_maddsub_s")])

70757

+(define_insn_and_split "*extendsfdf2_fpr"

70758

+ [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d,d,ws,?ws,wv")

70759

+ (float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m,0,wy,Z")))]

70760

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

70761

+ "@

70762

+ #

70763

+ fmr %0,%1

70764

+ lfs%U1%X1 %0,%1

70765

+ #

70766

+ xxlor %x0,%x1,%x1

70767

+ lxsspx %x0,%y1"

70768

+ "&& reload_completed && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1])"

70769

+ [(const_int 0)]

70770

+{

70771

+ emit_note (NOTE_INSN_DELETED);

70772

+ DONE;

70773

+}

70774

+ [(set_attr_alternative "type"

70775

+ [(const_string "fp")

70776

+ (const_string "fp")

70777

+ (if_then_else

70778

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

70779

+ (const_string "fpload_ux")

70780

+ (if_then_else

70781

+ (match_test "update_address_mem (operands[1], VOIDmode)")

70782

+ (const_string "fpload_u")

70783

+ (const_string "fpload")))

70784

+ (const_string "fp")

70785

+ (const_string "vecsimple")

70786

+ (if_then_else

70787

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

70788

+ (const_string "fpload_ux")

70789

+ (if_then_else

70790

+ (match_test "update_address_mem (operands[1], VOIDmode)")

70791

+ (const_string "fpload_u")

70792

+ (const_string "fpload")))])])

70793

70794

-(define_insn "*nfmssf4_fpr"

70795

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70796

- (neg:SF (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

70797

- (match_operand:SF 2 "gpc_reg_operand" "f")

70798

- (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f")))))]

70799

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

70800

- "fnmsubs %0,%1,%2,%3"

70801

- [(set_attr "type" "fp")

70802

- (set_attr "fp_type" "fp_maddsub_s")])

70803

-

70804

-(define_expand "sqrtsf2"

70805

+(define_expand "truncdfsf2"

70806

[(set (match_operand:SF 0 "gpc_reg_operand" "")

70807

- (sqrt:SF (match_operand:SF 1 "gpc_reg_operand" "")))]

70808

- "(TARGET_PPC_GPOPT || TARGET_XILINX_FPU)

70809

- && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT

70810

- && !TARGET_SIMPLE_FPU"

70811

+ (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "")))]

70812

+ "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

70813

"")

70814

70815

-(define_insn ""

70816

+(define_insn "*truncdfsf2_fpr"

70817

[(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70818

- (sqrt:SF (match_operand:SF 1 "gpc_reg_operand" "f")))]

70819

- "(TARGET_PPC_GPOPT || TARGET_XILINX_FPU) && TARGET_HARD_FLOAT

70820

- && TARGET_FPRS && TARGET_SINGLE_FLOAT && !TARGET_SIMPLE_FPU"

70821

- "fsqrts %0,%1"

70822

- [(set_attr "type" "ssqrt")])

70823

-

70824

-(define_insn "*rsqrtsf_internal1"

70825

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

70826

- (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")]

70827

- UNSPEC_RSQRT))]

70828

- "TARGET_FRSQRTES"

70829

- "frsqrtes %0,%1"

70830

+ (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "d")))]

70831

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

70832

+ "frsp %0,%1"

70833

[(set_attr "type" "fp")])

70834

70835

;; This expander is here to avoid FLOAT_WORDS_BIGENDIAN tests in

70836

@@ -4742,12 +5343,14 @@

70837

;; Use an unspec rather providing an if-then-else in RTL, to prevent the

70838

;; compiler from optimizing -0.0

70839

(define_insn "copysign<mode>3_fcpsgn"

70840

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

70841

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")

70842

- (match_operand:SFDF 2 "gpc_reg_operand" "<rreg2>")]

70843

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70844

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

70845

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")]

70846

UNSPEC_COPYSIGN))]

70847

- "TARGET_CMPB && !VECTOR_UNIT_VSX_P (<MODE>mode)"

70848

- "fcpsgn %0,%2,%1"

70849

+ "TARGET_<MODE>_FPR && TARGET_CMPB"

70850

+ "@

70851

+ fcpsgn %0,%2,%1

70852

+ xscpsgn<Fvsx> %x0,%x2,%x1"

70853

[(set_attr "type" "fp")])

70854

70855

;; For MIN, MAX, and conditional move, we use DEFINE_EXPAND's that involve a

70856

@@ -4754,27 +5357,70 @@

70857

;; fsel instruction and some auxiliary computations. Then we just have a

70858

;; single DEFINE_INSN for fsel and the define_splits to make them if made by

70859

;; combine.

70860

-(define_expand "smaxsf3"

70861

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70862

- (if_then_else:SF (ge (match_operand:SF 1 "gpc_reg_operand" "")

70863

- (match_operand:SF 2 "gpc_reg_operand" ""))

70864

- (match_dup 1)

70865

- (match_dup 2)))]

70866

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS

70867

- && TARGET_SINGLE_FLOAT && !flag_trapping_math"

70868

- "{ rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]); DONE;}")

70869

+;; For MIN, MAX on non-VSX machines, and conditional move all of the time, we

70870

+;; use DEFINE_EXPAND's that involve a fsel instruction and some auxiliary

70871

+;; computations. Then we just have a single DEFINE_INSN for fsel and the

70872

+;; define_splits to make them if made by combine. On VSX machines we have the

70873

+;; min/max instructions.

70874

+;;

70875

+;; On VSX, we only check for TARGET_VSX instead of checking for a vsx/p8 vector

70876

+;; to allow either DF/SF to use only traditional registers.

70877

70878

-(define_expand "sminsf3"

70879

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

70880

- (if_then_else:SF (ge (match_operand:SF 1 "gpc_reg_operand" "")

70881

- (match_operand:SF 2 "gpc_reg_operand" ""))

70882

- (match_dup 2)

70883

- (match_dup 1)))]

70884

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS

70885

- && TARGET_SINGLE_FLOAT && !flag_trapping_math"

70886

- "{ rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]); DONE;}")

70887

+(define_expand "smax<mode>3"

70888

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70889

+ (if_then_else:SFDF (ge (match_operand:SFDF 1 "gpc_reg_operand" "")

70890

+ (match_operand:SFDF 2 "gpc_reg_operand" ""))

70891

+ (match_dup 1)

70892

+ (match_dup 2)))]

70893

+ "TARGET_<MODE>_FPR && TARGET_PPC_GFXOPT && !flag_trapping_math"

70894

+{

70895

+ rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]);

70896

+ DONE;

70897

+})

70898

70899

+(define_insn "*smax<mode>3_vsx"

70900

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70901

+ (smax:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

70902

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

70903

+ "TARGET_<MODE>_FPR && TARGET_VSX"

70904

+ "xsmaxdp %x0,%x1,%x2"

70905

+ [(set_attr "type" "fp")])

70906

+

70907

+(define_expand "smin<mode>3"

70908

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70909

+ (if_then_else:SFDF (ge (match_operand:SFDF 1 "gpc_reg_operand" "")

70910

+ (match_operand:SFDF 2 "gpc_reg_operand" ""))

70911

+ (match_dup 2)

70912

+ (match_dup 1)))]

70913

+ "TARGET_<MODE>_FPR && TARGET_PPC_GFXOPT && !flag_trapping_math"

70914

+{

70915

+ rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]);

70916

+ DONE;

70917

+})

70918

+

70919

+(define_insn "*smin<mode>3_vsx"

70920

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

70921

+ (smin:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

70922

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

70923

+ "TARGET_<MODE>_FPR && TARGET_VSX"

70924

+ "xsmindp %x0,%x1,%x2"

70925

+ [(set_attr "type" "fp")])

70926

+

70927

(define_split

70928

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

70929

+ (match_operator:SFDF 3 "min_max_operator"

70930

+ [(match_operand:SFDF 1 "gpc_reg_operand" "")

70931

+ (match_operand:SFDF 2 "gpc_reg_operand" "")]))]

70932

+ "TARGET_<MODE>_FPR && TARGET_PPC_GFXOPT && !flag_trapping_math

70933

+ && !TARGET_VSX"

70934

+ [(const_int 0)]

70935

+{

70936

+ rs6000_emit_minmax (operands[0], GET_CODE (operands[3]), operands[1],

70937

+ operands[2]);

70938

+ DONE;

70939

+})

70940

+

70941

+(define_split

70942

[(set (match_operand:SF 0 "gpc_reg_operand" "")

70943

(match_operator:SF 3 "min_max_operator"

70944

[(match_operand:SF 1 "gpc_reg_operand" "")

70945

@@ -4904,208 +5550,9 @@

70946

"fsel %0,%1,%2,%3"

70947

[(set_attr "type" "fp")])

70948

70949

-(define_expand "negdf2"

70950

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

70951

- (neg:DF (match_operand:DF 1 "gpc_reg_operand" "")))]

70952

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

70953

- "")

70954

-

70955

-(define_insn "*negdf2_fpr"

70956

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

70957

- (neg:DF (match_operand:DF 1 "gpc_reg_operand" "d")))]

70958

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

70959

- && !VECTOR_UNIT_VSX_P (DFmode)"

70960

- "fneg %0,%1"

70961

- [(set_attr "type" "fp")])

70962

-

70963

-(define_expand "absdf2"

70964

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

70965

- (abs:DF (match_operand:DF 1 "gpc_reg_operand" "")))]

70966

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

70967

- "")

70968

-

70969

-(define_insn "*absdf2_fpr"

70970

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

70971

- (abs:DF (match_operand:DF 1 "gpc_reg_operand" "d")))]

70972

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

70973

- && !VECTOR_UNIT_VSX_P (DFmode)"

70974

- "fabs %0,%1"

70975

- [(set_attr "type" "fp")])

70976

-

70977

-(define_insn "*nabsdf2_fpr"

70978

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

70979

- (neg:DF (abs:DF (match_operand:DF 1 "gpc_reg_operand" "d"))))]

70980

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

70981

- && !VECTOR_UNIT_VSX_P (DFmode)"

70982

- "fnabs %0,%1"

70983

- [(set_attr "type" "fp")])

70984

-

70985

-(define_expand "adddf3"

70986

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

70987

- (plus:DF (match_operand:DF 1 "gpc_reg_operand" "")

70988

- (match_operand:DF 2 "gpc_reg_operand" "")))]

70989

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

70990

- "")

70991

-

70992

-(define_insn "*adddf3_fpr"

70993

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

70994

- (plus:DF (match_operand:DF 1 "gpc_reg_operand" "%d")

70995

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

70996

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

70997

- && !VECTOR_UNIT_VSX_P (DFmode)"

70998

- "fadd %0,%1,%2"

70999

- [(set_attr "type" "fp")

71000

- (set_attr "fp_type" "fp_addsub_d")])

71001

-

71002

-(define_expand "subdf3"

71003

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

71004

- (minus:DF (match_operand:DF 1 "gpc_reg_operand" "")

71005

- (match_operand:DF 2 "gpc_reg_operand" "")))]

71006

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

71007

- "")

71008

-

71009

-(define_insn "*subdf3_fpr"

71010

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

71011

- (minus:DF (match_operand:DF 1 "gpc_reg_operand" "d")

71012

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

71013

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71014

- && !VECTOR_UNIT_VSX_P (DFmode)"

71015

- "fsub %0,%1,%2"

71016

- [(set_attr "type" "fp")

71017

- (set_attr "fp_type" "fp_addsub_d")])

71018

-

71019

-(define_expand "muldf3"

71020

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

71021

- (mult:DF (match_operand:DF 1 "gpc_reg_operand" "")

71022

- (match_operand:DF 2 "gpc_reg_operand" "")))]

71023

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

71024

- "")

71025

-

71026

-(define_insn "*muldf3_fpr"

71027

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

71028

- (mult:DF (match_operand:DF 1 "gpc_reg_operand" "%d")

71029

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

71030

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71031

- && !VECTOR_UNIT_VSX_P (DFmode)"

71032

- "fmul %0,%1,%2"

71033

- [(set_attr "type" "dmul")

71034

- (set_attr "fp_type" "fp_mul_d")])

71035

-

71036

-(define_expand "divdf3"

71037

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

71038

- (div:DF (match_operand:DF 1 "gpc_reg_operand" "")

71039

- (match_operand:DF 2 "gpc_reg_operand" "")))]

71040

- "TARGET_HARD_FLOAT

71041

- && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)

71042

- && !TARGET_SIMPLE_FPU"

71043

- "")

71044

-

71045

-(define_insn "*divdf3_fpr"

71046

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

71047

- (div:DF (match_operand:DF 1 "gpc_reg_operand" "d")

71048

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

71049

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && !TARGET_SIMPLE_FPU

71050

- && !VECTOR_UNIT_VSX_P (DFmode)"

71051

- "fdiv %0,%1,%2"

71052

- [(set_attr "type" "ddiv")])

71053

-

71054

-(define_insn "*fred_fpr"

71055

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

71056

- (unspec:DF [(match_operand:DF 1 "gpc_reg_operand" "f")] UNSPEC_FRES))]

71057

- "TARGET_FRE && !VECTOR_UNIT_VSX_P (DFmode)"

71058

- "fre %0,%1"

71059

- [(set_attr "type" "fp")])

71060

-

71061

-(define_insn "*rsqrtdf_internal1"

71062

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

71063

- (unspec:DF [(match_operand:DF 1 "gpc_reg_operand" "d")]

71064

- UNSPEC_RSQRT))]

71065

- "TARGET_FRSQRTE && !VECTOR_UNIT_VSX_P (DFmode)"

71066

- "frsqrte %0,%1"

71067

- [(set_attr "type" "fp")])

71068

-

71069

-; builtin fma support

71070

-(define_insn "*fmadf4_fpr"

71071

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

71072

- (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

71073

- (match_operand:DF 2 "gpc_reg_operand" "f")

71074

- (match_operand:DF 3 "gpc_reg_operand" "f")))]

71075

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71076

- && VECTOR_UNIT_NONE_P (DFmode)"

71077

- "fmadd %0,%1,%2,%3"

71078

- [(set_attr "type" "fp")

71079

- (set_attr "fp_type" "fp_maddsub_d")])

71080

-

71081

-(define_insn "*fmsdf4_fpr"

71082

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

71083

- (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

71084

- (match_operand:DF 2 "gpc_reg_operand" "f")

71085

- (neg:DF (match_operand:DF 3 "gpc_reg_operand" "f"))))]

71086

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71087

- && VECTOR_UNIT_NONE_P (DFmode)"

71088

- "fmsub %0,%1,%2,%3"

71089

- [(set_attr "type" "fp")

71090

- (set_attr "fp_type" "fp_maddsub_d")])

71091

-

71092

-(define_insn "*nfmadf4_fpr"

71093

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

71094

- (neg:DF (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

71095

- (match_operand:DF 2 "gpc_reg_operand" "f")

71096

- (match_operand:DF 3 "gpc_reg_operand" "f"))))]

71097

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71098

- && VECTOR_UNIT_NONE_P (DFmode)"

71099

- "fnmadd %0,%1,%2,%3"

71100

- [(set_attr "type" "fp")

71101

- (set_attr "fp_type" "fp_maddsub_d")])

71102

-

71103

-(define_insn "*nfmsdf4_fpr"

71104

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

71105

- (neg:DF (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

71106

- (match_operand:DF 2 "gpc_reg_operand" "f")

71107

- (neg:DF (match_operand:DF 3 "gpc_reg_operand" "f")))))]

71108

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71109

- && VECTOR_UNIT_NONE_P (DFmode)"

71110

- "fnmsub %0,%1,%2,%3"

71111

- [(set_attr "type" "fp")

71112

- (set_attr "fp_type" "fp_maddsub_d")])

71113

-

71114

-(define_expand "sqrtdf2"

71115

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

71116

- (sqrt:DF (match_operand:DF 1 "gpc_reg_operand" "")))]

71117

- "TARGET_PPC_GPOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

71118

- "")

71119

-

71120

-(define_insn "*sqrtdf2_fpr"

71121

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

71122

- (sqrt:DF (match_operand:DF 1 "gpc_reg_operand" "d")))]

71123

- "TARGET_PPC_GPOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71124

- && !VECTOR_UNIT_VSX_P (DFmode)"

71125

- "fsqrt %0,%1"

71126

- [(set_attr "type" "dsqrt")])

71127

-

71128

;; The conditional move instructions allow us to perform max and min

71129

;; operations even when

71130

71131

-(define_expand "smaxdf3"

71132

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

71133

- (if_then_else:DF (ge (match_operand:DF 1 "gpc_reg_operand" "")

71134

- (match_operand:DF 2 "gpc_reg_operand" ""))

71135

- (match_dup 1)

71136

- (match_dup 2)))]

71137

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71138

- && !flag_trapping_math"

71139

- "{ rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]); DONE;}")

71140

-

71141

-(define_expand "smindf3"

71142

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

71143

- (if_then_else:DF (ge (match_operand:DF 1 "gpc_reg_operand" "")

71144

- (match_operand:DF 2 "gpc_reg_operand" ""))

71145

- (match_dup 2)

71146

- (match_dup 1)))]

71147

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

71148

- && !flag_trapping_math"

71149

- "{ rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]); DONE;}")

71150

-

71151

(define_split

71152

[(set (match_operand:DF 0 "gpc_reg_operand" "")

71153

(match_operator:DF 3 "min_max_operator"

71154

@@ -5159,12 +5606,15 @@

71155

; We don't define lfiwax/lfiwzx with the normal definition, because we

71156

; don't want to support putting SImode in FPR registers.

71157

(define_insn "lfiwax"

71158

- [(set (match_operand:DI 0 "gpc_reg_operand" "=d")

71159

- (unspec:DI [(match_operand:SI 1 "indexed_or_indirect_operand" "Z")]

71160

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=d,wm,!wm")

71161

+ (unspec:DI [(match_operand:SI 1 "reg_or_indexed_operand" "Z,Z,r")]

71162

UNSPEC_LFIWAX))]

71163

"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LFIWAX"

71164

- "lfiwax %0,%y1"

71165

- [(set_attr "type" "fpload")])

71166

+ "@

71167

+ lfiwax %0,%y1

71168

+ lxsiwax %x0,%y1

71169

+ mtvsrwa %x0,%1"

71170

+ [(set_attr "type" "fpload,fpload,mffgpr")])

71171

71172

; This split must be run before register allocation because it allocates the

71173

; memory slot that is needed to move values to/from the FPR. We don't allocate

71174

@@ -5186,7 +5636,8 @@

71175

rtx src = operands[1];

71176

rtx tmp;

71177

71178

- if (!MEM_P (src) && TARGET_MFPGPR && TARGET_POWERPC64)

71179

+ if (!MEM_P (src) && TARGET_POWERPC64

71180

+ && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

71181

tmp = convert_to_mode (DImode, src, false);

71182

else

71183

{

71184

@@ -5235,12 +5686,15 @@

71185

(set_attr "type" "fpload")])

71186

71187

(define_insn "lfiwzx"

71188

- [(set (match_operand:DI 0 "gpc_reg_operand" "=d")

71189

- (unspec:DI [(match_operand:SI 1 "indexed_or_indirect_operand" "Z")]

71190

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=d,wm,!wm")

71191

+ (unspec:DI [(match_operand:SI 1 "reg_or_indexed_operand" "Z,Z,r")]

71192

UNSPEC_LFIWZX))]

71193

"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LFIWZX"

71194

- "lfiwzx %0,%y1"

71195

- [(set_attr "type" "fpload")])

71196

+ "@

71197

+ lfiwzx %0,%y1

71198

+ lxsiwzx %x0,%y1

71199

+ mtvsrwz %x0,%1"

71200

+ [(set_attr "type" "fpload,fpload,mftgpr")])

71201

71202

(define_insn_and_split "floatunssi<mode>2_lfiwzx"

71203

[(set (match_operand:SFDF 0 "gpc_reg_operand" "=d")

71204

@@ -5257,7 +5711,8 @@

71205

rtx src = operands[1];

71206

rtx tmp;

71207

71208

- if (!MEM_P (src) && TARGET_MFPGPR && TARGET_POWERPC64)

71209

+ if (!MEM_P (src) && TARGET_POWERPC64

71210

+ && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

71211

tmp = convert_to_mode (DImode, src, true);

71212

else

71213

{

71214

@@ -5548,7 +6003,7 @@

71215

emit_insn (gen_stfiwx (dest, tmp));

71216

DONE;

71217

}

71218

- else if (TARGET_MFPGPR && TARGET_POWERPC64)

71219

+ else if (TARGET_POWERPC64 && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

71220

{

71221

dest = gen_lowpart (DImode, dest);

71222

emit_move_insn (dest, tmp);

71223

@@ -5642,7 +6097,7 @@

71224

emit_insn (gen_stfiwx (dest, tmp));

71225

DONE;

71226

}

71227

- else if (TARGET_MFPGPR && TARGET_POWERPC64)

71228

+ else if (TARGET_POWERPC64 && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

71229

{

71230

dest = gen_lowpart (DImode, dest);

71231

emit_move_insn (dest, tmp);

71232

@@ -5781,66 +6236,52 @@

71233

[(set (match_operand:DI 0 "gpc_reg_operand" "=d")

71234

(unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

71235

UNSPEC_FCTID))]

71236

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

71237

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

71238

"fctid %0,%1"

71239

[(set_attr "type" "fp")])

71240

71241

-(define_expand "btrunc<mode>2"

71242

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

71243

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "")]

71244

+(define_insn "btrunc<mode>2"

71245

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

71246

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

71247

UNSPEC_FRIZ))]

71248

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

71249

- "")

71250

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

71251

+ "@

71252

+ friz %0,%1

71253

+ xsrdpiz %x0,%x1"

71254

+ [(set_attr "type" "fp")

71255

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

71256

71257

-(define_insn "*btrunc<mode>2_fpr"

71258

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

71259

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

71260

- UNSPEC_FRIZ))]

71261

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>

71262

- && !VECTOR_UNIT_VSX_P (<MODE>mode)"

71263

- "friz %0,%1"

71264

- [(set_attr "type" "fp")])

71265

-

71266

-(define_expand "ceil<mode>2"

71267

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

71268

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "")]

71269

+(define_insn "ceil<mode>2"

71270

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

71271

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

71272

UNSPEC_FRIP))]

71273

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

71274

- "")

71275

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

71276

+ "@

71277

+ frip %0,%1

71278

+ xsrdpip %x0,%x1"

71279

+ [(set_attr "type" "fp")

71280

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

71281

71282

-(define_insn "*ceil<mode>2_fpr"

71283

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

71284

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

71285

- UNSPEC_FRIP))]

71286

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>

71287

- && !VECTOR_UNIT_VSX_P (<MODE>mode)"

71288

- "frip %0,%1"

71289

- [(set_attr "type" "fp")])

71290

-

71291

-(define_expand "floor<mode>2"

71292

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

71293

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "")]

71294

+(define_insn "floor<mode>2"

71295

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

71296

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

71297

UNSPEC_FRIM))]

71298

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

71299

- "")

71300

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

71301

+ "@

71302

+ frim %0,%1

71303

+ xsrdpim %x0,%x1"

71304

+ [(set_attr "type" "fp")

71305

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

71306

71307

-(define_insn "*floor<mode>2_fpr"

71308

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

71309

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

71310

- UNSPEC_FRIM))]

71311

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>

71312

- && !VECTOR_UNIT_VSX_P (<MODE>mode)"

71313

- "frim %0,%1"

71314

- [(set_attr "type" "fp")])

71315

-

71316

;; No VSX equivalent to frin

71317

(define_insn "round<mode>2"

71318

[(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

71319

(unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

71320

UNSPEC_FRIN))]

71321

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

71322

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

71323

"frin %0,%1"

71324

- [(set_attr "type" "fp")])

71325

+ [(set_attr "type" "fp")

71326

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

71327

71328

; An UNSPEC is used so we don't have to support SImode in FP registers.

71329

(define_insn "stfiwx"

71330

@@ -6260,11 +6701,11 @@

71331

[(set_attr "type" "two,three")

71332

(set_attr "length" "8,12")])

71333

71334

-(define_insn "*ashrdisi3_noppc64"

71335

+(define_insn "*ashrdisi3_noppc64be"

71336

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

71337

(subreg:SI (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "r")

71338

(const_int 32)) 4))]

71339

- "TARGET_32BIT && !TARGET_POWERPC64"

71340

+ "TARGET_32BIT && !TARGET_POWERPC64 && WORDS_BIG_ENDIAN"

71341

"*

71342

{

71343

if (REGNO (operands[0]) == REGNO (operands[1]))

71344

@@ -6551,19 +6992,31 @@

71345

(const_int 0)))]

71346

"")

71347

71348

-(define_insn "*rotldi3_internal7"

71349

+(define_insn "*rotldi3_internal7le"

71350

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

71351

(zero_extend:DI

71352

(subreg:QI

71353

(rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

71354

(match_operand:DI 2 "reg_or_cint_operand" "r,i")) 0)))]

71355

- "TARGET_POWERPC64"

71356

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN"

71357

"@

71358

rldcl %0,%1,%2,56

71359

rldicl %0,%1,%H2,56"

71360

[(set_attr "type" "var_shift_rotate,integer")])

71361

71362

-(define_insn "*rotldi3_internal8"

71363

+(define_insn "*rotldi3_internal7be"

71364

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

71365

+ (zero_extend:DI

71366

+ (subreg:QI

71367

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

71368

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i")) 7)))]

71369

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN"

71370

+ "@

71371

+ rldcl %0,%1,%2,56

71372

+ rldicl %0,%1,%H2,56"

71373

+ [(set_attr "type" "var_shift_rotate,integer")])

71374

+

71375

+(define_insn "*rotldi3_internal8le"

71376

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

71377

(compare:CC (zero_extend:DI

71378

(subreg:QI

71379

@@ -6571,7 +7024,7 @@

71380

(match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

71381

(const_int 0)))

71382

(clobber (match_scratch:DI 3 "=r,r,r,r"))]

71383

- "TARGET_64BIT"

71384

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

71385

"@

71386

rldcl. %3,%1,%2,56

71387

rldicl. %3,%1,%H2,56

71388

@@ -6580,6 +7033,23 @@

71389

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71390

(set_attr "length" "4,4,8,8")])

71391

71392

+(define_insn "*rotldi3_internal8be"

71393

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

71394

+ (compare:CC (zero_extend:DI

71395

+ (subreg:QI

71396

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

71397

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 7))

71398

+ (const_int 0)))

71399

+ (clobber (match_scratch:DI 3 "=r,r,r,r"))]

71400

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

71401

+ "@

71402

+ rldcl. %3,%1,%2,56

71403

+ rldicl. %3,%1,%H2,56

71404

+ #

71405

+ #"

71406

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71407

+ (set_attr "length" "4,4,8,8")])

71408

+

71409

(define_split

71410

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

71411

(compare:CC (zero_extend:DI

71412

@@ -6588,7 +7058,7 @@

71413

(match_operand:DI 2 "reg_or_cint_operand" "")) 0))

71414

(const_int 0)))

71415

(clobber (match_scratch:DI 3 ""))]

71416

- "TARGET_POWERPC64 && reload_completed"

71417

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

71418

[(set (match_dup 3)

71419

(zero_extend:DI (subreg:QI

71420

(rotate:DI (match_dup 1)

71421

@@ -6598,7 +7068,25 @@

71422

(const_int 0)))]

71423

"")

71424

71425

-(define_insn "*rotldi3_internal9"

71426

+(define_split

71427

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

71428

+ (compare:CC (zero_extend:DI

71429

+ (subreg:QI

71430

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

71431

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 7))

71432

+ (const_int 0)))

71433

+ (clobber (match_scratch:DI 3 ""))]

71434

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

71435

+ [(set (match_dup 3)

71436

+ (zero_extend:DI (subreg:QI

71437

+ (rotate:DI (match_dup 1)

71438

+ (match_dup 2)) 7)))

71439

+ (set (match_dup 0)

71440

+ (compare:CC (match_dup 3)

71441

+ (const_int 0)))]

71442

+ "")

71443

+

71444

+(define_insn "*rotldi3_internal9le"

71445

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

71446

(compare:CC (zero_extend:DI

71447

(subreg:QI

71448

@@ -6607,7 +7095,7 @@

71449

(const_int 0)))

71450

(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

71451

(zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

71452

- "TARGET_64BIT"

71453

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

71454

"@

71455

rldcl. %0,%1,%2,56

71456

rldicl. %0,%1,%H2,56

71457

@@ -6616,6 +7104,24 @@

71458

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71459

(set_attr "length" "4,4,8,8")])

71460

71461

+(define_insn "*rotldi3_internal9be"

71462

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

71463

+ (compare:CC (zero_extend:DI

71464

+ (subreg:QI

71465

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

71466

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 7))

71467

+ (const_int 0)))

71468

+ (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

71469

+ (zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 7)))]

71470

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

71471

+ "@

71472

+ rldcl. %0,%1,%2,56

71473

+ rldicl. %0,%1,%H2,56

71474

+ #

71475

+ #"

71476

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71477

+ (set_attr "length" "4,4,8,8")])

71478

+

71479

(define_split

71480

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

71481

(compare:CC (zero_extend:DI

71482

@@ -6625,7 +7131,7 @@

71483

(const_int 0)))

71484

(set (match_operand:DI 0 "gpc_reg_operand" "")

71485

(zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

71486

- "TARGET_POWERPC64 && reload_completed"

71487

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

71488

[(set (match_dup 0)

71489

(zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 0)))

71490

(set (match_dup 3)

71491

@@ -6633,19 +7139,48 @@

71492

(const_int 0)))]

71493

"")

71494

71495

-(define_insn "*rotldi3_internal10"

71496

+(define_split

71497

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

71498

+ (compare:CC (zero_extend:DI

71499

+ (subreg:QI

71500

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

71501

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 7))

71502

+ (const_int 0)))

71503

+ (set (match_operand:DI 0 "gpc_reg_operand" "")

71504

+ (zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 7)))]

71505

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

71506

+ [(set (match_dup 0)

71507

+ (zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 7)))

71508

+ (set (match_dup 3)

71509

+ (compare:CC (match_dup 0)

71510

+ (const_int 0)))]

71511

+ "")

71512

+

71513

+(define_insn "*rotldi3_internal10le"

71514

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

71515

(zero_extend:DI

71516

(subreg:HI

71517

(rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

71518

(match_operand:DI 2 "reg_or_cint_operand" "r,i")) 0)))]

71519

- "TARGET_POWERPC64"

71520

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN"

71521

"@

71522

rldcl %0,%1,%2,48

71523

rldicl %0,%1,%H2,48"

71524

[(set_attr "type" "var_shift_rotate,integer")])

71525

71526

-(define_insn "*rotldi3_internal11"

71527

+(define_insn "*rotldi3_internal10be"

71528

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

71529

+ (zero_extend:DI

71530

+ (subreg:HI

71531

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

71532

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i")) 6)))]

71533

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN"

71534

+ "@

71535

+ rldcl %0,%1,%2,48

71536

+ rldicl %0,%1,%H2,48"

71537

+ [(set_attr "type" "var_shift_rotate,integer")])

71538

+

71539

+(define_insn "*rotldi3_internal11le"

71540

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

71541

(compare:CC (zero_extend:DI

71542

(subreg:HI

71543

@@ -6653,7 +7188,7 @@

71544

(match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

71545

(const_int 0)))

71546

(clobber (match_scratch:DI 3 "=r,r,r,r"))]

71547

- "TARGET_64BIT"

71548

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

71549

"@

71550

rldcl. %3,%1,%2,48

71551

rldicl. %3,%1,%H2,48

71552

@@ -6662,6 +7197,23 @@

71553

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71554

(set_attr "length" "4,4,8,8")])

71555

71556

+(define_insn "*rotldi3_internal11be"

71557

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

71558

+ (compare:CC (zero_extend:DI

71559

+ (subreg:HI

71560

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

71561

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 6))

71562

+ (const_int 0)))

71563

+ (clobber (match_scratch:DI 3 "=r,r,r,r"))]

71564

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

71565

+ "@

71566

+ rldcl. %3,%1,%2,48

71567

+ rldicl. %3,%1,%H2,48

71568

+ #

71569

+ #"

71570

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71571

+ (set_attr "length" "4,4,8,8")])

71572

+

71573

(define_split

71574

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

71575

(compare:CC (zero_extend:DI

71576

@@ -6670,7 +7222,7 @@

71577

(match_operand:DI 2 "reg_or_cint_operand" "")) 0))

71578

(const_int 0)))

71579

(clobber (match_scratch:DI 3 ""))]

71580

- "TARGET_POWERPC64 && reload_completed"

71581

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

71582

[(set (match_dup 3)

71583

(zero_extend:DI (subreg:HI

71584

(rotate:DI (match_dup 1)

71585

@@ -6680,7 +7232,25 @@

71586

(const_int 0)))]

71587

"")

71588

71589

-(define_insn "*rotldi3_internal12"

71590

+(define_split

71591

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

71592

+ (compare:CC (zero_extend:DI

71593

+ (subreg:HI

71594

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

71595

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 6))

71596

+ (const_int 0)))

71597

+ (clobber (match_scratch:DI 3 ""))]

71598

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

71599

+ [(set (match_dup 3)

71600

+ (zero_extend:DI (subreg:HI

71601

+ (rotate:DI (match_dup 1)

71602

+ (match_dup 2)) 6)))

71603

+ (set (match_dup 0)

71604

+ (compare:CC (match_dup 3)

71605

+ (const_int 0)))]

71606

+ "")

71607

+

71608

+(define_insn "*rotldi3_internal12le"

71609

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

71610

(compare:CC (zero_extend:DI

71611

(subreg:HI

71612

@@ -6689,7 +7259,7 @@

71613

(const_int 0)))

71614

(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

71615

(zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

71616

- "TARGET_64BIT"

71617

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

71618

"@

71619

rldcl. %0,%1,%2,48

71620

rldicl. %0,%1,%H2,48

71621

@@ -6698,6 +7268,24 @@

71622

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71623

(set_attr "length" "4,4,8,8")])

71624

71625

+(define_insn "*rotldi3_internal12be"

71626

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

71627

+ (compare:CC (zero_extend:DI

71628

+ (subreg:HI

71629

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

71630

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 6))

71631

+ (const_int 0)))

71632

+ (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

71633

+ (zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 6)))]

71634

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

71635

+ "@

71636

+ rldcl. %0,%1,%2,48

71637

+ rldicl. %0,%1,%H2,48

71638

+ #

71639

+ #"

71640

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71641

+ (set_attr "length" "4,4,8,8")])

71642

+

71643

(define_split

71644

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

71645

(compare:CC (zero_extend:DI

71646

@@ -6707,7 +7295,7 @@

71647

(const_int 0)))

71648

(set (match_operand:DI 0 "gpc_reg_operand" "")

71649

(zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

71650

- "TARGET_POWERPC64 && reload_completed"

71651

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

71652

[(set (match_dup 0)

71653

(zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 0)))

71654

(set (match_dup 3)

71655

@@ -6715,19 +7303,48 @@

71656

(const_int 0)))]

71657

"")

71658

71659

-(define_insn "*rotldi3_internal13"

71660

+(define_split

71661

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

71662

+ (compare:CC (zero_extend:DI

71663

+ (subreg:HI

71664

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

71665

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 6))

71666

+ (const_int 0)))

71667

+ (set (match_operand:DI 0 "gpc_reg_operand" "")

71668

+ (zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 6)))]

71669

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

71670

+ [(set (match_dup 0)

71671

+ (zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 6)))

71672

+ (set (match_dup 3)

71673

+ (compare:CC (match_dup 0)

71674

+ (const_int 0)))]

71675

+ "")

71676

+

71677

+(define_insn "*rotldi3_internal13le"

71678

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

71679

(zero_extend:DI

71680

(subreg:SI

71681

(rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

71682

(match_operand:DI 2 "reg_or_cint_operand" "r,i")) 0)))]

71683

- "TARGET_POWERPC64"

71684

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN"

71685

"@

71686

rldcl %0,%1,%2,32

71687

rldicl %0,%1,%H2,32"

71688

[(set_attr "type" "var_shift_rotate,integer")])

71689

71690

-(define_insn "*rotldi3_internal14"

71691

+(define_insn "*rotldi3_internal13be"

71692

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

71693

+ (zero_extend:DI

71694

+ (subreg:SI

71695

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

71696

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i")) 4)))]

71697

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN"

71698

+ "@

71699

+ rldcl %0,%1,%2,32

71700

+ rldicl %0,%1,%H2,32"

71701

+ [(set_attr "type" "var_shift_rotate,integer")])

71702

+

71703

+(define_insn "*rotldi3_internal14le"

71704

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

71705

(compare:CC (zero_extend:DI

71706

(subreg:SI

71707

@@ -6735,7 +7352,7 @@

71708

(match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

71709

(const_int 0)))

71710

(clobber (match_scratch:DI 3 "=r,r,r,r"))]

71711

- "TARGET_64BIT"

71712

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

71713

"@

71714

rldcl. %3,%1,%2,32

71715

rldicl. %3,%1,%H2,32

71716

@@ -6744,6 +7361,23 @@

71717

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71718

(set_attr "length" "4,4,8,8")])

71719

71720

+(define_insn "*rotldi3_internal14be"

71721

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

71722

+ (compare:CC (zero_extend:DI

71723

+ (subreg:SI

71724

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

71725

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 4))

71726

+ (const_int 0)))

71727

+ (clobber (match_scratch:DI 3 "=r,r,r,r"))]

71728

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

71729

+ "@

71730

+ rldcl. %3,%1,%2,32

71731

+ rldicl. %3,%1,%H2,32

71732

+ #

71733

+ #"

71734

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71735

+ (set_attr "length" "4,4,8,8")])

71736

+

71737

(define_split

71738

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

71739

(compare:CC (zero_extend:DI

71740

@@ -6752,7 +7386,7 @@

71741

(match_operand:DI 2 "reg_or_cint_operand" "")) 0))

71742

(const_int 0)))

71743

(clobber (match_scratch:DI 3 ""))]

71744

- "TARGET_POWERPC64 && reload_completed"

71745

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

71746

[(set (match_dup 3)

71747

(zero_extend:DI (subreg:SI

71748

(rotate:DI (match_dup 1)

71749

@@ -6762,7 +7396,25 @@

71750

(const_int 0)))]

71751

"")

71752

71753

-(define_insn "*rotldi3_internal15"

71754

+(define_split

71755

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

71756

+ (compare:CC (zero_extend:DI

71757

+ (subreg:SI

71758

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

71759

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 4))

71760

+ (const_int 0)))

71761

+ (clobber (match_scratch:DI 3 ""))]

71762

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

71763

+ [(set (match_dup 3)

71764

+ (zero_extend:DI (subreg:SI

71765

+ (rotate:DI (match_dup 1)

71766

+ (match_dup 2)) 4)))

71767

+ (set (match_dup 0)

71768

+ (compare:CC (match_dup 3)

71769

+ (const_int 0)))]

71770

+ "")

71771

+

71772

+(define_insn "*rotldi3_internal15le"

71773

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

71774

(compare:CC (zero_extend:DI

71775

(subreg:SI

71776

@@ -6771,7 +7423,7 @@

71777

(const_int 0)))

71778

(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

71779

(zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

71780

- "TARGET_64BIT"

71781

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

71782

"@

71783

rldcl. %0,%1,%2,32

71784

rldicl. %0,%1,%H2,32

71785

@@ -6780,6 +7432,24 @@

71786

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71787

(set_attr "length" "4,4,8,8")])

71788

71789

+(define_insn "*rotldi3_internal15be"

71790

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

71791

+ (compare:CC (zero_extend:DI

71792

+ (subreg:SI

71793

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

71794

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 4))

71795

+ (const_int 0)))

71796

+ (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

71797

+ (zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 4)))]

71798

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

71799

+ "@

71800

+ rldcl. %0,%1,%2,32

71801

+ rldicl. %0,%1,%H2,32

71802

+ #

71803

+ #"

71804

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

71805

+ (set_attr "length" "4,4,8,8")])

71806

+

71807

(define_split

71808

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

71809

(compare:CC (zero_extend:DI

71810

@@ -6789,7 +7459,7 @@

71811

(const_int 0)))

71812

(set (match_operand:DI 0 "gpc_reg_operand" "")

71813

(zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

71814

- "TARGET_POWERPC64 && reload_completed"

71815

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

71816

[(set (match_dup 0)

71817

(zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 0)))

71818

(set (match_dup 3)

71819

@@ -6797,6 +7467,23 @@

71820

(const_int 0)))]

71821

"")

71822

71823

+(define_split

71824

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

71825

+ (compare:CC (zero_extend:DI

71826

+ (subreg:SI

71827

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

71828

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 4))

71829

+ (const_int 0)))

71830

+ (set (match_operand:DI 0 "gpc_reg_operand" "")

71831

+ (zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 4)))]

71832

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

71833

+ [(set (match_dup 0)

71834

+ (zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 4)))

71835

+ (set (match_dup 3)

71836

+ (compare:CC (match_dup 0)

71837

+ (const_int 0)))]

71838

+ "")

71839

+

71840

(define_expand "ashldi3"

71841

[(set (match_operand:DI 0 "gpc_reg_operand" "")

71842

(ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")

71843

@@ -7195,10 +7882,19 @@

71844

[(parallel

71845

[(set (match_operand:DI 0 "gpc_reg_operand" "")

71846

(and:DI (match_operand:DI 1 "gpc_reg_operand" "")

71847

- (match_operand:DI 2 "and64_2_operand" "")))

71848

+ (match_operand:DI 2 "reg_or_cint_operand" "")))

71849

(clobber (match_scratch:CC 3 ""))])]

71850

- "TARGET_POWERPC64"

71851

- "")

71852

+ ""

71853

+{

71854

+ if (!TARGET_POWERPC64)

71855

+ {

71856

+ rtx cc = gen_rtx_SCRATCH (CCmode);

71857

+ rs6000_split_logical (operands, AND, false, false, false, cc);

71858

+ DONE;

71859

+ }

71860

+ else if (!and64_2_operand (operands[2], DImode))

71861

+ operands[2] = force_reg (DImode, operands[2]);

71862

+})

71863

71864

(define_insn "anddi3_mc"

71865

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r,r")

71866

@@ -7379,12 +8075,18 @@

71867

(define_expand "iordi3"

71868

[(set (match_operand:DI 0 "gpc_reg_operand" "")

71869

(ior:DI (match_operand:DI 1 "gpc_reg_operand" "")

71870

- (match_operand:DI 2 "reg_or_logical_cint_operand" "")))]

71871

- "TARGET_POWERPC64"

71872

- "

71873

+ (match_operand:DI 2 "reg_or_cint_operand" "")))]

71874

+ ""

71875

{

71876

- if (non_logical_cint_operand (operands[2], DImode))

71877

+ if (!TARGET_POWERPC64)

71878

{

71879

+ rs6000_split_logical (operands, IOR, false, false, false, NULL_RTX);

71880

+ DONE;

71881

+ }

71882

+ else if (!reg_or_logical_cint_operand (operands[2], DImode))

71883

+ operands[2] = force_reg (DImode, operands[2]);

71884

+ else if (non_logical_cint_operand (operands[2], DImode))

71885

+ {

71886

HOST_WIDE_INT value;

71887

rtx tmp = ((!can_create_pseudo_p ()

71888

|| rtx_equal_p (operands[0], operands[1]))

71889

@@ -7408,15 +8110,21 @@

71890

emit_insn (gen_iordi3 (operands[0], tmp, GEN_INT (value & 0xffff)));

71891

DONE;

71892

}

71893

-}")

71894

+})

71895

71896

(define_expand "xordi3"

71897

[(set (match_operand:DI 0 "gpc_reg_operand" "")

71898

(xor:DI (match_operand:DI 1 "gpc_reg_operand" "")

71899

- (match_operand:DI 2 "reg_or_logical_cint_operand" "")))]

71900

- "TARGET_POWERPC64"

71901

- "

71902

+ (match_operand:DI 2 "reg_or_cint_operand" "")))]

71903

+ ""

71904

{

71905

+ if (!TARGET_POWERPC64)

71906

+ {

71907

+ rs6000_split_logical (operands, XOR, false, false, false, NULL_RTX);

71908

+ DONE;

71909

+ }

71910

+ else if (!reg_or_logical_cint_operand (operands[2], DImode))

71911

+ operands[2] = force_reg (DImode, operands[2]);

71912

if (non_logical_cint_operand (operands[2], DImode))

71913

{

71914

HOST_WIDE_INT value;

71915

@@ -7442,7 +8150,7 @@

71916

emit_insn (gen_xordi3 (operands[0], tmp, GEN_INT (value & 0xffff)));

71917

DONE;

71918

}

71919

-}")

71920

+})

71921

71922

(define_insn "*booldi3_internal1"

71923

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r")

71924

@@ -7678,7 +8386,385 @@

71925

(compare:CC (match_dup 0)

71926

(const_int 0)))]

71927

"")

71928

+

71929

+;; Eqv operation.

71930

+(define_insn "*eqv<mode>3"

71931

+ [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")

71932

+ (not:GPR

71933

+ (xor:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")

71934

+ (match_operand:GPR 2 "gpc_reg_operand" "r"))))]

71935

+ ""

71936

+ "eqv %0,%1,%2"

71937

+ [(set_attr "type" "integer")

71938

+ (set_attr "length" "4")])

71939

+

71940

71941

+;; 128-bit logical operations expanders

71942

+

71943

+(define_expand "and<mode>3"

71944

+ [(parallel [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

71945

+ (and:BOOL_128

71946

+ (match_operand:BOOL_128 1 "vlogical_operand" "")

71947

+ (match_operand:BOOL_128 2 "vlogical_operand" "")))

71948

+ (clobber (match_scratch:CC 3 ""))])]

71949

+ ""

71950

+ "")

71951

+

71952

+(define_expand "ior<mode>3"

71953

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

71954

+ (ior:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")

71955

+ (match_operand:BOOL_128 2 "vlogical_operand" "")))]

71956

+ ""

71957

+ "")

71958

+

71959

+(define_expand "xor<mode>3"

71960

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

71961

+ (xor:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")

71962

+ (match_operand:BOOL_128 2 "vlogical_operand" "")))]

71963

+ ""

71964

+ "")

71965

+

71966

+(define_expand "one_cmpl<mode>2"

71967

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

71968

+ (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")))]

71969

+ ""

71970

+ "")

71971

+

71972

+(define_expand "nor<mode>3"

71973

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

71974

+ (and:BOOL_128

71975

+ (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" ""))

71976

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))))]

71977

+ ""

71978

+ "")

71979

+

71980

+(define_expand "andc<mode>3"

71981

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

71982

+ (and:BOOL_128

71983

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))

71984

+ (match_operand:BOOL_128 1 "vlogical_operand" "")))]

71985

+ ""

71986

+ "")

71987

+

71988

+;; Power8 vector logical instructions.

71989

+(define_expand "eqv<mode>3"

71990

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

71991

+ (not:BOOL_128

71992

+ (xor:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")

71993

+ (match_operand:BOOL_128 2 "vlogical_operand" ""))))]

71994

+ "<MODE>mode == TImode || <MODE>mode == PTImode || TARGET_P8_VECTOR"

71995

+ "")

71996

+

71997

+;; Rewrite nand into canonical form

71998

+(define_expand "nand<mode>3"

71999

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

72000

+ (ior:BOOL_128

72001

+ (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" ""))

72002

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))))]

72003

+ "<MODE>mode == TImode || <MODE>mode == PTImode || TARGET_P8_VECTOR"

72004

+ "")

72005

+

72006

+;; The canonical form is to have the negated element first, so we need to

72007

+;; reverse arguments.

72008

+(define_expand "orc<mode>3"

72009

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

72010

+ (ior:BOOL_128

72011

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))

72012

+ (match_operand:BOOL_128 1 "vlogical_operand" "")))]

72013

+ "<MODE>mode == TImode || <MODE>mode == PTImode || TARGET_P8_VECTOR"

72014

+ "")

72015

+

72016

+;; 128-bit logical operations insns and split operations

72017

+(define_insn_and_split "*and<mode>3_internal"

72018

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

72019

+ (and:BOOL_128

72020

+ (match_operand:BOOL_128 1 "vlogical_operand" "%<BOOL_REGS_OP1>")

72021

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>")))

72022

+ (clobber (match_scratch:CC 3 "<BOOL_REGS_AND_CR0>"))]

72023

+ ""

72024

+{

72025

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

72026

+ return "xxland %x0,%x1,%x2";

72027

+

72028

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

72029

+ return "vand %0,%1,%2";

72030

+

72031

+ return "#";

72032

+}

72033

+ "reload_completed && int_reg_operand (operands[0], <MODE>mode)"

72034

+ [(const_int 0)]

72035

+{

72036

+ rs6000_split_logical (operands, AND, false, false, false, operands[3]);

72037

+ DONE;

72038

+}

72039

+ [(set (attr "type")

72040

+ (if_then_else

72041

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72042

+ (const_string "vecsimple")

72043

+ (const_string "integer")))

72044

+ (set (attr "length")

72045

+ (if_then_else

72046

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72047

+ (const_string "4")

72048

+ (if_then_else

72049

+ (match_test "TARGET_POWERPC64")

72050

+ (const_string "8")

72051

+ (const_string "16"))))])

72052

+

72053

+;; 128-bit IOR/XOR

72054

+(define_insn_and_split "*bool<mode>3_internal"

72055

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

72056

+ (match_operator:BOOL_128 3 "boolean_or_operator"

72057

+ [(match_operand:BOOL_128 1 "vlogical_operand" "%<BOOL_REGS_OP1>")

72058

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>")]))]

72059

+ ""

72060

+{

72061

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

72062

+ return "xxl%q3 %x0,%x1,%x2";

72063

+

72064

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

72065

+ return "v%q3 %0,%1,%2";

72066

+

72067

+ return "#";

72068

+}

72069

+ "reload_completed && int_reg_operand (operands[0], <MODE>mode)"

72070

+ [(const_int 0)]

72071

+{

72072

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, false, false,

72073

+ NULL_RTX);

72074

+ DONE;

72075

+}

72076

+ [(set (attr "type")

72077

+ (if_then_else

72078

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72079

+ (const_string "vecsimple")

72080

+ (const_string "integer")))

72081

+ (set (attr "length")

72082

+ (if_then_else

72083

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72084

+ (const_string "4")

72085

+ (if_then_else

72086

+ (match_test "TARGET_POWERPC64")

72087

+ (const_string "8")

72088

+ (const_string "16"))))])

72089

+

72090

+;; 128-bit ANDC/ORC

72091

+(define_insn_and_split "*boolc<mode>3_internal1"

72092

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

72093

+ (match_operator:BOOL_128 3 "boolean_operator"

72094

+ [(not:BOOL_128

72095

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP1>"))

72096

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP2>")]))]

72097

+ "TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND)"

72098

+{

72099

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

72100

+ return "xxl%q3 %x0,%x1,%x2";

72101

+

72102

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

72103

+ return "v%q3 %0,%1,%2";

72104

+

72105

+ return "#";

72106

+}

72107

+ "(TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND))

72108

+ && reload_completed && int_reg_operand (operands[0], <MODE>mode)"

72109

+ [(const_int 0)]

72110

+{

72111

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, false,

72112

+ NULL_RTX);

72113

+ DONE;

72114

+}

72115

+ [(set (attr "type")

72116

+ (if_then_else

72117

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72118

+ (const_string "vecsimple")

72119

+ (const_string "integer")))

72120

+ (set (attr "length")

72121

+ (if_then_else

72122

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72123

+ (const_string "4")

72124

+ (if_then_else

72125

+ (match_test "TARGET_POWERPC64")

72126

+ (const_string "8")

72127

+ (const_string "16"))))])

72128

+

72129

+(define_insn_and_split "*boolc<mode>3_internal2"

72130

+ [(set (match_operand:TI2 0 "int_reg_operand" "=&r,r,r")

72131

+ (match_operator:TI2 3 "boolean_operator"

72132

+ [(not:TI2

72133

+ (match_operand:TI2 1 "int_reg_operand" "r,0,r"))

72134

+ (match_operand:TI2 2 "int_reg_operand" "r,r,0")]))]

72135

+ "!TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

72136

+ "#"

72137

+ "reload_completed && !TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

72138

+ [(const_int 0)]

72139

+{

72140

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, false,

72141

+ NULL_RTX);

72142

+ DONE;

72143

+}

72144

+ [(set_attr "type" "integer")

72145

+ (set (attr "length")

72146

+ (if_then_else

72147

+ (match_test "TARGET_POWERPC64")

72148

+ (const_string "8")

72149

+ (const_string "16")))])

72150

+

72151

+;; 128-bit NAND/NOR

72152

+(define_insn_and_split "*boolcc<mode>3_internal1"

72153

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

72154

+ (match_operator:BOOL_128 3 "boolean_operator"

72155

+ [(not:BOOL_128

72156

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP1>"))

72157

+ (not:BOOL_128

72158

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>"))]))]

72159

+ "TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND)"

72160

+{

72161

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

72162

+ return "xxl%q3 %x0,%x1,%x2";

72163

+

72164

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

72165

+ return "v%q3 %0,%1,%2";

72166

+

72167

+ return "#";

72168

+}

72169

+ "(TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND))

72170

+ && reload_completed && int_reg_operand (operands[0], <MODE>mode)"

72171

+ [(const_int 0)]

72172

+{

72173

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, true,

72174

+ NULL_RTX);

72175

+ DONE;

72176

+}

72177

+ [(set (attr "type")

72178

+ (if_then_else

72179

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72180

+ (const_string "vecsimple")

72181

+ (const_string "integer")))

72182

+ (set (attr "length")

72183

+ (if_then_else

72184

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72185

+ (const_string "4")

72186

+ (if_then_else

72187

+ (match_test "TARGET_POWERPC64")

72188

+ (const_string "8")

72189

+ (const_string "16"))))])

72190

+

72191

+(define_insn_and_split "*boolcc<mode>3_internal2"

72192

+ [(set (match_operand:TI2 0 "int_reg_operand" "=&r,r,r")

72193

+ (match_operator:TI2 3 "boolean_operator"

72194

+ [(not:TI2

72195

+ (match_operand:TI2 1 "int_reg_operand" "r,0,r"))

72196

+ (not:TI2

72197

+ (match_operand:TI2 2 "int_reg_operand" "r,r,0"))]))]

72198

+ "!TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

72199

+ "#"

72200

+ "reload_completed && !TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

72201

+ [(const_int 0)]

72202

+{

72203

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, true,

72204

+ NULL_RTX);

72205

+ DONE;

72206

+}

72207

+ [(set_attr "type" "integer")

72208

+ (set (attr "length")

72209

+ (if_then_else

72210

+ (match_test "TARGET_POWERPC64")

72211

+ (const_string "8")

72212

+ (const_string "16")))])

72213

+

72214

+

72215

+;; 128-bit EQV

72216

+(define_insn_and_split "*eqv<mode>3_internal1"

72217

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

72218

+ (not:BOOL_128

72219

+ (xor:BOOL_128

72220

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP1>")

72221

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>"))))]

72222

+ "TARGET_P8_VECTOR"

72223

+{

72224

+ if (vsx_register_operand (operands[0], <MODE>mode))

72225

+ return "xxleqv %x0,%x1,%x2";

72226

+

72227

+ return "#";

72228

+}

72229

+ "TARGET_P8_VECTOR && reload_completed

72230

+ && int_reg_operand (operands[0], <MODE>mode)"

72231

+ [(const_int 0)]

72232

+{

72233

+ rs6000_split_logical (operands, XOR, true, false, false, NULL_RTX);

72234

+ DONE;

72235

+}

72236

+ [(set (attr "type")

72237

+ (if_then_else

72238

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72239

+ (const_string "vecsimple")

72240

+ (const_string "integer")))

72241

+ (set (attr "length")

72242

+ (if_then_else

72243

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72244

+ (const_string "4")

72245

+ (if_then_else

72246

+ (match_test "TARGET_POWERPC64")

72247

+ (const_string "8")

72248

+ (const_string "16"))))])

72249

+

72250

+(define_insn_and_split "*eqv<mode>3_internal2"

72251

+ [(set (match_operand:TI2 0 "int_reg_operand" "=&r,r,r")

72252

+ (not:TI2

72253

+ (xor:TI2

72254

+ (match_operand:TI2 1 "int_reg_operand" "r,0,r")

72255

+ (match_operand:TI2 2 "int_reg_operand" "r,r,0"))))]

72256

+ "!TARGET_P8_VECTOR"

72257

+ "#"

72258

+ "reload_completed && !TARGET_P8_VECTOR"

72259

+ [(const_int 0)]

72260

+{

72261

+ rs6000_split_logical (operands, XOR, true, false, false, NULL_RTX);

72262

+ DONE;

72263

+}

72264

+ [(set_attr "type" "integer")

72265

+ (set (attr "length")

72266

+ (if_then_else

72267

+ (match_test "TARGET_POWERPC64")

72268

+ (const_string "8")

72269

+ (const_string "16")))])

72270

+

72271

+;; 128-bit one's complement

72272

+(define_insn_and_split "*one_cmpl<mode>3_internal"

72273

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

72274

+ (not:BOOL_128

72275

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_UNARY>")))]

72276

+ ""

72277

+{

72278

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

72279

+ return "xxlnor %x0,%x1,%x1";

72280

+

72281

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

72282

+ return "vnor %0,%1,%1";

72283

+

72284

+ return "#";

72285

+}

72286

+ "reload_completed && int_reg_operand (operands[0], <MODE>mode)"

72287

+ [(const_int 0)]

72288

+{

72289

+ rs6000_split_logical (operands, NOT, false, false, false, NULL_RTX);

72290

+ DONE;

72291

+}

72292

+ [(set (attr "type")

72293

+ (if_then_else

72294

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72295

+ (const_string "vecsimple")

72296

+ (const_string "integer")))

72297

+ (set (attr "length")

72298

+ (if_then_else

72299

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

72300

+ (const_string "4")

72301

+ (if_then_else

72302

+ (match_test "TARGET_POWERPC64")

72303

+ (const_string "8")

72304

+ (const_string "16"))))])

72305

+

72306

+

72307

;; Now define ways of moving data around.

72308

72309

;; Set up a register with a value from the GOT table

72310

@@ -7765,7 +8851,31 @@

72311

mt%0 %1

72312

mt%0 %1

72313

nop"

72314

- [(set_attr "type" "*,*,load,store,*,*,*,mfjmpr,mtjmpr,*,*")

72315

+ [(set_attr_alternative "type"

72316

+ [(const_string "*")

72317

+ (const_string "*")

72318

+ (if_then_else

72319

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72320

+ (const_string "load_ux")

72321

+ (if_then_else

72322

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72323

+ (const_string "load_u")

72324

+ (const_string "load")))

72325

+ (if_then_else

72326

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72327

+ (const_string "store_ux")

72328

+ (if_then_else

72329

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72330

+ (const_string "store_u")

72331

+ (const_string "store")))

72332

+ (const_string "*")

72333

+ (const_string "*")

72334

+ (const_string "*")

72335

+ (const_string "mfjmpr")

72336

+ (const_string "mtjmpr")

72337

+ (const_string "*")

72338

+ (const_string "*")])

72339

+

72340

(set_attr "length" "4,4,4,4,4,4,8,4,4,4,4")])

72341

72342

(define_insn "*movsi_internal1_single"

72343

@@ -7787,7 +8897,44 @@

72344

nop

72345

stfs%U0%X0 %1,%0

72346

lfs%U1%X1 %0,%1"

72347

- [(set_attr "type" "*,*,load,store,*,*,*,mfjmpr,mtjmpr,*,*,*,*")

72348

+ [(set_attr_alternative "type"

72349

+ [(const_string "*")

72350

+ (const_string "*")

72351

+ (if_then_else

72352

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72353

+ (const_string "load_ux")

72354

+ (if_then_else

72355

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72356

+ (const_string "load_u")

72357

+ (const_string "load")))

72358

+ (if_then_else

72359

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72360

+ (const_string "store_ux")

72361

+ (if_then_else

72362

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72363

+ (const_string "store_u")

72364

+ (const_string "store")))

72365

+ (const_string "*")

72366

+ (const_string "*")

72367

+ (const_string "*")

72368

+ (const_string "mfjmpr")

72369

+ (const_string "mtjmpr")

72370

+ (const_string "*")

72371

+ (const_string "*")

72372

+ (if_then_else

72373

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72374

+ (const_string "fpstore_ux")

72375

+ (if_then_else

72376

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72377

+ (const_string "fpstore_u")

72378

+ (const_string "fpstore")))

72379

+ (if_then_else

72380

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72381

+ (const_string "fpload_ux")

72382

+ (if_then_else

72383

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72384

+ (const_string "fpload_u")

72385

+ (const_string "fpload")))])

72386

(set_attr "length" "4,4,4,4,4,4,8,4,4,4,4,4,4")])

72387

72388

;; Split a load of a large constant into the appropriate two-insn

72389

@@ -7822,7 +8969,7 @@

72390

cmp<wd>i %2,%0,0

72391

mr. %0,%1

72392

#"

72393

- [(set_attr "type" "cmp,compare,cmp")

72394

+ [(set_attr "type" "cmp,fast_compare,cmp")

72395

(set_attr "length" "4,4,8")])

72396

72397

(define_split

72398

@@ -7850,7 +8997,26 @@

72399

mf%1 %0

72400

mt%0 %1

72401

nop"

72402

- [(set_attr "type" "*,load,store,*,mfjmpr,mtjmpr,*")])

72403

+ [(set_attr_alternative "type"

72404

+ [(const_string "*")

72405

+ (if_then_else

72406

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72407

+ (const_string "load_ux")

72408

+ (if_then_else

72409

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72410

+ (const_string "load_u")

72411

+ (const_string "load")))

72412

+ (if_then_else

72413

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72414

+ (const_string "store_ux")

72415

+ (if_then_else

72416

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72417

+ (const_string "store_u")

72418

+ (const_string "store")))

72419

+ (const_string "*")

72420

+ (const_string "mfjmpr")

72421

+ (const_string "mtjmpr")

72422

+ (const_string "*")])])

72423

72424

(define_expand "mov<mode>"

72425

[(set (match_operand:INT 0 "general_operand" "")

72426

@@ -7871,7 +9037,26 @@

72427

mf%1 %0

72428

mt%0 %1

72429

nop"

72430

- [(set_attr "type" "*,load,store,*,mfjmpr,mtjmpr,*")])

72431

+ [(set_attr_alternative "type"

72432

+ [(const_string "*")

72433

+ (if_then_else

72434

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72435

+ (const_string "load_ux")

72436

+ (if_then_else

72437

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72438

+ (const_string "load_u")

72439

+ (const_string "load")))

72440

+ (if_then_else

72441

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72442

+ (const_string "store_ux")

72443

+ (if_then_else

72444

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72445

+ (const_string "store_u")

72446

+ (const_string "store")))

72447

+ (const_string "*")

72448

+ (const_string "mfjmpr")

72449

+ (const_string "mtjmpr")

72450

+ (const_string "*")])])

72451

72452

;; Here is how to move condition codes around. When we store CC data in

72453

;; an integer register or memory, we store just the high-order 4 bits.

72454

@@ -7899,7 +9084,7 @@

72455

mf%1 %0

72456

mt%0 %1

72457

lwz%U1%X1 %0,%1

72458

- stw%U0%U1 %1,%0"

72459

+ stw%U0%X0 %1,%0"

72460

[(set (attr "type")

72461

(cond [(eq_attr "alternative" "0,3")

72462

(const_string "cr_logical")

72463

@@ -7912,9 +9097,23 @@

72464

(eq_attr "alternative" "9")

72465

(const_string "mtjmpr")

72466

(eq_attr "alternative" "10")

72467

- (const_string "load")

72468

+ (if_then_else

72469

+ (match_test "update_indexed_address_mem (operands[1],

72470

+ VOIDmode)")

72471

+ (const_string "load_ux")

72472

+ (if_then_else

72473

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72474

+ (const_string "load_u")

72475

+ (const_string "load")))

72476

(eq_attr "alternative" "11")

72477

- (const_string "store")

72478

+ (if_then_else

72479

+ (match_test "update_indexed_address_mem (operands[0],

72480

+ VOIDmode)")

72481

+ (const_string "store_ux")

72482

+ (if_then_else

72483

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72484

+ (const_string "store_u")

72485

+ (const_string "store")))

72486

(match_test "TARGET_MFCRF")

72487

(const_string "mfcrf")

72488

]

72489

@@ -7926,15 +9125,17 @@

72490

;; can produce floating-point values in fixed-point registers. Unless the

72491

;; value is a simple constant or already in memory, we deal with this by

72492

;; allocating memory and copying the value explicitly via that memory location.

72493

-(define_expand "movsf"

72494

- [(set (match_operand:SF 0 "nonimmediate_operand" "")

72495

- (match_operand:SF 1 "any_operand" ""))]

72496

- ""

72497

- "{ rs6000_emit_move (operands[0], operands[1], SFmode); DONE; }")

72498

72499

+;; Move 32-bit binary/decimal floating point

72500

+(define_expand "mov<mode>"

72501

+ [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "")

72502

+ (match_operand:FMOVE32 1 "any_operand" ""))]

72503

+ "<fmove_ok>"

72504

+ "{ rs6000_emit_move (operands[0], operands[1], <MODE>mode); DONE; }")

72505

+

72506

(define_split

72507

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

72508

- (match_operand:SF 1 "const_double_operand" ""))]

72509

+ [(set (match_operand:FMOVE32 0 "gpc_reg_operand" "")

72510

+ (match_operand:FMOVE32 1 "const_double_operand" ""))]

72511

"reload_completed

72512

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72513

|| (GET_CODE (operands[0]) == SUBREG

72514

@@ -7947,10 +9148,10 @@

72515

REAL_VALUE_TYPE rv;

72516

72517

REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

72518

- REAL_VALUE_TO_TARGET_SINGLE (rv, l);

72519

+ <real_value_to_target> (rv, l);

72520

72521

if (! TARGET_POWERPC64)

72522

- operands[2] = operand_subword (operands[0], 0, 0, SFmode);

72523

+ operands[2] = operand_subword (operands[0], 0, 0, <MODE>mode);

72524

else

72525

operands[2] = gen_lowpart (SImode, operands[0]);

72526

72527

@@ -7957,11 +9158,11 @@

72528

operands[3] = gen_int_mode (l, SImode);

72529

}")

72530

72531

-(define_insn "*movsf_hardfloat"

72532

- [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,*c*l,!r,*h,!r,!r")

72533

- (match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,h,0,G,Fn"))]

72534

- "(gpc_reg_operand (operands[0], SFmode)

72535

- || gpc_reg_operand (operands[1], SFmode))

72536

+(define_insn "mov<mode>_hardfloat"

72537

+ [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=!r,!r,m,f,wa,wa,<f32_lr>,<f32_sm>,wu,Z,?<f32_dm>,?r,*c*l,!r,*h,!r,!r")

72538

+ (match_operand:FMOVE32 1 "input_operand" "r,m,r,f,wa,j,<f32_lm>,<f32_sr>,Z,wu,r,<f32_dm>,r,h,0,G,Fn"))]

72539

+ "(gpc_reg_operand (operands[0], <MODE>mode)

72540

+ || gpc_reg_operand (operands[1], <MODE>mode))

72541

&& (TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT)"

72542

"@

72543

mr %0,%1

72544

@@ -7968,21 +9169,68 @@

72545

lwz%U1%X1 %0,%1

72546

stw%U0%X0 %1,%0

72547

fmr %0,%1

72548

- lfs%U1%X1 %0,%1

72549

- stfs%U0%X0 %1,%0

72550

+ xxlor %x0,%x1,%x1

72551

+ xxlxor %x0,%x0,%x0

72552

+ <f32_li>

72553

+ <f32_si>

72554

+ <f32_lv>

72555

+ <f32_sv>

72556

+ mtvsrwz %x0,%1

72557

+ mfvsrwz %0,%x1

72558

mt%0 %1

72559

mf%1 %0

72560

nop

72561

#

72562

#"

72563

- [(set_attr "type" "*,load,store,fp,fpload,fpstore,mtjmpr,mfjmpr,*,*,*")

72564

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8")])

72565

+ [(set_attr_alternative "type"

72566

+ [(const_string "*")

72567

+ (if_then_else

72568

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72569

+ (const_string "load_ux")

72570

+ (if_then_else

72571

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72572

+ (const_string "load_u")

72573

+ (const_string "load")))

72574

+ (if_then_else

72575

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72576

+ (const_string "store_ux")

72577

+ (if_then_else

72578

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72579

+ (const_string "store_u")

72580

+ (const_string "store")))

72581

+ (const_string "fp")

72582

+ (const_string "vecsimple")

72583

+ (const_string "vecsimple")

72584

+ (if_then_else

72585

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72586

+ (const_string "fpload_ux")

72587

+ (if_then_else

72588

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72589

+ (const_string "fpload_u")

72590

+ (const_string "fpload")))

72591

+ (if_then_else

72592

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72593

+ (const_string "fpstore_ux")

72594

+ (if_then_else

72595

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72596

+ (const_string "fpstore_u")

72597

+ (const_string "fpstore")))

72598

+ (const_string "fpload")

72599

+ (const_string "fpstore")

72600

+ (const_string "mftgpr")

72601

+ (const_string "mffgpr")

72602

+ (const_string "mtjmpr")

72603

+ (const_string "mfjmpr")

72604

+ (const_string "*")

72605

+ (const_string "*")

72606

+ (const_string "*")])

72607

+ (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,8")])

72608

72609

-(define_insn "*movsf_softfloat"

72610

- [(set (match_operand:SF 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,r,*h")

72611

- (match_operand:SF 1 "input_operand" "r,r,h,m,r,I,L,G,Fn,0"))]

72612

- "(gpc_reg_operand (operands[0], SFmode)

72613

- || gpc_reg_operand (operands[1], SFmode))

72614

+(define_insn "*mov<mode>_softfloat"

72615

+ [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,r,*h")

72616

+ (match_operand:FMOVE32 1 "input_operand" "r,r,h,m,r,I,L,G,Fn,0"))]

72617

+ "(gpc_reg_operand (operands[0], <MODE>mode)

72618

+ || gpc_reg_operand (operands[1], <MODE>mode))

72619

&& (TARGET_SOFT_FLOAT || !TARGET_FPRS)"

72620

"@

72621

mr %0,%1

72622

@@ -7995,19 +9243,42 @@

72623

#

72624

#

72625

nop"

72626

- [(set_attr "type" "*,mtjmpr,mfjmpr,load,store,*,*,*,*,*")

72627

+ [(set_attr_alternative "type"

72628

+ [(const_string "*")

72629

+ (const_string "mtjmpr")

72630

+ (const_string "mfjmpr")

72631

+ (if_then_else

72632

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72633

+ (const_string "load_ux")

72634

+ (if_then_else

72635

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72636

+ (const_string "load_u")

72637

+ (const_string "load")))

72638

+ (if_then_else

72639

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72640

+ (const_string "store_ux")

72641

+ (if_then_else

72642

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72643

+ (const_string "store_u")

72644

+ (const_string "store")))

72645

+ (const_string "*")

72646

+ (const_string "*")

72647

+ (const_string "*")

72648

+ (const_string "*")

72649

+ (const_string "*")])

72650

(set_attr "length" "4,4,4,4,4,4,4,4,8,4")])

72651

72652

72653

-(define_expand "movdf"

72654

- [(set (match_operand:DF 0 "nonimmediate_operand" "")

72655

- (match_operand:DF 1 "any_operand" ""))]

72656

+;; Move 64-bit binary/decimal floating point

72657

+(define_expand "mov<mode>"

72658

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "")

72659

+ (match_operand:FMOVE64 1 "any_operand" ""))]

72660

""

72661

- "{ rs6000_emit_move (operands[0], operands[1], DFmode); DONE; }")

72662

+ "{ rs6000_emit_move (operands[0], operands[1], <MODE>mode); DONE; }")

72663

72664

(define_split

72665

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

72666

- (match_operand:DF 1 "const_int_operand" ""))]

72667

+ [(set (match_operand:FMOVE64 0 "gpc_reg_operand" "")

72668

+ (match_operand:FMOVE64 1 "const_int_operand" ""))]

72669

"! TARGET_POWERPC64 && reload_completed

72670

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72671

|| (GET_CODE (operands[0]) == SUBREG

72672

@@ -8020,8 +9291,8 @@

72673

int endian = (WORDS_BIG_ENDIAN == 0);

72674

HOST_WIDE_INT value = INTVAL (operands[1]);

72675

72676

- operands[2] = operand_subword (operands[0], endian, 0, DFmode);

72677

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DFmode);

72678

+ operands[2] = operand_subword (operands[0], endian, 0, <MODE>mode);

72679

+ operands[3] = operand_subword (operands[0], 1 - endian, 0, <MODE>mode);

72680

#if HOST_BITS_PER_WIDE_INT == 32

72681

operands[4] = (value & 0x80000000) ? constm1_rtx : const0_rtx;

72682

#else

72683

@@ -8031,8 +9302,8 @@

72684

}")

72685

72686

(define_split

72687

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

72688

- (match_operand:DF 1 "const_double_operand" ""))]

72689

+ [(set (match_operand:FMOVE64 0 "gpc_reg_operand" "")

72690

+ (match_operand:FMOVE64 1 "const_double_operand" ""))]

72691

"! TARGET_POWERPC64 && reload_completed

72692

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72693

|| (GET_CODE (operands[0]) == SUBREG

72694

@@ -8047,17 +9318,17 @@

72695

REAL_VALUE_TYPE rv;

72696

72697

REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

72698

- REAL_VALUE_TO_TARGET_DOUBLE (rv, l);

72699

+ <real_value_to_target> (rv, l);

72700

72701

- operands[2] = operand_subword (operands[0], endian, 0, DFmode);

72702

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DFmode);

72703

+ operands[2] = operand_subword (operands[0], endian, 0, <MODE>mode);

72704

+ operands[3] = operand_subword (operands[0], 1 - endian, 0, <MODE>mode);

72705

operands[4] = gen_int_mode (l[endian], SImode);

72706

operands[5] = gen_int_mode (l[1 - endian], SImode);

72707

}")

72708

72709

(define_split

72710

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

72711

- (match_operand:DF 1 "const_double_operand" ""))]

72712

+ [(set (match_operand:FMOVE64 0 "gpc_reg_operand" "")

72713

+ (match_operand:FMOVE64 1 "const_double_operand" ""))]

72714

"TARGET_POWERPC64 && reload_completed

72715

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72716

|| (GET_CODE (operands[0]) == SUBREG

72717

@@ -8074,7 +9345,7 @@

72718

#endif

72719

72720

REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

72721

- REAL_VALUE_TO_TARGET_DOUBLE (rv, l);

72722

+ <real_value_to_target> (rv, l);

72723

72724

operands[2] = gen_lowpart (DImode, operands[0]);

72725

/* HIGHPART is lower memory address when WORDS_BIG_ENDIAN. */

72726

@@ -8099,22 +9370,19 @@

72727

;; since the D-form version of the memory instructions does not need a GPR for

72728

;; reloading.

72729

72730

-(define_insn "*movdf_hardfloat32"

72731

- [(set (match_operand:DF 0 "nonimmediate_operand" "=m,d,d,ws,?wa,Z,?Z,ws,?wa,wa,Y,r,!r,!r,!r,!r")

72732

- (match_operand:DF 1 "input_operand" "d,m,d,Z,Z,ws,wa,ws,wa,j,r,Y,r,G,H,F"))]

72733

+(define_insn "*mov<mode>_hardfloat32"

72734

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,wv,Z,wa,wa,Y,r,!r,!r,!r,!r")

72735

+ (match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,wv,wa,j,r,Y,r,G,H,F"))]

72736

"! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

72737

- && (gpc_reg_operand (operands[0], DFmode)

72738

- || gpc_reg_operand (operands[1], DFmode))"

72739

+ && (gpc_reg_operand (operands[0], <MODE>mode)

72740

+ || gpc_reg_operand (operands[1], <MODE>mode))"

72741

"@

72742

stfd%U0%X0 %1,%0

72743

lfd%U1%X1 %0,%1

72744

fmr %0,%1

72745

lxsd%U1x %x0,%y1

72746

- lxsd%U1x %x0,%y1

72747

stxsd%U0x %x1,%y0

72748

- stxsd%U0x %x1,%y0

72749

xxlor %x0,%x1,%x1

72750

- xxlor %x0,%x1,%x1

72751

xxlxor %x0,%x0,%x0

72752

#

72753

#

72754

@@ -8122,115 +9390,141 @@

72755

#

72756

#

72757

#"

72758

- [(set_attr "type" "fpstore,fpload,fp,fpload,fpload,fpstore,fpstore,vecsimple,vecsimple,vecsimple,store,load,two,fp,fp,*")

72759

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8,8,8,8,12,16")])

72760

+ [(set_attr_alternative "type"

72761

+ [(if_then_else

72762

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72763

+ (const_string "fpstore_ux")

72764

+ (if_then_else

72765

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72766

+ (const_string "fpstore_u")

72767

+ (const_string "fpstore")))

72768

+ (if_then_else

72769

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72770

+ (const_string "fpload_ux")

72771

+ (if_then_else

72772

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72773

+ (const_string "fpload_u")

72774

+ (const_string "fpload")))

72775

+ (const_string "fp")

72776

+ (if_then_else

72777

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72778

+ (const_string "fpload_ux")

72779

+ (const_string "fpload"))

72780

+ (if_then_else

72781

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72782

+ (const_string "fpstore_ux")

72783

+ (const_string "fpstore"))

72784

+ (const_string "vecsimple")

72785

+ (const_string "vecsimple")

72786

+ (const_string "store")

72787

+ (const_string "load")

72788

+ (const_string "two")

72789

+ (const_string "fp")

72790

+ (const_string "fp")

72791

+ (const_string "*")])

72792

+ (set_attr "length" "4,4,4,4,4,4,4,8,8,8,8,12,16")])

72793

72794

-(define_insn "*movdf_softfloat32"

72795

- [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,r,r,r,r")

72796

- (match_operand:DF 1 "input_operand" "r,Y,r,G,H,F"))]

72797

+(define_insn "*mov<mode>_softfloat32"

72798

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=Y,r,r,r,r,r")

72799

+ (match_operand:FMOVE64 1 "input_operand" "r,Y,r,G,H,F"))]

72800

"! TARGET_POWERPC64

72801

&& ((TARGET_FPRS && TARGET_SINGLE_FLOAT)

72802

- || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE)

72803

- && (gpc_reg_operand (operands[0], DFmode)

72804

- || gpc_reg_operand (operands[1], DFmode))"

72805

+ || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE

72806

+ || (<MODE>mode == DDmode && TARGET_E500_DOUBLE))

72807

+ && (gpc_reg_operand (operands[0], <MODE>mode)

72808

+ || gpc_reg_operand (operands[1], <MODE>mode))"

72809

"#"

72810

[(set_attr "type" "store,load,two,*,*,*")

72811

(set_attr "length" "8,8,8,8,12,16")])

72812

72813

-;; Reload patterns to support gpr load/store with misaligned mem.

72814

-;; and multiple gpr load/store at offset >= 0xfffc

72815

-(define_expand "reload_<mode>_store"

72816

- [(parallel [(match_operand 0 "memory_operand" "=m")

72817

- (match_operand 1 "gpc_reg_operand" "r")

72818

- (match_operand:GPR 2 "register_operand" "=&b")])]

72819

- ""

72820

-{

72821

- rs6000_secondary_reload_gpr (operands[1], operands[0], operands[2], true);

72822

- DONE;

72823

-})

72824

-

72825

-(define_expand "reload_<mode>_load"

72826

- [(parallel [(match_operand 0 "gpc_reg_operand" "=r")

72827

- (match_operand 1 "memory_operand" "m")

72828

- (match_operand:GPR 2 "register_operand" "=b")])]

72829

- ""

72830

-{

72831

- rs6000_secondary_reload_gpr (operands[0], operands[1], operands[2], false);

72832

- DONE;

72833

-})

72834

-

72835

; ld/std require word-aligned displacements -> 'Y' constraint.

72836

; List Y->r and r->Y before r->r for reload.

72837

-(define_insn "*movdf_hardfloat64_mfpgpr"

72838

- [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,ws,?wa,ws,?wa,Z,?Z,m,d,d,wa,*c*l,!r,*h,!r,!r,!r,r,d")

72839

- (match_operand:DF 1 "input_operand" "r,Y,r,ws,?wa,Z,Z,ws,wa,d,m,d,j,r,h,0,G,H,F,d,r"))]

72840

- "TARGET_POWERPC64 && TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

72841

- && TARGET_DOUBLE_FLOAT

72842

- && (gpc_reg_operand (operands[0], DFmode)

72843

- || gpc_reg_operand (operands[1], DFmode))"

72844

+(define_insn "*mov<mode>_hardfloat64"

72845

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,wv,Z,wa,wa,Y,r,!r,*c*l,!r,*h,!r,!r,!r,r,wg,r,wm")

72846

+ (match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,wv,wa,j,r,Y,r,r,h,0,G,H,F,wg,r,wm,r"))]

72847

+ "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

72848

+ && (gpc_reg_operand (operands[0], <MODE>mode)

72849

+ || gpc_reg_operand (operands[1], <MODE>mode))"

72850

"@

72851

- std%U0%X0 %1,%0

72852

- ld%U1%X1 %0,%1

72853

- mr %0,%1

72854

- xxlor %x0,%x1,%x1

72855

- xxlor %x0,%x1,%x1

72856

- lxsd%U1x %x0,%y1

72857

- lxsd%U1x %x0,%y1

72858

- stxsd%U0x %x1,%y0

72859

- stxsd%U0x %x1,%y0

72860

stfd%U0%X0 %1,%0

72861

lfd%U1%X1 %0,%1

72862

fmr %0,%1

72863

+ lxsd%U1x %x0,%y1

72864

+ stxsd%U0x %x1,%y0

72865

+ xxlor %x0,%x1,%x1

72866

xxlxor %x0,%x0,%x0

72867

- mt%0 %1

72868

- mf%1 %0

72869

- nop

72870

- #

72871

- #

72872

- #

72873

- mftgpr %0,%1

72874

- mffgpr %0,%1"

72875

- [(set_attr "type" "store,load,*,fp,fp,fpload,fpload,fpstore,fpstore,fpstore,fpload,fp,vecsimple,mtjmpr,mfjmpr,*,*,*,*,mftgpr,mffgpr")

72876

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,8,12,16,4,4")])

72877

-

72878

-; ld/std require word-aligned displacements -> 'Y' constraint.

72879

-; List Y->r and r->Y before r->r for reload.

72880

-(define_insn "*movdf_hardfloat64"

72881

- [(set (match_operand:DF 0 "nonimmediate_operand" "=m,d,d,Y,r,!r,ws,?wa,Z,?Z,ws,?wa,wa,*c*l,!r,*h,!r,!r,!r")

72882

- (match_operand:DF 1 "input_operand" "d,m,d,r,Y,r,Z,Z,ws,wa,ws,wa,j,r,h,0,G,H,F"))]

72883

- "TARGET_POWERPC64 && !TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

72884

- && TARGET_DOUBLE_FLOAT

72885

- && (gpc_reg_operand (operands[0], DFmode)

72886

- || gpc_reg_operand (operands[1], DFmode))"

72887

- "@

72888

- stfd%U0%X0 %1,%0

72889

- lfd%U1%X1 %0,%1

72890

- fmr %0,%1

72891

std%U0%X0 %1,%0

72892

ld%U1%X1 %0,%1

72893

mr %0,%1

72894

- lxsd%U1x %x0,%y1

72895

- lxsd%U1x %x0,%y1

72896

- stxsd%U0x %x1,%y0

72897

- stxsd%U0x %x1,%y0

72898

- xxlor %x0,%x1,%x1

72899

- xxlor %x0,%x1,%x1

72900

- xxlxor %x0,%x0,%x0

72901

mt%0 %1

72902

mf%1 %0

72903

nop

72904

#

72905

#

72906

- #"

72907

- [(set_attr "type" "fpstore,fpload,fp,store,load,*,fpload,fpload,fpstore,fpstore,vecsimple,vecsimple,vecsimple,mtjmpr,mfjmpr,*,*,*,*")

72908

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,8,12,16")])

72909

+ #

72910

+ mftgpr %0,%1

72911

+ mffgpr %0,%1

72912

+ mfvsrd %0,%x1

72913

+ mtvsrd %x0,%1"

72914

+ [(set_attr_alternative "type"

72915

+ [(if_then_else

72916

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72917

+ (const_string "fpstore_ux")

72918

+ (if_then_else

72919

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72920

+ (const_string "fpstore_u")

72921

+ (const_string "fpstore")))

72922

+ (if_then_else

72923

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72924

+ (const_string "fpload_ux")

72925

+ (if_then_else

72926

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72927

+ (const_string "fpload_u")

72928

+ (const_string "fpload")))

72929

+ (const_string "fp")

72930

+ (if_then_else

72931

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72932

+ (const_string "fpload_ux")

72933

+ (const_string "fpload"))

72934

+ (if_then_else

72935

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72936

+ (const_string "fpstore_ux")

72937

+ (const_string "fpstore"))

72938

+ (const_string "vecsimple")

72939

+ (const_string "vecsimple")

72940

+ (if_then_else

72941

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72942

+ (const_string "store_ux")

72943

+ (if_then_else

72944

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72945

+ (const_string "store_u")

72946

+ (const_string "store")))

72947

+ (if_then_else

72948

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72949

+ (const_string "load_ux")

72950

+ (if_then_else

72951

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72952

+ (const_string "load_u")

72953

+ (const_string "load")))

72954

+ (const_string "*")

72955

+ (const_string "mtjmpr")

72956

+ (const_string "mfjmpr")

72957

+ (const_string "*")

72958

+ (const_string "*")

72959

+ (const_string "*")

72960

+ (const_string "*")

72961

+ (const_string "mftgpr")

72962

+ (const_string "mffgpr")

72963

+ (const_string "mftgpr")

72964

+ (const_string "mffgpr")])

72965

+ (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,8,12,16,4,4,4,4")])

72966

72967

-(define_insn "*movdf_softfloat64"

72968

- [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,r,cl,r,r,r,r,*h")

72969

- (match_operand:DF 1 "input_operand" "r,Y,r,r,h,G,H,F,0"))]

72970

+(define_insn "*mov<mode>_softfloat64"

72971

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=Y,r,r,cl,r,r,r,r,*h")

72972

+ (match_operand:FMOVE64 1 "input_operand" "r,Y,r,r,h,G,H,F,0"))]

72973

"TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS)

72974

- && (gpc_reg_operand (operands[0], DFmode)

72975

- || gpc_reg_operand (operands[1], DFmode))"

72976

+ && (gpc_reg_operand (operands[0], <MODE>mode)

72977

+ || gpc_reg_operand (operands[1], <MODE>mode))"

72978

"@

72979

std%U0%X0 %1,%0

72980

ld%U1%X1 %0,%1

72981

@@ -8241,38 +9535,87 @@

72982

#

72983

#

72984

nop"

72985

- [(set_attr "type" "store,load,*,mtjmpr,mfjmpr,*,*,*,*")

72986

+ [(set_attr_alternative "type"

72987

+ [(if_then_else

72988

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72989

+ (const_string "store_ux")

72990

+ (if_then_else

72991

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72992

+ (const_string "store_u")

72993

+ (const_string "store")))

72994

+ (if_then_else

72995

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72996

+ (const_string "load_ux")

72997

+ (if_then_else

72998

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72999

+ (const_string "load_u")

73000

+ (const_string "load")))

73001

+ (const_string "*")

73002

+ (const_string "mtjmpr")

73003

+ (const_string "mfjmpr")

73004

+ (const_string "*")

73005

+ (const_string "*")

73006

+ (const_string "*")

73007

+ (const_string "*")])

73008

(set_attr "length" "4,4,4,4,4,8,12,16,4")])

73009

73010

-(define_expand "movtf"

73011

- [(set (match_operand:TF 0 "general_operand" "")

73012

- (match_operand:TF 1 "any_operand" ""))]

73013

- "!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128"

73014

- "{ rs6000_emit_move (operands[0], operands[1], TFmode); DONE; }")

73015

+(define_expand "mov<mode>"

73016

+ [(set (match_operand:FMOVE128 0 "general_operand" "")

73017

+ (match_operand:FMOVE128 1 "any_operand" ""))]

73018

+ ""

73019

+ "{ rs6000_emit_move (operands[0], operands[1], <MODE>mode); DONE; }")

73020

73021

;; It's important to list Y->r and r->Y before r->r because otherwise

73022

;; reload, given m->r, will try to pick r->r and reload it, which

73023

;; doesn't make progress.

73024

-(define_insn_and_split "*movtf_internal"

73025

- [(set (match_operand:TF 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

73026

- (match_operand:TF 1 "input_operand" "d,m,d,r,YGHF,r"))]

73027

- "!TARGET_IEEEQUAD

73028

- && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128

73029

- && (gpc_reg_operand (operands[0], TFmode)

73030

- || gpc_reg_operand (operands[1], TFmode))"

73031

+

73032

+;; We can't split little endian direct moves of TDmode, because the words are

73033

+;; not swapped like they are for TImode or TFmode. Subregs therefore are

73034

+;; problematical. Don't allow direct move for this case.

73035

+

73036

+(define_insn_and_split "*mov<mode>_64bit_dm"

73037

+ [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r,r,wm")

73038

+ (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r,wm,r"))]

73039

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64

73040

+ && (<MODE>mode != TDmode || WORDS_BIG_ENDIAN)

73041

+ && (gpc_reg_operand (operands[0], <MODE>mode)

73042

+ || gpc_reg_operand (operands[1], <MODE>mode))"

73043

"#"

73044

"&& reload_completed"

73045

[(pc)]

73046

{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

73047

+ [(set_attr "length" "8,8,8,12,12,8,8,8")])

73048

+

73049

+(define_insn_and_split "*movtd_64bit_nodm"

73050

+ [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

73051

+ (match_operand:TD 1 "input_operand" "d,m,d,r,YGHF,r"))]

73052

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64 && !WORDS_BIG_ENDIAN

73053

+ && (gpc_reg_operand (operands[0], TDmode)

73054

+ || gpc_reg_operand (operands[1], TDmode))"

73055

+ "#"

73056

+ "&& reload_completed"

73057

+ [(pc)]

73058

+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

73059

+ [(set_attr "length" "8,8,8,12,12,8")])

73060

+

73061

+(define_insn_and_split "*mov<mode>_32bit"

73062

+ [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

73063

+ (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r"))]

73064

+ "TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_POWERPC64

73065

+ && (gpc_reg_operand (operands[0], <MODE>mode)

73066

+ || gpc_reg_operand (operands[1], <MODE>mode))"

73067

+ "#"

73068

+ "&& reload_completed"

73069

+ [(pc)]

73070

+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

73071

[(set_attr "length" "8,8,8,20,20,16")])

73072

73073

-(define_insn_and_split "*movtf_softfloat"

73074

- [(set (match_operand:TF 0 "rs6000_nonimmediate_operand" "=Y,r,r")

73075

- (match_operand:TF 1 "input_operand" "r,YGHF,r"))]

73076

- "!TARGET_IEEEQUAD

73077

- && (TARGET_SOFT_FLOAT || !TARGET_FPRS) && TARGET_LONG_DOUBLE_128

73078

- && (gpc_reg_operand (operands[0], TFmode)

73079

- || gpc_reg_operand (operands[1], TFmode))"

73080

+(define_insn_and_split "*mov<mode>_softfloat"

73081

+ [(set (match_operand:FMOVE128 0 "rs6000_nonimmediate_operand" "=Y,r,r")

73082

+ (match_operand:FMOVE128 1 "input_operand" "r,YGHF,r"))]

73083

+ "(TARGET_SOFT_FLOAT || !TARGET_FPRS)

73084

+ && (gpc_reg_operand (operands[0], <MODE>mode)

73085

+ || gpc_reg_operand (operands[1], <MODE>mode))"

73086

"#"

73087

"&& reload_completed"

73088

[(pc)]

73089

@@ -8557,6 +9900,252 @@

73090

operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);

73091

}")

73092

73093

+;; Reload helper functions used by rs6000_secondary_reload. The patterns all

73094

+;; must have 3 arguments, and scratch register constraint must be a single

73095

+;; constraint.

73096

+

73097

+;; Reload patterns to support gpr load/store with misaligned mem.

73098

+;; and multiple gpr load/store at offset >= 0xfffc

73099

+(define_expand "reload_<mode>_store"

73100

+ [(parallel [(match_operand 0 "memory_operand" "=m")

73101

+ (match_operand 1 "gpc_reg_operand" "r")

73102

+ (match_operand:GPR 2 "register_operand" "=&b")])]

73103

+ ""

73104

+{

73105

+ rs6000_secondary_reload_gpr (operands[1], operands[0], operands[2], true);

73106

+ DONE;

73107

+})

73108

+

73109

+(define_expand "reload_<mode>_load"

73110

+ [(parallel [(match_operand 0 "gpc_reg_operand" "=r")

73111

+ (match_operand 1 "memory_operand" "m")

73112

+ (match_operand:GPR 2 "register_operand" "=b")])]

73113

+ ""

73114

+{

73115

+ rs6000_secondary_reload_gpr (operands[0], operands[1], operands[2], false);

73116

+ DONE;

73117

+})

73118

+

73119

+

73120

+;; Power8 merge instructions to allow direct move to/from floating point

73121

+;; registers in 32-bit mode. We use TF mode to get two registers to move the

73122

+;; individual 32-bit parts across. Subreg doesn't work too well on the TF

73123

+;; value, since it is allocated in reload and not all of the flow information

73124

+;; is setup for it. We have two patterns to do the two moves between gprs and

73125

+;; fprs. There isn't a dependancy between the two, but we could potentially

73126

+;; schedule other instructions between the two instructions. TFmode is

73127

+;; currently limited to traditional FPR registers. If/when this is changed, we

73128

+;; will need to revist %L to make sure it works with VSX registers, or add an

73129

+;; %x version of %L.

73130

+

73131

+(define_insn "p8_fmrgow_<mode>"

73132

+ [(set (match_operand:FMOVE64X 0 "register_operand" "=d")

73133

+ (unspec:FMOVE64X [(match_operand:TF 1 "register_operand" "d")]

73134

+ UNSPEC_P8V_FMRGOW))]

73135

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73136

+ "fmrgow %0,%1,%L1"

73137

+ [(set_attr "type" "vecperm")])

73138

+

73139

+(define_insn "p8_mtvsrwz_1"

73140

+ [(set (match_operand:TF 0 "register_operand" "=d")

73141

+ (unspec:TF [(match_operand:SI 1 "register_operand" "r")]

73142

+ UNSPEC_P8V_MTVSRWZ))]

73143

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73144

+ "mtvsrwz %x0,%1"

73145

+ [(set_attr "type" "mftgpr")])

73146

+

73147

+(define_insn "p8_mtvsrwz_2"

73148

+ [(set (match_operand:TF 0 "register_operand" "+d")

73149

+ (unspec:TF [(match_dup 0)

73150

+ (match_operand:SI 1 "register_operand" "r")]

73151

+ UNSPEC_P8V_MTVSRWZ))]

73152

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73153

+ "mtvsrwz %L0,%1"

73154

+ [(set_attr "type" "mftgpr")])

73155

+

73156

+(define_insn_and_split "reload_fpr_from_gpr<mode>"

73157

+ [(set (match_operand:FMOVE64X 0 "register_operand" "=ws")

73158

+ (unspec:FMOVE64X [(match_operand:FMOVE64X 1 "register_operand" "r")]

73159

+ UNSPEC_P8V_RELOAD_FROM_GPR))

73160

+ (clobber (match_operand:TF 2 "register_operand" "=d"))]

73161

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73162

+ "#"

73163

+ "&& reload_completed"

73164

+ [(const_int 0)]

73165

+{

73166

+ rtx dest = operands[0];

73167

+ rtx src = operands[1];

73168

+ rtx tmp = operands[2];

73169

+ rtx gpr_hi_reg = gen_highpart (SImode, src);

73170

+ rtx gpr_lo_reg = gen_lowpart (SImode, src);

73171

+

73172

+ emit_insn (gen_p8_mtvsrwz_1 (tmp, gpr_hi_reg));

73173

+ emit_insn (gen_p8_mtvsrwz_2 (tmp, gpr_lo_reg));

73174

+ emit_insn (gen_p8_fmrgow_<mode> (dest, tmp));

73175

+ DONE;

73176

+}

73177

+ [(set_attr "length" "12")

73178

+ (set_attr "type" "three")])

73179

+

73180

+;; Move 128 bit values from GPRs to VSX registers in 64-bit mode

73181

+(define_insn "p8_mtvsrd_1"

73182

+ [(set (match_operand:TF 0 "register_operand" "=ws")

73183

+ (unspec:TF [(match_operand:DI 1 "register_operand" "r")]

73184

+ UNSPEC_P8V_MTVSRD))]

73185

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73186

+ "mtvsrd %0,%1"

73187

+ [(set_attr "type" "mftgpr")])

73188

+

73189

+(define_insn "p8_mtvsrd_2"

73190

+ [(set (match_operand:TF 0 "register_operand" "+ws")

73191

+ (unspec:TF [(match_dup 0)

73192

+ (match_operand:DI 1 "register_operand" "r")]

73193

+ UNSPEC_P8V_MTVSRD))]

73194

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73195

+ "mtvsrd %L0,%1"

73196

+ [(set_attr "type" "mftgpr")])

73197

+

73198

+(define_insn "p8_xxpermdi_<mode>"

73199

+ [(set (match_operand:FMOVE128_GPR 0 "register_operand" "=wa")

73200

+ (unspec:FMOVE128_GPR [(match_operand:TF 1 "register_operand" "ws")]

73201

+ UNSPEC_P8V_XXPERMDI))]

73202

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73203

+ "xxpermdi %x0,%1,%L1,0"

73204

+ [(set_attr "type" "vecperm")])

73205

+

73206

+(define_insn_and_split "reload_vsx_from_gpr<mode>"

73207

+ [(set (match_operand:FMOVE128_GPR 0 "register_operand" "=wa")

73208

+ (unspec:FMOVE128_GPR

73209

+ [(match_operand:FMOVE128_GPR 1 "register_operand" "r")]

73210

+ UNSPEC_P8V_RELOAD_FROM_GPR))

73211

+ (clobber (match_operand:TF 2 "register_operand" "=ws"))]

73212

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73213

+ "#"

73214

+ "&& reload_completed"

73215

+ [(const_int 0)]

73216

+{

73217

+ rtx dest = operands[0];

73218

+ rtx src = operands[1];

73219

+ rtx tmp = operands[2];

73220

+ rtx gpr_hi_reg = gen_highpart (DImode, src);

73221

+ rtx gpr_lo_reg = gen_lowpart (DImode, src);

73222

+

73223

+ emit_insn (gen_p8_mtvsrd_1 (tmp, gpr_hi_reg));

73224

+ emit_insn (gen_p8_mtvsrd_2 (tmp, gpr_lo_reg));

73225

+ emit_insn (gen_p8_xxpermdi_<mode> (dest, tmp));

73226

+}

73227

+ [(set_attr "length" "12")

73228

+ (set_attr "type" "three")])

73229

+

73230

+(define_split

73231

+ [(set (match_operand:FMOVE128_GPR 0 "nonimmediate_operand" "")

73232

+ (match_operand:FMOVE128_GPR 1 "input_operand" ""))]

73233

+ "reload_completed

73234

+ && (int_reg_operand (operands[0], <MODE>mode)

73235

+ || int_reg_operand (operands[1], <MODE>mode))"

73236

+ [(pc)]

73237

+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; })

73238

+

73239

+;; Move SFmode to a VSX from a GPR register. Because scalar floating point

73240

+;; type is stored internally as double precision in the VSX registers, we have

73241

+;; to convert it from the vector format.

73242

+

73243

+(define_insn_and_split "reload_vsx_from_gprsf"

73244

+ [(set (match_operand:SF 0 "register_operand" "=wa")

73245

+ (unspec:SF [(match_operand:SF 1 "register_operand" "r")]

73246

+ UNSPEC_P8V_RELOAD_FROM_GPR))

73247

+ (clobber (match_operand:DI 2 "register_operand" "=r"))]

73248

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73249

+ "#"

73250

+ "&& reload_completed"

73251

+ [(const_int 0)]

73252

+{

73253

+ rtx op0 = operands[0];

73254

+ rtx op1 = operands[1];

73255

+ rtx op2 = operands[2];

73256

+ rtx op0_di = simplify_gen_subreg (DImode, op0, SFmode, 0);

73257

+ rtx op1_di = simplify_gen_subreg (DImode, op1, SFmode, 0);

73258

+

73259

+ /* Move SF value to upper 32-bits for xscvspdpn. */

73260

+ emit_insn (gen_ashldi3 (op2, op1_di, GEN_INT (32)));

73261

+ emit_move_insn (op0_di, op2);

73262

+ emit_insn (gen_vsx_xscvspdpn_directmove (op0, op0));

73263

+ DONE;

73264

+}

73265

+ [(set_attr "length" "8")

73266

+ (set_attr "type" "two")])

73267

+

73268

+;; Move 128 bit values from VSX registers to GPRs in 64-bit mode by doing a

73269

+;; normal 64-bit move, followed by an xxpermdi to get the bottom 64-bit value,

73270

+;; and then doing a move of that.

73271

+(define_insn "p8_mfvsrd_3_<mode>"

73272

+ [(set (match_operand:DF 0 "register_operand" "=r")

73273

+ (unspec:DF [(match_operand:FMOVE128_GPR 1 "register_operand" "wa")]

73274

+ UNSPEC_P8V_RELOAD_FROM_VSX))]

73275

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73276

+ "mfvsrd %0,%x1"

73277

+ [(set_attr "type" "mftgpr")])

73278

+

73279

+(define_insn_and_split "reload_gpr_from_vsx<mode>"

73280

+ [(set (match_operand:FMOVE128_GPR 0 "register_operand" "=r")

73281

+ (unspec:FMOVE128_GPR

73282

+ [(match_operand:FMOVE128_GPR 1 "register_operand" "wa")]

73283

+ UNSPEC_P8V_RELOAD_FROM_VSX))

73284

+ (clobber (match_operand:FMOVE128_GPR 2 "register_operand" "=wa"))]

73285

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73286

+ "#"

73287

+ "&& reload_completed"

73288

+ [(const_int 0)]

73289

+{

73290

+ rtx dest = operands[0];

73291

+ rtx src = operands[1];

73292

+ rtx tmp = operands[2];

73293

+ rtx gpr_hi_reg = gen_highpart (DFmode, dest);

73294

+ rtx gpr_lo_reg = gen_lowpart (DFmode, dest);

73295

+

73296

+ emit_insn (gen_p8_mfvsrd_3_<mode> (gpr_hi_reg, src));

73297

+ emit_insn (gen_vsx_xxpermdi_<mode> (tmp, src, src, GEN_INT (3)));

73298

+ emit_insn (gen_p8_mfvsrd_3_<mode> (gpr_lo_reg, tmp));

73299

+}

73300

+ [(set_attr "length" "12")

73301

+ (set_attr "type" "three")])

73302

+

73303

+;; Move SFmode to a GPR from a VSX register. Because scalar floating point

73304

+;; type is stored internally as double precision, we have to convert it to the

73305

+;; vector format.

73306

+

73307

+(define_insn_and_split "reload_gpr_from_vsxsf"

73308

+ [(set (match_operand:SF 0 "register_operand" "=r")

73309

+ (unspec:SF [(match_operand:SF 1 "register_operand" "wa")]

73310

+ UNSPEC_P8V_RELOAD_FROM_VSX))

73311

+ (clobber (match_operand:V4SF 2 "register_operand" "=wa"))]

73312

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73313

+ "#"

73314

+ "&& reload_completed"

73315

+ [(const_int 0)]

73316

+{

73317

+ rtx op0 = operands[0];

73318

+ rtx op1 = operands[1];

73319

+ rtx op2 = operands[2];

73320

+ rtx diop0 = simplify_gen_subreg (DImode, op0, SFmode, 0);

73321

+

73322

+ emit_insn (gen_vsx_xscvdpspn_scalar (op2, op1));

73323

+ emit_insn (gen_p8_mfvsrd_4_disf (diop0, op2));

73324

+ emit_insn (gen_lshrdi3 (diop0, diop0, GEN_INT (32)));

73325

+ DONE;

73326

+}

73327

+ [(set_attr "length" "12")

73328

+ (set_attr "type" "three")])

73329

+

73330

+(define_insn "p8_mfvsrd_4_disf"

73331

+ [(set (match_operand:DI 0 "register_operand" "=r")

73332

+ (unspec:DI [(match_operand:V4SF 1 "register_operand" "wa")]

73333

+ UNSPEC_P8V_RELOAD_FROM_VSX))]

73334

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

73335

+ "mfvsrd %0,%x1"

73336

+ [(set_attr "type" "mftgpr")])

73337

+

73338

+

73339

;; Next come the multi-word integer load and store and the load and store

73340

;; multiple insns.

73341

73342

@@ -8565,8 +10154,8 @@

73343

;; Use of fprs is disparaged slightly otherwise reload prefers to reload

73344

;; a gpr into a fpr instead of reloading an invalid 'Y' address

73345

(define_insn "*movdi_internal32"

73346

- [(set (match_operand:DI 0 "rs6000_nonimmediate_operand" "=Y,r,r,?m,?*d,?*d,r,?wa")

73347

- (match_operand:DI 1 "input_operand" "r,Y,r,d,m,d,IJKnGHF,O"))]

73348

+ [(set (match_operand:DI 0 "rs6000_nonimmediate_operand" "=Y,r,r,?m,?*d,?*d,r")

73349

+ (match_operand:DI 1 "input_operand" "r,Y,r,d,m,d,IJKnGHF"))]

73350

"! TARGET_POWERPC64

73351

&& (gpc_reg_operand (operands[0], DImode)

73352

|| gpc_reg_operand (operands[1], DImode))"

73353

@@ -8577,15 +10166,34 @@

73354

stfd%U0%X0 %1,%0

73355

lfd%U1%X1 %0,%1

73356

fmr %0,%1

73357

- #

73358

- xxlxor %x0,%x0,%x0"

73359

- [(set_attr "type" "store,load,*,fpstore,fpload,fp,*,vecsimple")])

73360

+ #"

73361

+ [(set_attr_alternative "type"

73362

+ [(const_string "store")

73363

+ (const_string "load")

73364

+ (const_string "*")

73365

+ (if_then_else

73366

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

73367

+ (const_string "fpstore_ux")

73368

+ (if_then_else

73369

+ (match_test "update_address_mem (operands[0], VOIDmode)")

73370

+ (const_string "fpstore_u")

73371

+ (const_string "fpstore")))

73372

+ (if_then_else

73373

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73374

+ (const_string "fpload_ux")

73375

+ (if_then_else

73376

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73377

+ (const_string "fpload_u")

73378

+ (const_string "fpload")))

73379

+ (const_string "fp")

73380

+ (const_string "*")])])

73381

73382

(define_split

73383

[(set (match_operand:DI 0 "gpc_reg_operand" "")

73384

(match_operand:DI 1 "const_int_operand" ""))]

73385

"! TARGET_POWERPC64 && reload_completed

73386

- && gpr_or_gpr_p (operands[0], operands[1])"

73387

+ && gpr_or_gpr_p (operands[0], operands[1])

73388

+ && !direct_move_p (operands[0], operands[1])"

73389

[(set (match_dup 2) (match_dup 4))

73390

(set (match_dup 3) (match_dup 1))]

73391

"

73392

@@ -8607,14 +10215,15 @@

73393

[(set (match_operand:DIFD 0 "rs6000_nonimmediate_operand" "")

73394

(match_operand:DIFD 1 "input_operand" ""))]

73395

"reload_completed && !TARGET_POWERPC64

73396

- && gpr_or_gpr_p (operands[0], operands[1])"

73397

+ && gpr_or_gpr_p (operands[0], operands[1])

73398

+ && !direct_move_p (operands[0], operands[1])"

73399

[(pc)]

73400

{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; })

73401

73402

-(define_insn "*movdi_mfpgpr"

73403

- [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,r,?*d")

73404

- (match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,*d,r"))]

73405

- "TARGET_POWERPC64 && TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

73406

+(define_insn "*movdi_internal64"

73407

+ [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,r,?*wg,r,?*wm")

73408

+ (match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,*wg,r,*wm,r"))]

73409

+ "TARGET_POWERPC64

73410

&& (gpc_reg_operand (operands[0], DImode)

73411

|| gpc_reg_operand (operands[1], DImode))"

73412

"@

73413

@@ -8631,33 +10240,52 @@

73414

mt%0 %1

73415

nop

73416

mftgpr %0,%1

73417

- mffgpr %0,%1"

73418

- [(set_attr "type" "store,load,*,*,*,*,fpstore,fpload,fp,mfjmpr,mtjmpr,*,mftgpr,mffgpr")

73419

- (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4,4")])

73420

+ mffgpr %0,%1

73421

+ mfvsrd %0,%x1

73422

+ mtvsrd %x0,%1"

73423

+ [(set_attr_alternative "type"

73424

+ [(if_then_else

73425

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

73426

+ (const_string "store_ux")

73427

+ (if_then_else

73428

+ (match_test "update_address_mem (operands[0], VOIDmode)")

73429

+ (const_string "store_u")

73430

+ (const_string "store")))

73431

+ (if_then_else

73432

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73433

+ (const_string "load_ux")

73434

+ (if_then_else

73435

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73436

+ (const_string "load_u")

73437

+ (const_string "load")))

73438

+ (const_string "*")

73439

+ (const_string "*")

73440

+ (const_string "*")

73441

+ (const_string "*")

73442

+ (if_then_else

73443

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

73444

+ (const_string "fpstore_ux")

73445

+ (if_then_else

73446

+ (match_test "update_address_mem (operands[0], VOIDmode)")

73447

+ (const_string "fpstore_u")

73448

+ (const_string "fpstore")))

73449

+ (if_then_else

73450

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73451

+ (const_string "fpload_ux")

73452

+ (if_then_else

73453

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73454

+ (const_string "fpload_u")

73455

+ (const_string "fpload")))

73456

+ (const_string "fp")

73457

+ (const_string "mfjmpr")

73458

+ (const_string "mtjmpr")

73459

+ (const_string "*")

73460

+ (const_string "mftgpr")

73461

+ (const_string "mffgpr")

73462

+ (const_string "mftgpr")

73463

+ (const_string "mffgpr")])

73464

+ (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4,4,4,4")])

73465

73466

-(define_insn "*movdi_internal64"

73467

- [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,?wa")

73468

- (match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,O"))]

73469

- "TARGET_POWERPC64 && (!TARGET_MFPGPR || !TARGET_HARD_FLOAT || !TARGET_FPRS)

73470

- && (gpc_reg_operand (operands[0], DImode)

73471

- || gpc_reg_operand (operands[1], DImode))"

73472

- "@

73473

- std%U0%X0 %1,%0

73474

- ld%U1%X1 %0,%1

73475

- mr %0,%1

73476

- li %0,%1

73477

- lis %0,%v1

73478

- #

73479

- stfd%U0%X0 %1,%0

73480

- lfd%U1%X1 %0,%1

73481

- fmr %0,%1

73482

- mf%1 %0

73483

- mt%0 %1

73484

- nop

73485

- xxlxor %x0,%x0,%x0"

73486

- [(set_attr "type" "store,load,*,*,*,*,fpstore,fpload,fp,mfjmpr,mtjmpr,*,vecsimple")

73487

- (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4")])

73488

-

73489

;; immediate value valid for a single instruction hiding in a const_double

73490

(define_insn ""

73491

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

73492

@@ -8719,14 +10347,16 @@

73493

FAIL;

73494

}")

73495

73496

-;; TImode is similar, except that we usually want to compute the address into

73497

-;; a register and use lsi/stsi (the exception is during reload).

73498

+;; TImode/PTImode is similar, except that we usually want to compute the

73499

+;; address into a register and use lsi/stsi (the exception is during reload).

73500

73501

-(define_insn "*movti_string"

73502

- [(set (match_operand:TI 0 "reg_or_mem_operand" "=Q,Y,????r,????r,????r,r")

73503

- (match_operand:TI 1 "input_operand" "r,r,Q,Y,r,n"))]

73504

+(define_insn "*mov<mode>_string"

73505

+ [(set (match_operand:TI2 0 "reg_or_mem_operand" "=Q,Y,????r,????r,????r,r")

73506

+ (match_operand:TI2 1 "input_operand" "r,r,Q,Y,r,n"))]

73507

"! TARGET_POWERPC64

73508

- && (gpc_reg_operand (operands[0], TImode) || gpc_reg_operand (operands[1], TImode))"

73509

+ && (<MODE>mode != TImode || VECTOR_MEM_NONE_P (TImode))

73510

+ && (gpc_reg_operand (operands[0], <MODE>mode)

73511

+ || gpc_reg_operand (operands[1], <MODE>mode))"

73512

"*

73513

{

73514

switch (which_alternative)

73515

@@ -8756,27 +10386,32 @@

73516

(const_string "always")

73517

(const_string "conditional")))])

73518

73519

-(define_insn "*movti_ppc64"

73520

- [(set (match_operand:TI 0 "nonimmediate_operand" "=Y,r,r")

73521

- (match_operand:TI 1 "input_operand" "r,Y,r"))]

73522

- "(TARGET_POWERPC64 && (gpc_reg_operand (operands[0], TImode)

73523

- || gpc_reg_operand (operands[1], TImode)))

73524

- && VECTOR_MEM_NONE_P (TImode)"

73525

- "#"

73526

- [(set_attr "type" "store,load,*")])

73527

+(define_insn "*mov<mode>_ppc64"

73528

+ [(set (match_operand:TI2 0 "nonimmediate_operand" "=wQ,Y,r,r,r,r")

73529

+ (match_operand:TI2 1 "input_operand" "r,r,wQ,Y,r,n"))]

73530

+ "(TARGET_POWERPC64 && VECTOR_MEM_NONE_P (<MODE>mode)

73531

+ && (gpc_reg_operand (operands[0], <MODE>mode)

73532

+ || gpc_reg_operand (operands[1], <MODE>mode)))"

73533

+{

73534

+ return rs6000_output_move_128bit (operands);

73535

+}

73536

+ [(set_attr "type" "store,store,load,load,*,*")

73537

+ (set_attr "length" "8")])

73538

73539

(define_split

73540

- [(set (match_operand:TI 0 "gpc_reg_operand" "")

73541

- (match_operand:TI 1 "const_double_operand" ""))]

73542

- "TARGET_POWERPC64 && VECTOR_MEM_NONE_P (TImode)"

73543

+ [(set (match_operand:TI2 0 "int_reg_operand" "")

73544

+ (match_operand:TI2 1 "const_double_operand" ""))]

73545

+ "TARGET_POWERPC64

73546

+ && (VECTOR_MEM_NONE_P (<MODE>mode)

73547

+ || (reload_completed && INT_REGNO_P (REGNO (operands[0]))))"

73548

[(set (match_dup 2) (match_dup 4))

73549

(set (match_dup 3) (match_dup 5))]

73550

"

73551

{

73552

operands[2] = operand_subword_force (operands[0], WORDS_BIG_ENDIAN == 0,

73553

- TImode);

73554

+ <MODE>mode);

73555

operands[3] = operand_subword_force (operands[0], WORDS_BIG_ENDIAN != 0,

73556

- TImode);

73557

+ <MODE>mode);

73558

if (GET_CODE (operands[1]) == CONST_DOUBLE)

73559

{

73560

operands[4] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));

73561

@@ -8792,10 +10427,12 @@

73562

}")

73563

73564

(define_split

73565

- [(set (match_operand:TI 0 "nonimmediate_operand" "")

73566

- (match_operand:TI 1 "input_operand" ""))]

73567

- "reload_completed && VECTOR_MEM_NONE_P (TImode)

73568

- && gpr_or_gpr_p (operands[0], operands[1])"

73569

+ [(set (match_operand:TI2 0 "nonimmediate_operand" "")

73570

+ (match_operand:TI2 1 "input_operand" ""))]

73571

+ "reload_completed

73572

+ && gpr_or_gpr_p (operands[0], operands[1])

73573

+ && !direct_move_p (operands[0], operands[1])

73574

+ && !quad_load_store_p (operands[0], operands[1])"

73575

[(pc)]

73576

{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; })

73577

73578

@@ -9651,7 +11288,7 @@

73579

(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

73580

UNSPEC_TLSGD)

73581

(clobber (reg:SI LR_REGNO))]

73582

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX"

73583

+ "HAVE_AS_TLS && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

73584

{

73585

if (TARGET_CMODEL != CMODEL_SMALL)

73586

return "addis %0,%1,%2@got@tlsgd@ha\;addi %0,%0,%2@got@tlsgd@l\;"

73587

@@ -9723,7 +11360,7 @@

73588

(unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGD)))

73589

(set (match_dup 0)

73590

(lo_sum:TLSmode (match_dup 3)

73591

- (unspec:TLSmode [(match_dup 2)] UNSPEC_TLSGD)))]

73592

+ (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGD)))]

73593

"

73594

{

73595

operands[3] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

73596

@@ -9746,7 +11383,8 @@

73597

(define_insn "*tls_gd_low<TLSmode:tls_abi_suffix>"

73598

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=b")

73599

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

73600

- (unspec:TLSmode [(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

73601

+ (unspec:TLSmode [(match_operand:TLSmode 3 "gpc_reg_operand" "b")

73602

+ (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

73603

UNSPEC_TLSGD)))]

73604

"HAVE_AS_TLS && TARGET_TLS_MARKERS && TARGET_CMODEL != CMODEL_SMALL"

73605

"addi %0,%1,%2@got@tlsgd@l"

73606

@@ -9759,7 +11397,8 @@

73607

(unspec:TLSmode [(match_operand:TLSmode 3 "rs6000_tls_symbol_ref" "")]

73608

UNSPEC_TLSGD)

73609

(clobber (reg:SI LR_REGNO))]

73610

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX && TARGET_TLS_MARKERS"

73611

+ "HAVE_AS_TLS && TARGET_TLS_MARKERS

73612

+ && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

73613

"bl %z1(%3@tlsgd)\;nop"

73614

[(set_attr "type" "branch")

73615

(set_attr "length" "8")])

73616

@@ -9791,7 +11430,7 @@

73617

(unspec:TLSmode [(match_operand:TLSmode 1 "gpc_reg_operand" "b")]

73618

UNSPEC_TLSLD)

73619

(clobber (reg:SI LR_REGNO))]

73620

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX"

73621

+ "HAVE_AS_TLS && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

73622

{

73623

if (TARGET_CMODEL != CMODEL_SMALL)

73624

return "addis %0,%1,%&@got@tlsld@ha\;addi %0,%0,%&@got@tlsld@l\;"

73625

@@ -9858,7 +11497,7 @@

73626

(unspec:TLSmode [(const_int 0) (match_dup 1)] UNSPEC_TLSLD)))

73627

(set (match_dup 0)

73628

(lo_sum:TLSmode (match_dup 2)

73629

- (unspec:TLSmode [(const_int 0)] UNSPEC_TLSLD)))]

73630

+ (unspec:TLSmode [(const_int 0) (match_dup 1)] UNSPEC_TLSLD)))]

73631

"

73632

{

73633

operands[2] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

73634

@@ -9881,7 +11520,9 @@

73635

(define_insn "*tls_ld_low<TLSmode:tls_abi_suffix>"

73636

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=b")

73637

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

73638

- (unspec:TLSmode [(const_int 0)] UNSPEC_TLSLD)))]

73639

+ (unspec:TLSmode [(const_int 0)

73640

+ (match_operand:TLSmode 2 "gpc_reg_operand" "b")]

73641

+ UNSPEC_TLSLD)))]

73642

"HAVE_AS_TLS && TARGET_TLS_MARKERS && TARGET_CMODEL != CMODEL_SMALL"

73643

"addi %0,%1,%&@got@tlsld@l"

73644

[(set_attr "length" "4")])

73645

@@ -9892,7 +11533,8 @@

73646

(match_operand 2 "" "g")))

73647

(unspec:TLSmode [(const_int 0)] UNSPEC_TLSLD)

73648

(clobber (reg:SI LR_REGNO))]

73649

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX && TARGET_TLS_MARKERS"

73650

+ "HAVE_AS_TLS && TARGET_TLS_MARKERS

73651

+ && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

73652

"bl %z1(%&@tlsld)\;nop"

73653

[(set_attr "type" "branch")

73654

(set_attr "length" "8")])

73655

@@ -9953,7 +11595,7 @@

73656

(unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTDTPREL)))

73657

(set (match_dup 0)

73658

(lo_sum:TLSmode (match_dup 3)

73659

- (unspec:TLSmode [(match_dup 2)] UNSPEC_TLSGOTDTPREL)))]

73660

+ (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTDTPREL)))]

73661

"

73662

{

73663

operands[3] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

73664

@@ -9976,7 +11618,8 @@

73665

(define_insn "*tls_got_dtprel_low<TLSmode:tls_abi_suffix>"

73666

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=r")

73667

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

73668

- (unspec:TLSmode [(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

73669

+ (unspec:TLSmode [(match_operand:TLSmode 3 "gpc_reg_operand" "b")

73670

+ (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

73671

UNSPEC_TLSGOTDTPREL)))]

73672

"HAVE_AS_TLS && TARGET_CMODEL != CMODEL_SMALL"

73673

"l<TLSmode:tls_insn_suffix> %0,%2@got@dtprel@l(%1)"

73674

@@ -10022,7 +11665,7 @@

73675

(unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))

73676

(set (match_dup 0)

73677

(lo_sum:TLSmode (match_dup 3)

73678

- (unspec:TLSmode [(match_dup 2)] UNSPEC_TLSGOTTPREL)))]

73679

+ (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))]

73680

"

73681

{

73682

operands[3] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

73683

@@ -10045,7 +11688,8 @@

73684

(define_insn "*tls_got_tprel_low<TLSmode:tls_abi_suffix>"

73685

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=r")

73686

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

73687

- (unspec:TLSmode [(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

73688

+ (unspec:TLSmode [(match_operand:TLSmode 3 "gpc_reg_operand" "b")

73689

+ (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

73690

UNSPEC_TLSGOTTPREL)))]

73691

"HAVE_AS_TLS && TARGET_CMODEL != CMODEL_SMALL"

73692

"l<TLSmode:tls_insn_suffix> %0,%2@got@tprel@l(%1)"

73693

@@ -10261,7 +11905,7 @@

73694

[(parallel [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

73695

(unspec:SI [(const_int 0)] UNSPEC_TOC))

73696

(use (reg:SI 2))])]

73697

- "DEFAULT_ABI == ABI_AIX && TARGET_32BIT"

73698

+ "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_32BIT"

73699

"*

73700

{

73701

char buf[30];

73702

@@ -10276,7 +11920,7 @@

73703

[(parallel [(set (match_operand:DI 0 "gpc_reg_operand" "=r")

73704

(unspec:DI [(const_int 0)] UNSPEC_TOC))

73705

(use (reg:DI 2))])]

73706

- "DEFAULT_ABI == ABI_AIX && TARGET_64BIT"

73707

+ "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_64BIT"

73708

"*

73709

{

73710

char buf[30];

73711

@@ -10306,7 +11950,7 @@

73712

[(parallel [(set (reg:SI LR_REGNO)

73713

(match_operand:SI 0 "immediate_operand" "s"))

73714

(use (unspec [(match_dup 0)] UNSPEC_TOC))])]

73715

- "TARGET_ELF && DEFAULT_ABI != ABI_AIX

73716

+ "TARGET_ELF && DEFAULT_ABI == ABI_V4

73717

&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"

73718

"")

73719

73720

@@ -10314,7 +11958,7 @@

73721

[(set (reg:SI LR_REGNO)

73722

(match_operand:SI 0 "immediate_operand" "s"))

73723

(use (unspec [(match_dup 0)] UNSPEC_TOC))]

73724

- "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX

73725

+ "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4

73726

&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"

73727

"bcl 20,31,%0\\n%0:"

73728

[(set_attr "type" "branch")

73729

@@ -10324,7 +11968,7 @@

73730

[(set (reg:SI LR_REGNO)

73731

(match_operand:SI 0 "immediate_operand" "s"))

73732

(use (unspec [(match_dup 0)] UNSPEC_TOC))]

73733

- "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX

73734

+ "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4

73735

&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"

73736

"*

73737

{

73738

@@ -10344,7 +11988,7 @@

73739

(label_ref (match_operand 1 "" ""))]

73740

UNSPEC_TOCPTR))

73741

(match_dup 1)])]

73742

- "TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

73743

+ "TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

73744

"")

73745

73746

(define_insn "load_toc_v4_PIC_1b_normal"

73747

@@ -10353,7 +11997,7 @@

73748

(label_ref (match_operand 1 "" ""))]

73749

UNSPEC_TOCPTR))

73750

(match_dup 1)]

73751

- "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

73752

+ "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

73753

"bcl 20,31,$+8\;.long %0-$"

73754

[(set_attr "type" "branch")

73755

(set_attr "length" "8")])

73756

@@ -10364,7 +12008,7 @@

73757

(label_ref (match_operand 1 "" ""))]

73758

UNSPEC_TOCPTR))

73759

(match_dup 1)]

73760

- "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

73761

+ "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

73762

"*

73763

{

73764

char name[32];

73765

@@ -10382,7 +12026,7 @@

73766

(mem:SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")

73767

(minus:SI (match_operand:SI 2 "immediate_operand" "s")

73768

(match_operand:SI 3 "immediate_operand" "s")))))]

73769

- "TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

73770

+ "TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

73771

"lwz %0,%2-%3(%1)"

73772

[(set_attr "type" "load")])

73773

73774

@@ -10392,7 +12036,7 @@

73775

(high:SI

73776

(minus:SI (match_operand:SI 2 "symbol_ref_operand" "s")

73777

(match_operand:SI 3 "symbol_ref_operand" "s")))))]

73778

- "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic"

73779

+ "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI == ABI_V4 && flag_pic"

73780

"addis %0,%1,%2-%3@ha")

73781

73782

(define_insn "load_toc_v4_PIC_3c"

73783

@@ -10400,7 +12044,7 @@

73784

(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")

73785

(minus:SI (match_operand:SI 2 "symbol_ref_operand" "s")

73786

(match_operand:SI 3 "symbol_ref_operand" "s"))))]

73787

- "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic"

73788

+ "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI == ABI_V4 && flag_pic"

73789

"addi %0,%1,%2-%3@l")

73790

73791

;; If the TOC is shared over a translation unit, as happens with all

73792

@@ -10542,8 +12186,13 @@

73793

73794

operands[0] = XEXP (operands[0], 0);

73795

73796

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

73797

+ {

73798

+ rs6000_call_aix (NULL_RTX, operands[0], operands[1], operands[2]);

73799

+ DONE;

73800

+ }

73801

+

73802

if (GET_CODE (operands[0]) != SYMBOL_REF

73803

- || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[0]))

73804

|| (DEFAULT_ABI != ABI_DARWIN && (INTVAL (operands[2]) & CALL_LONG) != 0))

73805

{

73806

if (INTVAL (operands[2]) & CALL_LONG)

73807

@@ -10556,12 +12205,6 @@

73808

operands[0] = force_reg (Pmode, operands[0]);

73809

break;

73810

73811

- case ABI_AIX:

73812

- /* AIX function pointers are really pointers to a three word

73813

- area. */

73814

- rs6000_call_indirect_aix (NULL_RTX, operands[0], operands[1]);

73815

- DONE;

73816

-

73817

default:

73818

gcc_unreachable ();

73819

}

73820

@@ -10587,8 +12230,13 @@

73821

73822

operands[1] = XEXP (operands[1], 0);

73823

73824

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

73825

+ {

73826

+ rs6000_call_aix (operands[0], operands[1], operands[2], operands[3]);

73827

+ DONE;

73828

+ }

73829

+

73830

if (GET_CODE (operands[1]) != SYMBOL_REF

73831

- || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[1]))

73832

|| (DEFAULT_ABI != ABI_DARWIN && (INTVAL (operands[3]) & CALL_LONG) != 0))

73833

{

73834

if (INTVAL (operands[3]) & CALL_LONG)

73835

@@ -10601,12 +12249,6 @@

73836

operands[1] = force_reg (Pmode, operands[1]);

73837

break;

73838

73839

- case ABI_AIX:

73840

- /* AIX function pointers are really pointers to a three word

73841

- area. */

73842

- rs6000_call_indirect_aix (operands[0], operands[1], operands[2]);

73843

- DONE;

73844

-

73845

default:

73846

gcc_unreachable ();

73847

}

73848

@@ -10698,136 +12340,7 @@

73849

[(set_attr "type" "branch")

73850

(set_attr "length" "4,8")])

73851

73852

-;; Call to indirect functions with the AIX abi using a 3 word descriptor.

73853

-;; Operand0 is the addresss of the function to call

73854

-;; Operand1 is the flag for System V.4 for unprototyped or FP registers

73855

-;; Operand2 is the location in the function descriptor to load r2 from

73856

-;; Operand3 is the stack location to hold the current TOC pointer

73857

73858

-(define_insn "call_indirect_aix<ptrsize>"

73859

- [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

73860

- (match_operand 1 "" "g,g"))

73861

- (use (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

73862

- (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

73863

- (use (reg:P STATIC_CHAIN_REGNUM))

73864

- (clobber (reg:P LR_REGNO))]

73865

- "DEFAULT_ABI == ABI_AIX && TARGET_POINTERS_TO_NESTED_FUNCTIONS"

73866

- "<ptrload> 2,%2\;b%T0l\;<ptrload> 2,%3"

73867

- [(set_attr "type" "jmpreg")

73868

- (set_attr "length" "12")])

73869

-

73870

-;; Like call_indirect_aix<ptrsize>, but no use of the static chain

73871

-;; Operand0 is the addresss of the function to call

73872

-;; Operand1 is the flag for System V.4 for unprototyped or FP registers

73873

-;; Operand2 is the location in the function descriptor to load r2 from

73874

-;; Operand3 is the stack location to hold the current TOC pointer

73875

-

73876

-(define_insn "call_indirect_aix<ptrsize>_nor11"

73877

- [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

73878

- (match_operand 1 "" "g,g"))

73879

- (use (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

73880

- (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

73881

- (clobber (reg:P LR_REGNO))]

73882

- "DEFAULT_ABI == ABI_AIX && !TARGET_POINTERS_TO_NESTED_FUNCTIONS"

73883

- "<ptrload> 2,%2\;b%T0l\;<ptrload> 2,%3"

73884

- [(set_attr "type" "jmpreg")

73885

- (set_attr "length" "12")])

73886

-

73887

-;; Operand0 is the return result of the function

73888

-;; Operand1 is the addresss of the function to call

73889

-;; Operand2 is the flag for System V.4 for unprototyped or FP registers

73890

-;; Operand3 is the location in the function descriptor to load r2 from

73891

-;; Operand4 is the stack location to hold the current TOC pointer

73892

-

73893

-(define_insn "call_value_indirect_aix<ptrsize>"

73894

- [(set (match_operand 0 "" "")

73895

- (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

73896

- (match_operand 2 "" "g,g")))

73897

- (use (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

73898

- (set (reg:P TOC_REGNUM) (match_operand:P 4 "memory_operand" "<ptrm>,<ptrm>"))

73899

- (use (reg:P STATIC_CHAIN_REGNUM))

73900

- (clobber (reg:P LR_REGNO))]

73901

- "DEFAULT_ABI == ABI_AIX && TARGET_POINTERS_TO_NESTED_FUNCTIONS"

73902

- "<ptrload> 2,%3\;b%T1l\;<ptrload> 2,%4"

73903

- [(set_attr "type" "jmpreg")

73904

- (set_attr "length" "12")])

73905

-

73906

-;; Like call_value_indirect_aix<ptrsize>, but no use of the static chain

73907

-;; Operand0 is the return result of the function

73908

-;; Operand1 is the addresss of the function to call

73909

-;; Operand2 is the flag for System V.4 for unprototyped or FP registers

73910

-;; Operand3 is the location in the function descriptor to load r2 from

73911

-;; Operand4 is the stack location to hold the current TOC pointer

73912

-

73913

-(define_insn "call_value_indirect_aix<ptrsize>_nor11"

73914

- [(set (match_operand 0 "" "")

73915

- (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

73916

- (match_operand 2 "" "g,g")))

73917

- (use (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

73918

- (set (reg:P TOC_REGNUM) (match_operand:P 4 "memory_operand" "<ptrm>,<ptrm>"))

73919

- (clobber (reg:P LR_REGNO))]

73920

- "DEFAULT_ABI == ABI_AIX && !TARGET_POINTERS_TO_NESTED_FUNCTIONS"

73921

- "<ptrload> 2,%3\;b%T1l\;<ptrload> 2,%4"

73922

- [(set_attr "type" "jmpreg")

73923

- (set_attr "length" "12")])

73924

-

73925

-;; Call to function which may be in another module. Restore the TOC

73926

-;; pointer (r2) after the call unless this is System V.

73927

-;; Operand2 is nonzero if we are using the V.4 calling sequence and

73928

-;; either the function was not prototyped, or it was prototyped as a

73929

-;; variable argument function. It is > 0 if FP registers were passed

73930

-;; and < 0 if they were not.

73931

-

73932

-(define_insn "*call_nonlocal_aix32"

73933

- [(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))

73934

- (match_operand 1 "" "g"))

73935

- (use (match_operand:SI 2 "immediate_operand" "O"))

73936

- (clobber (reg:SI LR_REGNO))]

73937

- "TARGET_32BIT

73938

- && DEFAULT_ABI == ABI_AIX

73939

- && (INTVAL (operands[2]) & CALL_LONG) == 0"

73940

- "bl %z0\;nop"

73941

- [(set_attr "type" "branch")

73942

- (set_attr "length" "8")])

73943

-

73944

-(define_insn "*call_nonlocal_aix64"

73945

- [(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))

73946

- (match_operand 1 "" "g"))

73947

- (use (match_operand:SI 2 "immediate_operand" "O"))

73948

- (clobber (reg:SI LR_REGNO))]

73949

- "TARGET_64BIT

73950

- && DEFAULT_ABI == ABI_AIX

73951

- && (INTVAL (operands[2]) & CALL_LONG) == 0"

73952

- "bl %z0\;nop"

73953

- [(set_attr "type" "branch")

73954

- (set_attr "length" "8")])

73955

-

73956

-(define_insn "*call_value_nonlocal_aix32"

73957

- [(set (match_operand 0 "" "")

73958

- (call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))

73959

- (match_operand 2 "" "g")))

73960

- (use (match_operand:SI 3 "immediate_operand" "O"))

73961

- (clobber (reg:SI LR_REGNO))]

73962

- "TARGET_32BIT

73963

- && DEFAULT_ABI == ABI_AIX

73964

- && (INTVAL (operands[3]) & CALL_LONG) == 0"

73965

- "bl %z1\;nop"

73966

- [(set_attr "type" "branch")

73967

- (set_attr "length" "8")])

73968

-

73969

-(define_insn "*call_value_nonlocal_aix64"

73970

- [(set (match_operand 0 "" "")

73971

- (call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))

73972

- (match_operand 2 "" "g")))

73973

- (use (match_operand:SI 3 "immediate_operand" "O"))

73974

- (clobber (reg:SI LR_REGNO))]

73975

- "TARGET_64BIT

73976

- && DEFAULT_ABI == ABI_AIX

73977

- && (INTVAL (operands[3]) & CALL_LONG) == 0"

73978

- "bl %z1\;nop"

73979

- [(set_attr "type" "branch")

73980

- (set_attr "length" "8")])

73981

-

73982

;; A function pointer under System V is just a normal pointer

73983

;; operands[0] is the function pointer

73984

;; operands[1] is the stack size to clean up

73985

@@ -11009,6 +12522,104 @@

73986

[(set_attr "type" "branch,branch")

73987

(set_attr "length" "4,8")])

73988

73989

+

73990

+;; Call to AIX abi function in the same module.

73991

+

73992

+(define_insn "*call_local_aix<mode>"

73993

+ [(call (mem:SI (match_operand:P 0 "current_file_function_operand" "s"))

73994

+ (match_operand 1 "" "g"))

73995

+ (clobber (reg:P LR_REGNO))]

73996

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

73997

+ "bl %z0"

73998

+ [(set_attr "type" "branch")

73999

+ (set_attr "length" "4")])

74000

+

74001

+(define_insn "*call_value_local_aix<mode>"

74002

+ [(set (match_operand 0 "" "")

74003

+ (call (mem:SI (match_operand:P 1 "current_file_function_operand" "s"))

74004

+ (match_operand 2 "" "g")))

74005

+ (clobber (reg:P LR_REGNO))]

74006

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

74007

+ "bl %z1"

74008

+ [(set_attr "type" "branch")

74009

+ (set_attr "length" "4")])

74010

+

74011

+;; Call to AIX abi function which may be in another module.

74012

+;; Restore the TOC pointer (r2) after the call.

74013

+

74014

+(define_insn "*call_nonlocal_aix<mode>"

74015

+ [(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s"))

74016

+ (match_operand 1 "" "g"))

74017

+ (clobber (reg:P LR_REGNO))]

74018

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

74019

+ "bl %z0\;nop"

74020

+ [(set_attr "type" "branch")

74021

+ (set_attr "length" "8")])

74022

+

74023

+(define_insn "*call_value_nonlocal_aix<mode>"

74024

+ [(set (match_operand 0 "" "")

74025

+ (call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s"))

74026

+ (match_operand 2 "" "g")))

74027

+ (clobber (reg:P LR_REGNO))]

74028

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

74029

+ "bl %z1\;nop"

74030

+ [(set_attr "type" "branch")

74031

+ (set_attr "length" "8")])

74032

+

74033

+;; Call to indirect functions with the AIX abi using a 3 word descriptor.

74034

+;; Operand0 is the addresss of the function to call

74035

+;; Operand2 is the location in the function descriptor to load r2 from

74036

+;; Operand3 is the stack location to hold the current TOC pointer

74037

+

74038

+(define_insn "*call_indirect_aix<mode>"

74039

+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

74040

+ (match_operand 1 "" "g,g"))

74041

+ (use (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

74042

+ (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

74043

+ (clobber (reg:P LR_REGNO))]

74044

+ "DEFAULT_ABI == ABI_AIX"

74045

+ "<ptrload> 2,%2\;b%T0l\;<ptrload> 2,%3"

74046

+ [(set_attr "type" "jmpreg")

74047

+ (set_attr "length" "12")])

74048

+

74049

+(define_insn "*call_value_indirect_aix<mode>"

74050

+ [(set (match_operand 0 "" "")

74051

+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

74052

+ (match_operand 2 "" "g,g")))

74053

+ (use (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

74054

+ (set (reg:P TOC_REGNUM) (match_operand:P 4 "memory_operand" "<ptrm>,<ptrm>"))

74055

+ (clobber (reg:P LR_REGNO))]

74056

+ "DEFAULT_ABI == ABI_AIX"

74057

+ "<ptrload> 2,%3\;b%T1l\;<ptrload> 2,%4"

74058

+ [(set_attr "type" "jmpreg")

74059

+ (set_attr "length" "12")])

74060

+

74061

+;; Call to indirect functions with the ELFv2 ABI.

74062

+;; Operand0 is the addresss of the function to call

74063

+;; Operand2 is the stack location to hold the current TOC pointer

74064

+

74065

+(define_insn "*call_indirect_elfv2<mode>"

74066

+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

74067

+ (match_operand 1 "" "g,g"))

74068

+ (set (reg:P TOC_REGNUM) (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

74069

+ (clobber (reg:P LR_REGNO))]

74070

+ "DEFAULT_ABI == ABI_ELFv2"

74071

+ "b%T0l\;<ptrload> 2,%2"

74072

+ [(set_attr "type" "jmpreg")

74073

+ (set_attr "length" "8")])

74074

+

74075

+(define_insn "*call_value_indirect_elfv2<mode>"

74076

+ [(set (match_operand 0 "" "")

74077

+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

74078

+ (match_operand 2 "" "g,g")))

74079

+ (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

74080

+ (clobber (reg:P LR_REGNO))]

74081

+ "DEFAULT_ABI == ABI_ELFv2"

74082

+ "b%T1l\;<ptrload> 2,%3"

74083

+ [(set_attr "type" "jmpreg")

74084

+ (set_attr "length" "8")])

74085

+

74086

+

74087

;; Call subroutine returning any type.

74088

(define_expand "untyped_call"

74089

[(parallel [(call (match_operand 0 "" "")

74090

@@ -11056,8 +12667,41 @@

74091

gcc_assert (GET_CODE (operands[1]) == CONST_INT);

74092

74093

operands[0] = XEXP (operands[0], 0);

74094

+

74095

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

74096

+ {

74097

+ rs6000_sibcall_aix (NULL_RTX, operands[0], operands[1], operands[2]);

74098

+ DONE;

74099

+ }

74100

}")

74101

74102

+(define_expand "sibcall_value"

74103

+ [(parallel [(set (match_operand 0 "register_operand" "")

74104

+ (call (mem:SI (match_operand 1 "address_operand" ""))

74105

+ (match_operand 2 "" "")))

74106

+ (use (match_operand 3 "" ""))

74107

+ (use (reg:SI LR_REGNO))

74108

+ (simple_return)])]

74109

+ ""

74110

+ "

74111

+{

74112

+#if TARGET_MACHO

74113

+ if (MACHOPIC_INDIRECT)

74114

+ operands[1] = machopic_indirect_call_target (operands[1]);

74115

+#endif

74116

+

74117

+ gcc_assert (GET_CODE (operands[1]) == MEM);

74118

+ gcc_assert (GET_CODE (operands[2]) == CONST_INT);

74119

+

74120

+ operands[1] = XEXP (operands[1], 0);

74121

+

74122

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

74123

+ {

74124

+ rs6000_sibcall_aix (operands[0], operands[1], operands[2], operands[3]);

74125

+ DONE;

74126

+ }

74127

+}")

74128

+

74129

;; this and similar patterns must be marked as using LR, otherwise

74130

;; dataflow will try to delete the store into it. This is true

74131

;; even when the actual reg to jump to is in CTR, when LR was

74132

@@ -11123,7 +12767,6 @@

74133

[(set_attr "type" "branch")

74134

(set_attr "length" "4,8")])

74135

74136

-

74137

(define_insn "*sibcall_value_local64"

74138

[(set (match_operand 0 "" "")

74139

(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))

74140

@@ -11145,35 +12788,6 @@

74141

[(set_attr "type" "branch")

74142

(set_attr "length" "4,8")])

74143

74144

-(define_insn "*sibcall_nonlocal_aix<mode>"

74145

- [(call (mem:SI (match_operand:P 0 "call_operand" "s,c"))

74146

- (match_operand 1 "" "g,g"))

74147

- (use (match_operand:SI 2 "immediate_operand" "O,O"))

74148

- (use (reg:SI LR_REGNO))

74149

- (simple_return)]

74150

- "DEFAULT_ABI == ABI_AIX

74151

- && (INTVAL (operands[2]) & CALL_LONG) == 0"

74152

- "@

74153

- b %z0

74154

- b%T0"

74155

- [(set_attr "type" "branch")

74156

- (set_attr "length" "4")])

74157

-

74158

-(define_insn "*sibcall_value_nonlocal_aix<mode>"

74159

- [(set (match_operand 0 "" "")

74160

- (call (mem:SI (match_operand:P 1 "call_operand" "s,c"))

74161

- (match_operand 2 "" "g,g")))

74162

- (use (match_operand:SI 3 "immediate_operand" "O,O"))

74163

- (use (reg:SI LR_REGNO))

74164

- (simple_return)]

74165

- "DEFAULT_ABI == ABI_AIX

74166

- && (INTVAL (operands[3]) & CALL_LONG) == 0"

74167

- "@

74168

- b %z1

74169

- b%T1"

74170

- [(set_attr "type" "branch")

74171

- (set_attr "length" "4")])

74172

-

74173

(define_insn "*sibcall_nonlocal_sysv<mode>"

74174

[(call (mem:SI (match_operand:P 0 "call_operand" "s,s,c,c"))

74175

(match_operand 1 "" ""))

74176

@@ -11204,27 +12818,6 @@

74177

[(set_attr "type" "branch")

74178

(set_attr "length" "4,8,4,8")])

74179

74180

-(define_expand "sibcall_value"

74181

- [(parallel [(set (match_operand 0 "register_operand" "")

74182

- (call (mem:SI (match_operand 1 "address_operand" ""))

74183

- (match_operand 2 "" "")))

74184

- (use (match_operand 3 "" ""))

74185

- (use (reg:SI LR_REGNO))

74186

- (simple_return)])]

74187

- ""

74188

- "

74189

-{

74190

-#if TARGET_MACHO

74191

- if (MACHOPIC_INDIRECT)

74192

- operands[1] = machopic_indirect_call_target (operands[1]);

74193

-#endif

74194

-

74195

- gcc_assert (GET_CODE (operands[1]) == MEM);

74196

- gcc_assert (GET_CODE (operands[2]) == CONST_INT);

74197

-

74198

- operands[1] = XEXP (operands[1], 0);

74199

-}")

74200

-

74201

(define_insn "*sibcall_value_nonlocal_sysv<mode>"

74202

[(set (match_operand 0 "" "")

74203

(call (mem:SI (match_operand:P 1 "call_operand" "s,s,c,c"))

74204

@@ -11256,6 +12849,31 @@

74205

[(set_attr "type" "branch")

74206

(set_attr "length" "4,8,4,8")])

74207

74208

+;; AIX ABI sibling call patterns.

74209

+

74210

+(define_insn "*sibcall_aix<mode>"

74211

+ [(call (mem:SI (match_operand:P 0 "call_operand" "s,c"))

74212

+ (match_operand 1 "" "g,g"))

74213

+ (simple_return)]

74214

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

74215

+ "@

74216

+ b %z0

74217

+ b%T0"

74218

+ [(set_attr "type" "branch")

74219

+ (set_attr "length" "4")])

74220

+

74221

+(define_insn "*sibcall_value_aix<mode>"

74222

+ [(set (match_operand 0 "" "")

74223

+ (call (mem:SI (match_operand:P 1 "call_operand" "s,c"))

74224

+ (match_operand 2 "" "g,g")))

74225

+ (simple_return)]

74226

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

74227

+ "@

74228

+ b %z1

74229

+ b%T1"

74230

+ [(set_attr "type" "branch")

74231

+ (set_attr "length" "4")])

74232

+

74233

(define_expand "sibcall_epilogue"

74234

[(use (const_int 0))]

74235

""

74236

@@ -11294,7 +12912,14 @@

74237

operands[1] = gen_rtx_REG (Pmode, 0);

74238

return "st<wd>%U0%X0 %1,%0";

74239

}

74240

- [(set_attr "type" "store")

74241

+ [(set (attr "type")

74242

+ (if_then_else

74243

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

74244

+ (const_string "store_ux")

74245

+ (if_then_else

74246

+ (match_test "update_address_mem (operands[0], VOIDmode)")

74247

+ (const_string "store_u")

74248

+ (const_string "store"))))

74249

(set_attr "length" "4")])

74250

74251

(define_insn "probe_stack_range<P:mode>"

74252

@@ -11589,23 +13214,6 @@

74253

[(set (match_dup 3) (compare:CCUNS (match_dup 1) (match_dup 2)))

74254

(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 4)))])

74255

74256

-(define_insn "*cmpsf_internal1"

74257

- [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")

74258

- (compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "f")

74259

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

74260

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74261

- "fcmpu %0,%1,%2"

74262

- [(set_attr "type" "fpcompare")])

74263

-

74264

-(define_insn "*cmpdf_internal1"

74265

- [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")

74266

- (compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "d")

74267

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

74268

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

74269

- && !VECTOR_UNIT_VSX_P (DFmode)"

74270

- "fcmpu %0,%1,%2"

74271

- [(set_attr "type" "fpcompare")])

74272

-

74273

;; Only need to compare second words if first words equal

74274

(define_insn "*cmptf_internal1"

74275

[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")

74276

@@ -13501,6 +15109,14 @@

74277

"mfcr %0"

74278

[(set_attr "type" "mfcr")])

74279

74280

+(define_insn "*crsave"

74281

+ [(match_parallel 0 "crsave_operation"

74282

+ [(set (match_operand:SI 1 "memory_operand" "=m")

74283

+ (match_operand:SI 2 "gpc_reg_operand" "r"))])]

74284

+ ""

74285

+ "stw %2,%1"

74286

+ [(set_attr "type" "store")])

74287

+

74288

(define_insn "*stmw"

74289

[(match_parallel 0 "stmw_operation"

74290

[(set (match_operand:SI 1 "memory_operand" "=m")

74291

@@ -13885,7 +15501,7 @@

74292

(match_operand:P 2 "gpc_reg_operand" "r")] UNSPEC_BPERM))]

74293

"TARGET_POPCNTD"

74294

"bpermd %0,%1,%2"

74295

- [(set_attr "type" "integer")])

74296

+ [(set_attr "type" "popcnt")])

74297

74298

74299

;; Builtin fma support. Handle

74300

@@ -13900,6 +15516,20 @@

74301

""

74302

"")

74303

74304

+(define_insn "*fma<mode>4_fpr"

74305

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

74306

+ (fma:SFDF

74307

+ (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>,<Fv>")

74308

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

74309

+ (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>")))]

74310

+ "TARGET_<MODE>_FPR"

74311

+ "@

74312

+ fmadd<Ftrad> %0,%1,%2,%3

74313

+ xsmadda<Fvsx> %x0,%x1,%x2

74314

+ xsmaddm<Fvsx> %x0,%x1,%x3"

74315

+ [(set_attr "type" "fp")

74316

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

74317

+

74318

; Altivec only has fma and nfms.

74319

(define_expand "fms<mode>4"

74320

[(set (match_operand:FMA_F 0 "register_operand" "")

74321

@@ -13910,6 +15540,20 @@

74322

"!VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

74323

"")

74324

74325

+(define_insn "*fms<mode>4_fpr"

74326

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

74327

+ (fma:SFDF

74328

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>,<Fv>")

74329

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

74330

+ (neg:SFDF (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>"))))]

74331

+ "TARGET_<MODE>_FPR"

74332

+ "@

74333

+ fmsub<Ftrad> %0,%1,%2,%3

74334

+ xsmsuba<Fvsx> %x0,%x1,%x2

74335

+ xsmsubm<Fvsx> %x0,%x1,%x3"

74336

+ [(set_attr "type" "fp")

74337

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

74338

+

74339

;; If signed zeros are ignored, -(a * b - c) = -a * b + c.

74340

(define_expand "fnma<mode>4"

74341

[(set (match_operand:FMA_F 0 "register_operand" "")

74342

@@ -13943,6 +15587,21 @@

74343

"!VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

74344

"")

74345

74346

+(define_insn "*nfma<mode>4_fpr"

74347

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

74348

+ (neg:SFDF

74349

+ (fma:SFDF

74350

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>,<Fv>")

74351

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

74352

+ (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>"))))]

74353

+ "TARGET_<MODE>_FPR"

74354

+ "@

74355

+ fnmadd<Ftrad> %0,%1,%2,%3

74356

+ xsnmadda<Fvsx> %x0,%x1,%x2

74357

+ xsnmaddm<Fvsx> %x0,%x1,%x3"

74358

+ [(set_attr "type" "fp")

74359

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

74360

+

74361

; Not an official optab name, but used from builtins.

74362

(define_expand "nfms<mode>4"

74363

[(set (match_operand:FMA_F 0 "register_operand" "")

74364

@@ -13954,6 +15613,23 @@

74365

""

74366

"")

74367

74368

+(define_insn "*nfmssf4_fpr"

74369

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

74370

+ (neg:SFDF

74371

+ (fma:SFDF

74372

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>,<Fv>")

74373

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

74374

+ (neg:SFDF

74375

+ (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>")))))]

74376

+ "TARGET_<MODE>_FPR"

74377

+ "@

74378

+ fnmsub<Ftrad> %0,%1,%2,%3

74379

+ xsnmsuba<Fvsx> %x0,%x1,%x2

74380

+ xsnmsubm<Fvsx> %x0,%x1,%x3"

74381

+ [(set_attr "type" "fp")

74382

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

74383

+

74384

+

74385

(define_expand "rs6000_get_timebase"

74386

[(use (match_operand:DI 0 "gpc_reg_operand" ""))]

74387

""

74388

@@ -14020,7 +15696,44 @@

74389

})

74390

74391

74392

+;; Power8 fusion support for fusing an addis instruction with a D-form load of

74393

+;; a GPR. The addis instruction must be adjacent to the load, and use the same

74394

+;; register that is being loaded. The fused ops must be physically adjacent.

74395

74396

+;; We use define_peephole for the actual addis/load, and the register used to

74397

+;; hold the addis value must be the same as the register being loaded. We use

74398

+;; define_peephole2 to change the register used for addis to be the register

74399

+;; being loaded, since we can look at whether it is dead after the load insn.

74400

+

74401

+(define_peephole

74402

+ [(set (match_operand:P 0 "base_reg_operand" "")

74403

+ (match_operand:P 1 "fusion_gpr_addis" ""))

74404

+ (set (match_operand:INT1 2 "base_reg_operand" "")

74405

+ (match_operand:INT1 3 "fusion_gpr_mem_load" ""))]

74406

+ "TARGET_P8_FUSION && fusion_gpr_load_p (operands, false)"

74407

+{

74408

+ return emit_fusion_gpr_load (operands);

74409

+}

74410

+ [(set_attr "type" "load")

74411

+ (set_attr "length" "8")])

74412

+

74413

+(define_peephole2

74414

+ [(set (match_operand:P 0 "base_reg_operand" "")

74415

+ (match_operand:P 1 "fusion_gpr_addis" ""))

74416

+ (set (match_operand:INT1 2 "base_reg_operand" "")

74417

+ (match_operand:INT1 3 "fusion_gpr_mem_load" ""))]

74418

+ "TARGET_P8_FUSION

74419

+ && (REGNO (operands[0]) != REGNO (operands[2])

74420

+ || GET_CODE (operands[3]) == SIGN_EXTEND)

74421

+ && fusion_gpr_load_p (operands, true)"

74422

+ [(const_int 0)]

74423

+{

74424

+ expand_fusion_gpr_load (operands);

74425

+ DONE;

74426

+})

74427

+

74428

+

74429

+

74430

(include "sync.md")

74431

(include "vector.md")

74432

(include "vsx.md")

74433

@@ -14028,3 +15741,5 @@

74434

(include "spe.md")

74435

(include "dfp.md")

74436

(include "paired.md")

74437

+(include "crypto.md")

74438

+(include "htm.md")

74439

Index: gcc/config/rs6000/t-linux64le

74440

===================================================================

74441

--- a/src/gcc/config/rs6000/t-linux64le (.../tags/gcc_4_8_2_release)

74442

+++ b/src/gcc/config/rs6000/t-linux64le (.../branches/gcc-4_8-branch)

74443

@@ -0,0 +1,3 @@

74444

+#rs6000/t-linux64le

74445

+

74446

+MULTILIB_OSDIRNAMES := $(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))

74447

Index: gcc/config/rs6000/t-linux64lebe

74448

===================================================================

74449

--- a/src/gcc/config/rs6000/t-linux64lebe (.../tags/gcc_4_8_2_release)

74450

+++ b/src/gcc/config/rs6000/t-linux64lebe (.../branches/gcc-4_8-branch)

74451

@@ -0,0 +1,7 @@

74452

+#rs6000/t-linux64leend

74453

+

74454

+MULTILIB_OPTIONS += mbig

74455

+MULTILIB_DIRNAMES += be

74456

+MULTILIB_OSDIRNAMES += $(subst =,.mbig=,$(subst libbe32,lib32be,$(subst libbe64,lib64be,$(subst lib,libbe,$(subst le-linux,-linux,$(MULTILIB_OSDIRNAMES))))))

74457

+MULTILIB_OSDIRNAMES += $(subst $(if $(findstring 64,$(target)),m64,m32).,,$(filter $(if $(findstring 64,$(target)),m64,m32).mbig%,$(MULTILIB_OSDIRNAMES)))

74458

+MULTILIB_MATCHES := ${MULTILIB_MATCHES_ENDIAN}

74459

Index: gcc/config/rs6000/rs6000-opts.h

74460

===================================================================

74461

--- a/src/gcc/config/rs6000/rs6000-opts.h (.../tags/gcc_4_8_2_release)

74462

+++ b/src/gcc/config/rs6000/rs6000-opts.h (.../branches/gcc-4_8-branch)

74463

@@ -59,7 +59,8 @@

74464

PROCESSOR_POWER7,

74465

PROCESSOR_CELL,

74466

PROCESSOR_PPCA2,

74467

- PROCESSOR_TITAN

74468

+ PROCESSOR_TITAN,

74469

+ PROCESSOR_POWER8

74470

};

74471

74472

/* FP processor type. */

74473

@@ -100,7 +101,8 @@

74474

/* Enumeration to give which calling sequence to use. */

74475

enum rs6000_abi {

74476

ABI_NONE,

74477

- ABI_AIX, /* IBM's AIX */

74478

+ ABI_AIX, /* IBM's AIX, or Linux ELFv1 */

74479

+ ABI_ELFv2, /* Linux ELFv2 ABI */

74480

ABI_V4, /* System V.4/eabi */

74481

ABI_DARWIN /* Apple's Darwin (OS X kernel) */

74482

};

74483

@@ -131,11 +133,14 @@

74484

CMODEL_LARGE

74485

};

74486

74487

-/* Describe which vector unit to use for a given machine mode. */

74488

+/* Describe which vector unit to use for a given machine mode. The

74489

+ VECTOR_MEM_* and VECTOR_UNIT_* macros assume that Altivec, VSX, and

74490

+ P8_VECTOR are contiguous. */

74491

enum rs6000_vector {

74492

VECTOR_NONE, /* Type is not a vector or not supported */

74493

VECTOR_ALTIVEC, /* Use altivec for vector processing */

74494

VECTOR_VSX, /* Use VSX for vector processing */

74495

+ VECTOR_P8_VECTOR, /* Use ISA 2.07 VSX for vector processing */

74496

VECTOR_PAIRED, /* Use paired floating point for vectors */

74497

VECTOR_SPE, /* Use SPE for vector processing */

74498

VECTOR_OTHER /* Some other vector unit */

74499

Index: gcc/config/rs6000/option-defaults.h

74500

===================================================================

74501

--- a/src/gcc/config/rs6000/option-defaults.h (.../tags/gcc_4_8_2_release)

74502

+++ b/src/gcc/config/rs6000/option-defaults.h (.../branches/gcc-4_8-branch)

74503

@@ -54,6 +54,7 @@

74504

--with-float is ignored if -mhard-float or -msoft-float are

74505

specified. */

74506

#define OPTION_DEFAULT_SPECS \

74507

+ {"abi", "%{!mabi=elfv*:-mabi=%(VALUE)}" }, \

74508

{"tune", "%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}" }, \

74509

{"tune_32", "%{" OPT_ARCH32 ":%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}}" }, \

74510

{"tune_64", "%{" OPT_ARCH64 ":%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}}" }, \

74511

Index: gcc/config/rs6000/altivec.h

74512

===================================================================

74513

--- a/src/gcc/config/rs6000/altivec.h (.../tags/gcc_4_8_2_release)

74514

+++ b/src/gcc/config/rs6000/altivec.h (.../branches/gcc-4_8-branch)

74515

@@ -319,8 +319,58 @@

74516

#define vec_sqrt __builtin_vec_sqrt

74517

#define vec_vsx_ld __builtin_vec_vsx_ld

74518

#define vec_vsx_st __builtin_vec_vsx_st

74519

+

74520

+/* Note, xxsldi and xxpermdi were added as __builtin_vsx_<xxx> functions

74521

+ instead of __builtin_vec_<xxx> */

74522

+#define vec_xxsldwi __builtin_vsx_xxsldwi

74523

+#define vec_xxpermdi __builtin_vsx_xxpermdi

74524

#endif

74525

74526

+#ifdef _ARCH_PWR8

74527

+/* Vector additions added in ISA 2.07. */

74528

+#define vec_eqv __builtin_vec_eqv

74529

+#define vec_nand __builtin_vec_nand

74530

+#define vec_orc __builtin_vec_orc

74531

+#define vec_vaddcuq __builtin_vec_vaddcuq

74532

+#define vec_vaddudm __builtin_vec_vaddudm

74533

+#define vec_vadduqm __builtin_vec_vadduqm

74534

+#define vec_vbpermq __builtin_vec_vbpermq

74535

+#define vec_vclz __builtin_vec_vclz

74536

+#define vec_vclzb __builtin_vec_vclzb

74537

+#define vec_vclzd __builtin_vec_vclzd

74538

+#define vec_vclzh __builtin_vec_vclzh

74539

+#define vec_vclzw __builtin_vec_vclzw

74540

+#define vec_vaddecuq __builtin_vec_vaddecuq

74541

+#define vec_vaddeuqm __builtin_vec_vaddeuqm

74542

+#define vec_vsubecuq __builtin_vec_vsubecuq

74543

+#define vec_vsubeuqm __builtin_vec_vsubeuqm

74544

+#define vec_vgbbd __builtin_vec_vgbbd

74545

+#define vec_vmaxsd __builtin_vec_vmaxsd

74546

+#define vec_vmaxud __builtin_vec_vmaxud

74547

+#define vec_vminsd __builtin_vec_vminsd

74548

+#define vec_vminud __builtin_vec_vminud

74549

+#define vec_vmrgew __builtin_vec_vmrgew

74550

+#define vec_vmrgow __builtin_vec_vmrgow

74551

+#define vec_vpksdss __builtin_vec_vpksdss

74552

+#define vec_vpksdus __builtin_vec_vpksdus

74553

+#define vec_vpkudum __builtin_vec_vpkudum

74554

+#define vec_vpkudus __builtin_vec_vpkudus

74555

+#define vec_vpopcnt __builtin_vec_vpopcnt

74556

+#define vec_vpopcntb __builtin_vec_vpopcntb

74557

+#define vec_vpopcntd __builtin_vec_vpopcntd

74558

+#define vec_vpopcnth __builtin_vec_vpopcnth

74559

+#define vec_vpopcntw __builtin_vec_vpopcntw

74560

+#define vec_vrld __builtin_vec_vrld

74561

+#define vec_vsld __builtin_vec_vsld

74562

+#define vec_vsrad __builtin_vec_vsrad

74563

+#define vec_vsrd __builtin_vec_vsrd

74564

+#define vec_vsubcuq __builtin_vec_vsubcuq

74565

+#define vec_vsubudm __builtin_vec_vsubudm

74566

+#define vec_vsubuqm __builtin_vec_vsubuqm

74567

+#define vec_vupkhsw __builtin_vec_vupkhsw

74568

+#define vec_vupklsw __builtin_vec_vupklsw

74569

+#endif

74570

+

74571

/* Predicates.

74572

For C++, we use templates in order to allow non-parenthesized arguments.

74573

For C, instead, we use macros since non-parenthesized arguments were

74574

Index: gcc/config/rs6000/sysv4.h

74575

===================================================================

74576

--- a/src/gcc/config/rs6000/sysv4.h (.../tags/gcc_4_8_2_release)

74577

+++ b/src/gcc/config/rs6000/sysv4.h (.../branches/gcc-4_8-branch)

74578

@@ -45,7 +45,7 @@

74579

& (OPTION_MASK_RELOCATABLE \

74580

| OPTION_MASK_MINIMAL_TOC)) \

74581

&& flag_pic > 1) \

74582

- || DEFAULT_ABI == ABI_AIX)

74583

+ || DEFAULT_ABI != ABI_V4)

74584

74585

#define TARGET_BITFIELD_TYPE (! TARGET_NO_BITFIELD_TYPE)

74586

#define TARGET_BIG_ENDIAN (! TARGET_LITTLE_ENDIAN)

74587

@@ -147,7 +147,7 @@

74588

rs6000_sdata_name); \

74589

} \

74590

\

74591

- else if (flag_pic && DEFAULT_ABI != ABI_AIX \

74592

+ else if (flag_pic && DEFAULT_ABI == ABI_V4 \

74593

&& (rs6000_sdata == SDATA_EABI \

74594

|| rs6000_sdata == SDATA_SYSV)) \

74595

{ \

74596

@@ -173,7 +173,7 @@

74597

error ("-mrelocatable and -mno-minimal-toc are incompatible"); \

74598

} \

74599

\

74600

- if (TARGET_RELOCATABLE && rs6000_current_abi == ABI_AIX) \

74601

+ if (TARGET_RELOCATABLE && rs6000_current_abi != ABI_V4) \

74602

{ \

74603

rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \

74604

error ("-mrelocatable and -mcall-%s are incompatible", \

74605

@@ -180,7 +180,7 @@

74606

rs6000_abi_name); \

74607

} \

74608

\

74609

- if (!TARGET_64BIT && flag_pic > 1 && rs6000_current_abi == ABI_AIX) \

74610

+ if (!TARGET_64BIT && flag_pic > 1 && rs6000_current_abi != ABI_V4) \

74611

{ \

74612

flag_pic = 0; \

74613

error ("-fPIC and -mcall-%s are incompatible", \

74614

@@ -193,7 +193,7 @@

74615

} \

74616

\

74617

/* Treat -fPIC the same as -mrelocatable. */ \

74618

- if (flag_pic > 1 && DEFAULT_ABI != ABI_AIX) \

74619

+ if (flag_pic > 1 && DEFAULT_ABI == ABI_V4) \

74620

{ \

74621

rs6000_isa_flags |= OPTION_MASK_RELOCATABLE | OPTION_MASK_MINIMAL_TOC; \

74622

TARGET_NO_FP_IN_TOC = 1; \

74623

@@ -317,7 +317,7 @@

74624

74625

/* Put PC relative got entries in .got2. */

74626

#define MINIMAL_TOC_SECTION_ASM_OP \

74627

- (TARGET_RELOCATABLE || (flag_pic && DEFAULT_ABI != ABI_AIX) \

74628

+ (TARGET_RELOCATABLE || (flag_pic && DEFAULT_ABI == ABI_V4) \

74629

? "\t.section\t\".got2\",\"aw\"" : "\t.section\t\".got1\",\"aw\"")

74630

74631

#define SDATA_SECTION_ASM_OP "\t.section\t\".sdata\",\"aw\""

74632

@@ -522,8 +522,6 @@

74633

#define ENDIAN_SELECT(BIG_OPT, LITTLE_OPT, DEFAULT_OPT) \

74634

"%{mlittle|mlittle-endian:" LITTLE_OPT ";" \

74635

"mbig|mbig-endian:" BIG_OPT ";" \

74636

- "mcall-aixdesc|mcall-freebsd|mcall-netbsd|" \

74637

- "mcall-openbsd|mcall-linux:" BIG_OPT ";" \

74638

"mcall-i960-old:" LITTLE_OPT ";" \

74639

":" DEFAULT_OPT "}"

74640

74641

@@ -536,25 +534,12 @@

74642

%{memb|msdata=eabi: -memb}" \

74643

ENDIAN_SELECT(" -mbig", " -mlittle", DEFAULT_ASM_ENDIAN)

74644

74645

-#define CC1_ENDIAN_BIG_SPEC ""

74646

-

74647

-#define CC1_ENDIAN_LITTLE_SPEC "\

74648

-%{!mstrict-align: %{!mno-strict-align: \

74649

- %{!mcall-i960-old: \

74650

- -mstrict-align \

74651

- } \

74652

-}}"

74653

-

74654

-#define CC1_ENDIAN_DEFAULT_SPEC "%(cc1_endian_big)"

74655

-

74656

#ifndef CC1_SECURE_PLT_DEFAULT_SPEC

74657

#define CC1_SECURE_PLT_DEFAULT_SPEC ""

74658

#endif

74659

74660

-/* Pass -G xxx to the compiler and set correct endian mode. */

74661

+/* Pass -G xxx to the compiler. */

74662

#define CC1_SPEC "%{G*} %(cc1_cpu)" \

74663

- ENDIAN_SELECT(" %(cc1_endian_big)", " %(cc1_endian_little)", \

74664

- " %(cc1_endian_default)") \

74665

"%{meabi: %{!mcall-*: -mcall-sysv }} \

74666

%{!meabi: %{!mno-eabi: \

74667

%{mrelocatable: -meabi } \

74668

@@ -908,9 +893,6 @@

74669

{ "link_os_netbsd", LINK_OS_NETBSD_SPEC }, \

74670

{ "link_os_openbsd", LINK_OS_OPENBSD_SPEC }, \

74671

{ "link_os_default", LINK_OS_DEFAULT_SPEC }, \

74672

- { "cc1_endian_big", CC1_ENDIAN_BIG_SPEC }, \

74673

- { "cc1_endian_little", CC1_ENDIAN_LITTLE_SPEC }, \

74674

- { "cc1_endian_default", CC1_ENDIAN_DEFAULT_SPEC }, \

74675

{ "cc1_secure_plt_default", CC1_SECURE_PLT_DEFAULT_SPEC }, \

74676

{ "cpp_os_ads", CPP_OS_ADS_SPEC }, \

74677

{ "cpp_os_yellowknife", CPP_OS_YELLOWKNIFE_SPEC }, \

74678

Index: gcc/config/darwin.c

74679

===================================================================

74680

--- a/src/gcc/config/darwin.c (.../tags/gcc_4_8_2_release)

74681

+++ b/src/gcc/config/darwin.c (.../branches/gcc-4_8-branch)

74682

@@ -1329,6 +1329,9 @@

74683

return NULL_TREE;

74684

}

74685

74686

+static int classes_seen;

74687

+static int objc_metadata_seen;

74688

+

74689

/* Return the section required for Objective C ABI 2 metadata. */

74690

static section *

74691

darwin_objc2_section (tree decl ATTRIBUTE_UNUSED, tree meta, section * base)

74692

@@ -1338,12 +1341,9 @@

74693

gcc_assert (TREE_CODE (ident) == IDENTIFIER_NODE);

74694

p = IDENTIFIER_POINTER (ident);

74695

74696

- /* If we are in LTO, then we don't know the state of flag_next_runtime

74697

- or flag_objc_abi when the code was generated. We set these from the

74698

- meta-data - which is needed to deal with const string constructors. */

74699

+ gcc_checking_assert (flag_next_runtime == 1 && flag_objc_abi == 2);

74700

74701

- flag_next_runtime = 1;

74702

- flag_objc_abi = 2;

74703

+ objc_metadata_seen = 1;

74704

74705

if (base == data_section)

74706

base = darwin_sections[objc2_metadata_section];

74707

@@ -1366,7 +1366,10 @@

74708

else if (!strncmp (p, "V2_NLCL", 7))

74709

return darwin_sections[objc2_nonlazy_class_section];

74710

else if (!strncmp (p, "V2_CLAB", 7))

74711

- return darwin_sections[objc2_classlist_section];

74712

+ {

74713

+ classes_seen = 1;

74714

+ return darwin_sections[objc2_classlist_section];

74715

+ }

74716

else if (!strncmp (p, "V2_SRFS", 7))

74717

return darwin_sections[objc2_selector_refs_section];

74718

else if (!strncmp (p, "V2_NLCA", 7))

74719

@@ -1401,13 +1404,10 @@

74720

gcc_assert (TREE_CODE (ident) == IDENTIFIER_NODE);

74721

p = IDENTIFIER_POINTER (ident);

74722

74723

- /* If we are in LTO, then we don't know the state of flag_next_runtime

74724

- or flag_objc_abi when the code was generated. We set these from the

74725

- meta-data - which is needed to deal with const string constructors. */

74726

- flag_next_runtime = 1;

74727

- if (!global_options_set.x_flag_objc_abi)

74728

- flag_objc_abi = 1;

74729

+ gcc_checking_assert (flag_next_runtime == 1 && flag_objc_abi < 2);

74730

74731

+ objc_metadata_seen = 1;

74732

+

74733

/* String sections first, cos there are lots of strings. */

74734

if (!strncmp (p, "V1_STRG", 7))

74735

return darwin_sections[cstring_section];

74736

@@ -1419,7 +1419,10 @@

74737

return darwin_sections[objc_meth_var_types_section];

74738

74739

else if (!strncmp (p, "V1_CLAS", 7))

74740

- return darwin_sections[objc_class_section];

74741

+ {

74742

+ classes_seen = 1;

74743

+ return darwin_sections[objc_class_section];

74744

+ }

74745

else if (!strncmp (p, "V1_META", 7))

74746

return darwin_sections[objc_meta_class_section];

74747

else if (!strncmp (p, "V1_CATG", 7))

74748

@@ -1603,8 +1606,6 @@

74749

if (TREE_CODE (name) == TYPE_DECL)

74750

name = DECL_NAME (name);

74751

74752

- /* FIXME: This is unsatisfactory for LTO, since it relies on other

74753

- metadata determining the source FE. */

74754

if (!strcmp (IDENTIFIER_POINTER (name), "__builtin_ObjCString"))

74755

{

74756

if (flag_next_runtime)

74757

@@ -2845,6 +2846,33 @@

74758

finalize_ctors ();

74759

if (!vec_safe_is_empty (dtors))

74760

finalize_dtors ();

74761

+

74762

+ /* If we are expecting to output NeXT ObjC meta-data, (and we actually see

74763

+ some) then we output the fix-and-continue marker (Image Info).

74764

+ This applies to Objective C, Objective C++ and LTO with either language

74765

+ as part of the input. */

74766

+ if (flag_next_runtime && objc_metadata_seen)

74767

+ {

74768

+ unsigned int flags = 0;

74769

+ if (flag_objc_abi >= 2)

74770

+ {

74771

+ flags = 16;

74772

+ output_section_asm_op

74773

+ (darwin_sections[objc2_image_info_section]->unnamed.data);

74774

+ }

74775

+ else

74776

+ output_section_asm_op

74777

+ (darwin_sections[objc_image_info_section]->unnamed.data);

74778

+

74779

+ ASM_OUTPUT_ALIGN (asm_out_file, 2);

74780

+ fputs ("L_OBJC_ImageInfo:\n", asm_out_file);

74781

+

74782

+ flags |= (flag_replace_objc_classes && classes_seen) ? 1 : 0;

74783

+ flags |= flag_objc_gc ? 2 : 0;

74784

+

74785

+ fprintf (asm_out_file, "\t.long\t0\n\t.long\t%u\n", flags);

74786

+ }

74787

+

74788

machopic_finish (asm_out_file);

74789

if (strcmp (lang_hooks.name, "GNU C++") == 0)

74790

{

74791

Index: gcc/config/tilepro/tilepro-c.c

74792

===================================================================

74793

--- a/src/gcc/config/tilepro/tilepro-c.c (.../tags/gcc_4_8_2_release)

74794

+++ b/src/gcc/config/tilepro/tilepro-c.c (.../branches/gcc-4_8-branch)

74795

@@ -44,6 +44,11 @@

74796

builtin_define ("__tile_chip__=1");

74797

builtin_define ("__tile_chip_rev__=0");

74798

74799

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");

74800

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");

74801

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");

74802

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");

74803

+

74804

TILEPRO_CPU_CPP_ENDIAN_BUILTINS ();

74805

GNU_USER_TARGET_OS_CPP_BUILTINS ();

74806

}

74807

Index: gcc/config/tilepro/tilepro.c

74808

===================================================================

74809

--- a/src/gcc/config/tilepro/tilepro.c (.../tags/gcc_4_8_2_release)

74810

+++ b/src/gcc/config/tilepro/tilepro.c (.../branches/gcc-4_8-branch)

74811

@@ -3167,6 +3167,12 @@

74812

}

74813

if (!pat)

74814

return NULL_RTX;

74815

+

74816

+ /* If we are generating a prefetch, tell the scheduler not to move

74817

+ it around. */

74818

+ if (GET_CODE (pat) == PREFETCH)

74819

+ PREFETCH_SCHEDULE_BARRIER_P (pat) = true;

74820

+

74821

emit_insn (pat);

74822

74823

if (nonvoid)

74824

Index: gcc/config/tilepro/tilepro.md

74825

===================================================================

74826

--- a/src/gcc/config/tilepro/tilepro.md (.../tags/gcc_4_8_2_release)

74827

+++ b/src/gcc/config/tilepro/tilepro.md (.../branches/gcc-4_8-branch)

74828

@@ -795,7 +795,7 @@

74829

74830

(define_expand "ctzdi2"

74831

[(set (match_operand:DI 0 "register_operand" "")

74832

- (ctz:DI (match_operand:DI 1 "reg_or_0_operand" "")))]

74833

+ (ctz:DI (match_operand:DI 1 "register_operand" "")))]

74834

""

74835

{

74836

rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, result;

74837

@@ -823,7 +823,7 @@

74838

74839

(define_expand "clzdi2"

74840

[(set (match_operand:DI 0 "register_operand" "")

74841

- (clz:DI (match_operand:DI 1 "reg_or_0_operand" "")))]

74842

+ (clz:DI (match_operand:DI 1 "register_operand" "")))]

74843

""

74844

{

74845

rtx lo, hi, clz_lo, clz_hi, clz_lo_plus_32, result;

74846

@@ -851,7 +851,7 @@

74847

74848

(define_expand "ffsdi2"

74849

[(set (match_operand:DI 0 "register_operand" "")

74850

- (ffs:DI (match_operand:DI 1 "reg_or_0_operand" "")))]

74851

+ (ffs:DI (match_operand:DI 1 "register_operand" "")))]

74852

""

74853

{

74854

rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, ctz, ctz_plus_1,ctz_cond;

74855

Index: gcc/config/arm/arm.c

74856

===================================================================

74857

--- a/src/gcc/config/arm/arm.c (.../tags/gcc_4_8_2_release)

74858

+++ b/src/gcc/config/arm/arm.c (.../branches/gcc-4_8-branch)

74859

@@ -230,7 +230,6 @@

74860

static void arm_option_override (void);

74861

static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode);

74862

static bool arm_cannot_copy_insn_p (rtx);

74863

-static bool arm_tls_symbol_p (rtx x);

74864

static int arm_issue_rate (void);

74865

static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;

74866

static bool arm_output_addr_const_extra (FILE *, rtx);

74867

@@ -5425,7 +5424,8 @@

74868

if (!crtl->uses_pic_offset_table)

74869

{

74870

gcc_assert (can_create_pseudo_p ());

74871

- if (arm_pic_register != INVALID_REGNUM)

74872

+ if (arm_pic_register != INVALID_REGNUM

74873

+ && !(TARGET_THUMB1 && arm_pic_register > LAST_LO_REGNUM))

74874

{

74875

if (!cfun->machine->pic_reg)

74876

cfun->machine->pic_reg = gen_rtx_REG (Pmode, arm_pic_register);

74877

@@ -5451,7 +5451,12 @@

74878

crtl->uses_pic_offset_table = 1;

74879

start_sequence ();

74880

74881

- arm_load_pic_register (0UL);

74882

+ if (TARGET_THUMB1 && arm_pic_register != INVALID_REGNUM

74883

+ && arm_pic_register > LAST_LO_REGNUM)

74884

+ emit_move_insn (cfun->machine->pic_reg,

74885

+ gen_rtx_REG (Pmode, arm_pic_register));

74886

+ else

74887

+ arm_load_pic_register (0UL);

74888

74889

seq = get_insns ();

74890

end_sequence ();

74891

@@ -5709,6 +5714,14 @@

74892

emit_insn (gen_movsi (pic_offset_table_rtx, pic_tmp));

74893

emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno));

74894

}

74895

+ else if (arm_pic_register != INVALID_REGNUM

74896

+ && arm_pic_register > LAST_LO_REGNUM

74897

+ && REGNO (pic_reg) <= LAST_LO_REGNUM)

74898

+ {

74899

+ emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));

74900

+ emit_move_insn (gen_rtx_REG (Pmode, arm_pic_register), pic_reg);

74901

+ emit_use (gen_rtx_REG (Pmode, arm_pic_register));

74902

+ }

74903

else

74904

emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));

74905

}

74906

@@ -6573,6 +6586,32 @@

74907

rtx

74908

arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)

74909

{

74910

+ if (arm_tls_referenced_p (x))

74911

+ {

74912

+ rtx addend = NULL;

74913

+

74914

+ if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS)

74915

+ {

74916

+ addend = XEXP (XEXP (x, 0), 1);

74917

+ x = XEXP (XEXP (x, 0), 0);

74918

+ }

74919

+

74920

+ if (GET_CODE (x) != SYMBOL_REF)

74921

+ return x;

74922

+

74923

+ gcc_assert (SYMBOL_REF_TLS_MODEL (x) != 0);

74924

+

74925

+ x = legitimize_tls_address (x, NULL_RTX);

74926

+

74927

+ if (addend)

74928

+ {

74929

+ x = gen_rtx_PLUS (SImode, x, addend);

74930

+ orig_x = x;

74931

+ }

74932

+ else

74933

+ return x;

74934

+ }

74935

+

74936

if (!TARGET_ARM)

74937

{

74938

/* TODO: legitimize_address for Thumb2. */

74939

@@ -6581,9 +6620,6 @@

74940

return thumb_legitimize_address (x, orig_x, mode);

74941

}

74942

74943

- if (arm_tls_symbol_p (x))

74944

- return legitimize_tls_address (x, NULL_RTX);

74945

-

74946

if (GET_CODE (x) == PLUS)

74947

{

74948

rtx xop0 = XEXP (x, 0);

74949

@@ -6695,9 +6731,6 @@

74950

rtx

74951

thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)

74952

{

74953

- if (arm_tls_symbol_p (x))

74954

- return legitimize_tls_address (x, NULL_RTX);

74955

-

74956

if (GET_CODE (x) == PLUS

74957

&& CONST_INT_P (XEXP (x, 1))

74958

&& (INTVAL (XEXP (x, 1)) >= 32 * GET_MODE_SIZE (mode)

74959

@@ -6988,20 +7021,6 @@

74960

74961

/* Test for various thread-local symbols. */

74962

74963

-/* Return TRUE if X is a thread-local symbol. */

74964

-

74965

-static bool

74966

-arm_tls_symbol_p (rtx x)

74967

-{

74968

- if (! TARGET_HAVE_TLS)

74969

- return false;

74970

-

74971

- if (GET_CODE (x) != SYMBOL_REF)

74972

- return false;

74973

-

74974

- return SYMBOL_REF_TLS_MODEL (x) != 0;

74975

-}

74976

-

74977

/* Helper for arm_tls_referenced_p. */

74978

74979

static int

74980

@@ -21279,7 +21298,11 @@

74981

type_mode);

74982

}

74983

74984

- op[argc] = expand_normal (arg[argc]);

74985

+ /* Use EXPAND_MEMORY for NEON_ARG_MEMORY to ensure a MEM_P

74986

+ be returned. */

74987

+ op[argc] = expand_expr (arg[argc], NULL_RTX, VOIDmode,

74988

+ (thisarg == NEON_ARG_MEMORY

74989

+ ? EXPAND_MEMORY : EXPAND_NORMAL));

74990

74991

switch (thisarg)

74992

{

74993

@@ -21298,6 +21321,9 @@

74994

break;

74995

74996

case NEON_ARG_MEMORY:

74997

+ /* Check if expand failed. */

74998

+ if (op[argc] == const0_rtx)

74999

+ return 0;

75000

gcc_assert (MEM_P (op[argc]));

75001

PUT_MODE (op[argc], mode[argc]);

75002

/* ??? arm_neon.h uses the same built-in functions for signed

75003

@@ -23555,6 +23581,7 @@

75004

num_regs = bit_count (saved_regs_mask);

75005

if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca)

75006

{

75007

+ emit_insn (gen_blockage ());

75008

/* Unwind the stack to just below the saved registers. */

75009

emit_insn (gen_addsi3 (stack_pointer_rtx,

75010

hard_frame_pointer_rtx,

75011

@@ -23583,8 +23610,8 @@

75012

75013

if (crtl->calls_eh_return)

75014

emit_insn (gen_addsi3 (stack_pointer_rtx,

75015

- stack_pointer_rtx,

75016

- GEN_INT (ARM_EH_STACKADJ_REGNUM)));

75017

+ stack_pointer_rtx,

75018

+ gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)));

75019

75020

if (IS_STACKALIGN (func_type))

75021

/* Restore the original stack pointer. Before prologue, the stack was

75022

Index: gcc/config/arm/arm.h

75023

===================================================================

75024

--- a/src/gcc/config/arm/arm.h (.../tags/gcc_4_8_2_release)

75025

+++ b/src/gcc/config/arm/arm.h (.../branches/gcc-4_8-branch)

75026

@@ -1213,11 +1213,15 @@

75027

VFPv2.

75028

In big-endian mode, modes greater than word size (i.e. DFmode) are stored in

75029

VFP registers in little-endian order. We can't describe that accurately to

75030

- GCC, so avoid taking subregs of such values. */

75031

-#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \

75032

- (TARGET_VFP && TARGET_BIG_END \

75033

- && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD \

75034

- || GET_MODE_SIZE (TO) > UNITS_PER_WORD) \

75035

+ GCC, so avoid taking subregs of such values.

75036

+ The only exception is going from a 128-bit to a 64-bit type. In that case

75037

+ the data layout happens to be consistent for big-endian, so we explicitly allow

75038

+ that case. */

75039

+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \

75040

+ (TARGET_VFP && TARGET_BIG_END \

75041

+ && !(GET_MODE_SIZE (FROM) == 16 && GET_MODE_SIZE (TO) == 8) \

75042

+ && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD \

75043

+ || GET_MODE_SIZE (TO) > UNITS_PER_WORD) \

75044

&& reg_classes_intersect_p (VFP_REGS, (CLASS)))

75045

75046

/* The class value for index registers, and the one for base regs. */

75047

Index: gcc/config/arm/vfp.md

75048

===================================================================

75049

--- a/src/gcc/config/arm/vfp.md (.../tags/gcc_4_8_2_release)

75050

+++ b/src/gcc/config/arm/vfp.md (.../branches/gcc-4_8-branch)

75051

@@ -1264,6 +1264,7 @@

75052

"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"

75053

"vrint<vrint_variant>%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1"

75054

[(set_attr "predicable" "<vrint_predicable>")

75055

+ (set_attr "conds" "<vrint_conds>")

75056

(set_attr "type" "f_rint<vfp_type>")]

75057

)

75058

75059

@@ -1280,7 +1281,8 @@

75060

(match_operand:SDF 2 "register_operand" "<F_constraint>")))]

75061

"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"

75062

"vmaxnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"

75063

- [(set_attr "type" "f_minmax<vfp_type>")]

75064

+ [(set_attr "type" "f_minmax<vfp_type>")

75065

+ (set_attr "conds" "unconditional")]

75066

)

75067

75068

(define_insn "smin<mode>3"

75069

@@ -1289,7 +1291,8 @@

75070

(match_operand:SDF 2 "register_operand" "<F_constraint>")))]

75071

"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"

75072

"vminnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"

75073

- [(set_attr "type" "f_minmax<vfp_type>")]

75074

+ [(set_attr "type" "f_minmax<vfp_type>")

75075

+ (set_attr "conds" "unconditional")]

75076

)

75077

75078

;; Unimplemented insns:

75079

Index: gcc/config/arm/ldmstm.md

75080

===================================================================

75081

--- a/src/gcc/config/arm/ldmstm.md (.../tags/gcc_4_8_2_release)

75082

+++ b/src/gcc/config/arm/ldmstm.md (.../branches/gcc-4_8-branch)

75083

@@ -23,15 +23,15 @@

75084

75085

(define_insn "*ldm4_ia"

75086

[(match_parallel 0 "load_multiple_operation"

75087

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75088

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75089

(mem:SI (match_operand:SI 5 "s_register_operand" "rk")))

75090

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75091

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75092

(mem:SI (plus:SI (match_dup 5)

75093

(const_int 4))))

75094

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75095

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75096

(mem:SI (plus:SI (match_dup 5)

75097

(const_int 8))))

75098

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75099

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75100

(mem:SI (plus:SI (match_dup 5)

75101

(const_int 12))))])]

75102

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75103

@@ -41,15 +41,15 @@

75104

75105

(define_insn "*thumb_ldm4_ia"

75106

[(match_parallel 0 "load_multiple_operation"

75107

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75108

+ [(set (match_operand:SI 1 "low_register_operand" "")

75109

(mem:SI (match_operand:SI 5 "s_register_operand" "l")))

75110

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75111

+ (set (match_operand:SI 2 "low_register_operand" "")

75112

(mem:SI (plus:SI (match_dup 5)

75113

(const_int 4))))

75114

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75115

+ (set (match_operand:SI 3 "low_register_operand" "")

75116

(mem:SI (plus:SI (match_dup 5)

75117

(const_int 8))))

75118

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75119

+ (set (match_operand:SI 4 "low_register_operand" "")

75120

(mem:SI (plus:SI (match_dup 5)

75121

(const_int 12))))])]

75122

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"

75123

@@ -60,15 +60,15 @@

75124

[(match_parallel 0 "load_multiple_operation"

75125

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75126

(plus:SI (match_dup 5) (const_int 16)))

75127

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75128

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75129

(mem:SI (match_dup 5)))

75130

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75131

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75132

(mem:SI (plus:SI (match_dup 5)

75133

(const_int 4))))

75134

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75135

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75136

(mem:SI (plus:SI (match_dup 5)

75137

(const_int 8))))

75138

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75139

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75140

(mem:SI (plus:SI (match_dup 5)

75141

(const_int 12))))])]

75142

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

75143

@@ -80,15 +80,15 @@

75144

[(match_parallel 0 "load_multiple_operation"

75145

[(set (match_operand:SI 5 "s_register_operand" "+&l")

75146

(plus:SI (match_dup 5) (const_int 16)))

75147

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75148

+ (set (match_operand:SI 1 "low_register_operand" "")

75149

(mem:SI (match_dup 5)))

75150

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75151

+ (set (match_operand:SI 2 "low_register_operand" "")

75152

(mem:SI (plus:SI (match_dup 5)

75153

(const_int 4))))

75154

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75155

+ (set (match_operand:SI 3 "low_register_operand" "")

75156

(mem:SI (plus:SI (match_dup 5)

75157

(const_int 8))))

75158

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75159

+ (set (match_operand:SI 4 "low_register_operand" "")

75160

(mem:SI (plus:SI (match_dup 5)

75161

(const_int 12))))])]

75162

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"

75163

@@ -98,13 +98,13 @@

75164

(define_insn "*stm4_ia"

75165

[(match_parallel 0 "store_multiple_operation"

75166

[(set (mem:SI (match_operand:SI 5 "s_register_operand" "rk"))

75167

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75168

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75169

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

75170

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75171

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75172

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

75173

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75174

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75175

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

75176

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75177

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75178

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75179

"stm%(ia%)\t%5, {%1, %2, %3, %4}"

75180

[(set_attr "type" "store4")

75181

@@ -115,13 +115,13 @@

75182

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75183

(plus:SI (match_dup 5) (const_int 16)))

75184

(set (mem:SI (match_dup 5))

75185

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75186

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75187

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

75188

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75189

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75190

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

75191

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75192

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75193

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

75194

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75195

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75196

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

75197

"stm%(ia%)\t%5!, {%1, %2, %3, %4}"

75198

[(set_attr "type" "store4")

75199

@@ -132,13 +132,13 @@

75200

[(set (match_operand:SI 5 "s_register_operand" "+&l")

75201

(plus:SI (match_dup 5) (const_int 16)))

75202

(set (mem:SI (match_dup 5))

75203

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75204

+ (match_operand:SI 1 "low_register_operand" ""))

75205

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

75206

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75207

+ (match_operand:SI 2 "low_register_operand" ""))

75208

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

75209

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75210

+ (match_operand:SI 3 "low_register_operand" ""))

75211

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

75212

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75213

+ (match_operand:SI 4 "low_register_operand" ""))])]

75214

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"

75215

"stm%(ia%)\t%5!, {%1, %2, %3, %4}"

75216

[(set_attr "type" "store4")])

75217

@@ -145,16 +145,16 @@

75218

75219

(define_insn "*ldm4_ib"

75220

[(match_parallel 0 "load_multiple_operation"

75221

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75222

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75223

(mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk")

75224

(const_int 4))))

75225

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75226

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75227

(mem:SI (plus:SI (match_dup 5)

75228

(const_int 8))))

75229

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75230

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75231

(mem:SI (plus:SI (match_dup 5)

75232

(const_int 12))))

75233

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75234

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75235

(mem:SI (plus:SI (match_dup 5)

75236

(const_int 16))))])]

75237

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75238

@@ -166,16 +166,16 @@

75239

[(match_parallel 0 "load_multiple_operation"

75240

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75241

(plus:SI (match_dup 5) (const_int 16)))

75242

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75243

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75244

(mem:SI (plus:SI (match_dup 5)

75245

(const_int 4))))

75246

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75247

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75248

(mem:SI (plus:SI (match_dup 5)

75249

(const_int 8))))

75250

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75251

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75252

(mem:SI (plus:SI (match_dup 5)

75253

(const_int 12))))

75254

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75255

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75256

(mem:SI (plus:SI (match_dup 5)

75257

(const_int 16))))])]

75258

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

75259

@@ -186,13 +186,13 @@

75260

(define_insn "*stm4_ib"

75261

[(match_parallel 0 "store_multiple_operation"

75262

[(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int 4)))

75263

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75264

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75265

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

75266

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75267

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75268

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

75269

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75270

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75271

(set (mem:SI (plus:SI (match_dup 5) (const_int 16)))

75272

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75273

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75274

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75275

"stm%(ib%)\t%5, {%1, %2, %3, %4}"

75276

[(set_attr "type" "store4")

75277

@@ -203,13 +203,13 @@

75278

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75279

(plus:SI (match_dup 5) (const_int 16)))

75280

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

75281

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75282

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75283

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

75284

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75285

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75286

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

75287

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75288

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75289

(set (mem:SI (plus:SI (match_dup 5) (const_int 16)))

75290

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75291

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75292

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

75293

"stm%(ib%)\t%5!, {%1, %2, %3, %4}"

75294

[(set_attr "type" "store4")

75295

@@ -217,16 +217,16 @@

75296

75297

(define_insn "*ldm4_da"

75298

[(match_parallel 0 "load_multiple_operation"

75299

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75300

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75301

(mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk")

75302

(const_int -12))))

75303

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75304

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75305

(mem:SI (plus:SI (match_dup 5)

75306

(const_int -8))))

75307

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75308

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75309

(mem:SI (plus:SI (match_dup 5)

75310

(const_int -4))))

75311

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75312

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75313

(mem:SI (match_dup 5)))])]

75314

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75315

"ldm%(da%)\t%5, {%1, %2, %3, %4}"

75316

@@ -237,16 +237,16 @@

75317

[(match_parallel 0 "load_multiple_operation"

75318

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75319

(plus:SI (match_dup 5) (const_int -16)))

75320

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75321

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75322

(mem:SI (plus:SI (match_dup 5)

75323

(const_int -12))))

75324

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75325

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75326

(mem:SI (plus:SI (match_dup 5)

75327

(const_int -8))))

75328

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75329

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75330

(mem:SI (plus:SI (match_dup 5)

75331

(const_int -4))))

75332

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75333

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75334

(mem:SI (match_dup 5)))])]

75335

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

75336

"ldm%(da%)\t%5!, {%1, %2, %3, %4}"

75337

@@ -256,13 +256,13 @@

75338

(define_insn "*stm4_da"

75339

[(match_parallel 0 "store_multiple_operation"

75340

[(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int -12)))

75341

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75342

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75343

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

75344

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75345

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75346

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

75347

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75348

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75349

(set (mem:SI (match_dup 5))

75350

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75351

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75352

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75353

"stm%(da%)\t%5, {%1, %2, %3, %4}"

75354

[(set_attr "type" "store4")

75355

@@ -273,13 +273,13 @@

75356

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75357

(plus:SI (match_dup 5) (const_int -16)))

75358

(set (mem:SI (plus:SI (match_dup 5) (const_int -12)))

75359

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75360

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75361

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

75362

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75363

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75364

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

75365

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75366

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75367

(set (mem:SI (match_dup 5))

75368

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75369

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75370

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

75371

"stm%(da%)\t%5!, {%1, %2, %3, %4}"

75372

[(set_attr "type" "store4")

75373

@@ -287,16 +287,16 @@

75374

75375

(define_insn "*ldm4_db"

75376

[(match_parallel 0 "load_multiple_operation"

75377

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75378

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75379

(mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk")

75380

(const_int -16))))

75381

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75382

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75383

(mem:SI (plus:SI (match_dup 5)

75384

(const_int -12))))

75385

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75386

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75387

(mem:SI (plus:SI (match_dup 5)

75388

(const_int -8))))

75389

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75390

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75391

(mem:SI (plus:SI (match_dup 5)

75392

(const_int -4))))])]

75393

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75394

@@ -308,16 +308,16 @@

75395

[(match_parallel 0 "load_multiple_operation"

75396

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75397

(plus:SI (match_dup 5) (const_int -16)))

75398

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75399

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75400

(mem:SI (plus:SI (match_dup 5)

75401

(const_int -16))))

75402

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75403

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75404

(mem:SI (plus:SI (match_dup 5)

75405

(const_int -12))))

75406

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75407

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75408

(mem:SI (plus:SI (match_dup 5)

75409

(const_int -8))))

75410

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

75411

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

75412

(mem:SI (plus:SI (match_dup 5)

75413

(const_int -4))))])]

75414

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

75415

@@ -328,13 +328,13 @@

75416

(define_insn "*stm4_db"

75417

[(match_parallel 0 "store_multiple_operation"

75418

[(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int -16)))

75419

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75420

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75421

(set (mem:SI (plus:SI (match_dup 5) (const_int -12)))

75422

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75423

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75424

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

75425

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75426

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75427

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

75428

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75429

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75430

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75431

"stm%(db%)\t%5, {%1, %2, %3, %4}"

75432

[(set_attr "type" "store4")

75433

@@ -345,13 +345,13 @@

75434

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

75435

(plus:SI (match_dup 5) (const_int -16)))

75436

(set (mem:SI (plus:SI (match_dup 5) (const_int -16)))

75437

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75438

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75439

(set (mem:SI (plus:SI (match_dup 5) (const_int -12)))

75440

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75441

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75442

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

75443

- (match_operand:SI 3 "arm_hard_register_operand" ""))

75444

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

75445

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

75446

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

75447

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

75448

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

75449

"stm%(db%)\t%5!, {%1, %2, %3, %4}"

75450

[(set_attr "type" "store4")

75451

@@ -466,12 +466,12 @@

75452

75453

(define_insn "*ldm3_ia"

75454

[(match_parallel 0 "load_multiple_operation"

75455

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75456

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75457

(mem:SI (match_operand:SI 4 "s_register_operand" "rk")))

75458

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75459

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75460

(mem:SI (plus:SI (match_dup 4)

75461

(const_int 4))))

75462

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75463

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75464

(mem:SI (plus:SI (match_dup 4)

75465

(const_int 8))))])]

75466

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75467

@@ -481,12 +481,12 @@

75468

75469

(define_insn "*thumb_ldm3_ia"

75470

[(match_parallel 0 "load_multiple_operation"

75471

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75472

+ [(set (match_operand:SI 1 "low_register_operand" "")

75473

(mem:SI (match_operand:SI 4 "s_register_operand" "l")))

75474

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75475

+ (set (match_operand:SI 2 "low_register_operand" "")

75476

(mem:SI (plus:SI (match_dup 4)

75477

(const_int 4))))

75478

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75479

+ (set (match_operand:SI 3 "low_register_operand" "")

75480

(mem:SI (plus:SI (match_dup 4)

75481

(const_int 8))))])]

75482

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"

75483

@@ -497,12 +497,12 @@

75484

[(match_parallel 0 "load_multiple_operation"

75485

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75486

(plus:SI (match_dup 4) (const_int 12)))

75487

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75488

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75489

(mem:SI (match_dup 4)))

75490

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75491

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75492

(mem:SI (plus:SI (match_dup 4)

75493

(const_int 4))))

75494

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75495

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75496

(mem:SI (plus:SI (match_dup 4)

75497

(const_int 8))))])]

75498

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75499

@@ -514,12 +514,12 @@

75500

[(match_parallel 0 "load_multiple_operation"

75501

[(set (match_operand:SI 4 "s_register_operand" "+&l")

75502

(plus:SI (match_dup 4) (const_int 12)))

75503

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75504

+ (set (match_operand:SI 1 "low_register_operand" "")

75505

(mem:SI (match_dup 4)))

75506

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75507

+ (set (match_operand:SI 2 "low_register_operand" "")

75508

(mem:SI (plus:SI (match_dup 4)

75509

(const_int 4))))

75510

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75511

+ (set (match_operand:SI 3 "low_register_operand" "")

75512

(mem:SI (plus:SI (match_dup 4)

75513

(const_int 8))))])]

75514

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"

75515

@@ -529,11 +529,11 @@

75516

(define_insn "*stm3_ia"

75517

[(match_parallel 0 "store_multiple_operation"

75518

[(set (mem:SI (match_operand:SI 4 "s_register_operand" "rk"))

75519

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75520

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75521

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

75522

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75523

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75524

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

75525

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75526

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75527

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75528

"stm%(ia%)\t%4, {%1, %2, %3}"

75529

[(set_attr "type" "store3")

75530

@@ -544,11 +544,11 @@

75531

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75532

(plus:SI (match_dup 4) (const_int 12)))

75533

(set (mem:SI (match_dup 4))

75534

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75535

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75536

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

75537

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75538

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75539

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

75540

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75541

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75542

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75543

"stm%(ia%)\t%4!, {%1, %2, %3}"

75544

[(set_attr "type" "store3")

75545

@@ -559,11 +559,11 @@

75546

[(set (match_operand:SI 4 "s_register_operand" "+&l")

75547

(plus:SI (match_dup 4) (const_int 12)))

75548

(set (mem:SI (match_dup 4))

75549

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75550

+ (match_operand:SI 1 "low_register_operand" ""))

75551

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

75552

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75553

+ (match_operand:SI 2 "low_register_operand" ""))

75554

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

75555

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75556

+ (match_operand:SI 3 "low_register_operand" ""))])]

75557

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"

75558

"stm%(ia%)\t%4!, {%1, %2, %3}"

75559

[(set_attr "type" "store3")])

75560

@@ -570,13 +570,13 @@

75561

75562

(define_insn "*ldm3_ib"

75563

[(match_parallel 0 "load_multiple_operation"

75564

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75565

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75566

(mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk")

75567

(const_int 4))))

75568

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75569

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75570

(mem:SI (plus:SI (match_dup 4)

75571

(const_int 8))))

75572

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75573

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75574

(mem:SI (plus:SI (match_dup 4)

75575

(const_int 12))))])]

75576

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75577

@@ -588,13 +588,13 @@

75578

[(match_parallel 0 "load_multiple_operation"

75579

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75580

(plus:SI (match_dup 4) (const_int 12)))

75581

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75582

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75583

(mem:SI (plus:SI (match_dup 4)

75584

(const_int 4))))

75585

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75586

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75587

(mem:SI (plus:SI (match_dup 4)

75588

(const_int 8))))

75589

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75590

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75591

(mem:SI (plus:SI (match_dup 4)

75592

(const_int 12))))])]

75593

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75594

@@ -605,11 +605,11 @@

75595

(define_insn "*stm3_ib"

75596

[(match_parallel 0 "store_multiple_operation"

75597

[(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int 4)))

75598

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75599

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75600

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

75601

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75602

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75603

(set (mem:SI (plus:SI (match_dup 4) (const_int 12)))

75604

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75605

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75606

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75607

"stm%(ib%)\t%4, {%1, %2, %3}"

75608

[(set_attr "type" "store3")

75609

@@ -620,11 +620,11 @@

75610

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75611

(plus:SI (match_dup 4) (const_int 12)))

75612

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

75613

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75614

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75615

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

75616

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75617

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75618

(set (mem:SI (plus:SI (match_dup 4) (const_int 12)))

75619

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75620

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75621

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75622

"stm%(ib%)\t%4!, {%1, %2, %3}"

75623

[(set_attr "type" "store3")

75624

@@ -632,13 +632,13 @@

75625

75626

(define_insn "*ldm3_da"

75627

[(match_parallel 0 "load_multiple_operation"

75628

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75629

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75630

(mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk")

75631

(const_int -8))))

75632

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75633

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75634

(mem:SI (plus:SI (match_dup 4)

75635

(const_int -4))))

75636

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75637

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75638

(mem:SI (match_dup 4)))])]

75639

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75640

"ldm%(da%)\t%4, {%1, %2, %3}"

75641

@@ -649,13 +649,13 @@

75642

[(match_parallel 0 "load_multiple_operation"

75643

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75644

(plus:SI (match_dup 4) (const_int -12)))

75645

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75646

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75647

(mem:SI (plus:SI (match_dup 4)

75648

(const_int -8))))

75649

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75650

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75651

(mem:SI (plus:SI (match_dup 4)

75652

(const_int -4))))

75653

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75654

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75655

(mem:SI (match_dup 4)))])]

75656

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75657

"ldm%(da%)\t%4!, {%1, %2, %3}"

75658

@@ -665,11 +665,11 @@

75659

(define_insn "*stm3_da"

75660

[(match_parallel 0 "store_multiple_operation"

75661

[(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int -8)))

75662

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75663

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75664

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

75665

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75666

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75667

(set (mem:SI (match_dup 4))

75668

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75669

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75670

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75671

"stm%(da%)\t%4, {%1, %2, %3}"

75672

[(set_attr "type" "store3")

75673

@@ -680,11 +680,11 @@

75674

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75675

(plus:SI (match_dup 4) (const_int -12)))

75676

(set (mem:SI (plus:SI (match_dup 4) (const_int -8)))

75677

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75678

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75679

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

75680

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75681

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75682

(set (mem:SI (match_dup 4))

75683

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75684

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75685

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

75686

"stm%(da%)\t%4!, {%1, %2, %3}"

75687

[(set_attr "type" "store3")

75688

@@ -692,13 +692,13 @@

75689

75690

(define_insn "*ldm3_db"

75691

[(match_parallel 0 "load_multiple_operation"

75692

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75693

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75694

(mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk")

75695

(const_int -12))))

75696

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75697

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75698

(mem:SI (plus:SI (match_dup 4)

75699

(const_int -8))))

75700

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75701

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75702

(mem:SI (plus:SI (match_dup 4)

75703

(const_int -4))))])]

75704

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75705

@@ -710,13 +710,13 @@

75706

[(match_parallel 0 "load_multiple_operation"

75707

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75708

(plus:SI (match_dup 4) (const_int -12)))

75709

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75710

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75711

(mem:SI (plus:SI (match_dup 4)

75712

(const_int -12))))

75713

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75714

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75715

(mem:SI (plus:SI (match_dup 4)

75716

(const_int -8))))

75717

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

75718

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

75719

(mem:SI (plus:SI (match_dup 4)

75720

(const_int -4))))])]

75721

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75722

@@ -727,11 +727,11 @@

75723

(define_insn "*stm3_db"

75724

[(match_parallel 0 "store_multiple_operation"

75725

[(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int -12)))

75726

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75727

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75728

(set (mem:SI (plus:SI (match_dup 4) (const_int -8)))

75729

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75730

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75731

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

75732

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75733

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75734

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75735

"stm%(db%)\t%4, {%1, %2, %3}"

75736

[(set_attr "type" "store3")

75737

@@ -742,11 +742,11 @@

75738

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

75739

(plus:SI (match_dup 4) (const_int -12)))

75740

(set (mem:SI (plus:SI (match_dup 4) (const_int -12)))

75741

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75742

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75743

(set (mem:SI (plus:SI (match_dup 4) (const_int -8)))

75744

- (match_operand:SI 2 "arm_hard_register_operand" ""))

75745

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

75746

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

75747

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

75748

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

75749

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

75750

"stm%(db%)\t%4!, {%1, %2, %3}"

75751

[(set_attr "type" "store3")

75752

@@ -847,9 +847,9 @@

75753

75754

(define_insn "*ldm2_ia"

75755

[(match_parallel 0 "load_multiple_operation"

75756

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75757

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75758

(mem:SI (match_operand:SI 3 "s_register_operand" "rk")))

75759

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75760

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75761

(mem:SI (plus:SI (match_dup 3)

75762

(const_int 4))))])]

75763

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

75764

@@ -859,9 +859,9 @@

75765

75766

(define_insn "*thumb_ldm2_ia"

75767

[(match_parallel 0 "load_multiple_operation"

75768

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75769

+ [(set (match_operand:SI 1 "low_register_operand" "")

75770

(mem:SI (match_operand:SI 3 "s_register_operand" "l")))

75771

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75772

+ (set (match_operand:SI 2 "low_register_operand" "")

75773

(mem:SI (plus:SI (match_dup 3)

75774

(const_int 4))))])]

75775

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 2"

75776

@@ -872,9 +872,9 @@

75777

[(match_parallel 0 "load_multiple_operation"

75778

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75779

(plus:SI (match_dup 3) (const_int 8)))

75780

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75781

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75782

(mem:SI (match_dup 3)))

75783

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75784

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75785

(mem:SI (plus:SI (match_dup 3)

75786

(const_int 4))))])]

75787

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75788

@@ -886,9 +886,9 @@

75789

[(match_parallel 0 "load_multiple_operation"

75790

[(set (match_operand:SI 3 "s_register_operand" "+&l")

75791

(plus:SI (match_dup 3) (const_int 8)))

75792

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75793

+ (set (match_operand:SI 1 "low_register_operand" "")

75794

(mem:SI (match_dup 3)))

75795

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75796

+ (set (match_operand:SI 2 "low_register_operand" "")

75797

(mem:SI (plus:SI (match_dup 3)

75798

(const_int 4))))])]

75799

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"

75800

@@ -898,9 +898,9 @@

75801

(define_insn "*stm2_ia"

75802

[(match_parallel 0 "store_multiple_operation"

75803

[(set (mem:SI (match_operand:SI 3 "s_register_operand" "rk"))

75804

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75805

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75806

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

75807

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75808

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75809

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

75810

"stm%(ia%)\t%3, {%1, %2}"

75811

[(set_attr "type" "store2")

75812

@@ -911,9 +911,9 @@

75813

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75814

(plus:SI (match_dup 3) (const_int 8)))

75815

(set (mem:SI (match_dup 3))

75816

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75817

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75818

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

75819

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75820

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75821

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75822

"stm%(ia%)\t%3!, {%1, %2}"

75823

[(set_attr "type" "store2")

75824

@@ -924,9 +924,9 @@

75825

[(set (match_operand:SI 3 "s_register_operand" "+&l")

75826

(plus:SI (match_dup 3) (const_int 8)))

75827

(set (mem:SI (match_dup 3))

75828

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75829

+ (match_operand:SI 1 "low_register_operand" ""))

75830

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

75831

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75832

+ (match_operand:SI 2 "low_register_operand" ""))])]

75833

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"

75834

"stm%(ia%)\t%3!, {%1, %2}"

75835

[(set_attr "type" "store2")])

75836

@@ -933,10 +933,10 @@

75837

75838

(define_insn "*ldm2_ib"

75839

[(match_parallel 0 "load_multiple_operation"

75840

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75841

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75842

(mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk")

75843

(const_int 4))))

75844

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75845

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75846

(mem:SI (plus:SI (match_dup 3)

75847

(const_int 8))))])]

75848

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

75849

@@ -948,10 +948,10 @@

75850

[(match_parallel 0 "load_multiple_operation"

75851

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75852

(plus:SI (match_dup 3) (const_int 8)))

75853

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75854

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75855

(mem:SI (plus:SI (match_dup 3)

75856

(const_int 4))))

75857

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75858

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75859

(mem:SI (plus:SI (match_dup 3)

75860

(const_int 8))))])]

75861

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75862

@@ -962,9 +962,9 @@

75863

(define_insn "*stm2_ib"

75864

[(match_parallel 0 "store_multiple_operation"

75865

[(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int 4)))

75866

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75867

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75868

(set (mem:SI (plus:SI (match_dup 3) (const_int 8)))

75869

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75870

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75871

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

75872

"stm%(ib%)\t%3, {%1, %2}"

75873

[(set_attr "type" "store2")

75874

@@ -975,9 +975,9 @@

75875

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75876

(plus:SI (match_dup 3) (const_int 8)))

75877

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

75878

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75879

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75880

(set (mem:SI (plus:SI (match_dup 3) (const_int 8)))

75881

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75882

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75883

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75884

"stm%(ib%)\t%3!, {%1, %2}"

75885

[(set_attr "type" "store2")

75886

@@ -985,10 +985,10 @@

75887

75888

(define_insn "*ldm2_da"

75889

[(match_parallel 0 "load_multiple_operation"

75890

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75891

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75892

(mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk")

75893

(const_int -4))))

75894

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75895

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75896

(mem:SI (match_dup 3)))])]

75897

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

75898

"ldm%(da%)\t%3, {%1, %2}"

75899

@@ -999,10 +999,10 @@

75900

[(match_parallel 0 "load_multiple_operation"

75901

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75902

(plus:SI (match_dup 3) (const_int -8)))

75903

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75904

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75905

(mem:SI (plus:SI (match_dup 3)

75906

(const_int -4))))

75907

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75908

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75909

(mem:SI (match_dup 3)))])]

75910

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75911

"ldm%(da%)\t%3!, {%1, %2}"

75912

@@ -1012,9 +1012,9 @@

75913

(define_insn "*stm2_da"

75914

[(match_parallel 0 "store_multiple_operation"

75915

[(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int -4)))

75916

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75917

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75918

(set (mem:SI (match_dup 3))

75919

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75920

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75921

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

75922

"stm%(da%)\t%3, {%1, %2}"

75923

[(set_attr "type" "store2")

75924

@@ -1025,9 +1025,9 @@

75925

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75926

(plus:SI (match_dup 3) (const_int -8)))

75927

(set (mem:SI (plus:SI (match_dup 3) (const_int -4)))

75928

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75929

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75930

(set (mem:SI (match_dup 3))

75931

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75932

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75933

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

75934

"stm%(da%)\t%3!, {%1, %2}"

75935

[(set_attr "type" "store2")

75936

@@ -1035,10 +1035,10 @@

75937

75938

(define_insn "*ldm2_db"

75939

[(match_parallel 0 "load_multiple_operation"

75940

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

75941

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75942

(mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk")

75943

(const_int -8))))

75944

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75945

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75946

(mem:SI (plus:SI (match_dup 3)

75947

(const_int -4))))])]

75948

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

75949

@@ -1050,10 +1050,10 @@

75950

[(match_parallel 0 "load_multiple_operation"

75951

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75952

(plus:SI (match_dup 3) (const_int -8)))

75953

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

75954

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

75955

(mem:SI (plus:SI (match_dup 3)

75956

(const_int -8))))

75957

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

75958

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

75959

(mem:SI (plus:SI (match_dup 3)

75960

(const_int -4))))])]

75961

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75962

@@ -1064,9 +1064,9 @@

75963

(define_insn "*stm2_db"

75964

[(match_parallel 0 "store_multiple_operation"

75965

[(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int -8)))

75966

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75967

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75968

(set (mem:SI (plus:SI (match_dup 3) (const_int -4)))

75969

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75970

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75971

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

75972

"stm%(db%)\t%3, {%1, %2}"

75973

[(set_attr "type" "store2")

75974

@@ -1077,9 +1077,9 @@

75975

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

75976

(plus:SI (match_dup 3) (const_int -8)))

75977

(set (mem:SI (plus:SI (match_dup 3) (const_int -8)))

75978

- (match_operand:SI 1 "arm_hard_register_operand" ""))

75979

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

75980

(set (mem:SI (plus:SI (match_dup 3) (const_int -4)))

75981

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

75982

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

75983

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

75984

"stm%(db%)\t%3!, {%1, %2}"

75985

[(set_attr "type" "store2")

75986

Index: gcc/config/arm/predicates.md

75987

===================================================================

75988

--- a/src/gcc/config/arm/predicates.md (.../tags/gcc_4_8_2_release)

75989

+++ b/src/gcc/config/arm/predicates.md (.../branches/gcc-4_8-branch)

75990

@@ -31,11 +31,11 @@

75991

|| REGNO_REG_CLASS (REGNO (op)) != NO_REGS));

75992

})

75993

75994

-;; Any hard register.

75995

-(define_predicate "arm_hard_register_operand"

75996

+;; Any general register.

75997

+(define_predicate "arm_hard_general_register_operand"

75998

(match_code "reg")

75999

{

76000

- return REGNO (op) < FIRST_PSEUDO_REGISTER;

76001

+ return REGNO (op) <= LAST_ARM_REGNUM;

76002

})

76003

76004

;; A low register.

76005

@@ -76,6 +76,12 @@

76006

&& REGNO_REG_CLASS (REGNO (op)) == VFP_REGS)));

76007

})

76008

76009

+(define_predicate "vfp_hard_register_operand"

76010

+ (match_code "reg")

76011

+{

76012

+ return (IS_VFP_REGNUM (REGNO (op)));

76013

+})

76014

+

76015

(define_predicate "zero_operand"

76016

(and (match_code "const_int,const_double,const_vector")

76017

(match_test "op == CONST0_RTX (mode)")))

76018

Index: gcc/config/arm/arm-ldmstm.ml

76019

===================================================================

76020

--- a/src/gcc/config/arm/arm-ldmstm.ml (.../tags/gcc_4_8_2_release)

76021

+++ b/src/gcc/config/arm/arm-ldmstm.ml (.../branches/gcc-4_8-branch)

76022

@@ -67,10 +67,13 @@

76023

Printf.sprintf ("(match_operand:SI %d \"s_register_operand\" \"%s%s\")")

76024

(nregs + 1) (inout_constr op_type) (constr thumb)

76025

76026

+let reg_predicate thumb =

76027

+ if thumb then "low_register_operand" else "arm_hard_general_register_operand"

76028

+

76029

let write_ldm_set thumb nregs offset opnr first =

76030

let indent = " " in

76031

Printf.printf "%s" (if first then " [" else indent);

76032

- Printf.printf "(set (match_operand:SI %d \"arm_hard_register_operand\" \"\")\n" opnr;

76033

+ Printf.printf "(set (match_operand:SI %d \"%s\" \"\")\n" opnr (reg_predicate thumb);

76034

Printf.printf "%s (mem:SI " indent;

76035

begin if offset != 0 then Printf.printf "(plus:SI " end;

76036

Printf.printf "%s" (destreg nregs first IN thumb);

76037

@@ -84,7 +87,7 @@

76038

begin if offset != 0 then Printf.printf "(plus:SI " end;

76039

Printf.printf "%s" (destreg nregs first IN thumb);

76040

begin if offset != 0 then Printf.printf " (const_int %d))" offset end;

76041

- Printf.printf ")\n%s (match_operand:SI %d \"arm_hard_register_operand\" \"\"))" indent opnr

76042

+ Printf.printf ")\n%s (match_operand:SI %d \"%s\" \"\"))" indent opnr (reg_predicate thumb)

76043

76044

let write_ldm_peep_set extra_indent nregs opnr first =

76045

let indent = " " ^ extra_indent in

76046

Index: gcc/config/arm/iterators.md

76047

===================================================================

76048

--- a/src/gcc/config/arm/iterators.md (.../tags/gcc_4_8_2_release)

76049

+++ b/src/gcc/config/arm/iterators.md (.../branches/gcc-4_8-branch)

76050

@@ -493,6 +493,10 @@

76051

(UNSPEC_VRINTA "no") (UNSPEC_VRINTM "no")

76052

(UNSPEC_VRINTR "yes") (UNSPEC_VRINTX "yes")])

76053

76054

+(define_int_attr vrint_conds [(UNSPEC_VRINTZ "nocond") (UNSPEC_VRINTP "unconditional")

76055

+ (UNSPEC_VRINTA "unconditional") (UNSPEC_VRINTM "unconditional")

76056

+ (UNSPEC_VRINTR "nocond") (UNSPEC_VRINTX "nocond")])

76057

+

76058

(define_int_attr nvrint_variant [(UNSPEC_NVRINTZ "z") (UNSPEC_NVRINTP "p")

76059

(UNSPEC_NVRINTA "a") (UNSPEC_NVRINTM "m")

76060

(UNSPEC_NVRINTX "x") (UNSPEC_NVRINTN "n")])

76061

Index: gcc/config/arm/arm.md

76062

===================================================================

76063

--- a/src/gcc/config/arm/arm.md (.../tags/gcc_4_8_2_release)

76064

+++ b/src/gcc/config/arm/arm.md (.../branches/gcc-4_8-branch)

76065

@@ -11036,7 +11036,7 @@

76066

[(set (match_operand:SI 1 "s_register_operand" "+rk")

76067

(plus:SI (match_dup 1)

76068

(match_operand:SI 2 "const_int_operand" "I")))

76069

- (set (match_operand:DF 3 "arm_hard_register_operand" "")

76070

+ (set (match_operand:DF 3 "vfp_hard_register_operand" "")

76071

(mem:DF (match_dup 1)))])]

76072

"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"

76073

"*

76074

@@ -11270,7 +11270,9 @@

76075

(match_operand:SI 1 "" "")

76076

(match_operand:SI 2 "" ""))]

76077

"TARGET_32BIT && arm_arch5e"

76078

- "pld\\t%a0")

76079

+ "pld\\t%a0"

76080

+ [(set_attr "type" "load1")]

76081

+)

76082

76083

;; General predication pattern

76084

76085

Index: gcc/config/pa/pa.c

76086

===================================================================

76087

--- a/src/gcc/config/pa/pa.c (.../tags/gcc_4_8_2_release)

76088

+++ b/src/gcc/config/pa/pa.c (.../branches/gcc-4_8-branch)

76089

@@ -912,9 +912,12 @@

76090

legitimize_tls_address (rtx addr)

76091

{

76092

rtx ret, insn, tmp, t1, t2, tp;

76093

- enum tls_model model = SYMBOL_REF_TLS_MODEL (addr);

76094

76095

- switch (model)

76096

+ /* Currently, we can't handle anything but a SYMBOL_REF. */

76097

+ if (GET_CODE (addr) != SYMBOL_REF)

76098

+ return addr;

76099

+

76100

+ switch (SYMBOL_REF_TLS_MODEL (addr))

76101

{

76102

case TLS_MODEL_GLOBAL_DYNAMIC:

76103

tmp = gen_reg_rtx (Pmode);

76104

@@ -1035,7 +1038,7 @@

76105

&& !REG_POINTER (XEXP (x, 1)))

76106

return gen_rtx_PLUS (Pmode, XEXP (x, 1), XEXP (x, 0));

76107

76108

- if (PA_SYMBOL_REF_TLS_P (x))

76109

+ if (pa_tls_referenced_p (x))

76110

return legitimize_tls_address (x);

76111

else if (flag_pic)

76112

return legitimize_pic_address (x, mode, gen_reg_rtx (Pmode));

76113

@@ -1916,9 +1919,10 @@

76114

not consider them legitimate constants. Loop optimizations can

76115

call the emit_move_xxx with one as a source. */

76116

if ((GET_CODE (operand1) != HIGH && immediate_operand (operand1, mode))

76117

+ || (GET_CODE (operand1) == HIGH

76118

+ && symbolic_operand (XEXP (operand1, 0), mode))

76119

|| function_label_operand (operand1, VOIDmode)

76120

- || (GET_CODE (operand1) == HIGH

76121

- && symbolic_operand (XEXP (operand1, 0), mode)))

76122

+ || pa_tls_referenced_p (operand1))

76123

{

76124

int ishighonly = 0;

76125

76126

@@ -2625,7 +2629,7 @@

76127

if (optype0 == REGOP)

76128

latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);

76129

else if (optype0 == OFFSOP)

76130

- latehalf[0] = adjust_address (operands[0], SImode, 4);

76131

+ latehalf[0] = adjust_address_nv (operands[0], SImode, 4);

76132

else

76133

latehalf[0] = operands[0];

76134

76135

@@ -2632,7 +2636,7 @@

76136

if (optype1 == REGOP)

76137

latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);

76138

else if (optype1 == OFFSOP)

76139

- latehalf[1] = adjust_address (operands[1], SImode, 4);

76140

+ latehalf[1] = adjust_address_nv (operands[1], SImode, 4);

76141

else if (optype1 == CNSTOP)

76142

split_double (operands[1], &operands[1], &latehalf[1]);

76143

else

76144

@@ -7539,7 +7543,7 @@

76145

if (!TARGET_LONG_CALLS && distance < MAX_PCREL17F_OFFSET)

76146

return 8;

76147

76148

- if (TARGET_LONG_ABS_CALL && !flag_pic)

76149

+ if (!flag_pic)

76150

return 12;

76151

76152

return 24;

76153

@@ -8104,7 +8108,8 @@

76154

return 12;

76155

76156

if (TARGET_FAST_INDIRECT_CALLS

76157

- || (!TARGET_PORTABLE_RUNTIME

76158

+ || (!TARGET_LONG_CALLS

76159

+ && !TARGET_PORTABLE_RUNTIME

76160

&& ((TARGET_PA_20 && !TARGET_SOM && distance < 7600000)

76161

|| distance < MAX_PCREL17F_OFFSET)))

76162

return 8;

76163

@@ -10397,7 +10402,7 @@

76164

/* TLS_MODEL_GLOBAL_DYNAMIC and TLS_MODEL_LOCAL_DYNAMIC are not

76165

legitimate constants. The other variants can't be handled by

76166

the move patterns after reload starts. */

76167

- if (PA_SYMBOL_REF_TLS_P (x))

76168

+ if (pa_tls_referenced_p (x))

76169

return false;

76170

76171

if (TARGET_64BIT && GET_CODE (x) == CONST_DOUBLE)

76172

@@ -10522,13 +10527,13 @@

76173

76174

/* When INT14_OK_STRICT is false, a secondary reload is needed

76175

to adjust the displacement of SImode and DImode floating point

76176

- instructions. So, we return false when STRICT is true. We

76177

+ instructions but this may fail when the register also needs

76178

+ reloading. So, we return false when STRICT is true. We

76179

also reject long displacements for float mode addresses since

76180

the majority of accesses will use floating point instructions

76181

that don't support 14-bit offsets. */

76182

if (!INT14_OK_STRICT

76183

- && reload_in_progress

76184

- && strict

76185

+ && (strict || !(reload_in_progress || reload_completed))

76186

&& mode != QImode

76187

&& mode != HImode)

76188

return false;

76189

@@ -10588,8 +10593,7 @@

76190

return true;

76191

76192

if (!INT14_OK_STRICT

76193

- && reload_in_progress

76194

- && strict

76195

+ && (strict || !(reload_in_progress || reload_completed))

76196

&& mode != QImode

76197

&& mode != HImode)

76198

return false;

76199

Index: gcc/config/pa/pa.h

76200

===================================================================

76201

--- a/src/gcc/config/pa/pa.h (.../tags/gcc_4_8_2_release)

76202

+++ b/src/gcc/config/pa/pa.h (.../branches/gcc-4_8-branch)

76203

@@ -784,9 +784,9 @@

76204

76205

#define MAX_REGS_PER_ADDRESS 2

76206

76207

-/* Non-TLS symbolic references. */

76208

-#define PA_SYMBOL_REF_TLS_P(RTX) \

76209

- (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)

76210

+/* TLS symbolic reference. */

76211

+#define PA_SYMBOL_REF_TLS_P(X) \

76212

+ (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (X) != 0)

76213

76214

/* Recognize any constant value that is a valid address except

76215

for symbolic addresses. We get better CSE by rejecting them

76216

@@ -796,7 +796,8 @@

76217

#define CONSTANT_ADDRESS_P(X) \

76218

((GET_CODE (X) == LABEL_REF \

76219

|| (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \

76220

- || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \

76221

+ || GET_CODE (X) == CONST_INT \

76222

+ || (GET_CODE (X) == CONST && !pa_tls_referenced_p (X)) \

76223

|| GET_CODE (X) == HIGH) \

76224

&& (reload_in_progress || reload_completed \

76225

|| ! pa_symbolic_expression_p (X)))

76226

Index: gcc/config/mips/driver-native.c

76227

===================================================================

76228

--- a/src/gcc/config/mips/driver-native.c (.../tags/gcc_4_8_2_release)

76229

+++ b/src/gcc/config/mips/driver-native.c (.../branches/gcc-4_8-branch)

76230

@@ -58,11 +58,17 @@

76231

if (strncmp (buf, "cpu model", sizeof ("cpu model") - 1) == 0)

76232

{

76233

if (strstr (buf, "Godson2 V0.2") != NULL

76234

- || strstr (buf, "Loongson-2 V0.2") != NULL)

76235

+ || strstr (buf, "Loongson-2 V0.2") != NULL

76236

+ || strstr (buf, "Loongson-2E") != NULL)

76237

cpu = "loongson2e";

76238

else if (strstr (buf, "Godson2 V0.3") != NULL

76239

- || strstr (buf, "Loongson-2 V0.3") != NULL)

76240

+ || strstr (buf, "Loongson-2 V0.3") != NULL

76241

+ || strstr (buf, "Loongson-2F") != NULL)

76242

cpu = "loongson2f";

76243

+ else if (strstr (buf, "Godson3 V0.5") != NULL

76244

+ || strstr (buf, "Loongson-3 V0.5") != NULL

76245

+ || strstr (buf, "Loongson-3A") != NULL)

76246

+ cpu = "loongson3a";

76247

else if (strstr (buf, "SiByte SB1") != NULL)

76248

cpu = "sb1";

76249

else if (strstr (buf, "R5000") != NULL)

76250

Index: gcc/config/mips/mips.md

76251

===================================================================

76252

--- a/src/gcc/config/mips/mips.md (.../tags/gcc_4_8_2_release)

76253

+++ b/src/gcc/config/mips/mips.md (.../branches/gcc-4_8-branch)

76254

@@ -73,6 +73,11 @@

76255

UNSPEC_STORE_LEFT

76256

UNSPEC_STORE_RIGHT

76257

76258

+ ;; Integer operations that are too cumbersome to describe directly.

76259

+ UNSPEC_WSBH

76260

+ UNSPEC_DSBH

76261

+ UNSPEC_DSHD

76262

+

76263

;; Floating-point moves.

76264

UNSPEC_LOAD_LOW

76265

UNSPEC_LOAD_HIGH

76266

@@ -1294,20 +1299,32 @@

76267

76268

;; Combiner patterns for unsigned byte-add.

76269

76270

-(define_insn "*baddu_si"

76271

+(define_insn "*baddu_si_eb"

76272

[(set (match_operand:SI 0 "register_operand" "=d")

76273

(zero_extend:SI

76274

- (plus:QI (match_operand:QI 1 "register_operand" "d")

76275

- (match_operand:QI 2 "register_operand" "d"))))]

76276

- "ISA_HAS_BADDU"

76277

+ (subreg:QI

76278

+ (plus:SI (match_operand:SI 1 "register_operand" "d")

76279

+ (match_operand:SI 2 "register_operand" "d")) 3)))]

76280

+ "ISA_HAS_BADDU && BYTES_BIG_ENDIAN"

76281

"baddu\\t%0,%1,%2"

76282

[(set_attr "alu_type" "add")])

76283

76284

+(define_insn "*baddu_si_el"

76285

+ [(set (match_operand:SI 0 "register_operand" "=d")

76286

+ (zero_extend:SI

76287

+ (subreg:QI

76288

+ (plus:SI (match_operand:SI 1 "register_operand" "d")

76289

+ (match_operand:SI 2 "register_operand" "d")) 0)))]

76290

+ "ISA_HAS_BADDU && !BYTES_BIG_ENDIAN"

76291

+ "baddu\\t%0,%1,%2"

76292

+ [(set_attr "alu_type" "add")])

76293

+

76294

(define_insn "*baddu_di<mode>"

76295

[(set (match_operand:GPR 0 "register_operand" "=d")

76296

(zero_extend:GPR

76297

- (plus:QI (truncate:QI (match_operand:DI 1 "register_operand" "d"))

76298

- (truncate:QI (match_operand:DI 2 "register_operand" "d")))))]

76299

+ (truncate:QI

76300

+ (plus:DI (match_operand:DI 1 "register_operand" "d")

76301

+ (match_operand:DI 2 "register_operand" "d")))))]

76302

"ISA_HAS_BADDU && TARGET_64BIT"

76303

"baddu\\t%0,%1,%2"

76304

[(set_attr "alu_type" "add")])

76305

@@ -5367,6 +5384,56 @@

76306

}

76307

[(set_attr "type" "shift")

76308

(set_attr "mode" "<MODE>")])

76309

+

76310

+(define_insn "bswaphi2"

76311

+ [(set (match_operand:HI 0 "register_operand" "=d")

76312

+ (bswap:HI (match_operand:HI 1 "register_operand" "d")))]

76313

+ "ISA_HAS_WSBH"

76314

+ "wsbh\t%0,%1"

76315

+ [(set_attr "type" "shift")])

76316

+

76317

+(define_insn_and_split "bswapsi2"

76318

+ [(set (match_operand:SI 0 "register_operand" "=d")

76319

+ (bswap:SI (match_operand:SI 1 "register_operand" "d")))]

76320

+ "ISA_HAS_WSBH && ISA_HAS_ROR"

76321

+ "#"

76322

+ ""

76323

+ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_WSBH))

76324

+ (set (match_dup 0) (rotatert:SI (match_dup 0) (const_int 16)))]

76325

+ ""

76326

+ [(set_attr "length" "8")])

76327

+

76328

+(define_insn_and_split "bswapdi2"

76329

+ [(set (match_operand:DI 0 "register_operand" "=d")

76330

+ (bswap:DI (match_operand:DI 1 "register_operand" "d")))]

76331

+ "TARGET_64BIT && ISA_HAS_WSBH"

76332

+ "#"

76333

+ ""

76334

+ [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_DSBH))

76335

+ (set (match_dup 0) (unspec:DI [(match_dup 0)] UNSPEC_DSHD))]

76336

+ ""

76337

+ [(set_attr "length" "8")])

76338

+

76339

+(define_insn "wsbh"

76340

+ [(set (match_operand:SI 0 "register_operand" "=d")

76341

+ (unspec:SI [(match_operand:SI 1 "register_operand" "d")] UNSPEC_WSBH))]

76342

+ "ISA_HAS_WSBH"

76343

+ "wsbh\t%0,%1"

76344

+ [(set_attr "type" "shift")])

76345

+

76346

+(define_insn "dsbh"

76347

+ [(set (match_operand:DI 0 "register_operand" "=d")

76348

+ (unspec:DI [(match_operand:DI 1 "register_operand" "d")] UNSPEC_DSBH))]

76349

+ "TARGET_64BIT && ISA_HAS_WSBH"

76350

+ "dsbh\t%0,%1"

76351

+ [(set_attr "type" "shift")])

76352

+

76353

+(define_insn "dshd"

76354

+ [(set (match_operand:DI 0 "register_operand" "=d")

76355

+ (unspec:DI [(match_operand:DI 1 "register_operand" "d")] UNSPEC_DSHD))]

76356

+ "TARGET_64BIT && ISA_HAS_WSBH"

76357

+ "dshd\t%0,%1"

76358

+ [(set_attr "type" "shift")])

76359

76360

;;

76361

;; ....................

76362

Index: gcc/config/mips/mips.c

76363

===================================================================

76364

--- a/src/gcc/config/mips/mips.c (.../tags/gcc_4_8_2_release)

76365

+++ b/src/gcc/config/mips/mips.c (.../branches/gcc-4_8-branch)

76366

@@ -3560,17 +3560,6 @@

76367

}

76368

}

76369

76370

-/* Return the cost of an operand X that can be trucated for free.

76371

- SPEED says whether we're optimizing for size or speed. */

76372

-

76373

-static int

76374

-mips_truncated_op_cost (rtx x, bool speed)

76375

-{

76376

- if (GET_CODE (x) == TRUNCATE)

76377

- x = XEXP (x, 0);

76378

- return set_src_cost (x, speed);

76379

-}

76380

-

76381

/* Implement TARGET_RTX_COSTS. */

76382

76383

static bool

76384

@@ -3951,13 +3940,12 @@

76385

case ZERO_EXTEND:

76386

if (outer_code == SET

76387

&& ISA_HAS_BADDU

76388

+ && (GET_CODE (XEXP (x, 0)) == TRUNCATE

76389

+ || GET_CODE (XEXP (x, 0)) == SUBREG)

76390

&& GET_MODE (XEXP (x, 0)) == QImode

76391

- && GET_CODE (XEXP (x, 0)) == PLUS)

76392

+ && GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS)

76393

{

76394

- rtx plus = XEXP (x, 0);

76395

- *total = (COSTS_N_INSNS (1)

76396

- + mips_truncated_op_cost (XEXP (plus, 0), speed)

76397

- + mips_truncated_op_cost (XEXP (plus, 1), speed));

76398

+ *total = set_src_cost (XEXP (XEXP (x, 0), 0), speed);

76399

return true;

76400

}

76401

*total = mips_zero_extend_cost (mode, XEXP (x, 0));

76402

@@ -8057,7 +8045,7 @@

76403

case 't':

76404

{

76405

int truth = (code == NE) == (letter == 'T');

76406

- fputc ("zfnt"[truth * 2 + (GET_MODE (op) == CCmode)], file);

76407

+ fputc ("zfnt"[truth * 2 + ST_REG_P (REGNO (XEXP (op, 0)))], file);

76408

}

76409

break;

76410

76411

Index: gcc/config/mips/mips.h

76412

===================================================================

76413

--- a/src/gcc/config/mips/mips.h (.../tags/gcc_4_8_2_release)

76414

+++ b/src/gcc/config/mips/mips.h (.../branches/gcc-4_8-branch)

76415

@@ -949,6 +949,11 @@

76416

|| TARGET_SMARTMIPS) \

76417

&& !TARGET_MIPS16)

76418

76419

+/* ISA has the WSBH (word swap bytes within halfwords) instruction.

76420

+ 64-bit targets also provide DSBH and DSHD. */

76421

+#define ISA_HAS_WSBH ((ISA_MIPS32R2 || ISA_MIPS64R2) \

76422

+ && !TARGET_MIPS16)

76423

+

76424

/* ISA has data prefetch instructions. This controls use of 'pref'. */

76425

#define ISA_HAS_PREFETCH ((ISA_MIPS4 \

76426

|| TARGET_LOONGSON_2EF \

76427

Index: gcc/params.def

76428

===================================================================

76429

--- a/src/gcc/params.def (.../tags/gcc_4_8_2_release)

76430

+++ b/src/gcc/params.def (.../branches/gcc-4_8-branch)

76431

@@ -1014,6 +1014,12 @@

76432

"strength reduction",

76433

50, 1, 999999)

76434

76435

+DEFPARAM (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS,

76436

+ "uninit-control-dep-attempts",

76437

+ "Maximum number of nested calls to search for control dependencies "

76438

+ "during uninitialized variable analysis",

76439

+ 1000, 1, 0)

76440

+

76441

/*

76442

Local variables:

76443

mode:c

76444

Index: gcc/tree-ssanames.c

76445

===================================================================

76446

--- a/src/gcc/tree-ssanames.c (.../tags/gcc_4_8_2_release)

76447

+++ b/src/gcc/tree-ssanames.c (.../branches/gcc-4_8-branch)

76448

@@ -128,7 +128,7 @@

76449

76450

/* The node was cleared out when we put it on the free list, so

76451

there is no need to do so again here. */

76452

- gcc_assert (ssa_name (SSA_NAME_VERSION (t)) == NULL);

76453

+ gcc_assert ((*SSANAMES (fn))[SSA_NAME_VERSION (t)] == NULL);

76454

(*SSANAMES (fn))[SSA_NAME_VERSION (t)] = t;

76455

}

76456

else

76457

Index: gcc/regcprop.c

76458

===================================================================

76459

--- a/src/gcc/regcprop.c (.../tags/gcc_4_8_2_release)

76460

+++ b/src/gcc/regcprop.c (.../branches/gcc-4_8-branch)

76461

@@ -747,6 +747,7 @@

76462

int n_ops, i, alt, predicated;

76463

bool is_asm, any_replacements;

76464

rtx set;

76465

+ rtx link;

76466

bool replaced[MAX_RECOG_OPERANDS];

76467

bool changed = false;

76468

struct kill_set_value_data ksvd;

76469

@@ -815,6 +816,23 @@

76470

if (recog_op_alt[i][alt].earlyclobber)

76471

kill_value (recog_data.operand[i], vd);

76472

76473

+ /* If we have dead sets in the insn, then we need to note these as we

76474

+ would clobbers. */

76475

+ for (link = REG_NOTES (insn); link; link = XEXP (link, 1))

76476

+ {

76477

+ if (REG_NOTE_KIND (link) == REG_UNUSED)

76478

+ {

76479

+ kill_value (XEXP (link, 0), vd);

76480

+ /* Furthermore, if the insn looked like a single-set,

76481

+ but the dead store kills the source value of that

76482

+ set, then we can no-longer use the plain move

76483

+ special case below. */

76484

+ if (set

76485

+ && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))

76486

+ set = NULL;

76487

+ }

76488

+ }

76489

+

76490

/* Special-case plain move instructions, since we may well

76491

be able to do the move from a different register class. */

76492

if (set && REG_P (SET_SRC (set)))

76493

Index: libgo/configure

76494

===================================================================

76495

--- a/src/libgo/configure (.../tags/gcc_4_8_2_release)

76496

+++ b/src/libgo/configure (.../branches/gcc-4_8-branch)

76497

@@ -6501,7 +6501,7 @@

76498

rm -rf conftest*

76499

;;

76500

76501

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

76502

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

76503

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

76504

# Find out which ABI we are using.

76505

echo 'int i;' > conftest.$ac_ext

76506

@@ -6519,7 +6519,10 @@

76507

x86_64-*linux*)

76508

LD="${LD-ld} -m elf_i386"

76509

;;

76510

- ppc64-*linux*|powerpc64-*linux*)

76511

+ powerpc64le-*linux*)

76512

+ LD="${LD-ld} -m elf32lppclinux"

76513

+ ;;

76514

+ powerpc64-*linux*)

76515

LD="${LD-ld} -m elf32ppclinux"

76516

;;

76517

s390x-*linux*)

76518

@@ -6538,7 +6541,10 @@

76519

x86_64-*linux*)

76520

LD="${LD-ld} -m elf_x86_64"

76521

;;

76522

- ppc*-*linux*|powerpc*-*linux*)

76523

+ powerpcle-*linux*)

76524

+ LD="${LD-ld} -m elf64lppc"

76525

+ ;;

76526

+ powerpc-*linux*)

76527

LD="${LD-ld} -m elf64ppc"

76528

;;

76529

s390*-*linux*|s390*-*tpf*)

76530

@@ -11105,7 +11111,7 @@

76531

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

76532

lt_status=$lt_dlunknown

76533

cat > conftest.$ac_ext <<_LT_EOF

76534

-#line 11108 "configure"

76535

+#line 11114 "configure"

76536

#include "confdefs.h"

76537

76538

#if HAVE_DLFCN_H

76539

@@ -11211,7 +11217,7 @@

76540

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

76541

lt_status=$lt_dlunknown

76542

cat > conftest.$ac_ext <<_LT_EOF

76543

-#line 11214 "configure"

76544

+#line 11220 "configure"

76545

#include "confdefs.h"

76546

76547

#if HAVE_DLFCN_H

76548

@@ -14700,7 +14706,7 @@

76549

fi

76550

76551

76552

-for ac_func in accept4 epoll_create1 faccessat fallocate fchmodat fchownat futimesat inotify_add_watch inotify_init inotify_init1 inotify_rm_watch mkdirat mknodat openat pipe2 renameat sync_file_range splice tee unlinkat unshare utimensat

76553

+for ac_func in accept4 dup3 epoll_create1 faccessat fallocate fchmodat fchownat futimesat getxattr inotify_add_watch inotify_init inotify_init1 inotify_rm_watch listxattr mkdirat mknodat openat pipe2 removexattr renameat setxattr sync_file_range splice tee unlinkat unshare utimensat

76554

do :

76555

as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`

76556

ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"

76557

Index: libgo/Makefile.in

76558

===================================================================

76559

--- a/src/libgo/Makefile.in (.../tags/gcc_4_8_2_release)

76560

+++ b/src/libgo/Makefile.in (.../branches/gcc-4_8-branch)

76561

@@ -195,7 +195,7 @@

76562

@LIBGO_IS_LINUX_TRUE@am__objects_5 = getncpu-linux.lo

76563

am__objects_6 = go-append.lo go-assert.lo go-assert-interface.lo \

76564

go-byte-array-to-string.lo go-breakpoint.lo go-caller.lo \

76565

- go-callers.lo go-can-convert-interface.lo go-cgo.lo \

76566

+ go-callers.lo go-can-convert-interface.lo go-cdiv.lo go-cgo.lo \

76567

go-check-interface.lo go-construct-map.lo \

76568

go-convert-interface.lo go-copy.lo go-defer.lo \

76569

go-deferred-recover.lo go-eface-compare.lo \

76570

@@ -757,6 +757,7 @@

76571

runtime/go-caller.c \

76572

runtime/go-callers.c \

76573

runtime/go-can-convert-interface.c \

76574

+ runtime/go-cdiv.c \

76575

runtime/go-cgo.c \

76576

runtime/go-check-interface.c \

76577

runtime/go-construct-map.c \

76578

@@ -1446,7 +1447,7 @@

76579

go/go/build/build.go \

76580

go/go/build/doc.go \

76581

go/go/build/read.go \

76582

- syslist.go

76583

+ go/go/build/syslist.go

76584

76585

go_go_doc_files = \

76586

go/go/doc/comment.go \

76587

@@ -2368,6 +2369,7 @@

76588

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-caller.Plo@am__quote@

76589

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-callers.Plo@am__quote@

76590

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-can-convert-interface.Plo@am__quote@

76591

+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-cdiv.Plo@am__quote@

76592

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-cgo.Plo@am__quote@

76593

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-check-interface.Plo@am__quote@

76594

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-construct-map.Plo@am__quote@

76595

@@ -2554,6 +2556,13 @@

76596

@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@

76597

@am__fastdepCC_FALSE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o go-can-convert-interface.lo `test -f 'runtime/go-can-convert-interface.c' || echo '$(srcdir)/'`runtime/go-can-convert-interface.c

76598

76599

+go-cdiv.lo: runtime/go-cdiv.c

76600

+@am__fastdepCC_TRUE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT go-cdiv.lo -MD -MP -MF $(DEPDIR)/go-cdiv.Tpo -c -o go-cdiv.lo `test -f 'runtime/go-cdiv.c' || echo '$(srcdir)/'`runtime/go-cdiv.c

76601

+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/go-cdiv.Tpo $(DEPDIR)/go-cdiv.Plo

76602

+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='runtime/go-cdiv.c' object='go-cdiv.lo' libtool=yes @AMDEPBACKSLASH@

76603

+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@

76604

+@am__fastdepCC_FALSE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o go-cdiv.lo `test -f 'runtime/go-cdiv.c' || echo '$(srcdir)/'`runtime/go-cdiv.c

76605

+

76606

go-cgo.lo: runtime/go-cgo.c

76607

@am__fastdepCC_TRUE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT go-cgo.lo -MD -MP -MF $(DEPDIR)/go-cgo.Tpo -c -o go-cgo.lo `test -f 'runtime/go-cgo.c' || echo '$(srcdir)/'`runtime/go-cgo.c

76608

@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/go-cgo.Tpo $(DEPDIR)/go-cgo.Plo

76609

@@ -5062,15 +5071,6 @@

76610

@$(CHECK)

76611

.PHONY: go/build/check

76612

76613

-syslist.go: s-syslist; @true

76614

-s-syslist: Makefile

76615

- echo '// Generated automatically by make.' >syslist.go.tmp

76616

- echo 'package build' >>syslist.go.tmp

76617

- echo 'const goosList = "$(GOOS)"' >>syslist.go.tmp

76618

- echo 'const goarchList = "$(GOARCH)"' >>syslist.go.tmp

76619

- $(SHELL) $(srcdir)/../move-if-change syslist.go.tmp syslist.go

76620

- $(STAMP) $@

76621

-

76622

@go_include@ go/doc.lo.dep

76623

go/doc.lo.dep: $(go_go_doc_files)

76624

$(BUILDDEPS)

76625

Index: libgo/runtime/go-defer.c

76626

===================================================================

76627

--- a/src/libgo/runtime/go-defer.c (.../tags/gcc_4_8_2_release)

76628

+++ b/src/libgo/runtime/go-defer.c (.../branches/gcc-4_8-branch)

76629

@@ -27,6 +27,7 @@

76630

n->__pfn = pfn;

76631

n->__arg = arg;

76632

n->__retaddr = NULL;

76633

+ n->__makefunc_can_recover = 0;

76634

g->defer = n;

76635

}

76636

76637

Index: libgo/runtime/go-defer.h

76638

===================================================================

76639

--- a/src/libgo/runtime/go-defer.h (.../tags/gcc_4_8_2_release)

76640

+++ b/src/libgo/runtime/go-defer.h (.../branches/gcc-4_8-branch)

76641

@@ -34,4 +34,10 @@

76642

set by __go_set_defer_retaddr which is called by the thunks

76643

created by defer statements. */

76644

const void *__retaddr;

76645

+

76646

+ /* Set to true if a function created by reflect.MakeFunc is

76647

+ permitted to recover. The return address of such a function

76648

+ function will be somewhere in libffi, so __retaddr is not

76649

+ useful. */

76650

+ _Bool __makefunc_can_recover;

76651

};

76652

Index: libgo/runtime/go-int-array-to-string.c

76653

===================================================================

76654

--- a/src/libgo/runtime/go-int-array-to-string.c (.../tags/gcc_4_8_2_release)

76655

+++ b/src/libgo/runtime/go-int-array-to-string.c (.../branches/gcc-4_8-branch)

76656

@@ -30,6 +30,8 @@

76657

76658

if (v < 0 || v > 0x10ffff)

76659

v = 0xfffd;

76660

+ else if (0xd800 <= v && v <= 0xdfff)

76661

+ v = 0xfffd;

76662

76663

if (v <= 0x7f)

76664

slen += 1;

76665

@@ -56,6 +58,8 @@

76666

character. */

76667

if (v < 0 || v > 0x10ffff)

76668

v = 0xfffd;

76669

+ else if (0xd800 <= v && v <= 0xdfff)

76670

+ v = 0xfffd;

76671

76672

if (v <= 0x7f)

76673

*s++ = v;

76674

Index: libgo/runtime/go-nosys.c

76675

===================================================================

76676

--- a/src/libgo/runtime/go-nosys.c (.../tags/gcc_4_8_2_release)

76677

+++ b/src/libgo/runtime/go-nosys.c (.../branches/gcc-4_8-branch)

76678

@@ -43,6 +43,17 @@

76679

}

76680

#endif

76681

76682

+#ifndef HAVE_DUP3

76683

+int

76684

+dup3 (int oldfd __attribute__ ((unused)),

76685

+ int newfd __attribute__ ((unused)),

76686

+ int flags __attribute__ ((unused)))

76687

+{

76688

+ errno = ENOSYS;

76689

+ return -1;

76690

+}

76691

+#endif

76692

+

76693

#ifndef HAVE_EPOLL_CREATE1

76694

int

76695

epoll_create1 (int flags __attribute__ ((unused)))

76696

@@ -112,6 +123,18 @@

76697

}

76698

#endif

76699

76700

+#ifndef HAVE_GETXATTR

76701

+ssize_t

76702

+getxattr (const char *path __attribute__ ((unused)),

76703

+ const char *name __attribute__ ((unused)),

76704

+ void *value __attribute__ ((unused)),

76705

+ size_t size __attribute__ ((unused)))

76706

+{

76707

+ errno = ENOSYS;

76708

+ return -1;

76709

+}

76710

+#endif

76711

+

76712

#ifndef HAVE_INOTIFY_ADD_WATCH

76713

int

76714

inotify_add_watch (int fd __attribute__ ((unused)),

76715

@@ -151,6 +174,17 @@

76716

}

76717

#endif

76718

76719

+#ifndef HAVE_LISTXATTR

76720

+ssize_t

76721

+listxattr (const char *path __attribute__ ((unused)),

76722

+ char *list __attribute__ ((unused)),

76723

+ size_t size __attribute__ ((unused)))

76724

+{

76725

+ errno = ENOSYS;

76726

+ return -1;

76727

+}

76728

+#endif

76729

+

76730

#ifndef HAVE_MKDIRAT

76731

int

76732

mkdirat (int dirfd __attribute__ ((unused)),

76733

@@ -196,6 +230,16 @@

76734

}

76735

#endif

76736

76737

+#ifndef HAVE_REMOVEXATTR

76738

+int

76739

+removexattr (const char *path __attribute__ ((unused)),

76740

+ const char *name __attribute__ ((unused)))

76741

+{

76742

+ errno = ENOSYS;

76743

+ return -1;

76744

+}

76745

+#endif

76746

+

76747

#ifndef HAVE_RENAMEAT

76748

int

76749

renameat (int olddirfd __attribute__ ((unused)),

76750

@@ -208,6 +252,19 @@

76751

}

76752

#endif

76753

76754

+#ifndef HAVE_SETXATTR

76755

+int

76756

+setxattr (const char *path __attribute__ ((unused)),

76757

+ const char *name __attribute__ ((unused)),

76758

+ const void *value __attribute__ ((unused)),

76759

+ size_t size __attribute__ ((unused)),

76760

+ int flags __attribute__ ((unused)))

76761

+{

76762

+ errno = ENOSYS;

76763

+ return -1;

76764

+}

76765

+#endif

76766

+

76767

#ifndef HAVE_SPLICE

76768

int

76769

splice (int fd __attribute__ ((unused)),

76770

Index: libgo/runtime/runtime.h

76771

===================================================================

76772

--- a/src/libgo/runtime/runtime.h (.../tags/gcc_4_8_2_release)

76773

+++ b/src/libgo/runtime/runtime.h (.../branches/gcc-4_8-branch)

76774

@@ -440,7 +440,7 @@

76775

};

76776

void runtime_hashinit(void);

76777

76778

-void runtime_traceback();

76779

+void runtime_traceback(void);

76780

void runtime_tracebackothers(G*);

76781

76782

/*

76783

@@ -756,6 +756,7 @@

76784

extern _Bool __go_file_line(uintptr, String*, String*, intgo *);

76785

extern byte* runtime_progname();

76786

extern void runtime_main(void*);

76787

+extern uint32 runtime_in_callers;

76788

76789

int32 getproccount(void);

76790

76791

Index: libgo/runtime/proc.c

76792

===================================================================

76793

--- a/src/libgo/runtime/proc.c (.../tags/gcc_4_8_2_release)

76794

+++ b/src/libgo/runtime/proc.c (.../branches/gcc-4_8-branch)

76795

@@ -1716,10 +1716,30 @@

76796

// entersyscall is going to return immediately after.

76797

76798

void runtime_entersyscall(void) __attribute__ ((no_split_stack));

76799

+static void doentersyscall(void) __attribute__ ((no_split_stack, noinline));

76800

76801

void

76802

runtime_entersyscall()

76803

{

76804

+ // Save the registers in the g structure so that any pointers

76805

+ // held in registers will be seen by the garbage collector.

76806

+ getcontext(&g->gcregs);

76807

+

76808

+ // Do the work in a separate function, so that this function

76809

+ // doesn't save any registers on its own stack. If this

76810

+ // function does save any registers, we might store the wrong

76811

+ // value in the call to getcontext.

76812

+ //

76813

+ // FIXME: This assumes that we do not need to save any

76814

+ // callee-saved registers to access the TLS variable g. We

76815

+ // don't want to put the ucontext_t on the stack because it is

76816

+ // large and we can not split the stack here.

76817

+ doentersyscall();

76818

+}

76819

+

76820

+static void

76821

+doentersyscall()

76822

+{

76823

if(m->profilehz > 0)

76824

runtime_setprof(false);

76825

76826

@@ -1736,10 +1756,6 @@

76827

}

76828

#endif

76829

76830

- // Save the registers in the g structure so that any pointers

76831

- // held in registers will be seen by the garbage collector.

76832

- getcontext(&g->gcregs);

76833

-

76834

g->status = Gsyscall;

76835

76836

if(runtime_atomicload(&runtime_sched.sysmonwait)) { // TODO: fast atomic

76837

@@ -2239,6 +2255,14 @@

76838

if(prof.fn == nil || prof.hz == 0)

76839

return;

76840

76841

+ if(runtime_atomicload(&runtime_in_callers) > 0) {

76842

+ // If SIGPROF arrived while already fetching runtime

76843

+ // callers we can have trouble on older systems

76844

+ // because the unwind library calls dl_iterate_phdr

76845

+ // which was not recursive in the past.

76846

+ return;

76847

+ }

76848

+

76849

runtime_lock(&prof);

76850

if(prof.fn == nil) {

76851

runtime_unlock(&prof);

76852

Index: libgo/runtime/mgc0.c

76853

===================================================================

76854

--- a/src/libgo/runtime/mgc0.c (.../tags/gcc_4_8_2_release)

76855

+++ b/src/libgo/runtime/mgc0.c (.../branches/gcc-4_8-branch)

76856

@@ -174,7 +174,7 @@

76857

Obj *roots;

76858

uint32 nroot;

76859

uint32 rootcap;

76860

-} work;

76861

+} work __attribute__((aligned(8)));

76862

76863

enum {

76864

GC_DEFAULT_PTR = GC_NUM_INSTR,

76865

@@ -239,8 +239,7 @@

76866

// (Manually inlined copy of MHeap_LookupMaybe.)

76867

k = (uintptr)obj>>PageShift;

76868

x = k;

76869

- if(sizeof(void*) == 8)

76870

- x -= (uintptr)runtime_mheap->arena_start>>PageShift;

76871

+ x -= (uintptr)runtime_mheap->arena_start>>PageShift;

76872

s = runtime_mheap->map[x];

76873

if(s == nil || k < s->start || k - s->start >= s->npages || s->state != MSpanInUse)

76874

return false;

76875

@@ -418,8 +417,7 @@

76876

// (Manually inlined copy of MHeap_LookupMaybe.)

76877

k = (uintptr)obj>>PageShift;

76878

x = k;

76879

- if(sizeof(void*) == 8)

76880

- x -= (uintptr)arena_start>>PageShift;

76881

+ x -= (uintptr)arena_start>>PageShift;

76882

s = runtime_mheap->map[x];

76883

if(s == nil || k < s->start || k - s->start >= s->npages || s->state != MSpanInUse)

76884

continue;

76885

@@ -466,8 +464,7 @@

76886

// Ask span about size class.

76887

// (Manually inlined copy of MHeap_Lookup.)

76888

x = (uintptr)obj >> PageShift;

76889

- if(sizeof(void*) == 8)

76890

- x -= (uintptr)arena_start>>PageShift;

76891

+ x -= (uintptr)arena_start>>PageShift;

76892

s = runtime_mheap->map[x];

76893

76894

PREFETCH(obj);

76895

@@ -585,8 +582,7 @@

76896

if(t == nil)

76897

return;

76898

x = (uintptr)obj >> PageShift;

76899

- if(sizeof(void*) == 8)

76900

- x -= (uintptr)(runtime_mheap->arena_start)>>PageShift;

76901

+ x -= (uintptr)(runtime_mheap->arena_start)>>PageShift;

76902

s = runtime_mheap->map[x];

76903

objstart = (byte*)((uintptr)s->start<<PageShift);

76904

if(s->sizeclass != 0) {

76905

Index: libgo/runtime/go-signal.c

76906

===================================================================

76907

--- a/src/libgo/runtime/go-signal.c (.../tags/gcc_4_8_2_release)

76908

+++ b/src/libgo/runtime/go-signal.c (.../branches/gcc-4_8-branch)

76909

@@ -234,7 +234,7 @@

76910

G *g;

76911

76912

g = runtime_g ();

76913

- runtime_traceback (g);

76914

+ runtime_traceback ();

76915

runtime_tracebackothers (g);

76916

76917

/* The gc library calls runtime_dumpregs here, and provides

76918

@@ -399,6 +399,9 @@

76919

{

76920

G *gp;

76921

M *mp;

76922

+#ifdef USING_SPLIT_STACK

76923

+ void *stack_context[10];

76924

+#endif

76925

76926

/* We are now running on the stack registered via sigaltstack.

76927

(Actually there is a small span of time between runtime_siginit

76928

@@ -409,7 +412,7 @@

76929

if (gp != NULL)

76930

{

76931

#ifdef USING_SPLIT_STACK

76932

- __splitstack_getcontext (&gp->stack_context[0]);

76933

+ __splitstack_getcontext (&stack_context[0]);

76934

#endif

76935

}

76936

76937

@@ -432,7 +435,7 @@

76938

if (gp != NULL)

76939

{

76940

#ifdef USING_SPLIT_STACK

76941

- __splitstack_setcontext (&gp->stack_context[0]);

76942

+ __splitstack_setcontext (&stack_context[0]);

76943

#endif

76944

}

76945

}

76946

Index: libgo/runtime/go-callers.c

76947

===================================================================

76948

--- a/src/libgo/runtime/go-callers.c (.../tags/gcc_4_8_2_release)

76949

+++ b/src/libgo/runtime/go-callers.c (.../branches/gcc-4_8-branch)

76950

@@ -11,6 +11,13 @@

76951

#include "runtime.h"

76952

#include "array.h"

76953

76954

+/* This is set to non-zero when calling backtrace_full. This is used

76955

+ to avoid getting hanging on a recursive lock in dl_iterate_phdr on

76956

+ older versions of glibc when a SIGPROF signal arrives while

76957

+ collecting a backtrace. */

76958

+

76959

+uint32 runtime_in_callers;

76960

+

76961

/* Argument passed to callback function. */

76962

76963

struct callers_data

76964

@@ -111,8 +118,10 @@

76965

data.skip = skip + 1;

76966

data.index = 0;

76967

data.max = m;

76968

+ runtime_xadd (&runtime_in_callers, 1);

76969

backtrace_full (__go_get_backtrace_state (), 0, callback, error_callback,

76970

&data);

76971

+ runtime_xadd (&runtime_in_callers, -1);

76972

return data.index;

76973

}

76974

76975

Index: libgo/runtime/go-cdiv.c

76976

===================================================================

76977

--- a/src/libgo/runtime/go-cdiv.c (.../tags/gcc_4_8_2_release)

76978

+++ b/src/libgo/runtime/go-cdiv.c (.../branches/gcc-4_8-branch)

76979

@@ -0,0 +1,46 @@

76980

+/* go-cdiv.c -- complex division routines

76981

+

76982

76983

+ Use of this source code is governed by a BSD-style

76984

+ license that can be found in the LICENSE file. */

76985

+

76986

+/* Calls to these functions are generated by the Go frontend for

76987

+ division of complex64 or complex128. We use these because Go's

76988

+ complex division expects slightly different results from the GCC

76989

+ default. When dividing NaN+1.0i / 0+0i, Go expects NaN+NaNi but

76990

+ GCC generates NaN+Infi. NaN+Infi seems wrong seems the rules of

76991

+ C99 Annex G specify that if either side of a complex number is Inf,

76992

+ the the whole number is Inf, but an operation involving NaN ought

76993

+ to result in NaN, not Inf. */

76994

+

76995

+__complex float

76996

+__go_complex64_div (__complex float a, __complex float b)

76997

+{

76998

+ if (__builtin_expect (b == 0+0i, 0))

76999

+ {

77000

+ if (!__builtin_isinff (__real__ a)

77001

+ && !__builtin_isinff (__imag__ a)

77002

+ && (__builtin_isnanf (__real__ a) || __builtin_isnanf (__imag__ a)))

77003

+ {

77004

+ /* Pass "1" to nanf to match math/bits.go. */

77005

+ return __builtin_nanf("1") + __builtin_nanf("1")*1i;

77006

+ }

77007

+ }

77008

+ return a / b;

77009

+}

77010

+

77011

+__complex double

77012

+__go_complex128_div (__complex double a, __complex double b)

77013

+{

77014

+ if (__builtin_expect (b == 0+0i, 0))

77015

+ {

77016

+ if (!__builtin_isinf (__real__ a)

77017

+ && !__builtin_isinf (__imag__ a)

77018

+ && (__builtin_isnan (__real__ a) || __builtin_isnan (__imag__ a)))

77019

+ {

77020

+ /* Pass "1" to nan to match math/bits.go. */

77021

+ return __builtin_nan("1") + __builtin_nan("1")*1i;

77022

+ }

77023

+ }

77024

+ return a / b;

77025

+}

77026

Index: libgo/runtime/go-reflect-call.c

77027

===================================================================

77028

--- a/src/libgo/runtime/go-reflect-call.c (.../tags/gcc_4_8_2_release)

77029

+++ b/src/libgo/runtime/go-reflect-call.c (.../branches/gcc-4_8-branch)

77030

@@ -98,9 +98,12 @@

77031

const struct __go_struct_field *fields;

77032

int i;

77033

77034

+ field_count = descriptor->__fields.__count;

77035

+ if (field_count == 0) {

77036

+ return &ffi_type_void;

77037

+ }

77038

ret = (ffi_type *) __go_alloc (sizeof (ffi_type));

77039

ret->type = FFI_TYPE_STRUCT;

77040

- field_count = descriptor->__fields.__count;

77041

fields = (const struct __go_struct_field *) descriptor->__fields.__values;

77042

ret->elements = (ffi_type **) __go_alloc ((field_count + 1)

77043

* sizeof (ffi_type *));

77044

Index: libgo/runtime/go-recover.c

77045

===================================================================

77046

--- a/src/libgo/runtime/go-recover.c (.../tags/gcc_4_8_2_release)

77047

+++ b/src/libgo/runtime/go-recover.c (.../branches/gcc-4_8-branch)

77048

@@ -16,12 +16,14 @@

77049

__go_can_recover--this is, the thunk. */

77050

77051

_Bool

77052

-__go_can_recover (const void* retaddr)

77053

+__go_can_recover (const void *retaddr)

77054

{

77055

G *g;

77056

struct __go_defer_stack *d;

77057

const char* ret;

77058

const char* dret;

77059

+ Location loc;

77060

+ const byte *name;

77061

77062

g = runtime_g ();

77063

77064

@@ -52,9 +54,80 @@

77065

#endif

77066

77067

dret = (const char *) d->__retaddr;

77068

- return ret <= dret && ret + 16 >= dret;

77069

+ if (ret <= dret && ret + 16 >= dret)

77070

+ return 1;

77071

+

77072

+ /* If the function calling recover was created by reflect.MakeFunc,

77073

+ then RETADDR will be somewhere in libffi. Our caller is

77074

+ permitted to recover if it was called from libffi. */

77075

+ if (!d->__makefunc_can_recover)

77076

+ return 0;

77077

+

77078

+ if (runtime_callers (2, &loc, 1) < 1)

77079

+ return 0;

77080

+

77081

+ /* If we have no function name, then we weren't called by Go code.

77082

+ Guess that we were called by libffi. */

77083

+ if (loc.function.len == 0)

77084

+ return 1;

77085

+

77086

+ if (loc.function.len < 4)

77087

+ return 0;

77088

+ name = loc.function.str;

77089

+ if (*name == '_')

77090

+ {

77091

+ if (loc.function.len < 5)

77092

+ return 0;

77093

+ ++name;

77094

+ }

77095

+

77096

+ if (name[0] == 'f' && name[1] == 'f' && name[2] == 'i' && name[3] == '_')

77097

+ return 1;

77098

+

77099

+ /* We may also be called by reflect.makeFuncImpl.call, for a

77100

+ function created by reflect.MakeFunc. */

77101

+ if (__builtin_strstr ((const char *) name, "makeFuncImpl") != NULL)

77102

+ return 1;

77103

+

77104

+ return 0;

77105

}

77106

77107

+/* This function is called when code is about to enter a function

77108

+ created by reflect.MakeFunc. It is called by the function stub

77109

+ used by MakeFunc. If the stub is permitted to call recover, then a

77110

+ real MakeFunc function is permitted to call recover. */

77111

+

77112

+void

77113

+__go_makefunc_can_recover (const void *retaddr)

77114

+{

77115

+ struct __go_defer_stack *d;

77116

+

77117

+ d = runtime_g ()->defer;

77118

+ if (d != NULL

77119

+ && !d->__makefunc_can_recover

77120

+ && __go_can_recover (retaddr))

77121

+ d->__makefunc_can_recover = 1;

77122

+}

77123

+

77124

+/* This function is called when code is about to exit a function

77125

+ created by reflect.MakeFunc. It is called by the function stub

77126

+ used by MakeFunc. It clears the __makefunc_can_recover field.

77127

+ It's OK to always clear this field, because __go_can_recover will

77128

+ only be called by a stub created for a function that calls recover.

77129

+ That stub will not call a function created by reflect.MakeFunc, so

77130

+ by the time we get here any caller higher up on the call stack no

77131

+ longer needs the information. */

77132

+

77133

+void

77134

+__go_makefunc_returning (void)

77135

+{

77136

+ struct __go_defer_stack *d;

77137

+

77138

+ d = runtime_g ()->defer;

77139

+ if (d != NULL)

77140

+ d->__makefunc_can_recover = 0;

77141

+}

77142

+

77143

/* This is only called when it is valid for the caller to recover the

77144

value on top of the panic stack, if there is one. */

77145

77146

Index: libgo/runtime/malloc.goc

77147

===================================================================

77148

--- a/src/libgo/runtime/malloc.goc (.../tags/gcc_4_8_2_release)

77149

+++ b/src/libgo/runtime/malloc.goc (.../branches/gcc-4_8-branch)

77150

@@ -541,8 +541,7 @@

77151

77152

// (Manually inlined copy of runtime_MHeap_Lookup)

77153

p = (uintptr)v>>PageShift;

77154

- if(sizeof(void*) == 8)

77155

- p -= (uintptr)runtime_mheap->arena_start >> PageShift;

77156

+ p -= (uintptr)runtime_mheap->arena_start >> PageShift;

77157

s = runtime_mheap->map[p];

77158

77159

if(s->sizeclass == 0) {

77160

Index: libgo/runtime/go-make-slice.c

77161

===================================================================

77162

--- a/src/libgo/runtime/go-make-slice.c (.../tags/gcc_4_8_2_release)

77163

+++ b/src/libgo/runtime/go-make-slice.c (.../branches/gcc-4_8-branch)

77164

@@ -34,7 +34,10 @@

77165

std = (const struct __go_slice_type *) td;

77166

77167

ilen = (intgo) len;

77168

- if (ilen < 0 || (uintptr_t) ilen != len)

77169

+ if (ilen < 0

77170

+ || (uintptr_t) ilen != len

77171

+ || (std->__element_type->__size > 0

77172

+ && len > MaxMem / std->__element_type->__size))

77173

runtime_panicstring ("makeslice: len out of range");

77174

77175

icap = (intgo) cap;

77176

Index: libgo/runtime/mheap.c

77177

===================================================================

77178

--- a/src/libgo/runtime/mheap.c (.../tags/gcc_4_8_2_release)

77179

+++ b/src/libgo/runtime/mheap.c (.../branches/gcc-4_8-branch)

77180

@@ -150,8 +150,7 @@

77181

runtime_MSpan_Init(t, s->start + npage, s->npages - npage);

77182

s->npages = npage;

77183

p = t->start;

77184

- if(sizeof(void*) == 8)

77185

- p -= ((uintptr)h->arena_start>>PageShift);

77186

+ p -= ((uintptr)h->arena_start>>PageShift);

77187

if(p > 0)

77188

h->map[p-1] = s;

77189

h->map[p] = t;

77190

@@ -169,8 +168,7 @@

77191

s->elemsize = (sizeclass==0 ? s->npages<<PageShift : (uintptr)runtime_class_to_size[sizeclass]);

77192

s->types.compression = MTypes_Empty;

77193

p = s->start;

77194

- if(sizeof(void*) == 8)

77195

- p -= ((uintptr)h->arena_start>>PageShift);

77196

+ p -= ((uintptr)h->arena_start>>PageShift);

77197

for(n=0; n<npage; n++)

77198

h->map[p+n] = s;

77199

return s;

77200

@@ -241,8 +239,7 @@

77201

mstats.mspan_sys = h->spanalloc.sys;

77202

runtime_MSpan_Init(s, (uintptr)v>>PageShift, ask>>PageShift);

77203

p = s->start;

77204

- if(sizeof(void*) == 8)

77205

- p -= ((uintptr)h->arena_start>>PageShift);

77206

+ p -= ((uintptr)h->arena_start>>PageShift);

77207

h->map[p] = s;

77208

h->map[p + s->npages - 1] = s;

77209

s->state = MSpanInUse;

77210

@@ -259,8 +256,7 @@

77211

uintptr p;

77212

77213

p = (uintptr)v;

77214

- if(sizeof(void*) == 8)

77215

- p -= (uintptr)h->arena_start;

77216

+ p -= (uintptr)h->arena_start;

77217

return h->map[p >> PageShift];

77218

}

77219

77220

@@ -281,8 +277,7 @@

77221

return nil;

77222

p = (uintptr)v>>PageShift;

77223

q = p;

77224

- if(sizeof(void*) == 8)

77225

- q -= (uintptr)h->arena_start >> PageShift;

77226

+ q -= (uintptr)h->arena_start >> PageShift;

77227

s = h->map[q];

77228

if(s == nil || p < s->start || p - s->start >= s->npages)

77229

return nil;

77230

@@ -332,8 +327,7 @@

77231

77232

// Coalesce with earlier, later spans.

77233

p = s->start;

77234

- if(sizeof(void*) == 8)

77235

- p -= (uintptr)h->arena_start >> PageShift;

77236

+ p -= (uintptr)h->arena_start >> PageShift;

77237

if(p > 0 && (t = h->map[p-1]) != nil && t->state != MSpanInUse) {

77238

tp = (uintptr*)(t->start<<PageShift);

77239

*tp |= *sp; // propagate "needs zeroing" mark

77240

Index: libgo/testsuite/gotest

77241

===================================================================

77242

--- a/src/libgo/testsuite/gotest (.../tags/gcc_4_8_2_release)

77243

+++ b/src/libgo/testsuite/gotest (.../branches/gcc-4_8-branch)

77244

@@ -369,7 +369,7 @@

77245

{

77246

text="T"

77247

case "$GOARCH" in

77248

- ppc64) text="D" ;;

77249

+ ppc64) text="[TD]" ;;

77250

esac

77251

77252

symtogo='sed -e s/_test/XXXtest/ -e s/.*_$[^_]*\.$/\1/ -e s/XXXtest/_test/'

77253

Index: libgo/mksysinfo.sh

77254

===================================================================

77255

--- a/src/libgo/mksysinfo.sh (.../tags/gcc_4_8_2_release)

77256

+++ b/src/libgo/mksysinfo.sh (.../branches/gcc-4_8-branch)

77257

@@ -1035,6 +1035,10 @@

77258

grep '^const _LOCK_' gen-sysinfo.go |

77259

sed -e 's/^$const $_$LOCK_[^= ]*$$.*$$/\1\2 = _\2/' >> ${OUT}

77260

77261

+# The PRIO constants.

77262

+grep '^const _PRIO_' gen-sysinfo.go | \

77263

+ sed -e 's/^$const $_$PRIO_[^= ]*$$.*$$/\1\2 = _\2/' >> ${OUT}

77264

+

77265

# The GNU/Linux LINUX_REBOOT flags.

77266

grep '^const _LINUX_REBOOT_' gen-sysinfo.go |

77267

sed -e 's/^$const $_$LINUX_REBOOT_[^= ]*$$.*$$/\1\2 = _\2/' >> ${OUT}

77268

Index: libgo/config.h.in

77269

===================================================================

77270

--- a/src/libgo/config.h.in (.../tags/gcc_4_8_2_release)

77271

+++ b/src/libgo/config.h.in (.../branches/gcc-4_8-branch)

77272

@@ -39,6 +39,9 @@

77273

/* Define to 1 if you have the `dl_iterate_phdr' function. */

77274

#undef HAVE_DL_ITERATE_PHDR

77275

77276

+/* Define to 1 if you have the `dup3' function. */

77277

+#undef HAVE_DUP3

77278

+

77279

/* Define to 1 if you have the `epoll_create1' function. */

77280

#undef HAVE_EPOLL_CREATE1

77281

77282

@@ -66,6 +69,9 @@

77283

/* Define if _Unwind_GetIPInfo is available. */

77284

#undef HAVE_GETIPINFO

77285

77286

+/* Define to 1 if you have the `getxattr' function. */

77287

+#undef HAVE_GETXATTR

77288

+

77289

/* Define to 1 if you have the `inotify_add_watch' function. */

77290

#undef HAVE_INOTIFY_ADD_WATCH

77291

77292

@@ -111,6 +117,9 @@

77293

/* Define to 1 if you have the <linux/rtnetlink.h> header file. */

77294

#undef HAVE_LINUX_RTNETLINK_H

77295

77296

+/* Define to 1 if you have the `listxattr' function. */

77297

+#undef HAVE_LISTXATTR

77298

+

77299

/* Define to 1 if the system has the type `loff_t'. */

77300

#undef HAVE_LOFF_T

77301

77302

@@ -171,6 +180,9 @@

77303

/* Define to 1 if you have the `pipe2' function. */

77304

#undef HAVE_PIPE2

77305

77306

+/* Define to 1 if you have the `removexattr' function. */

77307

+#undef HAVE_REMOVEXATTR

77308

+

77309

/* Define to 1 if you have the `renameat' function. */

77310

#undef HAVE_RENAMEAT

77311

77312

@@ -180,6 +192,9 @@

77313

/* Define to 1 if you have the `setenv' function. */

77314

#undef HAVE_SETENV

77315

77316

+/* Define to 1 if you have the `setxattr' function. */

77317

+#undef HAVE_SETXATTR

77318

+

77319

/* Define to 1 if you have the `sinl' function. */

77320

#undef HAVE_SINL

77321

77322

Index: libgo/configure.ac

77323

===================================================================

77324

--- a/src/libgo/configure.ac (.../tags/gcc_4_8_2_release)

77325

+++ b/src/libgo/configure.ac (.../branches/gcc-4_8-branch)

77326

@@ -503,7 +503,7 @@

77327

AM_CONDITIONAL(HAVE_STRERROR_R, test "$ac_cv_func_strerror_r" = yes)

77328

AM_CONDITIONAL(HAVE_WAIT4, test "$ac_cv_func_wait4" = yes)

77329

77330

-AC_CHECK_FUNCS(accept4 epoll_create1 faccessat fallocate fchmodat fchownat futimesat inotify_add_watch inotify_init inotify_init1 inotify_rm_watch mkdirat mknodat openat pipe2 renameat sync_file_range splice tee unlinkat unshare utimensat)

77331

+AC_CHECK_FUNCS(accept4 dup3 epoll_create1 faccessat fallocate fchmodat fchownat futimesat getxattr inotify_add_watch inotify_init inotify_init1 inotify_rm_watch listxattr mkdirat mknodat openat pipe2 removexattr renameat setxattr sync_file_range splice tee unlinkat unshare utimensat)

77332

AC_TYPE_OFF_T

77333

AC_CHECK_TYPES([loff_t])

77334

77335

Index: libgo/config/libtool.m4

77336

===================================================================

77337

--- a/src/libgo/config/libtool.m4 (.../tags/gcc_4_8_2_release)

77338

+++ b/src/libgo/config/libtool.m4 (.../branches/gcc-4_8-branch)

77339

@@ -1225,7 +1225,7 @@

77340

rm -rf conftest*

77341

;;

77342

77343

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

77344

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

77345

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

77346

# Find out which ABI we are using.

77347

echo 'int i;' > conftest.$ac_ext

77348

@@ -1239,7 +1239,10 @@

77349

x86_64-*linux*)

77350

LD="${LD-ld} -m elf_i386"

77351

;;

77352

- ppc64-*linux*|powerpc64-*linux*)

77353

+ powerpc64le-*linux*)

77354

+ LD="${LD-ld} -m elf32lppclinux"

77355

+ ;;

77356

+ powerpc64-*linux*)

77357

LD="${LD-ld} -m elf32ppclinux"

77358

;;

77359

s390x-*linux*)

77360

@@ -1258,7 +1261,10 @@

77361

x86_64-*linux*)

77362

LD="${LD-ld} -m elf_x86_64"

77363

;;

77364

- ppc*-*linux*|powerpc*-*linux*)

77365

+ powerpcle-*linux*)

77366

+ LD="${LD-ld} -m elf64lppc"

77367

+ ;;

77368

+ powerpc-*linux*)

77369

LD="${LD-ld} -m elf64ppc"

77370

;;

77371

s390*-*linux*|s390*-*tpf*)

77372

Index: libgo/go/reflect/value.go

77373

===================================================================

77374

--- a/src/libgo/go/reflect/value.go (.../tags/gcc_4_8_2_release)

77375

+++ b/src/libgo/go/reflect/value.go (.../branches/gcc-4_8-branch)

77376

@@ -98,6 +98,7 @@

77377

flagIndir

77378

flagAddr

77379

flagMethod

77380

+ flagMethodFn // gccgo: first fn parameter is always pointer

77381

flagKindShift = iota

77382

flagKindWidth = 5 // there are 27 kinds

77383

flagKindMask flag = 1<<flagKindWidth - 1

77384

@@ -433,7 +434,7 @@

77385

if v.flag&flagMethod != 0 {

77386

nin++

77387

}

77388

- firstPointer := len(in) > 0 && t.In(0).Kind() != Ptr && v.flag&flagMethod == 0 && isMethod(v.typ)

77389

+ firstPointer := len(in) > 0 && t.In(0).Kind() != Ptr && v.flag&flagMethodFn != 0

77390

params := make([]unsafe.Pointer, nin)

77391

off := 0

77392

if v.flag&flagMethod != 0 {

77393

@@ -484,33 +485,6 @@

77394

return ret

77395

}

77396

77397

-// gccgo specific test to see if typ is a method. We can tell by

77398

-// looking at the string to see if there is a receiver. We need this

77399

-// because for gccgo all methods take pointer receivers.

77400

-func isMethod(t *rtype) bool {

77401

- if Kind(t.kind) != Func {

77402

- return false

77403

- }

77404

- s := *t.string

77405

- parens := 0

77406

- params := 0

77407

- sawRet := false

77408

- for i, c := range s {

77409

- if c == '(' {

77410

- if parens == 0 {

77411

- params++

77412

- }

77413

- parens++

77414

- } else if c == ')' {

77415

- parens--

77416

- } else if parens == 0 && c == ' ' && s[i+1] != '(' && !sawRet {

77417

- params++

77418

- sawRet = true

77419

- }

77420

- }

77421

- return params > 2

77422

-}

77423

-

77424

// methodReceiver returns information about the receiver

77425

// described by v. The Value v may or may not have the

77426

// flagMethod bit set, so the kind cached in v.flag should

77427

@@ -917,6 +891,16 @@

77428

v = makeMethodValue("Interface", v)

77429

}

77430

77431

+ if v.flag&flagMethodFn != 0 {

77432

+ if v.typ.Kind() != Func {

77433

+ panic("reflect: MethodFn of non-Func")

77434

+ }

77435

+ ft := (*funcType)(unsafe.Pointer(v.typ))

77436

+ if ft.in[0].Kind() != Ptr {

77437

+ v = makeValueMethod(v)

77438

+ }

77439

+ }

77440

+

77441

k := v.kind()

77442

if k == Interface {

77443

// Special case: return the element inside the interface.

77444

@@ -1230,8 +1214,7 @@

77445

// created via reflect have the same underlying code pointer,

77446

// so their Pointers are equal. The function used here must

77447

// match the one used in makeMethodValue.

77448

- // This is not properly implemented for gccgo.

77449

- f := Zero

77450

+ f := makeFuncStub

77451

return **(**uintptr)(unsafe.Pointer(&f))

77452

}

77453

p := v.val

77454

Index: libgo/go/reflect/makefuncgo_386.go

77455

===================================================================

77456

--- a/src/libgo/go/reflect/makefuncgo_386.go (.../tags/gcc_4_8_2_release)

77457

+++ b/src/libgo/go/reflect/makefuncgo_386.go (.../branches/gcc-4_8-branch)

77458

@@ -14,8 +14,10 @@

77459

// registers that might hold result values.

77460

type i386Regs struct {

77461

esp uint32

77462

- eax uint32 // Value to return in %eax.

77463

- st0 uint64 // Value to return in %st(0).

77464

+ eax uint32 // Value to return in %eax.

77465

+ st0 float64 // Value to return in %st(0).

77466

+ sr bool // Set to true if hidden struct pointer.

77467

+ sf bool // Set to true if returning float

77468

}

77469

77470

// MakeFuncStubGo implements the 386 calling convention for MakeFunc.

77471

@@ -56,10 +58,13 @@

77472

in := make([]Value, 0, len(ftyp.in))

77473

ap := uintptr(regs.esp)

77474

77475

+ regs.sr = false

77476

+ regs.sf = false

77477

var retPtr unsafe.Pointer

77478

if retStruct {

77479

retPtr = *(*unsafe.Pointer)(unsafe.Pointer(ap))

77480

ap += ptrSize

77481

+ regs.sr = true

77482

}

77483

77484

for _, rt := range ftyp.in {

77485

@@ -77,7 +82,7 @@

77486

77487

// Call the real function.

77488

77489

- out := c.fn(in)

77490

+ out := c.call(in)

77491

77492

if len(out) != len(ftyp.out) {

77493

panic("reflect: wrong return count from function created by MakeFunc")

77494

@@ -123,13 +128,16 @@

77495

77496

v := out[0]

77497

w := v.iword()

77498

- if v.Kind() != Ptr && v.Kind() != UnsafePointer {

77499

- w = loadIword(unsafe.Pointer(w), v.typ.size)

77500

- }

77501

switch v.Kind() {

77502

- case Float32, Float64:

77503

- regs.st0 = uint64(uintptr(w))

77504

+ case Ptr, UnsafePointer:

77505

+ regs.eax = uint32(uintptr(w))

77506

+ case Float32:

77507

+ regs.st0 = float64(*(*float32)(unsafe.Pointer(w)))

77508

+ regs.sf = true

77509

+ case Float64:

77510

+ regs.st0 = *(*float64)(unsafe.Pointer(w))

77511

+ regs.sf = true

77512

default:

77513

- regs.eax = uint32(uintptr(w))

77514

+ regs.eax = uint32(uintptr(loadIword(unsafe.Pointer(w), v.typ.size)))

77515

}

77516

}

77517

Index: libgo/go/reflect/makefunc_amd64.S

77518

===================================================================

77519

--- a/src/libgo/go/reflect/makefunc_amd64.S (.../tags/gcc_4_8_2_release)

77520

+++ b/src/libgo/go/reflect/makefunc_amd64.S (.../branches/gcc-4_8-branch)

77521

@@ -61,6 +61,14 @@

77522

movdqa %xmm6, 0xa0(%rsp)

77523

movdqa %xmm7, 0xb0(%rsp)

77524

77525

+ /* For MakeFunc functions that call recover. */

77526

+ movq 8(%rbp), %rdi

77527

+#ifdef __PIC__

77528

+ call __go_makefunc_can_recover@PLT

77529

+#else

77530

+ call __go_makefunc_can_recover

77531

+#endif

77532

+

77533

# Get function type.

77534

#ifdef __PIC__

77535

call __go_get_closure@PLT

77536

@@ -77,6 +85,13 @@

77537

call reflect.MakeFuncStubGo

77538

#endif

77539

77540

+ /* MakeFunc functions can no longer call recover. */

77541

+#ifdef __PIC__

77542

+ call __go_makefunc_returning@PLT

77543

+#else

77544

+ call __go_makefunc_returning

77545

+#endif

77546

+

77547

# The structure will be updated with any return values. Load

77548

# all possible return registers before returning to the caller.

77549

77550

Index: libgo/go/reflect/type.go

77551

===================================================================

77552

--- a/src/libgo/go/reflect/type.go (.../tags/gcc_4_8_2_release)

77553

+++ b/src/libgo/go/reflect/type.go (.../branches/gcc-4_8-branch)

77554

@@ -508,7 +508,7 @@

77555

m.Type = toType(mt)

77556

x := new(unsafe.Pointer)

77557

*x = unsafe.Pointer(&p.tfn)

77558

- m.Func = Value{mt, unsafe.Pointer(x), fl | flagIndir}

77559

+ m.Func = Value{mt, unsafe.Pointer(x), fl | flagIndir | flagMethodFn}

77560

m.Index = i

77561

return

77562

}

77563

Index: libgo/go/reflect/makefunc_386.S

77564

===================================================================

77565

--- a/src/libgo/go/reflect/makefunc_386.S (.../tags/gcc_4_8_2_release)

77566

+++ b/src/libgo/go/reflect/makefunc_386.S (.../branches/gcc-4_8-branch)

77567

@@ -25,9 +25,13 @@

77568

struct {

77569

esp uint32 // 0x0

77570

eax uint32 // 0x4

77571

- st0 uint64 // 0x8

77572

+ st0 float64 // 0x8

77573

+ sr bool // 0x10

77574

+ sf bool // 0x11

77575

}

77576

- */

77577

+ The sr field is set by the function to a non-zero value if

77578

+ the function takes a struct hidden pointer that must be

77579

+ popped off the stack. */

77580

77581

pushl %ebp

77582

.LCFI0:

77583

@@ -45,7 +49,16 @@

77584

leal 8(%ebp), %eax /* Set esp field in struct. */

77585

movl %eax, -24(%ebp)

77586

77587

+ /* For MakeFunc functions that call recover. */

77588

+ movl 4(%ebp), %eax

77589

+ movl %eax, (%esp)

77590

#ifdef __PIC__

77591

+ call __go_makefunc_can_recover@PLT

77592

+#else

77593

+ call __go_makefunc_can_recover

77594

+#endif

77595

+

77596

+#ifdef __PIC__

77597

call __go_get_closure@PLT

77598

#else

77599

call __go_get_closure

77600

@@ -62,9 +75,20 @@

77601

call reflect.MakeFuncStubGo

77602

#endif

77603

77604

+ /* MakeFunc functions can no longer call recover. */

77605

+#ifdef __PIC__

77606

+ call __go_makefunc_returning@PLT

77607

+#else

77608

+ call __go_makefunc_returning

77609

+#endif

77610

+

77611

/* Set return registers. */

77612

77613

movl -20(%ebp), %eax

77614

+

77615

+ cmpb $0, -7(%ebp)

77616

+ je 2f

77617

+

77618

fldl -16(%ebp)

77619

77620

#ifdef __SSE2__

77621

@@ -73,12 +97,20 @@

77622

movsd -16(%ebp), %xmm0

77623

#endif

77624

77625

+2:

77626

+ movb -8(%ebp), %dl

77627

+

77628

addl $36, %esp

77629

popl %ebx

77630

.LCFI3:

77631

popl %ebp

77632

.LCFI4:

77633

+

77634

+ testb %dl,%dl

77635

+ jne 1f

77636

ret

77637

+1:

77638

+ ret $4

77639

.LFE1:

77640

#ifdef __ELF__

77641

.size reflect.makeFuncStub, . - reflect.makeFuncStub

77642

Index: libgo/go/reflect/all_test.go

77643

===================================================================

77644

--- a/src/libgo/go/reflect/all_test.go (.../tags/gcc_4_8_2_release)

77645

+++ b/src/libgo/go/reflect/all_test.go (.../branches/gcc-4_8-branch)

77646

@@ -1430,6 +1430,46 @@

77647

}

77648

}

77649

77650

+type emptyStruct struct{}

77651

+

77652

+type nonEmptyStruct struct {

77653

+ member int

77654

+}

77655

+

77656

+func returnEmpty() emptyStruct {

77657

+ return emptyStruct{}

77658

+}

77659

+

77660

+func takesEmpty(e emptyStruct) {

77661

+}

77662

+

77663

+func returnNonEmpty(i int) nonEmptyStruct {

77664

+ return nonEmptyStruct{member: i}

77665

+}

77666

+

77667

+func takesNonEmpty(n nonEmptyStruct) int {

77668

+ return n.member

77669

+}

77670

+

77671

+func TestCallWithStruct(t *testing.T) {

77672

+ r := ValueOf(returnEmpty).Call([]Value{})

77673

+ if len(r) != 1 || r[0].Type() != TypeOf(emptyStruct{}) {

77674

+ t.Errorf("returning empty struct returned %s instead", r)

77675

+ }

77676

+ r = ValueOf(takesEmpty).Call([]Value{ValueOf(emptyStruct{})})

77677

+ if len(r) != 0 {

77678

+ t.Errorf("takesEmpty returned values: %s", r)

77679

+ }

77680

+ r = ValueOf(returnNonEmpty).Call([]Value{ValueOf(42)})

77681

+ if len(r) != 1 || r[0].Type() != TypeOf(nonEmptyStruct{}) || r[0].Field(0).Int() != 42 {

77682

+ t.Errorf("returnNonEmpty returned %s", r)

77683

+ }

77684

+ r = ValueOf(takesNonEmpty).Call([]Value{ValueOf(nonEmptyStruct{member: 42})})

77685

+ if len(r) != 1 || r[0].Type() != TypeOf(1) || r[0].Int() != 42 {

77686

+ t.Errorf("takesNonEmpty returned %s", r)

77687

+ }

77688

+}

77689

+

77690

func TestMakeFunc(t *testing.T) {

77691

switch runtime.GOARCH {

77692

case "amd64", "386":

77693

@@ -1587,9 +1627,13 @@

77694

}

77695

}

77696

77697

-/* Not yet implemented for gccgo

77698

+func TestMethodValue(t *testing.T) {

77699

+ switch runtime.GOARCH {

77700

+ case "amd64", "386":

77701

+ default:

77702

+ t.Skip("reflect method values not implemented for " + runtime.GOARCH)

77703

+ }

77704

77705

-func TestMethodValue(t *testing.T) {

77706

p := Point{3, 4}

77707

var i int64

77708

77709

@@ -1658,8 +1702,6 @@

77710

}

77711

}

77712

77713

-*/

77714

-

77715

// Reflect version of $GOROOT/test/method5.go

77716

77717

// Concrete types implementing M method.

77718

@@ -1744,7 +1786,12 @@

77719

func (t4 Tm4) M(x int, b byte) (byte, int) { return b, x + 40 }

77720

77721

func TestMethod5(t *testing.T) {

77722

- /* Not yet used for gccgo

77723

+ switch runtime.GOARCH {

77724

+ case "amd64", "386":

77725

+ default:

77726

+ t.Skip("reflect method values not implemented for " + runtime.GOARCH)

77727

+ }

77728

+

77729

CheckF := func(name string, f func(int, byte) (byte, int), inc int) {

77730

b, x := f(1000, 99)

77731

if b != 99 || x != 1000+inc {

77732

@@ -1751,7 +1798,6 @@

77733

t.Errorf("%s(1000, 99) = %v, %v, want 99, %v", name, b, x, 1000+inc)

77734

}

77735

}

77736

- */

77737

77738

CheckV := func(name string, i Value, inc int) {

77739

bx := i.Method(0).Call([]Value{ValueOf(1000), ValueOf(byte(99))})

77740

@@ -1761,9 +1807,7 @@

77741

t.Errorf("direct %s.M(1000, 99) = %v, %v, want 99, %v", name, b, x, 1000+inc)

77742

}

77743

77744

- /* Not yet implemented for gccgo

77745

CheckF(name+".M", i.Method(0).Interface().(func(int, byte) (byte, int)), inc)

77746

- */

77747

}

77748

77749

var TinterType = TypeOf(new(Tinter)).Elem()

77750

Index: libgo/go/reflect/makefunc.go

77751

===================================================================

77752

--- a/src/libgo/go/reflect/makefunc.go (.../tags/gcc_4_8_2_release)

77753

+++ b/src/libgo/go/reflect/makefunc.go (.../branches/gcc-4_8-branch)

77754

@@ -17,6 +17,11 @@

77755

code uintptr

77756

typ *funcType

77757

fn func([]Value) []Value

77758

+

77759

+ // For gccgo we use the same entry point for functions and for

77760

+ // method values.

77761

+ method int

77762

+ rcvr Value

77763

}

77764

77765

// MakeFunc returns a new function of the given Type

77766

@@ -61,7 +66,7 @@

77767

dummy := makeFuncStub

77768

code := **(**uintptr)(unsafe.Pointer(&dummy))

77769

77770

- impl := &makeFuncImpl{code: code, typ: ftyp, fn: fn}

77771

+ impl := &makeFuncImpl{code: code, typ: ftyp, fn: fn, method: -1}

77772

77773

return Value{t, unsafe.Pointer(&impl), flag(Func<<flagKindShift) | flagIndir}

77774

}

77775

@@ -85,15 +90,94 @@

77776

panic("reflect: internal error: invalid use of makePartialFunc")

77777

}

77778

77779

+ switch runtime.GOARCH {

77780

+ case "amd64", "386":

77781

+ default:

77782

+ panic("reflect.makeMethodValue not implemented for " + runtime.GOARCH)

77783

+ }

77784

+

77785

// Ignoring the flagMethod bit, v describes the receiver, not the method type.

77786

fl := v.flag & (flagRO | flagAddr | flagIndir)

77787

fl |= flag(v.typ.Kind()) << flagKindShift

77788

rcvr := Value{v.typ, v.val, fl}

77789

77790

+ // v.Type returns the actual type of the method value.

77791

+ ft := v.Type().(*rtype)

77792

+

77793

+ // Indirect Go func value (dummy) to obtain

77794

+ // actual code address. (A Go func value is a pointer

77795

+ // to a C function pointer. http://golang.org/s/go11func.)

77796

+ dummy := makeFuncStub

77797

+ code := **(**uintptr)(unsafe.Pointer(&dummy))

77798

+

77799

// Cause panic if method is not appropriate.

77800

// The panic would still happen during the call if we omit this,

77801

// but we want Interface() and other operations to fail early.

77802

- methodReceiver(op, rcvr, int(v.flag)>>flagMethodShift)

77803

+ t, _, _ := methodReceiver(op, rcvr, int(v.flag)>>flagMethodShift)

77804

77805

- panic("reflect makeMethodValue not implemented")

77806

+ fv := &makeFuncImpl{

77807

+ code: code,

77808

+ typ: (*funcType)(unsafe.Pointer(t)),

77809

+ method: int(v.flag) >> flagMethodShift,

77810

+ rcvr: rcvr,

77811

+ }

77812

+

77813

+ return Value{ft, unsafe.Pointer(&fv), v.flag&flagRO | flag(Func)<<flagKindShift | flagIndir}

77814

}

77815

+

77816

+// makeValueMethod takes a method function and returns a function that

77817

+// takes a value receiver and calls the real method with a pointer to

77818

+// it.

77819

+func makeValueMethod(v Value) Value {

77820

+ typ := v.typ

77821

+ if typ.Kind() != Func {

77822

+ panic("reflect: call of makeValueMethod with non-Func type")

77823

+ }

77824

+ if v.flag&flagMethodFn == 0 {

77825

+ panic("reflect: call of makeValueMethod with non-MethodFn")

77826

+ }

77827

+

77828

+ switch runtime.GOARCH {

77829

+ case "amd64", "386":

77830

+ default:

77831

+ panic("reflect.makeValueMethod not implemented for " + runtime.GOARCH)

77832

+ }

77833

+

77834

+ t := typ.common()

77835

+ ftyp := (*funcType)(unsafe.Pointer(t))

77836

+

77837

+ // Indirect Go func value (dummy) to obtain

77838

+ // actual code address. (A Go func value is a pointer

77839

+ // to a C function pointer. http://golang.org/s/go11func.)

77840

+ dummy := makeFuncStub

77841

+ code := **(**uintptr)(unsafe.Pointer(&dummy))

77842

+

77843

+ impl := &makeFuncImpl{

77844

+ code: code,

77845

+ typ: ftyp,

77846

+ method: -2,

77847

+ rcvr: v,

77848

+ }

77849

+

77850

+ return Value{t, unsafe.Pointer(&impl), flag(Func<<flagKindShift) | flagIndir}

77851

+}

77852

+

77853

+// Call the function represented by a makeFuncImpl.

77854

+func (c *makeFuncImpl) call(in []Value) []Value {

77855

+ if c.method == -1 {

77856

+ return c.fn(in)

77857

+ } else if c.method == -2 {

77858

+ if c.typ.IsVariadic() {

77859

+ return c.rcvr.CallSlice(in)

77860

+ } else {

77861

+ return c.rcvr.Call(in)

77862

+ }

77863

+ } else {

77864

+ m := c.rcvr.Method(c.method)

77865

+ if c.typ.IsVariadic() {

77866

+ return m.CallSlice(in)

77867

+ } else {

77868

+ return m.Call(in)

77869

+ }

77870

+ }

77871

+}

77872

Index: libgo/go/reflect/makefuncgo_amd64.go

77873

===================================================================

77874

--- a/src/libgo/go/reflect/makefuncgo_amd64.go (.../tags/gcc_4_8_2_release)

77875

+++ b/src/libgo/go/reflect/makefuncgo_amd64.go (.../branches/gcc-4_8-branch)

77876

@@ -319,7 +319,7 @@

77877

// All the real arguments have been found and turned into

77878

// Value's. Call the real function.

77879

77880

- out := c.fn(in)

77881

+ out := c.call(in)

77882

77883

if len(out) != len(ftyp.out) {

77884

panic("reflect: wrong return count from function created by MakeFunc")

77885

Index: libgo/go/net/fd_unix.go

77886

===================================================================

77887

--- a/src/libgo/go/net/fd_unix.go (.../tags/gcc_4_8_2_release)

77888

+++ b/src/libgo/go/net/fd_unix.go (.../branches/gcc-4_8-branch)

77889

@@ -9,6 +9,7 @@

77890

import (

77891

"io"

77892

"os"

77893

+ "runtime"

77894

"sync"

77895

"syscall"

77896

"time"

77897

@@ -90,6 +91,16 @@

77898

if err == nil || err == syscall.EISCONN {

77899

break

77900

}

77901

+

77902

+ // On Solaris we can see EINVAL if the socket has

77903

+ // already been accepted and closed by the server.

77904

+ // Treat this as a successful connection--writes to

77905

+ // the socket will see EOF. For details and a test

77906

+ // case in C see http://golang.org/issue/6828.

77907

+ if runtime.GOOS == "solaris" && err == syscall.EINVAL {

77908

+ break

77909

+ }

77910

+

77911

if err != syscall.EINPROGRESS && err != syscall.EALREADY && err != syscall.EINTR {

77912

return err

77913

}

77914

Index: libgo/go/go/build/build.go

77915

===================================================================

77916

--- a/src/libgo/go/go/build/build.go (.../tags/gcc_4_8_2_release)

77917

+++ b/src/libgo/go/go/build/build.go (.../branches/gcc-4_8-branch)

77918

@@ -429,7 +429,7 @@

77919

switch ctxt.Compiler {

77920

case "gccgo":

77921

dir, elem := pathpkg.Split(p.ImportPath)

77922

- pkga = "pkg/gccgo/" + dir + "lib" + elem + ".a"

77923

+ pkga = "pkg/gccgo_" + ctxt.GOOS + "_" + ctxt.GOARCH + "/" + dir + "lib" + elem + ".a"

77924

case "gc":

77925

suffix := ""

77926

if ctxt.InstallSuffix != "" {

77927

Index: libgo/go/go/build/syslist.go

77928

===================================================================

77929

--- a/src/libgo/go/go/build/syslist.go (.../tags/gcc_4_8_2_release)

77930

+++ b/src/libgo/go/go/build/syslist.go (.../branches/gcc-4_8-branch)

77931

@@ -0,0 +1,8 @@

77932

77933

+// Use of this source code is governed by a BSD-style

77934

+// license that can be found in the LICENSE file.

77935

+

77936

+package build

77937

+

77938

+const goosList = "darwin dragonfly freebsd linux netbsd openbsd plan9 windows solaris "

77939

+const goarchList = "386 amd64 arm alpha m68k mipso32 mipsn32 mipsn64 mipso64 ppc ppc64 sparc sparc64 "

77940

Index: libgo/go/syscall/libcall_linux.go

77941

===================================================================

77942

--- a/src/libgo/go/syscall/libcall_linux.go (.../tags/gcc_4_8_2_release)

77943

+++ b/src/libgo/go/syscall/libcall_linux.go (.../branches/gcc-4_8-branch)

77944

@@ -190,6 +190,9 @@

77945

//sys Adjtimex(buf *Timex) (state int, err error)

77946

//adjtimex(buf *Timex) _C_int

77947

77948

+//sysnb Dup3(oldfd int, newfd int, flags int) (err error)

77949

+//dup3(oldfd _C_int, newfd _C_int, flags _C_int) _C_int

77950

+

77951

//sys Faccessat(dirfd int, path string, mode uint32, flags int) (err error)

77952

//faccessat(dirfd _C_int, pathname *byte, mode _C_int, flags _C_int) _C_int

77953

77954

@@ -268,6 +271,9 @@

77955

return origlen - len(buf), count, names

77956

}

77957

77958

+//sys Getxattr(path string, attr string, dest []byte) (sz int, err error)

77959

+//getxattr(path *byte, attr *byte, buf *byte, count Size_t) Ssize_t

77960

+

77961

//sys InotifyAddWatch(fd int, pathname string, mask uint32) (watchdesc int, err error)

77962

//inotify_add_watch(fd _C_int, pathname *byte, mask uint32) _C_int

77963

77964

@@ -283,6 +289,9 @@

77965

//sys Klogctl(typ int, buf []byte) (n int, err error)

77966

//klogctl(typ _C_int, bufp *byte, len _C_int) _C_int

77967

77968

+//sys Listxattr(path string, dest []byte) (sz int, err error)

77969

+//listxattr(path *byte, list *byte, size Size_t) Ssize_t

77970

+

77971

//sys Mkdirat(dirfd int, path string, mode uint32) (err error)

77972

//mkdirat(dirfd _C_int, path *byte, mode Mode_t) _C_int

77973

77974

@@ -305,6 +314,9 @@

77975

//sys PivotRoot(newroot string, putold string) (err error)

77976

//pivot_root(newroot *byte, putold *byte) _C_int

77977

77978

+//sys Removexattr(path string, attr string) (err error)

77979

+//removexattr(path *byte, name *byte) _C_int

77980

+

77981

//sys Renameat(olddirfd int, oldpath string, newdirfd int, newpath string) (err error)

77982

//renameat(olddirfd _C_int, oldpath *byte, newdirfd _C_int, newpath *byte) _C_int

77983

77984

@@ -338,6 +350,9 @@

77985

//sysnb Setresuid(ruid int, eguid int, suid int) (err error)

77986

//setresuid(ruid Uid_t, euid Uid_t, suid Uid_t) _C_int

77987

77988

+//sys Setxattr(path string, attr string, data []byte, flags int) (err error)

77989

+//setxattr(path *byte, name *byte, value *byte, size Size_t, flags _C_int) _C_int

77990

+

77991

//sys splice(rfd int, roff *_loff_t, wfd int, woff *_loff_t, len int, flags int) (n int64, err error)

77992

//splice(rfd _C_int, roff *_loff_t, wfd _C_int, woff *_loff_t, len Size_t, flags _C_uint) Ssize_t

77993

func Splice(rfd int, roff *int64, wfd int, woff *int64, len int, flags int) (n int64, err error) {

77994

Index: libgo/go/syscall/socket.go

77995

===================================================================

77996

--- a/src/libgo/go/syscall/socket.go (.../tags/gcc_4_8_2_release)

77997

+++ b/src/libgo/go/syscall/socket.go (.../branches/gcc-4_8-branch)

77998

@@ -25,7 +25,7 @@

77999

Pad [96]int8

78000

}

78001

78002

-const SizeofSockaddrAny = 0x1c

78003

+const SizeofSockaddrAny = 0x6c

78004

78005

type SockaddrInet4 struct {

78006

Port int

78007

Index: libgo/go/syscall/libcall_posix.go

78008

===================================================================

78009

--- a/src/libgo/go/syscall/libcall_posix.go (.../tags/gcc_4_8_2_release)

78010

+++ b/src/libgo/go/syscall/libcall_posix.go (.../branches/gcc-4_8-branch)

78011

@@ -238,6 +238,9 @@

78012

//sysnb Getppid() (ppid int)

78013

//getppid() Pid_t

78014

78015

+//sys Getpriority(which int, who int) (prio int, err error)

78016

+//getpriority(which _C_int, who _C_int) _C_int

78017

+

78018

//sysnb Getrlimit(resource int, rlim *Rlimit) (err error)

78019

//getrlimit(resource _C_int, rlim *Rlimit) _C_int

78020

78021

@@ -307,6 +310,9 @@

78022

//sysnb Setpgid(pid int, pgid int) (err error)

78023

//setpgid(pid Pid_t, pgid Pid_t) _C_int

78024

78025

+//sys Setpriority(which int, who int, prio int) (err error)

78026

+//setpriority(which _C_int, who _C_int, prio _C_int) _C_int

78027

+

78028

//sysnb Setreuid(ruid int, euid int) (err error)

78029

//setreuid(ruid Uid_t, euid Uid_t) _C_int

78030

78031

Index: libgo/Makefile.am

78032

===================================================================

78033

--- a/src/libgo/Makefile.am (.../tags/gcc_4_8_2_release)

78034

+++ b/src/libgo/Makefile.am (.../branches/gcc-4_8-branch)

78035

@@ -424,6 +424,7 @@

78036

runtime/go-caller.c \

78037

runtime/go-callers.c \

78038

runtime/go-can-convert-interface.c \

78039

+ runtime/go-cdiv.c \

78040

runtime/go-cgo.c \

78041

runtime/go-check-interface.c \

78042

runtime/go-construct-map.c \

78043

@@ -1254,7 +1255,7 @@

78044

go/go/build/build.go \

78045

go/go/build/doc.go \

78046

go/go/build/read.go \

78047

- syslist.go

78048

+ go/go/build/syslist.go

78049

go_go_doc_files = \

78050

go/go/doc/comment.go \

78051

go/go/doc/doc.go \

78052

@@ -2712,15 +2713,6 @@

78053

@$(CHECK)

78054

.PHONY: go/build/check

78055

78056

-syslist.go: s-syslist; @true

78057

-s-syslist: Makefile

78058

- echo '// Generated automatically by make.' >syslist.go.tmp

78059

- echo 'package build' >>syslist.go.tmp

78060

- echo 'const goosList = "$(GOOS)"' >>syslist.go.tmp

78061

- echo 'const goarchList = "$(GOARCH)"' >>syslist.go.tmp

78062

- $(SHELL) $(srcdir)/../move-if-change syslist.go.tmp syslist.go

78063

- $(STAMP) $@

78064

-

78065

@go_include@ go/doc.lo.dep

78066

go/doc.lo.dep: $(go_go_doc_files)

78067

$(BUILDDEPS)

78068

Index: config.sub

78069

===================================================================

78070

--- a/src/config.sub (.../tags/gcc_4_8_2_release)

78071

+++ b/src/config.sub (.../branches/gcc-4_8-branch)

78072

@@ -1,10 +1,8 @@

78073

#! /bin/sh

78074

# Configuration validation subroutine script.

78075

78076

-# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,

78077

-# 2011, 2012, 2013 Free Software Foundation, Inc.

78078

78079

78080

-timestamp='2013-01-11'

78081

+timestamp='2013-10-01'

78082

78083

# This file is free software; you can redistribute it and/or modify it

78084

# under the terms of the GNU General Public License as published by

78085

@@ -70,9 +68,7 @@

78086

version="\

78087

GNU config.sub ($timestamp)

78088

78089

78090

-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,

78091

-2012, 2013 Free Software Foundation, Inc.

78092

78093

78094

This is free software; see the source for copying conditions. There is NO

78095

warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."

78096

@@ -256,12 +252,12 @@

78097

78098

78099

| am33_2.0 \

78100

- | arc \

78101

+ | arc | arceb \

78102

78103

| avr | avr32 \

78104

| be32 | be64 \

78105

| bfin \

78106

- | c4x | clipper \

78107

+ | c4x | c8051 | clipper \

78108

| d10v | d30v | dlx | dsp16xx \

78109

| epiphany \

78110

| fido | fr30 | frv \

78111

@@ -269,6 +265,7 @@

78112

| hexagon \

78113

| i370 | i860 | i960 | ia64 \

78114

| ip2k | iq2000 \

78115

+ | k1om \

78116

| le32 | le64 \

78117

| lm32 \

78118

| m32c | m32r | m32rle | m68000 | m68k | m88k \

78119

@@ -297,10 +294,10 @@

78120

| mt \

78121

| msp430 \

78122

| nds32 | nds32le | nds32be \

78123

- | nios | nios2 \

78124

+ | nios | nios2 | nios2eb | nios2el \

78125

| ns16k | ns32k \

78126

| open8 \

78127

- | or32 \

78128

+ | or1k | or32 \

78129

| pdp10 | pdp11 | pj | pjl \

78130

| powerpc | powerpc64 | powerpc64le | powerpcle \

78131

| pyramid \

78132

@@ -328,7 +325,7 @@

78133

c6x)

78134

basic_machine=tic6x-unknown

78135

;;

78136

- m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | picochip)

78137

+ m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | nvptx | picochip)

78138

basic_machine=$basic_machine-unknown

78139

os=-none

78140

;;

78141

@@ -370,13 +367,13 @@

78142

| aarch64-* | aarch64_be-* \

78143

| alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \

78144

| alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \

78145

- | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \

78146

+ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* | arceb-* \

78147

78148

| avr-* | avr32-* \

78149

| be32-* | be64-* \

78150

| bfin-* | bs2000-* \

78151

| c[123]* | c30-* | [cjt]90-* | c4x-* \

78152

- | clipper-* | craynv-* | cydra-* \

78153

+ | c8051-* | clipper-* | craynv-* | cydra-* \

78154

| d10v-* | d30v-* | dlx-* \

78155

| elxsi-* \

78156

| f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \

78157

@@ -385,6 +382,7 @@

78158

| hexagon-* \

78159

| i*86-* | i860-* | i960-* | ia64-* \

78160

| ip2k-* | iq2000-* \

78161

+ | k1om-* \

78162

| le32-* | le64-* \

78163

| lm32-* \

78164

| m32c-* | m32r-* | m32rle-* \

78165

@@ -414,7 +412,7 @@

78166

| mt-* \

78167

| msp430-* \

78168

| nds32-* | nds32le-* | nds32be-* \

78169

- | nios-* | nios2-* \

78170

+ | nios-* | nios2-* | nios2eb-* | nios2el-* \

78171

| none-* | np1-* | ns16k-* | ns32k-* \

78172

| open8-* \

78173

| orion-* \

78174

@@ -798,7 +796,7 @@

78175

os=-mingw64

78176

;;

78177

mingw32)

78178

- basic_machine=i386-pc

78179

+ basic_machine=i686-pc

78180

os=-mingw32

78181

;;

78182

mingw32ce)

78183

@@ -834,7 +832,7 @@

78184

basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'`

78185

;;

78186

msys)

78187

- basic_machine=i386-pc

78188

+ basic_machine=i686-pc

78189

os=-msys

78190

;;

78191

mvs)

78192

@@ -1550,6 +1548,9 @@

78193

c4x-* | tic4x-*)

78194

os=-coff

78195

;;

78196

+ c8051-*)

78197

+ os=-elf

78198

+ ;;

78199

hexagon-*)

78200

os=-elf

78201

;;

78202

@@ -1593,6 +1594,9 @@

78203

mips*-*)

78204

os=-elf

78205

;;

78206

+ or1k-*)

78207

+ os=-elf

78208

+ ;;

78209

or32-*)

78210

os=-coff

78211

;;

78212

Index: libobjc/configure

78213

===================================================================

78214

--- a/src/libobjc/configure (.../tags/gcc_4_8_2_release)

78215

+++ b/src/libobjc/configure (.../branches/gcc-4_8-branch)

78216

@@ -6056,7 +6056,7 @@

78217

rm -rf conftest*

78218

;;

78219

78220

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

78221

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

78222

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

78223

# Find out which ABI we are using.

78224

echo 'int i;' > conftest.$ac_ext

78225

@@ -6081,7 +6081,10 @@

78226

;;

78227

esac

78228

;;

78229

- ppc64-*linux*|powerpc64-*linux*)

78230

+ powerpc64le-*linux*)

78231

+ LD="${LD-ld} -m elf32lppclinux"

78232

+ ;;

78233

+ powerpc64-*linux*)

78234

LD="${LD-ld} -m elf32ppclinux"

78235

;;

78236

s390x-*linux*)

78237

@@ -6100,7 +6103,10 @@

78238

x86_64-*linux*)

78239

LD="${LD-ld} -m elf_x86_64"

78240

;;

78241

- ppc*-*linux*|powerpc*-*linux*)

78242

+ powerpcle-*linux*)

78243

+ LD="${LD-ld} -m elf64lppc"

78244

+ ;;

78245

+ powerpc-*linux*)

78246

LD="${LD-ld} -m elf64ppc"

78247

;;

78248

s390*-*linux*|s390*-*tpf*)

78249

@@ -10595,7 +10601,7 @@

78250

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

78251

lt_status=$lt_dlunknown

78252

cat > conftest.$ac_ext <<_LT_EOF

78253

-#line 10598 "configure"

78254

+#line 10604 "configure"

78255

#include "confdefs.h"

78256

78257

#if HAVE_DLFCN_H

78258

@@ -10701,7 +10707,7 @@

78259

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

78260

lt_status=$lt_dlunknown

78261

cat > conftest.$ac_ext <<_LT_EOF

78262

-#line 10704 "configure"

78263

+#line 10710 "configure"

78264

#include "confdefs.h"

78265

78266

#if HAVE_DLFCN_H

78267

@@ -11472,7 +11478,7 @@

78268

enableval=$enable_sjlj_exceptions; :

78269

else

78270

cat > conftest.$ac_ext << EOF

78271

-#line 11475 "configure"

78272

+#line 11481 "configure"

78273

@interface Frob

78274

@end

78275

@implementation Frob

78276

Index: libobjc/ChangeLog

78277

===================================================================

78278

--- a/src/libobjc/ChangeLog (.../tags/gcc_4_8_2_release)

78279

+++ b/src/libobjc/ChangeLog (.../branches/gcc-4_8-branch)

78280

@@ -1,3 +1,10 @@

78281

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

78282

+

78283

+ Backport from mainline

78284

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

78285

+

78286

+ * configure: Regenerate.

78287

+

78288

2013-10-16 Release Manager

78289

78290

* GCC 4.8.2 released.

78291

Index: libgfortran/configure

78292

===================================================================

78293

--- a/src/libgfortran/configure (.../tags/gcc_4_8_2_release)

78294

+++ b/src/libgfortran/configure (.../branches/gcc-4_8-branch)

78295

@@ -8062,7 +8062,7 @@

78296

rm -rf conftest*

78297

;;

78298

78299

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

78300

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

78301

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

78302

# Find out which ABI we are using.

78303

echo 'int i;' > conftest.$ac_ext

78304

@@ -8087,7 +8087,10 @@

78305

;;

78306

esac

78307

;;

78308

- ppc64-*linux*|powerpc64-*linux*)

78309

+ powerpc64le-*linux*)

78310

+ LD="${LD-ld} -m elf32lppclinux"

78311

+ ;;

78312

+ powerpc64-*linux*)

78313

LD="${LD-ld} -m elf32ppclinux"

78314

;;

78315

s390x-*linux*)

78316

@@ -8106,7 +8109,10 @@

78317

x86_64-*linux*)

78318

LD="${LD-ld} -m elf_x86_64"

78319

;;

78320

- ppc*-*linux*|powerpc*-*linux*)

78321

+ powerpcle-*linux*)

78322

+ LD="${LD-ld} -m elf64lppc"

78323

+ ;;

78324

+ powerpc-*linux*)

78325

LD="${LD-ld} -m elf64ppc"

78326

;;

78327

s390*-*linux*|s390*-*tpf*)

78328

@@ -12333,7 +12339,7 @@

78329

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

78330

lt_status=$lt_dlunknown

78331

cat > conftest.$ac_ext <<_LT_EOF

78332

-#line 12336 "configure"

78333

+#line 12342 "configure"

78334

#include "confdefs.h"

78335

78336

#if HAVE_DLFCN_H

78337

@@ -12439,7 +12445,7 @@

78338

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

78339

lt_status=$lt_dlunknown

78340

cat > conftest.$ac_ext <<_LT_EOF

78341

-#line 12442 "configure"

78342

+#line 12448 "configure"

78343

#include "confdefs.h"

78344

78345

#if HAVE_DLFCN_H

78346

Index: libgfortran/ChangeLog

78347

===================================================================

78348

--- a/src/libgfortran/ChangeLog (.../tags/gcc_4_8_2_release)

78349

+++ b/src/libgfortran/ChangeLog (.../branches/gcc-4_8-branch)

78350

@@ -1,3 +1,69 @@

78351

+2014-04-12 Jerry DeLisle <jvdelisle@gcc.gnu>

78352

+

78353

+ Backport from mainline

78354

+ PR libfortran/60810

78355

+ io/unit.c (is_trim_ok): If internal unit is array, do not trim.

78356

+

78357

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

78358

+

78359

+ Backport from mainline

78360

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

78361

+

78362

+ * configure: Regenerate.

78363

+

78364

+2014-03-15 Dominique d'Humieres <dominiq@lps.ens.fr>

78365

+

78366

+ Backport from mainline

78367

+ PR libgfortran/60128

78368

+ * io/write_float.def (output_float): Remove unused variable

78369

+ nzero_real. Replace a double space with a single one.

78370

+ (determine_en_precision): Fix wrong handling of the EN format.

78371

+

78372

+2014-03-15 Jerry DeLisle <jvdelisle@gcc.gnu>

78373

+

78374

+ Backport from mainline

78375

+ PR libfortran/58324

78376

+ PR libfortran/38199

78377

+ * io/list_read.c (finish_list_read): Read one character to check

78378

+ for the end of the file. If it is the end, then issue the file

78379

+ end error message. If not, use eat_line to reach the end

78380

+ without giving error. The next attempt to read will then

78381

+ issue the error as described above.

78382

+ * io/read.c (read_decimal): Quickly skip spaces to avoid calls

78383

+ to next_char.

78384

+ * io/unit.c (is_trim_ok): New helper function to check various

78385

+ conditions to see if its OK to trim the internal unit string.

78386

+ (get_internal_unit): Use LEN_TRIM to shorten selected internal

78387

+ unit strings for optimizing READ. Enable this optimization for

78388

+ formatted READ.

78389

+

78390

+2014-02-21 Jerry DeLisle <jvdelisle@gcc.gnu>

78391

+ Dominique d'Humieres <dominiq@lps.ens.fr>

78392

+ Steven G. Kargl <kargl@gcc.gnu.org>

78393

+

78394

+ Backport from mainline

78395

+ PR libfortran/59700

78396

+ PR libfortran/59764

78397

+ * io/io.h (struct st_parameter_dt): Assign expanded_read flag to

78398

+ unused bit. Define new variable line_buffer_pos.

78399

+ * io/list_read.c (free_saved, next_char, l_push_char,

78400

+ read_logical, read_real): Replace use of item_count with

78401

+ line_buffer_pos for line_buffer look ahead.

78402

+ (read_logical, read_integer, parse_real, read_real, check_type):

78403

+ Adjust location of free_line to after generating error messages

78404

+ to retain the correct item count for the message.

78405

+

78406

+2014-02-15 Jerry DeLisle <jvdelisle@gcc.gnu>

78407

+ Dominique d'Humieres <dominiq@lps.ens.fr>

78408

+

78409

+ Backport from mainline

78410

+ PR libfortran/59771

78411

+ PR libfortran/59774

78412

+ PR libfortran/59836

78413

+ * io/write_float.def (output_float): Fix wrong handling of the

78414

+ Fw.0 format.

78415

+ (output_float_FMT_G_): Fixes rounding issues with -m32.

78416

+

78417

2013-10-16 Release Manager

78418

78419

* GCC 4.8.2 released.

78420

Index: libgfortran/io/list_read.c

78421

===================================================================

78422

--- a/src/libgfortran/io/list_read.c (.../tags/gcc_4_8_2_release)

78423

+++ b/src/libgfortran/io/list_read.c (.../branches/gcc-4_8-branch)

78424

@@ -118,7 +118,7 @@

78425

static void

78426

free_line (st_parameter_dt *dtp)

78427

{

78428

- dtp->u.p.item_count = 0;

78429

+ dtp->u.p.line_buffer_pos = 0;

78430

dtp->u.p.line_buffer_enabled = 0;

78431

78432

if (dtp->u.p.line_buffer == NULL)

78433

@@ -150,15 +150,15 @@

78434

{

78435

dtp->u.p.at_eol = 0;

78436

78437

- c = dtp->u.p.line_buffer[dtp->u.p.item_count];

78438

- if (c != '\0' && dtp->u.p.item_count < 64)

78439

+ c = dtp->u.p.line_buffer[dtp->u.p.line_buffer_pos];

78440

+ if (c != '\0' && dtp->u.p.line_buffer_pos < 64)

78441

{

78442

- dtp->u.p.line_buffer[dtp->u.p.item_count] = '\0';

78443

- dtp->u.p.item_count++;

78444

+ dtp->u.p.line_buffer[dtp->u.p.line_buffer_pos] = '\0';

78445

+ dtp->u.p.line_buffer_pos++;

78446

goto done;

78447

}

78448

78449

- dtp->u.p.item_count = 0;

78450

+ dtp->u.p.line_buffer_pos = 0;

78451

dtp->u.p.line_buffer_enabled = 0;

78452

}

78453

78454

@@ -640,7 +640,7 @@

78455

if (dtp->u.p.line_buffer == NULL)

78456

dtp->u.p.line_buffer = xcalloc (SCRATCH_SIZE, 1);

78457

78458

- dtp->u.p.line_buffer[dtp->u.p.item_count++] = c;

78459

+ dtp->u.p.line_buffer[dtp->u.p.line_buffer_pos++] = c;

78460

}

78461

78462

78463

@@ -750,7 +750,7 @@

78464

{

78465

dtp->u.p.nml_read_error = 1;

78466

dtp->u.p.line_buffer_enabled = 1;

78467

- dtp->u.p.item_count = 0;

78468

+ dtp->u.p.line_buffer_pos = 0;

78469

return;

78470

}

78471

78472

@@ -758,14 +758,17 @@

78473

78474

bad_logical:

78475

78476

- free_line (dtp);

78477

-

78478

if (nml_bad_return (dtp, c))

78479

- return;

78480

+ {

78481

+ free_line (dtp);

78482

+ return;

78483

+ }

78484

78485

+

78486

free_saved (dtp);

78487

if (c == EOF)

78488

{

78489

+ free_line (dtp);

78490

hit_eof (dtp);

78491

return;

78492

}

78493

@@ -773,6 +776,7 @@

78494

eat_line (dtp);

78495

snprintf (message, MSGLEN, "Bad logical value while reading item %d",

78496

dtp->u.p.item_count);

78497

+ free_line (dtp);

78498

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

78499

return;

78500

78501

@@ -913,9 +917,9 @@

78502

else if (c != '\n')

78503

eat_line (dtp);

78504

78505

- free_line (dtp);

78506

snprintf (message, MSGLEN, "Bad integer for item %d in list input",

78507

dtp->u.p.item_count);

78508

+ free_line (dtp);

78509

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

78510

78511

return;

78512

@@ -1298,9 +1302,9 @@

78513

else if (c != '\n')

78514

eat_line (dtp);

78515

78516

- free_line (dtp);

78517

snprintf (message, MSGLEN, "Bad floating point number for item %d",

78518

dtp->u.p.item_count);

78519

+ free_line (dtp);

78520

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

78521

78522

return 1;

78523

@@ -1406,9 +1410,9 @@

78524

else if (c != '\n')

78525

eat_line (dtp);

78526

78527

- free_line (dtp);

78528

snprintf (message, MSGLEN, "Bad complex value in item %d of list input",

78529

dtp->u.p.item_count);

78530

+ free_line (dtp);

78531

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

78532

}

78533

78534

@@ -1770,7 +1774,7 @@

78535

{

78536

dtp->u.p.nml_read_error = 1;

78537

dtp->u.p.line_buffer_enabled = 1;

78538

- dtp->u.p.item_count = 0;

78539

+ dtp->u.p.line_buffer_pos = 0;

78540

return;

78541

}

78542

78543

@@ -1789,9 +1793,9 @@

78544

else if (c != '\n')

78545

eat_line (dtp);

78546

78547

- free_line (dtp);

78548

snprintf (message, MSGLEN, "Bad real number in item %d of list input",

78549

dtp->u.p.item_count);

78550

+ free_line (dtp);

78551

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

78552

}

78553

78554

@@ -1806,11 +1810,10 @@

78555

78556

if (dtp->u.p.saved_type != BT_UNKNOWN && dtp->u.p.saved_type != type)

78557

{

78558

- free_line (dtp);

78559

snprintf (message, MSGLEN, "Read type %s where %s was expected for item %d",

78560

type_name (dtp->u.p.saved_type), type_name (type),

78561

dtp->u.p.item_count);

78562

-

78563

+ free_line (dtp);

78564

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

78565

return 1;

78566

}

78567

@@ -1820,12 +1823,12 @@

78568

78569

if (dtp->u.p.saved_length != len)

78570

{

78571

- free_line (dtp);

78572

snprintf (message, MSGLEN,

78573

"Read kind %d %s where kind %d is required for item %d",

78574

dtp->u.p.saved_length, type_name (dtp->u.p.saved_type), len,

78575

dtp->u.p.item_count);

78576

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

78577

+ free_line (dtp);

78578

return 1;

78579

}

78580

78581

@@ -2031,8 +2034,6 @@

78582

void

78583

finish_list_read (st_parameter_dt *dtp)

78584

{

78585

- int err;

78586

-

78587

free_saved (dtp);

78588

78589

fbuf_flush (dtp->u.p.current_unit, dtp->u.p.mode);

78590

@@ -2043,12 +2044,22 @@

78591

return;

78592

}

78593

78594

- err = eat_line (dtp);

78595

- if (err == LIBERROR_END)

78596

+ if (!is_internal_unit (dtp))

78597

{

78598

- free_line (dtp);

78599

- hit_eof (dtp);

78600

+ int c;

78601

+ c = next_char (dtp);

78602

+ if (c == EOF)

78603

+ {

78604

+ free_line (dtp);

78605

+ hit_eof (dtp);

78606

+ return;

78607

+ }

78608

+ if (c != '\n')

78609

+ eat_line (dtp);

78610

}

78611

+

78612

+ free_line (dtp);

78613

+

78614

}

78615

78616

/* NAMELIST INPUT

78617

Index: libgfortran/io/read.c

78618

===================================================================

78619

--- a/src/libgfortran/io/read.c (.../tags/gcc_4_8_2_release)

78620

+++ b/src/libgfortran/io/read.c (.../branches/gcc-4_8-branch)

78621

@@ -655,7 +655,13 @@

78622

78623

if (c == ' ')

78624

{

78625

- if (dtp->u.p.blank_status == BLANK_NULL) continue;

78626

+ if (dtp->u.p.blank_status == BLANK_NULL)

78627

+ {

78628

+ /* Skip spaces. */

78629

+ for ( ; w > 0; p++, w--)

78630

+ if (*p != ' ') break;

78631

+ continue;

78632

+ }

78633

if (dtp->u.p.blank_status == BLANK_ZERO) c = '0';

78634

}

78635

78636

Index: libgfortran/io/io.h

78637

===================================================================

78638

--- a/src/libgfortran/io/io.h (.../tags/gcc_4_8_2_release)

78639

+++ b/src/libgfortran/io/io.h (.../branches/gcc-4_8-branch)

78640

@@ -424,7 +424,10 @@

78641

unsigned g0_no_blanks : 1;

78642

/* Used to signal use of free_format_data. */

78643

unsigned format_not_saved : 1;

78644

- /* 14 unused bits. */

78645

+ /* A flag used to identify when a non-standard expanded namelist read

78646

+ has occurred. */

78647

+ unsigned expanded_read : 1;

78648

+ /* 13 unused bits. */

78649

78650

/* Used for ungetc() style functionality. Possible values

78651

are an unsigned char, EOF, or EOF - 1 used to mark the

78652

@@ -441,9 +444,8 @@

78653

char *line_buffer;

78654

struct format_data *fmt;

78655

namelist_info *ionml;

78656

- /* A flag used to identify when a non-standard expanded namelist read

78657

- has occurred. */

78658

- int expanded_read;

78659

+ /* Current position within the look-ahead line buffer. */

78660

+ int line_buffer_pos;

78661

/* Storage area for values except for strings. Must be

78662

large enough to hold a complex value (two reals) of the

78663

largest kind. */

78664

Index: libgfortran/io/unit.c

78665

===================================================================

78666

--- a/src/libgfortran/io/unit.c (.../tags/gcc_4_8_2_release)

78667

+++ b/src/libgfortran/io/unit.c (.../branches/gcc-4_8-branch)

78668

@@ -29,6 +29,7 @@

78669

#include "unix.h"

78670

#include <stdlib.h>

78671

#include <string.h>

78672

+#include <stdbool.h>

78673

78674

78675

/* IO locking rules:

78676

@@ -375,6 +376,36 @@

78677

}

78678

78679

78680

+/* Helper function to check rank, stride, format string, and namelist.

78681

+ This is used for optimization. You can't trim out blanks or shorten

78682

+ the string if trailing spaces are significant. */

78683

+static bool

78684

+is_trim_ok (st_parameter_dt *dtp)

78685

+{

78686

+ /* Check rank and stride. */

78687

+ if (dtp->internal_unit_desc)

78688

+ return false;

78689

+ /* Format strings can not have 'BZ' or '/'. */

78690

+ if (dtp->common.flags & IOPARM_DT_HAS_FORMAT)

78691

+ {

78692

+ char *p = dtp->format;

78693

+ off_t i;

78694

+ if (dtp->common.flags & IOPARM_DT_HAS_BLANK)

78695

+ return false;

78696

+ for (i = 0; i < dtp->format_len; i++)

78697

+ {

78698

+ if (p[i] == '/') return false;

78699

+ if (p[i] == 'b' || p[i] == 'B')

78700

+ if (p[i+1] == 'z' || p[i+1] == 'Z')

78701

+ return false;

78702

+ }

78703

+ }

78704

+ if (dtp->u.p.ionml) /* A namelist. */

78705

+ return false;

78706

+ return true;

78707

+}

78708

+

78709

+

78710

gfc_unit *

78711

get_internal_unit (st_parameter_dt *dtp)

78712

{

78713

@@ -402,6 +433,22 @@

78714

some other file I/O unit. */

78715

iunit->unit_number = -1;

78716

78717

+ /* As an optimization, adjust the unit record length to not

78718

+ include trailing blanks. This will not work under certain conditions

78719

+ where trailing blanks have significance. */

78720

+ if (dtp->u.p.mode == READING && is_trim_ok (dtp))

78721

+ {

78722

+ int len;

78723

+ if (dtp->common.unit == 0)

78724

+ len = string_len_trim (dtp->internal_unit_len,

78725

+ dtp->internal_unit);

78726

+ else

78727

+ len = string_len_trim_char4 (dtp->internal_unit_len,

78728

+ (const gfc_char4_t*) dtp->internal_unit);

78729

+ dtp->internal_unit_len = len;

78730

+ iunit->recl = dtp->internal_unit_len;

78731

+ }

78732

+

78733

/* Set up the looping specification from the array descriptor, if any. */

78734

78735

if (is_array_io (dtp))

78736

@@ -414,27 +461,6 @@

78737

78738

start_record *= iunit->recl;

78739

}

78740

- else

78741

- {

78742

- /* If we are not processing an array, adjust the unit record length not

78743

- to include trailing blanks for list-formatted reads. */

78744

- if (dtp->u.p.mode == READING && !(dtp->common.flags & IOPARM_DT_HAS_FORMAT))

78745

- {

78746

- if (dtp->common.unit == 0)

78747

- {

78748

- dtp->internal_unit_len =

78749

- string_len_trim (dtp->internal_unit_len, dtp->internal_unit);

78750

- iunit->recl = dtp->internal_unit_len;

78751

- }

78752

- else

78753

- {

78754

- dtp->internal_unit_len =

78755

- string_len_trim_char4 (dtp->internal_unit_len,

78756

- (const gfc_char4_t*) dtp->internal_unit);

78757

- iunit->recl = dtp->internal_unit_len;

78758

- }

78759

- }

78760

- }

78761

78762

/* Set initial values for unit parameters. */

78763

if (dtp->common.unit)

78764

Index: libgfortran/io/write_float.def

78765

===================================================================

78766

--- a/src/libgfortran/io/write_float.def (.../tags/gcc_4_8_2_release)

78767

+++ b/src/libgfortran/io/write_float.def (.../branches/gcc-4_8-branch)

78768

@@ -125,8 +125,6 @@

78769

int nzero;

78770

/* Number of digits after the decimal point. */

78771

int nafter;

78772

- /* Number of zeros after the decimal point, whatever the precision. */

78773

- int nzero_real;

78774

int leadzero;

78775

int nblanks;

78776

int ndigits, edigits;

78777

@@ -138,7 +136,6 @@

78778

p = dtp->u.p.scale_factor;

78779

78780

rchar = '5';

78781

- nzero_real = -1;

78782

78783

/* We should always know the field width and precision. */

78784

if (d < 0)

78785

@@ -191,7 +188,7 @@

78786

if (nafter < 0)

78787

nafter = 0;

78788

nafter = d;

78789

- nzero = nzero_real = 0;

78790

+ nzero = 0;

78791

}

78792

else /* p < 0 */

78793

{

78794

@@ -211,7 +208,6 @@

78795

nafter = d + nbefore;

78796

nbefore = 0;

78797

}

78798

- nzero_real = nzero;

78799

if (nzero > d)

78800

nzero = d;

78801

}

78802

@@ -218,7 +214,7 @@

78803

}

78804

else

78805

{

78806

- nzero = nzero_real = 0;

78807

+ nzero = 0;

78808

nafter = d;

78809

}

78810

78811

@@ -373,7 +369,7 @@

78812

updown:

78813

78814

rchar = '0';

78815

- if (w > 0 && d == 0 && p == 0)

78816

+ if (ft != FMT_F && w > 0 && d == 0 && p == 0)

78817

nbefore = 1;

78818

/* Scan for trailing zeros to see if we really need to round it. */

78819

for(i = nbefore + nafter; i < ndigits; i++)

78820

@@ -386,13 +382,14 @@

78821

do_rnd:

78822

78823

if (nbefore + nafter == 0)

78824

+ /* Handle the case Fw.0 and value < 1.0 */

78825

{

78826

ndigits = 0;

78827

- if (nzero_real == d && digits[0] >= rchar)

78828

+ if (digits[0] >= rchar)

78829

{

78830

/* We rounded to zero but shouldn't have */

78831

- nzero--;

78832

- nafter = 1;

78833

+ nbefore = 1;

78834

+ digits--;

78835

digits[0] = '1';

78836

ndigits = 1;

78837

}

78838

@@ -990,7 +987,7 @@

78839

int d = f->u.real.d;\

78840

int w = f->u.real.w;\

78841

fnode newf;\

78842

- GFC_REAL_ ## x rexp_d, r = 0.5;\

78843

+ GFC_REAL_ ## x exp_d, r = 0.5, r_sc;\

78844

int low, high, mid;\

78845

int ubound, lbound;\

78846

char *p, pad = ' ';\

78847

@@ -997,6 +994,7 @@

78848

int save_scale_factor, nb = 0;\

78849

try result;\

78850

int nprinted, precision;\

78851

+ volatile GFC_REAL_ ## x temp;\

78852

\

78853

save_scale_factor = dtp->u.p.scale_factor;\

78854

\

78855

@@ -1015,10 +1013,13 @@

78856

break;\

78857

}\

78858

\

78859

- rexp_d = calculate_exp_ ## x (-d);\

78860

- if ((m > 0.0 && ((m < 0.1 - 0.1 * r * rexp_d) || (rexp_d * (m + r) >= 1.0)))\

78861

+ exp_d = calculate_exp_ ## x (d);\

78862

+ r_sc = (1 - r / exp_d);\

78863

+ temp = 0.1 * r_sc;\

78864

+ if ((m > 0.0 && ((m < temp) || (r >= (exp_d - m))))\

78865

|| ((m == 0.0) && !(compile_options.allow_std\

78866

- & (GFC_STD_F2003 | GFC_STD_F2008))))\

78867

+ & (GFC_STD_F2003 | GFC_STD_F2008)))\

78868

+ || d == 0)\

78869

{ \

78870

newf.format = FMT_E;\

78871

newf.u.real.w = w;\

78872

@@ -1038,10 +1039,9 @@

78873

\

78874

while (low <= high)\

78875

{ \

78876

- volatile GFC_REAL_ ## x temp;\

78877

mid = (low + high) / 2;\

78878

\

78879

- temp = (calculate_exp_ ## x (mid - 1) * (1 - r * rexp_d));\

78880

+ temp = (calculate_exp_ ## x (mid - 1) * r_sc);\

78881

\

78882

if (m < temp)\

78883

{ \

78884

@@ -1121,14 +1121,36 @@

78885

/* EN format is tricky since the number of significant digits depends

78886

on the magnitude. Solve it by first printing a temporary value and

78887

figure out the number of significant digits from the printed

78888

- exponent. */

78889

+ exponent. Values y, 0.95*10.0**e <= y <10.0**e, are rounded to

78890

+ 10.0**e even when the final result will not be rounded to 10.0**e.

78891

+ For these values the exponent returned by atoi has to be decremented

78892

+ by one. The values y in the ranges

78893

+ (1000.0-0.5*10.0**(-d))*10.0**(3*n) <= y < 10.0*(3*(n+1))

78894

+ (100.0-0.5*10.0**(-d))*10.0**(3*n) <= y < 10.0*(3*n+2)

78895

+ (10.0-0.5*10.0**(-d))*10.0**(3*n) <= y < 10.0*(3*n+1)

78896

+ are correctly rounded respectively to 1.0...0*10.0*(3*(n+1)),

78897

+ 100.0...0*10.0*(3*n), and 10.0...0*10.0*(3*n), where 0...0

78898

+ represents d zeroes, by the lines 279 to 297. */

78899

78900

#define EN_PREC(x,y)\

78901

{\

78902

- GFC_REAL_ ## x tmp; \

78903

- tmp = * (GFC_REAL_ ## x *)source; \

78904

+ volatile GFC_REAL_ ## x tmp, one = 1.0;\

78905

+ tmp = * (GFC_REAL_ ## x *)source;\

78906

if (isfinite (tmp)) \

78907

- nprinted = DTOA(y,0,tmp); \

78908

+ {\

78909

+ nprinted = DTOA(y,0,tmp);\

78910

+ int e = atoi (&buffer[4]);\

78911

+ if (buffer[1] == '1')\

78912

+ {\

78913

+ tmp = (calculate_exp_ ## x (-e)) * tmp;\

78914

+ tmp = one - (tmp < 0 ? -tmp : tmp); \

78915

+ if (tmp > 0)\

78916

+ e = e - 1;\

78917

+ }\

78918

+ nbefore = e%3;\

78919

+ if (nbefore < 0)\

78920

+ nbefore = 3 + nbefore;\

78921

+ }\

78922

else\

78923

nprinted = -1;\

78924

}\

78925

@@ -1140,6 +1162,7 @@

78926

int nprinted;

78927

char buffer[10];

78928

const size_t size = 10;

78929

+ int nbefore; /* digits before decimal point - 1. */

78930

78931

switch (len)

78932

{

78933

@@ -1172,16 +1195,6 @@

78934

if (nprinted == -1)

78935

return -1;

78936

78937

- int e = atoi (&buffer[5]);

78938

- int nbefore; /* digits before decimal point - 1. */

78939

- if (e >= 0)

78940

- nbefore = e % 3;

78941

- else

78942

- {

78943

- nbefore = (-e) % 3;

78944

- if (nbefore != 0)

78945

- nbefore = 3 - nbefore;

78946

- }

78947

int prec = f->u.real.d + nbefore;

78948

if (dtp->u.p.current_unit->round_status != ROUND_UNSPECIFIED

78949

&& dtp->u.p.current_unit->round_status != ROUND_PROCDEFINED)

78950

Index: libffi/configure

78951

===================================================================

78952

--- a/src/libffi/configure (.../tags/gcc_4_8_2_release)

78953

+++ b/src/libffi/configure (.../branches/gcc-4_8-branch)

78954

@@ -613,6 +613,7 @@

78955

FFI_EXEC_TRAMPOLINE_TABLE

78956

FFI_EXEC_TRAMPOLINE_TABLE_FALSE

78957

FFI_EXEC_TRAMPOLINE_TABLE_TRUE

78958

+HAVE_LONG_DOUBLE_VARIANT

78959

HAVE_LONG_DOUBLE

78960

ALLOCA

78961

TILE_FALSE

78962

@@ -6392,7 +6393,7 @@

78963

rm -rf conftest*

78964

;;

78965

78966

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

78967

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

78968

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

78969

# Find out which ABI we are using.

78970

echo 'int i;' > conftest.$ac_ext

78971

@@ -6417,7 +6418,10 @@

78972

;;

78973

esac

78974

;;

78975

- ppc64-*linux*|powerpc64-*linux*)

78976

+ powerpc64le-*linux*)

78977

+ LD="${LD-ld} -m elf32lppclinux"

78978

+ ;;

78979

+ powerpc64-*linux*)

78980

LD="${LD-ld} -m elf32ppclinux"

78981

;;

78982

s390x-*linux*)

78983

@@ -6436,7 +6440,10 @@

78984

x86_64-*linux*)

78985

LD="${LD-ld} -m elf_x86_64"

78986

;;

78987

- ppc*-*linux*|powerpc*-*linux*)

78988

+ powerpcle-*linux*)

78989

+ LD="${LD-ld} -m elf64lppc"

78990

+ ;;

78991

+ powerpc-*linux*)

78992

LD="${LD-ld} -m elf64ppc"

78993

;;

78994

s390*-*linux*|s390*-*tpf*)

78995

@@ -10900,7 +10907,7 @@

78996

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

78997

lt_status=$lt_dlunknown

78998

cat > conftest.$ac_ext <<_LT_EOF

78999

-#line 10903 "configure"

79000

+#line 10910 "configure"

79001

#include "confdefs.h"

79002

79003

#if HAVE_DLFCN_H

79004

@@ -11006,7 +11013,7 @@

79005

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

79006

lt_status=$lt_dlunknown

79007

cat > conftest.$ac_ext <<_LT_EOF

79008

-#line 11009 "configure"

79009

+#line 11016 "configure"

79010

#include "confdefs.h"

79011

79012

#if HAVE_DLFCN_H

79013

@@ -11443,6 +11450,7 @@

79014

79015

79016

TARGETDIR="unknown"

79017

+HAVE_LONG_DOUBLE_VARIANT=0

79018

case "$host" in

79019

aarch64*-*-*)

79020

TARGET=AARCH64; TARGETDIR=aarch64

79021

@@ -11540,6 +11548,7 @@

79022

79023

powerpc*-*-linux* | powerpc-*-sysv*)

79024

TARGET=POWERPC; TARGETDIR=powerpc

79025

+ HAVE_LONG_DOUBLE_VARIANT=1

79026

;;

79027

powerpc-*-amigaos*)

79028

TARGET=POWERPC; TARGETDIR=powerpc

79029

@@ -11555,6 +11564,7 @@

79030

;;

79031

powerpc-*-freebsd* | powerpc-*-openbsd*)

79032

TARGET=POWERPC_FREEBSD; TARGETDIR=powerpc

79033

+ HAVE_LONG_DOUBLE_VARIANT=1

79034

;;

79035

powerpc64-*-freebsd*)

79036

TARGET=POWERPC; TARGETDIR=powerpc

79037

@@ -12230,17 +12240,25 @@

79038

# Also AC_SUBST this variable for ffi.h.

79039

if test -z "$HAVE_LONG_DOUBLE"; then

79040

HAVE_LONG_DOUBLE=0

79041

- if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

79042

- if test $ac_cv_sizeof_long_double != 0; then

79043

+ if test $ac_cv_sizeof_long_double != 0; then

79044

+ if test $HAVE_LONG_DOUBLE_VARIANT != 0; then

79045

+

79046

+$as_echo "#define HAVE_LONG_DOUBLE_VARIANT 1" >>confdefs.h

79047

+

79048

HAVE_LONG_DOUBLE=1

79049

+ else

79050

+ if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

79051

+ HAVE_LONG_DOUBLE=1

79052

79053

$as_echo "#define HAVE_LONG_DOUBLE 1" >>confdefs.h

79054

79055

+ fi

79056

fi

79057

fi

79058

fi

79059

79060

79061

+

79062

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5

79063

$as_echo_n "checking whether byte ordering is bigendian... " >&6; }

79064

if test "${ac_cv_c_bigendian+set}" = set; then :

79065

Index: libffi/Makefile.in

79066

===================================================================

79067

--- a/src/libffi/Makefile.in (.../tags/gcc_4_8_2_release)

79068

+++ b/src/libffi/Makefile.in (.../branches/gcc-4_8-branch)

79069

@@ -48,10 +48,10 @@

79070

@IA64_TRUE@am__append_11 = src/ia64/ffi.c src/ia64/unix.S

79071

@M32R_TRUE@am__append_12 = src/m32r/sysv.S src/m32r/ffi.c

79072

@M68K_TRUE@am__append_13 = src/m68k/ffi.c src/m68k/sysv.S

79073

-@POWERPC_TRUE@am__append_14 = src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

79074

+@POWERPC_TRUE@am__append_14 = src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

79075

@POWERPC_AIX_TRUE@am__append_15 = src/powerpc/ffi_darwin.c src/powerpc/aix.S src/powerpc/aix_closure.S

79076

@POWERPC_DARWIN_TRUE@am__append_16 = src/powerpc/ffi_darwin.c src/powerpc/darwin.S src/powerpc/darwin_closure.S

79077

-@POWERPC_FREEBSD_TRUE@am__append_17 = src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

79078

+@POWERPC_FREEBSD_TRUE@am__append_17 = src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

79079

@AARCH64_TRUE@am__append_18 = src/aarch64/sysv.S src/aarch64/ffi.c

79080

@ARM_TRUE@am__append_19 = src/arm/sysv.S src/arm/ffi.c

79081

@ARM_TRUE@@FFI_EXEC_TRAMPOLINE_TABLE_TRUE@am__append_20 = src/arm/trampoline.S

79082

@@ -133,7 +133,9 @@

79083

@IA64_TRUE@am__objects_11 = src/ia64/ffi.lo src/ia64/unix.lo

79084

@M32R_TRUE@am__objects_12 = src/m32r/sysv.lo src/m32r/ffi.lo

79085

@M68K_TRUE@am__objects_13 = src/m68k/ffi.lo src/m68k/sysv.lo

79086

-@POWERPC_TRUE@am__objects_14 = src/powerpc/ffi.lo src/powerpc/sysv.lo \

79087

+@POWERPC_TRUE@am__objects_14 = src/powerpc/ffi.lo \

79088

+@POWERPC_TRUE@ src/powerpc/ffi_sysv.lo \

79089

+@POWERPC_TRUE@ src/powerpc/ffi_linux64.lo src/powerpc/sysv.lo \

79090

@POWERPC_TRUE@ src/powerpc/ppc_closure.lo \

79091

@POWERPC_TRUE@ src/powerpc/linux64.lo \

79092

@POWERPC_TRUE@ src/powerpc/linux64_closure.lo

79093

@@ -144,6 +146,7 @@

79094

@POWERPC_DARWIN_TRUE@ src/powerpc/darwin.lo \

79095

@POWERPC_DARWIN_TRUE@ src/powerpc/darwin_closure.lo

79096

@POWERPC_FREEBSD_TRUE@am__objects_17 = src/powerpc/ffi.lo \

79097

+@POWERPC_FREEBSD_TRUE@ src/powerpc/ffi_sysv.lo \

79098

@POWERPC_FREEBSD_TRUE@ src/powerpc/sysv.lo \

79099

@POWERPC_FREEBSD_TRUE@ src/powerpc/ppc_closure.lo

79100

@AARCH64_TRUE@am__objects_18 = src/aarch64/sysv.lo src/aarch64/ffi.lo

79101

@@ -278,6 +281,7 @@

79102

FGREP = @FGREP@

79103

GREP = @GREP@

79104

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

79105

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

79106

INSTALL = @INSTALL@

79107

INSTALL_DATA = @INSTALL_DATA@

79108

INSTALL_PROGRAM = @INSTALL_PROGRAM@

79109

@@ -387,10 +391,12 @@

79110

src/ia64/unix.S src/mips/ffi.c src/mips/n32.S src/mips/o32.S \

79111

src/mips/ffitarget.h src/m32r/ffi.c src/m32r/sysv.S \

79112

src/m32r/ffitarget.h src/m68k/ffi.c src/m68k/sysv.S \

79113

- src/m68k/ffitarget.h src/powerpc/ffi.c src/powerpc/sysv.S \

79114

- src/powerpc/linux64.S src/powerpc/linux64_closure.S \

79115

- src/powerpc/ppc_closure.S src/powerpc/asm.h \

79116

- src/powerpc/aix.S src/powerpc/darwin.S \

79117

+ src/m68k/ffitarget.h \

79118

+ src/powerpc/ffi.c src/powerpc/ffi_powerpc.h \

79119

+ src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c \

79120

+ src/powerpc/sysv.S src/powerpc/linux64.S \

79121

+ src/powerpc/linux64_closure.S src/powerpc/ppc_closure.S \

79122

+ src/powerpc/asm.h src/powerpc/aix.S src/powerpc/darwin.S \

79123

src/powerpc/aix_closure.S src/powerpc/darwin_closure.S \

79124

src/powerpc/ffi_darwin.c src/powerpc/ffitarget.h \

79125

src/s390/ffi.c src/s390/sysv.S src/s390/ffitarget.h \

79126

@@ -711,6 +717,10 @@

79127

@: > src/powerpc/$(DEPDIR)/$(am__dirstamp)

79128

src/powerpc/ffi.lo: src/powerpc/$(am__dirstamp) \

79129

src/powerpc/$(DEPDIR)/$(am__dirstamp)

79130

+src/powerpc/ffi_sysv.lo: src/powerpc/$(am__dirstamp) \

79131

+ src/powerpc/$(DEPDIR)/$(am__dirstamp)

79132

+src/powerpc/ffi_linux64.lo: src/powerpc/$(am__dirstamp) \

79133

+ src/powerpc/$(DEPDIR)/$(am__dirstamp)

79134

src/powerpc/sysv.lo: src/powerpc/$(am__dirstamp) \

79135

src/powerpc/$(DEPDIR)/$(am__dirstamp)

79136

src/powerpc/ppc_closure.lo: src/powerpc/$(am__dirstamp) \

79137

@@ -912,6 +922,10 @@

79138

-rm -f src/powerpc/ffi.lo

79139

-rm -f src/powerpc/ffi_darwin.$(OBJEXT)

79140

-rm -f src/powerpc/ffi_darwin.lo

79141

+ -rm -f src/powerpc/ffi_linux64.$(OBJEXT)

79142

+ -rm -f src/powerpc/ffi_linux64.lo

79143

+ -rm -f src/powerpc/ffi_sysv.$(OBJEXT)

79144

+ -rm -f src/powerpc/ffi_sysv.lo

79145

-rm -f src/powerpc/linux64.$(OBJEXT)

79146

-rm -f src/powerpc/linux64.lo

79147

-rm -f src/powerpc/linux64_closure.$(OBJEXT)

79148

@@ -1009,6 +1023,8 @@

79149

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/darwin_closure.Plo@am__quote@

79150

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi.Plo@am__quote@

79151

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi_darwin.Plo@am__quote@

79152

+@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi_linux64.Plo@am__quote@

79153

+@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi_sysv.Plo@am__quote@

79154

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/linux64.Plo@am__quote@

79155

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/linux64_closure.Plo@am__quote@

79156

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ppc_closure.Plo@am__quote@

79157

Index: libffi/include/ffi.h.in

79158

===================================================================

79159

--- a/src/libffi/include/ffi.h.in (.../tags/gcc_4_8_2_release)

79160

+++ b/src/libffi/include/ffi.h.in (.../branches/gcc-4_8-branch)

79161

@@ -207,6 +207,11 @@

79162

#endif

79163

} ffi_cif;

79164

79165

+#if HAVE_LONG_DOUBLE_VARIANT

79166

+/* Used to adjust size/alignment of ffi types. */

79167

+void ffi_prep_types (ffi_abi abi);

79168

+# endif

79169

+

79170

/* Used internally, but overridden by some architectures */

79171

ffi_status ffi_prep_cif_core(ffi_cif *cif,

79172

ffi_abi abi,

79173

Index: libffi/include/Makefile.in

79174

===================================================================

79175

--- a/src/libffi/include/Makefile.in (.../tags/gcc_4_8_2_release)

79176

+++ b/src/libffi/include/Makefile.in (.../branches/gcc-4_8-branch)

79177

@@ -113,6 +113,7 @@

79178

FGREP = @FGREP@

79179

GREP = @GREP@

79180

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

79181

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

79182

INSTALL = @INSTALL@

79183

INSTALL_DATA = @INSTALL_DATA@

79184

INSTALL_PROGRAM = @INSTALL_PROGRAM@

79185

Index: libffi/fficonfig.h.in

79186

===================================================================

79187

--- a/src/libffi/fficonfig.h.in (.../tags/gcc_4_8_2_release)

79188

+++ b/src/libffi/fficonfig.h.in (.../branches/gcc-4_8-branch)

79189

@@ -73,6 +73,9 @@

79190

/* Define if you have the long double type and it is bigger than a double */

79191

#undef HAVE_LONG_DOUBLE

79192

79193

+/* Define if you support more than one size of the long double type */

79194

+#undef HAVE_LONG_DOUBLE_VARIANT

79195

+

79196

/* Define to 1 if you have the `memcpy' function. */

79197

#undef HAVE_MEMCPY

79198

79199

Index: libffi/src/powerpc/ppc_closure.S

79200

===================================================================

79201

--- a/src/libffi/src/powerpc/ppc_closure.S (.../tags/gcc_4_8_2_release)

79202

+++ b/src/libffi/src/powerpc/ppc_closure.S (.../branches/gcc-4_8-branch)

79203

@@ -31,7 +31,7 @@

79204

79205

.file "ppc_closure.S"

79206

79207

-#ifndef __powerpc64__

79208

+#ifndef POWERPC64

79209

79210

ENTRY(ffi_closure_SYSV)

79211

.LFB1:

79212

@@ -238,7 +238,7 @@

79213

lwz %r3,112+0(%r1)

79214

lwz %r4,112+4(%r1)

79215

lwz %r5,112+8(%r1)

79216

- bl .Luint128

79217

+ b .Luint128

79218

79219

# The return types below are only used when the ABI type is FFI_SYSV.

79220

# case FFI_SYSV_TYPE_SMALL_STRUCT + 1. One byte struct.

79221

@@ -378,8 +378,7 @@

79222

.align 2

79223

.LEFDE1:

79224

79225

-#endif

79226

-

79227

#if defined __ELF__ && defined __linux__

79228

.section .note.GNU-stack,"",@progbits

79229

#endif

79230

+#endif

79231

Index: libffi/src/powerpc/ffitarget.h

79232

===================================================================

79233

--- a/src/libffi/src/powerpc/ffitarget.h (.../tags/gcc_4_8_2_release)

79234

+++ b/src/libffi/src/powerpc/ffitarget.h (.../branches/gcc-4_8-branch)

79235

@@ -60,45 +60,76 @@

79236

typedef enum ffi_abi {

79237

FFI_FIRST_ABI = 0,

79238

79239

-#ifdef POWERPC

79240

- FFI_SYSV,

79241

- FFI_GCC_SYSV,

79242

- FFI_LINUX64,

79243

- FFI_LINUX,

79244

- FFI_LINUX_SOFT_FLOAT,

79245

-# if defined(POWERPC64)

79246

- FFI_DEFAULT_ABI = FFI_LINUX64,

79247

-# elif defined(__NO_FPRS__)

79248

- FFI_DEFAULT_ABI = FFI_LINUX_SOFT_FLOAT,

79249

-# elif (__LDBL_MANT_DIG__ == 106)

79250

- FFI_DEFAULT_ABI = FFI_LINUX,

79251

-# else

79252

- FFI_DEFAULT_ABI = FFI_GCC_SYSV,

79253

-# endif

79254

-#endif

79255

-

79256

-#ifdef POWERPC_AIX

79257

+#if defined (POWERPC_AIX)

79258

FFI_AIX,

79259

FFI_DARWIN,

79260

FFI_DEFAULT_ABI = FFI_AIX,

79261

-#endif

79262

+ FFI_LAST_ABI

79263

79264

-#ifdef POWERPC_DARWIN

79265

+#elif defined (POWERPC_DARWIN)

79266

FFI_AIX,

79267

FFI_DARWIN,

79268

FFI_DEFAULT_ABI = FFI_DARWIN,

79269

-#endif

79270

+ FFI_LAST_ABI

79271

79272

-#ifdef POWERPC_FREEBSD

79273

- FFI_SYSV,

79274

- FFI_GCC_SYSV,

79275

- FFI_LINUX64,

79276

- FFI_LINUX,

79277

- FFI_LINUX_SOFT_FLOAT,

79278

- FFI_DEFAULT_ABI = FFI_SYSV,

79279

+#else

79280

+ /* The FFI_COMPAT values are used by old code. Since libffi may be

79281

+ a shared library we have to support old values for backwards

79282

+ compatibility. */

79283

+ FFI_COMPAT_SYSV,

79284

+ FFI_COMPAT_GCC_SYSV,

79285

+ FFI_COMPAT_LINUX64,

79286

+ FFI_COMPAT_LINUX,

79287

+ FFI_COMPAT_LINUX_SOFT_FLOAT,

79288

+

79289

+# if defined (POWERPC64)

79290

+ /* This bit, always set in new code, must not be set in any of the

79291

+ old FFI_COMPAT values that might be used for 64-bit linux. We

79292

+ only need worry about FFI_COMPAT_LINUX64, but to be safe avoid

79293

+ all old values. */

79294

+ FFI_LINUX = 8,

79295

+ /* This and following bits can reuse FFI_COMPAT values. */

79296

+ FFI_LINUX_STRUCT_ALIGN = 1,

79297

+ FFI_LINUX_LONG_DOUBLE_128 = 2,

79298

+ FFI_DEFAULT_ABI = (FFI_LINUX

79299

+# ifdef __STRUCT_PARM_ALIGN__

79300

+ | FFI_LINUX_STRUCT_ALIGN

79301

+# endif

79302

+# ifdef __LONG_DOUBLE_128__

79303

+ | FFI_LINUX_LONG_DOUBLE_128

79304

+# endif

79305

+ ),

79306

+ FFI_LAST_ABI = 12

79307

+

79308

+# else

79309

+ /* This bit, always set in new code, must not be set in any of the

79310

+ old FFI_COMPAT values that might be used for 32-bit linux/sysv/bsd. */

79311

+ FFI_SYSV = 8,

79312

+ /* This and following bits can reuse FFI_COMPAT values. */

79313

+ FFI_SYSV_SOFT_FLOAT = 1,

79314

+ FFI_SYSV_STRUCT_RET = 2,

79315

+ FFI_SYSV_IBM_LONG_DOUBLE = 4,

79316

+ FFI_SYSV_LONG_DOUBLE_128 = 16,

79317

+

79318

+ FFI_DEFAULT_ABI = (FFI_SYSV

79319

+# ifdef __NO_FPRS__

79320

+ | FFI_SYSV_SOFT_FLOAT

79321

+# endif

79322

+# if (defined (__SVR4_STRUCT_RETURN) \

79323

+ || defined (POWERPC_FREEBSD) && !defined (__AIX_STRUCT_RETURN))

79324

+ | FFI_SYSV_STRUCT_RET

79325

+# endif

79326

+# if __LDBL_MANT_DIG__ == 106

79327

+ | FFI_SYSV_IBM_LONG_DOUBLE

79328

+# endif

79329

+# ifdef __LONG_DOUBLE_128__

79330

+ | FFI_SYSV_LONG_DOUBLE_128

79331

+# endif

79332

+ ),

79333

+ FFI_LAST_ABI = 32

79334

+# endif

79335

#endif

79336

79337

- FFI_LAST_ABI

79338

} ffi_abi;

79339

#endif

79340

79341

@@ -106,6 +137,10 @@

79342

79343

#define FFI_CLOSURES 1

79344

#define FFI_NATIVE_RAW_API 0

79345

+#if defined (POWERPC) || defined (POWERPC_FREEBSD)

79346

+# define FFI_TARGET_SPECIFIC_VARIADIC 1

79347

+# define FFI_EXTRA_CIF_FIELDS unsigned nfixedargs

79348

+#endif

79349

79350

/* For additional types like the below, take care about the order in

79351

ppc_closures.S. They must follow after the FFI_TYPE_LAST. */

79352

@@ -113,19 +148,26 @@

79353

/* Needed for soft-float long-double-128 support. */

79354

#define FFI_TYPE_UINT128 (FFI_TYPE_LAST + 1)

79355

79356

-/* Needed for FFI_SYSV small structure returns.

79357

- We use two flag bits, (FLAG_SYSV_SMST_R3, FLAG_SYSV_SMST_R4) which are

79358

- defined in ffi.c, to determine the exact return type and its size. */

79359

+/* Needed for FFI_SYSV small structure returns. */

79360

#define FFI_SYSV_TYPE_SMALL_STRUCT (FFI_TYPE_LAST + 2)

79361

79362

-#if defined(POWERPC64) || defined(POWERPC_AIX)

79363

+/* Used by ELFv2 for homogenous structure returns. */

79364

+#define FFI_V2_TYPE_FLOAT_HOMOG (FFI_TYPE_LAST + 1)

79365

+#define FFI_V2_TYPE_DOUBLE_HOMOG (FFI_TYPE_LAST + 2)

79366

+#define FFI_V2_TYPE_SMALL_STRUCT (FFI_TYPE_LAST + 3)

79367

+

79368

+#if _CALL_ELF == 2

79369

+# define FFI_TRAMPOLINE_SIZE 32

79370

+#else

79371

+# if defined(POWERPC64) || defined(POWERPC_AIX)

79372

# if defined(POWERPC_DARWIN64)

79373

# define FFI_TRAMPOLINE_SIZE 48

79374

# else

79375

# define FFI_TRAMPOLINE_SIZE 24

79376

# endif

79377

-#else /* POWERPC || POWERPC_AIX */

79378

+# else /* POWERPC || POWERPC_AIX */

79379

# define FFI_TRAMPOLINE_SIZE 40

79380

+# endif

79381

#endif

79382

79383

#ifndef LIBFFI_ASM

79384

Index: libffi/src/powerpc/ffi.c

79385

===================================================================

79386

--- a/src/libffi/src/powerpc/ffi.c (.../tags/gcc_4_8_2_release)

79387

+++ b/src/libffi/src/powerpc/ffi.c (.../branches/gcc-4_8-branch)

79388

@@ -1,5 +1,6 @@

79389

/* -----------------------------------------------------------------------

79390

79391

79392

79393

79394

79395

79396

@@ -27,966 +28,104 @@

79397

OTHER DEALINGS IN THE SOFTWARE.

79398

----------------------------------------------------------------------- */

79399

79400

-#include <ffi.h>

79401

-#include <ffi_common.h>

79402

+#include "ffi.h"

79403

+#include "ffi_common.h"

79404

+#include "ffi_powerpc.h"

79405

79406

-#include <stdlib.h>

79407

-#include <stdio.h>

79408

-

79409

-

79410

-extern void ffi_closure_SYSV (void);

79411

-extern void FFI_HIDDEN ffi_closure_LINUX64 (void);

79412

-

79413

-enum {

79414

- /* The assembly depends on these exact flags. */

79415

- FLAG_RETURNS_SMST = 1 << (31-31), /* Used for FFI_SYSV small structs. */

79416

- FLAG_RETURNS_NOTHING = 1 << (31-30), /* These go in cr7 */

79417

-#ifndef __NO_FPRS__

79418

- FLAG_RETURNS_FP = 1 << (31-29),

79419

-#endif

79420

- FLAG_RETURNS_64BITS = 1 << (31-28),

79421

-

79422

- FLAG_RETURNS_128BITS = 1 << (31-27), /* cr6 */

79423

-

79424

- FLAG_ARG_NEEDS_COPY = 1 << (31- 7),

79425

-#ifndef __NO_FPRS__

79426

- FLAG_FP_ARGUMENTS = 1 << (31- 6), /* cr1.eq; specified by ABI */

79427

-#endif

79428

- FLAG_4_GPR_ARGUMENTS = 1 << (31- 5),

79429

- FLAG_RETVAL_REFERENCE = 1 << (31- 4)

79430

-};

79431

-

79432

-/* About the SYSV ABI. */

79433

-#define ASM_NEEDS_REGISTERS 4

79434

-#define NUM_GPR_ARG_REGISTERS 8

79435

-#ifndef __NO_FPRS__

79436

-# define NUM_FPR_ARG_REGISTERS 8

79437

-#endif

79438

-

79439

-/* ffi_prep_args_SYSV is called by the assembly routine once stack space

79440

- has been allocated for the function's arguments.

79441

-

79442

- The stack layout we want looks like this:

79443

-

79444

- | Return address from ffi_call_SYSV 4bytes | higher addresses

79445

- |--------------------------------------------|

79446

- | Previous backchain pointer 4 | stack pointer here

79447

- |--------------------------------------------|<+ <<< on entry to

79448

- | Saved r28-r31 4*4 | | ffi_call_SYSV

79449

- |--------------------------------------------| |

79450

- | GPR registers r3-r10 8*4 | | ffi_call_SYSV

79451

- |--------------------------------------------| |

79452

- | FPR registers f1-f8 (optional) 8*8 | |

79453

- |--------------------------------------------| | stack |

79454

- | Space for copied structures | | grows |

79455

- |--------------------------------------------| | down V

79456

- | Parameters that didn't fit in registers | |

79457

- |--------------------------------------------| | lower addresses

79458

- | Space for callee's LR 4 | |

79459

- |--------------------------------------------| | stack pointer here

79460

- | Current backchain pointer 4 |-/ during

79461

- |--------------------------------------------| <<< ffi_call_SYSV

79462

-

79463

-*/

79464

-

79465

-void

79466

-ffi_prep_args_SYSV (extended_cif *ecif, unsigned *const stack)

79467

+#if HAVE_LONG_DOUBLE_VARIANT

79468

+/* Adjust ffi_type_longdouble. */

79469

+void FFI_HIDDEN

79470

+ffi_prep_types (ffi_abi abi)

79471

{

79472

- const unsigned bytes = ecif->cif->bytes;

79473

- const unsigned flags = ecif->cif->flags;

79474

-

79475

- typedef union {

79476

- char *c;

79477

- unsigned *u;

79478

- long long *ll;

79479

- float *f;

79480

- double *d;

79481

- } valp;

79482

-

79483

- /* 'stacktop' points at the previous backchain pointer. */

79484

- valp stacktop;

79485

-

79486

- /* 'gpr_base' points at the space for gpr3, and grows upwards as

79487

- we use GPR registers. */

79488

- valp gpr_base;

79489

- int intarg_count;

79490

-

79491

-#ifndef __NO_FPRS__

79492

- /* 'fpr_base' points at the space for fpr1, and grows upwards as

79493

- we use FPR registers. */

79494

- valp fpr_base;

79495

- int fparg_count;

79496

-#endif

79497

-

79498

- /* 'copy_space' grows down as we put structures in it. It should

79499

- stay 16-byte aligned. */

79500

- valp copy_space;

79501

-

79502

- /* 'next_arg' grows up as we put parameters in it. */

79503

- valp next_arg;

79504

-

79505

- int i;

79506

- ffi_type **ptr;

79507

-#ifndef __NO_FPRS__

79508

- double double_tmp;

79509

-#endif

79510

- union {

79511

- void **v;

79512

- char **c;

79513

- signed char **sc;

79514

- unsigned char **uc;

79515

- signed short **ss;

79516

- unsigned short **us;

79517

- unsigned int **ui;

79518

- long long **ll;

79519

- float **f;

79520

- double **d;

79521

- } p_argv;

79522

- size_t struct_copy_size;

79523

- unsigned gprvalue;

79524

-

79525

- stacktop.c = (char *) stack + bytes;

79526

- gpr_base.u = stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS;

79527

- intarg_count = 0;

79528

-#ifndef __NO_FPRS__

79529

- fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS;

79530

- fparg_count = 0;

79531

- copy_space.c = ((flags & FLAG_FP_ARGUMENTS) ? fpr_base.c : gpr_base.c);

79532

-#else

79533

- copy_space.c = gpr_base.c;

79534

-#endif

79535

- next_arg.u = stack + 2;

79536

-

79537

- /* Check that everything starts aligned properly. */

79538

- FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

79539

- FFI_ASSERT (((unsigned long) copy_space.c & 0xF) == 0);

79540

- FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

79541

- FFI_ASSERT ((bytes & 0xF) == 0);

79542

- FFI_ASSERT (copy_space.c >= next_arg.c);

79543

-

79544

- /* Deal with return values that are actually pass-by-reference. */

79545

- if (flags & FLAG_RETVAL_REFERENCE)

79546

- {

79547

- *gpr_base.u++ = (unsigned long) (char *) ecif->rvalue;

79548

- intarg_count++;

79549

- }

79550

-

79551

- /* Now for the arguments. */

79552

- p_argv.v = ecif->avalue;

79553

- for (ptr = ecif->cif->arg_types, i = ecif->cif->nargs;

79554

- i > 0;

79555

- i--, ptr++, p_argv.v++)

79556

- {

79557

- unsigned short typenum = (*ptr)->type;

79558

-

79559

- /* We may need to handle some values depending on ABI */

79560

- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) {

79561

- if (typenum == FFI_TYPE_FLOAT)

79562

- typenum = FFI_TYPE_UINT32;

79563

- if (typenum == FFI_TYPE_DOUBLE)

79564

- typenum = FFI_TYPE_UINT64;

79565

- if (typenum == FFI_TYPE_LONGDOUBLE)

79566

- typenum = FFI_TYPE_UINT128;

79567

- } else if (ecif->cif->abi != FFI_LINUX) {

79568

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

79569

- if (typenum == FFI_TYPE_LONGDOUBLE)

79570

- typenum = FFI_TYPE_STRUCT;

79571

-#endif

79572

- }

79573

-

79574

- /* Now test the translated value */

79575

- switch (typenum) {

79576

-#ifndef __NO_FPRS__

79577

- case FFI_TYPE_FLOAT:

79578

- /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */

79579

- double_tmp = **p_argv.f;

79580

- if (fparg_count >= NUM_FPR_ARG_REGISTERS)

79581

- {

79582

- *next_arg.f = (float) double_tmp;

79583

- next_arg.u += 1;

79584

- intarg_count++;

79585

- }

79586

- else

79587

- *fpr_base.d++ = double_tmp;

79588

- fparg_count++;

79589

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

79590

- break;

79591

-

79592

- case FFI_TYPE_DOUBLE:

79593

- /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */

79594

- double_tmp = **p_argv.d;

79595

-

79596

- if (fparg_count >= NUM_FPR_ARG_REGISTERS)

79597

- {

79598

- if (intarg_count >= NUM_GPR_ARG_REGISTERS

79599

- && intarg_count % 2 != 0)

79600

- {

79601

- intarg_count++;

79602

- next_arg.u++;

79603

- }

79604

- *next_arg.d = double_tmp;

79605

- next_arg.u += 2;

79606

- }

79607

- else

79608

- *fpr_base.d++ = double_tmp;

79609

- fparg_count++;

79610

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

79611

- break;

79612

-

79613

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

79614

- case FFI_TYPE_LONGDOUBLE:

79615

- double_tmp = (*p_argv.d)[0];

79616

-

79617

- if (fparg_count >= NUM_FPR_ARG_REGISTERS - 1)

79618

- {

79619

- if (intarg_count >= NUM_GPR_ARG_REGISTERS

79620

- && intarg_count % 2 != 0)

79621

- {

79622

- intarg_count++;

79623

- next_arg.u++;

79624

- }

79625

- *next_arg.d = double_tmp;

79626

- next_arg.u += 2;

79627

- double_tmp = (*p_argv.d)[1];

79628

- *next_arg.d = double_tmp;

79629

- next_arg.u += 2;

79630

- }

79631

- else

79632

- {

79633

- *fpr_base.d++ = double_tmp;

79634

- double_tmp = (*p_argv.d)[1];

79635

- *fpr_base.d++ = double_tmp;

79636

- }

79637

-

79638

- fparg_count += 2;

79639

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

79640

- break;

79641

-#endif

79642

-#endif /* have FPRs */

79643

-

79644

- /*

79645

- * The soft float ABI for long doubles works like this, a long double

79646

- * is passed in four consecutive GPRs if available. A maximum of 2

79647

- * long doubles can be passed in gprs. If we do not have 4 GPRs

79648

- * left, the long double is passed on the stack, 4-byte aligned.

79649

- */

79650

- case FFI_TYPE_UINT128: {

79651

- unsigned int int_tmp = (*p_argv.ui)[0];

79652

- unsigned int ii;

79653

- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3) {

79654

- if (intarg_count < NUM_GPR_ARG_REGISTERS)

79655

- intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count;

79656

- *(next_arg.u++) = int_tmp;

79657

- for (ii = 1; ii < 4; ii++) {

79658

- int_tmp = (*p_argv.ui)[ii];

79659

- *(next_arg.u++) = int_tmp;

79660

- }

79661

- } else {

79662

- *(gpr_base.u++) = int_tmp;

79663

- for (ii = 1; ii < 4; ii++) {

79664

- int_tmp = (*p_argv.ui)[ii];

79665

- *(gpr_base.u++) = int_tmp;

79666

- }

79667

- }

79668

- intarg_count += 4;

79669

- break;

79670

- }

79671

-

79672

- case FFI_TYPE_UINT64:

79673

- case FFI_TYPE_SINT64:

79674

- if (intarg_count == NUM_GPR_ARG_REGISTERS-1)

79675

- intarg_count++;

79676

- if (intarg_count >= NUM_GPR_ARG_REGISTERS)

79677

- {

79678

- if (intarg_count % 2 != 0)

79679

- {

79680

- intarg_count++;

79681

- next_arg.u++;

79682

- }

79683

- *next_arg.ll = **p_argv.ll;

79684

- next_arg.u += 2;

79685

- }

79686

- else

79687

- {

79688

- /* whoops: abi states only certain register pairs

79689

- * can be used for passing long long int

79690

- * specifically (r3,r4), (r5,r6), (r7,r8),

79691

- * (r9,r10) and if next arg is long long but

79692

- * not correct starting register of pair then skip

79693

- * until the proper starting register

79694

- */

79695

- if (intarg_count % 2 != 0)

79696

- {

79697

- intarg_count ++;

79698

- gpr_base.u++;

79699

- }

79700

- *gpr_base.ll++ = **p_argv.ll;

79701

- }

79702

- intarg_count += 2;

79703

- break;

79704

-

79705

- case FFI_TYPE_STRUCT:

79706

- struct_copy_size = ((*ptr)->size + 15) & ~0xF;

79707

- copy_space.c -= struct_copy_size;

79708

- memcpy (copy_space.c, *p_argv.c, (*ptr)->size);

79709

-

79710

- gprvalue = (unsigned long) copy_space.c;

79711

-

79712

- FFI_ASSERT (copy_space.c > next_arg.c);

79713

- FFI_ASSERT (flags & FLAG_ARG_NEEDS_COPY);

79714

- goto putgpr;

79715

-

79716

- case FFI_TYPE_UINT8:

79717

- gprvalue = **p_argv.uc;

79718

- goto putgpr;

79719

- case FFI_TYPE_SINT8:

79720

- gprvalue = **p_argv.sc;

79721

- goto putgpr;

79722

- case FFI_TYPE_UINT16:

79723

- gprvalue = **p_argv.us;

79724

- goto putgpr;

79725

- case FFI_TYPE_SINT16:

79726

- gprvalue = **p_argv.ss;

79727

- goto putgpr;

79728

-

79729

- case FFI_TYPE_INT:

79730

- case FFI_TYPE_UINT32:

79731

- case FFI_TYPE_SINT32:

79732

- case FFI_TYPE_POINTER:

79733

-

79734

- gprvalue = **p_argv.ui;

79735

-

79736

- putgpr:

79737

- if (intarg_count >= NUM_GPR_ARG_REGISTERS)

79738

- *next_arg.u++ = gprvalue;

79739

- else

79740

- *gpr_base.u++ = gprvalue;

79741

- intarg_count++;

79742

- break;

79743

- }

79744

- }

79745

-

79746

- /* Check that we didn't overrun the stack... */

79747

- FFI_ASSERT (copy_space.c >= next_arg.c);

79748

- FFI_ASSERT (gpr_base.u <= stacktop.u - ASM_NEEDS_REGISTERS);

79749

-#ifndef __NO_FPRS__

79750

- FFI_ASSERT (fpr_base.u

79751

- <= stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS);

79752

-#endif

79753

- FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS || intarg_count <= 4);

79754

+# if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

79755

+# ifdef POWERPC64

79756

+ ffi_prep_types_linux64 (abi);

79757

+# else

79758

+ ffi_prep_types_sysv (abi);

79759

+# endif

79760

+# endif

79761

}

79762

-

79763

-/* About the LINUX64 ABI. */

79764

-enum {

79765

- NUM_GPR_ARG_REGISTERS64 = 8,

79766

- NUM_FPR_ARG_REGISTERS64 = 13

79767

-};

79768

-enum { ASM_NEEDS_REGISTERS64 = 4 };

79769

-

79770

-/* ffi_prep_args64 is called by the assembly routine once stack space

79771

- has been allocated for the function's arguments.

79772

-

79773

- The stack layout we want looks like this:

79774

-

79775

- | Ret addr from ffi_call_LINUX64 8bytes | higher addresses

79776

- |--------------------------------------------|

79777

- | CR save area 8bytes |

79778

- |--------------------------------------------|

79779

- | Previous backchain pointer 8 | stack pointer here

79780

- |--------------------------------------------|<+ <<< on entry to

79781

- | Saved r28-r31 4*8 | | ffi_call_LINUX64

79782

- |--------------------------------------------| |

79783

- | GPR registers r3-r10 8*8 | |

79784

- |--------------------------------------------| |

79785

- | FPR registers f1-f13 (optional) 13*8 | |

79786

- |--------------------------------------------| |

79787

- | Parameter save area | |

79788

- |--------------------------------------------| |

79789

- | TOC save area 8 | |

79790

- |--------------------------------------------| | stack |

79791

- | Linker doubleword 8 | | grows |

79792

- |--------------------------------------------| | down V

79793

- | Compiler doubleword 8 | |

79794

- |--------------------------------------------| | lower addresses

79795

- | Space for callee's LR 8 | |

79796

- |--------------------------------------------| |

79797

- | CR save area 8 | |

79798

- |--------------------------------------------| | stack pointer here

79799

- | Current backchain pointer 8 |-/ during

79800

- |--------------------------------------------| <<< ffi_call_LINUX64

79801

-

79802

-*/

79803

-

79804

-void FFI_HIDDEN

79805

-ffi_prep_args64 (extended_cif *ecif, unsigned long *const stack)

79806

-{

79807

- const unsigned long bytes = ecif->cif->bytes;

79808

- const unsigned long flags = ecif->cif->flags;

79809

-

79810

- typedef union {

79811

- char *c;

79812

- unsigned long *ul;

79813

- float *f;

79814

- double *d;

79815

- } valp;

79816

-

79817

- /* 'stacktop' points at the previous backchain pointer. */

79818

- valp stacktop;

79819

-

79820

- /* 'next_arg' points at the space for gpr3, and grows upwards as

79821

- we use GPR registers, then continues at rest. */

79822

- valp gpr_base;

79823

- valp gpr_end;

79824

- valp rest;

79825

- valp next_arg;

79826

-

79827

- /* 'fpr_base' points at the space for fpr3, and grows upwards as

79828

- we use FPR registers. */

79829

- valp fpr_base;

79830

- int fparg_count;

79831

-

79832

- int i, words;

79833

- ffi_type **ptr;

79834

- double double_tmp;

79835

- union {

79836

- void **v;

79837

- char **c;

79838

- signed char **sc;

79839

- unsigned char **uc;

79840

- signed short **ss;

79841

- unsigned short **us;

79842

- signed int **si;

79843

- unsigned int **ui;

79844

- unsigned long **ul;

79845

- float **f;

79846

- double **d;

79847

- } p_argv;

79848

- unsigned long gprvalue;

79849

-

79850

- stacktop.c = (char *) stack + bytes;

79851

- gpr_base.ul = stacktop.ul - ASM_NEEDS_REGISTERS64 - NUM_GPR_ARG_REGISTERS64;

79852

- gpr_end.ul = gpr_base.ul + NUM_GPR_ARG_REGISTERS64;

79853

- rest.ul = stack + 6 + NUM_GPR_ARG_REGISTERS64;

79854

- fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS64;

79855

- fparg_count = 0;

79856

- next_arg.ul = gpr_base.ul;

79857

-

79858

- /* Check that everything starts aligned properly. */

79859

- FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

79860

- FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

79861

- FFI_ASSERT ((bytes & 0xF) == 0);

79862

-

79863

- /* Deal with return values that are actually pass-by-reference. */

79864

- if (flags & FLAG_RETVAL_REFERENCE)

79865

- *next_arg.ul++ = (unsigned long) (char *) ecif->rvalue;

79866

-

79867

- /* Now for the arguments. */

79868

- p_argv.v = ecif->avalue;

79869

- for (ptr = ecif->cif->arg_types, i = ecif->cif->nargs;

79870

- i > 0;

79871

- i--, ptr++, p_argv.v++)

79872

- {

79873

- switch ((*ptr)->type)

79874

- {

79875

- case FFI_TYPE_FLOAT:

79876

- double_tmp = **p_argv.f;

79877

- *next_arg.f = (float) double_tmp;

79878

- if (++next_arg.ul == gpr_end.ul)

79879

- next_arg.ul = rest.ul;

79880

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

79881

- *fpr_base.d++ = double_tmp;

79882

- fparg_count++;

79883

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

79884

- break;

79885

-

79886

- case FFI_TYPE_DOUBLE:

79887

- double_tmp = **p_argv.d;

79888

- *next_arg.d = double_tmp;

79889

- if (++next_arg.ul == gpr_end.ul)

79890

- next_arg.ul = rest.ul;

79891

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

79892

- *fpr_base.d++ = double_tmp;

79893

- fparg_count++;

79894

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

79895

- break;

79896

-

79897

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

79898

- case FFI_TYPE_LONGDOUBLE:

79899

- double_tmp = (*p_argv.d)[0];

79900

- *next_arg.d = double_tmp;

79901

- if (++next_arg.ul == gpr_end.ul)

79902

- next_arg.ul = rest.ul;

79903

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

79904

- *fpr_base.d++ = double_tmp;

79905

- fparg_count++;

79906

- double_tmp = (*p_argv.d)[1];

79907

- *next_arg.d = double_tmp;

79908

- if (++next_arg.ul == gpr_end.ul)

79909

- next_arg.ul = rest.ul;

79910

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

79911

- *fpr_base.d++ = double_tmp;

79912

- fparg_count++;

79913

- FFI_ASSERT (__LDBL_MANT_DIG__ == 106);

79914

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

79915

- break;

79916

#endif

79917

79918

- case FFI_TYPE_STRUCT:

79919

- words = ((*ptr)->size + 7) / 8;

79920

- if (next_arg.ul >= gpr_base.ul && next_arg.ul + words > gpr_end.ul)

79921

- {

79922

- size_t first = gpr_end.c - next_arg.c;

79923

- memcpy (next_arg.c, *p_argv.c, first);

79924

- memcpy (rest.c, *p_argv.c + first, (*ptr)->size - first);

79925

- next_arg.c = rest.c + words * 8 - first;

79926

- }

79927

- else

79928

- {

79929

- char *where = next_arg.c;

79930

-

79931

-#ifndef __LITTLE_ENDIAN__

79932

- /* Structures with size less than eight bytes are passed

79933

- left-padded. */

79934

- if ((*ptr)->size < 8)

79935

- where += 8 - (*ptr)->size;

79936

-#endif

79937

- memcpy (where, *p_argv.c, (*ptr)->size);

79938

- next_arg.ul += words;

79939

- if (next_arg.ul == gpr_end.ul)

79940

- next_arg.ul = rest.ul;

79941

- }

79942

- break;

79943

-

79944

- case FFI_TYPE_UINT8:

79945

- gprvalue = **p_argv.uc;

79946

- goto putgpr;

79947

- case FFI_TYPE_SINT8:

79948

- gprvalue = **p_argv.sc;

79949

- goto putgpr;

79950

- case FFI_TYPE_UINT16:

79951

- gprvalue = **p_argv.us;

79952

- goto putgpr;

79953

- case FFI_TYPE_SINT16:

79954

- gprvalue = **p_argv.ss;

79955

- goto putgpr;

79956

- case FFI_TYPE_UINT32:

79957

- gprvalue = **p_argv.ui;

79958

- goto putgpr;

79959

- case FFI_TYPE_INT:

79960

- case FFI_TYPE_SINT32:

79961

- gprvalue = **p_argv.si;

79962

- goto putgpr;

79963

-

79964

- case FFI_TYPE_UINT64:

79965

- case FFI_TYPE_SINT64:

79966

- case FFI_TYPE_POINTER:

79967

- gprvalue = **p_argv.ul;

79968

- putgpr:

79969

- *next_arg.ul++ = gprvalue;

79970

- if (next_arg.ul == gpr_end.ul)

79971

- next_arg.ul = rest.ul;

79972

- break;

79973

- }

79974

- }

79975

-

79976

- FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS

79977

- || (next_arg.ul >= gpr_base.ul

79978

- && next_arg.ul <= gpr_base.ul + 4));

79979

-}

79980

-

79981

-

79982

-

79983

/* Perform machine dependent cif processing */

79984

-ffi_status

79985

+ffi_status FFI_HIDDEN

79986

ffi_prep_cif_machdep (ffi_cif *cif)

79987

{

79988

- /* All this is for the SYSV and LINUX64 ABI. */

79989

- int i;

79990

- ffi_type **ptr;

79991

- unsigned bytes;

79992

- int fparg_count = 0, intarg_count = 0;

79993

- unsigned flags = 0;

79994

- unsigned struct_copy_size = 0;

79995

- unsigned type = cif->rtype->type;

79996

- unsigned size = cif->rtype->size;

79997

-

79998

- if (cif->abi != FFI_LINUX64)

79999

- {

80000

- /* All the machine-independent calculation of cif->bytes will be wrong.

80001

- Redo the calculation for SYSV. */

80002

-

80003

- /* Space for the frame pointer, callee's LR, and the asm's temp regs. */

80004

- bytes = (2 + ASM_NEEDS_REGISTERS) * sizeof (int);

80005

-

80006

- /* Space for the GPR registers. */

80007

- bytes += NUM_GPR_ARG_REGISTERS * sizeof (int);

80008

- }

80009

- else

80010

- {

80011

- /* 64-bit ABI. */

80012

-

80013

- /* Space for backchain, CR, LR, cc/ld doubleword, TOC and the asm's temp

80014

- regs. */

80015

- bytes = (6 + ASM_NEEDS_REGISTERS64) * sizeof (long);

80016

-

80017

- /* Space for the mandatory parm save area and general registers. */

80018

- bytes += 2 * NUM_GPR_ARG_REGISTERS64 * sizeof (long);

80019

- }

80020

-

80021

- /* Return value handling. The rules for SYSV are as follows:

80022

- - 32-bit (or less) integer values are returned in gpr3;

80023

- - Structures of size <= 4 bytes also returned in gpr3;

80024

- - 64-bit integer values and structures between 5 and 8 bytes are returned

80025

- in gpr3 and gpr4;

80026

- - Single/double FP values are returned in fpr1;

80027

- - Larger structures are allocated space and a pointer is passed as

80028

- the first argument.

80029

- - long doubles (if not equivalent to double) are returned in

80030

- fpr1,fpr2 for Linux and as for large structs for SysV.

80031

- For LINUX64:

80032

- - integer values in gpr3;

80033

- - Structures/Unions by reference;

80034

- - Single/double FP values in fpr1, long double in fpr1,fpr2.

80035

- - soft-float float/doubles are treated as UINT32/UINT64 respectivley.

80036

- - soft-float long doubles are returned in gpr3-gpr6. */

80037

- /* First translate for softfloat/nonlinux */

80038

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

80039

- if (type == FFI_TYPE_FLOAT)

80040

- type = FFI_TYPE_UINT32;

80041

- if (type == FFI_TYPE_DOUBLE)

80042

- type = FFI_TYPE_UINT64;

80043

- if (type == FFI_TYPE_LONGDOUBLE)

80044

- type = FFI_TYPE_UINT128;

80045

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

80046

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80047

- if (type == FFI_TYPE_LONGDOUBLE)

80048

- type = FFI_TYPE_STRUCT;

80049

+#ifdef POWERPC64

80050

+ return ffi_prep_cif_linux64 (cif);

80051

+#else

80052

+ return ffi_prep_cif_sysv (cif);

80053

#endif

80054

- }

80055

+}

80056

80057

- switch (type)

80058

- {

80059

-#ifndef __NO_FPRS__

80060

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80061

- case FFI_TYPE_LONGDOUBLE:

80062

- flags |= FLAG_RETURNS_128BITS;

80063

- /* Fall through. */

80064

+ffi_status FFI_HIDDEN

80065

+ffi_prep_cif_machdep_var (ffi_cif *cif,

80066

+ unsigned int nfixedargs MAYBE_UNUSED,

80067

+ unsigned int ntotalargs MAYBE_UNUSED)

80068

+{

80069

+#ifdef POWERPC64

80070

+ return ffi_prep_cif_linux64_var (cif, nfixedargs, ntotalargs);

80071

+#else

80072

+ return ffi_prep_cif_sysv (cif);

80073

#endif

80074

- case FFI_TYPE_DOUBLE:

80075

- flags |= FLAG_RETURNS_64BITS;

80076

- /* Fall through. */

80077

- case FFI_TYPE_FLOAT:

80078

- flags |= FLAG_RETURNS_FP;

80079

- break;

80080

-#endif

80081

-

80082

- case FFI_TYPE_UINT128:

80083

- flags |= FLAG_RETURNS_128BITS;

80084

- /* Fall through. */

80085

- case FFI_TYPE_UINT64:

80086

- case FFI_TYPE_SINT64:

80087

- flags |= FLAG_RETURNS_64BITS;

80088

- break;

80089

-

80090

- case FFI_TYPE_STRUCT:

80091

- /*

80092

- * The final SYSV ABI says that structures smaller or equal 8 bytes

80093

- * are returned in r3/r4. The FFI_GCC_SYSV ABI instead returns them

80094

- * in memory.

80095

- *

80096

- * NOTE: The assembly code can safely assume that it just needs to

80097

- * store both r3 and r4 into a 8-byte word-aligned buffer, as

80098

- * we allocate a temporary buffer in ffi_call() if this flag is

80099

- * set.

80100

- */

80101

- if (cif->abi == FFI_SYSV && size <= 8)

80102

- flags |= FLAG_RETURNS_SMST;

80103

- intarg_count++;

80104

- flags |= FLAG_RETVAL_REFERENCE;

80105

- /* Fall through. */

80106

- case FFI_TYPE_VOID:

80107

- flags |= FLAG_RETURNS_NOTHING;

80108

- break;

80109

-

80110

- default:

80111

- /* Returns 32-bit integer, or similar. Nothing to do here. */

80112

- break;

80113

- }

80114

-

80115

- if (cif->abi != FFI_LINUX64)

80116

- /* The first NUM_GPR_ARG_REGISTERS words of integer arguments, and the

80117

- first NUM_FPR_ARG_REGISTERS fp arguments, go in registers; the rest

80118

- goes on the stack. Structures and long doubles (if not equivalent

80119

- to double) are passed as a pointer to a copy of the structure.

80120

- Stuff on the stack needs to keep proper alignment. */

80121

- for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

80122

- {

80123

- unsigned short typenum = (*ptr)->type;

80124

-

80125

- /* We may need to handle some values depending on ABI */

80126

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

80127

- if (typenum == FFI_TYPE_FLOAT)

80128

- typenum = FFI_TYPE_UINT32;

80129

- if (typenum == FFI_TYPE_DOUBLE)

80130

- typenum = FFI_TYPE_UINT64;

80131

- if (typenum == FFI_TYPE_LONGDOUBLE)

80132

- typenum = FFI_TYPE_UINT128;

80133

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

80134

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80135

- if (typenum == FFI_TYPE_LONGDOUBLE)

80136

- typenum = FFI_TYPE_STRUCT;

80137

-#endif

80138

- }

80139

-

80140

- switch (typenum) {

80141

-#ifndef __NO_FPRS__

80142

- case FFI_TYPE_FLOAT:

80143

- fparg_count++;

80144

- /* floating singles are not 8-aligned on stack */

80145

- break;

80146

-

80147

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80148

- case FFI_TYPE_LONGDOUBLE:

80149

- fparg_count++;

80150

- /* Fall thru */

80151

-#endif

80152

- case FFI_TYPE_DOUBLE:

80153

- fparg_count++;

80154

- /* If this FP arg is going on the stack, it must be

80155

- 8-byte-aligned. */

80156

- if (fparg_count > NUM_FPR_ARG_REGISTERS

80157

- && intarg_count >= NUM_GPR_ARG_REGISTERS

80158

- && intarg_count % 2 != 0)

80159

- intarg_count++;

80160

- break;

80161

-#endif

80162

- case FFI_TYPE_UINT128:

80163

- /*

80164

- * A long double in FFI_LINUX_SOFT_FLOAT can use only a set

80165

- * of four consecutive gprs. If we do not have enough, we

80166

- * have to adjust the intarg_count value.

80167

- */

80168

- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3

80169

- && intarg_count < NUM_GPR_ARG_REGISTERS)

80170

- intarg_count = NUM_GPR_ARG_REGISTERS;

80171

- intarg_count += 4;

80172

- break;

80173

-

80174

- case FFI_TYPE_UINT64:

80175

- case FFI_TYPE_SINT64:

80176

- /* 'long long' arguments are passed as two words, but

80177

- either both words must fit in registers or both go

80178

- on the stack. If they go on the stack, they must

80179

- be 8-byte-aligned.

80180

-

80181

- Also, only certain register pairs can be used for

80182

- passing long long int -- specifically (r3,r4), (r5,r6),

80183

- (r7,r8), (r9,r10).

80184

- */

80185

- if (intarg_count == NUM_GPR_ARG_REGISTERS-1

80186

- || intarg_count % 2 != 0)

80187

- intarg_count++;

80188

- intarg_count += 2;

80189

- break;

80190

-

80191

- case FFI_TYPE_STRUCT:

80192

- /* We must allocate space for a copy of these to enforce

80193

- pass-by-value. Pad the space up to a multiple of 16

80194

- bytes (the maximum alignment required for anything under

80195

- the SYSV ABI). */

80196

- struct_copy_size += ((*ptr)->size + 15) & ~0xF;

80197

- /* Fall through (allocate space for the pointer). */

80198

-

80199

- case FFI_TYPE_POINTER:

80200

- case FFI_TYPE_INT:

80201

- case FFI_TYPE_UINT32:

80202

- case FFI_TYPE_SINT32:

80203

- case FFI_TYPE_UINT16:

80204

- case FFI_TYPE_SINT16:

80205

- case FFI_TYPE_UINT8:

80206

- case FFI_TYPE_SINT8:

80207

- /* Everything else is passed as a 4-byte word in a GPR, either

80208

- the object itself or a pointer to it. */

80209

- intarg_count++;

80210

- break;

80211

- default:

80212

- FFI_ASSERT (0);

80213

- }

80214

- }

80215

- else

80216

- for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

80217

- {

80218

- switch ((*ptr)->type)

80219

- {

80220

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80221

- case FFI_TYPE_LONGDOUBLE:

80222

- if (cif->abi == FFI_LINUX_SOFT_FLOAT)

80223

- intarg_count += 4;

80224

- else

80225

- {

80226

- fparg_count += 2;

80227

- intarg_count += 2;

80228

- }

80229

- break;

80230

-#endif

80231

- case FFI_TYPE_FLOAT:

80232

- case FFI_TYPE_DOUBLE:

80233

- fparg_count++;

80234

- intarg_count++;

80235

- break;

80236

-

80237

- case FFI_TYPE_STRUCT:

80238

- intarg_count += ((*ptr)->size + 7) / 8;

80239

- break;

80240

-

80241

- case FFI_TYPE_POINTER:

80242

- case FFI_TYPE_UINT64:

80243

- case FFI_TYPE_SINT64:

80244

- case FFI_TYPE_INT:

80245

- case FFI_TYPE_UINT32:

80246

- case FFI_TYPE_SINT32:

80247

- case FFI_TYPE_UINT16:

80248

- case FFI_TYPE_SINT16:

80249

- case FFI_TYPE_UINT8:

80250

- case FFI_TYPE_SINT8:

80251

- /* Everything else is passed as a 8-byte word in a GPR, either

80252

- the object itself or a pointer to it. */

80253

- intarg_count++;

80254

- break;

80255

- default:

80256

- FFI_ASSERT (0);

80257

- }

80258

- }

80259

-

80260

-#ifndef __NO_FPRS__

80261

- if (fparg_count != 0)

80262

- flags |= FLAG_FP_ARGUMENTS;

80263

-#endif

80264

- if (intarg_count > 4)

80265

- flags |= FLAG_4_GPR_ARGUMENTS;

80266

- if (struct_copy_size != 0)

80267

- flags |= FLAG_ARG_NEEDS_COPY;

80268

-

80269

- if (cif->abi != FFI_LINUX64)

80270

- {

80271

-#ifndef __NO_FPRS__

80272

- /* Space for the FPR registers, if needed. */

80273

- if (fparg_count != 0)

80274

- bytes += NUM_FPR_ARG_REGISTERS * sizeof (double);

80275

-#endif

80276

-

80277

- /* Stack space. */

80278

- if (intarg_count > NUM_GPR_ARG_REGISTERS)

80279

- bytes += (intarg_count - NUM_GPR_ARG_REGISTERS) * sizeof (int);

80280

-#ifndef __NO_FPRS__

80281

- if (fparg_count > NUM_FPR_ARG_REGISTERS)

80282

- bytes += (fparg_count - NUM_FPR_ARG_REGISTERS) * sizeof (double);

80283

-#endif

80284

- }

80285

- else

80286

- {

80287

-#ifndef __NO_FPRS__

80288

- /* Space for the FPR registers, if needed. */

80289

- if (fparg_count != 0)

80290

- bytes += NUM_FPR_ARG_REGISTERS64 * sizeof (double);

80291

-#endif

80292

-

80293

- /* Stack space. */

80294

- if (intarg_count > NUM_GPR_ARG_REGISTERS64)

80295

- bytes += (intarg_count - NUM_GPR_ARG_REGISTERS64) * sizeof (long);

80296

- }

80297

-

80298

- /* The stack space allocated needs to be a multiple of 16 bytes. */

80299

- bytes = (bytes + 15) & ~0xF;

80300

-

80301

- /* Add in the space for the copied structures. */

80302

- bytes += struct_copy_size;

80303

-

80304

- cif->flags = flags;

80305

- cif->bytes = bytes;

80306

-

80307

- return FFI_OK;

80308

}

80309

80310

-extern void ffi_call_SYSV(extended_cif *, unsigned, unsigned, unsigned *,

80311

- void (*fn)(void));

80312

-extern void FFI_HIDDEN ffi_call_LINUX64(extended_cif *, unsigned long,

80313

- unsigned long, unsigned long *,

80314

- void (*fn)(void));

80315

-

80316

void

80317

ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue)

80318

{

80319

- /*

80320

- * The final SYSV ABI says that structures smaller or equal 8 bytes

80321

- * are returned in r3/r4. The FFI_GCC_SYSV ABI instead returns them

80322

- * in memory.

80323

- *

80324

- * Just to keep things simple for the assembly code, we will always

80325

- * bounce-buffer struct return values less than or equal to 8 bytes.

80326

- * This allows the ASM to handle SYSV small structures by directly

80327

- * writing r3 and r4 to memory without worrying about struct size.

80328

- */

80329

- unsigned int smst_buffer[2];

80330

+ /* The final SYSV ABI says that structures smaller or equal 8 bytes

80331

+ are returned in r3/r4. A draft ABI used by linux instead returns

80332

+ them in memory.

80333

+

80334

+ We bounce-buffer SYSV small struct return values so that sysv.S

80335

+ can write r3 and r4 to memory without worrying about struct size.

80336

+

80337

+ For ELFv2 ABI, use a bounce buffer for homogeneous structs too,

80338

+ for similar reasons. */

80339

+ unsigned long smst_buffer[8];

80340

extended_cif ecif;

80341

- unsigned int rsize = 0;

80342

80343

ecif.cif = cif;

80344

ecif.avalue = avalue;

80345

80346

- /* Ensure that we have a valid struct return value */

80347

ecif.rvalue = rvalue;

80348

- if (cif->rtype->type == FFI_TYPE_STRUCT) {

80349

- rsize = cif->rtype->size;

80350

- if (rsize <= 8)

80351

- ecif.rvalue = smst_buffer;

80352

- else if (!rvalue)

80353

- ecif.rvalue = alloca(rsize);

80354

- }

80355

+ if ((cif->flags & FLAG_RETURNS_SMST) != 0)

80356

+ ecif.rvalue = smst_buffer;

80357

+ /* Ensure that we have a valid struct return value.

80358

+ FIXME: Isn't this just papering over a user problem? */

80359

+ else if (!rvalue && cif->rtype->type == FFI_TYPE_STRUCT)

80360

+ ecif.rvalue = alloca (cif->rtype->size);

80361

80362

- switch (cif->abi)

80363

- {

80364

-#ifndef POWERPC64

80365

-# ifndef __NO_FPRS__

80366

- case FFI_SYSV:

80367

- case FFI_GCC_SYSV:

80368

- case FFI_LINUX:

80369

-# endif

80370

- case FFI_LINUX_SOFT_FLOAT:

80371

- ffi_call_SYSV (&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn);

80372

- break;

80373

+#ifdef POWERPC64

80374

+ ffi_call_LINUX64 (&ecif, -(long) cif->bytes, cif->flags, ecif.rvalue, fn);

80375

#else

80376

- case FFI_LINUX64:

80377

- ffi_call_LINUX64 (&ecif, -(long) cif->bytes, cif->flags, ecif.rvalue, fn);

80378

- break;

80379

+ ffi_call_SYSV (&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn);

80380

#endif

80381

- default:

80382

- FFI_ASSERT (0);

80383

- break;

80384

- }

80385

80386

/* Check for a bounce-buffered return value */

80387

if (rvalue && ecif.rvalue == smst_buffer)

80388

- memcpy(rvalue, smst_buffer, rsize);

80389

+ {

80390

+ unsigned int rsize = cif->rtype->size;

80391

+#ifndef __LITTLE_ENDIAN__

80392

+ /* The SYSV ABI returns a structure of up to 4 bytes in size

80393

+ left-padded in r3. */

80394

+# ifndef POWERPC64

80395

+ if (rsize <= 4)

80396

+ memcpy (rvalue, (char *) smst_buffer + 4 - rsize, rsize);

80397

+ else

80398

+# endif

80399

+ /* The SYSV ABI returns a structure of up to 8 bytes in size

80400

+ left-padded in r3/r4, and the ELFv2 ABI similarly returns a

80401

+ structure of up to 8 bytes in size left-padded in r3. */

80402

+ if (rsize <= 8)

80403

+ memcpy (rvalue, (char *) smst_buffer + 8 - rsize, rsize);

80404

+ else

80405

+#endif

80406

+ memcpy (rvalue, smst_buffer, rsize);

80407

+ }

80408

}

80409

80410

80411

-#ifndef POWERPC64

80412

-#define MIN_CACHE_LINE_SIZE 8

80413

-

80414

-static void

80415

-flush_icache (char *wraddr, char *xaddr, int size)

80416

-{

80417

- int i;

80418

- for (i = 0; i < size; i += MIN_CACHE_LINE_SIZE)

80419

- __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;"

80420

- : : "r" (xaddr + i), "r" (wraddr + i) : "memory");

80421

- __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;" "sync;" "isync;"

80422

- : : "r"(xaddr + size - 1), "r"(wraddr + size - 1)

80423

- : "memory");

80424

-}

80425

-#endif

80426

-

80427

ffi_status

80428

ffi_prep_closure_loc (ffi_closure *closure,

80429

ffi_cif *cif,

80430

@@ -995,487 +134,8 @@

80431

void *codeloc)

80432

{

80433

#ifdef POWERPC64

80434

- void **tramp = (void **) &closure->tramp[0];

80435

-

80436

- if (cif->abi != FFI_LINUX64)

80437

- return FFI_BAD_ABI;

80438

- /* Copy function address and TOC from ffi_closure_LINUX64. */

80439

- memcpy (tramp, (char *) ffi_closure_LINUX64, 16);

80440

- tramp[2] = codeloc;

80441

+ return ffi_prep_closure_loc_linux64 (closure, cif, fun, user_data, codeloc);

80442

#else

80443

- unsigned int *tramp;

80444

-

80445

- if (! (cif->abi == FFI_GCC_SYSV

80446

- || cif->abi == FFI_SYSV

80447

- || cif->abi == FFI_LINUX

80448

- || cif->abi == FFI_LINUX_SOFT_FLOAT))

80449

- return FFI_BAD_ABI;

80450

-

80451

- tramp = (unsigned int *) &closure->tramp[0];

80452

- tramp[0] = 0x7c0802a6; /* mflr r0 */

80453

- tramp[1] = 0x4800000d; /* bl 10 <trampoline_initial+0x10> */

80454

- tramp[4] = 0x7d6802a6; /* mflr r11 */

80455

- tramp[5] = 0x7c0803a6; /* mtlr r0 */

80456

- tramp[6] = 0x800b0000; /* lwz r0,0(r11) */

80457

- tramp[7] = 0x816b0004; /* lwz r11,4(r11) */

80458

- tramp[8] = 0x7c0903a6; /* mtctr r0 */

80459

- tramp[9] = 0x4e800420; /* bctr */

80460

- *(void **) &tramp[2] = (void *) ffi_closure_SYSV; /* function */

80461

- *(void **) &tramp[3] = codeloc; /* context */

80462

-

80463

- /* Flush the icache. */

80464

- flush_icache ((char *)tramp, (char *)codeloc, FFI_TRAMPOLINE_SIZE);

80465

+ return ffi_prep_closure_loc_sysv (closure, cif, fun, user_data, codeloc);

80466

#endif

80467

-

80468

- closure->cif = cif;

80469

- closure->fun = fun;

80470

- closure->user_data = user_data;

80471

-

80472

- return FFI_OK;

80473

}

80474

-

80475

-typedef union

80476

-{

80477

- float f;

80478

- double d;

80479

-} ffi_dblfl;

80480

-

80481

-int ffi_closure_helper_SYSV (ffi_closure *, void *, unsigned long *,

80482

- ffi_dblfl *, unsigned long *);

80483

-

80484

-/* Basically the trampoline invokes ffi_closure_SYSV, and on

80485

- * entry, r11 holds the address of the closure.

80486

- * After storing the registers that could possibly contain

80487

- * parameters to be passed into the stack frame and setting

80488

- * up space for a return value, ffi_closure_SYSV invokes the

80489

- * following helper function to do most of the work

80490

- */

80491

-

80492

-int

80493

-ffi_closure_helper_SYSV (ffi_closure *closure, void *rvalue,

80494

- unsigned long *pgr, ffi_dblfl *pfr,

80495

- unsigned long *pst)

80496

-{

80497

- /* rvalue is the pointer to space for return value in closure assembly */

80498

- /* pgr is the pointer to where r3-r10 are stored in ffi_closure_SYSV */

80499

- /* pfr is the pointer to where f1-f8 are stored in ffi_closure_SYSV */

80500

- /* pst is the pointer to outgoing parameter stack in original caller */

80501

-

80502

- void ** avalue;

80503

- ffi_type ** arg_types;

80504

- long i, avn;

80505

-#ifndef __NO_FPRS__

80506

- long nf = 0; /* number of floating registers already used */

80507

-#endif

80508

- long ng = 0; /* number of general registers already used */

80509

-

80510

- ffi_cif *cif = closure->cif;

80511

- unsigned size = cif->rtype->size;

80512

- unsigned short rtypenum = cif->rtype->type;

80513

-

80514

- avalue = alloca (cif->nargs * sizeof (void *));

80515

-

80516

- /* First translate for softfloat/nonlinux */

80517

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

80518

- if (rtypenum == FFI_TYPE_FLOAT)

80519

- rtypenum = FFI_TYPE_UINT32;

80520

- if (rtypenum == FFI_TYPE_DOUBLE)

80521

- rtypenum = FFI_TYPE_UINT64;

80522

- if (rtypenum == FFI_TYPE_LONGDOUBLE)

80523

- rtypenum = FFI_TYPE_UINT128;

80524

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

80525

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80526

- if (rtypenum == FFI_TYPE_LONGDOUBLE)

80527

- rtypenum = FFI_TYPE_STRUCT;

80528

-#endif

80529

- }

80530

-

80531

-

80532

- /* Copy the caller's structure return value address so that the closure

80533

- returns the data directly to the caller.

80534

- For FFI_SYSV the result is passed in r3/r4 if the struct size is less

80535

- or equal 8 bytes. */

80536

- if (rtypenum == FFI_TYPE_STRUCT && ((cif->abi != FFI_SYSV) || (size > 8))) {

80537

- rvalue = (void *) *pgr;

80538

- ng++;

80539

- pgr++;

80540

- }

80541

-

80542

- i = 0;

80543

- avn = cif->nargs;

80544

- arg_types = cif->arg_types;

80545

-

80546

- /* Grab the addresses of the arguments from the stack frame. */

80547

- while (i < avn) {

80548

- unsigned short typenum = arg_types[i]->type;

80549

-

80550

- /* We may need to handle some values depending on ABI */

80551

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

80552

- if (typenum == FFI_TYPE_FLOAT)

80553

- typenum = FFI_TYPE_UINT32;

80554

- if (typenum == FFI_TYPE_DOUBLE)

80555

- typenum = FFI_TYPE_UINT64;

80556

- if (typenum == FFI_TYPE_LONGDOUBLE)

80557

- typenum = FFI_TYPE_UINT128;

80558

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

80559

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80560

- if (typenum == FFI_TYPE_LONGDOUBLE)

80561

- typenum = FFI_TYPE_STRUCT;

80562

-#endif

80563

- }

80564

-

80565

- switch (typenum) {

80566

-#ifndef __NO_FPRS__

80567

- case FFI_TYPE_FLOAT:

80568

- /* unfortunately float values are stored as doubles

80569

- * in the ffi_closure_SYSV code (since we don't check

80570

- * the type in that routine).

80571

- */

80572

-

80573

- /* there are 8 64bit floating point registers */

80574

-

80575

- if (nf < 8)

80576

- {

80577

- double temp = pfr->d;

80578

- pfr->f = (float) temp;

80579

- avalue[i] = pfr;

80580

- nf++;

80581

- pfr++;

80582

- }

80583

- else

80584

- {

80585

- /* FIXME? here we are really changing the values

80586

- * stored in the original calling routines outgoing

80587

- * parameter stack. This is probably a really

80588

- * naughty thing to do but...

80589

- */

80590

- avalue[i] = pst;

80591

- pst += 1;

80592

- }

80593

- break;

80594

-

80595

- case FFI_TYPE_DOUBLE:

80596

- /* On the outgoing stack all values are aligned to 8 */

80597

- /* there are 8 64bit floating point registers */

80598

-

80599

- if (nf < 8)

80600

- {

80601

- avalue[i] = pfr;

80602

- nf++;

80603

- pfr++;

80604

- }

80605

- else

80606

- {

80607

- if (((long) pst) & 4)

80608

- pst++;

80609

- avalue[i] = pst;

80610

- pst += 2;

80611

- }

80612

- break;

80613

-

80614

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80615

- case FFI_TYPE_LONGDOUBLE:

80616

- if (nf < 7)

80617

- {

80618

- avalue[i] = pfr;

80619

- pfr += 2;

80620

- nf += 2;

80621

- }

80622

- else

80623

- {

80624

- if (((long) pst) & 4)

80625

- pst++;

80626

- avalue[i] = pst;

80627

- pst += 4;

80628

- nf = 8;

80629

- }

80630

- break;

80631

-#endif

80632

-#endif /* have FPRS */

80633

-

80634

- case FFI_TYPE_UINT128:

80635

- /*

80636

- * Test if for the whole long double, 4 gprs are available.

80637

- * otherwise the stuff ends up on the stack.

80638

- */

80639

- if (ng < 5) {

80640

- avalue[i] = pgr;

80641

- pgr += 4;

80642

- ng += 4;

80643

- } else {

80644

- avalue[i] = pst;

80645

- pst += 4;

80646

- ng = 8+4;

80647

- }

80648

- break;

80649

-

80650

- case FFI_TYPE_SINT8:

80651

- case FFI_TYPE_UINT8:

80652

-#ifndef __LITTLE_ENDIAN__

80653

- /* there are 8 gpr registers used to pass values */

80654

- if (ng < 8)

80655

- {

80656

- avalue[i] = (char *) pgr + 3;

80657

- ng++;

80658

- pgr++;

80659

- }

80660

- else

80661

- {

80662

- avalue[i] = (char *) pst + 3;

80663

- pst++;

80664

- }

80665

- break;

80666

-#endif

80667

- case FFI_TYPE_SINT16:

80668

- case FFI_TYPE_UINT16:

80669

-#ifndef __LITTLE_ENDIAN__

80670

- /* there are 8 gpr registers used to pass values */

80671

- if (ng < 8)

80672

- {

80673

- avalue[i] = (char *) pgr + 2;

80674

- ng++;

80675

- pgr++;

80676

- }

80677

- else

80678

- {

80679

- avalue[i] = (char *) pst + 2;

80680

- pst++;

80681

- }

80682

- break;

80683

-#endif

80684

- case FFI_TYPE_SINT32:

80685

- case FFI_TYPE_UINT32:

80686

- case FFI_TYPE_POINTER:

80687

- /* there are 8 gpr registers used to pass values */

80688

- if (ng < 8)

80689

- {

80690

- avalue[i] = pgr;

80691

- ng++;

80692

- pgr++;

80693

- }

80694

- else

80695

- {

80696

- avalue[i] = pst;

80697

- pst++;

80698

- }

80699

- break;

80700

-

80701

- case FFI_TYPE_STRUCT:

80702

- /* Structs are passed by reference. The address will appear in a

80703

- gpr if it is one of the first 8 arguments. */

80704

- if (ng < 8)

80705

- {

80706

- avalue[i] = (void *) *pgr;

80707

- ng++;

80708

- pgr++;

80709

- }

80710

- else

80711

- {

80712

- avalue[i] = (void *) *pst;

80713

- pst++;

80714

- }

80715

- break;

80716

-

80717

- case FFI_TYPE_SINT64:

80718

- case FFI_TYPE_UINT64:

80719

- /* passing long long ints are complex, they must

80720

- * be passed in suitable register pairs such as

80721

- * (r3,r4) or (r5,r6) or (r6,r7), or (r7,r8) or (r9,r10)

80722

- * and if the entire pair aren't available then the outgoing

80723

- * parameter stack is used for both but an alignment of 8

80724

- * must will be kept. So we must either look in pgr

80725

- * or pst to find the correct address for this type

80726

- * of parameter.

80727

- */

80728

- if (ng < 7)

80729

- {

80730

- if (ng & 0x01)

80731

- {

80732

- /* skip r4, r6, r8 as starting points */

80733

- ng++;

80734

- pgr++;

80735

- }

80736

- avalue[i] = pgr;

80737

- ng += 2;

80738

- pgr += 2;

80739

- }

80740

- else

80741

- {

80742

- if (((long) pst) & 4)

80743

- pst++;

80744

- avalue[i] = pst;

80745

- pst += 2;

80746

- ng = 8;

80747

- }

80748

- break;

80749

-

80750

- default:

80751

- FFI_ASSERT (0);

80752

- }

80753

-

80754

- i++;

80755

- }

80756

-

80757

-

80758

- (closure->fun) (cif, rvalue, avalue, closure->user_data);

80759

-

80760

- /* Tell ffi_closure_SYSV how to perform return type promotions.

80761

- Because the FFI_SYSV ABI returns the structures <= 8 bytes in r3/r4

80762

- we have to tell ffi_closure_SYSV how to treat them. We combine the base

80763

- type FFI_SYSV_TYPE_SMALL_STRUCT - 1 with the size of the struct.

80764

- So a one byte struct gets the return type 16. Return type 1 to 15 are

80765

- already used and we never have a struct with size zero. That is the reason

80766

- for the subtraction of 1. See the comment in ffitarget.h about ordering.

80767

- */

80768

- if (cif->abi == FFI_SYSV && rtypenum == FFI_TYPE_STRUCT && size <= 8)

80769

- return (FFI_SYSV_TYPE_SMALL_STRUCT - 1) + size;

80770

- return rtypenum;

80771

-}

80772

-

80773

-int FFI_HIDDEN ffi_closure_helper_LINUX64 (ffi_closure *, void *,

80774

- unsigned long *, ffi_dblfl *);

80775

-

80776

-int FFI_HIDDEN

80777

-ffi_closure_helper_LINUX64 (ffi_closure *closure, void *rvalue,

80778

- unsigned long *pst, ffi_dblfl *pfr)

80779

-{

80780

- /* rvalue is the pointer to space for return value in closure assembly */

80781

- /* pst is the pointer to parameter save area

80782

- (r3-r10 are stored into its first 8 slots by ffi_closure_LINUX64) */

80783

- /* pfr is the pointer to where f1-f13 are stored in ffi_closure_LINUX64 */

80784

-

80785

- void **avalue;

80786

- ffi_type **arg_types;

80787

- long i, avn;

80788

- ffi_cif *cif;

80789

- ffi_dblfl *end_pfr = pfr + NUM_FPR_ARG_REGISTERS64;

80790

-

80791

- cif = closure->cif;

80792

- avalue = alloca (cif->nargs * sizeof (void *));

80793

-

80794

- /* Copy the caller's structure return value address so that the closure

80795

- returns the data directly to the caller. */

80796

- if (cif->rtype->type == FFI_TYPE_STRUCT)

80797

- {

80798

- rvalue = (void *) *pst;

80799

- pst++;

80800

- }

80801

-

80802

- i = 0;

80803

- avn = cif->nargs;

80804

- arg_types = cif->arg_types;

80805

-

80806

- /* Grab the addresses of the arguments from the stack frame. */

80807

- while (i < avn)

80808

- {

80809

- switch (arg_types[i]->type)

80810

- {

80811

- case FFI_TYPE_SINT8:

80812

- case FFI_TYPE_UINT8:

80813

-#ifndef __LITTLE_ENDIAN__

80814

- avalue[i] = (char *) pst + 7;

80815

- pst++;

80816

- break;

80817

-#endif

80818

- case FFI_TYPE_SINT16:

80819

- case FFI_TYPE_UINT16:

80820

-#ifndef __LITTLE_ENDIAN__

80821

- avalue[i] = (char *) pst + 6;

80822

- pst++;

80823

- break;

80824

-#endif

80825

- case FFI_TYPE_SINT32:

80826

- case FFI_TYPE_UINT32:

80827

-#ifndef __LITTLE_ENDIAN__

80828

- avalue[i] = (char *) pst + 4;

80829

- pst++;

80830

- break;

80831

-#endif

80832

- case FFI_TYPE_SINT64:

80833

- case FFI_TYPE_UINT64:

80834

- case FFI_TYPE_POINTER:

80835

- avalue[i] = pst;

80836

- pst++;

80837

- break;

80838

-

80839

- case FFI_TYPE_STRUCT:

80840

-#ifndef __LITTLE_ENDIAN__

80841

- /* Structures with size less than eight bytes are passed

80842

- left-padded. */

80843

- if (arg_types[i]->size < 8)

80844

- avalue[i] = (char *) pst + 8 - arg_types[i]->size;

80845

- else

80846

-#endif

80847

- avalue[i] = pst;

80848

- pst += (arg_types[i]->size + 7) / 8;

80849

- break;

80850

-

80851

- case FFI_TYPE_FLOAT:

80852

- /* unfortunately float values are stored as doubles

80853

- * in the ffi_closure_LINUX64 code (since we don't check

80854

- * the type in that routine).

80855

- */

80856

-

80857

- /* there are 13 64bit floating point registers */

80858

-

80859

- if (pfr < end_pfr)

80860

- {

80861

- double temp = pfr->d;

80862

- pfr->f = (float) temp;

80863

- avalue[i] = pfr;

80864

- pfr++;

80865

- }

80866

- else

80867

- avalue[i] = pst;

80868

- pst++;

80869

- break;

80870

-

80871

- case FFI_TYPE_DOUBLE:

80872

- /* On the outgoing stack all values are aligned to 8 */

80873

- /* there are 13 64bit floating point registers */

80874

-

80875

- if (pfr < end_pfr)

80876

- {

80877

- avalue[i] = pfr;

80878

- pfr++;

80879

- }

80880

- else

80881

- avalue[i] = pst;

80882

- pst++;

80883

- break;

80884

-

80885

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

80886

- case FFI_TYPE_LONGDOUBLE:

80887

- if (pfr + 1 < end_pfr)

80888

- {

80889

- avalue[i] = pfr;

80890

- pfr += 2;

80891

- }

80892

- else

80893

- {

80894

- if (pfr < end_pfr)

80895

- {

80896

- /* Passed partly in f13 and partly on the stack.

80897

- Move it all to the stack. */

80898

- *pst = *(unsigned long *) pfr;

80899

- pfr++;

80900

- }

80901

- avalue[i] = pst;

80902

- }

80903

- pst += 2;

80904

- break;

80905

-#endif

80906

-

80907

- default:

80908

- FFI_ASSERT (0);

80909

- }

80910

-

80911

- i++;

80912

- }

80913

-

80914

-

80915

- (closure->fun) (cif, rvalue, avalue, closure->user_data);

80916

-

80917

- /* Tell ffi_closure_LINUX64 how to perform return type promotions. */

80918

- return cif->rtype->type;

80919

-}

80920

Index: libffi/src/powerpc/sysv.S

80921

===================================================================

80922

--- a/src/libffi/src/powerpc/sysv.S (.../tags/gcc_4_8_2_release)

80923

+++ b/src/libffi/src/powerpc/sysv.S (.../branches/gcc-4_8-branch)

80924

@@ -30,7 +30,7 @@

80925

#include <ffi.h>

80926

#include <powerpc/asm.h>

80927

80928

-#ifndef __powerpc64__

80929

+#ifndef POWERPC64

80930

.globl ffi_prep_args_SYSV

80931

ENTRY(ffi_call_SYSV)

80932

.LFB1:

80933

@@ -213,8 +213,8 @@

80934

.uleb128 0x1c

80935

.align 2

80936

.LEFDE1:

80937

-#endif

80938

80939

#if defined __ELF__ && defined __linux__

80940

.section .note.GNU-stack,"",@progbits

80941

#endif

80942

+#endif

80943

Index: libffi/src/powerpc/linux64_closure.S

80944

===================================================================

80945

--- a/src/libffi/src/powerpc/linux64_closure.S (.../tags/gcc_4_8_2_release)

80946

+++ b/src/libffi/src/powerpc/linux64_closure.S (.../branches/gcc-4_8-branch)

80947

@@ -30,18 +30,25 @@

80948

80949

.file "linux64_closure.S"

80950

80951

-#ifdef __powerpc64__

80952

+#ifdef POWERPC64

80953

FFI_HIDDEN (ffi_closure_LINUX64)

80954

.globl ffi_closure_LINUX64

80955

+# if _CALL_ELF == 2

80956

+ .text

80957

+ffi_closure_LINUX64:

80958

+ addis %r2, %r12, .TOC.-ffi_closure_LINUX64@ha

80959

+ addi %r2, %r2, .TOC.-ffi_closure_LINUX64@l

80960

+ .localentry ffi_closure_LINUX64, . - ffi_closure_LINUX64

80961

+# else

80962

.section ".opd","aw"

80963

.align 3

80964

ffi_closure_LINUX64:

80965

-#ifdef _CALL_LINUX

80966

+# ifdef _CALL_LINUX

80967

.quad .L.ffi_closure_LINUX64,.TOC.@tocbase,0

80968

.type ffi_closure_LINUX64,@function

80969

.text

80970

.L.ffi_closure_LINUX64:

80971

-#else

80972

+# else

80973

FFI_HIDDEN (.ffi_closure_LINUX64)

80974

.globl .ffi_closure_LINUX64

80975

.quad .ffi_closure_LINUX64,.TOC.@tocbase,0

80976

@@ -49,61 +56,101 @@

80977

.type .ffi_closure_LINUX64,@function

80978

.text

80979

.ffi_closure_LINUX64:

80980

-#endif

80981

+# endif

80982

+# endif

80983

+

80984

+# if _CALL_ELF == 2

80985

+# 32 byte special reg save area + 64 byte parm save area

80986

+# + 64 byte retval area + 13*8 fpr save area + round to 16

80987

+# define STACKFRAME 272

80988

+# define PARMSAVE 32

80989

+# define RETVAL PARMSAVE+64

80990

+# else

80991

+# 48 bytes special reg save area + 64 bytes parm save area

80992

+# + 16 bytes retval area + 13*8 bytes fpr save area + round to 16

80993

+# define STACKFRAME 240

80994

+# define PARMSAVE 48

80995

+# define RETVAL PARMSAVE+64

80996

+# endif

80997

+

80998

.LFB1:

80999

- # save general regs into parm save area

81000

- std %r3, 48(%r1)

81001

- std %r4, 56(%r1)

81002

- std %r5, 64(%r1)

81003

- std %r6, 72(%r1)

81004

+# if _CALL_ELF == 2

81005

+ ld %r12, FFI_TRAMPOLINE_SIZE(%r11) # closure->cif

81006

mflr %r0

81007

+ lwz %r12, 28(%r12) # cif->flags

81008

+ mtcrf 0x40, %r12

81009

+ addi %r12, %r1, PARMSAVE

81010

+ bt 7, .Lparmsave

81011

+ # Our caller has not allocated a parameter save area.

81012

+ # We need to allocate one here and use it to pass gprs to

81013

+ # ffi_closure_helper_LINUX64.

81014

+ addi %r12, %r1, -STACKFRAME+PARMSAVE

81015

+.Lparmsave:

81016

+ std %r0, 16(%r1)

81017

+ # Save general regs into parm save area

81018

+ std %r3, 0(%r12)

81019

+ std %r4, 8(%r12)

81020

+ std %r5, 16(%r12)

81021

+ std %r6, 24(%r12)

81022

+ std %r7, 32(%r12)

81023

+ std %r8, 40(%r12)

81024

+ std %r9, 48(%r12)

81025

+ std %r10, 56(%r12)

81026

81027

- std %r7, 80(%r1)

81028

- std %r8, 88(%r1)

81029

- std %r9, 96(%r1)

81030

- std %r10, 104(%r1)

81031

+ # load up the pointer to the parm save area

81032

+ mr %r5, %r12

81033

+# else

81034

+ mflr %r0

81035

+ # Save general regs into parm save area

81036

+ # This is the parameter save area set up by our caller.

81037

+ std %r3, PARMSAVE+0(%r1)

81038

+ std %r4, PARMSAVE+8(%r1)

81039

+ std %r5, PARMSAVE+16(%r1)

81040

+ std %r6, PARMSAVE+24(%r1)

81041

+ std %r7, PARMSAVE+32(%r1)

81042

+ std %r8, PARMSAVE+40(%r1)

81043

+ std %r9, PARMSAVE+48(%r1)

81044

+ std %r10, PARMSAVE+56(%r1)

81045

+

81046

std %r0, 16(%r1)

81047

81048

- # mandatory 48 bytes special reg save area + 64 bytes parm save area

81049

- # + 16 bytes retval area + 13*8 bytes fpr save area + round to 16

81050

- stdu %r1, -240(%r1)

81051

-.LCFI0:

81052

+ # load up the pointer to the parm save area

81053

+ addi %r5, %r1, PARMSAVE

81054

+# endif

81055

81056

# next save fpr 1 to fpr 13

81057

- stfd %f1, 128+(0*8)(%r1)

81058

- stfd %f2, 128+(1*8)(%r1)

81059

- stfd %f3, 128+(2*8)(%r1)

81060

- stfd %f4, 128+(3*8)(%r1)

81061

- stfd %f5, 128+(4*8)(%r1)

81062

- stfd %f6, 128+(5*8)(%r1)

81063

- stfd %f7, 128+(6*8)(%r1)

81064

- stfd %f8, 128+(7*8)(%r1)

81065

- stfd %f9, 128+(8*8)(%r1)

81066

- stfd %f10, 128+(9*8)(%r1)

81067

- stfd %f11, 128+(10*8)(%r1)

81068

- stfd %f12, 128+(11*8)(%r1)

81069

- stfd %f13, 128+(12*8)(%r1)

81070

+ stfd %f1, -104+(0*8)(%r1)

81071

+ stfd %f2, -104+(1*8)(%r1)

81072

+ stfd %f3, -104+(2*8)(%r1)

81073

+ stfd %f4, -104+(3*8)(%r1)

81074

+ stfd %f5, -104+(4*8)(%r1)

81075

+ stfd %f6, -104+(5*8)(%r1)

81076

+ stfd %f7, -104+(6*8)(%r1)

81077

+ stfd %f8, -104+(7*8)(%r1)

81078

+ stfd %f9, -104+(8*8)(%r1)

81079

+ stfd %f10, -104+(9*8)(%r1)

81080

+ stfd %f11, -104+(10*8)(%r1)

81081

+ stfd %f12, -104+(11*8)(%r1)

81082

+ stfd %f13, -104+(12*8)(%r1)

81083

81084

- # set up registers for the routine that actually does the work

81085

- # get the context pointer from the trampoline

81086

- mr %r3, %r11

81087

+ # load up the pointer to the saved fpr registers */

81088

+ addi %r6, %r1, -104

81089

81090

- # now load up the pointer to the result storage

81091

- addi %r4, %r1, 112

81092

+ # load up the pointer to the result storage

81093

+ addi %r4, %r1, -STACKFRAME+RETVAL

81094

81095

- # now load up the pointer to the parameter save area

81096

- # in the previous frame

81097

- addi %r5, %r1, 240 + 48

81098

+ stdu %r1, -STACKFRAME(%r1)

81099

+.LCFI0:

81100

81101

- # now load up the pointer to the saved fpr registers */

81102

- addi %r6, %r1, 128

81103

+ # get the context pointer from the trampoline

81104

+ mr %r3, %r11

81105

81106

# make the call

81107

-#ifdef _CALL_LINUX

81108

+# if defined _CALL_LINUX || _CALL_ELF == 2

81109

bl ffi_closure_helper_LINUX64

81110

-#else

81111

+# else

81112

bl .ffi_closure_helper_LINUX64

81113

-#endif

81114

+# endif

81115

.Lret:

81116

81117

# now r3 contains the return type

81118

@@ -112,10 +159,12 @@

81119

81120

# look up the proper starting point in table

81121

# by using return type as offset

81122

+ ld %r0, STACKFRAME+16(%r1)

81123

+ cmpldi %r3, FFI_V2_TYPE_SMALL_STRUCT

81124

+ bge .Lsmall

81125

mflr %r4 # move address of .Lret to r4

81126

sldi %r3, %r3, 4 # now multiply return type by 16

81127

addi %r4, %r4, .Lret_type0 - .Lret

81128

- ld %r0, 240+16(%r1)

81129

add %r3, %r3, %r4 # add contents of table to table address

81130

mtctr %r3

81131

bctr # jump to it

81132

@@ -128,117 +177,175 @@

81133

.Lret_type0:

81134

# case FFI_TYPE_VOID

81135

mtlr %r0

81136

- addi %r1, %r1, 240

81137

+ addi %r1, %r1, STACKFRAME

81138

blr

81139

nop

81140

# case FFI_TYPE_INT

81141

-#ifdef __LITTLE_ENDIAN__

81142

- lwa %r3, 112+0(%r1)

81143

-#else

81144

- lwa %r3, 112+4(%r1)

81145

-#endif

81146

+# ifdef __LITTLE_ENDIAN__

81147

+ lwa %r3, RETVAL+0(%r1)

81148

+# else

81149

+ lwa %r3, RETVAL+4(%r1)

81150

+# endif

81151

mtlr %r0

81152

- addi %r1, %r1, 240

81153

+ addi %r1, %r1, STACKFRAME

81154

blr

81155

# case FFI_TYPE_FLOAT

81156

- lfs %f1, 112+0(%r1)

81157

+ lfs %f1, RETVAL+0(%r1)

81158

mtlr %r0

81159

- addi %r1, %r1, 240

81160

+ addi %r1, %r1, STACKFRAME

81161

blr

81162

# case FFI_TYPE_DOUBLE

81163

- lfd %f1, 112+0(%r1)

81164

+ lfd %f1, RETVAL+0(%r1)

81165

mtlr %r0

81166

- addi %r1, %r1, 240

81167

+ addi %r1, %r1, STACKFRAME

81168

blr

81169

# case FFI_TYPE_LONGDOUBLE

81170

- lfd %f1, 112+0(%r1)

81171

+ lfd %f1, RETVAL+0(%r1)

81172

mtlr %r0

81173

- lfd %f2, 112+8(%r1)

81174

+ lfd %f2, RETVAL+8(%r1)

81175

b .Lfinish

81176

# case FFI_TYPE_UINT8

81177

-#ifdef __LITTLE_ENDIAN__

81178

- lbz %r3, 112+0(%r1)

81179

-#else

81180

- lbz %r3, 112+7(%r1)

81181

-#endif

81182

+# ifdef __LITTLE_ENDIAN__

81183

+ lbz %r3, RETVAL+0(%r1)

81184

+# else

81185

+ lbz %r3, RETVAL+7(%r1)

81186

+# endif

81187

mtlr %r0

81188

- addi %r1, %r1, 240

81189

+ addi %r1, %r1, STACKFRAME

81190

blr

81191

# case FFI_TYPE_SINT8

81192

-#ifdef __LITTLE_ENDIAN__

81193

- lbz %r3, 112+0(%r1)

81194

-#else

81195

- lbz %r3, 112+7(%r1)

81196

-#endif

81197

+# ifdef __LITTLE_ENDIAN__

81198

+ lbz %r3, RETVAL+0(%r1)

81199

+# else

81200

+ lbz %r3, RETVAL+7(%r1)

81201

+# endif

81202

extsb %r3,%r3

81203

mtlr %r0

81204

b .Lfinish

81205

# case FFI_TYPE_UINT16

81206

-#ifdef __LITTLE_ENDIAN__

81207

- lhz %r3, 112+0(%r1)

81208

-#else

81209

- lhz %r3, 112+6(%r1)

81210

-#endif

81211

+# ifdef __LITTLE_ENDIAN__

81212

+ lhz %r3, RETVAL+0(%r1)

81213

+# else

81214

+ lhz %r3, RETVAL+6(%r1)

81215

+# endif

81216

mtlr %r0

81217

.Lfinish:

81218

- addi %r1, %r1, 240

81219

+ addi %r1, %r1, STACKFRAME

81220

blr

81221

# case FFI_TYPE_SINT16

81222

-#ifdef __LITTLE_ENDIAN__

81223

- lha %r3, 112+0(%r1)

81224

-#else

81225

- lha %r3, 112+6(%r1)

81226

-#endif

81227

+# ifdef __LITTLE_ENDIAN__

81228

+ lha %r3, RETVAL+0(%r1)

81229

+# else

81230

+ lha %r3, RETVAL+6(%r1)

81231

+# endif

81232

mtlr %r0

81233

- addi %r1, %r1, 240

81234

+ addi %r1, %r1, STACKFRAME

81235

blr

81236

# case FFI_TYPE_UINT32

81237

-#ifdef __LITTLE_ENDIAN__

81238

- lwz %r3, 112+0(%r1)

81239

-#else

81240

- lwz %r3, 112+4(%r1)

81241

-#endif

81242

+# ifdef __LITTLE_ENDIAN__

81243

+ lwz %r3, RETVAL+0(%r1)

81244

+# else

81245

+ lwz %r3, RETVAL+4(%r1)

81246

+# endif

81247

mtlr %r0

81248

- addi %r1, %r1, 240

81249

+ addi %r1, %r1, STACKFRAME

81250

blr

81251

# case FFI_TYPE_SINT32

81252

-#ifdef __LITTLE_ENDIAN__

81253

- lwa %r3, 112+0(%r1)

81254

-#else

81255

- lwa %r3, 112+4(%r1)

81256

-#endif

81257

+# ifdef __LITTLE_ENDIAN__

81258

+ lwa %r3, RETVAL+0(%r1)

81259

+# else

81260

+ lwa %r3, RETVAL+4(%r1)

81261

+# endif

81262

mtlr %r0

81263

- addi %r1, %r1, 240

81264

+ addi %r1, %r1, STACKFRAME

81265

blr

81266

# case FFI_TYPE_UINT64

81267

- ld %r3, 112+0(%r1)

81268

+ ld %r3, RETVAL+0(%r1)

81269

mtlr %r0

81270

- addi %r1, %r1, 240

81271

+ addi %r1, %r1, STACKFRAME

81272

blr

81273

# case FFI_TYPE_SINT64

81274

- ld %r3, 112+0(%r1)

81275

+ ld %r3, RETVAL+0(%r1)

81276

mtlr %r0

81277

- addi %r1, %r1, 240

81278

+ addi %r1, %r1, STACKFRAME

81279

blr

81280

# case FFI_TYPE_STRUCT

81281

mtlr %r0

81282

- addi %r1, %r1, 240

81283

+ addi %r1, %r1, STACKFRAME

81284

blr

81285

nop

81286

# case FFI_TYPE_POINTER

81287

- ld %r3, 112+0(%r1)

81288

+ ld %r3, RETVAL+0(%r1)

81289

mtlr %r0

81290

- addi %r1, %r1, 240

81291

+ addi %r1, %r1, STACKFRAME

81292

blr

81293

-# esac

81294

+# case FFI_V2_TYPE_FLOAT_HOMOG

81295

+ lfs %f1, RETVAL+0(%r1)

81296

+ lfs %f2, RETVAL+4(%r1)

81297

+ lfs %f3, RETVAL+8(%r1)

81298

+ b .Lmorefloat

81299

+# case FFI_V2_TYPE_DOUBLE_HOMOG

81300

+ lfd %f1, RETVAL+0(%r1)

81301

+ lfd %f2, RETVAL+8(%r1)

81302

+ lfd %f3, RETVAL+16(%r1)

81303

+ lfd %f4, RETVAL+24(%r1)

81304

+ mtlr %r0

81305

+ lfd %f5, RETVAL+32(%r1)

81306

+ lfd %f6, RETVAL+40(%r1)

81307

+ lfd %f7, RETVAL+48(%r1)

81308

+ lfd %f8, RETVAL+56(%r1)

81309

+ addi %r1, %r1, STACKFRAME

81310

+ blr

81311

+.Lmorefloat:

81312

+ lfs %f4, RETVAL+12(%r1)

81313

+ mtlr %r0

81314

+ lfs %f5, RETVAL+16(%r1)

81315

+ lfs %f6, RETVAL+20(%r1)

81316

+ lfs %f7, RETVAL+24(%r1)

81317

+ lfs %f8, RETVAL+28(%r1)

81318

+ addi %r1, %r1, STACKFRAME

81319

+ blr

81320

+.Lsmall:

81321

+# ifdef __LITTLE_ENDIAN__

81322

+ ld %r3,RETVAL+0(%r1)

81323

+ mtlr %r0

81324

+ ld %r4,RETVAL+8(%r1)

81325

+ addi %r1, %r1, STACKFRAME

81326

+ blr

81327

+# else

81328

+ # A struct smaller than a dword is returned in the low bits of r3

81329

+ # ie. right justified. Larger structs are passed left justified

81330

+ # in r3 and r4. The return value area on the stack will have

81331

+ # the structs as they are usually stored in memory.

81332

+ cmpldi %r3, FFI_V2_TYPE_SMALL_STRUCT + 7 # size 8 bytes?

81333

+ neg %r5, %r3

81334

+ ld %r3,RETVAL+0(%r1)

81335

+ blt .Lsmalldown

81336

+ mtlr %r0

81337

+ ld %r4,RETVAL+8(%r1)

81338

+ addi %r1, %r1, STACKFRAME

81339

+ blr

81340

+.Lsmalldown:

81341

+ addi %r5, %r5, FFI_V2_TYPE_SMALL_STRUCT + 7

81342

+ mtlr %r0

81343

+ sldi %r5, %r5, 3

81344

+ addi %r1, %r1, STACKFRAME

81345

+ srd %r3, %r3, %r5

81346

+ blr

81347

+# endif

81348

+

81349

.LFE1:

81350

.long 0

81351

.byte 0,12,0,1,128,0,0,0

81352

-#ifdef _CALL_LINUX

81353

+# if _CALL_ELF == 2

81354

+ .size ffi_closure_LINUX64,.-ffi_closure_LINUX64

81355

+# else

81356

+# ifdef _CALL_LINUX

81357

.size ffi_closure_LINUX64,.-.L.ffi_closure_LINUX64

81358

-#else

81359

+# else

81360

.size .ffi_closure_LINUX64,.-.ffi_closure_LINUX64

81361

-#endif

81362

+# endif

81363

+# endif

81364

81365

.section .eh_frame,EH_FRAME_FLAGS,@progbits

81366

.Lframe1:

81367

@@ -267,14 +374,14 @@

81368

.byte 0x2 # DW_CFA_advance_loc1

81369

.byte .LCFI0-.LFB1

81370

.byte 0xe # DW_CFA_def_cfa_offset

81371

- .uleb128 240

81372

+ .uleb128 STACKFRAME

81373

.byte 0x11 # DW_CFA_offset_extended_sf

81374

.uleb128 0x41

81375

.sleb128 -2

81376

.align 3

81377

.LEFDE1:

81378

-#endif

81379

81380

-#if defined __ELF__ && defined __linux__

81381

+# if defined __ELF__ && defined __linux__

81382

.section .note.GNU-stack,"",@progbits

81383

+# endif

81384

#endif

81385

Index: libffi/src/powerpc/ffi_powerpc.h

81386

===================================================================

81387

--- a/src/libffi/src/powerpc/ffi_powerpc.h (.../tags/gcc_4_8_2_release)

81388

+++ b/src/libffi/src/powerpc/ffi_powerpc.h (.../branches/gcc-4_8-branch)

81389

@@ -0,0 +1,77 @@

81390

+/* -----------------------------------------------------------------------

81391

81392

81393

81394

81395

81396

81397

+

81398

+ PowerPC Foreign Function Interface

81399

+

81400

+ Permission is hereby granted, free of charge, to any person obtaining

81401

+ a copy of this software and associated documentation files (the

81402

+ ``Software''), to deal in the Software without restriction, including

81403

+ without limitation the rights to use, copy, modify, merge, publish,

81404

+ distribute, sublicense, and/or sell copies of the Software, and to

81405

+ permit persons to whom the Software is furnished to do so, subject to

81406

+ the following conditions:

81407

+

81408

+ The above copyright notice and this permission notice shall be included

81409

+ in all copies or substantial portions of the Software.

81410

+

81411

+ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS

81412

+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

81413

+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.

81414

+ IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR

81415

+ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

81416

+ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

81417

+ OTHER DEALINGS IN THE SOFTWARE.

81418

+ ----------------------------------------------------------------------- */

81419

+

81420

+enum {

81421

+ /* The assembly depends on these exact flags. */

81422

+ /* These go in cr7 */

81423

+ FLAG_RETURNS_SMST = 1 << (31-31), /* Used for FFI_SYSV small structs. */

81424

+ FLAG_RETURNS_NOTHING = 1 << (31-30),

81425

+ FLAG_RETURNS_FP = 1 << (31-29),

81426

+ FLAG_RETURNS_64BITS = 1 << (31-28),

81427

+

81428

+ /* This goes in cr6 */

81429

+ FLAG_RETURNS_128BITS = 1 << (31-27),

81430

+

81431

+ FLAG_COMPAT = 1 << (31- 8), /* Not used by assembly */

81432

+

81433

+ /* These go in cr1 */

81434

+ FLAG_ARG_NEEDS_COPY = 1 << (31- 7), /* Used by sysv code */

81435

+ FLAG_ARG_NEEDS_PSAVE = FLAG_ARG_NEEDS_COPY, /* Used by linux64 code */

81436

+ FLAG_FP_ARGUMENTS = 1 << (31- 6), /* cr1.eq; specified by ABI */

81437

+ FLAG_4_GPR_ARGUMENTS = 1 << (31- 5),

81438

+ FLAG_RETVAL_REFERENCE = 1 << (31- 4)

81439

+};

81440

+

81441

+typedef union

81442

+{

81443

+ float f;

81444

+ double d;

81445

+} ffi_dblfl;

81446

+

81447

+void FFI_HIDDEN ffi_closure_SYSV (void);

81448

+void FFI_HIDDEN ffi_call_SYSV(extended_cif *, unsigned, unsigned, unsigned *,

81449

+ void (*)(void));

81450

+

81451

+void FFI_HIDDEN ffi_prep_types_sysv (ffi_abi);

81452

+ffi_status FFI_HIDDEN ffi_prep_cif_sysv (ffi_cif *);

81453

+int FFI_HIDDEN ffi_closure_helper_SYSV (ffi_closure *, void *, unsigned long *,

81454

+ ffi_dblfl *, unsigned long *);

81455

+

81456

+void FFI_HIDDEN ffi_call_LINUX64(extended_cif *, unsigned long, unsigned long,

81457

+ unsigned long *, void (*)(void));

81458

+void FFI_HIDDEN ffi_closure_LINUX64 (void);

81459

+

81460

+void FFI_HIDDEN ffi_prep_types_linux64 (ffi_abi);

81461

+ffi_status FFI_HIDDEN ffi_prep_cif_linux64 (ffi_cif *);

81462

+ffi_status FFI_HIDDEN ffi_prep_cif_linux64_var (ffi_cif *, unsigned int,

81463

+ unsigned int);

81464

+void FFI_HIDDEN ffi_prep_args64 (extended_cif *, unsigned long *const);

81465

+int FFI_HIDDEN ffi_closure_helper_LINUX64 (ffi_closure *, void *,

81466

+ unsigned long *, ffi_dblfl *);

81467

Index: libffi/src/powerpc/ffi_sysv.c

81468

===================================================================

81469

--- a/src/libffi/src/powerpc/ffi_sysv.c (.../tags/gcc_4_8_2_release)

81470

+++ b/src/libffi/src/powerpc/ffi_sysv.c (.../branches/gcc-4_8-branch)

81471

@@ -0,0 +1,931 @@

81472

+/* -----------------------------------------------------------------------

81473

81474

81475

81476

81477

81478

81479

+

81480

+ PowerPC Foreign Function Interface

81481

+

81482

+ Permission is hereby granted, free of charge, to any person obtaining

81483

+ a copy of this software and associated documentation files (the

81484

+ ``Software''), to deal in the Software without restriction, including

81485

+ without limitation the rights to use, copy, modify, merge, publish,

81486

+ distribute, sublicense, and/or sell copies of the Software, and to

81487

+ permit persons to whom the Software is furnished to do so, subject to

81488

+ the following conditions:

81489

+

81490

+ The above copyright notice and this permission notice shall be included

81491

+ in all copies or substantial portions of the Software.

81492

+

81493

+ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS

81494

+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

81495

+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.

81496

+ IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR

81497

+ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

81498

+ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

81499

+ OTHER DEALINGS IN THE SOFTWARE.

81500

+ ----------------------------------------------------------------------- */

81501

+

81502

+#include "ffi.h"

81503

+

81504

+#ifndef POWERPC64

81505

+#include "ffi_common.h"

81506

+#include "ffi_powerpc.h"

81507

+

81508

+

81509

+/* About the SYSV ABI. */

81510

+#define ASM_NEEDS_REGISTERS 4

81511

+#define NUM_GPR_ARG_REGISTERS 8

81512

+#define NUM_FPR_ARG_REGISTERS 8

81513

+

81514

+

81515

+#if HAVE_LONG_DOUBLE_VARIANT && FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

81516

+/* Adjust size of ffi_type_longdouble. */

81517

+void FFI_HIDDEN

81518

+ffi_prep_types_sysv (ffi_abi abi)

81519

+{

81520

+ if ((abi & (FFI_SYSV | FFI_SYSV_LONG_DOUBLE_128)) == FFI_SYSV)

81521

+ {

81522

+ ffi_type_longdouble.size = 8;

81523

+ ffi_type_longdouble.alignment = 8;

81524

+ }

81525

+ else

81526

+ {

81527

+ ffi_type_longdouble.size = 16;

81528

+ ffi_type_longdouble.alignment = 16;

81529

+ }

81530

+}

81531

+#endif

81532

+

81533

+/* Transform long double, double and float to other types as per abi. */

81534

+static int

81535

+translate_float (int abi, int type)

81536

+{

81537

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

81538

+ if (type == FFI_TYPE_LONGDOUBLE

81539

+ && (abi & FFI_SYSV_LONG_DOUBLE_128) == 0)

81540

+ type = FFI_TYPE_DOUBLE;

81541

+#endif

81542

+ if ((abi & FFI_SYSV_SOFT_FLOAT) != 0)

81543

+ {

81544

+ if (type == FFI_TYPE_FLOAT)

81545

+ type = FFI_TYPE_UINT32;

81546

+ else if (type == FFI_TYPE_DOUBLE)

81547

+ type = FFI_TYPE_UINT64;

81548

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

81549

+ else if (type == FFI_TYPE_LONGDOUBLE)

81550

+ type = FFI_TYPE_UINT128;

81551

+ }

81552

+ else if ((abi & FFI_SYSV_IBM_LONG_DOUBLE) == 0)

81553

+ {

81554

+ if (type == FFI_TYPE_LONGDOUBLE)

81555

+ type = FFI_TYPE_STRUCT;

81556

+#endif

81557

+ }

81558

+ return type;

81559

+}

81560

+

81561

+/* Perform machine dependent cif processing */

81562

+static ffi_status

81563

+ffi_prep_cif_sysv_core (ffi_cif *cif)

81564

+{

81565

+ ffi_type **ptr;

81566

+ unsigned bytes;

81567

+ unsigned i, fparg_count = 0, intarg_count = 0;

81568

+ unsigned flags = cif->flags;

81569

+ unsigned struct_copy_size = 0;

81570

+ unsigned type = cif->rtype->type;

81571

+ unsigned size = cif->rtype->size;

81572

+

81573

+ /* The machine-independent calculation of cif->bytes doesn't work

81574

+ for us. Redo the calculation. */

81575

+

81576

+ /* Space for the frame pointer, callee's LR, and the asm's temp regs. */

81577

+ bytes = (2 + ASM_NEEDS_REGISTERS) * sizeof (int);

81578

+

81579

+ /* Space for the GPR registers. */

81580

+ bytes += NUM_GPR_ARG_REGISTERS * sizeof (int);

81581

+

81582

+ /* Return value handling. The rules for SYSV are as follows:

81583

+ - 32-bit (or less) integer values are returned in gpr3;

81584

+ - Structures of size <= 4 bytes also returned in gpr3;

81585

+ - 64-bit integer values and structures between 5 and 8 bytes are returned

81586

+ in gpr3 and gpr4;

81587

+ - Larger structures are allocated space and a pointer is passed as

81588

+ the first argument.

81589

+ - Single/double FP values are returned in fpr1;

81590

+ - long doubles (if not equivalent to double) are returned in

81591

+ fpr1,fpr2 for Linux and as for large structs for SysV. */

81592

+

81593

+ type = translate_float (cif->abi, type);

81594

+

81595

+ switch (type)

81596

+ {

81597

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

81598

+ case FFI_TYPE_LONGDOUBLE:

81599

+ flags |= FLAG_RETURNS_128BITS;

81600

+ /* Fall through. */

81601

+#endif

81602

+ case FFI_TYPE_DOUBLE:

81603

+ flags |= FLAG_RETURNS_64BITS;

81604

+ /* Fall through. */

81605

+ case FFI_TYPE_FLOAT:

81606

+ flags |= FLAG_RETURNS_FP;

81607

+#ifdef __NO_FPRS__

81608

+ return FFI_BAD_ABI;

81609

+#endif

81610

+ break;

81611

+

81612

+ case FFI_TYPE_UINT128:

81613

+ flags |= FLAG_RETURNS_128BITS;

81614

+ /* Fall through. */

81615

+ case FFI_TYPE_UINT64:

81616

+ case FFI_TYPE_SINT64:

81617

+ flags |= FLAG_RETURNS_64BITS;

81618

+ break;

81619

+

81620

+ case FFI_TYPE_STRUCT:

81621

+ /* The final SYSV ABI says that structures smaller or equal 8 bytes

81622

+ are returned in r3/r4. A draft ABI used by linux instead

81623

+ returns them in memory. */

81624

+ if ((cif->abi & FFI_SYSV_STRUCT_RET) != 0 && size <= 8)

81625

+ {

81626

+ flags |= FLAG_RETURNS_SMST;

81627

+ break;

81628

+ }

81629

+ intarg_count++;

81630

+ flags |= FLAG_RETVAL_REFERENCE;

81631

+ /* Fall through. */

81632

+ case FFI_TYPE_VOID:

81633

+ flags |= FLAG_RETURNS_NOTHING;

81634

+ break;

81635

+

81636

+ default:

81637

+ /* Returns 32-bit integer, or similar. Nothing to do here. */

81638

+ break;

81639

+ }

81640

+

81641

+ /* The first NUM_GPR_ARG_REGISTERS words of integer arguments, and the

81642

+ first NUM_FPR_ARG_REGISTERS fp arguments, go in registers; the rest

81643

+ goes on the stack. Structures and long doubles (if not equivalent

81644

+ to double) are passed as a pointer to a copy of the structure.

81645

+ Stuff on the stack needs to keep proper alignment. */

81646

+ for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

81647

+ {

81648

+ unsigned short typenum = (*ptr)->type;

81649

+

81650

+ typenum = translate_float (cif->abi, typenum);

81651

+

81652

+ switch (typenum)

81653

+ {

81654

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

81655

+ case FFI_TYPE_LONGDOUBLE:

81656

+ fparg_count++;

81657

+ /* Fall thru */

81658

+#endif

81659

+ case FFI_TYPE_DOUBLE:

81660

+ fparg_count++;

81661

+ /* If this FP arg is going on the stack, it must be

81662

+ 8-byte-aligned. */

81663

+ if (fparg_count > NUM_FPR_ARG_REGISTERS

81664

+ && intarg_count >= NUM_GPR_ARG_REGISTERS

81665

+ && intarg_count % 2 != 0)

81666

+ intarg_count++;

81667

+#ifdef __NO_FPRS__

81668

+ return FFI_BAD_ABI;

81669

+#endif

81670

+ break;

81671

+

81672

+ case FFI_TYPE_FLOAT:

81673

+ fparg_count++;

81674

+#ifdef __NO_FPRS__

81675

+ return FFI_BAD_ABI;

81676

+#endif

81677

+ break;

81678

+

81679

+ case FFI_TYPE_UINT128:

81680

+ /* A long double in FFI_LINUX_SOFT_FLOAT can use only a set

81681

+ of four consecutive gprs. If we do not have enough, we

81682

+ have to adjust the intarg_count value. */

81683

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3

81684

+ && intarg_count < NUM_GPR_ARG_REGISTERS)

81685

+ intarg_count = NUM_GPR_ARG_REGISTERS;

81686

+ intarg_count += 4;

81687

+ break;

81688

+

81689

+ case FFI_TYPE_UINT64:

81690

+ case FFI_TYPE_SINT64:

81691

+ /* 'long long' arguments are passed as two words, but

81692

+ either both words must fit in registers or both go

81693

+ on the stack. If they go on the stack, they must

81694

+ be 8-byte-aligned.

81695

+

81696

+ Also, only certain register pairs can be used for

81697

+ passing long long int -- specifically (r3,r4), (r5,r6),

81698

+ (r7,r8), (r9,r10). */

81699

+ if (intarg_count == NUM_GPR_ARG_REGISTERS-1

81700

+ || intarg_count % 2 != 0)

81701

+ intarg_count++;

81702

+ intarg_count += 2;

81703

+ break;

81704

+

81705

+ case FFI_TYPE_STRUCT:

81706

+ /* We must allocate space for a copy of these to enforce

81707

+ pass-by-value. Pad the space up to a multiple of 16

81708

+ bytes (the maximum alignment required for anything under

81709

+ the SYSV ABI). */

81710

+ struct_copy_size += ((*ptr)->size + 15) & ~0xF;

81711

+ /* Fall through (allocate space for the pointer). */

81712

+

81713

+ case FFI_TYPE_POINTER:

81714

+ case FFI_TYPE_INT:

81715

+ case FFI_TYPE_UINT32:

81716

+ case FFI_TYPE_SINT32:

81717

+ case FFI_TYPE_UINT16:

81718

+ case FFI_TYPE_SINT16:

81719

+ case FFI_TYPE_UINT8:

81720

+ case FFI_TYPE_SINT8:

81721

+ /* Everything else is passed as a 4-byte word in a GPR, either

81722

+ the object itself or a pointer to it. */

81723

+ intarg_count++;

81724

+ break;

81725

+

81726

+ default:

81727

+ FFI_ASSERT (0);

81728

+ }

81729

+ }

81730

+

81731

+ if (fparg_count != 0)

81732

+ flags |= FLAG_FP_ARGUMENTS;

81733

+ if (intarg_count > 4)

81734

+ flags |= FLAG_4_GPR_ARGUMENTS;

81735

+ if (struct_copy_size != 0)

81736

+ flags |= FLAG_ARG_NEEDS_COPY;

81737

+

81738

+ /* Space for the FPR registers, if needed. */

81739

+ if (fparg_count != 0)

81740

+ bytes += NUM_FPR_ARG_REGISTERS * sizeof (double);

81741

+

81742

+ /* Stack space. */

81743

+ if (intarg_count > NUM_GPR_ARG_REGISTERS)

81744

+ bytes += (intarg_count - NUM_GPR_ARG_REGISTERS) * sizeof (int);

81745

+ if (fparg_count > NUM_FPR_ARG_REGISTERS)

81746

+ bytes += (fparg_count - NUM_FPR_ARG_REGISTERS) * sizeof (double);

81747

+

81748

+ /* The stack space allocated needs to be a multiple of 16 bytes. */

81749

+ bytes = (bytes + 15) & ~0xF;

81750

+

81751

+ /* Add in the space for the copied structures. */

81752

+ bytes += struct_copy_size;

81753

+

81754

+ cif->flags = flags;

81755

+ cif->bytes = bytes;

81756

+

81757

+ return FFI_OK;

81758

+}

81759

+

81760

+ffi_status FFI_HIDDEN

81761

+ffi_prep_cif_sysv (ffi_cif *cif)

81762

+{

81763

+ if ((cif->abi & FFI_SYSV) == 0)

81764

+ {

81765

+ /* This call is from old code. Translate to new ABI values. */

81766

+ cif->flags |= FLAG_COMPAT;

81767

+ switch (cif->abi)

81768

+ {

81769

+ default:

81770

+ return FFI_BAD_ABI;

81771

+

81772

+ case FFI_COMPAT_SYSV:

81773

+ cif->abi = FFI_SYSV | FFI_SYSV_STRUCT_RET | FFI_SYSV_LONG_DOUBLE_128;

81774

+ break;

81775

+

81776

+ case FFI_COMPAT_GCC_SYSV:

81777

+ cif->abi = FFI_SYSV | FFI_SYSV_LONG_DOUBLE_128;

81778

+ break;

81779

+

81780

+ case FFI_COMPAT_LINUX:

81781

+ cif->abi = (FFI_SYSV | FFI_SYSV_IBM_LONG_DOUBLE

81782

+ | FFI_SYSV_LONG_DOUBLE_128);

81783

+ break;

81784

+

81785

+ case FFI_COMPAT_LINUX_SOFT_FLOAT:

81786

+ cif->abi = (FFI_SYSV | FFI_SYSV_SOFT_FLOAT | FFI_SYSV_IBM_LONG_DOUBLE

81787

+ | FFI_SYSV_LONG_DOUBLE_128);

81788

+ break;

81789

+ }

81790

+ }

81791

+ return ffi_prep_cif_sysv_core (cif);

81792

+}

81793

+

81794

+/* ffi_prep_args_SYSV is called by the assembly routine once stack space

81795

+ has been allocated for the function's arguments.

81796

+

81797

+ The stack layout we want looks like this:

81798

+

81799

+ | Return address from ffi_call_SYSV 4bytes | higher addresses

81800

+ |--------------------------------------------|

81801

+ | Previous backchain pointer 4 | stack pointer here

81802

+ |--------------------------------------------|<+ <<< on entry to

81803

+ | Saved r28-r31 4*4 | | ffi_call_SYSV

81804

+ |--------------------------------------------| |

81805

+ | GPR registers r3-r10 8*4 | | ffi_call_SYSV

81806

+ |--------------------------------------------| |

81807

+ | FPR registers f1-f8 (optional) 8*8 | |

81808

+ |--------------------------------------------| | stack |

81809

+ | Space for copied structures | | grows |

81810

+ |--------------------------------------------| | down V

81811

+ | Parameters that didn't fit in registers | |

81812

+ |--------------------------------------------| | lower addresses

81813

+ | Space for callee's LR 4 | |

81814

+ |--------------------------------------------| | stack pointer here

81815

+ | Current backchain pointer 4 |-/ during

81816

+ |--------------------------------------------| <<< ffi_call_SYSV

81817

+

81818

+*/

81819

+

81820

+void FFI_HIDDEN

81821

+ffi_prep_args_SYSV (extended_cif *ecif, unsigned *const stack)

81822

+{

81823

+ const unsigned bytes = ecif->cif->bytes;

81824

+ const unsigned flags = ecif->cif->flags;

81825

+

81826

+ typedef union

81827

+ {

81828

+ char *c;

81829

+ unsigned *u;

81830

+ long long *ll;

81831

+ float *f;

81832

+ double *d;

81833

+ } valp;

81834

+

81835

+ /* 'stacktop' points at the previous backchain pointer. */

81836

+ valp stacktop;

81837

+

81838

+ /* 'gpr_base' points at the space for gpr3, and grows upwards as

81839

+ we use GPR registers. */

81840

+ valp gpr_base;

81841

+ int intarg_count;

81842

+

81843

+#ifndef __NO_FPRS__

81844

+ /* 'fpr_base' points at the space for fpr1, and grows upwards as

81845

+ we use FPR registers. */

81846

+ valp fpr_base;

81847

+ int fparg_count;

81848

+#endif

81849

+

81850

+ /* 'copy_space' grows down as we put structures in it. It should

81851

+ stay 16-byte aligned. */

81852

+ valp copy_space;

81853

+

81854

+ /* 'next_arg' grows up as we put parameters in it. */

81855

+ valp next_arg;

81856

+

81857

+ int i;

81858

+ ffi_type **ptr;

81859

+#ifndef __NO_FPRS__

81860

+ double double_tmp;

81861

+#endif

81862

+ union

81863

+ {

81864

+ void **v;

81865

+ char **c;

81866

+ signed char **sc;

81867

+ unsigned char **uc;

81868

+ signed short **ss;

81869

+ unsigned short **us;

81870

+ unsigned int **ui;

81871

+ long long **ll;

81872

+ float **f;

81873

+ double **d;

81874

+ } p_argv;

81875

+ size_t struct_copy_size;

81876

+ unsigned gprvalue;

81877

+

81878

+ stacktop.c = (char *) stack + bytes;

81879

+ gpr_base.u = stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS;

81880

+ intarg_count = 0;

81881

+#ifndef __NO_FPRS__

81882

+ fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS;

81883

+ fparg_count = 0;

81884

+ copy_space.c = ((flags & FLAG_FP_ARGUMENTS) ? fpr_base.c : gpr_base.c);

81885

+#else

81886

+ copy_space.c = gpr_base.c;

81887

+#endif

81888

+ next_arg.u = stack + 2;

81889

+

81890

+ /* Check that everything starts aligned properly. */

81891

+ FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

81892

+ FFI_ASSERT (((unsigned long) copy_space.c & 0xF) == 0);

81893

+ FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

81894

+ FFI_ASSERT ((bytes & 0xF) == 0);

81895

+ FFI_ASSERT (copy_space.c >= next_arg.c);

81896

+

81897

+ /* Deal with return values that are actually pass-by-reference. */

81898

+ if (flags & FLAG_RETVAL_REFERENCE)

81899

+ {

81900

+ *gpr_base.u++ = (unsigned long) (char *) ecif->rvalue;

81901

+ intarg_count++;

81902

+ }

81903

+

81904

+ /* Now for the arguments. */

81905

+ p_argv.v = ecif->avalue;

81906

+ for (ptr = ecif->cif->arg_types, i = ecif->cif->nargs;

81907

+ i > 0;

81908

+ i--, ptr++, p_argv.v++)

81909

+ {

81910

+ unsigned int typenum = (*ptr)->type;

81911

+

81912

+ typenum = translate_float (ecif->cif->abi, typenum);

81913

+

81914

+ /* Now test the translated value */

81915

+ switch (typenum)

81916

+ {

81917

+#ifndef __NO_FPRS__

81918

+# if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

81919

+ case FFI_TYPE_LONGDOUBLE:

81920

+ double_tmp = (*p_argv.d)[0];

81921

+

81922

+ if (fparg_count >= NUM_FPR_ARG_REGISTERS - 1)

81923

+ {

81924

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS

81925

+ && intarg_count % 2 != 0)

81926

+ {

81927

+ intarg_count++;

81928

+ next_arg.u++;

81929

+ }

81930

+ *next_arg.d = double_tmp;

81931

+ next_arg.u += 2;

81932

+ double_tmp = (*p_argv.d)[1];

81933

+ *next_arg.d = double_tmp;

81934

+ next_arg.u += 2;

81935

+ }

81936

+ else

81937

+ {

81938

+ *fpr_base.d++ = double_tmp;

81939

+ double_tmp = (*p_argv.d)[1];

81940

+ *fpr_base.d++ = double_tmp;

81941

+ }

81942

+

81943

+ fparg_count += 2;

81944

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

81945

+ break;

81946

+# endif

81947

+ case FFI_TYPE_DOUBLE:

81948

+ double_tmp = **p_argv.d;

81949

+

81950

+ if (fparg_count >= NUM_FPR_ARG_REGISTERS)

81951

+ {

81952

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS

81953

+ && intarg_count % 2 != 0)

81954

+ {

81955

+ intarg_count++;

81956

+ next_arg.u++;

81957

+ }

81958

+ *next_arg.d = double_tmp;

81959

+ next_arg.u += 2;

81960

+ }

81961

+ else

81962

+ *fpr_base.d++ = double_tmp;

81963

+ fparg_count++;

81964

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

81965

+ break;

81966

+

81967

+ case FFI_TYPE_FLOAT:

81968

+ double_tmp = **p_argv.f;

81969

+ if (fparg_count >= NUM_FPR_ARG_REGISTERS)

81970

+ {

81971

+ *next_arg.f = (float) double_tmp;

81972

+ next_arg.u += 1;

81973

+ intarg_count++;

81974

+ }

81975

+ else

81976

+ *fpr_base.d++ = double_tmp;

81977

+ fparg_count++;

81978

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

81979

+ break;

81980

+#endif /* have FPRs */

81981

+

81982

+ case FFI_TYPE_UINT128:

81983

+ /* The soft float ABI for long doubles works like this, a long double

81984

+ is passed in four consecutive GPRs if available. A maximum of 2

81985

+ long doubles can be passed in gprs. If we do not have 4 GPRs

81986

+ left, the long double is passed on the stack, 4-byte aligned. */

81987

+ {

81988

+ unsigned int int_tmp;

81989

+ unsigned int ii;

81990

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3)

81991

+ {

81992

+ if (intarg_count < NUM_GPR_ARG_REGISTERS)

81993

+ intarg_count = NUM_GPR_ARG_REGISTERS;

81994

+ for (ii = 0; ii < 4; ii++)

81995

+ {

81996

+ int_tmp = (*p_argv.ui)[ii];

81997

+ *next_arg.u++ = int_tmp;

81998

+ }

81999

+ }

82000

+ else

82001

+ {

82002

+ for (ii = 0; ii < 4; ii++)

82003

+ {

82004

+ int_tmp = (*p_argv.ui)[ii];

82005

+ *gpr_base.u++ = int_tmp;

82006

+ }

82007

+ }

82008

+ intarg_count += 4;

82009

+ break;

82010

+ }

82011

+

82012

+ case FFI_TYPE_UINT64:

82013

+ case FFI_TYPE_SINT64:

82014

+ if (intarg_count == NUM_GPR_ARG_REGISTERS-1)

82015

+ intarg_count++;

82016

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS)

82017

+ {

82018

+ if (intarg_count % 2 != 0)

82019

+ {

82020

+ intarg_count++;

82021

+ next_arg.u++;

82022

+ }

82023

+ *next_arg.ll = **p_argv.ll;

82024

+ next_arg.u += 2;

82025

+ }

82026

+ else

82027

+ {

82028

+ /* The abi states only certain register pairs can be

82029

+ used for passing long long int specifically (r3,r4),

82030

+ (r5,r6), (r7,r8), (r9,r10). If next arg is long long

82031

+ but not correct starting register of pair then skip

82032

+ until the proper starting register. */

82033

+ if (intarg_count % 2 != 0)

82034

+ {

82035

+ intarg_count ++;

82036

+ gpr_base.u++;

82037

+ }

82038

+ *gpr_base.ll++ = **p_argv.ll;

82039

+ }

82040

+ intarg_count += 2;

82041

+ break;

82042

+

82043

+ case FFI_TYPE_STRUCT:

82044

+ struct_copy_size = ((*ptr)->size + 15) & ~0xF;

82045

+ copy_space.c -= struct_copy_size;

82046

+ memcpy (copy_space.c, *p_argv.c, (*ptr)->size);

82047

+

82048

+ gprvalue = (unsigned long) copy_space.c;

82049

+

82050

+ FFI_ASSERT (copy_space.c > next_arg.c);

82051

+ FFI_ASSERT (flags & FLAG_ARG_NEEDS_COPY);

82052

+ goto putgpr;

82053

+

82054

+ case FFI_TYPE_UINT8:

82055

+ gprvalue = **p_argv.uc;

82056

+ goto putgpr;

82057

+ case FFI_TYPE_SINT8:

82058

+ gprvalue = **p_argv.sc;

82059

+ goto putgpr;

82060

+ case FFI_TYPE_UINT16:

82061

+ gprvalue = **p_argv.us;

82062

+ goto putgpr;

82063

+ case FFI_TYPE_SINT16:

82064

+ gprvalue = **p_argv.ss;

82065

+ goto putgpr;

82066

+

82067

+ case FFI_TYPE_INT:

82068

+ case FFI_TYPE_UINT32:

82069

+ case FFI_TYPE_SINT32:

82070

+ case FFI_TYPE_POINTER:

82071

+

82072

+ gprvalue = **p_argv.ui;

82073

+

82074

+ putgpr:

82075

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS)

82076

+ *next_arg.u++ = gprvalue;

82077

+ else

82078

+ *gpr_base.u++ = gprvalue;

82079

+ intarg_count++;

82080

+ break;

82081

+ }

82082

+ }

82083

+

82084

+ /* Check that we didn't overrun the stack... */

82085

+ FFI_ASSERT (copy_space.c >= next_arg.c);

82086

+ FFI_ASSERT (gpr_base.u <= stacktop.u - ASM_NEEDS_REGISTERS);

82087

+ /* The assert below is testing that the number of integer arguments agrees

82088

+ with the number found in ffi_prep_cif_machdep(). However, intarg_count

82089

+ is incremented whenever we place an FP arg on the stack, so account for

82090

+ that before our assert test. */

82091

+#ifndef __NO_FPRS__

82092

+ if (fparg_count > NUM_FPR_ARG_REGISTERS)

82093

+ intarg_count -= fparg_count - NUM_FPR_ARG_REGISTERS;

82094

+ FFI_ASSERT (fpr_base.u

82095

+ <= stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS);

82096

+#endif

82097

+ FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS || intarg_count <= 4);

82098

+}

82099

+

82100

+#define MIN_CACHE_LINE_SIZE 8

82101

+

82102

+static void

82103

+flush_icache (char *wraddr, char *xaddr, int size)

82104

+{

82105

+ int i;

82106

+ for (i = 0; i < size; i += MIN_CACHE_LINE_SIZE)

82107

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;"

82108

+ : : "r" (xaddr + i), "r" (wraddr + i) : "memory");

82109

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;" "sync;" "isync;"

82110

+ : : "r"(xaddr + size - 1), "r"(wraddr + size - 1)

82111

+ : "memory");

82112

+}

82113

+

82114

+ffi_status FFI_HIDDEN

82115

+ffi_prep_closure_loc_sysv (ffi_closure *closure,

82116

+ ffi_cif *cif,

82117

+ void (*fun) (ffi_cif *, void *, void **, void *),

82118

+ void *user_data,

82119

+ void *codeloc)

82120

+{

82121

+ unsigned int *tramp;

82122

+

82123

+ if (cif->abi < FFI_SYSV || cif->abi >= FFI_LAST_ABI)

82124

+ return FFI_BAD_ABI;

82125

+

82126

+ tramp = (unsigned int *) &closure->tramp[0];

82127

+ tramp[0] = 0x7c0802a6; /* mflr r0 */

82128

+ tramp[1] = 0x4800000d; /* bl 10 <trampoline_initial+0x10> */

82129

+ tramp[4] = 0x7d6802a6; /* mflr r11 */

82130

+ tramp[5] = 0x7c0803a6; /* mtlr r0 */

82131

+ tramp[6] = 0x800b0000; /* lwz r0,0(r11) */

82132

+ tramp[7] = 0x816b0004; /* lwz r11,4(r11) */

82133

+ tramp[8] = 0x7c0903a6; /* mtctr r0 */

82134

+ tramp[9] = 0x4e800420; /* bctr */

82135

+ *(void **) &tramp[2] = (void *) ffi_closure_SYSV; /* function */

82136

+ *(void **) &tramp[3] = codeloc; /* context */

82137

+

82138

+ /* Flush the icache. */

82139

+ flush_icache ((char *)tramp, (char *)codeloc, FFI_TRAMPOLINE_SIZE);

82140

+

82141

+ closure->cif = cif;

82142

+ closure->fun = fun;

82143

+ closure->user_data = user_data;

82144

+

82145

+ return FFI_OK;

82146

+}

82147

+

82148

+/* Basically the trampoline invokes ffi_closure_SYSV, and on

82149

+ entry, r11 holds the address of the closure.

82150

+ After storing the registers that could possibly contain

82151

+ parameters to be passed into the stack frame and setting

82152

+ up space for a return value, ffi_closure_SYSV invokes the

82153

+ following helper function to do most of the work. */

82154

+

82155

+int

82156

+ffi_closure_helper_SYSV (ffi_closure *closure, void *rvalue,

82157

+ unsigned long *pgr, ffi_dblfl *pfr,

82158

+ unsigned long *pst)

82159

+{

82160

+ /* rvalue is the pointer to space for return value in closure assembly */

82161

+ /* pgr is the pointer to where r3-r10 are stored in ffi_closure_SYSV */

82162

+ /* pfr is the pointer to where f1-f8 are stored in ffi_closure_SYSV */

82163

+ /* pst is the pointer to outgoing parameter stack in original caller */

82164

+

82165

+ void ** avalue;

82166

+ ffi_type ** arg_types;

82167

+ long i, avn;

82168

+#ifndef __NO_FPRS__

82169

+ long nf = 0; /* number of floating registers already used */

82170

+#endif

82171

+ long ng = 0; /* number of general registers already used */

82172

+

82173

+ ffi_cif *cif = closure->cif;

82174

+ unsigned size = cif->rtype->size;

82175

+ unsigned short rtypenum = cif->rtype->type;

82176

+

82177

+ avalue = alloca (cif->nargs * sizeof (void *));

82178

+

82179

+ /* First translate for softfloat/nonlinux */

82180

+ rtypenum = translate_float (cif->abi, rtypenum);

82181

+

82182

+ /* Copy the caller's structure return value address so that the closure

82183

+ returns the data directly to the caller.

82184

+ For FFI_SYSV the result is passed in r3/r4 if the struct size is less

82185

+ or equal 8 bytes. */

82186

+ if (rtypenum == FFI_TYPE_STRUCT

82187

+ && !((cif->abi & FFI_SYSV_STRUCT_RET) != 0 && size <= 8))

82188

+ {

82189

+ rvalue = (void *) *pgr;

82190

+ ng++;

82191

+ pgr++;

82192

+ }

82193

+

82194

+ i = 0;

82195

+ avn = cif->nargs;

82196

+ arg_types = cif->arg_types;

82197

+

82198

+ /* Grab the addresses of the arguments from the stack frame. */

82199

+ while (i < avn) {

82200

+ unsigned short typenum = arg_types[i]->type;

82201

+

82202

+ /* We may need to handle some values depending on ABI. */

82203

+ typenum = translate_float (cif->abi, typenum);

82204

+

82205

+ switch (typenum)

82206

+ {

82207

+#ifndef __NO_FPRS__

82208

+ case FFI_TYPE_FLOAT:

82209

+ /* Unfortunately float values are stored as doubles

82210

+ in the ffi_closure_SYSV code (since we don't check

82211

+ the type in that routine). */

82212

+ if (nf < NUM_FPR_ARG_REGISTERS)

82213

+ {

82214

+ /* FIXME? here we are really changing the values

82215

+ stored in the original calling routines outgoing

82216

+ parameter stack. This is probably a really

82217

+ naughty thing to do but... */

82218

+ double temp = pfr->d;

82219

+ pfr->f = (float) temp;

82220

+ avalue[i] = pfr;

82221

+ nf++;

82222

+ pfr++;

82223

+ }

82224

+ else

82225

+ {

82226

+ avalue[i] = pst;

82227

+ pst += 1;

82228

+ }

82229

+ break;

82230

+

82231

+ case FFI_TYPE_DOUBLE:

82232

+ if (nf < NUM_FPR_ARG_REGISTERS)

82233

+ {

82234

+ avalue[i] = pfr;

82235

+ nf++;

82236

+ pfr++;

82237

+ }

82238

+ else

82239

+ {

82240

+ if (((long) pst) & 4)

82241

+ pst++;

82242

+ avalue[i] = pst;

82243

+ pst += 2;

82244

+ }

82245

+ break;

82246

+

82247

+# if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

82248

+ case FFI_TYPE_LONGDOUBLE:

82249

+ if (nf < NUM_FPR_ARG_REGISTERS - 1)

82250

+ {

82251

+ avalue[i] = pfr;

82252

+ pfr += 2;

82253

+ nf += 2;

82254

+ }

82255

+ else

82256

+ {

82257

+ if (((long) pst) & 4)

82258

+ pst++;

82259

+ avalue[i] = pst;

82260

+ pst += 4;

82261

+ nf = 8;

82262

+ }

82263

+ break;

82264

+# endif

82265

+#endif

82266

+

82267

+ case FFI_TYPE_UINT128:

82268

+ /* Test if for the whole long double, 4 gprs are available.

82269

+ otherwise the stuff ends up on the stack. */

82270

+ if (ng < NUM_GPR_ARG_REGISTERS - 3)

82271

+ {

82272

+ avalue[i] = pgr;

82273

+ pgr += 4;

82274

+ ng += 4;

82275

+ }

82276

+ else

82277

+ {

82278

+ avalue[i] = pst;

82279

+ pst += 4;

82280

+ ng = 8+4;

82281

+ }

82282

+ break;

82283

+

82284

+ case FFI_TYPE_SINT8:

82285

+ case FFI_TYPE_UINT8:

82286

+#ifndef __LITTLE_ENDIAN__

82287

+ if (ng < NUM_GPR_ARG_REGISTERS)

82288

+ {

82289

+ avalue[i] = (char *) pgr + 3;

82290

+ ng++;

82291

+ pgr++;

82292

+ }

82293

+ else

82294

+ {

82295

+ avalue[i] = (char *) pst + 3;

82296

+ pst++;

82297

+ }

82298

+ break;

82299

+#endif

82300

+

82301

+ case FFI_TYPE_SINT16:

82302

+ case FFI_TYPE_UINT16:

82303

+#ifndef __LITTLE_ENDIAN__

82304

+ if (ng < NUM_GPR_ARG_REGISTERS)

82305

+ {

82306

+ avalue[i] = (char *) pgr + 2;

82307

+ ng++;

82308

+ pgr++;

82309

+ }

82310

+ else

82311

+ {

82312

+ avalue[i] = (char *) pst + 2;

82313

+ pst++;

82314

+ }

82315

+ break;

82316

+#endif

82317

+

82318

+ case FFI_TYPE_SINT32:

82319

+ case FFI_TYPE_UINT32:

82320

+ case FFI_TYPE_POINTER:

82321

+ if (ng < NUM_GPR_ARG_REGISTERS)

82322

+ {

82323

+ avalue[i] = pgr;

82324

+ ng++;

82325

+ pgr++;

82326

+ }

82327

+ else

82328

+ {

82329

+ avalue[i] = pst;

82330

+ pst++;

82331

+ }

82332

+ break;

82333

+

82334

+ case FFI_TYPE_STRUCT:

82335

+ /* Structs are passed by reference. The address will appear in a

82336

+ gpr if it is one of the first 8 arguments. */

82337

+ if (ng < NUM_GPR_ARG_REGISTERS)

82338

+ {

82339

+ avalue[i] = (void *) *pgr;

82340

+ ng++;

82341

+ pgr++;

82342

+ }

82343

+ else

82344

+ {

82345

+ avalue[i] = (void *) *pst;

82346

+ pst++;

82347

+ }

82348

+ break;

82349

+

82350

+ case FFI_TYPE_SINT64:

82351

+ case FFI_TYPE_UINT64:

82352

+ /* Passing long long ints are complex, they must

82353

+ be passed in suitable register pairs such as

82354

+ (r3,r4) or (r5,r6) or (r6,r7), or (r7,r8) or (r9,r10)

82355

+ and if the entire pair aren't available then the outgoing

82356

+ parameter stack is used for both but an alignment of 8

82357

+ must will be kept. So we must either look in pgr

82358

+ or pst to find the correct address for this type

82359

+ of parameter. */

82360

+ if (ng < NUM_GPR_ARG_REGISTERS - 1)

82361

+ {

82362

+ if (ng & 1)

82363

+ {

82364

+ /* skip r4, r6, r8 as starting points */

82365

+ ng++;

82366

+ pgr++;

82367

+ }

82368

+ avalue[i] = pgr;

82369

+ ng += 2;

82370

+ pgr += 2;

82371

+ }

82372

+ else

82373

+ {

82374

+ if (((long) pst) & 4)

82375

+ pst++;

82376

+ avalue[i] = pst;

82377

+ pst += 2;

82378

+ ng = NUM_GPR_ARG_REGISTERS;

82379

+ }

82380

+ break;

82381

+

82382

+ default:

82383

+ FFI_ASSERT (0);

82384

+ }

82385

+

82386

+ i++;

82387

+ }

82388

+

82389

+ (closure->fun) (cif, rvalue, avalue, closure->user_data);

82390

+

82391

+ /* Tell ffi_closure_SYSV how to perform return type promotions.

82392

+ Because the FFI_SYSV ABI returns the structures <= 8 bytes in

82393

+ r3/r4 we have to tell ffi_closure_SYSV how to treat them. We

82394

+ combine the base type FFI_SYSV_TYPE_SMALL_STRUCT with the size of

82395

+ the struct less one. We never have a struct with size zero.

82396

+ See the comment in ffitarget.h about ordering. */

82397

+ if (rtypenum == FFI_TYPE_STRUCT

82398

+ && (cif->abi & FFI_SYSV_STRUCT_RET) != 0 && size <= 8)

82399

+ return FFI_SYSV_TYPE_SMALL_STRUCT - 1 + size;

82400

+ return rtypenum;

82401

+}

82402

+#endif

82403

Index: libffi/src/powerpc/linux64.S

82404

===================================================================

82405

--- a/src/libffi/src/powerpc/linux64.S (.../tags/gcc_4_8_2_release)

82406

+++ b/src/libffi/src/powerpc/linux64.S (.../branches/gcc-4_8-branch)

82407

@@ -29,18 +29,25 @@

82408

#include <fficonfig.h>

82409

#include <ffi.h>

82410

82411

-#ifdef __powerpc64__

82412

+#ifdef POWERPC64

82413

.hidden ffi_call_LINUX64

82414

.globl ffi_call_LINUX64

82415

+# if _CALL_ELF == 2

82416

+ .text

82417

+ffi_call_LINUX64:

82418

+ addis %r2, %r12, .TOC.-ffi_call_LINUX64@ha

82419

+ addi %r2, %r2, .TOC.-ffi_call_LINUX64@l

82420

+ .localentry ffi_call_LINUX64, . - ffi_call_LINUX64

82421

+# else

82422

.section ".opd","aw"

82423

.align 3

82424

ffi_call_LINUX64:

82425

-#ifdef _CALL_LINUX

82426

+# ifdef _CALL_LINUX

82427

.quad .L.ffi_call_LINUX64,.TOC.@tocbase,0

82428

.type ffi_call_LINUX64,@function

82429

.text

82430

.L.ffi_call_LINUX64:

82431

-#else

82432

+# else

82433

.hidden .ffi_call_LINUX64

82434

.globl .ffi_call_LINUX64

82435

.quad .ffi_call_LINUX64,.TOC.@tocbase,0

82436

@@ -48,7 +55,8 @@

82437

.type .ffi_call_LINUX64,@function

82438

.text

82439

.ffi_call_LINUX64:

82440

-#endif

82441

+# endif

82442

+# endif

82443

.LFB1:

82444

mflr %r0

82445

std %r28, -32(%r1)

82446

@@ -63,26 +71,35 @@

82447

mr %r31, %r5 /* flags, */

82448

mr %r30, %r6 /* rvalue, */

82449

mr %r29, %r7 /* function address. */

82450

+/* Save toc pointer, not for the ffi_prep_args64 call, but for the later

82451

+ bctrl function call. */

82452

+# if _CALL_ELF == 2

82453

+ std %r2, 24(%r1)

82454

+# else

82455

std %r2, 40(%r1)

82456

+# endif

82457

82458

/* Call ffi_prep_args64. */

82459

mr %r4, %r1

82460

-#ifdef _CALL_LINUX

82461

+# if defined _CALL_LINUX || _CALL_ELF == 2

82462

bl ffi_prep_args64

82463

-#else

82464

+# else

82465

bl .ffi_prep_args64

82466

-#endif

82467

+# endif

82468

82469

- ld %r0, 0(%r29)

82470

+# if _CALL_ELF == 2

82471

+ mr %r12, %r29

82472

+# else

82473

+ ld %r12, 0(%r29)

82474

ld %r2, 8(%r29)

82475

ld %r11, 16(%r29)

82476

-

82477

+# endif

82478

/* Now do the call. */

82479

/* Set up cr1 with bits 4-7 of the flags. */

82480

mtcrf 0x40, %r31

82481

82482

/* Get the address to call into CTR. */

82483

- mtctr %r0

82484

+ mtctr %r12

82485

/* Load all those argument registers. */

82486

ld %r3, -32-(8*8)(%r28)

82487

ld %r4, -32-(7*8)(%r28)

82488

@@ -117,12 +134,17 @@

82489

82490

/* This must follow the call immediately, the unwinder

82491

uses this to find out if r2 has been saved or not. */

82492

+# if _CALL_ELF == 2

82493

+ ld %r2, 24(%r1)

82494

+# else

82495

ld %r2, 40(%r1)

82496

+# endif

82497

82498

/* Now, deal with the return value. */

82499

mtcrf 0x01, %r31

82500

- bt- 30, .Ldone_return_value

82501

- bt- 29, .Lfp_return_value

82502

+ bt 31, .Lstruct_return_value

82503

+ bt 30, .Ldone_return_value

82504

+ bt 29, .Lfp_return_value

82505

std %r3, 0(%r30)

82506

/* Fall through... */

82507

82508

@@ -130,7 +152,7 @@

82509

/* Restore the registers we used and return. */

82510

mr %r1, %r28

82511

ld %r0, 16(%r28)

82512

- ld %r28, -32(%r1)

82513

+ ld %r28, -32(%r28)

82514

mtlr %r0

82515

ld %r29, -24(%r1)

82516

ld %r30, -16(%r1)

82517

@@ -147,14 +169,48 @@

82518

.Lfloat_return_value:

82519

stfs %f1, 0(%r30)

82520

b .Ldone_return_value

82521

+

82522

+.Lstruct_return_value:

82523

+ bf 29, .Lsmall_struct

82524

+ bf 28, .Lfloat_homog_return_value

82525

+ stfd %f1, 0(%r30)

82526

+ stfd %f2, 8(%r30)

82527

+ stfd %f3, 16(%r30)

82528

+ stfd %f4, 24(%r30)

82529

+ stfd %f5, 32(%r30)

82530

+ stfd %f6, 40(%r30)

82531

+ stfd %f7, 48(%r30)

82532

+ stfd %f8, 56(%r30)

82533

+ b .Ldone_return_value

82534

+

82535

+.Lfloat_homog_return_value:

82536

+ stfs %f1, 0(%r30)

82537

+ stfs %f2, 4(%r30)

82538

+ stfs %f3, 8(%r30)

82539

+ stfs %f4, 12(%r30)

82540

+ stfs %f5, 16(%r30)

82541

+ stfs %f6, 20(%r30)

82542

+ stfs %f7, 24(%r30)

82543

+ stfs %f8, 28(%r30)

82544

+ b .Ldone_return_value

82545

+

82546

+.Lsmall_struct:

82547

+ std %r3, 0(%r30)

82548

+ std %r4, 8(%r30)

82549

+ b .Ldone_return_value

82550

+

82551

.LFE1:

82552

.long 0

82553

.byte 0,12,0,1,128,4,0,0

82554

-#ifdef _CALL_LINUX

82555

+# if _CALL_ELF == 2

82556

+ .size ffi_call_LINUX64,.-ffi_call_LINUX64

82557

+# else

82558

+# ifdef _CALL_LINUX

82559

.size ffi_call_LINUX64,.-.L.ffi_call_LINUX64

82560

-#else

82561

+# else

82562

.size .ffi_call_LINUX64,.-.ffi_call_LINUX64

82563

-#endif

82564

+# endif

82565

+# endif

82566

82567

.section .eh_frame,EH_FRAME_FLAGS,@progbits

82568

.Lframe1:

82569

@@ -197,8 +253,8 @@

82570

.uleb128 0x4

82571

.align 3

82572

.LEFDE1:

82573

-#endif

82574

82575

-#if defined __ELF__ && defined __linux__

82576

+# if (defined __ELF__ && defined __linux__) || _CALL_ELF == 2

82577

.section .note.GNU-stack,"",@progbits

82578

+# endif

82579

#endif

82580

Index: libffi/src/powerpc/ffi_linux64.c

82581

===================================================================

82582

--- a/src/libffi/src/powerpc/ffi_linux64.c (.../tags/gcc_4_8_2_release)

82583

+++ b/src/libffi/src/powerpc/ffi_linux64.c (.../branches/gcc-4_8-branch)

82584

@@ -0,0 +1,942 @@

82585

+/* -----------------------------------------------------------------------

82586

82587

82588

82589

82590

82591

82592

+

82593

+ PowerPC Foreign Function Interface

82594

+

82595

+ Permission is hereby granted, free of charge, to any person obtaining

82596

+ a copy of this software and associated documentation files (the

82597

+ ``Software''), to deal in the Software without restriction, including

82598

+ without limitation the rights to use, copy, modify, merge, publish,

82599

+ distribute, sublicense, and/or sell copies of the Software, and to

82600

+ permit persons to whom the Software is furnished to do so, subject to

82601

+ the following conditions:

82602

+

82603

+ The above copyright notice and this permission notice shall be included

82604

+ in all copies or substantial portions of the Software.

82605

+

82606

+ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS

82607

+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

82608

+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.

82609

+ IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR

82610

+ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

82611

+ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

82612

+ OTHER DEALINGS IN THE SOFTWARE.

82613

+ ----------------------------------------------------------------------- */

82614

+

82615

+#include "ffi.h"

82616

+

82617

+#ifdef POWERPC64

82618

+#include "ffi_common.h"

82619

+#include "ffi_powerpc.h"

82620

+

82621

+

82622

+/* About the LINUX64 ABI. */

82623

+enum {

82624

+ NUM_GPR_ARG_REGISTERS64 = 8,

82625

+ NUM_FPR_ARG_REGISTERS64 = 13

82626

+};

82627

+enum { ASM_NEEDS_REGISTERS64 = 4 };

82628

+

82629

+

82630

+#if HAVE_LONG_DOUBLE_VARIANT && FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

82631

+/* Adjust size of ffi_type_longdouble. */

82632

+void FFI_HIDDEN

82633

+ffi_prep_types_linux64 (ffi_abi abi)

82634

+{

82635

+ if ((abi & (FFI_LINUX | FFI_LINUX_LONG_DOUBLE_128)) == FFI_LINUX)

82636

+ {

82637

+ ffi_type_longdouble.size = 8;

82638

+ ffi_type_longdouble.alignment = 8;

82639

+ }

82640

+ else

82641

+ {

82642

+ ffi_type_longdouble.size = 16;

82643

+ ffi_type_longdouble.alignment = 16;

82644

+ }

82645

+}

82646

+#endif

82647

+

82648

+

82649

+#if _CALL_ELF == 2

82650

+static unsigned int

82651

+discover_homogeneous_aggregate (const ffi_type *t, unsigned int *elnum)

82652

+{

82653

+ switch (t->type)

82654

+ {

82655

+ case FFI_TYPE_FLOAT:

82656

+ case FFI_TYPE_DOUBLE:

82657

+ *elnum = 1;

82658

+ return (int) t->type;

82659

+

82660

+ case FFI_TYPE_STRUCT:;

82661

+ {

82662

+ unsigned int base_elt = 0, total_elnum = 0;

82663

+ ffi_type **el = t->elements;

82664

+ while (*el)

82665

+ {

82666

+ unsigned int el_elt, el_elnum = 0;

82667

+ el_elt = discover_homogeneous_aggregate (*el, &el_elnum);

82668

+ if (el_elt == 0

82669

+ || (base_elt && base_elt != el_elt))

82670

+ return 0;

82671

+ base_elt = el_elt;

82672

+ total_elnum += el_elnum;

82673

+ if (total_elnum > 8)

82674

+ return 0;

82675

+ el++;

82676

+ }

82677

+ *elnum = total_elnum;

82678

+ return base_elt;

82679

+ }

82680

+

82681

+ default:

82682

+ return 0;

82683

+ }

82684

+}

82685

+#endif

82686

+

82687

+

82688

+/* Perform machine dependent cif processing */

82689

+static ffi_status

82690

+ffi_prep_cif_linux64_core (ffi_cif *cif)

82691

+{

82692

+ ffi_type **ptr;

82693

+ unsigned bytes;

82694

+ unsigned i, fparg_count = 0, intarg_count = 0;

82695

+ unsigned flags = cif->flags;

82696

+#if _CALL_ELF == 2

82697

+ unsigned int elt, elnum;

82698

+#endif

82699

+

82700

+#if FFI_TYPE_LONGDOUBLE == FFI_TYPE_DOUBLE

82701

+ /* If compiled without long double support.. */

82702

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

82703

+ return FFI_BAD_ABI;

82704

+#endif

82705

+

82706

+ /* The machine-independent calculation of cif->bytes doesn't work

82707

+ for us. Redo the calculation. */

82708

+#if _CALL_ELF == 2

82709

+ /* Space for backchain, CR, LR, TOC and the asm's temp regs. */

82710

+ bytes = (4 + ASM_NEEDS_REGISTERS64) * sizeof (long);

82711

+

82712

+ /* Space for the general registers. */

82713

+ bytes += NUM_GPR_ARG_REGISTERS64 * sizeof (long);

82714

+#else

82715

+ /* Space for backchain, CR, LR, cc/ld doubleword, TOC and the asm's temp

82716

+ regs. */

82717

+ bytes = (6 + ASM_NEEDS_REGISTERS64) * sizeof (long);

82718

+

82719

+ /* Space for the mandatory parm save area and general registers. */

82720

+ bytes += 2 * NUM_GPR_ARG_REGISTERS64 * sizeof (long);

82721

+#endif

82722

+

82723

+ /* Return value handling. */

82724

+ switch (cif->rtype->type)

82725

+ {

82726

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

82727

+ case FFI_TYPE_LONGDOUBLE:

82728

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

82729

+ flags |= FLAG_RETURNS_128BITS;

82730

+ /* Fall through. */

82731

+#endif

82732

+ case FFI_TYPE_DOUBLE:

82733

+ flags |= FLAG_RETURNS_64BITS;

82734

+ /* Fall through. */

82735

+ case FFI_TYPE_FLOAT:

82736

+ flags |= FLAG_RETURNS_FP;

82737

+ break;

82738

+

82739

+ case FFI_TYPE_UINT128:

82740

+ flags |= FLAG_RETURNS_128BITS;

82741

+ /* Fall through. */

82742

+ case FFI_TYPE_UINT64:

82743

+ case FFI_TYPE_SINT64:

82744

+ flags |= FLAG_RETURNS_64BITS;

82745

+ break;

82746

+

82747

+ case FFI_TYPE_STRUCT:

82748

+#if _CALL_ELF == 2

82749

+ elt = discover_homogeneous_aggregate (cif->rtype, &elnum);

82750

+ if (elt)

82751

+ {

82752

+ if (elt == FFI_TYPE_DOUBLE)

82753

+ flags |= FLAG_RETURNS_64BITS;

82754

+ flags |= FLAG_RETURNS_FP | FLAG_RETURNS_SMST;

82755

+ break;

82756

+ }

82757

+ if (cif->rtype->size <= 16)

82758

+ {

82759

+ flags |= FLAG_RETURNS_SMST;

82760

+ break;

82761

+ }

82762

+#endif

82763

+ intarg_count++;

82764

+ flags |= FLAG_RETVAL_REFERENCE;

82765

+ /* Fall through. */

82766

+ case FFI_TYPE_VOID:

82767

+ flags |= FLAG_RETURNS_NOTHING;

82768

+ break;

82769

+

82770

+ default:

82771

+ /* Returns 32-bit integer, or similar. Nothing to do here. */

82772

+ break;

82773

+ }

82774

+

82775

+ for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

82776

+ {

82777

+ unsigned int align;

82778

+

82779

+ switch ((*ptr)->type)

82780

+ {

82781

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

82782

+ case FFI_TYPE_LONGDOUBLE:

82783

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

82784

+ {

82785

+ fparg_count++;

82786

+ intarg_count++;

82787

+ }

82788

+ /* Fall through. */

82789

+#endif

82790

+ case FFI_TYPE_DOUBLE:

82791

+ case FFI_TYPE_FLOAT:

82792

+ fparg_count++;

82793

+ intarg_count++;

82794

+ if (fparg_count > NUM_FPR_ARG_REGISTERS64)

82795

+ flags |= FLAG_ARG_NEEDS_PSAVE;

82796

+ break;

82797

+

82798

+ case FFI_TYPE_STRUCT:

82799

+ if ((cif->abi & FFI_LINUX_STRUCT_ALIGN) != 0)

82800

+ {

82801

+ align = (*ptr)->alignment;

82802

+ if (align > 16)

82803

+ align = 16;

82804

+ align = align / 8;

82805

+ if (align > 1)

82806

+ intarg_count = ALIGN (intarg_count, align);

82807

+ }

82808

+ intarg_count += ((*ptr)->size + 7) / 8;

82809

+#if _CALL_ELF == 2

82810

+ elt = discover_homogeneous_aggregate (*ptr, &elnum);

82811

+ if (elt)

82812

+ {

82813

+ fparg_count += elnum;

82814

+ if (fparg_count > NUM_FPR_ARG_REGISTERS64)

82815

+ flags |= FLAG_ARG_NEEDS_PSAVE;

82816

+ }

82817

+ else

82818

+#endif

82819

+ {

82820

+ if (intarg_count > NUM_GPR_ARG_REGISTERS64)

82821

+ flags |= FLAG_ARG_NEEDS_PSAVE;

82822

+ }

82823

+ break;

82824

+

82825

+ case FFI_TYPE_POINTER:

82826

+ case FFI_TYPE_UINT64:

82827

+ case FFI_TYPE_SINT64:

82828

+ case FFI_TYPE_INT:

82829

+ case FFI_TYPE_UINT32:

82830

+ case FFI_TYPE_SINT32:

82831

+ case FFI_TYPE_UINT16:

82832

+ case FFI_TYPE_SINT16:

82833

+ case FFI_TYPE_UINT8:

82834

+ case FFI_TYPE_SINT8:

82835

+ /* Everything else is passed as a 8-byte word in a GPR, either

82836

+ the object itself or a pointer to it. */

82837

+ intarg_count++;

82838

+ if (intarg_count > NUM_GPR_ARG_REGISTERS64)

82839

+ flags |= FLAG_ARG_NEEDS_PSAVE;

82840

+ break;

82841

+ default:

82842

+ FFI_ASSERT (0);

82843

+ }

82844

+ }

82845

+

82846

+ if (fparg_count != 0)

82847

+ flags |= FLAG_FP_ARGUMENTS;

82848

+ if (intarg_count > 4)

82849

+ flags |= FLAG_4_GPR_ARGUMENTS;

82850

+

82851

+ /* Space for the FPR registers, if needed. */

82852

+ if (fparg_count != 0)

82853

+ bytes += NUM_FPR_ARG_REGISTERS64 * sizeof (double);

82854

+

82855

+ /* Stack space. */

82856

+#if _CALL_ELF == 2

82857

+ if ((flags & FLAG_ARG_NEEDS_PSAVE) != 0)

82858

+ bytes += intarg_count * sizeof (long);

82859

+#else

82860

+ if (intarg_count > NUM_GPR_ARG_REGISTERS64)

82861

+ bytes += (intarg_count - NUM_GPR_ARG_REGISTERS64) * sizeof (long);

82862

+#endif

82863

+

82864

+ /* The stack space allocated needs to be a multiple of 16 bytes. */

82865

+ bytes = (bytes + 15) & ~0xF;

82866

+

82867

+ cif->flags = flags;

82868

+ cif->bytes = bytes;

82869

+

82870

+ return FFI_OK;

82871

+}

82872

+

82873

+ffi_status FFI_HIDDEN

82874

+ffi_prep_cif_linux64 (ffi_cif *cif)

82875

+{

82876

+ if ((cif->abi & FFI_LINUX) != 0)

82877

+ cif->nfixedargs = cif->nargs;

82878

+#if _CALL_ELF != 2

82879

+ else if (cif->abi == FFI_COMPAT_LINUX64)

82880

+ {

82881

+ /* This call is from old code. Don't touch cif->nfixedargs

82882

+ since old code will be using a smaller cif. */

82883

+ cif->flags |= FLAG_COMPAT;

82884

+ /* Translate to new abi value. */

82885

+ cif->abi = FFI_LINUX | FFI_LINUX_LONG_DOUBLE_128;

82886

+ }

82887

+#endif

82888

+ else

82889

+ return FFI_BAD_ABI;

82890

+ return ffi_prep_cif_linux64_core (cif);

82891

+}

82892

+

82893

+ffi_status FFI_HIDDEN

82894

+ffi_prep_cif_linux64_var (ffi_cif *cif,

82895

+ unsigned int nfixedargs,

82896

+ unsigned int ntotalargs MAYBE_UNUSED)

82897

+{

82898

+ if ((cif->abi & FFI_LINUX) != 0)

82899

+ cif->nfixedargs = nfixedargs;

82900

+#if _CALL_ELF != 2

82901

+ else if (cif->abi == FFI_COMPAT_LINUX64)

82902

+ {

82903

+ /* This call is from old code. Don't touch cif->nfixedargs

82904

+ since old code will be using a smaller cif. */

82905

+ cif->flags |= FLAG_COMPAT;

82906

+ /* Translate to new abi value. */

82907

+ cif->abi = FFI_LINUX | FFI_LINUX_LONG_DOUBLE_128;

82908

+ }

82909

+#endif

82910

+ else

82911

+ return FFI_BAD_ABI;

82912

+#if _CALL_ELF == 2

82913

+ cif->flags |= FLAG_ARG_NEEDS_PSAVE;

82914

+#endif

82915

+ return ffi_prep_cif_linux64_core (cif);

82916

+}

82917

+

82918

+

82919

+/* ffi_prep_args64 is called by the assembly routine once stack space

82920

+ has been allocated for the function's arguments.

82921

+

82922

+ The stack layout we want looks like this:

82923

+

82924

+ | Ret addr from ffi_call_LINUX64 8bytes | higher addresses

82925

+ |--------------------------------------------|

82926

+ | CR save area 8bytes |

82927

+ |--------------------------------------------|

82928

+ | Previous backchain pointer 8 | stack pointer here

82929

+ |--------------------------------------------|<+ <<< on entry to

82930

+ | Saved r28-r31 4*8 | | ffi_call_LINUX64

82931

+ |--------------------------------------------| |

82932

+ | GPR registers r3-r10 8*8 | |

82933

+ |--------------------------------------------| |

82934

+ | FPR registers f1-f13 (optional) 13*8 | |

82935

+ |--------------------------------------------| |

82936

+ | Parameter save area | |

82937

+ |--------------------------------------------| |

82938

+ | TOC save area 8 | |

82939

+ |--------------------------------------------| | stack |

82940

+ | Linker doubleword 8 | | grows |

82941

+ |--------------------------------------------| | down V

82942

+ | Compiler doubleword 8 | |

82943

+ |--------------------------------------------| | lower addresses

82944

+ | Space for callee's LR 8 | |

82945

+ |--------------------------------------------| |

82946

+ | CR save area 8 | |

82947

+ |--------------------------------------------| | stack pointer here

82948

+ | Current backchain pointer 8 |-/ during

82949

+ |--------------------------------------------| <<< ffi_call_LINUX64

82950

+

82951

+*/

82952

+

82953

+void FFI_HIDDEN

82954

+ffi_prep_args64 (extended_cif *ecif, unsigned long *const stack)

82955

+{

82956

+ const unsigned long bytes = ecif->cif->bytes;

82957

+ const unsigned long flags = ecif->cif->flags;

82958

+

82959

+ typedef union

82960

+ {

82961

+ char *c;

82962

+ unsigned long *ul;

82963

+ float *f;

82964

+ double *d;

82965

+ size_t p;

82966

+ } valp;

82967

+

82968

+ /* 'stacktop' points at the previous backchain pointer. */

82969

+ valp stacktop;

82970

+

82971

+ /* 'next_arg' points at the space for gpr3, and grows upwards as

82972

+ we use GPR registers, then continues at rest. */

82973

+ valp gpr_base;

82974

+ valp gpr_end;

82975

+ valp rest;

82976

+ valp next_arg;

82977

+

82978

+ /* 'fpr_base' points at the space for fpr3, and grows upwards as

82979

+ we use FPR registers. */

82980

+ valp fpr_base;

82981

+ unsigned int fparg_count;

82982

+

82983

+ unsigned int i, words, nargs, nfixedargs;

82984

+ ffi_type **ptr;

82985

+ double double_tmp;

82986

+ union

82987

+ {

82988

+ void **v;

82989

+ char **c;

82990

+ signed char **sc;

82991

+ unsigned char **uc;

82992

+ signed short **ss;

82993

+ unsigned short **us;

82994

+ signed int **si;

82995

+ unsigned int **ui;

82996

+ unsigned long **ul;

82997

+ float **f;

82998

+ double **d;

82999

+ } p_argv;

83000

+ unsigned long gprvalue;

83001

+ unsigned long align;

83002

+

83003

+ stacktop.c = (char *) stack + bytes;

83004

+ gpr_base.ul = stacktop.ul - ASM_NEEDS_REGISTERS64 - NUM_GPR_ARG_REGISTERS64;

83005

+ gpr_end.ul = gpr_base.ul + NUM_GPR_ARG_REGISTERS64;

83006

+#if _CALL_ELF == 2

83007

+ rest.ul = stack + 4 + NUM_GPR_ARG_REGISTERS64;

83008

+#else

83009

+ rest.ul = stack + 6 + NUM_GPR_ARG_REGISTERS64;

83010

+#endif

83011

+ fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS64;

83012

+ fparg_count = 0;

83013

+ next_arg.ul = gpr_base.ul;

83014

+

83015

+ /* Check that everything starts aligned properly. */

83016

+ FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

83017

+ FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

83018

+ FFI_ASSERT ((bytes & 0xF) == 0);

83019

+

83020

+ /* Deal with return values that are actually pass-by-reference. */

83021

+ if (flags & FLAG_RETVAL_REFERENCE)

83022

+ *next_arg.ul++ = (unsigned long) (char *) ecif->rvalue;

83023

+

83024

+ /* Now for the arguments. */

83025

+ p_argv.v = ecif->avalue;

83026

+ nargs = ecif->cif->nargs;

83027

+#if _CALL_ELF != 2

83028

+ nfixedargs = (unsigned) -1;

83029

+ if ((flags & FLAG_COMPAT) == 0)

83030

+#endif

83031

+ nfixedargs = ecif->cif->nfixedargs;

83032

+ for (ptr = ecif->cif->arg_types, i = 0;

83033

+ i < nargs;

83034

+ i++, ptr++, p_argv.v++)

83035

+ {

83036

+#if _CALL_ELF == 2

83037

+ unsigned int elt, elnum;

83038

+#endif

83039

+

83040

+ switch ((*ptr)->type)

83041

+ {

83042

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

83043

+ case FFI_TYPE_LONGDOUBLE:

83044

+ if ((ecif->cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

83045

+ {

83046

+ double_tmp = (*p_argv.d)[0];

83047

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

83048

+ {

83049

+ *fpr_base.d++ = double_tmp;

83050

+# if _CALL_ELF != 2

83051

+ if ((flags & FLAG_COMPAT) != 0)

83052

+ *next_arg.d = double_tmp;

83053

+# endif

83054

+ }

83055

+ else

83056

+ *next_arg.d = double_tmp;

83057

+ if (++next_arg.ul == gpr_end.ul)

83058

+ next_arg.ul = rest.ul;

83059

+ fparg_count++;

83060

+ double_tmp = (*p_argv.d)[1];

83061

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

83062

+ {

83063

+ *fpr_base.d++ = double_tmp;

83064

+# if _CALL_ELF != 2

83065

+ if ((flags & FLAG_COMPAT) != 0)

83066

+ *next_arg.d = double_tmp;

83067

+# endif

83068

+ }

83069

+ else

83070

+ *next_arg.d = double_tmp;

83071

+ if (++next_arg.ul == gpr_end.ul)

83072

+ next_arg.ul = rest.ul;

83073

+ fparg_count++;

83074

+ FFI_ASSERT (__LDBL_MANT_DIG__ == 106);

83075

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

83076

+ break;

83077

+ }

83078

+ /* Fall through. */

83079

+#endif

83080

+ case FFI_TYPE_DOUBLE:

83081

+ double_tmp = **p_argv.d;

83082

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

83083

+ {

83084

+ *fpr_base.d++ = double_tmp;

83085

+#if _CALL_ELF != 2

83086

+ if ((flags & FLAG_COMPAT) != 0)

83087

+ *next_arg.d = double_tmp;

83088

+#endif

83089

+ }

83090

+ else

83091

+ *next_arg.d = double_tmp;

83092

+ if (++next_arg.ul == gpr_end.ul)

83093

+ next_arg.ul = rest.ul;

83094

+ fparg_count++;

83095

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

83096

+ break;

83097

+

83098

+ case FFI_TYPE_FLOAT:

83099

+ double_tmp = **p_argv.f;

83100

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

83101

+ {

83102

+ *fpr_base.d++ = double_tmp;

83103

+#if _CALL_ELF != 2

83104

+ if ((flags & FLAG_COMPAT) != 0)

83105

+ *next_arg.f = (float) double_tmp;

83106

+#endif

83107

+ }

83108

+ else

83109

+ *next_arg.f = (float) double_tmp;

83110

+ if (++next_arg.ul == gpr_end.ul)

83111

+ next_arg.ul = rest.ul;

83112

+ fparg_count++;

83113

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

83114

+ break;

83115

+

83116

+ case FFI_TYPE_STRUCT:

83117

+ if ((ecif->cif->abi & FFI_LINUX_STRUCT_ALIGN) != 0)

83118

+ {

83119

+ align = (*ptr)->alignment;

83120

+ if (align > 16)

83121

+ align = 16;

83122

+ if (align > 1)

83123

+ next_arg.p = ALIGN (next_arg.p, align);

83124

+ }

83125

+#if _CALL_ELF == 2

83126

+ elt = discover_homogeneous_aggregate (*ptr, &elnum);

83127

+ if (elt)

83128

+ {

83129

+ union {

83130

+ void *v;

83131

+ float *f;

83132

+ double *d;

83133

+ } arg;

83134

+

83135

+ arg.v = *p_argv.v;

83136

+ if (elt == FFI_TYPE_FLOAT)

83137

+ {

83138

+ do

83139

+ {

83140

+ double_tmp = *arg.f++;

83141

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64

83142

+ && i < nfixedargs)

83143

+ *fpr_base.d++ = double_tmp;

83144

+ else

83145

+ *next_arg.f = (float) double_tmp;

83146

+ if (++next_arg.f == gpr_end.f)

83147

+ next_arg.f = rest.f;

83148

+ fparg_count++;

83149

+ }

83150

+ while (--elnum != 0);

83151

+ if ((next_arg.p & 3) != 0)

83152

+ {

83153

+ if (++next_arg.f == gpr_end.f)

83154

+ next_arg.f = rest.f;

83155

+ }

83156

+ }

83157

+ else

83158

+ do

83159

+ {

83160

+ double_tmp = *arg.d++;

83161

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

83162

+ *fpr_base.d++ = double_tmp;

83163

+ else

83164

+ *next_arg.d = double_tmp;

83165

+ if (++next_arg.d == gpr_end.d)

83166

+ next_arg.d = rest.d;

83167

+ fparg_count++;

83168

+ }

83169

+ while (--elnum != 0);

83170

+ }

83171

+ else

83172

+#endif

83173

+ {

83174

+ words = ((*ptr)->size + 7) / 8;

83175

+ if (next_arg.ul >= gpr_base.ul && next_arg.ul + words > gpr_end.ul)

83176

+ {

83177

+ size_t first = gpr_end.c - next_arg.c;

83178

+ memcpy (next_arg.c, *p_argv.c, first);

83179

+ memcpy (rest.c, *p_argv.c + first, (*ptr)->size - first);

83180

+ next_arg.c = rest.c + words * 8 - first;

83181

+ }

83182

+ else

83183

+ {

83184

+ char *where = next_arg.c;

83185

+

83186

+#ifndef __LITTLE_ENDIAN__

83187

+ /* Structures with size less than eight bytes are passed

83188

+ left-padded. */

83189

+ if ((*ptr)->size < 8)

83190

+ where += 8 - (*ptr)->size;

83191

+#endif

83192

+ memcpy (where, *p_argv.c, (*ptr)->size);

83193

+ next_arg.ul += words;

83194

+ if (next_arg.ul == gpr_end.ul)

83195

+ next_arg.ul = rest.ul;

83196

+ }

83197

+ }

83198

+ break;

83199

+

83200

+ case FFI_TYPE_UINT8:

83201

+ gprvalue = **p_argv.uc;

83202

+ goto putgpr;

83203

+ case FFI_TYPE_SINT8:

83204

+ gprvalue = **p_argv.sc;

83205

+ goto putgpr;

83206

+ case FFI_TYPE_UINT16:

83207

+ gprvalue = **p_argv.us;

83208

+ goto putgpr;

83209

+ case FFI_TYPE_SINT16:

83210

+ gprvalue = **p_argv.ss;

83211

+ goto putgpr;

83212

+ case FFI_TYPE_UINT32:

83213

+ gprvalue = **p_argv.ui;

83214

+ goto putgpr;

83215

+ case FFI_TYPE_INT:

83216

+ case FFI_TYPE_SINT32:

83217

+ gprvalue = **p_argv.si;

83218

+ goto putgpr;

83219

+

83220

+ case FFI_TYPE_UINT64:

83221

+ case FFI_TYPE_SINT64:

83222

+ case FFI_TYPE_POINTER:

83223

+ gprvalue = **p_argv.ul;

83224

+ putgpr:

83225

+ *next_arg.ul++ = gprvalue;

83226

+ if (next_arg.ul == gpr_end.ul)

83227

+ next_arg.ul = rest.ul;

83228

+ break;

83229

+ }

83230

+ }

83231

+

83232

+ FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS

83233

+ || (next_arg.ul >= gpr_base.ul

83234

+ && next_arg.ul <= gpr_base.ul + 4));

83235

+}

83236

+

83237

+

83238

+#if _CALL_ELF == 2

83239

+#define MIN_CACHE_LINE_SIZE 8

83240

+

83241

+static void

83242

+flush_icache (char *wraddr, char *xaddr, int size)

83243

+{

83244

+ int i;

83245

+ for (i = 0; i < size; i += MIN_CACHE_LINE_SIZE)

83246

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;"

83247

+ : : "r" (xaddr + i), "r" (wraddr + i) : "memory");

83248

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;" "sync;" "isync;"

83249

+ : : "r"(xaddr + size - 1), "r"(wraddr + size - 1)

83250

+ : "memory");

83251

+}

83252

+#endif

83253

+

83254

+ffi_status

83255

+ffi_prep_closure_loc_linux64 (ffi_closure *closure,

83256

+ ffi_cif *cif,

83257

+ void (*fun) (ffi_cif *, void *, void **, void *),

83258

+ void *user_data,

83259

+ void *codeloc)

83260

+{

83261

+#if _CALL_ELF == 2

83262

+ unsigned int *tramp = (unsigned int *) &closure->tramp[0];

83263

+

83264

+ if (cif->abi < FFI_LINUX || cif->abi >= FFI_LAST_ABI)

83265

+ return FFI_BAD_ABI;

83266

+

83267

+ tramp[0] = 0xe96c0018; /* 0: ld 11,2f-0b(12) */

83268

+ tramp[1] = 0xe98c0010; /* ld 12,1f-0b(12) */

83269

+ tramp[2] = 0x7d8903a6; /* mtctr 12 */

83270

+ tramp[3] = 0x4e800420; /* bctr */

83271

+ /* 1: .quad function_addr */

83272

+ /* 2: .quad context */

83273

+ *(void **) &tramp[4] = (void *) ffi_closure_LINUX64;

83274

+ *(void **) &tramp[6] = codeloc;

83275

+ flush_icache ((char *)tramp, (char *)codeloc, FFI_TRAMPOLINE_SIZE);

83276

+#else

83277

+ void **tramp = (void **) &closure->tramp[0];

83278

+

83279

+ if (cif->abi < FFI_LINUX || cif->abi >= FFI_LAST_ABI)

83280

+ return FFI_BAD_ABI;

83281

+

83282

+ /* Copy function address and TOC from ffi_closure_LINUX64. */

83283

+ memcpy (tramp, (char *) ffi_closure_LINUX64, 16);

83284

+ tramp[2] = codeloc;

83285

+#endif

83286

+

83287

+ closure->cif = cif;

83288

+ closure->fun = fun;

83289

+ closure->user_data = user_data;

83290

+

83291

+ return FFI_OK;

83292

+}

83293

+

83294

+

83295

+int FFI_HIDDEN

83296

+ffi_closure_helper_LINUX64 (ffi_closure *closure, void *rvalue,

83297

+ unsigned long *pst, ffi_dblfl *pfr)

83298

+{

83299

+ /* rvalue is the pointer to space for return value in closure assembly */

83300

+ /* pst is the pointer to parameter save area

83301

+ (r3-r10 are stored into its first 8 slots by ffi_closure_LINUX64) */

83302

+ /* pfr is the pointer to where f1-f13 are stored in ffi_closure_LINUX64 */

83303

+

83304

+ void **avalue;

83305

+ ffi_type **arg_types;

83306

+ unsigned long i, avn, nfixedargs;

83307

+ ffi_cif *cif;

83308

+ ffi_dblfl *end_pfr = pfr + NUM_FPR_ARG_REGISTERS64;

83309

+ unsigned long align;

83310

+

83311

+ cif = closure->cif;

83312

+ avalue = alloca (cif->nargs * sizeof (void *));

83313

+

83314

+ /* Copy the caller's structure return value address so that the

83315

+ closure returns the data directly to the caller. */

83316

+ if (cif->rtype->type == FFI_TYPE_STRUCT

83317

+ && (cif->flags & FLAG_RETURNS_SMST) == 0)

83318

+ {

83319

+ rvalue = (void *) *pst;

83320

+ pst++;

83321

+ }

83322

+

83323

+ i = 0;

83324

+ avn = cif->nargs;

83325

+#if _CALL_ELF != 2

83326

+ nfixedargs = (unsigned) -1;

83327

+ if ((cif->flags & FLAG_COMPAT) == 0)

83328

+#endif

83329

+ nfixedargs = cif->nfixedargs;

83330

+ arg_types = cif->arg_types;

83331

+

83332

+ /* Grab the addresses of the arguments from the stack frame. */

83333

+ while (i < avn)

83334

+ {

83335

+ unsigned int elt, elnum;

83336

+

83337

+ switch (arg_types[i]->type)

83338

+ {

83339

+ case FFI_TYPE_SINT8:

83340

+ case FFI_TYPE_UINT8:

83341

+#ifndef __LITTLE_ENDIAN__

83342

+ avalue[i] = (char *) pst + 7;

83343

+ pst++;

83344

+ break;

83345

+#endif

83346

+

83347

+ case FFI_TYPE_SINT16:

83348

+ case FFI_TYPE_UINT16:

83349

+#ifndef __LITTLE_ENDIAN__

83350

+ avalue[i] = (char *) pst + 6;

83351

+ pst++;

83352

+ break;

83353

+#endif

83354

+

83355

+ case FFI_TYPE_SINT32:

83356

+ case FFI_TYPE_UINT32:

83357

+#ifndef __LITTLE_ENDIAN__

83358

+ avalue[i] = (char *) pst + 4;

83359

+ pst++;

83360

+ break;

83361

+#endif

83362

+

83363

+ case FFI_TYPE_SINT64:

83364

+ case FFI_TYPE_UINT64:

83365

+ case FFI_TYPE_POINTER:

83366

+ avalue[i] = pst;

83367

+ pst++;

83368

+ break;

83369

+

83370

+ case FFI_TYPE_STRUCT:

83371

+ if ((cif->abi & FFI_LINUX_STRUCT_ALIGN) != 0)

83372

+ {

83373

+ align = arg_types[i]->alignment;

83374

+ if (align > 16)

83375

+ align = 16;

83376

+ if (align > 1)

83377

+ pst = (unsigned long *) ALIGN ((size_t) pst, align);

83378

+ }

83379

+ elt = 0;

83380

+#if _CALL_ELF == 2

83381

+ elt = discover_homogeneous_aggregate (arg_types[i], &elnum);

83382

+#endif

83383

+ if (elt)

83384

+ {

83385

+ union {

83386

+ void *v;

83387

+ unsigned long *ul;

83388

+ float *f;

83389

+ double *d;

83390

+ size_t p;

83391

+ } to, from;

83392

+

83393

+ /* Repackage the aggregate from its parts. The

83394

+ aggregate size is not greater than the space taken by

83395

+ the registers so store back to the register/parameter

83396

+ save arrays. */

83397

+ if (pfr + elnum <= end_pfr)

83398

+ to.v = pfr;

83399

+ else

83400

+ to.v = pst;

83401

+

83402

+ avalue[i] = to.v;

83403

+ from.ul = pst;

83404

+ if (elt == FFI_TYPE_FLOAT)

83405

+ {

83406

+ do

83407

+ {

83408

+ if (pfr < end_pfr && i < nfixedargs)

83409

+ {

83410

+ *to.f = (float) pfr->d;

83411

+ pfr++;

83412

+ }

83413

+ else

83414

+ *to.f = *from.f;

83415

+ to.f++;

83416

+ from.f++;

83417

+ }

83418

+ while (--elnum != 0);

83419

+ }

83420

+ else

83421

+ {

83422

+ do

83423

+ {

83424

+ if (pfr < end_pfr && i < nfixedargs)

83425

+ {

83426

+ *to.d = pfr->d;

83427

+ pfr++;

83428

+ }

83429

+ else

83430

+ *to.d = *from.d;

83431

+ to.d++;

83432

+ from.d++;

83433

+ }

83434

+ while (--elnum != 0);

83435

+ }

83436

+ }

83437

+ else

83438

+ {

83439

+#ifndef __LITTLE_ENDIAN__

83440

+ /* Structures with size less than eight bytes are passed

83441

+ left-padded. */

83442

+ if (arg_types[i]->size < 8)

83443

+ avalue[i] = (char *) pst + 8 - arg_types[i]->size;

83444

+ else

83445

+#endif

83446

+ avalue[i] = pst;

83447

+ }

83448

+ pst += (arg_types[i]->size + 7) / 8;

83449

+ break;

83450

+

83451

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

83452

+ case FFI_TYPE_LONGDOUBLE:

83453

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

83454

+ {

83455

+ if (pfr + 1 < end_pfr && i + 1 < nfixedargs)

83456

+ {

83457

+ avalue[i] = pfr;

83458

+ pfr += 2;

83459

+ }

83460

+ else

83461

+ {

83462

+ if (pfr < end_pfr && i < nfixedargs)

83463

+ {

83464

+ /* Passed partly in f13 and partly on the stack.

83465

+ Move it all to the stack. */

83466

+ *pst = *(unsigned long *) pfr;

83467

+ pfr++;

83468

+ }

83469

+ avalue[i] = pst;

83470

+ }

83471

+ pst += 2;

83472

+ break;

83473

+ }

83474

+ /* Fall through. */

83475

+#endif

83476

+ case FFI_TYPE_DOUBLE:

83477

+ /* On the outgoing stack all values are aligned to 8 */

83478

+ /* there are 13 64bit floating point registers */

83479

+

83480

+ if (pfr < end_pfr && i < nfixedargs)

83481

+ {

83482

+ avalue[i] = pfr;

83483

+ pfr++;

83484

+ }

83485

+ else

83486

+ avalue[i] = pst;

83487

+ pst++;

83488

+ break;

83489

+

83490

+ case FFI_TYPE_FLOAT:

83491

+ if (pfr < end_pfr && i < nfixedargs)

83492

+ {

83493

+ /* Float values are stored as doubles in the

83494

+ ffi_closure_LINUX64 code. Fix them here. */

83495

+ pfr->f = (float) pfr->d;

83496

+ avalue[i] = pfr;

83497

+ pfr++;

83498

+ }

83499

+ else

83500

+ avalue[i] = pst;

83501

+ pst++;

83502

+ break;

83503

+

83504

+ default:

83505

+ FFI_ASSERT (0);

83506

+ }

83507

+

83508

+ i++;

83509

+ }

83510

+

83511

+

83512

+ (closure->fun) (cif, rvalue, avalue, closure->user_data);

83513

+

83514

+ /* Tell ffi_closure_LINUX64 how to perform return type promotions. */

83515

+ if ((cif->flags & FLAG_RETURNS_SMST) != 0)

83516

+ {

83517

+ if ((cif->flags & FLAG_RETURNS_FP) == 0)

83518

+ return FFI_V2_TYPE_SMALL_STRUCT + cif->rtype->size - 1;

83519

+ else if ((cif->flags & FLAG_RETURNS_64BITS) != 0)

83520

+ return FFI_V2_TYPE_DOUBLE_HOMOG;

83521

+ else

83522

+ return FFI_V2_TYPE_FLOAT_HOMOG;

83523

+ }

83524

+ return cif->rtype->type;

83525

+}

83526

+#endif

83527

Index: libffi/src/types.c

83528

===================================================================

83529

--- a/src/libffi/src/types.c (.../tags/gcc_4_8_2_release)

83530

+++ b/src/libffi/src/types.c (.../branches/gcc-4_8-branch)

83531

@@ -44,6 +44,17 @@

83532

id, NULL \

83533

}

83534

83535

+#define FFI_NONCONST_TYPEDEF(name, type, id) \

83536

+struct struct_align_##name { \

83537

+ char c; \

83538

+ type x; \

83539

+}; \

83540

+ffi_type ffi_type_##name = { \

83541

+ sizeof(type), \

83542

+ offsetof(struct struct_align_##name, x), \

83543

+ id, NULL \

83544

+}

83545

+

83546

/* Size and alignment are fake here. They must not be 0. */

83547

const ffi_type ffi_type_void = {

83548

1, 1, FFI_TYPE_VOID, NULL

83549

@@ -73,5 +84,9 @@

83550

# endif

83551

const ffi_type ffi_type_longdouble = { 16, 16, 4, NULL };

83552

#elif FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

83553

+# if HAVE_LONG_DOUBLE_VARIANT

83554

+FFI_NONCONST_TYPEDEF(longdouble, long double, FFI_TYPE_LONGDOUBLE);

83555

+# else

83556

FFI_TYPEDEF(longdouble, long double, FFI_TYPE_LONGDOUBLE);

83557

+# endif

83558

#endif

83559

Index: libffi/src/prep_cif.c

83560

===================================================================

83561

--- a/src/libffi/src/prep_cif.c (.../tags/gcc_4_8_2_release)

83562

+++ b/src/libffi/src/prep_cif.c (.../branches/gcc-4_8-branch)

83563

@@ -126,6 +126,10 @@

83564

83565

cif->flags = 0;

83566

83567

+#if HAVE_LONG_DOUBLE_VARIANT

83568

+ ffi_prep_types (abi);

83569

+#endif

83570

+

83571

/* Initialize the return type if necessary */

83572

if ((cif->rtype->size == 0) && (initialize_aggregate(cif->rtype) != FFI_OK))

83573

return FFI_BAD_TYPEDEF;

83574

Index: libffi/ChangeLog

83575

===================================================================

83576

--- a/src/libffi/ChangeLog (.../tags/gcc_4_8_2_release)

83577

+++ b/src/libffi/ChangeLog (.../branches/gcc-4_8-branch)

83578

@@ -1,3 +1,39 @@

83579

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

83580

+

83581

+ Backport mainline r205844.

83582

+ 2013-11-18 Alan Modra <amodra@gmail.com>

83583

+ * src/powerpc/ffitarget.h: Import from upstream.

83584

+ * src/powerpc/ffi_powerpc.h: Likewise.

83585

+ * src/powerpc/ffi.c: Likewise.

83586

+ * src/powerpc/ffi_sysv.c: Likewise.

83587

+ * src/powerpc/ffi_linux64.c: Likewise.

83588

+ * src/powerpc/sysv.S: Likewise.

83589

+ * src/powerpc/ppc_closure.S: Likewise.

83590

+ * src/powerpc/linux64.S: Likewise.

83591

+ * src/powerpc/linux64_closure.S: Likewise.

83592

+ * src/types.c: Likewise.

83593

+ * Makefile.am (EXTRA_DIST): Add new src/powerpc files.

83594

+ (nodist_libffi_la_SOURCES <POWERPC, POWERPC_FREEBSD>): Likewise.

83595

+ * configure.ac (HAVE_LONG_DOUBLE_VARIANT): Define for powerpc.

83596

+ * include/ffi.h.in (ffi_prep_types): Declare.

83597

+ * src/prep_cif.c (ffi_prep_cif_core): Call ffi_prep_types.

83598

+ * configure: Regenerate.

83599

+ * fficonfig.h.in: Regenerate.

83600

+ * Makefile.in: Regenerate.

83601

+ * man/Makefile.in: Regenerate.

83602

+ * include/Makefile.in: Regenerate.

83603

+ * testsuite/Makefile.in: Regenerate.

83604

+

83605

+ * src/powerpc/ppc_closure.S: Don't bl .Luint128.

83606

+

83607

+ * src/powerpc/ffitarget.h: Import from upstream.

83608

+ * src/powerpc/ffi.c: Likewise.

83609

+ * src/powerpc/linux64.S: Likewise.

83610

+ * src/powerpc/linux64_closure.S: Likewise.

83611

+ * doc/libffi.texi: Likewise.

83612

+ * testsuite/libffi.call/cls_double_va.c: Likewise.

83613

+ * testsuite/libffi.call/cls_longdouble_va.c: Likewise.

83614

+

83615

2013-10-16 Release Manager

83616

83617

* GCC 4.8.2 released.

83618

Index: libffi/testsuite/Makefile.in

83619

===================================================================

83620

--- a/src/libffi/testsuite/Makefile.in (.../tags/gcc_4_8_2_release)

83621

+++ b/src/libffi/testsuite/Makefile.in (.../branches/gcc-4_8-branch)

83622

@@ -88,6 +88,7 @@

83623

FGREP = @FGREP@

83624

GREP = @GREP@

83625

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

83626

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

83627

INSTALL = @INSTALL@

83628

INSTALL_DATA = @INSTALL_DATA@

83629

INSTALL_PROGRAM = @INSTALL_PROGRAM@

83630

Index: libffi/testsuite/libffi.call/cls_double_va.c

83631

===================================================================

83632

--- a/src/libffi/testsuite/libffi.call/cls_double_va.c (.../tags/gcc_4_8_2_release)

83633

+++ b/src/libffi/testsuite/libffi.call/cls_double_va.c (.../branches/gcc-4_8-branch)

83634

@@ -38,7 +38,7 @@

83635

83636

/* This printf call is variadic */

83637

CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, &ffi_type_sint,

83638

- arg_types) == FFI_OK);

83639

+ arg_types) == FFI_OK);

83640

83641

args[0] = &format;

83642

args[1] = &doubleArg;

83643

@@ -45,19 +45,17 @@

83644

args[2] = NULL;

83645

83646

ffi_call(&cif, FFI_FN(printf), &res, args);

83647

- // { dg-output "7.0" }

83648

+ /* { dg-output "7.0" } */

83649

printf("res: %d\n", (int) res);

83650

- // { dg-output "\nres: 4" }

83651

+ /* { dg-output "\nres: 4" } */

83652

83653

- /* The call to cls_double_va_fn is static, so have to use a normal prep_cif */

83654

- CHECK(ffi_prep_cif(&cif, FFI_DEFAULT_ABI, 2, &ffi_type_sint, arg_types) == FFI_OK);

83655

+ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_double_va_fn, NULL,

83656

+ code) == FFI_OK);

83657

83658

- CHECK(ffi_prep_closure_loc(pcl, &cif, cls_double_va_fn, NULL, code) == FFI_OK);

83659

-

83660

- res = ((int(*)(char*, double))(code))(format, doubleArg);

83661

- // { dg-output "\n7.0" }

83662

+ res = ((int(*)(char*, ...))(code))(format, doubleArg);

83663

+ /* { dg-output "\n7.0" } */

83664

printf("res: %d\n", (int) res);

83665

- // { dg-output "\nres: 4" }

83666

+ /* { dg-output "\nres: 4" } */

83667

83668

exit(0);

83669

}

83670

Index: libffi/testsuite/libffi.call/cls_longdouble_va.c

83671

===================================================================

83672

--- a/src/libffi/testsuite/libffi.call/cls_longdouble_va.c (.../tags/gcc_4_8_2_release)

83673

+++ b/src/libffi/testsuite/libffi.call/cls_longdouble_va.c (.../branches/gcc-4_8-branch)

83674

@@ -38,7 +38,7 @@

83675

83676

/* This printf call is variadic */

83677

CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, &ffi_type_sint,

83678

- arg_types) == FFI_OK);

83679

+ arg_types) == FFI_OK);

83680

83681

args[0] = &format;

83682

args[1] = &ldArg;

83683

@@ -45,20 +45,17 @@

83684

args[2] = NULL;

83685

83686

ffi_call(&cif, FFI_FN(printf), &res, args);

83687

- // { dg-output "7.0" }

83688

+ /* { dg-output "7.0" } */

83689

printf("res: %d\n", (int) res);

83690

- // { dg-output "\nres: 4" }

83691

+ /* { dg-output "\nres: 4" } */

83692

83693

- /* The call to cls_longdouble_va_fn is static, so have to use a normal prep_cif */

83694

- CHECK(ffi_prep_cif(&cif, FFI_DEFAULT_ABI, 2, &ffi_type_sint,

83695

- arg_types) == FFI_OK);

83696

+ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_longdouble_va_fn, NULL,

83697

+ code) == FFI_OK);

83698

83699

- CHECK(ffi_prep_closure_loc(pcl, &cif, cls_longdouble_va_fn, NULL, code) == FFI_OK);

83700

-

83701

- res = ((int(*)(char*, long double))(code))(format, ldArg);

83702

- // { dg-output "\n7.0" }

83703

+ res = ((int(*)(char*, ...))(code))(format, ldArg);

83704

+ /* { dg-output "\n7.0" } */

83705

printf("res: %d\n", (int) res);

83706

- // { dg-output "\nres: 4" }

83707

+ /* { dg-output "\nres: 4" } */

83708

83709

exit(0);

83710

}

83711

Index: libffi/configure.ac

83712

===================================================================

83713

--- a/src/libffi/configure.ac (.../tags/gcc_4_8_2_release)

83714

+++ b/src/libffi/configure.ac (.../branches/gcc-4_8-branch)

83715

@@ -65,6 +65,7 @@

83716

AM_CONDITIONAL(TESTSUBDIR, test -d $srcdir/testsuite)

83717

83718

TARGETDIR="unknown"

83719

+HAVE_LONG_DOUBLE_VARIANT=0

83720

case "$host" in

83721

aarch64*-*-*)

83722

TARGET=AARCH64; TARGETDIR=aarch64

83723

@@ -162,6 +163,7 @@

83724

83725

powerpc*-*-linux* | powerpc-*-sysv*)

83726

TARGET=POWERPC; TARGETDIR=powerpc

83727

+ HAVE_LONG_DOUBLE_VARIANT=1

83728

;;

83729

powerpc-*-amigaos*)

83730

TARGET=POWERPC; TARGETDIR=powerpc

83731

@@ -177,6 +179,7 @@

83732

;;

83733

powerpc-*-freebsd* | powerpc-*-openbsd*)

83734

TARGET=POWERPC_FREEBSD; TARGETDIR=powerpc

83735

+ HAVE_LONG_DOUBLE_VARIANT=1

83736

;;

83737

powerpc64-*-freebsd*)

83738

TARGET=POWERPC; TARGETDIR=powerpc

83739

@@ -273,14 +276,20 @@

83740

# Also AC_SUBST this variable for ffi.h.

83741

if test -z "$HAVE_LONG_DOUBLE"; then

83742

HAVE_LONG_DOUBLE=0

83743

- if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

83744

- if test $ac_cv_sizeof_long_double != 0; then

83745

+ if test $ac_cv_sizeof_long_double != 0; then

83746

+ if test $HAVE_LONG_DOUBLE_VARIANT != 0; then

83747

+ AC_DEFINE(HAVE_LONG_DOUBLE_VARIANT, 1, [Define if you support more than one size of the long double type])

83748

HAVE_LONG_DOUBLE=1

83749

- AC_DEFINE(HAVE_LONG_DOUBLE, 1, [Define if you have the long double type and it is bigger than a double])

83750

+ else

83751

+ if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

83752

+ HAVE_LONG_DOUBLE=1

83753

+ AC_DEFINE(HAVE_LONG_DOUBLE, 1, [Define if you have the long double type and it is bigger than a double])

83754

+ fi

83755

fi

83756

fi

83757

fi

83758

AC_SUBST(HAVE_LONG_DOUBLE)

83759

+AC_SUBST(HAVE_LONG_DOUBLE_VARIANT)

83760

83761

AC_C_BIGENDIAN

83762

83763

Index: libffi/Makefile.am

83764

===================================================================

83765

--- a/src/libffi/Makefile.am (.../tags/gcc_4_8_2_release)

83766

+++ b/src/libffi/Makefile.am (.../branches/gcc-4_8-branch)

83767

@@ -15,10 +15,12 @@

83768

src/ia64/unix.S src/mips/ffi.c src/mips/n32.S src/mips/o32.S \

83769

src/mips/ffitarget.h src/m32r/ffi.c src/m32r/sysv.S \

83770

src/m32r/ffitarget.h src/m68k/ffi.c src/m68k/sysv.S \

83771

- src/m68k/ffitarget.h src/powerpc/ffi.c src/powerpc/sysv.S \

83772

- src/powerpc/linux64.S src/powerpc/linux64_closure.S \

83773

- src/powerpc/ppc_closure.S src/powerpc/asm.h \

83774

- src/powerpc/aix.S src/powerpc/darwin.S \

83775

+ src/m68k/ffitarget.h \

83776

+ src/powerpc/ffi.c src/powerpc/ffi_powerpc.h \

83777

+ src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c \

83778

+ src/powerpc/sysv.S src/powerpc/linux64.S \

83779

+ src/powerpc/linux64_closure.S src/powerpc/ppc_closure.S \

83780

+ src/powerpc/asm.h src/powerpc/aix.S src/powerpc/darwin.S \

83781

src/powerpc/aix_closure.S src/powerpc/darwin_closure.S \

83782

src/powerpc/ffi_darwin.c src/powerpc/ffitarget.h \

83783

src/s390/ffi.c src/s390/sysv.S src/s390/ffitarget.h \

83784

@@ -179,7 +181,7 @@

83785

nodist_libffi_la_SOURCES += src/m68k/ffi.c src/m68k/sysv.S

83786

endif

83787

if POWERPC

83788

-nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

83789

+nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

83790

endif

83791

if POWERPC_AIX

83792

nodist_libffi_la_SOURCES += src/powerpc/ffi_darwin.c src/powerpc/aix.S src/powerpc/aix_closure.S

83793

@@ -188,7 +190,7 @@

83794

nodist_libffi_la_SOURCES += src/powerpc/ffi_darwin.c src/powerpc/darwin.S src/powerpc/darwin_closure.S

83795

endif

83796

if POWERPC_FREEBSD

83797

-nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

83798

+nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

83799

endif

83800

if AARCH64

83801

nodist_libffi_la_SOURCES += src/aarch64/sysv.S src/aarch64/ffi.c

83802

Index: libffi/man/Makefile.in

83803

===================================================================

83804

--- a/src/libffi/man/Makefile.in (.../tags/gcc_4_8_2_release)

83805

+++ b/src/libffi/man/Makefile.in (.../branches/gcc-4_8-branch)

83806

@@ -111,6 +111,7 @@

83807

FGREP = @FGREP@

83808

GREP = @GREP@

83809

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

83810

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

83811

INSTALL = @INSTALL@

83812

INSTALL_DATA = @INSTALL_DATA@

83813

INSTALL_PROGRAM = @INSTALL_PROGRAM@

83814

Index: libssp/configure

83815

===================================================================

83816

--- a/src/libssp/configure (.../tags/gcc_4_8_2_release)

83817

+++ b/src/libssp/configure (.../branches/gcc-4_8-branch)

83818

@@ -6385,7 +6385,7 @@

83819

rm -rf conftest*

83820

;;

83821

83822

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

83823

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

83824

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

83825

# Find out which ABI we are using.

83826

echo 'int i;' > conftest.$ac_ext

83827

@@ -6410,7 +6410,10 @@

83828

;;

83829

esac

83830

;;

83831

- ppc64-*linux*|powerpc64-*linux*)

83832

+ powerpc64le-*linux*)

83833

+ LD="${LD-ld} -m elf32lppclinux"

83834

+ ;;

83835

+ powerpc64-*linux*)

83836

LD="${LD-ld} -m elf32ppclinux"

83837

;;

83838

s390x-*linux*)

83839

@@ -6429,7 +6432,10 @@

83840

x86_64-*linux*)

83841

LD="${LD-ld} -m elf_x86_64"

83842

;;

83843

- ppc*-*linux*|powerpc*-*linux*)

83844

+ powerpcle-*linux*)

83845

+ LD="${LD-ld} -m elf64lppc"

83846

+ ;;

83847

+ powerpc-*linux*)

83848

LD="${LD-ld} -m elf64ppc"

83849

;;

83850

s390*-*linux*|s390*-*tpf*)

83851

@@ -10658,7 +10664,7 @@

83852

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

83853

lt_status=$lt_dlunknown

83854

cat > conftest.$ac_ext <<_LT_EOF

83855

-#line 10661 "configure"

83856

+#line 10667 "configure"

83857

#include "confdefs.h"

83858

83859

#if HAVE_DLFCN_H

83860

@@ -10764,7 +10770,7 @@

83861

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

83862

lt_status=$lt_dlunknown

83863

cat > conftest.$ac_ext <<_LT_EOF

83864

-#line 10767 "configure"

83865

+#line 10773 "configure"

83866

#include "confdefs.h"

83867

83868

#if HAVE_DLFCN_H

83869

Index: libssp/ChangeLog

83870

===================================================================

83871

--- a/src/libssp/ChangeLog (.../tags/gcc_4_8_2_release)

83872

+++ b/src/libssp/ChangeLog (.../branches/gcc-4_8-branch)

83873

@@ -1,3 +1,10 @@

83874

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

83875

+

83876

+ Backport from mainline

83877

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

83878

+

83879

+ * configure: Regenerate.

83880

+

83881

2013-10-16 Release Manager

83882

83883

* GCC 4.8.2 released.

83884

Index: libcpp/macro.c

83885

===================================================================

83886

--- a/src/libcpp/macro.c (.../tags/gcc_4_8_2_release)

83887

+++ b/src/libcpp/macro.c (.../branches/gcc-4_8-branch)

83888

@@ -1108,21 +1108,22 @@

83889

83890

if (macro->paramc == 0)

83891

{

83892

+ unsigned tokens_count = macro_real_token_count (macro);

83893

if (CPP_OPTION (pfile, track_macro_expansion))

83894

{

83895

- unsigned int i, count = macro->count;

83896

+ unsigned int i;

83897

const cpp_token *src = macro->exp.tokens;

83898

const struct line_map *map;

83899

source_location *virt_locs = NULL;

83900

- _cpp_buff *macro_tokens =

83901

- tokens_buff_new (pfile, count, &virt_locs);

83902

+ _cpp_buff *macro_tokens

83903

+ = tokens_buff_new (pfile, tokens_count, &virt_locs);

83904

83905

/* Create a macro map to record the locations of the

83906

tokens that are involved in the expansion. LOCATION

83907

is the location of the macro expansion point. */

83908

- map = linemap_enter_macro (pfile->line_table,

83909

- node, location, count);

83910

- for (i = 0; i < count; ++i)

83911

+ map = linemap_enter_macro (pfile->line_table,

83912

+ node, location, tokens_count);

83913

+ for (i = 0; i < tokens_count; ++i)

83914

{

83915

tokens_buff_add_token (macro_tokens, virt_locs,

83916

src, src->src_loc,

83917

@@ -1134,16 +1135,12 @@

83918

virt_locs,

83919

(const cpp_token **)

83920

macro_tokens->base,

83921

- count);

83922

- num_macro_tokens_counter += count;

83923

+ tokens_count);

83924

}

83925

else

83926

- {

83927

- unsigned tokens_count = macro_real_token_count (macro);

83928

- _cpp_push_token_context (pfile, node, macro->exp.tokens,

83929

- tokens_count);

83930

- num_macro_tokens_counter += tokens_count;

83931

- }

83932

+ _cpp_push_token_context (pfile, node, macro->exp.tokens,

83933

+ tokens_count);

83934

+ num_macro_tokens_counter += tokens_count;

83935

}

83936

83937

if (pragma_buff)

83938

Index: libcpp/line-map.c

83939

===================================================================

83940

--- a/src/libcpp/line-map.c (.../tags/gcc_4_8_2_release)

83941

+++ b/src/libcpp/line-map.c (.../branches/gcc-4_8-branch)

83942

@@ -1024,6 +1024,11 @@

83943

bool pre_virtual_p, post_virtual_p;

83944

source_location l0 = pre, l1 = post;

83945

83946

+ if (IS_ADHOC_LOC (l0))

83947

+ l0 = set->location_adhoc_data_map.data[l0 & MAX_SOURCE_LOCATION].locus;

83948

+ if (IS_ADHOC_LOC (l1))

83949

+ l1 = set->location_adhoc_data_map.data[l1 & MAX_SOURCE_LOCATION].locus;

83950

+

83951

if (l0 == l1)

83952

return 0;

83953

83954

Index: libcpp/files.c

83955

===================================================================

83956

--- a/src/libcpp/files.c (.../tags/gcc_4_8_2_release)

83957

+++ b/src/libcpp/files.c (.../branches/gcc-4_8-branch)

83958

@@ -983,6 +983,7 @@

83959

{

83960

struct cpp_dir *dir;

83961

_cpp_file *file;

83962

+ bool stacked;

83963

83964

dir = search_path_head (pfile, fname, angle_brackets, type);

83965

if (!dir)

83966

@@ -993,19 +994,26 @@

83967

if (type == IT_DEFAULT && file == NULL)

83968

return false;

83969

83970

- /* Compensate for the increment in linemap_add that occurs in

83971

- _cpp_stack_file. In the case of a normal #include, we're

83972

- currently at the start of the line *following* the #include. A

83973

- separate source_location for this location makes no sense (until

83974

- we do the LC_LEAVE), and complicates LAST_SOURCE_LINE_LOCATION.

83975

- This does not apply if we found a PCH file (in which case

83976

- linemap_add is not called) or we were included from the

83977

- command-line. */

83978

+ /* Compensate for the increment in linemap_add that occurs if

83979

+ _cpp_stack_file actually stacks the file. In the case of a

83980

+ normal #include, we're currently at the start of the line

83981

+ *following* the #include. A separate source_location for this

83982

+ location makes no sense (until we do the LC_LEAVE), and

83983

+ complicates LAST_SOURCE_LINE_LOCATION. This does not apply if we

83984

+ found a PCH file (in which case linemap_add is not called) or we

83985

+ were included from the command-line. */

83986

if (file->pchname == NULL && file->err_no == 0

83987

&& type != IT_CMDLINE && type != IT_DEFAULT)

83988

pfile->line_table->highest_location--;

83989

83990

- return _cpp_stack_file (pfile, file, type == IT_IMPORT);

83991

+ stacked = _cpp_stack_file (pfile, file, type == IT_IMPORT);

83992

+

83993

+ if (!stacked)

83994

+ /* _cpp_stack_file didn't stack the file, so let's rollback the

83995

+ compensation dance we performed above. */

83996

+ pfile->line_table->highest_location++;

83997

+

83998

+ return stacked;

83999

}

84000

84001

/* Could not open FILE. The complication is dependency output. */

84002

Index: libcpp/ChangeLog

84003

===================================================================

84004

--- a/src/libcpp/ChangeLog (.../tags/gcc_4_8_2_release)

84005

+++ b/src/libcpp/ChangeLog (.../branches/gcc-4_8-branch)

84006

@@ -1,3 +1,36 @@

84007

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

84008

+

84009

+ Backport from mainline

84010

+ 2013-11-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

84011

+

84012

+ * lex.c (search_line_fast): Correct for little endian.

84013

+

84014

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

84015

+

84016

+ Backport from mainline

84017

+ 2014-02-19 Jakub Jelinek <jakub@redhat.com>

84018

+

84019

+ PR preprocessor/58844

84020

+ * macro.c (enter_macro_context): Only push

84021

+ macro_real_token_count (macro) tokens rather than

84022

+ macro->count tokens, regardless of

84023

+ CPP_OPTION (pfile, track-macro-expansion).

84024

+

84025

+ 2014-02-07 Jakub Jelinek <jakub@redhat.com>

84026

+

84027

+ PR preprocessor/56824

84028

+ * line-map.c (linemap_compare_locations): Look through adhoc locations

84029

+ for both l0 and l1.

84030

+

84031

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

84032

+

84033

+ PR preprocessor/60400

84034

+ Backport from mainline

84035

+ 2013-06-24 Dehao Chen <dehao@google.com>

84036

+

84037

+ * files.c (_cpp_stack_include): Fix the highest_location when header

84038

+ file is guarded by #ifndef and is included twice.

84039

+

84040

2013-10-16 Release Manager

84041

84042

* GCC 4.8.2 released.

84043

Index: libcpp/lex.c

84044

===================================================================

84045

--- a/src/libcpp/lex.c (.../tags/gcc_4_8_2_release)

84046

+++ b/src/libcpp/lex.c (.../branches/gcc-4_8-branch)

84047

@@ -559,8 +559,13 @@

84048

beginning with all ones and shifting in zeros according to the

84049

mis-alignment. The LVSR instruction pulls the exact shift we

84050

want from the address. */

84051

+#ifdef __BIG_ENDIAN__

84052

mask = __builtin_vec_lvsr(0, s);

84053

mask = __builtin_vec_perm(zero, ones, mask);

84054

+#else

84055

+ mask = __builtin_vec_lvsl(0, s);

84056

+ mask = __builtin_vec_perm(ones, zero, mask);

84057

+#endif

84058

data &= mask;

84059

84060

/* While altivec loads mask addresses, we still need to align S so

84061

@@ -624,7 +629,11 @@

84062

/* L now contains 0xff in bytes for which we matched one of the

84063

relevant characters. We can find the byte index by finding

84064

its bit index and dividing by 8. */

84065

+#ifdef __BIG_ENDIAN__

84066

l = __builtin_clzl(l) >> 3;

84067

+#else

84068

+ l = __builtin_ctzl(l) >> 3;

84069

+#endif

84070

return s + l;

84071

84072

#undef N

84073

Index: libcpp/po/pt_BR.po

84074

===================================================================

84075

--- a/src/libcpp/po/pt_BR.po (.../tags/gcc_4_8_2_release)

84076

+++ b/src/libcpp/po/pt_BR.po (.../branches/gcc-4_8-branch)

84077

@@ -0,0 +1,908 @@

84078

+# Brazilian Portuguese translation for cpplib

84079

84080

+# This file is distributed under the same license as the gcc package.

84081

+# Rafael Ferreira <rafael.f.f1@gmail.com>, 2013.

84082

+#

84083

+msgid ""

84084

+msgstr ""

84085

+"Project-Id-Version: cpplib 4.8.0\n"

84086

+"Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n"

84087

+"POT-Creation-Date: 2013-03-15 17:42+0000\n"

84088

+"PO-Revision-Date: 2013-12-18 03:12-0300\n"

84089

+"Last-Translator: Rafael Ferreira <rafael.f.f1@gmail.com>\n"

84090

+"Language-Team: Brazilian Portuguese <ldpbr-translation@lists.sourceforge.net>\n"

84091

+"Language: pt_BR\n"

84092

+"MIME-Version: 1.0\n"

84093

+"Content-Type: text/plain; charset=UTF-8\n"

84094

+"Content-Transfer-Encoding: 8bit\n"

84095

+"X-Generator: Poedit 1.5.7\n"

84096

+"Plural-Forms: nplurals=2; plural=(n > 1);\n"

84097

+

84098

+#: charset.c:673

84099

+#, c-format

84100

+msgid "conversion from %s to %s not supported by iconv"

84101

+msgstr "sem suporte a conversão de %s para %s por iconv"

84102

+

84103

+#: charset.c:676

84104

+msgid "iconv_open"

84105

+msgstr "iconv_open"

84106

+

84107

+#: charset.c:684

84108

+#, c-format

84109

+msgid "no iconv implementation, cannot convert from %s to %s"

84110

+msgstr "nenhuma implementação iconv, não foi possível converter de %s para %s"

84111

+

84112

+#: charset.c:780

84113

+#, c-format

84114

+msgid "character 0x%lx is not in the basic source character set\n"

84115

+msgstr "caractere 0x%lx não está no conjunto de caracteres fonte básico\n"

84116

+

84117

+#: charset.c:797 charset.c:1443

84118

+msgid "converting to execution character set"

84119

+msgstr "convertendo para conjunto de caracteres da execução"

84120

+

84121

+#: charset.c:803

84122

+#, c-format

84123

+msgid "character 0x%lx is not unibyte in execution character set"

84124

+msgstr "caractere 0x%lx não é unibyte no conjunto de caracteres de execução"

84125

+

84126

+#: charset.c:927

84127

+#, c-format

84128

+msgid "Character %x might not be NFKC"

84129

+msgstr "Caractere %x pode não ser NFKC"

84130

+

84131

+#: charset.c:993

84132

+msgid "universal character names are only valid in C++ and C99"

84133

+msgstr "nomes de caractere universais são válidos apenas em C++ e C99"

84134

+

84135

+#: charset.c:996

84136

+#, c-format

84137

+msgid "the meaning of '\\%c' is different in traditional C"

84138

+msgstr "o significado de \"\\%c\" é diferente em C tradicional"

84139

+

84140

+#: charset.c:1005

84141

+msgid "In _cpp_valid_ucn but not a UCN"

84142

+msgstr "Em _cpp_valid_ucn, mas não é um UCN"

84143

+

84144

+#: charset.c:1030

84145

+#, c-format

84146

+msgid "incomplete universal character name %.*s"

84147

+msgstr "nome de caractere universal incompleto %.*s"

84148

+

84149

+#: charset.c:1045

84150

+#, c-format

84151

+msgid "%.*s is not a valid universal character"

84152

+msgstr "%.*s não é um caractere universal válido"

84153

+

84154

+#: charset.c:1055 lex.c:1117

84155

+msgid "'$' in identifier or number"

84156

+msgstr "\"$\" em identificador ou número"

84157

+

84158

+#: charset.c:1065

84159

+#, c-format

84160

+msgid "universal character %.*s is not valid in an identifier"

84161

+msgstr "caractere universal %.*s não é válido em um identificador"

84162

+

84163

+#: charset.c:1069

84164

+#, c-format

84165

+msgid "universal character %.*s is not valid at the start of an identifier"

84166

+msgstr "caractere universal %.*s não é válido no começo de um identificador"

84167

+

84168

+#: charset.c:1101 charset.c:1673

84169

+msgid "converting UCN to source character set"

84170

+msgstr "convertendo UCN para conjunto de caracteres fonte"

84171

+

84172

+#: charset.c:1105

84173

+msgid "converting UCN to execution character set"

84174

+msgstr "convertendo UCN para conjunto de caracteres de execução"

84175

+

84176

+#: charset.c:1177

84177

+msgid "the meaning of '\\x' is different in traditional C"

84178

+msgstr "o significado de \"\\x\" é diferente em C tradicional"

84179

+

84180

+#: charset.c:1194

84181

+msgid "\\x used with no following hex digits"

84182

+msgstr "\\x usado com nenhum dígito hexa"

84183

+

84184

+#: charset.c:1201

84185

+msgid "hex escape sequence out of range"

84186

+msgstr "sequência de escape hexa fora de alcance"

84187

+

84188

+#: charset.c:1239

84189

+msgid "octal escape sequence out of range"

84190

+msgstr "sequência de escape octal fora de alcance"

84191

+

84192

+#: charset.c:1305

84193

+msgid "the meaning of '\\a' is different in traditional C"

84194

+msgstr "o significado de \"\\a\" é diferente em C tradicional"

84195

+

84196

+#: charset.c:1312

84197

+#, c-format

84198

+msgid "non-ISO-standard escape sequence, '\\%c'"

84199

+msgstr "sequência de escape não padrão ISO, \"\\%c\""

84200

+

84201

+#: charset.c:1320

84202

+#, c-format

84203

+msgid "unknown escape sequence: '\\%c'"

84204

+msgstr "sequência de escape desconhecida: \"\\%c\""

84205

+

84206

+#: charset.c:1328

84207

+#, c-format

84208

+msgid "unknown escape sequence: '\\%s'"

84209

+msgstr "sequência de escape desconhecida: \"\\%s\""

84210

+

84211

+#: charset.c:1335

84212

+msgid "converting escape sequence to execution character set"

84213

+msgstr "convertendo sequência de escape para conjunto de caracteres de execução"

84214

+

84215

+#: charset.c:1508 charset.c:1572

84216

+msgid "character constant too long for its type"

84217

+msgstr "constante caractere muito longa para seu tipo"

84218

+

84219

+#: charset.c:1511

84220

+msgid "multi-character character constant"

84221

+msgstr "constante de caractere multi-caractere"

84222

+

84223

+#: charset.c:1611

84224

+msgid "empty character constant"

84225

+msgstr "constante caractere vazia"

84226

+

84227

+#: charset.c:1720

84228

+#, c-format

84229

+msgid "failure to convert %s to %s"

84230

+msgstr "falha ao converter %s para %s"

84231

+

84232

+#: directives.c:224 directives.c:250

84233

+#, c-format

84234

+msgid "extra tokens at end of #%s directive"

84235

+msgstr "tokens extras ao final da diretiva %#s"

84236

+

84237

+#: directives.c:357

84238

+#, c-format

84239

+msgid "#%s is a GCC extension"

84240

+msgstr "#%s é uma extensão GCC"

84241

+

84242

+#: directives.c:362

84243

+#, c-format

84244

+msgid "#%s is a deprecated GCC extension"

84245

+msgstr "#%s é uma extensão GCC obsoleta"

84246

+

84247

+#: directives.c:375

84248

+msgid "suggest not using #elif in traditional C"

84249

+msgstr "sugere-se não usar #elif em C tradicional"

84250

+

84251

+#: directives.c:378

84252

+#, c-format

84253

+msgid "traditional C ignores #%s with the # indented"

84254

+msgstr "C tradicional ignora #%s com o # com recuo"

84255

+

84256

+#: directives.c:382

84257

+#, c-format

84258

+msgid "suggest hiding #%s from traditional C with an indented #"

84259

+msgstr "sugere-se ocultar #%s do C tradicional com um # com recuo"

84260

+

84261

+#: directives.c:408

84262

+msgid "embedding a directive within macro arguments is not portable"

84263

+msgstr "embutir uma diretiva dentro de argumentos macro não é portátil"

84264

+

84265

+#: directives.c:428

84266

+msgid "style of line directive is a GCC extension"

84267

+msgstr "estilo de diretiva de linha é uma extensão GCC"

84268

+

84269

+#: directives.c:483

84270

+#, c-format

84271

+msgid "invalid preprocessing directive #%s"

84272

+msgstr "diretiva de preprocessamento inválida #%s"

84273

+

84274

+#: directives.c:551

84275

+msgid "\"defined\" cannot be used as a macro name"

84276

+msgstr "\"defined\" não pode ser usado como um nome de macro"

84277

+

84278

+#: directives.c:557

84279

+#, c-format

84280

+msgid "\"%s\" cannot be used as a macro name as it is an operator in C++"

84281

+msgstr "\"%s\" não pode ser usado como um nome de macro, pois é um operador em C++"

84282

+

84283

+#: directives.c:560

84284

+#, c-format

84285

+msgid "no macro name given in #%s directive"

84286

+msgstr "nenhum nome de macro fornecido na diretiva #%s"

84287

+

84288

+#: directives.c:563

84289

+msgid "macro names must be identifiers"

84290

+msgstr "nomes de macro devem ser identificadores"

84291

+

84292

+#: directives.c:612

84293

+#, c-format

84294

+msgid "undefining \"%s\""

84295

+msgstr "removendo definição de \"%s\""

84296

+

84297

+#: directives.c:667

84298

+msgid "missing terminating > character"

84299

+msgstr "faltando caractere terminador >"

84300

+

84301

+#: directives.c:726

84302

+#, c-format

84303

+msgid "#%s expects \"FILENAME\" or <FILENAME>"

84304

+msgstr "#%s espera \"NOME DE ARQUIVO\" OU <NOME DE ARQUIVO>"

84305

+

84306

+#: directives.c:772

84307

+#, c-format

84308

+msgid "empty filename in #%s"

84309

+msgstr "nome de arquivo vazio em #%s"

84310

+

84311

+#: directives.c:782

84312

+msgid "#include nested too deeply"

84313

+msgstr "#include aninhado profundo demais"

84314

+

84315

+#: directives.c:823

84316

+msgid "#include_next in primary source file"

84317

+msgstr "#include_next no arquivo fonte primário"

84318

+

84319

+#: directives.c:849

84320

+#, c-format

84321

+msgid "invalid flag \"%s\" in line directive"

84322

+msgstr "opção inválida \"%s\" na diretiva line"

84323

+

84324

+#: directives.c:909

84325

+msgid "unexpected end of file after #line"

84326

+msgstr "fim de arquivo inesperado após #line"

84327

+

84328

+#: directives.c:912

84329

+#, c-format

84330

+msgid "\"%s\" after #line is not a positive integer"

84331

+msgstr "\"%s\" após #line não é um inteiro positivo"

84332

+

84333

+#: directives.c:918 directives.c:920

84334

+msgid "line number out of range"

84335

+msgstr "número da linha fora de alcance"

84336

+

84337

+#: directives.c:933 directives.c:1013

84338

+#, c-format

84339

+msgid "\"%s\" is not a valid filename"

84340

+msgstr "\"%s\" não é um nome de arquivo válido"

84341

+

84342

+#: directives.c:973

84343

+#, c-format

84344

+msgid "\"%s\" after # is not a positive integer"

84345

+msgstr "\"%s\" após # não é um inteiro positivo"

84346

+

84347

+#: directives.c:1068 directives.c:1070 directives.c:1072 directives.c:1658

84348

+#, c-format

84349

+msgid "%s"

84350

+msgstr "%s"

84351

+

84352

+#: directives.c:1096

84353

+#, c-format

84354

+msgid "invalid #%s directive"

84355

+msgstr "diretiva inválida #%s"

84356

+

84357

+#: directives.c:1159

84358

+#, c-format

84359

+msgid "registering pragmas in namespace \"%s\" with mismatched name expansion"

84360

+msgstr "registrando pragmas em espaço de nomes \"%s\" com expansão de nome incompatível"

84361

+

84362

+#: directives.c:1168

84363

+#, c-format

84364

+msgid "registering pragma \"%s\" with name expansion and no namespace"

84365

+msgstr "registrando pragma \"%s\" com expansão de nome e nenhum espaço de nomes"

84366

+

84367

+#: directives.c:1186

84368

+#, c-format

84369

+msgid "registering \"%s\" as both a pragma and a pragma namespace"

84370

+msgstr "registrando \"%s\" como tanto um pragma e um espaço de nomes de pragma"

84371

+

84372

+#: directives.c:1189

84373

+#, c-format

84374

+msgid "#pragma %s %s is already registered"

84375

+msgstr "#pragma %s %s já está registrado"

84376

+

84377

+#: directives.c:1192

84378

+#, c-format

84379

+msgid "#pragma %s is already registered"

84380

+msgstr "#pragma %s já está registrado"

84381

+

84382

+#: directives.c:1222

84383

+msgid "registering pragma with NULL handler"

84384

+msgstr "registrando pragma com manipulador NULO"

84385

+

84386

+#: directives.c:1439

84387

+msgid "#pragma once in main file"

84388

+msgstr "#pragma ocorre uma vez no arquivo principal"

84389

+

84390

+#: directives.c:1462

84391

+msgid "invalid #pragma push_macro directive"

84392

+msgstr "diretiva inválida #pragma push_macro"

84393

+

84394

+#: directives.c:1517

84395

+msgid "invalid #pragma pop_macro directive"

84396

+msgstr "diretiva inválida #pragma pop_macro"

84397

+

84398

+#: directives.c:1572

84399

+msgid "invalid #pragma GCC poison directive"

84400

+msgstr "diretiva inválida #pragma GCC poison"

84401

+

84402

+#: directives.c:1581

84403

+#, c-format

84404

+msgid "poisoning existing macro \"%s\""

84405

+msgstr "envenenando macro existente \"%s\""

84406

+

84407

+#: directives.c:1600

84408

+msgid "#pragma system_header ignored outside include file"

84409

+msgstr "#pragma system_header ignorado fora do arquivo include"

84410

+

84411

+#: directives.c:1625

84412

+#, c-format

84413

+msgid "cannot find source file %s"

84414

+msgstr "não foi possível localizar o arquivo fonte %s"

84415

+

84416

+#: directives.c:1629

84417

+#, c-format

84418

+msgid "current file is older than %s"

84419

+msgstr "arquivo atual é mais velho do que %s"

84420

+

84421

+#: directives.c:1653

84422

+#, c-format

84423

+msgid "invalid \"#pragma GCC %s\" directive"

84424

+msgstr "diretiva inválida \"#pragma GCC %s\""

84425

+

84426

+#: directives.c:1847

84427

+msgid "_Pragma takes a parenthesized string literal"

84428

+msgstr "_Pragma leva uma literal de string entre parenteses"

84429

+

84430

+#: directives.c:1968

84431

+msgid "#else without #if"

84432

+msgstr "#else sem #if"

84433

+

84434

+#: directives.c:1973

84435

+msgid "#else after #else"

84436

+msgstr "#else após #else"

84437

+

84438

+#: directives.c:1975 directives.c:2008

84439

+msgid "the conditional began here"

84440

+msgstr "a condicional começou aqui"

84441

+

84442

+#: directives.c:2001

84443

+msgid "#elif without #if"

84444

+msgstr "#elif sem #if"

84445

+

84446

+#: directives.c:2006

84447

+msgid "#elif after #else"

84448

+msgstr "#elif após #else"

84449

+

84450

+#: directives.c:2044

84451

+msgid "#endif without #if"

84452

+msgstr "#endif sem #if"

84453

+

84454

+#: directives.c:2124

84455

+msgid "missing '(' after predicate"

84456

+msgstr "faltando \"(\" após predicado"

84457

+

84458

+#: directives.c:2139

84459

+msgid "missing ')' to complete answer"

84460

+msgstr "faltando \")\" para uma resposta completa"

84461

+

84462

+#: directives.c:2159

84463

+msgid "predicate's answer is empty"

84464

+msgstr "resposta do predicado está vazia"

84465

+

84466

+#: directives.c:2186

84467

+msgid "assertion without predicate"

84468

+msgstr "asserção sem predicado"

84469

+

84470

+#: directives.c:2189

84471

+msgid "predicate must be an identifier"

84472

+msgstr "predicado deve ser um identificador"

84473

+

84474

+#: directives.c:2275

84475

+#, c-format

84476

+msgid "\"%s\" re-asserted"

84477

+msgstr "\"%s\" re-assertado"

84478

+

84479

+#: directives.c:2567

84480

+#, c-format

84481

+msgid "unterminated #%s"

84482

+msgstr "#%s não terminado"

84483

+

84484

+#: directives-only.c:221 lex.c:2234 traditional.c:162

84485

+msgid "unterminated comment"

84486

+msgstr "comentário não terminado"

84487

+

84488

+#: errors.c:234

84489

+msgid "stdout"

84490

+msgstr "saída padrão"

84491

+

84492

+#: errors.c:236

84493

+#, c-format

84494

+msgid "%s: %s"

84495

+msgstr "%s: %s"

84496

+

84497

+#: expr.c:479 expr.c:577

84498

+msgid "fixed-point constants are a GCC extension"

84499

+msgstr "constantes de ponto fixo (fixed-point constants) é uma extensão GCC"

84500

+

84501

+#: expr.c:504

84502

+msgid "invalid prefix \"0b\" for floating constant"

84503

+msgstr "prefixo inválido \"0b\" para constante flutuante"

84504

+

84505

+#: expr.c:514

84506

+msgid "use of C99 hexadecimal floating constant"

84507

+msgstr "uso de constante flutuante hexadecimal de C99"

84508

+

84509

+#: expr.c:545

84510

+#, c-format

84511

+msgid "invalid suffix \"%.*s\" on floating constant"

84512

+msgstr "sufixo inválido \"%.*s\" na constante flutuante"

84513

+

84514

+#: expr.c:556 expr.c:616

84515

+#, c-format

84516

+msgid "traditional C rejects the \"%.*s\" suffix"

84517

+msgstr "C tradicional rejeita o sufixo \"%.*s\""

84518

+

84519

+#: expr.c:564

84520

+msgid "suffix for double constant is a GCC extension"

84521

+msgstr "sufixo para constante dupla (suffix for double constant) é uma extensão GCC"

84522

+

84523

+#: expr.c:570

84524

+#, c-format

84525

+msgid "invalid suffix \"%.*s\" with hexadecimal floating constant"

84526

+msgstr "sufixo inválido \"%.*s\" com constante flutuante hexadecimal"

84527

+

84528

+#: expr.c:581

84529

+msgid "decimal float constants are a GCC extension"

84530

+msgstr "constantes flutuante decimais (decimal float constants) é uma extensão GCC"

84531

+

84532

+#: expr.c:599

84533

+#, c-format

84534

+msgid "invalid suffix \"%.*s\" on integer constant"

84535

+msgstr "sufixo inválido \"%.*s\" em constante inteiro"

84536

+

84537

+#: expr.c:624

84538

+msgid "use of C++0x long long integer constant"

84539

+msgstr "uso de constante longo longo inteiro de C++0x"

84540

+

84541

+#: expr.c:625

84542

+msgid "use of C99 long long integer constant"

84543

+msgstr "uso de constante longo longo inteiro de C99"

84544

+

84545

+#: expr.c:641

84546

+msgid "imaginary constants are a GCC extension"

84547

+msgstr "constantes imaginárias (imaginary constants) é uma extensão GCC"

84548

+

84549

+#: expr.c:644

84550

+msgid "binary constants are a GCC extension"

84551

+msgstr "constantes binárias (binary constants) é uma extensão GCC"

84552

+

84553

+#: expr.c:737

84554

+msgid "integer constant is too large for its type"

84555

+msgstr "constante inteira é muito grande para seu tipo"

84556

+

84557

+#: expr.c:768

84558

+msgid "integer constant is so large that it is unsigned"

84559

+msgstr "constante inteira é tão grande que não está assinada"

84560

+

84561

+#: expr.c:863

84562

+msgid "missing ')' after \"defined\""

84563

+msgstr "faltando \")\" após \"defined\""

84564

+

84565

+#: expr.c:870

84566

+msgid "operator \"defined\" requires an identifier"

84567

+msgstr "operador \"defined\" requer um identificador"

84568

+

84569

+#: expr.c:878

84570

+#, c-format

84571

+msgid "(\"%s\" is an alternative token for \"%s\" in C++)"

84572

+msgstr "(\"%s\" é um token alternativo para \"%s\" em C++)"

84573

+

84574

+#: expr.c:888

84575

+msgid "this use of \"defined\" may not be portable"

84576

+msgstr "esse uso de \"defined\" pode não ser portátil"

84577

+

84578

+#: expr.c:948

84579

+msgid "user-defined literal in preprocessor expression"

84580

+msgstr "literal definida pelo usuário em expressão do preprocessador"

84581

+

84582

+#: expr.c:953

84583

+msgid "floating constant in preprocessor expression"

84584

+msgstr "constante flutuante em expressão do preprocessador"

84585

+

84586

+#: expr.c:959

84587

+msgid "imaginary number in preprocessor expression"

84588

+msgstr "número imaginário em expressão do preprocessador"

84589

+

84590

+#: expr.c:1007

84591

+#, c-format

84592

+msgid "\"%s\" is not defined"

84593

+msgstr "\"%s\" não está definido"

84594

+

84595

+#: expr.c:1020

84596

+msgid "assertions are a GCC extension"

84597

+msgstr "asserções (assertions) é uma extensão GCC"

84598

+

84599

+#: expr.c:1023

84600

+msgid "assertions are a deprecated extension"

84601

+msgstr "asserções (assertions) é uma extensão obsoleta"

84602

+

84603

+#: expr.c:1268

84604

+#, c-format

84605

+msgid "unbalanced stack in %s"

84606

+msgstr "pilha não balanceada em %s"

84607

+

84608

+#: expr.c:1288

84609

+#, c-format

84610

+msgid "impossible operator '%u'"

84611

+msgstr "operador impossível \"%u\""

84612

+

84613

+#: expr.c:1389

84614

+msgid "missing ')' in expression"

84615

+msgstr "faltando \")\" na expressão"

84616

+

84617

+#: expr.c:1418

84618

+msgid "'?' without following ':'"

84619

+msgstr "\"?\" sem estar seguido por \":\""

84620

+

84621

+#: expr.c:1428

84622

+msgid "integer overflow in preprocessor expression"

84623

+msgstr "estouro de inteiro em expressão do preprocessador"

84624

+

84625

+#: expr.c:1433

84626

+msgid "missing '(' in expression"

84627

+msgstr "faltando \"(\" na expressão"

84628

+

84629

+#: expr.c:1465

84630

+#, c-format

84631

+msgid "the left operand of \"%s\" changes sign when promoted"

84632

+msgstr "o operador à esquerda de \"%s\" altera o sinal quando promovido"

84633

+

84634

+#: expr.c:1470

84635

+#, c-format

84636

+msgid "the right operand of \"%s\" changes sign when promoted"

84637

+msgstr "o operador à direita de \"%s\" altera o sinal quando promovido"

84638

+

84639

+#: expr.c:1729

84640

+msgid "traditional C rejects the unary plus operator"

84641

+msgstr "C tradicional rejeita o operador unário mais"

84642

+

84643

+#: expr.c:1812

84644

+msgid "comma operator in operand of #if"

84645

+msgstr "operador vírgula em operando de #if"

84646

+

84647

+#: expr.c:1948

84648

+msgid "division by zero in #if"

84649

+msgstr "divisão por zero em #if"

84650

+

84651

+#: files.c:505

84652

+msgid "NULL directory in find_file"

84653

+msgstr "diretório NULO em find_file"

84654

+

84655

+#: files.c:553

84656

+msgid "one or more PCH files were found, but they were invalid"

84657

+msgstr "um ou mais arquivos PCH foram encontrados, mas são inválidos"

84658

+

84659

+#: files.c:556

84660

+msgid "use -Winvalid-pch for more information"

84661

+msgstr "use -Winvalid-pch para mais informações"

84662

+

84663

+#: files.c:660

84664

+#, c-format

84665

+msgid "%s is a block device"

84666

+msgstr "%s é um dispositivo de bloco"

84667

+

84668

+#: files.c:677

84669

+#, c-format

84670

+msgid "%s is too large"

84671

+msgstr "%s é muito grande"

84672

+

84673

+#: files.c:717

84674

+#, c-format

84675

+msgid "%s is shorter than expected"

84676

+msgstr "%s é muito menor do que esperado"

84677

+

84678

+#: files.c:953

84679

+#, c-format

84680

+msgid "no include path in which to search for %s"

84681

+msgstr "não foi incluído nenhum caminho no qual se possa procurar por %s"

84682

+

84683

+#: files.c:1381

84684

+msgid "Multiple include guards may be useful for:\n"

84685

+msgstr "Múltiplos include guards podem ser úteis para:\n"

84686

+

84687

+#: init.c:524

84688

+msgid "cppchar_t must be an unsigned type"

84689

+msgstr "cppchar_t deve ser um tipo não assinado"

84690

+

84691

+#: init.c:528

84692

+#, c-format

84693

+msgid "preprocessor arithmetic has maximum precision of %lu bits; target requires %lu bits"

84694

+msgstr "aritmética do preprocessador possui uma precisão máxima de %lu bits; o alvo requer %lu bits"

84695

+

84696

+#: init.c:535

84697

+msgid "CPP arithmetic must be at least as precise as a target int"

84698

+msgstr "aritmética do CPP deve ser pelo menos tão precisa quanto um int alvo"

84699

+

84700

+#: init.c:538

84701

+msgid "target char is less than 8 bits wide"

84702

+msgstr "char alvo é menor do que 8 bits"

84703

+

84704

+#: init.c:542

84705

+msgid "target wchar_t is narrower than target char"

84706

+msgstr "wchar_t alvo é mais estreito do que o char alvo"

84707

+

84708

+#: init.c:546

84709

+msgid "target int is narrower than target char"

84710

+msgstr "int alvo é mais estreito do que o char alvo"

84711

+

84712

+#: init.c:551

84713

+msgid "CPP half-integer narrower than CPP character"

84714

+msgstr "meio-inteiro do CPP é mais estreito do que o caractere do CPP"

84715

+

84716

+#: init.c:555

84717

+#, c-format

84718

+msgid "CPP on this host cannot handle wide character constants over %lu bits, but the target requires %lu bits"

84719

+msgstr "CPP nesta máquina não consegue manipular constantes de wide character acima de %lu bits, mas o alvo requer %lu bits"

84720

+

84721

+#: lex.c:910

84722

+msgid "backslash and newline separated by space"

84723

+msgstr "barra invertida e nova linha separadas por espaço"

84724

+

84725

+#: lex.c:915

84726

+msgid "backslash-newline at end of file"

84727

+msgstr "barra invertida e nova linha no final do arquivo"

84728

+

84729

+#: lex.c:931

84730

+#, c-format

84731

+msgid "trigraph ??%c converted to %c"

84732

+msgstr "trígrafo ??%c convertido para %c"

84733

+

84734

+#: lex.c:939

84735

+#, c-format

84736

+msgid "trigraph ??%c ignored, use -trigraphs to enable"

84737

+msgstr "trígrafo ??%c ignorado, use -trigraphs para habilitá-lo"

84738

+

84739

+#: lex.c:988

84740

+msgid "\"/*\" within comment"

84741

+msgstr "\"/*\" dentro de comentário"

84742

+

84743

+#: lex.c:1046

84744

+#, c-format

84745

+msgid "%s in preprocessing directive"

84746

+msgstr "%s em diretiva de preprocessamento"

84747

+

84748

+#: lex.c:1055

84749

+msgid "null character(s) ignored"

84750

+msgstr "um ou mais caracteres nulos ignorados"

84751

+

84752

+#: lex.c:1092

84753

+#, c-format

84754

+msgid "`%.*s' is not in NFKC"

84755

+msgstr "\"%.*s\" não está em NFKC"

84756

+

84757

+#: lex.c:1095

84758

+#, c-format

84759

+msgid "`%.*s' is not in NFC"

84760

+msgstr "\"%.*s\" não está em NFC"

84761

+

84762

+#: lex.c:1164 lex.c:1241

84763

+#, c-format

84764

+msgid "attempt to use poisoned \"%s\""

84765

+msgstr "tentativa de usar \"%s\" envenenado"

84766

+

84767

+#: lex.c:1172 lex.c:1249

84768

+msgid "__VA_ARGS__ can only appear in the expansion of a C99 variadic macro"

84769

+msgstr "__VA_ARGS__ pode aparecer apenas na expansão de uma macro variádica C99"

84770

+

84771

+#: lex.c:1178 lex.c:1255

84772

+#, c-format

84773

+msgid "identifier \"%s\" is a special operator name in C++"

84774

+msgstr "identificador \"%s\" é o nome de um operador especial em C++"

84775

+

84776

+#: lex.c:1399

84777

+msgid "raw string delimiter longer than 16 characters"

84778

+msgstr "delimitador de string não tratada (raw) maior do que 16 caracteres"

84779

+

84780

+#: lex.c:1402

84781

+#, c-format

84782

+msgid "invalid character '%c' in raw string delimiter"

84783

+msgstr "caractere inválido \"%c\" em delimitador de string não tratada (raw)"

84784

+

84785

+#: lex.c:1525 lex.c:1547

84786

+msgid "unterminated raw string"

84787

+msgstr "string não tratada (raw) não terminada"

84788

+

84789

+#: lex.c:1573 lex.c:1706

84790

+msgid "invalid suffix on literal; C++11 requires a space between literal and identifier"

84791

+msgstr "sufixo inválido em literal; C++11 requer um espaço entre literal e identificador"

84792

+

84793

+#: lex.c:1684

84794

+msgid "null character(s) preserved in literal"

84795

+msgstr "um ou mais caracteres nulos preservados em literal"

84796

+

84797

+#: lex.c:1687

84798

+#, c-format

84799

+msgid "missing terminating %c character"

84800

+msgstr "faltando o caractere de terminação %c"

84801

+

84802

+#: lex.c:2245

84803

+msgid "C++ style comments are not allowed in ISO C90"

84804

+msgstr "comentários no estilo C++ não são permitidos em ISO C90"

84805

+

84806

+#: lex.c:2247

84807

+msgid "(this will be reported only once per input file)"

84808

+msgstr "(isso será relatado apenas uma vez por arquivo de entrada)"

84809

+

84810

+#: lex.c:2252

84811

+msgid "multi-line comment"

84812

+msgstr "comentário multilinha"

84813

+

84814

+#: lex.c:2583

84815

+#, c-format

84816

+msgid "unspellable token %s"

84817

+msgstr "token %s impronunciável"

84818

+

84819

+#: macro.c:191

84820

+#, c-format

84821

+msgid "macro \"%s\" is not used"

84822

+msgstr "macro \"%s\" não é usada"

84823

+

84824

+#: macro.c:229 macro.c:426

84825

+#, c-format

84826

+msgid "invalid built-in macro \"%s\""

84827

+msgstr "macro interna inválida \"%s\""

84828

+

84829

+#: macro.c:263

84830

+msgid "could not determine file timestamp"

84831

+msgstr "não foi possível determinar o arquivo de marca de tempo"

84832

+

84833

+#: macro.c:361

84834

+msgid "could not determine date and time"

84835

+msgstr "não foi possível determinar a data e a hora"

84836

+

84837

+#: macro.c:377

84838

+msgid "__COUNTER__ expanded inside directive with -fdirectives-only"

84839

+msgstr "__COUNTER__ expandido dentro diretiva com -fdirectives-only"

84840

+

84841

+#: macro.c:535

84842

+msgid "invalid string literal, ignoring final '\\'"

84843

+msgstr "literal de string inválida, ignorando final \"\\\""

84844

+

84845

+#: macro.c:597

84846

+#, c-format

84847

+msgid "pasting \"%s\" and \"%s\" does not give a valid preprocessing token"

84848

+msgstr "colar \"%s\" em \"%s\" não resulta em nenhum token de preprocessamento válido"

84849

+

84850

+#: macro.c:719

84851

+msgid "ISO C99 requires rest arguments to be used"

84852

+msgstr "ISO C99 requer que argumentos restantes sejam usados"

84853

+

84854

+#: macro.c:724

84855

+#, c-format

84856

+msgid "macro \"%s\" requires %u arguments, but only %u given"

84857

+msgstr "macro \"%s\" requer %u argumentos, mas apenas %u foram fornecidos"

84858

+

84859

+#: macro.c:729

84860

+#, c-format

84861

+msgid "macro \"%s\" passed %u arguments, but takes just %u"

84862

+msgstr "macro \"%s\" passou %u argumentos, mas usa apenas %u"

84863

+

84864

+#: macro.c:923 traditional.c:680

84865

+#, c-format

84866

+msgid "unterminated argument list invoking macro \"%s\""

84867

+msgstr "lista de argumentos interminável chamando macro \"%s\""

84868

+

84869

+#: macro.c:1074

84870

+#, c-format

84871

+msgid "function-like macro \"%s\" must be used with arguments in traditional C"

84872

+msgstr "macro \"%s\" do tipo função deve ser usada com argumento em C tradicional"

84873

+

84874

+# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33305

84875

+#: macro.c:1746

84876

+#, c-format

84877

+msgid "invoking macro %s argument %d: empty macro arguments are undefined in ISO C90 and ISO C++98"

84878

+msgstr "chamando macro %s argumento %d: argumentos de macro vazios estão indefinidos em ISO C90 e ISO C++98"

84879

+

84880

+#: macro.c:2708

84881

+#, c-format

84882

+msgid "duplicate macro parameter \"%s\""

84883

+msgstr "parâmetro de macro \"%s\" duplicado"

84884

+

84885

+#: macro.c:2754

84886

+#, c-format

84887

+msgid "\"%s\" may not appear in macro parameter list"

84888

+msgstr "\"%s\" não pode aparecer na lista de parâmetros de macro"

84889

+

84890

+#: macro.c:2762

84891

+msgid "macro parameters must be comma-separated"

84892

+msgstr "parâmetros de macro devem ser separados por vírgula"

84893

+

84894

+#: macro.c:2779

84895

+msgid "parameter name missing"

84896

+msgstr "faltando nome de parâmetro"

84897

+

84898

+#: macro.c:2797

84899

+msgid "anonymous variadic macros were introduced in C99"

84900

+msgstr "macros variádicas anônimas foram introduzidas em C99"

84901

+

84902

+#: macro.c:2802

84903

+msgid "ISO C does not permit named variadic macros"

84904

+msgstr "ISO C não permite macros variádicas nomeadas"

84905

+

84906

+#: macro.c:2811

84907

+msgid "missing ')' in macro parameter list"

84908

+msgstr "faltando \")\" na lista de parâmetros de macro"

84909

+

84910

+#: macro.c:2860

84911

+msgid "'##' cannot appear at either end of a macro expansion"

84912

+msgstr "\"##\" não pode aparecer no final da expansão de macro"

84913

+

84914

+#: macro.c:2895

84915

+msgid "ISO C99 requires whitespace after the macro name"

84916

+msgstr "ISO C99 requer espaço em branco após o nome de macro"

84917

+

84918

+#: macro.c:2919

84919

+msgid "missing whitespace after the macro name"

84920

+msgstr "faltando espaço em branco após o nome de macro"

84921

+

84922

+#: macro.c:2953

84923

+msgid "'#' is not followed by a macro parameter"

84924

+msgstr "\"#\" não está seguido por um parâmetro de macro"

84925

+

84926

+#: macro.c:3111

84927

+#, c-format

84928

+msgid "\"%s\" redefined"

84929

+msgstr "\"%s\" re-definido"

84930

+

84931

+#: macro.c:3117

84932

+msgid "this is the location of the previous definition"

84933

+msgstr "essa é a localização da definição anterior"

84934

+

84935

+#: macro.c:3178

84936

+#, c-format

84937

+msgid "macro argument \"%s\" would be stringified in traditional C"

84938

+msgstr "argumento de macro \"%s\" estaria em uma string no C tradicional"

84939

+

84940

+#: macro.c:3205

84941

+#, c-format

84942

+msgid "invalid hash type %d in cpp_macro_definition"

84943

+msgstr "tipo de hash inválido %d em cpp_macro_definition"

84944

+

84945

+#: pch.c:87 pch.c:345 pch.c:359 pch.c:377 pch.c:383 pch.c:392 pch.c:399

84946

+msgid "while writing precompiled header"

84947

+msgstr "enquanto realizava escrita de header pré-compilado"

84948

+

84949

+#: pch.c:619

84950

+#, c-format

84951

+msgid "%s: not used because `%.*s' is poisoned"

84952

+msgstr "%s: não usado porque \"%.*s\" está envenenado"

84953

+

84954

+#: pch.c:641

84955

+#, c-format

84956

+msgid "%s: not used because `%.*s' not defined"

84957

+msgstr "%s: não usado porque \"%.*s\" não está definido"

84958

+

84959

+#: pch.c:653

84960

+#, c-format

84961

+msgid "%s: not used because `%.*s' defined as `%s' not `%.*s'"

84962

+msgstr "%s: não usado porque \"%.*s\" está definido como \"%s\", e não \"%.*s\""

84963

+

84964

+#: pch.c:694

84965

+#, c-format

84966

+msgid "%s: not used because `%s' is defined"

84967

+msgstr "%s: não usado porque \"%s\" está definido"

84968

+

84969

+#: pch.c:714

84970

+#, c-format

84971

+msgid "%s: not used because `__COUNTER__' is invalid"

84972

+msgstr "%s: não usado porque \"__COUNTER__\" é inválido"

84973

+

84974

+#: pch.c:723 pch.c:898

84975

+msgid "while reading precompiled header"

84976

+msgstr "enquanto realizava leitura de header pré-compilado"

84977

+

84978

+#: traditional.c:750

84979

+#, c-format

84980

+msgid "detected recursion whilst expanding macro \"%s\""

84981

+msgstr "detectada recursão enquanto expandia macro \"%s\""

84982

+

84983

+#: traditional.c:968

84984

+msgid "syntax error in macro parameter list"

84985

+msgstr "erro de sintaxe na lista de parâmetros de macro"

84986

Index: libcpp/po/ChangeLog

84987

===================================================================

84988

--- a/src/libcpp/po/ChangeLog (.../tags/gcc_4_8_2_release)

84989

+++ b/src/libcpp/po/ChangeLog (.../branches/gcc-4_8-branch)

84990

@@ -1,3 +1,11 @@

84991

+2013-12-18 Joseph Myers <joseph@codesourcery.com>

84992

+

84993

+ * pt_BR.po: New.

84994

+

84995

+2013-11-01 Joseph Myers <joseph@codesourcery.com>

84996

+

84997

+ * tr.po: Update.

84998

+

84999

2013-10-16 Release Manager

85000

85001

* GCC 4.8.2 released.

85002

Index: libcpp/po/tr.po

85003

===================================================================

85004

--- a/src/libcpp/po/tr.po (.../tags/gcc_4_8_2_release)

85005

+++ b/src/libcpp/po/tr.po (.../branches/gcc-4_8-branch)

85006

@@ -1,20 +1,22 @@

85007

# Turkish translations for cpplib messages.

85008

85009

+# This file is distributed under the same license as the gcc package.

85010

#

85011

# Nilgün Belma Bugüner <nilgun@buguner.name.tr>, 2001, ..., 2007.

85012

+# Volkan Gezer <vlkngzr@gmail.com>, 2013.

85013

msgid ""

85014

msgstr ""

85015

-"Project-Id-Version: cpplib 4.2.0\n"

85016

+"Project-Id-Version: cpplib 4.8.0\n"

85017

"Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n"

85018

-"POT-Creation-Date: 2013-02-24 01:05+0000\n"

85019

-"PO-Revision-Date: 2007-05-23 01:17+0300\n"

85020

-"Last-Translator: Nilgün Belma Bugüner <nilgun@buguner.name.tr>\n"

85021

+"POT-Creation-Date: 2013-03-15 17:42+0000\n"

85022

+"PO-Revision-Date: 2013-11-01 22:29+0100\n"

85023

+"Last-Translator: Volkan Gezer <vlkngzr@gmail.com>\n"

85024

"Language-Team: Turkish <gnu-tr-u12a@lists.sourceforge.net>\n"

85025

"Language: tr\n"

85026

"MIME-Version: 1.0\n"

85027

"Content-Type: text/plain; charset=UTF-8\n"

85028

"Content-Transfer-Encoding: 8bit\n"

85029

-"X-Generator: KBabel 1.11.4\n"

85030

+"X-Generator: Lokalize 1.5\n"

85031

"Plural-Forms: nplurals=2; plural=(n != 1);\n"

85032

85033

#: charset.c:673

85034

@@ -121,10 +123,9 @@

85035

msgstr "ISO standardı olmayan önceleme dizgesi, '\\%c'"

85036

85037

#: charset.c:1320

85038

-#, fuzzy, c-format

85039

-#| msgid "unknown escape sequence '\\%c'"

85040

+#, c-format

85041

msgid "unknown escape sequence: '\\%c'"

85042

-msgstr "bilinmeyen önceleme dizgesi '\\%c'"

85043

+msgstr "bilinmeyen kaçış dizgesi: '\\%c'"

85044

85045

#: charset.c:1328

85046

#, c-format

85047

@@ -163,10 +164,9 @@

85048

msgstr "#%s bir GCC uzantısıdır"

85049

85050

#: directives.c:362

85051

-#, fuzzy, c-format

85052

-#| msgid "#%s is a GCC extension"

85053

+#, c-format

85054

msgid "#%s is a deprecated GCC extension"

85055

-msgstr "#%s bir GCC uzantısıdır"

85056

+msgstr "#%s eskimiş bir GCC uzantısıdır"

85057

85058

#: directives.c:375

85059

msgid "suggest not using #elif in traditional C"

85060

@@ -247,7 +247,7 @@

85061

85062

#: directives.c:909

85063

msgid "unexpected end of file after #line"

85064

-msgstr ""

85065

+msgstr "#line satırından sonra beklenmeyen dosya sonu"

85066

85067

#: directives.c:912

85068

#, c-format

85069

@@ -271,7 +271,7 @@

85070

#: directives.c:1068 directives.c:1070 directives.c:1072 directives.c:1658

85071

#, c-format

85072

msgid "%s"

85073

-msgstr ""

85074

+msgstr "%s"

85075

85076

#: directives.c:1096

85077

#, c-format

85078

@@ -312,16 +312,12 @@

85079

msgstr "main dosyasında '#pragma once'"

85080

85081

#: directives.c:1462

85082

-#, fuzzy

85083

-#| msgid "invalid #pragma GCC poison directive"

85084

msgid "invalid #pragma push_macro directive"

85085

-msgstr "geçersiz #pragma GCC poison yönergesi"

85086

+msgstr "geçersiz #pragma güdümlü_makro yönergesi"

85087

85088

#: directives.c:1517

85089

-#, fuzzy

85090

-#| msgid "invalid #pragma GCC poison directive"

85091

msgid "invalid #pragma pop_macro directive"

85092

-msgstr "geçersiz #pragma GCC poison yönergesi"

85093

+msgstr "geçersiz #pragma güdümlü_makro yönergesi"

85094

85095

#: directives.c:1572

85096

msgid "invalid #pragma GCC poison directive"

85097

@@ -347,10 +343,9 @@

85098

msgstr "mevcut dosya %s den daha eski"

85099

85100

#: directives.c:1653

85101

-#, fuzzy, c-format

85102

-#| msgid "invalid #pragma GCC poison directive"

85103

+#, c-format

85104

msgid "invalid \"#pragma GCC %s\" directive"

85105

-msgstr "geçersiz #pragma GCC poison yönergesi"

85106

+msgstr "geçersiz \"#pragma GCC %s\" yönergesi"

85107

85108

#: directives.c:1847

85109

msgid "_Pragma takes a parenthesized string literal"

85110

@@ -405,7 +400,7 @@

85111

msgid "\"%s\" re-asserted"

85112

msgstr "\"%s\" tekrar olumlanmış"

85113

85114

-#: directives.c:2566

85115

+#: directives.c:2567

85116

#, c-format

85117

msgid "unterminated #%s"

85118

msgstr "sonlandırılmamış #%s"

85119

@@ -424,16 +419,12 @@

85120

msgstr "%s: %s"

85121

85122

#: expr.c:479 expr.c:577

85123

-#, fuzzy

85124

-#| msgid "imaginary constants are a GCC extension"

85125

msgid "fixed-point constants are a GCC extension"

85126

-msgstr "sanal sabitler bir GCC genişletmesidir"

85127

+msgstr "sabit noktalı sabitler bir GCC uzantısıdır"

85128

85129

#: expr.c:504

85130

-#, fuzzy

85131

-#| msgid "invalid suffix \"%.*s\" on floating constant"

85132

msgid "invalid prefix \"0b\" for floating constant"

85133

-msgstr "gerçel sabitin \"%.*s\" soneki geçersiz"

85134

+msgstr "kayan nokta için geçerisz \"0b\" öntakısı"

85135

85136

#: expr.c:514

85137

msgid "use of C99 hexadecimal floating constant"

85138

@@ -450,10 +441,8 @@

85139

msgstr "geleneksel C \"%.*s\" sonekini kullanmaz"

85140

85141

#: expr.c:564

85142

-#, fuzzy

85143

-#| msgid "imaginary constants are a GCC extension"

85144

msgid "suffix for double constant is a GCC extension"

85145

-msgstr "sanal sabitler bir GCC genişletmesidir"

85146

+msgstr "çift sabit için öntakı bir GCC uzantısıdır"

85147

85148

#: expr.c:570

85149

#, c-format

85150

@@ -461,10 +450,8 @@

85151

msgstr "onaltılık kayan sabitli \"%.*s\" soneki geçersiz"

85152

85153

#: expr.c:581

85154

-#, fuzzy

85155

-#| msgid "imaginary constants are a GCC extension"

85156

msgid "decimal float constants are a GCC extension"

85157

-msgstr "sanal sabitler bir GCC genişletmesidir"

85158

+msgstr "onluk kayan sabitler bir GCC uzantısıdır"

85159

85160

#: expr.c:599

85161

#, c-format

85162

@@ -472,10 +459,8 @@

85163

msgstr "tamsayı sabitte sonek \"%.*s\" soneki geçersiz"

85164

85165

#: expr.c:624

85166

-#, fuzzy

85167

-#| msgid "use of C99 long long integer constant"

85168

msgid "use of C++0x long long integer constant"

85169

-msgstr "ISO C99 long long tamsayı sabitleri yasaklar"

85170

+msgstr "ISO C++0x long long tamsayı sabitlerinin kullanımı"

85171

85172

#: expr.c:625

85173

msgid "use of C99 long long integer constant"

85174

@@ -486,10 +471,8 @@

85175

msgstr "sanal sabitler bir GCC genişletmesidir"

85176

85177

#: expr.c:644

85178

-#, fuzzy

85179

-#| msgid "imaginary constants are a GCC extension"

85180

msgid "binary constants are a GCC extension"

85181

-msgstr "sanal sabitler bir GCC genişletmesidir"

85182

+msgstr "ikili sabitler bir GCC uzantısıdır"

85183

85184

#: expr.c:737

85185

msgid "integer constant is too large for its type"

85186

@@ -517,10 +500,8 @@

85187

msgstr "\"defined\" bu kullanımıyla uyarlanabilir olmayabilir"

85188

85189

#: expr.c:948

85190

-#, fuzzy

85191

-#| msgid "integer overflow in preprocessor expression"

85192

msgid "user-defined literal in preprocessor expression"

85193

-msgstr "önişlemci ifadesinde tamsayı taşması"

85194

+msgstr "önişleyici ifadesinde kullanıcı tanımlı bağımlı"

85195

85196

#: expr.c:953

85197

msgid "floating constant in preprocessor expression"

85198

@@ -536,20 +517,17 @@

85199

msgstr "\"%s\" tanımlı değil"

85200

85201

#: expr.c:1020

85202

-#, fuzzy

85203

-#| msgid "#%s is a GCC extension"

85204

msgid "assertions are a GCC extension"

85205

-msgstr "#%s bir GCC uzantısıdır"

85206

+msgstr "belirteçler bir GCC uzantısıdır"

85207

85208

#: expr.c:1023

85209

msgid "assertions are a deprecated extension"

85210

-msgstr ""

85211

+msgstr "belirteçler artık kullanılmayan bir ifadedir"

85212

85213

#: expr.c:1268

85214

-#, fuzzy, c-format

85215

-#| msgid "unbalanced stack in #if"

85216

+#, c-format

85217

msgid "unbalanced stack in %s"

85218

-msgstr "#if ifadesinde karşılıksız yığın"

85219

+msgstr "%s içinde dengelenmemiş yığın"

85220

85221

#: expr.c:1288

85222

#, c-format

85223

@@ -594,39 +572,39 @@

85224

msgid "division by zero in #if"

85225

msgstr "#if içinde sıfırla bölme"

85226

85227

-#: files.c:504

85228

+#: files.c:505

85229

msgid "NULL directory in find_file"

85230

msgstr "find_file içinde boş dizin"

85231

85232

-#: files.c:542

85233

+#: files.c:553

85234

msgid "one or more PCH files were found, but they were invalid"

85235

msgstr "bir veya daha fazla PCH dosyası bulundu ama bunlar geçersiz"

85236

85237

-#: files.c:545

85238

+#: files.c:556

85239

msgid "use -Winvalid-pch for more information"

85240

msgstr "daha fazla bilgi almak için -Winvalid-pch kullanın"

85241

85242

-#: files.c:643

85243

+#: files.c:660

85244

#, c-format

85245

msgid "%s is a block device"

85246

msgstr "%s bir blok aygıtıdır"

85247

85248

-#: files.c:660

85249

+#: files.c:677

85250

#, c-format

85251

msgid "%s is too large"

85252

msgstr "%s çok büyük"

85253

85254

-#: files.c:700

85255

+#: files.c:717

85256

#, c-format

85257

msgid "%s is shorter than expected"

85258

msgstr "%s beklenenden daha kısa"

85259

85260

-#: files.c:935

85261

+#: files.c:953

85262

#, c-format

85263

msgid "no include path in which to search for %s"

85264

msgstr "%s için aranacaklar içinde başlık dosyaları yolu yok"

85265

85266

-#: files.c:1363

85267

+#: files.c:1381

85268

msgid "Multiple include guards may be useful for:\n"

85269

msgstr "Çoklu include önlemleri aşağıdakiler için kullanışlı olabilir:\n"

85270

85271

@@ -717,27 +695,24 @@

85272

#: lex.c:1178 lex.c:1255

85273

#, c-format

85274

msgid "identifier \"%s\" is a special operator name in C++"

85275

-msgstr ""

85276

+msgstr "\"%s\" belirteci, C++'da özel bir işleç adıdır"

85277

85278

#: lex.c:1399

85279

msgid "raw string delimiter longer than 16 characters"

85280

-msgstr ""

85281

+msgstr "ham dizge ayracı 16 karakterden uzun"

85282

85283

#: lex.c:1402

85284

-#, fuzzy, c-format

85285

-#| msgid "universal character %.*s is not valid in an identifier"

85286

+#, c-format

85287

msgid "invalid character '%c' in raw string delimiter"

85288

-msgstr "evrensel karakter %.*s bir belirteç içinde geçerli değil"

85289

+msgstr "ham dizge ayracında geçersiz karakter '%c'"

85290

85291

#: lex.c:1525 lex.c:1547

85292

-#, fuzzy

85293

-#| msgid "unterminated #%s"

85294

msgid "unterminated raw string"

85295

-msgstr "sonlandırılmamış #%s"

85296

+msgstr "bitirilmemiş ham dizge"

85297

85298

#: lex.c:1573 lex.c:1706

85299

msgid "invalid suffix on literal; C++11 requires a space between literal and identifier"

85300

-msgstr ""

85301

+msgstr "geçersiz ifade soneki; C++11 ifade ve tanımlayıcı arasında bir boşluk gerektirir"

85302

85303

#: lex.c:1684

85304

msgid "null character(s) preserved in literal"

85305

@@ -785,7 +760,7 @@

85306

85307

#: macro.c:377

85308

msgid "__COUNTER__ expanded inside directive with -fdirectives-only"

85309

-msgstr ""

85310

+msgstr "__COUNTER__ -fdirectives-only ile talimat içerisinde genişletildi"

85311

85312

#: macro.c:535

85313

msgid "invalid string literal, ignoring final '\\'"

85314

@@ -823,7 +798,7 @@

85315

#: macro.c:1746

85316

#, c-format

85317

msgid "invoking macro %s argument %d: empty macro arguments are undefined in ISO C90 and ISO C++98"

85318

-msgstr ""

85319

+msgstr "%s makrosu %d argümanı uygulanıyor: ISO C90 ve ISO C++98 içerisinde boş makro argümanları tanımsızdır"

85320

85321

#: macro.c:2708

85322

#, c-format

85323

@@ -890,38 +865,36 @@

85324

msgid "invalid hash type %d in cpp_macro_definition"

85325

msgstr "cpp_macro_definition içindeki isimli yapı türü %d geçersiz"

85326

85327

-#: pch.c:87 pch.c:335 pch.c:347 pch.c:365 pch.c:371 pch.c:380 pch.c:387

85328

+#: pch.c:87 pch.c:345 pch.c:359 pch.c:377 pch.c:383 pch.c:392 pch.c:399

85329

msgid "while writing precompiled header"

85330

msgstr "önderlemeli başlık yazılırken"

85331

85332

-#: pch.c:607

85333

-#, fuzzy, c-format

85334

-#| msgid "%s: not used because `%s' is defined"

85335

+#: pch.c:619

85336

+#, c-format

85337

msgid "%s: not used because `%.*s' is poisoned"

85338

-msgstr "%s: `%s' tanımlı olduğundan kullanılmadı"

85339

+msgstr "%s: `%.*s' zehirli olduğu için kullanılmadı"

85340

85341

-#: pch.c:629

85342

+#: pch.c:641

85343

#, c-format

85344

msgid "%s: not used because `%.*s' not defined"

85345

msgstr "%s: `%.*s' tanımlı olmadığından kullanılmadı"

85346

85347

-#: pch.c:641

85348

+#: pch.c:653

85349

#, c-format

85350

msgid "%s: not used because `%.*s' defined as `%s' not `%.*s'"

85351

msgstr "%s: `%.*s' kullanılmadı çünkü `%s' olarak tanımlı, `%.*s' değil"

85352

85353

-#: pch.c:682

85354

+#: pch.c:694

85355

#, c-format

85356

msgid "%s: not used because `%s' is defined"

85357

msgstr "%s: `%s' tanımlı olduğundan kullanılmadı"

85358

85359

-#: pch.c:702

85360

-#, fuzzy, c-format

85361

-#| msgid "%s: not used because `%s' is defined"

85362

+#: pch.c:714

85363

+#, c-format

85364

msgid "%s: not used because `__COUNTER__' is invalid"

85365

-msgstr "%s: `%s' tanımlı olduğundan kullanılmadı"

85366

+msgstr "%s: `__COUNTER__' geçersiz olduğundan kullanılmadı"

85367

85368

-#: pch.c:711 pch.c:886

85369

+#: pch.c:723 pch.c:898

85370

msgid "while reading precompiled header"

85371

msgstr "önderlemeli başlık okunurken"

85372

85373

Index: .

85374

===================================================================

85375

--- a/src/. (.../tags/gcc_4_8_2_release)

85376

+++ b/src/. (.../branches/gcc-4_8-branch)

85377

85378

Property changes on: .

85379

___________________________________________________________________

85380

Modified: svn:mergeinfo

85381

Merged /trunk:r202766,204547,206123-206126,206395,206628,207387