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  • Committer: Package Import Robot
  • Author(s): Matthias Klose
  • Date: 2014-12-19 19:48:34 UTC
  • Revision ID: package-import@ubuntu.com-20141219194834-4dz1q7rrn5pad823
Tags: 4.8.4-1
* GCC 4.8.4 release.
  - Fix PR target/61407 (darwin), PR middle-end/58624 (ice),
    PR sanitizer/64265 (wrong code).
* Require recent binutils to pass go test failures.

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.svn/pristine/8d/8dbd9e6cc1cab984fa46223290357c1bca9fce1b.svn-base
 
1
# DP: Implements D CPU version conditions.
 
2
 
 
3
This implements the following versions:
 
4
* D_HardFloat
 
5
* D_SoftFloat
 
6
 
 
7
for all supported architectures. And these where appropriate:
 
8
* ARM
 
9
** ARM_Thumb
 
10
** ARM_HardFloat
 
11
** ARM_SoftFloat
 
12
** ARM_SoftFP
 
13
* AArch64
 
14
* Alpha
 
15
** Alpha_SoftFloat
 
16
** Alpha_HardFloat
 
17
* X86
 
18
* X86_64
 
19
** D_X32
 
20
* IA64
 
21
* MIPS32
 
22
* MIPS64
 
23
** MIPS_O32
 
24
** MIPS_O64
 
25
** MIPS_N32
 
26
** MIPS_N64
 
27
** MIPS_EABI
 
28
** MIPS_HardFloat
 
29
** MIPS_SoftFloat
 
30
* HPPA
 
31
* HPPA64
 
32
* PPC
 
33
* PPC64
 
34
** PPC_HardFloat
 
35
** PPC_SoftFloat
 
36
* S390
 
37
* S390X
 
38
* SH
 
39
* SH64
 
40
* SPARC
 
41
* SPARC64
 
42
* SPARC_V8Plus
 
43
** SPARC_HardFloat
 
44
** SPARC_SoftFloat
 
45
 
 
46
Index: b/src/gcc/config/aarch64/aarch64.h
 
47
===================================================================
 
48
--- a/src/gcc/config/aarch64/aarch64.h
 
49
+++ b/src/gcc/config/aarch64/aarch64.h
 
50
@@ -51,6 +51,14 @@
 
51
                                                        \
 
52
     } while (0)
 
53
 
 
54
+/* Target CPU builtins for D.  */
 
55
+#define TARGET_CPU_D_BUILTINS()                                \
 
56
+  do                                                   \
 
57
+    {                                                  \
 
58
+      builtin_define ("AArch64");                      \
 
59
+      builtin_define ("D_HardFloat");                  \
 
60
+    } while (0)
 
61
+
 
62
 
 
63
 
 
64
 /* Target machine storage layout.  */
 
65
Index: b/src/gcc/config/alpha/alpha.h
 
66
===================================================================
 
67
--- a/src/gcc/config/alpha/alpha.h
 
68
+++ b/src/gcc/config/alpha/alpha.h
 
69
@@ -72,6 +72,23 @@ along with GCC; see the file COPYING3.
 
70
        SUBTARGET_LANGUAGE_CPP_BUILTINS();              \
 
71
 } while (0)
 
72
 
 
73
+/* Target CPU builtins for D.  */
 
74
+#define TARGET_CPU_D_BUILTINS()                                \
 
75
+  do                                                   \
 
76
+    {                                                  \
 
77
+       builtin_define ("Alpha");                       \
 
78
+       if (TARGET_SOFT_FP)                             \
 
79
+         {                                             \
 
80
+           builtin_define ("D_SoftFloat");             \
 
81
+           builtin_define ("Alpha_SoftFloat");         \
 
82
+         }                                             \
 
83
+       else                                            \
 
84
+         {                                             \
 
85
+           builtin_define ("D_HardFloat");             \
 
86
+           builtin_define ("Alpha_HardFloat");         \
 
87
+         }                                             \
 
88
+} while (0)
 
89
+
 
90
 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
 
91
 #define SUBTARGET_LANGUAGE_CPP_BUILTINS()              \
 
92
   do                                                   \
 
93
Index: b/src/gcc/config/arm/arm.h
 
94
===================================================================
 
95
--- a/src/gcc/config/arm/arm.h
 
96
+++ b/src/gcc/config/arm/arm.h
 
97
@@ -158,6 +158,31 @@ extern char arm_arch_name[];
 
98
          builtin_define ("__ARM_ARCH_EXT_IDIV__");     \
 
99
     } while (0)
 
100
 
 
101
+/* Target CPU builtins for D.  */
 
102
+#define TARGET_CPU_D_BUILTINS()                                \
 
103
+  do                                                   \
 
104
+    {                                                  \
 
105
+       builtin_define ("ARM");                         \
 
106
+                                                       \
 
107
+       if (TARGET_THUMB || TARGET_THUMB2)              \
 
108
+         builtin_define ("ARM_Thumb");                 \
 
109
+                                                       \
 
110
+       if (TARGET_HARD_FLOAT_ABI)                      \
 
111
+         builtin_define ("ARM_HardFloat");             \
 
112
+       else                                            \
 
113
+         {                                             \
 
114
+           if(TARGET_SOFT_FLOAT)                       \
 
115
+             builtin_define ("ARM_SoftFloat");         \
 
116
+           else if(TARGET_HARD_FLOAT)                  \
 
117
+             builtin_define ("ARM_SoftFP");            \
 
118
+         }                                             \
 
119
+                                                       \
 
120
+       if(TARGET_SOFT_FLOAT)                           \
 
121
+         builtin_define ("D_SoftFloat");               \
 
122
+       else if(TARGET_HARD_FLOAT)                      \
 
123
+         builtin_define ("D_HardFloat");               \
 
124
+    } while (0)
 
125
+
 
126
 #include "config/arm/arm-opts.h"
 
127
 
 
128
 enum target_cpus
 
129
Index: b/src/gcc/config/i386/i386.h
 
130
===================================================================
 
131
--- a/src/gcc/config/i386/i386.h
 
132
+++ b/src/gcc/config/i386/i386.h
 
133
@@ -588,6 +588,24 @@ extern const char *host_detect_local_cpu
 
134
 /* Target CPU builtins.  */
 
135
 #define TARGET_CPU_CPP_BUILTINS() ix86_target_macros ()
 
136
 
 
137
+/* Target CPU builtins for D.  */
 
138
+#define TARGET_CPU_D_BUILTINS()                        \
 
139
+  do {                                         \
 
140
+    if (TARGET_64BIT)                          \
 
141
+    {                                          \
 
142
+      builtin_define("X86_64");                        \
 
143
+      if (TARGET_X32)                          \
 
144
+        builtin_define("D_X32");               \
 
145
+    }                                          \
 
146
+    else                                       \
 
147
+      builtin_define("X86");                   \
 
148
+                                               \
 
149
+    if (TARGET_80387)                          \
 
150
+      builtin_define("D_HardFloat");           \
 
151
+    else                                       \
 
152
+      builtin_define("D_SoftFloat");           \
 
153
+  } while (0)
 
154
+
 
155
 /* Target Pragmas.  */
 
156
 #define REGISTER_TARGET_PRAGMAS() ix86_register_pragmas ()
 
157
 
 
158
Index: b/src/gcc/config/ia64/ia64.h
 
159
===================================================================
 
160
--- a/src/gcc/config/ia64/ia64.h
 
161
+++ b/src/gcc/config/ia64/ia64.h
 
162
@@ -40,6 +40,13 @@ do {                                         \
 
163
          builtin_define("__BIG_ENDIAN__");     \
 
164
 } while (0)
 
165
 
 
166
+/* Target CPU builtins for D.  */
 
167
+#define TARGET_CPU_D_BUILTINS()                        \
 
168
+do {                                           \
 
169
+       builtin_define ("IA64");                \
 
170
+       builtin_define ("D_HardFloat");         \
 
171
+} while (0)
 
172
+
 
173
 #ifndef SUBTARGET_EXTRA_SPECS
 
174
 #define SUBTARGET_EXTRA_SPECS
 
175
 #endif
 
176
Index: b/src/gcc/config/mips/mips.h
 
177
===================================================================
 
178
--- a/src/gcc/config/mips/mips.h
 
179
+++ b/src/gcc/config/mips/mips.h
 
180
@@ -551,6 +551,54 @@ struct mips_cpu_info {
 
181
     }                                                                  \
 
182
   while (0)
 
183
 
 
184
+/* Target CPU builtins for D.  */
 
185
+#define TARGET_CPU_D_BUILTINS()                                                \
 
186
+  do                                                                   \
 
187
+  {                                                                    \
 
188
+    if (TARGET_64BIT)                                                  \
 
189
+      builtin_define("MIPS64");                                                \
 
190
+    else                                                               \
 
191
+      builtin_define("MIPS32");                                                \
 
192
+                                                                       \
 
193
+    switch (mips_abi)                                                  \
 
194
+    {                                                                  \
 
195
+      case ABI_32:                                                     \
 
196
+       builtin_define("MIPS_O32");                                     \
 
197
+       break;                                                          \
 
198
+                                                                       \
 
199
+      case ABI_O64:                                                    \
 
200
+       builtin_define("MIPS_O64");                                     \
 
201
+       break;                                                          \
 
202
+                                                                       \
 
203
+      case ABI_N32:                                                    \
 
204
+       builtin_define("MIPS_N32");                                     \
 
205
+       break;                                                          \
 
206
+                                                                       \
 
207
+      case ABI_64:                                                     \
 
208
+       builtin_define("MIPS_N64");                                     \
 
209
+       break;                                                          \
 
210
+                                                                       \
 
211
+      case ABI_EABI:                                                   \
 
212
+       builtin_define("MIPS_EABI");                                    \
 
213
+       break;                                                          \
 
214
+                                                                       \
 
215
+      default:                                                         \
 
216
+       gcc_unreachable();                                              \
 
217
+    }                                                                  \
 
218
+                                                                       \
 
219
+    if (TARGET_HARD_FLOAT_ABI)                                         \
 
220
+    {                                                                  \
 
221
+      builtin_define("MIPS_HardFloat");                                        \
 
222
+      builtin_define("D_HardFloat");                                   \
 
223
+    }                                                                  \
 
224
+    else if (TARGET_SOFT_FLOAT_ABI)                                    \
 
225
+    {                                                                  \
 
226
+      builtin_define("MIPS_SoftFloat");                                        \
 
227
+      builtin_define("D_SoftFloat");                                   \
 
228
+    }                                                                  \
 
229
+  }                                                                    \
 
230
+  while (0)
 
231
+
 
232
 /* Default target_flags if no switches are specified  */
 
233
 
 
234
 #ifndef TARGET_DEFAULT
 
235
Index: b/src/gcc/config/pa/pa.h
 
236
===================================================================
 
237
--- a/src/gcc/config/pa/pa.h
 
238
+++ b/src/gcc/config/pa/pa.h
 
239
@@ -185,6 +185,20 @@ do {                                                               \
 
240
        builtin_define("_PA_RISC1_0");                          \
 
241
 } while (0)
 
242
 
 
243
+/* Target CPU builtins for D.  */
 
244
+#define TARGET_CPU_D_BUILTINS()                                        \
 
245
+do {                                                           \
 
246
+     if(TARGET_64BIT)                                          \
 
247
+       builtin_define("HPPA64");                               \
 
248
+     else                                                      \
 
249
+       builtin_define("HPPA");                                 \
 
250
+                                                               \
 
251
+     if(TARGET_SOFT_FLOAT)                                     \
 
252
+       builtin_define ("D_SoftFloat");                         \
 
253
+     else                                                      \
 
254
+       builtin_define ("D_HardFloat");                         \
 
255
+} while (0)
 
256
+
 
257
 /* An old set of OS defines for various BSD-like systems.  */
 
258
 #define TARGET_OS_CPP_BUILTINS()                               \
 
259
   do                                                           \
 
260
Index: b/src/gcc/config/rs6000/rs6000.h
 
261
===================================================================
 
262
--- a/src/gcc/config/rs6000/rs6000.h
 
263
+++ b/src/gcc/config/rs6000/rs6000.h
 
264
@@ -702,6 +702,28 @@ extern unsigned char rs6000_recip_bits[]
 
265
 #define TARGET_CPU_CPP_BUILTINS() \
 
266
   rs6000_cpu_cpp_builtins (pfile)
 
267
 
 
268
+/* Target CPU builtins for D.  */
 
269
+#define TARGET_CPU_D_BUILTINS()                        \
 
270
+  do                                           \
 
271
+    {                                          \
 
272
+      if (TARGET_64BIT)                                \
 
273
+       builtin_define ("PPC64");               \
 
274
+      else                                     \
 
275
+       builtin_define ("PPC");                 \
 
276
+                                               \
 
277
+      if (TARGET_HARD_FLOAT)                   \
 
278
+       {                                       \
 
279
+         builtin_define ("PPC_HardFloat");     \
 
280
+         builtin_define ("D_HardFloat");       \
 
281
+       }                                       \
 
282
+      else if (TARGET_SOFT_FLOAT)              \
 
283
+       {                                       \
 
284
+         builtin_define ("PPC_SoftFloat");     \
 
285
+         builtin_define ("D_SoftFloat");       \
 
286
+       }                                       \
 
287
+    }                                          \
 
288
+  while (0)
 
289
+
 
290
 /* This is used by rs6000_cpu_cpp_builtins to indicate the byte order
 
291
    we're compiling for.  Some configurations may need to override it.  */
 
292
 #define RS6000_CPU_CPP_ENDIAN_BUILTINS()       \
 
293
Index: b/src/gcc/config/s390/s390.h
 
294
===================================================================
 
295
--- a/src/gcc/config/s390/s390.h
 
296
+++ b/src/gcc/config/s390/s390.h
 
297
@@ -114,6 +114,22 @@ enum processor_flags
 
298
     }                                                                  \
 
299
   while (0)
 
300
 
 
301
+/* Target CPU builtins for D.  */
 
302
+#define TARGET_CPU_D_BUILTINS()                                \
 
303
+  do                                                   \
 
304
+    {                                                  \
 
305
+      if (TARGET_64BIT)                                        \
 
306
+        builtin_define ("S390X");                      \
 
307
+      else                                             \
 
308
+        builtin_define ("S390");                       \
 
309
+                                                       \
 
310
+      if(TARGET_SOFT_FLOAT)                            \
 
311
+        builtin_define ("D_SoftFloat");                        \
 
312
+      else if(TARGET_HARD_FLOAT)                       \
 
313
+        builtin_define ("D_HardFloat");                        \
 
314
+    }                                                  \
 
315
+  while (0)
 
316
+
 
317
 #ifdef DEFAULT_TARGET_64BIT
 
318
 #define TARGET_DEFAULT             (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP | MASK_OPT_HTM)
 
319
 #else
 
320
Index: b/src/gcc/config/sh/sh.h
 
321
===================================================================
 
322
--- a/src/gcc/config/sh/sh.h
 
323
+++ b/src/gcc/config/sh/sh.h
 
324
@@ -31,6 +31,22 @@ extern int code_for_indirect_jump_scratc
 
325
 
 
326
 #define TARGET_CPU_CPP_BUILTINS() sh_cpu_cpp_builtins (pfile)
 
327
 
 
328
+/* Target CPU builtins for D.  */
 
329
+#define TARGET_CPU_D_BUILTINS()                        \
 
330
+  do                                           \
 
331
+    {                                          \
 
332
+      if (TARGET_SHMEDIA64)                    \
 
333
+       builtin_define ("SH64");                \
 
334
+      else                                     \
 
335
+       builtin_define ("SH");                  \
 
336
+                                               \
 
337
+      if (TARGET_FPU_ANY)                      \
 
338
+       builtin_define ("D_HardFloat");         \
 
339
+      else                                     \
 
340
+       builtin_define ("D_SoftFloat");         \
 
341
+    }                                          \
 
342
+  while (0)
 
343
+
 
344
 /* Value should be nonzero if functions must have frame pointers.
 
345
    Zero means the frame pointer need not be set up (and parms may be accessed
 
346
    via the stack pointer) in functions that seem suitable.  */
 
347
Index: b/src/gcc/config/sparc/sparc.h
 
348
===================================================================
 
349
--- a/src/gcc/config/sparc/sparc.h
 
350
+++ b/src/gcc/config/sparc/sparc.h
 
351
@@ -27,6 +27,31 @@ along with GCC; see the file COPYING3.
 
352
 
 
353
 #define TARGET_CPU_CPP_BUILTINS() sparc_target_macros ()
 
354
 
 
355
+/* Target CPU builtins for D.  */
 
356
+#define TARGET_CPU_D_BUILTINS()                        \
 
357
+do                                             \
 
358
+    {                                          \
 
359
+      if (TARGET_64BIT)                                \
 
360
+       builtin_define ("SPARC64");             \
 
361
+      else                                     \
 
362
+       builtin_define ("SPARC");               \
 
363
+                                               \
 
364
+      if(TARGET_V8PLUS)                                \
 
365
+       builtin_define ("SPARC_V8Plus");        \
 
366
+                                               \
 
367
+      if(TARGET_FPU)                           \
 
368
+       {                                       \
 
369
+         builtin_define ("D_HardFloat");       \
 
370
+         builtin_define ("SPARC_HardFloat");   \
 
371
+       }                                       \
 
372
+      else                                     \
 
373
+       {                                       \
 
374
+         builtin_define ("D_SoftFloat");       \
 
375
+         builtin_define ("SPARC_SoftFloat");   \
 
376
+       }                                       \
 
377
+    }                                          \
 
378
+  while (0)
 
379
+
 
380
 /* Specify this in a cover file to provide bi-architecture (32/64) support.  */
 
381
 /* #define SPARC_BI_ARCH */
 
382