~ubuntu-branches/debian/sid/gcc-4.8/sid : revision 78

1

# DP: updates from the 4.8 branch upto 20140514 (r210436).

2

3

last_updated()

4

{

5

cat > ${dir}LAST_UPDATED <<EOF

6

Wed May 14 18:55:18 CEST 2014

7

Wed May 14 16:55:18 UTC 2014 (revision 210436)

8

EOF

9

}

10

11

LANG=C svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_8_2_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch \

12

| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \

13

| awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0'

14

15

Index: libitm/configure

16

===================================================================

17

--- a/src/libitm/configure (.../tags/gcc_4_8_2_release)

18

+++ b/src/libitm/configure (.../branches/gcc-4_8-branch)

19

@@ -7270,7 +7270,7 @@

20

rm -rf conftest*

21

;;

22

23

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

24

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

25

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

26

# Find out which ABI we are using.

27

echo 'int i;' > conftest.$ac_ext

28

@@ -7295,7 +7295,10 @@

29

;;

30

esac

31

;;

32

- ppc64-*linux*|powerpc64-*linux*)

33

+ powerpc64le-*linux*)

34

+ LD="${LD-ld} -m elf32lppclinux"

35

+ ;;

36

+ powerpc64-*linux*)

37

LD="${LD-ld} -m elf32ppclinux"

38

;;

39

s390x-*linux*)

40

@@ -7314,7 +7317,10 @@

41

x86_64-*linux*)

42

LD="${LD-ld} -m elf_x86_64"

43

;;

44

- ppc*-*linux*|powerpc*-*linux*)

45

+ powerpcle-*linux*)

46

+ LD="${LD-ld} -m elf64lppc"

47

+ ;;

48

+ powerpc-*linux*)

49

LD="${LD-ld} -m elf64ppc"

50

;;

51

s390*-*linux*|s390*-*tpf*)

52

@@ -11779,7 +11785,7 @@

53

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

54

lt_status=$lt_dlunknown

55

cat > conftest.$ac_ext <<_LT_EOF

56

-#line 11782 "configure"

57

+#line 11788 "configure"

58

#include "confdefs.h"

59

60

#if HAVE_DLFCN_H

61

@@ -11885,7 +11891,7 @@

62

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

63

lt_status=$lt_dlunknown

64

cat > conftest.$ac_ext <<_LT_EOF

65

-#line 11888 "configure"

66

+#line 11894 "configure"

67

#include "confdefs.h"

68

69

#if HAVE_DLFCN_H

70

@@ -17362,6 +17368,43 @@

71

72

fi

73

;;

74

+esac

75

+

76

+case "${target_cpu}" in

77

+powerpc*)

78

+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking if the assembler supports HTM" >&5

79

+$as_echo_n "checking if the assembler supports HTM... " >&6; }

80

+if test "${libitm_cv_as_htm+set}" = set; then :

81

+ $as_echo_n "(cached) " >&6

82

+else

83

+

84

+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext

85

+/* end confdefs.h. */

86

+

87

+int

88

+main ()

89

+{

90

+asm("tbegin. 0; tend. 0");

91

+ ;

92

+ return 0;

93

+}

94

+_ACEOF

95

+if ac_fn_c_try_compile "$LINENO"; then :

96

+ libitm_cv_as_htm=yes

97

+else

98

+ libitm_cv_as_htm=no

99

+fi

100

+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext

101

+

102

+fi

103

+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libitm_cv_as_htm" >&5

104

+$as_echo "$libitm_cv_as_htm" >&6; }

105

+ if test x$libitm_cv_as_htm = xyes; then

106

+

107

+$as_echo "#define HAVE_AS_HTM 1" >>confdefs.h

108

+

109

+ fi

110

+ ;;

111

s390*)

112

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if the assembler supports HTM" >&5

113

$as_echo_n "checking if the assembler supports HTM... " >&6; }

114

@@ -17399,7 +17442,6 @@

115

fi

116

;;

117

esac

118

-LIBITM_CHECK_AS_HTM

119

120

121

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether weak refs work like ELF" >&5

122

Index: libitm/configure.tgt

123

===================================================================

124

--- a/src/libitm/configure.tgt (.../tags/gcc_4_8_2_release)

125

+++ b/src/libitm/configure.tgt (.../branches/gcc-4_8-branch)

126

@@ -47,7 +47,10 @@

127

# work out any special compilation flags as necessary.

128

case "${target_cpu}" in

129

alpha*) ARCH=alpha ;;

130

- rs6000 | powerpc*) ARCH=powerpc ;;

131

+ rs6000 | powerpc*)

132

+ XCFLAGS="${XCFLAGS} -mhtm"

133

+ ARCH=powerpc

134

+ ;;

135

136

arm*) ARCH=arm ;;

137

138

Index: libitm/ChangeLog

139

===================================================================

140

--- a/src/libitm/ChangeLog (.../tags/gcc_4_8_2_release)

141

+++ b/src/libitm/ChangeLog (.../branches/gcc-4_8-branch)

142

@@ -1,3 +1,62 @@

143

+2014-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

144

+

145

+ * acinclude.m4: Move s390* case from RTM to HTM check.

146

+ * configure: Regenerate.

147

+

148

+2014-04-09 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

149

+

150

+ * config/generic/asmcfi.h: Also check for

151

+ __GCC_HAVE_DWARF2_CFI_ASM.

152

+

153

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

154

+

155

+ Backport from mainline r204808:

156

+

157

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

158

+

159

+ * config/powerpc/sjlj.S [__powerpc64__ && _CALL_ELF == 2]:

160

+ (FUNC): Define ELFv2 variant.

161

+ (END): Likewise.

162

+ (HIDDEN): Likewise.

163

+ (CALL): Likewise.

164

+ (BASE): Likewise.

165

+ (LR_SAVE): Likewise.

166

+

167

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

168

+

169

+ Power8 HTM Support

170

+ Backport from mainline

171

+ * acinclude.m4 (LIBITM_CHECK_AS_HTM): New.

172

+ * configure: Rebuild.

173

+ * configure.tgt (target_cpu): Add -mhtm to XCFLAGS.

174

+ * config/powerpc/target.h: Include sys/auxv.h and htmintrin.h.

175

+ (USE_HTM_FASTPATH): Define.

176

+ (_TBEGIN_STARTED, _TBEGIN_INDETERMINATE, _TBEGIN_PERSISTENT)

177

+ (_HTM_RETRIES) New macros.

178

+ (htm_abort, htm_abort_should_retry, htm_available, htm_begin, htm_init)

179

+ (htm_begin_success, htm_commit, htm_transaction_active): New functions.

180

+

181

+2014-03-26 Jakub Jelinek <jakub@redhat.com>

182

+

183

+ * config/linux/futex_bits.h: Include errno.h.

184

+ (sys_futex0): If syscall returns -1, return -errno rather than

185

+ -1.

186

+

187

+2014-03-03 Peter Bergner <bergner@vnet.ibm.com>

188

+

189

+ Backport from mainline

190

+ 2013-06-20 Torvald Riegel <triegel@redhat.com>

191

+

192

+ * query.cc (_ITM_inTransaction): Abort when using the HTM fastpath.

193

+ (_ITM_getTransactionId): Same.

194

+ * config/x86/target.h (htm_transaction_active): New.

195

+

196

+ 2013-06-20 Torvald Riegel <triegel@redhat.com>

197

+

198

+ PR libitm/57643

199

+ * beginend.cc (gtm_thread::begin_transaction): Handle reentrancy in

200

+ the HTM fastpath.

201

+

202

2013-10-16 Release Manager

203

204

* GCC 4.8.2 released.

205

@@ -8,13 +67,12 @@

206

2013-08-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

207

208

* configure.tgt: Add -msoft-float to XCFLAGS.

209

-

210

211

2013-08-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

212

213

* config/s390/sjlj.S: Add file missing from last commit.

214

* config/s390/target.h: Likewise.

215

-

216

+

217

2013-08-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

218

219

Backports from mainline:

220

Index: libitm/query.cc

221

===================================================================

222

--- a/src/libitm/query.cc (.../tags/gcc_4_8_2_release)

223

+++ b/src/libitm/query.cc (.../branches/gcc-4_8-branch)

224

@@ -43,6 +43,15 @@

225

_ITM_howExecuting ITM_REGPARM

226

_ITM_inTransaction (void)

227

{

228

+#if defined(USE_HTM_FASTPATH)

229

+ // If we use the HTM fastpath, we cannot reliably detect whether we are

230

+ // in a transaction because this function can be called outside of

231

+ // a transaction and thus we can't deduce this by looking at just the serial

232

+ // lock. This function isn't used in practice currently, so the easiest

233

+ // way to handle it is to just abort.

234

+ if (htm_fastpath && htm_transaction_active())

235

+ htm_abort();

236

+#endif

237

struct gtm_thread *tx = gtm_thr();

238

if (tx && (tx->nesting > 0))

239

{

240

@@ -58,6 +67,11 @@

241

_ITM_transactionId_t ITM_REGPARM

242

_ITM_getTransactionId (void)

243

{

244

+#if defined(USE_HTM_FASTPATH)

245

+ // See ITM_inTransaction.

246

+ if (htm_fastpath && htm_transaction_active())

247

+ htm_abort();

248

+#endif

249

struct gtm_thread *tx = gtm_thr();

250

return (tx && (tx->nesting > 0)) ? tx->id : _ITM_noTransactionId;

251

}

252

Index: libitm/beginend.cc

253

===================================================================

254

--- a/src/libitm/beginend.cc (.../tags/gcc_4_8_2_release)

255

+++ b/src/libitm/beginend.cc (.../branches/gcc-4_8-branch)

256

@@ -197,6 +197,8 @@

257

// We are executing a transaction now.

258

// Monitor the writer flag in the serial-mode lock, and abort

259

// if there is an active or waiting serial-mode transaction.

260

+ // Note that this can also happen due to an enclosing

261

+ // serial-mode transaction; we handle this case below.

262

if (unlikely(serial_lock.is_write_locked()))

263

htm_abort();

264

else

265

@@ -219,6 +221,14 @@

266

tx = new gtm_thread();

267

set_gtm_thr(tx);

268

}

269

+ // Check whether there is an enclosing serial-mode transaction;

270

+ // if so, we just continue as a nested transaction and don't

271

+ // try to use the HTM fastpath. This case can happen when an

272

+ // outermost relaxed transaction calls unsafe code that starts

273

+ // a transaction.

274

+ if (tx->nesting > 0)

275

+ break;

276

+ // Another thread is running a serial-mode transaction. Wait.

277

serial_lock.read_lock(tx);

278

serial_lock.read_unlock(tx);

279

// TODO We should probably reset the retry count t here, unless

280

Index: libitm/config/linux/futex_bits.h

281

===================================================================

282

--- a/src/libitm/config/linux/futex_bits.h (.../tags/gcc_4_8_2_release)

283

+++ b/src/libitm/config/linux/futex_bits.h (.../branches/gcc-4_8-branch)

284

@@ -31,9 +31,13 @@

285

286

#include <unistd.h>

287

#include <sys/syscall.h>

288

+#include <errno.h>

289

290

static inline long

291

sys_futex0 (std::atomic<int> *addr, long op, long val)

292

{

293

- return syscall (SYS_futex, (int*) addr, op, val, 0);

294

+ long res = syscall (SYS_futex, (int*) addr, op, val, 0);

295

+ if (__builtin_expect (res == -1, 0))

296

+ return -errno;

297

+ return res;

298

}

299

Index: libitm/config/powerpc/sjlj.S

300

===================================================================

301

--- a/src/libitm/config/powerpc/sjlj.S (.../tags/gcc_4_8_2_release)

302

+++ b/src/libitm/config/powerpc/sjlj.S (.../branches/gcc-4_8-branch)

303

@@ -26,8 +26,27 @@

304

305

#include "asmcfi.h"

306

307

-#if defined(__powerpc64__) && defined(__ELF__)

308

+#if defined(__powerpc64__) && _CALL_ELF == 2

309

.macro FUNC name

310

+ .globl \name

311

+ .type \name, @function

312

+\name:

313

+0: addis 2,12,(.TOC.-0b)@ha

314

+ addi 2,2,(.TOC.-0b)@l

315

+ .localentry \name, . - \name

316

+.endm

317

+.macro END name

318

+ .size \name, . - \name

319

+.endm

320

+.macro HIDDEN name

321

+ .hidden \name

322

+.endm

323

+.macro CALL name

324

+ bl \name

325

+ nop

326

+.endm

327

+#elif defined(__powerpc64__) && defined(__ELF__)

328

+.macro FUNC name

329

.globl \name, .\name

330

.section ".opd","aw"

331

.align 3

332

@@ -117,6 +136,9 @@

333

#if defined(_CALL_AIXDESC)

334

# define BASE 6*WS

335

# define LR_SAVE 2*WS

336

+#elif _CALL_ELF == 2

337

+# define BASE 6*WS

338

+# define LR_SAVE 2*WS

339

#elif defined(_CALL_SYSV)

340

# define BASE 2*WS

341

# define LR_SAVE 1*WS

342

Index: libitm/config/powerpc/target.h

343

===================================================================

344

--- a/src/libitm/config/powerpc/target.h (.../tags/gcc_4_8_2_release)

345

+++ b/src/libitm/config/powerpc/target.h (.../branches/gcc-4_8-branch)

346

@@ -22,6 +22,10 @@

347

see the files COPYING3 and COPYING.RUNTIME respectively. If not, see

348

<http://www.gnu.org/licenses/>. */

349

350

+#ifdef HAVE_SYS_AUXV_H

351

+#include <sys/auxv.h>

352

+#endif

353

+

354

namespace GTM HIDDEN {

355

356

typedef int v128 __attribute__((vector_size(16), may_alias, aligned(16)));

357

@@ -55,4 +59,82 @@

358

__asm volatile ("" : : : "memory");

359

}

360

361

+// Use HTM if it is supported by the system.

362

+// See gtm_thread::begin_transaction for how these functions are used.

363

+#if defined (__linux__) \

364

+ && defined (HAVE_AS_HTM) \

365

+ && defined (HAVE_GETAUXVAL) \

366

+ && defined (AT_HWCAP2) \

367

+ && defined (PPC_FEATURE2_HAS_HTM)

368

+

369

+#include <htmintrin.h>

370

+

371

+#define USE_HTM_FASTPATH

372

+

373

+#define _TBEGIN_STARTED 0

374

+#define _TBEGIN_INDETERMINATE 1

375

+#define _TBEGIN_PERSISTENT 2

376

+

377

+/* Number of retries for transient failures. */

378

+#define _HTM_RETRIES 10

379

+

380

+static inline bool

381

+htm_available (void)

382

+{

383

+ return (getauxval (AT_HWCAP2) & PPC_FEATURE2_HAS_HTM) ? true : false;

384

+}

385

+

386

+static inline uint32_t

387

+htm_init (void)

388

+{

389

+ // Maximum number of times we try to execute a transaction

390

+ // as a HW transaction.

391

+ return htm_available () ? _HTM_RETRIES : 0;

392

+}

393

+

394

+static inline uint32_t

395

+htm_begin (void)

396

+{

397

+ if (__builtin_expect (__builtin_tbegin (0), 1))

398

+ return _TBEGIN_STARTED;

399

+

400

+ if (_TEXASRU_FAILURE_PERSISTENT (__builtin_get_texasru ()))

401

+ return _TBEGIN_PERSISTENT;

402

+

403

+ return _TBEGIN_INDETERMINATE;

404

+}

405

+

406

+static inline bool

407

+htm_begin_success (uint32_t begin_ret)

408

+{

409

+ return begin_ret == _TBEGIN_STARTED;

410

+}

411

+

412

+static inline void

413

+htm_commit (void)

414

+{

415

+ __builtin_tend (0);

416

+}

417

+

418

+static inline void

419

+htm_abort (void)

420

+{

421

+ __builtin_tabort (0);

422

+}

423

+

424

+static inline bool

425

+htm_abort_should_retry (uint32_t begin_ret)

426

+{

427

+ return begin_ret != _TBEGIN_PERSISTENT;

428

+}

429

+

430

+/* Returns true iff a hardware transaction is currently being executed. */

431

+static inline bool

432

+htm_transaction_active (void)

433

+{

434

+ return (_HTM_STATE (__builtin_ttest ()) == _HTM_TRANSACTIONAL);

435

+}

436

+

437

+#endif

438

+

439

} // namespace GTM

440

Index: libitm/config/x86/target.h

441

===================================================================

442

--- a/src/libitm/config/x86/target.h (.../tags/gcc_4_8_2_release)

443

+++ b/src/libitm/config/x86/target.h (.../branches/gcc-4_8-branch)

444

@@ -125,6 +125,13 @@

445

{

446

return begin_ret & _XABORT_RETRY;

447

}

448

+

449

+/* Returns true iff a hardware transaction is currently being executed. */

450

+static inline bool

451

+htm_transaction_active ()

452

+{

453

+ return _xtest() != 0;

454

+}

455

#endif

456

457

458

Index: libitm/config/generic/asmcfi.h

459

===================================================================

460

--- a/src/libitm/config/generic/asmcfi.h (.../tags/gcc_4_8_2_release)

461

+++ b/src/libitm/config/generic/asmcfi.h (.../branches/gcc-4_8-branch)

462

@@ -24,7 +24,7 @@

463

464

#include "config.h"

465

466

-#ifdef HAVE_AS_CFI_PSEUDO_OP

467

+#if defined(HAVE_AS_CFI_PSEUDO_OP) && defined(__GCC_HAVE_DWARF2_CFI_ASM)

468

469

#define cfi_startproc .cfi_startproc

470

#define cfi_endproc .cfi_endproc

471

@@ -50,4 +50,4 @@

472

#define cfi_restore(r)

473

#define cfi_undefined(r)

474

475

-#endif /* HAVE_AS_CFI_PSEUDO_OP */

476

+#endif /* HAVE_AS_CFI_PSEUDO_OP && __GCC_HAVE_DWARF2_CFI_ASM */

477

Index: libitm/acinclude.m4

478

===================================================================

479

--- a/src/libitm/acinclude.m4 (.../tags/gcc_4_8_2_release)

480

+++ b/src/libitm/acinclude.m4 (.../branches/gcc-4_8-branch)

481

@@ -121,12 +121,26 @@

482

AC_DEFINE(HAVE_AS_RTM, 1, [Define to 1 if the assembler supports RTM.])

483

fi

484

;;

485

+esac])

486

+

487

+dnl Check if as supports HTM instructions.

488

+AC_DEFUN([LIBITM_CHECK_AS_HTM], [

489

+case "${target_cpu}" in

490

+powerpc*)

491

+ AC_CACHE_CHECK([if the assembler supports HTM], libitm_cv_as_htm, [

492

+ AC_TRY_COMPILE([], [asm("tbegin. 0; tend. 0");],

493

+ [libitm_cv_as_htm=yes], [libitm_cv_as_htm=no])

494

+ ])

495

+ if test x$libitm_cv_as_htm = xyes; then

496

+ AC_DEFINE(HAVE_AS_HTM, 1, [Define to 1 if the assembler supports HTM.])

497

+ fi

498

+ ;;

499

s390*)

500

AC_CACHE_CHECK([if the assembler supports HTM], libitm_cv_as_htm, [

501

save_CFLAGS="$CFLAGS"

502

CFLAGS="$CFLAGS -march=zEC12"

503

AC_TRY_COMPILE([], [asm("tbegin 0,0; tend");],

504

- [libitm_cv_as_htm=yes], [libitm_cv_as_htm=no])

505

+ [libitm_cv_as_htm=yes], [libitm_cv_as_htm=no])

506

CFLAGS="$save_CFLAGS"])

507

if test x$libitm_cv_as_htm = xyes; then

508

AC_DEFINE(HAVE_AS_HTM, 1, [Define to 1 if the assembler supports HTM.])

509

Index: libtool.m4

510

===================================================================

511

--- a/src/libtool.m4 (.../tags/gcc_4_8_2_release)

512

+++ b/src/libtool.m4 (.../branches/gcc-4_8-branch)

513

@@ -1220,7 +1220,7 @@

514

rm -rf conftest*

515

;;

516

517

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

518

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

519

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

520

# Find out which ABI we are using.

521

echo 'int i;' > conftest.$ac_ext

522

@@ -1241,7 +1241,10 @@

523

;;

524

esac

525

;;

526

- ppc64-*linux*|powerpc64-*linux*)

527

+ powerpc64le-*linux*)

528

+ LD="${LD-ld} -m elf32lppclinux"

529

+ ;;

530

+ powerpc64-*linux*)

531

LD="${LD-ld} -m elf32ppclinux"

532

;;

533

s390x-*linux*)

534

@@ -1260,7 +1263,10 @@

535

x86_64-*linux*)

536

LD="${LD-ld} -m elf_x86_64"

537

;;

538

- ppc*-*linux*|powerpc*-*linux*)

539

+ powerpcle-*linux*)

540

+ LD="${LD-ld} -m elf64lppc"

541

+ ;;

542

+ powerpc-*linux*)

543

LD="${LD-ld} -m elf64ppc"

544

;;

545

s390*-*linux*|s390*-*tpf*)

546

Index: libgomp/configure

547

===================================================================

548

--- a/src/libgomp/configure (.../tags/gcc_4_8_2_release)

549

+++ b/src/libgomp/configure (.../branches/gcc-4_8-branch)

550

@@ -6580,7 +6580,7 @@

551

rm -rf conftest*

552

;;

553

554

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

555

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

556

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

557

# Find out which ABI we are using.

558

echo 'int i;' > conftest.$ac_ext

559

@@ -6605,7 +6605,10 @@

560

;;

561

esac

562

;;

563

- ppc64-*linux*|powerpc64-*linux*)

564

+ powerpc64le-*linux*)

565

+ LD="${LD-ld} -m elf32lppclinux"

566

+ ;;

567

+ powerpc64-*linux*)

568

LD="${LD-ld} -m elf32ppclinux"

569

;;

570

s390x-*linux*)

571

@@ -6624,7 +6627,10 @@

572

x86_64-*linux*)

573

LD="${LD-ld} -m elf_x86_64"

574

;;

575

- ppc*-*linux*|powerpc*-*linux*)

576

+ powerpcle-*linux*)

577

+ LD="${LD-ld} -m elf64lppc"

578

+ ;;

579

+ powerpc-*linux*)

580

LD="${LD-ld} -m elf64ppc"

581

;;

582

s390*-*linux*|s390*-*tpf*)

583

@@ -11088,7 +11094,7 @@

584

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

585

lt_status=$lt_dlunknown

586

cat > conftest.$ac_ext <<_LT_EOF

587

-#line 11091 "configure"

588

+#line 11097 "configure"

589

#include "confdefs.h"

590

591

#if HAVE_DLFCN_H

592

@@ -11194,7 +11200,7 @@

593

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

594

lt_status=$lt_dlunknown

595

cat > conftest.$ac_ext <<_LT_EOF

596

-#line 11197 "configure"

597

+#line 11203 "configure"

598

#include "confdefs.h"

599

600

#if HAVE_DLFCN_H

601

Index: libgomp/ChangeLog

602

===================================================================

603

--- a/src/libgomp/ChangeLog (.../tags/gcc_4_8_2_release)

604

+++ b/src/libgomp/ChangeLog (.../branches/gcc-4_8-branch)

605

@@ -1,3 +1,21 @@

606

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

607

+

608

+ Backport from mainline

609

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

610

+

611

+ * configure: Regenerate.

612

+

613

+2014-04-02 Richard Henderson <rth@redhat.com>

614

+

615

+ * config/linux/futex.h (futex_wait): Get error value from errno.

616

+ (futex_wake): Likewise.

617

+

618

+2013-12-12 Jakub Jelinek <jakub@redhat.com>

619

+

620

+ PR libgomp/59467

621

+ * testsuite/libgomp.fortran/crayptr2.f90: Add private (d) clause to

622

+ !$omp parallel.

623

+

624

2013-10-16 Release Manager

625

626

* GCC 4.8.2 released.

627

Index: libgomp/testsuite/libgomp.fortran/crayptr2.f90

628

===================================================================

629

--- a/src/libgomp/testsuite/libgomp.fortran/crayptr2.f90 (.../tags/gcc_4_8_2_release)

630

+++ b/src/libgomp/testsuite/libgomp.fortran/crayptr2.f90 (.../branches/gcc-4_8-branch)

631

@@ -12,7 +12,7 @@

632

b = 2

633

c = 3

634

l = .false.

635

-!$omp parallel num_threads (3) reduction (.or.:l)

636

+!$omp parallel num_threads (3) reduction (.or.:l) private (d)

637

if (omp_get_thread_num () .eq. 0) then

638

ip = loc (a)

639

elseif (omp_get_thread_num () .eq. 1) then

640

Index: libgomp/config/linux/futex.h

641

===================================================================

642

--- a/src/libgomp/config/linux/futex.h (.../tags/gcc_4_8_2_release)

643

+++ b/src/libgomp/config/linux/futex.h (.../branches/gcc-4_8-branch)

644

@@ -41,8 +41,8 @@

645

static inline void

646

futex_wait (int *addr, int val)

647

{

648

- long err = syscall (SYS_futex, addr, gomp_futex_wait, val, NULL);

649

- if (__builtin_expect (err == -ENOSYS, 0))

650

+ int err = syscall (SYS_futex, addr, gomp_futex_wait, val, NULL);

651

+ if (__builtin_expect (err < 0 && errno == ENOSYS, 0))

652

{

653

gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;

654

gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;

655

@@ -53,8 +53,8 @@

656

static inline void

657

futex_wake (int *addr, int count)

658

{

659

- long err = syscall (SYS_futex, addr, gomp_futex_wake, count);

660

- if (__builtin_expect (err == -ENOSYS, 0))

661

+ int err = syscall (SYS_futex, addr, gomp_futex_wake, count);

662

+ if (__builtin_expect (err < 0 && errno == ENOSYS, 0))

663

{

664

gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;

665

gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;

666

Index: libquadmath/configure

667

===================================================================

668

--- a/src/libquadmath/configure (.../tags/gcc_4_8_2_release)

669

+++ b/src/libquadmath/configure (.../branches/gcc-4_8-branch)

670

@@ -6248,7 +6248,7 @@

671

rm -rf conftest*

672

;;

673

674

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

675

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

676

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

677

# Find out which ABI we are using.

678

echo 'int i;' > conftest.$ac_ext

679

@@ -6273,7 +6273,10 @@

680

;;

681

esac

682

;;

683

- ppc64-*linux*|powerpc64-*linux*)

684

+ powerpc64le-*linux*)

685

+ LD="${LD-ld} -m elf32lppclinux"

686

+ ;;

687

+ powerpc64-*linux*)

688

LD="${LD-ld} -m elf32ppclinux"

689

;;

690

s390x-*linux*)

691

@@ -6292,7 +6295,10 @@

692

x86_64-*linux*)

693

LD="${LD-ld} -m elf_x86_64"

694

;;

695

- ppc*-*linux*|powerpc*-*linux*)

696

+ powerpcle-*linux*)

697

+ LD="${LD-ld} -m elf64lppc"

698

+ ;;

699

+ powerpc-*linux*)

700

LD="${LD-ld} -m elf64ppc"

701

;;

702

s390*-*linux*|s390*-*tpf*)

703

@@ -10521,7 +10527,7 @@

704

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

705

lt_status=$lt_dlunknown

706

cat > conftest.$ac_ext <<_LT_EOF

707

-#line 10524 "configure"

708

+#line 10530 "configure"

709

#include "confdefs.h"

710

711

#if HAVE_DLFCN_H

712

@@ -10627,7 +10633,7 @@

713

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

714

lt_status=$lt_dlunknown

715

cat > conftest.$ac_ext <<_LT_EOF

716

-#line 10630 "configure"

717

+#line 10636 "configure"

718

#include "confdefs.h"

719

720

#if HAVE_DLFCN_H

721

Index: libquadmath/ChangeLog

722

===================================================================

723

--- a/src/libquadmath/ChangeLog (.../tags/gcc_4_8_2_release)

724

+++ b/src/libquadmath/ChangeLog (.../branches/gcc-4_8-branch)

725

@@ -1,3 +1,10 @@

726

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

727

+

728

+ Backport from mainline

729

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

730

+

731

+ * configure: Regenerate.

732

+

733

2013-10-16 Release Manager

734

735

* GCC 4.8.2 released.

736

Index: libsanitizer/configure

737

===================================================================

738

--- a/src/libsanitizer/configure (.../tags/gcc_4_8_2_release)

739

+++ b/src/libsanitizer/configure (.../branches/gcc-4_8-branch)

740

@@ -6604,7 +6604,7 @@

741

rm -rf conftest*

742

;;

743

744

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

745

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

746

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

747

# Find out which ABI we are using.

748

echo 'int i;' > conftest.$ac_ext

749

@@ -6629,7 +6629,10 @@

750

;;

751

esac

752

;;

753

- ppc64-*linux*|powerpc64-*linux*)

754

+ powerpc64le-*linux*)

755

+ LD="${LD-ld} -m elf32lppclinux"

756

+ ;;

757

+ powerpc64-*linux*)

758

LD="${LD-ld} -m elf32ppclinux"

759

;;

760

s390x-*linux*)

761

@@ -6648,7 +6651,10 @@

762

x86_64-*linux*)

763

LD="${LD-ld} -m elf_x86_64"

764

;;

765

- ppc*-*linux*|powerpc*-*linux*)

766

+ powerpcle-*linux*)

767

+ LD="${LD-ld} -m elf64lppc"

768

+ ;;

769

+ powerpc-*linux*)

770

LD="${LD-ld} -m elf64ppc"

771

;;

772

s390*-*linux*|s390*-*tpf*)

773

@@ -11111,7 +11117,7 @@

774

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

775

lt_status=$lt_dlunknown

776

cat > conftest.$ac_ext <<_LT_EOF

777

-#line 11114 "configure"

778

+#line 11120 "configure"

779

#include "confdefs.h"

780

781

#if HAVE_DLFCN_H

782

@@ -11217,7 +11223,7 @@

783

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

784

lt_status=$lt_dlunknown

785

cat > conftest.$ac_ext <<_LT_EOF

786

-#line 11220 "configure"

787

+#line 11226 "configure"

788

#include "confdefs.h"

789

790

#if HAVE_DLFCN_H

791

Index: libsanitizer/ChangeLog

792

===================================================================

793

--- a/src/libsanitizer/ChangeLog (.../tags/gcc_4_8_2_release)

794

+++ b/src/libsanitizer/ChangeLog (.../branches/gcc-4_8-branch)

795

@@ -1,3 +1,17 @@

796

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

797

+

798

+ Backport from mainline r208290

799

+ 2014-03-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

800

+

801

+ * configure.tgt: Unsupported for little endian PowerPC for now.

802

+

803

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

804

+

805

+ Backport from mainline

806

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

807

+

808

+ * configure: Regenerate.

809

+

810

2013-10-16 Release Manager

811

812

* GCC 4.8.2 released.

813

Index: libsanitizer/configure.tgt

814

===================================================================

815

--- a/src/libsanitizer/configure.tgt (.../tags/gcc_4_8_2_release)

816

+++ b/src/libsanitizer/configure.tgt (.../branches/gcc-4_8-branch)

817

@@ -25,6 +25,9 @@

818

TSAN_SUPPORTED=yes

819

fi

820

;;

821

+ powerpc*le-*-linux*)

822

+ UNSUPPORTED=1

823

+ ;;

824

powerpc*-*-linux*)

825

;;

826

sparc*-*-linux*)

827

Index: zlib/configure

828

===================================================================

829

--- a/src/zlib/configure (.../tags/gcc_4_8_2_release)

830

+++ b/src/zlib/configure (.../branches/gcc-4_8-branch)

831

@@ -5853,7 +5853,7 @@

832

rm -rf conftest*

833

;;

834

835

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

836

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

837

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

838

# Find out which ABI we are using.

839

echo 'int i;' > conftest.$ac_ext

840

@@ -5878,7 +5878,10 @@

841

;;

842

esac

843

;;

844

- ppc64-*linux*|powerpc64-*linux*)

845

+ powerpc64le-*linux*)

846

+ LD="${LD-ld} -m elf32lppclinux"

847

+ ;;

848

+ powerpc64-*linux*)

849

LD="${LD-ld} -m elf32ppclinux"

850

;;

851

s390x-*linux*)

852

@@ -5897,7 +5900,10 @@

853

x86_64-*linux*)

854

LD="${LD-ld} -m elf_x86_64"

855

;;

856

- ppc*-*linux*|powerpc*-*linux*)

857

+ powerpcle-*linux*)

858

+ LD="${LD-ld} -m elf64lppc"

859

+ ;;

860

+ powerpc-*linux*)

861

LD="${LD-ld} -m elf64ppc"

862

;;

863

s390*-*linux*|s390*-*tpf*)

864

@@ -10394,7 +10400,7 @@

865

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

866

lt_status=$lt_dlunknown

867

cat > conftest.$ac_ext <<_LT_EOF

868

-#line 10397 "configure"

869

+#line 10403 "configure"

870

#include "confdefs.h"

871

872

#if HAVE_DLFCN_H

873

@@ -10500,7 +10506,7 @@

874

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

875

lt_status=$lt_dlunknown

876

cat > conftest.$ac_ext <<_LT_EOF

877

-#line 10503 "configure"

878

+#line 10509 "configure"

879

#include "confdefs.h"

880

881

#if HAVE_DLFCN_H

882

Index: zlib/ChangeLog

883

===================================================================

884

--- a/src/zlib/ChangeLog (.../tags/gcc_4_8_2_release)

885

+++ b/src/zlib/ChangeLog (.../branches/gcc-4_8-branch)

886

@@ -1,3 +1,10 @@

887

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

888

+

889

+ Backport from mainline

890

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

891

+

892

+ * configure: Regenerate.

893

+

894

2013-10-16 Release Manager

895

896

* GCC 4.8.2 released.

897

Index: libstdc++-v3/configure

898

===================================================================

899

--- a/src/libstdc++-v3/configure (.../tags/gcc_4_8_2_release)

900

+++ b/src/libstdc++-v3/configure (.../branches/gcc-4_8-branch)

901

@@ -7111,7 +7111,7 @@

902

rm -rf conftest*

903

;;

904

905

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

906

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

907

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

908

# Find out which ABI we are using.

909

echo 'int i;' > conftest.$ac_ext

910

@@ -7136,7 +7136,10 @@

911

;;

912

esac

913

;;

914

- ppc64-*linux*|powerpc64-*linux*)

915

+ powerpc64le-*linux*)

916

+ LD="${LD-ld} -m elf32lppclinux"

917

+ ;;

918

+ powerpc64-*linux*)

919

LD="${LD-ld} -m elf32ppclinux"

920

;;

921

s390x-*linux*)

922

@@ -7155,7 +7158,10 @@

923

x86_64-*linux*)

924

LD="${LD-ld} -m elf_x86_64"

925

;;

926

- ppc*-*linux*|powerpc*-*linux*)

927

+ powerpcle-*linux*)

928

+ LD="${LD-ld} -m elf64lppc"

929

+ ;;

930

+ powerpc-*linux*)

931

LD="${LD-ld} -m elf64ppc"

932

;;

933

s390*-*linux*|s390*-*tpf*)

934

@@ -11513,7 +11519,7 @@

935

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

936

lt_status=$lt_dlunknown

937

cat > conftest.$ac_ext <<_LT_EOF

938

-#line 11516 "configure"

939

+#line 11522 "configure"

940

#include "confdefs.h"

941

942

#if HAVE_DLFCN_H

943

@@ -11619,7 +11625,7 @@

944

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

945

lt_status=$lt_dlunknown

946

cat > conftest.$ac_ext <<_LT_EOF

947

-#line 11622 "configure"

948

+#line 11628 "configure"

949

#include "confdefs.h"

950

951

#if HAVE_DLFCN_H

952

@@ -15033,7 +15039,7 @@

953

#

954

# Fake what AC_TRY_COMPILE does. XXX Look at redoing this new-style.

955

cat > conftest.$ac_ext << EOF

956

-#line 15036 "configure"

957

+#line 15042 "configure"

958

struct S { ~S(); };

959

void bar();

960

void foo()

961

@@ -15383,7 +15389,7 @@

962

# Fake what AC_TRY_COMPILE does.

963

964

cat > conftest.$ac_ext << EOF

965

-#line 15386 "configure"

966

+#line 15392 "configure"

967

int main()

968

{

969

typedef bool atomic_type;

970

@@ -15418,7 +15424,7 @@

971

rm -f conftest*

972

973

cat > conftest.$ac_ext << EOF

974

-#line 15421 "configure"

975

+#line 15427 "configure"

976

int main()

977

{

978

typedef short atomic_type;

979

@@ -15453,7 +15459,7 @@

980

rm -f conftest*

981

982

cat > conftest.$ac_ext << EOF

983

-#line 15456 "configure"

984

+#line 15462 "configure"

985

int main()

986

{

987

// NB: _Atomic_word not necessarily int.

988

@@ -15489,7 +15495,7 @@

989

rm -f conftest*

990

991

cat > conftest.$ac_ext << EOF

992

-#line 15492 "configure"

993

+#line 15498 "configure"

994

int main()

995

{

996

typedef long long atomic_type;

997

@@ -15568,7 +15574,7 @@

998

# unnecessary for this test.

999

1000

cat > conftest.$ac_ext << EOF

1001

-#line 15571 "configure"

1002

+#line 15577 "configure"

1003

int main()

1004

{

1005

_Decimal32 d1;

1006

@@ -15610,7 +15616,7 @@

1007

# unnecessary for this test.

1008

1009

cat > conftest.$ac_ext << EOF

1010

-#line 15613 "configure"

1011

+#line 15619 "configure"

1012

template<typename T1, typename T2>

1013

struct same

1014

{ typedef T2 type; };

1015

@@ -15644,7 +15650,7 @@

1016

rm -f conftest*

1017

1018

cat > conftest.$ac_ext << EOF

1019

-#line 15647 "configure"

1020

+#line 15653 "configure"

1021

template<typename T1, typename T2>

1022

struct same

1023

{ typedef T2 type; };

1024

@@ -71573,7 +71579,7 @@

1025

fi

1026

1027

# For libtool versioning info, format is CURRENT:REVISION:AGE

1028

-libtool_VERSION=6:18:0

1029

+libtool_VERSION=6:19:0

1030

1031

# Everything parsed; figure out what files and settings to use.

1032

case $enable_symvers in

1033

Index: libstdc++-v3/scripts/extract_symvers.in

1034

===================================================================

1035

--- a/src/libstdc++-v3/scripts/extract_symvers.in (.../tags/gcc_4_8_2_release)

1036

+++ b/src/libstdc++-v3/scripts/extract_symvers.in (.../branches/gcc-4_8-branch)

1037

@@ -53,6 +53,7 @@

1038

# present on Solaris.

1039

${readelf} ${lib} |\

1040

sed -e 's/ \[<other>: [A-Fa-f0-9]*\] //' -e '/\.dynsym/,/^$/p;d' |\

1041

+ sed -e 's/ \[<localentry>: [0-9]*\] //' |\

1042

egrep -v ' (LOCAL|UND) ' |\

1043

1044

sed -e 's/ <processor specific>: / <processor_specific>:_/g' |\

1045

Index: libstdc++-v3/src/c++98/ios_init.cc

1046

===================================================================

1047

--- a/src/libstdc++-v3/src/c++98/ios_init.cc (.../tags/gcc_4_8_2_release)

1048

+++ b/src/libstdc++-v3/src/c++98/ios_init.cc (.../branches/gcc-4_8-branch)

1049

@@ -37,7 +37,7 @@

1050

{

1051

using namespace __gnu_cxx;

1052

1053

- // Extern declarations for global objects in src/globals.cc.

1054

+ // Extern declarations for global objects in src/c++98/globals.cc.

1055

extern stdio_sync_filebuf<char> buf_cout_sync;

1056

extern stdio_sync_filebuf<char> buf_cin_sync;

1057

extern stdio_sync_filebuf<char> buf_cerr_sync;

1058

Index: libstdc++-v3/src/c++11/thread.cc

1059

===================================================================

1060

--- a/src/libstdc++-v3/src/c++11/thread.cc (.../tags/gcc_4_8_2_release)

1061

+++ b/src/libstdc++-v3/src/c++11/thread.cc (.../branches/gcc-4_8-branch)

1062

@@ -183,7 +183,7 @@

1063

::usleep(__us);

1064

}

1065

# else

1066

- ::sleep(__s.count() + (__ns >= 1000000));

1067

+ ::sleep(__s.count() + (__ns.count() >= 1000000));

1068

# endif

1069

#elif defined(_GLIBCXX_HAVE_WIN32_SLEEP)

1070

unsigned long ms = __ns.count() / 1000000;

1071

Index: libstdc++-v3/doc/xml/faq.xml

1072

===================================================================

1073

--- a/src/libstdc++-v3/doc/xml/faq.xml (.../tags/gcc_4_8_2_release)

1074

+++ b/src/libstdc++-v3/doc/xml/faq.xml (.../branches/gcc-4_8-branch)

1075

@@ -241,7 +241,7 @@

1076

</question>

1077

1078

<para>

1079

- None. We encourage such programs to be released as open source,

1080

+ None. We encourage such programs to be released as free software,

1081

but we won't punish you or sue you if you choose otherwise.

1082

</para>

1083

</answer>

1084

Index: libstdc++-v3/doc/xml/manual/abi.xml

1085

===================================================================

1086

--- a/src/libstdc++-v3/doc/xml/manual/abi.xml (.../tags/gcc_4_8_2_release)

1087

+++ b/src/libstdc++-v3/doc/xml/manual/abi.xml (.../branches/gcc-4_8-branch)

1088

@@ -203,6 +203,7 @@

1089

1090

1091

1092

+ <listitem><para>GCC 4.8.0: GCC_4.8.0</para></listitem>

1093

</itemizedlist>

1094

</listitem>

1095

1096

@@ -261,6 +262,7 @@

1097

<listitem><para>GCC 4.6.1: libstdc++.so.6.0.16</para></listitem>

1098

<listitem><para>GCC 4.7.0: libstdc++.so.6.0.17</para></listitem>

1099

<listitem><para>GCC 4.8.0: libstdc++.so.6.0.18</para></listitem>

1100

+ <listitem><para>GCC 4.8.3: libstdc++.so.6.0.19</para></listitem>

1101

</itemizedlist>

1102

<para>

1103

Note 1: Error should be libstdc++.so.3.0.3.

1104

@@ -324,6 +326,7 @@

1105

<listitem><para>GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5</para></listitem>

1106

<listitem><para>GCC 4.7.0: GLIBCXX_3.4.17, CXXABI_1.3.6</para></listitem>

1107

<listitem><para>GCC 4.8.0: GLIBCXX_3.4.18, CXXABI_1.3.7</para></listitem>

1108

+ <listitem><para>GCC 4.8.3: GLIBCXX_3.4.19, CXXABI_1.3.7</para></listitem>

1109

</itemizedlist>

1110

</listitem>

1111

1112

Index: libstdc++-v3/doc/xml/manual/status_cxx2011.xml

1113

===================================================================

1114

--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml (.../tags/gcc_4_8_2_release)

1115

+++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml (.../branches/gcc-4_8-branch)

1116

@@ -877,10 +877,11 @@

1117

1118

</row>

1119

<row>

1120

+ <?dbhtml bgcolor="#B0B0B0" ?>

1121

1122

<entry>Other transformations</entry>

1123

- <entry>Y</entry>

1124

- <entry/>

1125

+ <entry>Partial</entry>

1126

+ <entry>Missing <code>aligned_union</code>.</entry>

1127

</row>

1128

<row>

1129

1130

Index: libstdc++-v3/doc/xml/manual/spine.xml

1131

===================================================================

1132

--- a/src/libstdc++-v3/doc/xml/manual/spine.xml (.../tags/gcc_4_8_2_release)

1133

+++ b/src/libstdc++-v3/doc/xml/manual/spine.xml (.../branches/gcc-4_8-branch)

1134

@@ -20,6 +20,7 @@

1135

1136

1137

1138

+ <year>2013</year>

1139

1140

1141

</holder>

1142

Index: libstdc++-v3/doc/html/bk02.html

1143

===================================================================

1144

--- a/src/libstdc++-v3/doc/html/bk02.html (.../tags/gcc_4_8_2_release)

1145

+++ b/src/libstdc++-v3/doc/html/bk02.html (.../branches/gcc-4_8-branch)

1146

@@ -1,2 +1,2 @@

1147

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1148

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library" /><link rel="prev" href="manual/backwards.html" title="Backwards Compatibility" /><link rel="next" href="api.html" title="The GNU C++ Library API Reference" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="article"><a href="api.html">The GNU C++ Library API Reference</a></span></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Backwards Compatibility </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> The GNU C++ Library API Reference</td></tr></table></div></body></html>

1149

\ No newline at end of file

1150

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library" /><link rel="prev" href="manual/backwards.html" title="Backwards Compatibility" /><link rel="next" href="api.html" title="The GNU C++ Library API Reference" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="article"><a href="api.html">The GNU C++ Library API Reference</a></span></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Backwards Compatibility </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> The GNU C++ Library API Reference</td></tr></table></div></body></html>

1151

\ No newline at end of file

1152

Index: libstdc++-v3/doc/html/bk03.html

1153

===================================================================

1154

--- a/src/libstdc++-v3/doc/html/bk03.html (.../tags/gcc_4_8_2_release)

1155

+++ b/src/libstdc++-v3/doc/html/bk03.html (.../branches/gcc-4_8-branch)

1156

@@ -1,2 +1,2 @@

1157

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1158

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library" /><link rel="prev" href="api.html" title="The GNU C++ Library API Reference" /><link rel="next" href="faq.html" title="Frequently Asked Questions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="article"><a href="faq.html">Frequently Asked Questions</a></span></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library API Reference </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> Frequently Asked Questions</td></tr></table></div></body></html>

1159

\ No newline at end of file

1160

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library" /><link rel="prev" href="api.html" title="The GNU C++ Library API Reference" /><link rel="next" href="faq.html" title="Frequently Asked Questions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="article"><a href="faq.html">Frequently Asked Questions</a></span></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library API Reference </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> Frequently Asked Questions</td></tr></table></div></body></html>

1161

\ No newline at end of file

1162

Index: libstdc++-v3/doc/html/faq.html

1163

===================================================================

1164

--- a/src/libstdc++-v3/doc/html/faq.html (.../tags/gcc_4_8_2_release)

1165

+++ b/src/libstdc++-v3/doc/html/faq.html (.../branches/gcc-4_8-branch)

1166

@@ -1,9 +1,9 @@

1167

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1168

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Frequently Asked Questions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="bk03.html" title="" /><link rel="prev" href="bk03.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Frequently Asked Questions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bk03.html">Prev</a> </td><th width="60%" align="center"></th><td width="20%" align="right"> </td></tr></table><hr /></div><div class="article"><div class="titlepage"><div><div><h1 class="title"><a id="faq"></a>Frequently Asked Questions</h1></div><div><p class="copyright">Copyright ©

1169

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Frequently Asked Questions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="bk03.html" title="" /><link rel="prev" href="bk03.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Frequently Asked Questions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bk03.html">Prev</a> </td><th width="60%" align="center"></th><td width="20%" align="right"> </td></tr></table><hr /></div><div class="article"><div class="titlepage"><div><div><h1 class="title"><a id="faq"></a>Frequently Asked Questions</h1></div><div><p class="copyright">Copyright ©

1170

2008, 2010

1171

1172

1173

- </p></div></div><hr /></div><div class="qandaset"><a id="idp1581728"></a><dl><dt></dt><dd><dl><dt>1.1. <a href="faq.html#faq.what">

1174

+ </p></div></div><hr /></div><div class="qandaset"><a id="idm270011560848"></a><dl><dt></dt><dd><dl><dt>1.1. <a href="faq.html#faq.what">

1175

What is libstdc++?

1176

</a></dt><dt>1.2. <a href="faq.html#faq.why">

1177

Why should I use libstdc++?

1178

@@ -223,7 +223,7 @@

1179

</p></td></tr><tr class="question"><td align="left" valign="top"><a id="faq.license.what_restrictions"></a><a id="q-license.what_restrictions"></a><p><strong>2.4.</strong></p></td><td align="left" valign="top"><p>

1180

I see. So, what restrictions are there on programs that use the library?

1181

</p></td></tr><tr class="answer"><td align="left" valign="top"><a id="a-license.what_restrictions"></a></td><td align="left" valign="top"><p>

1182

- None. We encourage such programs to be released as open source,

1183

+ None. We encourage such programs to be released as free software,

1184

but we won't punish you or sue you if you choose otherwise.

1185

</p></td></tr><tr class="toc"><td align="left" valign="top" colspan="2"><dl><dt>3.1. <a href="faq.html#faq.how_to_install">How do I install libstdc++?

1186

</a></dt><dt>3.2. <a href="faq.html#faq.how_to_get_sources">How does one get current libstdc++ sources?

1187

Index: libstdc++-v3/doc/html/index.html

1188

===================================================================

1189

--- a/src/libstdc++-v3/doc/html/index.html (.../tags/gcc_4_8_2_release)

1190

+++ b/src/libstdc++-v3/doc/html/index.html (.../branches/gcc-4_8-branch)

1191

@@ -1,5 +1,5 @@

1192

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1193

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="description" content="Short Contents Copyright (C) 2008-2013 FSF Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts. This is the top level of the libstdc++ documentation set. The documentation is divided into the following three sections. Manual Frequently Asked Questions API and Source Documentation" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="next" href="manual/index.html" title="The GNU C++ Library Manual" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library</th></tr><tr><td width="20%" align="left"> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="manual/index.html">Next</a></td></tr></table><hr /></div><div class="set" lang="en" xml:lang="en"><div class="titlepage"><div><div><h1 class="title"><a id="set-index"></a>The GNU C++ Library</h1></div><div><div class="abstract"><a id="contents"></a><p class="title"><strong>Short Contents</strong></p><p>

1194

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="description" content="Short Contents Copyright (C) 2008-2013 FSF Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts. This is the top level of the libstdc++ documentation set. The documentation is divided into the following three sections. Manual Frequently Asked Questions API and Source Documentation" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="next" href="manual/index.html" title="The GNU C++ Library Manual" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library</th></tr><tr><td width="20%" align="left"> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="manual/index.html">Next</a></td></tr></table><hr /></div><div class="set" lang="en" xml:lang="en"><div class="titlepage"><div><div><h1 class="title"><a id="set-index"></a>The GNU C++ Library</h1></div><div><div class="abstract"><a id="contents"></a><p class="title"><strong>Short Contents</strong></p><p>

1195

1196

<a class="link" href="http://www.fsf.org/" target="_top">FSF

1197

</a>

1198

@@ -20,7 +20,7 @@

1199

</p></li><li class="listitem"><p>

1200

<a class="link" href="api.html" title="The GNU C++ Library API Reference">API and Source Documentation</a>

1201

</p></li></ul></div><p>

1202

- </p></div></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="book"><a href="manual/index.html">The GNU C++ Library Manual</a></span></dt><dd><dl><dt><span class="part"><a href="manual/intro.html">I.

1203

+ </p></div></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="book"><a href="manual/index.html">The GNU C++ Library Manual</a></span></dt><dd><dl><dt><span class="part"><a href="manual/intro.html">I.

1204

Introduction

1205

1206

</a></span></dt><dd><dl><dt><span class="chapter"><a href="manual/status.html">1. Status</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="manual/status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="manual/status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="manual/status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="manual/status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="manual/status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="manual/license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="manual/license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="manual/license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="manual/bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="manual/bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="manual/bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="manual/setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="manual/setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="manual/configure.html">Configure</a></span></dt><dt><span class="section"><a href="manual/make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="manual/using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="manual/using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="manual/using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="manual/using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="manual/using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="manual/using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="manual/using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="manual/using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="manual/using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="manual/using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="manual/using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="manual/debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="manual/debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="part"><a href="manual/std_contents.html">II.

1207

@@ -34,13 +34,13 @@

1208

</a></span></dt><dd><dl><dt><span class="section"><a href="manual/diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="manual/diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="manual/diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="manual/concept_checking.html">Concept Checking</a></span></dt></dl></dd><dt><span class="chapter"><a href="manual/utilities.html">6.

1209

Utilities

1210

1211

-</a></span></dt><dd><dl><dt><span class="section"><a href="manual/utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="manual/pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="manual/memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#idp13920976">Interface Design</a></span></dt><dt><span class="section"><a href="manual/memory.html#idp13924528">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="manual/memory.html#idp13937824">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="manual/memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="manual/memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#idp15512272">Class Hierarchy</a></span></dt><dt><span class="section"><a href="manual/memory.html#idp15534784">Thread Safety</a></span></dt><dt><span class="section"><a href="manual/memory.html#idp15542080">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="manual/memory.html#idp15556704">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#idp15573056">Examples</a></span></dt><dt><span class="section"><a href="manual/memory.html#idp15576640">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="manual/strings.html">7.

1212

+</a></span></dt><dd><dl><dt><span class="section"><a href="manual/utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="manual/pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="manual/memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#idm270001611968">Interface Design</a></span></dt><dt><span class="section"><a href="manual/memory.html#idm270001608416">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="manual/memory.html#idm270001595120">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="manual/memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="manual/memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="manual/memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#idm270000019344">Class Hierarchy</a></span></dt><dt><span class="section"><a href="manual/memory.html#idm269999996832">Thread Safety</a></span></dt><dt><span class="section"><a href="manual/memory.html#idm269999989536">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="manual/memory.html#idm269999974912">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="manual/memory.html#idm269999958496">Examples</a></span></dt><dt><span class="section"><a href="manual/memory.html#idm269999954912">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="manual/memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="manual/strings.html">7.

1213

Strings

1214

1215

</a></span></dt><dd><dl><dt><span class="section"><a href="manual/strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="manual/strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="manual/strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="manual/strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="manual/strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="manual/strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="manual/strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="manual/localization.html">8.

1216

Localization

1217

1218

-</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="manual/localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="manual/localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#idp15778336">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="manual/facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="manual/facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="manual/facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="manual/containers.html">9.

1219

+</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="manual/localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="manual/localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#idm269999753024">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="manual/facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="manual/facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="manual/facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="manual/facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="manual/facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="manual/facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="manual/containers.html">9.

1220

Containers

1221

1222

</a></span></dt><dd><dl><dt><span class="section"><a href="manual/containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="manual/containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="manual/containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="manual/containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="manual/containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="manual/associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="manual/associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="manual/associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="manual/associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="manual/unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="manual/unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="manual/containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="manual/containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="manual/iterators.html">10.

1223

Index: libstdc++-v3/doc/html/api.html

1224

===================================================================

1225

--- a/src/libstdc++-v3/doc/html/api.html (.../tags/gcc_4_8_2_release)

1226

+++ b/src/libstdc++-v3/doc/html/api.html (.../branches/gcc-4_8-branch)

1227

@@ -1,5 +1,5 @@

1228

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1229

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library API Reference</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="bk02.html" title="" /><link rel="prev" href="bk02.html" title="" /><link rel="next" href="bk03.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library API Reference</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bk02.html">Prev</a> </td><th width="60%" align="center"></th><td width="20%" align="right"> <a accesskey="n" href="bk03.html">Next</a></td></tr></table><hr /></div><div class="article"><div class="titlepage"><div><div><h1 class="title"><a id="api"></a>The GNU C++ Library API Reference</h1></div><div><p class="copyright">Copyright ©

1230

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library API Reference</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="index.html" title="The GNU C++ Library" /><link rel="up" href="bk02.html" title="" /><link rel="prev" href="bk02.html" title="" /><link rel="next" href="bk03.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library API Reference</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bk02.html">Prev</a> </td><th width="60%" align="center"></th><td width="20%" align="right"> <a accesskey="n" href="bk03.html">Next</a></td></tr></table><hr /></div><div class="article"><div class="titlepage"><div><div><h1 class="title"><a id="api"></a>The GNU C++ Library API Reference</h1></div><div><p class="copyright">Copyright ©

1231

2008

1232

,

1233

2010

1234

@@ -6,7 +6,7 @@

1235

1236

<a class="link" href="http://www.fsf.org/" target="_top">FSF

1237

</a>

1238

- </p></div><div><div class="legalnotice"><a id="idp3706336"></a><p>

1239

+ </p></div><div><div class="legalnotice"><a id="idm270006235696"></a><p>

1240

<a class="link" href="manual/license.html" title="License">License

1241

</a>

1242

</p></div></div></div><hr /></div><p>

1243

Index: libstdc++-v3/doc/html/manual/dynamic_memory.html

1244

===================================================================

1245

--- a/src/libstdc++-v3/doc/html/manual/dynamic_memory.html (.../tags/gcc_4_8_2_release)

1246

+++ b/src/libstdc++-v3/doc/html/manual/dynamic_memory.html (.../branches/gcc-4_8-branch)

1247

@@ -1,5 +1,5 @@

1248

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1249

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Dynamic Memory</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="support.html" title="Chapter 4. Support" /><link rel="prev" href="support.html" title="Chapter 4. Support" /><link rel="next" href="termination.html" title="Termination" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Dynamic Memory</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="support.html">Prev</a> </td><th width="60%" align="center">Chapter 4.

1250

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Dynamic Memory</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="support.html" title="Chapter 4. Support" /><link rel="prev" href="support.html" title="Chapter 4. Support" /><link rel="next" href="termination.html" title="Termination" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Dynamic Memory</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="support.html">Prev</a> </td><th width="60%" align="center">Chapter 4.

1251

Support

1252

1253

</th><td width="20%" align="right"> <a accesskey="n" href="termination.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.support.memory"></a>Dynamic Memory</h2></div></div></div><p>

1254

Index: libstdc++-v3/doc/html/manual/iterators.html

1255

===================================================================

1256

--- a/src/libstdc++-v3/doc/html/manual/iterators.html (.../tags/gcc_4_8_2_release)

1257

+++ b/src/libstdc++-v3/doc/html/manual/iterators.html (.../branches/gcc-4_8-branch)

1258

@@ -1,5 +1,5 @@

1259

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1260

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 10. Iterators</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="containers_and_c.html" title="Interacting with C" /><link rel="next" href="algorithms.html" title="Chapter 11. Algorithms" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 10.

1261

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 10. Iterators</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="containers_and_c.html" title="Interacting with C" /><link rel="next" href="algorithms.html" title="Chapter 11. Algorithms" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 10.

1262

Iterators

1263

1264

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="containers_and_c.html">Prev</a> </td><th width="60%" align="center">Part II.

1265

@@ -6,8 +6,8 @@

1266

Standard Contents

1267

</th><td width="20%" align="right"> <a accesskey="n" href="algorithms.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.iterators"></a>Chapter 10.

1268

Iterators

1269

- <a id="idp16156992" class="indexterm"></a>

1270

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="iterators.html#std.iterators.predefined">Predefined</a></span></dt><dd><dl><dt><span class="section"><a href="iterators.html#iterators.predefined.vs_pointers">Iterators vs. Pointers</a></span></dt><dt><span class="section"><a href="iterators.html#iterators.predefined.end">One Past the End</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.iterators.predefined"></a>Predefined</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="iterators.predefined.vs_pointers"></a>Iterators vs. Pointers</h3></div></div></div><p>

1271

+ <a id="idm269999374096" class="indexterm"></a>

1272

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="iterators.html#std.iterators.predefined">Predefined</a></span></dt><dd><dl><dt><span class="section"><a href="iterators.html#iterators.predefined.vs_pointers">Iterators vs. Pointers</a></span></dt><dt><span class="section"><a href="iterators.html#iterators.predefined.end">One Past the End</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.iterators.predefined"></a>Predefined</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="iterators.predefined.vs_pointers"></a>Iterators vs. Pointers</h3></div></div></div><p>

1273

The following

1274

FAQ <a class="link" href="../faq.html#faq.iterator_as_pod" title="7.1.">entry</a> points out that

1275

iterators are not implemented as pointers. They are a generalization

1276

Index: libstdc++-v3/doc/html/manual/mt_allocator_ex_single.html

1277

===================================================================

1278

--- a/src/libstdc++-v3/doc/html/manual/mt_allocator_ex_single.html (.../tags/gcc_4_8_2_release)

1279

+++ b/src/libstdc++-v3/doc/html/manual/mt_allocator_ex_single.html (.../branches/gcc-4_8-branch)

1280

@@ -1,5 +1,5 @@

1281

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1282

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Single Thread Example</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_impl.html" title="Implementation" /><link rel="next" href="mt_allocator_ex_multi.html" title="Multiple Thread Example" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Single Thread Example</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_ex_multi.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.example_single"></a>Single Thread Example</h2></div></div></div><p>

1283

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Single Thread Example</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_impl.html" title="Implementation" /><link rel="next" href="mt_allocator_ex_multi.html" title="Multiple Thread Example" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Single Thread Example</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_ex_multi.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.example_single"></a>Single Thread Example</h2></div></div></div><p>

1284

Let's start by describing how the data on a freelist is laid out in memory.

1285

This is the first two blocks in freelist for thread id 3 in bin 3 (8 bytes):

1286

</p><pre class="programlisting">

1287

Index: libstdc++-v3/doc/html/manual/generalized_numeric_operations.html

1288

===================================================================

1289

--- a/src/libstdc++-v3/doc/html/manual/generalized_numeric_operations.html (.../tags/gcc_4_8_2_release)

1290

+++ b/src/libstdc++-v3/doc/html/manual/generalized_numeric_operations.html (.../branches/gcc-4_8-branch)

1291

@@ -1,5 +1,5 @@

1292

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1293

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Generalized Operations</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="numerics.html" title="Chapter 12. Numerics" /><link rel="prev" href="numerics.html" title="Chapter 12. Numerics" /><link rel="next" href="numerics_and_c.html" title="Interacting with C" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Generalized Operations</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="numerics.html">Prev</a> </td><th width="60%" align="center">Chapter 12.

1294

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Generalized Operations</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="numerics.html" title="Chapter 12. Numerics" /><link rel="prev" href="numerics.html" title="Chapter 12. Numerics" /><link rel="next" href="numerics_and_c.html" title="Interacting with C" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Generalized Operations</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="numerics.html">Prev</a> </td><th width="60%" align="center">Chapter 12.

1295

Numerics

1296

1297

</th><td width="20%" align="right"> <a accesskey="n" href="numerics_and_c.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.numerics.generalized_ops"></a>Generalized Operations</h2></div></div></div><p>

1298

Index: libstdc++-v3/doc/html/manual/mt_allocator.html

1299

===================================================================

1300

--- a/src/libstdc++-v3/doc/html/manual/mt_allocator.html (.../tags/gcc_4_8_2_release)

1301

+++ b/src/libstdc++-v3/doc/html/manual/mt_allocator.html (.../branches/gcc-4_8-branch)

1302

@@ -1,8 +1,8 @@

1303

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1304

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 20. The mt_allocator</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="profile_mode_diagnostics.html" title="Diagnostics" /><link rel="next" href="mt_allocator_design.html" title="Design Issues" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 20. The mt_allocator</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_diagnostics.html">Prev</a> </td><th width="60%" align="center">Part III.

1305

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 20. The mt_allocator</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="profile_mode_diagnostics.html" title="Diagnostics" /><link rel="next" href="mt_allocator_design.html" title="Design Issues" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 20. The mt_allocator</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_diagnostics.html">Prev</a> </td><th width="60%" align="center">Part III.

1306

Extensions

1307

1308

-</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_design.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.allocator.mt"></a>Chapter 20. The mt_allocator</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="mt_allocator.html#allocator.mt.intro">Intro</a></span></dt><dt><span class="section"><a href="mt_allocator_design.html">Design Issues</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_design.html#allocator.mt.overview">Overview</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.tune">Tunable Parameters</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.init">Initialization</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.deallocation">Deallocation Notes</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_ex_single.html">Single Thread Example</a></span></dt><dt><span class="section"><a href="mt_allocator_ex_multi.html">Multiple Thread Example</a></span></dt></dl></div><p>

1309

+</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_design.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.allocator.mt"></a>Chapter 20. The mt_allocator</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="mt_allocator.html#allocator.mt.intro">Intro</a></span></dt><dt><span class="section"><a href="mt_allocator_design.html">Design Issues</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_design.html#allocator.mt.overview">Overview</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.tune">Tunable Parameters</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.init">Initialization</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.deallocation">Deallocation Notes</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_ex_single.html">Single Thread Example</a></span></dt><dt><span class="section"><a href="mt_allocator_ex_multi.html">Multiple Thread Example</a></span></dt></dl></div><p>

1310

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.intro"></a>Intro</h2></div></div></div><p>

1311

The mt allocator [hereinafter referred to simply as "the allocator"]

1312

is a fixed size (power of two) allocator that was initially

1313

Index: libstdc++-v3/doc/html/manual/unordered_associative.html

1314

===================================================================

1315

--- a/src/libstdc++-v3/doc/html/manual/unordered_associative.html (.../tags/gcc_4_8_2_release)

1316

+++ b/src/libstdc++-v3/doc/html/manual/unordered_associative.html (.../branches/gcc-4_8-branch)

1317

@@ -1,5 +1,5 @@

1318

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1319

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Unordered Associative</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="associative.html" title="Associative" /><link rel="next" href="containers_and_c.html" title="Interacting with C" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Unordered Associative</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="associative.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

1320

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Unordered Associative</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="associative.html" title="Associative" /><link rel="next" href="containers_and_c.html" title="Interacting with C" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Unordered Associative</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="associative.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

1321

Containers

1322

1323

</th><td width="20%" align="right"> <a accesskey="n" href="containers_and_c.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.unordered"></a>Unordered Associative</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.unordered.hash"></a>Hash Code</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="containers.unordered.cache"></a>Hash Code Caching Policy</h4></div></div></div><p>

1324

Index: libstdc++-v3/doc/html/manual/configure.html

1325

===================================================================

1326

--- a/src/libstdc++-v3/doc/html/manual/configure.html (.../tags/gcc_4_8_2_release)

1327

+++ b/src/libstdc++-v3/doc/html/manual/configure.html (.../branches/gcc-4_8-branch)

1328

@@ -1,5 +1,5 @@

1329

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1330

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Configure</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, configure, options" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="setup.html" title="Chapter 2. Setup" /><link rel="prev" href="setup.html" title="Chapter 2. Setup" /><link rel="next" href="make.html" title="Make" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Configure</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="setup.html">Prev</a> </td><th width="60%" align="center">Chapter 2. Setup</th><td width="20%" align="right"> <a accesskey="n" href="make.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.configure"></a>Configure</h2></div></div></div><p>

1331

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Configure</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, configure, options" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="setup.html" title="Chapter 2. Setup" /><link rel="prev" href="setup.html" title="Chapter 2. Setup" /><link rel="next" href="make.html" title="Make" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Configure</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="setup.html">Prev</a> </td><th width="60%" align="center">Chapter 2. Setup</th><td width="20%" align="right"> <a accesskey="n" href="make.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.configure"></a>Configure</h2></div></div></div><p>

1332

When configuring libstdc++, you'll have to configure the entire

1333

<span class="emphasis"><em>gccsrcdir</em></span> directory. Consider using the

1334

toplevel gcc configuration option

1335

Index: libstdc++-v3/doc/html/manual/status.html

1336

===================================================================

1337

--- a/src/libstdc++-v3/doc/html/manual/status.html (.../tags/gcc_4_8_2_release)

1338

+++ b/src/libstdc++-v3/doc/html/manual/status.html (.../branches/gcc-4_8-branch)

1339

@@ -1,13 +1,13 @@

1340

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1341

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 1. Status</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="intro.html" title="Part I. Introduction" /><link rel="next" href="license.html" title="License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 1. Status</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="intro.html">Prev</a> </td><th width="60%" align="center">Part I.

1342

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 1. Status</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="intro.html" title="Part I. Introduction" /><link rel="next" href="license.html" title="License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 1. Status</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="intro.html">Prev</a> </td><th width="60%" align="center">Part I.

1343

Introduction

1344

1345

-</th><td width="20%" align="right"> <a accesskey="n" href="license.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.status"></a>Chapter 1. Status</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.iso"></a>Implementation Status</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="status.iso.1998"></a>C++ 1998/2003</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="iso.1998.status"></a>Implementation Status</h4></div></div></div><p>

1346

+</th><td width="20%" align="right"> <a accesskey="n" href="license.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.status"></a>Chapter 1. Status</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.iso"></a>Implementation Status</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="status.iso.1998"></a>C++ 1998/2003</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="iso.1998.status"></a>Implementation Status</h4></div></div></div><p>

1347

This status table is based on the table of contents of ISO/IEC 14882:2003.

1348

</p><p>

1349

This page describes the C++ support in mainline GCC SVN, not in any

1350

particular release.

1351

-</p><div class="table"><a id="idp452240"></a><p class="title"><strong>Table 1.1. C++ 1998/2003 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 1998/2003 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1352

+</p><div class="table"><a id="idm270008034928"></a><p class="title"><strong>Table 1.1. C++ 1998/2003 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 1998/2003 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1353

1354

</td><td colspan="3" align="left">

1355

<span class="emphasis"><em>Language support</em></span>

1356

@@ -157,7 +157,7 @@

1357

</p><p>

1358

This page describes the C++11 support in mainline GCC SVN, not in any

1359

particular release.

1360

-</p><div class="table"><a id="idp8670848"></a><p class="title"><strong>Table 1.2. C++ 2011 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 2011 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1361

+</p><div class="table"><a id="idm270007982624"></a><p class="title"><strong>Table 1.2. C++ 2011 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 2011 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1362

1363

</td><td colspan="3" align="left">

1364

<span class="emphasis"><em>Language support</em></span>

1365

@@ -183,7 +183,7 @@

1366

is_trivially_copy_constructible, is_trivially_move_constructible,

1367

is_trivially_assignable, is_trivially_default_assignable,

1368

is_trivially_copy_assignable, is_trivially_move_assignable

1369

- </td></tr><tr><td align="left">20.9.5</td><td align="left">Type property queries</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.6</td><td align="left">Relationships between types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7</td><td align="left">Transformations between types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.9.7.1</td><td align="left">Const-volatile modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.2</td><td align="left">Reference modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.3</td><td align="left">Sign modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.4</td><td align="left">Array modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.5</td><td align="left">Pointer modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.6</td><td align="left">Other transformations</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10</td><td align="left">Compile-time rational arithmetic</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.2</td><td align="left">Header <code class="code"><ratio></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.3</td><td align="left">Class template <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.4</td><td align="left">Arithmetic on <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.5</td><td align="left">Comparison of <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.6</td><td align="left">SI types for <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11</td><td align="left">Time utilities</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.3</td><td align="left">Clock requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4</td><td align="left">Time-related traits</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.4.1</td><td align="left"><code class="code">treat_as_floating_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.2</td><td align="left"><code class="code">duration_values</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.3</td><td align="left">Specializations of <code class="code">common_type</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.11.5</td><td align="left">Class template <code class="code">duration</code></td><td align="left">Partial</td><td align="left">Missing constexpr for non-member arithmetic operations</td></tr><tr><td align="left">20.11.6</td><td align="left">Class template <code class="code">time_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7</td><td align="left">Clocks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.7.1</td><td align="left">Class <code class="code">system_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.2</td><td align="left">Class <code class="code">steady_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.3</td><td align="left">Class <code class="code">high_resolution_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.8</td><td align="left">Date and time functions</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12</td><td align="left">Scoped allocator adaptor</td><td align="left">Partial</td><td align="left"> </td></tr><tr><td align="left">20.12.1</td><td align="left">Header <code class="code"><scoped_allocator></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.12.2</td><td align="left">Scoped allocator adaptor member types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.12.3</td><td align="left">Scoped allocator adaptor constructors</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12.4</td><td align="left">Scoped allocator adaptor members</td><td align="left">Partial</td><td align="left">OUTERMOST is not recursive.</td></tr><tr><td align="left">20.12.5</td><td align="left">Scoped allocator operators</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.13</td><td align="left">Class <code class="code">type_index</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">

1370

+ </td></tr><tr><td align="left">20.9.5</td><td align="left">Type property queries</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.6</td><td align="left">Relationships between types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7</td><td align="left">Transformations between types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.9.7.1</td><td align="left">Const-volatile modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.2</td><td align="left">Reference modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.3</td><td align="left">Sign modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.4</td><td align="left">Array modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.9.7.5</td><td align="left">Pointer modifications</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.9.7.6</td><td align="left">Other transformations</td><td align="left">Partial</td><td align="left">Missing <code class="code">aligned_union</code>.</td></tr><tr><td align="left">20.10</td><td align="left">Compile-time rational arithmetic</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.2</td><td align="left">Header <code class="code"><ratio></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.10.3</td><td align="left">Class template <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.4</td><td align="left">Arithmetic on <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.5</td><td align="left">Comparison of <code class="code">ratio</code>s</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.10.6</td><td align="left">SI types for <code class="code">ratio</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11</td><td align="left">Time utilities</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.3</td><td align="left">Clock requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4</td><td align="left">Time-related traits</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.4.1</td><td align="left"><code class="code">treat_as_floating_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.2</td><td align="left"><code class="code">duration_values</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.4.3</td><td align="left">Specializations of <code class="code">common_type</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.11.5</td><td align="left">Class template <code class="code">duration</code></td><td align="left">Partial</td><td align="left">Missing constexpr for non-member arithmetic operations</td></tr><tr><td align="left">20.11.6</td><td align="left">Class template <code class="code">time_point</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7</td><td align="left">Clocks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.11.7.1</td><td align="left">Class <code class="code">system_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.2</td><td align="left">Class <code class="code">steady_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.7.3</td><td align="left">Class <code class="code">high_resolution_clock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.11.8</td><td align="left">Date and time functions</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12</td><td align="left">Scoped allocator adaptor</td><td align="left">Partial</td><td align="left"> </td></tr><tr><td align="left">20.12.1</td><td align="left">Header <code class="code"><scoped_allocator></code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">20.12.2</td><td align="left">Scoped allocator adaptor member types</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.12.3</td><td align="left">Scoped allocator adaptor constructors</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">20.12.4</td><td align="left">Scoped allocator adaptor members</td><td align="left">Partial</td><td align="left">OUTERMOST is not recursive.</td></tr><tr><td align="left">20.12.5</td><td align="left">Scoped allocator operators</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">20.13</td><td align="left">Class <code class="code">type_index</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">

1371

1372

</td><td colspan="3" align="left">

1373

<span class="emphasis"><em>Strings</em></span>

1374

@@ -302,7 +302,7 @@

1375

</p><p>

1376

This page describes the TR1 support in mainline GCC SVN, not in any particular

1377

release.

1378

-</p><div class="table"><a id="idp7483200"></a><p class="title"><strong>Table 1.3. C++ TR1 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR1 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left"><span class="emphasis"><em>2</em></span></td><td colspan="3" align="left"><span class="emphasis"><em>General Utilities</em></span></td></tr><tr><td align="left">2.1</td><td align="left">Reference wrappers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.1</td><td align="left">Additions to header <code class="code"><functional></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2</td><td align="left">Class template <code class="code">reference_wrapper</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.2.1</td><td align="left"><code class="code">reference_wrapper</code> construct/copy/destroy</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.2</td><td align="left"><code class="code">reference_wrapper</code> assignment</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.3</td><td align="left"><code class="code">reference_wrapper</code> access</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.4</td><td align="left"><code class="code">reference_wrapper</code> invocation</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.5</td><td align="left"><code class="code">reference_wrapper</code> helper functions</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2</td><td align="left">Smart pointers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.2.1</td><td align="left">Additions to header <code class="code"><memory></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.2</td><td align="left">Class <code class="code">bad_weak_ptr</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.3</td><td align="left">Class template <code class="code">shared_ptr</code></td><td align="left"> </td><td align="left">

1379

+</p><div class="table"><a id="idm270006687472"></a><p class="title"><strong>Table 1.3. C++ TR1 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR1 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left"><span class="emphasis"><em>2</em></span></td><td colspan="3" align="left"><span class="emphasis"><em>General Utilities</em></span></td></tr><tr><td align="left">2.1</td><td align="left">Reference wrappers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.1</td><td align="left">Additions to header <code class="code"><functional></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2</td><td align="left">Class template <code class="code">reference_wrapper</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.1.2.1</td><td align="left"><code class="code">reference_wrapper</code> construct/copy/destroy</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.2</td><td align="left"><code class="code">reference_wrapper</code> assignment</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.3</td><td align="left"><code class="code">reference_wrapper</code> access</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.4</td><td align="left"><code class="code">reference_wrapper</code> invocation</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.1.2.5</td><td align="left"><code class="code">reference_wrapper</code> helper functions</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2</td><td align="left">Smart pointers</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">2.2.1</td><td align="left">Additions to header <code class="code"><memory></code> synopsis</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.2</td><td align="left">Class <code class="code">bad_weak_ptr</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">2.2.3</td><td align="left">Class template <code class="code">shared_ptr</code></td><td align="left"> </td><td align="left">

1380

<p>

1381

Uses code from

1382

<a class="link" href="http://www.boost.org/libs/smart_ptr/shared_ptr.htm" target="_top">boost::shared_ptr</a>.

1383

@@ -323,7 +323,7 @@

1384

</p><p>

1385

This page describes the TR 24733 support in mainline GCC SVN, not in any

1386

particular release.

1387

-</p><div class="table"><a id="idp12559072"></a><p class="title"><strong>Table 1.4. C++ TR 24733 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR 24733 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1388

+</p><div class="table"><a id="idm270002960368"></a><p class="title"><strong>Table 1.4. C++ TR 24733 Implementation Status</strong></p><div class="table-contents"><table summary="C++ TR 24733 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments</th></tr></thead><tbody><tr><td align="left">

1389

1390

</td><td colspan="3" align="left">

1391

<span class="emphasis"><em>Introduction</em></span>

1392

Index: libstdc++-v3/doc/html/manual/profile_mode_devel.html

1393

===================================================================

1394

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_devel.html (.../tags/gcc_4_8_2_release)

1395

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_devel.html (.../branches/gcc-4_8-branch)

1396

@@ -1,5 +1,5 @@

1397

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1398

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Developer Information</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_impl.html" title="Implementation Issues" /><link rel="next" href="profile_mode_diagnostics.html" title="Diagnostics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Developer Information</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_diagnostics.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.developer"></a>Developer Information</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.developer.bigpic"></a>Big Picture</h3></div></div></div><p>The profile mode headers are included with

1399

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Developer Information</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_impl.html" title="Implementation Issues" /><link rel="next" href="profile_mode_diagnostics.html" title="Diagnostics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Developer Information</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_diagnostics.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.developer"></a>Developer Information</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.developer.bigpic"></a>Big Picture</h3></div></div></div><p>The profile mode headers are included with

1400

<code class="code">-D_GLIBCXX_PROFILE</code> through preprocessor directives in

1401

<code class="code">include/std/*</code>.

1402

</p><p>Instrumented implementations are provided in

1403

Index: libstdc++-v3/doc/html/manual/debug_mode_design.html

1404

===================================================================

1405

--- a/src/libstdc++-v3/doc/html/manual/debug_mode_design.html (.../tags/gcc_4_8_2_release)

1406

+++ b/src/libstdc++-v3/doc/html/manual/debug_mode_design.html (.../branches/gcc-4_8-branch)

1407

@@ -1,5 +1,5 @@

1408

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1409

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_using.html" title="Using" /><link rel="next" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.design"></a>Design</h2></div></div></div><p>

1410

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_using.html" title="Using" /><link rel="next" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.design"></a>Design</h2></div></div></div><p>

1411

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="debug_mode.design.goals"></a>Goals</h3></div></div></div><p>

1412

</p><p> The libstdc++ debug mode replaces unsafe (but efficient) standard

1413

containers and iterators with semantically equivalent safe standard

1414

@@ -391,7 +391,7 @@

1415

</p><p> There are several existing implementations of debug modes for C++

1416

standard library implementations, although none of them directly

1417

supports debugging for programs using libstdc++. The existing

1418

- implementations include:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><a class="link" href="http://www.mathcs.sjsu.edu/faculty/horstman/safestl.html" target="_top">SafeSTL</a>:

1419

+ implementations include:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><a class="link" href="http://www.cs.sjsu.edu/faculty/horstman/safestl.html" target="_top">SafeSTL</a>:

1420

SafeSTL was the original debugging version of the Standard Template

1421

Library (STL), implemented by Cay S. Horstmann on top of the

1422

Hewlett-Packard STL. Though it inspired much work in this area, it

1423

Index: libstdc++-v3/doc/html/manual/policy_data_structures_design.html

1424

===================================================================

1425

--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_design.html (.../tags/gcc_4_8_2_release)

1426

+++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_design.html (.../branches/gcc-4_8-branch)

1427

@@ -1,5 +1,5 @@

1428

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1429

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_using.html" title="Using" /><link rel="next" href="policy_based_data_structures_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_using.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_based_data_structures_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.design"></a>Design</h2></div></div></div><p></p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.design.concepts"></a>Concepts</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.design.concepts.null_type"></a>Null Policy Classes</h4></div></div></div><p>

1430

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_using.html" title="Using" /><link rel="next" href="policy_based_data_structures_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_using.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_based_data_structures_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.design"></a>Design</h2></div></div></div><p></p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.design.concepts"></a>Concepts</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.design.concepts.null_type"></a>Null Policy Classes</h4></div></div></div><p>

1431

Associative containers are typically parametrized by various

1432

policies. For example, a hash-based associative container is

1433

parametrized by a hash-functor, transforming each key into an

1434

@@ -170,7 +170,7 @@

1435

naturally; collision-chaining hash tables (label B) store

1436

equivalent-key values in the same bucket, the bucket can be

1437

arranged so that equivalent-key values are consecutive.

1438

- </p><div class="figure"><a id="idp18000448"></a><p class="title"><strong>Figure 22.8. Non-unique Mapping Standard Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_1.png" align="middle" alt="Non-unique Mapping Standard Containers" /></div></div></div><br class="figure-break" /><p>

1439

+ </p><div class="figure"><a id="idm269997530416"></a><p class="title"><strong>Figure 22.8. Non-unique Mapping Standard Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_1.png" align="middle" alt="Non-unique Mapping Standard Containers" /></div></div></div><br class="figure-break" /><p>

1440

Put differently, the standards' non-unique mapping

1441

associative-containers are associative containers that map

1442

primary keys to linked lists that are embedded into the

1443

@@ -252,7 +252,7 @@

1444

first graphic above. Labels A and B, respectively. Each shaded

1445

box represents some size-type or secondary

1446

associative-container.

1447

- </p><div class="figure"><a id="idp18023952"></a><p class="title"><strong>Figure 22.10. Non-unique Mapping Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_3.png" align="middle" alt="Non-unique Mapping Containers" /></div></div></div><br class="figure-break" /><p>

1448

+ </p><div class="figure"><a id="idm269997506912"></a><p class="title"><strong>Figure 22.10. Non-unique Mapping Containers</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_embedded_lists_3.png" align="middle" alt="Non-unique Mapping Containers" /></div></div></div><br class="figure-break" /><p>

1449

In the first example above, then, one would use an associative

1450

container mapping each user to an associative container which

1451

maps each application id to a start time (see

1452

@@ -305,7 +305,7 @@

1453

shows invariants for order-preserving containers: point-type

1454

iterators are synonymous with range-type iterators.

1455

Orthogonally, <span class="emphasis"><em>C</em></span>shows invariants for "set"

1456

- containers: iterators are synonymous with const iterators.</p><div class="figure"><a id="idp18043824"></a><p class="title"><strong>Figure 22.11. Point Iterator Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterator_hierarchy.png" align="middle" alt="Point Iterator Hierarchy" /></div></div></div><br class="figure-break" /><p>Note that point-type iterators in self-organizing containers

1457

+ containers: iterators are synonymous with const iterators.</p><div class="figure"><a id="idm269997487104"></a><p class="title"><strong>Figure 22.11. Point Iterator Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterator_hierarchy.png" align="middle" alt="Point Iterator Hierarchy" /></div></div></div><br class="figure-break" /><p>Note that point-type iterators in self-organizing containers

1458

(hash-based associative containers) lack movement

1459

operators, such as <code class="literal">operator++</code> - in fact, this

1460

is the reason why this library differentiates from the standard C++ librarys

1461

@@ -344,7 +344,7 @@

1462

to the question of whether point-type iterators and range-type

1463

iterators are valid. The graphic below shows tags corresponding to

1464

different types of invalidation guarantees.

1465

- </p><div class="figure"><a id="idp18057168"></a><p class="title"><strong>Figure 22.12. Invalidation Guarantee Tags Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_tag_hierarchy.png" align="middle" alt="Invalidation Guarantee Tags Hierarchy" /></div></div></div><br class="figure-break" /><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>

1466

+ </p><div class="figure"><a id="idm269997473760"></a><p class="title"><strong>Figure 22.12. Invalidation Guarantee Tags Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_tag_hierarchy.png" align="middle" alt="Invalidation Guarantee Tags Hierarchy" /></div></div></div><br class="figure-break" /><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>

1467

<code class="classname">basic_invalidation_guarantee</code>

1468

corresponds to a basic guarantee that a point-type iterator,

1469

a found pointer, or a found reference, remains valid as long

1470

@@ -428,7 +428,7 @@

1471

</p><p>

1472

This library contains a container tag hierarchy corresponding to the

1473

diagram below.

1474

- </p><div class="figure"><a id="idp18087392"></a><p class="title"><strong>Figure 22.13. Container Tag Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_container_tag_hierarchy.png" align="middle" alt="Container Tag Hierarchy" /></div></div></div><br class="figure-break" /><p>

1475

+ </p><div class="figure"><a id="idm269997443664"></a><p class="title"><strong>Figure 22.13. Container Tag Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_container_tag_hierarchy.png" align="middle" alt="Container Tag Hierarchy" /></div></div></div><br class="figure-break" /><p>

1476

Given any container <span class="type">Cntnr</span>, the tag of

1477

the underlying data structure can be found via <code class="literal">typename

1478

Cntnr::container_category</code>.

1479

@@ -487,7 +487,7 @@

1480

collision-chaining container, except for the following.</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p><code class="classname">Comb_Probe_Fn</code> describes how to transform a probe

1481

sequence into a sequence of positions within the table.</p></li><li class="listitem"><p><code class="classname">Probe_Fn</code> describes a probe sequence policy.</p></li></ol></div><p>Some of the default template values depend on the values of

1482

other parameters, and are explained below.</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="container.hash.details"></a>Details</h5></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.hash.details.hash_policies"></a>Hash Policies</h6></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="details.hash_policies.general"></a>General</h6></div></div></div><p>Following is an explanation of some functions which hashing

1483

- involves. The graphic below illustrates the discussion.</p><div class="figure"><a id="idp18127536"></a><p class="title"><strong>Figure 22.14. Hash functions, ranged-hash functions, and

1484

+ involves. The graphic below illustrates the discussion.</p><div class="figure"><a id="idm269997403584"></a><p class="title"><strong>Figure 22.14. Hash functions, ranged-hash functions, and

1485

range-hashing functions</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_ranged_hash_range_hashing_fns.png" align="middle" alt="Hash functions, ranged-hash functions, and range-hashing functions" /></div></div></div><br class="figure-break" /><p>Let U be a domain (e.g., the integers, or the

1486

strings of 3 characters). A hash-table algorithm needs to map

1487

elements of U "uniformly" into the range [0,..., m -

1488

@@ -504,7 +504,7 @@

1489

Z<sub>+</sub>,</p><p>which maps a non-negative hash value, and a non-negative

1490

range upper-bound into a non-negative integral in the range

1491

between 0 (inclusive) and the range upper bound (exclusive),

1492

- i.e., for any r in Z<sub>+</sub>,</p><p>0 ≤ g(r, m) ≤ m - 1</p><p>The resulting ranged-hash function, is</p><div class="equation"><a id="idp18141344"></a><p class="title"><strong>Equation 22.1. Ranged Hash Function</strong></p><div class="equation-contents"><span class="mathphrase">

1493

+ i.e., for any r in Z<sub>+</sub>,</p><p>0 ≤ g(r, m) ≤ m - 1</p><p>The resulting ranged-hash function, is</p><div class="equation"><a id="idm269997389776"></a><p class="title"><strong>Equation 22.1. Ranged Hash Function</strong></p><div class="equation-contents"><span class="mathphrase">

1494

f(u , m) = g(h(u), m)

1495

</span></div></div><br class="equation-break" /><p>From the above, it is obvious that given g and

1496

h, f can always be composed (however the converse

1497

@@ -524,7 +524,7 @@

1498

transforming the sequence of hash values into a sequence of

1499

positions.</p></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="details.hash_policies.range"></a>Range Hashing</h6></div></div></div><p>Some common choices for range-hashing functions are the

1500

division, multiplication, and middle-square methods (<a class="xref" href="policy_data_structures.html#biblio.knuth98sorting" title="The Art of Computer Programming - Sorting and Searching">[biblio.knuth98sorting]</a>), defined

1501

- as</p><div class="equation"><a id="idp18147232"></a><p class="title"><strong>Equation 22.2. Range-Hashing, Division Method</strong></p><div class="equation-contents"><span class="mathphrase">

1502

+ as</p><div class="equation"><a id="idm269997383888"></a><p class="title"><strong>Equation 22.2. Range-Hashing, Division Method</strong></p><div class="equation-contents"><span class="mathphrase">

1503

g(r, m) = r mod m

1504

</span></div></div><br class="equation-break" /><p>g(r, m) = ⌈ u/v ( a r mod v ) ⌉</p><p>and</p><p>g(r, m) = ⌈ u/v ( r<sup>2</sup> mod v ) ⌉</p><p>respectively, for some positive integrals u and

1505

v (typically powers of 2), and some a. Each of

1506

@@ -535,9 +535,9 @@

1507

implement using the low

1508

level % (modulo) operation (for any m), or the

1509

low level & (bit-mask) operation (for the case where

1510

- m is a power of 2), i.e.,</p><div class="equation"><a id="idp18151744"></a><p class="title"><strong>Equation 22.3. Division via Prime Modulo</strong></p><div class="equation-contents"><span class="mathphrase">

1511

+ m is a power of 2), i.e.,</p><div class="equation"><a id="idm269997379376"></a><p class="title"><strong>Equation 22.3. Division via Prime Modulo</strong></p><div class="equation-contents"><span class="mathphrase">

1512

g(r, m) = r % m

1513

- </span></div></div><br class="equation-break" /><p>and</p><div class="equation"><a id="idp18153568"></a><p class="title"><strong>Equation 22.4. Division via Bit Mask</strong></p><div class="equation-contents"><span class="mathphrase">

1514

+ </span></div></div><br class="equation-break" /><p>and</p><div class="equation"><a id="idm269997377552"></a><p class="title"><strong>Equation 22.4. Division via Bit Mask</strong></p><div class="equation-contents"><span class="mathphrase">

1515

g(r, m) = r & m - 1, (with m =

1516

2<sup>k</sup> for some k)

1517

</span></div></div><br class="equation-break" /><p>respectively.</p><p>The % (modulo) implementation has the advantage that for

1518

@@ -563,7 +563,7 @@

1519

s = [ s<sub>0</sub>,..., s<sub>t - 1</sub>]

1520

</p><p>be a string of t characters, each of which is from

1521

domain S. Consider the following ranged-hash

1522

- function:</p><div class="equation"><a id="idp18163200"></a><p class="title"><strong>Equation 22.5.

1523

+ function:</p><div class="equation"><a id="idm269997367984"></a><p class="title"><strong>Equation 22.5.

1524

A Standard String Hash Function

1525

</strong></p><div class="equation-contents"><span class="mathphrase">

1526

f<sub>1</sub>(s, m) = ∑ <sub>i =

1527

@@ -575,7 +575,7 @@

1528

of a long DNA sequence (and so S = {'A', 'C', 'G',

1529

'T'}). In this case, scanning the entire string might be

1530

prohibitively expensive. A possible alternative might be to use

1531

- only the first k characters of the string, where</p><p>|S|<sup>k</sup> ≥ m ,</p><p>i.e., using the hash function</p><div class="equation"><a id="idp18169344"></a><p class="title"><strong>Equation 22.6.

1532

+ only the first k characters of the string, where</p><p>|S|<sup>k</sup> ≥ m ,</p><p>i.e., using the hash function</p><div class="equation"><a id="idm269997361840"></a><p class="title"><strong>Equation 22.6.

1533

Only k String DNA Hash

1534

</strong></p><div class="equation-contents"><span class="mathphrase">

1535

f<sub>2</sub>(s, m) = ∑ <sub>i

1536

@@ -606,12 +606,12 @@

1537

the container transforms the key into a non-negative integral

1538

using the hash functor (points B and C), and transforms the

1539

result into a position using the combining functor (points D

1540

- and E).</p><div class="figure"><a id="idp18191968"></a><p class="title"><strong>Figure 22.15. Insert hash sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram.png" align="middle" alt="Insert hash sequence diagram" /></div></div></div><br class="figure-break" /><p>If <code class="classname">cc_hash_table</code>'s

1541

+ and E).</p><div class="figure"><a id="idm269997339216"></a><p class="title"><strong>Figure 22.15. Insert hash sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram.png" align="middle" alt="Insert hash sequence diagram" /></div></div></div><br class="figure-break" /><p>If <code class="classname">cc_hash_table</code>'s

1542

hash-functor, <code class="classname">Hash_Fn</code> is instantiated by <code class="classname">null_type</code> , then <code class="classname">Comb_Hash_Fn</code> is taken to be

1543

a ranged-hash function. The graphic below shows an <code class="function">insert</code> sequence

1544

diagram. The user inserts an element (point A), the container

1545

transforms the key into a position using the combining functor

1546

- (points B and C).</p><div class="figure"><a id="idp18199024"></a><p class="title"><strong>Figure 22.16. Insert hash sequence diagram with a null policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram2.png" align="middle" alt="Insert hash sequence diagram with a null policy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="hash_policies.implementation.probe"></a>

1547

+ (points B and C).</p><div class="figure"><a id="idm269997332160"></a><p class="title"><strong>Figure 22.16. Insert hash sequence diagram with a null policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_range_hashing_seq_diagram2.png" align="middle" alt="Insert hash sequence diagram with a null policy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="hash_policies.implementation.probe"></a>

1548

Probing tables

1549

</h6></div></div></div><p><code class="classname">gp_hash_table</code> is parametrized by

1550

<code class="classname">Hash_Fn</code>, <code class="classname">Probe_Fn</code>,

1551

@@ -634,7 +634,7 @@

1552

a linear probe and a quadratic probe function,

1553

respectively.</p></li></ol></div><p>

1554

The graphic below shows the relationships.

1555

- </p><div class="figure"><a id="idp18215840"></a><p class="title"><strong>Figure 22.17. Hash policy class diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_policy_cd.png" align="middle" alt="Hash policy class diagram" /></div></div></div><br class="figure-break" /></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.hash.details.resize_policies"></a>Resize Policies</h6></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="resize_policies.general"></a>General</h6></div></div></div><p>Hash-tables, as opposed to trees, do not naturally grow or

1556

+ </p><div class="figure"><a id="idm269997315408"></a><p class="title"><strong>Figure 22.17. Hash policy class diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_hash_policy_cd.png" align="middle" alt="Hash policy class diagram" /></div></div></div><br class="figure-break" /></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.hash.details.resize_policies"></a>Resize Policies</h6></div></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="resize_policies.general"></a>General</h6></div></div></div><p>Hash-tables, as opposed to trees, do not naturally grow or

1557

shrink. It is necessary to specify policies to determine how

1558

and when a hash table should change its size. Usually, resize

1559

policies can be decomposed into orthogonal policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>A size policy indicating how a hash table

1560

@@ -667,10 +667,10 @@

1561

and some load factor be denoted by Α. We would like to

1562

calculate the minimal length of k, such that if there were Α

1563

m elements in the hash table, a probe sequence of length k would

1564

- be found with probability at most 1/m.</p><div class="figure"><a id="idp18234944"></a><p class="title"><strong>Figure 22.18. Balls and bins</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_balls_and_bins.png" align="middle" alt="Balls and bins" /></div></div></div><br class="figure-break" /><p>Denote the probability that a probe sequence of length

1565

+ be found with probability at most 1/m.</p><div class="figure"><a id="idm269997296368"></a><p class="title"><strong>Figure 22.18. Balls and bins</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_balls_and_bins.png" align="middle" alt="Balls and bins" /></div></div></div><br class="figure-break" /><p>Denote the probability that a probe sequence of length

1566

k appears in bin i by p<sub>i</sub>, the

1567

length of the probe sequence of bin i by

1568

- l<sub>i</sub>, and assume uniform distribution. Then</p><div class="equation"><a id="idp18240448"></a><p class="title"><strong>Equation 22.7.

1569

+ l<sub>i</sub>, and assume uniform distribution. Then</p><div class="equation"><a id="idm269997290864"></a><p class="title"><strong>Equation 22.7.

1570

Probability of Probe Sequence of Length k

1571

</strong></p><div class="equation-contents"><span class="mathphrase">

1572

p<sub>1</sub> =

1573

@@ -684,7 +684,7 @@

1574

l<sub>i</sub> are negatively-dependent

1575

(<a class="xref" href="policy_data_structures.html#biblio.dubhashi98neg" title="Balls and bins: A study in negative dependence">[biblio.dubhashi98neg]</a>)

1576

. Let

1577

- I(.) denote the indicator function. Then</p><div class="equation"><a id="idp18247216"></a><p class="title"><strong>Equation 22.8.

1578

+ I(.) denote the indicator function. Then</p><div class="equation"><a id="idm269997284096"></a><p class="title"><strong>Equation 22.8.

1579

Probability Probe Sequence in Some Bin

1580

</strong></p><div class="equation-contents"><span class="mathphrase">

1581

P( exists<sub>i</sub> l<sub>i</sub> ≥ k ) =

1582

@@ -723,7 +723,7 @@

1583

a resize is needed, and if so, what is the new size (points D

1584

to G); following the resize, it notifies the policy that a

1585

resize has completed (point H); finally, the element is

1586

- inserted, and the policy notified (point I).</p><div class="figure"><a id="idp18265728"></a><p class="title"><strong>Figure 22.19. Insert resize sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram1.png" align="middle" alt="Insert resize sequence diagram" /></div></div></div><br class="figure-break" /><p>In practice, a resize policy can be usually orthogonally

1587

+ inserted, and the policy notified (point I).</p><div class="figure"><a id="idm269997265648"></a><p class="title"><strong>Figure 22.19. Insert resize sequence diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram1.png" align="middle" alt="Insert resize sequence diagram" /></div></div></div><br class="figure-break" /><p>In practice, a resize policy can be usually orthogonally

1588

decomposed to a size policy and a trigger policy. Consequently,

1589

the library contains a single class for instantiating a resize

1590

policy: <code class="classname">hash_standard_resize_policy</code>

1591

@@ -732,8 +732,8 @@

1592

both, and acts as a standard delegate (<a class="xref" href="policy_data_structures.html#biblio.gof" title="Design Patterns - Elements of Reusable Object-Oriented Software">[biblio.gof]</a>)

1593

to these policies.</p><p>The two graphics immediately below show sequence diagrams

1594

illustrating the interaction between the standard resize policy

1595

- and its trigger and size policies, respectively.</p><div class="figure"><a id="idp18273504"></a><p class="title"><strong>Figure 22.20. Standard resize policy trigger sequence

1596

- diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram2.png" align="middle" alt="Standard resize policy trigger sequence diagram" /></div></div></div><br class="figure-break" /><div class="figure"><a id="idp18277664"></a><p class="title"><strong>Figure 22.21. Standard resize policy size sequence

1597

+ and its trigger and size policies, respectively.</p><div class="figure"><a id="idm269997257872"></a><p class="title"><strong>Figure 22.20. Standard resize policy trigger sequence

1598

+ diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram2.png" align="middle" alt="Standard resize policy trigger sequence diagram" /></div></div></div><br class="figure-break" /><div class="figure"><a id="idm269997253712"></a><p class="title"><strong>Figure 22.21. Standard resize policy size sequence

1599

diagram</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_insert_resize_sequence_diagram3.png" align="middle" alt="Standard resize policy size sequence diagram" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="resize_policies.impl.predefined"></a>Predefined Policies</h6></div></div></div><p>The library includes the following

1600

instantiations of size and trigger policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p><code class="classname">hash_load_check_resize_trigger</code>

1601

implements a load check trigger policy.</p></li><li class="listitem"><p><code class="classname">cc_hash_max_collision_check_resize_trigger</code>

1602

@@ -876,7 +876,7 @@

1603

each node, and maintains node invariants (see <a class="xref" href="policy_data_structures.html#biblio.clrs2001" title="Introduction to Algorithms, 2nd edition">[biblio.clrs2001]</a>.) The first stores in

1604

each node the size of the sub-tree rooted at the node; the

1605

second stores at each node the maximal endpoint of the

1606

- intervals at the sub-tree rooted at the node.</p><div class="figure"><a id="idp18355696"></a><p class="title"><strong>Figure 22.22. Tree node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invariants.png" align="middle" alt="Tree node invariants" /></div></div></div><br class="figure-break" /><p>Supporting such trees is difficult for a number of

1607

+ intervals at the sub-tree rooted at the node.</p><div class="figure"><a id="idm269997175616"></a><p class="title"><strong>Figure 22.22. Tree node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invariants.png" align="middle" alt="Tree node invariants" /></div></div></div><br class="figure-break" /><p>Supporting such trees is difficult for a number of

1608

reasons:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>There must be a way to specify what a node's metadata

1609

should be (if any).</p></li><li class="listitem"><p>Various operations can invalidate node

1610

invariants. The graphic below shows how a right rotation,

1611

@@ -890,7 +890,7 @@

1612

metadata.</p></li><li class="listitem"><p>It is not feasible to know in advance which methods trees

1613

can support. Besides the usual <code class="classname">find</code> method, the

1614

first tree can support a <code class="classname">find_by_order</code> method, while

1615

- the second can support an <code class="classname">overlaps</code> method.</p></li></ol></div><div class="figure"><a id="idp18365136"></a><p class="title"><strong>Figure 22.23. Tree node invalidation</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invalidations.png" align="middle" alt="Tree node invalidation" /></div></div></div><br class="figure-break" /><p>These problems are solved by a combination of two means:

1616

+ the second can support an <code class="classname">overlaps</code> method.</p></li></ol></div><div class="figure"><a id="idm269997166176"></a><p class="title"><strong>Figure 22.23. Tree node invalidation</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_invalidations.png" align="middle" alt="Tree node invalidation" /></div></div></div><br class="figure-break" /><p>These problems are solved by a combination of two means:

1617

node iterators, and template-template node updater

1618

parameters.</p><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.tree.node.iterators"></a>Node Iterators</h6></div></div></div><p>Each tree-based container defines two additional iterator

1619

types, <code class="classname">const_node_iterator</code>

1620

@@ -919,7 +919,7 @@

1621

<code class="classname">node_update</code> class, and publicly subclasses

1622

<code class="classname">node_update</code>. The graphic below shows this

1623

scheme, as well as some predefined policies (which are explained

1624

- below).</p><div class="figure"><a id="idp18378304"></a><p class="title"><strong>Figure 22.24. A tree and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_updator_policy_cd.png" align="middle" alt="A tree and its update policy" /></div></div></div><br class="figure-break" /><p><code class="classname">node_update</code> (an instantiation of

1625

+ below).</p><div class="figure"><a id="idm269997153072"></a><p class="title"><strong>Figure 22.24. A tree and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_tree_node_updator_policy_cd.png" align="middle" alt="A tree and its update policy" /></div></div></div><br class="figure-break" /><p><code class="classname">node_update</code> (an instantiation of

1626

<code class="classname">Node_Update</code>) must define <code class="classname">metadata_type</code> as

1627

the type of metadata it requires. For order statistics,

1628

e.g., <code class="classname">metadata_type</code> might be <code class="classname">size_t</code>.

1629

@@ -938,7 +938,7 @@

1630

<code class="classname">nd_it</code>. For example, say node x in the

1631

graphic below label A has an invalid invariant, but its' children,

1632

y and z have valid invariants. After the invocation, all three

1633

- nodes should have valid invariants, as in label B.</p><div class="figure"><a id="idp18389968"></a><p class="title"><strong>Figure 22.25. Restoring node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_restoring_node_invariants.png" align="middle" alt="Restoring node invariants" /></div></div></div><br class="figure-break" /><p>When a tree operation might invalidate some node invariant,

1634

+ nodes should have valid invariants, as in label B.</p><div class="figure"><a id="idm269997141408"></a><p class="title"><strong>Figure 22.25. Restoring node invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_restoring_node_invariants.png" align="middle" alt="Restoring node invariants" /></div></div></div><br class="figure-break" /><p>When a tree operation might invalidate some node invariant,

1635

it invokes this method in its <code class="classname">node_update</code> base to

1636

restore the invariant. For example, the graphic below shows

1637

an <code class="function">insert</code> operation (point A); the tree performs some

1638

@@ -946,7 +946,7 @@

1639

C, and D). (It is well known that any <code class="function">insert</code>,

1640

<code class="function">erase</code>, <code class="function">split</code> or <code class="function">join</code>, can restore

1641

all node invariants by a small number of node invariant updates (<a class="xref" href="policy_data_structures.html#biblio.clrs2001" title="Introduction to Algorithms, 2nd edition">[biblio.clrs2001]</a>)

1642

- .</p><div class="figure"><a id="idp18398144"></a><p class="title"><strong>Figure 22.26. Insert update sequence</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_update_seq_diagram.png" align="middle" alt="Insert update sequence" /></div></div></div><br class="figure-break" /><p>To complete the description of the scheme, three questions

1643

+ .</p><div class="figure"><a id="idm269997133232"></a><p class="title"><strong>Figure 22.26. Insert update sequence</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_update_seq_diagram.png" align="middle" alt="Insert update sequence" /></div></div></div><br class="figure-break" /><p>To complete the description of the scheme, three questions

1644

need to be answered:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>How can a tree which supports order statistics define a

1645

method such as <code class="classname">find_by_order</code>?</p></li><li class="listitem"><p>How can the node updater base access methods of the

1646

tree?</p></li><li class="listitem"><p>How can the following cyclic dependency be resolved?

1647

@@ -988,7 +988,7 @@

1648

node's metadata (this is halting reducible). In the graphic

1649

below, assume the shaded node is inserted. The tree would have

1650

to traverse the useless path shown to the root, applying

1651

- redundant updates all the way.</p></li></ol></div><div class="figure"><a id="idp18420400"></a><p class="title"><strong>Figure 22.27. Useless update path</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_rationale_null_node_updator.png" align="middle" alt="Useless update path" /></div></div></div><br class="figure-break" /><p>A null policy class, <code class="classname">null_node_update</code>

1652

+ redundant updates all the way.</p></li></ol></div><div class="figure"><a id="idm269997110976"></a><p class="title"><strong>Figure 22.27. Useless update path</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_rationale_null_node_updator.png" align="middle" alt="Useless update path" /></div></div></div><br class="figure-break" /><p>A null policy class, <code class="classname">null_node_update</code>

1653

solves both these problems. The tree detects that node

1654

invariants are irrelevant, and defines all accordingly.</p></div></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.tree.details.split"></a>Split and Join</h6></div></div></div><p>Tree-based containers support split and join methods.

1655

It is possible to split a tree so that it passes

1656

@@ -1071,7 +1071,7 @@

1657

sub-tree with leafs "a" and "as". The maximal common prefix is

1658

"a". The internal node contains, consequently, to const

1659

iterators, one pointing to <code class="varname">'a'</code>, and the other to

1660

- <code class="varname">'s'</code>.</p><div class="figure"><a id="idp18465088"></a><p class="title"><strong>Figure 22.28. A PATRICIA trie</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_pat_trie.png" align="middle" alt="A PATRICIA trie" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.trie.details.node"></a>Node Invariants</h6></div></div></div><p>Trie-based containers support node invariants, as do

1661

+ <code class="varname">'s'</code>.</p><div class="figure"><a id="idm269997066288"></a><p class="title"><strong>Figure 22.28. A PATRICIA trie</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_pat_trie.png" align="middle" alt="A PATRICIA trie" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.trie.details.node"></a>Node Invariants</h6></div></div></div><p>Trie-based containers support node invariants, as do

1662

tree-based containers. There are two minor

1663

differences, though, which, unfortunately, thwart sharing them

1664

sharing the same node-updating policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>A trie's <code class="classname">Node_Update</code> template-template

1665

@@ -1080,7 +1080,7 @@

1666

parametrized by <code class="classname">Cmp_Fn</code>.</p></li><li class="listitem"><p>Tree-based containers store values in all nodes, while

1667

trie-based containers (at least in this implementation) store

1668

values in leafs.</p></li></ol></div><p>The graphic below shows the scheme, as well as some predefined

1669

- policies (which are explained below).</p><div class="figure"><a id="idp18475584"></a><p class="title"><strong>Figure 22.29. A trie and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_trie_node_updator_policy_cd.png" align="middle" alt="A trie and its update policy" /></div></div></div><br class="figure-break" /><p>This library offers the following pre-defined trie node

1670

+ policies (which are explained below).</p><div class="figure"><a id="idm269997055856"></a><p class="title"><strong>Figure 22.29. A trie and its update policy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_trie_node_updator_policy_cd.png" align="middle" alt="A trie and its update policy" /></div></div></div><br class="figure-break" /><p>This library offers the following pre-defined trie node

1671

updating policies:</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>

1672

<code class="classname">trie_order_statistics_node_update</code>

1673

supports order statistics.

1674

@@ -1128,7 +1128,7 @@

1675

simple list of integer keys. If we search for the integer 6, we

1676

are paying an overhead: the link with key 6 is only the fifth

1677

link; if it were the first link, it could be accessed

1678

- faster.</p><div class="figure"><a id="idp18506160"></a><p class="title"><strong>Figure 22.30. A simple list</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_simple_list.png" align="middle" alt="A simple list" /></div></div></div><br class="figure-break" /><p>List-update algorithms reorder lists as elements are

1679

+ faster.</p><div class="figure"><a id="idm269997025344"></a><p class="title"><strong>Figure 22.30. A simple list</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_simple_list.png" align="middle" alt="A simple list" /></div></div></div><br class="figure-break" /><p>List-update algorithms reorder lists as elements are

1680

accessed. They try to determine, by the access history, which

1681

keys to move to the front of the list. Some of these algorithms

1682

require adding some metadata alongside each entry.</p><p>For example, in the graphic below label A shows the counter

1683

@@ -1138,7 +1138,7 @@

1684

predetermined value, say 10, as shown in label C, the count is set

1685

to 0 and the node is moved to the front of the list, as in label

1686

D.

1687

- </p><div class="figure"><a id="idp18511744"></a><p class="title"><strong>Figure 22.31. The counter algorithm</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_list_update.png" align="middle" alt="The counter algorithm" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.list.details.policies"></a>Policies</h6></div></div></div><p>this library allows instantiating lists with policies

1688

+ </p><div class="figure"><a id="idm269997019760"></a><p class="title"><strong>Figure 22.31. The counter algorithm</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_list_update.png" align="middle" alt="The counter algorithm" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h6 class="title"><a id="container.list.details.policies"></a>Policies</h6></div></div></div><p>this library allows instantiating lists with policies

1689

implementing any algorithm moving nodes to the front of the

1690

list (policies implementing algorithms interchanging nodes are

1691

unsupported).</p><p>Associative containers based on lists are parametrized by a

1692

@@ -1310,7 +1310,7 @@

1693

sequence; the second uses a tree (or forest of trees), which is

1694

typically less structured than an associative container's tree;

1695

the third simply uses an associative container. These are

1696

- shown in the graphic below, in labels A1 and A2, label B, and label C.</p><div class="figure"><a id="idp18575568"></a><p class="title"><strong>Figure 22.32. Underlying Priority-Queue Data-Structures.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_different_underlying_dss.png" align="middle" alt="Underlying Priority-Queue Data-Structures." /></div></div></div><br class="figure-break" /><p>Roughly speaking, any value that is both pushed and popped

1697

+ shown in the graphic below, in labels A1 and A2, label B, and label C.</p><div class="figure"><a id="idm269996955920"></a><p class="title"><strong>Figure 22.32. Underlying Priority-Queue Data-Structures.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_different_underlying_dss.png" align="middle" alt="Underlying Priority-Queue Data-Structures." /></div></div></div><br class="figure-break" /><p>Roughly speaking, any value that is both pushed and popped

1698

from a priority queue must incur a logarithmic expense (in the

1699

amortized sense). Any priority queue implementation that would

1700

avoid this, would violate known bounds on comparison-based

1701

@@ -1390,7 +1390,7 @@

1702

container <code class="classname">Cntnr</code>, the tag of the underlying

1703

data structure can be found via <code class="classname">typename

1704

Cntnr::container_category</code>; this is one of the possible tags shown in the graphic below.

1705

- </p><div class="figure"><a id="idp18610544"></a><p class="title"><strong>Figure 22.33. Priority-Queue Data-Structure Tags.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_tag_hierarchy.png" align="middle" alt="Priority-Queue Data-Structure Tags." /></div></div></div><br class="figure-break" /><p>Additionally, a traits mechanism can be used to query a

1706

+ </p><div class="figure"><a id="idm269996920880"></a><p class="title"><strong>Figure 22.33. Priority-Queue Data-Structure Tags.</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_priority_queue_tag_hierarchy.png" align="middle" alt="Priority-Queue Data-Structure Tags." /></div></div></div><br class="figure-break" /><p>Additionally, a traits mechanism can be used to query a

1707

container type for its attributes. Given any container

1708

<code class="classname">Cntnr</code>, then </p><pre class="programlisting">__gnu_pbds::container_traits<Cntnr></pre><p>

1709

is a traits class identifying the properties of the

1710

Index: libstdc++-v3/doc/html/manual/using.html

1711

===================================================================

1712

--- a/src/libstdc++-v3/doc/html/manual/using.html (.../tags/gcc_4_8_2_release)

1713

+++ b/src/libstdc++-v3/doc/html/manual/using.html (.../branches/gcc-4_8-branch)

1714

@@ -1,8 +1,8 @@

1715

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1716

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 3. Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="make.html" title="Make" /><link rel="next" href="using_headers.html" title="Headers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 3. Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="make.html">Prev</a> </td><th width="60%" align="center">Part I.

1717

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 3. Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="make.html" title="Make" /><link rel="next" href="using_headers.html" title="Headers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 3. Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="make.html">Prev</a> </td><th width="60%" align="center">Part I.

1718

Introduction

1719

1720

-</th><td width="20%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.using"></a>Chapter 3. Using</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.flags"></a>Command Options</h2></div></div></div><p>

1721

+</th><td width="20%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.using"></a>Chapter 3. Using</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.flags"></a>Command Options</h2></div></div></div><p>

1722

The set of features available in the GNU C++ library is shaped

1723

by

1724

several <a class="link" href="http://gcc.gnu.org/onlinedocs/gcc-4.3.2/gcc/Invoking-GCC.html" target="_top">GCC

1725

@@ -10,5 +10,5 @@

1726

enumerated and detailed in the table below.

1727

</p><p>

1728

By default, <span class="command"><strong>g++</strong></span> is equivalent to <span class="command"><strong>g++ -std=gnu++98</strong></span>. The standard library also defaults to this dialect.

1729

- </p><div class="table"><a id="idp13051936"></a><p class="title"><strong>Table 3.1. C++ Command Options</strong></p><div class="table-contents"><table summary="C++ Command Options" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Option Flags</th><th align="left">Description</th></tr></thead><tbody><tr><td align="left"><code class="literal">-std=c++98</code></td><td align="left">Use the 1998 ISO C++ standard plus amendments.</td></tr><tr><td align="left"><code class="literal">-std=gnu++98</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-std=c++11</code></td><td align="left">Use the 2011 ISO C++ standard.</td></tr><tr><td align="left"><code class="literal">-std=gnu++11</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-fexceptions</code></td><td align="left">See <a class="link" href="using_exceptions.html#intro.using.exception.no" title="Doing without">exception-free dialect</a></td></tr><tr><td align="left"><code class="literal">-frtti</code></td><td align="left">As above, but RTTI-free dialect.</td></tr><tr><td align="left"><code class="literal">-pthread</code> or <code class="literal">-pthreads</code></td><td align="left">For ISO C++11 <thread>, <future>,

1730

+ </p><div class="table"><a id="idm270002481088"></a><p class="title"><strong>Table 3.1. C++ Command Options</strong></p><div class="table-contents"><table summary="C++ Command Options" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Option Flags</th><th align="left">Description</th></tr></thead><tbody><tr><td align="left"><code class="literal">-std=c++98</code></td><td align="left">Use the 1998 ISO C++ standard plus amendments.</td></tr><tr><td align="left"><code class="literal">-std=gnu++98</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-std=c++11</code></td><td align="left">Use the 2011 ISO C++ standard.</td></tr><tr><td align="left"><code class="literal">-std=gnu++11</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-fexceptions</code></td><td align="left">See <a class="link" href="using_exceptions.html#intro.using.exception.no" title="Doing without">exception-free dialect</a></td></tr><tr><td align="left"><code class="literal">-frtti</code></td><td align="left">As above, but RTTI-free dialect.</td></tr><tr><td align="left"><code class="literal">-pthread</code> or <code class="literal">-pthreads</code></td><td align="left">For ISO C++11 <thread>, <future>,

1731

<mutex>, or <condition_variable>.</td></tr><tr><td align="left"><code class="literal">-fopenmp</code></td><td align="left">For <a class="link" href="parallel_mode.html" title="Chapter 18. Parallel Mode">parallel</a> mode.</td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="make.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="intro.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Make </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Headers</td></tr></table></div></body></html>

1732

\ No newline at end of file

1733

Index: libstdc++-v3/doc/html/manual/profile_mode_impl.html

1734

===================================================================

1735

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_impl.html (.../tags/gcc_4_8_2_release)

1736

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_impl.html (.../branches/gcc-4_8-branch)

1737

@@ -1,5 +1,5 @@

1738

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1739

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation Issues</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_cost_model.html" title="Empirical Cost Model" /><link rel="next" href="profile_mode_devel.html" title="Developer Information" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation Issues</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_cost_model.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_devel.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.implementation"></a>Implementation Issues</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.implementation.stack"></a>Stack Traces</h3></div></div></div><p>

1740

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation Issues</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_cost_model.html" title="Empirical Cost Model" /><link rel="next" href="profile_mode_devel.html" title="Developer Information" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation Issues</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_cost_model.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_devel.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.implementation"></a>Implementation Issues</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.implementation.stack"></a>Stack Traces</h3></div></div></div><p>

1741

Accurate stack traces are needed during profiling since we group events by

1742

call context and dynamic instance. Without accurate traces, diagnostics

1743

may be hard to interpret. For instance, when giving advice to the user

1744

Index: libstdc++-v3/doc/html/manual/ext_containers.html

1745

===================================================================

1746

--- a/src/libstdc++-v3/doc/html/manual/ext_containers.html (.../tags/gcc_4_8_2_release)

1747

+++ b/src/libstdc++-v3/doc/html/manual/ext_containers.html (.../branches/gcc-4_8-branch)

1748

@@ -1,8 +1,8 @@

1749

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1750

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 23. HP/SGI Extensions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="policy_data_structures_ack.html" title="Acknowledgments" /><link rel="next" href="ext_sgi.html" title="Deprecated" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 23. HP/SGI Extensions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_ack.html">Prev</a> </td><th width="60%" align="center">Part III.

1751

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 23. HP/SGI Extensions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="policy_data_structures_ack.html" title="Acknowledgments" /><link rel="next" href="ext_sgi.html" title="Deprecated" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 23. HP/SGI Extensions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_ack.html">Prev</a> </td><th width="60%" align="center">Part III.

1752

Extensions

1753

1754

-</th><td width="20%" align="right"> <a accesskey="n" href="ext_sgi.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers"></a>Chapter 23. HP/SGI Extensions</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="ext_containers.html#manual.ext.containers.sgi">Backwards Compatibility</a></span></dt><dt><span class="section"><a href="ext_sgi.html">Deprecated</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.sgi"></a>Backwards Compatibility</h2></div></div></div><p>A few extensions and nods to backwards-compatibility have

1755

+</th><td width="20%" align="right"> <a accesskey="n" href="ext_sgi.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers"></a>Chapter 23. HP/SGI Extensions</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="ext_containers.html#manual.ext.containers.sgi">Backwards Compatibility</a></span></dt><dt><span class="section"><a href="ext_sgi.html">Deprecated</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.sgi"></a>Backwards Compatibility</h2></div></div></div><p>A few extensions and nods to backwards-compatibility have

1756

been made with containers. Those dealing with older SGI-style

1757

allocators are dealt with elsewhere. The remaining ones all deal

1758

with bits:

1759

Index: libstdc++-v3/doc/html/manual/ext_concurrency_use.html

1760

===================================================================

1761

--- a/src/libstdc++-v3/doc/html/manual/ext_concurrency_use.html (.../tags/gcc_4_8_2_release)

1762

+++ b/src/libstdc++-v3/doc/html/manual/ext_concurrency_use.html (.../branches/gcc-4_8-branch)

1763

@@ -1,5 +1,5 @@

1764

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1765

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Use</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency_impl.html" title="Implementation" /><link rel="next" href="appendix.html" title="Part IV. Appendices" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Use</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="appendix.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.use"></a>Use</h2></div></div></div><p>Typical usage of the last two constructs is demonstrated as follows:

1766

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Use</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency_impl.html" title="Implementation" /><link rel="next" href="appendix.html" title="Part IV. Appendices" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Use</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency_impl.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="appendix.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.use"></a>Use</h2></div></div></div><p>Typical usage of the last two constructs is demonstrated as follows:

1767

</p><pre class="programlisting">

1768

#include <ext/concurrence.h>

1769

1770

Index: libstdc++-v3/doc/html/manual/ext_io.html

1771

===================================================================

1772

--- a/src/libstdc++-v3/doc/html/manual/ext_io.html (.../tags/gcc_4_8_2_release)

1773

+++ b/src/libstdc++-v3/doc/html/manual/ext_io.html (.../branches/gcc-4_8-branch)

1774

@@ -1,8 +1,8 @@

1775

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1776

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 28. Input and Output</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_iterators.html" title="Chapter 27. Iterators" /><link rel="next" href="ext_demangling.html" title="Chapter 29. Demangling" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 28. Input and Output</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_iterators.html">Prev</a> </td><th width="60%" align="center">Part III.

1777

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 28. Input and Output</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_iterators.html" title="Chapter 27. Iterators" /><link rel="next" href="ext_demangling.html" title="Chapter 29. Demangling" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 28. Input and Output</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_iterators.html">Prev</a> </td><th width="60%" align="center">Part III.

1778

Extensions

1779

1780

-</th><td width="20%" align="right"> <a accesskey="n" href="ext_demangling.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.io"></a>Chapter 28. Input and Output</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="ext_io.html#manual.ext.io.filebuf_derived">Derived filebufs</a></span></dt></dl></div><p>

1781

+</th><td width="20%" align="right"> <a accesskey="n" href="ext_demangling.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.io"></a>Chapter 28. Input and Output</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="ext_io.html#manual.ext.io.filebuf_derived">Derived filebufs</a></span></dt></dl></div><p>

1782

Extensions allowing <code class="code">filebuf</code>s to be constructed from

1783

"C" types like FILE*s and file descriptors.

1784

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.io.filebuf_derived"></a>Derived filebufs</h2></div></div></div><p>The v2 library included non-standard extensions to construct

1785

Index: libstdc++-v3/doc/html/manual/termination.html

1786

===================================================================

1787

--- a/src/libstdc++-v3/doc/html/manual/termination.html (.../tags/gcc_4_8_2_release)

1788

+++ b/src/libstdc++-v3/doc/html/manual/termination.html (.../branches/gcc-4_8-branch)

1789

@@ -1,5 +1,5 @@

1790

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1791

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Termination</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="support.html" title="Chapter 4. Support" /><link rel="prev" href="dynamic_memory.html" title="Dynamic Memory" /><link rel="next" href="diagnostics.html" title="Chapter 5. Diagnostics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Termination</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="dynamic_memory.html">Prev</a> </td><th width="60%" align="center">Chapter 4.

1792

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Termination</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="support.html" title="Chapter 4. Support" /><link rel="prev" href="dynamic_memory.html" title="Dynamic Memory" /><link rel="next" href="diagnostics.html" title="Chapter 5. Diagnostics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Termination</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="dynamic_memory.html">Prev</a> </td><th width="60%" align="center">Chapter 4.

1793

Support

1794

1795

</th><td width="20%" align="right"> <a accesskey="n" href="diagnostics.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.support.termination"></a>Termination</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="support.termination.handlers"></a>Termination Handlers</h3></div></div></div><p>

1796

Index: libstdc++-v3/doc/html/manual/using_macros.html

1797

===================================================================

1798

--- a/src/libstdc++-v3/doc/html/manual/using_macros.html (.../tags/gcc_4_8_2_release)

1799

+++ b/src/libstdc++-v3/doc/html/manual/using_macros.html (.../branches/gcc-4_8-branch)

1800

@@ -1,5 +1,5 @@

1801

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1802

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Macros</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_headers.html" title="Headers" /><link rel="next" href="using_namespaces.html" title="Namespaces" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Macros</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_headers.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_namespaces.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.macros"></a>Macros</h2></div></div></div><p>

1803

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Macros</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_headers.html" title="Headers" /><link rel="next" href="using_namespaces.html" title="Namespaces" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Macros</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_headers.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_namespaces.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.macros"></a>Macros</h2></div></div></div><p>

1804

All library macros begin with <code class="code">_GLIBCXX_</code>.

1805

</p><p>

1806

Furthermore, all pre-processor macros, switches, and

1807

Index: libstdc++-v3/doc/html/manual/concurrency.html

1808

===================================================================

1809

--- a/src/libstdc++-v3/doc/html/manual/concurrency.html (.../tags/gcc_4_8_2_release)

1810

+++ b/src/libstdc++-v3/doc/html/manual/concurrency.html (.../branches/gcc-4_8-branch)

1811

@@ -1,5 +1,5 @@

1812

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1813

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 15. Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library, mutex, thread, future, condition_variable" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="atomics.html" title="Chapter 14. Atomics" /><link rel="next" href="extensions.html" title="Part III. Extensions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 15.

1814

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 15. Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library, mutex, thread, future, condition_variable" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="atomics.html" title="Chapter 14. Atomics" /><link rel="next" href="extensions.html" title="Part III. Extensions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 15.

1815

Concurrency

1816

1817

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="atomics.html">Prev</a> </td><th width="60%" align="center">Part II.

1818

@@ -6,8 +6,8 @@

1819

Standard Contents

1820

</th><td width="20%" align="right"> <a accesskey="n" href="extensions.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.concurrency"></a>Chapter 15.

1821

Concurrency

1822

- <a id="idp16404464" class="indexterm"></a>

1823

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="concurrency.html#std.concurrency.api">API Reference</a></span></dt></dl></div><p>

1824

+ <a id="idm269999126816" class="indexterm"></a>

1825

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="concurrency.html#std.concurrency.api">API Reference</a></span></dt></dl></div><p>

1826

Facilities for concurrent operation, and control thereof.

1827

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.concurrency.api"></a>API Reference</h2></div></div></div><p>

1828

All items are declared in one of four standard header files.

1829

Index: libstdc++-v3/doc/html/manual/ext_utilities.html

1830

===================================================================

1831

--- a/src/libstdc++-v3/doc/html/manual/ext_utilities.html (.../tags/gcc_4_8_2_release)

1832

+++ b/src/libstdc++-v3/doc/html/manual/ext_utilities.html (.../branches/gcc-4_8-branch)

1833

@@ -1,5 +1,5 @@

1834

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1835

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 24. Utilities</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_sgi.html" title="Deprecated" /><link rel="next" href="ext_algorithms.html" title="Chapter 25. Algorithms" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 24. Utilities</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_sgi.html">Prev</a> </td><th width="60%" align="center">Part III.

1836

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 24. Utilities</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_sgi.html" title="Deprecated" /><link rel="next" href="ext_algorithms.html" title="Chapter 25. Algorithms" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 24. Utilities</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_sgi.html">Prev</a> </td><th width="60%" align="center">Part III.

1837

Extensions

1838

1839

</th><td width="20%" align="right"> <a accesskey="n" href="ext_algorithms.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.util"></a>Chapter 24. Utilities</h2></div></div></div><p>

1840

Index: libstdc++-v3/doc/html/manual/policy_data_structures.html

1841

===================================================================

1842

--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures.html (.../tags/gcc_4_8_2_release)

1843

+++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures.html (.../branches/gcc-4_8-branch)

1844

@@ -1,8 +1,8 @@

1845

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1846

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 22. Policy-Based Data Structures</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="bitmap_allocator_impl.html" title="Implementation" /><link rel="next" href="policy_data_structures_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 22. Policy-Based Data Structures</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bitmap_allocator_impl.html">Prev</a> </td><th width="60%" align="center">Part III.

1847

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 22. Policy-Based Data Structures</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="bitmap_allocator_impl.html" title="Implementation" /><link rel="next" href="policy_data_structures_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 22. Policy-Based Data Structures</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bitmap_allocator_impl.html">Prev</a> </td><th width="60%" align="center">Part III.

1848

Extensions

1849

1850

-</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_using.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers.pbds"></a>Chapter 22. Policy-Based Data Structures</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues">Performance Issues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.associative">Associative</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.priority_queue">Priority Que</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation">Goals</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.associative">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.iterators">Iterators</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.functions">Functional</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.priority_queue">Priority Queues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.binary_heap">Binary Heaps</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="section"><a href="policy_data_structures_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.organization">Organization</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial">Tutorial</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.basic">Basic Use</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.configuring">

1851

+</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_using.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.containers.pbds"></a>Chapter 22. Policy-Based Data Structures</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="policy_data_structures.html#pbds.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues">Performance Issues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.associative">Associative</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.priority_queue">Priority Que</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation">Goals</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.associative">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.iterators">Iterators</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.functions">Functional</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.priority_queue">Priority Queues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.binary_heap">Binary Heaps</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="section"><a href="policy_data_structures_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.organization">Organization</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial">Tutorial</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.basic">Basic Use</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.configuring">

1852

Configuring via Template Parameters

1853

</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.traits">

1854

Querying Container Attributes

1855

@@ -248,7 +248,7 @@

1856

these invariants, one must supply some policy that is aware

1857

of these changes. Without this, it would be better to use a

1858

linked list (in itself very efficient for these purposes).

1859

- </p></li></ol></div><div class="figure"><a id="idp17613296"></a><p class="title"><strong>Figure 22.1. Node Invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_node_invariants.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="motivation.associative.underlying"></a>Underlying Data Structures</h5></div></div></div><p>

1860

+ </p></li></ol></div><div class="figure"><a id="idm269997917584"></a><p class="title"><strong>Figure 22.1. Node Invariants</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_node_invariants.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="motivation.associative.underlying"></a>Underlying Data Structures</h5></div></div></div><p>

1861

The standard C++ library contains associative containers based on

1862

red-black trees and collision-chaining hash tables. These are

1863

very useful, but they are not ideal for all types of

1864

@@ -256,7 +256,7 @@

1865

</p><p>

1866

The figure below shows the different underlying data structures

1867

currently supported in this library.

1868

- </p><div class="figure"><a id="idp17619952"></a><p class="title"><strong>Figure 22.2. Underlying Associative Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_1.png" align="middle" alt="Underlying Associative Data Structures" /></div></div></div><br class="figure-break" /><p>

1869

+ </p><div class="figure"><a id="idm269997910864"></a><p class="title"><strong>Figure 22.2. Underlying Associative Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_1.png" align="middle" alt="Underlying Associative Data Structures" /></div></div></div><br class="figure-break" /><p>

1870

A shows a collision-chaining hash-table, B shows a probing

1871

hash-table, C shows a red-black tree, D shows a splay tree, E shows

1872

a tree based on an ordered vector(implicit in the order of the

1873

@@ -375,7 +375,7 @@

1874

no guarantee that the elements traversed will coincide with the

1875

<span class="emphasis"><em>logical</em></span> elements between 1 and 5, as in

1876

label B.

1877

- </p><div class="figure"><a id="idp17651648"></a><p class="title"><strong>Figure 22.3. Range Iteration in Different Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_1.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /><p>

1878

+ </p><div class="figure"><a id="idm269997879168"></a><p class="title"><strong>Figure 22.3. Range Iteration in Different Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_1.png" align="middle" alt="Node Invariants" /></div></div></div><br class="figure-break" /><p>

1879

In our opinion, this problem is not caused just because

1880

red-black trees are order preserving while

1881

collision-chaining hash tables are (generally) not - it

1882

@@ -426,7 +426,7 @@

1883

list, as in the graphic below, label B. Here the iterators are as

1884

light as can be, but the hash-table's operations are more

1885

complicated.

1886

- </p><div class="figure"><a id="idp17666528"></a><p class="title"><strong>Figure 22.4. Point Iteration in Hash Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_2.png" align="middle" alt="Point Iteration in Hash Data Structures" /></div></div></div><br class="figure-break" /><p>

1887

+ </p><div class="figure"><a id="idm269997864256"></a><p class="title"><strong>Figure 22.4. Point Iteration in Hash Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_point_iterators_range_ops_2.png" align="middle" alt="Point Iteration in Hash Data Structures" /></div></div></div><br class="figure-break" /><p>

1888

It should be noted that containers based on collision-chaining

1889

hash-tables are not the only ones with this type of behavior;

1890

many other self-organizing data structures display it as well.

1891

@@ -442,7 +442,7 @@

1892

container. The graphic below shows three cases: A1 and A2 show

1893

a red-black tree; B1 and B2 show a probing hash-table; C1 and C2

1894

show a collision-chaining hash table.

1895

- </p><div class="figure"><a id="idp17675840"></a><p class="title"><strong>Figure 22.5. Effect of erase in different underlying data structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_guarantee_erase.png" align="middle" alt="Effect of erase in different underlying data structures" /></div></div></div><br class="figure-break" /><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>

1896

+ </p><div class="figure"><a id="idm269997855056"></a><p class="title"><strong>Figure 22.5. Effect of erase in different underlying data structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_invalidation_guarantee_erase.png" align="middle" alt="Effect of erase in different underlying data structures" /></div></div></div><br class="figure-break" /><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>

1897

Erasing 5 from A1 yields A2. Clearly, an iterator to 3 can

1898

be de-referenced and incremented. The sequence of iterators

1899

changed, but in a way that is well-defined by the interface.

1900

@@ -678,7 +678,7 @@

1901

typically less structured than an associative container's tree;

1902

the third simply uses an associative container. These are

1903

shown in the figure below with labels A1 and A2, B, and C.

1904

- </p><div class="figure"><a id="idp17743424"></a><p class="title"><strong>Figure 22.6. Underlying Priority Queue Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_2.png" align="middle" alt="Underlying Priority Queue Data Structures" /></div></div></div><br class="figure-break" /><p>

1905

+ </p><div class="figure"><a id="idm269997787392"></a><p class="title"><strong>Figure 22.6. Underlying Priority Queue Data Structures</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_different_underlying_dss_2.png" align="middle" alt="Underlying Priority Queue Data Structures" /></div></div></div><br class="figure-break" /><p>

1906

No single implementation can completely replace any of the

1907

others. Some have better <code class="function">push</code>

1908

and <code class="function">pop</code> amortized performance, some have

1909

@@ -1098,7 +1098,7 @@

1910

</span>. </span><span class="publisher"><span class="publishername">

1911

Proceedings of International Conference on Very Large Data Bases

1912

. </span></span></p></div><div class="biblioentry"><a id="biblio.maverik_lowerbounds"></a><p>[biblio.maverik_lowerbounds] <span class="title"><em>

1913

- <a class="link" href="http://magic.aladdin.cs.cmu.edu/2005/08/01/deamortization-part-2-binomial-heaps" target="_top">

1914

+ <a class="link" href="http://magic.aladdin.cs.cmu.edu/2005/08/01/deamortization-part-2-binomial-heaps/" target="_top">

1915

Deamortization - Part 2: Binomial Heaps

1916

</a>

1917

</em>. </span><span class="date">

1918

@@ -1190,7 +1190,7 @@

1919

</span>. </span><span class="publisher"><span class="publishername">

1920

Addison-Wesley Publishing Company

1921

. </span></span></p></div><div class="biblioentry"><a id="biblio.nelson96stlpq"></a><p>[biblio.nelson96stlpq] <span class="title"><em>

1922

- <a class="link" href="http://www.dogma.net/markn/articles/pq_stl/priority.htm" target="_top">Priority Queues and the STL

1923

+ <a class="link" href="http://marknelson.us/1996/01/01/priority-queues/" target="_top">Priority Queues and the STL

1924

</a>

1925

</em>. </span><span class="date">

1926

January 1996

1927

Index: libstdc++-v3/doc/html/manual/ext_iterators.html

1928

===================================================================

1929

--- a/src/libstdc++-v3/doc/html/manual/ext_iterators.html (.../tags/gcc_4_8_2_release)

1930

+++ b/src/libstdc++-v3/doc/html/manual/ext_iterators.html (.../branches/gcc-4_8-branch)

1931

@@ -1,5 +1,5 @@

1932

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1933

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 27. Iterators</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_numerics.html" title="Chapter 26. Numerics" /><link rel="next" href="ext_io.html" title="Chapter 28. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 27. Iterators</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_numerics.html">Prev</a> </td><th width="60%" align="center">Part III.

1934

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 27. Iterators</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_numerics.html" title="Chapter 26. Numerics" /><link rel="next" href="ext_io.html" title="Chapter 28. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 27. Iterators</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_numerics.html">Prev</a> </td><th width="60%" align="center">Part III.

1935

Extensions

1936

1937

</th><td width="20%" align="right"> <a accesskey="n" href="ext_io.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.iterators"></a>Chapter 27. Iterators</h2></div></div></div><p>24.3.2 describes <code class="code">struct iterator</code>, which didn't exist in the

1938

Index: libstdc++-v3/doc/html/manual/bitmap_allocator_impl.html

1939

===================================================================

1940

--- a/src/libstdc++-v3/doc/html/manual/bitmap_allocator_impl.html (.../tags/gcc_4_8_2_release)

1941

+++ b/src/libstdc++-v3/doc/html/manual/bitmap_allocator_impl.html (.../branches/gcc-4_8-branch)

1942

@@ -1,5 +1,5 @@

1943

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1944

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /><link rel="prev" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /><link rel="next" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bitmap_allocator.html">Prev</a> </td><th width="60%" align="center">Chapter 21. The bitmap_allocator</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.bitmap.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="bitmap.impl.free_list_store"></a>Free List Store</h3></div></div></div><p>

1945

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /><link rel="prev" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /><link rel="next" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bitmap_allocator.html">Prev</a> </td><th width="60%" align="center">Chapter 21. The bitmap_allocator</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.bitmap.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="bitmap.impl.free_list_store"></a>Free List Store</h3></div></div></div><p>

1946

The Free List Store (referred to as FLS for the remaining part of this

1947

document) is the Global memory pool that is shared by all instances of

1948

the bitmapped allocator instantiated for any type. This maintains a

1949

@@ -75,7 +75,7 @@

1950

</p><p>

1951

Consider a block of size 64 ints. In memory, it would look like this:

1952

(assume a 32-bit system where, size_t is a 32-bit entity).

1953

- </p><div class="table"><a id="idp17500848"></a><p class="title"><strong>Table 21.1. Bitmap Allocator Memory Map</strong></p><div class="table-contents"><table summary="Bitmap Allocator Memory Map" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left">268</td><td align="left">0</td><td align="left">4294967295</td><td align="left">4294967295</td><td align="left">Data -> Space for 64 ints</td></tr></tbody></table></div></div><br class="table-break" /><p>

1954

+ </p><div class="table"><a id="idm269998030352"></a><p class="title"><strong>Table 21.1. Bitmap Allocator Memory Map</strong></p><div class="table-contents"><table summary="Bitmap Allocator Memory Map" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left">268</td><td align="left">0</td><td align="left">4294967295</td><td align="left">4294967295</td><td align="left">Data -> Space for 64 ints</td></tr></tbody></table></div></div><br class="table-break" /><p>

1955

The first Column(268) represents the size of the Block in bytes as

1956

seen by the Bitmap Allocator. Internally, a global free list is

1957

used to keep track of the free blocks used and given back by the

1958

Index: libstdc++-v3/doc/html/manual/appendix_contributing.html

1959

===================================================================

1960

--- a/src/libstdc++-v3/doc/html/manual/appendix_contributing.html (.../tags/gcc_4_8_2_release)

1961

+++ b/src/libstdc++-v3/doc/html/manual/appendix_contributing.html (.../branches/gcc-4_8-branch)

1962

@@ -1,5 +1,5 @@

1963

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1964

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix A. Contributing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix.html" title="Part IV. Appendices" /><link rel="next" href="source_organization.html" title="Directory Layout and Source Conventions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix A.

1965

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix A. Contributing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix.html" title="Part IV. Appendices" /><link rel="next" href="source_organization.html" title="Directory Layout and Source Conventions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix A.

1966

Contributing

1967

1968

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix.html">Prev</a> </td><th width="60%" align="center">Part IV.

1969

@@ -6,8 +6,8 @@

1970

Appendices

1971

</th><td width="20%" align="right"> <a accesskey="n" href="source_organization.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.contrib"></a>

1972

Contributing

1973

- <a id="idp21875168" class="indexterm"></a>

1974

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></div><p>

1975

+ <a id="idm269993657472" class="indexterm"></a>

1976

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></div><p>

1977

The GNU C++ Library follows an open development model. Active

1978

contributors are assigned maintainer-ship responsibility, and given

1979

write access to the source repository. First time contributors

1980

@@ -36,7 +36,7 @@

1981

for this group is quite useful.

1982

</p></li><li class="listitem"><p>

1983

Peruse

1984

- the <a class="link" href="http://www.gnu.org/prep/standards" target="_top">GNU

1985

+ the <a class="link" href="http://www.gnu.org/prep/standards/" target="_top">GNU

1986

Coding Standards</a>, and chuckle when you hit the part

1987

about <span class="quote">“<span class="quote">Using Languages Other Than C</span>”</span>.

1988

</p></li><li class="listitem"><p>

1989

Index: libstdc++-v3/doc/html/manual/parallel_mode_test.html

1990

===================================================================

1991

--- a/src/libstdc++-v3/doc/html/manual/parallel_mode_test.html (.../tags/gcc_4_8_2_release)

1992

+++ b/src/libstdc++-v3/doc/html/manual/parallel_mode_test.html (.../branches/gcc-4_8-branch)

1993

@@ -1,5 +1,5 @@

1994

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

1995

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Testing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_design.html" title="Design" /><link rel="next" href="profile_mode.html" title="Chapter 19. Profile Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Testing</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_design.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.test"></a>Testing</h2></div></div></div><p>

1996

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Testing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_design.html" title="Design" /><link rel="next" href="profile_mode.html" title="Chapter 19. Profile Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Testing</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_design.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.test"></a>Testing</h2></div></div></div><p>

1997

Both the normal conformance and regression tests and the

1998

supplemental performance tests work.

1999

</p><p>

2000

Index: libstdc++-v3/doc/html/manual/profile_mode.html

2001

===================================================================

2002

--- a/src/libstdc++-v3/doc/html/manual/profile_mode.html (.../tags/gcc_4_8_2_release)

2003

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode.html (.../branches/gcc-4_8-branch)

2004

@@ -1,8 +1,8 @@

2005

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2006

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 19. Profile Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="parallel_mode_test.html" title="Testing" /><link rel="next" href="profile_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 19. Profile Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_test.html">Prev</a> </td><th width="60%" align="center">Part III.

2007

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 19. Profile Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="parallel_mode_test.html" title="Testing" /><link rel="next" href="profile_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 19. Profile Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_test.html">Prev</a> </td><th width="60%" align="center">Part III.

2008

Extensions

2009

2010

-</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_design.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.profile_mode"></a>Chapter 19. Profile Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.using">Using the Profile Mode</a></span></dt><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.tuning">Tuning the Profile Mode</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.wrapper">Wrapper Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.instrumentation">Instrumentation</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.rtlib">Run Time Behavior</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.analysis">Analysis and Diagnostics</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.cost-model">Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.reports">Reports</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.testing">Testing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_api.html">Extensions for Custom Containers</a></span></dt><dt><span class="section"><a href="profile_mode_cost_model.html">Empirical Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html">Implementation Issues</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stack">Stack Traces</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.symbols">Symbolization of Instruction Addresses</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.concurrency">Concurrency</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stdlib-in-proflib">Using the Standard Library in the Instrumentation Implementation</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.malloc-hooks">Malloc Hooks</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.construction-destruction">Construction and Destruction of Global Objects</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_devel.html">Developer Information</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.bigpic">Big Picture</a></span></dt><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.howto">How To Add A Diagnostic</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html">Diagnostics</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.template">Diagnostic Template</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers">Containers</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small">Hashtable Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large">Hashtable Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash">Inefficient Hash</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_small">Vector Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_large">Vector Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_hashtable">Vector to Hashtable</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_to_vector">Hashtable to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_list">Vector to List</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_vector">List to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_slist">List to Forward List (Slist)</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.assoc_ord_to_unord">Ordered to Unordered Associative Container</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms">Algorithms</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms.sort">Sort Algorithm Performance</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality">Data Locality</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.sw_prefetch">Need Software Prefetch</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.linked">Linked Structure Locality</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread">Multithreaded Data Access</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.ddtest">Data Dependence Violations at Container Level</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.false_share">False Sharing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.statistics">Statistics</a></span></dt></dl></dd><dt><span class="bibliography"><a href="profile_mode.html#profile_mode.biblio">Bibliography</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.intro"></a>Intro</h2></div></div></div><p>

2011

+</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_design.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.profile_mode"></a>Chapter 19. Profile Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.using">Using the Profile Mode</a></span></dt><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.tuning">Tuning the Profile Mode</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.wrapper">Wrapper Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.instrumentation">Instrumentation</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.rtlib">Run Time Behavior</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.analysis">Analysis and Diagnostics</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.cost-model">Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.reports">Reports</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.testing">Testing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_api.html">Extensions for Custom Containers</a></span></dt><dt><span class="section"><a href="profile_mode_cost_model.html">Empirical Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html">Implementation Issues</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stack">Stack Traces</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.symbols">Symbolization of Instruction Addresses</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.concurrency">Concurrency</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stdlib-in-proflib">Using the Standard Library in the Instrumentation Implementation</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.malloc-hooks">Malloc Hooks</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.construction-destruction">Construction and Destruction of Global Objects</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_devel.html">Developer Information</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.bigpic">Big Picture</a></span></dt><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.howto">How To Add A Diagnostic</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html">Diagnostics</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.template">Diagnostic Template</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers">Containers</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small">Hashtable Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large">Hashtable Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash">Inefficient Hash</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_small">Vector Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_large">Vector Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_hashtable">Vector to Hashtable</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_to_vector">Hashtable to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_list">Vector to List</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_vector">List to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_slist">List to Forward List (Slist)</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.assoc_ord_to_unord">Ordered to Unordered Associative Container</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms">Algorithms</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms.sort">Sort Algorithm Performance</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality">Data Locality</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.sw_prefetch">Need Software Prefetch</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.linked">Linked Structure Locality</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread">Multithreaded Data Access</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.ddtest">Data Dependence Violations at Container Level</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.false_share">False Sharing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.statistics">Statistics</a></span></dt></dl></dd><dt><span class="bibliography"><a href="profile_mode.html#profile_mode.biblio">Bibliography</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.intro"></a>Intro</h2></div></div></div><p>

2012

<span class="emphasis"><em>Goal: </em></span>Give performance improvement advice based on

2013

recognition of suboptimal usage patterns of the standard library.

2014

</p><p>

2015

@@ -137,7 +137,7 @@

2016

call context.

2017

(Environment variable not supported.)

2018

</p></li></ul></div><p>

2019

- </p></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="profile_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idp17395456"></a><p><span class="citetitle"><em class="citetitle">

2020

+ </p></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="profile_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idm269998135936"></a><p><span class="citetitle"><em class="citetitle">

2021

Perflint: A Context Sensitive Performance Advisor for C++ Programs

2022

</em>. </span><span class="author"><span class="firstname">Lixia</span> <span class="surname">Liu</span>. </span><span class="author"><span class="firstname">Silvius</span> <span class="surname">Rus</span>. </span><span class="copyright">Copyright © 2009 . </span><span class="publisher"><span class="publishername">

2023

Proceedings of the 2009 International Symposium on Code Generation

2024

Index: libstdc++-v3/doc/html/manual/stringstreams.html

2025

===================================================================

2026

--- a/src/libstdc++-v3/doc/html/manual/stringstreams.html (.../tags/gcc_4_8_2_release)

2027

+++ b/src/libstdc++-v3/doc/html/manual/stringstreams.html (.../branches/gcc-4_8-branch)

2028

@@ -1,5 +1,5 @@

2029

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2030

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory Based Streams</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="streambufs.html" title="Stream Buffers" /><link rel="next" href="fstreams.html" title="File Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory Based Streams</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="streambufs.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2031

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory Based Streams</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="streambufs.html" title="Stream Buffers" /><link rel="next" href="fstreams.html" title="File Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory Based Streams</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="streambufs.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2032

Input and Output

2033

2034

</th><td width="20%" align="right"> <a accesskey="n" href="fstreams.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.memstreams"></a>Memory Based Streams</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.io.memstreams.compat"></a>Compatibility With strstream</h3></div></div></div><p>

2035

Index: libstdc++-v3/doc/html/manual/traits.html

2036

===================================================================

2037

--- a/src/libstdc++-v3/doc/html/manual/traits.html (.../tags/gcc_4_8_2_release)

2038

+++ b/src/libstdc++-v3/doc/html/manual/traits.html (.../branches/gcc-4_8-branch)

2039

@@ -1,5 +1,5 @@

2040

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2041

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Traits</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="memory.html" title="Memory" /><link rel="next" href="strings.html" title="Chapter 7. Strings" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Traits</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="memory.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2042

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Traits</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="memory.html" title="Memory" /><link rel="next" href="strings.html" title="Chapter 7. Strings" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Traits</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="memory.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2043

Utilities

2044

2045

</th><td width="20%" align="right"> <a accesskey="n" href="strings.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.traits"></a>Traits</h2></div></div></div><p>

2046

Index: libstdc++-v3/doc/html/manual/policy_data_structures_ack.html

2047

===================================================================

2048

--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_ack.html (.../tags/gcc_4_8_2_release)

2049

+++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_ack.html (.../branches/gcc-4_8-branch)

2050

@@ -1,10 +1,9 @@

2051

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2052

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Acknowledgments</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_based_data_structures_test.html" title="Testing" /><link rel="next" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Acknowledgments</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_based_data_structures_test.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="ext_containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.ack"></a>Acknowledgments</h2></div></div></div><p>

2053

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Acknowledgments</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_based_data_structures_test.html" title="Testing" /><link rel="next" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Acknowledgments</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_based_data_structures_test.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="ext_containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.ack"></a>Acknowledgments</h2></div></div></div><p>

2054

Written by Ami Tavory and Vladimir Dreizin (IBM Haifa Research

2055

Laboratories), and Benjamin Kosnik (Red Hat).

2056

</p><p>

2057

- This library was partially written at

2058

- <a class="link" href="http://www.haifa.il.ibm.com/" target="_top">IBM's Haifa Research Labs</a>.

2059

+ This library was partially written at IBM's Haifa Research Labs.

2060

It is based heavily on policy-based design and uses many useful

2061

techniques from Modern C++ Design: Generic Programming and Design

2062

Patterns Applied by Andrei Alexandrescu.

2063

Index: libstdc++-v3/doc/html/manual/associative.html

2064

===================================================================

2065

--- a/src/libstdc++-v3/doc/html/manual/associative.html (.../tags/gcc_4_8_2_release)

2066

+++ b/src/libstdc++-v3/doc/html/manual/associative.html (.../branches/gcc-4_8-branch)

2067

@@ -1,5 +1,5 @@

2068

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2069

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Associative</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="containers.html" title="Chapter 9. Containers" /><link rel="next" href="unordered_associative.html" title="Unordered Associative" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Associative</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="containers.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2070

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Associative</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="containers.html" title="Chapter 9. Containers" /><link rel="next" href="unordered_associative.html" title="Unordered Associative" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Associative</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="containers.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2071

Containers

2072

2073

</th><td width="20%" align="right"> <a accesskey="n" href="unordered_associative.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.associative"></a>Associative</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.associative.insert_hints"></a>Insertion Hints</h3></div></div></div><p>

2074

Index: libstdc++-v3/doc/html/manual/ext_concurrency.html

2075

===================================================================

2076

--- a/src/libstdc++-v3/doc/html/manual/ext_concurrency.html (.../tags/gcc_4_8_2_release)

2077

+++ b/src/libstdc++-v3/doc/html/manual/ext_concurrency.html (.../branches/gcc-4_8-branch)

2078

@@ -1,8 +1,8 @@

2079

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2080

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 30. Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_demangling.html" title="Chapter 29. Demangling" /><link rel="next" href="ext_concurrency_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 30. Concurrency</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_demangling.html">Prev</a> </td><th width="60%" align="center">Part III.

2081

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 30. Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_demangling.html" title="Chapter 29. Demangling" /><link rel="next" href="ext_concurrency_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 30. Concurrency</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_demangling.html">Prev</a> </td><th width="60%" align="center">Part III.

2082

Extensions

2083

2084

-</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency_impl.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.concurrency"></a>Chapter 30. Concurrency</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="ext_concurrency.html#manual.ext.concurrency.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="ext_concurrency.html#manual.ext.concurrency.design.threads">Interface to Locks and Mutexes</a></span></dt><dt><span class="section"><a href="ext_concurrency.html#manual.ext.concurrency.design.atomics">Interface to Atomic Functions</a></span></dt></dl></dd><dt><span class="section"><a href="ext_concurrency_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="ext_concurrency_impl.html#manual.ext.concurrency.impl.atomic_fallbacks">Using Builtin Atomic Functions</a></span></dt><dt><span class="section"><a href="ext_concurrency_impl.html#manual.ext.concurrency.impl.thread">Thread Abstraction</a></span></dt></dl></dd><dt><span class="section"><a href="ext_concurrency_use.html">Use</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.design"></a>Design</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.concurrency.design.threads"></a>Interface to Locks and Mutexes</h3></div></div></div><p>The file <code class="filename"><ext/concurrence.h></code>

2085

+</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency_impl.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.concurrency"></a>Chapter 30. Concurrency</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="ext_concurrency.html#manual.ext.concurrency.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="ext_concurrency.html#manual.ext.concurrency.design.threads">Interface to Locks and Mutexes</a></span></dt><dt><span class="section"><a href="ext_concurrency.html#manual.ext.concurrency.design.atomics">Interface to Atomic Functions</a></span></dt></dl></dd><dt><span class="section"><a href="ext_concurrency_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="ext_concurrency_impl.html#manual.ext.concurrency.impl.atomic_fallbacks">Using Builtin Atomic Functions</a></span></dt><dt><span class="section"><a href="ext_concurrency_impl.html#manual.ext.concurrency.impl.thread">Thread Abstraction</a></span></dt></dl></dd><dt><span class="section"><a href="ext_concurrency_use.html">Use</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.design"></a>Design</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.concurrency.design.threads"></a>Interface to Locks and Mutexes</h3></div></div></div><p>The file <code class="filename"><ext/concurrence.h></code>

2086

contains all the higher-level

2087

constructs for playing with threads. In contrast to the atomics layer,

2088

the concurrence layer consists largely of types. All types are defined within <code class="code">namespace __gnu_cxx</code>.

2089

Index: libstdc++-v3/doc/html/manual/support.html

2090

===================================================================

2091

--- a/src/libstdc++-v3/doc/html/manual/support.html (.../tags/gcc_4_8_2_release)

2092

+++ b/src/libstdc++-v3/doc/html/manual/support.html (.../branches/gcc-4_8-branch)

2093

@@ -1,5 +1,5 @@

2094

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2095

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 4. Support</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="std_contents.html" title="Part II. Standard Contents" /><link rel="next" href="dynamic_memory.html" title="Dynamic Memory" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 4.

2096

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 4. Support</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="std_contents.html" title="Part II. Standard Contents" /><link rel="next" href="dynamic_memory.html" title="Dynamic Memory" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 4.

2097

Support

2098

2099

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="std_contents.html">Prev</a> </td><th width="60%" align="center">Part II.

2100

@@ -6,8 +6,8 @@

2101

Standard Contents

2102

</th><td width="20%" align="right"> <a accesskey="n" href="dynamic_memory.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.support"></a>Chapter 4.

2103

Support

2104

- <a id="idp13745936" class="indexterm"></a>

2105

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="support.html#std.support.types">Types</a></span></dt><dd><dl><dt><span class="section"><a href="support.html#std.support.types.fundamental">Fundamental Types</a></span></dt><dt><span class="section"><a href="support.html#std.support.types.numeric_limits">Numeric Properties</a></span></dt><dt><span class="section"><a href="support.html#std.support.types.null">NULL</a></span></dt></dl></dd><dt><span class="section"><a href="dynamic_memory.html">Dynamic Memory</a></span></dt><dt><span class="section"><a href="termination.html">Termination</a></span></dt><dd><dl><dt><span class="section"><a href="termination.html#support.termination.handlers">Termination Handlers</a></span></dt><dt><span class="section"><a href="termination.html#support.termination.verbose">Verbose Terminate Handler</a></span></dt></dl></dd></dl></div><p>

2106

+ <a id="idm270001786944" class="indexterm"></a>

2107

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="support.html#std.support.types">Types</a></span></dt><dd><dl><dt><span class="section"><a href="support.html#std.support.types.fundamental">Fundamental Types</a></span></dt><dt><span class="section"><a href="support.html#std.support.types.numeric_limits">Numeric Properties</a></span></dt><dt><span class="section"><a href="support.html#std.support.types.null">NULL</a></span></dt></dl></dd><dt><span class="section"><a href="dynamic_memory.html">Dynamic Memory</a></span></dt><dt><span class="section"><a href="termination.html">Termination</a></span></dt><dd><dl><dt><span class="section"><a href="termination.html#support.termination.handlers">Termination Handlers</a></span></dt><dt><span class="section"><a href="termination.html#support.termination.verbose">Verbose Terminate Handler</a></span></dt></dl></dd></dl></div><p>

2108

This part deals with the functions called and objects created

2109

automatically during the course of a program's existence.

2110

</p><p>

2111

Index: libstdc++-v3/doc/html/manual/bitmap_allocator.html

2112

===================================================================

2113

--- a/src/libstdc++-v3/doc/html/manual/bitmap_allocator.html (.../tags/gcc_4_8_2_release)

2114

+++ b/src/libstdc++-v3/doc/html/manual/bitmap_allocator.html (.../branches/gcc-4_8-branch)

2115

@@ -1,8 +1,8 @@

2116

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2117

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 21. The bitmap_allocator</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="mt_allocator_ex_multi.html" title="Multiple Thread Example" /><link rel="next" href="bitmap_allocator_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 21. The bitmap_allocator</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_ex_multi.html">Prev</a> </td><th width="60%" align="center">Part III.

2118

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 21. The bitmap_allocator</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="mt_allocator_ex_multi.html" title="Multiple Thread Example" /><link rel="next" href="bitmap_allocator_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 21. The bitmap_allocator</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_ex_multi.html">Prev</a> </td><th width="60%" align="center">Part III.

2119

Extensions

2120

2121

-</th><td width="20%" align="right"> <a accesskey="n" href="bitmap_allocator_impl.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.allocator.bitmap"></a>Chapter 21. The bitmap_allocator</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="bitmap_allocator.html#allocator.bitmap.design">Design</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.free_list_store">Free List Store</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block">Super Block</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block_data">Super Block Data Layout</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.max_wasted">Maximum Wasted Percentage</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.allocate"><code class="function">allocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.deallocate"><code class="function">deallocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.questions">Questions</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.1">1</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.2">2</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.3">3</a></span></dt></dl></dd><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.locality">Locality</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.grow_policy">Overhead and Grow Policy</a></span></dt></dl></dd></dl></div><p>

2122

+</th><td width="20%" align="right"> <a accesskey="n" href="bitmap_allocator_impl.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.allocator.bitmap"></a>Chapter 21. The bitmap_allocator</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="bitmap_allocator.html#allocator.bitmap.design">Design</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.free_list_store">Free List Store</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block">Super Block</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block_data">Super Block Data Layout</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.max_wasted">Maximum Wasted Percentage</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.allocate"><code class="function">allocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.deallocate"><code class="function">deallocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.questions">Questions</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.1">1</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.2">2</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.3">3</a></span></dt></dl></dd><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.locality">Locality</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.grow_policy">Overhead and Grow Policy</a></span></dt></dl></dd></dl></div><p>

2123

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.bitmap.design"></a>Design</h2></div></div></div><p>

2124

As this name suggests, this allocator uses a bit-map to keep track

2125

of the used and unused memory locations for its book-keeping

2126

Index: libstdc++-v3/doc/html/manual/license.html

2127

===================================================================

2128

--- a/src/libstdc++-v3/doc/html/manual/license.html (.../tags/gcc_4_8_2_release)

2129

+++ b/src/libstdc++-v3/doc/html/manual/license.html (.../branches/gcc-4_8-branch)

2130

@@ -1,5 +1,5 @@

2131

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2132

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>License</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="status.html" title="Chapter 1. Status" /><link rel="prev" href="status.html" title="Chapter 1. Status" /><link rel="next" href="bugs.html" title="Bugs" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">License</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="status.html">Prev</a> </td><th width="60%" align="center">Chapter 1. Status</th><td width="20%" align="right"> <a accesskey="n" href="bugs.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.license"></a>License</h2></div></div></div><p>

2133

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>License</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="status.html" title="Chapter 1. Status" /><link rel="prev" href="status.html" title="Chapter 1. Status" /><link rel="next" href="bugs.html" title="Bugs" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">License</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="status.html">Prev</a> </td><th width="60%" align="center">Chapter 1. Status</th><td width="20%" align="right"> <a accesskey="n" href="bugs.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.license"></a>License</h2></div></div></div><p>

2134

There are two licenses affecting GNU libstdc++: one for the code,

2135

and one for the documentation.

2136

</p><p>

2137

Index: libstdc++-v3/doc/html/manual/numerics.html

2138

===================================================================

2139

--- a/src/libstdc++-v3/doc/html/manual/numerics.html (.../tags/gcc_4_8_2_release)

2140

+++ b/src/libstdc++-v3/doc/html/manual/numerics.html (.../branches/gcc-4_8-branch)

2141

@@ -1,5 +1,5 @@

2142

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2143

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 12. Numerics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="algorithms.html" title="Chapter 11. Algorithms" /><link rel="next" href="generalized_numeric_operations.html" title="Generalized Operations" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 12.

2144

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 12. Numerics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="algorithms.html" title="Chapter 11. Algorithms" /><link rel="next" href="generalized_numeric_operations.html" title="Generalized Operations" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 12.

2145

Numerics

2146

2147

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="algorithms.html">Prev</a> </td><th width="60%" align="center">Part II.

2148

@@ -6,8 +6,8 @@

2149

Standard Contents

2150

</th><td width="20%" align="right"> <a accesskey="n" href="generalized_numeric_operations.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.numerics"></a>Chapter 12.

2151

Numerics

2152

- <a id="idp16214640" class="indexterm"></a>

2153

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="numerics.html#std.numerics.complex">Complex</a></span></dt><dd><dl><dt><span class="section"><a href="numerics.html#numerics.complex.processing">complex Processing</a></span></dt></dl></dd><dt><span class="section"><a href="generalized_numeric_operations.html">Generalized Operations</a></span></dt><dt><span class="section"><a href="numerics_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="numerics_and_c.html#numerics.c.array">Numerics vs. Arrays</a></span></dt><dt><span class="section"><a href="numerics_and_c.html#numerics.c.c99">C99</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.numerics.complex"></a>Complex</h2></div></div></div><p>

2154

+ <a id="idm269999316576" class="indexterm"></a>

2155

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="numerics.html#std.numerics.complex">Complex</a></span></dt><dd><dl><dt><span class="section"><a href="numerics.html#numerics.complex.processing">complex Processing</a></span></dt></dl></dd><dt><span class="section"><a href="generalized_numeric_operations.html">Generalized Operations</a></span></dt><dt><span class="section"><a href="numerics_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="numerics_and_c.html#numerics.c.array">Numerics vs. Arrays</a></span></dt><dt><span class="section"><a href="numerics_and_c.html#numerics.c.c99">C99</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.numerics.complex"></a>Complex</h2></div></div></div><p>

2156

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="numerics.complex.processing"></a>complex Processing</h3></div></div></div><p>

2157

</p><p>Using <code class="code">complex<></code> becomes even more comple- er, sorry,

2158

<span class="emphasis"><em>complicated</em></span>, with the not-quite-gratuitously-incompatible

2159

Index: libstdc++-v3/doc/html/manual/using_exceptions.html

2160

===================================================================

2161

--- a/src/libstdc++-v3/doc/html/manual/using_exceptions.html (.../tags/gcc_4_8_2_release)

2162

+++ b/src/libstdc++-v3/doc/html/manual/using_exceptions.html (.../branches/gcc-4_8-branch)

2163

@@ -1,5 +1,5 @@

2164

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2165

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Exceptions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, exception, error, exception neutrality, exception safety, exception propagation, -fno-exceptions" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_concurrency.html" title="Concurrency" /><link rel="next" href="debug.html" title="Debugging Support" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Exceptions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="debug.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.exceptions"></a>Exceptions</h2></div></div></div><p>

2166

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Exceptions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, exception, error, exception neutrality, exception safety, exception propagation, -fno-exceptions" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_concurrency.html" title="Concurrency" /><link rel="next" href="debug.html" title="Debugging Support" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Exceptions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="debug.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.exceptions"></a>Exceptions</h2></div></div></div><p>

2167

The C++ language provides language support for stack unwinding

2168

with <code class="literal">try</code> and <code class="literal">catch</code> blocks and

2169

the <code class="literal">throw</code> keyword.

2170

@@ -265,7 +265,7 @@

2171

}

2172

catch(...)

2173

{ this->_M_setstate(ios_base::badbit); }

2174

-</pre></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="using.exceptions.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idp13644000"></a><p><span class="title"><em>

2175

+</pre></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="using.exceptions.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idm270001889024"></a><p><span class="title"><em>

2176

2177

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

2178

</a>

2179

@@ -274,39 +274,39 @@

2180

2181

The Open Group/The Institute of Electrical and Electronics

2182

Engineers, Inc.

2183

- . </span></p></div><div class="biblioentry"><a id="idp13647696"></a><p><span class="title"><em>

2184

+ . </span></p></div><div class="biblioentry"><a id="idm270001885328"></a><p><span class="title"><em>

2185

2186

Error and Exception Handling

2187

</a>

2188

</em>. </span><span class="author"><span class="firstname">David</span> <span class="surname">Abrahams </span>. </span><span class="publisher"><span class="publishername">

2189

Boost

2190

- . </span></span></p></div><div class="biblioentry"><a id="idp13651392"></a><p><span class="title"><em>

2191

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001881632"></a><p><span class="title"><em>

2192

2193

Exception-Safety in Generic Components

2194

</a>

2195

</em>. </span><span class="author"><span class="firstname">David</span> <span class="surname">Abrahams</span>. </span><span class="publisher"><span class="publishername">

2196

Boost

2197

- . </span></span></p></div><div class="biblioentry"><a id="idp13655104"></a><p><span class="title"><em>

2198

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001877920"></a><p><span class="title"><em>

2199

2200

Standard Library Exception Policy

2201

</a>

2202

</em>. </span><span class="author"><span class="firstname">Matt</span> <span class="surname">Austern</span>. </span><span class="publisher"><span class="publishername">

2203

WG21 N1077

2204

- . </span></span></p></div><div class="biblioentry"><a id="idp13658816"></a><p><span class="title"><em>

2205

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001874208"></a><p><span class="title"><em>

2206

2207

ia64 c++ abi exception handling

2208

</a>

2209

</em>. </span><span class="author"><span class="firstname">Richard</span> <span class="surname">Henderson</span>. </span><span class="publisher"><span class="publishername">

2210

GNU

2211

- . </span></span></p></div><div class="biblioentry"><a id="idp13662512"></a><p><span class="title"><em>

2212

+ . </span></span></p></div><div class="biblioentry"><a id="idm270001870512"></a><p><span class="title"><em>

2213

2214

Appendix E: Standard-Library Exception Safety

2215

</a>

2216

- </em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span></p></div><div class="biblioentry"><a id="idp13665328"></a><p><span class="citetitle"><em class="citetitle">

2217

+ </em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span></p></div><div class="biblioentry"><a id="idm270001867696"></a><p><span class="citetitle"><em class="citetitle">

2218

Exceptional C++

2219

</em>. </span><span class="pagenums">

2220

Exception-Safety Issues and Techniques

2221

- . </span><span class="author"><span class="firstname">Herb</span> <span class="surname">Sutter</span>. </span></p></div><div class="biblioentry"><a id="idp13667712"></a><p><span class="title"><em>

2222

+ . </span><span class="author"><span class="firstname">Herb</span> <span class="surname">Sutter</span>. </span></p></div><div class="biblioentry"><a id="idm270001865312"></a><p><span class="title"><em>

2223

2224

GCC Bug 25191: exception_defines.h #defines try/catch

2225

</a>

2226

Index: libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html

2227

===================================================================

2228

--- a/src/libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html (.../tags/gcc_4_8_2_release)

2229

+++ b/src/libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html (.../branches/gcc-4_8-branch)

2230

@@ -1,5 +1,5 @@

2231

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2232

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Testing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_design.html" title="Design" /><link rel="next" href="policy_data_structures_ack.html" title="Acknowledgments" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Testing</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_design.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_ack.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.test"></a>Testing</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.test.regression"></a>Regression</h3></div></div></div><p>The library contains a single comprehensive regression test.

2233

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Testing</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures_design.html" title="Design" /><link rel="next" href="policy_data_structures_ack.html" title="Acknowledgments" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Testing</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures_design.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_ack.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="pbds.test"></a>Testing</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.test.regression"></a>Regression</h3></div></div></div><p>The library contains a single comprehensive regression test.

2234

For a given container type in this library, the test creates

2235

an object of the container type and an object of the

2236

corresponding standard type (e.g., <code class="classname">std::set</code>). It

2237

Index: libstdc++-v3/doc/html/manual/parallel_mode_design.html

2238

===================================================================

2239

--- a/src/libstdc++-v3/doc/html/manual/parallel_mode_design.html (.../tags/gcc_4_8_2_release)

2240

+++ b/src/libstdc++-v3/doc/html/manual/parallel_mode_design.html (.../branches/gcc-4_8-branch)

2241

@@ -1,5 +1,5 @@

2242

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2243

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_using.html" title="Using" /><link rel="next" href="parallel_mode_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.design"></a>Design</h2></div></div></div><p>

2244

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_using.html" title="Using" /><link rel="next" href="parallel_mode_test.html" title="Testing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_using.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.design"></a>Design</h2></div></div></div><p>

2245

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="parallel_mode.design.intro"></a>Interface Basics</h3></div></div></div><p>

2246

All parallel algorithms are intended to have signatures that are

2247

equivalent to the ISO C++ algorithms replaced. For instance, the

2248

Index: libstdc++-v3/doc/html/manual/abi.html

2249

===================================================================

2250

--- a/src/libstdc++-v3/doc/html/manual/abi.html (.../tags/gcc_4_8_2_release)

2251

+++ b/src/libstdc++-v3/doc/html/manual/abi.html (.../branches/gcc-4_8-branch)

2252

@@ -1,5 +1,5 @@

2253

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2254

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>ABI Policy and Guidelines</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, ABI, version, dynamic, shared, compatibility" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="test.html" title="Test" /><link rel="next" href="api.html" title="API Evolution and Deprecation History" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">ABI Policy and Guidelines</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="test.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2255

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>ABI Policy and Guidelines</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, ABI, version, dynamic, shared, compatibility" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="test.html" title="Test" /><link rel="next" href="api.html" title="API Evolution and Deprecation History" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">ABI Policy and Guidelines</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="test.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2256

Porting and Maintenance

2257

2258

</th><td width="20%" align="right"> <a accesskey="n" href="api.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.abi"></a>ABI Policy and Guidelines</h2></div></div></div><p>

2259

@@ -493,39 +493,39 @@

2260

2261

C++ ABI Summary

2262

</a>

2263

- </em>. </span></p></div><div class="biblioentry"><a id="idp22945936"></a><p><span class="title"><em>

2264

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992586624"></a><p><span class="title"><em>

2265

2266

Intel Compilers for Linux Compatibility with the GNU Compilers

2267

</a>

2268

- </em>. </span></p></div><div class="biblioentry"><a id="idp22947792"></a><p><span class="title"><em>

2269

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992584768"></a><p><span class="title"><em>

2270

2271

Linker and Libraries Guide (document 819-0690)

2272

</a>

2273

- </em>. </span></p></div><div class="biblioentry"><a id="idp22949632"></a><p><span class="title"><em>

2274

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992582928"></a><p><span class="title"><em>

2275

2276

Sun Studio 11: C++ Migration Guide (document 819-3689)

2277

</a>

2278

- </em>. </span></p></div><div class="biblioentry"><a id="idp22951488"></a><p><span class="title"><em>

2279

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992581072"></a><p><span class="title"><em>

2280

2281

How to Write Shared Libraries

2282

</a>

2283

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span></p></div><div class="biblioentry"><a id="idp22954928"></a><p><span class="title"><em>

2284

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span></p></div><div class="biblioentry"><a id="idm269992577632"></a><p><span class="title"><em>

2285

2286

C++ ABI for the ARM Architecture

2287

</a>

2288

- </em>. </span></p></div><div class="biblioentry"><a id="idp22956736"></a><p><span class="title"><em>

2289

+ </em>. </span></p></div><div class="biblioentry"><a id="idm269992575824"></a><p><span class="title"><em>

2290

2291

Dynamic Shared Objects: Survey and Issues

2292

</a>

2293

</em>. </span><span class="subtitle">

2294

ISO C++ J16/06-0046

2295

- . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idp22960032"></a><p><span class="title"><em>

2296

+ . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idm269992572528"></a><p><span class="title"><em>

2297

2298

Versioning With Namespaces

2299

</a>

2300

</em>. </span><span class="subtitle">

2301

ISO C++ J16/06-0083

2302

- . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idp22963312"></a><p><span class="title"><em>

2303

+ . </span><span class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span>. </span></p></div><div class="biblioentry"><a id="idm269992569248"></a><p><span class="title"><em>

2304

2305

Binary Compatibility of Shared Libraries Implemented in C++

2306

on GNU/Linux Systems

2307

Index: libstdc++-v3/doc/html/manual/intro.html

2308

===================================================================

2309

--- a/src/libstdc++-v3/doc/html/manual/intro.html (.../tags/gcc_4_8_2_release)

2310

+++ b/src/libstdc++-v3/doc/html/manual/intro.html (.../branches/gcc-4_8-branch)

2311

@@ -1,8 +1,8 @@

2312

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2313

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part I. Introduction</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="index.html" title="The GNU C++ Library Manual" /><link rel="next" href="status.html" title="Chapter 1. Status" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part I.

2314

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part I. Introduction</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="index.html" title="The GNU C++ Library Manual" /><link rel="next" href="status.html" title="Chapter 1. Status" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part I.

2315

Introduction

2316

2317

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="index.html">Prev</a> </td><th width="60%" align="center">The GNU C++ Library Manual</th><td width="20%" align="right"> <a accesskey="n" href="status.html">Next</a></td></tr></table><hr /></div><div class="part"><div class="titlepage"><div><div><h1 class="title"><a id="manual.intro"></a>Part I.

2318

Introduction

2319

- <a id="idp9040416" class="indexterm"></a>

2320

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="chapter"><a href="status.html">1. Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></dd></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="index.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="index.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="status.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library Manual </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Chapter 1. Status</td></tr></table></div></body></html>

2321

\ No newline at end of file

2322

+ <a id="idm270013458800" class="indexterm"></a>

2323

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="chapter"><a href="status.html">1. Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></dd></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="index.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="index.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="status.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library Manual </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Chapter 1. Status</td></tr></table></div></body></html>

2324

\ No newline at end of file

2325

Index: libstdc++-v3/doc/html/manual/profile_mode_api.html

2326

===================================================================

2327

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_api.html (.../tags/gcc_4_8_2_release)

2328

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_api.html (.../branches/gcc-4_8-branch)

2329

@@ -1,5 +1,5 @@

2330

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2331

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Extensions for Custom Containers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_design.html" title="Design" /><link rel="next" href="profile_mode_cost_model.html" title="Empirical Cost Model" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Extensions for Custom Containers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_design.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_cost_model.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.api"></a>Extensions for Custom Containers</h2></div></div></div><p>

2332

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Extensions for Custom Containers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_design.html" title="Design" /><link rel="next" href="profile_mode_cost_model.html" title="Empirical Cost Model" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Extensions for Custom Containers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_design.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_cost_model.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.api"></a>Extensions for Custom Containers</h2></div></div></div><p>

2333

Many large projects use their own data structures instead of the ones in the

2334

standard library. If these data structures are similar in functionality

2335

to the standard library, they can be instrumented with the same hooks

2336

Index: libstdc++-v3/doc/html/manual/atomics.html

2337

===================================================================

2338

--- a/src/libstdc++-v3/doc/html/manual/atomics.html (.../tags/gcc_4_8_2_release)

2339

+++ b/src/libstdc++-v3/doc/html/manual/atomics.html (.../branches/gcc-4_8-branch)

2340

@@ -1,5 +1,5 @@

2341

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2342

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 14. Atomics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library, atomic" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="io_and_c.html" title="Interacting with C" /><link rel="next" href="concurrency.html" title="Chapter 15. Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 14.

2343

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 14. Atomics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library, atomic" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="io_and_c.html" title="Interacting with C" /><link rel="next" href="concurrency.html" title="Chapter 15. Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 14.

2344

Atomics

2345

2346

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="io_and_c.html">Prev</a> </td><th width="60%" align="center">Part II.

2347

@@ -6,8 +6,8 @@

2348

Standard Contents

2349

</th><td width="20%" align="right"> <a accesskey="n" href="concurrency.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.atomics"></a>Chapter 14.

2350

Atomics

2351

- <a id="idp16390640" class="indexterm"></a>

2352

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="atomics.html#std.atomics.api">API Reference</a></span></dt></dl></div><p>

2353

+ <a id="idm269999140704" class="indexterm"></a>

2354

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="atomics.html#std.atomics.api">API Reference</a></span></dt></dl></div><p>

2355

Facilities for atomic operations.

2356

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.atomics.api"></a>API Reference</h2></div></div></div><p>

2357

All items are declared in the standard header

2358

Index: libstdc++-v3/doc/html/manual/internals.html

2359

===================================================================

2360

--- a/src/libstdc++-v3/doc/html/manual/internals.html (.../tags/gcc_4_8_2_release)

2361

+++ b/src/libstdc++-v3/doc/html/manual/internals.html (.../branches/gcc-4_8-branch)

2362

@@ -1,5 +1,5 @@

2363

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2364

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Porting to New Hardware or Operating Systems</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, internals" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="documentation_hacking.html" title="Writing and Generating Documentation" /><link rel="next" href="test.html" title="Test" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Porting to New Hardware or Operating Systems</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="documentation_hacking.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2365

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Porting to New Hardware or Operating Systems</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, internals" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="documentation_hacking.html" title="Writing and Generating Documentation" /><link rel="next" href="test.html" title="Test" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Porting to New Hardware or Operating Systems</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="documentation_hacking.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2366

Porting and Maintenance

2367

2368

</th><td width="20%" align="right"> <a accesskey="n" href="test.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.internals"></a>Porting to New Hardware or Operating Systems</h2></div></div></div><p>

2369

Index: libstdc++-v3/doc/html/manual/policy_data_structures_using.html

2370

===================================================================

2371

--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_using.html (.../tags/gcc_4_8_2_release)

2372

+++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_using.html (.../branches/gcc-4_8-branch)

2373

@@ -1,5 +1,5 @@

2374

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2375

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="next" href="policy_data_structures_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.prereq"></a>Prerequisites</h3></div></div></div><p>The library contains only header files, and does not require any

2376

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, policy, container, data, structure, associated, tree, trie, hash, metaprogramming" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="prev" href="policy_data_structures.html" title="Chapter 22. Policy-Based Data Structures" /><link rel="next" href="policy_data_structures_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="policy_data_structures.html">Prev</a> </td><th width="60%" align="center">Chapter 22. Policy-Based Data Structures</th><td width="20%" align="right"> <a accesskey="n" href="policy_data_structures_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="containers.pbds.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.prereq"></a>Prerequisites</h3></div></div></div><p>The library contains only header files, and does not require any

2377

other libraries except the standard C++ library . All classes are

2378

defined in namespace <code class="code">__gnu_pbds</code>. The library internally

2379

uses macros beginning with <code class="code">PB_DS</code>, but

2380

@@ -61,7 +61,7 @@

2381

In addition, there are the following diagnostics classes,

2382

used to report errors specific to this library's data

2383

structures.

2384

- </p><div class="figure"><a id="idp17806128"></a><p class="title"><strong>Figure 22.7. Exception Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_exception_hierarchy.png" align="middle" alt="Exception Hierarchy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.tutorial"></a>Tutorial</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.using.tutorial.basic"></a>Basic Use</h4></div></div></div><p>

2385

+ </p><div class="figure"><a id="idm269997724688"></a><p class="title"><strong>Figure 22.7. Exception Hierarchy</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/pbds_exception_hierarchy.png" align="middle" alt="Exception Hierarchy" /></div></div></div><br class="figure-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="pbds.using.tutorial"></a>Tutorial</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="pbds.using.tutorial.basic"></a>Basic Use</h4></div></div></div><p>

2386

For the most part, the policy-based containers containers in

2387

namespace <code class="literal">__gnu_pbds</code> have the same interface as

2388

the equivalent containers in the standard C++ library, except for

2389

Index: libstdc++-v3/doc/html/manual/bugs.html

2390

===================================================================

2391

--- a/src/libstdc++-v3/doc/html/manual/bugs.html (.../tags/gcc_4_8_2_release)

2392

+++ b/src/libstdc++-v3/doc/html/manual/bugs.html (.../branches/gcc-4_8-branch)

2393

@@ -1,5 +1,5 @@

2394

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2395

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Bugs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="status.html" title="Chapter 1. Status" /><link rel="prev" href="license.html" title="License" /><link rel="next" href="setup.html" title="Chapter 2. Setup" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Bugs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="license.html">Prev</a> </td><th width="60%" align="center">Chapter 1. Status</th><td width="20%" align="right"> <a accesskey="n" href="setup.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.bugs"></a>Bugs</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.status.bugs.impl"></a>Implementation Bugs</h3></div></div></div><p>

2396

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Bugs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="status.html" title="Chapter 1. Status" /><link rel="prev" href="license.html" title="License" /><link rel="next" href="setup.html" title="Chapter 2. Setup" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Bugs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="license.html">Prev</a> </td><th width="60%" align="center">Chapter 1. Status</th><td width="20%" align="right"> <a accesskey="n" href="setup.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.status.bugs"></a>Bugs</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.status.bugs.impl"></a>Implementation Bugs</h3></div></div></div><p>

2397

Information on known bugs, details on efforts to fix them, and

2398

fixed bugs are all available as part of the <a class="link" href="http://gcc.gnu.org/bugs/" target="_top">GCC bug tracking system</a>,

2399

with the category set to <code class="literal">libstdc++</code>.

2400

Index: libstdc++-v3/doc/html/manual/parallel_mode_using.html

2401

===================================================================

2402

--- a/src/libstdc++-v3/doc/html/manual/parallel_mode_using.html (.../tags/gcc_4_8_2_release)

2403

+++ b/src/libstdc++-v3/doc/html/manual/parallel_mode_using.html (.../branches/gcc-4_8-branch)

2404

@@ -1,5 +1,5 @@

2405

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2406

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_semantics.html" title="Semantics" /><link rel="next" href="parallel_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="parallel_mode.using.prereq_flags"></a>Prerequisite Compiler Flags</h3></div></div></div><p>

2407

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode_semantics.html" title="Semantics" /><link rel="next" href="parallel_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.using"></a>Using</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="parallel_mode.using.prereq_flags"></a>Prerequisite Compiler Flags</h3></div></div></div><p>

2408

Any use of parallel functionality requires additional compiler

2409

and runtime support, in particular support for OpenMP. Adding this support is

2410

not difficult: just compile your application with the compiler

2411

@@ -62,4 +62,4 @@

2412

flags for atomic operations.)

2413

</p><p> The following table provides the names and headers of all the

2414

parallel algorithms that can be used in a similar manner:

2415

-</p><div class="table"><a id="idp16725920"></a><p class="title"><strong>Table 18.1. Parallel Algorithms</strong></p><div class="table-contents"><table summary="Parallel Algorithms" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Algorithm</th><th align="left">Header</th><th align="left">Parallel algorithm</th><th align="left">Parallel header</th></tr></thead><tbody><tr><td align="left"><code class="function">std::accumulate</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::accumulate</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_difference</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_difference</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::inner_product</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::inner_product</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::partial_sum</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::partial_sum</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::equal</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::equal</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_first_of</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_first_of</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::for_each</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::for_each</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::lexicographical_compare</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::lexicographical_compare</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::mismatch</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::mismatch</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::transform</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::transform</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::max_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::max_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::merge</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::merge</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::min_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::min_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::nth_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::nth_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partial_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partial_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partition</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partition</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::random_shuffle</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::random_shuffle</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_union</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_union</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_intersection</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_intersection</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_symmetric_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_symmetric_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::stable_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::stable_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::unique_copy</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::unique_copy</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="parallel_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

2416

\ No newline at end of file

2417

+</p><div class="table"><a id="idm269998805216"></a><p class="title"><strong>Table 18.1. Parallel Algorithms</strong></p><div class="table-contents"><table summary="Parallel Algorithms" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Algorithm</th><th align="left">Header</th><th align="left">Parallel algorithm</th><th align="left">Parallel header</th></tr></thead><tbody><tr><td align="left"><code class="function">std::accumulate</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::accumulate</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_difference</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_difference</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::inner_product</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::inner_product</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::partial_sum</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="function">__gnu_parallel::partial_sum</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr><tr><td align="left"><code class="function">std::adjacent_find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::adjacent_find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::count_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::count_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::equal</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::equal</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::find_first_of</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::find_first_of</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::for_each</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::for_each</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::generate_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::generate_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::lexicographical_compare</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::lexicographical_compare</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::mismatch</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::mismatch</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::search_n</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::search_n</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::transform</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::transform</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::replace_if</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::replace_if</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::max_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::max_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::merge</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::merge</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::min_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::min_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::nth_element</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::nth_element</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partial_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partial_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::partition</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::partition</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::random_shuffle</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::random_shuffle</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_union</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_union</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_intersection</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_intersection</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_symmetric_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_symmetric_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::set_difference</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::set_difference</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::stable_sort</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::stable_sort</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr><tr><td align="left"><code class="function">std::unique_copy</code></td><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="function">__gnu_parallel::unique_copy</code></td><td align="left"><code class="filename">parallel/algorithm</code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="parallel_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="parallel_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="parallel_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

2418

\ No newline at end of file

2419

Index: libstdc++-v3/doc/html/manual/ext_numerics.html

2420

===================================================================

2421

--- a/src/libstdc++-v3/doc/html/manual/ext_numerics.html (.../tags/gcc_4_8_2_release)

2422

+++ b/src/libstdc++-v3/doc/html/manual/ext_numerics.html (.../branches/gcc-4_8-branch)

2423

@@ -1,5 +1,5 @@

2424

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2425

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 26. Numerics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_algorithms.html" title="Chapter 25. Algorithms" /><link rel="next" href="ext_iterators.html" title="Chapter 27. Iterators" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 26. Numerics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_algorithms.html">Prev</a> </td><th width="60%" align="center">Part III.

2426

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 26. Numerics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_algorithms.html" title="Chapter 25. Algorithms" /><link rel="next" href="ext_iterators.html" title="Chapter 27. Iterators" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 26. Numerics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_algorithms.html">Prev</a> </td><th width="60%" align="center">Part III.

2427

Extensions

2428

2429

</th><td width="20%" align="right"> <a accesskey="n" href="ext_iterators.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.numerics"></a>Chapter 26. Numerics</h2></div></div></div><p>26.4, the generalized numeric operations such as <code class="code">accumulate</code>,

2430

Index: libstdc++-v3/doc/html/manual/parallel_mode_semantics.html

2431

===================================================================

2432

--- a/src/libstdc++-v3/doc/html/manual/parallel_mode_semantics.html (.../tags/gcc_4_8_2_release)

2433

+++ b/src/libstdc++-v3/doc/html/manual/parallel_mode_semantics.html (.../branches/gcc-4_8-branch)

2434

@@ -1,5 +1,5 @@

2435

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2436

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Semantics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="next" href="parallel_mode_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Semantics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.semantics"></a>Semantics</h2></div></div></div><p> The parallel mode STL algorithms are currently not exception-safe,

2437

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Semantics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="prev" href="parallel_mode.html" title="Chapter 18. Parallel Mode" /><link rel="next" href="parallel_mode_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Semantics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="parallel_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 18. Parallel Mode</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.semantics"></a>Semantics</h2></div></div></div><p> The parallel mode STL algorithms are currently not exception-safe,

2438

i.e. user-defined functors must not throw exceptions.

2439

Also, the order of execution is not guaranteed for some functions, of course.

2440

Therefore, user-defined functors should not have any concurrent side effects.

2441

Index: libstdc++-v3/doc/html/manual/std_contents.html

2442

===================================================================

2443

--- a/src/libstdc++-v3/doc/html/manual/std_contents.html (.../tags/gcc_4_8_2_release)

2444

+++ b/src/libstdc++-v3/doc/html/manual/std_contents.html (.../branches/gcc-4_8-branch)

2445

@@ -1,9 +1,9 @@

2446

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2447

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part II. Standard Contents</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="debug.html" title="Debugging Support" /><link rel="next" href="support.html" title="Chapter 4. Support" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part II.

2448

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part II. Standard Contents</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="debug.html" title="Debugging Support" /><link rel="next" href="support.html" title="Chapter 4. Support" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part II.

2449

Standard Contents

2450

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug.html">Prev</a> </td><th width="60%" align="center">The GNU C++ Library Manual</th><td width="20%" align="right"> <a accesskey="n" href="support.html">Next</a></td></tr></table><hr /></div><div class="part"><div class="titlepage"><div><div><h1 class="title"><a id="manual.std"></a>Part II.

2451

Standard Contents

2452

- </h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="chapter"><a href="support.html">4.

2453

+ </h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="chapter"><a href="support.html">4.

2454

Support

2455

2456

</a></span></dt><dd><dl><dt><span class="section"><a href="support.html#std.support.types">Types</a></span></dt><dd><dl><dt><span class="section"><a href="support.html#std.support.types.fundamental">Fundamental Types</a></span></dt><dt><span class="section"><a href="support.html#std.support.types.numeric_limits">Numeric Properties</a></span></dt><dt><span class="section"><a href="support.html#std.support.types.null">NULL</a></span></dt></dl></dd><dt><span class="section"><a href="dynamic_memory.html">Dynamic Memory</a></span></dt><dt><span class="section"><a href="termination.html">Termination</a></span></dt><dd><dl><dt><span class="section"><a href="termination.html#support.termination.handlers">Termination Handlers</a></span></dt><dt><span class="section"><a href="termination.html#support.termination.verbose">Verbose Terminate Handler</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="diagnostics.html">5.

2457

@@ -12,13 +12,13 @@

2458

</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="concept_checking.html">Concept Checking</a></span></dt></dl></dd><dt><span class="chapter"><a href="utilities.html">6.

2459

Utilities

2460

2461

-</a></span></dt><dd><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp13920976">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idp13924528">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp13937824">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15512272">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idp15534784">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idp15542080">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp15556704">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15573056">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idp15576640">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="strings.html">7.

2462

+</a></span></dt><dd><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270001611968">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idm270001608416">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm270001595120">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270000019344">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999996832">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idm269999989536">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999974912">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm269999958496">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idm269999954912">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="strings.html">7.

2463

Strings

2464

2465

</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="localization.html">8.

2466

Localization

2467

2468

-</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idp15778336">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

2469

+</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idm269999753024">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

2470

Containers

2471

2472

</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="iterators.html">10.

2473

Index: libstdc++-v3/doc/html/manual/appendix.html

2474

===================================================================

2475

--- a/src/libstdc++-v3/doc/html/manual/appendix.html (.../tags/gcc_4_8_2_release)

2476

+++ b/src/libstdc++-v3/doc/html/manual/appendix.html (.../branches/gcc-4_8-branch)

2477

@@ -1,9 +1,9 @@

2478

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2479

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part IV. Appendices</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="ext_concurrency_use.html" title="Use" /><link rel="next" href="appendix_contributing.html" title="Appendix A. Contributing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part IV.

2480

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part IV. Appendices</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="ext_concurrency_use.html" title="Use" /><link rel="next" href="appendix_contributing.html" title="Appendix A. Contributing" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part IV.

2481

Appendices

2482

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency_use.html">Prev</a> </td><th width="60%" align="center">The GNU C++ Library Manual</th><td width="20%" align="right"> <a accesskey="n" href="appendix_contributing.html">Next</a></td></tr></table><hr /></div><div class="part"><div class="titlepage"><div><div><h1 class="title"><a id="appendix"></a>Part IV.

2483

Appendices

2484

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="appendix"><a href="appendix_contributing.html">A.

2485

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="appendix"><a href="appendix_contributing.html">A.

2486

Contributing

2487

2488

</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></dd><dt><span class="appendix"><a href="appendix_porting.html">B.

2489

Index: libstdc++-v3/doc/html/manual/memory.html

2490

===================================================================

2491

--- a/src/libstdc++-v3/doc/html/manual/memory.html (.../tags/gcc_4_8_2_release)

2492

+++ b/src/libstdc++-v3/doc/html/manual/memory.html (.../branches/gcc-4_8-branch)

2493

@@ -1,5 +1,5 @@

2494

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2495

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="pairs.html" title="Pairs" /><link rel="next" href="traits.html" title="Traits" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="pairs.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2496

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Memory</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="pairs.html" title="Pairs" /><link rel="next" href="traits.html" title="Traits" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Memory</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="pairs.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

2497

Utilities

2498

2499

</th><td width="20%" align="right"> <a accesskey="n" href="traits.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.memory"></a>Memory</h2></div></div></div><p>

2500

@@ -92,7 +92,7 @@

2501

or loading and unloading shared objects in memory. As such, using

2502

caching allocators on systems that do not support

2503

<code class="function">abi::__cxa_atexit</code> is not recommended.

2504

- </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp13920976"></a>Interface Design</h5></div></div></div><p>

2505

+ </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm270001611968"></a>Interface Design</h5></div></div></div><p>

2506

The only allocator interface that

2507

is supported is the standard C++ interface. As such, all STL

2508

containers have been adjusted, and all external allocators have

2509

@@ -105,7 +105,7 @@

2510

</p><p>

2511

The base class that <code class="classname">allocator</code> is derived from

2512

may not be user-configurable.

2513

-</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp13924528"></a>Selecting Default Allocation Policy</h5></div></div></div><p>

2514

+</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm270001608416"></a>Selecting Default Allocation Policy</h5></div></div></div><p>

2515

It's difficult to pick an allocation strategy that will provide

2516

maximum utility, without excessively penalizing some behavior. In

2517

fact, it's difficult just deciding which typical actions to measure

2518

@@ -142,7 +142,7 @@

2519

The current default choice for

2520

<code class="classname">allocator</code> is

2521

<code class="classname">__gnu_cxx::new_allocator</code>.

2522

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp13937824"></a>Disabling Memory Caching</h5></div></div></div><p>

2523

+ </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm270001595120"></a>Disabling Memory Caching</h5></div></div></div><p>

2524

In use, <code class="classname">allocator</code> may allocate and

2525

deallocate using implementation-specific strategies and

2526

heuristics. Because of this, a given call to an allocator object's

2527

@@ -309,33 +309,33 @@

2528

of the used and unused memory locations. It has its own

2529

<a class="link" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator">chapter</a>

2530

in the documentation.

2531

- </p></li></ol></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp13992848"></a><p><span class="citetitle"><em class="citetitle">

2532

+ </p></li></ol></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="allocator.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm270000084224"></a><p><span class="citetitle"><em class="citetitle">

2533

ISO/IEC 14882:1998 Programming languages - C++

2534

</em>. </span>

2535

isoc++_1998

2536

- <span class="pagenums">20.4 Memory. </span></p></div><div class="biblioentry"><a id="idp13994688"></a><p><span class="title"><em>

2537

- <a class="link" href="http://www.drdobbs.com/cpp/184403759" target="_top">

2538

+ <span class="pagenums">20.4 Memory. </span></p></div><div class="biblioentry"><a id="idm270000082384"></a><p><span class="title"><em>

2539

+ <a class="link" href="http://www.drdobbs.com/the-standard-librarian-what-are-allocato/184403759" target="_top">

2540

The Standard Librarian: What Are Allocators Good For?

2541

</a>

2542

</em>. </span><span class="author"><span class="firstname">Matt</span> <span class="surname">Austern</span>. </span><span class="publisher"><span class="publishername">

2543

C/C++ Users Journal

2544

- . </span></span></p></div><div class="biblioentry"><a id="idp13998416"></a><p><span class="title"><em>

2545

+ . </span></span></p></div><div class="biblioentry"><a id="idm270000078608"></a><p><span class="title"><em>

2546

2547

The Hoard Memory Allocator

2548

</a>

2549

- </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span></p></div><div class="biblioentry"><a id="idp14001184"></a><p><span class="title"><em>

2550

+ </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span></p></div><div class="biblioentry"><a id="idm270000075840"></a><p><span class="title"><em>

2551

2552

Reconsidering Custom Memory Allocation

2553

</a>

2554

- </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span><span class="author"><span class="firstname">Ben</span> <span class="surname">Zorn</span>. </span><span class="author"><span class="firstname">Kathryn</span> <span class="surname">McKinley</span>. </span><span class="copyright">Copyright © 2002 OOPSLA. </span></p></div><div class="biblioentry"><a id="idp14007344"></a><p><span class="title"><em>

2555

+ </em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span><span class="author"><span class="firstname">Ben</span> <span class="surname">Zorn</span>. </span><span class="author"><span class="firstname">Kathryn</span> <span class="surname">McKinley</span>. </span><span class="copyright">Copyright © 2002 OOPSLA. </span></p></div><div class="biblioentry"><a id="idm270000069680"></a><p><span class="title"><em>

2556

2557

Allocator Types

2558

</a>

2559

</em>. </span><span class="author"><span class="firstname">Klaus</span> <span class="surname">Kreft</span>. </span><span class="author"><span class="firstname">Angelika</span> <span class="surname">Langer</span>. </span><span class="publisher"><span class="publishername">

2560

C/C++ Users Journal

2561

- . </span></span></p></div><div class="biblioentry"><a id="idp14012080"></a><p><span class="citetitle"><em class="citetitle">The C++ Programming Language</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 . </span><span class="pagenums">19.4 Allocators. </span><span class="publisher"><span class="publishername">

2562

+ . </span></span></p></div><div class="biblioentry"><a id="idm270000064944"></a><p><span class="citetitle"><em class="citetitle">The C++ Programming Language</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 . </span><span class="pagenums">19.4 Allocators. </span><span class="publisher"><span class="publishername">

2563

Addison Wesley

2564

- . </span></span></p></div><div class="biblioentry"><a id="idp14016512"></a><p><span class="citetitle"><em class="citetitle">Yalloc: A Recycling C++ Allocator</em>. </span><span class="author"><span class="firstname">Felix</span> <span class="surname">Yen</span>. </span></p></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.util.memory.auto_ptr"></a>auto_ptr</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="auto_ptr.limitations"></a>Limitations</h4></div></div></div><p>Explaining all of the fun and delicious things that can

2565

+ . </span></span></p></div><div class="biblioentry"><a id="idm270000060512"></a><p><span class="citetitle"><em class="citetitle">Yalloc: A Recycling C++ Allocator</em>. </span><span class="author"><span class="firstname">Felix</span> <span class="surname">Yen</span>. </span></p></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.util.memory.auto_ptr"></a>auto_ptr</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="auto_ptr.limitations"></a>Limitations</h4></div></div></div><p>Explaining all of the fun and delicious things that can

2566

happen with misuse of the <code class="classname">auto_ptr</code> class

2567

template (called <acronym class="acronym">AP</acronym> here) would take some

2568

time. Suffice it to say that the use of <acronym class="acronym">AP</acronym>

2569

@@ -445,7 +445,7 @@

2570

Derived classes override those functions to destroy resources in a context

2571

where the correct dynamic type is known. This is an application of the

2572

technique known as type erasure.

2573

- </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15512272"></a>Class Hierarchy</h5></div></div></div><p>

2574

+ </p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm270000019344"></a>Class Hierarchy</h5></div></div></div><p>

2575

A <code class="classname">shared_ptr<T></code> contains a pointer of

2576

type <span class="type">T*</span> and an object of type

2577

<code class="classname">__shared_count</code>. The shared_count contains a

2578

@@ -492,9 +492,9 @@

2579

aliasing constructor, make_shared & allocate_shared. Additionally,

2580

the constructors taking <code class="classname">auto_ptr</code> parameters are

2581

deprecated in C++11 mode.

2582

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15534784"></a>Thread Safety</h5></div></div></div><p>

2583

+ </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999996832"></a>Thread Safety</h5></div></div></div><p>

2584

The

2585

-<a class="link" href="http://boost.org/libs/smart_ptr/shared_ptr.htm#ThreadSafety" target="_top">Thread

2586

+<a class="link" href="http://www.boost.org/libs/smart_ptr/shared_ptr.htm#ThreadSafety" target="_top">Thread

2587

Safety</a> section of the Boost shared_ptr documentation says "shared_ptr

2588

objects offer the same level of thread safety as built-in types."

2589

The implementation must ensure that concurrent updates to separate shared_ptr

2590

@@ -537,7 +537,7 @@

2591

shared_ptr in libstdc++ the compiler and library are fixed, which

2592

makes things much simpler: we have an atomic CAS or we don't, see Lock

2593

Policy below for details.

2594

-</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15542080"></a>Selecting Lock Policy</h5></div></div></div><p>

2595

+</p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999989536"></a>Selecting Lock Policy</h5></div></div></div><p>

2596

</p><p>

2597

There is a single <code class="classname">_Sp_counted_base</code> class,

2598

which is a template parameterized on the enum

2599

@@ -578,7 +578,7 @@

2600

<code class="filename">ext/atomicity.h</code>, which detect if the program

2601

is multi-threaded. If only one thread of execution exists in

2602

the program then less expensive non-atomic operations are used.

2603

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15556704"></a>Related functions and classes</h5></div></div></div><div class="variablelist"><dl class="variablelist"><dt><span class="term"><code class="code">dynamic_pointer_cast</code>, <code class="code">static_pointer_cast</code>,

2604

+ </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999974912"></a>Related functions and classes</h5></div></div></div><div class="variablelist"><dl class="variablelist"><dt><span class="term"><code class="code">dynamic_pointer_cast</code>, <code class="code">static_pointer_cast</code>,

2605

<code class="code">const_pointer_cast</code></span></dt><dd><p>

2606

As noted in N2351, these functions can be implemented non-intrusively using

2607

the alias constructor. However the aliasing constructor is only available

2608

@@ -611,13 +611,13 @@

2609

As well as the extra constructors, this implementation also needs some

2610

members of _Sp_counted_deleter to be protected where they could otherwise

2611

be private.

2612

- </p></dd></dl></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.using"></a>Use</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15573056"></a>Examples</h5></div></div></div><p>

2613

+ </p></dd></dl></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.using"></a>Use</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999958496"></a>Examples</h5></div></div></div><p>

2614

Examples of use can be found in the testsuite, under

2615

<code class="filename">testsuite/tr1/2_general_utilities/shared_ptr</code>,

2616

<code class="filename">testsuite/20_util/shared_ptr</code>

2617

and

2618

<code class="filename">testsuite/20_util/weak_ptr</code>.

2619

- </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15576640"></a>Unresolved Issues</h5></div></div></div><p>

2620

+ </p></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999954912"></a>Unresolved Issues</h5></div></div></div><p>

2621

The <span class="emphasis"><em><code class="classname">shared_ptr</code> atomic access</em></span>

2622

clause in the C++11 standard is not implemented in GCC.

2623

</p><p>

2624

@@ -658,25 +658,25 @@

2625

code to work with, Peter Dimov in particular for his help and

2626

invaluable advice on thread safety. Phillip Jordan and Paolo

2627

Carlini for the lock policy implementation.

2628

- </p></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15587936"></a><p><span class="title"><em>

2629

+ </p></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="shared_ptr.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999943680"></a><p><span class="title"><em>

2630

2631

Improving shared_ptr for C++0x, Revision 2

2632

</a>

2633

</em>. </span><span class="subtitle">

2634

N2351

2635

- . </span></p></div><div class="biblioentry"><a id="idp15590224"></a><p><span class="title"><em>

2636

+ . </span></p></div><div class="biblioentry"><a id="idm269999941392"></a><p><span class="title"><em>

2637

2638

C++ Standard Library Active Issues List

2639

</a>

2640

</em>. </span><span class="subtitle">

2641

N2456

2642

- . </span></p></div><div class="biblioentry"><a id="idp15592512"></a><p><span class="title"><em>

2643

+ . </span></p></div><div class="biblioentry"><a id="idm269999939104"></a><p><span class="title"><em>

2644

2645

Working Draft, Standard for Programming Language C++

2646

</a>

2647

</em>. </span><span class="subtitle">

2648

N2461

2649

- . </span></p></div><div class="biblioentry"><a id="idp15594816"></a><p><span class="title"><em>

2650

+ . </span></p></div><div class="biblioentry"><a id="idm269999936800"></a><p><span class="title"><em>

2651

2652

Boost C++ Libraries documentation, shared_ptr

2653

</a>

2654

Index: libstdc++-v3/doc/html/manual/api.html

2655

===================================================================

2656

--- a/src/libstdc++-v3/doc/html/manual/api.html (.../tags/gcc_4_8_2_release)

2657

+++ b/src/libstdc++-v3/doc/html/manual/api.html (.../branches/gcc-4_8-branch)

2658

@@ -1,5 +1,5 @@

2659

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2660

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>API Evolution and Deprecation History</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, api, evolution, deprecation, history" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="abi.html" title="ABI Policy and Guidelines" /><link rel="next" href="backwards.html" title="Backwards Compatibility" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">API Evolution and Deprecation History</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="abi.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2661

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>API Evolution and Deprecation History</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, api, evolution, deprecation, history" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="abi.html" title="ABI Policy and Guidelines" /><link rel="next" href="backwards.html" title="Backwards Compatibility" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">API Evolution and Deprecation History</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="abi.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2662

Porting and Maintenance

2663

2664

</th><td width="20%" align="right"> <a accesskey="n" href="backwards.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.api"></a>API Evolution and Deprecation History</h2></div></div></div><p>

2665

@@ -77,11 +77,11 @@

2666

<span class="type">__alloc</span> to select an underlying allocator that

2667

satisfied memory allocation requests. The selection of this

2668

underlying allocator was not user-configurable.

2669

- </p><div class="table"><a id="idp23030528"></a><p class="title"><strong>Table B.6. Extension Allocators</strong></p><div class="table-contents"><table summary="Extension Allocators" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Allocator (3.4)</th><th align="left">Header (3.4)</th><th align="left">Allocator (3.[0-3])</th><th align="left">Header (3.[0-3])</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::new_allocator<T></code></td><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="classname">std::__new_alloc</code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::malloc_allocator<T></code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="classname">std::__malloc_alloc_template<int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::debug_allocator<T></code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="classname">std::debug_alloc<T></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__pool_alloc<T></code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="classname">std::__default_alloc_template<bool,int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__mt_alloc<T></code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left"><code class="classname">__gnu_cxx::bitmap_allocator<T></code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr></tbody></table></div></div><br class="table-break" /><p> Releases after gcc-3.4 have continued to add to the collection

2670

+ </p><div class="table"><a id="idm269992502096"></a><p class="title"><strong>Table B.6. Extension Allocators</strong></p><div class="table-contents"><table summary="Extension Allocators" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Allocator (3.4)</th><th align="left">Header (3.4)</th><th align="left">Allocator (3.[0-3])</th><th align="left">Header (3.[0-3])</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::new_allocator<T></code></td><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="classname">std::__new_alloc</code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::malloc_allocator<T></code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="classname">std::__malloc_alloc_template<int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::debug_allocator<T></code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="classname">std::debug_alloc<T></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__pool_alloc<T></code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="classname">std::__default_alloc_template<bool,int></code></td><td align="left"><code class="filename">memory</code></td></tr><tr><td align="left"><code class="classname">__gnu_cxx::__mt_alloc<T></code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left"><code class="classname">__gnu_cxx::bitmap_allocator<T></code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"> </td><td align="left"> </td></tr></tbody></table></div></div><br class="table-break" /><p> Releases after gcc-3.4 have continued to add to the collection

2671

of available allocators. All of these new allocators are

2672

standard-style. The following table includes details, along with

2673

the first released version of GCC that included the extension allocator.

2674

- </p><div class="table"><a id="idp23058160"></a><p class="title"><strong>Table B.7. Extension Allocators Continued</strong></p><div class="table-contents"><table summary="Extension Allocators Continued" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /></colgroup><thead><tr><th align="left">Allocator</th><th align="left">Include</th><th align="left">Version</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::array_allocator<T></code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left">4.0.0</td></tr><tr><td align="left"><code class="classname">__gnu_cxx::throw_allocator<T></code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left">4.2.0</td></tr></tbody></table></div></div><br class="table-break" /><p>

2675

+ </p><div class="table"><a id="idm269992474464"></a><p class="title"><strong>Table B.7. Extension Allocators Continued</strong></p><div class="table-contents"><table summary="Extension Allocators Continued" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /></colgroup><thead><tr><th align="left">Allocator</th><th align="left">Include</th><th align="left">Version</th></tr></thead><tbody><tr><td align="left"><code class="classname">__gnu_cxx::array_allocator<T></code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left">4.0.0</td></tr><tr><td align="left"><code class="classname">__gnu_cxx::throw_allocator<T></code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left">4.2.0</td></tr></tbody></table></div></div><br class="table-break" /><p>

2676

Debug mode first appears.

2677

</p><p>

2678

Precompiled header support <acronym class="acronym">PCH</acronym> support.

2679

Index: libstdc++-v3/doc/html/manual/source_organization.html

2680

===================================================================

2681

--- a/src/libstdc++-v3/doc/html/manual/source_organization.html (.../tags/gcc_4_8_2_release)

2682

+++ b/src/libstdc++-v3/doc/html/manual/source_organization.html (.../branches/gcc-4_8-branch)

2683

@@ -1,5 +1,5 @@

2684

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2685

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Directory Layout and Source Conventions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="next" href="source_code_style.html" title="Coding Style" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Directory Layout and Source Conventions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_contributing.html">Prev</a> </td><th width="60%" align="center">Appendix A.

2686

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Directory Layout and Source Conventions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="next" href="source_code_style.html" title="Coding Style" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Directory Layout and Source Conventions</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_contributing.html">Prev</a> </td><th width="60%" align="center">Appendix A.

2687

Contributing

2688

2689

</th><td width="20%" align="right"> <a accesskey="n" href="source_code_style.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="contrib.organization"></a>Directory Layout and Source Conventions</h2></div></div></div><p>

2690

Index: libstdc++-v3/doc/html/manual/fstreams.html

2691

===================================================================

2692

--- a/src/libstdc++-v3/doc/html/manual/fstreams.html (.../tags/gcc_4_8_2_release)

2693

+++ b/src/libstdc++-v3/doc/html/manual/fstreams.html (.../branches/gcc-4_8-branch)

2694

@@ -1,5 +1,5 @@

2695

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2696

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>File Based Streams</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="stringstreams.html" title="Memory Based Streams" /><link rel="next" href="io_and_c.html" title="Interacting with C" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">File Based Streams</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="stringstreams.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2697

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>File Based Streams</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="stringstreams.html" title="Memory Based Streams" /><link rel="next" href="io_and_c.html" title="Interacting with C" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">File Based Streams</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="stringstreams.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2698

Input and Output

2699

2700

</th><td width="20%" align="right"> <a accesskey="n" href="io_and_c.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.filestreams"></a>File Based Streams</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.io.filestreams.copying_a_file"></a>Copying a File</h3></div></div></div><p>

2701

Index: libstdc++-v3/doc/html/manual/ext_demangling.html

2702

===================================================================

2703

--- a/src/libstdc++-v3/doc/html/manual/ext_demangling.html (.../tags/gcc_4_8_2_release)

2704

+++ b/src/libstdc++-v3/doc/html/manual/ext_demangling.html (.../branches/gcc-4_8-branch)

2705

@@ -1,5 +1,5 @@

2706

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2707

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 29. Demangling</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_io.html" title="Chapter 28. Input and Output" /><link rel="next" href="ext_concurrency.html" title="Chapter 30. Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 29. Demangling</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_io.html">Prev</a> </td><th width="60%" align="center">Part III.

2708

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 29. Demangling</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_io.html" title="Chapter 28. Input and Output" /><link rel="next" href="ext_concurrency.html" title="Chapter 30. Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 29. Demangling</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_io.html">Prev</a> </td><th width="60%" align="center">Part III.

2709

Extensions

2710

2711

</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.demangle"></a>Chapter 29. Demangling</h2></div></div></div><p>

2712

Index: libstdc++-v3/doc/html/manual/ext_preface.html

2713

===================================================================

2714

--- a/src/libstdc++-v3/doc/html/manual/ext_preface.html (.../tags/gcc_4_8_2_release)

2715

+++ b/src/libstdc++-v3/doc/html/manual/ext_preface.html (.../branches/gcc-4_8-branch)

2716

@@ -1,8 +1,8 @@

2717

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2718

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="extensions.html" title="Part III. Extensions" /><link rel="next" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="extensions.html">Prev</a> </td><th width="60%" align="center">Part III.

2719

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title></title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="extensions.html" title="Part III. Extensions" /><link rel="next" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="extensions.html">Prev</a> </td><th width="60%" align="center">Part III.

2720

Extensions

2721

2722

-</th><td width="20%" align="right"> <a accesskey="n" href="ext_compile_checks.html">Next</a></td></tr></table><hr /></div><div class="preface"><div class="titlepage"><div><div><h1 class="title"><a id="idp16425920"></a></h1></div></div></div><p>

2723

+</th><td width="20%" align="right"> <a accesskey="n" href="ext_compile_checks.html">Next</a></td></tr></table><hr /></div><div class="preface"><div class="titlepage"><div><div><h1 class="title"><a id="idm269999105296"></a></h1></div></div></div><p>

2724

Here we will make an attempt at describing the non-Standard

2725

extensions to the library. Some of these are from older versions of

2726

standard library components, namely SGI's STL, and some of these are

2727

Index: libstdc++-v3/doc/html/manual/concept_checking.html

2728

===================================================================

2729

--- a/src/libstdc++-v3/doc/html/manual/concept_checking.html (.../tags/gcc_4_8_2_release)

2730

+++ b/src/libstdc++-v3/doc/html/manual/concept_checking.html (.../branches/gcc-4_8-branch)

2731

@@ -1,5 +1,5 @@

2732

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2733

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Concept Checking</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="diagnostics.html" title="Chapter 5. Diagnostics" /><link rel="prev" href="diagnostics.html" title="Chapter 5. Diagnostics" /><link rel="next" href="utilities.html" title="Chapter 6. Utilities" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Concept Checking</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="diagnostics.html">Prev</a> </td><th width="60%" align="center">Chapter 5.

2734

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Concept Checking</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="diagnostics.html" title="Chapter 5. Diagnostics" /><link rel="prev" href="diagnostics.html" title="Chapter 5. Diagnostics" /><link rel="next" href="utilities.html" title="Chapter 6. Utilities" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Concept Checking</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="diagnostics.html">Prev</a> </td><th width="60%" align="center">Chapter 5.

2735

Diagnostics

2736

2737

</th><td width="20%" align="right"> <a accesskey="n" href="utilities.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.diagnostics.concept_checking"></a>Concept Checking</h2></div></div></div><p>

2738

Index: libstdc++-v3/doc/html/manual/mt_allocator_ex_multi.html

2739

===================================================================

2740

--- a/src/libstdc++-v3/doc/html/manual/mt_allocator_ex_multi.html (.../tags/gcc_4_8_2_release)

2741

+++ b/src/libstdc++-v3/doc/html/manual/mt_allocator_ex_multi.html (.../branches/gcc-4_8-branch)

2742

@@ -1,5 +1,5 @@

2743

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2744

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Multiple Thread Example</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_ex_single.html" title="Single Thread Example" /><link rel="next" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Multiple Thread Example</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_ex_single.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="bitmap_allocator.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.example_multi"></a>Multiple Thread Example</h2></div></div></div><p>

2745

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Multiple Thread Example</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_ex_single.html" title="Single Thread Example" /><link rel="next" href="bitmap_allocator.html" title="Chapter 21. The bitmap_allocator" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Multiple Thread Example</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_ex_single.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="bitmap_allocator.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.example_multi"></a>Multiple Thread Example</h2></div></div></div><p>

2746

In the ST example we never used the thread_id variable present in each block.

2747

Let's start by explaining the purpose of this in a MT application.

2748

</p><p>

2749

Index: libstdc++-v3/doc/html/manual/ext_compile_checks.html

2750

===================================================================

2751

--- a/src/libstdc++-v3/doc/html/manual/ext_compile_checks.html (.../tags/gcc_4_8_2_release)

2752

+++ b/src/libstdc++-v3/doc/html/manual/ext_compile_checks.html (.../branches/gcc-4_8-branch)

2753

@@ -1,5 +1,5 @@

2754

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2755

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 16. Compile Time Checks</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_preface.html" title="" /><link rel="next" href="debug_mode.html" title="Chapter 17. Debug Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 16. Compile Time Checks</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_preface.html">Prev</a> </td><th width="60%" align="center">Part III.

2756

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 16. Compile Time Checks</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_preface.html" title="" /><link rel="next" href="debug_mode.html" title="Chapter 17. Debug Mode" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 16. Compile Time Checks</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_preface.html">Prev</a> </td><th width="60%" align="center">Part III.

2757

Extensions

2758

2759

</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.compile_checks"></a>Chapter 16. Compile Time Checks</h2></div></div></div><p>

2760

Index: libstdc++-v3/doc/html/manual/strings.html

2761

===================================================================

2762

--- a/src/libstdc++-v3/doc/html/manual/strings.html (.../tags/gcc_4_8_2_release)

2763

+++ b/src/libstdc++-v3/doc/html/manual/strings.html (.../branches/gcc-4_8-branch)

2764

@@ -1,5 +1,5 @@

2765

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2766

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 7. Strings</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="traits.html" title="Traits" /><link rel="next" href="localization.html" title="Chapter 8. Localization" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 7.

2767

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 7. Strings</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="traits.html" title="Traits" /><link rel="next" href="localization.html" title="Chapter 8. Localization" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 7.

2768

Strings

2769

2770

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="traits.html">Prev</a> </td><th width="60%" align="center">Part II.

2771

@@ -6,8 +6,8 @@

2772

Standard Contents

2773

</th><td width="20%" align="right"> <a accesskey="n" href="localization.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.strings"></a>Chapter 7.

2774

Strings

2775

- <a id="idp15603440" class="indexterm"></a>

2776

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.strings.string"></a>String Classes</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="strings.string.simple"></a>Simple Transformations</h3></div></div></div><p>

2777

+ <a id="idm269999928112" class="indexterm"></a>

2778

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.strings.string"></a>String Classes</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="strings.string.simple"></a>Simple Transformations</h3></div></div></div><p>

2779

Here are Standard, simple, and portable ways to perform common

2780

transformations on a <code class="code">string</code> instance, such as

2781

"convert to all upper case." The word transformations

2782

Index: libstdc++-v3/doc/html/manual/containers_and_c.html

2783

===================================================================

2784

--- a/src/libstdc++-v3/doc/html/manual/containers_and_c.html (.../tags/gcc_4_8_2_release)

2785

+++ b/src/libstdc++-v3/doc/html/manual/containers_and_c.html (.../branches/gcc-4_8-branch)

2786

@@ -1,5 +1,5 @@

2787

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2788

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="unordered_associative.html" title="Unordered Associative" /><link rel="next" href="iterators.html" title="Chapter 10. Iterators" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="unordered_associative.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2789

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="containers.html" title="Chapter 9. Containers" /><link rel="prev" href="unordered_associative.html" title="Unordered Associative" /><link rel="next" href="iterators.html" title="Chapter 10. Iterators" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="unordered_associative.html">Prev</a> </td><th width="60%" align="center">Chapter 9.

2790

Containers

2791

2792

</th><td width="20%" align="right"> <a accesskey="n" href="iterators.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.c"></a>Interacting with C</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.c.vs_array"></a>Containers vs. Arrays</h3></div></div></div><p>

2793

Index: libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html

2794

===================================================================

2795

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html (.../tags/gcc_4_8_2_release)

2796

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html (.../branches/gcc-4_8-branch)

2797

@@ -1,5 +1,5 @@

2798

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2799

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_devel.html" title="Developer Information" /><link rel="next" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Diagnostics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_devel.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.diagnostics"></a>Diagnostics</h2></div></div></div><p>

2800

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_devel.html" title="Developer Information" /><link rel="next" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Diagnostics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_devel.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.diagnostics"></a>Diagnostics</h2></div></div></div><p>

2801

The table below presents all the diagnostics we intend to implement.

2802

Each diagnostic has a corresponding compile time switch

2803

<code class="code">-D_GLIBCXX_PROFILE_<diagnostic></code>.

2804

@@ -17,7 +17,7 @@

2805

A high accuracy means that the diagnostic is unlikely to be wrong.

2806

These grades are not perfect. They are just meant to guide users with

2807

specific needs or time budgets.

2808

- </p><div class="table"><a id="idp17088912"></a><p class="title"><strong>Table 19.2. Profile Diagnostics</strong></p><div class="table-contents"><table summary="Profile Diagnostics" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /><col align="left" class="c6" /><col align="left" class="c7" /></colgroup><thead><tr><th align="left">Group</th><th align="left">Flag</th><th align="left">Benefit</th><th align="left">Cost</th><th align="left">Freq.</th><th align="left">Implemented</th><td class="auto-generated"> </td></tr></thead><tbody><tr><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers" title="Containers">

2809

+ </p><div class="table"><a id="idm269998442544"></a><p class="title"><strong>Table 19.2. Profile Diagnostics</strong></p><div class="table-contents"><table summary="Profile Diagnostics" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /><col align="left" class="c6" /><col align="left" class="c7" /></colgroup><thead><tr><th align="left">Group</th><th align="left">Flag</th><th align="left">Benefit</th><th align="left">Cost</th><th align="left">Freq.</th><th align="left">Implemented</th><td class="auto-generated"> </td></tr></thead><tbody><tr><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers" title="Containers">

2810

CONTAINERS</a></td><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small" title="Hashtable Too Small">

2811

HASHTABLE_TOO_SMALL</a></td><td align="left">10</td><td align="left">1</td><td align="left"> </td><td align="left">10</td><td align="left">yes</td></tr><tr><td align="left"> </td><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large" title="Hashtable Too Large">

2812

HASHTABLE_TOO_LARGE</a></td><td align="left">5</td><td align="left">1</td><td align="left"> </td><td align="left">10</td><td align="left">yes</td></tr><tr><td align="left"> </td><td align="left"><a class="link" href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash" title="Inefficient Hash">

2813

@@ -374,7 +374,7 @@

2814

Quick Sort for a particular call context.

2815

</p></li><li class="listitem"><p><span class="emphasis"><em>Fundamentals:</em></span>

2816

See papers:

2817

- <a class="link" href="http://portal.acm.org/citation.cfm?doid=1065944.1065981" target="_top">

2818

+ <a class="link" href="https://dl.acm.org/citation.cfm?doid=1065944.1065981" target="_top">

2819

A framework for adaptive algorithm selection in STAPL</a> and

2820

2821

Optimizing Sorting with Machine Learning Algorithms</a>.

2822

@@ -500,7 +500,7 @@

2823

Keep a shadow for each container. Record iterator dereferences and

2824

container member accesses. Issue advice for elements referenced by

2825

multiple threads.

2826

- See paper: <a class="link" href="http://portal.acm.org/citation.cfm?id=207110.207148" target="_top">

2827

+ See paper: <a class="link" href="https://dl.acm.org/citation.cfm?id=207110.207148" target="_top">

2828

The LRPD test: speculative run-time parallelization of loops with

2829

privatization and reduction parallelization</a>.

2830

</p></li><li class="listitem"><p><span class="emphasis"><em>Cost model:</em></span>

2831

Index: libstdc++-v3/doc/html/manual/ext_concurrency_impl.html

2832

===================================================================

2833

--- a/src/libstdc++-v3/doc/html/manual/ext_concurrency_impl.html (.../tags/gcc_4_8_2_release)

2834

+++ b/src/libstdc++-v3/doc/html/manual/ext_concurrency_impl.html (.../branches/gcc-4_8-branch)

2835

@@ -1,5 +1,5 @@

2836

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2837

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="next" href="ext_concurrency_use.html" title="Use" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency_use.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.concurrency.impl.atomic_fallbacks"></a>Using Builtin Atomic Functions</h3></div></div></div><p>The functions for atomic operations described above are either

2838

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="prev" href="ext_concurrency.html" title="Chapter 30. Concurrency" /><link rel="next" href="ext_concurrency_use.html" title="Use" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_concurrency.html">Prev</a> </td><th width="60%" align="center">Chapter 30. Concurrency</th><td width="20%" align="right"> <a accesskey="n" href="ext_concurrency_use.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.concurrency.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.concurrency.impl.atomic_fallbacks"></a>Using Builtin Atomic Functions</h3></div></div></div><p>The functions for atomic operations described above are either

2839

implemented via compiler intrinsics (if the underlying host is

2840

capable) or by library fallbacks.</p><p>Compiler intrinsics (builtins) are always preferred. However, as

2841

the compiler builtins for atomics are not universally implemented,

2842

Index: libstdc++-v3/doc/html/manual/io_and_c.html

2843

===================================================================

2844

--- a/src/libstdc++-v3/doc/html/manual/io_and_c.html (.../tags/gcc_4_8_2_release)

2845

+++ b/src/libstdc++-v3/doc/html/manual/io_and_c.html (.../branches/gcc-4_8-branch)

2846

@@ -1,5 +1,5 @@

2847

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2848

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="fstreams.html" title="File Based Streams" /><link rel="next" href="atomics.html" title="Chapter 14. Atomics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="fstreams.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2849

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="fstreams.html" title="File Based Streams" /><link rel="next" href="atomics.html" title="Chapter 14. Atomics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="fstreams.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

2850

Input and Output

2851

2852

</th><td width="20%" align="right"> <a accesskey="n" href="atomics.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.c"></a>Interacting with C</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.io.c.FILE"></a>Using FILE* and file descriptors</h3></div></div></div><p>

2853

Index: libstdc++-v3/doc/html/manual/documentation_hacking.html

2854

===================================================================

2855

--- a/src/libstdc++-v3/doc/html/manual/documentation_hacking.html (.../tags/gcc_4_8_2_release)

2856

+++ b/src/libstdc++-v3/doc/html/manual/documentation_hacking.html (.../branches/gcc-4_8-branch)

2857

@@ -1,5 +1,5 @@

2858

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2859

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Writing and Generating Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, documentation, style, docbook, doxygen" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="next" href="internals.html" title="Porting to New Hardware or Operating Systems" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Writing and Generating Documentation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_porting.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2860

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Writing and Generating Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, documentation, style, docbook, doxygen" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="next" href="internals.html" title="Porting to New Hardware or Operating Systems" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Writing and Generating Documentation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_porting.html">Prev</a> </td><th width="60%" align="center">Appendix B.

2861

Porting and Maintenance

2862

2863

</th><td width="20%" align="right"> <a accesskey="n" href="internals.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="appendix.porting.doc"></a>Writing and Generating Documentation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.intro"></a>Introduction</h3></div></div></div><p>

2864

@@ -112,7 +112,7 @@

2865

supported, and are always aliased to dummy rules. These

2866

unsupported formats are: <span class="emphasis"><em>info</em></span>,

2867

<span class="emphasis"><em>ps</em></span>, and <span class="emphasis"><em>dvi</em></span>.

2868

- </p></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.doxygen"></a>Doxygen</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="doxygen.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idp22162432"></a><p class="title"><strong>Table B.1. Doxygen Prerequisites</strong></p><div class="table-contents"><table summary="Doxygen Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">coreutils</td><td align="center">8.5</td><td align="center">all</td></tr><tr><td align="center">bash</td><td align="center">4.1</td><td align="center">all</td></tr><tr><td align="center">doxygen</td><td align="center">1.7.6.1</td><td align="center">all</td></tr><tr><td align="center">graphviz</td><td align="center">2.26</td><td align="center">graphical hierarchies</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2869

+ </p></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.doxygen"></a>Doxygen</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="doxygen.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idm269993370272"></a><p class="title"><strong>Table B.1. Doxygen Prerequisites</strong></p><div class="table-contents"><table summary="Doxygen Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">coreutils</td><td align="center">8.5</td><td align="center">all</td></tr><tr><td align="center">bash</td><td align="center">4.1</td><td align="center">all</td></tr><tr><td align="center">doxygen</td><td align="center">1.7.6.1</td><td align="center">all</td></tr><tr><td align="center">graphviz</td><td align="center">2.26</td><td align="center">graphical hierarchies</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2870

Prerequisite tools are Bash 2.0 or later,

2871

<a class="link" href="http://www.doxygen.org/" target="_top">Doxygen</a>, and

2872

the <a class="link" href="http://www.gnu.org/software/coreutils/" target="_top">GNU

2873

@@ -232,9 +232,8 @@

2874

member functions.

2875

</p><p>

2876

Some commentary to accompany

2877

- the first list in the <a class="link" href="http://www.stack.nl/~dimitri/doxygen/docblocks.html" target="_top">Special

2878

- Documentation Blocks</a> section of

2879

- the Doxygen manual:

2880

+ the first list in the <a class="link" href="http://www.stack.nl/~dimitri/doxygen/manual/docblocks.html" target="_top">Special

2881

+ Documentation Blocks</a> section of the Doxygen manual:

2882

</p><div class="orderedlist"><ol class="orderedlist" type="1"><li class="listitem"><p>For longer comments, use the Javadoc style...</p></li><li class="listitem"><p>

2883

...not the Qt style. The intermediate *'s are preferred.

2884

</p></li><li class="listitem"><p>

2885

@@ -310,7 +309,7 @@

2886

writing Doxygen comments. Single and double quotes, and

2887

separators in filenames are two common trouble spots. When in

2888

doubt, consult the following table.

2889

- </p><div class="table"><a id="idp22238096"></a><p class="title"><strong>Table B.2. HTML to Doxygen Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Doxygen Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Doxygen</th></tr></thead><tbody><tr><td align="left">\</td><td align="left">\\</td></tr><tr><td align="left">"</td><td align="left">\"</td></tr><tr><td align="left">'</td><td align="left">\'</td></tr><tr><td align="left"><i></td><td align="left">@a word</td></tr><tr><td align="left"><b></td><td align="left">@b word</td></tr><tr><td align="left"><code></td><td align="left">@c word</td></tr><tr><td align="left"><em></td><td align="left">@a word</td></tr><tr><td align="left"><em></td><td align="left"><em>two words or more</em></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.docbook"></a>Docbook</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="docbook.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idp22257536"></a><p class="title"><strong>Table B.3. Docbook Prerequisites</strong></p><div class="table-contents"><table summary="Docbook Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">docbook5-style-xsl</td><td align="center">1.76.1</td><td align="center">all</td></tr><tr><td align="center">xsltproc</td><td align="center">1.1.26</td><td align="center">all</td></tr><tr><td align="center">xmllint</td><td align="center">2.7.7</td><td align="center">validation</td></tr><tr><td align="center">dblatex</td><td align="center">0.3</td><td align="center">pdf output</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr><tr><td align="center">docbook2X</td><td align="center">0.8.8</td><td align="center">info output</td></tr><tr><td align="center">epub3 stylesheets</td><td align="center">b3</td><td align="center">epub output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2890

+ </p><div class="table"><a id="idm269993294592"></a><p class="title"><strong>Table B.2. HTML to Doxygen Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Doxygen Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Doxygen</th></tr></thead><tbody><tr><td align="left">\</td><td align="left">\\</td></tr><tr><td align="left">"</td><td align="left">\"</td></tr><tr><td align="left">'</td><td align="left">\'</td></tr><tr><td align="left"><i></td><td align="left">@a word</td></tr><tr><td align="left"><b></td><td align="left">@b word</td></tr><tr><td align="left"><code></td><td align="left">@c word</td></tr><tr><td align="left"><em></td><td align="left">@a word</td></tr><tr><td align="left"><em></td><td align="left"><em>two words or more</em></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="doc.docbook"></a>Docbook</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="docbook.prereq"></a>Prerequisites</h4></div></div></div><div class="table"><a id="idm269993275152"></a><p class="title"><strong>Table B.3. Docbook Prerequisites</strong></p><div class="table-contents"><table summary="Docbook Prerequisites" border="1"><colgroup><col align="center" class="c1" /><col align="center" class="c2" /><col align="center" class="c3" /></colgroup><thead><tr><th align="center">Tool</th><th align="center">Version</th><th align="center">Required By</th></tr></thead><tbody><tr><td align="center">docbook5-style-xsl</td><td align="center">1.76.1</td><td align="center">all</td></tr><tr><td align="center">xsltproc</td><td align="center">1.1.26</td><td align="center">all</td></tr><tr><td align="center">xmllint</td><td align="center">2.7.7</td><td align="center">validation</td></tr><tr><td align="center">dblatex</td><td align="center">0.3</td><td align="center">pdf output</td></tr><tr><td align="center">pdflatex</td><td align="center">2007-59</td><td align="center">pdf output</td></tr><tr><td align="center">docbook2X</td><td align="center">0.8.8</td><td align="center">info output</td></tr><tr><td align="center">epub3 stylesheets</td><td align="center">b3</td><td align="center">epub output</td></tr></tbody></table></div></div><br class="table-break" /><p>

2891

Editing the DocBook sources requires an XML editor. Many

2892

exist: some notable options

2893

include <span class="command"><strong>emacs</strong></span>, <span class="application">Kate</span>,

2894

@@ -520,11 +519,11 @@

2895

<a class="link" href="http://www.docbook.org/tdg/en/html/part2.html" target="_top">online</a>.

2896

An incomplete reference for HTML to Docbook conversion is

2897

detailed in the table below.

2898

- </p><div class="table"><a id="idp22335040"></a><p class="title"><strong>Table B.4. HTML to Docbook XML Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Docbook XML Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Docbook</th></tr></thead><tbody><tr><td align="left"><p></td><td align="left"><para></td></tr><tr><td align="left"><pre></td><td align="left"><computeroutput>, <programlisting>,

2899

+ </p><div class="table"><a id="idm269993197520"></a><p class="title"><strong>Table B.4. HTML to Docbook XML Markup Comparison</strong></p><div class="table-contents"><table summary="HTML to Docbook XML Markup Comparison" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">HTML</th><th align="left">Docbook</th></tr></thead><tbody><tr><td align="left"><p></td><td align="left"><para></td></tr><tr><td align="left"><pre></td><td align="left"><computeroutput>, <programlisting>,

2900

2901

And examples of detailed markup for which there are no real HTML

2902

equivalents are listed in the table below.

2903

-</p><div class="table"><a id="idp22359184"></a><p class="title"><strong>Table B.5. Docbook XML Element Use</strong></p><div class="table-contents"><table summary="Docbook XML Element Use" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Element</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><structname></td><td align="left"><structname>char_traits</structname></td></tr><tr><td align="left"><classname></td><td align="left"><classname>string</classname></td></tr><tr><td align="left"><function></td><td align="left">

2904

+</p><div class="table"><a id="idm269993173376"></a><p class="title"><strong>Table B.5. Docbook XML Element Use</strong></p><div class="table-contents"><table summary="Docbook XML Element Use" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Element</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><structname></td><td align="left"><structname>char_traits</structname></td></tr><tr><td align="left"><classname></td><td align="left"><classname>string</classname></td></tr><tr><td align="left"><function></td><td align="left">

2905

<p><function>clear()</function></p>

2906

<p><function>fs.clear()</function></p>

2907

</td></tr><tr><td align="left"><type></td><td align="left"><type>long long</type></td></tr><tr><td align="left"><varname></td><td align="left"><varname>fs</varname></td></tr><tr><td align="left"><literal></td><td align="left">

2908

Index: libstdc++-v3/doc/html/manual/extensions.html

2909

===================================================================

2910

--- a/src/libstdc++-v3/doc/html/manual/extensions.html (.../tags/gcc_4_8_2_release)

2911

+++ b/src/libstdc++-v3/doc/html/manual/extensions.html (.../branches/gcc-4_8-branch)

2912

@@ -1,11 +1,11 @@

2913

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2914

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part III. Extensions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="io_and_c.html" title="Interacting with C" /><link rel="next" href="ext_preface.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part III.

2915

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Part III. Extensions</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="index.html" title="The GNU C++ Library Manual" /><link rel="prev" href="io_and_c.html" title="Interacting with C" /><link rel="next" href="ext_preface.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part III.

2916

Extensions

2917

2918

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="io_and_c.html">Prev</a> </td><th width="60%" align="center">The GNU C++ Library Manual</th><td width="20%" align="right"> <a accesskey="n" href="ext_preface.html">Next</a></td></tr></table><hr /></div><div class="part"><div class="titlepage"><div><div><h1 class="title"><a id="manual.ext"></a>Part III.

2919

Extensions

2920

- <a id="idp16423680" class="indexterm"></a>

2921

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="preface"><a href="ext_preface.html"></a></span></dt><dt><span class="chapter"><a href="ext_compile_checks.html">16. Compile Time Checks</a></span></dt><dt><span class="chapter"><a href="debug_mode.html">17. Debug Mode</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

2922

+ <a id="idm269999107536" class="indexterm"></a>

2923

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="preface"><a href="ext_preface.html"></a></span></dt><dt><span class="chapter"><a href="ext_compile_checks.html">16. Compile Time Checks</a></span></dt><dt><span class="chapter"><a href="debug_mode.html">17. Debug Mode</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

2924

debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.alt">Alternatives for Coexistence</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.other">Other Implementations</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="parallel_mode.html">18. Parallel Mode</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode.html#manual.ext.parallel_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="parallel_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.prereq_flags">Prerequisite Compiler Flags</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.parallel_mode">Using Parallel Mode</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.specific">Using Specific Parallel Components</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.intro">Interface Basics</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning">Configuration and Tuning</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.omp">Setting up the OpenMP Environment</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.compile">Compile Time Switches</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.settings">Run Time Settings and Defaults</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.impl">Implementation Namespaces</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_test.html">Testing</a></span></dt><dt><span class="bibliography"><a href="parallel_mode.html#parallel_mode.biblio">Bibliography</a></span></dt></dl></dd><dt><span class="chapter"><a href="profile_mode.html">19. Profile Mode</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.using">Using the Profile Mode</a></span></dt><dt><span class="section"><a href="profile_mode.html#manual.ext.profile_mode.tuning">Tuning the Profile Mode</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.wrapper">Wrapper Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.instrumentation">Instrumentation</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.rtlib">Run Time Behavior</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.analysis">Analysis and Diagnostics</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.cost-model">Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.reports">Reports</a></span></dt><dt><span class="section"><a href="profile_mode_design.html#manual.ext.profile_mode.design.testing">Testing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_api.html">Extensions for Custom Containers</a></span></dt><dt><span class="section"><a href="profile_mode_cost_model.html">Empirical Cost Model</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html">Implementation Issues</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stack">Stack Traces</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.symbols">Symbolization of Instruction Addresses</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.concurrency">Concurrency</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.stdlib-in-proflib">Using the Standard Library in the Instrumentation Implementation</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.malloc-hooks">Malloc Hooks</a></span></dt><dt><span class="section"><a href="profile_mode_impl.html#manual.ext.profile_mode.implementation.construction-destruction">Construction and Destruction of Global Objects</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_devel.html">Developer Information</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.bigpic">Big Picture</a></span></dt><dt><span class="section"><a href="profile_mode_devel.html#manual.ext.profile_mode.developer.howto">How To Add A Diagnostic</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html">Diagnostics</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.template">Diagnostic Template</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.containers">Containers</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_small">Hashtable Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_too_large">Hashtable Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.inefficient_hash">Inefficient Hash</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_small">Vector Too Small</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_too_large">Vector Too Large</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_hashtable">Vector to Hashtable</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.hashtable_to_vector">Hashtable to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.vector_to_list">Vector to List</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_vector">List to Vector</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.list_to_slist">List to Forward List (Slist)</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.assoc_ord_to_unord">Ordered to Unordered Associative Container</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms">Algorithms</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.algorithms.sort">Sort Algorithm Performance</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality">Data Locality</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.sw_prefetch">Need Software Prefetch</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.locality.linked">Linked Structure Locality</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread">Multithreaded Data Access</a></span></dt><dd><dl><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.ddtest">Data Dependence Violations at Container Level</a></span></dt><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.mthread.false_share">False Sharing</a></span></dt></dl></dd><dt><span class="section"><a href="profile_mode_diagnostics.html#manual.ext.profile_mode.analysis.statistics">Statistics</a></span></dt></dl></dd><dt><span class="bibliography"><a href="profile_mode.html#profile_mode.biblio">Bibliography</a></span></dt></dl></dd><dt><span class="chapter"><a href="mt_allocator.html">20. The mt_allocator</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator.html#allocator.mt.intro">Intro</a></span></dt><dt><span class="section"><a href="mt_allocator_design.html">Design Issues</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_design.html#allocator.mt.overview">Overview</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.tune">Tunable Parameters</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.init">Initialization</a></span></dt><dt><span class="section"><a href="mt_allocator_impl.html#allocator.mt.deallocation">Deallocation Notes</a></span></dt></dl></dd><dt><span class="section"><a href="mt_allocator_ex_single.html">Single Thread Example</a></span></dt><dt><span class="section"><a href="mt_allocator_ex_multi.html">Multiple Thread Example</a></span></dt></dl></dd><dt><span class="chapter"><a href="bitmap_allocator.html">21. The bitmap_allocator</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator.html#allocator.bitmap.design">Design</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.free_list_store">Free List Store</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block">Super Block</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.super_block_data">Super Block Data Layout</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.max_wasted">Maximum Wasted Percentage</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.allocate"><code class="function">allocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.deallocate"><code class="function">deallocate</code></a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.questions">Questions</a></span></dt><dd><dl><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.1">1</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.2">2</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.question.3">3</a></span></dt></dl></dd><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.locality">Locality</a></span></dt><dt><span class="section"><a href="bitmap_allocator_impl.html#bitmap.impl.grow_policy">Overhead and Grow Policy</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="policy_data_structures.html">22. Policy-Based Data Structures</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro">Intro</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues">Performance Issues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.associative">Associative</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.issues.priority_queue">Priority Que</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation">Goals</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.associative">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.iterators">Iterators</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.associative.functions">Functional</a></span></dt></dl></dd><dt><span class="section"><a href="policy_data_structures.html#pbds.intro.motivation.priority_queue">Priority Queues</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.policy">Policy Choices</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.underlying">Underlying Data Structures</a></span></dt><dt><span class="section"><a href="policy_data_structures.html#motivation.priority_queue.binary_heap">Binary Heaps</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="section"><a href="policy_data_structures_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.organization">Organization</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial">Tutorial</a></span></dt><dd><dl><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.basic">Basic Use</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.configuring">

2925

Configuring via Template Parameters

2926

</a></span></dt><dt><span class="section"><a href="policy_data_structures_using.html#pbds.using.tutorial.traits">

2927

Index: libstdc++-v3/doc/html/manual/debug_mode_using.html

2928

===================================================================

2929

--- a/src/libstdc++-v3/doc/html/manual/debug_mode_using.html (.../tags/gcc_4_8_2_release)

2930

+++ b/src/libstdc++-v3/doc/html/manual/debug_mode_using.html (.../branches/gcc-4_8-branch)

2931

@@ -1,5 +1,5 @@

2932

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2933

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_semantics.html" title="Semantics" /><link rel="next" href="debug_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.using"></a>Using</h2></div></div></div><p>

2934

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Using</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode_semantics.html" title="Semantics" /><link rel="next" href="debug_mode_design.html" title="Design" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Using</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.using"></a>Using</h2></div></div></div><p>

2935

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="debug_mode.using.mode"></a>Using the Debug Mode</h3></div></div></div><p>To use the libstdc++ debug mode, compile your application with the

2936

compiler flag <code class="code">-D_GLIBCXX_DEBUG</code>. Note that this flag

2937

changes the sizes and behavior of standard class templates such

2938

@@ -18,6 +18,6 @@

2939

mode or with debug mode. The

2940

following table provides the names and headers of the debugging

2941

containers:

2942

-</p><div class="table"><a id="idp16490400"></a><p class="title"><strong>Table 17.1. Debugging Containers</strong></p><div class="table-contents"><table summary="Debugging Containers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::bitset</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="classname">__gnu_debug::bitset</code></td><td align="left"><code class="filename"><debug/bitset></code></td></tr><tr><td align="left"><code class="classname">std::deque</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="classname">__gnu_debug::deque</code></td><td align="left"><code class="filename"><debug/deque></code></td></tr><tr><td align="left"><code class="classname">std::list</code></td><td align="left"><code class="filename">list</code></td><td align="left"><code class="classname">__gnu_debug::list</code></td><td align="left"><code class="filename"><debug/list></code></td></tr><tr><td align="left"><code class="classname">std::map</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::map</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multimap</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::multimap</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multiset</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::multiset</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::set</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::set</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::wstring</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::wstring</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::basic_string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::basic_string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::vector</code></td><td align="left"><code class="filename">vector</code></td><td align="left"><code class="classname">__gnu_debug::vector</code></td><td align="left"><code class="filename"><debug/vector></code></td></tr></tbody></table></div></div><br class="table-break" /><p>In addition, when compiling in C++11 mode, these additional

2943

+</p><div class="table"><a id="idm269999040896"></a><p class="title"><strong>Table 17.1. Debugging Containers</strong></p><div class="table-contents"><table summary="Debugging Containers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::bitset</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="classname">__gnu_debug::bitset</code></td><td align="left"><code class="filename"><debug/bitset></code></td></tr><tr><td align="left"><code class="classname">std::deque</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="classname">__gnu_debug::deque</code></td><td align="left"><code class="filename"><debug/deque></code></td></tr><tr><td align="left"><code class="classname">std::list</code></td><td align="left"><code class="filename">list</code></td><td align="left"><code class="classname">__gnu_debug::list</code></td><td align="left"><code class="filename"><debug/list></code></td></tr><tr><td align="left"><code class="classname">std::map</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::map</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multimap</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="classname">__gnu_debug::multimap</code></td><td align="left"><code class="filename"><debug/map></code></td></tr><tr><td align="left"><code class="classname">std::multiset</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::multiset</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::set</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="classname">__gnu_debug::set</code></td><td align="left"><code class="filename"><debug/set></code></td></tr><tr><td align="left"><code class="classname">std::string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::wstring</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::wstring</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::basic_string</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="classname">__gnu_debug::basic_string</code></td><td align="left"><code class="filename"><debug/string></code></td></tr><tr><td align="left"><code class="classname">std::vector</code></td><td align="left"><code class="filename">vector</code></td><td align="left"><code class="classname">__gnu_debug::vector</code></td><td align="left"><code class="filename"><debug/vector></code></td></tr></tbody></table></div></div><br class="table-break" /><p>In addition, when compiling in C++11 mode, these additional

2944

containers have additional debug capability.

2945

-</p><div class="table"><a id="idp16535296"></a><p class="title"><strong>Table 17.2. Debugging Containers C++11</strong></p><div class="table-contents"><table summary="Debugging Containers C++11" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::unordered_map</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_map</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multimap</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multimap</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_set</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_set</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multiset</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multiset</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="debug_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

2946

\ No newline at end of file

2947

+</p><div class="table"><a id="idm269998996000"></a><p class="title"><strong>Table 17.2. Debugging Containers C++11</strong></p><div class="table-contents"><table summary="Debugging Containers C++11" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Container</th><th align="left">Header</th><th align="left">Debug container</th><th align="left">Debug header</th></tr></thead><tbody><tr><td align="left"><code class="classname">std::unordered_map</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_map</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multimap</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multimap</code></td><td align="left"><code class="filename"><debug/unordered_map></code></td></tr><tr><td align="left"><code class="classname">std::unordered_set</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_set</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr><tr><td align="left"><code class="classname">std::unordered_multiset</code></td><td align="left"><code class="filename">unordered_set</code></td><td align="left"><code class="classname">__gnu_debug::unordered_multiset</code></td><td align="left"><code class="filename"><debug/unordered_set></code></td></tr></tbody></table></div></div><br class="table-break" /></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="debug_mode_semantics.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="debug_mode.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="debug_mode_design.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Semantics </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Design</td></tr></table></div></body></html>

2948

\ No newline at end of file

2949

Index: libstdc++-v3/doc/html/manual/parallel_mode.html

2950

===================================================================

2951

--- a/src/libstdc++-v3/doc/html/manual/parallel_mode.html (.../tags/gcc_4_8_2_release)

2952

+++ b/src/libstdc++-v3/doc/html/manual/parallel_mode.html (.../branches/gcc-4_8-branch)

2953

@@ -1,8 +1,8 @@

2954

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2955

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 18. Parallel Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="debug_mode_design.html" title="Design" /><link rel="next" href="parallel_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 18. Parallel Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_design.html">Prev</a> </td><th width="60%" align="center">Part III.

2956

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 18. Parallel Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, parallel" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="debug_mode_design.html" title="Design" /><link rel="next" href="parallel_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 18. Parallel Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode_design.html">Prev</a> </td><th width="60%" align="center">Part III.

2957

Extensions

2958

2959

-</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.parallel_mode"></a>Chapter 18. Parallel Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="parallel_mode.html#manual.ext.parallel_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="parallel_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.prereq_flags">Prerequisite Compiler Flags</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.parallel_mode">Using Parallel Mode</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.specific">Using Specific Parallel Components</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.intro">Interface Basics</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning">Configuration and Tuning</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.omp">Setting up the OpenMP Environment</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.compile">Compile Time Switches</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.settings">Run Time Settings and Defaults</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.impl">Implementation Namespaces</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_test.html">Testing</a></span></dt><dt><span class="bibliography"><a href="parallel_mode.html#parallel_mode.biblio">Bibliography</a></span></dt></dl></div><p> The libstdc++ parallel mode is an experimental parallel

2960

+</th><td width="20%" align="right"> <a accesskey="n" href="parallel_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.parallel_mode"></a>Chapter 18. Parallel Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="parallel_mode.html#manual.ext.parallel_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="parallel_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.prereq_flags">Prerequisite Compiler Flags</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.parallel_mode">Using Parallel Mode</a></span></dt><dt><span class="section"><a href="parallel_mode_using.html#parallel_mode.using.specific">Using Specific Parallel Components</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.intro">Interface Basics</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning">Configuration and Tuning</a></span></dt><dd><dl><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.omp">Setting up the OpenMP Environment</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.compile">Compile Time Switches</a></span></dt><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.tuning.settings">Run Time Settings and Defaults</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_design.html#parallel_mode.design.impl">Implementation Namespaces</a></span></dt></dl></dd><dt><span class="section"><a href="parallel_mode_test.html">Testing</a></span></dt><dt><span class="bibliography"><a href="parallel_mode.html#parallel_mode.biblio">Bibliography</a></span></dt></dl></div><p> The libstdc++ parallel mode is an experimental parallel

2961

implementation of many algorithms the C++ Standard Library.

2962

</p><p>

2963

Several of the standard algorithms, for instance

2964

@@ -12,11 +12,11 @@

2965

specific compiler flag.

2966

</p><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.parallel_mode.intro"></a>Intro</h2></div></div></div><p>The following library components in the include

2967

<code class="filename">numeric</code> are included in the parallel mode:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><code class="function">std::accumulate</code></p></li><li class="listitem"><p><code class="function">std::adjacent_difference</code></p></li><li class="listitem"><p><code class="function">std::inner_product</code></p></li><li class="listitem"><p><code class="function">std::partial_sum</code></p></li></ul></div><p>The following library components in the include

2968

-<code class="filename">algorithm</code> are included in the parallel mode:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><code class="function">std::adjacent_find</code></p></li><li class="listitem"><p><code class="function">std::count</code></p></li><li class="listitem"><p><code class="function">std::count_if</code></p></li><li class="listitem"><p><code class="function">std::equal</code></p></li><li class="listitem"><p><code class="function">std::find</code></p></li><li class="listitem"><p><code class="function">std::find_if</code></p></li><li class="listitem"><p><code class="function">std::find_first_of</code></p></li><li class="listitem"><p><code class="function">std::for_each</code></p></li><li class="listitem"><p><code class="function">std::generate</code></p></li><li class="listitem"><p><code class="function">std::generate_n</code></p></li><li class="listitem"><p><code class="function">std::lexicographical_compare</code></p></li><li class="listitem"><p><code class="function">std::mismatch</code></p></li><li class="listitem"><p><code class="function">std::search</code></p></li><li class="listitem"><p><code class="function">std::search_n</code></p></li><li class="listitem"><p><code class="function">std::transform</code></p></li><li class="listitem"><p><code class="function">std::replace</code></p></li><li class="listitem"><p><code class="function">std::replace_if</code></p></li><li class="listitem"><p><code class="function">std::max_element</code></p></li><li class="listitem"><p><code class="function">std::merge</code></p></li><li class="listitem"><p><code class="function">std::min_element</code></p></li><li class="listitem"><p><code class="function">std::nth_element</code></p></li><li class="listitem"><p><code class="function">std::partial_sort</code></p></li><li class="listitem"><p><code class="function">std::partition</code></p></li><li class="listitem"><p><code class="function">std::random_shuffle</code></p></li><li class="listitem"><p><code class="function">std::set_union</code></p></li><li class="listitem"><p><code class="function">std::set_intersection</code></p></li><li class="listitem"><p><code class="function">std::set_symmetric_difference</code></p></li><li class="listitem"><p><code class="function">std::set_difference</code></p></li><li class="listitem"><p><code class="function">std::sort</code></p></li><li class="listitem"><p><code class="function">std::stable_sort</code></p></li><li class="listitem"><p><code class="function">std::unique_copy</code></p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="parallel_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idp16926864"></a><p><span class="citetitle"><em class="citetitle">

2969

+<code class="filename">algorithm</code> are included in the parallel mode:</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p><code class="function">std::adjacent_find</code></p></li><li class="listitem"><p><code class="function">std::count</code></p></li><li class="listitem"><p><code class="function">std::count_if</code></p></li><li class="listitem"><p><code class="function">std::equal</code></p></li><li class="listitem"><p><code class="function">std::find</code></p></li><li class="listitem"><p><code class="function">std::find_if</code></p></li><li class="listitem"><p><code class="function">std::find_first_of</code></p></li><li class="listitem"><p><code class="function">std::for_each</code></p></li><li class="listitem"><p><code class="function">std::generate</code></p></li><li class="listitem"><p><code class="function">std::generate_n</code></p></li><li class="listitem"><p><code class="function">std::lexicographical_compare</code></p></li><li class="listitem"><p><code class="function">std::mismatch</code></p></li><li class="listitem"><p><code class="function">std::search</code></p></li><li class="listitem"><p><code class="function">std::search_n</code></p></li><li class="listitem"><p><code class="function">std::transform</code></p></li><li class="listitem"><p><code class="function">std::replace</code></p></li><li class="listitem"><p><code class="function">std::replace_if</code></p></li><li class="listitem"><p><code class="function">std::max_element</code></p></li><li class="listitem"><p><code class="function">std::merge</code></p></li><li class="listitem"><p><code class="function">std::min_element</code></p></li><li class="listitem"><p><code class="function">std::nth_element</code></p></li><li class="listitem"><p><code class="function">std::partial_sort</code></p></li><li class="listitem"><p><code class="function">std::partition</code></p></li><li class="listitem"><p><code class="function">std::random_shuffle</code></p></li><li class="listitem"><p><code class="function">std::set_union</code></p></li><li class="listitem"><p><code class="function">std::set_intersection</code></p></li><li class="listitem"><p><code class="function">std::set_symmetric_difference</code></p></li><li class="listitem"><p><code class="function">std::set_difference</code></p></li><li class="listitem"><p><code class="function">std::sort</code></p></li><li class="listitem"><p><code class="function">std::stable_sort</code></p></li><li class="listitem"><p><code class="function">std::unique_copy</code></p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h2 class="title"><a id="parallel_mode.biblio"></a>Bibliography</h2></div></div></div><div class="biblioentry"><a id="idm269998604464"></a><p><span class="citetitle"><em class="citetitle">

2970

Parallelization of Bulk Operations for STL Dictionaries

2971

</em>. </span><span class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span>. </span><span class="author"><span class="firstname">Leonor</span> <span class="surname">Frias</span>. </span><span class="copyright">Copyright © 2007 . </span><span class="publisher"><span class="publishername">

2972

Workshop on Highly Parallel Processing on a Chip (HPPC) 2007. (LNCS)

2973

- . </span></span></p></div><div class="biblioentry"><a id="idp16931936"></a><p><span class="citetitle"><em class="citetitle">

2974

+ . </span></span></p></div><div class="biblioentry"><a id="idm269998599392"></a><p><span class="citetitle"><em class="citetitle">

2975

The Multi-Core Standard Template Library

2976

</em>. </span><span class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span>. </span><span class="author"><span class="firstname">Peter</span> <span class="surname">Sanders</span>. </span><span class="author"><span class="firstname">Felix</span> <span class="surname">Putze</span>. </span><span class="copyright">Copyright © 2007 . </span><span class="publisher"><span class="publishername">

2977

Euro-Par 2007: Parallel Processing. (LNCS 4641)

2978

Index: libstdc++-v3/doc/html/manual/debug_mode_semantics.html

2979

===================================================================

2980

--- a/src/libstdc++-v3/doc/html/manual/debug_mode_semantics.html (.../tags/gcc_4_8_2_release)

2981

+++ b/src/libstdc++-v3/doc/html/manual/debug_mode_semantics.html (.../branches/gcc-4_8-branch)

2982

@@ -1,5 +1,5 @@

2983

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2984

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Semantics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="next" href="debug_mode_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Semantics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.semantics"></a>Semantics</h2></div></div></div><p>

2985

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Semantics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="prev" href="debug_mode.html" title="Chapter 17. Debug Mode" /><link rel="next" href="debug_mode_using.html" title="Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Semantics</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="debug_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 17. Debug Mode</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.semantics"></a>Semantics</h2></div></div></div><p>

2986

</p><p>A program that uses the C++ standard library correctly

2987

will maintain the same semantics under debug mode as it had with

2988

the normal (release) library. All functional and exception-handling

2989

Index: libstdc++-v3/doc/html/manual/setup.html

2990

===================================================================

2991

--- a/src/libstdc++-v3/doc/html/manual/setup.html (.../tags/gcc_4_8_2_release)

2992

+++ b/src/libstdc++-v3/doc/html/manual/setup.html (.../branches/gcc-4_8-branch)

2993

@@ -1,8 +1,8 @@

2994

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

2995

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 2. Setup</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="bugs.html" title="Bugs" /><link rel="next" href="configure.html" title="Configure" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 2. Setup</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bugs.html">Prev</a> </td><th width="60%" align="center">Part I.

2996

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 2. Setup</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="intro.html" title="Part I. Introduction" /><link rel="prev" href="bugs.html" title="Bugs" /><link rel="next" href="configure.html" title="Configure" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 2. Setup</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="bugs.html">Prev</a> </td><th width="60%" align="center">Part I.

2997

Introduction

2998

2999

-</th><td width="20%" align="right"> <a accesskey="n" href="configure.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.setup"></a>Chapter 2. Setup</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></div><p>To transform libstdc++ sources into installed include files

3000

+</th><td width="20%" align="right"> <a accesskey="n" href="configure.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.setup"></a>Chapter 2. Setup</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></div><p>To transform libstdc++ sources into installed include files

3001

and properly built binaries useful for linking to other software is

3002

a multi-step process. Steps include getting the sources,

3003

configuring and building the sources, testing, and installation.

3004

Index: libstdc++-v3/doc/html/manual/backwards.html

3005

===================================================================

3006

--- a/src/libstdc++-v3/doc/html/manual/backwards.html (.../tags/gcc_4_8_2_release)

3007

+++ b/src/libstdc++-v3/doc/html/manual/backwards.html (.../branches/gcc-4_8-branch)

3008

@@ -1,5 +1,5 @@

3009

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3010

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Backwards Compatibility</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, backwards" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="api.html" title="API Evolution and Deprecation History" /><link rel="next" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Backwards Compatibility</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center">Appendix B.

3011

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Backwards Compatibility</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, backwards" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="api.html" title="API Evolution and Deprecation History" /><link rel="next" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Backwards Compatibility</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center">Appendix B.

3012

Porting and Maintenance

3013

3014

</th><td width="20%" align="right"> <a accesskey="n" href="appendix_free.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.appendix.porting.backwards"></a>Backwards Compatibility</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="backwards.first"></a>First</h3></div></div></div><p>The first generation GNU C++ library was called libg++. It was a

3015

@@ -940,15 +940,15 @@

3016

This is a change in behavior from older versions. Now, most

3017

<span class="type">iterator_type</span> typedefs in container classes are POD

3018

objects, not <span class="type">value_type</span> pointers.

3019

-</p></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="backwards.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idp23415104"></a><p><span class="title"><em>

3020

+</p></div></div><div class="bibliography"><div class="titlepage"><div><div><h3 class="title"><a id="backwards.biblio"></a>Bibliography</h3></div></div></div><div class="biblioentry"><a id="idm269992117648"></a><p><span class="title"><em>

3021

3022

Migrating to GCC 4.1

3023

</a>

3024

- </em>. </span><span class="author"><span class="firstname">Dan</span> <span class="surname">Kegel</span>. </span></p></div><div class="biblioentry"><a id="idp23417888"></a><p><span class="title"><em>

3025

+ </em>. </span><span class="author"><span class="firstname">Dan</span> <span class="surname">Kegel</span>. </span></p></div><div class="biblioentry"><a id="idm269992114864"></a><p><span class="title"><em>

3026

3027

Building the Whole Debian Archive with GCC 4.1: A Summary

3028

</a>

3029

- </em>. </span><span class="author"><span class="firstname">Martin</span> <span class="surname">Michlmayr</span>. </span></p></div><div class="biblioentry"><a id="idp23420736"></a><p><span class="title"><em>

3030

+ </em>. </span><span class="author"><span class="firstname">Martin</span> <span class="surname">Michlmayr</span>. </span></p></div><div class="biblioentry"><a id="idm269992112016"></a><p><span class="title"><em>

3031

3032

Migration guide for GCC-3.2

3033

</a>

3034

Index: libstdc++-v3/doc/html/manual/source_design_notes.html

3035

===================================================================

3036

--- a/src/libstdc++-v3/doc/html/manual/source_design_notes.html (.../tags/gcc_4_8_2_release)

3037

+++ b/src/libstdc++-v3/doc/html/manual/source_design_notes.html (.../branches/gcc-4_8-branch)

3038

@@ -1,5 +1,5 @@

3039

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3040

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Notes</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_code_style.html" title="Coding Style" /><link rel="next" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Notes</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_code_style.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3041

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Notes</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_code_style.html" title="Coding Style" /><link rel="next" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Notes</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_code_style.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3042

Contributing

3043

3044

</th><td width="20%" align="right"> <a accesskey="n" href="appendix_porting.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="contrib.design_notes"></a>Design Notes</h2></div></div></div><p>

3045

Index: libstdc++-v3/doc/html/manual/ext_sgi.html

3046

===================================================================

3047

--- a/src/libstdc++-v3/doc/html/manual/ext_sgi.html (.../tags/gcc_4_8_2_release)

3048

+++ b/src/libstdc++-v3/doc/html/manual/ext_sgi.html (.../branches/gcc-4_8-branch)

3049

@@ -1,5 +1,5 @@

3050

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3051

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Deprecated</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="prev" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="next" href="ext_utilities.html" title="Chapter 24. Utilities" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Deprecated</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_containers.html">Prev</a> </td><th width="60%" align="center">Chapter 23. HP/SGI Extensions</th><td width="20%" align="right"> <a accesskey="n" href="ext_utilities.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.deprecated_sgi"></a>Deprecated</h2></div></div></div><p>

3052

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Deprecated</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="prev" href="ext_containers.html" title="Chapter 23. HP/SGI Extensions" /><link rel="next" href="ext_utilities.html" title="Chapter 24. Utilities" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Deprecated</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_containers.html">Prev</a> </td><th width="60%" align="center">Chapter 23. HP/SGI Extensions</th><td width="20%" align="right"> <a accesskey="n" href="ext_utilities.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.containers.deprecated_sgi"></a>Deprecated</h2></div></div></div><p>

3053

The SGI hashing classes <code class="classname">hash_set</code> and

3054

<code class="classname">hash_set</code> have been deprecated by the

3055

unordered_set, unordered_multiset, unordered_map,

3056

Index: libstdc++-v3/doc/html/manual/facets.html

3057

===================================================================

3058

--- a/src/libstdc++-v3/doc/html/manual/facets.html (.../tags/gcc_4_8_2_release)

3059

+++ b/src/libstdc++-v3/doc/html/manual/facets.html (.../branches/gcc-4_8-branch)

3060

@@ -1,8 +1,8 @@

3061

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3062

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Facets</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="localization.html" title="Chapter 8. Localization" /><link rel="prev" href="localization.html" title="Chapter 8. Localization" /><link rel="next" href="containers.html" title="Chapter 9. Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Facets</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="localization.html">Prev</a> </td><th width="60%" align="center">Chapter 8.

3063

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Facets</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="localization.html" title="Chapter 8. Localization" /><link rel="prev" href="localization.html" title="Chapter 8. Localization" /><link rel="next" href="containers.html" title="Chapter 9. Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Facets</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="localization.html">Prev</a> </td><th width="60%" align="center">Chapter 8.

3064

Localization

3065

3066

-</th><td width="20%" align="right"> <a accesskey="n" href="containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.facet"></a>Facets</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.facet.ctype"></a>ctype</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idp15778336"></a>Specializations</h5></div></div></div><p>

3067

+</th><td width="20%" align="right"> <a accesskey="n" href="containers.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.facet"></a>Facets</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.facet.ctype"></a>ctype</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.impl"></a>Implementation</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="idm269999753024"></a>Specializations</h5></div></div></div><p>

3068

For the required specialization codecvt<wchar_t, char, mbstate_t> ,

3069

conversions are made between the internal character set (always UCS4

3070

on GNU/Linux) and whatever the currently selected locale for the

3071

@@ -49,24 +49,24 @@

3072

</p></li><li class="listitem"><p>

3073

Rename abstract base class. See if just smash-overriding is a

3074

better approach. Clarify, add sanity to naming.

3075

- </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15793392"></a><p><span class="citetitle"><em class="citetitle">

3076

+ </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.ctype.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999738032"></a><p><span class="citetitle"><em class="citetitle">

3077

The GNU C Library

3078

- </em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">Chapters 6 Character Set Handling and 7 Locales and Internationalization. </span></p></div><div class="biblioentry"><a id="idp15798144"></a><p><span class="citetitle"><em class="citetitle">

3079

+ </em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">Chapters 6 Character Set Handling and 7 Locales and Internationalization. </span></p></div><div class="biblioentry"><a id="idm269999733280"></a><p><span class="citetitle"><em class="citetitle">

3080

Correspondence

3081

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp15801232"></a><p><span class="citetitle"><em class="citetitle">

3082

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999730192"></a><p><span class="citetitle"><em class="citetitle">

3083

ISO/IEC 14882:1998 Programming languages - C++

3084

3085

3086

ISO/IEC 9899:1999 Programming languages - C

3087

3088

3089

3090

The Open Group Base Specifications, Issue 6 (IEEE Std. 1003.1-2004)

3091

</a>

3092

3093

- The Open Group/The Institute of Electrical and Electronics Engineers, Inc.. </span></p></div><div class="biblioentry"><a id="idp15809040"></a><p><span class="citetitle"><em class="citetitle">

3094

+ The Open Group/The Institute of Electrical and Electronics Engineers, Inc.. </span></p></div><div class="biblioentry"><a id="idm269999722384"></a><p><span class="citetitle"><em class="citetitle">

3095

The C++ Programming Language, Special Edition

3096

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3097

Addison Wesley

3098

- . </span></span></p></div><div class="biblioentry"><a id="idp15813664"></a><p><span class="citetitle"><em class="citetitle">

3099

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999717760"></a><p><span class="citetitle"><em class="citetitle">

3100

Standard C++ IOStreams and Locales

3101

</em>. </span><span class="subtitle">

3102

Advanced Programmer's Guide and Reference

3103

@@ -409,17 +409,17 @@

3104

</p></li><li class="listitem"><p>

3105

wchar_t/char internal buffers and conversions between

3106

internal/external buffers?

3107

- </p></li></ul></div></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.codecvt.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15891136"></a><p><span class="citetitle"><em class="citetitle">

3108

+ </p></li></ul></div></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.codecvt.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999640080"></a><p><span class="citetitle"><em class="citetitle">

3109

The GNU C Library

3110

</em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">

3111

Chapters 6 Character Set Handling and 7 Locales and Internationalization

3112

- . </span></p></div><div class="biblioentry"><a id="idp15895888"></a><p><span class="citetitle"><em class="citetitle">

3113

+ . </span></p></div><div class="biblioentry"><a id="idm269999635328"></a><p><span class="citetitle"><em class="citetitle">

3114

Correspondence

3115

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp15898976"></a><p><span class="citetitle"><em class="citetitle">

3116

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999632240"></a><p><span class="citetitle"><em class="citetitle">

3117

ISO/IEC 14882:1998 Programming languages - C++

3118

3119

3120

ISO/IEC 9899:1999 Programming languages - C

3121

3122

3123

3124

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

3125

</a>

3126

@@ -426,25 +426,25 @@

3127

3128

The Open Group/The Institute of Electrical and Electronics

3129

Engineers, Inc.

3130

- . </span></p></div><div class="biblioentry"><a id="idp15906768"></a><p><span class="citetitle"><em class="citetitle">

3131

+ . </span></p></div><div class="biblioentry"><a id="idm269999624448"></a><p><span class="citetitle"><em class="citetitle">

3132

The C++ Programming Language, Special Edition

3133

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3134

Addison Wesley

3135

- . </span></span></p></div><div class="biblioentry"><a id="idp15911392"></a><p><span class="citetitle"><em class="citetitle">

3136

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999619824"></a><p><span class="citetitle"><em class="citetitle">

3137

Standard C++ IOStreams and Locales

3138

</em>. </span><span class="subtitle">

3139

Advanced Programmer's Guide and Reference

3140

. </span><span class="author"><span class="firstname">Angelika</span> <span class="surname">Langer</span>. </span><span class="author"><span class="firstname">Klaus</span> <span class="surname">Kreft</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley Longman, Inc.. </span><span class="publisher"><span class="publishername">

3141

Addison Wesley Longman

3142

- . </span></span></p></div><div class="biblioentry"><a id="idp15917056"></a><p><span class="title"><em>

3143

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999614160"></a><p><span class="title"><em>

3144

3145

A brief description of Normative Addendum 1

3146

</a>

3147

- </em>. </span><span class="author"><span class="firstname">Clive</span> <span class="surname">Feather</span>. </span><span class="pagenums">Extended Character Sets. </span></p></div><div class="biblioentry"><a id="idp15920304"></a><p><span class="title"><em>

3148

+ </em>. </span><span class="author"><span class="firstname">Clive</span> <span class="surname">Feather</span>. </span><span class="pagenums">Extended Character Sets. </span></p></div><div class="biblioentry"><a id="idm269999610912"></a><p><span class="title"><em>

3149

3150

The Unicode HOWTO

3151

</a>

3152

- </em>. </span><span class="author"><span class="firstname">Bruno</span> <span class="surname">Haible</span>. </span></p></div><div class="biblioentry"><a id="idp15923088"></a><p><span class="title"><em>

3153

+ </em>. </span><span class="author"><span class="firstname">Bruno</span> <span class="surname">Haible</span>. </span></p></div><div class="biblioentry"><a id="idm269999608128"></a><p><span class="title"><em>

3154

3155

UTF-8 and Unicode FAQ for Unix/Linux

3156

</a>

3157

@@ -690,16 +690,16 @@

3158

model. As of this writing, it is unknown how to query to see

3159

if a specified message catalog exists using the gettext

3160

package.

3161

- </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.messages.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp16003632"></a><p><span class="citetitle"><em class="citetitle">

3162

+ </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="facet.messages.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999527584"></a><p><span class="citetitle"><em class="citetitle">

3163

The GNU C Library

3164

</em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">Chapters 6 Character Set Handling, and 7 Locales and Internationalization

3165

- . </span></p></div><div class="biblioentry"><a id="idp16008384"></a><p><span class="citetitle"><em class="citetitle">

3166

+ . </span></p></div><div class="biblioentry"><a id="idm269999522832"></a><p><span class="citetitle"><em class="citetitle">

3167

Correspondence

3168

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp16011472"></a><p><span class="citetitle"><em class="citetitle">

3169

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999519744"></a><p><span class="citetitle"><em class="citetitle">

3170

ISO/IEC 14882:1998 Programming languages - C++

3171

3172

3173

ISO/IEC 9899:1999 Programming languages - C

3174

3175

3176

3177

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

3178

</a>

3179

@@ -706,23 +706,23 @@

3180

3181

The Open Group/The Institute of Electrical and Electronics

3182

Engineers, Inc.

3183

- . </span></p></div><div class="biblioentry"><a id="idp16019264"></a><p><span class="citetitle"><em class="citetitle">

3184

+ . </span></p></div><div class="biblioentry"><a id="idm269999511952"></a><p><span class="citetitle"><em class="citetitle">

3185

The C++ Programming Language, Special Edition

3186

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3187

Addison Wesley

3188

- . </span></span></p></div><div class="biblioentry"><a id="idp16023888"></a><p><span class="citetitle"><em class="citetitle">

3189

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999507328"></a><p><span class="citetitle"><em class="citetitle">

3190

Standard C++ IOStreams and Locales

3191

</em>. </span><span class="subtitle">

3192

Advanced Programmer's Guide and Reference

3193

. </span><span class="author"><span class="firstname">Angelika</span> <span class="surname">Langer</span>. </span><span class="author"><span class="firstname">Klaus</span> <span class="surname">Kreft</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley Longman, Inc.. </span><span class="publisher"><span class="publishername">

3194

Addison Wesley Longman

3195

- . </span></span></p></div><div class="biblioentry"><a id="idp16029552"></a><p><span class="title"><em>

3196

- <a class="link" href="http://java.sun.com/reference/api/index.html" target="_top">

3197

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999501664"></a><p><span class="title"><em>

3198

+ <a class="link" href="http://www.oracle.com/technetwork/java/api/index.html" target="_top">

3199

API Specifications, Java Platform

3200

</a>

3201

</em>. </span><span class="pagenums">java.util.Properties, java.text.MessageFormat,

3202

java.util.Locale, java.util.ResourceBundle

3203

- . </span></p></div><div class="biblioentry"><a id="idp16031888"></a><p><span class="title"><em>

3204

+ . </span></p></div><div class="biblioentry"><a id="idm269999499328"></a><p><span class="title"><em>

3205

3206

GNU gettext tools, version 0.10.38, Native Language Support

3207

Library and Tools.

3208

Index: libstdc++-v3/doc/html/manual/diagnostics.html

3209

===================================================================

3210

--- a/src/libstdc++-v3/doc/html/manual/diagnostics.html (.../tags/gcc_4_8_2_release)

3211

+++ b/src/libstdc++-v3/doc/html/manual/diagnostics.html (.../branches/gcc-4_8-branch)

3212

@@ -1,5 +1,5 @@

3213

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3214

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 5. Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="termination.html" title="Termination" /><link rel="next" href="concept_checking.html" title="Concept Checking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 5.

3215

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 5. Diagnostics</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="termination.html" title="Termination" /><link rel="next" href="concept_checking.html" title="Concept Checking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 5.

3216

Diagnostics

3217

3218

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="termination.html">Prev</a> </td><th width="60%" align="center">Part II.

3219

@@ -6,8 +6,8 @@

3220

Standard Contents

3221

</th><td width="20%" align="right"> <a accesskey="n" href="concept_checking.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.diagnostics"></a>Chapter 5.

3222

Diagnostics

3223

- <a id="idp13835248" class="indexterm"></a>

3224

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="concept_checking.html">Concept Checking</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.diagnostics.exceptions"></a>Exceptions</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.diagnostics.exceptions.api"></a>API Reference</h3></div></div></div><p>

3225

+ <a id="idm270001697504" class="indexterm"></a>

3226

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="concept_checking.html">Concept Checking</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.diagnostics.exceptions"></a>Exceptions</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.diagnostics.exceptions.api"></a>API Reference</h3></div></div></div><p>

3227

All exception objects are defined in one of the standard header

3228

files: <code class="filename">exception</code>,

3229

<code class="filename">stdexcept</code>, <code class="filename">new</code>, and

3230

Index: libstdc++-v3/doc/html/manual/mt_allocator_design.html

3231

===================================================================

3232

--- a/src/libstdc++-v3/doc/html/manual/mt_allocator_design.html (.../tags/gcc_4_8_2_release)

3233

+++ b/src/libstdc++-v3/doc/html/manual/mt_allocator_design.html (.../branches/gcc-4_8-branch)

3234

@@ -1,5 +1,5 @@

3235

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3236

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Issues</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="next" href="mt_allocator_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Issues</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.design_issues"></a>Design Issues</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.overview"></a>Overview</h3></div></div></div><p> There are three general components to the allocator: a datum

3237

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design Issues</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="next" href="mt_allocator_impl.html" title="Implementation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design Issues</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.design_issues"></a>Design Issues</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.overview"></a>Overview</h3></div></div></div><p> There are three general components to the allocator: a datum

3238

describing the characteristics of the memory pool, a policy class

3239

containing this pool that links instantiation types to common or

3240

individual pools, and a class inheriting from the policy class that is

3241

Index: libstdc++-v3/doc/html/manual/appendix_free.html

3242

===================================================================

3243

--- a/src/libstdc++-v3/doc/html/manual/appendix_free.html (.../tags/gcc_4_8_2_release)

3244

+++ b/src/libstdc++-v3/doc/html/manual/appendix_free.html (.../branches/gcc-4_8-branch)

3245

@@ -1,5 +1,5 @@

3246

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3247

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix C. Free Software Needs Free Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="backwards.html" title="Backwards Compatibility" /><link rel="next" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix C.

3248

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix C. Free Software Needs Free Documentation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="backwards.html" title="Backwards Compatibility" /><link rel="next" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix C.

3249

Free Software Needs Free Documentation

3250

3251

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="backwards.html">Prev</a> </td><th width="60%" align="center">Part IV.

3252

@@ -6,7 +6,7 @@

3253

Appendices

3254

</th><td width="20%" align="right"> <a accesskey="n" href="appendix_gpl.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.free"></a>

3255

Free Software Needs Free Documentation

3256

- <a id="idp23426192" class="indexterm"></a>

3257

+ <a id="idm269992106560" class="indexterm"></a>

3258

</h1></div></div></div><p>

3259

The biggest deficiency in free operating systems is not in the

3260

software--it is the lack of good free manuals that we can include in

3261

Index: libstdc++-v3/doc/html/manual/algorithms.html

3262

===================================================================

3263

--- a/src/libstdc++-v3/doc/html/manual/algorithms.html (.../tags/gcc_4_8_2_release)

3264

+++ b/src/libstdc++-v3/doc/html/manual/algorithms.html (.../branches/gcc-4_8-branch)

3265

@@ -1,5 +1,5 @@

3266

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3267

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 11. Algorithms</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library, algorithm" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="iterators.html" title="Chapter 10. Iterators" /><link rel="next" href="numerics.html" title="Chapter 12. Numerics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 11.

3268

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 11. Algorithms</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library, algorithm" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="iterators.html" title="Chapter 10. Iterators" /><link rel="next" href="numerics.html" title="Chapter 12. Numerics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 11.

3269

Algorithms

3270

3271

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="iterators.html">Prev</a> </td><th width="60%" align="center">Part II.

3272

@@ -6,8 +6,8 @@

3273

Standard Contents

3274

</th><td width="20%" align="right"> <a accesskey="n" href="numerics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.algorithms"></a>Chapter 11.

3275

Algorithms

3276

- <a id="idp16191968" class="indexterm"></a>

3277

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="algorithms.html#std.algorithms.mutating">Mutating</a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.mutating.swap"><code class="function">swap</code></a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.swap.specializations">Specializations</a></span></dt></dl></dd></dl></dd></dl></div><p>

3278

+ <a id="idm269999339120" class="indexterm"></a>

3279

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="algorithms.html#std.algorithms.mutating">Mutating</a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.mutating.swap"><code class="function">swap</code></a></span></dt><dd><dl><dt><span class="section"><a href="algorithms.html#algorithms.swap.specializations">Specializations</a></span></dt></dl></dd></dl></dd></dl></div><p>

3280

The neatest accomplishment of the algorithms section is that all the

3281

work is done via iterators, not containers directly. This means two

3282

important things:

3283

Index: libstdc++-v3/doc/html/manual/appendix_porting.html

3284

===================================================================

3285

--- a/src/libstdc++-v3/doc/html/manual/appendix_porting.html (.../tags/gcc_4_8_2_release)

3286

+++ b/src/libstdc++-v3/doc/html/manual/appendix_porting.html (.../branches/gcc-4_8-branch)

3287

@@ -1,5 +1,5 @@

3288

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3289

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix B. Porting and Maintenance</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="source_design_notes.html" title="Design Notes" /><link rel="next" href="documentation_hacking.html" title="Writing and Generating Documentation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix B.

3290

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix B. Porting and Maintenance</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="source_design_notes.html" title="Design Notes" /><link rel="next" href="documentation_hacking.html" title="Writing and Generating Documentation" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix B.

3291

Porting and Maintenance

3292

3293

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_design_notes.html">Prev</a> </td><th width="60%" align="center">Part IV.

3294

@@ -6,8 +6,8 @@

3295

Appendices

3296

</th><td width="20%" align="right"> <a accesskey="n" href="documentation_hacking.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.porting"></a>

3297

Porting and Maintenance

3298

- <a id="idp22008864" class="indexterm"></a>

3299

-</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="appendix_porting.html#appendix.porting.build_hacking">Configure and Build Hacking</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview">Overview</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.basic">General Process</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.map">What Comes from Where</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure">Configure</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.scripts">Storing Information in non-AC files (like configure.host)</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.conventions">Coding and Commenting Conventions</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.acinclude">The acinclude.m4 layout</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.enable"><code class="constant">GLIBCXX_ENABLE</code>, the <code class="literal">--enable</code> maker</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.make">Make</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html">Writing and Generating Documentation</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doc.intro">Introduction</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.generation">Generating Documentation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.doxygen">Doxygen</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doxygen.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.rules">Generating the Doxygen Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.markup">Markup</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html#doc.docbook">Docbook</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#docbook.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.rules">Generating the DocBook Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.validation">Editing and Validation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.examples">File Organization and Basics</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.markup">Markup By Example</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="internals.html">Porting to New Hardware or Operating Systems</a></span></dt><dd><dl><dt><span class="section"><a href="internals.html#internals.os">Operating System</a></span></dt><dt><span class="section"><a href="internals.html#internals.cpu">CPU</a></span></dt><dt><span class="section"><a href="internals.html#internals.char_types">Character Types</a></span></dt><dt><span class="section"><a href="internals.html#internals.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="internals.html#internals.numeric_limits">Numeric Limits</a></span></dt><dt><span class="section"><a href="internals.html#internals.libtool">Libtool</a></span></dt></dl></dd><dt><span class="section"><a href="test.html">Test</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization">Organization</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization.layout">Directory Layout</a></span></dt><dt><span class="section"><a href="test.html#test.organization.naming">Naming Conventions</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.run">Running the Testsuite</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.run.basic">Basic</a></span></dt><dt><span class="section"><a href="test.html#test.run.variations">Variations</a></span></dt><dt><span class="section"><a href="test.html#test.run.permutations">Permutations</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.new_tests">Writing a new test case</a></span></dt><dt><span class="section"><a href="test.html#test.harness">Test Harness and Utilities</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.harness.dejagnu">Dejagnu Harness Details</a></span></dt><dt><span class="section"><a href="test.html#test.harness.utils">Utilities</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.special">Special Topics</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.exception.safety">

3300

+ <a id="idm269993523968" class="indexterm"></a>

3301

+</h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="appendix_porting.html#appendix.porting.build_hacking">Configure and Build Hacking</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview">Overview</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.basic">General Process</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.overview.map">What Comes from Where</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure">Configure</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.scripts">Storing Information in non-AC files (like configure.host)</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.conventions">Coding and Commenting Conventions</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.acinclude">The acinclude.m4 layout</a></span></dt><dt><span class="section"><a href="appendix_porting.html#build_hacking.configure.enable"><code class="constant">GLIBCXX_ENABLE</code>, the <code class="literal">--enable</code> maker</a></span></dt></dl></dd><dt><span class="section"><a href="appendix_porting.html#build_hacking.make">Make</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html">Writing and Generating Documentation</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doc.intro">Introduction</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.generation">Generating Documentation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doc.doxygen">Doxygen</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#doxygen.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.rules">Generating the Doxygen Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#doxygen.markup">Markup</a></span></dt></dl></dd><dt><span class="section"><a href="documentation_hacking.html#doc.docbook">Docbook</a></span></dt><dd><dl><dt><span class="section"><a href="documentation_hacking.html#docbook.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.rules">Generating the DocBook Files</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.debug">Debugging Generation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.validation">Editing and Validation</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.examples">File Organization and Basics</a></span></dt><dt><span class="section"><a href="documentation_hacking.html#docbook.markup">Markup By Example</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="internals.html">Porting to New Hardware or Operating Systems</a></span></dt><dd><dl><dt><span class="section"><a href="internals.html#internals.os">Operating System</a></span></dt><dt><span class="section"><a href="internals.html#internals.cpu">CPU</a></span></dt><dt><span class="section"><a href="internals.html#internals.char_types">Character Types</a></span></dt><dt><span class="section"><a href="internals.html#internals.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="internals.html#internals.numeric_limits">Numeric Limits</a></span></dt><dt><span class="section"><a href="internals.html#internals.libtool">Libtool</a></span></dt></dl></dd><dt><span class="section"><a href="test.html">Test</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization">Organization</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.organization.layout">Directory Layout</a></span></dt><dt><span class="section"><a href="test.html#test.organization.naming">Naming Conventions</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.run">Running the Testsuite</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.run.basic">Basic</a></span></dt><dt><span class="section"><a href="test.html#test.run.variations">Variations</a></span></dt><dt><span class="section"><a href="test.html#test.run.permutations">Permutations</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.new_tests">Writing a new test case</a></span></dt><dt><span class="section"><a href="test.html#test.harness">Test Harness and Utilities</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.harness.dejagnu">Dejagnu Harness Details</a></span></dt><dt><span class="section"><a href="test.html#test.harness.utils">Utilities</a></span></dt></dl></dd><dt><span class="section"><a href="test.html#test.special">Special Topics</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.exception.safety">

3302

Qualifying Exception Safety Guarantees

3303

3304

</a></span></dt><dd><dl><dt><span class="section"><a href="test.html#test.exception.safety.overview">Overview</a></span></dt><dt><span class="section"><a href="test.html#test.exception.safety.status">

3305

@@ -61,7 +61,7 @@

3306

in the build directory starts the build process. The <code class="literal">all</code> target comes from the <code class="filename">Makefile</code> file, which is generated via <span class="command"><strong>configure</strong></span> from the <code class="filename">Makefile.in</code> file, which is in turn generated (via

3307

<span class="command"><strong>automake</strong></span>) from the file

3308

<code class="filename">Makefile.am</code>.

3309

-</p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="build_hacking.overview.map"></a>What Comes from Where</h4></div></div></div><div class="figure"><a id="idp22035648"></a><p class="title"><strong>Figure B.1. Configure and Build File Dependencies</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/confdeps.png" align="middle" alt="Dependency Graph for Configure and Build Files" /></div></div></div><br class="figure-break" /><p>

3310

+</p></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="build_hacking.overview.map"></a>What Comes from Where</h4></div></div></div><div class="figure"><a id="idm269993497120"></a><p class="title"><strong>Figure B.1. Configure and Build File Dependencies</strong></p><div class="figure-contents"><div class="mediaobject" align="center"><img src="../images/confdeps.png" align="middle" alt="Dependency Graph for Configure and Build Files" /></div></div></div><br class="figure-break" /><p>

3311

Regenerate all generated files by using the command

3312

<code class="code">autoreconf</code> at the top level of the libstdc++ source

3313

directory.

3314

Index: libstdc++-v3/doc/html/manual/profile_mode_cost_model.html

3315

===================================================================

3316

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_cost_model.html (.../tags/gcc_4_8_2_release)

3317

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_cost_model.html (.../branches/gcc-4_8-branch)

3318

@@ -1,5 +1,5 @@

3319

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3320

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Empirical Cost Model</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_api.html" title="Extensions for Custom Containers" /><link rel="next" href="profile_mode_impl.html" title="Implementation Issues" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Empirical Cost Model</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_api.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.cost_model"></a>Empirical Cost Model</h2></div></div></div><p>

3321

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Empirical Cost Model</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode_api.html" title="Extensions for Custom Containers" /><link rel="next" href="profile_mode_impl.html" title="Implementation Issues" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Empirical Cost Model</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode_api.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_impl.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.cost_model"></a>Empirical Cost Model</h2></div></div></div><p>

3322

Currently, the cost model uses formulas with predefined relative weights

3323

for alternative containers or container implementations. For instance,

3324

iterating through a vector is X times faster than iterating through a list.

3325

Index: libstdc++-v3/doc/html/manual/make.html

3326

===================================================================

3327

--- a/src/libstdc++-v3/doc/html/manual/make.html (.../tags/gcc_4_8_2_release)

3328

+++ b/src/libstdc++-v3/doc/html/manual/make.html (.../branches/gcc-4_8-branch)

3329

@@ -1,5 +1,5 @@

3330

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3331

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Make</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="setup.html" title="Chapter 2. Setup" /><link rel="prev" href="configure.html" title="Configure" /><link rel="next" href="using.html" title="Chapter 3. Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Make</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="configure.html">Prev</a> </td><th width="60%" align="center">Chapter 2. Setup</th><td width="20%" align="right"> <a accesskey="n" href="using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.make"></a>Make</h2></div></div></div><p>If you have never done this before, you should read the basic

3332

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Make</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="setup.html" title="Chapter 2. Setup" /><link rel="prev" href="configure.html" title="Configure" /><link rel="next" href="using.html" title="Chapter 3. Using" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Make</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="configure.html">Prev</a> </td><th width="60%" align="center">Chapter 2. Setup</th><td width="20%" align="right"> <a accesskey="n" href="using.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.make"></a>Make</h2></div></div></div><p>If you have never done this before, you should read the basic

3333

<a class="link" href="http://gcc.gnu.org/install/" target="_top">GCC Installation

3334

Instructions</a> first. Read <span class="emphasis"><em>all of them</em></span>.

3335

<span class="emphasis"><em>Twice.</em></span>

3336

Index: libstdc++-v3/doc/html/manual/pairs.html

3337

===================================================================

3338

--- a/src/libstdc++-v3/doc/html/manual/pairs.html (.../tags/gcc_4_8_2_release)

3339

+++ b/src/libstdc++-v3/doc/html/manual/pairs.html (.../branches/gcc-4_8-branch)

3340

@@ -1,5 +1,5 @@

3341

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3342

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Pairs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="utilities.html" title="Chapter 6. Utilities" /><link rel="next" href="memory.html" title="Memory" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Pairs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="utilities.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

3343

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Pairs</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="utilities.html" title="Chapter 6. Utilities" /><link rel="prev" href="utilities.html" title="Chapter 6. Utilities" /><link rel="next" href="memory.html" title="Memory" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Pairs</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="utilities.html">Prev</a> </td><th width="60%" align="center">Chapter 6.

3344

Utilities

3345

3346

</th><td width="20%" align="right"> <a accesskey="n" href="memory.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.pairs"></a>Pairs</h2></div></div></div><p>The <code class="code">pair<T1,T2></code> is a simple and handy way to

3347

Index: libstdc++-v3/doc/html/manual/test.html

3348

===================================================================

3349

--- a/src/libstdc++-v3/doc/html/manual/test.html (.../tags/gcc_4_8_2_release)

3350

+++ b/src/libstdc++-v3/doc/html/manual/test.html (.../branches/gcc-4_8-branch)

3351

@@ -1,5 +1,5 @@

3352

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3353

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Test</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, test, testsuite, performance, conformance, ABI, exception safety" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="internals.html" title="Porting to New Hardware or Operating Systems" /><link rel="next" href="abi.html" title="ABI Policy and Guidelines" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Test</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="internals.html">Prev</a> </td><th width="60%" align="center">Appendix B.

3354

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Test</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, test, testsuite, performance, conformance, ABI, exception safety" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_porting.html" title="Appendix B. Porting and Maintenance" /><link rel="prev" href="internals.html" title="Porting to New Hardware or Operating Systems" /><link rel="next" href="abi.html" title="ABI Policy and Guidelines" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Test</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="internals.html">Prev</a> </td><th width="60%" align="center">Appendix B.

3355

Porting and Maintenance

3356

3357

</th><td width="20%" align="right"> <a accesskey="n" href="abi.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.setup.test"></a>Test</h2></div></div></div><p>

3358

@@ -492,7 +492,7 @@

3359

reporting functions including:

3360

</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: circle; "><li class="listitem"><p>time_counter</p></li><li class="listitem"><p>resource_counter</p></li><li class="listitem"><p>report_performance</p></li></ul></div></li></ul></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="test.special"></a>Special Topics</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="test.exception.safety"></a>

3361

Qualifying Exception Safety Guarantees

3362

- <a id="idp22628992" class="indexterm"></a>

3363

+ <a id="idm269992903504" class="indexterm"></a>

3364

</h4></div></div></div><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="test.exception.safety.overview"></a>Overview</h5></div></div></div><p>

3365

Testing is composed of running a particular test sequence,

3366

and looking at what happens to the surrounding code when

3367

Index: libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html

3368

===================================================================

3369

--- a/src/libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html (.../tags/gcc_4_8_2_release)

3370

+++ b/src/libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html (.../branches/gcc-4_8-branch)

3371

@@ -1,5 +1,5 @@

3372

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3373

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Linking</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_namespaces.html" title="Namespaces" /><link rel="next" href="using_concurrency.html" title="Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Linking</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_namespaces.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_concurrency.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.linkage"></a>Linking</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.linkage.freestanding"></a>Almost Nothing</h3></div></div></div><p>

3374

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Linking</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_namespaces.html" title="Namespaces" /><link rel="next" href="using_concurrency.html" title="Concurrency" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Linking</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_namespaces.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_concurrency.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.linkage"></a>Linking</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.linkage.freestanding"></a>Almost Nothing</h3></div></div></div><p>

3375

Or as close as it gets: freestanding. This is a minimal

3376

configuration, with only partial support for the standard

3377

library. Assume only the following header files can be used:

3378

Index: libstdc++-v3/doc/html/manual/using_headers.html

3379

===================================================================

3380

--- a/src/libstdc++-v3/doc/html/manual/using_headers.html (.../tags/gcc_4_8_2_release)

3381

+++ b/src/libstdc++-v3/doc/html/manual/using_headers.html (.../branches/gcc-4_8-branch)

3382

@@ -1,5 +1,5 @@

3383

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3384

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Headers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using.html" title="Chapter 3. Using" /><link rel="next" href="using_macros.html" title="Macros" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Headers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_macros.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.headers"></a>Headers</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.all"></a>Header Files</h3></div></div></div><p>

3385

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Headers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using.html" title="Chapter 3. Using" /><link rel="next" href="using_macros.html" title="Macros" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Headers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_macros.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.headers"></a>Headers</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.all"></a>Header Files</h3></div></div></div><p>

3386

The C++ standard specifies the entire set of header files that

3387

must be available to all hosted implementations. Actually, the

3388

word "files" is a misnomer, since the contents of the

3389

@@ -18,19 +18,19 @@

3390

the 1998 standard as updated for 2003, and the current 2011 standard.

3391

</p><p>

3392

C++98/03 include files. These are available in the default compilation mode, i.e. <code class="code">-std=c++98</code> or <code class="code">-std=gnu++98</code>.

3393

- </p><div class="table"><a id="idp13079360"></a><p class="title"><strong>Table 3.2. C++ 1998 Library Headers</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">complex</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td></tr><tr><td align="left"><code class="filename">fstream</code></td><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td><td align="left"><code class="filename">iosfwd</code></td></tr><tr><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td><td align="left"><code class="filename">list</code></td></tr><tr><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td></tr><tr><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">typeinfo</code></td></tr><tr><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13115840"></a><p class="title"><strong>Table 3.3. C++ 1998 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">ciso646</code></td></tr><tr><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td></tr><tr><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p>

3394

+ </p><div class="table"><a id="idm270002453792"></a><p class="title"><strong>Table 3.2. C++ 1998 Library Headers</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">complex</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td></tr><tr><td align="left"><code class="filename">fstream</code></td><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td><td align="left"><code class="filename">iosfwd</code></td></tr><tr><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td><td align="left"><code class="filename">list</code></td></tr><tr><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td></tr><tr><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">typeinfo</code></td></tr><tr><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002417312"></a><p class="title"><strong>Table 3.3. C++ 1998 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 1998 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">ciso646</code></td></tr><tr><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td></tr><tr><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p>

3395

C++11 include files. These are only available in C++11 compilation

3396

mode, i.e. <code class="literal">-std=c++11</code> or <code class="literal">-std=gnu++11</code>.

3397

-</p><p></p><div class="table"><a id="idp13140576"></a><p class="title"><strong>Table 3.4. C++ 2011 Library Headers</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">array</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">chrono</code></td><td align="left"><code class="filename">complex</code></td></tr><tr><td align="left"><code class="filename">condition_variable</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td><td align="left"><code class="filename">forward_list</code></td><td align="left"><code class="filename">fstream</code></td></tr><tr><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">future</code></td><td align="left"><code class="filename">initalizer_list</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td></tr><tr><td align="left"><code class="filename">iosfwd</code></td><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td></tr><tr><td align="left"><code class="filename">list</code></td><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">mutex</code></td></tr><tr><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">random</code></td></tr><tr><td align="left"><code class="filename">ratio</code></td><td align="left"><code class="filename">regex</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">system_error</code></td><td align="left"><code class="filename">thread</code></td></tr><tr><td align="left"><code class="filename">tuple</code></td><td align="left"><code class="filename">type_traits</code></td><td align="left"><code class="filename">typeinfo</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="filename">unordered_set</code></td></tr><tr><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13192016"></a><p class="title"><strong>Table 3.5. C++ 2011 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">ccomplex</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cfenv</code></td></tr><tr><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">cinttypes</code></td><td align="left"><code class="filename">ciso646</code></td><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td></tr><tr><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstdbool</code></td></tr><tr><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdint</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctgmath</code></td><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cuchar</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3398

+</p><p></p><div class="table"><a id="idm270002392576"></a><p class="title"><strong>Table 3.4. C++ 2011 Library Headers</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">algorithm</code></td><td align="left"><code class="filename">array</code></td><td align="left"><code class="filename">bitset</code></td><td align="left"><code class="filename">chrono</code></td><td align="left"><code class="filename">complex</code></td></tr><tr><td align="left"><code class="filename">condition_variable</code></td><td align="left"><code class="filename">deque</code></td><td align="left"><code class="filename">exception</code></td><td align="left"><code class="filename">forward_list</code></td><td align="left"><code class="filename">fstream</code></td></tr><tr><td align="left"><code class="filename">functional</code></td><td align="left"><code class="filename">future</code></td><td align="left"><code class="filename">initalizer_list</code></td><td align="left"><code class="filename">iomanip</code></td><td align="left"><code class="filename">ios</code></td></tr><tr><td align="left"><code class="filename">iosfwd</code></td><td align="left"><code class="filename">iostream</code></td><td align="left"><code class="filename">istream</code></td><td align="left"><code class="filename">iterator</code></td><td align="left"><code class="filename">limits</code></td></tr><tr><td align="left"><code class="filename">list</code></td><td align="left"><code class="filename">locale</code></td><td align="left"><code class="filename">map</code></td><td align="left"><code class="filename">memory</code></td><td align="left"><code class="filename">mutex</code></td></tr><tr><td align="left"><code class="filename">new</code></td><td align="left"><code class="filename">numeric</code></td><td align="left"><code class="filename">ostream</code></td><td align="left"><code class="filename">queue</code></td><td align="left"><code class="filename">random</code></td></tr><tr><td align="left"><code class="filename">ratio</code></td><td align="left"><code class="filename">regex</code></td><td align="left"><code class="filename">set</code></td><td align="left"><code class="filename">sstream</code></td><td align="left"><code class="filename">stack</code></td></tr><tr><td align="left"><code class="filename">stdexcept</code></td><td align="left"><code class="filename">streambuf</code></td><td align="left"><code class="filename">string</code></td><td align="left"><code class="filename">system_error</code></td><td align="left"><code class="filename">thread</code></td></tr><tr><td align="left"><code class="filename">tuple</code></td><td align="left"><code class="filename">type_traits</code></td><td align="left"><code class="filename">typeinfo</code></td><td align="left"><code class="filename">unordered_map</code></td><td align="left"><code class="filename">unordered_set</code></td></tr><tr><td align="left"><code class="filename">utility</code></td><td align="left"><code class="filename">valarray</code></td><td align="left"><code class="filename">vector</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002341136"></a><p class="title"><strong>Table 3.5. C++ 2011 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ 2011 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">cassert</code></td><td align="left"><code class="filename">ccomplex</code></td><td align="left"><code class="filename">cctype</code></td><td align="left"><code class="filename">cerrno</code></td><td align="left"><code class="filename">cfenv</code></td></tr><tr><td align="left"><code class="filename">cfloat</code></td><td align="left"><code class="filename">cinttypes</code></td><td align="left"><code class="filename">ciso646</code></td><td align="left"><code class="filename">climits</code></td><td align="left"><code class="filename">clocale</code></td></tr><tr><td align="left"><code class="filename">cmath</code></td><td align="left"><code class="filename">csetjmp</code></td><td align="left"><code class="filename">csignal</code></td><td align="left"><code class="filename">cstdarg</code></td><td align="left"><code class="filename">cstdbool</code></td></tr><tr><td align="left"><code class="filename">cstddef</code></td><td align="left"><code class="filename">cstdint</code></td><td align="left"><code class="filename">cstdlib</code></td><td align="left"><code class="filename">cstdio</code></td><td align="left"><code class="filename">cstring</code></td></tr><tr><td align="left"><code class="filename">ctgmath</code></td><td align="left"><code class="filename">ctime</code></td><td align="left"><code class="filename">cuchar</code></td><td align="left"><code class="filename">cwchar</code></td><td align="left"><code class="filename">cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3399

In addition, TR1 includes as:

3400

-</p><div class="table"><a id="idp13221904"></a><p class="title"><strong>Table 3.6. C++ TR 1 Library Headers</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/array</code></td><td align="left"><code class="filename">tr1/complex</code></td><td align="left"><code class="filename">tr1/memory</code></td><td align="left"><code class="filename">tr1/functional</code></td><td align="left"><code class="filename">tr1/random</code></td></tr><tr><td align="left"><code class="filename">tr1/regex</code></td><td align="left"><code class="filename">tr1/tuple</code></td><td align="left"><code class="filename">tr1/type_traits</code></td><td align="left"><code class="filename">tr1/unordered_map</code></td><td align="left"><code class="filename">tr1/unordered_set</code></td></tr><tr><td align="left"><code class="filename">tr1/utility</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13238832"></a><p class="title"><strong>Table 3.7. C++ TR 1 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/ccomplex</code></td><td align="left"><code class="filename">tr1/cfenv</code></td><td align="left"><code class="filename">tr1/cfloat</code></td><td align="left"><code class="filename">tr1/cmath</code></td><td align="left"><code class="filename">tr1/cinttypes</code></td></tr><tr><td align="left"><code class="filename">tr1/climits</code></td><td align="left"><code class="filename">tr1/cstdarg</code></td><td align="left"><code class="filename">tr1/cstdbool</code></td><td align="left"><code class="filename">tr1/cstdint</code></td><td align="left"><code class="filename">tr1/cstdio</code></td></tr><tr><td align="left"><code class="filename">tr1/cstdlib</code></td><td align="left"><code class="filename">tr1/ctgmath</code></td><td align="left"><code class="filename">tr1/ctime</code></td><td align="left"><code class="filename">tr1/cwchar</code></td><td align="left"><code class="filename">tr1/cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>Decimal floating-point arithmetic is available if the C++

3401

+</p><div class="table"><a id="idm270002311248"></a><p class="title"><strong>Table 3.6. C++ TR 1 Library Headers</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/array</code></td><td align="left"><code class="filename">tr1/complex</code></td><td align="left"><code class="filename">tr1/memory</code></td><td align="left"><code class="filename">tr1/functional</code></td><td align="left"><code class="filename">tr1/random</code></td></tr><tr><td align="left"><code class="filename">tr1/regex</code></td><td align="left"><code class="filename">tr1/tuple</code></td><td align="left"><code class="filename">tr1/type_traits</code></td><td align="left"><code class="filename">tr1/unordered_map</code></td><td align="left"><code class="filename">tr1/unordered_set</code></td></tr><tr><td align="left"><code class="filename">tr1/utility</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002294320"></a><p class="title"><strong>Table 3.7. C++ TR 1 Library Headers for C Library Facilities</strong></p><div class="table-contents"><table summary="C++ TR 1 Library Headers for C Library Facilities" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">tr1/ccomplex</code></td><td align="left"><code class="filename">tr1/cfenv</code></td><td align="left"><code class="filename">tr1/cfloat</code></td><td align="left"><code class="filename">tr1/cmath</code></td><td align="left"><code class="filename">tr1/cinttypes</code></td></tr><tr><td align="left"><code class="filename">tr1/climits</code></td><td align="left"><code class="filename">tr1/cstdarg</code></td><td align="left"><code class="filename">tr1/cstdbool</code></td><td align="left"><code class="filename">tr1/cstdint</code></td><td align="left"><code class="filename">tr1/cstdio</code></td></tr><tr><td align="left"><code class="filename">tr1/cstdlib</code></td><td align="left"><code class="filename">tr1/ctgmath</code></td><td align="left"><code class="filename">tr1/ctime</code></td><td align="left"><code class="filename">tr1/cwchar</code></td><td align="left"><code class="filename">tr1/cwctype</code></td></tr></tbody></table></div></div><br class="table-break" /><p>Decimal floating-point arithmetic is available if the C++

3402

compiler supports scalar decimal floating-point types defined via

3403

<code class="code">__attribute__((mode(SD|DD|LD)))</code>.

3404

-</p><div class="table"><a id="idp13259904"></a><p class="title"><strong>Table 3.8. C++ TR 24733 Decimal Floating-Point Header</strong></p><div class="table-contents"><table summary="C++ TR 24733 Decimal Floating-Point Header" border="1"><colgroup><col align="left" class="c1" /></colgroup><tbody><tr><td align="left"><code class="filename">decimal/decimal</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3405

+</p><div class="table"><a id="idm270002273248"></a><p class="title"><strong>Table 3.8. C++ TR 24733 Decimal Floating-Point Header</strong></p><div class="table-contents"><table summary="C++ TR 24733 Decimal Floating-Point Header" border="1"><colgroup><col align="left" class="c1" /></colgroup><tbody><tr><td align="left"><code class="filename">decimal/decimal</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3406

Also included are files for the C++ ABI interface:

3407

-</p><div class="table"><a id="idp13265424"></a><p class="title"><strong>Table 3.9. C++ ABI Headers</strong></p><div class="table-contents"><table summary="C++ ABI Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">cxxabi.h</code></td><td align="left"><code class="filename">cxxabi_forced.h</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3408

+</p><div class="table"><a id="idm270002267728"></a><p class="title"><strong>Table 3.9. C++ ABI Headers</strong></p><div class="table-contents"><table summary="C++ ABI Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">cxxabi.h</code></td><td align="left"><code class="filename">cxxabi_forced.h</code></td></tr></tbody></table></div></div><br class="table-break" /><p>

3409

And a large variety of extensions.

3410

-</p><div class="table"><a id="idp13271824"></a><p class="title"><strong>Table 3.10. Extension Headers</strong></p><div class="table-contents"><table summary="Extension Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">ext/algorithm</code></td><td align="left"><code class="filename">ext/atomicity.h</code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"><code class="filename">ext/cast.h</code></td></tr><tr><td align="left"><code class="filename">ext/codecvt_specializations.h</code></td><td align="left"><code class="filename">ext/concurrence.h</code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="filename">ext/enc_filebuf.h</code></td><td align="left"><code class="filename">ext/extptr_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/functional</code></td><td align="left"><code class="filename">ext/iterator</code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="filename">ext/memory</code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="filename">ext/numeric</code></td><td align="left"><code class="filename">ext/numeric_traits.h</code></td><td align="left"><code class="filename">ext/pb_ds/assoc_container.h</code></td><td align="left"><code class="filename">ext/pb_ds/priority_queue.h</code></td></tr><tr><td align="left"><code class="filename">ext/pod_char_traits.h</code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="filename">ext/rb_tree</code></td><td align="left"><code class="filename">ext/rope</code></td><td align="left"><code class="filename">ext/slist</code></td></tr><tr><td align="left"><code class="filename">ext/stdio_filebuf.h</code></td><td align="left"><code class="filename">ext/stdio_sync_filebuf.h</code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left"><code class="filename">ext/typelist.h</code></td><td align="left"><code class="filename">ext/type_traits.h</code></td></tr><tr><td align="left"><code class="filename">ext/vstring.h</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13307552"></a><p class="title"><strong>Table 3.11. Extension Debug Headers</strong></p><div class="table-contents"><table summary="Extension Debug Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">debug/bitset</code></td><td align="left"><code class="filename">debug/deque</code></td><td align="left"><code class="filename">debug/list</code></td><td align="left"><code class="filename">debug/map</code></td><td align="left"><code class="filename">debug/set</code></td></tr><tr><td align="left"><code class="filename">debug/string</code></td><td align="left"><code class="filename">debug/unordered_map</code></td><td align="left"><code class="filename">debug/unordered_set</code></td><td align="left"><code class="filename">debug/vector</code></td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13322320"></a><p class="title"><strong>Table 3.12. Extension Profile Headers</strong></p><div class="table-contents"><table summary="Extension Profile Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><tbody><tr><td align="left"><code class="filename">profile/bitset</code></td><td align="left"><code class="filename">profile/deque</code></td><td align="left"><code class="filename">profile/list</code></td><td align="left"><code class="filename">profile/map</code></td></tr><tr><td align="left"><code class="filename">profile/set</code></td><td align="left"><code class="filename">profile/unordered_map</code></td><td align="left"><code class="filename">profile/unordered_set</code></td><td align="left"><code class="filename">profile/vector</code></td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idp13335696"></a><p class="title"><strong>Table 3.13. Extension Parallel Headers</strong></p><div class="table-contents"><table summary="Extension Parallel Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">parallel/algorithm</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr></tbody></table></div></div><br class="table-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.mixing"></a>Mixing Headers</h3></div></div></div><p> A few simple rules.

3411

+</p><div class="table"><a id="idm270002261328"></a><p class="title"><strong>Table 3.10. Extension Headers</strong></p><div class="table-contents"><table summary="Extension Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">ext/algorithm</code></td><td align="left"><code class="filename">ext/atomicity.h</code></td><td align="left"><code class="filename">ext/array_allocator.h</code></td><td align="left"><code class="filename">ext/bitmap_allocator.h</code></td><td align="left"><code class="filename">ext/cast.h</code></td></tr><tr><td align="left"><code class="filename">ext/codecvt_specializations.h</code></td><td align="left"><code class="filename">ext/concurrence.h</code></td><td align="left"><code class="filename">ext/debug_allocator.h</code></td><td align="left"><code class="filename">ext/enc_filebuf.h</code></td><td align="left"><code class="filename">ext/extptr_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/functional</code></td><td align="left"><code class="filename">ext/iterator</code></td><td align="left"><code class="filename">ext/malloc_allocator.h</code></td><td align="left"><code class="filename">ext/memory</code></td><td align="left"><code class="filename">ext/mt_allocator.h</code></td></tr><tr><td align="left"><code class="filename">ext/new_allocator.h</code></td><td align="left"><code class="filename">ext/numeric</code></td><td align="left"><code class="filename">ext/numeric_traits.h</code></td><td align="left"><code class="filename">ext/pb_ds/assoc_container.h</code></td><td align="left"><code class="filename">ext/pb_ds/priority_queue.h</code></td></tr><tr><td align="left"><code class="filename">ext/pod_char_traits.h</code></td><td align="left"><code class="filename">ext/pool_allocator.h</code></td><td align="left"><code class="filename">ext/rb_tree</code></td><td align="left"><code class="filename">ext/rope</code></td><td align="left"><code class="filename">ext/slist</code></td></tr><tr><td align="left"><code class="filename">ext/stdio_filebuf.h</code></td><td align="left"><code class="filename">ext/stdio_sync_filebuf.h</code></td><td align="left"><code class="filename">ext/throw_allocator.h</code></td><td align="left"><code class="filename">ext/typelist.h</code></td><td align="left"><code class="filename">ext/type_traits.h</code></td></tr><tr><td align="left"><code class="filename">ext/vstring.h</code></td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002225600"></a><p class="title"><strong>Table 3.11. Extension Debug Headers</strong></p><div class="table-contents"><table summary="Extension Debug Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /><col align="left" class="c5" /></colgroup><tbody><tr><td align="left"><code class="filename">debug/bitset</code></td><td align="left"><code class="filename">debug/deque</code></td><td align="left"><code class="filename">debug/list</code></td><td align="left"><code class="filename">debug/map</code></td><td align="left"><code class="filename">debug/set</code></td></tr><tr><td align="left"><code class="filename">debug/string</code></td><td align="left"><code class="filename">debug/unordered_map</code></td><td align="left"><code class="filename">debug/unordered_set</code></td><td align="left"><code class="filename">debug/vector</code></td><td class="auto-generated"> </td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002210832"></a><p class="title"><strong>Table 3.12. Extension Profile Headers</strong></p><div class="table-contents"><table summary="Extension Profile Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><tbody><tr><td align="left"><code class="filename">profile/bitset</code></td><td align="left"><code class="filename">profile/deque</code></td><td align="left"><code class="filename">profile/list</code></td><td align="left"><code class="filename">profile/map</code></td></tr><tr><td align="left"><code class="filename">profile/set</code></td><td align="left"><code class="filename">profile/unordered_map</code></td><td align="left"><code class="filename">profile/unordered_set</code></td><td align="left"><code class="filename">profile/vector</code></td></tr></tbody></table></div></div><br class="table-break" /><p></p><div class="table"><a id="idm270002197456"></a><p class="title"><strong>Table 3.13. Extension Parallel Headers</strong></p><div class="table-contents"><table summary="Extension Parallel Headers" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><tbody><tr><td align="left"><code class="filename">parallel/algorithm</code></td><td align="left"><code class="filename">parallel/numeric</code></td></tr></tbody></table></div></div><br class="table-break" /></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.headers.mixing"></a>Mixing Headers</h3></div></div></div><p> A few simple rules.

3412

</p><p>First, mixing different dialects of the standard headers is not

3413

possible. It's an all-or-nothing affair. Thus, code like

3414

</p><pre class="programlisting">

3415

Index: libstdc++-v3/doc/html/manual/using_namespaces.html

3416

===================================================================

3417

--- a/src/libstdc++-v3/doc/html/manual/using_namespaces.html (.../tags/gcc_4_8_2_release)

3418

+++ b/src/libstdc++-v3/doc/html/manual/using_namespaces.html (.../branches/gcc-4_8-branch)

3419

@@ -1,5 +1,5 @@

3420

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3421

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Namespaces</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_macros.html" title="Macros" /><link rel="next" href="using_dynamic_or_shared.html" title="Linking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Namespaces</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_macros.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_dynamic_or_shared.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.namespaces"></a>Namespaces</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.namespaces.all"></a>Available Namespaces</h3></div></div></div><p> There are three main namespaces.

3422

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Namespaces</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_macros.html" title="Macros" /><link rel="next" href="using_dynamic_or_shared.html" title="Linking" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Namespaces</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_macros.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_dynamic_or_shared.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.namespaces"></a>Namespaces</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.intro.using.namespaces.all"></a>Available Namespaces</h3></div></div></div><p> There are three main namespaces.

3423

</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>std</p><p>The ISO C++ standards specify that "all library entities are defined

3424

within namespace std." This includes namespaces nested

3425

within <code class="code">namespace std</code>, such as <code class="code">namespace

3426

Index: libstdc++-v3/doc/html/manual/debug.html

3427

===================================================================

3428

--- a/src/libstdc++-v3/doc/html/manual/debug.html (.../tags/gcc_4_8_2_release)

3429

+++ b/src/libstdc++-v3/doc/html/manual/debug.html (.../branches/gcc-4_8-branch)

3430

@@ -1,5 +1,5 @@

3431

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3432

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Debugging Support</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_exceptions.html" title="Exceptions" /><link rel="next" href="std_contents.html" title="Part II. Standard Contents" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Debugging Support</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_exceptions.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="std_contents.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.debug"></a>Debugging Support</h2></div></div></div><p>

3433

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Debugging Support</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_exceptions.html" title="Exceptions" /><link rel="next" href="std_contents.html" title="Part II. Standard Contents" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Debugging Support</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_exceptions.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="std_contents.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.debug"></a>Debugging Support</h2></div></div></div><p>

3434

There are numerous things that can be done to improve the ease with

3435

which C++ binaries are debugged when using the GNU tool chain. Here

3436

are some of them.

3437

@@ -161,7 +161,7 @@

3438

DRD</a>,

3439

3440

Helgrind</a>, and

3441

- <a class="link" href="http://code.google.com/p/data-race-test" target="_top">

3442

+ <a class="link" href="http://code.google.com/p/data-race-test/" target="_top">

3443

ThreadSanitizer</a>.

3444

</p><p>

3445

With DRD, Helgrind and ThreadSanitizer you will need to define

3446

Index: libstdc++-v3/doc/html/manual/localization.html

3447

===================================================================

3448

--- a/src/libstdc++-v3/doc/html/manual/localization.html (.../tags/gcc_4_8_2_release)

3449

+++ b/src/libstdc++-v3/doc/html/manual/localization.html (.../branches/gcc-4_8-branch)

3450

@@ -1,5 +1,5 @@

3451

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3452

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 8. Localization</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="strings.html" title="Chapter 7. Strings" /><link rel="next" href="facets.html" title="Facets" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 8.

3453

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 8. Localization</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="strings.html" title="Chapter 7. Strings" /><link rel="next" href="facets.html" title="Facets" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 8.

3454

Localization

3455

3456

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="strings.html">Prev</a> </td><th width="60%" align="center">Part II.

3457

@@ -6,8 +6,8 @@

3458

Standard Contents

3459

</th><td width="20%" align="right"> <a accesskey="n" href="facets.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.localization"></a>Chapter 8.

3460

Localization

3461

- <a id="idp15701088" class="indexterm"></a>

3462

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idp15778336">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.locales"></a>Locales</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.locales.locale"></a>locale</h3></div></div></div><p>

3463

+ <a id="idm269999830208" class="indexterm"></a>

3464

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idm269999753024">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.localization.locales"></a>Locales</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="std.localization.locales.locale"></a>locale</h3></div></div></div><p>

3465

Describes the basic locale object, including nested

3466

classes id, facet, and the reference-counted implementation object,

3467

class _Impl.

3468

@@ -402,18 +402,18 @@

3469

What should non-required facet instantiations do? If the

3470

generic implementation is provided, then how to end-users

3471

provide specializations?

3472

- </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="locales.locale.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idp15744064"></a><p><span class="citetitle"><em class="citetitle">

3473

+ </p></li></ul></div></div><div class="bibliography"><div class="titlepage"><div><div><h4 class="title"><a id="locales.locale.biblio"></a>Bibliography</h4></div></div></div><div class="biblioentry"><a id="idm269999787232"></a><p><span class="citetitle"><em class="citetitle">

3474

The GNU C Library

3475

</em>. </span><span class="author"><span class="firstname">Roland</span> <span class="surname">McGrath</span>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2007 FSF. </span><span class="pagenums">

3476

Chapters 6 Character Set Handling and 7 Locales and

3477

Internationalization

3478

- . </span></p></div><div class="biblioentry"><a id="idp15748832"></a><p><span class="citetitle"><em class="citetitle">

3479

+ . </span></p></div><div class="biblioentry"><a id="idm269999782464"></a><p><span class="citetitle"><em class="citetitle">

3480

Correspondence

3481

- </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idp15751920"></a><p><span class="citetitle"><em class="citetitle">

3482

+ </em>. </span><span class="author"><span class="firstname">Ulrich</span> <span class="surname">Drepper</span>. </span><span class="copyright">Copyright © 2002 . </span></p></div><div class="biblioentry"><a id="idm269999779376"></a><p><span class="citetitle"><em class="citetitle">

3483

ISO/IEC 14882:1998 Programming languages - C++

3484

3485

3486

ISO/IEC 9899:1999 Programming languages - C

3487

3488

3489

3490

System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008)

3491

</a>

3492

@@ -420,11 +420,11 @@

3493

3494

The Open Group/The Institute of Electrical and Electronics

3495

Engineers, Inc.

3496

- . </span></p></div><div class="biblioentry"><a id="idp15759712"></a><p><span class="citetitle"><em class="citetitle">

3497

+ . </span></p></div><div class="biblioentry"><a id="idm269999771584"></a><p><span class="citetitle"><em class="citetitle">

3498

The C++ Programming Language, Special Edition

3499

</em>. </span><span class="author"><span class="firstname">Bjarne</span> <span class="surname">Stroustrup</span>. </span><span class="copyright">Copyright © 2000 Addison Wesley, Inc.. </span><span class="pagenums">Appendix D. </span><span class="publisher"><span class="publishername">

3500

Addison Wesley

3501

- . </span></span></p></div><div class="biblioentry"><a id="idp15764336"></a><p><span class="citetitle"><em class="citetitle">

3502

+ . </span></span></p></div><div class="biblioentry"><a id="idm269999766960"></a><p><span class="citetitle"><em class="citetitle">

3503

Standard C++ IOStreams and Locales

3504

</em>. </span><span class="subtitle">

3505

Advanced Programmer's Guide and Reference

3506

Index: libstdc++-v3/doc/html/manual/ext_algorithms.html

3507

===================================================================

3508

--- a/src/libstdc++-v3/doc/html/manual/ext_algorithms.html (.../tags/gcc_4_8_2_release)

3509

+++ b/src/libstdc++-v3/doc/html/manual/ext_algorithms.html (.../branches/gcc-4_8-branch)

3510

@@ -1,5 +1,5 @@

3511

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3512

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 25. Algorithms</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_utilities.html" title="Chapter 24. Utilities" /><link rel="next" href="ext_numerics.html" title="Chapter 26. Numerics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 25. Algorithms</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_utilities.html">Prev</a> </td><th width="60%" align="center">Part III.

3513

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 25. Algorithms</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_utilities.html" title="Chapter 24. Utilities" /><link rel="next" href="ext_numerics.html" title="Chapter 26. Numerics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 25. Algorithms</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_utilities.html">Prev</a> </td><th width="60%" align="center">Part III.

3514

Extensions

3515

3516

</th><td width="20%" align="right"> <a accesskey="n" href="ext_numerics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.algorithms"></a>Chapter 25. Algorithms</h2></div></div></div><p>25.1.6 (count, count_if) is extended with two more versions of count

3517

Index: libstdc++-v3/doc/html/manual/debug_mode.html

3518

===================================================================

3519

--- a/src/libstdc++-v3/doc/html/manual/debug_mode.html (.../tags/gcc_4_8_2_release)

3520

+++ b/src/libstdc++-v3/doc/html/manual/debug_mode.html (.../branches/gcc-4_8-branch)

3521

@@ -1,8 +1,8 @@

3522

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3523

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 17. Debug Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /><link rel="next" href="debug_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 17. Debug Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_compile_checks.html">Prev</a> </td><th width="60%" align="center">Part III.

3524

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 17. Debug Mode</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, debug" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="extensions.html" title="Part III. Extensions" /><link rel="prev" href="ext_compile_checks.html" title="Chapter 16. Compile Time Checks" /><link rel="next" href="debug_mode_semantics.html" title="Semantics" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 17. Debug Mode</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ext_compile_checks.html">Prev</a> </td><th width="60%" align="center">Part III.

3525

Extensions

3526

3527

-</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.debug_mode"></a>Chapter 17. Debug Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

3528

+</th><td width="20%" align="right"> <a accesskey="n" href="debug_mode_semantics.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.ext.debug_mode"></a>Chapter 17. Debug Mode</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="debug_mode.html#manual.ext.debug_mode.intro">Intro</a></span></dt><dt><span class="section"><a href="debug_mode_semantics.html">Semantics</a></span></dt><dt><span class="section"><a href="debug_mode_using.html">Using</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.mode">Using the Debug Mode</a></span></dt><dt><span class="section"><a href="debug_mode_using.html#debug_mode.using.specific">Using a Specific Debug Container</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html">Design</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.goals">Goals</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods">Methods</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.wrappers">The Wrapper Model</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_iter">Safe Iterators</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.safe_seq">Safe Sequences (Containers)</a></span></dt></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.precond">Precondition Checking</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.methods.coexistence">Release- and debug-mode coexistence</a></span></dt><dd><dl><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.compile">Compile-time coexistence of release- and debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.link">Link- and run-time coexistence of release- and

3529

debug-mode components</a></span></dt><dt><span class="section"><a href="debug_mode_design.html#methods.coexistence.alt">Alternatives for Coexistence</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug_mode_design.html#debug_mode.design.other">Other Implementations</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.debug_mode.intro"></a>Intro</h2></div></div></div><p>

3530

By default, libstdc++ is built with efficiency in mind, and

3531

therefore performs little or no error checking that is not

3532

Index: libstdc++-v3/doc/html/manual/profile_mode_design.html

3533

===================================================================

3534

--- a/src/libstdc++-v3/doc/html/manual/profile_mode_design.html (.../tags/gcc_4_8_2_release)

3535

+++ b/src/libstdc++-v3/doc/html/manual/profile_mode_design.html (.../branches/gcc-4_8-branch)

3536

@@ -1,6 +1,6 @@

3537

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3538

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="next" href="profile_mode_api.html" title="Extensions for Custom Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_api.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.design"></a>Design</h2></div></div></div><p>

3539

-</p><div class="table"><a id="idp16981200"></a><p class="title"><strong>Table 19.1. Profile Code Location</strong></p><div class="table-contents"><table summary="Profile Code Location" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Code Location</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><code class="code">libstdc++-v3/include/std/*</code></td><td align="left">Preprocessor code to redirect to profile extension headers.</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/*</code></td><td align="left">Profile extension public headers (map, vector, ...).</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/impl/*</code></td><td align="left">Profile extension internals. Implementation files are

3540

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Design</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="C++, library, profile" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="prev" href="profile_mode.html" title="Chapter 19. Profile Mode" /><link rel="next" href="profile_mode_api.html" title="Extensions for Custom Containers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Design</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="profile_mode.html">Prev</a> </td><th width="60%" align="center">Chapter 19. Profile Mode</th><td width="20%" align="right"> <a accesskey="n" href="profile_mode_api.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.ext.profile_mode.design"></a>Design</h2></div></div></div><p>

3541

+</p><div class="table"><a id="idm269998550064"></a><p class="title"><strong>Table 19.1. Profile Code Location</strong></p><div class="table-contents"><table summary="Profile Code Location" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Code Location</th><th align="left">Use</th></tr></thead><tbody><tr><td align="left"><code class="code">libstdc++-v3/include/std/*</code></td><td align="left">Preprocessor code to redirect to profile extension headers.</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/*</code></td><td align="left">Profile extension public headers (map, vector, ...).</td></tr><tr><td align="left"><code class="code">libstdc++-v3/include/profile/impl/*</code></td><td align="left">Profile extension internals. Implementation files are

3542

only included from <code class="code">impl/profiler.h</code>, which is the only

3543

file included from the public headers.</td></tr></tbody></table></div></div><br class="table-break" /><p>

3544

</p><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="manual.ext.profile_mode.design.wrapper"></a>Wrapper Model</h3></div></div></div><p>

3545

Index: libstdc++-v3/doc/html/manual/using_concurrency.html

3546

===================================================================

3547

--- a/src/libstdc++-v3/doc/html/manual/using_concurrency.html (.../tags/gcc_4_8_2_release)

3548

+++ b/src/libstdc++-v3/doc/html/manual/using_concurrency.html (.../branches/gcc-4_8-branch)

3549

@@ -1,5 +1,5 @@

3550

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3551

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_dynamic_or_shared.html" title="Linking" /><link rel="next" href="using_exceptions.html" title="Exceptions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Concurrency</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_dynamic_or_shared.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_exceptions.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.concurrency"></a>Concurrency</h2></div></div></div><p>This section discusses issues surrounding the proper compilation

3552

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Concurrency</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="using.html" title="Chapter 3. Using" /><link rel="prev" href="using_dynamic_or_shared.html" title="Linking" /><link rel="next" href="using_exceptions.html" title="Exceptions" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Concurrency</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="using_dynamic_or_shared.html">Prev</a> </td><th width="60%" align="center">Chapter 3. Using</th><td width="20%" align="right"> <a accesskey="n" href="using_exceptions.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.concurrency"></a>Concurrency</h2></div></div></div><p>This section discusses issues surrounding the proper compilation

3553

of multithreaded applications which use the Standard C++

3554

library. This information is GCC-specific since the C++

3555

standard does not address matters of multithreaded applications.

3556

Index: libstdc++-v3/doc/html/manual/mt_allocator_impl.html

3557

===================================================================

3558

--- a/src/libstdc++-v3/doc/html/manual/mt_allocator_impl.html (.../tags/gcc_4_8_2_release)

3559

+++ b/src/libstdc++-v3/doc/html/manual/mt_allocator_impl.html (.../branches/gcc-4_8-branch)

3560

@@ -1,5 +1,5 @@

3561

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3562

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_design.html" title="Design Issues" /><link rel="next" href="mt_allocator_ex_single.html" title="Single Thread Example" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_design.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_ex_single.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.tune"></a>Tunable Parameters</h3></div></div></div><p>Certain allocation parameters can be modified, or tuned. There

3563

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Implementation</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, allocator" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="mt_allocator.html" title="Chapter 20. The mt_allocator" /><link rel="prev" href="mt_allocator_design.html" title="Design Issues" /><link rel="next" href="mt_allocator_ex_single.html" title="Single Thread Example" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Implementation</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="mt_allocator_design.html">Prev</a> </td><th width="60%" align="center">Chapter 20. The mt_allocator</th><td width="20%" align="right"> <a accesskey="n" href="mt_allocator_ex_single.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="allocator.mt.impl"></a>Implementation</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="allocator.mt.tune"></a>Tunable Parameters</h3></div></div></div><p>Certain allocation parameters can be modified, or tuned. There

3564

exists a nested <code class="code">struct __pool_base::_Tune</code> that contains all

3565

these parameters, which include settings for

3566

</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>Alignment</p></li><li class="listitem"><p>Maximum bytes before calling <code class="code">::operator new</code> directly</p></li><li class="listitem"><p>Minimum bytes</p></li><li class="listitem"><p>Size of underlying global allocations</p></li><li class="listitem"><p>Maximum number of supported threads</p></li><li class="listitem"><p>Migration of deallocations to the global free list</p></li><li class="listitem"><p>Shunt for global <code class="code">new</code> and <code class="code">delete</code></p></li></ul></div><p>Adjusting parameters for a given instance of an allocator can only

3567

Index: libstdc++-v3/doc/html/manual/appendix_gfdl.html

3568

===================================================================

3569

--- a/src/libstdc++-v3/doc/html/manual/appendix_gfdl.html (.../tags/gcc_4_8_2_release)

3570

+++ b/src/libstdc++-v3/doc/html/manual/appendix_gfdl.html (.../branches/gcc-4_8-branch)

3571

@@ -1,5 +1,5 @@

3572

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3573

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix E. GNU Free Documentation License</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /><link rel="next" href="../bk02.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix E. GNU Free Documentation License</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_gpl.html">Prev</a> </td><th width="60%" align="center">Part IV.

3574

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix E. GNU Free Documentation License</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_gpl.html" title="Appendix D. GNU General Public License version 3" /><link rel="next" href="../bk02.html" title="" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix E. GNU Free Documentation License</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_gpl.html">Prev</a> </td><th width="60%" align="center">Part IV.

3575

Appendices

3576

</th><td width="20%" align="right"> <a accesskey="n" href="../bk02.html">Next</a></td></tr></table><hr /></div><div class="appendix"><div class="titlepage"><div><div><h1 class="title"><a id="appendix.gfdl-1.3"></a>GNU Free Documentation License</h1></div></div></div><p>Version 1.3, 3 November 2008</p><p>

3577

3578

Index: libstdc++-v3/doc/html/manual/containers.html

3579

===================================================================

3580

--- a/src/libstdc++-v3/doc/html/manual/containers.html (.../tags/gcc_4_8_2_release)

3581

+++ b/src/libstdc++-v3/doc/html/manual/containers.html (.../branches/gcc-4_8-branch)

3582

@@ -1,5 +1,5 @@

3583

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3584

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 9. Containers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="facets.html" title="Facets" /><link rel="next" href="associative.html" title="Associative" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 9.

3585

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 9. Containers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="facets.html" title="Facets" /><link rel="next" href="associative.html" title="Associative" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 9.

3586

Containers

3587

3588

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="facets.html">Prev</a> </td><th width="60%" align="center">Part II.

3589

@@ -6,8 +6,8 @@

3590

Standard Contents

3591

</th><td width="20%" align="right"> <a accesskey="n" href="associative.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.containers"></a>Chapter 9.

3592

Containers

3593

- <a id="idp16037808" class="indexterm"></a>

3594

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.sequences"></a>Sequences</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.sequences.list"></a>list</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="sequences.list.size"></a>list::size() is O(n)</h4></div></div></div><p>

3595

+ <a id="idm269999493408" class="indexterm"></a>

3596

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.containers.sequences"></a>Sequences</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="containers.sequences.list"></a>list</h3></div></div></div><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="sequences.list.size"></a>list::size() is O(n)</h4></div></div></div><p>

3597

Yes it is, and that's okay. This is a decision that we preserved

3598

when we imported SGI's STL implementation. The following is

3599

quoted from <a class="link" href="http://www.sgi.com/tech/stl/FAQ.html" target="_top">their FAQ</a>:

3600

Index: libstdc++-v3/doc/html/manual/io.html

3601

===================================================================

3602

--- a/src/libstdc++-v3/doc/html/manual/io.html (.../tags/gcc_4_8_2_release)

3603

+++ b/src/libstdc++-v3/doc/html/manual/io.html (.../branches/gcc-4_8-branch)

3604

@@ -1,5 +1,5 @@

3605

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3606

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 13. Input and Output</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="numerics_and_c.html" title="Interacting with C" /><link rel="next" href="streambufs.html" title="Stream Buffers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 13.

3607

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 13. Input and Output</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="numerics_and_c.html" title="Interacting with C" /><link rel="next" href="streambufs.html" title="Stream Buffers" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 13.

3608

Input and Output

3609

3610

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="numerics_and_c.html">Prev</a> </td><th width="60%" align="center">Part II.

3611

@@ -6,8 +6,8 @@

3612

Standard Contents

3613

</th><td width="20%" align="right"> <a accesskey="n" href="streambufs.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.io"></a>Chapter 13.

3614

Input and Output

3615

- <a id="idp16257600" class="indexterm"></a>

3616

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="io.html#std.io.objects">Iostream Objects</a></span></dt><dt><span class="section"><a href="streambufs.html">Stream Buffers</a></span></dt><dd><dl><dt><span class="section"><a href="streambufs.html#io.streambuf.derived">Derived streambuf Classes</a></span></dt><dt><span class="section"><a href="streambufs.html#io.streambuf.buffering">Buffering</a></span></dt></dl></dd><dt><span class="section"><a href="stringstreams.html">Memory Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="stringstreams.html#std.io.memstreams.compat">Compatibility With strstream</a></span></dt></dl></dd><dt><span class="section"><a href="fstreams.html">File Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="fstreams.html#std.io.filestreams.copying_a_file">Copying a File</a></span></dt><dt><span class="section"><a href="fstreams.html#std.io.filestreams.binary">Binary Input and Output</a></span></dt></dl></dd><dt><span class="section"><a href="io_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="io_and_c.html#std.io.c.FILE">Using FILE* and file descriptors</a></span></dt><dt><span class="section"><a href="io_and_c.html#std.io.c.sync">Performance</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.objects"></a>Iostream Objects</h2></div></div></div><p>To minimize the time you have to wait on the compiler, it's good to

3617

+ <a id="idm269999273616" class="indexterm"></a>

3618

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="io.html#std.io.objects">Iostream Objects</a></span></dt><dt><span class="section"><a href="streambufs.html">Stream Buffers</a></span></dt><dd><dl><dt><span class="section"><a href="streambufs.html#io.streambuf.derived">Derived streambuf Classes</a></span></dt><dt><span class="section"><a href="streambufs.html#io.streambuf.buffering">Buffering</a></span></dt></dl></dd><dt><span class="section"><a href="stringstreams.html">Memory Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="stringstreams.html#std.io.memstreams.compat">Compatibility With strstream</a></span></dt></dl></dd><dt><span class="section"><a href="fstreams.html">File Based Streams</a></span></dt><dd><dl><dt><span class="section"><a href="fstreams.html#std.io.filestreams.copying_a_file">Copying a File</a></span></dt><dt><span class="section"><a href="fstreams.html#std.io.filestreams.binary">Binary Input and Output</a></span></dt></dl></dd><dt><span class="section"><a href="io_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="io_and_c.html#std.io.c.FILE">Using FILE* and file descriptors</a></span></dt><dt><span class="section"><a href="io_and_c.html#std.io.c.sync">Performance</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.objects"></a>Iostream Objects</h2></div></div></div><p>To minimize the time you have to wait on the compiler, it's good to

3619

only include the headers you really need. Many people simply include

3620

<iostream> when they don't need to -- and that can <span class="emphasis"><em>penalize

3621

your runtime as well.</em></span> Here are some tips on which header to use

3622

Index: libstdc++-v3/doc/html/manual/index.html

3623

===================================================================

3624

--- a/src/libstdc++-v3/doc/html/manual/index.html (.../tags/gcc_4_8_2_release)

3625

+++ b/src/libstdc++-v3/doc/html/manual/index.html (.../branches/gcc-4_8-branch)

3626

@@ -1,7 +1,7 @@

3627

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3628

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library Manual</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="../index.html" title="The GNU C++ Library" /><link rel="prev" href="../index.html" title="The GNU C++ Library" /><link rel="next" href="intro.html" title="Part I. Introduction" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library Manual</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="../index.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="intro.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><div><div><h1 class="title"><a id="manual"></a>The GNU C++ Library Manual</h1></div><div><div class="authorgroup"><div class="author"><h3 class="author"><span class="firstname"></span> <span class="surname"></span></h3></div><div class="author"><h3 class="author"><span class="firstname">Paolo</span> <span class="surname">Carlini</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Phil</span> <span class="surname">Edwards</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Doug</span> <span class="surname">Gregor</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Dhruv</span> <span class="surname">Matani</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jason</span> <span class="surname">Merrill</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Mark</span> <span class="surname">Mitchell</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Nathan</span> <span class="surname">Myers</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Felix</span> <span class="surname">Natter</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Stefan</span> <span class="surname">Olsson</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Silvius</span> <span class="surname">Rus</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Ami</span> <span class="surname">Tavory</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jonathan</span> <span class="surname">Wakely</span></h3></div></div></div><div><p class="copyright">Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012

3629

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>The GNU C++ Library Manual</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="../index.html" title="The GNU C++ Library" /><link rel="prev" href="../index.html" title="The GNU C++ Library" /><link rel="next" href="intro.html" title="Part I. Introduction" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">The GNU C++ Library Manual</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="../index.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="intro.html">Next</a></td></tr></table><hr /></div><div class="book"><div class="titlepage"><div><div><h1 class="title"><a id="manual"></a>The GNU C++ Library Manual</h1></div><div><div class="authorgroup"><div class="author"><h3 class="author"><span class="firstname"></span> <span class="surname"></span></h3></div><div class="author"><h3 class="author"><span class="firstname">Paolo</span> <span class="surname">Carlini</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Phil</span> <span class="surname">Edwards</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Doug</span> <span class="surname">Gregor</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Benjamin</span> <span class="surname">Kosnik</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Dhruv</span> <span class="surname">Matani</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jason</span> <span class="surname">Merrill</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Mark</span> <span class="surname">Mitchell</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Nathan</span> <span class="surname">Myers</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Felix</span> <span class="surname">Natter</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Stefan</span> <span class="surname">Olsson</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Silvius</span> <span class="surname">Rus</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Johannes</span> <span class="surname">Singler</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Ami</span> <span class="surname">Tavory</span></h3></div><div class="author"><h3 class="author"><span class="firstname">Jonathan</span> <span class="surname">Wakely</span></h3></div></div></div><div><p class="copyright">Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013

3630

3631

- </p></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="part"><a href="intro.html">I.

3632

+ </p></div></div><hr /></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="part"><a href="intro.html">I.

3633

Introduction

3634

3635

</a></span></dt><dd><dl><dt><span class="chapter"><a href="status.html">1. Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#manual.intro.status.iso">Implementation Status</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#status.iso.1998">C++ 1998/2003</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.1998.status">Implementation Status</a></span></dt><dt><span class="section"><a href="status.html#iso.1998.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.2011">C++ 2011</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.2011.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr1">C++ TR1</a></span></dt><dd><dl><dt><span class="section"><a href="status.html#iso.tr1.specific">Implementation Specific Behavior</a></span></dt></dl></dd><dt><span class="section"><a href="status.html#status.iso.tr24733">C++ TR 24733</a></span></dt></dl></dd><dt><span class="section"><a href="license.html">License</a></span></dt><dd><dl><dt><span class="section"><a href="license.html#manual.intro.status.license.gpl">The Code: GPL</a></span></dt><dt><span class="section"><a href="license.html#manual.intro.status.license.fdl">The Documentation: GPL, FDL</a></span></dt></dl></dd><dt><span class="section"><a href="bugs.html">Bugs</a></span></dt><dd><dl><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.impl">Implementation Bugs</a></span></dt><dt><span class="section"><a href="bugs.html#manual.intro.status.bugs.iso">Standard Bugs</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="setup.html">2. Setup</a></span></dt><dd><dl><dt><span class="section"><a href="setup.html#manual.intro.setup.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="configure.html">Configure</a></span></dt><dt><span class="section"><a href="make.html">Make</a></span></dt></dl></dd><dt><span class="chapter"><a href="using.html">3. Using</a></span></dt><dd><dl><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt><dt><span class="section"><a href="debug.html#debug.profile_mode">Profile-based Performance Analysis</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="part"><a href="std_contents.html">II.

3636

@@ -15,13 +15,13 @@

3637

</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.api">API Reference</a></span></dt><dt><span class="section"><a href="diagnostics.html#std.diagnostics.exceptions.data">Adding Data to <code class="classname">exception</code></a></span></dt></dl></dd><dt><span class="section"><a href="concept_checking.html">Concept Checking</a></span></dt></dl></dd><dt><span class="chapter"><a href="utilities.html">6.

3638

Utilities

3639

3640

-</a></span></dt><dd><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp13920976">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idp13924528">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp13937824">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15512272">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idp15534784">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idp15542080">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp15556704">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15573056">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idp15576640">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="strings.html">7.

3641

+</a></span></dt><dd><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270001611968">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idm270001608416">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm270001595120">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270000019344">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999996832">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idm269999989536">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999974912">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm269999958496">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idm269999954912">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></dd><dt><span class="chapter"><a href="strings.html">7.

3642

Strings

3643

3644

</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#std.strings.string">String Classes</a></span></dt><dd><dl><dt><span class="section"><a href="strings.html#strings.string.simple">Simple Transformations</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.case">Case Sensitivity</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.character_types">Arbitrary Character Types</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.token">Tokenizing</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.shrink">Shrink to Fit</a></span></dt><dt><span class="section"><a href="strings.html#strings.string.Cstring">CString (MFC)</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="localization.html">8.

3645

Localization

3646

3647

-</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idp15778336">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

3648

+</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales">Locales</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#std.localization.locales.locale">locale</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locales.locale.req">Requirements</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.design">Design</a></span></dt><dt><span class="section"><a href="localization.html#locales.locale.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="localization.html#locale.impl.c">Interacting with "C" locales</a></span></dt></dl></dd><dt><span class="section"><a href="localization.html#locales.locale.future">Future</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="facets.html">Facets</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#std.localization.facet.ctype">ctype</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.ctype.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#idm269999753024">Specializations</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.ctype.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#std.localization.facet.codecvt">codecvt</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.codecvt.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.design">Design</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#codecvt.design.wchar_t_size"><span class="type">wchar_t</span> Size</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.unicode">Support for Unicode</a></span></dt><dt><span class="section"><a href="facets.html#codecvt.design.issues">Other Issues</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.codecvt.impl">Implementation</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.codecvt.future">Future</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#manual.localization.facet.messages">messages</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#facet.messages.req">Requirements</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.design">Design</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="facets.html#messages.impl.models">Models</a></span></dt><dt><span class="section"><a href="facets.html#messages.impl.gnu">The GNU Model</a></span></dt></dl></dd><dt><span class="section"><a href="facets.html#facet.messages.use">Use</a></span></dt><dt><span class="section"><a href="facets.html#facet.messages.future">Future</a></span></dt></dl></dd></dl></dd></dl></dd><dt><span class="chapter"><a href="containers.html">9.

3649

Containers

3650

3651

</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#std.containers.sequences">Sequences</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#containers.sequences.list">list</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.list.size">list::size() is O(n)</a></span></dt></dl></dd><dt><span class="section"><a href="containers.html#containers.sequences.vector">vector</a></span></dt><dd><dl><dt><span class="section"><a href="containers.html#sequences.vector.management">Space Overhead Management</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="associative.html">Associative</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#containers.associative.insert_hints">Insertion Hints</a></span></dt><dt><span class="section"><a href="associative.html#containers.associative.bitset">bitset</a></span></dt><dd><dl><dt><span class="section"><a href="associative.html#associative.bitset.size_variable">Size Variable</a></span></dt><dt><span class="section"><a href="associative.html#associative.bitset.type_string">Type String</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="unordered_associative.html">Unordered Associative</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.hash">Hash Code</a></span></dt><dd><dl><dt><span class="section"><a href="unordered_associative.html#containers.unordered.cache">Hash Code Caching Policy</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="containers_and_c.html">Interacting with C</a></span></dt><dd><dl><dt><span class="section"><a href="containers_and_c.html#containers.c.vs_array">Containers vs. Arrays</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="iterators.html">10.

3652

@@ -143,19 +143,19 @@

3653

3654

</a></span></dt><dt><span class="appendix"><a href="appendix_gpl.html">D.

3655

<acronym class="acronym">GNU</acronym> General Public License version 3

3656

- </a></span></dt><dt><span class="appendix"><a href="appendix_gfdl.html">E. GNU Free Documentation License</a></span></dt></dl></dd></dl></div><div class="list-of-figures"><p><strong>List of Figures</strong></p><dl><dt>22.1. <a href="policy_data_structures.html#idp17613296">Node Invariants</a></dt><dt>22.2. <a href="policy_data_structures.html#idp17619952">Underlying Associative Data Structures</a></dt><dt>22.3. <a href="policy_data_structures.html#idp17651648">Range Iteration in Different Data Structures</a></dt><dt>22.4. <a href="policy_data_structures.html#idp17666528">Point Iteration in Hash Data Structures</a></dt><dt>22.5. <a href="policy_data_structures.html#idp17675840">Effect of erase in different underlying data structures</a></dt><dt>22.6. <a href="policy_data_structures.html#idp17743424">Underlying Priority Queue Data Structures</a></dt><dt>22.7. <a href="policy_data_structures_using.html#idp17806128">Exception Hierarchy</a></dt><dt>22.8. <a href="policy_data_structures_design.html#idp18000448">Non-unique Mapping Standard Containers</a></dt><dt>22.9. <a href="policy_data_structures_design.html#fig.pbds_embedded_lists_2">

3657

+ </a></span></dt><dt><span class="appendix"><a href="appendix_gfdl.html">E. GNU Free Documentation License</a></span></dt></dl></dd></dl></div><div class="list-of-figures"><p><strong>List of Figures</strong></p><dl><dt>22.1. <a href="policy_data_structures.html#idm269997917584">Node Invariants</a></dt><dt>22.2. <a href="policy_data_structures.html#idm269997910864">Underlying Associative Data Structures</a></dt><dt>22.3. <a href="policy_data_structures.html#idm269997879168">Range Iteration in Different Data Structures</a></dt><dt>22.4. <a href="policy_data_structures.html#idm269997864256">Point Iteration in Hash Data Structures</a></dt><dt>22.5. <a href="policy_data_structures.html#idm269997855056">Effect of erase in different underlying data structures</a></dt><dt>22.6. <a href="policy_data_structures.html#idm269997787392">Underlying Priority Queue Data Structures</a></dt><dt>22.7. <a href="policy_data_structures_using.html#idm269997724688">Exception Hierarchy</a></dt><dt>22.8. <a href="policy_data_structures_design.html#idm269997530416">Non-unique Mapping Standard Containers</a></dt><dt>22.9. <a href="policy_data_structures_design.html#fig.pbds_embedded_lists_2">

3658

Effect of embedded lists in

3659

<code class="classname">std::multimap</code>

3660

- </a></dt><dt>22.10. <a href="policy_data_structures_design.html#idp18023952">Non-unique Mapping Containers</a></dt><dt>22.11. <a href="policy_data_structures_design.html#idp18043824">Point Iterator Hierarchy</a></dt><dt>22.12. <a href="policy_data_structures_design.html#idp18057168">Invalidation Guarantee Tags Hierarchy</a></dt><dt>22.13. <a href="policy_data_structures_design.html#idp18087392">Container Tag Hierarchy</a></dt><dt>22.14. <a href="policy_data_structures_design.html#idp18127536">Hash functions, ranged-hash functions, and

3661

- range-hashing functions</a></dt><dt>22.15. <a href="policy_data_structures_design.html#idp18191968">Insert hash sequence diagram</a></dt><dt>22.16. <a href="policy_data_structures_design.html#idp18199024">Insert hash sequence diagram with a null policy</a></dt><dt>22.17. <a href="policy_data_structures_design.html#idp18215840">Hash policy class diagram</a></dt><dt>22.18. <a href="policy_data_structures_design.html#idp18234944">Balls and bins</a></dt><dt>22.19. <a href="policy_data_structures_design.html#idp18265728">Insert resize sequence diagram</a></dt><dt>22.20. <a href="policy_data_structures_design.html#idp18273504">Standard resize policy trigger sequence

3662

- diagram</a></dt><dt>22.21. <a href="policy_data_structures_design.html#idp18277664">Standard resize policy size sequence

3663

- diagram</a></dt><dt>22.22. <a href="policy_data_structures_design.html#idp18355696">Tree node invariants</a></dt><dt>22.23. <a href="policy_data_structures_design.html#idp18365136">Tree node invalidation</a></dt><dt>22.24. <a href="policy_data_structures_design.html#idp18378304">A tree and its update policy</a></dt><dt>22.25. <a href="policy_data_structures_design.html#idp18389968">Restoring node invariants</a></dt><dt>22.26. <a href="policy_data_structures_design.html#idp18398144">Insert update sequence</a></dt><dt>22.27. <a href="policy_data_structures_design.html#idp18420400">Useless update path</a></dt><dt>22.28. <a href="policy_data_structures_design.html#idp18465088">A PATRICIA trie</a></dt><dt>22.29. <a href="policy_data_structures_design.html#idp18475584">A trie and its update policy</a></dt><dt>22.30. <a href="policy_data_structures_design.html#idp18506160">A simple list</a></dt><dt>22.31. <a href="policy_data_structures_design.html#idp18511744">The counter algorithm</a></dt><dt>22.32. <a href="policy_data_structures_design.html#idp18575568">Underlying Priority-Queue Data-Structures.</a></dt><dt>22.33. <a href="policy_data_structures_design.html#idp18610544">Priority-Queue Data-Structure Tags.</a></dt><dt>B.1. <a href="appendix_porting.html#idp22035648">Configure and Build File Dependencies</a></dt></dl></div><div class="list-of-tables"><p><strong>List of Tables</strong></p><dl><dt>1.1. <a href="status.html#idp452240">C++ 1998/2003 Implementation Status</a></dt><dt>1.2. <a href="status.html#idp8670848">C++ 2011 Implementation Status</a></dt><dt>1.3. <a href="status.html#idp7483200">C++ TR1 Implementation Status</a></dt><dt>1.4. <a href="status.html#idp12559072">C++ TR 24733 Implementation Status</a></dt><dt>3.1. <a href="using.html#idp13051936">C++ Command Options</a></dt><dt>3.2. <a href="using_headers.html#idp13079360">C++ 1998 Library Headers</a></dt><dt>3.3. <a href="using_headers.html#idp13115840">C++ 1998 Library Headers for C Library Facilities</a></dt><dt>3.4. <a href="using_headers.html#idp13140576">C++ 2011 Library Headers</a></dt><dt>3.5. <a href="using_headers.html#idp13192016">C++ 2011 Library Headers for C Library Facilities</a></dt><dt>3.6. <a href="using_headers.html#idp13221904">C++ TR 1 Library Headers</a></dt><dt>3.7. <a href="using_headers.html#idp13238832">C++ TR 1 Library Headers for C Library Facilities</a></dt><dt>3.8. <a href="using_headers.html#idp13259904">C++ TR 24733 Decimal Floating-Point Header</a></dt><dt>3.9. <a href="using_headers.html#idp13265424">C++ ABI Headers</a></dt><dt>3.10. <a href="using_headers.html#idp13271824">Extension Headers</a></dt><dt>3.11. <a href="using_headers.html#idp13307552">Extension Debug Headers</a></dt><dt>3.12. <a href="using_headers.html#idp13322320">Extension Profile Headers</a></dt><dt>3.13. <a href="using_headers.html#idp13335696">Extension Parallel Headers</a></dt><dt>17.1. <a href="debug_mode_using.html#idp16490400">Debugging Containers</a></dt><dt>17.2. <a href="debug_mode_using.html#idp16535296">Debugging Containers C++11</a></dt><dt>18.1. <a href="parallel_mode_using.html#idp16725920">Parallel Algorithms</a></dt><dt>19.1. <a href="profile_mode_design.html#idp16981200">Profile Code Location</a></dt><dt>19.2. <a href="profile_mode_diagnostics.html#idp17088912">Profile Diagnostics</a></dt><dt>21.1. <a href="bitmap_allocator_impl.html#idp17500848">Bitmap Allocator Memory Map</a></dt><dt>B.1. <a href="documentation_hacking.html#idp22162432">Doxygen Prerequisites</a></dt><dt>B.2. <a href="documentation_hacking.html#idp22238096">HTML to Doxygen Markup Comparison</a></dt><dt>B.3. <a href="documentation_hacking.html#idp22257536">Docbook Prerequisites</a></dt><dt>B.4. <a href="documentation_hacking.html#idp22335040">HTML to Docbook XML Markup Comparison</a></dt><dt>B.5. <a href="documentation_hacking.html#idp22359184">Docbook XML Element Use</a></dt><dt>B.6. <a href="api.html#idp23030528">Extension Allocators</a></dt><dt>B.7. <a href="api.html#idp23058160">Extension Allocators Continued</a></dt></dl></div><div class="list-of-equations"><p><strong>List of Equations</strong></p><dl><dt>22.1. <a href="policy_data_structures_design.html#idp18141344">Ranged Hash Function</a></dt><dt>22.2. <a href="policy_data_structures_design.html#idp18147232">Range-Hashing, Division Method</a></dt><dt>22.3. <a href="policy_data_structures_design.html#idp18151744">Division via Prime Modulo</a></dt><dt>22.4. <a href="policy_data_structures_design.html#idp18153568">Division via Bit Mask</a></dt><dt>22.5. <a href="policy_data_structures_design.html#idp18163200">

3664

+ </a></dt><dt>22.10. <a href="policy_data_structures_design.html#idm269997506912">Non-unique Mapping Containers</a></dt><dt>22.11. <a href="policy_data_structures_design.html#idm269997487104">Point Iterator Hierarchy</a></dt><dt>22.12. <a href="policy_data_structures_design.html#idm269997473760">Invalidation Guarantee Tags Hierarchy</a></dt><dt>22.13. <a href="policy_data_structures_design.html#idm269997443664">Container Tag Hierarchy</a></dt><dt>22.14. <a href="policy_data_structures_design.html#idm269997403584">Hash functions, ranged-hash functions, and

3665

+ range-hashing functions</a></dt><dt>22.15. <a href="policy_data_structures_design.html#idm269997339216">Insert hash sequence diagram</a></dt><dt>22.16. <a href="policy_data_structures_design.html#idm269997332160">Insert hash sequence diagram with a null policy</a></dt><dt>22.17. <a href="policy_data_structures_design.html#idm269997315408">Hash policy class diagram</a></dt><dt>22.18. <a href="policy_data_structures_design.html#idm269997296368">Balls and bins</a></dt><dt>22.19. <a href="policy_data_structures_design.html#idm269997265648">Insert resize sequence diagram</a></dt><dt>22.20. <a href="policy_data_structures_design.html#idm269997257872">Standard resize policy trigger sequence

3666

+ diagram</a></dt><dt>22.21. <a href="policy_data_structures_design.html#idm269997253712">Standard resize policy size sequence

3667

+ diagram</a></dt><dt>22.22. <a href="policy_data_structures_design.html#idm269997175616">Tree node invariants</a></dt><dt>22.23. <a href="policy_data_structures_design.html#idm269997166176">Tree node invalidation</a></dt><dt>22.24. <a href="policy_data_structures_design.html#idm269997153072">A tree and its update policy</a></dt><dt>22.25. <a href="policy_data_structures_design.html#idm269997141408">Restoring node invariants</a></dt><dt>22.26. <a href="policy_data_structures_design.html#idm269997133232">Insert update sequence</a></dt><dt>22.27. <a href="policy_data_structures_design.html#idm269997110976">Useless update path</a></dt><dt>22.28. <a href="policy_data_structures_design.html#idm269997066288">A PATRICIA trie</a></dt><dt>22.29. <a href="policy_data_structures_design.html#idm269997055856">A trie and its update policy</a></dt><dt>22.30. <a href="policy_data_structures_design.html#idm269997025344">A simple list</a></dt><dt>22.31. <a href="policy_data_structures_design.html#idm269997019760">The counter algorithm</a></dt><dt>22.32. <a href="policy_data_structures_design.html#idm269996955920">Underlying Priority-Queue Data-Structures.</a></dt><dt>22.33. <a href="policy_data_structures_design.html#idm269996920880">Priority-Queue Data-Structure Tags.</a></dt><dt>B.1. <a href="appendix_porting.html#idm269993497120">Configure and Build File Dependencies</a></dt></dl></div><div class="list-of-tables"><p><strong>List of Tables</strong></p><dl><dt>1.1. <a href="status.html#idm270008034928">C++ 1998/2003 Implementation Status</a></dt><dt>1.2. <a href="status.html#idm270007982624">C++ 2011 Implementation Status</a></dt><dt>1.3. <a href="status.html#idm270006687472">C++ TR1 Implementation Status</a></dt><dt>1.4. <a href="status.html#idm270002960368">C++ TR 24733 Implementation Status</a></dt><dt>3.1. <a href="using.html#idm270002481088">C++ Command Options</a></dt><dt>3.2. <a href="using_headers.html#idm270002453792">C++ 1998 Library Headers</a></dt><dt>3.3. <a href="using_headers.html#idm270002417312">C++ 1998 Library Headers for C Library Facilities</a></dt><dt>3.4. <a href="using_headers.html#idm270002392576">C++ 2011 Library Headers</a></dt><dt>3.5. <a href="using_headers.html#idm270002341136">C++ 2011 Library Headers for C Library Facilities</a></dt><dt>3.6. <a href="using_headers.html#idm270002311248">C++ TR 1 Library Headers</a></dt><dt>3.7. <a href="using_headers.html#idm270002294320">C++ TR 1 Library Headers for C Library Facilities</a></dt><dt>3.8. <a href="using_headers.html#idm270002273248">C++ TR 24733 Decimal Floating-Point Header</a></dt><dt>3.9. <a href="using_headers.html#idm270002267728">C++ ABI Headers</a></dt><dt>3.10. <a href="using_headers.html#idm270002261328">Extension Headers</a></dt><dt>3.11. <a href="using_headers.html#idm270002225600">Extension Debug Headers</a></dt><dt>3.12. <a href="using_headers.html#idm270002210832">Extension Profile Headers</a></dt><dt>3.13. <a href="using_headers.html#idm270002197456">Extension Parallel Headers</a></dt><dt>17.1. <a href="debug_mode_using.html#idm269999040896">Debugging Containers</a></dt><dt>17.2. <a href="debug_mode_using.html#idm269998996000">Debugging Containers C++11</a></dt><dt>18.1. <a href="parallel_mode_using.html#idm269998805216">Parallel Algorithms</a></dt><dt>19.1. <a href="profile_mode_design.html#idm269998550064">Profile Code Location</a></dt><dt>19.2. <a href="profile_mode_diagnostics.html#idm269998442544">Profile Diagnostics</a></dt><dt>21.1. <a href="bitmap_allocator_impl.html#idm269998030352">Bitmap Allocator Memory Map</a></dt><dt>B.1. <a href="documentation_hacking.html#idm269993370272">Doxygen Prerequisites</a></dt><dt>B.2. <a href="documentation_hacking.html#idm269993294592">HTML to Doxygen Markup Comparison</a></dt><dt>B.3. <a href="documentation_hacking.html#idm269993275152">Docbook Prerequisites</a></dt><dt>B.4. <a href="documentation_hacking.html#idm269993197520">HTML to Docbook XML Markup Comparison</a></dt><dt>B.5. <a href="documentation_hacking.html#idm269993173376">Docbook XML Element Use</a></dt><dt>B.6. <a href="api.html#idm269992502096">Extension Allocators</a></dt><dt>B.7. <a href="api.html#idm269992474464">Extension Allocators Continued</a></dt></dl></div><div class="list-of-equations"><p><strong>List of Equations</strong></p><dl><dt>22.1. <a href="policy_data_structures_design.html#idm269997389776">Ranged Hash Function</a></dt><dt>22.2. <a href="policy_data_structures_design.html#idm269997383888">Range-Hashing, Division Method</a></dt><dt>22.3. <a href="policy_data_structures_design.html#idm269997379376">Division via Prime Modulo</a></dt><dt>22.4. <a href="policy_data_structures_design.html#idm269997377552">Division via Bit Mask</a></dt><dt>22.5. <a href="policy_data_structures_design.html#idm269997367984">

3668

A Standard String Hash Function

3669

- </a></dt><dt>22.6. <a href="policy_data_structures_design.html#idp18169344">

3670

+ </a></dt><dt>22.6. <a href="policy_data_structures_design.html#idm269997361840">

3671

Only k String DNA Hash

3672

- </a></dt><dt>22.7. <a href="policy_data_structures_design.html#idp18240448">

3673

+ </a></dt><dt>22.7. <a href="policy_data_structures_design.html#idm269997290864">

3674

Probability of Probe Sequence of Length k

3675

- </a></dt><dt>22.8. <a href="policy_data_structures_design.html#idp18247216">

3676

+ </a></dt><dt>22.8. <a href="policy_data_structures_design.html#idm269997284096">

3677

Probability Probe Sequence in Some Bin

3678

</a></dt></dl></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="../index.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="intro.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">The GNU C++ Library </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Part I.

3679

Introduction

3680

Index: libstdc++-v3/doc/html/manual/numerics_and_c.html

3681

===================================================================

3682

--- a/src/libstdc++-v3/doc/html/manual/numerics_and_c.html (.../tags/gcc_4_8_2_release)

3683

+++ b/src/libstdc++-v3/doc/html/manual/numerics_and_c.html (.../branches/gcc-4_8-branch)

3684

@@ -1,5 +1,5 @@

3685

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3686

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="numerics.html" title="Chapter 12. Numerics" /><link rel="prev" href="generalized_numeric_operations.html" title="Generalized Operations" /><link rel="next" href="io.html" title="Chapter 13. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="generalized_numeric_operations.html">Prev</a> </td><th width="60%" align="center">Chapter 12.

3687

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Interacting with C</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="numerics.html" title="Chapter 12. Numerics" /><link rel="prev" href="generalized_numeric_operations.html" title="Generalized Operations" /><link rel="next" href="io.html" title="Chapter 13. Input and Output" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Interacting with C</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="generalized_numeric_operations.html">Prev</a> </td><th width="60%" align="center">Chapter 12.

3688

Numerics

3689

3690

</th><td width="20%" align="right"> <a accesskey="n" href="io.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.numerics.c"></a>Interacting with C</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="numerics.c.array"></a>Numerics vs. Arrays</h3></div></div></div><p>One of the major reasons why FORTRAN can chew through numbers so well

3691

Index: libstdc++-v3/doc/html/manual/appendix_gpl.html

3692

===================================================================

3693

--- a/src/libstdc++-v3/doc/html/manual/appendix_gpl.html (.../tags/gcc_4_8_2_release)

3694

+++ b/src/libstdc++-v3/doc/html/manual/appendix_gpl.html (.../branches/gcc-4_8-branch)

3695

@@ -1,5 +1,5 @@

3696

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3697

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix D. GNU General Public License version 3</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /><link rel="next" href="appendix_gfdl.html" title="Appendix E. GNU Free Documentation License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix D.

3698

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Appendix D. GNU General Public License version 3</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix.html" title="Part IV. Appendices" /><link rel="prev" href="appendix_free.html" title="Appendix C. Free Software Needs Free Documentation" /><link rel="next" href="appendix_gfdl.html" title="Appendix E. GNU Free Documentation License" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Appendix D.

3699

<acronym class="acronym">GNU</acronym> General Public License version 3

3700

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="appendix_free.html">Prev</a> </td><th width="60%" align="center">Part IV.

3701

Appendices

3702

@@ -77,7 +77,7 @@

3703

</p><p>

3704

The precise terms and conditions for copying, distribution and modification

3705

follow.

3706

- </p><h2><a id="idp23466384"></a>

3707

+ </p><h2><a id="idm269992066368"></a>

3708

TERMS AND CONDITIONS

3709

</h2><h2><a id="gpl-3-definitions"></a>

3710

0. Definitions.

3711

@@ -618,7 +618,7 @@

3712

waiver of all civil liability in connection with the Program, unless a

3713

warranty or assumption of liability accompanies a copy of the Program in

3714

return for a fee.

3715

- </p><h2><a id="idp23565184"></a>

3716

+ </p><h2><a id="idm269991967568"></a>

3717

END OF TERMS AND CONDITIONS

3718

</h2><h2><a id="HowToApply"></a>

3719

How to Apply These Terms to Your New Programs

3720

Index: libstdc++-v3/doc/html/manual/source_code_style.html

3721

===================================================================

3722

--- a/src/libstdc++-v3/doc/html/manual/source_code_style.html (.../tags/gcc_4_8_2_release)

3723

+++ b/src/libstdc++-v3/doc/html/manual/source_code_style.html (.../branches/gcc-4_8-branch)

3724

@@ -1,5 +1,5 @@

3725

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3726

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Coding Style</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_organization.html" title="Directory Layout and Source Conventions" /><link rel="next" href="source_design_notes.html" title="Design Notes" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Coding Style</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_organization.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3727

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Coding Style</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="appendix_contributing.html" title="Appendix A. Contributing" /><link rel="prev" href="source_organization.html" title="Directory Layout and Source Conventions" /><link rel="next" href="source_design_notes.html" title="Design Notes" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Coding Style</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="source_organization.html">Prev</a> </td><th width="60%" align="center">Appendix A.

3728

Contributing

3729

3730

</th><td width="20%" align="right"> <a accesskey="n" href="source_design_notes.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="contrib.coding_style"></a>Coding Style</h2></div></div></div><p>

3731

Index: libstdc++-v3/doc/html/manual/streambufs.html

3732

===================================================================

3733

--- a/src/libstdc++-v3/doc/html/manual/streambufs.html (.../tags/gcc_4_8_2_release)

3734

+++ b/src/libstdc++-v3/doc/html/manual/streambufs.html (.../branches/gcc-4_8-branch)

3735

@@ -1,5 +1,5 @@

3736

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3737

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Stream Buffers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="io.html" title="Chapter 13. Input and Output" /><link rel="next" href="stringstreams.html" title="Memory Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Stream Buffers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="io.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

3738

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Stream Buffers</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="io.html" title="Chapter 13. Input and Output" /><link rel="prev" href="io.html" title="Chapter 13. Input and Output" /><link rel="next" href="stringstreams.html" title="Memory Based Streams" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Stream Buffers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="io.html">Prev</a> </td><th width="60%" align="center">Chapter 13.

3739

Input and Output

3740

3741

</th><td width="20%" align="right"> <a accesskey="n" href="stringstreams.html">Next</a></td></tr></table><hr /></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.io.streambufs"></a>Stream Buffers</h2></div></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="io.streambuf.derived"></a>Derived streambuf Classes</h3></div></div></div><p>

3742

Index: libstdc++-v3/doc/html/manual/utilities.html

3743

===================================================================

3744

--- a/src/libstdc++-v3/doc/html/manual/utilities.html (.../tags/gcc_4_8_2_release)

3745

+++ b/src/libstdc++-v3/doc/html/manual/utilities.html (.../branches/gcc-4_8-branch)

3746

@@ -1,5 +1,5 @@

3747

<?xml version="1.0" encoding="UTF-8" standalone="no"?>

3748

-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 6. Utilities</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.77.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="concept_checking.html" title="Concept Checking" /><link rel="next" href="pairs.html" title="Pairs" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 6.

3749

+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>Chapter 6. Utilities</title><meta name="generator" content="DocBook XSL-NS Stylesheets V1.78.1" /><meta name="keywords" content="ISO C++, library" /><meta name="keywords" content="ISO C++, runtime, library" /><link rel="home" href="../index.html" title="The GNU C++ Library" /><link rel="up" href="std_contents.html" title="Part II. Standard Contents" /><link rel="prev" href="concept_checking.html" title="Concept Checking" /><link rel="next" href="pairs.html" title="Pairs" /></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 6.

3750

Utilities

3751

3752

</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="concept_checking.html">Prev</a> </td><th width="60%" align="center">Part II.

3753

@@ -6,8 +6,8 @@

3754

Standard Contents

3755

</th><td width="20%" align="right"> <a accesskey="n" href="pairs.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="std.util"></a>Chapter 6.

3756

Utilities

3757

- <a id="idp13862416" class="indexterm"></a>

3758

-</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp13920976">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idp13924528">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp13937824">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15512272">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idp15534784">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idp15542080">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idp15556704">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idp15573056">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idp15576640">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.functors"></a>Functors</h2></div></div></div><p>If you don't know what functors are, you're not alone. Many people

3759

+ <a id="idm270001670464" class="indexterm"></a>

3760

+</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="utilities.html#std.util.functors">Functors</a></span></dt><dt><span class="section"><a href="pairs.html">Pairs</a></span></dt><dt><span class="section"><a href="memory.html">Memory</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#std.util.memory.allocator">Allocators</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#allocator.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#allocator.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#allocator.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270001611968">Interface Design</a></span></dt><dt><span class="section"><a href="memory.html#idm270001608416">Selecting Default Allocation Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm270001595120">Disabling Memory Caching</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#allocator.using">Using a Specific Allocator</a></span></dt><dt><span class="section"><a href="memory.html#allocator.custom">Custom Allocators</a></span></dt><dt><span class="section"><a href="memory.html#allocator.ext">Extension Allocators</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.auto_ptr">auto_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#auto_ptr.limitations">Limitations</a></span></dt><dt><span class="section"><a href="memory.html#auto_ptr.using">Use in Containers</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#std.util.memory.shared_ptr">shared_ptr</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#shared_ptr.req">Requirements</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.design_issues">Design Issues</a></span></dt><dt><span class="section"><a href="memory.html#shared_ptr.impl">Implementation</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm270000019344">Class Hierarchy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999996832">Thread Safety</a></span></dt><dt><span class="section"><a href="memory.html#idm269999989536">Selecting Lock Policy</a></span></dt><dt><span class="section"><a href="memory.html#idm269999974912">Related functions and classes</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.using">Use</a></span></dt><dd><dl><dt><span class="section"><a href="memory.html#idm269999958496">Examples</a></span></dt><dt><span class="section"><a href="memory.html#idm269999954912">Unresolved Issues</a></span></dt></dl></dd><dt><span class="section"><a href="memory.html#shared_ptr.ack">Acknowledgments</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="traits.html">Traits</a></span></dt></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="std.util.functors"></a>Functors</h2></div></div></div><p>If you don't know what functors are, you're not alone. Many people

3761

get slightly the wrong idea. In the interest of not reinventing

3762

the wheel, we will refer you to the introduction to the functor

3763

concept written by SGI as part of their STL, in

3764

Index: libstdc++-v3/include/debug/functions.h

3765

===================================================================

3766

--- a/src/libstdc++-v3/include/debug/functions.h (.../tags/gcc_4_8_2_release)

3767

+++ b/src/libstdc++-v3/include/debug/functions.h (.../branches/gcc-4_8-branch)

3768

@@ -345,11 +345,13 @@

3769

return __check_sorted_set_aux(__first, __last, __pred, _SameType());

3770

}

3771

3772

+ // _GLIBCXX_RESOLVE_LIB_DEFECTS

3773

+ // 270. Binary search requirements overly strict

3774

+ // Determine if a sequence is partitioned w.r.t. this element.

3775

template<typename _ForwardIterator, typename _Tp>

3776

inline bool

3777

- __check_partitioned_lower_aux(_ForwardIterator __first,

3778

- _ForwardIterator __last, const _Tp& __value,

3779

- std::forward_iterator_tag)

3780

+ __check_partitioned_lower(_ForwardIterator __first,

3781

+ _ForwardIterator __last, const _Tp& __value)

3782

{

3783

while (__first != __last && *__first < __value)

3784

++__first;

3785

@@ -362,38 +364,11 @@

3786

return __first == __last;

3787

}

3788

3789

- // For performance reason, as the iterator range has been validated, check on

3790

- // random access safe iterators is done using the base iterator.

3791

- template<typename _Iterator, typename _Sequence, typename _Tp>

3792

- inline bool

3793

- __check_partitioned_lower_aux(

3794

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3795

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3796

- const _Tp& __value,

3797

- std::random_access_iterator_tag __tag)

3798

- {

3799

- return __check_partitioned_lower_aux(__first.base(), __last.base(),

3800

- __value, __tag);

3801

- }

3802

-

3803

- // _GLIBCXX_RESOLVE_LIB_DEFECTS

3804

- // 270. Binary search requirements overly strict

3805

- // Determine if a sequence is partitioned w.r.t. this element.

3806

template<typename _ForwardIterator, typename _Tp>

3807

inline bool

3808

- __check_partitioned_lower(_ForwardIterator __first,

3809

+ __check_partitioned_upper(_ForwardIterator __first,

3810

_ForwardIterator __last, const _Tp& __value)

3811

{

3812

- return __check_partitioned_lower_aux(__first, __last, __value,

3813

- std::__iterator_category(__first));

3814

- }

3815

-

3816

- template<typename _ForwardIterator, typename _Tp>

3817

- inline bool

3818

- __check_partitioned_upper_aux(_ForwardIterator __first,

3819

- _ForwardIterator __last, const _Tp& __value,

3820

- std::forward_iterator_tag)

3821

- {

3822

while (__first != __last && !(__value < *__first))

3823

++__first;

3824

if (__first != __last)

3825

@@ -405,35 +380,12 @@

3826

return __first == __last;

3827

}

3828

3829

- // For performance reason, as the iterator range has been validated, check on

3830

- // random access safe iterators is done using the base iterator.

3831

- template<typename _Iterator, typename _Sequence, typename _Tp>

3832

- inline bool

3833

- __check_partitioned_upper_aux(

3834

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3835

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3836

- const _Tp& __value,

3837

- std::random_access_iterator_tag __tag)

3838

- {

3839

- return __check_partitioned_upper_aux(__first.base(), __last.base(),

3840

- __value, __tag);

3841

- }

3842

-

3843

- template<typename _ForwardIterator, typename _Tp>

3844

- inline bool

3845

- __check_partitioned_upper(_ForwardIterator __first,

3846

- _ForwardIterator __last, const _Tp& __value)

3847

- {

3848

- return __check_partitioned_upper_aux(__first, __last, __value,

3849

- std::__iterator_category(__first));

3850

- }

3851

-

3852

+ // Determine if a sequence is partitioned w.r.t. this element.

3853

template<typename _ForwardIterator, typename _Tp, typename _Pred>

3854

inline bool

3855

- __check_partitioned_lower_aux(_ForwardIterator __first,

3856

- _ForwardIterator __last, const _Tp& __value,

3857

- _Pred __pred,

3858

- std::forward_iterator_tag)

3859

+ __check_partitioned_lower(_ForwardIterator __first,

3860

+ _ForwardIterator __last, const _Tp& __value,

3861

+ _Pred __pred)

3862

{

3863

while (__first != __last && bool(__pred(*__first, __value)))

3864

++__first;

3865

@@ -446,39 +398,12 @@

3866

return __first == __last;

3867

}

3868

3869

- // For performance reason, as the iterator range has been validated, check on

3870

- // random access safe iterators is done using the base iterator.

3871

- template<typename _Iterator, typename _Sequence,

3872

- typename _Tp, typename _Pred>

3873

- inline bool

3874

- __check_partitioned_lower_aux(

3875

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3876

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3877

- const _Tp& __value, _Pred __pred,

3878

- std::random_access_iterator_tag __tag)

3879

- {

3880

- return __check_partitioned_lower_aux(__first.base(), __last.base(),

3881

- __value, __pred, __tag);

3882

- }

3883

-

3884

- // Determine if a sequence is partitioned w.r.t. this element.

3885

template<typename _ForwardIterator, typename _Tp, typename _Pred>

3886

inline bool

3887

- __check_partitioned_lower(_ForwardIterator __first,

3888

+ __check_partitioned_upper(_ForwardIterator __first,

3889

_ForwardIterator __last, const _Tp& __value,

3890

_Pred __pred)

3891

{

3892

- return __check_partitioned_lower_aux(__first, __last, __value, __pred,

3893

- std::__iterator_category(__first));

3894

- }

3895

-

3896

- template<typename _ForwardIterator, typename _Tp, typename _Pred>

3897

- inline bool

3898

- __check_partitioned_upper_aux(_ForwardIterator __first,

3899

- _ForwardIterator __last, const _Tp& __value,

3900

- _Pred __pred,

3901

- std::forward_iterator_tag)

3902

- {

3903

while (__first != __last && !bool(__pred(__value, *__first)))

3904

++__first;

3905

if (__first != __last)

3906

@@ -490,31 +415,6 @@

3907

return __first == __last;

3908

}

3909

3910

- // For performance reason, as the iterator range has been validated, check on

3911

- // random access safe iterators is done using the base iterator.

3912

- template<typename _Iterator, typename _Sequence,

3913

- typename _Tp, typename _Pred>

3914

- inline bool

3915

- __check_partitioned_upper_aux(

3916

- const _Safe_iterator<_Iterator, _Sequence>& __first,

3917

- const _Safe_iterator<_Iterator, _Sequence>& __last,

3918

- const _Tp& __value, _Pred __pred,

3919

- std::random_access_iterator_tag __tag)

3920

- {

3921

- return __check_partitioned_upper_aux(__first.base(), __last.base(),

3922

- __value, __pred, __tag);

3923

- }

3924

-

3925

- template<typename _ForwardIterator, typename _Tp, typename _Pred>

3926

- inline bool

3927

- __check_partitioned_upper(_ForwardIterator __first,

3928

- _ForwardIterator __last, const _Tp& __value,

3929

- _Pred __pred)

3930

- {

3931

- return __check_partitioned_upper_aux(__first, __last, __value, __pred,

3932

- std::__iterator_category(__first));

3933

- }

3934

-

3935

// Helper struct to detect random access safe iterators.

3936

template<typename _Iterator>

3937

struct __is_safe_random_iterator

3938

Index: libstdc++-v3/include/debug/safe_unordered_base.h

3939

===================================================================

3940

--- a/src/libstdc++-v3/include/debug/safe_unordered_base.h (.../tags/gcc_4_8_2_release)

3941

+++ b/src/libstdc++-v3/include/debug/safe_unordered_base.h (.../branches/gcc-4_8-branch)

3942

@@ -133,9 +133,19 @@

3943

protected:

3944

// Initialize with a version number of 1 and no iterators

3945

_Safe_unordered_container_base()

3946

- : _M_local_iterators(0), _M_const_local_iterators(0)

3947

+ : _M_local_iterators(nullptr), _M_const_local_iterators(nullptr)

3948

{ }

3949

3950

+ // Initialize with a version number of 1 and no iterators

3951

+ _Safe_unordered_container_base(const _Safe_unordered_container_base&)

3952

+ noexcept

3953

+ : _Safe_unordered_container_base() { }

3954

+

3955

+ _Safe_unordered_container_base(_Safe_unordered_container_base&& __x)

3956

+ noexcept

3957

+ : _Safe_unordered_container_base()

3958

+ { this->_M_swap(__x); }

3959

+

3960

/** Notify all iterators that reference this container that the

3961

container is being destroyed. */

3962

~_Safe_unordered_container_base()

3963

Index: libstdc++-v3/include/debug/macros.h

3964

===================================================================

3965

--- a/src/libstdc++-v3/include/debug/macros.h (.../tags/gcc_4_8_2_release)

3966

+++ b/src/libstdc++-v3/include/debug/macros.h (.../branches/gcc-4_8-branch)

3967

@@ -261,8 +261,9 @@

3968

w.r.t. the value _Value. */

3969

#define __glibcxx_check_partitioned_lower(_First,_Last,_Value) \

3970

__glibcxx_check_valid_range(_First,_Last); \

3971

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower(_First, _Last, \

3972

- _Value), \

3973

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower( \

3974

+ __gnu_debug::__base(_First), \

3975

+ __gnu_debug::__base(_Last), _Value), \

3976

_M_message(__gnu_debug::__msg_unpartitioned) \

3977

._M_iterator(_First, #_First) \

3978

._M_iterator(_Last, #_Last) \

3979

@@ -270,8 +271,9 @@

3980

3981

#define __glibcxx_check_partitioned_upper(_First,_Last,_Value) \

3982

__glibcxx_check_valid_range(_First,_Last); \

3983

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper(_First, _Last, \

3984

- _Value), \

3985

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper( \

3986

+ __gnu_debug::__base(_First), \

3987

+ __gnu_debug::__base(_Last), _Value), \

3988

_M_message(__gnu_debug::__msg_unpartitioned) \

3989

._M_iterator(_First, #_First) \

3990

._M_iterator(_Last, #_Last) \

3991

@@ -281,8 +283,9 @@

3992

w.r.t. the value _Value and predicate _Pred. */

3993

#define __glibcxx_check_partitioned_lower_pred(_First,_Last,_Value,_Pred) \

3994

__glibcxx_check_valid_range(_First,_Last); \

3995

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower(_First, _Last, \

3996

- _Value, _Pred), \

3997

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_lower( \

3998

+ __gnu_debug::__base(_First), \

3999

+ __gnu_debug::__base(_Last), _Value, _Pred), \

4000

_M_message(__gnu_debug::__msg_unpartitioned_pred) \

4001

._M_iterator(_First, #_First) \

4002

._M_iterator(_Last, #_Last) \

4003

@@ -293,8 +296,9 @@

4004

w.r.t. the value _Value and predicate _Pred. */

4005

#define __glibcxx_check_partitioned_upper_pred(_First,_Last,_Value,_Pred) \

4006

__glibcxx_check_valid_range(_First,_Last); \

4007

-_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper(_First, _Last, \

4008

- _Value, _Pred), \

4009

+_GLIBCXX_DEBUG_VERIFY(__gnu_debug::__check_partitioned_upper( \

4010

+ __gnu_debug::__base(_First), \

4011

+ __gnu_debug::__base(_Last), _Value, _Pred), \

4012

_M_message(__gnu_debug::__msg_unpartitioned_pred) \

4013

._M_iterator(_First, #_First) \

4014

._M_iterator(_Last, #_Last) \

4015

Index: libstdc++-v3/include/std/iostream

4016

===================================================================

4017

--- a/src/libstdc++-v3/include/std/iostream (.../tags/gcc_4_8_2_release)

4018

+++ b/src/libstdc++-v3/include/std/iostream (.../branches/gcc-4_8-branch)

4019

@@ -48,13 +48,13 @@

4020

*

4021

* The <iostream> header declares the eight <em>standard stream

4022

* objects</em>. For other declarations, see

4023

- * http://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt11ch24.html

4024

+ * http://gcc.gnu.org/onlinedocs/libstdc++/manual/io.html

4025

* and the @link iosfwd I/O forward declarations @endlink

4026

*

4027

* They are required by default to cooperate with the global C

4028

* library's @c FILE streams, and to be available during program

4029

- * startup and termination. For more information, see the HOWTO

4030

- * linked to above.

4031

+ * startup and termination. For more information, see the section of the

4032

+ * manual linked to above.

4033

*/

4034

//@{

4035

extern istream cin; /// Linked to standard input

4036

Index: libstdc++-v3/include/std/tuple

4037

===================================================================

4038

--- a/src/libstdc++-v3/include/std/tuple (.../tags/gcc_4_8_2_release)

4039

+++ b/src/libstdc++-v3/include/std/tuple (.../branches/gcc-4_8-branch)

4040

@@ -755,7 +755,7 @@

4041

typename tuple_element<__i, tuple<_Elements...>>::type

4042

>::type

4043

get(tuple<_Elements...>& __t) noexcept

4044

- { return __get_helper<__i>(__t); }

4045

+ { return std::__get_helper<__i>(__t); }

4046

4047

template<std::size_t __i, typename... _Elements>

4048

constexpr typename __add_c_ref<

4049

@@ -762,7 +762,7 @@

4050

typename tuple_element<__i, tuple<_Elements...>>::type

4051

>::type

4052

get(const tuple<_Elements...>& __t) noexcept

4053

- { return __get_helper<__i>(__t); }

4054

+ { return std::__get_helper<__i>(__t); }

4055

4056

template<std::size_t __i, typename... _Elements>

4057

constexpr typename __add_r_ref<

4058

Index: libstdc++-v3/include/std/future

4059

===================================================================

4060

--- a/src/libstdc++-v3/include/std/future (.../tags/gcc_4_8_2_release)

4061

+++ b/src/libstdc++-v3/include/std/future (.../branches/gcc-4_8-branch)

4062

@@ -1261,9 +1261,11 @@

4063

struct __future_base::_Task_state<_Fn, _Alloc, _Res(_Args...)> final

4064

: __future_base::_Task_state_base<_Res(_Args...)>

4065

{

4066

- _Task_state(_Fn&& __fn, const _Alloc& __a)

4067

- : _Task_state_base<_Res(_Args...)>(__a), _M_impl(std::move(__fn), __a)

4068

- { }

4069

+ template<typename _Fn2>

4070

+ _Task_state(_Fn2&& __fn, const _Alloc& __a)

4071

+ : _Task_state_base<_Res(_Args...)>(__a),

4072

+ _M_impl(std::forward<_Fn2>(__fn), __a)

4073

+ { }

4074

4075

private:

4076

virtual void

4077

@@ -1292,19 +1294,21 @@

4078

4079

struct _Impl : _Alloc

4080

{

4081

- _Impl(_Fn&& __fn, const _Alloc& __a)

4082

- : _Alloc(__a), _M_fn(std::move(__fn)) { }

4083

+ template<typename _Fn2>

4084

+ _Impl(_Fn2&& __fn, const _Alloc& __a)

4085

+ : _Alloc(__a), _M_fn(std::forward<_Fn2>(__fn)) { }

4086

_Fn _M_fn;

4087

} _M_impl;

4088

};

4089

4090

- template<typename _Signature, typename _Fn, typename _Alloc>

4091

- static shared_ptr<__future_base::_Task_state_base<_Signature>>

4092

- __create_task_state(_Fn&& __fn, const _Alloc& __a)

4093

- {

4094

- typedef __future_base::_Task_state<_Fn, _Alloc, _Signature> _State;

4095

- return std::allocate_shared<_State>(__a, std::move(__fn), __a);

4096

- }

4097

+ template<typename _Signature, typename _Fn, typename _Alloc>

4098

+ static shared_ptr<__future_base::_Task_state_base<_Signature>>

4099

+ __create_task_state(_Fn&& __fn, const _Alloc& __a)

4100

+ {

4101

+ typedef typename decay<_Fn>::type _Fn2;

4102

+ typedef __future_base::_Task_state<_Fn2, _Alloc, _Signature> _State;

4103

+ return std::allocate_shared<_State>(__a, std::forward<_Fn>(__fn), __a);

4104

+ }

4105

4106

template<typename _Fn, typename _Alloc, typename _Res, typename... _Args>

4107

shared_ptr<__future_base::_Task_state_base<_Res(_Args...)>>

4108

@@ -1344,7 +1348,8 @@

4109

__constrain_pkgdtask<packaged_task, _Fn>::__type>

4110

explicit

4111

packaged_task(_Fn&& __fn)

4112

- : packaged_task(allocator_arg, std::allocator<int>(), std::move(__fn))

4113

+ : packaged_task(allocator_arg, std::allocator<int>(),

4114

+ std::forward<_Fn>(__fn))

4115

{ }

4116

4117

// _GLIBCXX_RESOLVE_LIB_DEFECTS

4118

Index: libstdc++-v3/include/std/functional

4119

===================================================================

4120

--- a/src/libstdc++-v3/include/std/functional (.../tags/gcc_4_8_2_release)

4121

+++ b/src/libstdc++-v3/include/std/functional (.../branches/gcc-4_8-branch)

4122

@@ -2181,8 +2181,15 @@

4123

using _Invoke = decltype(__callable_functor(std::declval<_Functor&>())

4124

(std::declval<_ArgTypes>()...) );

4125

4126

+ // Used so the return type convertibility checks aren't done when

4127

+ // performing overload resolution for copy construction/assignment.

4128

+ template<typename _Tp>

4129

+ using _NotSelf = __not_<is_same<_Tp, function>>;

4130

+

4131

template<typename _Functor>

4132

- using _Callable = __check_func_return_type<_Invoke<_Functor>, _Res>;

4133

+ using _Callable

4134

+ = __and_<_NotSelf<_Functor>,

4135

+ __check_func_return_type<_Invoke<_Functor>, _Res>>;

4136

4137

template<typename _Cond, typename _Tp>

4138

using _Requires = typename enable_if<_Cond::value, _Tp>::type;

4139

@@ -2323,7 +2330,7 @@

4140

* reference_wrapper<F>, this function will not throw.

4141

*/

4142

template<typename _Functor>

4143

- _Requires<_Callable<_Functor>, function&>

4144

+ _Requires<_Callable<typename decay<_Functor>::type>, function&>

4145

operator=(_Functor&& __f)

4146

{

4147

function(std::forward<_Functor>(__f)).swap(*this);

4148

Index: libstdc++-v3/include/bits/atomic_base.h

4149

===================================================================

4150

--- a/src/libstdc++-v3/include/bits/atomic_base.h (.../tags/gcc_4_8_2_release)

4151

+++ b/src/libstdc++-v3/include/bits/atomic_base.h (.../branches/gcc-4_8-branch)

4152

@@ -764,11 +764,11 @@

4153

4154

bool

4155

is_lock_free() const noexcept

4156

- { return __atomic_is_lock_free(_M_type_size(1), nullptr); }

4157

+ { return __atomic_is_lock_free(sizeof(__pointer_type), nullptr); }

4158

4159

bool

4160

is_lock_free() const volatile noexcept

4161

- { return __atomic_is_lock_free(_M_type_size(1), nullptr); }

4162

+ { return __atomic_is_lock_free(sizeof(__pointer_type), nullptr); }

4163

4164

void

4165

store(__pointer_type __p,

4166

Index: libstdc++-v3/include/bits/stl_vector.h

4167

===================================================================

4168

--- a/src/libstdc++-v3/include/bits/stl_vector.h (.../tags/gcc_4_8_2_release)

4169

+++ b/src/libstdc++-v3/include/bits/stl_vector.h (.../branches/gcc-4_8-branch)

4170

@@ -1361,7 +1361,8 @@

4171

void

4172

_M_move_assign(vector&& __x, std::true_type) noexcept

4173

{

4174

- const vector __tmp(std::move(*this));

4175

+ vector __tmp(get_allocator());

4176

+ this->_M_impl._M_swap_data(__tmp._M_impl);

4177

this->_M_impl._M_swap_data(__x._M_impl);

4178

if (_Alloc_traits::_S_propagate_on_move_assign())

4179

std::__alloc_on_move(_M_get_Tp_allocator(),

4180

Index: libstdc++-v3/include/bits/stl_algo.h

4181

===================================================================

4182

--- a/src/libstdc++-v3/include/bits/stl_algo.h (.../tags/gcc_4_8_2_release)

4183

+++ b/src/libstdc++-v3/include/bits/stl_algo.h (.../branches/gcc-4_8-branch)

4184

@@ -2279,7 +2279,7 @@

4185

_RandomAccessIterator __last)

4186

{

4187

_RandomAccessIterator __mid = __first + (__last - __first) / 2;

4188

- std::__move_median_to_first(__first, __first + 1, __mid, (__last - 2));

4189

+ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1);

4190

return std::__unguarded_partition(__first + 1, __last, *__first);

4191

}

4192

4193

@@ -2291,7 +2291,7 @@

4194

_RandomAccessIterator __last, _Compare __comp)

4195

{

4196

_RandomAccessIterator __mid = __first + (__last - __first) / 2;

4197

- std::__move_median_to_first(__first, __first + 1, __mid, (__last - 2),

4198

+ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1,

4199

__comp);

4200

return std::__unguarded_partition(__first + 1, __last, *__first, __comp);

4201

}

4202

Index: libstdc++-v3/include/bits/shared_ptr_base.h

4203

===================================================================

4204

--- a/src/libstdc++-v3/include/bits/shared_ptr_base.h (.../tags/gcc_4_8_2_release)

4205

+++ b/src/libstdc++-v3/include/bits/shared_ptr_base.h (.../branches/gcc-4_8-branch)

4206

@@ -233,7 +233,7 @@

4207

_M_add_ref_lock()

4208

{

4209

// Perform lock-free add-if-not-zero operation.

4210

- _Atomic_word __count = _M_use_count;

4211

+ _Atomic_word __count = _M_get_use_count();

4212

do

4213

{

4214

if (__count == 0)

4215

@@ -391,7 +391,7 @@

4216

public:

4217

template<typename... _Args>

4218

_Sp_counted_ptr_inplace(_Alloc __a, _Args&&... __args)

4219

- : _M_impl(__a), _M_storage()

4220

+ : _M_impl(__a)

4221

{

4222

_M_impl._M_ptr = static_cast<_Tp*>(static_cast<void*>(&_M_storage));

4223

// _GLIBCXX_RESOLVE_LIB_DEFECTS

4224

@@ -819,7 +819,7 @@

4225

: _M_ptr(__r.get()), _M_refcount()

4226

{

4227

__glibcxx_function_requires(_ConvertibleConcept<_Tp1*, _Tp*>)

4228

- auto __tmp = std::__addressof(*__r.get());

4229

+ auto __tmp = __r.get();

4230

_M_refcount = __shared_count<_Lp>(std::move(__r));

4231

__enable_shared_from_this_helper(_M_refcount, __tmp, __tmp);

4232

}

4233

Index: libstdc++-v3/include/c_global/cstdio

4234

===================================================================

4235

--- a/src/libstdc++-v3/include/c_global/cstdio (.../tags/gcc_4_8_2_release)

4236

+++ b/src/libstdc++-v3/include/c_global/cstdio (.../branches/gcc-4_8-branch)

4237

@@ -69,6 +69,7 @@

4238

#undef ftell

4239

#undef fwrite

4240

#undef getc

4241

+#undef getchar

4242

#undef gets

4243

#undef perror

4244

#undef printf

4245

Index: libstdc++-v3/ChangeLog

4246

===================================================================

4247

--- a/src/libstdc++-v3/ChangeLog (.../tags/gcc_4_8_2_release)

4248

+++ b/src/libstdc++-v3/ChangeLog (.../branches/gcc-4_8-branch)

4249

@@ -1,3 +1,200 @@

4250

+2014-05-08 Joshua Gay <jgay@gnu.org>

4251

+

4252

+ PR libstdc++/61117

4253

+ * doc/xml/faq.xml (faq.license.what_restrictions): Replace "open

4254

+ source" with "free software".

4255

+ * doc/html/faq.html: Likewise.

4256

+

4257

+2014-05-08 Jonathan Wakely <jwakely@redhat.com>

4258

+

4259

+ * include/std/iostream: Fix URL in comment.

4260

+ * src/c++98/ios_init.cc: Fix path in comment.

4261

+

4262

+2014-05-06 Jonathan Wakely <jwakely@redhat.com>

4263

+

4264

+ Backport from mainline

4265

+ 2014-04-15 Jonathan Wakely <jwakely@redhat.com>

4266

+

4267

+ PR libstdc++/60594

4268

+ * include/std/functional (function::_Callable): Exclude own type

4269

+ from the callable checks.

4270

+ * testsuite/20_util/function/60594.cc: New.

4271

+

4272

+2014-04-27 Jonathan Wakely <jwakely@redhat.com>

4273

+

4274

+ PR libstdc++/60497

4275

+ * include/std/tuple (get): Qualify calls to prevent ADL.

4276

+ * testsuite/20_util/tuple/60497.cc: New.

4277

+

4278

+2012-04-05 Dominique d'Humieres <dominiq@lps.ens.fr>

4279

+ Jack Howarth <howarth@bromo.med.uc.edu>

4280

+

4281

+ PR target/54407

4282

+ * 30_threads/condition_variable/54185.cc: Skip for darwin < 11.

4283

+

4284

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

4285

+

4286

+ Backport from mainline

4287

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

4288

+

4289

+ * configure: Regenerate.

4290

+

4291

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

4292

+

4293

+ Backport from mainline r204808:

4294

+

4295

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

4296

+

4297

+ * scripts/extract_symvers.in: Ignore <localentry: > fields

4298

+ in readelf --symbols output.

4299

+

4300

+2014-03-26 Jonathan Wakely <jwakely@redhat.com>

4301

+

4302

+ PR libstdc++/59548

4303

+ * include/debug/safe_unordered_base.h (_Safe_unordered_container_base):

4304

+ Define copy and move constructors that handle iterators correctly.

4305

+ * testsuite/23_containers/unordered_map/59548.cc: New.

4306

+

4307

+2014-03-25 Jonathan Wakely <jwakely@redhat.com>

4308

+

4309

+ PR libstdc++/60658

4310

+ * include/bits/atomic_base.h (__atomic_base<_PTp*>::is_lock_free()):

4311

+ Use sizeof pointer type not the element type.

4312

+ * testsuite/29_atomics/atomic/60658.cc: New.

4313

+

4314

+2014-03-18 Jonathan Wakely <jwakely@redhat.com>

4315

+

4316

+ PR libstdc++/60564

4317

+ * include/std/future (__future_base::_Task_state<>): Change

4318

+ constructors to template functions using perfect forwarding.

4319

+ (__create_task_state): Use decayed type as stored task.

4320

+ (packaged_task::packaged_task(_Fn&&)): Forward instead of moving.

4321

+ * testsuite/30_threads/packaged_task/60564.cc: New.

4322

+

4323

+2014-03-12 Roland McGrath <mcgrathr@google.com>

4324

+ Mark Seaborn <mseaborn@google.com>

4325

+

4326

+ PR libstdc++/59392

4327

+ * libsupc++/eh_call.cc (__cxa_call_unexpected): Call __do_catch with

4328

+ the address of a null pointer, not with a null pointer to pointer.

4329

+ Copy comment for this case from eh_personality.cc:__cxa_call_unexpected.

4330

+ * testsuite/18_support/bad_exception/59392.cc: New file.

4331

+

4332

+2014-03-11 Jonathan Wakely <jwakely@redhat.com>

4333

+

4334

+ Backport from mainline.

4335

+ 2014-01-09 Jonathan Wakely <jwakely@redhat.com>

4336

+

4337

+ PR libstdc++/59680

4338

+ * src/c++11/thread.cc (__sleep_for): Fix call to ::sleep.

4339

+

4340

+2014-03-11 Jonathan Wakely <jwakely@redhat.com>

4341

+

4342

+ Backport from mainline.

4343

+ 2014-01-27 Jonathan Wakely <jwakely@redhat.com>

4344

+

4345

+ PR libstdc++/59215

4346

+ * include/bits/shared_ptr_base.h

4347

+ (_Sp_counted_base<_S_atomic>::_M_add_ref_lock()): Use relaxed atomic

4348

+ load.

4349

+

4350

+2014-03-11 Jonathan Wakely <jwakely@redhat.com>

4351

+

4352

+ Backport from mainline.

4353

+

4354

+ 2014-01-09 Jonathan Wakely <jwakely@redhat.com>

4355

+

4356

+ PR libstdc++/59738

4357

+ * include/bits/stl_vector.h (vector<>::_M_move_assign): Restore

4358

+ support for non-Movable types.

4359

+

4360

+ 2014-01-08 François Dumont <fdumont@gcc.gnu.org>

4361

+

4362

+ * include/bits/stl_vector.h (std::vector<>::_M_move_assign): Pass

4363

+ *this allocator instance when building temporary vector instance

4364

+ so that *this allocator does not get moved.

4365

+ * testsuite/23_containers/vector/allocator/move.cc (test01): Add

4366

+ check on a vector iterator.

4367

+ * testsuite/23_containers/vector/allocator/move_assign.cc

4368

+ (test02): Likewise.

4369

+ (test03): New, test with a non-propagating allocator.

4370

+

4371

+ 2013-11-15 Jonathan Wakely <jwakely.gcc@gmail.com>

4372

+

4373

+ * testsuite/23_containers/vector/allocator/move.cc: New

4374

+

4375

+2014-01-27 Jason Merrill <jason@redhat.com>

4376

+

4377

+ Core DR 475

4378

+ PR c++/41174

4379

+ PR c++/59224

4380

+ * libsupc++/eh_throw.cc (__cxa_throw): Set uncaughtExceptions.

4381

+ * libsupc++/eh_alloc.cc (__cxa_allocate_dependent_exception)

4382

+ (__cxa_allocate_exception): Don't set it here.

4383

+

4384

+2013-12-15 H.J. Lu <hongjiu.lu@intel.com>

4385

+

4386

+ * config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Update.

4387

+

4388

+2013-11-22 Jonathan Wakely <jwakely.gcc@gmail.com>

4389

+

4390

+ * acinclude.m4 (libtool_VERSION): Bump.

4391

+ * configure: Regenerate.

4392

+ * doc/xml/manual/abi.xml: Update version information.

4393

+

4394

+2013-11-05 Jonathan Wakely <jwakely.gcc@gmail.com>

4395

+

4396

+ * doc/xml/manual/status_cxx2011.xml: Document aligned_union as

4397

+ missing.

4398

+

4399

+ * doc/xml/manual/spine.xml: Update copyright years.

4400

+ * doc/html/*: Regenerate.

4401

+

4402

+2013-11-01 Paolo Carlini <paolo.carlini@oracle.com>

4403

+

4404

+ PR libstdc++/58952

4405

+ * include/c_global/cstdio: Undef getchar.

4406

+

4407

+2013-10-31 Jonathan Wakely <jwakely.gcc@gmail.com>

4408

+

4409

+ * testsuite/20_util/shared_ptr/cons/58839.cc: Do not use

4410

+ default_delete<void>.

4411

+

4412

+2013-10-30 Chris Studholme <cvs@cs.utoronto.ca>

4413

+

4414

+ PR libstdc++/58912

4415

+ * include/bits/shared_ptr_base.h (_Sp_counted_ptr_inplace): Remove

4416

+ unnecessary initialization of storage buffer.

4417

+

4418

+2013-10-29 Jonathan Wakely <jwakely.gcc@gmail.com>

4419

+

4420

+ PR libstdc++/58839

4421

+ * include/bits/shared_ptr_base.h

4422

+ (__shared_ptr<T>::__shared_ptr(unique_ptr<U,D>&&)): Do not dereference

4423

+ pointer.

4424

+ * testsuite/20_util/shared_ptr/cons/58839.cc: New.

4425

+

4426

+2013-10-20 Chris Jefferson <chris@bubblescope.net>

4427

+ Paolo Carlini <paolo.carlini@oracle.com>

4428

+

4429

+ PR libstdc++/58800

4430

+ * include/bits/stl_algo.h (__unguarded_partition_pivot): Change

4431

+ __last - 2 to __last - 1.

4432

+ * testsuite/25_algorithms/nth_element/58800.cc: New

4433

+

4434

+2013-10-16 François Dumont <fdumont@gcc.gnu.org>

4435

+

4436

+ PR libstdc++/58191

4437

+ * include/debug/macros.h (__glibcxx_check_partitioned_lower): Add

4438

+ __gnu_debug::__base calls on iterators passed to internal debug

4439

+ check.

4440

+ (__glibcxx_check_partitioned_lower_pred): Likewise.

4441

+ (__glibcxx_check_partitioned_upper): Likewise.

4442

+ (__glibcxx_check_partitioned_upper_pred): Likewise.

4443

+ * include/debug/functions.h (__check_partitioned_lower):

4444

+ Remove code to detect safe iterators.

4445

+ (__check_partitioned_upper): Likewise.

4446

+

4447

2013-10-16 Release Manager

4448

4449

* GCC 4.8.2 released.

4450

Index: libstdc++-v3/libsupc++/eh_call.cc

4451

===================================================================

4452

--- a/src/libstdc++-v3/libsupc++/eh_call.cc (.../tags/gcc_4_8_2_release)

4453

+++ b/src/libstdc++-v3/libsupc++/eh_call.cc (.../branches/gcc-4_8-branch)

4454

@@ -104,14 +104,14 @@

4455

} end_catch_protect_obj;

4456

4457

4458

- __try

4459

- {

4460

+ __try

4461

+ {

4462

if (foreign_exception)

4463

std::unexpected();

4464

else

4465

__unexpected(unexpectedHandler);

4466

}

4467

- __catch(...)

4468

+ __catch(...)

4469

{

4470

/* See if the new exception matches the rtti list. */

4471

if (foreign_exception)

4472

@@ -140,15 +140,19 @@

4473

&new_ptr) != ctm_failed)

4474

__throw_exception_again;

4475

4476

- if (catch_type->__do_catch(&bad_exc, 0, 1))

4477

+ // If the exception spec allows std::bad_exception, throw that.

4478

+ // We don't have a thrown object to compare against, but since

4479

+ // bad_exception doesn't have virtual bases, that's OK; just pass NULL.

4480

+ void* obj = NULL;

4481

+ if (catch_type->__do_catch(&bad_exc, &obj, 1))

4482

bad_exception_allowed = true;

4483

}

4484

4485

// If the exception spec allows std::bad_exception, throw that.

4486

-#ifdef __EXCEPTIONS

4487

+#ifdef __EXCEPTIONS

4488

if (bad_exception_allowed)

4489

throw std::bad_exception();

4490

-#endif

4491

+#endif

4492

4493

// Otherwise, die.

4494

__terminate(terminateHandler);

4495

Index: libstdc++-v3/libsupc++/eh_alloc.cc

4496

===================================================================

4497

--- a/src/libstdc++-v3/libsupc++/eh_alloc.cc (.../tags/gcc_4_8_2_release)

4498

+++ b/src/libstdc++-v3/libsupc++/eh_alloc.cc (.../branches/gcc-4_8-branch)

4499

@@ -129,12 +129,6 @@

4500

std::terminate ();

4501

}

4502

4503

- // We have an uncaught exception as soon as we allocate memory. This

4504

- // yields uncaught_exception() true during the copy-constructor that

4505

- // initializes the exception object. See Issue 475.

4506

- __cxa_eh_globals *globals = __cxa_get_globals ();

4507

- globals->uncaughtExceptions += 1;

4508

-

4509

memset (ret, 0, sizeof (__cxa_refcounted_exception));

4510

4511

return (void *)((char *)ret + sizeof (__cxa_refcounted_exception));

4512

@@ -191,12 +185,6 @@

4513

std::terminate ();

4514

}

4515

4516

- // We have an uncaught exception as soon as we allocate memory. This

4517

- // yields uncaught_exception() true during the copy-constructor that

4518

- // initializes the exception object. See Issue 475.

4519

- __cxa_eh_globals *globals = __cxa_get_globals ();

4520

- globals->uncaughtExceptions += 1;

4521

-

4522

memset (ret, 0, sizeof (__cxa_dependent_exception));

4523

4524

return ret;

4525

Index: libstdc++-v3/libsupc++/eh_throw.cc

4526

===================================================================

4527

--- a/src/libstdc++-v3/libsupc++/eh_throw.cc (.../tags/gcc_4_8_2_release)

4528

+++ b/src/libstdc++-v3/libsupc++/eh_throw.cc (.../branches/gcc-4_8-branch)

4529

@@ -62,6 +62,9 @@

4530

{

4531

PROBE2 (throw, obj, tinfo);

4532

4533

+ __cxa_eh_globals *globals = __cxa_get_globals ();

4534

+ globals->uncaughtExceptions += 1;

4535

+

4536

// Definitely a primary.

4537

__cxa_refcounted_exception *header

4538

= __get_refcounted_exception_header_from_obj (obj);

4539

Index: libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc

4540

===================================================================

4541

--- a/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc (.../tags/gcc_4_8_2_release)

4542

+++ b/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc (.../branches/gcc-4_8-branch)

4543

@@ -0,0 +1,52 @@

4544

4545

+//

4546

+// This file is part of the GNU ISO C++ Library. This library is free

4547

+// software; you can redistribute it and/or modify it under the

4548

+// terms of the GNU General Public License as published by the

4549

+// Free Software Foundation; either version 3, or (at your option)

4550

+// any later version.

4551

+

4552

+// This library is distributed in the hope that it will be useful,

4553

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4554

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4555

+// GNU General Public License for more details.

4556

+

4557

+// You should have received a copy of the GNU General Public License along

4558

+// with this library; see the file COPYING3. If not see

4559

+// <http://www.gnu.org/licenses/>.

4560

+

4561

+// 25.3.2 [lib.alg.nth.element]

4562

+

4563

+// { dg-options "-std=gnu++11" }

4564

+

4565

+#include <algorithm>

4566

+#include <testsuite_hooks.h>

4567

+#include <testsuite_iterators.h>

4568

+

4569

+using __gnu_test::test_container;

4570

+using __gnu_test::random_access_iterator_wrapper;

4571

+

4572

+typedef test_container<int, random_access_iterator_wrapper> Container;

4573

+

4574

+void test01()

4575

+{

4576

+ std::vector<int> v = {

4577

+ 207089,

4578

+ 202585,

4579

+ 180067,

4580

+ 157549,

4581

+ 211592,

4582

+ 216096,

4583

+ 207089

4584

+ };

4585

+

4586

+ Container con(v.data(), v.data() + 7);

4587

+

4588

+ std::nth_element(con.begin(), con.begin() + 3, con.end());

4589

+}

4590

+

4591

+int main()

4592

+{

4593

+ test01();

4594

+ return 0;

4595

+}

4596

Index: libstdc++-v3/testsuite/18_support/bad_exception/59392.cc

4597

===================================================================

4598

--- a/src/libstdc++-v3/testsuite/18_support/bad_exception/59392.cc (.../tags/gcc_4_8_2_release)

4599

+++ b/src/libstdc++-v3/testsuite/18_support/bad_exception/59392.cc (.../branches/gcc-4_8-branch)

4600

@@ -0,0 +1,51 @@

4601

4602

+//

4603

+// This file is part of the GNU ISO C++ Library. This library is free

4604

+// software; you can redistribute it and/or modify it under the

4605

+// terms of the GNU General Public License as published by the

4606

+// Free Software Foundation; either version 3, or (at your option)

4607

+// any later version.

4608

+

4609

+// This library is distributed in the hope that it will be useful,

4610

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4611

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4612

+// GNU General Public License for more details.

4613

+

4614

+// You should have received a copy of the GNU General Public License along

4615

+// with this library; see the file COPYING3. If not see

4616

+// <http://www.gnu.org/licenses/>.

4617

+

4618

+#include <exception>

4619

+#include <cstdlib>

4620

+

4621

+class expected {};

4622

+class unexpected {};

4623

+class from_handler {};

4624

+

4625

+static void func_with_exception_spec() throw(expected)

4626

+{

4627

+ throw unexpected();

4628

+}

4629

+

4630

+static void unexpected_handler()

4631

+{

4632

+ throw from_handler();

4633

+}

4634

+

4635

+static void terminate_handler()

4636

+{

4637

+ exit(0);

4638

+}

4639

+

4640

+// libstdc++/59392

4641

+int main()

4642

+{

4643

+ std::set_unexpected(unexpected_handler);

4644

+ std::set_terminate(terminate_handler);

4645

+ try {

4646

+ func_with_exception_spec();

4647

+ } catch (expected&) {

4648

+ abort();

4649

+ }

4650

+ abort();

4651

+}

4652

4653

Property changes on: libstdc++-v3/testsuite/18_support/bad_exception/59392.cc

4654

___________________________________________________________________

4655

Added: svn:eol-style

4656

## -0,0 +1 ##

4657

+LF

4658

\ No newline at end of property

4659

Index: libstdc++-v3/testsuite/30_threads/packaged_task/60564.cc

4660

===================================================================

4661

--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/60564.cc (.../tags/gcc_4_8_2_release)

4662

+++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/60564.cc (.../branches/gcc-4_8-branch)

4663

@@ -0,0 +1,51 @@

4664

+// { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } }

4665

+// { dg-options " -std=gnu++11 -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* powerpc-ibm-aix* } }

4666

+// { dg-options " -std=gnu++11 -pthreads" { target *-*-solaris* } }

4667

+// { dg-options " -std=gnu++11 " { target *-*-cygwin *-*-darwin* } }

4668

+// { dg-require-cstdint "" }

4669

+// { dg-require-gthreads "" }

4670

+// { dg-require-atomic-builtins "" }

4671

+

4672

4673

+//

4674

+// This file is part of the GNU ISO C++ Library. This library is free

4675

+// software; you can redistribute it and/or modify it under the

4676

+// terms of the GNU General Public License as published by the

4677

+// Free Software Foundation; either version 3, or (at your option)

4678

+// any later version.

4679

+

4680

+// This library is distributed in the hope that it will be useful,

4681

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4682

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4683

+// GNU General Public License for more details.

4684

+

4685

+// You should have received a copy of the GNU General Public License along

4686

+// with this library; see the file COPYING3. If not see

4687

+// <http://www.gnu.org/licenses/>.

4688

+

4689

+

4690

+#include <future>

4691

+#include <testsuite_hooks.h>

4692

+

4693

+struct X

4694

+{

4695

+ X() = default;

4696

+ X(const X&) = default;

4697

+ X(X&& x) { x.moved = true; }

4698

+

4699

+ void operator()() const { }

4700

+

4701

+ bool moved = false;

4702

+};

4703

+

4704

+void test01()

4705

+{

4706

+ X x;

4707

+ std::packaged_task<void()> p(x);

4708

+ VERIFY( !x.moved );

4709

+}

4710

+

4711

+int main()

4712

+{

4713

+ test01();

4714

+}

4715

Index: libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc

4716

===================================================================

4717

--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc (.../tags/gcc_4_8_2_release)

4718

+++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/54185.cc (.../branches/gcc-4_8-branch)

4719

@@ -1,11 +1,11 @@

4720

-// { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } }

4721

-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } }

4722

+// { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* *-*-solaris* *-*-cygwin *-*-darwin1[1-9]* powerpc-ibm-aix* } }

4723

+// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-gnu* powerpc-ibm-aix* } }

4724

// { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } }

4725

// { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } }

4726

// { dg-require-cstdint "" }

4727

// { dg-require-gthreads "" }

4728

4729

4730

4731

//

4732

// This file is part of the GNU ISO C++ Library. This library is free

4733

// software; you can redistribute it and/or modify it under the

4734

Index: libstdc++-v3/testsuite/29_atomics/atomic/60658.cc

4735

===================================================================

4736

--- a/src/libstdc++-v3/testsuite/29_atomics/atomic/60658.cc (.../tags/gcc_4_8_2_release)

4737

+++ b/src/libstdc++-v3/testsuite/29_atomics/atomic/60658.cc (.../branches/gcc-4_8-branch)

4738

@@ -0,0 +1,43 @@

4739

+// { dg-require-atomic-builtins "" }

4740

+// { dg-options "-std=gnu++11" }

4741

+

4742

4743

+//

4744

+// This file is part of the GNU ISO C++ Library. This library is free

4745

+// software; you can redistribute it and/or modify it under the

4746

+// terms of the GNU General Public License as published by the

4747

+// Free Software Foundation; either version 3, or (at your option)

4748

+// any later version.

4749

+

4750

+// This library is distributed in the hope that it will be useful,

4751

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4752

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4753

+// GNU General Public License for more details.

4754

+

4755

+// You should have received a copy of the GNU General Public License along

4756

+// with this library; see the file COPYING3. If not see

4757

+// <http://www.gnu.org/licenses/>.

4758

+

4759

+#include <atomic>

4760

+#include <testsuite_hooks.h>

4761

+

4762

+// libstdc++/60658

4763

+

4764

+struct Foo {

4765

+ char buf[1];

4766

+};

4767

+

4768

+struct Bar {

4769

+ char buf[100];

4770

+};

4771

+

4772

+int

4773

+main ()

4774

+{

4775

+ bool test __attribute__((unused)) = true;

4776

+

4777

+ std::atomic<Foo*> a;

4778

+ std::atomic<Bar*> b;

4779

+

4780

+ VERIFY (a.is_lock_free() == b.is_lock_free());

4781

+}

4782

Index: libstdc++-v3/testsuite/23_containers/unordered_map/59548.cc

4783

===================================================================

4784

--- a/src/libstdc++-v3/testsuite/23_containers/unordered_map/59548.cc (.../tags/gcc_4_8_2_release)

4785

+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_map/59548.cc (.../branches/gcc-4_8-branch)

4786

@@ -0,0 +1,34 @@

4787

+// { dg-options "-std=gnu++11" }

4788

+// { dg-do compile }

4789

+// { dg-require-debug-mode "" }

4790

+

4791

4792

+//

4793

+// This file is part of the GNU ISO C++ Library. This library is free

4794

+// software; you can redistribute it and/or modify it under the

4795

+// terms of the GNU General Public License as published by the

4796

+// Free Software Foundation; either version 3, or (at your option)

4797

+// any later version.

4798

+

4799

+// This library is distributed in the hope that it will be useful,

4800

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4801

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4802

+// GNU General Public License for more details.

4803

+

4804

+// You should have received a copy of the GNU General Public License along

4805

+// with this library; see the file COPYING3. If not see

4806

+// <http://www.gnu.org/licenses/>.

4807

+

4808

+// libstdc++/59548

4809

+

4810

+#include <unordered_map>

4811

+

4812

+int main()

4813

+{

4814

+ std::unordered_map<int,int> foo{ {0,1} };

4815

+ auto i = foo.begin();

4816

+ {

4817

+ auto bar = foo;

4818

+ }

4819

+ return i->first;

4820

+}

4821

Index: libstdc++-v3/testsuite/23_containers/vector/allocator/move.cc

4822

===================================================================

4823

--- a/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move.cc (.../tags/gcc_4_8_2_release)

4824

+++ b/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move.cc (.../branches/gcc-4_8-branch)

4825

@@ -0,0 +1,59 @@

4826

4827

+//

4828

+// This file is part of the GNU ISO C++ Library. This library is free

4829

+// software; you can redistribute it and/or modify it under the

4830

+// terms of the GNU General Public License as published by the

4831

+// Free Software Foundation; either version 3, or (at your option)

4832

+// any later version.

4833

+

4834

+// This library is distributed in the hope that it will be useful,

4835

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4836

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4837

+// GNU General Public License for more details.

4838

+

4839

+// You should have received a copy of the GNU General Public License along

4840

+// with this library; see the file COPYING3. If not see

4841

+// <http://www.gnu.org/licenses/>.

4842

+

4843

+// { dg-options "-std=gnu++11" }

4844

+

4845

+#include <vector>

4846

+#include <testsuite_hooks.h>

4847

+#include <testsuite_allocator.h>

4848

+

4849

+struct T { int i; };

4850

+

4851

+using __gnu_test::uneq_allocator;

4852

+

4853

+void test01()

4854

+{

4855

+ bool test __attribute__((unused)) = true;

4856

+ typedef uneq_allocator<T> alloc_type;

4857

+ typedef std::vector<T, alloc_type> test_type;

4858

+ test_type v1(alloc_type(1));

4859

+ v1 = { T() };

4860

+ auto it = v1.begin();

4861

+ test_type v2(std::move(v1));

4862

+ VERIFY(1 == v1.get_allocator().get_personality());

4863

+ VERIFY(1 == v2.get_allocator().get_personality());

4864

+ VERIFY( it == v2.begin() );

4865

+}

4866

+

4867

+void test02()

4868

+{

4869

+ bool test __attribute__((unused)) = true;

4870

+ typedef uneq_allocator<T> alloc_type;

4871

+ typedef std::vector<T, alloc_type> test_type;

4872

+ test_type v1(alloc_type(1));

4873

+ v1 = { T() };

4874

+ test_type v2(std::move(v1), alloc_type(2));

4875

+ VERIFY(1 == v1.get_allocator().get_personality());

4876

+ VERIFY(2 == v2.get_allocator().get_personality());

4877

+}

4878

+

4879

+int main()

4880

+{

4881

+ test01();

4882

+ test02();

4883

+ return 0;

4884

+}

4885

Index: libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc

4886

===================================================================

4887

--- a/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc (.../tags/gcc_4_8_2_release)

4888

+++ b/src/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc (.../branches/gcc-4_8-branch)

4889

@@ -46,16 +46,35 @@

4890

typedef std::vector<T, alloc_type> test_type;

4891

test_type v1(alloc_type(1));

4892

v1.push_back(T());

4893

+ auto it = v1.begin();

4894

test_type v2(alloc_type(2));

4895

+ v2.push_back(T());

4896

v2 = std::move(v1);

4897

- v2.push_back(T());

4898

+ VERIFY( it == v2.begin() );

4899

VERIFY(0 == v1.get_allocator().get_personality());

4900

VERIFY(1 == v2.get_allocator().get_personality());

4901

}

4902

4903

+void test03()

4904

+{

4905

+ bool test __attribute__((unused)) = true;

4906

+ typedef propagating_allocator<T, false> alloc_type;

4907

+ typedef std::vector<T, alloc_type> test_type;

4908

+ test_type v1(alloc_type(1));

4909

+ v1.push_back(T());

4910

+ auto it = v1.begin();

4911

+ test_type v2(alloc_type(1));

4912

+ v2.push_back(T());

4913

+ v2 = std::move(v1);

4914

+ VERIFY( it == v2.begin() );

4915

+ VERIFY(1 == v1.get_allocator().get_personality());

4916

+ VERIFY(1 == v2.get_allocator().get_personality());

4917

+}

4918

+

4919

int main()

4920

{

4921

test01();

4922

test02();

4923

+ test03();

4924

return 0;

4925

}

4926

Index: libstdc++-v3/testsuite/20_util/tuple/60497.cc

4927

===================================================================

4928

--- a/src/libstdc++-v3/testsuite/20_util/tuple/60497.cc (.../tags/gcc_4_8_2_release)

4929

+++ b/src/libstdc++-v3/testsuite/20_util/tuple/60497.cc (.../branches/gcc-4_8-branch)

4930

@@ -0,0 +1,35 @@

4931

+// { dg-options "-std=gnu++11" }

4932

+// { dg-do compile }

4933

+

4934

4935

+//

4936

+// This file is part of the GNU ISO C++ Library. This library is free

4937

+// software; you can redistribute it and/or modify it under the

4938

+// terms of the GNU General Public License as published by the

4939

+// Free Software Foundation; either version 3, or (at your option)

4940

+// any later version.

4941

+

4942

+// This library is distributed in the hope that it will be useful,

4943

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4944

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4945

+// GNU General Public License for more details.

4946

+

4947

+// You should have received a copy of the GNU General Public License along

4948

+// with this library; see the file COPYING3. If not see

4949

+// <http://www.gnu.org/licenses/>.

4950

+

4951

+// libstdc++/60497

4952

+

4953

+#include <tuple>

4954

+

4955

+struct A;

4956

+template<typename T> struct B { T t; };

4957

+

4958

+using element_type = B<A>*;

4959

+using tuple_type = std::tuple<element_type>;

4960

+

4961

+tuple_type t;

4962

+const tuple_type ct;

4963

+

4964

+auto a = std::get<0>(t);

4965

+auto b = std::get<0>(ct);

4966

Index: libstdc++-v3/testsuite/20_util/shared_ptr/cons/58839.cc

4967

===================================================================

4968

--- a/src/libstdc++-v3/testsuite/20_util/shared_ptr/cons/58839.cc (.../tags/gcc_4_8_2_release)

4969

+++ b/src/libstdc++-v3/testsuite/20_util/shared_ptr/cons/58839.cc (.../branches/gcc-4_8-branch)

4970

@@ -0,0 +1,33 @@

4971

+// { dg-options "-std=gnu++11" }

4972

+// { dg-do compile }

4973

+

4974

4975

+//

4976

+// This file is part of the GNU ISO C++ Library. This library is free

4977

+// software; you can redistribute it and/or modify it under the

4978

+// terms of the GNU General Public License as published by the

4979

+// Free Software Foundation; either version 3, or (at your option)

4980

+// any later version.

4981

+

4982

+// This library is distributed in the hope that it will be useful,

4983

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

4984

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

4985

+// GNU General Public License for more details.

4986

+

4987

+// You should have received a copy of the GNU General Public License along

4988

+// with this library; see the file COPYING3. If not see

4989

+// <http://www.gnu.org/licenses/>.

4990

+

4991

+#include <memory>

4992

+

4993

+// libstdc++/58839

4994

+

4995

+struct D {

4996

+ void operator()(void*) const noexcept { }

4997

+};

4998

+

4999

+void test01()

5000

+{

5001

+ std::unique_ptr<void, D> y;

5002

+ std::shared_ptr<void> x = std::move(y);

5003

+}

5004

Index: libstdc++-v3/testsuite/20_util/function/60594.cc

5005

===================================================================

5006

--- a/src/libstdc++-v3/testsuite/20_util/function/60594.cc (.../tags/gcc_4_8_2_release)

5007

+++ b/src/libstdc++-v3/testsuite/20_util/function/60594.cc (.../branches/gcc-4_8-branch)

5008

@@ -0,0 +1,36 @@

5009

+// { dg-options "-std=gnu++11" }

5010

+// { dg-do compile }

5011

+

5012

5013

+//

5014

+// This file is part of the GNU ISO C++ Library. This library is free

5015

+// software; you can redistribute it and/or modify it under the

5016

+// terms of the GNU General Public License as published by the

5017

+// Free Software Foundation; either version 3, or (at your option)

5018

+// any later version.

5019

+//

5020

+// This library is distributed in the hope that it will be useful,

5021

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

5022

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

5023

+// GNU General Public License for more details.

5024

+//

5025

+// You should have received a copy of the GNU General Public License along

5026

+// with this library; see the file COPYING3. If not see

5027

+// <http://www.gnu.org/licenses/>.

5028

+

5029

+// libstdc++/60594

5030

+

5031

+#include <functional>

5032

+#include <type_traits>

5033

+struct bar;

5034

+using F = std::function<bar()>;

5035

+// check for copy constructible and assignable while 'bar' is incomplete

5036

+constexpr int c = std::is_copy_constructible<F>::value;

5037

+constexpr int a = std::is_copy_assignable<F>::value;

5038

+struct bar { };

5039

+bar func();

5040

+void test()

5041

+{

5042

+ F g{ &func };

5043

+ g = func;

5044

+}

5045

Index: libstdc++-v3/testsuite/20_util/bind/57899.cc

5046

===================================================================

5047

--- a/src/libstdc++-v3/testsuite/20_util/bind/57899.cc (.../tags/gcc_4_8_2_release)

5048

+++ b/src/libstdc++-v3/testsuite/20_util/bind/57899.cc (.../branches/gcc-4_8-branch)

5049

@@ -0,0 +1,48 @@

5050

5051

+//

5052

+// This file is part of the GNU ISO C++ Library. This library is free

5053

+// software; you can redistribute it and/or modify it under the

5054

+// terms of the GNU General Public License as published by the

5055

+// Free Software Foundation; either version 3, or (at your option)

5056

+// any later version.

5057

+

5058

+// This library is distributed in the hope that it will be useful,

5059

+// but WITHOUT ANY WARRANTY; without even the implied warranty of

5060

+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

5061

+// GNU General Public License for more details.

5062

+

5063

+// You should have received a copy of the GNU General Public License along

5064

+// with this library; see the file COPYING3. If not see

5065

+// <http://www.gnu.org/licenses/>.

5066

+

5067

+// 20.7.11 Function template bind

5068

+

5069

+// PR c++/57899

5070

+// { dg-do compile }

5071

+// { dg-options -std=c++11 }

5072

+

5073

+#include <functional>

5074

+using std::bind;

5075

+using std::placeholders::_1;

5076

+

5077

+struct S { int i; };

5078

+

5079

+struct P { S s; };

5080

+

5081

+struct get_s

5082

+{

5083

+ const S& operator()(const P& p) const { return p.s; }

5084

+} gs;

5085

+

5086

+int gi(const S& s) { return s.i; }

5087

+

5088

+bool cmp(int, int) { return true; }

5089

+

5090

+int main()

5091

+{

5092

+ P p{};

5093

+ auto f1 = bind(gs, _1);

5094

+ auto f2 = bind(gi, f1);

5095

+ auto f3 = bind(cmp, f2, 5);

5096

+ f3(p);

5097

+}

5098

Index: libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt

5099

===================================================================

5100

--- a/src/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt (.../tags/gcc_4_8_2_release)

5101

+++ b/src/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt (.../branches/gcc-4_8-branch)

5102

@@ -403,6 +403,7 @@

5103

FUNC:_ZNKSt15basic_streambufIwSt11char_traitsIwEE6getlocEv@@GLIBCXX_3.4

5104

FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4

5105

FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4

5106

+FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18

5107

FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4

5108

FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4

5109

FUNC:_ZNKSt18basic_stringstreamIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4

5110

@@ -590,6 +591,8 @@

5111

FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewm@@GLIBCXX_3.4

5112

FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewx@@GLIBCXX_3.4

5113

FUNC:_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewy@@GLIBCXX_3.4

5114

+FUNC:_ZNKSt8__detail20_Prime_rehash_policy11_M_next_bktEj@@GLIBCXX_3.4.18

5115

+FUNC:_ZNKSt8__detail20_Prime_rehash_policy14_M_need_rehashEjjj@@GLIBCXX_3.4.18

5116

FUNC:_ZNKSt8bad_cast4whatEv@@GLIBCXX_3.4.9

5117

FUNC:_ZNKSt8ios_base7failure4whatEv@@GLIBCXX_3.4

5118

FUNC:_ZNKSt8messagesIcE18_M_convert_to_charERKSs@@GLIBCXX_3.4

5119

@@ -1207,6 +1210,7 @@

5120

FUNC:_ZNSt11regex_errorD0Ev@@GLIBCXX_3.4.15

5121

FUNC:_ZNSt11regex_errorD1Ev@@GLIBCXX_3.4.15

5122

FUNC:_ZNSt11regex_errorD2Ev@@GLIBCXX_3.4.15

5123

+FUNC:_ZNSt11this_thread11__sleep_forENSt6chrono8durationIxSt5ratioILx1ELx1EEEENS1_IxS2_ILx1ELx1000000000EEEE@@GLIBCXX_3.4.18

5124

FUNC:_ZNSt12__basic_fileIcE2fdEv@@GLIBCXX_3.4

5125

FUNC:_ZNSt12__basic_fileIcE4fileEv@@GLIBCXX_3.4.1

5126

FUNC:_ZNSt12__basic_fileIcE4openEPKcSt13_Ios_Openmodei@@GLIBCXX_3.4

5127

@@ -1485,6 +1489,11 @@

5128

FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEt@@GLIBCXX_3.4

5129

FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEx@@GLIBCXX_3.4

5130

FUNC:_ZNSt13basic_ostreamIwSt11char_traitsIwEElsEy@@GLIBCXX_3.4

5131

+FUNC:_ZNSt13random_device14_M_init_pretr1ERKSs@@GLIBCXX_3.4.18

5132

+FUNC:_ZNSt13random_device16_M_getval_pretr1Ev@@GLIBCXX_3.4.18

5133

+FUNC:_ZNSt13random_device7_M_finiEv@@GLIBCXX_3.4.18

5134

+FUNC:_ZNSt13random_device7_M_initERKSs@@GLIBCXX_3.4.18

5135

+FUNC:_ZNSt13random_device9_M_getvalEv@@GLIBCXX_3.4.18

5136

FUNC:_ZNSt13runtime_errorC1ERKSs@@GLIBCXX_3.4

5137

FUNC:_ZNSt13runtime_errorC2ERKSs@@GLIBCXX_3.4

5138

FUNC:_ZNSt13runtime_errorD0Ev@@GLIBCXX_3.4

5139

@@ -1929,6 +1938,8 @@

5140

FUNC:_ZNSt6__norm15_List_node_base8transferEPS0_S1_@@GLIBCXX_3.4.9

5141

FUNC:_ZNSt6__norm15_List_node_base9_M_unhookEv@@GLIBCXX_3.4.14

5142

FUNC:_ZNSt6chrono12system_clock3nowEv@@GLIBCXX_3.4.11

5143

+FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19

5144

+FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19

5145

FUNC:_ZNSt6gslice8_IndexerC1EjRKSt8valarrayIjES4_@@GLIBCXX_3.4

5146

FUNC:_ZNSt6gslice8_IndexerC2EjRKSt8valarrayIjES4_@@GLIBCXX_3.4

5147

FUNC:_ZNSt6locale11_M_coalesceERKS_S1_i@@GLIBCXX_3.4

5148

@@ -2467,6 +2478,7 @@

5149

FUNC:__cxa_guard_release@@CXXABI_1.3

5150

FUNC:__cxa_pure_virtual@@CXXABI_1.3

5151

FUNC:__cxa_rethrow@@CXXABI_1.3

5152

+FUNC:__cxa_thread_atexit@@CXXABI_1.3.7

5153

FUNC:__cxa_throw@@CXXABI_1.3

5154

FUNC:__cxa_tm_cleanup@@CXXABI_TM_1

5155

FUNC:__cxa_vec_cctor@@CXXABI_1.3

5156

@@ -2491,6 +2503,7 @@

5157

OBJECT:0:CXXABI_1.3.4

5158

OBJECT:0:CXXABI_1.3.5

5159

OBJECT:0:CXXABI_1.3.6

5160

+OBJECT:0:CXXABI_1.3.7

5161

OBJECT:0:CXXABI_TM_1

5162

OBJECT:0:GLIBCXX_3.4

5163

OBJECT:0:GLIBCXX_3.4.1

5164

@@ -2502,6 +2515,8 @@

5165

OBJECT:0:GLIBCXX_3.4.15

5166

OBJECT:0:GLIBCXX_3.4.16

5167

OBJECT:0:GLIBCXX_3.4.17

5168

+OBJECT:0:GLIBCXX_3.4.18

5169

+OBJECT:0:GLIBCXX_3.4.19

5170

OBJECT:0:GLIBCXX_3.4.2

5171

OBJECT:0:GLIBCXX_3.4.3

5172

OBJECT:0:GLIBCXX_3.4.4

5173

@@ -3033,6 +3048,8 @@

5174

OBJECT:1:_ZNSt21__numeric_limits_base9is_moduloE@@GLIBCXX_3.4

5175

OBJECT:1:_ZNSt21__numeric_limits_base9is_signedE@@GLIBCXX_3.4

5176

OBJECT:1:_ZNSt6chrono12system_clock12is_monotonicE@@GLIBCXX_3.4.11

5177

+OBJECT:1:_ZNSt6chrono3_V212steady_clock9is_steadyE@@GLIBCXX_3.4.19

5178

+OBJECT:1:_ZNSt6chrono3_V212system_clock9is_steadyE@@GLIBCXX_3.4.19

5179

OBJECT:1:_ZSt10adopt_lock@@GLIBCXX_3.4.11

5180

OBJECT:1:_ZSt10defer_lock@@GLIBCXX_3.4.11

5181

OBJECT:1:_ZSt11try_to_lock@@GLIBCXX_3.4.11

5182

Index: libstdc++-v3/acinclude.m4

5183

===================================================================

5184

--- a/src/libstdc++-v3/acinclude.m4 (.../tags/gcc_4_8_2_release)

5185

+++ b/src/libstdc++-v3/acinclude.m4 (.../branches/gcc-4_8-branch)

5186

@@ -3266,7 +3266,7 @@

5187

fi

5188

5189

# For libtool versioning info, format is CURRENT:REVISION:AGE

5190

-libtool_VERSION=6:18:0

5191

+libtool_VERSION=6:19:0

5192

5193

# Everything parsed; figure out what files and settings to use.

5194

case $enable_symvers in

5195

Index: libmudflap/configure

5196

===================================================================

5197

--- a/src/libmudflap/configure (.../tags/gcc_4_8_2_release)

5198

+++ b/src/libmudflap/configure (.../branches/gcc-4_8-branch)

5199

@@ -6377,7 +6377,7 @@

5200

rm -rf conftest*

5201

;;

5202

5203

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5204

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5205

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5206

# Find out which ABI we are using.

5207

echo 'int i;' > conftest.$ac_ext

5208

@@ -6402,7 +6402,10 @@

5209

;;

5210

esac

5211

;;

5212

- ppc64-*linux*|powerpc64-*linux*)

5213

+ powerpc64le-*linux*)

5214

+ LD="${LD-ld} -m elf32lppclinux"

5215

+ ;;

5216

+ powerpc64-*linux*)

5217

LD="${LD-ld} -m elf32ppclinux"

5218

;;

5219

s390x-*linux*)

5220

@@ -6421,7 +6424,10 @@

5221

x86_64-*linux*)

5222

LD="${LD-ld} -m elf_x86_64"

5223

;;

5224

- ppc*-*linux*|powerpc*-*linux*)

5225

+ powerpcle-*linux*)

5226

+ LD="${LD-ld} -m elf64lppc"

5227

+ ;;

5228

+ powerpc-*linux*)

5229

LD="${LD-ld} -m elf64ppc"

5230

;;

5231

s390*-*linux*|s390*-*tpf*)

5232

@@ -10615,7 +10621,7 @@

5233

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5234

lt_status=$lt_dlunknown

5235

cat > conftest.$ac_ext <<_LT_EOF

5236

-#line 10618 "configure"

5237

+#line 10624 "configure"

5238

#include "confdefs.h"

5239

5240

#if HAVE_DLFCN_H

5241

@@ -10721,7 +10727,7 @@

5242

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5243

lt_status=$lt_dlunknown

5244

cat > conftest.$ac_ext <<_LT_EOF

5245

-#line 10724 "configure"

5246

+#line 10730 "configure"

5247

#include "confdefs.h"

5248

5249

#if HAVE_DLFCN_H

5250

Index: libmudflap/ChangeLog

5251

===================================================================

5252

--- a/src/libmudflap/ChangeLog (.../tags/gcc_4_8_2_release)

5253

+++ b/src/libmudflap/ChangeLog (.../branches/gcc-4_8-branch)

5254

@@ -1,3 +1,10 @@

5255

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5256

+

5257

+ Backport from mainline

5258

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5259

+

5260

+ * configure: Regenerate.

5261

+

5262

2013-10-16 Release Manager

5263

5264

* GCC 4.8.2 released.

5265

Index: boehm-gc/include/private/gcconfig.h

5266

===================================================================

5267

--- a/src/boehm-gc/include/private/gcconfig.h (.../tags/gcc_4_8_2_release)

5268

+++ b/src/boehm-gc/include/private/gcconfig.h (.../branches/gcc-4_8-branch)

5269

@@ -837,7 +837,15 @@

5270

# define NO_PTHREAD_TRYLOCK

5271

# endif

5272

# ifdef FREEBSD

5273

+# if defined(__powerpc64__)

5274

+# define ALIGNMENT 8

5275

+# define CPP_WORDSZ 64

5276

+# ifndef HBLKSIZE

5277

+# define HBLKSIZE 4096

5278

+# endif

5279

+# else

5280

# define ALIGNMENT 4

5281

+# endif

5282

# define OS_TYPE "FREEBSD"

5283

# ifndef GC_FREEBSD_THREADS

5284

# define MPROTECT_VDB

5285

Index: boehm-gc/ChangeLog

5286

===================================================================

5287

--- a/src/boehm-gc/ChangeLog (.../tags/gcc_4_8_2_release)

5288

+++ b/src/boehm-gc/ChangeLog (.../branches/gcc-4_8-branch)

5289

@@ -1,3 +1,15 @@

5290

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5291

+

5292

+ Backport from mainline

5293

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5294

+

5295

+ * configure: Regenerate.

5296

+

5297

+2013-12-29 Andreas Tobler <andreast@gcc.gnu.org>

5298

+

5299

+ Merge from trunk:

5300

+ * include/private/gcconfig.h: Add FreeBSD powerpc64 defines.

5301

+

5302

2013-10-16 Release Manager

5303

5304

* GCC 4.8.2 released.

5305

Index: boehm-gc/configure

5306

===================================================================

5307

--- a/src/boehm-gc/configure (.../tags/gcc_4_8_2_release)

5308

+++ b/src/boehm-gc/configure (.../branches/gcc-4_8-branch)

5309

@@ -6770,7 +6770,7 @@

5310

rm -rf conftest*

5311

;;

5312

5313

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5314

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5315

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5316

# Find out which ABI we are using.

5317

echo 'int i;' > conftest.$ac_ext

5318

@@ -6795,7 +6795,10 @@

5319

;;

5320

esac

5321

;;

5322

- ppc64-*linux*|powerpc64-*linux*)

5323

+ powerpc64le-*linux*)

5324

+ LD="${LD-ld} -m elf32lppclinux"

5325

+ ;;

5326

+ powerpc64-*linux*)

5327

LD="${LD-ld} -m elf32ppclinux"

5328

;;

5329

s390x-*linux*)

5330

@@ -6814,7 +6817,10 @@

5331

x86_64-*linux*)

5332

LD="${LD-ld} -m elf_x86_64"

5333

;;

5334

- ppc*-*linux*|powerpc*-*linux*)

5335

+ powerpcle-*linux*)

5336

+ LD="${LD-ld} -m elf64lppc"

5337

+ ;;

5338

+ powerpc-*linux*)

5339

LD="${LD-ld} -m elf64ppc"

5340

;;

5341

s390*-*linux*|s390*-*tpf*)

5342

@@ -11312,7 +11318,7 @@

5343

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5344

lt_status=$lt_dlunknown

5345

cat > conftest.$ac_ext <<_LT_EOF

5346

-#line 11315 "configure"

5347

+#line 11321 "configure"

5348

#include "confdefs.h"

5349

5350

#if HAVE_DLFCN_H

5351

@@ -11418,7 +11424,7 @@

5352

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5353

lt_status=$lt_dlunknown

5354

cat > conftest.$ac_ext <<_LT_EOF

5355

-#line 11421 "configure"

5356

+#line 11427 "configure"

5357

#include "confdefs.h"

5358

5359

#if HAVE_DLFCN_H

5360

Index: ChangeLog

5361

===================================================================

5362

--- a/src/ChangeLog (.../tags/gcc_4_8_2_release)

5363

+++ b/src/ChangeLog (.../branches/gcc-4_8-branch)

5364

@@ -1,3 +1,21 @@

5365

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5366

+

5367

+ Backport from mainline

5368

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5369

+

5370

+ * libtool.m4: Update to mainline version.

5371

+ * configure: Regenerate.

5372

+

5373

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5374

+

5375

+ Backport from mainline r203071:

5376

+

5377

+ 2013-10-01 Joern Rennecke <joern.rennecke@embecosm.com>

5378

+

5379

+ Import from savannah.gnu.org:

5380

+ * config.guess: Update to 2013-06-10 version.

5381

+ * config.sub: Update to 2013-10-01 version.

5382

+

5383

2013-10-16 Release Manager

5384

5385

* GCC 4.8.2 released.

5386

Index: lto-plugin/configure

5387

===================================================================

5388

--- a/src/lto-plugin/configure (.../tags/gcc_4_8_2_release)

5389

+++ b/src/lto-plugin/configure (.../branches/gcc-4_8-branch)

5390

@@ -6044,7 +6044,7 @@

5391

rm -rf conftest*

5392

;;

5393

5394

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5395

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5396

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5397

# Find out which ABI we are using.

5398

echo 'int i;' > conftest.$ac_ext

5399

@@ -6069,7 +6069,10 @@

5400

;;

5401

esac

5402

;;

5403

- ppc64-*linux*|powerpc64-*linux*)

5404

+ powerpc64le-*linux*)

5405

+ LD="${LD-ld} -m elf32lppclinux"

5406

+ ;;

5407

+ powerpc64-*linux*)

5408

LD="${LD-ld} -m elf32ppclinux"

5409

;;

5410

s390x-*linux*)

5411

@@ -6088,7 +6091,10 @@

5412

x86_64-*linux*)

5413

LD="${LD-ld} -m elf_x86_64"

5414

;;

5415

- ppc*-*linux*|powerpc*-*linux*)

5416

+ powerpcle-*linux*)

5417

+ LD="${LD-ld} -m elf64lppc"

5418

+ ;;

5419

+ powerpc-*linux*)

5420

LD="${LD-ld} -m elf64ppc"

5421

;;

5422

s390*-*linux*|s390*-*tpf*)

5423

@@ -10552,7 +10558,7 @@

5424

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5425

lt_status=$lt_dlunknown

5426

cat > conftest.$ac_ext <<_LT_EOF

5427

-#line 10555 "configure"

5428

+#line 10561 "configure"

5429

#include "confdefs.h"

5430

5431

#if HAVE_DLFCN_H

5432

@@ -10658,7 +10664,7 @@

5433

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5434

lt_status=$lt_dlunknown

5435

cat > conftest.$ac_ext <<_LT_EOF

5436

-#line 10661 "configure"

5437

+#line 10667 "configure"

5438

#include "confdefs.h"

5439

5440

#if HAVE_DLFCN_H

5441

Index: lto-plugin/ChangeLog

5442

===================================================================

5443

--- a/src/lto-plugin/ChangeLog (.../tags/gcc_4_8_2_release)

5444

+++ b/src/lto-plugin/ChangeLog (.../branches/gcc-4_8-branch)

5445

@@ -1,3 +1,10 @@

5446

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5447

+

5448

+ Backport from mainline

5449

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5450

+

5451

+ * configure: Regenerate.

5452

+

5453

2013-10-16 Release Manager

5454

5455

* GCC 4.8.2 released.

5456

Index: contrib/ChangeLog

5457

===================================================================

5458

--- a/src/contrib/ChangeLog (.../tags/gcc_4_8_2_release)

5459

+++ b/src/contrib/ChangeLog (.../branches/gcc-4_8-branch)

5460

@@ -1,3 +1,7 @@

5461

+2013-10-21 Mike Stump <mikestump@comcast.net>

5462

+

5463

+ * gcc_update (configure): Update to handle svn 1.8.1.

5464

+

5465

2013-10-16 Release Manager

5466

5467

* GCC 4.8.2 released.

5468

Index: contrib/gcc_update

5469

===================================================================

5470

--- a/src/contrib/gcc_update (.../tags/gcc_4_8_2_release)

5471

+++ b/src/contrib/gcc_update (.../branches/gcc-4_8-branch)

5472

@@ -382,7 +382,7 @@

5473

fi

5474

5475

revision=`$GCC_SVN info | awk '/Revision:/ { print $2 }'`

5476

- branch=`$GCC_SVN info | sed -ne "/URL:/ {

5477

+ branch=`$GCC_SVN info | sed -ne "/^URL:/ {

5478

s,.*/trunk,trunk,

5479

s,.*/branches/,,

5480

s,.*/tags/,,

5481

Index: libatomic/configure

5482

===================================================================

5483

--- a/src/libatomic/configure (.../tags/gcc_4_8_2_release)

5484

+++ b/src/libatomic/configure (.../branches/gcc-4_8-branch)

5485

@@ -6505,7 +6505,7 @@

5486

rm -rf conftest*

5487

;;

5488

5489

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5490

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5491

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5492

# Find out which ABI we are using.

5493

echo 'int i;' > conftest.$ac_ext

5494

@@ -6530,7 +6530,10 @@

5495

;;

5496

esac

5497

;;

5498

- ppc64-*linux*|powerpc64-*linux*)

5499

+ powerpc64le-*linux*)

5500

+ LD="${LD-ld} -m elf32lppclinux"

5501

+ ;;

5502

+ powerpc64-*linux*)

5503

LD="${LD-ld} -m elf32ppclinux"

5504

;;

5505

s390x-*linux*)

5506

@@ -6549,7 +6552,10 @@

5507

x86_64-*linux*)

5508

LD="${LD-ld} -m elf_x86_64"

5509

;;

5510

- ppc*-*linux*|powerpc*-*linux*)

5511

+ powerpcle-*linux*)

5512

+ LD="${LD-ld} -m elf64lppc"

5513

+ ;;

5514

+ powerpc-*linux*)

5515

LD="${LD-ld} -m elf64ppc"

5516

;;

5517

s390*-*linux*|s390*-*tpf*)

5518

@@ -11013,7 +11019,7 @@

5519

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5520

lt_status=$lt_dlunknown

5521

cat > conftest.$ac_ext <<_LT_EOF

5522

-#line 11016 "configure"

5523

+#line 11022 "configure"

5524

#include "confdefs.h"

5525

5526

#if HAVE_DLFCN_H

5527

@@ -11119,7 +11125,7 @@

5528

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5529

lt_status=$lt_dlunknown

5530

cat > conftest.$ac_ext <<_LT_EOF

5531

-#line 11122 "configure"

5532

+#line 11128 "configure"

5533

#include "confdefs.h"

5534

5535

#if HAVE_DLFCN_H

5536

Index: libatomic/cas_n.c

5537

===================================================================

5538

--- a/src/libatomic/cas_n.c (.../tags/gcc_4_8_2_release)

5539

+++ b/src/libatomic/cas_n.c (.../branches/gcc-4_8-branch)

5540

@@ -51,10 +51,9 @@

5541

#if !DONE && N <= WORDSIZE && defined(atomic_compare_exchange_w)

5542

bool

5543

SIZE(libat_compare_exchange) (UTYPE *mptr, UTYPE *eptr, UTYPE newval,

5544

- int smodel, int fmodel UNUSED)

5545

+ int smodel, int fmodel)

5546

{

5547

UWORD mask, shift, weval, woldval, wnewval, t, *wptr;

5548

- bool ret = false;

5549

5550

pre_barrier (smodel);

5551

5552

@@ -82,12 +81,13 @@

5553

}

5554

while (!atomic_compare_exchange_w (wptr, &woldval, t, true,

5555

__ATOMIC_RELAXED, __ATOMIC_RELAXED));

5556

- ret = true;

5557

+ post_barrier (smodel);

5558

+ return true;

5559

+

5560

failure:

5561

*eptr = woldval >> shift;

5562

-

5563

- post_barrier (smodel);

5564

- return ret;

5565

+ post_barrier (fmodel);

5566

+ return false;

5567

}

5568

5569

#define DONE 1

5570

@@ -102,18 +102,17 @@

5571

{

5572

UTYPE oldval;

5573

UWORD magic;

5574

- bool ret = false;

5575

+ bool ret;

5576

5577

pre_seq_barrier (smodel);

5578

magic = protect_start (mptr);

5579

5580

oldval = *mptr;

5581

- if (oldval == *eptr)

5582

- {

5583

- *mptr = newval;

5584

- ret = true;

5585

- }

5586

- *eptr = oldval;

5587

+ ret = (oldval == *eptr);

5588

+ if (ret)

5589

+ *mptr = newval;

5590

+ else

5591

+ *eptr = oldval;

5592

5593

protect_end (mptr, magic);

5594

post_seq_barrier (smodel);

5595

Index: libatomic/ChangeLog

5596

===================================================================

5597

--- a/src/libatomic/ChangeLog (.../tags/gcc_4_8_2_release)

5598

+++ b/src/libatomic/ChangeLog (.../branches/gcc-4_8-branch)

5599

@@ -1,3 +1,16 @@

5600

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5601

+

5602

+ Backport from mainline

5603

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5604

+

5605

+ * configure: Regenerate.

5606

+

5607

+2014-02-20 Richard Henderson <rth@redhat.com>

5608

+

5609

+ PR c++/60272

5610

+ * cas_n.c (libat_compare_exchange): Conditionalize on failure

5611

+ the store back to EPTR.

5612

+

5613

2013-10-16 Release Manager

5614

5615

* GCC 4.8.2 released.

5616

Index: libbacktrace/configure

5617

===================================================================

5618

--- a/src/libbacktrace/configure (.../tags/gcc_4_8_2_release)

5619

+++ b/src/libbacktrace/configure (.../branches/gcc-4_8-branch)

5620

@@ -6842,7 +6842,7 @@

5621

rm -rf conftest*

5622

;;

5623

5624

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

5625

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

5626

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

5627

# Find out which ABI we are using.

5628

echo 'int i;' > conftest.$ac_ext

5629

@@ -6867,7 +6867,10 @@

5630

;;

5631

esac

5632

;;

5633

- ppc64-*linux*|powerpc64-*linux*)

5634

+ powerpc64le-*linux*)

5635

+ LD="${LD-ld} -m elf32lppclinux"

5636

+ ;;

5637

+ powerpc64-*linux*)

5638

LD="${LD-ld} -m elf32ppclinux"

5639

;;

5640

s390x-*linux*)

5641

@@ -6886,7 +6889,10 @@

5642

x86_64-*linux*)

5643

LD="${LD-ld} -m elf_x86_64"

5644

;;

5645

- ppc*-*linux*|powerpc*-*linux*)

5646

+ powerpcle-*linux*)

5647

+ LD="${LD-ld} -m elf64lppc"

5648

+ ;;

5649

+ powerpc-*linux*)

5650

LD="${LD-ld} -m elf64ppc"

5651

;;

5652

s390*-*linux*|s390*-*tpf*)

5653

@@ -11081,7 +11087,7 @@

5654

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5655

lt_status=$lt_dlunknown

5656

cat > conftest.$ac_ext <<_LT_EOF

5657

-#line 11084 "configure"

5658

+#line 11090 "configure"

5659

#include "confdefs.h"

5660

5661

#if HAVE_DLFCN_H

5662

@@ -11187,7 +11193,7 @@

5663

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5664

lt_status=$lt_dlunknown

5665

cat > conftest.$ac_ext <<_LT_EOF

5666

-#line 11190 "configure"

5667

+#line 11196 "configure"

5668

#include "confdefs.h"

5669

5670

#if HAVE_DLFCN_H

5671

@@ -11667,12 +11673,13 @@

5672

return 0;

5673

}

5674

_ACEOF

5675

-if ac_fn_c_try_compile "$LINENO"; then :

5676

+if ac_fn_c_try_link "$LINENO"; then :

5677

have_unwind_getipinfo=yes

5678

else

5679

have_unwind_getipinfo=no

5680

fi

5681

-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext

5682

+rm -f core conftest.err conftest.$ac_objext \

5683

+ conftest$ac_exeext conftest.$ac_ext

5684

CFLAGS="$ac_save_CFLAGS"

5685

{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $have_unwind_getipinfo" >&5

5686

$as_echo "$have_unwind_getipinfo" >&6; }

5687

Index: libbacktrace/Makefile.in

5688

===================================================================

5689

--- a/src/libbacktrace/Makefile.in (.../tags/gcc_4_8_2_release)

5690

+++ b/src/libbacktrace/Makefile.in (.../branches/gcc-4_8-branch)

5691

@@ -16,7 +16,7 @@

5692

@SET_MAKE@

5693

5694

# Makefile.am -- Backtrace Makefile.

5695

5696

5697

5698

# Redistribution and use in source and binary forms, with or without

5699

# modification, are permitted provided that the following conditions are

5700

Index: libbacktrace/dwarf.c

5701

===================================================================

5702

--- a/src/libbacktrace/dwarf.c (.../tags/gcc_4_8_2_release)

5703

+++ b/src/libbacktrace/dwarf.c (.../branches/gcc-4_8-branch)

5704

@@ -2507,7 +2507,6 @@

5705

if (pfvec->count == 0)

5706

return;

5707

5708

- addrs = (struct function_addrs *) pfvec->vec.base;

5709

addrs_count = pfvec->count;

5710

5711

if (fvec == NULL)

5712

@@ -2514,12 +2513,17 @@

5713

{

5714

if (!backtrace_vector_release (state, &lvec.vec, error_callback, data))

5715

return;

5716

+ addrs = (struct function_addrs *) pfvec->vec.base;

5717

}

5718

else

5719

{

5720

/* Finish this list of addresses, but leave the remaining space in

5721

the vector available for the next function unit. */

5722

- backtrace_vector_finish (state, &fvec->vec);

5723

+ addrs = ((struct function_addrs *)

5724

+ backtrace_vector_finish (state, &fvec->vec,

5725

+ error_callback, data));

5726

+ if (addrs == NULL)

5727

+ return;

5728

fvec->count = 0;

5729

}

5730

5731

Index: libbacktrace/ChangeLog

5732

===================================================================

5733

--- a/src/libbacktrace/ChangeLog (.../tags/gcc_4_8_2_release)

5734

+++ b/src/libbacktrace/ChangeLog (.../branches/gcc-4_8-branch)

5735

@@ -1,3 +1,35 @@

5736

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

5737

+

5738

+ Backport from mainline

5739

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

5740

+

5741

+ * configure: Regenerate.

5742

+

5743

+2014-02-07 Misty De Meo <misty@brew.sh>

5744

+

5745

+ PR target/58710

5746

+ * configure.ac: Use AC_LINK_IFELSE in check for

5747

+ _Unwind_GetIPInfo.

5748

+ * configure: Regenerate.

5749

+

5750

+2013-12-05 Ian Lance Taylor <iant@google.com>

5751

+

5752

+ * alloc.c (backtrace_vector_finish): Add error_callback and data

5753

+ parameters. Call backtrace_vector_release. Return address base.

5754

+ * mmap.c (backtrace_vector_finish): Add error_callback and data

5755

+ parameters. Return address base.

5756

+ * dwarf.c (read_function_info): Get new address base from

5757

+ backtrace_vector_finish.

5758

+ * internal.h (backtrace_vector_finish): Update declaration.

5759

+

5760

+2013-11-30 Ian Lance Taylor <iant@google.com>

5761

+

5762

+ Backport from mainline:

5763

+ 2013-10-17 Ian Lance Taylor <iant@google.com>

5764

+

5765

+ * elf.c (elf_add): Don't get the wrong offsets if a debug section

5766

+ is missing.

5767

+

5768

2013-10-16 Release Manager

5769

5770

* GCC 4.8.2 released.

5771

Index: libbacktrace/elf.c

5772

===================================================================

5773

--- a/src/libbacktrace/elf.c (.../tags/gcc_4_8_2_release)

5774

+++ b/src/libbacktrace/elf.c (.../branches/gcc-4_8-branch)

5775

@@ -725,6 +725,8 @@

5776

{

5777

off_t end;

5778

5779

+ if (sections[i].size == 0)

5780

+ continue;

5781

if (min_offset == 0 || sections[i].offset < min_offset)

5782

min_offset = sections[i].offset;

5783

end = sections[i].offset + sections[i].size;

5784

@@ -751,8 +753,13 @@

5785

descriptor = -1;

5786

5787

for (i = 0; i < (int) DEBUG_MAX; ++i)

5788

- sections[i].data = ((const unsigned char *) debug_view.data

5789

- + (sections[i].offset - min_offset));

5790

+ {

5791

+ if (sections[i].size == 0)

5792

+ sections[i].data = NULL;

5793

+ else

5794

+ sections[i].data = ((const unsigned char *) debug_view.data

5795

+ + (sections[i].offset - min_offset));

5796

+ }

5797

5798

if (!backtrace_dwarf_add (state, base_address,

5799

sections[DEBUG_INFO].data,

5800

Index: libbacktrace/internal.h

5801

===================================================================

5802

--- a/src/libbacktrace/internal.h (.../tags/gcc_4_8_2_release)

5803

+++ b/src/libbacktrace/internal.h (.../branches/gcc-4_8-branch)

5804

@@ -192,13 +192,17 @@

5805

struct backtrace_vector *vec);

5806

5807

/* Finish the current allocation on VEC. Prepare to start a new

5808

- allocation. The finished allocation will never be freed. */

5809

+ allocation. The finished allocation will never be freed. Returns

5810

+ a pointer to the base of the finished entries, or NULL on

5811

+ failure. */

5812

5813

-extern void backtrace_vector_finish (struct backtrace_state *state,

5814

- struct backtrace_vector *vec);

5815

+extern void* backtrace_vector_finish (struct backtrace_state *state,

5816

+ struct backtrace_vector *vec,

5817

+ backtrace_error_callback error_callback,

5818

+ void *data);

5819

5820

-/* Release any extra space allocated for VEC. Returns 1 on success, 0

5821

- on failure. */

5822

+/* Release any extra space allocated for VEC. This may change

5823

+ VEC->base. Returns 1 on success, 0 on failure. */

5824

5825

extern int backtrace_vector_release (struct backtrace_state *state,

5826

struct backtrace_vector *vec,

5827

Index: libbacktrace/configure.ac

5828

===================================================================

5829

--- a/src/libbacktrace/configure.ac (.../tags/gcc_4_8_2_release)

5830

+++ b/src/libbacktrace/configure.ac (.../branches/gcc-4_8-branch)

5831

@@ -144,7 +144,7 @@

5832

ac_save_CFFLAGS="$CFLAGS"

5833

CFLAGS="$CFLAGS -Werror-implicit-function-declaration"

5834

AC_MSG_CHECKING([for _Unwind_GetIPInfo])

5835

- AC_COMPILE_IFELSE(

5836

+ AC_LINK_IFELSE(

5837

[AC_LANG_PROGRAM(

5838

[#include "unwind.h"

5839

struct _Unwind_Context *context;

5840

Index: libbacktrace/alloc.c

5841

===================================================================

5842

--- a/src/libbacktrace/alloc.c (.../tags/gcc_4_8_2_release)

5843

+++ b/src/libbacktrace/alloc.c (.../branches/gcc-4_8-branch)

5844

@@ -113,12 +113,24 @@

5845

5846

/* Finish the current allocation on VEC. */

5847

5848

-void

5849

-backtrace_vector_finish (struct backtrace_state *state ATTRIBUTE_UNUSED,

5850

- struct backtrace_vector *vec)

5851

+void *

5852

+backtrace_vector_finish (struct backtrace_state *state,

5853

+ struct backtrace_vector *vec,

5854

+ backtrace_error_callback error_callback,

5855

+ void *data)

5856

{

5857

- vec->base = (char *) vec->base + vec->size;

5858

+ void *ret;

5859

+

5860

+ /* With this allocator we call realloc in backtrace_vector_grow,

5861

+ which means we can't easily reuse the memory here. So just

5862

+ release it. */

5863

+ if (!backtrace_vector_release (state, vec, error_callback, data))

5864

+ return NULL;

5865

+ ret = vec->base;

5866

+ vec->base = NULL;

5867

vec->size = 0;

5868

+ vec->alc = 0;

5869

+ return ret;

5870

}

5871

5872

/* Release any extra space allocated for VEC. */

5873

Index: libbacktrace/mmap.c

5874

===================================================================

5875

--- a/src/libbacktrace/mmap.c (.../tags/gcc_4_8_2_release)

5876

+++ b/src/libbacktrace/mmap.c (.../branches/gcc-4_8-branch)

5877

@@ -230,12 +230,19 @@

5878

5879

/* Finish the current allocation on VEC. */

5880

5881

-void

5882

-backtrace_vector_finish (struct backtrace_state *state ATTRIBUTE_UNUSED,

5883

- struct backtrace_vector *vec)

5884

+void *

5885

+backtrace_vector_finish (

5886

+ struct backtrace_state *state ATTRIBUTE_UNUSED,

5887

+ struct backtrace_vector *vec,

5888

+ backtrace_error_callback error_callback ATTRIBUTE_UNUSED,

5889

+ void *data ATTRIBUTE_UNUSED)

5890

{

5891

+ void *ret;

5892

+

5893

+ ret = vec->base;

5894

vec->base = (char *) vec->base + vec->size;

5895

vec->size = 0;

5896

+ return ret;

5897

}

5898

5899

/* Release any extra space allocated for VEC. */

5900

Index: libjava/libltdl/configure

5901

===================================================================

5902

--- a/src/libjava/libltdl/configure (.../tags/gcc_4_8_2_release)

5903

+++ b/src/libjava/libltdl/configure (.../branches/gcc-4_8-branch)

5904

@@ -4806,7 +4806,7 @@

5905

rm -rf conftest*

5906

;;

5907

5908

-x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

5909

+x86_64-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

5910

# Find out which ABI we are using.

5911

echo 'int i;' > conftest.$ac_ext

5912

if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5

5913

@@ -4820,7 +4820,10 @@

5914

x86_64-*linux*)

5915

LD="${LD-ld} -m elf_i386"

5916

;;

5917

- ppc64-*linux*|powerpc64-*linux*)

5918

+ powerpc64le-*linux*)

5919

+ LD="${LD-ld} -m elf32lppclinux"

5920

+ ;;

5921

+ powerpc64-*linux*)

5922

LD="${LD-ld} -m elf32ppclinux"

5923

;;

5924

s390x-*linux*)

5925

@@ -4836,7 +4839,10 @@

5926

x86_64-*linux*)

5927

LD="${LD-ld} -m elf_x86_64"

5928

;;

5929

- ppc*-*linux*|powerpc*-*linux*)

5930

+ powerpcle-*linux*)

5931

+ LD="${LD-ld} -m elf64lppc"

5932

+ ;;

5933

+ powerpc-*linux*)

5934

LD="${LD-ld} -m elf64ppc"

5935

;;

5936

s390*-*linux*)

5937

@@ -6456,11 +6462,11 @@

5938

-e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \

5939

-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \

5940

-e 's:$: $lt_compiler_flag:'`

5941

- (eval echo "\"\$as_me:6459: $lt_compile\"" >&5)

5942

+ (eval echo "\"\$as_me:6465: $lt_compile\"" >&5)

5943

(eval "$lt_compile" 2>conftest.err)

5944

ac_status=$?

5945

cat conftest.err >&5

5946

- echo "$as_me:6463: \$? = $ac_status" >&5

5947

+ echo "$as_me:6469: \$? = $ac_status" >&5

5948

if (exit $ac_status) && test -s "$ac_outfile"; then

5949

# The compiler can only warn and ignore the option if not recognized

5950

# So say no if there are warnings other than the usual output.

5951

@@ -6718,11 +6724,11 @@

5952

-e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \

5953

-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \

5954

-e 's:$: $lt_compiler_flag:'`

5955

- (eval echo "\"\$as_me:6721: $lt_compile\"" >&5)

5956

+ (eval echo "\"\$as_me:6727: $lt_compile\"" >&5)

5957

(eval "$lt_compile" 2>conftest.err)

5958

ac_status=$?

5959

cat conftest.err >&5

5960

- echo "$as_me:6725: \$? = $ac_status" >&5

5961

+ echo "$as_me:6731: \$? = $ac_status" >&5

5962

if (exit $ac_status) && test -s "$ac_outfile"; then

5963

# The compiler can only warn and ignore the option if not recognized

5964

# So say no if there are warnings other than the usual output.

5965

@@ -6780,11 +6786,11 @@

5966

-e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \

5967

-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \

5968

-e 's:$: $lt_compiler_flag:'`

5969

- (eval echo "\"\$as_me:6783: $lt_compile\"" >&5)

5970

+ (eval echo "\"\$as_me:6789: $lt_compile\"" >&5)

5971

(eval "$lt_compile" 2>out/conftest.err)

5972

ac_status=$?

5973

cat out/conftest.err >&5

5974

- echo "$as_me:6787: \$? = $ac_status" >&5

5975

+ echo "$as_me:6793: \$? = $ac_status" >&5

5976

if (exit $ac_status) && test -s out/conftest2.$ac_objext

5977

then

5978

# The compiler can only warn and ignore the option if not recognized

5979

@@ -8099,7 +8105,7 @@

5980

libsuff=

5981

case "$host_cpu" in

5982

x86_64*|s390x*|powerpc64*)

5983

- echo '#line 8102 "configure"' > conftest.$ac_ext

5984

+ echo '#line 8108 "configure"' > conftest.$ac_ext

5985

if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5

5986

(eval $ac_compile) 2>&5

5987

ac_status=$?

5988

@@ -8652,7 +8658,7 @@

5989

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5990

lt_status=$lt_dlunknown

5991

cat > conftest.$ac_ext <<EOF

5992

-#line 8655 "configure"

5993

+#line 8661 "configure"

5994

#include "confdefs.h"

5995

5996

#if HAVE_DLFCN_H

5997

@@ -8750,7 +8756,7 @@

5998

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

5999

lt_status=$lt_dlunknown

6000

cat > conftest.$ac_ext <<EOF

6001

-#line 8753 "configure"

6002

+#line 8759 "configure"

6003

#include "confdefs.h"

6004

6005

#if HAVE_DLFCN_H

6006

@@ -10591,7 +10597,7 @@

6007

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

6008

lt_status=$lt_dlunknown

6009

cat > conftest.$ac_ext <<EOF

6010

-#line 10594 "configure"

6011

+#line 10600 "configure"

6012

#include "confdefs.h"

6013

6014

#if HAVE_DLFCN_H

6015

Index: libjava/libltdl/ChangeLog

6016

===================================================================

6017

--- a/src/libjava/libltdl/ChangeLog (.../tags/gcc_4_8_2_release)

6018

+++ b/src/libjava/libltdl/ChangeLog (.../branches/gcc-4_8-branch)

6019

@@ -1,3 +1,11 @@

6020

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

6021

+

6022

+ Backport from mainline

6023

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6024

+

6025

+ * acinclude.m4: Update to mainline version.

6026

+ * configure: Regenerate.

6027

+

6028

2013-10-16 Release Manager

6029

6030

* GCC 4.8.2 released.

6031

Index: libjava/libltdl/acinclude.m4

6032

===================================================================

6033

--- a/src/libjava/libltdl/acinclude.m4 (.../tags/gcc_4_8_2_release)

6034

+++ b/src/libjava/libltdl/acinclude.m4 (.../branches/gcc-4_8-branch)

6035

@@ -519,7 +519,7 @@

6036

rm -rf conftest*

6037

;;

6038

6039

-x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

6040

+x86_64-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)

6041

# Find out which ABI we are using.

6042

echo 'int i;' > conftest.$ac_ext

6043

if AC_TRY_EVAL(ac_compile); then

6044

@@ -529,7 +529,10 @@

6045

x86_64-*linux*)

6046

LD="${LD-ld} -m elf_i386"

6047

;;

6048

- ppc64-*linux*|powerpc64-*linux*)

6049

+ powerpc64le-*linux*)

6050

+ LD="${LD-ld} -m elf32lppclinux"

6051

+ ;;

6052

+ powerpc64-*linux*)

6053

LD="${LD-ld} -m elf32ppclinux"

6054

;;

6055

s390x-*linux*)

6056

@@ -545,7 +548,10 @@

6057

x86_64-*linux*)

6058

LD="${LD-ld} -m elf_x86_64"

6059

;;

6060

- ppc*-*linux*|powerpc*-*linux*)

6061

+ powerpcle-*linux*)

6062

+ LD="${LD-ld} -m elf64lppc"

6063

+ ;;

6064

+ powerpc-*linux*)

6065

LD="${LD-ld} -m elf64ppc"

6066

;;

6067

s390*-*linux*)

6068

Index: libjava/classpath/ChangeLog

6069

===================================================================

6070

--- a/src/libjava/classpath/ChangeLog (.../tags/gcc_4_8_2_release)

6071

+++ b/src/libjava/classpath/ChangeLog (.../branches/gcc-4_8-branch)

6072

@@ -1,3 +1,10 @@

6073

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

6074

+

6075

+ Backport from mainline

6076

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6077

+

6078

+ * configure: Regenerate.

6079

+

6080

2013-10-16 Release Manager

6081

6082

* GCC 4.8.2 released.

6083

Index: libjava/classpath/configure

6084

===================================================================

6085

--- a/src/libjava/classpath/configure (.../tags/gcc_4_8_2_release)

6086

+++ b/src/libjava/classpath/configure (.../branches/gcc-4_8-branch)

6087

@@ -7577,7 +7577,7 @@

6088

rm -rf conftest*

6089

;;

6090

6091

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

6092

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

6093

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

6094

# Find out which ABI we are using.

6095

echo 'int i;' > conftest.$ac_ext

6096

@@ -7602,7 +7602,10 @@

6097

;;

6098

esac

6099

;;

6100

- ppc64-*linux*|powerpc64-*linux*)

6101

+ powerpc64le-*linux*)

6102

+ LD="${LD-ld} -m elf32lppclinux"

6103

+ ;;

6104

+ powerpc64-*linux*)

6105

LD="${LD-ld} -m elf32ppclinux"

6106

;;

6107

s390x-*linux*)

6108

@@ -7621,7 +7624,10 @@

6109

x86_64-*linux*)

6110

LD="${LD-ld} -m elf_x86_64"

6111

;;

6112

- ppc*-*linux*|powerpc*-*linux*)

6113

+ powerpcle-*linux*)

6114

+ LD="${LD-ld} -m elf64lppc"

6115

+ ;;

6116

+ powerpc-*linux*)

6117

LD="${LD-ld} -m elf64ppc"

6118

;;

6119

s390*-*linux*|s390*-*tpf*)

6120

@@ -11820,7 +11826,7 @@

6121

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

6122

lt_status=$lt_dlunknown

6123

cat > conftest.$ac_ext <<_LT_EOF

6124

-#line 11823 "configure"

6125

+#line 11829 "configure"

6126

#include "confdefs.h"

6127

6128

#if HAVE_DLFCN_H

6129

@@ -11926,7 +11932,7 @@

6130

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

6131

lt_status=$lt_dlunknown

6132

cat > conftest.$ac_ext <<_LT_EOF

6133

-#line 11929 "configure"

6134

+#line 11935 "configure"

6135

#include "confdefs.h"

6136

6137

#if HAVE_DLFCN_H

6138

@@ -25300,7 +25306,7 @@

6139

JAVA_TEST=Object.java

6140

CLASS_TEST=Object.class

6141

cat << \EOF > $JAVA_TEST

6142

-/* #line 25303 "configure" */

6143

+/* #line 25309 "configure" */

6144

package java.lang;

6145

6146

public class Object

6147

@@ -25393,7 +25399,7 @@

6148

if uudecode$EXEEXT Test.uue; then

6149

ac_cv_prog_uudecode_base64=yes

6150

else

6151

- echo "configure: 25396: uudecode had trouble decoding base 64 file 'Test.uue'" >&5

6152

+ echo "configure: 25402: uudecode had trouble decoding base 64 file 'Test.uue'" >&5

6153

echo "configure: failed file was:" >&5

6154

cat Test.uue >&5

6155

ac_cv_prog_uudecode_base64=no

6156

@@ -25421,7 +25427,7 @@

6157

CLASS_TEST=Test.class

6158

TEST=Test

6159

cat << \EOF > $JAVA_TEST

6160

-/* [#]line 25424 "configure" */

6161

+/* [#]line 25430 "configure" */

6162

public class Test {

6163

public static void main (String args[]) {

6164

System.exit (0);

6165

@@ -25629,7 +25635,7 @@

6166

JAVA_TEST=Test.java

6167

CLASS_TEST=Test.class

6168

cat << \EOF > $JAVA_TEST

6169

- /* #line 25632 "configure" */

6170

+ /* #line 25638 "configure" */

6171

public class Test

6172

{

6173

public static void main(String args)

6174

Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c

6175

===================================================================

6176

--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../tags/gcc_4_8_2_release)

6177

+++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../branches/gcc-4_8-branch)

6178

@@ -39,10 +39,11 @@

6179

#include <pango/pango.h>

6180

#include <pango/pangoft2.h>

6181

#include <pango/pangofc-font.h>

6182

-#include <freetype/ftglyph.h>

6183

-#include <freetype/ftoutln.h>

6184

-#include <freetype/fttypes.h>

6185

-#include <freetype/tttables.h>

6186

+#include <ft2build.h>

6187

+#include FT_GLYPH_H

6188

+#include FT_OUTLINE_H

6189

+#include FT_TYPES_H

6190

+#include FT_TRUETYPE_TABLES_H

6191

#include "gdkfont.h"

6192

#include "gtkpeer.h"

6193

#include "gnu_java_awt_peer_gtk_GdkFontPeer.h"

6194

Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c

6195

===================================================================

6196

--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../tags/gcc_4_8_2_release)

6197

+++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../branches/gcc-4_8-branch)

6198

@@ -42,8 +42,9 @@

6199

#include <pango/pango.h>

6200

#include <pango/pangoft2.h>

6201

#include <pango/pangofc-font.h>

6202

-#include <freetype/ftglyph.h>

6203

-#include <freetype/ftoutln.h>

6204

+#include <ft2build.h>

6205

+#include FT_GLYPH_H

6206

+#include FT_OUTLINE_H

6207

#include "jcl.h"

6208

#include "gdkfont.h"

6209

#include "gnu_java_awt_peer_gtk_FreetypeGlyphVector.h"

6210

Index: libjava/classpath/ChangeLog.gcj

6211

===================================================================

6212

--- a/src/libjava/classpath/ChangeLog.gcj (.../tags/gcc_4_8_2_release)

6213

+++ b/src/libjava/classpath/ChangeLog.gcj (.../branches/gcc-4_8-branch)

6214

@@ -1,3 +1,9 @@

6215

+2013-11-29 Matthias Klose <doko@ubuntu.com>

6216

+

6217

+ * native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c,

6218

+ native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c:

6219

+ Fix freetype includes.

6220

+

6221

2013-03-22 Jakub Jelinek <jakub@redhat.com>

6222

6223

PR other/43620

6224

Index: libjava/classpath

6225

===================================================================

6226

--- a/src/libjava/classpath (.../tags/gcc_4_8_2_release)

6227

+++ b/src/libjava/classpath (.../branches/gcc-4_8-branch)

6228

6229

Property changes on: libjava/classpath

6230

___________________________________________________________________

6231

Modified: svn:mergeinfo

6232

Merged /trunk/libjava/classpath:r206395

6233

Index: libjava/ChangeLog

6234

===================================================================

6235

--- a/src/libjava/ChangeLog (.../tags/gcc_4_8_2_release)

6236

+++ b/src/libjava/ChangeLog (.../branches/gcc-4_8-branch)

6237

@@ -1,3 +1,23 @@

6238

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

6239

+

6240

+ Backport from mainline

6241

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6242

+

6243

+ * configure: Regenerate.

6244

+

6245

+2014-04-01 Dominique d'Humieres <dominiq@lps.ens.fr>

6246

+

6247

+ Backport from mainline

6248

+ 2014-02-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

6249

+

6250

+ PR libgcj/55637

6251

+ * testsuite/libjava.lang/sourcelocation.xfail: New file.

6252

+

6253

+2014-03-11 Uros Bizjak <ubizjak@gmail.com>

6254

+

6255

+ * java/lang/natObject.cc (_Jv_MonitorEnter): Add missing parenthesis

6256

+ around comparison with (address | LOCKED) in JvAssert.

6257

+

6258

2013-10-16 Release Manager

6259

6260

* GCC 4.8.2 released.

6261

Index: libjava/testsuite/libjava.lang/sourcelocation.xfail

6262

===================================================================

6263

--- a/src/libjava/testsuite/libjava.lang/sourcelocation.xfail (.../tags/gcc_4_8_2_release)

6264

+++ b/src/libjava/testsuite/libjava.lang/sourcelocation.xfail (.../branches/gcc-4_8-branch)

6265

@@ -0,0 +1 @@

6266

+xfail-output

6267

Index: libjava/configure

6268

===================================================================

6269

--- a/src/libjava/configure (.../tags/gcc_4_8_2_release)

6270

+++ b/src/libjava/configure (.../branches/gcc-4_8-branch)

6271

@@ -8842,7 +8842,7 @@

6272

rm -rf conftest*

6273

;;

6274

6275

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

6276

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

6277

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

6278

# Find out which ABI we are using.

6279

echo 'int i;' > conftest.$ac_ext

6280

@@ -8867,7 +8867,10 @@

6281

;;

6282

esac

6283

;;

6284

- ppc64-*linux*|powerpc64-*linux*)

6285

+ powerpc64le-*linux*)

6286

+ LD="${LD-ld} -m elf32lppclinux"

6287

+ ;;

6288

+ powerpc64-*linux*)

6289

LD="${LD-ld} -m elf32ppclinux"

6290

;;

6291

s390x-*linux*)

6292

@@ -8886,7 +8889,10 @@

6293

x86_64-*linux*)

6294

LD="${LD-ld} -m elf_x86_64"

6295

;;

6296

- ppc*-*linux*|powerpc*-*linux*)

6297

+ powerpcle-*linux*)

6298

+ LD="${LD-ld} -m elf64lppc"

6299

+ ;;

6300

+ powerpc-*linux*)

6301

LD="${LD-ld} -m elf64ppc"

6302

;;

6303

s390*-*linux*|s390*-*tpf*)

6304

@@ -13382,7 +13388,7 @@

6305

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

6306

lt_status=$lt_dlunknown

6307

cat > conftest.$ac_ext <<_LT_EOF

6308

-#line 13385 "configure"

6309

+#line 13391 "configure"

6310

#include "confdefs.h"

6311

6312

#if HAVE_DLFCN_H

6313

@@ -13488,7 +13494,7 @@

6314

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

6315

lt_status=$lt_dlunknown

6316

cat > conftest.$ac_ext <<_LT_EOF

6317

-#line 13491 "configure"

6318

+#line 13497 "configure"

6319

#include "confdefs.h"

6320

6321

#if HAVE_DLFCN_H

6322

@@ -19483,7 +19489,7 @@

6323

enableval=$enable_sjlj_exceptions; :

6324

else

6325

cat > conftest.$ac_ext << EOF

6326

-#line 19486 "configure"

6327

+#line 19492 "configure"

6328

struct S { ~S(); };

6329

void bar();

6330

void foo()

6331

Index: libjava/java/lang/natObject.cc

6332

===================================================================

6333

--- a/src/libjava/java/lang/natObject.cc (.../tags/gcc_4_8_2_release)

6334

+++ b/src/libjava/java/lang/natObject.cc (.../branches/gcc-4_8-branch)

6335

@@ -929,7 +929,7 @@

6336

// only be held by other threads waiting for conversion, and

6337

// they, like us, drop it quickly without blocking.

6338

_Jv_MutexLock(&(hl->si.mutex));

6339

- JvAssert(he -> address == address | LOCKED );

6340

+ JvAssert(he -> address == (address | LOCKED));

6341

release_set(&(he -> address), (address | REQUEST_CONVERSION | HEAVY));

6342

// release lock on he

6343

LOG(REQ_CONV, (address | REQUEST_CONVERSION | HEAVY), self);

6344

@@ -961,7 +961,7 @@

6345

}

6346

obj_addr_t was_heavy = (address & HEAVY);

6347

if ((address & LOCKED) ||

6348

- !compare_and_swap(&(he -> address), address, (address | LOCKED )))

6349

+ !compare_and_swap(&(he -> address), address, address | LOCKED ))

6350

{

6351

wait_unlocked(he);

6352

goto retry;

6353

Index: gnattools/configure

6354

===================================================================

6355

--- a/src/gnattools/configure (.../tags/gcc_4_8_2_release)

6356

+++ b/src/gnattools/configure (.../branches/gcc-4_8-branch)

6357

@@ -2029,66 +2029,59 @@

6358

# Per-target case statement

6359

# -------------------------

6360

case "${target}" in

6361

- alpha*-dec-vx*) # Unlike all other Vxworks

6362

+ *-*-aix*)

6363

+ TOOLS_TARGET_PAIRS="\

6364

+ mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6365

+ indepsw.adb<indepsw-aix.adb"

6366

;;

6367

- m68k*-wrs-vx* \

6368

- | powerpc*-wrs-vxworks \

6369

- | sparc*-wrs-vx* \

6370

- | *86-wrs-vxworks \

6371

- | mips*-wrs-vx*)

6372

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb"

6373

+ *-*-darwin*)

6374

+ TOOLS_TARGET_PAIRS="\

6375

+ mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb \

6376

+ indepsw.adb<indepsw-darwin.adb"

6377

;;

6378

- sparc-sun-solaris*)

6379

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6380

+ *-*-freebsd*)

6381

+ TOOLS_TARGET_PAIRS="\

6382

+ mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6383

+ indepsw.adb<indepsw-gnu.adb"

6384

;;

6385

- *86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)

6386

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6387

- ;;

6388

- *86-*-linux* \

6389

- | powerpc*-*-linux* \

6390

- | *ia64-*-linux* \

6391

- | alpha*-*-linux* \

6392

- | sparc*-*-linux* \

6393

- | hppa*-*-linux* \

6394

- | *x86_64-*-linux*)

6395

+ *-*-linux*)

6396

TOOLS_TARGET_PAIRS="\

6397

mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6398

indepsw.adb<indepsw-gnu.adb"

6399

;;

6400

- s390*-*-linux*)

6401

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb"

6402

+ *-*-lynxos*)

6403

+ TOOLS_TARGET_PAIRS="\

6404

+ mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6405

+ indepsw.adb<indepsw-gnu.adb"

6406

;;

6407

- *86-*-freebsd*)

6408

+ *-*-solaris*)

6409

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6410

+ ;;

6411

+ *-*-vxworks*)

6412

TOOLS_TARGET_PAIRS="\

6413

- mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6414

+ mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb \

6415

indepsw.adb<indepsw-gnu.adb"

6416

;;

6417

- hppa*-hp-hpux10*) # Unlike hpux11

6418

+ hppa*-hp-hpux10*)

6419

;;

6420

hppa*-hp-hpux11*)

6421

TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-hpux.adb"

6422

;;

6423

- *-ibm-aix*)

6424

- TOOLS_TARGET_PAIRS="\

6425

- mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6426

- indepsw.adb<indepsw-aix.adb"

6427

+ ia64-hp-hpux11*)

6428

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-ia64-hpux.adb"

6429

;;

6430

- alpha*-dec-vms* | alpha*-dec-openvms* | alpha*-dec-vms* \

6431

- | alpha*-hp-vms* | alpha*-hp-openvms* | alpha*-hp-vms*)

6432

+ alpha*-*-vms* | alpha*-*-openvms*)

6433

TOOLS_TARGET_PAIRS="\

6434

mlib-tgt-specific.adb<mlib-tgt-specific-vms-alpha.adb \

6435

symbols.adb<symbols-vms.adb \

6436

symbols-processing.adb<symbols-processing-vms-alpha.adb"

6437

-

6438

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6439

;;

6440

- ia64*-dec-vms* | ia64*-dec-openvms* | ia64*-dec-vms* \

6441

- | ia64*-hp-vms* | ia64*-hp-openvms* | ia64*-hp-vms*)

6442

+ ia64-*-vms* | ia64-*-openvms*)

6443

TOOLS_TARGET_PAIRS="\

6444

mlib-tgt-specific.adb<mlib-tgt-specific-vms-ia64.adb \

6445

symbols.adb<symbols-vms.adb \

6446

symbols-processing.adb<symbols-processing-vms-ia64.adb"

6447

-

6448

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6449

;;

6450

*-*-cygwin32* | *-*-mingw32* | *-*-pe)

6451

@@ -2097,14 +2090,6 @@

6452

indepsw.adb<indepsw-mingw.adb"

6453

EXTRA_GNATTOOLS='../../gnatdll$(exeext)'

6454

;;

6455

- *-*-darwin*)

6456

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb"

6457

- ;;

6458

- *-*-lynxos)

6459

- TOOLS_TARGET_PAIRS="\

6460

- mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6461

- indepsw.adb<indepsw-gnu.adb"

6462

- ;;

6463

esac

6464

6465

# From user or toplevel makefile.

6466

Index: gnattools/Makefile.in

6467

===================================================================

6468

--- a/src/gnattools/Makefile.in (.../tags/gcc_4_8_2_release)

6469

+++ b/src/gnattools/Makefile.in (.../branches/gcc-4_8-branch)

6470

@@ -24,6 +24,8 @@

6471

libdir = @libdir@

6472

build = @build@

6473

target = @target@

6474

+host = @host@

6475

+host_alias = @host_alias@

6476

prefix = @prefix@

6477

INSTALL = @INSTALL@

6478

INSTALL_DATA = @INSTALL_DATA@

6479

@@ -84,6 +86,7 @@

6480

TOOLS_FLAGS_TO_PASS_RE= \

6481

"CC=../../xgcc -B../../" \

6482

"CFLAGS=$(CFLAGS)" \

6483

+ "LDFLAGS=$(LDFLAGS)" \

6484

"ADAFLAGS=$(ADAFLAGS)" \

6485

"ADA_CFLAGS=$(ADA_CFLAGS)" \

6486

"INCLUDES=$(INCLUDES_FOR_SUBDIR)" \

6487

@@ -97,6 +100,22 @@

6488

"TOOLSCASE=cross"

6489

6490

# Variables for gnattools, cross

6491

+ifeq ($(build), $(host))

6492

+ GNATMAKE_FOR_HOST=gnatmake

6493

+ GNATLINK_FOR_HOST=gnatlink

6494

+ GNATBIND_FOR_HOST=gnatbind

6495

+ GNATLS_FOR_HOST=gnatls

6496

+else

6497

+ GNATMAKE_FOR_HOST=$(host_alias)-gnatmake

6498

+ GNATLINK_FOR_HOST=$(host_alias)-gnatlink

6499

+ GNATBIND_FOR_HOST=$(host_alias)-gnatbind

6500

+ GNATLS_FOR_HOST=$(host_alias)-gnatls

6501

+endif

6502

+

6503

+# Put the host RTS dir first in the PATH to hide the default runtime

6504

+# files that are among the sources

6505

+RTS_DIR:=$(strip $(subst \,/,$(shell $(GNATLS_FOR_HOST) -v | grep adalib )))

6506

+

6507

TOOLS_FLAGS_TO_PASS_CROSS= \

6508

"CC=$(CC)" \

6509

"CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" \

6510

@@ -108,9 +127,9 @@

6511

"exeext=$(exeext)" \

6512

"fsrcdir=$(fsrcdir)" \

6513

"srcdir=$(fsrcdir)" \

6514

- "GNATMAKE=gnatmake" \

6515

- "GNATLINK=gnatlink" \

6516

- "GNATBIND=gnatbind" \

6517

+ "GNATMAKE=$(GNATMAKE_FOR_HOST)" \

6518

+ "GNATLINK=$(GNATLINK_FOR_HOST)" \

6519

+ "GNATBIND=$(GNATBIND_FOR_HOST)" \

6520

"TOOLSCASE=cross" \

6521

"LIBGNAT="

6522

6523

@@ -179,11 +198,6 @@

6524

$(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \

6525

$(TOOLS_FLAGS_TO_PASS_NATIVE) common-tools

6526

6527

-# For cross builds of gnattools,

6528

-# put the host RTS dir first in the PATH to hide the default runtime

6529

-# files that are among the sources

6530

-# FIXME: This should be done in configure.

6531

-RTS_DIR:=$(strip $(subst \,/,$(shell gnatls -v | grep adalib )))

6532

gnattools-cross: $(GCC_DIR)/stamp-tools

6533

# gnattools1-re

6534

$(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \

6535

Index: gnattools/configure.ac

6536

===================================================================

6537

--- a/src/gnattools/configure.ac (.../tags/gcc_4_8_2_release)

6538

+++ b/src/gnattools/configure.ac (.../branches/gcc-4_8-branch)

6539

@@ -69,66 +69,59 @@

6540

# Per-target case statement

6541

# -------------------------

6542

case "${target}" in

6543

- alpha*-dec-vx*) # Unlike all other Vxworks

6544

+ *-*-aix*)

6545

+ TOOLS_TARGET_PAIRS="\

6546

+ mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6547

+ indepsw.adb<indepsw-aix.adb"

6548

;;

6549

- m68k*-wrs-vx* \

6550

- | powerpc*-wrs-vxworks \

6551

- | sparc*-wrs-vx* \

6552

- | *86-wrs-vxworks \

6553

- | mips*-wrs-vx*)

6554

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb"

6555

+ *-*-darwin*)

6556

+ TOOLS_TARGET_PAIRS="\

6557

+ mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb \

6558

+ indepsw.adb<indepsw-darwin.adb"

6559

;;

6560

- sparc-sun-solaris*)

6561

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6562

+ *-*-freebsd*)

6563

+ TOOLS_TARGET_PAIRS="\

6564

+ mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6565

+ indepsw.adb<indepsw-gnu.adb"

6566

;;

6567

- *86-*-solaris2* | x86_64-*-solaris2.1[[0-9]]*)

6568

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6569

- ;;

6570

- *86-*-linux* \

6571

- | powerpc*-*-linux* \

6572

- | *ia64-*-linux* \

6573

- | alpha*-*-linux* \

6574

- | sparc*-*-linux* \

6575

- | hppa*-*-linux* \

6576

- | *x86_64-*-linux*)

6577

+ *-*-linux*)

6578

TOOLS_TARGET_PAIRS="\

6579

mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6580

indepsw.adb<indepsw-gnu.adb"

6581

;;

6582

- s390*-*-linux*)

6583

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb"

6584

+ *-*-lynxos*)

6585

+ TOOLS_TARGET_PAIRS="\

6586

+ mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6587

+ indepsw.adb<indepsw-gnu.adb"

6588

;;

6589

- *86-*-freebsd*)

6590

+ *-*-solaris*)

6591

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"

6592

+ ;;

6593

+ *-*-vxworks*)

6594

TOOLS_TARGET_PAIRS="\

6595

- mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \

6596

+ mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb \

6597

indepsw.adb<indepsw-gnu.adb"

6598

;;

6599

- hppa*-hp-hpux10*) # Unlike hpux11

6600

+ hppa*-hp-hpux10*)

6601

;;

6602

hppa*-hp-hpux11*)

6603

TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-hpux.adb"

6604

;;

6605

- *-ibm-aix*)

6606

- TOOLS_TARGET_PAIRS="\

6607

- mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb \

6608

- indepsw.adb<indepsw-aix.adb"

6609

+ ia64-hp-hpux11*)

6610

+ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-ia64-hpux.adb"

6611

;;

6612

- alpha*-dec-vms* | alpha*-dec-openvms* | alpha*-dec-vms* \

6613

- | alpha*-hp-vms* | alpha*-hp-openvms* | alpha*-hp-vms*)

6614

+ alpha*-*-vms* | alpha*-*-openvms*)

6615

TOOLS_TARGET_PAIRS="\

6616

mlib-tgt-specific.adb<mlib-tgt-specific-vms-alpha.adb \

6617

symbols.adb<symbols-vms.adb \

6618

symbols-processing.adb<symbols-processing-vms-alpha.adb"

6619

-

6620

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6621

;;

6622

- ia64*-dec-vms* | ia64*-dec-openvms* | ia64*-dec-vms* \

6623

- | ia64*-hp-vms* | ia64*-hp-openvms* | ia64*-hp-vms*)

6624

+ ia64-*-vms* | ia64-*-openvms*)

6625

TOOLS_TARGET_PAIRS="\

6626

mlib-tgt-specific.adb<mlib-tgt-specific-vms-ia64.adb \

6627

symbols.adb<symbols-vms.adb \

6628

symbols-processing.adb<symbols-processing-vms-ia64.adb"

6629

-

6630

EXTRA_GNATTOOLS='../../gnatlbr$(exeext) ../../gnatsym$(exeext)'

6631

;;

6632

*-*-cygwin32* | *-*-mingw32* | *-*-pe)

6633

@@ -137,14 +130,6 @@

6634

indepsw.adb<indepsw-mingw.adb"

6635

EXTRA_GNATTOOLS='../../gnatdll$(exeext)'

6636

;;

6637

- *-*-darwin*)

6638

- TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb"

6639

- ;;

6640

- *-*-lynxos)

6641

- TOOLS_TARGET_PAIRS="\

6642

- mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb \

6643

- indepsw.adb<indepsw-gnu.adb"

6644

- ;;

6645

esac

6646

6647

# From user or toplevel makefile.

6648

Index: gnattools/ChangeLog

6649

===================================================================

6650

--- a/src/gnattools/ChangeLog (.../tags/gcc_4_8_2_release)

6651

+++ b/src/gnattools/ChangeLog (.../branches/gcc-4_8-branch)

6652

@@ -1,3 +1,23 @@

6653

+2013-12-12 Eric Botcazou <ebotcazou@adacore.com>

6654

+ Iain Sandoe <iain@codesourcery.com>

6655

+

6656

+ PR ada/55946

6657

+ * Makefile.in (host): Define.

6658

+ (host_alias): Likewise.

6659

+ (TOOLS_FLAGS_TO_PASS_RE): Add LDFLAGS.

6660

+ (GNATMAKE_FOR_HOST): Define.

6661

+ (GNATLINK_FOR_HOST): Likewise.

6662

+ (GNATBIND_FOR_HOST): Likewise.

6663

+ (GNATLS_FOR_HOST): Likewise.

6664

+ (RTS_DIR): Move around and use GNATLS_FOR_HOST.

6665

+ (TOOLS_FLAGS_TO_PASS_CROSS): Use the other *_HOST variables.

6666

+

6667

+2013-12-04 Eric Botcazou <ebotcazou@adacore.com>

6668

+

6669

+ PR ada/59382

6670

+ * configure.ac (target parameterization): Rewrite.

6671

+ * configure: Regenerate.

6672

+

6673

2013-10-16 Release Manager

6674

6675

* GCC 4.8.2 released.

6676

Index: maintainer-scripts/ChangeLog

6677

===================================================================

6678

--- a/src/maintainer-scripts/ChangeLog (.../tags/gcc_4_8_2_release)

6679

+++ b/src/maintainer-scripts/ChangeLog (.../branches/gcc-4_8-branch)

6680

@@ -1,3 +1,9 @@

6681

+2014-02-01 Dmitry Gorbachev <d.g.gorbachev@gmail.com>

6682

+

6683

+ PR other/56653

6684

+ * gcc_release: Avoid printing empty line to generated MD5SUMS files.

6685

+ Bump copyright year.

6686

+

6687

2013-10-16 Release Manager

6688

6689

* GCC 4.8.2 released.

6690

Index: maintainer-scripts/gcc_release

6691

===================================================================

6692

--- a/src/maintainer-scripts/gcc_release (.../tags/gcc_4_8_2_release)

6693

+++ b/src/maintainer-scripts/gcc_release (.../branches/gcc-4_8-branch)

6694

@@ -9,7 +9,7 @@

6695

# Contents:

6696

# Script to create a GCC release.

6697

#

6698

6699

6700

#

6701

# This file is part of GCC.

6702

#

6703

@@ -213,7 +213,7 @@

6704

#

6705

# Suggested usage:

6706

# md5sum -c MD5SUMS | grep -v \"OK$\"

6707

-" > MD5SUMS

6708

+#" > MD5SUMS

6709

6710

find . -type f |

6711

sed -e 's:^\./::' -e '/MD5SUMS/d' |

6712

Index: libgcc/config.host

6713

===================================================================

6714

--- a/src/libgcc/config.host (.../tags/gcc_4_8_2_release)

6715

+++ b/src/libgcc/config.host (.../branches/gcc-4_8-branch)

6716

@@ -331,10 +331,10 @@

6717

;;

6718

arm*-*-uclinux*) # ARM ucLinux

6719

tmake_file="${tmake_file} t-fixedpoint-gnu-prefix"

6720

+ tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"

6721

tmake_file="${tmake_file} arm/t-bpabi"

6722

tm_file="$tm_file arm/bpabi-lib.h"

6723

unwind_header=config/arm/unwind-arm.h

6724

- tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"

6725

extra_parts="$extra_parts crti.o crtn.o"

6726

;;

6727

arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)

6728

@@ -718,6 +718,10 @@

6729

tmake_file="${tmake_file} microblaze/t-microblaze t-fdpbit"

6730

extra_parts="$extra_parts crtbeginS.o crtendS.o crtbeginT.o crti.o crtn.o"

6731

;;

6732

+microblaze*-*-rtems*)

6733

+ tmake_file="${tmake_file} microblaze/t-microblaze t-fdpbit"

6734

+ extra_parts="$extra_parts crtbeginS.o crtendS.o crtbeginT.o crti.o crtn.o"

6735

+ ;;

6736

mips*-*-netbsd*) # NetBSD/mips, either endian.

6737

;;

6738

mips*-*-linux*) # Linux MIPS, either endian.

6739

@@ -1081,7 +1085,7 @@

6740

md_unwind_header=tilepro/linux-unwind.h

6741

;;

6742

v850*-*-*)

6743

- tmake_file="v850/t-v850 t-fdpbit"

6744

+ tmake_file="${tmake_file} v850/t-v850 t-fdpbit"

6745

;;

6746

vax-*-linux*)

6747

tmake_file="$tmake_file vax/t-linux"

6748

@@ -1098,7 +1102,7 @@

6749

extra_parts="$extra_parts crti.o crtn.o"

6750

;;

6751

xtensa*-*-linux*)

6752

- tmake_file="$tmake_file xtensa/t-xtensa xtensa/t-linux"

6753

+ tmake_file="$tmake_file xtensa/t-xtensa xtensa/t-linux t-slibgcc-libgcc"

6754

md_unwind_header=xtensa/linux-unwind.h

6755

;;

6756

am33_2.0-*-linux*)

6757

Index: libgcc/ChangeLog

6758

===================================================================

6759

--- a/src/libgcc/ChangeLog (.../tags/gcc_4_8_2_release)

6760

+++ b/src/libgcc/ChangeLog (.../branches/gcc-4_8-branch)

6761

@@ -1,3 +1,206 @@

6762

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

6763

+

6764

+ Backport from mainline r204808:

6765

+

6766

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6767

+ Alan Modra <amodra@gmail.com>

6768

+

6769

+ * config/rs6000/linux-unwind.h (TOC_SAVE_SLOT): Define.

6770

+ (frob_update_context): Use it.

6771

+

6772

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6773

+ Alan Modra <amodra@gmail.com>

6774

+

6775

+ * config/rs6000/tramp.S [__powerpc64__ && _CALL_ELF == 2]:

6776

+ (trampoline_initial): Provide ELFv2 variant.

6777

+ (__trampoline_setup): Likewise.

6778

+

6779

+ * config/rs6000/linux-unwind.h (frob_update_context): Do not

6780

+ check for AIX indirect function call sequence if _CALL_ELF == 2.

6781

+

6782

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6783

+ Alan Modra <amodra@gmail.com>

6784

+

6785

+ * config/rs6000/linux-unwind.h (get_regs): Do not support

6786

+ old kernel versions if _CALL_ELF == 2.

6787

+ (frob_update_context): Do not support PLT stub variants only

6788

+ generated by old linkers if _CALL_ELF == 2.

6789

+

6790

+ Backport from mainline r204800:

6791

+

6792

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

6793

+ Alan Modra <amodra@gmail.com>

6794

+

6795

+ * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Correct

6796

+ location of CR save area for 64-bit little-endian systems.

6797

+

6798

+2014-03-20 Joel Sherrill <joel.sherrill@oarcorp.com>

6799

+

6800

+ * config.host (v850*-*-*): Add to tmake_file instead of resetting it.

6801

+

6802

+2014-02-28 Joey Ye <joey.ye@arm.com>

6803

+

6804

+ Backport from mainline r208229

6805

+ 2014-02-28 Joey Ye <joey.ye@arm.com>

6806

+

6807

+ PR libgcc/60166

6808

+ * config/arm/sfp-machine.h (_FP_NANFRAC_H,

6809

+ _FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q):

6810

+ Set to zero.

6811

+

6812

+2014-02-18 Kai Tietz <ktietz@redhat.com>

6813

+ Jonathan Schleifer <js@webkeks.org>

6814

+

6815

+ PR objc/56870

6816

+ * unwind-seh.c (_GCC_specific_handler): Pass proper

6817

+ value to unwind-handler.

6818

+

6819

+2014-01-25 Walter Lee <walt@tilera.com>

6820

+

6821

+ Backport from mainline

6822

+ 2014-01-25 Walter Lee <walt@tilera.com>

6823

+

6824

+ * config/tilepro/atomic.c (pre_atomic_barrier): Mark inline.

6825

+ (post_atomic_barrier): Ditto.

6826

+ (__fetch_and_do): New macro.

6827

+ (__atomic_fetch_and_do): Use __fetch_and_do.

6828

+ (__sync_fetch_and_do): New macro.

6829

+ (__sync_fetch_and_add_4): New function.

6830

+ (__sync_fetch_and_sub_4): New function.

6831

+ (__sync_fetch_and_or_4): New function.

6832

+ (__sync_fetch_and_and_4): New function.

6833

+ (__sync_fetch_and_xor_4): New function.

6834

+ (__sync_fetch_and_nand_4): New function.

6835

+ (__sync_fetch_and_add_8): New function.

6836

+ (__sync_fetch_and_sub_8): New function.

6837

+ (__sync_fetch_and_or_8): New function.

6838

+ (__sync_fetch_and_and_8): New function.

6839

+ (__sync_fetch_and_xor_8): New function.

6840

+ (__sync_fetch_and_nand_8): New function.

6841

+ (__do_and_fetch): New macro.

6842

+ (__atomic_do_and_fetch): Use __do_and_fetch.

6843

+ (__sync_do_and_fetch): New macro.

6844

+ (__sync_add_and_fetch_4): New function.

6845

+ (__sync_sub_and_fetch_4): New function.

6846

+ (__sync_or_and_fetch_4): New function.

6847

+ (__sync_and_and_fetch_4): New function.

6848

+ (__sync_xor_and_fetch_4): New function.

6849

+ (__sync_nand_and_fetch_4): New function.

6850

+ (__sync_add_and_fetch_8): New function.

6851

+ (__sync_sub_and_fetch_8): New function.

6852

+ (__sync_or_and_fetch_8): New function.

6853

+ (__sync_and_and_fetch_8): New function.

6854

+ (__sync_xor_and_fetch_8): New function.

6855

+ (__sync_nand_and_fetch_8): New function.

6856

+ (__sync_exchange_methods): New macro.

6857

+ (__sync_val_compare_and_swap_4): New function.

6858

+ (__sync_bool_compare_and_swap_4): New function.

6859

+ (__sync_lock_test_and_test_4): New function.

6860

+ (__sync_val_compare_and_swap_8): New function.

6861

+ (__sync_bool_compare_and_swap_8): New function.

6862

+ (__sync_lock_test_and_test_8): New function.

6863

+ (__subword_cmpxchg_body): New macro.

6864

+ (__atomic_compare_exchange_1): Use __subword_cmpxchg_body.

6865

+ (__atomic_compare_exchange_2): Ditto.

6866

+ (__sync_subword_cmpxchg): New macro.

6867

+ (__sync_val_compare_and_swap_1): New function.

6868

+ (__sync_bool_compare_and_swap_1): New function.

6869

+ (__sync_val_compare_and_swap_2): New function.

6870

+ (__sync_bool_compare_and_swap_2): New function.

6871

+ (__atomic_subword): Rename to ...

6872

+ (__subword): ... New name.

6873

+ (__atomic_subword_fetch): Use __subword.

6874

+ (__sync_subword_fetch): New macro.

6875

+ (__sync_fetch_and_add_1): New function.

6876

+ (__sync_fetch_and_sub_1): New function.

6877

+ (__sync_fetch_and_or_1): New function.

6878

+ (__sync_fetch_and_and_1): New function.

6879

+ (__sync_fetch_and_xor_1): New function.

6880

+ (__sync_fetch_and_nand_1): New function.

6881

+ (__sync_fetch_and_add_2): New function.

6882

+ (__sync_fetch_and_sub_2): New function.

6883

+ (__sync_fetch_and_or_2): New function.

6884

+ (__sync_fetch_and_and_2): New function.

6885

+ (__sync_fetch_and_xor_2): New function.

6886

+ (__sync_fetch_and_nand_2): New function.

6887

+ (__sync_add_and_fetch_1): New function.

6888

+ (__sync_sub_and_fetch_1): New function.

6889

+ (__sync_or_and_fetch_1): New function.

6890

+ (__sync_and_and_fetch_1): New function.

6891

+ (__sync_xor_and_fetch_1): New function.

6892

+ (__sync_nand_and_fetch_1): New function.

6893

+ (__sync_add_and_fetch_2): New function.

6894

+ (__sync_sub_and_fetch_2): New function.

6895

+ (__sync_or_and_fetch_2): New function.

6896

+ (__sync_and_and_fetch_2): New function.

6897

+ (__sync_xor_and_fetch_2): New function.

6898

+ (__sync_nand_and_fetch_2): New function.

6899

+ (__atomic_subword_lock): Use __subword.

6900

+ (__sync_subword_lock): New macro.

6901

+ (__sync_lock_test_and_set_1): New function.

6902

+ (__sync_lock_test_and_set_2): New function.

6903

+

6904

+2014-01-25 Walter Lee <walt@tilera.com>

6905

+

6906

+ Backport from mainline

6907

+ 2014-01-25 Walter Lee <walt@tilera.com>

6908

+

6909

+ * config/tilepro/atomic.c (BIT_OFFSET): Define.

6910

+ (__atomic_subword_cmpxchg): Use BIT_OFFSET.

6911

+ (__atomic_subword): Ditto.

6912

+

6913

+2014-01-25 Walter Lee <walt@tilera.com>

6914

+

6915

+ Backport from mainline

6916

+ 2014-01-25 Walter Lee <walt@tilera.com>

6917

+

6918

+ * config/tilepro/atomic.c (__atomic_do_and_fetch): Add

6919

+ a prefix op argument.

6920

+ (__atomic_nand_fetch_4): Add prefix op.

6921

+ (__atomic_nand_fetch_8): Ditto.

6922

+

6923

+2014-01-21 Baruch Siach <barch@tkos.co.il>

6924

+

6925

+ * config.host (tmake_file): add t-slibgcc-libgcc for xtensa*-*-linux*.

6926

+

6927

+2014-01-03 Joseph Myers <joseph@codesourcery.com>

6928

+

6929

+ * config/rs6000/ibm-ldouble.c (__gcc_qdiv): Scale up arguments in

6930

+ case of small numerator and finite nonzero result.

6931

+

6932

+2013-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>

6933

+

6934

+ Backport from trunk r205917.

6935

+ 2013-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>

6936

+ * config.host (arm*-*-uclinux*): Move t-arm before t-bpabi.

6937

+

6938

+2013-12-10 Uros Bizjak <ubizjak@gmail.com>

6939

+

6940

+ * config/i386/sfp-exceptions.c (__sfp_handle_exceptions): Emit SSE

6941

+ instructions when __SSE_MATH__ is defined.

6942

+

6943

+2013-12-06 Ralf Corsépius <ralf.corsepius@rtems.org>

6944

+

6945

+ * config.host (microblaze-*-rtems*): New.

6946

+

6947

+2013-11-10 Kai Tietz <ktietz@redhat.com>

6948

+

6949

+ Back-merged from trunk

6950

+ * config/i386/cygming-crtbegin.c (__gcc_register_frame):

6951

+ Increment load-count on use of LIBGCC_SONAME DLL.

6952

+ (hmod_libgcc): New static variable to hold handle of

6953

+ LIBGCC_SONAME DLL.

6954

+ (__gcc_deregister_frame): Decrement load-count of

6955

+ LIBGCC_SONAME DLL.

6956

+

6957

+2013-11-07 Uros Bizjak <ubizjak@gmail.com>

6958

+

6959

+ * config/i386/sfp-exceptions.c (__sfp_handle_exceptions): Handle

6960

+ FP_EX_DENORM. Store result to volatile location after SSE division

6961

+ to close interrupt window. Remove unneeded fwait after x87

6962

+ division since interrupt window will be closed by emitted fstp.

6963

+ Rewrite FP_EX_INEXACT handling.

6964

+

6965

2013-10-16 Release Manager

6966

6967

* GCC 4.8.2 released.

6968

@@ -151,7 +354,7 @@

6969

* config/mips/crtn.S (fini, init): New labels.

6970

6971

2012-02-19 Edgar E. Iglesias <edgar.iglesias@gmail.com>

6972

- * config/microblaze/modsi3.S (modsi3): Fix case with 0x80000000

6973

+ * config/microblaze/modsi3.S (modsi3): Fix case with 0x80000000

6974

as dividend.

6975

6976

2013-02-16 Alan Modra <amodra@gmail.com>

6977

Index: libgcc/config/i386/sfp-exceptions.c

6978

===================================================================

6979

--- a/src/libgcc/config/i386/sfp-exceptions.c (.../tags/gcc_4_8_2_release)

6980

+++ b/src/libgcc/config/i386/sfp-exceptions.c (.../branches/gcc-4_8-branch)

6981

@@ -47,21 +47,33 @@

6982

if (_fex & FP_EX_INVALID)

6983

{

6984

float f = 0.0f;

6985

-#ifdef __x86_64__

6986

+#ifdef __SSE_MATH__

6987

+ volatile float r __attribute__ ((unused));

6988

asm volatile ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f));

6989

+ r = f; /* Needed to trigger exception. */

6990

#else

6991

asm volatile ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f));

6992

- asm volatile ("fwait");

6993

+ /* No need for fwait, exception is triggered by emitted fstp. */

6994

#endif

6995

}

6996

+ if (_fex & FP_EX_DENORM)

6997

+ {

6998

+ struct fenv temp;

6999

+ asm volatile ("fnstenv\t%0" : "=m" (temp));

7000

+ temp.__status_word |= FP_EX_DENORM;

7001

+ asm volatile ("fldenv\t%0" : : "m" (temp));

7002

+ asm volatile ("fwait");

7003

+ }

7004

if (_fex & FP_EX_DIVZERO)

7005

{

7006

float f = 1.0f, g = 0.0f;

7007

-#ifdef __x86_64__

7008

+#ifdef __SSE_MATH__

7009

+ volatile float r __attribute__ ((unused));

7010

asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));

7011

+ r = f; /* Needed to trigger exception. */

7012

#else

7013

asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));

7014

- asm volatile ("fwait");

7015

+ /* No need for fwait, exception is triggered by emitted fstp. */

7016

#endif

7017

}

7018

if (_fex & FP_EX_OVERFLOW)

7019

@@ -82,11 +94,15 @@

7020

}

7021

if (_fex & FP_EX_INEXACT)

7022

{

7023

- struct fenv temp;

7024

- asm volatile ("fnstenv\t%0" : "=m" (temp));

7025

- temp.__status_word |= FP_EX_INEXACT;

7026

- asm volatile ("fldenv\t%0" : : "m" (temp));

7027

- asm volatile ("fwait");

7028

+ float f = 1.0f, g = 3.0f;

7029

+#ifdef __SSE_MATH__

7030

+ volatile float r __attribute__ ((unused));

7031

+ asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));

7032

+ r = f; /* Needed to trigger exception. */

7033

+#else

7034

+ asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));

7035

+ /* No need for fwait, exception is triggered by emitted fstp. */

7036

+#endif

7037

}

7038

};

7039

#endif

7040

Index: libgcc/config/i386/cygming-crtbegin.c

7041

===================================================================

7042

--- a/src/libgcc/config/i386/cygming-crtbegin.c (.../tags/gcc_4_8_2_release)

7043

+++ b/src/libgcc/config/i386/cygming-crtbegin.c (.../branches/gcc-4_8-branch)

7044

@@ -69,6 +69,9 @@

7045

= { };

7046

7047

static struct object obj;

7048

+

7049

+/* Handle of libgcc's DLL reference. */

7050

+HANDLE hmod_libgcc;

7051

#endif

7052

7053

#if TARGET_USE_JCR_SECTION

7054

@@ -93,9 +96,14 @@

7055

7056

void (*register_frame_fn) (const void *, struct object *);

7057

HANDLE h = GetModuleHandle (LIBGCC_SONAME);

7058

+

7059

if (h)

7060

- register_frame_fn = (void (*) (const void *, struct object *))

7061

- GetProcAddress (h, "__register_frame_info");

7062

+ {

7063

+ /* Increasing the load-count of LIBGCC_SONAME DLL. */

7064

+ hmod_libgcc = LoadLibrary (LIBGCC_SONAME);

7065

+ register_frame_fn = (void (*) (const void *, struct object *))

7066

+ GetProcAddress (h, "__register_frame_info");

7067

+ }

7068

else

7069

register_frame_fn = __register_frame_info;

7070

if (register_frame_fn)

7071

@@ -132,5 +140,7 @@

7072

deregister_frame_fn = __deregister_frame_info;

7073

if (deregister_frame_fn)

7074

deregister_frame_fn (__EH_FRAME_BEGIN__);

7075

+ if (hmod_libgcc)

7076

+ FreeLibrary (hmod_libgcc);

7077

#endif

7078

}

7079

Index: libgcc/config/rs6000/tramp.S

7080

===================================================================

7081

--- a/src/libgcc/config/rs6000/tramp.S (.../tags/gcc_4_8_2_release)

7082

+++ b/src/libgcc/config/rs6000/tramp.S (.../branches/gcc-4_8-branch)

7083

@@ -116,4 +116,70 @@

7084

7085

#endif

7086

7087

+#elif _CALL_ELF == 2

7088

+ .type trampoline_initial,@object

7089

+ .align 3

7090

+trampoline_initial:

7091

+ ld r11,.Lchain(r12)

7092

+ ld r12,.Lfunc(r12)

7093

+ mtctr r12

7094

+ bctr

7095

+.Lfunc = .-trampoline_initial

7096

+ .quad 0 /* will be replaced with function address */

7097

+.Lchain = .-trampoline_initial

7098

+ .quad 0 /* will be replaced with static chain */

7099

+

7100

+trampoline_size = .-trampoline_initial

7101

+ .size trampoline_initial,trampoline_size

7102

+

7103

+

7104

+/* R3 = stack address to store trampoline */

7105

+/* R4 = length of trampoline area */

7106

+/* R5 = function address */

7107

+/* R6 = static chain */

7108

+

7109

+ .pushsection ".toc","aw"

7110

+.LC0:

7111

+ .quad trampoline_initial-8

7112

+ .popsection

7113

+

7114

+FUNC_START(__trampoline_setup)

7115

+ addis 7,2,.LC0@toc@ha

7116

+ ld 7,.LC0@toc@l(7) /* trampoline address -8 */

7117

+

7118

+ li r8,trampoline_size /* verify that the trampoline is big enough */

7119

+ cmpw cr1,r8,r4

7120

+ srwi r4,r4,3 /* # doublewords to move */

7121

+ addi r9,r3,-8 /* adjust pointer for stdu */

7122

+ mtctr r4

7123

+ blt cr1,.Labort

7124

+

7125

+ /* Copy the instructions to the stack */

7126

+.Lmove:

7127

+ ldu r10,8(r7)

7128

+ stdu r10,8(r9)

7129

+ bdnz .Lmove

7130

+

7131

+ /* Store correct function and static chain */

7132

+ std r5,.Lfunc(r3)

7133

+ std r6,.Lchain(r3)

7134

+

7135

+ /* Now flush both caches */

7136

+ mtctr r4

7137

+.Lcache:

7138

+ icbi 0,r3

7139

+ dcbf 0,r3

7140

+ addi r3,r3,8

7141

+ bdnz .Lcache

7142

+

7143

+ /* Finally synchronize things & return */

7144

+ sync

7145

+ isync

7146

+ blr

7147

+

7148

+.Labort:

7149

+ bl JUMP_TARGET(abort)

7150

+ nop

7151

+FUNC_END(__trampoline_setup)

7152

+

7153

#endif

7154

Index: libgcc/config/rs6000/linux-unwind.h

7155

===================================================================

7156

--- a/src/libgcc/config/rs6000/linux-unwind.h (.../tags/gcc_4_8_2_release)

7157

+++ b/src/libgcc/config/rs6000/linux-unwind.h (.../branches/gcc-4_8-branch)

7158

@@ -24,9 +24,19 @@

7159

7160

#define R_LR 65

7161

#define R_CR2 70

7162

+#define R_CR3 71

7163

+#define R_CR4 72

7164

#define R_VR0 77

7165

#define R_VRSAVE 109

7166

7167

+#ifdef __powerpc64__

7168

+#if _CALL_ELF == 2

7169

+#define TOC_SAVE_SLOT 24

7170

+#else

7171

+#define TOC_SAVE_SLOT 40

7172

+#endif

7173

+#endif

7174

+

7175

struct gcc_vregs

7176

{

7177

__attribute__ ((vector_size (16))) int vr[32];

7178

@@ -107,6 +117,8 @@

7179

}

7180

else if (pc[1] == 0x380000AC)

7181

{

7182

+#if _CALL_ELF != 2

7183

+ /* These old kernel versions never supported ELFv2. */

7184

/* This works for 2.4 kernels, but not for 2.6 kernels with vdso

7185

because pc isn't pointing into the stack. Can be removed when

7186

no one is running 2.4.19 or 2.4.20, the first two ppc64

7187

@@ -121,6 +133,7 @@

7188

if ((long) frame24->puc != -21 * 8)

7189

return frame24->puc->regs;

7190

else

7191

+#endif

7192

{

7193

/* This works for 2.4.21 and later kernels. */

7194

struct rt_sigframe {

7195

@@ -185,6 +198,7 @@

7196

{

7197

struct gcc_regs *regs = get_regs (context);

7198

struct gcc_vregs *vregs;

7199

+ long cr_offset;

7200

long new_cfa;

7201

int i;

7202

7203

@@ -206,11 +220,21 @@

7204

fs->regs.reg[i].loc.offset = (long) &regs->gpr[i] - new_cfa;

7205

}

7206

7207

+ /* The CR is saved in the low 32 bits of regs->ccr. */

7208

+ cr_offset = (long) &regs->ccr - new_cfa;

7209

+#ifndef __LITTLE_ENDIAN__

7210

+ cr_offset += sizeof (long) - 4;

7211

+#endif

7212

+ /* In the ELFv1 ABI, CR2 stands in for the whole CR. */

7213

fs->regs.reg[R_CR2].how = REG_SAVED_OFFSET;

7214

- /* CR? regs are always 32-bit and PPC is big-endian, so in 64-bit

7215

- libgcc loc.offset needs to point to the low 32 bits of regs->ccr. */

7216

- fs->regs.reg[R_CR2].loc.offset = (long) &regs->ccr - new_cfa

7217

- + sizeof (long) - 4;

7218

+ fs->regs.reg[R_CR2].loc.offset = cr_offset;

7219

+#if _CALL_ELF == 2

7220

+ /* In the ELFv2 ABI, every CR field has a separate CFI entry. */

7221

+ fs->regs.reg[R_CR3].how = REG_SAVED_OFFSET;

7222

+ fs->regs.reg[R_CR3].loc.offset = cr_offset;

7223

+ fs->regs.reg[R_CR4].how = REG_SAVED_OFFSET;

7224

+ fs->regs.reg[R_CR4].loc.offset = cr_offset;

7225

+#endif

7226

7227

fs->regs.reg[R_LR].how = REG_SAVED_OFFSET;

7228

fs->regs.reg[R_LR].loc.offset = (long) &regs->link - new_cfa;

7229

@@ -294,9 +318,13 @@

7230

figure out if it was saved. The big problem here is that the

7231

code that does the save/restore is generated by the linker, so

7232

we have no good way to determine at compile time what to do. */

7233

- if (pc[0] == 0xF8410028

7234

+ if (pc[0] == 0xF8410000 + TOC_SAVE_SLOT

7235

+#if _CALL_ELF != 2

7236

+ /* The ELFv2 linker never generates the old PLT stub form. */

7237

|| ((pc[0] & 0xFFFF0000) == 0x3D820000

7238

- && pc[1] == 0xF8410028))

7239

+ && pc[1] == 0xF8410000 + TOC_SAVE_SLOT)

7240

+#endif

7241

+ )

7242

{

7243

/* We are in a plt call stub or r2 adjusting long branch stub,

7244

before r2 has been saved. Keep REG_UNSAVED. */

7245

@@ -305,10 +333,12 @@

7246

{

7247

unsigned int *insn

7248

= (unsigned int *) _Unwind_GetGR (context, R_LR);

7249

- if (insn && *insn == 0xE8410028)

7250

- _Unwind_SetGRPtr (context, 2, context->cfa + 40);

7251

+ if (insn && *insn == 0xE8410000 + TOC_SAVE_SLOT)

7252

+ _Unwind_SetGRPtr (context, 2, context->cfa + TOC_SAVE_SLOT);

7253

+#if _CALL_ELF != 2

7254

+ /* ELFv2 does not use this function pointer call sequence. */

7255

else if (pc[0] == 0x4E800421

7256

- && pc[1] == 0xE8410028)

7257

+ && pc[1] == 0xE8410000 + TOC_SAVE_SLOT)

7258

{

7259

/* We are at the bctrl instruction in a call via function

7260

pointer. gcc always emits the load of the new R2 just

7261

@@ -315,8 +345,9 @@

7262

before the bctrl so this is the first and only place

7263

we need to use the stored R2. */

7264

_Unwind_Word sp = _Unwind_GetGR (context, 1);

7265

- _Unwind_SetGRPtr (context, 2, (void *)(sp + 40));

7266

+ _Unwind_SetGRPtr (context, 2, (void *)(sp + TOC_SAVE_SLOT));

7267

}

7268

+#endif

7269

}

7270

}

7271

#endif

7272

Index: libgcc/config/rs6000/ibm-ldouble.c

7273

===================================================================

7274

--- a/src/libgcc/config/rs6000/ibm-ldouble.c (.../tags/gcc_4_8_2_release)

7275

+++ b/src/libgcc/config/rs6000/ibm-ldouble.c (.../branches/gcc-4_8-branch)

7276

@@ -188,7 +188,16 @@

7277

|| nonfinite (t))

7278

return t;

7279

7280

- /* Finite nonzero result requires corrections to the highest order term. */

7281

+ /* Finite nonzero result requires corrections to the highest order

7282

+ term. These corrections require the low part of c * t to be

7283

+ exactly represented in double. */

7284

+ if (fabs (a) <= 0x1p-969)

7285

+ {

7286

+ a *= 0x1p106;

7287

+ b *= 0x1p106;

7288

+ c *= 0x1p106;

7289

+ d *= 0x1p106;

7290

+ }

7291

7292

s = c * t; /* (s,sigma) = c*t exactly. */

7293

w = -(-b + d * t); /* Written to get fnmsub for speed, but not

7294

Index: libgcc/config/tilepro/atomic.c

7295

===================================================================

7296

--- a/src/libgcc/config/tilepro/atomic.c (.../tags/gcc_4_8_2_release)

7297

+++ b/src/libgcc/config/tilepro/atomic.c (.../branches/gcc-4_8-branch)

7298

@@ -28,7 +28,7 @@

7299

/* This code should be inlined by the compiler, but for now support

7300

it as out-of-line methods in libgcc. */

7301

7302

-static void

7303

+static inline void

7304

pre_atomic_barrier (int model)

7305

{

7306

switch ((enum memmodel) model)

7307

@@ -44,7 +44,7 @@

7308

return;

7309

}

7310

7311

-static void

7312

+static inline void

7313

post_atomic_barrier (int model)

7314

{

7315

switch ((enum memmodel) model)

7316

@@ -62,16 +62,21 @@

7317

7318

#define __unused __attribute__((unused))

7319

7320

-#define __atomic_fetch_and_do(type, size, opname) \

7321

-type \

7322

-__atomic_fetch_##opname##_##size(type* p, type i, int model) \

7323

+#define __fetch_and_do(proto, type, size, opname, top, bottom) \

7324

+proto \

7325

{ \

7326

- pre_atomic_barrier(model); \

7327

+ top; \

7328

type rv = arch_atomic_##opname(p, i); \

7329

- post_atomic_barrier(model); \

7330

+ bottom; \

7331

return rv; \

7332

}

7333

7334

+#define __atomic_fetch_and_do(type, size, opname) \

7335

+ __fetch_and_do(type __atomic_fetch_##opname##_##size(type* p, type i, int model), \

7336

+ type, size, opname, \

7337

+ pre_atomic_barrier(model), \

7338

+ post_atomic_barrier(model)) \

7339

+

7340

__atomic_fetch_and_do (int, 4, add)

7341

__atomic_fetch_and_do (int, 4, sub)

7342

__atomic_fetch_and_do (int, 4, or)

7343

@@ -84,27 +89,73 @@

7344

__atomic_fetch_and_do (long long, 8, and)

7345

__atomic_fetch_and_do (long long, 8, xor)

7346

__atomic_fetch_and_do (long long, 8, nand)

7347

-#define __atomic_do_and_fetch(type, size, opname, op) \

7348

-type \

7349

-__atomic_##opname##_fetch_##size(type* p, type i, int model) \

7350

-{ \

7351

- pre_atomic_barrier(model); \

7352

- type rv = arch_atomic_##opname(p, i) op i; \

7353

- post_atomic_barrier(model); \

7354

- return rv; \

7355

+

7356

+#define __sync_fetch_and_do(type, size, opname) \

7357

+ __fetch_and_do(type __sync_fetch_and_##opname##_##size(type* p, type i), \

7358

+ type, size, opname, \

7359

+ arch_atomic_write_barrier(), \

7360

+ arch_atomic_read_barrier())

7361

+

7362

+__sync_fetch_and_do (int, 4, add)

7363

+__sync_fetch_and_do (int, 4, sub)

7364

+__sync_fetch_and_do (int, 4, or)

7365

+__sync_fetch_and_do (int, 4, and)

7366

+__sync_fetch_and_do (int, 4, xor)

7367

+__sync_fetch_and_do (int, 4, nand)

7368

+__sync_fetch_and_do (long long, 8, add)

7369

+__sync_fetch_and_do (long long, 8, sub)

7370

+__sync_fetch_and_do (long long, 8, or)

7371

+__sync_fetch_and_do (long long, 8, and)

7372

+__sync_fetch_and_do (long long, 8, xor)

7373

+__sync_fetch_and_do (long long, 8, nand)

7374

+

7375

+#define __do_and_fetch(proto, type, size, opname, op, op2, top, bottom) \

7376

+proto \

7377

+{ \

7378

+ top; \

7379

+ type rv = op2 (arch_atomic_##opname(p, i) op i); \

7380

+ bottom; \

7381

+ return rv; \

7382

}

7383

-__atomic_do_and_fetch (int, 4, add, +)

7384

-__atomic_do_and_fetch (int, 4, sub, -)

7385

-__atomic_do_and_fetch (int, 4, or, |)

7386

-__atomic_do_and_fetch (int, 4, and, &)

7387

-__atomic_do_and_fetch (int, 4, xor, |)

7388

-__atomic_do_and_fetch (int, 4, nand, &)

7389

-__atomic_do_and_fetch (long long, 8, add, +)

7390

-__atomic_do_and_fetch (long long, 8, sub, -)

7391

-__atomic_do_and_fetch (long long, 8, or, |)

7392

-__atomic_do_and_fetch (long long, 8, and, &)

7393

-__atomic_do_and_fetch (long long, 8, xor, |)

7394

-__atomic_do_and_fetch (long long, 8, nand, &)

7395

+

7396

+#define __atomic_do_and_fetch(type, size, opname, op, op2) \

7397

+ __do_and_fetch(type __atomic_##opname##_fetch_##size(type* p, type i, int model), \

7398

+ type, size, opname, op, op2, \

7399

+ pre_atomic_barrier(model), \

7400

+ post_atomic_barrier(model)) \

7401

+

7402

+__atomic_do_and_fetch (int, 4, add, +, )

7403

+__atomic_do_and_fetch (int, 4, sub, -, )

7404

+__atomic_do_and_fetch (int, 4, or, |, )

7405

+__atomic_do_and_fetch (int, 4, and, &, )

7406

+__atomic_do_and_fetch (int, 4, xor, |, )

7407

+__atomic_do_and_fetch (int, 4, nand, &, ~)

7408

+__atomic_do_and_fetch (long long, 8, add, +, )

7409

+__atomic_do_and_fetch (long long, 8, sub, -, )

7410

+__atomic_do_and_fetch (long long, 8, or, |, )

7411

+__atomic_do_and_fetch (long long, 8, and, &, )

7412

+__atomic_do_and_fetch (long long, 8, xor, |, )

7413

+__atomic_do_and_fetch (long long, 8, nand, &, ~)

7414

+

7415

+#define __sync_do_and_fetch(type, size, opname, op, op2) \

7416

+ __do_and_fetch(type __sync_##opname##_and_fetch_##size(type* p, type i), \

7417

+ type, size, opname, op, op2, \

7418

+ arch_atomic_write_barrier(), \

7419

+ arch_atomic_read_barrier()) \

7420

+

7421

+__sync_do_and_fetch (int, 4, add, +, )

7422

+__sync_do_and_fetch (int, 4, sub, -, )

7423

+__sync_do_and_fetch (int, 4, or, |, )

7424

+__sync_do_and_fetch (int, 4, and, &, )

7425

+__sync_do_and_fetch (int, 4, xor, |, )

7426

+__sync_do_and_fetch (int, 4, nand, &, ~)

7427

+__sync_do_and_fetch (long long, 8, add, +, )

7428

+__sync_do_and_fetch (long long, 8, sub, -, )

7429

+__sync_do_and_fetch (long long, 8, or, |, )

7430

+__sync_do_and_fetch (long long, 8, and, &, )

7431

+__sync_do_and_fetch (long long, 8, xor, |, )

7432

+__sync_do_and_fetch (long long, 8, nand, &, ~)

7433

+

7434

#define __atomic_exchange_methods(type, size) \

7435

bool \

7436

__atomic_compare_exchange_##size(volatile type* ptr, type* oldvalp, \

7437

@@ -128,49 +179,117 @@

7438

post_atomic_barrier(model); \

7439

return retval; \

7440

}

7441

+

7442

__atomic_exchange_methods (int, 4)

7443

__atomic_exchange_methods (long long, 8)

7444

7445

+#define __sync_exchange_methods(type, size) \

7446

+type \

7447

+__sync_val_compare_and_swap_##size(type* ptr, type oldval, type newval) \

7448

+{ \

7449

+ arch_atomic_write_barrier(); \

7450

+ type retval = arch_atomic_val_compare_and_exchange(ptr, oldval, newval); \

7451

+ arch_atomic_read_barrier(); \

7452

+ return retval; \

7453

+} \

7454

+ \

7455

+bool \

7456

+__sync_bool_compare_and_swap_##size(type* ptr, type oldval, type newval) \

7457

+{ \

7458

+ arch_atomic_write_barrier(); \

7459

+ bool retval = arch_atomic_bool_compare_and_exchange(ptr, oldval, newval); \

7460

+ arch_atomic_read_barrier(); \

7461

+ return retval; \

7462

+} \

7463

+ \

7464

+type \

7465

+__sync_lock_test_and_set_##size(type* ptr, type val) \

7466

+{ \

7467

+ type retval = arch_atomic_exchange(ptr, val); \

7468

+ arch_atomic_acquire_barrier_value(retval); \

7469

+ return retval; \

7470

+}

7471

+

7472

+__sync_exchange_methods (int, 4)

7473

+__sync_exchange_methods (long long, 8)

7474

+

7475

+#ifdef __LITTLE_ENDIAN__

7476

+#define BIT_OFFSET(n, type) ((n) * 8)

7477

+#else

7478

+#define BIT_OFFSET(n, type) ((4 - sizeof(type) - (n)) * 8)

7479

+#endif

7480

+

7481

/* Subword methods require the same approach for both TILEPro and

7482

TILE-Gx. We load the background data for the word, insert the

7483

desired subword piece, then compare-and-exchange it into place. */

7484

#define u8 unsigned char

7485

#define u16 unsigned short

7486

+

7487

+#define __subword_cmpxchg_body(type, size, ptr, guess, val) \

7488

+ ({ \

7489

+ unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \

7490

+ const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type); \

7491

+ const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \

7492

+ const unsigned int bgmask = ~(valmask << shift); \

7493

+ unsigned int oldword = *p; \

7494

+ type oldval = (oldword >> shift) & valmask; \

7495

+ if (__builtin_expect((oldval == guess), 1)) { \

7496

+ unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \

7497

+ oldword = arch_atomic_val_compare_and_exchange(p, oldword, word); \

7498

+ oldval = (oldword >> shift) & valmask; \

7499

+ } \

7500

+ oldval; \

7501

+ }) \

7502

+

7503

#define __atomic_subword_cmpxchg(type, size) \

7504

\

7505

bool \

7506

-__atomic_compare_exchange_##size(volatile type* ptr, type* guess, \

7507

+__atomic_compare_exchange_##size(volatile type* ptr, type* guess_ptr, \

7508

type val, bool weak __unused, int models, \

7509

int modelf __unused) \

7510

{ \

7511

pre_atomic_barrier(models); \

7512

- unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \

7513

- const int shift = ((unsigned long)ptr & 3UL) * 8; \

7514

- const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \

7515

- const unsigned int bgmask = ~(valmask << shift); \

7516

- unsigned int oldword = *p; \

7517

- type oldval = (oldword >> shift) & valmask; \

7518

- if (__builtin_expect((oldval == *guess), 1)) { \

7519

- unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \

7520

- oldword = arch_atomic_val_compare_and_exchange(p, oldword, word); \

7521

- oldval = (oldword >> shift) & valmask; \

7522

- } \

7523

+ type guess = *guess_ptr; \

7524

+ type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val); \

7525

post_atomic_barrier(models); \

7526

- bool success = (oldval == *guess); \

7527

- *guess = oldval; \

7528

+ bool success = (oldval == guess); \

7529

+ *guess_ptr = oldval; \

7530

return success; \

7531

}

7532

+

7533

__atomic_subword_cmpxchg (u8, 1)

7534

__atomic_subword_cmpxchg (u16, 2)

7535

+

7536

+#define __sync_subword_cmpxchg(type, size) \

7537

+ \

7538

+type \

7539

+__sync_val_compare_and_swap_##size(type* ptr, type guess, type val) \

7540

+{ \

7541

+ arch_atomic_write_barrier(); \

7542

+ type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val); \

7543

+ arch_atomic_read_barrier(); \

7544

+ return oldval; \

7545

+} \

7546

+ \

7547

+bool \

7548

+__sync_bool_compare_and_swap_##size(type* ptr, type guess, type val) \

7549

+{ \

7550

+ type oldval = __sync_val_compare_and_swap_##size(ptr, guess, val); \

7551

+ return oldval == guess; \

7552

+}

7553

+

7554

+__sync_subword_cmpxchg (u8, 1)

7555

+__sync_subword_cmpxchg (u16, 2)

7556

+

7557

/* For the atomic-update subword methods, we use the same approach as

7558

above, but we retry until we succeed if the compare-and-exchange

7559

fails. */

7560

-#define __atomic_subword(type, proto, top, expr, bottom) \

7561

+#define __subword(type, proto, top, expr, bottom) \

7562

proto \

7563

{ \

7564

top \

7565

unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \

7566

- const int shift = ((unsigned long)ptr & 3UL) * 8; \

7567

+ const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type); \

7568

const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \

7569

const unsigned int bgmask = ~(valmask << shift); \

7570

unsigned int oldword, xword = *p; \

7571

@@ -184,12 +303,14 @@

7572

} while (__builtin_expect(xword != oldword, 0)); \

7573

bottom \

7574

}

7575

+

7576

#define __atomic_subword_fetch(type, funcname, expr, retval) \

7577

- __atomic_subword(type, \

7578

- type __atomic_ ## funcname(volatile type *ptr, type i, int model), \

7579

- pre_atomic_barrier(model);, \

7580

- expr, \

7581

- post_atomic_barrier(model); return retval;)

7582

+ __subword(type, \

7583

+ type __atomic_ ## funcname(volatile type *ptr, type i, int model), \

7584

+ pre_atomic_barrier(model);, \

7585

+ expr, \

7586

+ post_atomic_barrier(model); return retval;)

7587

+

7588

__atomic_subword_fetch (u8, fetch_add_1, oldval + i, oldval)

7589

__atomic_subword_fetch (u8, fetch_sub_1, oldval - i, oldval)

7590

__atomic_subword_fetch (u8, fetch_or_1, oldval | i, oldval)

7591

@@ -196,6 +317,7 @@

7592

__atomic_subword_fetch (u8, fetch_and_1, oldval & i, oldval)

7593

__atomic_subword_fetch (u8, fetch_xor_1, oldval ^ i, oldval)

7594

__atomic_subword_fetch (u8, fetch_nand_1, ~(oldval & i), oldval)

7595

+

7596

__atomic_subword_fetch (u16, fetch_add_2, oldval + i, oldval)

7597

__atomic_subword_fetch (u16, fetch_sub_2, oldval - i, oldval)

7598

__atomic_subword_fetch (u16, fetch_or_2, oldval | i, oldval)

7599

@@ -202,6 +324,7 @@

7600

__atomic_subword_fetch (u16, fetch_and_2, oldval & i, oldval)

7601

__atomic_subword_fetch (u16, fetch_xor_2, oldval ^ i, oldval)

7602

__atomic_subword_fetch (u16, fetch_nand_2, ~(oldval & i), oldval)

7603

+

7604

__atomic_subword_fetch (u8, add_fetch_1, oldval + i, val)

7605

__atomic_subword_fetch (u8, sub_fetch_1, oldval - i, val)

7606

__atomic_subword_fetch (u8, or_fetch_1, oldval | i, val)

7607

@@ -208,6 +331,7 @@

7608

__atomic_subword_fetch (u8, and_fetch_1, oldval & i, val)

7609

__atomic_subword_fetch (u8, xor_fetch_1, oldval ^ i, val)

7610

__atomic_subword_fetch (u8, nand_fetch_1, ~(oldval & i), val)

7611

+

7612

__atomic_subword_fetch (u16, add_fetch_2, oldval + i, val)

7613

__atomic_subword_fetch (u16, sub_fetch_2, oldval - i, val)

7614

__atomic_subword_fetch (u16, or_fetch_2, oldval | i, val)

7615

@@ -214,12 +338,58 @@

7616

__atomic_subword_fetch (u16, and_fetch_2, oldval & i, val)

7617

__atomic_subword_fetch (u16, xor_fetch_2, oldval ^ i, val)

7618

__atomic_subword_fetch (u16, nand_fetch_2, ~(oldval & i), val)

7619

+

7620

+#define __sync_subword_fetch(type, funcname, expr, retval) \

7621

+ __subword(type, \

7622

+ type __sync_ ## funcname(type *ptr, type i), \

7623

+ arch_atomic_read_barrier();, \

7624

+ expr, \

7625

+ arch_atomic_write_barrier(); return retval;)

7626

+

7627

+__sync_subword_fetch (u8, fetch_and_add_1, oldval + i, oldval)

7628

+__sync_subword_fetch (u8, fetch_and_sub_1, oldval - i, oldval)

7629

+__sync_subword_fetch (u8, fetch_and_or_1, oldval | i, oldval)

7630

+__sync_subword_fetch (u8, fetch_and_and_1, oldval & i, oldval)

7631

+__sync_subword_fetch (u8, fetch_and_xor_1, oldval ^ i, oldval)

7632

+__sync_subword_fetch (u8, fetch_and_nand_1, ~(oldval & i), oldval)

7633

+

7634

+__sync_subword_fetch (u16, fetch_and_add_2, oldval + i, oldval)

7635

+__sync_subword_fetch (u16, fetch_and_sub_2, oldval - i, oldval)

7636

+__sync_subword_fetch (u16, fetch_and_or_2, oldval | i, oldval)

7637

+__sync_subword_fetch (u16, fetch_and_and_2, oldval & i, oldval)

7638

+__sync_subword_fetch (u16, fetch_and_xor_2, oldval ^ i, oldval)

7639

+__sync_subword_fetch (u16, fetch_and_nand_2, ~(oldval & i), oldval)

7640

+

7641

+__sync_subword_fetch (u8, add_and_fetch_1, oldval + i, val)

7642

+__sync_subword_fetch (u8, sub_and_fetch_1, oldval - i, val)

7643

+__sync_subword_fetch (u8, or_and_fetch_1, oldval | i, val)

7644

+__sync_subword_fetch (u8, and_and_fetch_1, oldval & i, val)

7645

+__sync_subword_fetch (u8, xor_and_fetch_1, oldval ^ i, val)

7646

+__sync_subword_fetch (u8, nand_and_fetch_1, ~(oldval & i), val)

7647

+

7648

+__sync_subword_fetch (u16, add_and_fetch_2, oldval + i, val)

7649

+__sync_subword_fetch (u16, sub_and_fetch_2, oldval - i, val)

7650

+__sync_subword_fetch (u16, or_and_fetch_2, oldval | i, val)

7651

+__sync_subword_fetch (u16, and_and_fetch_2, oldval & i, val)

7652

+__sync_subword_fetch (u16, xor_and_fetch_2, oldval ^ i, val)

7653

+__sync_subword_fetch (u16, nand_and_fetch_2, ~(oldval & i), val)

7654

+

7655

#define __atomic_subword_lock(type, size) \

7656

- \

7657

-__atomic_subword(type, \

7658

- type __atomic_exchange_##size(volatile type* ptr, type nval, int model), \

7659

- pre_atomic_barrier(model);, \

7660

- nval, \

7661

- post_atomic_barrier(model); return oldval;)

7662

+ __subword(type, \

7663

+ type __atomic_exchange_##size(volatile type* ptr, type nval, int model), \

7664

+ pre_atomic_barrier(model);, \

7665

+ nval, \

7666

+ post_atomic_barrier(model); return oldval;)

7667

+

7668

__atomic_subword_lock (u8, 1)

7669

__atomic_subword_lock (u16, 2)

7670

+

7671

+#define __sync_subword_lock(type, size) \

7672

+ __subword(type, \

7673

+ type __sync_lock_test_and_set_##size(type* ptr, type nval), \

7674

+ , \

7675

+ nval, \

7676

+ arch_atomic_acquire_barrier_value(oldval); return oldval;)

7677

+

7678

+__sync_subword_lock (u8, 1)

7679

+__sync_subword_lock (u16, 2)

7680

Index: libgcc/config/arm/sfp-machine.h

7681

===================================================================

7682

--- a/src/libgcc/config/arm/sfp-machine.h (.../tags/gcc_4_8_2_release)

7683

+++ b/src/libgcc/config/arm/sfp-machine.h (.../branches/gcc-4_8-branch)

7684

@@ -19,10 +19,12 @@

7685

#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)

7686

#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)

7687

7688

-#define _FP_NANFRAC_H ((_FP_QNANBIT_H << 1) - 1)

7689

-#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)

7690

-#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1

7691

-#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1

7692

+/* According to RTABI, QNAN is only with the most significant bit of the

7693

+ significand set, and all other significand bits zero. */

7694

+#define _FP_NANFRAC_H 0

7695

+#define _FP_NANFRAC_S 0

7696

+#define _FP_NANFRAC_D 0, 0

7697

+#define _FP_NANFRAC_Q 0, 0, 0, 0

7698

#define _FP_NANSIGN_H 0

7699

#define _FP_NANSIGN_S 0

7700

#define _FP_NANSIGN_D 0

7701

Index: libgcc/unwind-seh.c

7702

===================================================================

7703

--- a/src/libgcc/unwind-seh.c (.../tags/gcc_4_8_2_release)

7704

+++ b/src/libgcc/unwind-seh.c (.../branches/gcc-4_8-branch)

7705

@@ -313,8 +313,9 @@

7706

ms_exc->ExceptionInformation[3] = gcc_context.reg[1];

7707

7708

/* Begin phase 2. Perform the unwinding. */

7709

- RtlUnwindEx (this_frame, gcc_context.ra, ms_exc, gcc_exc,

7710

- ms_orig_context, ms_disp->HistoryTable);

7711

+ RtlUnwindEx (this_frame, gcc_context.ra, ms_exc,

7712

+ (PVOID)gcc_context.reg[0], ms_orig_context,

7713

+ ms_disp->HistoryTable);

7714

}

7715

7716

/* In _Unwind_RaiseException we return _URC_FATAL_PHASE1_ERROR. */

7717

Index: config.guess

7718

===================================================================

7719

--- a/src/config.guess (.../tags/gcc_4_8_2_release)

7720

+++ b/src/config.guess (.../branches/gcc-4_8-branch)

7721

@@ -1,10 +1,8 @@

7722

#! /bin/sh

7723

# Attempt to guess a canonical system name.

7724

7725

-# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,

7726

-# 2011, 2012, 2013 Free Software Foundation, Inc.

7727

7728

7729

-timestamp='2012-12-30'

7730

+timestamp='2013-06-10'

7731

7732

# This file is free software; you can redistribute it and/or modify it

7733

# under the terms of the GNU General Public License as published by

7734

@@ -52,9 +50,7 @@

7735

GNU config.guess ($timestamp)

7736

7737

Originally written by Per Bothner.

7738

7739

-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,

7740

-2012, 2013 Free Software Foundation, Inc.

7741

7742

7743

This is free software; see the source for copying conditions. There is NO

7744

warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."

7745

@@ -136,6 +132,27 @@

7746

UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown

7747

UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown

7748

7749

+case "${UNAME_SYSTEM}" in

7750

+Linux|GNU|GNU/*)

7751

+ # If the system lacks a compiler, then just pick glibc.

7752

+ # We could probably try harder.

7753

+ LIBC=gnu

7754

+

7755

+ eval $set_cc_for_build

7756

+ cat <<-EOF > $dummy.c

7757

+ #include <features.h>

7758

+ #if defined(__UCLIBC__)

7759

+ LIBC=uclibc

7760

+ #elif defined(__dietlibc__)

7761

+ LIBC=dietlibc

7762

+ #else

7763

+ LIBC=gnu

7764

+ #endif

7765

+ EOF

7766

+ eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'`

7767

+ ;;

7768

+esac

7769

+

7770

# Note: order is significant - the case branches are not exclusive.

7771

7772

case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in

7773

@@ -857,21 +874,21 @@

7774

exit ;;

7775

*:GNU:*:*)

7776

# the GNU system

7777

- echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'`

7778

+ echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-${LIBC}`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'`

7779

exit ;;

7780

*:GNU/*:*:*)

7781

# other systems with GNU libc and userland

7782

- echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-gnu

7783

+ echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-${LIBC}

7784

exit ;;

7785

i*86:Minix:*:*)

7786

echo ${UNAME_MACHINE}-pc-minix

7787

exit ;;

7788

aarch64:Linux:*:*)

7789

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7790

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7791

exit ;;

7792

aarch64_be:Linux:*:*)

7793

UNAME_MACHINE=aarch64_be

7794

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7795

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7796

exit ;;

7797

alpha:Linux:*:*)

7798

case `sed -n '/^cpu model/s/^.*: $.*$/\1/p' < /proc/cpuinfo` in

7799

@@ -884,59 +901,54 @@

7800

EV68*) UNAME_MACHINE=alphaev68 ;;

7801

esac

7802

objdump --private-headers /bin/sh | grep -q ld.so.1

7803

- if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi

7804

- echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC}

7805

+ if test "$?" = 0 ; then LIBC="gnulibc1" ; fi

7806

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7807

exit ;;

7808

+ arc:Linux:*:* | arceb:Linux:*:*)

7809

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7810

+ exit ;;

7811

arm*:Linux:*:*)

7812

eval $set_cc_for_build

7813

if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \

7814

| grep -q __ARM_EABI__

7815

then

7816

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7817

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7818

else

7819

if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \

7820

| grep -q __ARM_PCS_VFP

7821

then

7822

- echo ${UNAME_MACHINE}-unknown-linux-gnueabi

7823

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabi

7824

else

7825

- echo ${UNAME_MACHINE}-unknown-linux-gnueabihf

7826

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabihf

7827

fi

7828

fi

7829

exit ;;

7830

avr32*:Linux:*:*)

7831

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7832

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7833

exit ;;

7834

cris:Linux:*:*)

7835

- echo ${UNAME_MACHINE}-axis-linux-gnu

7836

+ echo ${UNAME_MACHINE}-axis-linux-${LIBC}

7837

exit ;;

7838

crisv32:Linux:*:*)

7839

- echo ${UNAME_MACHINE}-axis-linux-gnu

7840

+ echo ${UNAME_MACHINE}-axis-linux-${LIBC}

7841

exit ;;

7842

frv:Linux:*:*)

7843

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7844

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7845

exit ;;

7846

hexagon:Linux:*:*)

7847

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7848

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7849

exit ;;

7850

i*86:Linux:*:*)

7851

- LIBC=gnu

7852

- eval $set_cc_for_build

7853

- sed 's/^ //' << EOF >$dummy.c

7854

- #ifdef __dietlibc__

7855

- LIBC=dietlibc

7856

- #endif

7857

-EOF

7858

- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'`

7859

- echo "${UNAME_MACHINE}-pc-linux-${LIBC}"

7860

+ echo ${UNAME_MACHINE}-pc-linux-${LIBC}

7861

exit ;;

7862

ia64:Linux:*:*)

7863

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7864

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7865

exit ;;

7866

m32r*:Linux:*:*)

7867

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7868

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7869

exit ;;

7870

m68*:Linux:*:*)

7871

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7872

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7873

exit ;;

7874

mips:Linux:*:* | mips64:Linux:*:*)

7875

eval $set_cc_for_build

7876

@@ -955,54 +967,63 @@

7877

#endif

7878

EOF

7879

eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'`

7880

- test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; }

7881

+ test x"${CPU}" != x && { echo "${CPU}-unknown-linux-${LIBC}"; exit; }

7882

;;

7883

+ or1k:Linux:*:*)

7884

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7885

+ exit ;;

7886

or32:Linux:*:*)

7887

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7888

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7889

exit ;;

7890

padre:Linux:*:*)

7891

- echo sparc-unknown-linux-gnu

7892

+ echo sparc-unknown-linux-${LIBC}

7893

exit ;;

7894

parisc64:Linux:*:* | hppa64:Linux:*:*)

7895

- echo hppa64-unknown-linux-gnu

7896

+ echo hppa64-unknown-linux-${LIBC}

7897

exit ;;

7898

parisc:Linux:*:* | hppa:Linux:*:*)

7899

# Look for CPU level

7900

case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in

7901

- PA7*) echo hppa1.1-unknown-linux-gnu ;;

7902

- PA8*) echo hppa2.0-unknown-linux-gnu ;;

7903

- *) echo hppa-unknown-linux-gnu ;;

7904

+ PA7*) echo hppa1.1-unknown-linux-${LIBC} ;;

7905

+ PA8*) echo hppa2.0-unknown-linux-${LIBC} ;;

7906

+ *) echo hppa-unknown-linux-${LIBC} ;;

7907

esac

7908

exit ;;

7909

ppc64:Linux:*:*)

7910

- echo powerpc64-unknown-linux-gnu

7911

+ echo powerpc64-unknown-linux-${LIBC}

7912

exit ;;

7913

ppc:Linux:*:*)

7914

- echo powerpc-unknown-linux-gnu

7915

+ echo powerpc-unknown-linux-${LIBC}

7916

exit ;;

7917

+ ppc64le:Linux:*:*)

7918

+ echo powerpc64le-unknown-linux-${LIBC}

7919

+ exit ;;

7920

+ ppcle:Linux:*:*)

7921

+ echo powerpcle-unknown-linux-${LIBC}

7922

+ exit ;;

7923

s390:Linux:*:* | s390x:Linux:*:*)

7924

- echo ${UNAME_MACHINE}-ibm-linux

7925

+ echo ${UNAME_MACHINE}-ibm-linux-${LIBC}

7926

exit ;;

7927

sh64*:Linux:*:*)

7928

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7929

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7930

exit ;;

7931

sh*:Linux:*:*)

7932

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7933

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7934

exit ;;

7935

sparc:Linux:*:* | sparc64:Linux:*:*)

7936

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7937

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7938

exit ;;

7939

tile*:Linux:*:*)

7940

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7941

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7942

exit ;;

7943

vax:Linux:*:*)

7944

- echo ${UNAME_MACHINE}-dec-linux-gnu

7945

+ echo ${UNAME_MACHINE}-dec-linux-${LIBC}

7946

exit ;;

7947

x86_64:Linux:*:*)

7948

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7949

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7950

exit ;;

7951

xtensa*:Linux:*:*)

7952

- echo ${UNAME_MACHINE}-unknown-linux-gnu

7953

+ echo ${UNAME_MACHINE}-unknown-linux-${LIBC}

7954

exit ;;

7955

i*86:DYNIX/ptx:4*:*)

7956

# ptx 4.0 does uname -s correctly, with DYNIX/ptx in there.

7957

@@ -1235,19 +1256,21 @@

7958

exit ;;

7959

*:Darwin:*:*)

7960

UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown

7961

- case $UNAME_PROCESSOR in

7962

- i386)

7963

- eval $set_cc_for_build

7964

- if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then

7965

- if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \

7966

- (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \

7967

- grep IS_64BIT_ARCH >/dev/null

7968

- then

7969

- UNAME_PROCESSOR="x86_64"

7970

- fi

7971

- fi ;;

7972

- unknown) UNAME_PROCESSOR=powerpc ;;

7973

- esac

7974

+ eval $set_cc_for_build

7975

+ if test "$UNAME_PROCESSOR" = unknown ; then

7976

+ UNAME_PROCESSOR=powerpc

7977

+ fi

7978

+ if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then

7979

+ if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \

7980

+ (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \

7981

+ grep IS_64BIT_ARCH >/dev/null

7982

+ then

7983

+ case $UNAME_PROCESSOR in

7984

+ i386) UNAME_PROCESSOR=x86_64 ;;

7985

+ powerpc) UNAME_PROCESSOR=powerpc64 ;;

7986

+ esac

7987

+ fi

7988

+ fi

7989

echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE}

7990

exit ;;

7991

*:procnto*:*:* | *:QNX:[0123456789]*:*)

7992

Index: gcc/tree-vrp.c

7993

===================================================================

7994

--- a/src/gcc/tree-vrp.c (.../tags/gcc_4_8_2_release)

7995

+++ b/src/gcc/tree-vrp.c (.../branches/gcc-4_8-branch)

7996

@@ -5271,9 +5271,13 @@

7997

}

7998

else if (CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (op_def)))

7999

{

8000

- /* Recurse through the type conversion. */

8001

- retval |= register_edge_assert_for_1 (gimple_assign_rhs1 (op_def),

8002

- code, e, bsi);

8003

+ /* Recurse through the type conversion, unless it is a narrowing

8004

+ conversion or conversion from non-integral type. */

8005

+ tree rhs = gimple_assign_rhs1 (op_def);

8006

+ if (INTEGRAL_TYPE_P (TREE_TYPE (rhs))

8007

+ && (TYPE_PRECISION (TREE_TYPE (rhs))

8008

+ <= TYPE_PRECISION (TREE_TYPE (op))))

8009

+ retval |= register_edge_assert_for_1 (rhs, code, e, bsi);

8010

}

8011

8012

return retval;

8013

@@ -7453,7 +7457,8 @@

8014

}

8015

else if ((operand_less_p (vr1min, *vr0max) == 1

8016

|| operand_equal_p (vr1min, *vr0max, 0))

8017

- && operand_less_p (*vr0min, vr1min) == 1)

8018

+ && operand_less_p (*vr0min, vr1min) == 1

8019

+ && operand_less_p (*vr0max, vr1max) == 1)

8020

{

8021

/* [ ( ] ) or [ ]( ) */

8022

if (*vr0type == VR_RANGE

8023

@@ -7487,7 +7492,8 @@

8024

}

8025

else if ((operand_less_p (*vr0min, vr1max) == 1

8026

|| operand_equal_p (*vr0min, vr1max, 0))

8027

- && operand_less_p (vr1min, *vr0min) == 1)

8028

+ && operand_less_p (vr1min, *vr0min) == 1

8029

+ && operand_less_p (vr1max, *vr0max) == 1)

8030

{

8031

/* ( [ ) ] or ( )[ ] */

8032

if (*vr0type == VR_RANGE

8033

Index: gcc/loop-unswitch.c

8034

===================================================================

8035

--- a/src/gcc/loop-unswitch.c (.../tags/gcc_4_8_2_release)

8036

+++ b/src/gcc/loop-unswitch.c (.../branches/gcc-4_8-branch)

8037

@@ -191,6 +191,7 @@

8038

if (!test)

8039

return NULL_RTX;

8040

8041

+ mode = VOIDmode;

8042

for (i = 0; i < 2; i++)

8043

{

8044

op[i] = XEXP (test, i);

8045

@@ -205,11 +206,15 @@

8046

return NULL_RTX;

8047

8048

op[i] = get_iv_value (&iv, const0_rtx);

8049

+ if (iv.extend != IV_UNKNOWN_EXTEND

8050

+ && iv.mode != iv.extend_mode)

8051

+ op[i] = lowpart_subreg (iv.mode, op[i], iv.extend_mode);

8052

+ if (mode == VOIDmode)

8053

+ mode = iv.mode;

8054

+ else

8055

+ gcc_assert (mode == iv.mode);

8056

}

8057

8058

- mode = GET_MODE (op[0]);

8059

- if (mode == VOIDmode)

8060

- mode = GET_MODE (op[1]);

8061

if (GET_MODE_CLASS (mode) == MODE_CC)

8062

{

8063

if (at != BB_END (bb))

8064

Index: gcc/tree-ssa-loop-im.c

8065

===================================================================

8066

--- a/src/gcc/tree-ssa-loop-im.c (.../tags/gcc_4_8_2_release)

8067

+++ b/src/gcc/tree-ssa-loop-im.c (.../branches/gcc-4_8-branch)

8068

@@ -1190,6 +1190,67 @@

8069

fini_walk_dominator_tree (&walk_data);

8070

}

8071

8072

+/* Return true if CODE is an operation that when operating on signed

8073

+ integer types involves undefined behavior on overflow and the

8074

+ operation can be expressed with unsigned arithmetic. */

8075

+

8076

+static bool

8077

+arith_code_with_undefined_signed_overflow (tree_code code)

8078

+{

8079

+ switch (code)

8080

+ {

8081

+ case PLUS_EXPR:

8082

+ case MINUS_EXPR:

8083

+ case MULT_EXPR:

8084

+ case NEGATE_EXPR:

8085

+ case POINTER_PLUS_EXPR:

8086

+ return true;

8087

+ default:

8088

+ return false;

8089

+ }

8090

+}

8091

+

8092

+/* Rewrite STMT, an assignment with a signed integer or pointer arithmetic

8093

+ operation that can be transformed to unsigned arithmetic by converting

8094

+ its operand, carrying out the operation in the corresponding unsigned

8095

+ type and converting the result back to the original type.

8096

+

8097

+ Returns a sequence of statements that replace STMT and also contain

8098

+ a modified form of STMT itself. */

8099

+

8100

+static gimple_seq

8101

+rewrite_to_defined_overflow (gimple stmt)

8102

+{

8103

+ if (dump_file && (dump_flags & TDF_DETAILS))

8104

+ {

8105

+ fprintf (dump_file, "rewriting stmt with undefined signed "

8106

+ "overflow ");

8107

+ print_gimple_stmt (dump_file, stmt, 0, TDF_SLIM);

8108

+ }

8109

+

8110

+ tree lhs = gimple_assign_lhs (stmt);

8111

+ tree type = unsigned_type_for (TREE_TYPE (lhs));

8112

+ gimple_seq stmts = NULL;

8113

+ for (unsigned i = 1; i < gimple_num_ops (stmt); ++i)

8114

+ {

8115

+ gimple_seq stmts2 = NULL;

8116

+ gimple_set_op (stmt, i,

8117

+ force_gimple_operand (fold_convert (type,

8118

+ gimple_op (stmt, i)),

8119

+ &stmts2, true, NULL_TREE));

8120

+ gimple_seq_add_seq (&stmts, stmts2);

8121

+ }

8122

+ gimple_assign_set_lhs (stmt, make_ssa_name (type, stmt));

8123

+ if (gimple_assign_rhs_code (stmt) == POINTER_PLUS_EXPR)

8124

+ gimple_assign_set_rhs_code (stmt, PLUS_EXPR);

8125

+ gimple_seq_add_stmt (&stmts, stmt);

8126

+ gimple cvt = gimple_build_assign_with_ops

8127

+ (NOP_EXPR, lhs, gimple_assign_lhs (stmt), NULL_TREE);

8128

+ gimple_seq_add_stmt (&stmts, cvt);

8129

+

8130

+ return stmts;

8131

+}

8132

+

8133

/* Hoist the statements in basic block BB out of the loops prescribed by

8134

data stored in LIM_DATA structures associated with each statement. Callback

8135

for walk_dominator_tree. */

8136

@@ -1321,7 +1382,21 @@

8137

}

8138

}

8139

gsi_remove (&bsi, false);

8140

- gsi_insert_on_edge (e, stmt);

8141

+ /* In case this is a stmt that is not unconditionally executed

8142

+ when the target loop header is executed and the stmt may

8143

+ invoke undefined integer or pointer overflow rewrite it to

8144

+ unsigned arithmetic. */

8145

+ if (is_gimple_assign (stmt)

8146

+ && INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_lhs (stmt)))

8147

+ && TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (gimple_assign_lhs (stmt)))

8148

+ && arith_code_with_undefined_signed_overflow

8149

+ (gimple_assign_rhs_code (stmt))

8150

+ && (!ALWAYS_EXECUTED_IN (bb)

8151

+ || !(ALWAYS_EXECUTED_IN (bb) == level

8152

+ || flow_loop_nested_p (ALWAYS_EXECUTED_IN (bb), level))))

8153

+ gsi_insert_seq_on_edge (e, rewrite_to_defined_overflow (stmt));

8154

+ else

8155

+ gsi_insert_on_edge (e, stmt);

8156

}

8157

}

8158

8159

@@ -1992,6 +2067,7 @@

8160

gimple_stmt_iterator gsi;

8161

gimple stmt;

8162

struct prev_flag_edges *prev_edges = (struct prev_flag_edges *) ex->aux;

8163

+ bool irr = ex->flags & EDGE_IRREDUCIBLE_LOOP;

8164

8165

/* ?? Insert store after previous store if applicable. See note

8166

below. */

8167

@@ -2006,8 +2082,9 @@

8168

old_dest = ex->dest;

8169

new_bb = split_edge (ex);

8170

then_bb = create_empty_bb (new_bb);

8171

- if (current_loops && new_bb->loop_father)

8172

- add_bb_to_loop (then_bb, new_bb->loop_father);

8173

+ if (irr)

8174

+ then_bb->flags = BB_IRREDUCIBLE_LOOP;

8175

+ add_bb_to_loop (then_bb, new_bb->loop_father);

8176

8177

gsi = gsi_start_bb (new_bb);

8178

stmt = gimple_build_cond (NE_EXPR, flag, boolean_false_node,

8179

@@ -2019,9 +2096,12 @@

8180

stmt = gimple_build_assign (unshare_expr (mem), tmp_var);

8181

gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING);

8182

8183

- make_edge (new_bb, then_bb, EDGE_TRUE_VALUE);

8184

- make_edge (new_bb, old_dest, EDGE_FALSE_VALUE);

8185

- then_old_edge = make_edge (then_bb, old_dest, EDGE_FALLTHRU);

8186

+ make_edge (new_bb, then_bb,

8187

+ EDGE_TRUE_VALUE | (irr ? EDGE_IRREDUCIBLE_LOOP : 0));

8188

+ make_edge (new_bb, old_dest,

8189

+ EDGE_FALSE_VALUE | (irr ? EDGE_IRREDUCIBLE_LOOP : 0));

8190

+ then_old_edge = make_edge (then_bb, old_dest,

8191

+ EDGE_FALLTHRU | (irr ? EDGE_IRREDUCIBLE_LOOP : 0));

8192

8193

set_immediate_dominator (CDI_DOMINATORS, then_bb, new_bb);

8194

8195

Index: gcc/tree-ssa-tail-merge.c

8196

===================================================================

8197

--- a/src/gcc/tree-ssa-tail-merge.c (.../tags/gcc_4_8_2_release)

8198

+++ b/src/gcc/tree-ssa-tail-merge.c (.../branches/gcc-4_8-branch)

8199

@@ -297,7 +297,8 @@

8200

tree val;

8201

def_operand_p def_p;

8202

8203

- if (gimple_has_side_effects (stmt))

8204

+ if (gimple_has_side_effects (stmt)

8205

+ || gimple_vdef (stmt) != NULL_TREE)

8206

return false;

8207

8208

def_p = SINGLE_SSA_DEF_OPERAND (stmt, SSA_OP_DEF);

8209

Index: gcc/cgraphbuild.c

8210

===================================================================

8211

--- a/src/gcc/cgraphbuild.c (.../tags/gcc_4_8_2_release)

8212

+++ b/src/gcc/cgraphbuild.c (.../branches/gcc-4_8-branch)

8213

@@ -73,7 +73,7 @@

8214

decl = get_base_var (*tp);

8215

if (TREE_CODE (decl) == FUNCTION_DECL)

8216

{

8217

- struct cgraph_node *node = cgraph_get_create_node (decl);

8218

+ struct cgraph_node *node = cgraph_get_create_real_symbol_node (decl);

8219

if (!ctx->only_vars)

8220

cgraph_mark_address_taken_node (node);

8221

ipa_record_reference ((symtab_node)ctx->varpool_node,

8222

@@ -143,7 +143,7 @@

8223

{

8224

struct cgraph_node *per_node;

8225

8226

- per_node = cgraph_get_create_node (DECL_FUNCTION_PERSONALITY (node->symbol.decl));

8227

+ per_node = cgraph_get_create_real_symbol_node (DECL_FUNCTION_PERSONALITY (node->symbol.decl));

8228

ipa_record_reference ((symtab_node)node, (symtab_node)per_node, IPA_REF_ADDR, NULL);

8229

cgraph_mark_address_taken_node (per_node);

8230

}

8231

@@ -218,12 +218,12 @@

8232

/* Mark address taken in STMT. */

8233

8234

static bool

8235

-mark_address (gimple stmt, tree addr, void *data)

8236

+mark_address (gimple stmt, tree addr, tree, void *data)

8237

{

8238

addr = get_base_address (addr);

8239

if (TREE_CODE (addr) == FUNCTION_DECL)

8240

{

8241

- struct cgraph_node *node = cgraph_get_create_node (addr);

8242

+ struct cgraph_node *node = cgraph_get_create_real_symbol_node (addr);

8243

cgraph_mark_address_taken_node (node);

8244

ipa_record_reference ((symtab_node)data,

8245

(symtab_node)node,

8246

@@ -245,7 +245,7 @@

8247

/* Mark load of T. */

8248

8249

static bool

8250

-mark_load (gimple stmt, tree t, void *data)

8251

+mark_load (gimple stmt, tree t, tree, void *data)

8252

{

8253

t = get_base_address (t);

8254

if (t && TREE_CODE (t) == FUNCTION_DECL)

8255

@@ -252,7 +252,7 @@

8256

{

8257

/* ??? This can happen on platforms with descriptors when these are

8258

directly manipulated in the code. Pretend that it's an address. */

8259

- struct cgraph_node *node = cgraph_get_create_node (t);

8260

+ struct cgraph_node *node = cgraph_get_create_real_symbol_node (t);

8261

cgraph_mark_address_taken_node (node);

8262

ipa_record_reference ((symtab_node)data,

8263

(symtab_node)node,

8264

@@ -273,7 +273,7 @@

8265

/* Mark store of T. */

8266

8267

static bool

8268

-mark_store (gimple stmt, tree t, void *data)

8269

+mark_store (gimple stmt, tree t, tree, void *data)

8270

{

8271

t = get_base_address (t);

8272

if (t && TREE_CODE (t) == VAR_DECL

8273

@@ -330,7 +330,7 @@

8274

{

8275

tree fn = gimple_omp_parallel_child_fn (stmt);

8276

ipa_record_reference ((symtab_node)node,

8277

- (symtab_node)cgraph_get_create_node (fn),

8278

+ (symtab_node)cgraph_get_create_real_symbol_node (fn),

8279

IPA_REF_ADDR, stmt);

8280

}

8281

if (gimple_code (stmt) == GIMPLE_OMP_TASK)

8282

@@ -338,12 +338,12 @@

8283

tree fn = gimple_omp_task_child_fn (stmt);

8284

if (fn)

8285

ipa_record_reference ((symtab_node)node,

8286

- (symtab_node) cgraph_get_create_node (fn),

8287

+ (symtab_node) cgraph_get_create_real_symbol_node (fn),

8288

IPA_REF_ADDR, stmt);

8289

fn = gimple_omp_task_copy_fn (stmt);

8290

if (fn)

8291

ipa_record_reference ((symtab_node)node,

8292

- (symtab_node)cgraph_get_create_node (fn),

8293

+ (symtab_node)cgraph_get_create_real_symbol_node (fn),

8294

IPA_REF_ADDR, stmt);

8295

}

8296

}

8297

Index: gcc/tree-ssa-uninit.c

8298

===================================================================

8299

--- a/src/gcc/tree-ssa-uninit.c (.../tags/gcc_4_8_2_release)

8300

+++ b/src/gcc/tree-ssa-uninit.c (.../branches/gcc-4_8-branch)

8301

@@ -36,6 +36,7 @@

8302

#include "hashtab.h"

8303

#include "tree-pass.h"

8304

#include "diagnostic-core.h"

8305

+#include "params.h"

8306

8307

/* This implements the pass that does predicate aware warning on uses of

8308

possibly uninitialized variables. The pass first collects the set of

8309

@@ -246,8 +247,8 @@

8310

8311

/* Computes the control dependence chains (paths of edges)

8312

for DEP_BB up to the dominating basic block BB (the head node of a

8313

- chain should be dominated by it). CD_CHAINS is pointer to a

8314

- dynamic array holding the result chains. CUR_CD_CHAIN is the current

8315

+ chain should be dominated by it). CD_CHAINS is pointer to an

8316

+ array holding the result chains. CUR_CD_CHAIN is the current

8317

chain being computed. *NUM_CHAINS is total number of chains. The

8318

function returns true if the information is successfully computed,

8319

return false if there is no control dependence or not computed. */

8320

@@ -256,7 +257,8 @@

8321

compute_control_dep_chain (basic_block bb, basic_block dep_bb,

8322

vec<edge> *cd_chains,

8323

size_t *num_chains,

8324

- vec<edge> *cur_cd_chain)

8325

+ vec<edge> *cur_cd_chain,

8326

+ int *num_calls)

8327

{

8328

edge_iterator ei;

8329

edge e;

8330

@@ -267,6 +269,10 @@

8331

if (EDGE_COUNT (bb->succs) < 2)

8332

return false;

8333

8334

+ if (*num_calls > PARAM_VALUE (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS))

8335

+ return false;

8336

+ ++*num_calls;

8337

+

8338

/* Could use a set instead. */

8339

cur_chain_len = cur_cd_chain->length ();

8340

if (cur_chain_len > MAX_CHAIN_LEN)

8341

@@ -306,7 +312,7 @@

8342

8343

/* Now check if DEP_BB is indirectly control dependent on BB. */

8344

if (compute_control_dep_chain (cd_bb, dep_bb, cd_chains,

8345

- num_chains, cur_cd_chain))

8346

+ num_chains, cur_cd_chain, num_calls))

8347

{

8348

found_cd_chain = true;

8349

break;

8350

@@ -438,14 +444,12 @@

8351

basic_block use_bb)

8352

{

8353

size_t num_chains = 0, i;

8354

- vec<edge> *dep_chains = 0;

8355

+ int num_calls = 0;

8356

+ vec<edge> dep_chains[MAX_NUM_CHAINS];

8357

vec<edge> cur_chain = vNULL;

8358

bool has_valid_pred = false;

8359

basic_block cd_root = 0;

8360

8361

- typedef vec<edge> vec_edge_heap;

8362

- dep_chains = XCNEWVEC (vec_edge_heap, MAX_NUM_CHAINS);

8363

-

8364

/* First find the closest bb that is control equivalent to PHI_BB

8365

that also dominates USE_BB. */

8366

cd_root = phi_bb;

8367

@@ -458,20 +462,16 @@

8368

break;

8369

}

8370

8371

- compute_control_dep_chain (cd_root, use_bb,

8372

- dep_chains, &num_chains,

8373

- &cur_chain);

8374

+ compute_control_dep_chain (cd_root, use_bb, dep_chains, &num_chains,

8375

+ &cur_chain, &num_calls);

8376

8377

has_valid_pred

8378

- = convert_control_dep_chain_into_preds (dep_chains,

8379

- num_chains,

8380

- preds,

8381

- num_preds);

8382

+ = convert_control_dep_chain_into_preds (dep_chains, num_chains, preds,

8383

+ num_preds);

8384

/* Free individual chain */

8385

cur_chain.release ();

8386

for (i = 0; i < num_chains; i++)

8387

dep_chains[i].release ();

8388

- free (dep_chains);

8389

return has_valid_pred;

8390

}

8391

8392

@@ -539,7 +539,7 @@

8393

size_t *num_preds, gimple phi)

8394

{

8395

size_t num_chains = 0, i, n;

8396

- vec<edge> *dep_chains = 0;

8397

+ vec<edge> dep_chains[MAX_NUM_CHAINS];

8398

vec<edge> cur_chain = vNULL;

8399

vec<edge> def_edges = vNULL;

8400

bool has_valid_pred = false;

8401

@@ -546,9 +546,6 @@

8402

basic_block phi_bb, cd_root = 0;

8403

struct pointer_set_t *visited_phis;

8404

8405

- typedef vec<edge> vec_edge_heap;

8406

- dep_chains = XCNEWVEC (vec_edge_heap, MAX_NUM_CHAINS);

8407

-

8408

phi_bb = gimple_bb (phi);

8409

/* First find the closest dominating bb to be

8410

the control dependence root */

8411

@@ -567,38 +564,33 @@

8412

for (i = 0; i < n; i++)

8413

{

8414

size_t prev_nc, j;

8415

+ int num_calls = 0;

8416

edge opnd_edge;

8417

8418

opnd_edge = def_edges[i];

8419

prev_nc = num_chains;

8420

- compute_control_dep_chain (cd_root, opnd_edge->src,

8421

- dep_chains, &num_chains,

8422

- &cur_chain);

8423

- /* Free individual chain */

8424

- cur_chain.release ();

8425

+ compute_control_dep_chain (cd_root, opnd_edge->src, dep_chains,

8426

+ &num_chains, &cur_chain, &num_calls);

8427

8428

/* Now update the newly added chains with

8429

the phi operand edge: */

8430

if (EDGE_COUNT (opnd_edge->src->succs) > 1)

8431

{

8432

- if (prev_nc == num_chains

8433

- && num_chains < MAX_NUM_CHAINS)

8434

- num_chains++;

8435

+ if (prev_nc == num_chains && num_chains < MAX_NUM_CHAINS)

8436

+ dep_chains[num_chains++] = vNULL;

8437

for (j = prev_nc; j < num_chains; j++)

8438

- {

8439

- dep_chains[j].safe_push (opnd_edge);

8440

- }

8441

+ dep_chains[j].safe_push (opnd_edge);

8442

}

8443

}

8444

8445

+ /* Free individual chain */

8446

+ cur_chain.release ();

8447

+

8448

has_valid_pred

8449

- = convert_control_dep_chain_into_preds (dep_chains,

8450

- num_chains,

8451

- preds,

8452

- num_preds);

8453

+ = convert_control_dep_chain_into_preds (dep_chains, num_chains, preds,

8454

+ num_preds);

8455

for (i = 0; i < num_chains; i++)

8456

dep_chains[i].release ();

8457

- free (dep_chains);

8458

return has_valid_pred;

8459

}

8460

8461

Index: gcc/tree-ssa-loop-niter.c

8462

===================================================================

8463

--- a/src/gcc/tree-ssa-loop-niter.c (.../tags/gcc_4_8_2_release)

8464

+++ b/src/gcc/tree-ssa-loop-niter.c (.../branches/gcc-4_8-branch)

8465

@@ -2075,7 +2075,8 @@

8466

return NULL;

8467

}

8468

8469

- if (gimple_code (stmt) != GIMPLE_ASSIGN)

8470

+ if (gimple_code (stmt) != GIMPLE_ASSIGN

8471

+ || gimple_assign_rhs_class (stmt) == GIMPLE_TERNARY_RHS)

8472

return NULL;

8473

8474

code = gimple_assign_rhs_code (stmt);

8475

@@ -2143,7 +2144,7 @@

8476

{

8477

gimple stmt;

8478

8479

- gcc_assert (is_gimple_min_invariant (base));

8480

+ gcc_checking_assert (is_gimple_min_invariant (base));

8481

8482

if (!x)

8483

return base;

8484

@@ -2152,7 +2153,7 @@

8485

if (gimple_code (stmt) == GIMPLE_PHI)

8486

return base;

8487

8488

- gcc_assert (is_gimple_assign (stmt));

8489

+ gcc_checking_assert (is_gimple_assign (stmt));

8490

8491

/* STMT must be either an assignment of a single SSA name or an

8492

expression involving an SSA name and a constant. Try to fold that

8493

Index: gcc/c-family/c.opt

8494

===================================================================

8495

--- a/src/gcc/c-family/c.opt (.../tags/gcc_4_8_2_release)

8496

+++ b/src/gcc/c-family/c.opt (.../branches/gcc-4_8-branch)

8497

@@ -933,7 +933,7 @@

8498

Recognize GNU-defined keywords

8499

8500

fgnu-runtime

8501

-ObjC ObjC++ Report RejectNegative Var(flag_next_runtime,0) Init(NEXT_OBJC_RUNTIME)

8502

+ObjC ObjC++ LTO Report RejectNegative Var(flag_next_runtime,0) Init(NEXT_OBJC_RUNTIME)

8503

Generate code for GNU runtime environment

8504

8505

fgnu89-inline

8506

@@ -1007,7 +1007,7 @@

8507

C++ ObjC++ Ignore Warn(switch %qs is no longer supported)

8508

8509

fnext-runtime

8510

-ObjC ObjC++ Report RejectNegative Var(flag_next_runtime)

8511

+ObjC ObjC++ LTO Report RejectNegative Var(flag_next_runtime)

8512

Generate code for NeXT (Apple Mac OS X) runtime environment

8513

8514

fnil-receivers

8515

@@ -1025,7 +1025,7 @@

8516

Treat a throw() exception specification as noexcept to improve code size

8517

8518

fobjc-abi-version=

8519

-ObjC ObjC++ Joined Report RejectNegative UInteger Var(flag_objc_abi)

8520

+ObjC ObjC++ LTO Joined Report RejectNegative UInteger Var(flag_objc_abi)

8521

Specify which ABI to use for Objective-C family code and meta-data generation.

8522

8523

; Generate special '- .cxx_construct' and '- .cxx_destruct' methods

8524

@@ -1045,7 +1045,7 @@

8525

Enable Objective-C exception and synchronization syntax

8526

8527

fobjc-gc

8528

-ObjC ObjC++ Var(flag_objc_gc)

8529

+ObjC ObjC++ LTO Var(flag_objc_gc)

8530

Enable garbage collection (GC) in Objective-C/Objective-C++ programs

8531

8532

fobjc-nilcheck

8533

@@ -1105,7 +1105,7 @@

8534

-fno-pretty-templates Do not pretty-print template specializations as the template signature followed by the arguments

8535

8536

freplace-objc-classes

8537

-ObjC ObjC++ Var(flag_replace_objc_classes)

8538

+ObjC ObjC++ LTO Var(flag_replace_objc_classes)

8539

Used in Fix-and-Continue mode to indicate that object files may be swapped in at runtime

8540

8541

frepo

8542

Index: gcc/c-family/c-opts.c

8543

===================================================================

8544

--- a/src/gcc/c-family/c-opts.c (.../tags/gcc_4_8_2_release)

8545

+++ b/src/gcc/c-family/c-opts.c (.../branches/gcc-4_8-branch)

8546

@@ -840,6 +840,12 @@

8547

if (flag_objc_exceptions && !flag_objc_sjlj_exceptions)

8548

flag_exceptions = 1;

8549

8550

+ /* If -ffreestanding, -fno-hosted or -fno-builtin then disable

8551

+ pattern recognition. */

8552

+ if (!global_options_set.x_flag_tree_loop_distribute_patterns

8553

+ && flag_no_builtin)

8554

+ flag_tree_loop_distribute_patterns = 0;

8555

+

8556

/* -Woverlength-strings is off by default, but is enabled by -Wpedantic.

8557

It is never enabled in C++, as the minimum limit is not normative

8558

in that standard. */

8559

@@ -1258,17 +1264,18 @@

8560

{

8561

size_t i;

8562

8563

- {

8564

- /* Make sure all of the builtins about to be declared have

8565

- BUILTINS_LOCATION has their source_location. */

8566

- source_location builtins_loc = BUILTINS_LOCATION;

8567

- cpp_force_token_locations (parse_in, &builtins_loc);

8568

+ cb_file_change (parse_in,

8569

+ linemap_add (line_table, LC_RENAME, 0,

8570

+ _("<built-in>"), 0));

8571

+ /* Make sure all of the builtins about to be declared have

8572

+ BUILTINS_LOCATION has their source_location. */

8573

+ source_location builtins_loc = BUILTINS_LOCATION;

8574

+ cpp_force_token_locations (parse_in, &builtins_loc);

8575

8576

- cpp_init_builtins (parse_in, flag_hosted);

8577

- c_cpp_builtins (parse_in);

8578

+ cpp_init_builtins (parse_in, flag_hosted);

8579

+ c_cpp_builtins (parse_in);

8580

8581

- cpp_stop_forcing_token_locations (parse_in);

8582

- }

8583

+ cpp_stop_forcing_token_locations (parse_in);

8584

8585

/* We're about to send user input to cpplib, so make it warn for

8586

things that we previously (when we sent it internal definitions)

8587

Index: gcc/c-family/ChangeLog

8588

===================================================================

8589

--- a/src/gcc/c-family/ChangeLog (.../tags/gcc_4_8_2_release)

8590

+++ b/src/gcc/c-family/ChangeLog (.../branches/gcc-4_8-branch)

8591

@@ -1,3 +1,78 @@

8592

+2014-05-06 Richard Biener <rguenther@suse.de>

8593

+

8594

+ * c-opts.c (c_common_post_options): For -freestanding,

8595

+ -fno-hosted and -fno-builtin disable pattern recognition

8596

+ if not enabled explicitely.

8597

+

8598

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

8599

+

8600

+ Backport from mainline

8601

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

8602

+

8603

+ PR c++/60689

8604

+ * c-common.c (add_atomic_size_parameter): When creating new

8605

+ params vector, push the size argument first.

8606

+

8607

+ 2014-03-22 Jakub Jelinek <jakub@redhat.com>

8608

+

8609

+ PR debug/60603

8610

+ * c-opts.c (c_finish_options): Restore cb_file_change call to

8611

+ <built-in>.

8612

+

8613

+ 2014-03-13 Jakub Jelinek <jakub@redhat.com>

8614

+

8615

+ PR middle-end/36282

8616

+ * c-pragma.c (apply_pragma_weak): Only look at

8617

+ TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)) if

8618

+ DECL_ASSEMBLER_NAME_SET_P (decl).

8619

+ (maybe_apply_pending_pragma_weaks): Exit early if

8620

+ vec_safe_is_empty (pending_weaks) rather than only when

8621

+ !pending_weaks.

8622

+ (maybe_apply_pragma_weak): Likewise. If !DECL_ASSEMBLER_NAME_SET_P,

8623

+ set assembler name back to NULL afterwards.

8624

+

8625

+2014-04-07 Dominique d'Humieres <dominiq@lps.ens.fr>

8626

+

8627

+ Backport from mainline

8628

+ 2013-09-14 Iain Sandoe <iains@gcc.gnu.org>

8629

+

8630

+ PR target/48094

8631

+ * c.opt (fgnu-runtime, fnext-runtime, fobjc-abi-version,

8632

+ fobjc-gc, freplace-objc-classes): Accept for LTO.

8633

+

8634

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

8635

+

8636

+ Backport from mainline

8637

+ 2014-02-19 Jakub Jelinek <jakub@redhat.com>

8638

+

8639

+ PR c/37743

8640

+ * c-common.c (c_common_nodes_and_builtins): When initializing

8641

+ c_uint{16,32,64}_type_node, also set corresponding

8642

+ uint{16,32,64}_type_node to the same value.

8643

+

8644

+ 2014-02-12 Jakub Jelinek <jakub@redhat.com>

8645

+

8646

+ PR c/60101

8647

+ * c-common.c (merge_tlist): If copy is true, call new_tlist,

8648

+ if false, add ADD itself, rather than vice versa.

8649

+ (verify_tree): For COND_EXPR, don't call merge_tlist with non-zero

8650

+ copy. For SAVE_EXPR, only call merge_tlist once.

8651

+

8652

+2013-11-29 Jakub Jelinek <jakub@redhat.com>

8653

+

8654

+ PR c/59280

8655

+ * c-common.c (get_priority): If TREE_VALUE (args) is IDENTIFIER_NODE,

8656

+ goto invalid. If it is error_mark_node, don't issue further

8657

+ diagnostics.

8658

+

8659

+2013-11-04 Marek Polacek <polacek@redhat.com>

8660

+

8661

+ Backport from mainline

8662

+ 2013-11-04 Marek Polacek <polacek@redhat.com>

8663

+

8664

+ PR c++/58979

8665

+ * c-common.c (invalid_indirection_error): Handle RO_ARROW_STAR case.

8666

+

8667

2013-10-16 Release Manager

8668

8669

* GCC 4.8.2 released.

8670

Index: gcc/c-family/c-common.c

8671

===================================================================

8672

--- a/src/gcc/c-family/c-common.c (.../tags/gcc_4_8_2_release)

8673

+++ b/src/gcc/c-family/c-common.c (.../branches/gcc-4_8-branch)

8674

@@ -2894,7 +2894,7 @@

8675

}

8676

if (!found)

8677

{

8678

- *end = copy ? add : new_tlist (NULL, add->expr, add->writer);

8679

+ *end = copy ? new_tlist (NULL, add->expr, add->writer) : add;

8680

end = &(*end)->next;

8681

*end = 0;

8682

}

8683

@@ -3052,7 +3052,7 @@

8684

verify_tree (TREE_OPERAND (x, 0), &tmp_before, &tmp_list2, NULL_TREE);

8685

warn_for_collisions (tmp_list2);

8686

merge_tlist (pbefore_sp, tmp_before, 0);

8687

- merge_tlist (pbefore_sp, tmp_list2, 1);

8688

+ merge_tlist (pbefore_sp, tmp_list2, 0);

8689

8690

tmp_list3 = tmp_nosp = 0;

8691

verify_tree (TREE_OPERAND (x, 1), &tmp_list3, &tmp_nosp, NULL_TREE);

8692

@@ -3156,12 +3156,7 @@

8693

warn_for_collisions (tmp_nosp);

8694

8695

tmp_list3 = 0;

8696

- while (tmp_nosp)

8697

- {

8698

- struct tlist *t = tmp_nosp;

8699

- tmp_nosp = t->next;

8700

- merge_tlist (&tmp_list3, t, 0);

8701

- }

8702

+ merge_tlist (&tmp_list3, tmp_nosp, 0);

8703

t->cache_before_sp = tmp_before;

8704

t->cache_after_sp = tmp_list3;

8705

}

8706

@@ -5511,13 +5506,13 @@

8707

uint8_type_node =

8708

TREE_TYPE (identifier_global_value (c_get_ident (UINT8_TYPE)));

8709

if (UINT16_TYPE)

8710

- c_uint16_type_node =

8711

+ c_uint16_type_node = uint16_type_node =

8712

TREE_TYPE (identifier_global_value (c_get_ident (UINT16_TYPE)));

8713

if (UINT32_TYPE)

8714

- c_uint32_type_node =

8715

+ c_uint32_type_node = uint32_type_node =

8716

TREE_TYPE (identifier_global_value (c_get_ident (UINT32_TYPE)));

8717

if (UINT64_TYPE)

8718

- c_uint64_type_node =

8719

+ c_uint64_type_node = uint64_type_node =

8720

TREE_TYPE (identifier_global_value (c_get_ident (UINT64_TYPE)));

8721

if (INT_LEAST8_TYPE)

8722

int_least8_type_node =

8723

@@ -6917,6 +6912,10 @@

8724

}

8725

8726

arg = TREE_VALUE (args);

8727

+ if (TREE_CODE (arg) == IDENTIFIER_NODE)

8728

+ goto invalid;

8729

+ if (arg == error_mark_node)

8730

+ return DEFAULT_INIT_PRIORITY;

8731

arg = default_conversion (arg);

8732

if (!host_integerp (arg, /*pos=*/0)

8733

|| !INTEGRAL_TYPE_P (TREE_TYPE (arg)))

8734

@@ -9763,6 +9762,11 @@

8735

"invalid type argument of %<->%> (have %qT)",

8736

type);

8737

break;

8738

+ case RO_ARROW_STAR:

8739

+ error_at (loc,

8740

+ "invalid type argument of %<->*%> (have %qT)",

8741

+ type);

8742

+ break;

8743

case RO_IMPLICIT_CONVERSION:

8744

error_at (loc,

8745

"invalid type argument of implicit conversion (have %qT)",

8746

@@ -10198,6 +10202,7 @@

8747

8748

len = params->length ();

8749

vec_alloc (v, len + 1);

8750

+ v->quick_push (build_int_cst (size_type_node, n));

8751

for (z = 0; z < len; z++)

8752

v->quick_push ((*params)[z]);

8753

f = build_function_call_vec (loc, function, v, NULL);

8754

Index: gcc/c-family/c-pragma.c

8755

===================================================================

8756

--- a/src/gcc/c-family/c-pragma.c (.../tags/gcc_4_8_2_release)

8757

+++ b/src/gcc/c-family/c-pragma.c (.../branches/gcc-4_8-branch)

8758

@@ -259,6 +259,7 @@

8759

8760

if (SUPPORTS_WEAK && DECL_EXTERNAL (decl) && TREE_USED (decl)

8761

&& !DECL_WEAK (decl) /* Don't complain about a redundant #pragma. */

8762

+ && DECL_ASSEMBLER_NAME_SET_P (decl)

8763

&& TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)))

8764

warning (OPT_Wpragmas, "applying #pragma weak %q+D after first use "

8765

"results in unspecified behavior", decl);

8766

@@ -276,7 +277,7 @@

8767

/* Avoid asking for DECL_ASSEMBLER_NAME when it's not needed. */

8768

8769

/* No weak symbols pending, take the short-cut. */

8770

- if (!pending_weaks)

8771

+ if (vec_safe_is_empty (pending_weaks))

8772

return;

8773

/* If it's not visible outside this file, it doesn't matter whether

8774

it's weak. */

8775

@@ -288,7 +289,13 @@

8776

if (TREE_CODE (decl) != FUNCTION_DECL && TREE_CODE (decl) != VAR_DECL)

8777

return;

8778

8779

- id = DECL_ASSEMBLER_NAME (decl);

8780

+ if (DECL_ASSEMBLER_NAME_SET_P (decl))

8781

+ id = DECL_ASSEMBLER_NAME (decl);

8782

+ else

8783

+ {

8784

+ id = DECL_ASSEMBLER_NAME (decl);

8785

+ SET_DECL_ASSEMBLER_NAME (decl, NULL_TREE);

8786

+ }

8787

8788

FOR_EACH_VEC_ELT (*pending_weaks, i, pe)

8789

if (id == pe->name)

8790

@@ -309,7 +316,7 @@

8791

pending_weak *pe;

8792

symtab_node target;

8793

8794

- if (!pending_weaks)

8795

+ if (vec_safe_is_empty (pending_weaks))

8796

return;

8797

8798

FOR_EACH_VEC_ELT (*pending_weaks, i, pe)

8799

Index: gcc/c/c-typeck.c

8800

===================================================================

8801

--- a/src/gcc/c/c-typeck.c (.../tags/gcc_4_8_2_release)

8802

+++ b/src/gcc/c/c-typeck.c (.../branches/gcc-4_8-branch)

8803

@@ -2666,7 +2666,7 @@

8804

vec_alloc (v, list_length (params));

8805

for (; params; params = TREE_CHAIN (params))

8806

v->quick_push (TREE_VALUE (params));

8807

- ret = build_function_call_vec (loc, function, v, NULL);

8808

+ ret = c_build_function_call_vec (loc, function, v, NULL);

8809

vec_free (v);

8810

return ret;

8811

}

8812

@@ -2705,14 +2705,6 @@

8813

/* Convert anything with function type to a pointer-to-function. */

8814

if (TREE_CODE (function) == FUNCTION_DECL)

8815

{

8816

- /* Implement type-directed function overloading for builtins.

8817

- resolve_overloaded_builtin and targetm.resolve_overloaded_builtin

8818

- handle all the type checking. The result is a complete expression

8819

- that implements this function call. */

8820

- tem = resolve_overloaded_builtin (loc, function, params);

8821

- if (tem)

8822

- return tem;

8823

-

8824

name = DECL_NAME (function);

8825

8826

if (flag_tm)

8827

@@ -2863,6 +2855,30 @@

8828

}

8829

return require_complete_type (result);

8830

}

8831

+

8832

+/* Like build_function_call_vec, but call also resolve_overloaded_builtin. */

8833

+

8834

+tree

8835

+c_build_function_call_vec (location_t loc, tree function,

8836

+ vec<tree, va_gc> *params,

8837

+ vec<tree, va_gc> *origtypes)

8838

+{

8839

+ /* Strip NON_LVALUE_EXPRs, etc., since we aren't using as an lvalue. */

8840

+ STRIP_TYPE_NOPS (function);

8841

+

8842

+ /* Convert anything with function type to a pointer-to-function. */

8843

+ if (TREE_CODE (function) == FUNCTION_DECL)

8844

+ {

8845

+ /* Implement type-directed function overloading for builtins.

8846

+ resolve_overloaded_builtin and targetm.resolve_overloaded_builtin

8847

+ handle all the type checking. The result is a complete expression

8848

+ that implements this function call. */

8849

+ tree tem = resolve_overloaded_builtin (loc, function, params);

8850

+ if (tem)

8851

+ return tem;

8852

+ }

8853

+ return build_function_call_vec (loc, function, params, origtypes);

8854

+}

8855

8856

/* Convert the argument expressions in the vector VALUES

8857

to the types in the list TYPELIST.

8858

@@ -3629,7 +3645,8 @@

8859

/* Report invalid types. */

8860

8861

if (typecode != POINTER_TYPE && typecode != FIXED_POINT_TYPE

8862

- && typecode != INTEGER_TYPE && typecode != REAL_TYPE)

8863

+ && typecode != INTEGER_TYPE && typecode != REAL_TYPE

8864

+ && typecode != VECTOR_TYPE)

8865

{

8866

if (code == PREINCREMENT_EXPR || code == POSTINCREMENT_EXPR)

8867

error_at (location, "wrong type argument to increment");

8868

@@ -3694,7 +3711,9 @@

8869

}

8870

else

8871

{

8872

- inc = integer_one_node;

8873

+ inc = (TREE_CODE (argtype) == VECTOR_TYPE

8874

+ ? build_one_cst (argtype)

8875

+ : integer_one_node);

8876

inc = convert (argtype, inc);

8877

}

8878

8879

@@ -4331,8 +4350,10 @@

8880

{

8881

if (int_operands)

8882

{

8883

- op1 = remove_c_maybe_const_expr (op1);

8884

- op2 = remove_c_maybe_const_expr (op2);

8885

+ /* Use c_fully_fold here, since C_MAYBE_CONST_EXPR might be

8886

+ nested inside of the expression. */

8887

+ op1 = c_fully_fold (op1, false, NULL);

8888

+ op2 = c_fully_fold (op2, false, NULL);

8889

}

8890

ret = build3 (COND_EXPR, result_type, ifexp, op1, op2);

8891

if (int_operands)

8892

@@ -10618,7 +10639,8 @@

8893

"%qE has invalid type for %<reduction%>", t);

8894

remove = true;

8895

}

8896

- else if (FLOAT_TYPE_P (TREE_TYPE (t)))

8897

+ else if (FLOAT_TYPE_P (TREE_TYPE (t))

8898

+ || TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

8899

{

8900

enum tree_code r_code = OMP_CLAUSE_REDUCTION_CODE (c);

8901

const char *r_name = NULL;

8902

@@ -10628,8 +10650,14 @@

8903

case PLUS_EXPR:

8904

case MULT_EXPR:

8905

case MINUS_EXPR:

8906

+ break;

8907

case MIN_EXPR:

8908

+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

8909

+ r_name = "min";

8910

+ break;

8911

case MAX_EXPR:

8912

+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

8913

+ r_name = "max";

8914

break;

8915

case BIT_AND_EXPR:

8916

r_name = "&";

8917

@@ -10641,10 +10669,12 @@

8918

r_name = "|";

8919

break;

8920

case TRUTH_ANDIF_EXPR:

8921

- r_name = "&&";

8922

+ if (FLOAT_TYPE_P (TREE_TYPE (t)))

8923

+ r_name = "&&";

8924

break;

8925

case TRUTH_ORIF_EXPR:

8926

- r_name = "||";

8927

+ if (FLOAT_TYPE_P (TREE_TYPE (t)))

8928

+ r_name = "||";

8929

break;

8930

default:

8931

gcc_unreachable ();

8932

Index: gcc/c/c-tree.h

8933

===================================================================

8934

--- a/src/gcc/c/c-tree.h (.../tags/gcc_4_8_2_release)

8935

+++ b/src/gcc/c/c-tree.h (.../branches/gcc-4_8-branch)

8936

@@ -640,6 +640,8 @@

8937

extern tree c_finish_omp_clauses (tree);

8938

extern tree c_build_va_arg (location_t, tree, tree);

8939

extern tree c_finish_transaction (location_t, tree, int);

8940

+extern tree c_build_function_call_vec (location_t, tree, vec<tree, va_gc> *,

8941

+ vec<tree, va_gc> *);

8942

8943

/* Set to 0 at beginning of a function definition, set to 1 if

8944

a return statement that specifies a return value is seen. */

8945

Index: gcc/c/ChangeLog

8946

===================================================================

8947

--- a/src/gcc/c/ChangeLog (.../tags/gcc_4_8_2_release)

8948

+++ b/src/gcc/c/ChangeLog (.../branches/gcc-4_8-branch)

8949

@@ -1,3 +1,49 @@

8950

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

8951

+

8952

+ Backport from mainline

8953

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

8954

+

8955

+ PR c++/60689

8956

+ * c-tree.h (c_build_function_call_vec): New prototype.

8957

+ * c-typeck.c (build_function_call_vec): Don't call

8958

+ resolve_overloaded_builtin here.

8959

+ (c_build_function_call_vec): New wrapper function around

8960

+ build_function_call_vec. Call resolve_overloaded_builtin here.

8961

+ (convert_lvalue_to_rvalue, build_function_call, build_atomic_assign):

8962

+ Call c_build_function_call_vec instead of build_function_call_vec.

8963

+ * c-parser.c (c_parser_postfix_expression_after_primary): Likewise.

8964

+ * c-decl.c (finish_decl): Likewise.

8965

+

8966

+2014-01-23 Jakub Jelinek <jakub@redhat.com>

8967

+

8968

+ PR middle-end/58809

8969

+ * c-typeck.c (c_finish_omp_clause): Reject MIN_EXPR, MAX_EXPR,

8970

+ BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR on COMPLEX_TYPEs.

8971

+

8972

+2014-01-22 Marek Polacek <polacek@redhat.com>

8973

+

8974

+ Backport from mainline

8975

+ 2014-01-22 Marek Polacek <polacek@redhat.com>

8976

+

8977

+ PR c/59891

8978

+ * c-typeck.c (build_conditional_expr): Call c_fully_fold instead

8979

+ of remove_c_maybe_const_expr on op1 and op2.

8980

+

8981

+2013-12-03 Marek Polacek <polacek@redhat.com>

8982

+

8983

+ Backport from mainline

8984

+ 2013-12-03 Marek Polacek <polacek@redhat.com>

8985

+

8986

+ PR c/59351

8987

+ * c-decl.c (build_compound_literal): Allow compound literals with

8988

+ empty initial value.

8989

+

8990

+2013-11-27 Tom de Vries <tom@codesourcery.com>

8991

+ Marc Glisse <marc.glisse@inria.fr>

8992

+

8993

+ PR c++/59032

8994

+ * c-typeck.c (build_unary_op): Allow vector increment and decrement.

8995

+

8996

2013-10-16 Release Manager

8997

8998

* GCC 4.8.2 released.

8999

Index: gcc/c/c-decl.c

9000

===================================================================

9001

--- a/src/gcc/c/c-decl.c (.../tags/gcc_4_8_2_release)

9002

+++ b/src/gcc/c/c-decl.c (.../branches/gcc-4_8-branch)

9003

@@ -4507,8 +4507,8 @@

9004

cleanup = build_unary_op (input_location, ADDR_EXPR, decl, 0);

9005

vec_alloc (v, 1);

9006

v->quick_push (cleanup);

9007

- cleanup = build_function_call_vec (DECL_SOURCE_LOCATION (decl),

9008

- cleanup_decl, v, NULL);

9009

+ cleanup = c_build_function_call_vec (DECL_SOURCE_LOCATION (decl),

9010

+ cleanup_decl, v, NULL);

9011

vec_free (v);

9012

9013

/* Don't warn about decl unused; the cleanup uses it. */

9014

@@ -4632,7 +4632,9 @@

9015

{

9016

int failure = complete_array_type (&TREE_TYPE (decl),

9017

DECL_INITIAL (decl), true);

9018

- gcc_assert (!failure);

9019

+ /* If complete_array_type returns 3, it means that the

9020

+ initial value of the compound literal is empty. Allow it. */

9021

+ gcc_assert (failure == 0 || failure == 3);

9022

9023

type = TREE_TYPE (decl);

9024

TREE_TYPE (DECL_INITIAL (decl)) = type;

9025

Index: gcc/c/c-parser.c

9026

===================================================================

9027

--- a/src/gcc/c/c-parser.c (.../tags/gcc_4_8_2_release)

9028

+++ b/src/gcc/c/c-parser.c (.../branches/gcc-4_8-branch)

9029

@@ -6904,8 +6904,8 @@

9030

sizeof_ptr_memacc_comptypes);

9031

/* FIXME diagnostics: Ideally we want the FUNCNAME, not the

9032

"(" after the FUNCNAME, which is what we have now. */

9033

- expr.value = build_function_call_vec (op_loc, expr.value, exprlist,

9034

- origtypes);

9035

+ expr.value = c_build_function_call_vec (op_loc, expr.value, exprlist,

9036

+ origtypes);

9037

expr.original_code = ERROR_MARK;

9038

if (TREE_CODE (expr.value) == INTEGER_CST

9039

&& TREE_CODE (orig_expr.value) == FUNCTION_DECL

9040

Index: gcc/cgraph.c

9041

===================================================================

9042

--- a/src/gcc/cgraph.c (.../tags/gcc_4_8_2_release)

9043

+++ b/src/gcc/cgraph.c (.../branches/gcc-4_8-branch)

9044

@@ -2596,4 +2596,47 @@

9045

FOR_EACH_FUNCTION (node)

9046

verify_cgraph_node (node);

9047

}

9048

+

9049

+/* Create external decl node for DECL.

9050

+ The difference i nbetween cgraph_get_create_node and

9051

+ cgraph_get_create_real_symbol_node is that cgraph_get_create_node

9052

+ may return inline clone, while cgraph_get_create_real_symbol_node

9053

+ will create a new node in this case.

9054

+ FIXME: This function should be removed once clones are put out of decl

9055

+ hash. */

9056

+

9057

+struct cgraph_node *

9058

+cgraph_get_create_real_symbol_node (tree decl)

9059

+{

9060

+ struct cgraph_node *first_clone = cgraph_get_node (decl);

9061

+ struct cgraph_node *node;

9062

+ /* create symbol table node. even if inline clone exists, we can not take

9063

+ it as a target of non-inlined call. */

9064

+ node = cgraph_get_node (decl);

9065

+ if (node && !node->global.inlined_to)

9066

+ return node;

9067

+

9068

+ node = cgraph_create_node (decl);

9069

+

9070

+ /* ok, we previously inlined the function, then removed the offline copy and

9071

+ now we want it back for external call. this can happen when devirtualizing

9072

+ while inlining function called once that happens after extern inlined and

9073

+ virtuals are already removed. in this case introduce the external node

9074

+ and make it available for call. */

9075

+ if (first_clone)

9076

+ {

9077

+ first_clone->clone_of = node;

9078

+ node->clones = first_clone;

9079

+ symtab_prevail_in_asm_name_hash ((symtab_node) node);

9080

+ symtab_insert_node_to_hashtable ((symtab_node) node);

9081

+ if (dump_file)

9082

+ fprintf (dump_file, "Introduced new external node "

9083

+ "(%s/%i) and turned into root of the clone tree.\n",

9084

+ xstrdup (cgraph_node_name (node)), node->uid);

9085

+ }

9086

+ else if (dump_file)

9087

+ fprintf (dump_file, "Introduced new external node "

9088

+ "(%s/%i).\n", xstrdup (cgraph_node_name (node)), node->uid);

9089

+ return node;

9090

+}

9091

#include "gt-cgraph.h"

9092

Index: gcc/cgraph.h

9093

===================================================================

9094

--- a/src/gcc/cgraph.h (.../tags/gcc_4_8_2_release)

9095

+++ b/src/gcc/cgraph.h (.../branches/gcc-4_8-branch)

9096

@@ -575,6 +575,7 @@

9097

struct cgraph_node * cgraph_create_node (tree);

9098

struct cgraph_node * cgraph_create_empty_node (void);

9099

struct cgraph_node * cgraph_get_create_node (tree);

9100

+struct cgraph_node * cgraph_get_create_real_symbol_node (tree);

9101

struct cgraph_node * cgraph_same_body_alias (struct cgraph_node *, tree, tree);

9102

struct cgraph_node * cgraph_add_thunk (struct cgraph_node *, tree, tree, bool, HOST_WIDE_INT,

9103

HOST_WIDE_INT, tree, tree);

9104

Index: gcc/optabs.c

9105

===================================================================

9106

--- a/src/gcc/optabs.c (.../tags/gcc_4_8_2_release)

9107

+++ b/src/gcc/optabs.c (.../branches/gcc-4_8-branch)

9108

@@ -3376,7 +3376,8 @@

9109

{

9110

rtx temp;

9111

9112

- if (! flag_trapv)

9113

+ if (GET_MODE_CLASS (mode) != MODE_INT

9114

+ || ! flag_trapv)

9115

result_unsignedp = 1;

9116

9117

/* First try to do it with a special abs instruction. */

9118

@@ -3399,7 +3400,8 @@

9119

{

9120

rtx last = get_last_insn ();

9121

9122

- temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);

9123

+ temp = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,

9124

+ op0, NULL_RTX, 0);

9125

if (temp != 0)

9126

temp = expand_binop (mode, smax_optab, op0, temp, target, 0,

9127

OPTAB_WIDEN);

9128

@@ -3441,7 +3443,8 @@

9129

{

9130

rtx temp, op1;

9131

9132

- if (! flag_trapv)

9133

+ if (GET_MODE_CLASS (mode) != MODE_INT

9134

+ || ! flag_trapv)

9135

result_unsignedp = 1;

9136

9137

temp = expand_abs_nojump (mode, op0, target, result_unsignedp);

9138

@@ -4558,8 +4561,11 @@

9139

if (!COMPARISON_P (comparison))

9140

return NULL_RTX;

9141

9142

+ /* State variables we need to save and restore if cmove can't be used. */

9143

+ int save_pending_stack_adjust = pending_stack_adjust;

9144

+ int save_stack_pointer_delta = stack_pointer_delta;

9145

+ last = get_last_insn ();

9146

do_pending_stack_adjust ();

9147

- last = get_last_insn ();

9148

prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),

9149

GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,

9150

&comparison, &cmode);

9151

@@ -4579,6 +4585,8 @@

9152

}

9153

}

9154

delete_insns_since (last);

9155

+ pending_stack_adjust = save_pending_stack_adjust;

9156

+ stack_pointer_delta = save_stack_pointer_delta;

9157

return NULL_RTX;

9158

}

9159

9160

@@ -6233,7 +6241,7 @@

9161

9162

/* If the optabs changed, record it. */

9163

if (memcmp (tmp_optabs, this_target_optabs, sizeof (struct target_optabs)))

9164

- TREE_OPTIMIZATION_OPTABS (optnode) = (unsigned char *) tmp_optabs;

9165

+ TREE_OPTIMIZATION_OPTABS (optnode) = tmp_optabs;

9166

else

9167

{

9168

TREE_OPTIMIZATION_OPTABS (optnode) = NULL;

9169

@@ -7035,8 +7043,7 @@

9170

9171

create_output_operand (&ops[0], target, mode);

9172

create_fixed_operand (&ops[1], mem);

9173

- /* VAL may have been promoted to a wider mode. Shrink it if so. */

9174

- create_convert_operand_to (&ops[2], val, mode, true);

9175

+ create_input_operand (&ops[2], val, mode);

9176

create_integer_operand (&ops[3], model);

9177

if (maybe_expand_insn (icode, 4, ops))

9178

return ops[0].value;

9179

@@ -7075,8 +7082,7 @@

9180

struct expand_operand ops[3];

9181

create_output_operand (&ops[0], target, mode);

9182

create_fixed_operand (&ops[1], mem);

9183

- /* VAL may have been promoted to a wider mode. Shrink it if so. */

9184

- create_convert_operand_to (&ops[2], val, mode, true);

9185

+ create_input_operand (&ops[2], val, mode);

9186

if (maybe_expand_insn (icode, 3, ops))

9187

return ops[0].value;

9188

}

9189

@@ -7118,8 +7124,6 @@

9190

{

9191

if (!target || !register_operand (target, mode))

9192

target = gen_reg_rtx (mode);

9193

- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)

9194

- val = convert_modes (mode, GET_MODE (val), val, 1);

9195

if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))

9196

return target;

9197

}

9198

@@ -7331,8 +7335,8 @@

9199

create_output_operand (&ops[0], target_bool, bool_mode);

9200

create_output_operand (&ops[1], target_oval, mode);

9201

create_fixed_operand (&ops[2], mem);

9202

- create_convert_operand_to (&ops[3], expected, mode, true);

9203

- create_convert_operand_to (&ops[4], desired, mode, true);

9204

+ create_input_operand (&ops[3], expected, mode);

9205

+ create_input_operand (&ops[4], desired, mode);

9206

create_integer_operand (&ops[5], is_weak);

9207

create_integer_operand (&ops[6], succ_model);

9208

create_integer_operand (&ops[7], fail_model);

9209

@@ -7353,8 +7357,8 @@

9210

9211

create_output_operand (&ops[0], target_oval, mode);

9212

create_fixed_operand (&ops[1], mem);

9213

- create_convert_operand_to (&ops[2], expected, mode, true);

9214

- create_convert_operand_to (&ops[3], desired, mode, true);

9215

+ create_input_operand (&ops[2], expected, mode);

9216

+ create_input_operand (&ops[3], desired, mode);

9217

if (!maybe_expand_insn (icode, 4, ops))

9218

return false;

9219

9220

Index: gcc/DATESTAMP

9221

===================================================================

9222

--- a/src/gcc/DATESTAMP (.../tags/gcc_4_8_2_release)

9223

+++ b/src/gcc/DATESTAMP (.../branches/gcc-4_8-branch)

9224

@@ -1 +1 @@

9225

-20131016

9226

+20140514

9227

Index: gcc/value-prof.c

9228

===================================================================

9229

--- a/src/gcc/value-prof.c (.../tags/gcc_4_8_2_release)

9230

+++ b/src/gcc/value-prof.c (.../branches/gcc-4_8-branch)

9231

@@ -1270,8 +1270,7 @@

9232

9233

/* Build an EH edge for the direct call if necessary. */

9234

lp_nr = lookup_stmt_eh_lp (icall_stmt);

9235

- if (lp_nr != 0

9236

- && stmt_could_throw_p (dcall_stmt))

9237

+ if (lp_nr > 0 && stmt_could_throw_p (dcall_stmt))

9238

{

9239

edge e_eh, e;

9240

edge_iterator ei;

9241

Index: gcc/tree.c

9242

===================================================================

9243

--- a/src/gcc/tree.c (.../tags/gcc_4_8_2_release)

9244

+++ b/src/gcc/tree.c (.../branches/gcc-4_8-branch)

9245

@@ -1619,6 +1619,60 @@

9246

}

9247

}

9248

9249

+/* Return an integer of type TYPE containing all 1's in as much precision as

9250

+ it contains, or a complex or vector whose subparts are such integers. */

9251

+

9252

+tree

9253

+build_all_ones_cst (tree type)

9254

+{

9255

+ if (TREE_CODE (type) == COMPLEX_TYPE)

9256

+ {

9257

+ tree scalar = build_all_ones_cst (TREE_TYPE (type));

9258

+ return build_complex (type, scalar, scalar);

9259

+ }

9260

+ else

9261

+ return build_minus_one_cst (type);

9262

+}

9263

+

9264

+/* Return a constant of arithmetic type TYPE which is the

9265

+ opposite of the multiplicative identity of the set TYPE. */

9266

+

9267

+tree

9268

+build_minus_one_cst (tree type)

9269

+{

9270

+ switch (TREE_CODE (type))

9271

+ {

9272

+ case INTEGER_TYPE: case ENUMERAL_TYPE: case BOOLEAN_TYPE:

9273

+ case POINTER_TYPE: case REFERENCE_TYPE:

9274

+ case OFFSET_TYPE:

9275

+ return build_int_cst (type, -1);

9276

+

9277

+ case REAL_TYPE:

9278

+ return build_real (type, dconstm1);

9279

+

9280

+ case FIXED_POINT_TYPE:

9281

+ /* We can only generate 1 for accum types. */

9282

+ gcc_assert (ALL_SCALAR_ACCUM_MODE_P (TYPE_MODE (type)));

9283

+ return build_fixed (type, fixed_from_double_int (double_int_minus_one,

9284

+ TYPE_MODE (type)));

9285

+

9286

+ case VECTOR_TYPE:

9287

+ {

9288

+ tree scalar = build_minus_one_cst (TREE_TYPE (type));

9289

+

9290

+ return build_vector_from_val (type, scalar);

9291

+ }

9292

+

9293

+ case COMPLEX_TYPE:

9294

+ return build_complex (type,

9295

+ build_minus_one_cst (TREE_TYPE (type)),

9296

+ build_zero_cst (TREE_TYPE (type)));

9297

+

9298

+ default:

9299

+ gcc_unreachable ();

9300

+ }

9301

+}

9302

+

9303

/* Build 0 constant of type TYPE. This is used by constructor folding

9304

and thus the constant should be represented in memory by

9305

zero(es). */

9306

Index: gcc/tree.h

9307

===================================================================

9308

--- a/src/gcc/tree.h (.../tags/gcc_4_8_2_release)

9309

+++ b/src/gcc/tree.h (.../branches/gcc-4_8-branch)

9310

@@ -3589,7 +3589,7 @@

9311

9312

/* Target optabs for this set of optimization options. This is of

9313

type `struct target_optabs *'. */

9314

- unsigned char *GTY ((atomic)) optabs;

9315

+ void *GTY ((atomic)) optabs;

9316

9317

/* The value of this_target_optabs against which the optabs above were

9318

generated. */

9319

@@ -4760,6 +4760,8 @@

9320

extern tree build_real_from_int_cst (tree, const_tree);

9321

extern tree build_complex (tree, tree, tree);

9322

extern tree build_one_cst (tree);

9323

+extern tree build_minus_one_cst (tree);

9324

+extern tree build_all_ones_cst (tree);

9325

extern tree build_zero_cst (tree);

9326

extern tree build_string (int, const char *);

9327

extern tree build_tree_list_stat (tree, tree MEM_STAT_DECL);

9328

@@ -5854,6 +5856,7 @@

9329

extern tree fold_builtin_fputs (location_t, tree, tree, bool, bool, tree);

9330

extern tree fold_builtin_strcpy (location_t, tree, tree, tree, tree);

9331

extern tree fold_builtin_strncpy (location_t, tree, tree, tree, tree, tree);

9332

+extern tree fold_builtin_strcat (location_t, tree, tree, tree);

9333

extern tree fold_builtin_memory_chk (location_t, tree, tree, tree, tree, tree, tree, bool,

9334

enum built_in_function);

9335

extern tree fold_builtin_stxcpy_chk (location_t, tree, tree, tree, tree, tree, bool,

9336

@@ -6545,4 +6548,18 @@

9337

&& builtin_info.implicit_p[uns_fncode]);

9338

}

9339

9340

+/* Return pointer to optimization flags of FNDECL. */

9341

+static inline struct cl_optimization *

9342

+opts_for_fn (const_tree fndecl)

9343

+{

9344

+ tree fn_opts = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);

9345

+ if (fn_opts == NULL_TREE)

9346

+ fn_opts = optimization_default_node;

9347

+ return TREE_OPTIMIZATION (fn_opts);

9348

+}

9349

+

9350

+/* opt flag for function FNDECL, e.g. opts_for_fn (fndecl, optimize) is

9351

+ the optimization level of function fndecl. */

9352

+#define opt_for_fn(fndecl, opt) (opts_for_fn (fndecl)->x_##opt)

9353

+

9354

#endif /* GCC_TREE_H */

9355

Index: gcc/ipa-cp.c

9356

===================================================================

9357

--- a/src/gcc/ipa-cp.c (.../tags/gcc_4_8_2_release)

9358

+++ b/src/gcc/ipa-cp.c (.../branches/gcc-4_8-branch)

9359

@@ -444,6 +444,9 @@

9360

reason = "not a tree_versionable_function";

9361

else if (cgraph_function_body_availability (node) <= AVAIL_OVERWRITABLE)

9362

reason = "insufficient body availability";

9363

+ else if (!opt_for_fn (node->symbol.decl, optimize)

9364

+ || !opt_for_fn (node->symbol.decl, flag_ipa_cp))

9365

+ reason = "non-optimized function";

9366

9367

if (reason && dump_file && !node->alias && !node->thunk.thunk_p)

9368

fprintf (dump_file, "Function %s/%i is not versionable, reason: %s.\n",

9369

@@ -1455,22 +1458,21 @@

9370

args_count = ipa_get_cs_argument_count (args);

9371

parms_count = ipa_get_param_count (callee_info);

9372

9373

- /* If this call goes through a thunk we must not propagate to the first (0th)

9374

- parameter. However, we might need to uncover a thunk from below a series

9375

- of aliases first. */

9376

+ /* If this call goes through a thunk we should not propagate because we

9377

+ cannot redirect edges to thunks. However, we might need to uncover a

9378

+ thunk from below a series of aliases first. */

9379

alias_or_thunk = cs->callee;

9380

while (alias_or_thunk->alias)

9381

alias_or_thunk = cgraph_alias_aliased_node (alias_or_thunk);

9382

if (alias_or_thunk->thunk.thunk_p)

9383

{

9384

- ret |= set_all_contains_variable (ipa_get_parm_lattices (callee_info,

9385

- 0));

9386

- i = 1;

9387

+ for (i = 0; i < parms_count; i++)

9388

+ ret |= set_all_contains_variable (ipa_get_parm_lattices (callee_info,

9389

+ i));

9390

+ return ret;

9391

}

9392

- else

9393

- i = 0;

9394

9395

- for (; (i < args_count) && (i < parms_count); i++)

9396

+ for (i = 0; (i < args_count) && (i < parms_count); i++)

9397

{

9398

struct ipa_jump_func *jump_func = ipa_get_ith_jump_func (args, i);

9399

struct ipcp_param_lattices *dest_plats;

9400

@@ -3119,6 +3121,7 @@

9401

struct cgraph_node *node)

9402

{

9403

struct ipa_node_params *orig_caller_info = IPA_NODE_REF (cs->caller);

9404

+ struct ipa_node_params *orig_node_info;

9405

struct ipa_agg_replacement_value *aggval;

9406

int i, ec, count;

9407

9408

@@ -3133,6 +3136,7 @@

9409

if (aggval->index >= ec)

9410

return false;

9411

9412

+ orig_node_info = IPA_NODE_REF (IPA_NODE_REF (node)->ipcp_orig_node);

9413

if (orig_caller_info->ipcp_orig_node)

9414

orig_caller_info = IPA_NODE_REF (orig_caller_info->ipcp_orig_node);

9415

9416

@@ -3150,7 +3154,7 @@

9417

if (!interesting)

9418

continue;

9419

9420

- plats = ipa_get_parm_lattices (orig_caller_info, aggval->index);

9421

+ plats = ipa_get_parm_lattices (orig_node_info, aggval->index);

9422

if (plats->aggs_bottom)

9423

return false;

9424

9425

Index: gcc/rtlanal.c

9426

===================================================================

9427

--- a/src/gcc/rtlanal.c (.../tags/gcc_4_8_2_release)

9428

+++ b/src/gcc/rtlanal.c (.../branches/gcc-4_8-branch)

9429

@@ -224,10 +224,10 @@

9430

return 0;

9431

}

9432

9433

-/* Return nonzero if the use of X as an address in a MEM can cause a trap.

9434

- MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls

9435

- whether nonzero is returned for unaligned memory accesses on strict

9436

- alignment machines. */

9437

+/* Return nonzero if the use of X+OFFSET as an address in a MEM with SIZE

9438

+ bytes can cause a trap. MODE is the mode of the MEM (not that of X) and

9439

+ UNALIGNED_MEMS controls whether nonzero is returned for unaligned memory

9440

+ references on strict alignment machines. */

9441

9442

static int

9443

rtx_addr_can_trap_p_1 (const_rtx x, HOST_WIDE_INT offset, HOST_WIDE_INT size,

9444

@@ -235,11 +235,12 @@

9445

{

9446

enum rtx_code code = GET_CODE (x);

9447

9448

- if (STRICT_ALIGNMENT

9449

- && unaligned_mems

9450

- && GET_MODE_SIZE (mode) != 0)

9451

+ /* The offset must be a multiple of the mode size if we are considering

9452

+ unaligned memory references on strict alignment machines. */

9453

+ if (STRICT_ALIGNMENT && unaligned_mems && GET_MODE_SIZE (mode) != 0)

9454

{

9455

HOST_WIDE_INT actual_offset = offset;

9456

+

9457

#ifdef SPARC_STACK_BOUNDARY_HACK

9458

/* ??? The SPARC port may claim a STACK_BOUNDARY higher than

9459

the real alignment of %sp. However, when it does this, the

9460

@@ -298,8 +299,27 @@

9461

return 0;

9462

9463

case REG:

9464

- /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */

9465

- if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx

9466

+ /* Stack references are assumed not to trap, but we need to deal with

9467

+ nonsensical offsets. */

9468

+ if (x == frame_pointer_rtx)

9469

+ {

9470

+ HOST_WIDE_INT adj_offset = offset - STARTING_FRAME_OFFSET;

9471

+ if (size == 0)

9472

+ size = GET_MODE_SIZE (mode);

9473

+ if (FRAME_GROWS_DOWNWARD)

9474

+ {

9475

+ if (adj_offset < frame_offset || adj_offset + size - 1 >= 0)

9476

+ return 1;

9477

+ }

9478

+ else

9479

+ {

9480

+ if (adj_offset < 0 || adj_offset + size - 1 >= frame_offset)

9481

+ return 1;

9482

+ }

9483

+ return 0;

9484

+ }

9485

+ /* ??? Need to add a similar guard for nonsensical offsets. */

9486

+ if (x == hard_frame_pointer_rtx

9487

|| x == stack_pointer_rtx

9488

/* The arg pointer varies if it is not a fixed register. */

9489

|| (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))

9490

@@ -320,9 +340,7 @@

9491

if (XEXP (x, 0) == pic_offset_table_rtx && CONSTANT_P (XEXP (x, 1)))

9492

return 0;

9493

9494

- /* - or it is an address that can't trap plus a constant integer,

9495

- with the proper remainder modulo the mode size if we are

9496

- considering unaligned memory references. */

9497

+ /* - or it is an address that can't trap plus a constant integer. */

9498

if (CONST_INT_P (XEXP (x, 1))

9499

&& !rtx_addr_can_trap_p_1 (XEXP (x, 0), offset + INTVAL (XEXP (x, 1)),

9500

size, mode, unaligned_mems))

9501

Index: gcc/configure

9502

===================================================================

9503

--- a/src/gcc/configure (.../tags/gcc_4_8_2_release)

9504

+++ b/src/gcc/configure (.../branches/gcc-4_8-branch)

9505

@@ -11202,13 +11202,16 @@

9506

/* | A-Za-z:\\/* ) realsrcdir=${srcdir};;

9507

*) realsrcdir=../${srcdir};;

9508

esac

9509

- saved_CFLAGS="${CFLAGS}"

9510

+ # Clearing GMPINC is necessary to prevent host headers being

9511

+ # used by the build compiler. Defining GENERATOR_FILE stops

9512

+ # system.h from including gmp.h.

9513

CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \

9514

- LDFLAGS="${LDFLAGS_FOR_BUILD}" \

9515

+ CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \

9516

+ LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \

9517

+ GMPINC="" CPPFLAGS="${CPPFLAGS} -DGENERATOR_FILE" \

9518

${realsrcdir}/configure \

9519

--enable-languages=${enable_languages-all} \

9520

--target=$target_alias --host=$build_alias --build=$build_alias

9521

- CFLAGS="${saved_CFLAGS}"

9522

9523

# We just finished tests for the build machine, so rename

9524

# the file auto-build.h in the gcc directory.

9525

@@ -11703,6 +11706,7 @@

9526

if test x$build != x$host || test "x$coverage_flags" != x

9527

then

9528

BUILD_CFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CFLAGS_FOR_BUILD)'

9529

+ BUILD_CXXFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CXXFLAGS_FOR_BUILD)'

9530

BUILD_LDFLAGS='$(LDFLAGS_FOR_BUILD)'

9531

fi

9532

9533

@@ -13590,7 +13594,7 @@

9534

rm -rf conftest*

9535

;;

9536

9537

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

9538

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

9539

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

9540

# Find out which ABI we are using.

9541

echo 'int i;' > conftest.$ac_ext

9542

@@ -13615,7 +13619,10 @@

9543

;;

9544

esac

9545

;;

9546

- ppc64-*linux*|powerpc64-*linux*)

9547

+ powerpc64le-*linux*)

9548

+ LD="${LD-ld} -m elf32lppclinux"

9549

+ ;;

9550

+ powerpc64-*linux*)

9551

LD="${LD-ld} -m elf32ppclinux"

9552

;;

9553

s390x-*linux*)

9554

@@ -13634,7 +13641,10 @@

9555

x86_64-*linux*)

9556

LD="${LD-ld} -m elf_x86_64"

9557

;;

9558

- ppc*-*linux*|powerpc*-*linux*)

9559

+ powerpcle-*linux*)

9560

+ LD="${LD-ld} -m elf64lppc"

9561

+ ;;

9562

+ powerpc-*linux*)

9563

LD="${LD-ld} -m elf64ppc"

9564

;;

9565

s390*-*linux*|s390*-*tpf*)

9566

@@ -17828,7 +17838,7 @@

9567

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

9568

lt_status=$lt_dlunknown

9569

cat > conftest.$ac_ext <<_LT_EOF

9570

-#line 17831 "configure"

9571

+#line 17841 "configure"

9572

#include "confdefs.h"

9573

9574

#if HAVE_DLFCN_H

9575

@@ -17934,7 +17944,7 @@

9576

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

9577

lt_status=$lt_dlunknown

9578

cat > conftest.$ac_ext <<_LT_EOF

9579

-#line 17937 "configure"

9580

+#line 17947 "configure"

9581

#include "confdefs.h"

9582

9583

#if HAVE_DLFCN_H

9584

@@ -24263,6 +24273,43 @@

9585

$as_echo "#define HAVE_AS_SPARC4 1" >>confdefs.h

9586

9587

fi

9588

+

9589

+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for LEON instructions" >&5

9590

+$as_echo_n "checking assembler for LEON instructions... " >&6; }

9591

+if test "${gcc_cv_as_sparc_leon+set}" = set; then :

9592

+ $as_echo_n "(cached) " >&6

9593

+else

9594

+ gcc_cv_as_sparc_leon=no

9595

+ if test x$gcc_cv_as != x; then

9596

+ $as_echo '.text

9597

+ .register %g2, #scratch

9598

+ .register %g3, #scratch

9599

+ .align 4

9600

+ smac %g2, %g3, %g1

9601

+ umac %g2, %g3, %g1

9602

+ casa [%g2] 0xb, %g3, %g1' > conftest.s

9603

+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -Aleon -o conftest.o conftest.s >&5'

9604

+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5

9605

+ (eval $ac_try) 2>&5

9606

+ ac_status=$?

9607

+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5

9608

+ test $ac_status = 0; }; }

9609

+ then

9610

+ gcc_cv_as_sparc_leon=yes

9611

+ else

9612

+ echo "configure: failed program was" >&5

9613

+ cat conftest.s >&5

9614

+ fi

9615

+ rm -f conftest.o conftest.s

9616

+ fi

9617

+fi

9618

+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_sparc_leon" >&5

9619

+$as_echo "$gcc_cv_as_sparc_leon" >&6; }

9620

+if test $gcc_cv_as_sparc_leon = yes; then

9621

+

9622

+$as_echo "#define HAVE_AS_LEON 1" >>confdefs.h

9623

+

9624

+fi

9625

;;

9626

9627

i[34567]86-*-* | x86_64-*-*)

9628

@@ -24745,6 +24792,10 @@

9629

9630

# These two are used unconditionally by i386.[ch]; it is to be defined

9631

# to 1 if the feature is present, 0 otherwise.

9632

+ as_ix86_gotoff_in_data_opt=

9633

+ if test x$gas = xyes; then

9634

+ as_ix86_gotoff_in_data_opt="--32"

9635

+ fi

9636

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for GOTOFF in data" >&5

9637

$as_echo_n "checking assembler for GOTOFF in data... " >&6; }

9638

if test "${gcc_cv_as_ix86_gotoff_in_data+set}" = set; then :

9639

@@ -24761,7 +24812,7 @@

9640

nop

9641

.data

9642

.long .L0@GOTOFF' > conftest.s

9643

- if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'

9644

+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags $as_ix86_gotoff_in_data_opt -o conftest.o conftest.s >&5'

9645

{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5

9646

(eval $ac_try) 2>&5

9647

ac_status=$?

9648

@@ -24822,6 +24873,37 @@

9649

9650

fi

9651

9652

+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for ud2 mnemonic" >&5

9653

+$as_echo_n "checking assembler for ud2 mnemonic... " >&6; }

9654

+if test "${gcc_cv_as_ix86_ud2+set}" = set; then :

9655

+ $as_echo_n "(cached) " >&6

9656

+else

9657

+ gcc_cv_as_ix86_ud2=no

9658

+ if test x$gcc_cv_as != x; then

9659

+ $as_echo 'ud2' > conftest.s

9660

+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'

9661

+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5

9662

+ (eval $ac_try) 2>&5

9663

+ ac_status=$?

9664

+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5

9665

+ test $ac_status = 0; }; }

9666

+ then

9667

+ gcc_cv_as_ix86_ud2=yes

9668

+ else

9669

+ echo "configure: failed program was" >&5

9670

+ cat conftest.s >&5

9671

+ fi

9672

+ rm -f conftest.o conftest.s

9673

+ fi

9674

+fi

9675

+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_ix86_ud2" >&5

9676

+$as_echo "$gcc_cv_as_ix86_ud2" >&6; }

9677

+if test $gcc_cv_as_ix86_ud2 = yes; then

9678

+

9679

+$as_echo "#define HAVE_AS_IX86_UD2 1" >>confdefs.h

9680

+

9681

+fi

9682

+

9683

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for R_386_TLS_GD_PLT reloc" >&5

9684

$as_echo_n "checking assembler for R_386_TLS_GD_PLT reloc... " >&6; }

9685

if test "${gcc_cv_as_ix86_tlsgdplt+set}" = set; then :

9686

@@ -27239,8 +27321,8 @@

9687

$as_echo_n "checking for exported symbols... " >&6; }

9688

if test "x$export_sym_check" != x; then

9689

echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c

9690

- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1

9691

- if $export_sym_check conftest | grep foobar > /dev/null; then

9692

+ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1

9693

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

9694

: # No need to use a flag

9695

{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5

9696

$as_echo "yes" >&6; }

9697

@@ -27249,8 +27331,8 @@

9698

$as_echo "yes" >&6; }

9699

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -rdynamic" >&5

9700

$as_echo_n "checking for -rdynamic... " >&6; }

9701

- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1

9702

- if $export_sym_check conftest | grep foobar > /dev/null; then

9703

+ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1

9704

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

9705

plugin_rdynamic=yes

9706

pluginlibs="-rdynamic"

9707

else

9708

Index: gcc/builtins.c

9709

===================================================================

9710

--- a/src/gcc/builtins.c (.../tags/gcc_4_8_2_release)

9711

+++ b/src/gcc/builtins.c (.../branches/gcc-4_8-branch)

9712

@@ -180,7 +180,6 @@

9713

static tree fold_builtin_strpbrk (location_t, tree, tree, tree);

9714

static tree fold_builtin_strstr (location_t, tree, tree, tree);

9715

static tree fold_builtin_strrchr (location_t, tree, tree, tree);

9716

-static tree fold_builtin_strcat (location_t, tree, tree);

9717

static tree fold_builtin_strncat (location_t, tree, tree, tree);

9718

static tree fold_builtin_strspn (location_t, tree, tree);

9719

static tree fold_builtin_strcspn (location_t, tree, tree);

9720

@@ -906,9 +905,24 @@

9721

if (! HAVE_nonlocal_goto)

9722

#endif

9723

{

9724

+ /* First adjust our frame pointer to its actual value. It was

9725

+ previously set to the start of the virtual area corresponding to

9726

+ the stacked variables when we branched here and now needs to be

9727

+ adjusted to the actual hardware fp value.

9728

+

9729

+ Assignments to virtual registers are converted by

9730

+ instantiate_virtual_regs into the corresponding assignment

9731

+ to the underlying register (fp in this case) that makes

9732

+ the original assignment true.

9733

+ So the following insn will actually be decrementing fp by

9734

+ STARTING_FRAME_OFFSET. */

9735

emit_move_insn (virtual_stack_vars_rtx, hard_frame_pointer_rtx);

9736

- /* This might change the hard frame pointer in ways that aren't

9737

- apparent to early optimization passes, so force a clobber. */

9738

+

9739

+ /* Restoring the frame pointer also modifies the hard frame pointer.

9740

+ Mark it used (so that the previous assignment remains live once

9741

+ the frame pointer is eliminated) and clobbered (to represent the

9742

+ implicit update from the assignment). */

9743

+ emit_use (hard_frame_pointer_rtx);

9744

emit_clobber (hard_frame_pointer_rtx);

9745

}

9746

9747

@@ -949,8 +963,7 @@

9748

9749

/* We must not allow the code we just generated to be reordered by

9750

scheduling. Specifically, the update of the frame pointer must

9751

- happen immediately, not later. Similarly, we must block

9752

- (frame-related) register values to be used across this code. */

9753

+ happen immediately, not later. */

9754

emit_insn (gen_blockage ());

9755

}

9756

9757

@@ -1958,6 +1971,7 @@

9758

tree fndecl = get_callee_fndecl (exp);

9759

enum machine_mode mode;

9760

bool errno_set = false;

9761

+ bool try_widening = false;

9762

tree arg;

9763

9764

if (!validate_arglist (exp, REAL_TYPE, VOID_TYPE))

9765

@@ -1969,6 +1983,7 @@

9766

{

9767

CASE_FLT_FN (BUILT_IN_SQRT):

9768

errno_set = ! tree_expr_nonnegative_p (arg);

9769

+ try_widening = true;

9770

builtin_optab = sqrt_optab;

9771

break;

9772

CASE_FLT_FN (BUILT_IN_EXP):

9773

@@ -2025,8 +2040,10 @@

9774

if (! flag_errno_math || ! HONOR_NANS (mode))

9775

errno_set = false;

9776

9777

- /* Before working hard, check whether the instruction is available. */

9778

- if (optab_handler (builtin_optab, mode) != CODE_FOR_nothing

9779

+ /* Before working hard, check whether the instruction is available, but try

9780

+ to widen the mode for specific operations. */

9781

+ if ((optab_handler (builtin_optab, mode) != CODE_FOR_nothing

9782

+ || (try_widening && !excess_precision_type (TREE_TYPE (exp))))

9783

&& (!errno_set || !optimize_insn_for_size_p ()))

9784

{

9785

rtx result = gen_reg_rtx (mode);

9786

@@ -5347,7 +5364,7 @@

9787

expand_builtin_atomic_compare_exchange (enum machine_mode mode, tree exp,

9788

rtx target)

9789

{

9790

- rtx expect, desired, mem, oldval;

9791

+ rtx expect, desired, mem, oldval, label;

9792

enum memmodel success, failure;

9793

tree weak;

9794

bool is_weak;

9795

@@ -5385,14 +5402,26 @@

9796

if (host_integerp (weak, 0) && tree_low_cst (weak, 0) != 0)

9797

is_weak = true;

9798

9799

- oldval = expect;

9800

- if (!expand_atomic_compare_and_swap ((target == const0_rtx ? NULL : &target),

9801

- &oldval, mem, oldval, desired,

9802

+ if (target == const0_rtx)

9803

+ target = NULL;

9804

+

9805

+ /* Lest the rtl backend create a race condition with an imporoper store

9806

+ to memory, always create a new pseudo for OLDVAL. */

9807

+ oldval = NULL;

9808

+

9809

+ if (!expand_atomic_compare_and_swap (&target, &oldval, mem, expect, desired,

9810

is_weak, success, failure))

9811

return NULL_RTX;

9812

9813

- if (oldval != expect)

9814

- emit_move_insn (expect, oldval);

9815

+ /* Conditionally store back to EXPECT, lest we create a race condition

9816

+ with an improper store to memory. */

9817

+ /* ??? With a rearrangement of atomics at the gimple level, we can handle

9818

+ the normal case where EXPECT is totally private, i.e. a register. At

9819

+ which point the store can be unconditional. */

9820

+ label = gen_label_rtx ();

9821

+ emit_cmp_and_jump_insns (target, const0_rtx, NE, NULL, VOIDmode, 1, label);

9822

+ emit_move_insn (expect, oldval);

9823

+ emit_label (label);

9824

9825

return target;

9826

}

9827

@@ -5846,6 +5875,9 @@

9828

switch (fcode)

9829

{

9830

CASE_FLT_FN (BUILT_IN_FABS):

9831

+ case BUILT_IN_FABSD32:

9832

+ case BUILT_IN_FABSD64:

9833

+ case BUILT_IN_FABSD128:

9834

target = expand_builtin_fabs (exp, target, subtarget);

9835

if (target)

9836

return target;

9837

@@ -10298,6 +10330,9 @@

9838

return fold_builtin_strlen (loc, type, arg0);

9839

9840

CASE_FLT_FN (BUILT_IN_FABS):

9841

+ case BUILT_IN_FABSD32:

9842

+ case BUILT_IN_FABSD64:

9843

+ case BUILT_IN_FABSD128:

9844

return fold_builtin_fabs (loc, arg0, type);

9845

9846

case BUILT_IN_ABS:

9847

@@ -10766,7 +10801,7 @@

9848

return fold_builtin_strstr (loc, arg0, arg1, type);

9849

9850

case BUILT_IN_STRCAT:

9851

- return fold_builtin_strcat (loc, arg0, arg1);

9852

+ return fold_builtin_strcat (loc, arg0, arg1, NULL_TREE);

9853

9854

case BUILT_IN_STRSPN:

9855

return fold_builtin_strspn (loc, arg0, arg1);

9856

@@ -11809,8 +11844,9 @@

9857

COMPOUND_EXPR in the chain will contain the tree for the simplified

9858

form of the builtin function call. */

9859

9860

-static tree

9861

-fold_builtin_strcat (location_t loc ATTRIBUTE_UNUSED, tree dst, tree src)

9862

+tree

9863

+fold_builtin_strcat (location_t loc ATTRIBUTE_UNUSED, tree dst, tree src,

9864

+ tree len)

9865

{

9866

if (!validate_arg (dst, POINTER_TYPE)

9867

|| !validate_arg (src, POINTER_TYPE))

9868

@@ -11828,22 +11864,17 @@

9869

/* See if we can store by pieces into (dst + strlen(dst)). */

9870

tree newdst, call;

9871

tree strlen_fn = builtin_decl_implicit (BUILT_IN_STRLEN);

9872

- tree strcpy_fn = builtin_decl_implicit (BUILT_IN_STRCPY);

9873

+ tree memcpy_fn = builtin_decl_implicit (BUILT_IN_MEMCPY);

9874

9875

- if (!strlen_fn || !strcpy_fn)

9876

+ if (!strlen_fn || !memcpy_fn)

9877

return NULL_TREE;

9878

9879

- /* If we don't have a movstr we don't want to emit an strcpy

9880

- call. We have to do that if the length of the source string

9881

- isn't computable (in that case we can use memcpy probably

9882

- later expanding to a sequence of mov instructions). If we

9883

- have movstr instructions we can emit strcpy calls. */

9884

- if (!HAVE_movstr)

9885

- {

9886

- tree len = c_strlen (src, 1);

9887

- if (! len || TREE_SIDE_EFFECTS (len))

9888

- return NULL_TREE;

9889

- }

9890

+ /* If the length of the source string isn't computable don't

9891

+ split strcat into strlen and memcpy. */

9892

+ if (! len)

9893

+ len = c_strlen (src, 1);

9894

+ if (! len || TREE_SIDE_EFFECTS (len))

9895

+ return NULL_TREE;

9896

9897

/* Stabilize the argument list. */

9898

dst = builtin_save_expr (dst);

9899

@@ -11855,7 +11886,11 @@

9900

newdst = fold_build_pointer_plus_loc (loc, dst, newdst);

9901

newdst = builtin_save_expr (newdst);

9902

9903

- call = build_call_expr_loc (loc, strcpy_fn, 2, newdst, src);

9904

+ len = fold_convert_loc (loc, size_type_node, len);

9905

+ len = size_binop_loc (loc, PLUS_EXPR, len,

9906

+ build_int_cst (size_type_node, 1));

9907

+

9908

+ call = build_call_expr_loc (loc, memcpy_fn, 3, newdst, src, len);

9909

return build2 (COMPOUND_EXPR, TREE_TYPE (dst), call, dst);

9910

}

9911

return NULL_TREE;

9912

Index: gcc/gcc.c

9913

===================================================================

9914

--- a/src/gcc/gcc.c (.../tags/gcc_4_8_2_release)

9915

+++ b/src/gcc/gcc.c (.../branches/gcc-4_8-branch)

9916

@@ -5441,7 +5441,7 @@

9917

const char *save_suffix_subst;

9918

9919

int save_growing_size;

9920

- void *save_growing_value;

9921

+ void *save_growing_value = NULL;

9922

9923

sf = lookup_spec_function (func);

9924

if (sf == NULL)

9925

Index: gcc/fold-const.c

9926

===================================================================

9927

--- a/src/gcc/fold-const.c (.../tags/gcc_4_8_2_release)

9928

+++ b/src/gcc/fold-const.c (.../branches/gcc-4_8-branch)

9929

@@ -461,8 +461,6 @@

9930

9931

case TRUNC_DIV_EXPR:

9932

case ROUND_DIV_EXPR:

9933

- case FLOOR_DIV_EXPR:

9934

- case CEIL_DIV_EXPR:

9935

case EXACT_DIV_EXPR:

9936

/* In general we can't negate A / B, because if A is INT_MIN and

9937

B is 1, we may turn this into INT_MIN / -1 which is undefined

9938

@@ -644,8 +642,6 @@

9939

9940

case TRUNC_DIV_EXPR:

9941

case ROUND_DIV_EXPR:

9942

- case FLOOR_DIV_EXPR:

9943

- case CEIL_DIV_EXPR:

9944

case EXACT_DIV_EXPR:

9945

/* In general we can't negate A / B, because if A is INT_MIN and

9946

B is 1, we may turn this into INT_MIN / -1 which is undefined

9947

@@ -2664,10 +2660,11 @@

9948

case COMPONENT_REF:

9949

/* Handle operand 2 the same as for ARRAY_REF. Operand 0

9950

may be NULL when we're called to compare MEM_EXPRs. */

9951

- if (!OP_SAME_WITH_NULL (0))

9952

+ if (!OP_SAME_WITH_NULL (0)

9953

+ || !OP_SAME (1))

9954

return 0;

9955

flags &= ~OEP_CONSTANT_ADDRESS_OF;

9956

- return OP_SAME (1) && OP_SAME_WITH_NULL (2);

9957

+ return OP_SAME_WITH_NULL (2);

9958

9959

case BIT_FIELD_REF:

9960

if (!OP_SAME (0))

9961

@@ -4920,12 +4917,16 @@

9962

int in0_p, in1_p, in_p;

9963

tree low0, low1, low, high0, high1, high;

9964

bool strict_overflow_p = false;

9965

- tree lhs = make_range (op0, &in0_p, &low0, &high0, &strict_overflow_p);

9966

- tree rhs = make_range (op1, &in1_p, &low1, &high1, &strict_overflow_p);

9967

- tree tem;

9968

+ tree tem, lhs, rhs;

9969

const char * const warnmsg = G_("assuming signed overflow does not occur "

9970

"when simplifying range test");

9971

9972

+ if (!INTEGRAL_TYPE_P (type))

9973

+ return 0;

9974

+

9975

+ lhs = make_range (op0, &in0_p, &low0, &high0, &strict_overflow_p);

9976

+ rhs = make_range (op1, &in1_p, &low1, &high1, &strict_overflow_p);

9977

+

9978

/* If this is an OR operation, invert both sides; we will invert

9979

again at the end. */

9980

if (or_op)

9981

@@ -10927,6 +10928,13 @@

9982

fold_build2_loc (loc, MULT_EXPR, type,

9983

build_int_cst (type, 2) , arg1));

9984

9985

+ /* ((T) (X /[ex] C)) * C cancels out if the conversion is

9986

+ sign-changing only. */

9987

+ if (TREE_CODE (arg1) == INTEGER_CST

9988

+ && TREE_CODE (arg0) == EXACT_DIV_EXPR

9989

+ && operand_equal_p (arg1, TREE_OPERAND (arg0, 1), 0))

9990

+ return fold_convert_loc (loc, type, TREE_OPERAND (arg0, 0));

9991

+

9992

strict_overflow_p = false;

9993

if (TREE_CODE (arg1) == INTEGER_CST

9994

&& 0 != (tem = extract_muldiv (op0, arg1, code, NULL_TREE,

9995

@@ -16587,7 +16595,7 @@

9996

unsigned HOST_WIDE_INT indexi = offset * BITS_PER_UNIT;

9997

tree index = bitsize_int (indexi);

9998

9999

- if (offset/part_widthi <= TYPE_VECTOR_SUBPARTS (op00type))

10000

+ if (offset / part_widthi < TYPE_VECTOR_SUBPARTS (op00type))

10001

return fold_build3_loc (loc,

10002

BIT_FIELD_REF, type, op00,

10003

part_width, index);

10004

Index: gcc/objc/ChangeLog

10005

===================================================================

10006

--- a/src/gcc/objc/ChangeLog (.../tags/gcc_4_8_2_release)

10007

+++ b/src/gcc/objc/ChangeLog (.../branches/gcc-4_8-branch)

10008

@@ -1,3 +1,14 @@

10009

+2014-04-07 Dominique d'Humieres <dominiq@lps.ens.fr>

10010

+

10011

+ Backport from mainline

10012

+ 2013-09-14 Iain Sandoe <iains@gcc.gnu.org>

10013

+

10014

+ PR target/48094

10015

+ * objc-next-runtime-abi-01.c (generate_objc_image_info): Remove.

10016

+ (objc_generate_v1_next_metadata): Remove generation of ImageInfo.

10017

+ * objc-next-runtime-abi-02.c (generate_v2_objc_image_info): Remove.

10018

+ (objc_generate_v2_next_metadata): Remove generation of ImageInfo.

10019

+

10020

2013-10-16 Release Manager

10021

10022

* GCC 4.8.2 released.

10023

Index: gcc/objc/objc-next-runtime-abi-01.c

10024

===================================================================

10025

--- a/src/gcc/objc/objc-next-runtime-abi-01.c (.../tags/gcc_4_8_2_release)

10026

+++ b/src/gcc/objc/objc-next-runtime-abi-01.c (.../branches/gcc-4_8-branch)

10027

@@ -2332,37 +2332,7 @@

10028

return;

10029

}

10030

10031

-

10032

-/* The Fix-and-Continue functionality available in Mac OS X 10.3 and

10033

- later requires that ObjC translation units participating in F&C be

10034

- specially marked. The following routine accomplishes this. */

10035

-

10036

-/* static int _OBJC_IMAGE_INFO[2] = { 0, 1 }; */

10037

-

10038

static void

10039

-generate_objc_image_info (void)

10040

-{

10041

- tree decl;

10042

- int flags

10043

- = ((flag_replace_objc_classes && imp_count ? 1 : 0)

10044

- | (flag_objc_gc ? 2 : 0));

10045

- vec<constructor_elt, va_gc> *v = NULL;

10046

- tree array_type;

10047

-

10048

- array_type = build_sized_array_type (integer_type_node, 2);

10049

-

10050

- decl = start_var_decl (array_type, "_OBJC_ImageInfo");

10051

-

10052

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, integer_zero_node);

10053

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, build_int_cst (integer_type_node, flags));

10054

- /* The runtime wants this and refers to it in a manner hidden from the compiler.

10055

- So we must force the output. */

10056

- DECL_PRESERVE_P (decl) = 1;

10057

- OBJCMETA (decl, objc_meta, meta_info);

10058

- finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), v));

10059

-}

10060

-

10061

-static void

10062

objc_generate_v1_next_metadata (void)

10063

{

10064

struct imp_entry *impent;

10065

@@ -2412,9 +2382,6 @@

10066

attr = build_tree_list (objc_meta, meta_modules);

10067

build_module_descriptor (vers, attr);

10068

10069

- /* This conveys information on GC usage and zero-link. */

10070

- generate_objc_image_info ();

10071

-

10072

/* Dump the class references. This forces the appropriate classes

10073

to be linked into the executable image, preserving unix archive

10074

semantics. */

10075

Index: gcc/objc/objc-next-runtime-abi-02.c

10076

===================================================================

10077

--- a/src/gcc/objc/objc-next-runtime-abi-02.c (.../tags/gcc_4_8_2_release)

10078

+++ b/src/gcc/objc/objc-next-runtime-abi-02.c (.../branches/gcc-4_8-branch)

10079

@@ -3329,32 +3329,7 @@

10080

finish_var_decl (ref->decl, ref->offset);

10081

}

10082

10083

-/* static int _OBJC_IMAGE_INFO[2] = { 0, 16 | flags }; */

10084

-

10085

static void

10086

-generate_v2_objc_image_info (void)

10087

-{

10088

- tree decl, array_type;

10089

- vec<constructor_elt, va_gc> *v = NULL;

10090

- int flags =

10091

- ((flag_replace_objc_classes && imp_count ? 1 : 0)

10092

- | (flag_objc_gc ? 2 : 0));

10093

-

10094

- flags |= 16;

10095

-

10096

- array_type = build_sized_array_type (integer_type_node, 2);

10097

-

10098

- decl = start_var_decl (array_type, "_OBJC_ImageInfo");

10099

-

10100

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, integer_zero_node);

10101

- CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, build_int_cst (integer_type_node, flags));

10102

- /* The Runtime wants this. */

10103

- DECL_PRESERVE_P (decl) = 1;

10104

- OBJCMETA (decl, objc_meta, meta_info);

10105

- finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), v));

10106

-}

10107

-

10108

-static void

10109

objc_generate_v2_next_metadata (void)

10110

{

10111

struct imp_entry *impent;

10112

@@ -3405,9 +3380,6 @@

10113

build_v2_address_table (nonlazy_category_list, "_OBJC_NonLazyCategoryList$",

10114

meta_label_nonlazy_categorylist);

10115

10116

- /* This conveys information on GC usage and zero-link. */

10117

- generate_v2_objc_image_info ();

10118

-

10119

/* Generate catch objects for eh, if any are needed. */

10120

build_v2_eh_catch_objects ();

10121

10122

Index: gcc/reorg.c

10123

===================================================================

10124

--- a/src/gcc/reorg.c (.../tags/gcc_4_8_2_release)

10125

+++ b/src/gcc/reorg.c (.../branches/gcc-4_8-branch)

10126

@@ -1105,6 +1105,7 @@

10127

int used_annul = 0;

10128

int i;

10129

struct resources cc_set;

10130

+ bool *redundant;

10131

10132

/* We can't do anything if there are more delay slots in SEQ than we

10133

can handle, or if we don't know that it will be a taken branch.

10134

@@ -1145,6 +1146,7 @@

10135

return delay_list;

10136

#endif

10137

10138

+ redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));

10139

for (i = 1; i < XVECLEN (seq, 0); i++)

10140

{

10141

rtx trial = XVECEXP (seq, 0, i);

10142

@@ -1166,7 +1168,8 @@

10143

10144

/* If this insn was already done (usually in a previous delay slot),

10145

pretend we put it in our delay slot. */

10146

- if (redundant_insn (trial, insn, new_delay_list))

10147

+ redundant[i] = redundant_insn (trial, insn, new_delay_list);

10148

+ if (redundant[i])

10149

continue;

10150

10151

/* We will end up re-vectoring this branch, so compute flags

10152

@@ -1199,6 +1202,12 @@

10153

return delay_list;

10154

}

10155

10156

+ /* Record the effect of the instructions that were redundant and which

10157

+ we therefore decided not to copy. */

10158

+ for (i = 1; i < XVECLEN (seq, 0); i++)

10159

+ if (redundant[i])

10160

+ update_block (XVECEXP (seq, 0, i), insn);

10161

+

10162

/* Show the place to which we will be branching. */

10163

*pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));

10164

10165

@@ -1262,6 +1271,7 @@

10166

/* If this insn was already done, we don't need it. */

10167

if (redundant_insn (trial, insn, delay_list))

10168

{

10169

+ update_block (trial, insn);

10170

delete_from_delay_slot (trial);

10171

continue;

10172

}

10173

@@ -3266,6 +3276,7 @@

10174

to reprocess this insn. */

10175

if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))

10176

{

10177

+ update_block (XVECEXP (pat, 0, 1), insn);

10178

delete_from_delay_slot (XVECEXP (pat, 0, 1));

10179

next = prev_active_insn (next);

10180

continue;

10181

@@ -3385,6 +3396,7 @@

10182

&& redirect_with_delay_slots_safe_p (delay_insn, target_label,

10183

insn))

10184

{

10185

+ update_block (XVECEXP (PATTERN (trial), 0, 1), insn);

10186

reorg_redirect_jump (delay_insn, target_label);

10187

next = insn;

10188

continue;

10189

Index: gcc/tree-ssa-sccvn.c

10190

===================================================================

10191

--- a/src/gcc/tree-ssa-sccvn.c (.../tags/gcc_4_8_2_release)

10192

+++ b/src/gcc/tree-ssa-sccvn.c (.../branches/gcc-4_8-branch)

10193

@@ -660,7 +660,7 @@

10194

}

10195

10196

/* For non-calls, store the information that makes up the address. */

10197

-

10198

+ tree orig = ref;

10199

while (ref)

10200

{

10201

vn_reference_op_s temp;

10202

@@ -711,7 +711,15 @@

10203

.arshift (BITS_PER_UNIT == 8

10204

? 3 : exact_log2 (BITS_PER_UNIT),

10205

HOST_BITS_PER_DOUBLE_INT);

10206

- if (off.fits_shwi ())

10207

+ if (off.fits_shwi ()

10208

+ /* Probibit value-numbering zero offset components

10209

+ of addresses the same before the pass folding

10210

+ __builtin_object_size had a chance to run

10211

+ (checking cfun->after_inlining does the

10212

+ trick here). */

10213

+ && (TREE_CODE (orig) != ADDR_EXPR

10214

+ || !off.is_zero ()

10215

+ || cfun->after_inlining))

10216

temp.off = off.low;

10217

}

10218

}

10219

Index: gcc/ChangeLog

10220

===================================================================

10221

--- a/src/gcc/ChangeLog (.../tags/gcc_4_8_2_release)

10222

+++ b/src/gcc/ChangeLog (.../branches/gcc-4_8-branch)

10223

@@ -1,3 +1,5440 @@

10224

+2014-05-14 Matthias Klose <doko@ubuntu.com>

10225

+

10226

+ Revert:

10227

+ 2014-05-08 Manuel López-Ibáñez <manu@gcc.gnu.org>

10228

+ Matthias Klose <doko@ubuntu.com>

10229

+

10230

+ PR driver/61106

10231

+ * optc-gen.awk: Fix option handling for -Wunused-parameter.

10232

+

10233

+2014-05-13 Peter Bergner <bergner@vnet.ibm.com>

10234

+

10235

+ * doc/sourcebuild.texi: (dfp_hw): Document.

10236

+ (p8vector_hw): Likewise.

10237

+ (powerpc_eabi_ok): Likewise.

10238

+ (powerpc_elfv2): Likewise.

10239

+ (powerpc_htm_ok): Likewise.

10240

+ (ppc_recip_hw): Likewise.

10241

+ (vsx_hw): Likewise.

10242

+

10243

+2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>

10244

+

10245

+ Backport from mainline

10246

+ 2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>

10247

+

10248

+ PR target/60991

10249

+ * config/avr/avr.c (avr_out_store_psi): Use correct constant

10250

+ to restore Y.

10251

+

10252

+2014-05-09 Georg-Johann Lay <avr@gjlay.de>

10253

+

10254

+ Backport from 2014-05-09 trunk r210267

10255

+

10256

+ PR target/61055

10257

+ * config/avr/avr.md (cc): Add new attribute set_vzn.

10258

+ (addqi3, addqq3, adduqq3, subqi3, subqq3, subuqq3, negqi2) [cc]:

10259

+ Set cc insn attribute to set_vzn instead of set_zn for alternatives

10260

+ with INC, DEC or NEG.

10261

+ * config/avr/avr.c (avr_notice_update_cc): Handle SET_VZN.

10262

+ (avr_out_plus_1): ADIW sets cc0 to CC_SET_CZN.

10263

+ INC, DEC and ADD+ADC set cc0 to CC_CLOBBER.

10264

+

10265

+2014-05-09 Richard Sandiford <rdsandiford@googlemail.com>

10266

+

10267

+ * builtins.c (expand_builtin_setjmp_receiver): Emit a use of

10268

+ the hard frame pointer. Synchronize commentary with mainline.

10269

+ * cse.c (cse_insn): Only check for volatile asms.

10270

+ * cselib.c (cselib_process_insn): Likewise.

10271

+ * dse.c (scan_insn): Likewise.

10272

+ * stmt.c (expand_nl_goto_receiver): Emit a use and a clobber of

10273

+ the hard frame pointer.

10274

+

10275

+2014-05-08 Manuel López-Ibáñez <manu@gcc.gnu.org>

10276

+ Matthias Klose <doko@ubuntu.com>

10277

+

10278

+ PR driver/61106

10279

+ * optc-gen.awk: Fix option handling for -Wunused-parameter.

10280

+

10281

+2014-05-08 Uros Bizjak <ubizjak@gmail.com>

10282

+

10283

+ PR target/59952

10284

+ * config/i386/i386.c (ix86_option_override_internal): Remove PTA_RTM

10285

+ from core-avx2.

10286

+

10287

+2014-05-08 Charles Baylis <charles.baylis@linaro.org>

10288

+

10289

+ Backport from mainline

10290

+ 2014-04-07 Charles Baylis <charles.baylis@linaro.org>

10291

+

10292

+ PR target/60609

10293

+ * config/arm/arm.h (ASM_OUTPUT_CASE_END): Remove.

10294

+ (LABEL_ALIGN_AFTER_BARRIER): Align barriers which occur after

10295

+ ADDR_DIFF_VEC.

10296

+

10297

+2014-05-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

10298

+

10299

+ * config.gcc (aarch64*-*-*): Use ISA flags from aarch64-arches.def.

10300

+ Do not define target_cpu_default2 to generic.

10301

+

10302

+2014-05-06 Richard Biener <rguenther@suse.de>

10303

+

10304

+ Backport from mainline

10305

+ 2014-04-14 Richard Biener <rguenther@suse.de>

10306

+

10307

+ PR middle-end/55022

10308

+ * fold-const.c (negate_expr_p): Don't negate directional rounding

10309

+ division.

10310

+ (fold_negate_expr): Likewise.

10311

+

10312

+2014-05-06 Richard Biener <rguenther@suse.de>

10313

+

10314

+ Backport from mainline

10315

+ 2014-04-17 Richard Biener <rguenther@suse.de>

10316

+

10317

+ PR middle-end/60849

10318

+ * tree-ssa-propagate.c (valid_gimple_rhs_p): Only allow effective

10319

+ boolean results for comparisons.

10320

+

10321

+ 2014-04-07 Richard Biener <rguenther@suse.de>

10322

+

10323

+ PR tree-optimization/60766

10324

+ * tree-ssa-loop-ivopts.c (cand_value_at): Compute in an

10325

+ unsigned type.

10326

+ (may_eliminate_iv): Convert cand_value_at result to desired

10327

+ type.

10328

+

10329

+ 2014-04-23 Richard Biener <rguenther@suse.de>

10330

+

10331

+ PR tree-optimization/60903

10332

+ * tree-ssa-loop-im.c (execute_sm_if_changed): Properly apply

10333

+ IRREDUCIBLE_LOOP loop flags to newly created BBs and edges.

10334

+

10335

+2014-05-05 Richard Biener <rguenther@suse.de>

10336

+

10337

+ Backport from mainline

10338

+ 2014-04-23 Richard Biener <rguenther@suse.de>

10339

+

10340

+ PR middle-end/60895

10341

+ * tree-inline.c (declare_return_variable): Use mark_addressable.

10342

+

10343

+ 2014-04-07 Richard Biener <rguenther@suse.de>

10344

+

10345

+ PR middle-end/60750

10346

+ * tree-ssa-operands.c (maybe_add_call_vops): Also add VDEFs

10347

+ for noreturn calls.

10348

+ * tree-cfgcleanup.c (fixup_noreturn_call): Do not remove VDEFs.

10349

+

10350

+ 2014-04-14 Richard Biener <rguenther@suse.de>

10351

+

10352

+ PR tree-optimization/59817

10353

+ PR tree-optimization/60453

10354

+ * graphite-scop-detection.c (graphite_can_represent_scev): Complete

10355

+ recursion to catch all CHRECs in the scalar evolution and restrict

10356

+ the predicate for the remains appropriately.

10357

+

10358

+ 2014-04-17 Richard Biener <rguenther@suse.de>

10359

+

10360

+ PR tree-optimization/60836

10361

+ * tree-vect-loop.c (vect_create_epilog_for_reduction): Force

10362

+ initial PHI args to be gimple values.

10363

+

10364

+2014-05-05 Jakub Jelinek <jakub@redhat.com>

10365

+

10366

+ Backported from mainline

10367

+ 2014-04-25 Jakub Jelinek <jakub@redhat.com>

10368

+

10369

+ PR tree-optimization/60960

10370

+ * tree-vect-generic.c (expand_vector_operation): Only call

10371

+ expand_vector_divmod if type's mode satisfies VECTOR_MODE_P.

10372

+

10373

+2014-05-04 Peter Bergner <bergner@vnet.ibm.com>

10374

+

10375

+ * config/rs6000/rs6000.h (RS6000_BTM_HARD_FLOAT): New define.

10376

+ (RS6000_BTM_COMMON): Add RS6000_BTM_HARD_FLOAT.

10377

+ (TARGET_EXTRA_BUILTINS): Add TARGET_HARD_FLOAT.

10378

+ * config/rs6000/rs6000-builtin.def (BU_MISC_1):

10379

+ Use RS6000_BTM_HARD_FLOAT.

10380

+ (BU_MISC_2): Likewise.

10381

+ * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Handle

10382

+ RS6000_BTM_HARD_FLOAT.

10383

+ (rs6000_option_override_internal): Enforce -mhard-float if -mhard-dfp

10384

+ is explicitly used.

10385

+ (rs6000_invalid_builtin): Add hard floating builtin support.

10386

+ (rs6000_expand_builtin): Relax the gcc_assert to allow the new

10387

+ hard float builtins.

10388

+ (rs6000_builtin_mask_names): Add RS6000_BTM_HARD_FLOAT.

10389

+

10390

+2014-05-03 Joey Ye <joey.ye@arm.com>

10391

+

10392

+ Backport from mainline r209463

10393

+ 2014-04-17 Joey Ye <joey.ye@arm.com>

10394

+

10395

+ * opts.c (OPT_fif_conversion, OPT_fif_conversion2): Disable for Og.

10396

+

10397

+2014-05-03 Oleg Endo <olegendo@gcc.gnu.org>

10398

+

10399

+ Back port from mainline

10400

+ PR target/61026

10401

+ * config/sh/sh.c: Include stdlib headers before everything else.

10402

+

10403

+2014-05-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10404

+

10405

+ PR tree-optimization/60930

10406

+ * gimple-ssa-strength-reduction.c (create_mul_imm_cand): Reject

10407

+ creating a multiply candidate by folding two constant

10408

+ multiplicands when the result overflows.

10409

+

10410

+2014-05-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

10411

+

10412

+ * config/aarch64/aarch64.h (TARGET_SIMD): Take AARCH64_ISA_SIMD

10413

+ into account.

10414

+ (TARGET_FLOAT): Take AARCH64_ISA_FP into account.

10415

+

10416

+2014-04-30 Michael Meissner <meissner@linux.vnet.ibm.com>

10417

+

10418

+ Back port from mainline

10419

+ 2014-04-24 Michael Meissner <meissner@linux.vnet.ibm.com>

10420

+

10421

+ * doc/extend.texi (PowerPC Built-in Functions): Document new

10422

+ powerpc extended divide, bcd, pack/unpack 128-bit, builtin

10423

+ functions.

10424

+ (PowerPC AltiVec/VSX Built-in Functions): Likewise.

10425

+

10426

+ * config/rs6000/predicates.md (const_0_to_3_operand): New

10427

+ predicate to match 0..3 integer constants.

10428

+

10429

+ * config/rs6000/rs6000-builtin.def (BU_DFP_MISC_1): Add new macros

10430

+ to support adding miscellaneous builtin functions.

10431

+ (BU_DFP_MISC_2): Likewise.

10432

+ (BU_P7_MISC_1): Likewise.

10433

+ (BU_P7_MISC_2): Likewise.

10434

+ (BU_P8V_MISC_3): Likewise.

10435

+ (BU_MISC_1): Likewise.

10436

+ (BU_MISC_2): Likewise.

10437

+ (DIVWE): Add extended divide builtin functions.

10438

+ (DIVWEO): Likewise.

10439

+ (DIVWEU): Likewise.

10440

+ (DIVWEUO): Likewise.

10441

+ (DIVDE): Likewise.

10442

+ (DIVDEO): Likewise.

10443

+ (DIVDEU): Likewise.

10444

+ (DIVDEUO): Likewise.

10445

+ (DXEX): Add decimal floating-point builtin functions.

10446

+ (DXEXQ): Likewise.

10447

+ (DDEDPD): Likewise.

10448

+ (DDEDPDQ): Likewise.

10449

+ (DENBCD): Likewise.

10450

+ (DENBCDQ): Likewise.

10451

+ (DIEX): Likewise.

10452

+ (DIEXQ): Likewise.

10453

+ (DSCLI): Likewise.

10454

+ (DSCLIQ): Likewise.

10455

+ (DSCRI): Likewise.

10456

+ (DSCRIQ): Likewise.

10457

+ (CDTBCD): Add new BCD builtin functions.

10458

+ (CBCDTD): Likewise.

10459

+ (ADDG6S): Likewise.

10460

+ (BCDADD): Likewise.

10461

+ (BCDADD_LT): Likewise.

10462

+ (BCDADD_EQ): Likewise.

10463

+ (BCDADD_GT): Likewise.

10464

+ (BCDADD_OV): Likewise.

10465

+ (BCDSUB): Likewise.

10466

+ (BCDSUB_LT): Likewise.

10467

+ (BCDSUB_EQ): Likewise.

10468

+ (BCDSUB_GT): Likewise.

10469

+ (BCDSUB_OV): Likewise.

10470

+ (PACK_TD): Add new pack/unpack 128-bit type builtin functions.

10471

+ (UNPACK_TD): Likewise.

10472

+ (PACK_TF): Likewise.

10473

+ (UNPACK_TF): Likewise.

10474

+ (UNPACK_TF_0): Likewise.

10475

+ (UNPACK_TF_1): Likewise.

10476

+ (PACK_V1TI): Likewise.

10477

+ (UNPACK_V1TI): Likewise.

10478

+

10479

+ * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add

10480

+ support for decimal floating point builtin functions.

10481

+ (rs6000_expand_ternop_builtin): Add checks for the new builtin

10482

+ functions that take constant arguments.

10483

+ (rs6000_invalid_builtin): Add decimal floating point builtin

10484

+ support.

10485

+ (rs6000_init_builtins): Setup long double, _Decimal64, and

10486

+ _Decimal128 types for new builtin functions.

10487

+ (builtin_function_type): Set the unsigned flags appropriately for

10488

+ the new builtin functions.

10489

+ (rs6000_opt_masks): Add support for decimal floating point builtin

10490

+ functions.

10491

+

10492

+ * config/rs6000/rs6000.h (RS6000_BTM_DFP): Add support for decimal

10493

+ floating point builtin functions.

10494

+ (RS6000_BTM_COMMON): Likewise.

10495

+ (RS6000_BTI_long_double): Likewise.

10496

+ (RS6000_BTI_dfloat64): Likewise.

10497

+ (RS6000_BTI_dfloat128): Likewise.

10498

+ (long_double_type_internal_node): Likewise.

10499

+ (dfloat64_type_internal_node): Likewise.

10500

+ (dfloat128_type_internal_node): Likewise.

10501

+

10502

+ * config/rs6000/altivec.h (UNSPEC_BCDADD): Add support for ISA

10503

+ 2.07 bcd arithmetic instructions.

10504

+ (UNSPEC_BCDSUB): Likewise.

10505

+ (UNSPEC_BCD_OVERFLOW): Likewise.

10506

+ (UNSPEC_BCD_ADD_SUB): Likewise.

10507

+ (bcd_add_sub): Likewise.

10508

+ (BCD_TEST): Likewise.

10509

+ (bcd<bcd_add_sub>): Likewise.

10510

+ (bcd<bcd_add_sub>_test): Likewise.

10511

+ (bcd<bcd_add_sub>_test2): Likewise.

10512

+ (bcd<bcd_add_sub>_<code>): Likewise.

10513

+ (peephole2 for combined bcd ops): Likewise.

10514

+

10515

+ * config/rs6000/dfp.md (UNSPEC_DDEDPD): Add support for new

10516

+ decimal floating point builtin functions.

10517

+ (UNSPEC_DENBCD): Likewise.

10518

+ (UNSPEC_DXEX): Likewise.

10519

+ (UNSPEC_DIEX): Likewise.

10520

+ (UNSPEC_DSCLI): Likewise.

10521

+ (UNSPEC_DSCRI): Likewise.

10522

+ (D64_D128): Likewise.

10523

+ (dfp_suffix): Likewise.

10524

+ (dfp_ddedpd_<mode>): Likewise.

10525

+ (dfp_denbcd_<mode>): Likewise.

10526

+ (dfp_dxex_<mode>): Likewise.

10527

+ (dfp_diex_<mode>): Likewise.

10528

+ (dfp_dscli_<mode>): Likewise.

10529

+ (dfp_dscri_<mode>): Likewise.

10530

+

10531

+ * config/rs6000/rs6000.md (UNSPEC_ADDG6S): Add support for new BCD

10532

+ builtin functions.

10533

+ (UNSPEC_CDTBCD): Likewise.

10534

+ (UNSPEC_CBCDTD): Likewise.

10535

+ (UNSPEC_DIVE): Add support for new extended divide builtin

10536

+ functions.

10537

+ (UNSPEC_DIVEO): Likewise.

10538

+ (UNSPEC_DIVEU): Likewise.

10539

+ (UNSPEC_DIVEUO): Likewise.

10540

+ (UNSPEC_UNPACK_128BIT): Add support for new builtin functions to

10541

+ pack/unpack 128-bit types.

10542

+ (UNSPEC_PACK_128BIT): Likewise.

10543

+ (idiv_ldiv): New mode attribute to set the 32/64-bit divide type.

10544

+ (udiv<mode>3): Use idiv_ldiv mode attribute.

10545

+ (div<mode>3): Likewise.

10546

+ (addg6s): Add new BCD builtin functions.

10547

+ (cdtbcd): Likewise.

10548

+ (cbcdtd): Likewise.

10549

+ (UNSPEC_DIV_EXTEND): Add support for new extended divide

10550

+ instructions.

10551

+ (div_extend): Likewise.

10552

+ (div<div_extend>_<mode>"): Likewise.

10553

+ (FP128_64): Add support for new builtin functions to pack/unpack

10554

+ 128-bit types.

10555

+ (unpack<mode>): Likewise.

10556

+ (unpacktf_0): Likewise.

10557

+ (unpacktf_1): Likewise.

10558

+ (unpack<mode>_dm): Likewise.

10559

+ (unpack<mode>_nodm): Likewise.

10560

+ (pack<mode>): Likewise.

10561

+ (unpackv1ti): Likewise.

10562

+ (packv1ti): Likewise.

10563

+

10564

+2014-04-29 Pat Haugen <pthaugen@us.ibm.com>

10565

+

10566

+ Backport from mainline

10567

+ 2014-04-17 Pat Haugen <pthaugen@us.ibm.com>

10568

+

10569

+ * config/rs6000/rs6000.md (addti3, subti3): New.

10570

+

10571

+2014-04-28 Pat Haugen <pthaugen@us.ibm.com>

10572

+

10573

+ Backport from mainline

10574

+ 2014-04-28 Pat Haugen <pthaugen@us.ibm.com>

10575

+

10576

+ * config/rs6000/sync.md (AINT mode_iterator): Move definition.

10577

+ (loadsync_<mode>): Change mode.

10578

+ (load_quadpti, store_quadpti): New.

10579

+ (atomic_load<mode>, atomic_store<mode>): Add support for TI mode.

10580

+ * config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

10581

+

10582

+2014-04-28 Eric Botcazou <ebotcazou@adacore.com>

10583

+

10584

+ * configure.ac: Tweak GAS check for LEON instructions on SPARC.

10585

+ * configure: Regenerate.

10586

+ * config/sparc/sparc.opt (muser-mode): New option.

10587

+ * config/sparc/sync.md (atomic_compare_and_swap<mode>_1): Do not enable

10588

+ for LEON3.

10589

+ (atomic_compare_and_swap_leon3_1): New instruction for LEON3.

10590

+ * doc/invoke.texi (SPARC options): Document -muser-mode.

10591

+

10592

+2014-04-25 Eric Botcazou <ebotcazou@adacore.com>

10593

+

10594

+ PR target/60941

10595

+ * config/sparc/sparc.md (ashlsi3_extend): Delete.

10596

+

10597

+2014-04-22 Michael Meissner <meissner@linux.vnet.ibm.com>

10598

+

10599

+ Back port from main line:

10600

+ 2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>

10601

+

10602

+ * config/rs6000/rs6000-builtins.def (VBPERMQ): Add vbpermq builtin

10603

+ for ISA 2.07.

10604

+

10605

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add

10606

+ vbpermq builtins.

10607

+

10608

+ * config/rs6000/altivec.md (UNSPEC_VBPERMQ): Add support for the

10609

+ vbpermq instruction.

10610

+ (altivec_vbpermq): Likewise.

10611

+

10612

+ PR target/60672

10613

+ * config/rs6000/altivec.h (vec_xxsldwi): Add missing define to

10614

+ enable use of xxsldwi and xxpermdi builtin functions.

10615

+ (vec_xxpermdi): Likewise.

10616

+

10617

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

10618

+ Document use of vec_xxsldwi and vec_xxpermdi builtins.

10619

+

10620

+2014-04-23 Uros Bizjak <ubizjak@gmail.com>

10621

+

10622

+ Backport from mainline

10623

+ 2014-04-21 Uros Bizjak <ubizjak@gmail.com>

10624

+

10625

+ PR target/60909

10626

+ * config/i386/i386.c (ix86_expand_builtin)

10627

+ <case IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Use temporary

10628

+ register for target RTX.

10629

+ <case IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Ditto.

10630

+

10631

+2014-04-23 Richard Biener <rguenther@suse.de>

10632

+

10633

+ Backport from mainline

10634

+ 2014-04-02 Richard Biener <rguenther@suse.de>

10635

+

10636

+ PR middle-end/60729

10637

+ * optabs.c (expand_abs_nojump): Honor flag_trapv only for

10638

+ MODE_INTs. Properly use negv_optab.

10639

+ (expand_abs): Likewise.

10640

+

10641

+ 2014-04-03 Richard Biener <rguenther@suse.de>

10642

+

10643

+ PR tree-optimization/60740

10644

+ * graphite-scop-detection.c (stmt_simple_for_scop_p): Iterate

10645

+ over all GIMPLE_COND operands.

10646

+

10647

+2014-04-23 Richard Biener <rguenther@suse.de>

10648

+

10649

+ PR middle-end/60635

10650

+ * gimplify.c (gimple_regimplify_operands): Update the

10651

+ re-gimplifed stmt.

10652

+

10653

+2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

10654

+

10655

+ Back port from the trunk, subversion id 209546.

10656

+

10657

+ 2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

10658

+

10659

+ PR target/60735

10660

+ * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):

10661

+ If mode is DDmode and TARGET_E500_DOUBLE allow move.

10662

+

10663

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some

10664

+ more debug information for E500 if -mdebug=reg.

10665

+

10666

+2014-04-18 Richard Henderson <rth@redhat.com>

10667

+

10668

+ * config/aarch64/aarch64.c (aarch64_register_move_cost): Pass a mode

10669

+ to GET_MODE_SIZE, not a reg_class_t.

10670

+

10671

+2014-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10672

+

10673

+ * config/rs6000/vsx.md (vsx_xxmrghw_<mode>): Adjust for

10674

+ little-endian.

10675

+ (vsx_xxmrglw_<mode>): Likewise.

10676

+

10677

+2014-04-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10678

+

10679

+ PR target/60839

10680

+ Revert the following patch

10681

+

10682

+ 2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10683

+

10684

+ Back port mainline subversion id 209025.

10685

+ 2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>

10686

+

10687

+ PR target/60735

10688

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have

10689

+ software floating point or no floating point registers, do not

10690

+ allow any type in the FPRs. Eliminate a test for SPE SIMD types

10691

+ in GPRs that occurs after we tested for GPRs that would never be

10692

+ true.

10693

+

10694

+ * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):

10695

+ Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,

10696

+ since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,

10697

+ specifically allow DDmode, since that does not use the SPE SIMD

10698

+ instructions.

10699

+

10700

+2014-04-10 Vladimir Makarov <vmakarov@redhat.com>

10701

+

10702

+ PR rtl-optimization/60769

10703

+ * lra-constraints.c (simplify_operand_subreg): Force reload of

10704

+ paradoxical subreg if it is not in the class contents.

10705

+

10706

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

10707

+

10708

+ Backport from mainline

10709

+ 2014-03-12 Jakub Jelinek <jakub@redhat.com>

10710

+ Marc Glisse <marc.glisse@inria.fr>

10711

+

10712

+ PR tree-optimization/60502

10713

+ * tree-ssa-reassoc.c (eliminate_not_pairs): Use build_all_ones_cst

10714

+ instead of build_low_bits_mask.

10715

+

10716

+ 2013-06-13 Marc Glisse <marc.glisse@inria.fr>

10717

+

10718

+ * tree.c (build_all_ones_cst): New function.

10719

+ * tree.h (build_all_ones_cst): Declare it.

10720

+

10721

+ 2013-05-10 Marc Glisse <marc.glisse@inria.fr>

10722

+

10723

+ * tree.c (build_minus_one_cst): New function.

10724

+ * tree.h (build_minus_one_cst): Declare new function.

10725

+

10726

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

10727

+

10728

+ Backport from mainline

10729

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

10730

+

10731

+ PR target/60693

10732

+ * config/i386/i386.c (ix86_copy_addr_to_reg): Call copy_addr_to_reg

10733

+ also if addr has VOIDmode.

10734

+

10735

+ 2014-03-17 Jakub Jelinek <jakub@redhat.com>

10736

+

10737

+ PR target/60516

10738

+ * config/i386/i386.c (ix86_expand_epilogue): Adjust REG_CFA_ADJUST_CFA

10739

+ note creation for the 2010-08-31 changes.

10740

+

10741

+ 2014-03-06 Jakub Jelinek <jakub@redhat.com>

10742

+ Meador Inge <meadori@codesourcery.com>

10743

+

10744

+ PR target/58595

10745

+ * config/arm/arm.c (arm_tls_symbol_p): Remove.

10746

+ (arm_legitimize_address): Call legitimize_tls_address for any

10747

+ arm_tls_referenced_p expression, handle constant addend. Call it

10748

+ before testing for !TARGET_ARM.

10749

+ (thumb_legitimize_address): Don't handle arm_tls_symbol_p here.

10750

+

10751

+2014-04-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10752

+

10753

+ Backport from mainline r208750

10754

+ 2014-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10755

+

10756

+ * config/rs6000/rs6000.c (rs6000_expand_vector_set): Generate a

10757

+ pattern for vector nor instead of subtract from splat(-1).

10758

+ (altivec_expand_vec_perm_const_le): Likewise.

10759

+

10760

+ Backport from mainline r209235

10761

+ 2014-04-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10762

+

10763

+ * config/rs6000/rs6000.c (rs6000_expand_vector_set): Use vnand

10764

+ instead of vnor to exploit possible fusion opportunity in the

10765

+ future.

10766

+ (altivec_expand_vec_perm_const_le): Likewise.

10767

+

10768

+2014-04-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10769

+

10770

+ Revert following patch

10771

+ 2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10772

+

10773

+ Backport from mainline

10774

+ 2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10775

+

10776

+ * config/rs6000/sync.md (AINT mode_iterator): Move definition.

10777

+ (loadsync_<mode>): Change mode.

10778

+ (load_quadpti, store_quadpti): New.

10779

+ (atomic_load<mode>, atomic_store<mode>): Add support for TI mode.

10780

+ * config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

10781

+

10782

+2014-04-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10783

+

10784

+ Backport from mainline r202642

10785

+ 2013-09-17 Alan Modra <amodra@gmail.com>

10786

+

10787

+ PR target/57589

10788

+ * config/rs6000/driver-rs6000.c (elf_platform): Revert 2013-06-11

10789

+ patch (r199972).

10790

+

10791

+2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10792

+

10793

+ Backport from mainline

10794

+ 2014-04-08 Pat Haugen <pthaugen@us.ibm.com>

10795

+

10796

+ * config/rs6000/sync.md (AINT mode_iterator): Move definition.

10797

+ (loadsync_<mode>): Change mode.

10798

+ (load_quadpti, store_quadpti): New.

10799

+ (atomic_load<mode>, atomic_store<mode>): Add support for TI mode.

10800

+ * config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

10801

+

10802

+2014-04-07 Martin Jambor <mjambor@suse.cz>

10803

+

10804

+ PR ipa/60640

10805

+ * ipa-cp.c (propagate_constants_accross_call): Do not propagate

10806

+ accross thunks.

10807

+

10808

+2014-04-07 Dominique d'Humieres <dominiq@lps.ens.fr>

10809

+

10810

+ Backport from mainline

10811

+ 2013-09-14 Iain Sandoe <iains@gcc.gnu.org>

10812

+

10813

+ PR target/48094

10814

+ * config/darwin.c (darwin_objc2_section): Note if ObjC Metadata

10815

+ is seen.

10816

+ (darwin_objc1_section): Likewise.

10817

+ (darwin_file_end): Emit Image Info section when required.

10818

+

10819

+2014-04-05 Alan Modra <amodra@gmail.com>

10820

+

10821

+ Apply from mainline

10822

+ 2014-01-28 Alan Modra <amodra@gmail.com>

10823

+ * Makefile.in (BUILD_CPPFLAGS): Do not use ALL_CPPFLAGS.

10824

+ * configure.ac <recursive call for build != host>: Define

10825

+ GENERATOR_FILE. Comment. Use CXX_FOR_BUILD, CXXFLAGS_FOR_BUILD

10826

+ and LD_FOR_BUILD too.

10827

+ * configure: Regenerate.

10828

+

10829

+2014-04-04 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10830

+

10831

+ Backport from mainline r208895:

10832

+ 2014-03-28 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10833

+

10834

+ * config/rs6000/rs6000.c (fusion_gpr_load_p): Refuse optimization

10835

+ if it would clobber the stack pointer, even temporarily.

10836

+

10837

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10838

+

10839

+ Back port from main line:

10840

+ 2014-04-01 Michael Meissner <meissner@linux.vnet.ibm.com>

10841

+

10842

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

10843

+ Document vec_vgbbd.

10844

+

10845

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10846

+

10847

+ Back port mainline subversion id 209025.

10848

+ 2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>

10849

+

10850

+ PR target/60735

10851

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have

10852

+ software floating point or no floating point registers, do not

10853

+ allow any type in the FPRs. Eliminate a test for SPE SIMD types

10854

+ in GPRs that occurs after we tested for GPRs that would never be

10855

+ true.

10856

+

10857

+ * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):

10858

+ Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,

10859

+ since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,

10860

+ specifically allow DDmode, since that does not use the SPE SIMD

10861

+ instructions.

10862

+

10863

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10864

+

10865

+ Backport from mainline r205308

10866

+ 2013-11-23 David Edelsohn <dje.gcc@gmail.com>

10867

+

10868

+ * config/rs6000/rs6000.c (IN_NAMED_SECTION): New macro.

10869

+ (rs6000_xcoff_select_section): Place decls with stricter alignment

10870

+ into named sections.

10871

+ (rs6000_xcoff_unique_section): Allow unique sections for

10872

+ uninitialized data with strict alignment.

10873

+

10874

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10875

+

10876

+ Backport from mainline

10877

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10878

+

10879

+ * gcc/configure: Regenerate.

10880

+

10881

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10882

+

10883

+ Back port from trunk

10884

+ 2013-04-25 Alan Modra <amodra@gmail.com>

10885

+

10886

+ PR target/57052

10887

+ * config/rs6000/rs6000.md (rotlsi3_internal7): Rename to

10888

+ rotlsi3_internal7le and condition on !BYTES_BIG_ENDIAN.

10889

+ (rotlsi3_internal8be): New BYTES_BIG_ENDIAN insn.

10890

+ Repeat for many other rotate/shift and mask patterns using subregs.

10891

+ Name lshiftrt insns.

10892

+ (ashrdisi3_noppc64): Rename to ashrdisi3_noppc64be and condition

10893

+ on WORDS_BIG_ENDIAN.

10894

+

10895

+ 2013-06-07 Alan Modra <amodra@gmail.com>

10896

+

10897

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't

10898

+ override user -mfp-in-toc.

10899

+ (offsettable_ok_by_alignment): Consider just the current access

10900

+ rather than the whole object, unless BLKmode. Handle

10901

+ CONSTANT_POOL_ADDRESS_P constants that lack a decl too.

10902

+ (use_toc_relative_ref): Allow CONSTANT_POOL_ADDRESS_P constants

10903

+ for -mcmodel=medium.

10904

+ * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't

10905

+ override user -mfp-in-toc or -msum-in-toc. Default to

10906

+ -mno-fp-in-toc for -mcmodel=medium.

10907

+

10908

+ 2013-06-18 Alan Modra <amodra@gmail.com>

10909

+

10910

+ * config/rs6000/rs6000.h (enum data_align): New.

10911

+ (LOCAL_ALIGNMENT, DATA_ALIGNMENT): Use rs6000_data_alignment.

10912

+ (DATA_ABI_ALIGNMENT): Define.

10913

+ (CONSTANT_ALIGNMENT): Correct comment.

10914

+ * config/rs6000/rs6000-protos.h (rs6000_data_alignment): Declare.

10915

+ * config/rs6000/rs6000.c (rs6000_data_alignment): New function.

10916

+

10917

+ 2013-07-11 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

10918

+

10919

+ * config/rs6000/rs6000.md (""*tls_gd_low<TLSmode:tls_abi_suffix>"):

10920

+ Require GOT register as additional operand in UNSPEC.

10921

+ ("*tls_ld_low<TLSmode:tls_abi_suffix>"): Likewise.

10922

+ ("*tls_got_dtprel_low<TLSmode:tls_abi_suffix>"): Likewise.

10923

+ ("*tls_got_tprel_low<TLSmode:tls_abi_suffix>"): Likewise.

10924

+ ("*tls_gd<TLSmode:tls_abi_suffix>"): Update splitter.

10925

+ ("*tls_ld<TLSmode:tls_abi_suffix>"): Likewise.

10926

+ ("tls_got_dtprel_<TLSmode:tls_abi_suffix>"): Likewise.

10927

+ ("tls_got_tprel_<TLSmode:tls_abi_suffix>"): Likewise.

10928

+

10929

+ 2014-01-23 Pat Haugen <pthaugen@us.ibm.com>

10930

+

10931

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't

10932

+ force flag_ira_loop_pressure if set via command line.

10933

+

10934

+ 2014-02-06 Alan Modra <amodra@gmail.com>

10935

+

10936

+ PR target/60032

10937

+ * config/rs6000/rs6000.c (rs6000_secondary_memory_needed_mode): Only

10938

+ change SDmode to DDmode when lra_in_progress.

10939

+

10940

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

10941

+

10942

+ V1TImode Support

10943

+ Back port from trunk

10944

+ 2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com>

10945

+

10946

+ * config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.

10947

+ (VEC_M): Likewise.

10948

+ (VEC_N): Likewise.

10949

+ (VEC_R): Likewise.

10950

+ (VEC_base): Likewise.

10951

+ (mov<MODE>, VEC_M modes): If we are loading TImode into VSX

10952

+ registers, we need to swap double words in little endian mode.

10953

+

10954

+ * config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode

10955

+ to be a container mode for 128-bit integer operations added in ISA

10956

+ 2.07. Unlike TImode and PTImode, the preferred register set is

10957

+ the Altivec/VMX registers for the 128-bit operations.

10958

+

10959

+ * config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add

10960

+ declarations.

10961

+ (rs6000_split_128bit_ok_p): Likewise.

10962

+

10963

+ * config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support

10964

+ macros for creating ISA 2.07 normal and overloaded builtin

10965

+ functions with 3 arguments.

10966

+ (BU_P8V_OVERLOAD_3): Likewise.

10967

+ (VPERM_1T): Add support for V1TImode in 128-bit vector operations

10968

+ for use as overloaded functions.

10969

+ (VPERM_1TI_UNS): Likewise.

10970

+ (VSEL_1TI): Likewise.

10971

+ (VSEL_1TI_UNS): Likewise.

10972

+ (ST_INTERNAL_1ti): Likewise.

10973

+ (LD_INTERNAL_1ti): Likewise.

10974

+ (XXSEL_1TI): Likewise.

10975

+ (XXSEL_1TI_UNS): Likewise.

10976

+ (VPERM_1TI): Likewise.

10977

+ (VPERM_1TI_UNS): Likewise.

10978

+ (XXPERMDI_1TI): Likewise.

10979

+ (SET_1TI): Likewise.

10980

+ (LXVD2X_V1TI): Likewise.

10981

+ (STXVD2X_V1TI): Likewise.

10982

+ (VEC_INIT_V1TI): Likewise.

10983

+ (VEC_SET_V1TI): Likewise.

10984

+ (VEC_EXT_V1TI): Likewise.

10985

+ (EQV_V1TI): Likewise.

10986

+ (NAND_V1TI): Likewise.

10987

+ (ORC_V1TI): Likewise.

10988

+ (VADDCUQ): Add support for 128-bit integer arithmetic instructions

10989

+ added in ISA 2.07. Add both normal 'altivec' builtins, and the

10990

+ overloaded builtin.

10991

+ (VADDUQM): Likewise.

10992

+ (VSUBCUQ): Likewise.

10993

+ (VADDEUQM): Likewise.

10994

+ (VADDECUQ): Likewise.

10995

+ (VSUBEUQM): Likewise.

10996

+ (VSUBECUQ): Likewise.

10997

+

10998

+ * config/rs6000/rs6000-c.c (__int128_type): New static to hold

10999

+ __int128_t and __uint128_t types.

11000

+ (__uint128_type): Likewise.

11001

+ (altivec_categorize_keyword): Add support for vector __int128_t,

11002

+ vector __uint128_t, vector __int128, and vector unsigned __int128

11003

+ as a container type for TImode operations that need to be done in

11004

+ VSX/Altivec registers.

11005

+ (rs6000_macro_to_expand): Likewise.

11006

+ (altivec_overloaded_builtins): Add ISA 2.07 overloaded functions

11007

+ to support 128-bit integer instructions vaddcuq, vadduqm,

11008

+ vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.

11009

+ (altivec_resolve_overloaded_builtin): Add support for V1TImode.

11010

+

11011

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support

11012

+ for V1TImode, and set up preferences to use VSX/Altivec

11013

+ registers. Setup VSX reload handlers.

11014

+ (rs6000_debug_reg_global): Likewise.

11015

+ (rs6000_init_hard_regno_mode_ok): Likewise.

11016

+ (rs6000_preferred_simd_mode): Likewise.

11017

+ (vspltis_constant): Do not allow V1TImode as easy altivec

11018

+ constants.

11019

+ (easy_altivec_constant): Likewise.

11020

+ (output_vec_const_move): Likewise.

11021

+ (rs6000_expand_vector_set): Convert V1TImode set and extract to

11022

+ simple move.

11023

+ (rs6000_expand_vector_extract): Likewise.

11024

+ (reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg

11025

+ addressing.

11026

+ (rs6000_const_vec): Add support for V1TImode.

11027

+ (rs6000_emit_le_vsx_load): Swap double words when loading or

11028

+ storing TImode/V1TImode.

11029

+ (rs6000_emit_le_vsx_store): Likewise.

11030

+ (rs6000_emit_le_vsx_move): Likewise.

11031

+ (rs6000_emit_move): Add support for V1TImode.

11032

+ (altivec_expand_ld_builtin): Likewise.

11033

+ (altivec_expand_st_builtin): Likewise.

11034

+ (altivec_expand_vec_init_builtin): Likewise.

11035

+ (altivec_expand_builtin): Likewise.

11036

+ (rs6000_init_builtins): Add support for V1TImode type. Add

11037

+ support for ISA 2.07 128-bit integer builtins. Define type names

11038

+ for the VSX/Altivec vector types.

11039

+ (altivec_init_builtins): Add support for overloaded vector

11040

+ functions with V1TImode type.

11041

+ (rs6000_preferred_reload_class): Prefer Altivec registers for

11042

+ V1TImode.

11043

+ (rs6000_move_128bit_ok_p): Move 128-bit move/split validation to

11044

+ external function.

11045

+ (rs6000_split_128bit_ok_p): Likewise.

11046

+ (rs6000_handle_altivec_attribute): Create V1TImode from vector

11047

+ __int128_t and vector __uint128_t.

11048

+

11049

+ * config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators

11050

+ and mode attributes.

11051

+ (VSX_M): Likewise.

11052

+ (VSX_M2): Likewise.

11053

+ (VSm): Likewise.

11054

+ (VSs): Likewise.

11055

+ (VSr): Likewise.

11056

+ (VSv): Likewise.

11057

+ (VS_scalar): Likewise.

11058

+ (VS_double): Likewise.

11059

+ (vsx_set_v1ti): New builtin function to create V1TImode from

11060

+ TImode.

11061

+

11062

+ * config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say

11063

+ whether we support the ISA 2.07 128-bit integer arithmetic

11064

+ instructions.

11065

+ (ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.

11066

+ (enum rs6000_builtin_type_index): Add fields to hold V1TImode

11067

+ and TImode types for use with the builtin functions.

11068

+ (V1TI_type_node): Likewise.

11069

+ (unsigned_V1TI_type_node): Likewise.

11070

+ (intTI_type_internal_node): Likewise.

11071

+ (uintTI_type_internal_node): Likewise.

11072

+

11073

+ * config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA

11074

+ 2.07 128-bit builtin functions.

11075

+ (UNSPEC_VADDEUQM): Likewise.

11076

+ (UNSPEC_VADDECUQ): Likewise.

11077

+ (UNSPEC_VSUBCUQ): Likewise.

11078

+ (UNSPEC_VSUBEUQM): Likewise.

11079

+ (UNSPEC_VSUBECUQ): Likewise.

11080

+ (VM): Add V1TImode to vector mode iterators.

11081

+ (VM2): Likewise.

11082

+ (VI_unit): Likewise.

11083

+ (altivec_vadduqm): Add ISA 2.07 128-bit binary builtins.

11084

+ (altivec_vaddcuq): Likewise.

11085

+ (altivec_vsubuqm): Likewise.

11086

+ (altivec_vsubcuq): Likewise.

11087

+ (altivec_vaddeuqm): Likewise.

11088

+ (altivec_vaddecuq): Likewise.

11089

+ (altivec_vsubeuqm): Likewise.

11090

+ (altivec_vsubecuq): Likewise.

11091

+

11092

+ * config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector

11093

+ mode iterators.

11094

+ (BOOL_128): Likewise.

11095

+ (BOOL_REGS_OUTPUT): Likewise.

11096

+ (BOOL_REGS_OP1): Likewise.

11097

+ (BOOL_REGS_OP2): Likewise.

11098

+ (BOOL_REGS_UNARY): Likewise.

11099

+ (BOOL_REGS_AND_CR0): Likewise.

11100

+

11101

+ * config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07

11102

+ 128-bit integer builtin support.

11103

+ (vec_vadduqm): Likewise.

11104

+ (vec_vaddecuq): Likewise.

11105

+ (vec_vaddeuqm): Likewise.

11106

+ (vec_vsubecuq): Likewise.

11107

+ (vec_vsubeuqm): Likewise.

11108

+ (vec_vsubcuq): Likewise.

11109

+ (vec_vsubuqm): Likewise.

11110

+

11111

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

11112

+ Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,

11113

+ vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding

11114

+ 128-bit integer add/subtract to ISA 2.07.

11115

+

11116

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11117

+

11118

+ Apply mainline r207798

11119

+ 2014-02-26 Alan Modra <amodra@gmail.com>

11120

+ PR target/58675

11121

+ PR target/57935

11122

+ * config/rs6000/rs6000.c (rs6000_secondary_reload_inner): Use

11123

+ find_replacement on parts of insn rtl that might be reloaded.

11124

+

11125

+ Backport from mainline r208287

11126

+ 2014-03-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11127

+

11128

+ * config/rs6000/rs6000.c (rs6000_preferred_reload_class): Disallow

11129

+ reload of PLUS rtx's outside of GENERAL_REGS or BASE_REGS; relax

11130

+ constraint on constants to permit them being loaded into

11131

+ GENERAL_REGS or BASE_REGS.

11132

+

11133

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11134

+

11135

+ Backport from mainline r207699.

11136

+ 2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>

11137

+

11138

+ PR target/60137

11139

+ * config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter

11140

+ for VSX/Altivec vectors that land in GPR registers.

11141

+

11142

+ Backport from mainline r207808.

11143

+ 2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>

11144

+

11145

+ PR target/60203

11146

+ * config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints.

11147

+ (mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves

11148

+ into 64-bit and 32-bit moves. On 64-bit moves, add support for

11149

+ using direct move instructions on ISA 2.07. Also adjust

11150

+ instruction length for 64-bit.

11151

+ (mov<mode>_64bit, TFmode/TDmode): Likewise.

11152

+ (mov<mode>_32bit, TFmode/TDmode): Likewise.

11153

+

11154

+ Backport from mainline r207868.

11155

+ 2014-02-18 Michael Meissner <meissner@linux.vnet.ibm.com>

11156

+

11157

+ PR target/60203

11158

+ * config/rs6000/rs6000.md (mov<mode>_64bit, TF/TDmode moves):

11159

+ Split 64-bit moves into 2 patterns. Do not allow the use of

11160

+ direct move for TDmode in little endian, since the decimal value

11161

+ has little endian bytes within a word, but the 64-bit pieces are

11162

+ ordered in a big endian fashion, and normal subreg's of TDmode are

11163

+ not allowed.

11164

+ (mov<mode>_64bit_dm): Likewise.

11165

+ (movtd_64bit_nodm): Likewise.

11166

+

11167

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11168

+

11169

+ Backport from mainline r207658

11170

+ 2014-02-06 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11171

+

11172

+ * config/rs6000/sysv4.h (ENDIAN_SELECT): Do not attempt to enforce

11173

+ big-endian mode for -mcall-aixdesc, -mcall-freebsd, -mcall-netbsd,

11174

+ -mcall-openbsd, or -mcall-linux.

11175

+ (CC1_ENDIAN_BIG_SPEC): Remove.

11176

+ (CC1_ENDIAN_LITTLE_SPEC): Remove.

11177

+ (CC1_ENDIAN_DEFAULT_SPEC): Remove.

11178

+ (CC1_SPEC): Remove (always empty) %cc1_endian_... spec.

11179

+ (SUBTARGET_EXTRA_SPECS): Remove %cc1_endian_big, %cc1_endian_little,

11180

+ and %cc1_endian_default.

11181

+ * config/rs6000/sysv4le.h (CC1_ENDIAN_DEFAULT_SPEC): Remove.

11182

+

11183

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11184

+

11185

+ Little Endian Vector API Support

11186

+ Backport from mainline r206443

11187

+ 2014-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11188

+

11189

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove

11190

+ two duplicate entries.

11191

+

11192

+ Backport from mainline r206494

11193

+ 2014-01-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11194

+

11195

+ * doc/invoke.texi: Add -maltivec={be,le} options, and document

11196

+ default element-order behavior for -maltivec.

11197

+ * config/rs6000/rs6000.opt: Add -maltivec={be,le} options.

11198

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Ensure

11199

+ that -maltivec={le,be} implies -maltivec; disallow -maltivec=le

11200

+ when targeting big endian, at least for now.

11201

+ * config/rs6000/rs6000.h: Add #define of VECTOR_ELT_ORDER_BIG.

11202

+

11203

+ Backport from mainline r206541

11204

+ 2014-01-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11205

+

11206

+ * config/rs6000/rs6000-builtin.def: Fix pasto for VPKSDUS.

11207

+

11208

+ Backport from mainline r206590

11209

+ 2014-01-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11210

+

11211

+ * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):

11212

+ Implement -maltivec=be for vec_insert and vec_extract.

11213

+

11214

+ Backport from mainline r206641

11215

+ 2014-01-15 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

11216

+

11217

+ * config/rs6000/altivec.md (mulv8hi3): Explicitly generate vmulesh

11218

+ and vmulosh rather than call gen_vec_widen_smult_*.

11219

+ (vec_widen_umult_even_v16qi): Test VECTOR_ELT_ORDER_BIG rather

11220

+ than BYTES_BIG_ENDIAN to determine use of even or odd instruction.

11221

+ (vec_widen_smult_even_v16qi): Likewise.

11222

+ (vec_widen_umult_even_v8hi): Likewise.

11223

+ (vec_widen_smult_even_v8hi): Likewise.

11224

+ (vec_widen_umult_odd_v16qi): Likewise.

11225

+ (vec_widen_smult_odd_v16qi): Likewise.

11226

+ (vec_widen_umult_odd_v8hi): Likewise.

11227

+ (vec_widen_smult_odd_v8hi): Likewise.

11228

+ (vec_widen_umult_hi_v16qi): Explicitly generate vmuleub and

11229

+ vmuloub rather than call gen_vec_widen_umult_*.

11230

+ (vec_widen_umult_lo_v16qi): Likewise.

11231

+ (vec_widen_smult_hi_v16qi): Explicitly generate vmulesb and

11232

+ vmulosb rather than call gen_vec_widen_smult_*.

11233

+ (vec_widen_smult_lo_v16qi): Likewise.

11234

+ (vec_widen_umult_hi_v8hi): Explicitly generate vmuleuh and vmulouh

11235

+ rather than call gen_vec_widen_umult_*.

11236

+ (vec_widen_umult_lo_v8hi): Likewise.

11237

+ (vec_widen_smult_hi_v8hi): Explicitly gnerate vmulesh and vmulosh

11238

+ rather than call gen_vec_widen_smult_*.

11239

+ (vec_widen_smult_lo_v8hi): Likewise.

11240

+

11241

+ Backport from mainline r207062

11242

+ 2014-01-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11243

+

11244

+ * config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Remove

11245

+ correction for little endian...

11246

+ * config/rs6000/vsx.md (vsx_xxpermdi2_<mode>_1): ...and move it to

11247

+ here.

11248

+

11249

+ Backport from mainline r207262

11250

+ 2014-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11251

+

11252

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Use

11253

+ CODE_FOR_altivec_vmrg*_direct rather than CODE_FOR_altivec_vmrg*.

11254

+ * config/rs6000/vsx.md (vsx_mergel_<mode>): Adjust for

11255

+ -maltivec=be with LE targets.

11256

+ (vsx_mergeh_<mode>): Likewise.

11257

+ * config/rs6000/altivec.md (UNSPEC_VMRG[HL]_DIRECT): New

11258

+ unspecs.

11259

+ (mulv8hi3): Use gen_altivec_vmrg[hl]w_direct.

11260

+ (altivec_vmrghb): Replace with define_expand and new

11261

+ *altivec_vmrghb_internal insn; adjust for -maltivec=be with LE

11262

+ targets.

11263

+ (altivec_vmrghb_direct): New define_insn.

11264

+ (altivec_vmrghh): Replace with define_expand and new

11265

+ *altivec_vmrghh_internal insn; adjust for -maltivec=be with LE

11266

+ targets.

11267

+ (altivec_vmrghh_direct): New define_insn.

11268

+ (altivec_vmrghw): Replace with define_expand and new

11269

+ *altivec_vmrghw_internal insn; adjust for -maltivec=be with LE

11270

+ targets.

11271

+ (altivec_vmrghw_direct): New define_insn.

11272

+ (*altivec_vmrghsf): Adjust for endianness.

11273

+ (altivec_vmrglb): Replace with define_expand and new

11274

+ *altivec_vmrglb_internal insn; adjust for -maltivec=be with LE

11275

+ targets.

11276

+ (altivec_vmrglb_direct): New define_insn.

11277

+ (altivec_vmrglh): Replace with define_expand and new

11278

+ *altivec_vmrglh_internal insn; adjust for -maltivec=be with LE

11279

+ targets.

11280

+ (altivec_vmrglh_direct): New define_insn.

11281

+ (altivec_vmrglw): Replace with define_expand and new

11282

+ *altivec_vmrglw_internal insn; adjust for -maltivec=be with LE

11283

+ targets.

11284

+ (altivec_vmrglw_direct): New define_insn.

11285

+ (*altivec_vmrglsf): Adjust for endianness.

11286

+ (vec_widen_umult_hi_v16qi): Use gen_altivec_vmrghh_direct.

11287

+ (vec_widen_umult_lo_v16qi): Use gen_altivec_vmrglh_direct.

11288

+ (vec_widen_smult_hi_v16qi): Use gen_altivec_vmrghh_direct.

11289

+ (vec_widen_smult_lo_v16qi): Use gen_altivec_vmrglh_direct.

11290

+ (vec_widen_umult_hi_v8hi): Use gen_altivec_vmrghw_direct.

11291

+ (vec_widen_umult_lo_v8hi): Use gen_altivec_vmrglw_direct.

11292

+ (vec_widen_smult_hi_v8hi): Use gen_altivec_vmrghw_direct.

11293

+ (vec_widen_smult_lo_v8hi): Use gen_altivec_vmrglw_direct.

11294

+

11295

+ Backport from mainline r207318

11296

+ 2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11297

+

11298

+ * gcc/config/rs6000/rs6000.c (rs6000_expand_vector_init): Use

11299

+ gen_vsx_xxspltw_v4sf_direct instead of gen_vsx_xxspltw_v4sf;

11300

+ remove element index adjustment for endian (now handled in vsx.md

11301

+ and altivec.md).

11302

+ (altivec_expand_vec_perm_const): Use

11303

+ gen_altivec_vsplt[bhw]_direct instead of gen_altivec_vsplt[bhw].

11304

+ * gcc/config/rs6000/vsx.md (UNSPEC_VSX_XXSPLTW): New unspec.

11305

+ (vsx_xxspltw_<mode>): Adjust element index for little endian.

11306

+ * gcc/config/rs6000/altivec.md (altivec_vspltb): Divide into a

11307

+ define_expand and a new define_insn *altivec_vspltb_internal;

11308

+ adjust for -maltivec=be on a little endian target.

11309

+ (altivec_vspltb_direct): New.

11310

+ (altivec_vsplth): Divide into a define_expand and a new

11311

+ define_insn *altivec_vsplth_internal; adjust for -maltivec=be on a

11312

+ little endian target.

11313

+ (altivec_vsplth_direct): New.

11314

+ (altivec_vspltw): Divide into a define_expand and a new

11315

+ define_insn *altivec_vspltw_internal; adjust for -maltivec=be on a

11316

+ little endian target.

11317

+ (altivec_vspltw_direct): New.

11318

+ (altivec_vspltsf): Divide into a define_expand and a new

11319

+ define_insn *altivec_vspltsf_internal; adjust for -maltivec=be on

11320

+ a little endian target.

11321

+

11322

+ Backport from mainline r207326

11323

+ 2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11324

+

11325

+ * config/rs6000/rs6000.c (rs6000_expand_vector_init): Remove

11326

+ unused variable "field".

11327

+ * config/rs6000/vsx.md (vsx_mergel_<mode>): Add missing DONE.

11328

+ (vsx_mergeh_<mode>): Likewise.

11329

+ * config/rs6000/altivec.md (altivec_vmrghb): Likewise.

11330

+ (altivec_vmrghh): Likewise.

11331

+ (altivec_vmrghw): Likewise.

11332

+ (altivec_vmrglb): Likewise.

11333

+ (altivec_vmrglh): Likewise.

11334

+ (altivec_vmrglw): Likewise.

11335

+ (altivec_vspltb): Add missing uses.

11336

+ (altivec_vsplth): Likewise.

11337

+ (altivec_vspltw): Likewise.

11338

+ (altivec_vspltsf): Likewise.

11339

+

11340

+ Backport from mainline r207414

11341

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11342

+

11343

+ * config/rs6000/altivec.md (UNSPEC_VSUMSWS_DIRECT): New unspec.

11344

+ (altivec_vsumsws): Add handling for -maltivec=be with a little

11345

+ endian target.

11346

+ (altivec_vsumsws_direct): New.

11347

+ (reduc_splus_<mode>): Call gen_altivec_vsumsws_direct instead of

11348

+ gen_altivec_vsumsws.

11349

+

11350

+ Backport from mainline r207415

11351

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11352

+

11353

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_le): Generalize

11354

+ for vector types other than V16QImode.

11355

+ * config/rs6000/altivec.md (altivec_vperm_<mode>): Change to a

11356

+ define_expand, and call altivec_expand_vec_perm_le when producing

11357

+ code with little endian element order.

11358

+ (*altivec_vperm_<mode>_internal): New insn having previous

11359

+ behavior of altivec_vperm_<mode>.

11360

+ (altivec_vperm_<mode>_uns): Change to a define_expand, and call

11361

+ altivec_expand_vec_perm_le when producing code with little endian

11362

+ element order.

11363

+ (*altivec_vperm_<mode>_uns_internal): New insn having previous

11364

+ behavior of altivec_vperm_<mode>_uns.

11365

+

11366

+ Backport from mainline r207520

11367

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11368

+

11369

+ * altivec.md (UNSPEC_VPACK_UNS_UNS_MOD_DIRECT): New unspec.

11370

+ (UNSPEC_VUNPACK_HI_SIGN_DIRECT): Likewise.

11371

+ (UNSPEC_VUNPACK_LO_SIGN_DIRECT): Likewise.

11372

+ (mulv8hi3): Use gen_altivec_vpkuwum_direct instead of

11373

+ gen_altivec_vpkuwum.

11374

+ (altivec_vpkpx): Test for VECTOR_ELT_ORDER_BIG instead of for

11375

+ BYTES_BIG_ENDIAN.

11376

+ (altivec_vpks<VI_char>ss): Likewise.

11377

+ (altivec_vpks<VI_char>us): Likewise.

11378

+ (altivec_vpku<VI_char>us): Likewise.

11379

+ (altivec_vpku<VI_char>um): Likewise.

11380

+ (altivec_vpku<VI_char>um_direct): New (copy of

11381

+ altivec_vpku<VI_char>um that still relies on BYTES_BIG_ENDIAN, for

11382

+ internal use).

11383

+ (altivec_vupkhs<VU_char>): Emit vupkls* instead of vupkhs* when

11384

+ target is little endian and -maltivec=be is not specified.

11385

+ (*altivec_vupkhs<VU_char>_direct): New (copy of

11386

+ altivec_vupkhs<VU_char> that always emits vupkhs*, for internal

11387

+ use).

11388

+ (altivec_vupkls<VU_char>): Emit vupkhs* instead of vupkls* when

11389

+ target is little endian and -maltivec=be is not specified.

11390

+ (*altivec_vupkls<VU_char>_direct): New (copy of

11391

+ altivec_vupkls<VU_char> that always emits vupkls*, for internal

11392

+ use).

11393

+ (altivec_vupkhpx): Emit vupklpx instead of vupkhpx when target is

11394

+ little endian and -maltivec=be is not specified.

11395

+ (altivec_vupklpx): Emit vupkhpx instead of vupklpx when target is

11396

+ little endian and -maltivec=be is not specified.

11397

+

11398

+ Backport from mainline r207521

11399

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11400

+

11401

+ * config/rs6000/altivec.md (altivec_vsum2sws): Adjust code

11402

+ generation for -maltivec=be.

11403

+ (altivec_vsumsws): Simplify redundant test.

11404

+

11405

+ Backport from mainline r207525

11406

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11407

+

11408

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Change

11409

+ CODE_FOR_altivec_vpku[hw]um to

11410

+ CODE_FOR_altivec_vpku[hw]um_direct.

11411

+ * config/rs6000/altivec.md (vec_unpacks_hi_<VP_small_lc>): Change

11412

+ UNSPEC_VUNPACK_HI_SIGN to UNSPEC_VUNPACK_HI_SIGN_DIRECT.

11413

+ (vec_unpacks_lo_<VP_small_lc>): Change UNSPEC_VUNPACK_LO_SIGN to

11414

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT.

11415

+

11416

+ Backport from mainline r207814.

11417

+ 2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11418

+

11419

+ * config/rs6000/vsx.md (vsx_xxpermdi_<mode>): Handle little

11420

+ endian targets.

11421

+

11422

+ Backport from mainline r207815.

11423

+ 2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11424

+

11425

+ * config/rs6000/altivec.md (p8_vmrgew): Handle little endian

11426

+ targets.

11427

+ (p8_vmrgow): Likewise.

11428

+

11429

+ Backport from mainline r207919.

11430

+ 2014-02-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11431

+

11432

+ * config/rs6000/rs6000.c (vspltis_constant): Fix most significant

11433

+ bit of zero.

11434

+

11435

+ Backport from mainline 208019

11436

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11437

+

11438

+ * config/rs6000/altivec.md (altivec_lvxl): Rename as

11439

+ *altivec_lvxl_<mode>_internal and use VM2 iterator instead of

11440

+ V4SI.

11441

+ (altivec_lvxl_<mode>): New define_expand incorporating

11442

+ -maltivec=be semantics where needed.

11443

+ (altivec_lvx): Rename as *altivec_lvx_<mode>_internal.

11444

+ (altivec_lvx_<mode>): New define_expand incorporating -maltivec=be

11445

+ semantics where needed.

11446

+ (altivec_stvx): Rename as *altivec_stvx_<mode>_internal.

11447

+ (altivec_stvx_<mode>): New define_expand incorporating

11448

+ -maltivec=be semantics where needed.

11449

+ (altivec_stvxl): Rename as *altivec_stvxl_<mode>_internal and use

11450

+ VM2 iterator instead of V4SI.

11451

+ (altivec_stvxl_<mode>): New define_expand incorporating

11452

+ -maltivec=be semantics where needed.

11453

+ * config/rs6000/rs6000-builtin.def: Add new built-in definitions

11454

+ LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI, LVXL_V16QI,

11455

+ LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI, LVX_V8HI, LVX_V16QI,

11456

+ STVX_V2DF, STVX_V2DI, STVX_V4SF, STVX_V4SI, STVX_V8HI, STVX_V16QI,

11457

+ STVXL_V2DF, STVXL_V2DI, STVXL_V4SF, STVXL_V4SI, STVXL_V8HI,

11458

+ STVXL_V16QI.

11459

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Replace

11460

+ ALTIVEC_BUILTIN_LVX with ALTIVEC_BUILTIN_LVX_<MODE> throughout;

11461

+ similarly for ALTIVEC_BUILTIN_LVXL, ALTIVEC_BUILTIN_STVX, and

11462

+ ALTIVEC_BUILTIN_STVXL.

11463

+ * config/rs6000/rs6000-protos.h (altivec_expand_lvx_be): New

11464

+ prototype.

11465

+ (altivec_expand_stvx_be): Likewise.

11466

+ * config/rs6000/rs6000.c (swap_selector_for_mode): New function.

11467

+ (altivec_expand_lvx_be): Likewise.

11468

+ (altivec_expand_stvx_be): Likewise.

11469

+ (altivec_expand_builtin): Add cases for

11470

+ ALTIVEC_BUILTIN_STVX_<MODE>, ALTIVEC_BUILTIN_STVXL_<MODE>,

11471

+ ALTIVEC_BUILTIN_LVXL_<MODE>, and ALTIVEC_BUILTIN_LVX_<MODE>.

11472

+ (altivec_init_builtins): Add definitions for

11473

+ __builtin_altivec_lvxl_<mode>, __builtin_altivec_lvx_<mode>,

11474

+ __builtin_altivec_stvx_<mode>, and

11475

+ __builtin_altivec_stvxl_<mode>.

11476

+

11477

+ Backport from mainline 208021

11478

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11479

+

11480

+ * config/rs6000/altivec.md (altivec_vsumsws): Replace second

11481

+ vspltw with vsldoi.

11482

+ (reduc_uplus_v16qi): Use gen_altivec_vsumsws_direct instead of

11483

+ gen_altivec_vsumsws.

11484

+

11485

+ Backport from mainline 208049

11486

+ 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11487

+

11488

+ * config/rs6000/altivec.md (altivec_lve<VI_char>x): Replace

11489

+ define_insn with define_expand and new define_insn

11490

+ *altivec_lve<VI_char>x_internal.

11491

+ (altivec_stve<VI_char>x): Replace define_insn with define_expand

11492

+ and new define_insn *altivec_stve<VI_char>x_internal.

11493

+ * config/rs6000/rs6000-protos.h (altivec_expand_stvex_be): New

11494

+ prototype.

11495

+ * config/rs6000/rs6000.c (altivec_expand_lvx_be): Document use by

11496

+ lve*x built-ins.

11497

+ (altivec_expand_stvex_be): New function.

11498

+

11499

+ Backport from mainline

11500

+ 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11501

+ * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Relax assert

11502

+ to permit subregs.

11503

+

11504

+ Backport from mainline

11505

+ 2014-02-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11506

+ * config/rs6000/vector.md (*vector_unordered<mode>): Change split

11507

+ to use canonical form for nor<mode>3.

11508

+

11509

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11510

+

11511

+ Backport from mainline

11512

+ 2014-02-04 Michael Meissner <meissner@linux.vnet.ibm.com>

11513

+

11514

+ * config/rs6000/rs6000.opt (-mlra): Add switch to enable the LRA

11515

+ register allocator.

11516

+

11517

+ * config/rs6000/rs6000.c (TARGET_LRA_P): Add support for -mlra to

11518

+ enable the LRA register allocator. Back port the changes from the

11519

+ trunk to enable LRA.

11520

+ (rs6000_legitimate_offset_address_p): Likewise.

11521

+ (legitimate_lo_sum_address_p): Likewise.

11522

+ (use_toc_relative_ref): Likewise.

11523

+ (rs6000_legitimate_address_p): Likewise.

11524

+ (rs6000_emit_move): Likewise.

11525

+ (rs6000_secondary_memory_needed_mode): Likewise.

11526

+ (rs6000_alloc_sdmode_stack_slot): Likewise.

11527

+ (rs6000_lra_p): Likewise.

11528

+

11529

+ * config/rs6000/sync.md (load_lockedti): Copy TI/PTI variables by

11530

+ 64-bit parts to force the register allocator to allocate even/odd

11531

+ register pairs for the quad word atomic instructions.

11532

+ (store_conditionalti): Likewise.

11533

+

11534

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11535

+

11536

+ Back port from mainline

11537

+ 2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com>

11538

+

11539

+ PR target/59909

11540

+ * doc/invoke.texi (RS/6000 and PowerPC Options): Document

11541

+ -mquad-memory-atomic. Update -mquad-memory documentation to say

11542

+ it is only used for non-atomic loads/stores.

11543

+

11544

+ * config/rs6000/predicates.md (quad_int_reg_operand): Allow either

11545

+ -mquad-memory or -mquad-memory-atomic switches.

11546

+

11547

+ * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Add

11548

+ -mquad-memory-atomic to ISA 2.07 support.

11549

+

11550

+ * config/rs6000/rs6000.opt (-mquad-memory-atomic): Add new switch

11551

+ to separate support of normal quad word memory operations (ldq,

11552

+ stq) from the atomic quad word memory operations.

11553

+

11554

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Add

11555

+ support to separate non-atomic quad word operations from atomic

11556

+ quad word operations. Disable non-atomic quad word operations in

11557

+ little endian mode so that we don't have to swap words after the

11558

+ load and before the store.

11559

+ (quad_load_store_p): Add comment about atomic quad word support.

11560

+ (rs6000_opt_masks): Add -mquad-memory-atomic to the list of

11561

+ options printed with -mdebug=reg.

11562

+

11563

+ * config/rs6000/rs6000.h (TARGET_SYNC_TI): Use

11564

+ -mquad-memory-atomic as the test for whether we have quad word

11565

+ atomic instructions.

11566

+ (TARGET_SYNC_HI_QI): If either -mquad-memory-atomic,

11567

+ -mquad-memory, or -mp8-vector are used, allow byte/half-word

11568

+ atomic operations.

11569

+

11570

+ * config/rs6000/sync.md (load_lockedti): Insure that the address

11571

+ is a proper indexed or indirect address for the lqarx instruction.

11572

+ On little endian systems, swap the hi/lo registers after the lqarx

11573

+ instruction.

11574

+ (load_lockedpti): Use indexed_or_indirect_operand predicate to

11575

+ insure the address is valid for the lqarx instruction.

11576

+ (store_conditionalti): Insure that the address is a proper indexed

11577

+ or indirect address for the stqcrx. instruction. On little endian

11578

+ systems, swap the hi/lo registers before doing the stqcrx.

11579

+ instruction.

11580

+ (store_conditionalpti): Use indexed_or_indirect_operand predicate to

11581

+ insure the address is valid for the stqcrx. instruction.

11582

+

11583

+ * gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):

11584

+ Define __QUAD_MEMORY__ and __QUAD_MEMORY_ATOMIC__ based on what

11585

+ type of quad memory support is available.

11586

+

11587

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11588

+

11589

+ Apply mainline r202190, powerpc64le multilibs and multiarch dir

11590

+ 2013-09-03 Alan Modra <amodra@gmail.com>

11591

+

11592

+ * config.gcc (powerpc*-*-linux*): Add support for little-endian

11593

+ multilibs to big-endian target and vice versa.

11594

+ * config/rs6000/t-linux64: Use := assignment on all vars.

11595

+ (MULTILIB_EXTRA_OPTS): Remove fPIC.

11596

+ (MULTILIB_OSDIRNAMES): Specify using mapping from multilib_options.

11597

+ * config/rs6000/t-linux64le: New file.

11598

+ * config/rs6000/t-linux64bele: New file.

11599

+ * config/rs6000/t-linux64lebe: New file.

11600

+

11601

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11602

+

11603

+ Back port from mainline

11604

+ 2014-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>

11605

+

11606

+ PR target/59844

11607

+ * config/rs6000/rs6000.md (reload_vsx_from_gprsf): Add little

11608

+ endian support, remove tests for WORDS_BIG_ENDIAN.

11609

+ (p8_mfvsrd_3_<mode>): Likewise.

11610

+ (reload_gpr_from_vsx<mode>): Likewise.

11611

+ (reload_gpr_from_vsxsf): Likewise.

11612

+ (p8_mfvsrd_4_disf): Likewise.

11613

+

11614

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11615

+

11616

+ Backport from mainline

11617

+ 2013-04-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11618

+

11619

+ PR target/56843

11620

+ * config/rs6000/rs6000.c (rs6000_emit_swdiv_high_precision): Remove.

11621

+ (rs6000_emit_swdiv_low_precision): Remove.

11622

+ (rs6000_emit_swdiv): Rewrite to handle between one and four

11623

+ iterations of Newton-Raphson generally; modify required number of

11624

+ iterations for some cases.

11625

+ * config/rs6000/rs6000.h (RS6000_RECIP_HIGH_PRECISION_P): Remove.

11626

+

11627

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11628

+

11629

+ Backport from mainline

11630

+ 2013-08-19 Peter Bergner <bergner@vnet.ibm.com>

11631

+ Jakub Jelinek <jakub@redhat.com>

11632

+

11633

+ * builtins.def (BUILT_IN_FABSD32): New DFP ABS builtin.

11634

+ (BUILT_IN_FABSD64): Likewise.

11635

+ (BUILT_IN_FABSD128): Likewise.

11636

+ * builtins.c (expand_builtin): Add support for

11637

+ new DFP ABS builtins.

11638

+ (fold_builtin_1): Likewise.

11639

+ * config/rs6000/dfp.md

11640

+ (*abstd2_fpr): Handle non-overlapping destination

11641

+ and source operands.

11642

+ (*nabstd2_fpr): Likewise.

11643

+

11644

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11645

+

11646

+ Apply mainline r205060.

11647

+ 2013-11-20 Alan Modra <amodra@gmail.com>

11648

+ * config/rs6000/sysv4.h (CC1_ENDIAN_LITTLE_SPEC): Define as empty.

11649

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Default

11650

+ to strict alignment on older processors when little-endian.

11651

+ * config/rs6000/linux64.h (PROCESSOR_DEFAULT64): Default to power8

11652

+ for ELFv2.

11653

+

11654

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11655

+

11656

+ POWER ELFv2 ABI Support

11657

+ Backport from mainline r204842:

11658

+

11659

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11660

+

11661

+ * doc/invoke.texi (-mabi=elfv1, -mabi=elfv2): Document.

11662

+

11663

+ Backport from mainline r204809:

11664

+

11665

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11666

+

11667

+ * config/rs6000/sysv4le.h (LINUX64_DEFAULT_ABI_ELFv2): Define.

11668

+

11669

+ Backport from mainline r204808:

11670

+

11671

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11672

+ Alan Modra <amodra@gmail.com>

11673

+

11674

+ * config/rs6000/rs6000.h (RS6000_SAVE_AREA): Handle ABI_ELFv2.

11675

+ (RS6000_SAVE_TOC): Remove.

11676

+ (RS6000_TOC_SAVE_SLOT): New macro.

11677

+ * config/rs6000/rs6000.c (rs6000_parm_offset): New function.

11678

+ (rs6000_parm_start): Use it.

11679

+ (rs6000_function_arg_advance_1): Likewise.

11680

+ (rs6000_emit_prologue): Use RS6000_TOC_SAVE_SLOT.

11681

+ (rs6000_emit_epilogue): Likewise.

11682

+ (rs6000_call_aix): Likewise.

11683

+ (rs6000_output_function_prologue): Do not save/restore r11

11684

+ around calling _mcount for ABI_ELFv2.

11685

+

11686

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11687

+ Alan Modra <amodra@gmail.com>

11688

+

11689

+ * config/rs6000/rs6000-protos.h (rs6000_reg_parm_stack_space):

11690

+ Add prototype.

11691

+ * config/rs6000/rs6000.h (RS6000_REG_SAVE): Remove.

11692

+ (REG_PARM_STACK_SPACE): Call rs6000_reg_parm_stack_space.

11693

+ * config/rs6000/rs6000.c (rs6000_parm_needs_stack): New function.

11694

+ (rs6000_function_parms_need_stack): Likewise.

11695

+ (rs6000_reg_parm_stack_space): Likewise.

11696

+ (rs6000_function_arg): Do not replace BLKmode by Pmode when

11697

+ returning a register argument.

11698

+

11699

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11700

+ Michael Gschwind <mkg@us.ibm.com>

11701

+

11702

+ * config/rs6000/rs6000.h (FP_ARG_MAX_RETURN): New macro.

11703

+ (ALTIVEC_ARG_MAX_RETURN): Likewise.

11704

+ (FUNCTION_VALUE_REGNO_P): Use them.

11705

+ * config/rs6000/rs6000.c (TARGET_RETURN_IN_MSB): Define.

11706

+ (rs6000_return_in_msb): New function.

11707

+ (rs6000_return_in_memory): Handle ELFv2 homogeneous aggregates.

11708

+ Handle aggregates of up to 16 bytes for ELFv2.

11709

+ (rs6000_function_value): Handle ELFv2 homogeneous aggregates.

11710

+

11711

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11712

+ Michael Gschwind <mkg@us.ibm.com>

11713

+

11714

+ * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.

11715

+ * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.

11716

+ (rs6000_discover_homogeneous_aggregate): Likewise.

11717

+ (rs6000_function_arg_boundary): Handle homogeneous aggregates.

11718

+ (rs6000_function_arg_advance_1): Likewise.

11719

+ (rs6000_function_arg): Likewise.

11720

+ (rs6000_arg_partial_bytes): Likewise.

11721

+ (rs6000_psave_function_arg): Handle BLKmode arguments.

11722

+

11723

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11724

+ Michael Gschwind <mkg@us.ibm.com>

11725

+

11726

+ * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.

11727

+ * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.

11728

+ (rs6000_discover_homogeneous_aggregate): Likewise.

11729

+ (rs6000_function_arg_boundary): Handle homogeneous aggregates.

11730

+ (rs6000_function_arg_advance_1): Likewise.

11731

+ (rs6000_function_arg): Likewise.

11732

+ (rs6000_arg_partial_bytes): Likewise.

11733

+ (rs6000_psave_function_arg): Handle BLKmode arguments.

11734

+

11735

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11736

+

11737

+ * config/rs6000/rs6000.c (machine_function): New member

11738

+ r2_setup_needed.

11739

+ (rs6000_emit_prologue): Set r2_setup_needed if necessary.

11740

+ (rs6000_output_mi_thunk): Set r2_setup_needed.

11741

+ (rs6000_output_function_prologue): Output global entry point

11742

+ prologue and local entry point marker if needed for ABI_ELFv2.

11743

+ Output -mprofile-kernel code here.

11744

+ (output_function_profiler): Do not output -mprofile-kernel

11745

+ code here; moved to rs6000_output_function_prologue.

11746

+ (rs6000_file_start): Output ".abiversion 2" for ABI_ELFv2.

11747

+

11748

+ (rs6000_emit_move): Do not handle dot symbols for ABI_ELFv2.

11749

+ (rs6000_output_function_entry): Likewise.

11750

+ (rs6000_assemble_integer): Likewise.

11751

+ (rs6000_elf_encode_section_info): Likewise.

11752

+ (rs6000_elf_declare_function_name): Do not create dot symbols

11753

+ or .opd section for ABI_ELFv2.

11754

+

11755

+ (rs6000_trampoline_size): Update for ABI_ELFv2 trampolines.

11756

+ (rs6000_trampoline_init): Likewise.

11757

+ (rs6000_elf_file_end): Call file_end_indicate_exec_stack

11758

+ for ABI_ELFv2.

11759

+

11760

+ (rs6000_call_aix): Handle ELFv2 indirect calls. Do not check

11761

+ for function descriptors in ABI_ELFv2.

11762

+

11763

+ * config/rs6000/rs6000.md ("*call_indirect_aix<mode>"): Support

11764

+ on ABI_AIX only, not ABI_ELFv2.

11765

+ ("*call_value_indirect_aix<mode>"): Likewise.

11766

+ ("*call_indirect_elfv2<mode>"): New pattern.

11767

+ ("*call_value_indirect_elfv2<mode>"): Likewise.

11768

+

11769

+ * config/rs6000/predicates.md ("symbol_ref_operand"): Do not

11770

+ check for function descriptors in ABI_ELFv2.

11771

+ ("current_file_function_operand"): Likewise.

11772

+

11773

+ * config/rs6000/ppc-asm.h [__powerpc64__ && _CALL_ELF == 2]:

11774

+ (toc): Undefine.

11775

+ (FUNC_NAME): Define ELFv2 variant.

11776

+ (JUMP_TARGET): Likewise.

11777

+ (FUNC_START): Likewise.

11778

+ (HIDDEN_FUNC): Likewise.

11779

+ (FUNC_END): Likeiwse.

11780

+

11781

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11782

+

11783

+ * config.gcc [powerpc*-*-* | rs6000-*-*]: Support --with-abi=elfv1

11784

+ and --with-abi=elfv2.

11785

+ * config/rs6000/option-defaults.h (OPTION_DEFAULT_SPECS): Add "abi".

11786

+ * config/rs6000/rs6000.opt (mabi=elfv1): New option.

11787

+ (mabi=elfv2): Likewise.

11788

+ * config/rs6000/rs6000-opts.h (enum rs6000_abi): Add ABI_ELFv2.

11789

+ * config/rs6000/linux64.h (DEFAULT_ABI): Do not hard-code to AIX_ABI

11790

+ if !RS6000_BI_ARCH.

11791

+ (ELFv2_ABI_CHECK): New macro.

11792

+ (SUBSUBTARGET_OVERRIDE_OPTIONS): Use it to decide whether to set

11793

+ rs6000_current_abi to ABI_AIX or ABI_ELFv2.

11794

+ (GLIBC_DYNAMIC_LINKER64): Support ELFv2 ld.so version.

11795

+ * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Predefine

11796

+ _CALL_ELF and __STRUCT_PARM_ALIGN__ if appropriate.

11797

+

11798

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Handle ABI_ELFv2.

11799

+ (debug_stack_info): Likewise.

11800

+ (rs6000_file_start): Treat ABI_ELFv2 the same as ABI_AIX.

11801

+ (rs6000_legitimize_tls_address): Likewise.

11802

+ (rs6000_conditional_register_usage): Likewise.

11803

+ (rs6000_emit_move): Likewise.

11804

+ (init_cumulative_args): Likewise.

11805

+ (rs6000_function_arg_advance_1): Likewise.

11806

+ (rs6000_function_arg): Likewise.

11807

+ (rs6000_arg_partial_bytes): Likewise.

11808

+ (rs6000_output_function_entry): Likewise.

11809

+ (rs6000_assemble_integer): Likewise.

11810

+ (rs6000_savres_strategy): Likewise.

11811

+ (rs6000_stack_info): Likewise.

11812

+ (rs6000_function_ok_for_sibcall): Likewise.

11813

+ (rs6000_emit_load_toc_table): Likewise.

11814

+ (rs6000_savres_routine_name): Likewise.

11815

+ (ptr_regno_for_savres): Likewise.

11816

+ (rs6000_emit_prologue): Likewise.

11817

+ (rs6000_emit_epilogue): Likewise.

11818

+ (rs6000_output_function_epilogue): Likewise.

11819

+ (output_profile_hook): Likewise.

11820

+ (output_function_profiler): Likewise.

11821

+ (rs6000_trampoline_size): Likewise.

11822

+ (rs6000_trampoline_init): Likewise.

11823

+ (rs6000_elf_output_toc_section_asm_op): Likewise.

11824

+ (rs6000_elf_encode_section_info): Likewise.

11825

+ (rs6000_elf_reloc_rw_mask): Likewise.

11826

+ (rs6000_elf_declare_function_name): Likewise.

11827

+ (rs6000_function_arg_boundary): Treat ABI_ELFv2 the same as ABI_AIX,

11828

+ except that rs6000_compat_align_parm is always assumed false.

11829

+ (rs6000_gimplify_va_arg): Likewise.

11830

+ (rs6000_call_aix): Update comment.

11831

+ (rs6000_sibcall_aix): Likewise.

11832

+ * config/rs6000/rs6000.md ("tls_gd_aix<TLSmode:tls_abi_suffix>"):

11833

+ Treat ABI_ELFv2 the same as ABI_AIX.

11834

+ ("*tls_gd_call_aix<TLSmode:tls_abi_suffix>"): Likewise.

11835

+ ("tls_ld_aix<TLSmode:tls_abi_suffix>"): Likewise.

11836

+ ("*tls_ld_call_aix<TLSmode:tls_abi_suffix>"): Likewise.

11837

+ ("load_toc_aix_si"): Likewise.

11838

+ ("load_toc_aix_di"): Likewise.

11839

+ ("call"): Likewise.

11840

+ ("call_value"): Likewise.

11841

+ ("*call_local_aix<mode>"): Likewise.

11842

+ ("*call_value_local_aix<mode>"): Likewise.

11843

+ ("*call_nonlocal_aix<mode>"): Likewise.

11844

+ ("*call_value_nonlocal_aix<mode>"): Likewise.

11845

+ ("*call_indirect_aix<mode>"): Likewise.

11846

+ ("*call_value_indirect_aix<mode>"): Likewise.

11847

+ ("sibcall"): Likewise.

11848

+ ("sibcall_value"): Likewise.

11849

+ ("*sibcall_aix<mode>"): Likewise.

11850

+ ("*sibcall_value_aix<mode>"): Likewise.

11851

+ * config/rs6000/predicates.md ("symbol_ref_operand"): Likewise.

11852

+ ("current_file_function_operand"): Likewise.

11853

+

11854

+ Backport from mainline r204807:

11855

+

11856

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11857

+

11858

+ * config/rs6000/rs6000.c (rs6000_arg_partial_bytes): Simplify logic

11859

+ by making use of the fact that for vector / floating point arguments

11860

+ passed both in VRs/FPRs and in the fixed parameter area, the partial

11861

+ bytes mechanism is in fact not used.

11862

+

11863

+ Backport from mainline r204806:

11864

+

11865

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11866

+

11867

+ * config/rs6000/rs6000.c (rs6000_psave_function_arg): New function.

11868

+ (rs6000_finish_function_arg): Likewise.

11869

+ (rs6000_function_arg): Use rs6000_psave_function_arg and

11870

+ rs6000_finish_function_arg to handle both vector and floating

11871

+ point arguments that are also passed in GPRs / the stack.

11872

+

11873

+ Backport from mainline r204805:

11874

+

11875

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11876

+

11877

+ * config/rs6000/rs6000.c (USE_FP_FOR_ARG_P): Remove TYPE argument.

11878

+ (USE_ALTIVEC_FOR_ARG_P): Likewise.

11879

+ (rs6000_darwin64_record_arg_advance_recurse): Update uses.

11880

+ (rs6000_function_arg_advance_1):Likewise.

11881

+ (rs6000_darwin64_record_arg_recurse): Likewise.

11882

+ (rs6000_function_arg): Likewise.

11883

+ (rs6000_arg_partial_bytes): Likewise.

11884

+

11885

+ Backport from mainline r204804:

11886

+

11887

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11888

+

11889

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Replace

11890

+ "DEFAULT_ABI != ABI_AIX" test by testing for ABI_V4 or ABI_DARWIN.

11891

+ (rs6000_savres_strategy): Likewise.

11892

+ (rs6000_return_addr): Likewise.

11893

+ (rs6000_emit_load_toc_table): Replace "DEFAULT_ABI != ABI_AIX" by

11894

+ testing for ABI_V4 (since ABI_DARWIN is impossible here).

11895

+ (rs6000_emit_prologue): Likewise.

11896

+ (legitimate_lo_sum_address_p): Simplify DEFAULT_ABI test.

11897

+ (rs6000_elf_declare_function_name): Remove duplicated test.

11898

+ * config/rs6000/rs6000.md ("load_toc_v4_PIC_1"): Explicitly test

11899

+ for ABI_V4 (instead of "DEFAULT_ABI != ABI_AIX" test).

11900

+ ("load_toc_v4_PIC_1_normal"): Likewise.

11901

+ ("load_toc_v4_PIC_1_476"): Likewise.

11902

+ ("load_toc_v4_PIC_1b"): Likewise.

11903

+ ("load_toc_v4_PIC_1b_normal"): Likewise.

11904

+ ("load_toc_v4_PIC_1b_476"): Likewise.

11905

+ ("load_toc_v4_PIC_2"): Likewise.

11906

+ ("load_toc_v4_PIC_3b"): Likewise.

11907

+ ("load_toc_v4_PIC_3c"): Likewise.

11908

+ * config/rs6000/rs6000.h (RS6000_REG_SAVE): Simplify DEFAULT_ABI test.

11909

+ (RS6000_SAVE_AREA): Likewise.

11910

+ (FP_ARG_MAX_REG): Likewise.

11911

+ (RETURN_ADDRESS_OFFSET): Likewise.

11912

+ * config/rs6000/sysv.h (TARGET_TOC): Test for ABI_V4 instead

11913

+ of ABI_AIX.

11914

+ (SUBTARGET_OVERRIDE_OPTIONS): Likewise.

11915

+ (MINIMAL_TOC_SECTION_ASM_OP): Likewise.

11916

+

11917

+ Backport from mainline r204803:

11918

+

11919

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11920

+

11921

+ * config/rs6000/rs6000.c (rs6000_call_indirect_aix): Rename to ...

11922

+ (rs6000_call_aix): ... this. Handle both direct and indirect calls.

11923

+ Create call insn directly instead of via various gen_... routines.

11924

+ Mention special registers used by the call in CALL_INSN_FUNCTION_USAGE.

11925

+ (rs6000_sibcall_aix): New function.

11926

+ * config/rs6000/rs6000.md (TOC_SAVE_OFFSET_32BIT): Remove.

11927

+ (TOC_SAVE_OFFSET_64BIT): Likewise.

11928

+ (AIX_FUNC_DESC_TOC_32BIT): Likewise.

11929

+ (AIX_FUNC_DESC_TOC_64BIT): Likewise.

11930

+ (AIX_FUNC_DESC_SC_32BIT): Likewise.

11931

+ (AIX_FUNC_DESC_SC_64BIT): Likewise.

11932

+ ("call" expander): Call rs6000_call_aix.

11933

+ ("call_value" expander): Likewise.

11934

+ ("call_indirect_aix<ptrsize>"): Replace this pattern ...

11935

+ ("call_indirect_aix<ptrsize>_nor11"): ... and this pattern ...

11936

+ ("*call_indirect_aix<mode>"): ... by this insn pattern.

11937

+ ("call_value_indirect_aix<ptrsize>"): Replace this pattern ...

11938

+ ("call_value_indirect_aix<ptrsize>_nor11"): ... and this pattern ...

11939

+ ("*call_value_indirect_aix<mode>"): ... by this insn pattern.

11940

+ ("*call_nonlocal_aix32", "*call_nonlocal_aix64"): Replace by ...

11941

+ ("*call_nonlocal_aix<mode>"): ... this pattern.

11942

+ ("*call_value_nonlocal_aix32", "*call_value_nonlocal_aix64"): Replace

11943

+ ("*call_value_nonlocal_aix<mode>"): ... by this pattern.

11944

+ ("*call_local_aix<mode>"): New insn pattern.

11945

+ ("*call_value_local_aix<mode>"): Likewise.

11946

+ ("sibcall" expander): Call rs6000_sibcall_aix.

11947

+ ("sibcall_value" expander): Likewise. Move earlier in file.

11948

+ ("*sibcall_nonlocal_aix<mode>"): Replace by ...

11949

+ ("*sibcall_aix<mode>"): ... this pattern.

11950

+ ("*sibcall_value_nonlocal_aix<mode>"): Replace by ...

11951

+ ("*sibcall_value_aix<mode>"): ... this pattern.

11952

+ * config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): Remove.

11953

+ (rs6000_call_aix): Add prototype.

11954

+ (rs6000_sibcall_aix): Likewise.

11955

+

11956

+ Backport from mainline r204799:

11957

+

11958

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11959

+

11960

+ * config/rs6000/rs6000.c (rs6000_emit_prologue): Do not place a

11961

+ RTX_FRAME_RELATED_P marker on the UNSPEC_MOVESI_FROM_CR insn.

11962

+ Instead, add USEs of all modified call-saved CR fields to the

11963

+ insn storing the result to the stack slot, and provide an

11964

+ appropriate REG_FRAME_RELATED_EXPR for that insn.

11965

+ * config/rs6000/rs6000.md ("*crsave"): New insn pattern.

11966

+ * config/rs6000/predicates.md ("crsave_operation"): New predicate.

11967

+

11968

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

11969

+

11970

+ ELFv2 ABI Call Support

11971

+ Backport from mainline r204798:

11972

+

11973

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11974

+ Alan Modra <amodra@gmail.com>

11975

+

11976

+ * function.c (assign_parms): Use all.reg_parm_stack_space instead

11977

+ of re-evaluating REG_PARM_STACK_SPACE target macro.

11978

+ (locate_and_pad_parm): New parameter REG_PARM_STACK_SPACE. Use it

11979

+ instead of evaluating target macro REG_PARM_STACK_SPACE every time.

11980

+ (assign_parm_find_entry_rtl): Update call.

11981

+ * calls.c (initialize_argument_information): Update call.

11982

+ (emit_library_call_value_1): Likewise.

11983

+ * expr.h (locate_and_pad_parm): Update prototype.

11984

+

11985

+ Backport from mainline r204797:

11986

+

11987

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

11988

+

11989

+ * calls.c (store_unaligned_arguments_into_pseudos): Skip PARALLEL

11990

+ arguments.

11991

+

11992

+ Backport from mainline r197003:

11993

+

11994

+ 2013-03-23 Eric Botcazou <ebotcazou@adacore.com>

11995

+

11996

+ * calls.c (expand_call): Add missing guard to code handling return

11997

+ of non-BLKmode structures in MSB.

11998

+ * function.c (expand_function_end): Likewise.

11999

+

12000

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12001

+

12002

+ Backport from mainline r201750.

12003

+ Note: Default setting of -mcompat-align-parm inverted!

12004

+

12005

+ 2013-08-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12006

+

12007

+ PR target/57949

12008

+ * doc/invoke.texi: Add documentation of mcompat-align-parm

12009

+ option.

12010

+ * config/rs6000/rs6000.opt: Add mcompat-align-parm option.

12011

+ * config/rs6000/rs6000.c (rs6000_function_arg_boundary): For AIX

12012

+ and Linux, correct BLKmode alignment when 128-bit alignment is

12013

+ required and compatibility flag is not set.

12014

+ (rs6000_gimplify_va_arg): For AIX and Linux, honor specified

12015

+ alignment for zero-size arguments when compatibility flag is not

12016

+ set.

12017

+

12018

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12019

+

12020

+ Little Endian Vector Support

12021

+ Backport from mainline r205333

12022

+ 2013-11-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12023

+

12024

+ * config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Correct

12025

+ for little endian.

12026

+

12027

+ Backport from mainline r205241

12028

+ 2013-11-21 Bill Schmidt <wschmidt@vnet.ibm.com>

12029

+

12030

+ * config/rs6000/vector.md (vec_pack_trunc_v2df): Revert previous

12031

+ little endian change.

12032

+ (vec_pack_sfix_trunc_v2df): Likewise.

12033

+ (vec_pack_ufix_trunc_v2df): Likewise.

12034

+ * config/rs6000/rs6000.c (rs6000_expand_interleave): Correct

12035

+ double checking of endianness.

12036

+

12037

+ Backport from mainline r205146

12038

+ 2013-11-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12039

+

12040

+ * config/rs6000/vsx.md (vsx_set_<mode>): Adjust for little endian.

12041

+ (vsx_extract_<mode>): Likewise.

12042

+ (*vsx_extract_<mode>_one_le): New LE variant on

12043

+ *vsx_extract_<mode>_zero.

12044

+ (vsx_extract_v4sf): Adjust for little endian.

12045

+

12046

+ Backport from mainline r205080

12047

+ 2013-11-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12048

+

12049

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Adjust

12050

+ V16QI vector splat case for little endian.

12051

+

12052

+ Backport from mainline r205045:

12053

+

12054

+ 2013-11-19 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

12055

+

12056

+ * config/rs6000/vector.md ("mov<mode>"): Do not call

12057

+ rs6000_emit_le_vsx_move to move into or out of GPRs.

12058

+ * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Assert

12059

+ source and destination are not GPR hard regs.

12060

+

12061

+ Backport from mainline r204920

12062

+ 2011-11-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12063

+

12064

+ * config/rs6000/rs6000.c (rs6000_frame_related): Add split_reg

12065

+ parameter and use it in REG_FRAME_RELATED_EXPR note.

12066

+ (emit_frame_save): Call rs6000_frame_related with extra NULL_RTX

12067

+ parameter.

12068

+ (rs6000_emit_prologue): Likewise, but for little endian VSX

12069

+ stores, pass the source register of the store instead.

12070

+

12071

+ Backport from mainline r204862

12072

+ 2013-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12073

+

12074

+ * config/rs6000/altivec.md (UNSPEC_VPERM_X, UNSPEC_VPERM_UNS_X):

12075

+ Remove.

12076

+ (altivec_vperm_<mode>): Revert earlier little endian change.

12077

+ (*altivec_vperm_<mode>_internal): Remove.

12078

+ (altivec_vperm_<mode>_uns): Revert earlier little endian change.

12079

+ (*altivec_vperm_<mode>_uns_internal): Remove.

12080

+ * config/rs6000/vector.md (vec_realign_load_<mode>): Revise

12081

+ commentary.

12082

+

12083

+ Backport from mainline r204441

12084

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12085

+

12086

+ * config/rs6000/rs6000.c (rs6000_option_override_internal):

12087

+ Remove restriction against use of VSX instructions when generating

12088

+ code for little endian mode.

12089

+

12090

+ Backport from mainline r204440

12091

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12092

+

12093

+ * config/rs6000/altivec.md (mulv4si3): Ensure we generate vmulouh

12094

+ for both big and little endian.

12095

+ (mulv8hi3): Swap input operands for merge high and merge low

12096

+ instructions for little endian.

12097

+

12098

+ Backport from mainline r204439

12099

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12100

+

12101

+ * config/rs6000/altivec.md (vec_widen_umult_even_v16qi): Change

12102

+ define_insn to define_expand that uses even patterns for big

12103

+ endian and odd patterns for little endian.

12104

+ (vec_widen_smult_even_v16qi): Likewise.

12105

+ (vec_widen_umult_even_v8hi): Likewise.

12106

+ (vec_widen_smult_even_v8hi): Likewise.

12107

+ (vec_widen_umult_odd_v16qi): Likewise.

12108

+ (vec_widen_smult_odd_v16qi): Likewise.

12109

+ (vec_widen_umult_odd_v8hi): Likewise.

12110

+ (vec_widen_smult_odd_v8hi): Likewise.

12111

+ (altivec_vmuleub): New define_insn.

12112

+ (altivec_vmuloub): Likewise.

12113

+ (altivec_vmulesb): Likewise.

12114

+ (altivec_vmulosb): Likewise.

12115

+ (altivec_vmuleuh): Likewise.

12116

+ (altivec_vmulouh): Likewise.

12117

+ (altivec_vmulesh): Likewise.

12118

+ (altivec_vmulosh): Likewise.

12119

+

12120

+ Backport from mainline r204395

12121

+ 2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12122

+

12123

+ * config/rs6000/vector.md (vec_pack_sfix_trunc_v2df): Adjust for

12124

+ little endian.

12125

+ (vec_pack_ufix_trunc_v2df): Likewise.

12126

+

12127

+ Backport from mainline r204363

12128

+ 2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12129

+

12130

+ * config/rs6000/altivec.md (vec_widen_umult_hi_v16qi): Swap

12131

+ arguments to merge instruction for little endian.

12132

+ (vec_widen_umult_lo_v16qi): Likewise.

12133

+ (vec_widen_smult_hi_v16qi): Likewise.

12134

+ (vec_widen_smult_lo_v16qi): Likewise.

12135

+ (vec_widen_umult_hi_v8hi): Likewise.

12136

+ (vec_widen_umult_lo_v8hi): Likewise.

12137

+ (vec_widen_smult_hi_v8hi): Likewise.

12138

+ (vec_widen_smult_lo_v8hi): Likewise.

12139

+

12140

+ Backport from mainline r204350

12141

+ 2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12142

+

12143

+ * config/rs6000/vsx.md (*vsx_le_perm_store_<mode> for VSX_D):

12144

+ Replace the define_insn_and_split with a define_insn and two

12145

+ define_splits, with the split after reload re-permuting the source

12146

+ register to its original value.

12147

+ (*vsx_le_perm_store_<mode> for VSX_W): Likewise.

12148

+ (*vsx_le_perm_store_v8hi): Likewise.

12149

+ (*vsx_le_perm_store_v16qi): Likewise.

12150

+

12151

+ Backport from mainline r204321

12152

+ 2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12153

+

12154

+ * config/rs6000/vector.md (vec_pack_trunc_v2df): Adjust for

12155

+ little endian.

12156

+

12157

+ Backport from mainline r204321

12158

+ 2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

12159

+

12160

+ * config/rs6000/rs6000.c (rs6000_expand_vector_set): Adjust for

12161

+ little endian.

12162

+

12163

+ Backport from mainline r203980

12164

+ 2013-10-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12165

+

12166

+ * config/rs6000/altivec.md (mulv8hi3): Adjust for little endian.

12167

+

12168

+ Backport from mainline r203930

12169

+ 2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com>

12170

+

12171

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse

12172

+ meaning of merge-high and merge-low masks for little endian; avoid

12173

+ use of vector-pack masks for little endian for mismatched modes.

12174

+

12175

+ Backport from mainline r203877

12176

+ 2013-10-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12177

+

12178

+ * config/rs6000/altivec.md (vec_unpacku_hi_v16qi): Adjust for

12179

+ little endian.

12180

+ (vec_unpacku_hi_v8hi): Likewise.

12181

+ (vec_unpacku_lo_v16qi): Likewise.

12182

+ (vec_unpacku_lo_v8hi): Likewise.

12183

+

12184

+ Backport from mainline r203863

12185

+ 2013-10-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12186

+

12187

+ * config/rs6000/rs6000.c (vspltis_constant): Make sure we check

12188

+ all elements for both endian flavors.

12189

+

12190

+ Backport from mainline r203714

12191

+ 2013-10-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12192

+

12193

+ * gcc/config/rs6000/vector.md (vec_unpacks_hi_v4sf): Correct for

12194

+ endianness.

12195

+ (vec_unpacks_lo_v4sf): Likewise.

12196

+ (vec_unpacks_float_hi_v4si): Likewise.

12197

+ (vec_unpacks_float_lo_v4si): Likewise.

12198

+ (vec_unpacku_float_hi_v4si): Likewise.

12199

+ (vec_unpacku_float_lo_v4si): Likewise.

12200

+

12201

+ Backport from mainline r203713

12202

+ 2013-10-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12203

+

12204

+ * config/rs6000/vsx.md (vsx_concat_<mode>): Adjust output for LE.

12205

+ (vsx_concat_v2sf): Likewise.

12206

+

12207

+ Backport from mainline r203458

12208

+ 2013-10-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12209

+

12210

+ * config/rs6000/vsx.md (*vsx_le_perm_load_v2di): Generalize to

12211

+ handle vector float as well.

12212

+ (*vsx_le_perm_load_v4si): Likewise.

12213

+ (*vsx_le_perm_store_v2di): Likewise.

12214

+ (*vsx_le_perm_store_v4si): Likewise.

12215

+

12216

+ Backport from mainline r203457

12217

+ 2013-10-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12218

+

12219

+ * config/rs6000/vector.md (vec_realign_load<mode>): Generate vperm

12220

+ directly to circumvent subtract from splat{31} workaround.

12221

+ * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_le): New

12222

+ prototype.

12223

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_le): New.

12224

+ * config/rs6000/altivec.md (define_c_enum "unspec"): Add

12225

+ UNSPEC_VPERM_X and UNSPEC_VPERM_UNS_X.

12226

+ (altivec_vperm_<mode>): Convert to define_insn_and_split to

12227

+ separate big and little endian logic.

12228

+ (*altivec_vperm_<mode>_internal): New define_insn.

12229

+ (altivec_vperm_<mode>_uns): Convert to define_insn_and_split to

12230

+ separate big and little endian logic.

12231

+ (*altivec_vperm_<mode>_uns_internal): New define_insn.

12232

+ (vec_permv16qi): Add little endian logic.

12233

+

12234

+ Backport from mainline r203247

12235

+ 2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12236

+

12237

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const_le): New.

12238

+ (altivec_expand_vec_perm_const): Call it.

12239

+

12240

+ Backport from mainline r203246

12241

+ 2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12242

+

12243

+ * config/rs6000/vector.md (mov<mode>): Emit permuted move

12244

+ sequences for LE VSX loads and stores at expand time.

12245

+ * config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_move): New

12246

+ prototype.

12247

+ * config/rs6000/rs6000.c (rs6000_const_vec): New.

12248

+ (rs6000_gen_le_vsx_permute): New.

12249

+ (rs6000_gen_le_vsx_load): New.

12250

+ (rs6000_gen_le_vsx_store): New.

12251

+ (rs6000_gen_le_vsx_move): New.

12252

+ * config/rs6000/vsx.md (*vsx_le_perm_load_v2di): New.

12253

+ (*vsx_le_perm_load_v4si): New.

12254

+ (*vsx_le_perm_load_v8hi): New.

12255

+ (*vsx_le_perm_load_v16qi): New.

12256

+ (*vsx_le_perm_store_v2di): New.

12257

+ (*vsx_le_perm_store_v4si): New.

12258

+ (*vsx_le_perm_store_v8hi): New.

12259

+ (*vsx_le_perm_store_v16qi): New.

12260

+ (*vsx_xxpermdi2_le_<mode>): New.

12261

+ (*vsx_xxpermdi4_le_<mode>): New.

12262

+ (*vsx_xxpermdi8_le_V8HI): New.

12263

+ (*vsx_xxpermdi16_le_V16QI): New.

12264

+ (*vsx_lxvd2x2_le_<mode>): New.

12265

+ (*vsx_lxvd2x4_le_<mode>): New.

12266

+ (*vsx_lxvd2x8_le_V8HI): New.

12267

+ (*vsx_lxvd2x16_le_V16QI): New.

12268

+ (*vsx_stxvd2x2_le_<mode>): New.

12269

+ (*vsx_stxvd2x4_le_<mode>): New.

12270

+ (*vsx_stxvd2x8_le_V8HI): New.

12271

+ (*vsx_stxvd2x16_le_V16QI): New.

12272

+

12273

+ Backport from mainline r201235

12274

+ 2013-07-24 Bill Schmidt <wschmidt@linux.ibm.com>

12275

+ Anton Blanchard <anton@au1.ibm.com>

12276

+

12277

+ * config/rs6000/altivec.md (altivec_vpkpx): Handle little endian.

12278

+ (altivec_vpks<VI_char>ss): Likewise.

12279

+ (altivec_vpks<VI_char>us): Likewise.

12280

+ (altivec_vpku<VI_char>us): Likewise.

12281

+ (altivec_vpku<VI_char>um): Likewise.

12282

+

12283

+ Backport from mainline r201208

12284

+ 2013-07-24 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

12285

+ Anton Blanchard <anton@au1.ibm.com>

12286

+

12287

+ * config/rs6000/vector.md (vec_realign_load_<mode>): Reorder input

12288

+ operands to vperm for little endian.

12289

+ * config/rs6000/rs6000.c (rs6000_expand_builtin): Use lvsr instead

12290

+ of lvsl to create the control mask for a vperm for little endian.

12291

+

12292

+ Backport from mainline r201195

12293

+ 2013-07-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12294

+ Anton Blanchard <anton@au1.ibm.com>

12295

+

12296

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse

12297

+ two operands for little-endian.

12298

+

12299

+ Backport from mainline r201193

12300

+ 2013-07-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12301

+ Anton Blanchard <anton@au1.ibm.com>

12302

+

12303

+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Correct

12304

+ selection of field for vector splat in little endian mode.

12305

+

12306

+ Backport from mainline r201149

12307

+ 2013-07-22 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

12308

+ Anton Blanchard <anton@au1.ibm.com>

12309

+

12310

+ * config/rs6000/rs6000.c (rs6000_expand_vector_init): Fix

12311

+ endianness when selecting field to splat.

12312

+

12313

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12314

+

12315

+ Backport from mainline r205123:

12316

+

12317

+ 2013-11-20 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

12318

+

12319

+ * config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Do not

12320

+ allow subregs of TDmode in FPRs of smaller size in little-endian.

12321

+ (rs6000_split_multireg_move): When splitting an access to TDmode

12322

+ in FPRs, do not use simplify_gen_subreg.

12323

+

12324

+ Backport from mainline r204927:

12325

+

12326

+ 2013-11-17 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

12327

+

12328

+ * config/rs6000/rs6000.c (rs6000_emit_move): Use low word of

12329

+ sdmode_stack_slot also in little-endian mode.

12330

+

12331

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12332

+

12333

+ Power8 HTM Support

12334

+ Backport from mainline

12335

+ 2013-12-03 Peter Bergner <bergner@vnet.ibm.com>

12336

+

12337

+ * config/rs6000/htmintrin.h (_TEXASR_INSTRUCTION_FETCH_CONFLICT): Fix

12338

+ typo in macro name.

12339

+ (_TEXASRU_INSTRUCTION_FETCH_CONFLICT): Likewise.

12340

+

12341

+ Backport from mainline r205233.

12342

+ 2013-11-21 Peter Bergner <bergner@vnet.ibm.com>

12343

+

12344

+ * doc/extend.texi: Document htm builtins.

12345

+

12346

+ Backport from mainline

12347

+ 2013-07-17 Iain Sandoe <iain@codesourcery.com>

12348

+

12349

+ * config/rs6000/darwin.h (REGISTER_NAMES): Add HTM registers.

12350

+

12351

+ Backport from mainline

12352

+ 2013-07-16 Peter Bergner <bergner@vnet.ibm.com>

12353

+

12354

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not

12355

+ enable extra ISA flags with TARGET_HTM.

12356

+

12357

+ 2013-07-16 Jakub Jelinek <jakub@redhat.com>

12358

+ Peter Bergner <bergner@vnet.ibm.com>

12359

+

12360

+ * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTERS): Mention HTM

12361

+ registers in the comment.

12362

+ (DWARF_FRAME_REGISTERS): Subtract also the 3 HTM registers.

12363

+ (DWARF_REG_TO_UNWIND_COLUMN): Use DWARF_FRAME_REGISTERS

12364

+ rather than FIRST_PSEUDO_REGISTERS.

12365

+

12366

+ * config.gcc (powerpc*-*-*): Install htmintrin.h and htmxlintrin.h.

12367

+ * config/rs6000/t-rs6000 (MD_INCLUDES): Add htm.md.

12368

+ * config/rs6000/rs6000.opt: Add -mhtm option.

12369

+ * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_HTM.

12370

+ (ISA_2_7_MASKS_SERVER): Add OPTION_MASK_HTM.

12371

+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define

12372

+ __HTM__ if the HTM instructions are available.

12373

+ * config/rs6000/predicates.md (u3bit_cint_operand, u10bit_cint_operand)

12374

+ (htm_spr_reg_operand): New define_predicates.

12375

+ * config/rs6000/rs6000.md (define_attr "type"): Add htm.

12376

+ (TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO): New define_constants.

12377

+ Include htm.md.

12378

+ * config/rs6000/rs6000-builtin.def (BU_HTM_0, BU_HTM_1, BU_HTM_2)

12379

+ (BU_HTM_3, BU_HTM_SPR0, BU_HTM_SPR1): Add support macros for defining

12380

+ HTM builtin functions.

12381

+ * config/rs6000/rs6000.c (RS6000_BUILTIN_H): New macro.

12382

+ (rs6000_reg_names, alt_reg_names): Add HTM SPR register names.

12383

+ (rs6000_init_hard_regno_mode_ok): Add support for HTM instructions.

12384

+ (rs6000_builtin_mask_calculate): Likewise.

12385

+ (rs6000_option_override_internal): Likewise.

12386

+ (bdesc_htm): Add new HTM builtin support.

12387

+ (htm_spr_num): New function.

12388

+ (htm_spr_regno): Likewise.

12389

+ (rs6000_htm_spr_icode): Likewise.

12390

+ (htm_expand_builtin): Likewise.

12391

+ (htm_init_builtins): Likewise.

12392

+ (rs6000_expand_builtin): Add support for HTM builtin functions.

12393

+ (rs6000_init_builtins): Likewise.

12394

+ (rs6000_invalid_builtin, rs6000_opt_mask): Add support for -mhtm option.

12395

+ * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mhtm.

12396

+ (TARGET_HTM, MASK_HTM): Define macros.

12397

+ (FIRST_PSEUDO_REGISTER): Adjust for new HTM SPR registers.

12398

+ (FIXED_REGISTERS): Likewise.

12399

+ (CALL_USED_REGISTERS): Likewise.

12400

+ (CALL_REALLY_USED_REGISTERS): Likewise.

12401

+ (REG_ALLOC_ORDER): Likewise.

12402

+ (enum reg_class): Likewise.

12403

+ (REG_CLASS_NAMES): Likewise.

12404

+ (REG_CLASS_CONTENTS): Likewise.

12405

+ (REGISTER_NAMES): Likewise.

12406

+ (ADDITIONAL_REGISTER_NAMES): Likewise.

12407

+ (RS6000_BTC_SPR, RS6000_BTC_VOID, RS6000_BTC_32BIT, RS6000_BTC_64BIT)

12408

+ (RS6000_BTC_MISC_MASK, RS6000_BTM_HTM): New macros.

12409

+ (RS6000_BTM_COMMON): Add RS6000_BTM_HTM.

12410

+ * config/rs6000/htm.md: New file.

12411

+ * config/rs6000/htmintrin.h: New file.

12412

+ * config/rs6000/htmxlintrin.h: New file.

12413

+

12414

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

12415

+

12416

+ Power8 Base Support

12417

+ Apply mainline

12418

+ 2013-11-23 Alan Modra <amodra@gmail.com>

12419

+ * config/rs6000/vsx.md (fusion peepholes): Disable when !TARGET_VSX.

12420

+

12421

+ Backport from mainline

12422

+ 2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com>

12423

+

12424

+ PR target/59054

12425

+ * config/rs6000/rs6000.md (movdi_internal32): Eliminate

12426

+ constraints that would allow DImode into the traditional Altivec

12427

+ registers, but cause undesirable code generation when loading 0 as

12428

+ a constant.

12429

+ (movdi_internal64): Likewise.

12430

+ (cmp<mode>_fpr): Do not use %x for CR register output.

12431

+ (extendsfdf2_fpr): Fix constraints when -mallow-upper-df and

12432

+ -mallow-upper-sf debug switches are used.

12433

+

12434

+ Backport from mainline

12435

+ 2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>

12436

+

12437

+ * config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new

12438

+ fields to the reg_addr array that describes the valid addressing

12439

+ mode for any register, general purpose registers, floating point

12440

+ registers, and Altivec registers.

12441

+ (FIRST_RELOAD_REG_CLASS): Likewise.

12442

+ (LAST_RELOAD_REG_CLASS): Likewise.

12443

+ (struct reload_reg_map_type): Likewise.

12444

+ (reload_reg_map_type): Likewise.

12445

+ (RELOAD_REG_VALID): Likewise.

12446

+ (RELOAD_REG_MULTIPLE): Likewise.

12447

+ (RELOAD_REG_INDEXED): Likewise.

12448

+ (RELOAD_REG_OFFSET): Likewise.

12449

+ (RELOAD_REG_PRE_INCDEC): Likewise.

12450

+ (RELOAD_REG_PRE_MODIFY): Likewise.

12451

+ (reg_addr): Likewise.

12452

+ (mode_supports_pre_incdec_p): New helper functions to say whether

12453

+ a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.

12454

+ (mode_supports_pre_modify_p): Likewise.

12455

+ (rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to

12456

+ print the valid address mode bits for each mode.

12457

+ (rs6000_debug_print_mode): Likewise.

12458

+ (rs6000_debug_reg_global): Likewise.

12459

+ (rs6000_setup_reg_addr_masks): New function to set up the address

12460

+ mask bits for each type.

12461

+ (rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.

12462

+ Call rs6000_setup_reg_addr_masks to set up the address mask bits.

12463

+ (rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and

12464

+ mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and

12465

+ PRE_MODIFY are supported.

12466

+ (rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec

12467

+ registers, instead of {src,dest}_av_p.

12468

+ (rs6000_print_options_internal): Tweak the debug output slightly.

12469

+

12470

+ Backport from mainline

12471

+ 2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>

12472

+

12473

+ * config/rs6000/rs6000-builtin.def (XSRDPIM): Use floatdf2,

12474

+ ceildf2, btruncdf2, instead of vsx_* name.

12475

+

12476

+ * config/rs6000/vsx.md (vsx_add<mode>3): Change arithmetic

12477

+ iterators to only do V2DF and V4SF here. Move the DF code to

12478

+ rs6000.md where it is combined with SF mode. Replace <VSv> with

12479

+ just 'v' since only vector operations are handled with these insns

12480

+ after moving the DF support to rs6000.md.

12481

+ (vsx_sub<mode>3): Likewise.

12482

+ (vsx_mul<mode>3): Likewise.

12483

+ (vsx_div<mode>3): Likewise.

12484

+ (vsx_fre<mode>2): Likewise.

12485

+ (vsx_neg<mode>2): Likewise.

12486

+ (vsx_abs<mode>2): Likewise.

12487

+ (vsx_nabs<mode>2): Likewise.

12488

+ (vsx_smax<mode>3): Likewise.

12489

+ (vsx_smin<mode>3): Likewise.

12490

+ (vsx_sqrt<mode>2): Likewise.

12491

+ (vsx_rsqrte<mode>2): Likewise.

12492

+ (vsx_fms<mode>4): Likewise.

12493

+ (vsx_nfma<mode>4): Likewise.

12494

+ (vsx_copysign<mode>3): Likewise.

12495

+ (vsx_btrunc<mode>2): Likewise.

12496

+ (vsx_floor<mode>2): Likewise.

12497

+ (vsx_ceil<mode>2): Likewise.

12498

+ (vsx_smaxsf3): Delete scalar ops that were moved to rs6000.md.

12499

+ (vsx_sminsf3): Likewise.

12500

+ (vsx_fmadf4): Likewise.

12501

+ (vsx_fmsdf4): Likewise.

12502

+ (vsx_nfmadf4): Likewise.

12503

+ (vsx_nfmsdf4): Likewise.

12504

+ (vsx_cmpdf_internal1): Likewise.

12505

+

12506

+ * config/rs6000/rs6000.h (TARGET_SF_SPE): Define macros to make it

12507

+ simpler to select whether a target has SPE or traditional floating

12508

+ point support in iterators.

12509

+ (TARGET_DF_SPE): Likewise.

12510

+ (TARGET_SF_FPR): Likewise.

12511

+ (TARGET_DF_FPR): Likewise.

12512

+ (TARGET_SF_INSN): Macros to say whether floating point support

12513

+ exists for a given operation for expanders.

12514

+ (TARGET_DF_INSN): Likewise.

12515

+

12516

+ * config/rs6000/rs6000.c (Ftrad): New mode attributes to allow

12517

+ combining of SF/DF mode operations, using both traditional and VSX

12518

+ registers.

12519

+ (Fvsx): Likewise.

12520

+ (Ff): Likewise.

12521

+ (Fv): Likewise.

12522

+ (Fs): Likewise.

12523

+ (Ffre): Likewise.

12524

+ (FFRE): Likewise.

12525

+ (abs<mode>2): Combine SF/DF modes using traditional floating point

12526

+ instructions. Add support for using the upper DF registers with

12527

+ VSX support, and SF registers with power8-vector support. Update

12528

+ expanders for operations supported by both the SPE and traditional

12529

+ floating point units.

12530

+ (abs<mode>2_fpr): Likewise.

12531

+ (nabs<mode>2): Likewise.

12532

+ (nabs<mode>2_fpr): Likewise.

12533

+ (neg<mode>2): Likewise.

12534

+ (neg<mode>2_fpr): Likewise.

12535

+ (add<mode>3): Likewise.

12536

+ (add<mode>3_fpr): Likewise.

12537

+ (sub<mode>3): Likewise.

12538

+ (sub<mode>3_fpr): Likewise.

12539

+ (mul<mode>3): Likewise.

12540

+ (mul<mode>3_fpr): Likewise.

12541

+ (div<mode>3): Likewise.

12542

+ (div<mode>3_fpr): Likewise.

12543

+ (sqrt<mode>3): Likewise.

12544

+ (sqrt<mode>3_fpr): Likewise.

12545

+ (fre<Fs>): Likewise.

12546

+ (rsqrt<mode>2): Likewise.

12547

+ (cmp<mode>_fpr): Likewise.

12548

+ (smax<mode>3): Likewise.

12549

+ (smin<mode>3): Likewise.

12550

+ (smax<mode>3_vsx): Likewise.

12551

+ (smin<mode>3_vsx): Likewise.

12552

+ (negsf2): Delete SF operations that are merged with DF.

12553

+ (abssf2): Likewise.

12554

+ (addsf3): Likewise.

12555

+ (subsf3): Likewise.

12556

+ (mulsf3): Likewise.

12557

+ (divsf3): Likewise.

12558

+ (fres): Likewise.

12559

+ (fmasf4_fpr): Likewise.

12560

+ (fmssf4_fpr): Likewise.

12561

+ (nfmasf4_fpr): Likewise.

12562

+ (nfmssf4_fpr): Likewise.

12563

+ (sqrtsf2): Likewise.

12564

+ (rsqrtsf_internal1): Likewise.

12565

+ (smaxsf3): Likewise.

12566

+ (sminsf3): Likewise.

12567

+ (cmpsf_internal1): Likewise.

12568

+ (copysign<mode>3_fcpsgn): Add VSX/power8-vector support.

12569

+ (negdf2): Delete DF operations that are merged with SF.

12570

+ (absdf2): Likewise.

12571

+ (nabsdf2): Likewise.

12572

+ (adddf3): Likewise.

12573

+ (subdf3): Likewise.

12574

+ (muldf3): Likewise.

12575

+ (divdf3): Likewise.

12576

+ (fred): Likewise.

12577

+ (rsqrtdf_internal1): Likewise.

12578

+ (fmadf4_fpr): Likewise.

12579

+ (fmsdf4_fpr): Likewise.

12580

+ (nfmadf4_fpr): Likewise.

12581

+ (nfmsdf4_fpr): Likewise.

12582

+ (sqrtdf2): Likewise.

12583

+ (smaxdf3): Likewise.

12584

+ (smindf3): Likewise.

12585

+ (cmpdf_internal1): Likewise.

12586

+ (lrint<mode>di2): Use TARGET_<MODE>_FPR macro.

12587

+ (btrunc<mode>2): Delete separate expander, and combine with the

12588

+ insn and add VSX instruction support. Use TARGET_<MODE>_FPR.

12589

+ (btrunc<mode>2_fpr): Likewise.

12590

+ (ceil<mode>2): Likewise.

12591

+ (ceil<mode>2_fpr): Likewise.

12592

+ (floor<mode>2): Likewise.

12593

+ (floor<mode>2_fpr): Likewise.

12594

+ (fma<mode>4_fpr): Combine SF and DF fused multiply/add support.

12595

+ Add support for using the upper registers with VSX and

12596

+ power8-vector. Move insns to be closer to the define_expands. On

12597

+ VSX systems, prefer the traditional form of FMA over the VSX

12598

+ version, since the traditional form allows the target not to

12599

+ overlap with the inputs.

12600

+ (fms<mode>4_fpr): Likewise.

12601

+ (nfma<mode>4_fpr): Likewise.

12602

+ (nfms<mode>4_fpr): Likewise.

12603

+

12604

+ Backport from mainline

12605

+ 2013-09-27 Michael Meissner <meissner@linux.vnet.ibm.com>

12606

+

12607

+ * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Allow

12608

+ DFmode, DImode, and SFmode in the upper VSX registers based on the

12609

+ -mupper-regs-{df,sf} flags. Fix wu constraint to be ALTIVEC_REGS

12610

+ if -mpower8-vector. Combine -mvsx-timode handling with the rest

12611

+ of the VSX register handling.

12612

+

12613

+ * config/rs6000/rs6000.md (f32_lv): Use %x0 for VSX regsters.

12614

+ (f32_sv): Likewise.

12615

+ (zero_extendsidi2_lfiwzx): Add support for loading into the

12616

+ Altivec registers with -mpower8-vector. Use wu/wv constraints to

12617

+ only do VSX memory options on Altivec registers.

12618

+ (extendsidi2_lfiwax): Likewise.

12619

+ (extendsfdf2_fpr): Likewise.

12620

+ (mov<mode>_hardfloat, SF/SD modes): Likewise.

12621

+ (mov<mode>_hardfloat32, DF/DD modes): Likewise.

12622

+ (mov<mode>_hardfloat64, DF/DD modes): Likewise.

12623

+ (movdi_internal64): Likewise.

12624

+

12625

+ Backport from mainline

12626

+ 2013-09-23 Michael Meissner <meissner@linux.vnet.ibm.com>

12627

+

12628

+ * config/rs6000/rs6000.c (rs6000_vector_reload): Delete, combine

12629

+ reload helper function arrays into a single array reg_addr.

12630

+ (reload_fpr_gpr): Likewise.

12631

+ (reload_gpr_vsx): Likewise.

12632

+ (reload_vsx_gpr): Likewise.

12633

+ (struct rs6000_reg_addr): Likewise.

12634

+ (reg_addr): Likewise.

12635

+ (rs6000_debug_reg_global): Change rs6000_vector_reload,

12636

+ reload_fpr_gpr, reload_gpr_vsx, reload_vsx_gpr uses to reg_addr.

12637

+ (rs6000_init_hard_regno_mode_ok): Likewise.

12638

+ (rs6000_secondary_reload_direct_move): Likewise.

12639

+ (rs6000_secondary_reload): Likewise.

12640

+

12641

+ * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add new

12642

+ constraints: wu, ww, and wy. Repurpose wv constraint added during

12643

+ power8 changes. Put wg constraint in alphabetical order.

12644

+

12645

+ * config/rs6000/rs6000.opt (-mvsx-scalar-float): New debug switch

12646

+ for future work to add ISA 2.07 VSX single precision support.

12647

+ (-mvsx-scalar-double): Change default from -1 to 1, update

12648

+ documentation comment.

12649

+ (-mvsx-scalar-memory): Rename debug switch to -mupper-regs-df.

12650

+ (-mupper-regs-df): New debug switch to control whether DF values

12651

+ can go in the traditional Altivec registers.

12652

+ (-mupper-regs-sf): New debug switch to control whether SF values

12653

+ can go in the traditional Altivec registers.

12654

+

12655

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print wu, ww,

12656

+ and wy constraints.

12657

+ (rs6000_init_hard_regno_mode_ok): Use ssize_t instead of int for

12658

+ loop variables. Rename -mvsx-scalar-memory to -mupper-regs-df.

12659

+ Add new constraints, wu/ww/wy. Repurpose wv constraint.

12660

+ (rs6000_debug_legitimate_address_p): Print if we are running

12661

+ before, during, or after reload.

12662

+ (rs6000_secondary_reload): Add a comment.

12663

+ (rs6000_opt_masks): Add -mupper-regs-df, -mupper-regs-sf.

12664

+

12665

+ * config/rs6000/constraints.md (wa constraint): Sort w<x>

12666

+ constraints. Update documentation string.

12667

+ (wd constraint): Likewise.

12668

+ (wf constraint): Likewise.

12669

+ (wg constraint): Likewise.

12670

+ (wn constraint): Likewise.

12671

+ (ws constraint): Likewise.

12672

+ (wt constraint): Likewise.

12673

+ (wx constraint): Likewise.

12674

+ (wz constraint): Likewise.

12675

+ (wu constraint): New constraint for ISA 2.07 SFmode scalar

12676

+ instructions.

12677

+ (ww constraint): Likewise.

12678

+ (wy constraint): Likewise.

12679

+ (wv constraint): Repurpose ISA 2.07 constraint that did not use in

12680

+ the previous submissions.

12681

+ * doc/md.texi (PowerPC and IBM RS6000): Likewise.

12682

+

12683

+ Backport from mainline

12684

+ 2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>

12685

+

12686

+ PR target/58673

12687

+ * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only

12688

+ restrict TImode addresses to single indirect registers if both

12689

+ -mquad-memory and -mvsx-timode are used.

12690

+ (rs6000_output_move_128bit): Use quad_load_store_p to determine if

12691

+ we should emit load/store quad. Remove using %y for quad memory

12692

+ addresses.

12693

+

12694

+ * config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add

12695

+ constraints to allow load/store quad on machines where TImode is

12696

+ not allowed in VSX registers. Use 'n' instead of 'F' constraint

12697

+ for TImode to load integer constants.

12698

+

12699

+ Backport from mainline

12700

+ 2013-10-02 Michael Meissner <meissner@linux.vnet.ibm.com>

12701

+

12702

+ PR target/58587

12703

+ * config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Turn off

12704

+ setting -mvsx-timode by default until the underlying problem is

12705

+ fixed.

12706

+ (RS6000_CPU, power7 defaults): Likewise.

12707

+

12708

+ Backport from trunk

12709

+ 2013-08-16 Michael Meissner <meissner@linux.vnet.ibm.com>

12710

+

12711

+ PR target/58160

12712

+ * config/rs6000/predicates.md (fusion_gpr_mem_load): Allow the

12713

+ memory rtx to contain ZERO_EXTEND and SIGN_EXTEND.

12714

+

12715

+ * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Pass operands

12716

+ array instead of each individual operand as a separate argument.

12717

+ (emit_fusion_gpr_load): Likewise.

12718

+ (expand_fusion_gpr_load): Add new function declaration.

12719

+

12720

+ * config/rs6000/rs6000.c (fusion_gpr_load_p): Change the calling

12721

+ signature to have the operands passed as an array, instead of as

12722

+ separate arguments. Allow ZERO_EXTEND to be in the memory

12723

+ address, and also SIGN_EXTEND if -mpower8-fusion-sign. Do not

12724

+ depend on the register live/dead flags when peepholes are run.

12725

+ (expand_fusion_gpr_load): New function to be called from the

12726

+ peephole2 pass, to change the register that addis sets to be the

12727

+ target register.

12728

+ (emit_fusion_gpr_load): Change the calling signature to have the

12729

+ operands passed as an array, instead of as separate arguments.

12730

+ Allow ZERO_EXTEND to be in the memory address, and also

12731

+ SIGN_EXTEND if -mpower8-fusion-sign.

12732

+

12733

+ * config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): Delete unused

12734

+ unspec enumeration.

12735

+ (power8 fusion peephole/peephole2): Rework the fusion peepholes to

12736

+ adjust the register addis loads up in the peephole2 pass. Do not

12737

+ depend on the register live/dead state when the peephole pass is

12738

+ done.

12739

+

12740

+ Backport from trunk

12741

+ 2013-07-23 Michael Meissner <meissner@linux.vnet.ibm.com>

12742

+

12743

+ * config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean

12744

+ expanders to rs6000.md.

12745

+ (ior<mode>3): Likewise.

12746

+ (and<mode>3): Likewise.

12747

+ (one_cmpl<mode>2): Likewise.

12748

+ (nor<mode>3): Likewise.

12749

+ (andc<mode>3): Likewise.

12750

+ (eqv<mode>3): Likewise.

12751

+ (nand<mode>3): Likewise.

12752

+ (orc<mode>3): Likewise.

12753

+

12754

+ * config/rs6000/rs6000-protos.h (rs6000_split_logical): New

12755

+ declaration.

12756

+

12757

+ * config/rs6000/rs6000.c (rs6000_split_logical_inner): Add support

12758

+ to split multi-word logical operations.

12759

+ (rs6000_split_logical_di): Likewise.

12760

+ (rs6000_split_logical): Likewise.

12761

+

12762

+ * config/rs6000/vsx.md (VSX_L2): Delete, no longer used.

12763

+ (vsx_and<mode>3_32bit): Move 128-bit logical insns to rs6000.md,

12764

+ and allow TImode operations in 32-bit.

12765

+ (vsx_and<mode>3_64bit): Likewise.

12766

+ (vsx_ior<mode>3_32bit): Likewise.

12767

+ (vsx_ior<mode>3_64bit): Likewise.

12768

+ (vsx_xor<mode>3_32bit): Likewise.

12769

+ (vsx_xor<mode>3_64bit): Likewise.

12770

+ (vsx_one_cmpl<mode>2_32bit): Likewise.

12771

+ (vsx_one_cmpl<mode>2_64bit): Likewise.

12772

+ (vsx_nor<mode>3_32bit): Likewise.

12773

+ (vsx_nor<mode>3_64bit): Likewise.

12774

+ (vsx_andc<mode>3_32bit): Likewise.

12775

+ (vsx_andc<mode>3_64bit): Likewise.

12776

+ (vsx_eqv<mode>3_32bit): Likewise.

12777

+ (vsx_eqv<mode>3_64bit): Likewise.

12778

+ (vsx_nand<mode>3_32bit): Likewise.

12779

+ (vsx_nand<mode>3_64bit): Likewise.

12780

+ (vsx_orc<mode>3_32bit): Likewise.

12781

+ (vsx_orc<mode>3_64bit): Likewise.

12782

+

12783

+ * config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Always allow vector

12784

+ logical types in GPRs.

12785

+

12786

+ * config/rs6000/altivec.md (altivec_and<mode>3): Move 128-bit

12787

+ logical insns to rs6000.md, and allow TImode operations in

12788

+ 32-bit.

12789

+ (altivec_ior<mode>3): Likewise.

12790

+ (altivec_xor<mode>3): Likewise.

12791

+ (altivec_one_cmpl<mode>2): Likewise.

12792

+ (altivec_nor<mode>3): Likewise.

12793

+ (altivec_andc<mode>3): Likewise.

12794

+

12795

+ * config/rs6000/rs6000.md (BOOL_128): New mode iterators and mode

12796

+ attributes for moving the 128-bit logical operations into

12797

+ rs6000.md.

12798

+ (BOOL_REGS_OUTPUT): Likewise.

12799

+ (BOOL_REGS_OP1): Likewise.

12800

+ (BOOL_REGS_OP2): Likewise.

12801

+ (BOOL_REGS_UNARY): Likewise.

12802

+ (BOOL_REGS_AND_CR0): Likewise.

12803

+ (one_cmpl<mode>2): Add support for DI logical operations on

12804

+ 32-bit, splitting the operations to 32-bit.

12805

+ (anddi3): Likewise.

12806

+ (iordi3): Likewise.

12807

+ (xordi3): Likewise.

12808

+ (and<mode>3, 128-bit types): Rewrite 2013-06-06 logical operator

12809

+ changes to combine the 32/64-bit code, allow logical operations on

12810

+ TI mode in 32-bit, and to use similar match_operator patterns like

12811

+ scalar mode uses. Combine the Altivec and VSX code for logical

12812

+ operations, and move it here.

12813

+ (ior<mode>3, 128-bit types): Likewise.

12814

+ (xor<mode>3, 128-bit types): Likewise.

12815

+ (one_cmpl<mode>3, 128-bit types): Likewise.

12816

+ (nor<mode>3, 128-bit types): Likewise.

12817

+ (andc<mode>3, 128-bit types): Likewise.

12818

+ (eqv<mode>3, 128-bit types): Likewise.

12819

+ (nand<mode>3, 128-bit types): Likewise.

12820

+ (orc<mode>3, 128-bit types): Likewise.

12821

+ (and<mode>3_internal): Likewise.

12822

+ (bool<mode>3_internal): Likewise.

12823

+ (boolc<mode>3_internal1): Likewise.

12824

+ (boolc<mode>3_internal2): Likewise.

12825

+ (boolcc<mode>3_internal1): Likewise.

12826

+ (boolcc<mode>3_internal2): Likewise.

12827

+ (eqv<mode>3_internal1): Likewise.

12828

+ (eqv<mode>3_internal2): Likewise.

12829

+ (one_cmpl1<mode>3_internal): Likewise.

12830

+

12831

+ Back port from mainline:

12832

+ 2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com>

12833

+ Pat Haugen <pthaugen@us.ibm.com>

12834

+ Peter Bergner <bergner@vnet.ibm.com>

12835

+

12836

+ * lib/target-supports.exp (check_p8vector_hw_available) Add power8

12837

+ support.

12838

+ (check_effective_target_powerpc_p8vector_ok): Likewise.

12839

+ (is-effective-target): Likewise.

12840

+ (check_vect_support_and_set_flags): Likewise.

12841

+

12842

+ Backport from mainline

12843

+ 2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com>

12844

+

12845

+ * config/rs6000/predicates.md (fusion_gpr_addis): New predicates

12846

+ to support power8 load fusion.

12847

+ (fusion_gpr_mem_load): Likewise.

12848

+

12849

+ * config/rs6000/rs6000-modes.def (PTImode): Update a comment.

12850

+

12851

+ * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): New

12852

+ declarations for power8 load fusion.

12853

+ (emit_fusion_gpr_load): Likewise.

12854

+

12855

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): If

12856

+ tuning for power8, turn on fusion mode by default. Turn on sign

12857

+ extending fusion mode if normal fusion mode is on, and we are at

12858

+ -O2 or -O3.

12859

+ (fusion_gpr_load_p): New function, return true if we can fuse an

12860

+ addis instruction with a dependent load to a GPR.

12861

+ (emit_fusion_gpr_load): Emit the instructions for power8 load

12862

+ fusion to GPRs.

12863

+

12864

+ * config/rs6000/vsx.md (VSX_M2): New iterator for fusion

12865

+ peepholes.

12866

+ (VSX load fusion peepholes): New peepholes to fuse together an

12867

+ addi instruction with a VSX load instruction.

12868

+

12869

+ * config/rs6000/rs6000.md (GPR load fusion peepholes): New

12870

+ peepholes to fuse an addis instruction with a load to a GPR base

12871

+ register. If we are supporting sign extending fusions, convert

12872

+ sign extending loads to zero extending loads and add an explicit

12873

+ sign extension.

12874

+

12875

+ Backport from mainline

12876

+ 2013-07-18 Pat Haugen <pthaugen@us.ibm.com>

12877

+

12878

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Adjust flag

12879

+ interaction for new Power8 flags and VSX.

12880

+

12881

+ Back port from the trunk

12882

+ 2013-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>

12883

+

12884

+ PR target/57744

12885

+ * config/rs6000/rs6000.h (MODES_TIEABLE_P): Do not allow PTImode

12886

+ to tie with any other modes. Eliminate Altivec vector mode tests,

12887

+ since these are a subset of ALTIVEC or VSX vector modes. Simplify

12888

+ code, to return 0 if testing MODE2 for a condition, if we've

12889

+ already tested MODE1 for the same condition.

12890

+

12891

+ Backport from mainline

12892

+ 2013-06-28 Pat Haugen <pthaugen@us.ibm.com>

12893

+

12894

+ * config/rs6000/rs6000.md (define_insn ""): Fix insn type.

12895

+

12896

+ Back port from the trunk

12897

+ 2013-06-26 Michael Meissner <meissner@linux.vnet.ibm.com>

12898

+ Pat Haugen <pthaugen@us.ibm.com>

12899

+ Peter Bergner <bergner@vnet.ibm.com>

12900

+

12901

+ * config/rs6000/power8.md: New.

12902

+ * config/rs6000/rs6000-cpus.def (RS6000_CPU table): Adjust processor

12903

+ setting for power8 entry.

12904

+ * config/rs6000/t-rs6000 (MD_INCLUDES): Add power8.md.

12905

+ * config/rs6000/rs6000.c (is_microcoded_insn, is_cracked_insn): Adjust

12906

+ test for Power4/Power5 only.

12907

+ (insn_must_be_first_in_group, insn_must_be_last_in_group): Add Power8

12908

+ support.

12909

+ (force_new_group): Adjust comment.

12910

+ * config/rs6000/rs6000.md: Include power8.md.

12911

+

12912

+ Back port from the trunk

12913

+ 2013-06-14 Michael Meissner <meissner@linux.vnet.ibm.com>

12914

+

12915

+ PR target/57615

12916

+ * config/rs6000/rs6000.md (mov<mode>_ppc64): Call

12917

+ rs6000_output_move_128bit to handle emitting quad memory

12918

+ operations. Set attribute length to 8 bytes.

12919

+

12920

+ Back port from the trunk

12921

+ 2013-06-13 Michael Meissner <meissner@linux.vnet.ibm.com>

12922

+

12923

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Move

12924

+ test for clearing quad memory on 32-bit later.

12925

+

12926

+ Back port from the trunk

12927

+

12928

+ 2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com>

12929

+ Pat Haugen <pthaugen@us.ibm.com>

12930

+ Peter Bergner <bergner@vnet.ibm.com>

12931

+

12932

+ * config/rs6000/rs6000.c (emit_load_locked): Add support for

12933

+ power8 byte, half-word, and quad-word atomic instructions.

12934

+ (emit_store_conditional): Likewise.

12935

+ (rs6000_expand_atomic_compare_and_swap): Likewise.

12936

+ (rs6000_expand_atomic_op): Likewise.

12937

+

12938

+ * config/rs6000/sync.md (larx): Add new modes for power8.

12939

+ (stcx): Likewise.

12940

+ (AINT): New mode iterator to include TImode as well as normal

12941

+ integer modes on power8.

12942

+ (fetchop_pred): Use int_reg_operand instead of gpc_reg_operand so

12943

+ that VSX registers are not considered. Use AINT mode iterator

12944

+ instead of INT1 to allow inclusion of quad word atomic operations

12945

+ on power8.

12946

+ (load_locked<mode>): Likewise.

12947

+ (store_conditional<mode>): Likewise.

12948

+ (atomic_compare_and_swap<mode>): Likewise.

12949

+ (atomic_exchange<mode>): Likewise.

12950

+ (atomic_nand<mode>): Likewise.

12951

+ (atomic_fetch_<fetchop_name><mode>): Likewise.

12952

+ (atomic_nand_fetch<mode>): Likewise.

12953

+ (mem_thread_fence): Use gen_loadsync_<mode> instead of enumerating

12954

+ each type.

12955

+ (ATOMIC): On power8, add QImode, HImode modes.

12956

+ (load_locked<QHI:mode>_si): Varients of load_locked for QI/HI

12957

+ modes that promote to SImode.

12958

+ (load_lockedti): Convert TImode arguments to PTImode, so that we

12959

+ get a guaranteed even/odd register pair.

12960

+ (load_lockedpti): Likewise.

12961

+ (store_conditionalti): Likewise.

12962

+ (store_conditionalpti): Likewise.

12963

+

12964

+ * config/rs6000/rs6000.md (QHI): New mode iterator for power8

12965

+ atomic load/store instructions.

12966

+ (HSI): Likewise.

12967

+

12968

+ Back port from the trunk

12969

+

12970

+ 2013-06-10 Michael Meissner <meissner@linux.vnet.ibm.com>

12971

+ Pat Haugen <pthaugen@us.ibm.com>

12972

+ Peter Bergner <bergner@vnet.ibm.com>

12973

+

12974

+ * config/rs6000/vector.md (GPR move splitter): Do not split moves

12975

+ of vectors in GPRS if they are direct moves or quad word load or

12976

+ store moves.

12977

+

12978

+ * config/rs6000/rs6000-protos.h (rs6000_output_move_128bit): Add

12979

+ declaration.

12980

+ (direct_move_p): Likewise.

12981

+ (quad_load_store_p): Likewise.

12982

+

12983

+ * config/rs6000/rs6000.c (enum rs6000_reg_type): Simplify register

12984

+ classes into bins based on the physical register type.

12985

+ (reg_class_to_reg_type): Likewise.

12986

+ (IS_STD_REG_TYPE): Likewise.

12987

+ (IS_FP_VECT_REG_TYPE): Likewise.

12988

+ (reload_fpr_gpr): Arrays to determine what insn to use if we can

12989

+ use direct move instructions.

12990

+ (reload_gpr_vsx): Likewise.

12991

+ (reload_vsx_gpr): Likewise.

12992

+ (rs6000_init_hard_regno_mode_ok): Precalculate the register type

12993

+ information that is a simplification of register classes. Also

12994

+ precalculate direct move reload helpers.

12995

+ (direct_move_p): New function to return true if the operation can

12996

+ be done as a direct move instruciton.

12997

+ (quad_load_store_p): New function to return true if the operation

12998

+ is a quad memory operation.

12999

+ (rs6000_legitimize_address): If quad memory, only allow register

13000

+ indirect for TImode addresses.

13001

+ (rs6000_legitimate_address_p): Likewise.

13002

+ (enum reload_reg_type): Delete, replace with rs6000_reg_type.

13003

+ (rs6000_reload_register_type): Likewise.

13004

+ (register_to_reg_type): Return register type.

13005

+ (rs6000_secondary_reload_simple_move): New helper function for

13006

+ secondary reload and secondary memory needed to identify anything

13007

+ that is a simple move, and does not need reloading.

13008

+ (rs6000_secondary_reload_direct_move): New helper function for

13009

+ secondary reload to identify cases that can be done with several

13010

+ instructions via the direct move instructions.

13011

+ (rs6000_secondary_reload_move): New helper function for secondary

13012

+ reload to identify moves between register types that can be done.

13013

+ (rs6000_secondary_reload): Add support for quad memory operations

13014

+ and for direct move.

13015

+ (rs6000_secondary_memory_needed): Likewise.

13016

+ (rs6000_debug_secondary_memory_needed): Change argument names.

13017

+ (rs6000_output_move_128bit): New function to return the move to

13018

+ use for 128-bit moves, including knowing about the various

13019

+ limitations of quad memory operations.

13020

+

13021

+ * config/rs6000/vsx.md (vsx_mov<mode>): Add support for quad

13022

+ memory operations. call rs6000_output_move_128bit for the actual

13023

+ instruciton(s) to generate.

13024

+ (vsx_movti_64bit): Likewise.

13025

+

13026

+ * config/rs6000/rs6000.md (UNSPEC_P8V_FMRGOW): New unspec values.

13027

+ (UNSPEC_P8V_MTVSRWZ): Likewise.

13028

+ (UNSPEC_P8V_RELOAD_FROM_GPR): Likewise.

13029

+ (UNSPEC_P8V_MTVSRD): Likewise.

13030

+ (UNSPEC_P8V_XXPERMDI): Likewise.

13031

+ (UNSPEC_P8V_RELOAD_FROM_VSX): Likewise.

13032

+ (UNSPEC_FUSION_GPR): Likewise.

13033

+ (FMOVE128_GPR): New iterator for direct move.

13034

+ (f32_lv): New mode attribute for load/store of SFmode/SDmode

13035

+ values.

13036

+ (f32_sv): Likewise.

13037

+ (f32_dm): Likewise.

13038

+ (zero_extend<mode>di2_internal1): Add support for power8 32-bit

13039

+ loads and direct move instructions.

13040

+ (zero_extendsidi2_lfiwzx): Likewise.

13041

+ (extendsidi2_lfiwax): Likewise.

13042

+ (extendsidi2_nocell): Likewise.

13043

+ (floatsi<mode>2_lfiwax): Likewise.

13044

+ (lfiwax): Likewise.

13045

+ (floatunssi<mode>2_lfiwzx): Likewise.

13046

+ (lfiwzx): Likewise.

13047

+ (fix_trunc<mode>_stfiwx): Likewise.

13048

+ (fixuns_trunc<mode>_stfiwx): Likewise.

13049

+ (mov<mode>_hardfloat, 32-bit floating point): Likewise.

13050

+ (mov<move>_hardfloat64, 64-bit floating point): Likewise.

13051

+ (parity<mode>2_cmpb): Set length/type attr.

13052

+ (unnamed shift right patterns, mov<mode>_internal2): Change type attr

13053

+ for 'mr.' to fast_compare.

13054

+ (bpermd_<mode>): Change type attr to popcnt.

13055

+ (p8_fmrgow_<mode>): New insns for power8 direct move support.

13056

+ (p8_mtvsrwz_1): Likewise.

13057

+ (p8_mtvsrwz_2): Likewise.

13058

+ (reload_fpr_from_gpr<mode>): Likewise.

13059

+ (p8_mtvsrd_1): Likewise.

13060

+ (p8_mtvsrd_2): Likewise.

13061

+ (p8_xxpermdi_<mode>): Likewise.

13062

+ (reload_vsx_from_gpr<mode>): Likewise.

13063

+ (reload_vsx_from_gprsf): Likewise.

13064

+ (p8_mfvsrd_3_<mode>): LIkewise.

13065

+ (reload_gpr_from_vsx<mode>): Likewise.

13066

+ (reload_gpr_from_vsxsf): Likewise.

13067

+ (p8_mfvsrd_4_disf): Likewise.

13068

+ (multi-word GPR splits): Do not split direct moves or quad memory

13069

+ operations.

13070

+

13071

+ Backport from the trunk

13072

+

13073

+ 2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com>

13074

+ Pat Haugen <pthaugen@us.ibm.com>

13075

+ Peter Bergner <bergner@vnet.ibm.com>

13076

+

13077

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):

13078

+ Document new power8 builtins.

13079

+

13080

+ * config/rs6000/vector.md (and<mode>3): Add a clobber/scratch of a

13081

+ condition code register, to allow 128-bit logical operations to be

13082

+ done in the VSX or GPR registers.

13083

+ (nor<mode>3): Use the canonical form for nor.

13084

+ (eqv<mode>3): Add expanders for power8 xxleqv, xxlnand, xxlorc,

13085

+ vclz*, and vpopcnt* vector instructions.

13086

+ (nand<mode>3): Likewise.

13087

+ (orc<mode>3): Likewise.

13088

+ (clz<mode>2): LIkewise.

13089

+ (popcount<mode>2): Likewise.

13090

+

13091

+ * config/rs6000/predicates.md (int_reg_operand): Rework tests so

13092

+ that only the GPRs are recognized.

13093

+

13094

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add

13095

+ support for new power8 builtins.

13096

+

13097

+ * config/rs6000/rs6000-builtin.def (xscvspdpn): Add new power8

13098

+ builtin functions.

13099

+ (xscvdpspn): Likewise.

13100

+ (vclz): Likewise.

13101

+ (vclzb): Likewise.

13102

+ (vclzh): Likewise.

13103

+ (vclzw): Likewise.

13104

+ (vclzd): Likewise.

13105

+ (vpopcnt): Likewise.

13106

+ (vpopcntb): Likewise.

13107

+ (vpopcnth): Likewise.

13108

+ (vpopcntw): Likewise.

13109

+ (vpopcntd): Likewise.

13110

+ (vgbbd): Likewise.

13111

+ (vmrgew): Likewise.

13112

+ (vmrgow): Likewise.

13113

+ (eqv): Likewise.

13114

+ (eqv_v16qi3): Likewise.

13115

+ (eqv_v8hi3): Likewise.

13116

+ (eqv_v4si3): Likewise.

13117

+ (eqv_v2di3): Likewise.

13118

+ (eqv_v4sf3): Likewise.

13119

+ (eqv_v2df3): Likewise.

13120

+ (nand): Likewise.

13121

+ (nand_v16qi3): Likewise.

13122

+ (nand_v8hi3): Likewise.

13123

+ (nand_v4si3): Likewise.

13124

+ (nand_v2di3): Likewise.

13125

+ (nand_v4sf3): Likewise.

13126

+ (nand_v2df3): Likewise.

13127

+ (orc): Likewise.

13128

+ (orc_v16qi3): Likewise.

13129

+ (orc_v8hi3): Likewise.

13130

+ (orc_v4si3): Likewise.

13131

+ (orc_v2di3): Likewise.

13132

+ (orc_v4sf3): Likewise.

13133

+ (orc_v2df3): Likewise.

13134

+

13135

+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Only

13136

+ allow power8 quad mode in 64-bit.

13137

+ (rs6000_builtin_vectorized_function): Add support to vectorize

13138

+ ISA 2.07 count leading zeros, population count builtins.

13139

+ (rs6000_expand_vector_init): On ISA 2.07 use xscvdpspn to form

13140

+ V4SF vectors instead of xscvdpsp to avoid IEEE related traps.

13141

+ (builtin_function_type): Add vgbbd builtin function which takes an

13142

+ unsigned argument.

13143

+ (altivec_expand_vec_perm_const): Add support for new power8 merge

13144

+ instructions.

13145

+

13146

+ * config/rs6000/vsx.md (VSX_L2): New iterator for 128-bit types,

13147

+ that does not include TImdoe for use with 32-bit.

13148

+ (UNSPEC_VSX_CVSPDPN): Support for power8 xscvdpspn and xscvspdpn

13149

+ instructions.

13150

+ (UNSPEC_VSX_CVDPSPN): Likewise.

13151

+ (vsx_xscvdpspn): Likewise.

13152

+ (vsx_xscvspdpn): Likewise.

13153

+ (vsx_xscvdpspn_scalar): Likewise.

13154

+ (vsx_xscvspdpn_directmove): Likewise.

13155

+ (vsx_and<mode>3): Split logical operations into 32-bit and

13156

+ 64-bit. Add support to do logical operations on TImode as well as

13157

+ VSX vector types. Allow logical operations to be done in either

13158

+ VSX registers or in general purpose registers in 64-bit mode. Add

13159

+ splitters if GPRs were used. For AND, add clobber of CCmode to

13160

+ allow use of ANDI on GPRs. Rewrite nor to use the canonical RTL

13161

+ encoding.

13162

+ (vsx_and<mode>3_32bit): Likewise.

13163

+ (vsx_and<mode>3_64bit): Likewise.

13164

+ (vsx_ior<mode>3): Likewise.

13165

+ (vsx_ior<mode>3_32bit): Likewise.

13166

+ (vsx_ior<mode>3_64bit): Likewise.

13167

+ (vsx_xor<mode>3): Likewise.

13168

+ (vsx_xor<mode>3_32bit): Likewise.

13169

+ (vsx_xor<mode>3_64bit): Likewise.

13170

+ (vsx_one_cmpl<mode>2): Likewise.

13171

+ (vsx_one_cmpl<mode>2_32bit): Likewise.

13172

+ (vsx_one_cmpl<mode>2_64bit): Likewise.

13173

+ (vsx_nor<mode>3): Likewise.

13174

+ (vsx_nor<mode>3_32bit): Likewise.

13175

+ (vsx_nor<mode>3_64bit): Likewise.

13176

+ (vsx_andc<mode>3): Likewise.

13177

+ (vsx_andc<mode>3_32bit): Likewise.

13178

+ (vsx_andc<mode>3_64bit): Likewise.

13179

+ (vsx_eqv<mode>3_32bit): Add support for power8 xxleqv, xxlnand,

13180

+ and xxlorc instructions.

13181

+ (vsx_eqv<mode>3_64bit): Likewise.

13182

+ (vsx_nand<mode>3_32bit): Likewise.

13183

+ (vsx_nand<mode>3_64bit): Likewise.

13184

+ (vsx_orc<mode>3_32bit): Likewise.

13185

+ (vsx_orc<mode>3_64bit): Likewise.

13186

+

13187

+ * config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Update comment.

13188

+

13189

+ * config/rs6000/altivec.md (UNSPEC_VGBBD): Add power8 vgbbd

13190

+ instruction.

13191

+ (p8_vmrgew): Add power8 vmrgew and vmrgow instructions.

13192

+ (p8_vmrgow): Likewise.

13193

+ (altivec_and<mode>3): Add clobber of CCmode to allow AND using

13194

+ GPRs to be split under VSX.

13195

+ (p8v_clz<mode>2): Add power8 count leading zero support.

13196

+ (p8v_popcount<mode>2): Add power8 population count support.

13197

+ (p8v_vgbbd): Add power8 gather bits by bytes by doubleword

13198

+ support.

13199

+

13200

+ * config/rs6000/rs6000.md (eqv<mode>3): Add support for powerp eqv

13201

+ instruction.

13202

+

13203

+ * config/rs6000/altivec.h (vec_eqv): Add defines to export power8

13204

+ builtin functions.

13205

+ (vec_nand): Likewise.

13206

+ (vec_vclz): Likewise.

13207

+ (vec_vclzb): Likewise.

13208

+ (vec_vclzd): Likewise.

13209

+ (vec_vclzh): Likewise.

13210

+ (vec_vclzw): Likewise.

13211

+ (vec_vgbbd): Likewise.

13212

+ (vec_vmrgew): Likewise.

13213

+ (vec_vmrgow): Likewise.

13214

+ (vec_vpopcnt): Likewise.

13215

+ (vec_vpopcntb): Likewise.

13216

+ (vec_vpopcntd): Likewise.

13217

+ (vec_vpopcnth): Likewise.

13218

+ (vec_vpopcntw): Likewise.

13219

+

13220

+ Backport from trunk

13221

+

13222

+ 2013-05-29 Michael Meissner <meissner@linux.vnet.ibm.com>

13223

+ Pat Haugen <pthaugen@us.ibm.com>

13224

+ Peter Bergner <bergner@vnet.ibm.com>

13225

+

13226

+ * config/rs6000/vector.md (VEC_I): Add support for new power8 V2DI

13227

+ instructions.

13228

+ (VEC_A): Likewise.

13229

+ (VEC_C): Likewise.

13230

+ (vrotl<mode>3): Likewise.

13231

+ (vashl<mode>3): Likewise.

13232

+ (vlshr<mode>3): Likewise.

13233

+ (vashr<mode>3): Likewise.

13234

+

13235

+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add

13236

+ support for power8 V2DI builtins.

13237

+

13238

+ * config/rs6000/rs6000-builtin.def (abs_v2di): Add support for

13239

+ power8 V2DI builtins.

13240

+ (vupkhsw): Likewise.

13241

+ (vupklsw): Likewise.

13242

+ (vaddudm): Likewise.

13243

+ (vminsd): Likewise.

13244

+ (vmaxsd): Likewise.

13245

+ (vminud): Likewise.

13246

+ (vmaxud): Likewise.

13247

+ (vpkudum): Likewise.

13248

+ (vpksdss): Likewise.

13249

+ (vpkudus): Likewise.

13250

+ (vpksdus): Likewise.

13251

+ (vrld): Likewise.

13252

+ (vsld): Likewise.

13253

+ (vsrd): Likewise.

13254

+ (vsrad): Likewise.

13255

+ (vsubudm): Likewise.

13256

+ (vcmpequd): Likewise.

13257

+ (vcmpgtsd): Likewise.

13258

+ (vcmpgtud): Likewise.

13259

+ (vcmpequd_p): Likewise.

13260

+ (vcmpgtsd_p): Likewise.

13261

+ (vcmpgtud_p): Likewise.

13262

+ (vupkhsw): Likewise.

13263

+ (vupklsw): Likewise.

13264

+ (vaddudm): Likewise.

13265

+ (vmaxsd): Likewise.

13266

+ (vmaxud): Likewise.

13267

+ (vminsd): Likewise.

13268

+ (vminud): Likewise.

13269

+ (vpksdss): Likewise.

13270

+ (vpksdus): Likewise.

13271

+ (vpkudum): Likewise.

13272

+ (vpkudus): Likewise.

13273

+ (vrld): Likewise.

13274

+ (vsld): Likewise.

13275

+ (vsrad): Likewise.

13276

+ (vsrd): Likewise.

13277

+ (vsubudm): Likewise.

13278

+

13279

+ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add

13280

+ support for power8 V2DI instructions.

13281

+

13282

+ * config/rs6000/altivec.md (UNSPEC_VPKUHUM): Add support for

13283

+ power8 V2DI instructions. Combine pack and unpack insns to use an

13284

+ iterator for each mode. Check whether a particular mode supports

13285

+ Altivec instructions instead of just checking TARGET_ALTIVEC.

13286

+ (UNSPEC_VPKUWUM): Likewise.

13287

+ (UNSPEC_VPKSHSS): Likewise.

13288

+ (UNSPEC_VPKSWSS): Likewise.

13289

+ (UNSPEC_VPKUHUS): Likewise.

13290

+ (UNSPEC_VPKSHUS): Likewise.

13291

+ (UNSPEC_VPKUWUS): Likewise.

13292

+ (UNSPEC_VPKSWUS): Likewise.

13293

+ (UNSPEC_VPACK_SIGN_SIGN_SAT): Likewise.

13294

+ (UNSPEC_VPACK_SIGN_UNS_SAT): Likewise.

13295

+ (UNSPEC_VPACK_UNS_UNS_SAT): Likewise.

13296

+ (UNSPEC_VPACK_UNS_UNS_MOD): Likewise.

13297

+ (UNSPEC_VUPKHSB): Likewise.

13298

+ (UNSPEC_VUNPACK_HI_SIGN): Likewise.

13299

+ (UNSPEC_VUNPACK_LO_SIGN): Likewise.

13300

+ (UNSPEC_VUPKHSH): Likewise.

13301

+ (UNSPEC_VUPKLSB): Likewise.

13302

+ (UNSPEC_VUPKLSH): Likewise.

13303

+ (VI2): Likewise.

13304

+ (VI_char): Likewise.

13305

+ (VI_scalar): Likewise.

13306

+ (VI_unit): Likewise.

13307

+ (VP): Likewise.

13308

+ (VP_small): Likewise.

13309

+ (VP_small_lc): Likewise.

13310

+ (VU_char): Likewise.

13311

+ (add<mode>3): Likewise.

13312

+ (altivec_vaddcuw): Likewise.

13313

+ (altivec_vaddu<VI_char>s): Likewise.

13314

+ (altivec_vadds<VI_char>s): Likewise.

13315

+ (sub<mode>3): Likewise.

13316

+ (altivec_vsubcuw): Likewise.

13317

+ (altivec_vsubu<VI_char>s): Likewise.

13318

+ (altivec_vsubs<VI_char>s): Likewise.

13319

+ (altivec_vavgs<VI_char>): Likewise.

13320

+ (altivec_vcmpbfp): Likewise.

13321

+ (altivec_eq<mode>): Likewise.

13322

+ (altivec_gt<mode>): Likewise.

13323

+ (altivec_gtu<mode>): Likewise.

13324

+ (umax<mode>3): Likewise.

13325

+ (smax<mode>3): Likewise.

13326

+ (umin<mode>3): Likewise.

13327

+ (smin<mode>3): Likewise.

13328

+ (altivec_vpkuhum): Likewise.

13329

+ (altivec_vpkuwum): Likewise.

13330

+ (altivec_vpkshss): Likewise.

13331

+ (altivec_vpkswss): Likewise.

13332

+ (altivec_vpkuhus): Likewise.

13333

+ (altivec_vpkshus): Likewise.

13334

+ (altivec_vpkuwus): Likewise.

13335

+ (altivec_vpkswus): Likewise.

13336

+ (altivec_vpks<VI_char>ss): Likewise.

13337

+ (altivec_vpks<VI_char>us): Likewise.

13338

+ (altivec_vpku<VI_char>us): Likewise.

13339

+ (altivec_vpku<VI_char>um): Likewise.

13340

+ (altivec_vrl<VI_char>): Likewise.

13341

+ (altivec_vsl<VI_char>): Likewise.

13342

+ (altivec_vsr<VI_char>): Likewise.

13343

+ (altivec_vsra<VI_char>): Likewise.

13344

+ (altivec_vsldoi_<mode>): Likewise.

13345

+ (altivec_vupkhsb): Likewise.

13346

+ (altivec_vupkhs<VU_char>): Likewise.

13347

+ (altivec_vupkls<VU_char>): Likewise.

13348

+ (altivec_vupkhsh): Likewise.

13349

+ (altivec_vupklsb): Likewise.

13350

+ (altivec_vupklsh): Likewise.

13351

+ (altivec_vcmpequ<VI_char>_p): Likewise.

13352

+ (altivec_vcmpgts<VI_char>_p): Likewise.

13353

+ (altivec_vcmpgtu<VI_char>_p): Likewise.

13354

+ (abs<mode>2): Likewise.

13355

+ (vec_unpacks_hi_v16qi): Likewise.

13356

+ (vec_unpacks_hi_v8hi): Likewise.

13357

+ (vec_unpacks_lo_v16qi): Likewise.

13358

+ (vec_unpacks_hi_<VP_small_lc>): Likewise.

13359

+ (vec_unpacks_lo_v8hi): Likewise.

13360

+ (vec_unpacks_lo_<VP_small_lc>): Likewise.

13361

+ (vec_pack_trunc_v8h): Likewise.

13362

+ (vec_pack_trunc_v4si): Likewise.

13363

+ (vec_pack_trunc_<mode>): Likewise.

13364

+

13365

+ * config/rs6000/altivec.h (vec_vaddudm): Add defines for power8

13366

+ V2DI builtins.

13367

+ (vec_vmaxsd): Likewise.

13368

+ (vec_vmaxud): Likewise.

13369

+ (vec_vminsd): Likewise.

13370

+ (vec_vminud): Likewise.

13371

+ (vec_vpksdss): Likewise.

13372

+ (vec_vpksdus): Likewise.

13373

+ (vec_vpkudum): Likewise.

13374

+ (vec_vpkudus): Likewise.

13375

+ (vec_vrld): Likewise.

13376

+ (vec_vsld): Likewise.

13377

+ (vec_vsrad): Likewise.

13378

+ (vec_vsrd): Likewise.

13379

+ (vec_vsubudm): Likewise.

13380

+ (vec_vupkhsw): Likewise.

13381

+ (vec_vupklsw): Likewise.

13382

+

13383

+ 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>

13384

+ Pat Haugen <pthaugen@us.ibm.com>

13385

+ Peter Bergner <bergner@vnet.ibm.com>

13386

+

13387

+ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Add

13388

+ documentation for the power8 crypto builtins.

13389

+

13390

+ * config/rs6000/t-rs6000 (MD_INCLUDES): Add crypto.md.

13391

+

13392

+ * config/rs6000/rs6000-builtin.def (BU_P8V_AV_1): Add support

13393

+ macros for defining power8 builtin functions.

13394

+ (BU_P8V_AV_2): Likewise.

13395

+ (BU_P8V_AV_P): Likewise.

13396

+ (BU_P8V_VSX_1): Likewise.

13397

+ (BU_P8V_OVERLOAD_1): Likewise.

13398

+ (BU_P8V_OVERLOAD_2): Likewise.

13399

+ (BU_CRYPTO_1): Likewise.

13400

+ (BU_CRYPTO_2): Likewise.

13401

+ (BU_CRYPTO_3): Likewise.

13402

+ (BU_CRYPTO_OVERLOAD_1): Likewise.

13403

+ (BU_CRYPTO_OVERLOAD_2): Likewise.

13404

+ (XSCVSPDP): Fix typo, point to the correct instruction.

13405

+ (VCIPHER): Add power8 crypto builtins.

13406

+ (VCIPHERLAST): Likewise.

13407

+ (VNCIPHER): Likewise.

13408

+ (VNCIPHERLAST): Likewise.

13409

+ (VPMSUMB): Likewise.

13410

+ (VPMSUMH): Likewise.

13411

+ (VPMSUMW): Likewise.

13412

+ (VPERMXOR_V2DI): Likewise.

13413

+ (VPERMXOR_V4SI: Likewise.

13414

+ (VPERMXOR_V8HI: Likewise.

13415

+ (VPERMXOR_V16QI: Likewise.

13416

+ (VSHASIGMAW): Likewise.

13417

+ (VSHASIGMAD): Likewise.

13418

+ (VPMSUM): Likewise.

13419

+ (VPERMXOR): Likewise.

13420

+ (VSHASIGMA): Likewise.

13421

+

13422

+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define

13423

+ __CRYPTO__ if the crypto instructions are available.

13424

+ (altivec_overloaded_builtins): Add support for overloaded power8

13425

+ builtins.

13426

+

13427

+ * config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Add

13428

+ support for power8 crypto builtins.

13429

+ (builtin_function_type): Likewise.

13430

+ (altivec_init_builtins): Add support for builtins that take vector

13431

+ long long (V2DI) arguments.

13432

+

13433

+ * config/rs6000/crypto.md: New file, define power8 crypto

13434

+ instructions.

13435

+

13436

+ 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>

13437

+ Pat Haugen <pthaugen@us.ibm.com>

13438

+ Peter Bergner <bergner@vnet.ibm.com>

13439

+

13440

+ * doc/invoke.texi (Option Summary): Add power8 options.

13441

+ (RS/6000 and PowerPC Options): Likewise.

13442

+

13443

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Update to use

13444

+ constraints.md instead of rs6000.h. Reorder w* constraints. Add

13445

+ wm, wn, wr documentation.

13446

+

13447

+ * gcc/config/rs6000/constraints.md (wm): New constraint for VSX

13448

+ registers if direct move instructions are enabled.

13449

+ (wn): New constraint for no registers.

13450

+ (wq): New constraint for quad word even GPR registers.

13451

+ (wr): New constraint if 64-bit instructions are enabled.

13452

+ (wv): New constraint if power8 vector instructions are enabled.

13453

+ (wQ): New constraint for quad word memory locations.

13454

+

13455

+ * gcc/config/rs6000/predicates.md (const_0_to_15_operand): New

13456

+ constraint for 0..15 for crypto instructions.

13457

+ (gpc_reg_operand): If VSX allow registers in VSX registers as well

13458

+ as GPR and floating point registers.

13459

+ (int_reg_operand): New predicate to match only GPR registers.

13460

+ (base_reg_operand): New predicate to match base registers.

13461

+ (quad_int_reg_operand): New predicate to match even GPR registers

13462

+ for quad memory operations.

13463

+ (vsx_reg_or_cint_operand): New predicate to allow vector logical

13464

+ operations in both GPR and VSX registers.

13465

+ (quad_memory_operand): New predicate for quad memory operations.

13466

+ (reg_or_indexed_operand): New predicate for direct move support.

13467

+

13468

+ * gcc/config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED):

13469

+ Inherit from ISA_2_4_MASKS, not ISA_2_2_MASKS.

13470

+ (ISA_2_7_MASKS_SERVER): New mask for ISA 2.07 (i.e. power8).

13471

+ (POWERPC_MASKS): Add power8 options.

13472

+ (power8 cpu): Use ISA_2_7_MASKS_SERVER instead of specifying the

13473

+ various options.

13474

+

13475

+ * gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):

13476

+ Define _ARCH_PWR8 and __POWER8_VECTOR__ for power8.

13477

+

13478

+ * gcc/config/rs6000/rs6000.opt (-mvsx-timode): Add documentation.

13479

+ (-mpower8-fusion): New power8 options.

13480

+ (-mpower8-fusion-sign): Likewise.

13481

+ (-mpower8-vector): Likewise.

13482

+ (-mcrypto): Likewise.

13483

+ (-mdirect-move): Likewise.

13484

+ (-mquad-memory): Likewise.

13485

+

13486

+ * gcc/config/rs6000/rs6000.c (power8_cost): Initial definition for

13487

+ power8.

13488

+ (rs6000_hard_regno_mode_ok): Make PTImode only match even GPR

13489

+ registers.

13490

+ (rs6000_debug_reg_print): Print the base register class if

13491

+ -mdebug=reg.

13492

+ (rs6000_debug_vector_unit): Add p8_vector.

13493

+ (rs6000_debug_reg_global): If -mdebug=reg, print power8 constraint

13494

+ definitions. Also print fusion state.

13495

+ (rs6000_init_hard_regno_mode_ok): Set up power8 constraints.

13496

+ (rs6000_builtin_mask_calculate): Add power8 builtin support.

13497

+ (rs6000_option_override_internal): Add support for power8.

13498

+ (rs6000_common_init_builtins): Add debugging for skipped builtins

13499

+ if -mdebug=builtin.

13500

+ (rs6000_adjust_cost): Add power8 support.

13501

+ (rs6000_issue_rate): Likewise.

13502

+ (insn_must_be_first_in_group): Likewise.

13503

+ (insn_must_be_last_in_group): Likewise.

13504

+ (force_new_group): Likewise.

13505

+ (rs6000_register_move_cost): Likewise.

13506

+ (rs6000_opt_masks): Likewise.

13507

+

13508

+ * config/rs6000/rs6000.h (ASM_CPU_POWER8_SPEC): If we don't have a

13509

+ power8 capable assembler, default to power7 options.

13510

+ (TARGET_DIRECT_MOVE): Likewise.

13511

+ (TARGET_CRYPTO): Likewise.

13512

+ (TARGET_P8_VECTOR): Likewise.

13513

+ (VECTOR_UNIT_P8_VECTOR_P): Define power8 vector support.

13514

+ (VECTOR_UNIT_VSX_OR_P8_VECTOR_P): Likewise.

13515

+ (VECTOR_MEM_P8_VECTOR_P): Likewise.

13516

+ (VECTOR_MEM_VSX_OR_P8_VECTOR_P): Likewise.

13517

+ (VECTOR_MEM_ALTIVEC_OR_VSX_P): Likewise.

13518

+ (TARGET_XSCVDPSPN): Likewise.

13519

+ (TARGET_XSCVSPDPN): Likewsie.

13520

+ (TARGET_SYNC_HI_QI): Likewise.

13521

+ (TARGET_SYNC_TI): Likewise.

13522

+ (MASK_CRYPTO): Likewise.

13523

+ (MASK_DIRECT_MOVE): Likewise.

13524

+ (MASK_P8_FUSION): Likewise.

13525

+ (MASK_P8_VECTOR): Likewise.

13526

+ (REG_ALLOC_ORDER): Move fr13 to be lower in priority so that the

13527

+ TFmode temporary used by some of the direct move instructions to

13528

+ get two FP temporary registers does not force creation of a stack

13529

+ frame.

13530

+ (VLOGICAL_REGNO_P): Allow vector logical operations in GPRs.

13531

+ (MODES_TIEABLE_P): Move the VSX tests above the Altivec tests so

13532

+ that any VSX registers are tieable, even if they are also an

13533

+ Altivec vector mode.

13534

+ (r6000_reg_class_enum): Add wm, wr, wv constraints.

13535

+ (RS6000_BTM_P8_VECTOR): Power8 builtin support.

13536

+ (RS6000_BTM_CRYPTO): Likewise.

13537

+ (RS6000_BTM_COMMON): Likewise.

13538

+

13539

+ * config/rs6000/rs6000.md (cpu attribute): Add power8.

13540

+ * config/rs6000/rs6000-opts.h (PROCESSOR_POWER8): Likewise.

13541

+ (enum rs6000_vector): Add power8 vector support.

13542

+

13543

+

13544

+ Backport from mainline

13545

+ 2013-03-20 Pat Haugen <pthaugen@us.ibm.com>

13546

+

13547

+ * config/rs6000/predicates.md (indexed_address, update_address_mem

13548

+ update_indexed_address_mem): New predicates.

13549

+ * config/rs6000/vsx.md (vsx_extract_<mode>_zero): Set correct "type"

13550

+ attribute for load/store instructions.

13551

+ * config/rs6000/dfp.md (movsd_store): Likewise.

13552

+ (movsd_load): Likewise.

13553

+ * config/rs6000/rs6000.md (zero_extend<mode>di2_internal1): Likewise.

13554

+ (unnamed HI->DI extend define_insn): Likewise.

13555

+ (unnamed SI->DI extend define_insn): Likewise.

13556

+ (unnamed QI->SI extend define_insn): Likewise.

13557

+ (unnamed QI->HI extend define_insn): Likewise.

13558

+ (unnamed HI->SI extend define_insn): Likewise.

13559

+ (unnamed HI->SI extend define_insn): Likewise.

13560

+ (extendsfdf2_fpr): Likewise.

13561

+ (movsi_internal1): Likewise.

13562

+ (movsi_internal1_single): Likewise.

13563

+ (movhi_internal): Likewise.

13564

+ (movqi_internal): Likewise.

13565

+ (movcc_internal1): Correct mnemonic for stw insn. Set correct "type"

13566

+ attribute for load/store instructions.

13567

+ (mov<mode>_hardfloat): Set correct "type" attribute for load/store

13568

+ instructions.

13569

+ (mov<mode>_softfloat): Likewise.

13570

+ (mov<mode>_hardfloat32): Likewise.

13571

+ (mov<mode>_hardfloat64): Likewise.

13572

+ (mov<mode>_softfloat64): Likewise.

13573

+ (movdi_internal32): Likewise.

13574

+ (movdi_internal64): Likewise.

13575

+ (probe_stack_<mode>): Likewise.

13576

+

13577

+ Backport from mainline

13578

+ 2013-03-20 Michael Meissner <meissner@linux.vnet.ibm.com>

13579

+

13580

+ * config/rs6000/vector.md (VEC_R): Add 32-bit integer, binary

13581

+ floating point, and decimal floating point to reload iterator.

13582

+

13583

+ * config/rs6000/constraints.md (wl constraint): New constraints to

13584

+ return FLOAT_REGS if certain options are used to reduce the number

13585

+ of separate patterns that exist in the file.

13586

+ (wx constraint): Likewise.

13587

+ (wz constraint): Likewise.

13588

+

13589

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): If

13590

+ -mdebug=reg, print wg, wl, wx, and wz constraints.

13591

+ (rs6000_init_hard_regno_mode_ok): Initialize new constraints.

13592

+ Initialize the reload functions for 64-bit binary/decimal floating

13593

+ point types.

13594

+ (reg_offset_addressing_ok_p): If we are on a power7 or later, use

13595

+ LFIWZX and STFIWX to load/store 32-bit decimal types, and don't

13596

+ create the buffer on the stack to overcome not having a 32-bit

13597

+ load and store.

13598

+ (rs6000_emit_move): Likewise.

13599

+ (rs6000_secondary_memory_needed_rtx): Likewise.

13600

+ (rs6000_alloc_sdmode_stack_slot): Likewise.

13601

+ (rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f

13602

+ via xxlxor, just like DFmode 0.0.

13603

+

13604

+ * config/rs6000/rs6000.h (TARGET_NO_SDMODE_STACK): New macro)

13605

+ (define as 1 if we are running on a power7 or newer.

13606

+ (enum r6000_reg_class_enum): Add new constraints.

13607

+

13608

+ * config/rs6000/dfp.md (movsd): Delete, combine with binary

13609

+ floating point moves in rs6000.md. Combine power6x (mfpgpr) moves

13610

+ with other moves by using conditional constraits (wg). Use LFIWZX

13611

+ and STFIWX for loading SDmode on power7. Use xxlxor to create

13612

+ 0.0f.

13613

+ (movsd splitter): Likewise.

13614

+ (movsd_hardfloat): Likewise.

13615

+ (movsd_softfloat): Likewise.

13616

+

13617

+ * config/rs6000/rs6000.md (FMOVE32): New iterators to combine

13618

+ binary and decimal floating point moves.

13619

+ (fmove_ok): New attributes to combine binary and decimal floating

13620

+ point moves, and to combine power6x (mfpgpr) moves along normal

13621

+ floating moves.

13622

+ (real_value_to_target): Likewise.

13623

+ (f32_lr): Likewise.

13624

+ (f32_lm): Likewise.

13625

+ (f32_li): Likewise.

13626

+ (f32_sr): Likewise.

13627

+ (f32_sm): Likewise.

13628

+ (f32_si): Likewise.

13629

+ (movsf): Combine binary and decimal floating point moves. Combine

13630

+ power6x (mfpgpr) moves with other moves by using conditional

13631

+ constraits (wg). Use LFIWZX and STFIWX for loading SDmode on

13632

+ power7.

13633

+ (mov<mode> for SFmode/SDmode); Likewise.

13634

+ (SFmode/SDmode splitters): Likewise.

13635

+ (movsf_hardfloat): Likewise.

13636

+ (mov<mode>_hardfloat for SFmode/SDmode): Likewise.

13637

+ (movsf_softfloat): Likewise.

13638

+ (mov<mode>_softfloat for SFmode/SDmode): Likewise.

13639

+

13640

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wl)

13641

+ (wx and wz constraints.

13642

+

13643

+ * config/rs6000/constraints.md (wg constraint): New constraint to

13644

+ return FLOAT_REGS if -mmfpgpr (power6x) was used.

13645

+

13646

+ * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wg

13647

+ constraint.

13648

+

13649

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): If

13650

+ -mdebug=reg, print wg, wl, wx, and wz constraints.

13651

+ (rs6000_init_hard_regno_mode_ok): Initialize new constraints.

13652

+ Initialize the reload functions for 64-bit binary/decimal floating

13653

+ point types.

13654

+ (reg_offset_addressing_ok_p): If we are on a power7 or later, use

13655

+ LFIWZX and STFIWX to load/store 32-bit decimal types, and don't

13656

+ create the buffer on the stack to overcome not having a 32-bit

13657

+ load and store.

13658

+ (rs6000_emit_move): Likewise.

13659

+ (rs6000_secondary_memory_needed_rtx): Likewise.

13660

+ (rs6000_alloc_sdmode_stack_slot): Likewise.

13661

+ (rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f

13662

+ via xxlxor, just like DFmode 0.0.

13663

+

13664

+

13665

+ * config/rs6000/dfp.md (movdd): Delete, combine with binary

13666

+ floating point moves in rs6000.md. Combine power6x (mfpgpr) moves

13667

+ with other moves by using conditional constraits (wg). Use LFIWZX

13668

+ and STFIWX for loading SDmode on power7.

13669

+ (movdd splitters): Likewise.

13670

+ (movdd_hardfloat32): Likewise.

13671

+ (movdd_softfloat32): Likewise.

13672

+ (movdd_hardfloat64_mfpgpr): Likewise.

13673

+ (movdd_hardfloat64): Likewise.

13674

+ (movdd_softfloat64): Likewise.

13675

+

13676

+ * config/rs6000/rs6000.md (FMOVE64): New iterators to combine

13677

+ 64-bit binary and decimal floating point moves.

13678

+ (FMOVE64X): Likewise.

13679

+ (movdf): Combine 64-bit binary and decimal floating point moves.

13680

+ Combine power6x (mfpgpr) moves with other moves by using

13681

+ conditional constraits (wg).

13682

+ (mov<mode> for DFmode/DDmode): Likewise.

13683

+ (DFmode/DDmode splitters): Likewise.

13684

+ (movdf_hardfloat32): Likewise.

13685

+ (mov<mode>_hardfloat32 for DFmode/DDmode): Likewise.

13686

+ (movdf_softfloat32): Likewise.

13687

+ (movdf_hardfloat64_mfpgpr): Likewise.

13688

+ (movdf_hardfloat64): Likewise.

13689

+ (mov<mode>_hardfloat64 for DFmode/DDmode): Likewise.

13690

+ (movdf_softfloat64): Likewise.

13691

+ (mov<mode>_softfloat64 for DFmode/DDmode): Likewise.

13692

+ (reload_<mode>_load): Move to later in the file so they aren't in

13693

+ the middle of the floating point move insns.

13694

+ (reload_<mode>_store): Likewise.

13695

+

13696

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wg

13697

+ constraint.

13698

+

13699

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print out wg

13700

+ constraint if -mdebug=reg.

13701

+ (rs6000_initi_hard_regno_mode_ok): Enable wg constraint if

13702

+ -mfpgpr. Enable using dd reload support if needed.

13703

+

13704

+ * config/rs6000/dfp.md (movtd): Delete, combine with 128-bit

13705

+ binary and decimal floating point moves in rs6000.md.

13706

+ (movtd_internal): Likewise.

13707

+

13708

+ * config/rs6000/rs6000.md (FMOVE128): Combine 128-bit binary and

13709

+ decimal floating point moves.

13710

+ (movtf): Likewise.

13711

+ (movtf_internal): Likewise.

13712

+ (mov<mode>_internal, TDmode/TFmode): Likewise.

13713

+ (movtf_softfloat): Likewise.

13714

+ (mov<mode>_softfloat, TDmode/TFmode): Likewise.

13715

+

13716

+ * config/rs6000/rs6000.md (movdi_mfpgpr): Delete, combine with

13717

+ movdi_internal64, using wg constraint for move direct operations.

13718

+ (movdi_internal64): Likewise.

13719

+

13720

+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print

13721

+ MODES_TIEABLE_P for selected modes. Print the numerical value of

13722

+ the various virtual registers. Use GPR/FPR first/last values)

13723

+ (instead of hard coding the register numbers. Print which modes

13724

+ have reload functions registered.

13725

+ (rs6000_option_override_internal): If -mdebug=reg, trace the

13726

+ options settings before/after setting cpu, target and subtarget

13727

+ settings.

13728

+ (rs6000_secondary_reload_trace): Improve the RTL dump for

13729

+ -mdebug=addr and for secondary reload failures in

13730

+ rs6000_secondary_reload_inner.

13731

+ (rs6000_secondary_reload_fail): Likewise.

13732

+ (rs6000_secondary_reload_inner): Likewise.

13733

+

13734

+ * config/rs6000/rs6000.md (FIRST_GPR_REGNO): Add convenience

13735

+ macros for first/last GPR and FPR registers.

13736

+ (LAST_GPR_REGNO): Likewise.

13737

+ (FIRST_FPR_REGNO): Likewise.

13738

+ (LAST_FPR_REGNO): Likewise.

13739

+

13740

+ * config/rs6000/vector.md (mul<mode>3): Use the combined macro

13741

+ VECTOR_UNIT_ALTIVEC_OR_VSX_P instead of separate calls to

13742

+ VECTOR_UNIT_ALTIVEC_P and VECTOR_UNIT_VSX_P.

13743

+ (vcond<mode><mode>): Likewise.

13744

+ (vcondu<mode><mode>): Likewise.

13745

+ (vector_gtu<mode>): Likewise.

13746

+ (vector_gte<mode>): Likewise.

13747

+ (xor<mode>3): Don't allow logical operations on TImode in 32-bit

13748

+ to prevent the compiler from converting DImode operations to

13749

+ TImode.

13750

+ (ior<mode>3): Likewise.

13751

+ (and<mode>3): Likewise.

13752

+ (one_cmpl<mode>2): Likewise.

13753

+ (nor<mode>3): Likewise.

13754

+ (andc<mode>3): Likewise.

13755

+

13756

+ * config/rs6000/constraints.md (wt constraint): New constraint

13757

+ that returns VSX_REGS if TImode is allowed in VSX registers.

13758

+

13759

+ * config/rs6000/predicates.md (easy_fp_constant): 0.0f is an easy

13760

+ constant under VSX.

13761

+

13762

+ * config/rs6000/rs6000-modes.def (PTImode): Define, PTImode is

13763

+ similar to TImode, but it is restricted to being in the GPRs.

13764

+

13765

+ * config/rs6000/rs6000.opt (-mvsx-timode): New switch to allow

13766

+ TImode to occupy a single VSX register.

13767

+

13768

+ * config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Default to

13769

+ -mvsx-timode for power7/power8.

13770

+ (power7 cpu): Likewise.

13771

+ (power8 cpu): Likewise.

13772

+

13773

+ * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Make

13774

+ sure that TFmode/TDmode take up two registers if they are ever

13775

+ allowed in the upper VSX registers.

13776

+ (rs6000_hard_regno_mode_ok): If -mvsx-timode, allow TImode in VSX

13777

+ registers.

13778

+ (rs6000_init_hard_regno_mode_ok): Likewise.

13779

+ (rs6000_debug_reg_global): Add debugging for PTImode and wt

13780

+ constraint. Print if LRA is turned on.

13781

+ (rs6000_option_override_internal): Give an error if -mvsx-timode

13782

+ and VSX is not enabled.

13783

+ (invalid_e500_subreg): Handle PTImode, restricting it to GPRs. If

13784

+ -mvsx-timode, restrict TImode to reg+reg addressing, and PTImode

13785

+ to reg+offset addressing. Use PTImode when checking offset

13786

+ addresses for validity.

13787

+ (reg_offset_addressing_ok_p): Likewise.

13788

+ (rs6000_legitimate_offset_address_p): Likewise.

13789

+ (rs6000_legitimize_address): Likewise.

13790

+ (rs6000_legitimize_reload_address): Likewise.

13791

+ (rs6000_legitimate_address_p): Likewise.

13792

+ (rs6000_eliminate_indexed_memrefs): Likewise.

13793

+ (rs6000_emit_move): Likewise.

13794

+ (rs6000_secondary_reload): Likewise.

13795

+ (rs6000_secondary_reload_inner): Handle PTImode. Allow 64-bit

13796

+ reloads to fpr registers to continue to use reg+offset addressing)

13797

+ (but 64-bit reloads to altivec registers need reg+reg addressing.

13798

+ Drop test for PRE_MODIFY, since VSX loads/stores no longer support

13799

+ it. Treat LO_SUM like a PLUS operation.

13800

+ (rs6000_secondary_reload_class): If type is 64-bit, prefer to use

13801

+ FLOAT_REGS instead of VSX_RGS to allow use of reg+offset

13802

+ addressing.

13803

+ (rs6000_cannot_change_mode_class): Do not allow TImode in VSX

13804

+ registers to share a register with a smaller sized type, since VSX

13805

+ puts scalars in the upper 64-bits.

13806

+ (print_operand): Add support for PTImode.

13807

+ (rs6000_register_move_cost): Use VECTOR_MEM_VSX_P instead of

13808

+ VECTOR_UNIT_VSX_P to catch types that can be loaded in VSX

13809

+ registers, but don't have arithmetic support.

13810

+ (rs6000_memory_move_cost): Add test for VSX.

13811

+ (rs6000_opt_masks): Add -mvsx-timode.

13812

+

13813

+ * config/rs6000/vsx.md (VSm): Change to use 64-bit aligned moves

13814

+ for TImode.

13815

+ (VSs): Likewise.

13816

+ (VSr): Use wt constraint for TImode.

13817

+ (VSv): Drop TImode support.

13818

+ (vsx_movti): Delete, replace with versions for 32-bit and 64-bit.

13819

+ (vsx_movti_64bit): Likewise.

13820

+ (vsx_movti_32bit): Likewise.

13821

+ (vec_store_<mode>): Use VSX iterator instead of vector iterator.

13822

+ (vsx_and<mode>3): Delete use of '?' constraint on inputs, just put

13823

+ one '?' on the appropriate output constraint. Do not allow TImode

13824

+ logical operations on 32-bit systems.

13825

+ (vsx_ior<mode>3): Likewise.

13826

+ (vsx_xor<mode>3): Likewise.

13827

+ (vsx_one_cmpl<mode>2): Likewise.

13828

+ (vsx_nor<mode>3): Likewise.

13829

+ (vsx_andc<mode>3): Likewise.

13830

+ (vsx_concat_<mode>): Likewise.

13831

+ (vsx_xxpermdi_<mode>): Fix thinko for non V2DF/V2DI modes.

13832

+

13833

+ * config/rs6000/rs6000.h (MASK_VSX_TIMODE): Map from

13834

+ OPTION_MASK_VSX_TIMODE.

13835

+ (enum rs6000_reg_class_enum): Add RS6000_CONSTRAINT_wt.

13836

+ (STACK_SAVEAREA_MODE): Use PTImode instead of TImode.

13837

+

13838

+ * config/rs6000/rs6000.md (INT mode attribute): Add PTImode.

13839

+ (TI2 iterator): New iterator for TImode, PTImode.

13840

+ (wd mode attribute): Add values for vector types.

13841

+ (movti_string): Replace TI move operations with operations for

13842

+ TImode and PTImode. Add support for TImode being allowed in VSX

13843

+ registers.

13844

+ (mov<mode>_string, TImode/PTImode): Likewise.

13845

+ (movti_ppc64): Likewise.

13846

+ (mov<mode>_ppc64, TImode/PTImode): Likewise.

13847

+ (TI mode splitters): Likewise.

13848

+

13849

+ * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wt

13850

+ constraint.

13851

+

13852

+2014-04-04 Richard Biener <rguenther@suse.de>

13853

+

13854

+ * tree-ssanames.c (make_ssa_name_fn): Fix assert.

13855

+

13856

+2014-04-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

13857

+

13858

+ * config/s390/s390.c (s390_expand_insv): Use GET_MODE_BITSIZE.

13859

+

13860

+2014-04-01 Richard Biener <rguenther@suse.de>

13861

+

13862

+ * gimple.h (struct gimple_statement_base): Align subcode to

13863

+ 16 bits.

13864

+

13865

+2014-04-01 Sebastian Huber <sebastian.huber@embedded-brains.de>

13866

+

13867

+ * doc/invoke.texi (mapp-regs): Clarify.

13868

+

13869

+2014-03-31 H.J. Lu <hongjiu.lu@intel.com>

13870

+

13871

+ PR rtl-optimization/60700

13872

+ Backport from mainline

13873

+ 2013-07-30 Zhenqiang Chen <zhenqiang.chen@linaro.org>

13874

+

13875

+ PR rtl-optimization/57637

13876

+ * function.c (move_insn_for_shrink_wrap): Also check the

13877

+ GEN set of the LIVE problem for the liveness analysis

13878

+ if it exists, otherwise give up.

13879

+

13880

+2014-03-30 Kaz Kojima <kkojima@gcc.gnu.org>

13881

+

13882

+ Backport from mainline

13883

+ 2014-03-19 Kaz Kojima <kkojima@gcc.gnu.org>

13884

+

13885

+ PR target/60039

13886

+ * config/sh/sh.md (udivsi3_i1): Clobber R1 register.

13887

+

13888

+2014-03-26 Martin Jambor <mjambor@suse.cz>

13889

+

13890

+ PR ipa/60419

13891

+ * ipa.c (symtab_remove_unreachable_nodes): Clear thunk and

13892

+ alias flags of nodes in the border.

13893

+

13894

+2014-03-26 Eric Botcazou <ebotcazou@adacore.com>

13895

+

13896

+ PR rtl-optimization/60452

13897

+ * rtlanal.c (rtx_addr_can_trap_p_1): Fix head comment.

13898

+ <case REG>: Return 1 for invalid offsets from the frame pointer.

13899

+

13900

+2014-03-24 Richard Biener <rguenther@suse.de>

13901

+

13902

+ PR tree-optimization/60429

13903

+ * tree-ssa-structalias.c (get_constraint_for_ptr_offset): Remove

13904

+ duplicated line.

13905

+

13906

+2014-03-23 Eric Botcazou <ebotcazou@adacore.com>

13907

+

13908

+ PR rtl-optimization/60601

13909

+ * bb-reorder.c (fix_up_fall_thru_edges): Test EDGE_FALLTHRU everywhere.

13910

+

13911

+ * gcc.c (eval_spec_function): Initialize save_growing_value.

13912

+

13913

+2014-03-20 Jakub Jelinek <jakub@redhat.com>

13914

+

13915

+ PR target/60568

13916

+ * config/i386/i386.c (x86_output_mi_thunk): Surround UNSPEC_GOT

13917

+ into CONST, put pic register as first operand of PLUS. Use

13918

+ gen_const_mem for both 32-bit and 64-bit PIC got loads.

13919

+

13920

+2014-03-20 Eric Botcazou <ebotcazou@adacore.com>

13921

+

13922

+ * config/sparc/sparc.c (sparc_do_work_around_errata): Implement work

13923

+ around for store forwarding issue in the FPU on the UT699.

13924

+ * config/sparc/sparc.md (in_branch_delay): Return false for single FP

13925

+ loads and operations if -mfix-ut699 is specified.

13926

+ (divtf3_hq): Tweak attribute.

13927

+ (sqrttf2_hq): Likewise.

13928

+

13929

+2014-03-18 Kai Tietz <ktietz@redhat.com>

13930

+

13931

+ PR rtl-optimization/56356

13932

+ * sdbout.c (sdbout_parms): Verify that parms'

13933

+ incoming argument is valid.

13934

+ (sdbout_reg_parms): Likewise.

13935

+

13936

+2014-03-18 Eric Botcazou <ebotcazou@adacore.com>

13937

+

13938

+ * config/sparc/sparc.c (sparc_do_work_around_errata): Speed up and use

13939

+ proper constant for the store mode.

13940

+

13941

+2014-03-17 Mikael Pettersson <mikpelinux@gmail.com>

13942

+ Committed by Bill Schmidt <wschmidt@linux.vnet.ibm.com>

13943

+

13944

+ Backport from mainline:

13945

+

13946

+ 2013-06-20 Joern Rennecke <joern.rennecke@embecosm.com>

13947

+

13948

+ PR rtl-optimization/57425

13949

+ PR rtl-optimization/57569

13950

+ * alias.c (write_dependence_p): Remove parameters mem_mode and

13951

+ canon_mem_addr. Add parameters x_mode, x_addr and x_canonicalized.

13952

+ Changed all callers.

13953

+ (canon_anti_dependence): Get comments and semantics in sync.

13954

+ Add parameter mem_canonicalized. Changed all callers.

13955

+ * rtl.h (canon_anti_dependence): Update prototype.

13956

+

13957

+ 2013-06-16 Joern Rennecke <joern.rennecke@embecosm.com>

13958

+

13959

+ PR rtl-optimization/57425

13960

+ PR rtl-optimization/57569

13961

+ * alias.c (write_dependence_p): Add new parameters mem_mode,

13962

+ canon_mem_addr and mem_canonicalized. Change type of writep to bool.

13963

+ Changed all callers.

13964

+ (canon_anti_dependence): New function.

13965

+ * cse.c (check_dependence): Use canon_anti_dependence.

13966

+ * cselib.c (cselib_invalidate_mem): Likewise.

13967

+ * rtl.h (canon_anti_dependence): Declare.

13968

+

13969

+2014-03-17 Richard Biener <rguenther@suse.de>

13970

+

13971

+ Backport from mainline

13972

+ 2014-03-11 Richard Biener <rguenther@suse.de>

13973

+

13974

+ PR tree-optimization/60429

13975

+ PR tree-optimization/60485

13976

+ * tree-ssa-structalias.c (set_union_with_increment): Properly

13977

+ take into account all fields that overlap the shifted vars.

13978

+ (do_sd_constraint): Likewise.

13979

+ (do_ds_constraint): Likewise.

13980

+ (get_constraint_for_ptr_offset): Likewise.

13981

+

13982

+2014-03-15 Eric Botcazou <ebotcazou@adacore.com>

13983

+

13984

+ * config/sparc/sparc-protos.h (tls_call_delay): Delete.

13985

+ (eligible_for_call_delay): New prototype.

13986

+ * config/sparc/sparc.c (tls_call_delay): Rename into...

13987

+ (eligible_for_call_delay): ...this. Return false if the instruction

13988

+ cannot be put in the delay slot of a branch.

13989

+ (eligible_for_restore_insn): Simplify.

13990

+ (eligible_for_return_delay): Return false if the instruction cannot be

13991

+ put in the delay slot of a branch and simplify.

13992

+ (eligible_for_sibcall_delay): Return false if the instruction cannot be

13993

+ put in the delay slot of a branch.

13994

+ * config/sparc/sparc.md (fix_ut699): New attribute.

13995

+ (tls_call_delay): Delete.

13996

+ (in_call_delay): Reimplement.

13997

+ (eligible_for_sibcall_delay): Rename into...

13998

+ (in_sibcall_delay): ...this.

13999

+ (eligible_for_return_delay): Rename into...

14000

+ (in_return_delay): ...this.

14001

+ (in_branch_delay): Reimplement.

14002

+ (in_uncond_branch_delay): Delete.

14003

+ (in_annul_branch_delay): Delete.

14004

+

14005

+2014-03-14 Georg-Johann Lay <avr@gjlay.de>

14006

+

14007

+ Backport from 2014-03-14 trunk r208562.

14008

+

14009

+ PR target/59396

14010

+ * config/avr/avr.c (avr_set_current_function): Pass function name

14011

+ through default_strip_name_encoding before sanity checking instead

14012

+ of skipping the first char of the assembler name.

14013

+

14014

+2014-03-13 Georg-Johann Lay <avr@gjlay.de>

14015

+

14016

+ Backport from 2014-03-13 trunk r208532.

14017

+

14018

+ PR target/60486

14019

+ * config/avr/avr.c (avr_out_plus): Swap cc_plus and cc_minus in

14020

+ calls of avr_out_plus_1.

14021

+

14022

+2014-03-13 Joey Ye <joey.ye@arm.com>

14023

+

14024

+ Backport from mainline

14025

+ 2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com>

14026

+

14027

+ PR tree-optimization/60454

14028

+ * tree-ssa-math-opts.c (find_bswap_1): Fix bswap detection.

14029

+

14030

+2014-03-06 Matthias Klose <doko@ubuntu.com>

14031

+

14032

+ * Makefile.in (s-mlib): Only pass MULTIARCH_DIRNAME if

14033

+ MULTILIB_OSDIRNAMES is not defined.

14034

+

14035

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

14036

+

14037

+ PR tree-optimization/60276

14038

+ * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Avoid

14039

+ a -Wsign-compare warning.

14040

+

14041

+ * Makefile.in (tree-ssa-uninit.o): Depend on $(PARAMS_H).

14042

+

14043

+ Backport from mainline

14044

+ 2014-02-21 Jakub Jelinek <jakub@redhat.com>

14045

+

14046

+ PR tree-optimization/56490

14047

+ * params.def (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS): New param.

14048

+ * tree-ssa-uninit.c: Include params.h.

14049

+ (compute_control_dep_chain): Add num_calls argument, return false

14050

+ if it exceed PARAM_UNINIT_CONTROL_DEP_ATTEMPTS param, pass

14051

+ num_calls to recursive call.

14052

+ (find_predicates): Change dep_chain into normal array, add num_calls

14053

+ variable and adjust compute_control_dep_chain caller.

14054

+ (find_def_preds): Likewise.

14055

+

14056

+ 2014-02-13 Jakub Jelinek <jakub@redhat.com>

14057

+

14058

+ PR target/43546

14059

+ * expr.c (compress_float_constant): If x is a hard register,

14060

+ extend into a pseudo and then move to x.

14061

+

14062

+ 2014-02-11 Richard Henderson <rth@redhat.com>

14063

+ Jakub Jelinek <jakub@redhat.com>

14064

+

14065

+ PR debug/59776

14066

+ * tree-sra.c (load_assign_lhs_subreplacements): Add VIEW_CONVERT_EXPR

14067

+ around drhs if type conversion to lacc->type is not useless.

14068

+

14069

+ 2014-02-08 Jakub Jelinek <jakub@redhat.com>

14070

+

14071

+ PR ipa/60026

14072

+ * ipa-cp.c (determine_versionability): Fail at -O0

14073

+ or __attribute__((optimize (0))) or -fno-ipa-cp functions.

14074

+ * tree-sra.c (ipa_sra_preliminary_function_checks): Similarly.

14075

+

14076

+ 2014-02-06 Jakub Jelinek <jakub@redhat.com>

14077

+

14078

+ PR target/60062

14079

+ * tree.h (opts_for_fn): New inline function.

14080

+ (opt_for_fn): Define.

14081

+ * config/i386/i386.c (ix86_function_regparm): Use

14082

+ opt_for_fn (decl, optimize) instead of optimize.

14083

+

14084

+ 2014-02-05 Jakub Jelinek <jakub@redhat.com>

14085

+

14086

+ PR middle-end/57499

14087

+ * tree-eh.c (cleanup_empty_eh): Bail out on totally empty

14088

+ bb with no successors.

14089

+

14090

+2014-03-04 Richard Biener <rguenther@suse.de>

14091

+

14092

+ PR tree-optimization/60382

14093

+ * tree-vect-loop.c (vect_is_simple_reduction_1): Do not consider

14094

+ dead PHIs a reduction.

14095

+

14096

+2014-02-25 Richard Biener <rguenther@suse.de>

14097

+

14098

+ Backport from mainline

14099

+ 2014-02-21 Richard Biener <rguenther@suse.de>

14100

+

14101

+ PR tree-optimization/60276

14102

+ * tree-vectorizer.h (struct _stmt_vec_info): Add min_neg_dist field.

14103

+ (STMT_VINFO_MIN_NEG_DIST): New macro.

14104

+ * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Record

14105

+ STMT_VINFO_MIN_NEG_DIST.

14106

+ * tree-vect-stmts.c (vectorizable_load): Verify if assumptions

14107

+ made for negative dependence distances still hold.

14108

+

14109

+2014-02-25 Richard Biener <rguenther@suse.de>

14110

+

14111

+ Backport from mainline

14112

+ 2014-02-21 Richard Biener <rguenther@suse.de>

14113

+

14114

+ PR middle-end/60291

14115

+ * tree-ssa-live.c (mark_all_vars_used_1): Do not walk

14116

+ DECL_INITIAL for globals not in the current function context.

14117

+

14118

+ 2014-02-20 Richard Biener <rguenther@suse.de>

14119

+

14120

+ PR middle-end/60221

14121

+ * tree-eh.c (execute_cleanup_eh_1): Also cleanup empty EH

14122

+ regions at -O0.

14123

+

14124

+ 2014-02-14 Richard Biener <rguenther@suse.de>

14125

+

14126

+ PR tree-optimization/60183

14127

+ * tree-ssa-phiprop.c (propagate_with_phi): Avoid speculating

14128

+ loads.

14129

+ (tree_ssa_phiprop): Calculate and free post-dominators.

14130

+

14131

+2014-02-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

14132

+

14133

+ PR target/55426

14134

+ * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Allow 128 to 64-bit

14135

+ conversions.

14136

+

14137

+2014-02-24 John David Anglin <danglin@gcc.gnu.org>

14138

+

14139

+ * config/pa/pa.c (pa_output_move_double): Don't valididate when

14140

+ adjusting offsetable addresses.

14141

+

14142

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

14143

+

14144

+ * config/microblaze/microblaze.md: Correct ashrsi_reg / lshrsi_reg names

14145

+

14146

+2014-02-23 Edgar E. Iglesias <edgar.iglesias@xilinx.com>

14147

+

14148

+ * config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED

14149

+ definition.

14150

+

14151

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

14152

+

14153

+ * /config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk

14154

+ and define TARGET_ASM_OUTPUT_MI_THUNK and

14155

+ TARGET_ASM_CAN_OUTPUT_MI_THUNK.

14156

+

14157

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

14158

+

14159

+ * config/microblaze/predicates.md: Add cmp_op predicate.

14160

+ * config/microblaze/microblaze.md: Add branch_compare instruction

14161

+ which uses cmp_op predicate and emits cmp insn before branch.

14162

+ * config/microblaze/microblaze.c (microblaze_emit_compare): Rename

14163

+ to microblaze_expand_conditional_branch and consolidate logic.

14164

+ (microblaze_expand_conditional_branch): emit branch_compare

14165

+ insn instead of handling cmp op separate from branch insn.

14166

+

14167

+2014-02-21 Martin Jambor <mjambor@suse.cz>

14168

+

14169

+ PR ipa/55260

14170

+ * ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Uce correct

14171

+ info when checking whether lattices are bottom.

14172

+

14173

+2014-02-21 Jakub Jelinek <jakub@redhat.com>

14174

+

14175

+ * config/i386/i386.c (ix86_expand_vec_perm): Use V8SImode

14176

+ mode for mask of V8SFmode permutation.

14177

+

14178

+2014-02-20 Richard Henderson <rth@redhat.com>

14179

+

14180

+ PR c++/60272

14181

+ * builtins.c (expand_builtin_atomic_compare_exchange): Conditionalize

14182

+ on failure the store back into EXPECT. Always make a new pseudo for

14183

+ OLDVAL.

14184

+

14185

+2014-02-20 Jakub Jelinek <jakub@redhat.com>

14186

+

14187

+ PR target/57896

14188

+ * config/i386/i386.c (expand_vec_perm_interleave2): Don't call

14189

+ gen_reg_rtx if d->testing_p.

14190

+ (expand_vec_perm_pshufb2, expand_vec_perm_even_odd_1,

14191

+ expand_vec_perm_broadcast_1): Return early if d->testing_p and

14192

+ we will certainly return true.

14193

+

14194

+2014-02-20 Richard Biener <rguenther@suse.de>

14195

+

14196

+ * tree-cfg.c (replace_uses_by): Mark altered BBs before

14197

+ doing the substitution.

14198

+

14199

+2014-02-19 H.J. Lu <hongjiu.lu@intel.com>

14200

+

14201

+ Backport from mainline

14202

+ 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>

14203

+

14204

+ PR target/60207

14205

+ * config/i386/i386.c (construct_container): Remove TFmode check

14206

+ for X86_64_INTEGER_CLASS.

14207

+

14208

+2014-02-19 Uros Bizjak <ubizjak@gmail.com>

14209

+

14210

+ Backport from mainline

14211

+ 2014-02-19 Uros Bizjak <ubizjak@gmail.com>

14212

+

14213

+ PR target/59794

14214

+ * config/i386/i386.c (type_natural_mode): Warn for ABI changes

14215

+ only when -Wpsabi is enabled.

14216

+

14217

+2014-02-19 Terry Guo <terry.guo@arm.com>

14218

+

14219

+ Backport from mainline

14220

+ 2014-02-08 Terry Guo <terry.guo@arm.com>

14221

+

14222

+ * doc/invoke.texi: Document ARM -march=armv7e-m.

14223

+

14224

+2014-02-18 Kai Tietz <ktietz@redhat.com>

14225

+

14226

+ Backport from mainline

14227

+ 2014-02-18 Kai Tietz <ktietz@redhat.com>

14228

+

14229

+ PR target/60193

14230

+ * config/i386/i386.c (ix86_expand_prologue): Use

14231

+ rax register as displacement for restoring %r10, %rax.

14232

+ Additional fix wrong offset for restoring both-registers.

14233

+

14234

+2014-02-18 Eric Botcazou <ebotcazou@adacore.com>

14235

+

14236

+ * ipa-prop.c (compute_complex_ancestor_jump_func): Replace overzealous

14237

+ assertion with conditional return.

14238

+

14239

+2014-02-18 Jakub Jelinek <jakub@redhat.com>

14240

+ Uros Bizjak <ubizjak@gmail.com>

14241

+

14242

+ PR driver/60233

14243

+ * config/i386/driver-i386.c (host_detect_local_cpu): If

14244

+ YMM state is not saved by the OS, also clear has_f16c. Move

14245

+ CPUID 0x80000001 handling before YMM state saving checking.

14246

+

14247

+2014-02-14 Roland McGrath <mcgrathr@google.com>

14248

+

14249

+ * configure.ac (HAVE_AS_IX86_UD2): New test for 'ud2' mnemonic.

14250

+ * configure: Regenerated.

14251

+ * config.in: Regenerated.

14252

+ * config/i386/i386.md (trap) [HAVE_AS_IX86_UD2]: Use the mnemonic

14253

+ instead of ASM_SHORT.

14254

+

14255

+2014-02-13 Uros Bizjak <ubizjak@gmail.com>

14256

+

14257

+ Backport from mainline

14258

+ 2014-02-13 Uros Bizjak <ubizjak@gmail.com>

14259

+

14260

+ * config/i386/sse.md (xop_vmfrcz<mode>2): Generate const0 in

14261

+ operands[2], not operands[3].

14262

+

14263

+2014-02-13 Dominik Vogt <vogt@linux.vnet.ibm.com>

14264

+

14265

+ * config/s390/s390.c (s390_asm_output_function_label): Fix crash

14266

+ caused by bad second argument to warning_at() with -mhotpatch and

14267

+ nested functions (e.g. with gfortran).

14268

+

14269

+2014-02-12 H.J. Lu <hongjiu.lu@intel.com>

14270

+

14271

+ Backport from mainline

14272

+ 2014-02-12 H.J. Lu <hongjiu.lu@intel.com>

14273

+ Uros Bizjak <ubizjak@gmail.com>

14274

+

14275

+ PR target/60151

14276

+ * configure.ac (HAVE_AS_GOTOFF_IN_DATA): Pass --32 to GNU assembler.

14277

+

14278

+2014-02-12 Eric Botcazou <ebotcazou@adacore.com>

14279

+

14280

+ PR rtl-optimization/60116

14281

+ * combine.c (try_combine): Also remove dangling REG_DEAD notes on the

14282

+ other_insn once the combination has been validated.

14283

+

14284

+2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>

14285

+

14286

+ * config/microblaze/microblaze.md: Add movsi4_rev insn pattern.

14287

+ * config/microblaze/predicates.md: Add reg_or_mem_operand predicate.

14288

+

14289

+2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>

14290

+

14291

+ * config/microblaze/microblaze.c: Extend mcpu version format

14292

+

14293

+2014-02-10 David Holsgrove <david.holsgrove@xilinx.com>

14294

+

14295

+ * config/microblaze/microblaze.h: Define SIZE_TYPE and PTRDIFF_TYPE.

14296

+

14297

+2014-02-10 Richard Biener <rguenther@suse.de>

14298

+

14299

+ Backport from mainline

14300

+ 2014-01-30 Richard Biener <rguenther@suse.de>

14301

+

14302

+ PR tree-optimization/59903

14303

+ * tree-vect-loop.c (vect_transform_loop): Guard multiple-types

14304

+ check properly.

14305

+

14306

+ 2014-02-10 Richard Biener <rguenther@suse.de>

14307

+

14308

+ PR tree-optimization/60115

14309

+ * tree-eh.c (tree_could_trap_p): Unify TARGET_MEM_REF and

14310

+ MEM_REF handling. Properly verify that the accesses are not

14311

+ out of the objects bound.

14312

+

14313

+2014-02-05 James Greenhalgh <james.greenhalgh@arm.com>

14314

+

14315

+ Backport from mainline.

14316

+ 2014-02-05 James Greenhalgh <james.greenhalgh@arm.com>

14317

+

14318

+ PR target/59718

14319

+ * doc/invoke.texi (-march): Clarify documentation for ARM.

14320

+ (-mtune): Likewise.

14321

+ (-mcpu): Likewise.

14322

+

14323

+2014-02-04 John David Anglin <danglin@gcc.gnu.org>

14324

+

14325

+ PR target/59777

14326

+ * config/pa/pa.c (legitimize_tls_address): Return original address

14327

+ if not passed a SYMBOL_REF rtx.

14328

+ (hppa_legitimize_address): Call legitimize_tls_address for all TLS

14329

+ addresses.

14330

+ (pa_emit_move_sequence): Simplify TLS source operands.

14331

+ (pa_legitimate_constant_p): Reject all TLS constants.

14332

+ * config/pa/pa.h (PA_SYMBOL_REF_TLS_P): Correct comment.

14333

+ (CONSTANT_ADDRESS_P): Reject TLS CONST addresses.

14334

+

14335

+2014-02-04 Uros Bizjak <ubizjak@gmail.com>

14336

+

14337

+ Backport from mainline

14338

+ 2014-02-02 Uros Bizjak <ubizjak@gmail.com>

14339

+

14340

+ PR target/60017

14341

+ * config/i386/i386.c (classify_argument): Fix handling of bit_offset

14342

+ when calculating size of integer atomic types.

14343

+

14344

+2014-02-02 Uros Bizjak <ubizjak@gmail.com>

14345

+

14346

+ Backport from mainline

14347

+ 2014-01-30 Jakub Jelinek <jakub@redhat.com>

14348

+

14349

+ * config/i386/f16cintrin.h (_cvtsh_ss): Avoid -Wnarrowing warning.

14350

+

14351

+2014-01-31 Richard Henderson <rth@redhat.com>

14352

+

14353

+ PR middle-end/60004

14354

+ * tree-eh.c (lower_try_finally_switch): Delay lowering finally block

14355

+ until after else_eh is processed.

14356

+

14357

+2014-01-30 David Holsgrove <david.holsgrove@xilinx.com>

14358

+

14359

+ Backport from mainline

14360

+ * config/microblaze/microblaze.md(cstoresf4, cbranchsf4): Replace

14361

+ comparison_operator with ordered_comparison_operator.

14362

+

14363

+2014-01-25 Walter Lee <walt@tilera.com>

14364

+

14365

+ Backport from mainline

14366

+ 2014-01-25 Walter Lee <walt@tilera.com>

14367

+

14368

+ * config/tilegx/sync.md (atomic_fetch_sub): Fix negation and

14369

+ avoid clobbering a live register.

14370

+

14371

+2014-01-25 Walter Lee <walt@tilera.com>

14372

+

14373

+ Backport from mainline

14374

+ 2014-01-25 Walter Lee <walt@tilera.com>

14375

+

14376

+ * config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins):

14377

+ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.

14378

+ * config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins):

14379

+ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}.

14380

+

14381

+2014-01-25 Walter Lee <walt@tilera.com>

14382

+

14383

+ Backport from mainline

14384

+ 2014-01-25 Walter Lee <walt@tilera.com>

14385

+

14386

+ * config/tilegx/tilegx.c (tilegx_gen_bundles): Delete barrier

14387

+ insns before bundling.

14388

+ * config/tilegx/tilegx.md (tile_network_barrier): Update comment.

14389

+

14390

+2014-01-25 Walter Lee <walt@tilera.com>

14391

+

14392

+ Backport from mainline

14393

+ 2014-01-25 Walter Lee <walt@tilera.com>

14394

+

14395

+ * config/tilegx/tilegx.c (tilegx_expand_builtin): Set

14396

+ PREFETCH_SCHEDULE_BARRIER_P to true for prefetches.

14397

+ * config/tilepro/tilepro.c (tilepro_expand_builtin): Ditto.

14398

+

14399

+2014-01-25 Walter Lee <walt@tilera.com>

14400

+

14401

+ Backport from mainline

14402

+ 2014-01-25 Walter Lee <walt@tilera.com>

14403

+

14404

+ * config/tilepro/tilepro.md (ctzdi2): Use register_operand

14405

+ predicate.

14406

+ (clzdi2): Ditto.

14407

+ (ffsdi2): Ditto.

14408

+

14409

+2014-01-25 Walter Lee <walt@tilera.com>

14410

+

14411

+ Backport from mainline

14412

+ 2014-01-25 Walter Lee <walt@tilera.com>

14413

+

14414

+ * config/tilegx/tilegx.c (tilegx_expand_to_rtl_hook): New.

14415

+ (TARGET_EXPAND_TO_RTL_HOOK): Define.

14416

+

14417

+2014-01-24 H.J. Lu <hongjiu.lu@intel.com>

14418

+

14419

+ Backport from mainline

14420

+ 2014-01-23 H.J. Lu <hongjiu.lu@intel.com>

14421

+

14422

+ PR target/59929

14423

+ * config/i386/i386.md (pushsf splitter): Get stack adjustment

14424

+ from push operand if code of push isn't PRE_DEC.

14425

+

14426

+2014-01-23 David Holsgrove <david.holsgrove@xilinx.com>

14427

+

14428

+ Backport from mainline.

14429

+ * config/microblaze/microblaze.md: Add trap insn and attribute

14430

+

14431

+2014-01-23 Marek Polacek <polacek@redhat.com>

14432

+

14433

+ Backport from mainline

14434

+ 2013-10-21 Marek Polacek <polacek@redhat.com>

14435

+

14436

+ PR middle-end/58809

14437

+ * fold-const.c (fold_range_test): Return 0 if the type is not

14438

+ an integral type.

14439

+

14440

+2014-01-22 David Holsgrove <david.holsgrove@xilinx.com>

14441

+

14442

+ * config/microblaze/microblaze.md: Correct bswaphi2 insn.

14443

+

14444

+2014-01-22 Uros Bizjak <ubizjak@gmail.com>

14445

+

14446

+ Backport from mainline

14447

+ 2014-01-20 Uros Bizjak <ubizjak@gmail.com>

14448

+

14449

+ * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false

14450

+ for SImode_address_operand operands, having only a REG argument.

14451

+

14452

+ 2014-01-20 Jakub Jelinek <jakub@redhat.com>

14453

+

14454

+ PR target/59880

14455

+ * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false

14456

+ if operands[1] is a REG or ZERO_EXTEND of a REG.

14457

+

14458

+ 2014-01-18 Uros Bizjak <ubizjak@gmail.com>

14459

+ H.J. Lu <hongjiu.lu@intel.com>

14460

+

14461

+ PR target/59379

14462

+ * config/i386/i386.md (*lea<mode>): Zero-extend return register

14463

+ to DImode for zero-extended addresses.

14464

+

14465

+2014-01-21 Andrew Pinski <apinski@cavium.com>

14466

+ Steve Ellcey <sellcey@mips.com>

14467

+

14468

+ PR target/59462

14469

+ * config/mips/mips.c (mips_print_operand): Check operand mode instead

14470

+ of operator mode.

14471

+

14472

+2014-01-21 Andrey Belevantsev <abel@ispras.ru>

14473

+

14474

+ Backport from mainline

14475

+ 2013-12-23 Andrey Belevantsev <abel@ispras.ru>

14476

+

14477

+ PR rtl-optimization/57422

14478

+ * sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling

14479

+ add_to_hard_reg_set.

14480

+

14481

+2014-01-20 Jakub Jelinek <jakub@redhat.com>

14482

+

14483

+ PR middle-end/59860

14484

+ * tree.h (fold_builtin_strcat): New prototype.

14485

+ * builtins.c (fold_builtin_strcat): No longer static. Add len

14486

+ argument, if non-NULL, don't call c_strlen. Optimize

14487

+ directly into __builtin_memcpy instead of __builtin_strcpy.

14488

+ (fold_builtin_2): Adjust fold_builtin_strcat caller.

14489

+ * gimple-fold.c (gimple_fold_builtin): Handle BUILT_IN_STRCAT.

14490

+

14491

+2014-01-20 Richard Biener <rguenther@suse.de>

14492

+

14493

+ PR middle-end/59860

14494

+ * builtins.c (fold_builtin_strcat): Remove case better handled

14495

+ by tree-ssa-strlen.c.

14496

+

14497

+2014-01-19 John David Anglin <danglin@gcc.gnu.org>

14498

+

14499

+ * config/pa/pa.c (pa_attr_length_millicode_call): Correct length of

14500

+ long non-pic millicode calls.

14501

+

14502

+2014-01-17 John David Anglin <danglin@gcc.gnu.org>

14503

+

14504

+ * config/pa/pa.c (pa_attr_length_indirect_call): Don't output a short

14505

+ call to $$dyncall when TARGET_LONG_CALLS is true.

14506

+

14507

+2014-01-17 H.J. Lu <hongjiu.lu@intel.com>

14508

+

14509

+ Backport from mainline

14510

+ 2014-01-14 H.J. Lu <hongjiu.lu@intel.com>

14511

+

14512

+ PR target/59794

14513

+ * config/i386/i386.c (type_natural_mode): Add a bool parameter

14514

+ to indicate if type is used for function return value. Warn

14515

+ ABI change if the vector mode isn't available for function

14516

+ return value.

14517

+ (ix86_function_arg_advance): Pass false to type_natural_mode.

14518

+ (ix86_function_arg): Likewise.

14519

+ (ix86_gimplify_va_arg): Likewise.

14520

+ (function_arg_32): Don't warn ABI change.

14521

+ (ix86_function_value): Pass true to type_natural_mode.

14522

+ (ix86_return_in_memory): Likewise.

14523

+ (ix86_struct_value_rtx): Removed.

14524

+ (TARGET_STRUCT_VALUE_RTX): Likewise.

14525

+

14526

+2014-01-17 Charles Baylis <charles.baylis@linaro.org>

14527

+

14528

+ Backport from mainline

14529

+ 2013-12-19 Charles Baylis <charles.baylis@linaro.org>

14530

+

14531

+ PR target/59142

14532

+ * config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb

14533

+ patterns.

14534

+ * config/arm/ldmstm.md: Regenerate.

14535

+

14536

+ 2013-12-19 Charles Baylis <charles.baylis@linaro.org>

14537

+

14538

+ PR target/59142

14539

+ * config/arm/predicates.md (arm_hard_general_register_operand):

14540

+ New predicate.

14541

+ (arm_hard_register_operand): Remove.

14542

+ * config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand

14543

+ for all patterns.

14544

+ * config/arm/ldmstm.md: Regenerate.

14545

+

14546

+ 2013-12-19 Charles Baylis <charles.baylis@linaro.org>

14547

+

14548

+ PR target/59142

14549

+ * config/arm/predicates.md (vfp_hard_register_operand): New predicate.

14550

+ * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use

14551

+ vfp_hard_register_operand.

14552

+

14553

+2014-01-17 Kugan Vivekanandarajah <kuganv@linaro.org>

14554

+

14555

+ Backport from mainline

14556

+ 2014-01-15 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org>

14557

+ Kugan Vivekanandarajah <kuganv@linaro.org>

14558

+

14559

+ PR target/59695

14560

+ * config/aarch64/aarch64.c (aarch64_build_constant): Fix incorrect

14561

+ truncation.

14562

+

14563

+2014-01-17 Terry Guo <terry.guo@arm.com>

14564

+

14565

+ PR target/59826

14566

+ * config/arm/arm.md (prefetch): Set insn type attribute to load1.

14567

+

14568

+2014-01-16 Jakub Jelinek <jakub@redhat.com>

14569

+

14570

+ PR target/59839

14571

+ * config/i386/i386.c (ix86_expand_builtin): If target doesn't

14572

+ satisfy operand 0 predicate for gathers, use a new pseudo as

14573

+ subtarget.

14574

+

14575

+2014-01-16 Richard Henderson <rth@redhat.com>

14576

+

14577

+ PR debug/54694

14578

+ * reginfo.c (global_regs_decl): Globalize.

14579

+ * rtl.h (global_regs_decl): Declare.

14580

+ * ira.c (do_reload): Diagnose frame_pointer_needed and it

14581

+ reserved via global_regs.

14582

+

14583

+2014-01-16 Peter Bergner <bergner@vnet.ibm.com>

14584

+

14585

+ Backport from mainline

14586

+ 2014-01-15 Uros Bizjak <ubizjak@gmail.com>

14587

+

14588

+ * config/i386/i386.c (ix86_hard_regno_mode_ok): Use

14589

+ VALID_AVX256_REG_OR_OI_MODE.

14590

+

14591

+ 2013-09-05 Peter Bergner <bergner@vnet.ibm.com>

14592

+

14593

+ PR target/58139

14594

+ * reginfo.c (choose_hard_reg_mode): Scan through all mode classes

14595

+ looking for widest mode.

14596

+

14597

+2014-01-16 Marek Polacek <polacek@redhat.com>

14598

+

14599

+ Backported from mainline

14600

+ 2014-01-16 Marek Polacek <polacek@redhat.com>

14601

+

14602

+ PR middle-end/59827

14603

+ * gimple-low.c (gimple_check_call_args): Don't use DECL_ARG_TYPE if

14604

+ it is error_mark_node.

14605

+

14606

+2014-01-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14607

+

14608

+ PR target/59803

14609

+ * config/s390/s390.c (s390_preferred_reload_class): Don't return

14610

+ ADDR_REGS for invalid symrefs in non-PIC code.

14611

+

14612

+2014-01-14 Uros Bizjak <ubizjak@gmail.com>

14613

+

14614

+ Revert:

14615

+ 2014-01-08 Uros Bizjak <ubizjak@gmail.com>

14616

+

14617

+ * config/i386/i386.c (ix86_data_alignment): Calculate max_align

14618

+ from prefetch_block tune setting.

14619

+

14620

+2014-01-13 Jakub Jelinek <jakub@redhat.com>

14621

+

14622

+ Backported from mainline

14623

+ 2014-01-10 Jakub Jelinek <jakub@redhat.com>

14624

+

14625

+ PR tree-optimization/59745

14626

+ * tree-predcom.c (tree_predictive_commoning_loop): Call

14627

+ free_affine_expand_cache if giving up because components is NULL.

14628

+

14629

+2014-01-10 Yufeng Zhang <yufeng.zhang@arm.com>

14630

+

14631

+ * config/arm/arm.c (arm_expand_neon_args): Call expand_expr

14632

+ with EXPAND_MEMORY for NEON_ARG_MEMORY; check if the returned

14633

+ rtx is const0_rtx or not.

14634

+

14635

+2014-01-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14636

+

14637

+ * config/s390/s390.c (s390_expand_tbegin): Remove jump over CC

14638

+ extraction in good case.

14639

+

14640

+2014-01-10 Huacai Chen <chenhc@lemote.com>

14641

+

14642

+ * config/mips/driver-native.c (host_detect_local_cpu): Handle new

14643

+ kernel strings for Loongson-2E/2F/3A.

14644

+

14645

+2014-01-10 Richard Biener <rguenther@suse.de>

14646

+

14647

+ PR tree-optimization/59715

14648

+ * tree-flow.h (split_critical_edges): Declare.

14649

+ * tree-cfg.c (split_critical_edges): Export.

14650

+ * tree-ssa-sink.c (execute_sink_code): Split critical edges.

14651

+

14652

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

14653

+

14654

+ * config/mips/mips.h (ISA_HAS_WSBH): Define.

14655

+ * config/mips/mips.md (UNSPEC_WSBH, UNSPEC_DSBH, UNSPEC_DSHD): New

14656

+ constants.

14657

+ (bswaphi2, bswapsi2, bswapdi2, wsbh, dsbh, dshd): New patterns.

14658

+

14659

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

14660

+

14661

+ PR rtl-optimization/59137

14662

+ * reorg.c (steal_delay_list_from_target): Call update_block for

14663

+ elided insns.

14664

+ (steal_delay_list_from_fallthrough, relax_delay_slots): Likewise.

14665

+

14666

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

14667

+

14668

+ Revert:

14669

+ 2012-10-07 Richard Sandiford <rdsandiford@googlemail.com>

14670

+

14671

+ * config/mips/mips.c (mips_truncated_op_cost): New function.

14672

+ (mips_rtx_costs): Adjust test for BADDU.

14673

+ * config/mips/mips.md (*baddu_di<mode>): Push truncates to operands.

14674

+

14675

+ 2012-10-02 Richard Sandiford <rdsandiford@googlemail.com>

14676

+

14677

+ * config/mips/mips.md (*baddu_si_eb, *baddu_si_el): Merge into...

14678

+ (*baddu_si): ...this new pattern.

14679

+

14680

+2014-01-09 Richard Biener <rguenther@suse.de>

14681

+

14682

+ Backport from mainline

14683

+ 2013-11-18 Richard Biener <rguenther@suse.de>

14684

+

14685

+ PR tree-optimization/59125

14686

+ PR tree-optimization/54570

14687

+ * tree-ssa-sccvn.c (copy_reference_ops_from_ref): When inlining

14688

+ is not complete do not treat component-references with offset zero

14689

+ but different fields as equal.

14690

+ * tree-object-size.c: Include tree-phinodes.h and ssa-iterators.h.

14691

+ (compute_object_sizes): Apply TLC. Propagate the constant

14692

+ results into all uses and fold their stmts.

14693

+ * passes.def (pass_all_optimizations): Move pass_object_sizes

14694

+ after the first pass_forwprop and before pass_fre.

14695

+

14696

+ 2013-12-03 Jakub Jelinek <jakub@redhat.com>

14697

+

14698

+ PR tree-optimization/59362

14699

+ * tree-object-size.c (object_sizes): Change into array of

14700

+ vec<unsigned HOST_WIDE_INT>.

14701

+ (compute_builtin_object_size): Check computed bitmap for

14702

+ non-NULL instead of object_sizes. Call safe_grow on object_sizes

14703

+ vector if new SSA_NAMEs appeared.

14704

+ (init_object_sizes): Check computed bitmap for non-NULL.

14705

+ Call safe_grow on object_sizes elements instead of initializing

14706

+ it with XNEWVEC.

14707

+ (fini_object_sizes): Call release on object_sizes elements, don't

14708

+ set it to NULL.

14709

+

14710

+2014-01-09 Richard Earnshaw <rearnsha@arm.com>

14711

+

14712

+ PR rtl-optimization/54300

14713

+ * regcprop.c (copyprop_hardreg_forward_1): Ensure any unused

14714

+ outputs in a single-set are killed from the value chains.

14715

+

14716

+2014-01-09 Jakub Jelinek <jakub@redhat.com>

14717

+

14718

+ PR rtl-optimization/59724

14719

+ * ifcvt.c (cond_exec_process_if_block): Don't call

14720

+ flow_find_head_matching_sequence with 0 longest_match.

14721

+ * cfgcleanup.c (flow_find_head_matching_sequence): Count even

14722

+ non-active insns if !stop_after.

14723

+ (try_head_merge_bb): Revert 2014-01-07 changes.

14724

+

14725

+2014-01-09 Hans-Peter Nilsson <hp@axis.com>

14726

+

14727

+ Backport from mainline

14728

+ 2013-12-23 Hans-Peter Nilsson <hp@axis.com>

14729

+

14730

+ PR middle-end/59584

14731

+ * config/cris/predicates.md (cris_nonsp_register_operand):

14732

+ New define_predicate.

14733

+ * config/cris/cris.md: Replace register_operand with

14734

+ cris_nonsp_register_operand for destinations in all

14735

+ define_splits where a register is set more than once.

14736

+

14737

+2014-01-08 H.J. Lu <hongjiu.lu@intel.com>

14738

+

14739

+ Backport from mainline

14740

+ 2013-12-25 H.J. Lu <hongjiu.lu@intel.com>

14741

+

14742

+ PR target/59587

14743

+ * config/i386/i386.c (struct ptt): Add a field for processor name.

14744

+ (processor_target_table): Sync with processor_type. Add

14745

+ processor names.

14746

+ (cpu_names): Removed.

14747

+ (ix86_option_override_internal): Default x_ix86_tune_string

14748

+ to processor_target_table[TARGET_CPU_DEFAULT].name.

14749

+ (ix86_function_specific_print): Assert arch and tune <

14750

+ PROCESSOR_max. Use processor_target_table to print arch and

14751

+ tune names.

14752

+ * config/i386/i386.h (TARGET_CPU_DEFAULT): Default to

14753

+ PROCESSOR_GENERIC32.

14754

+ (target_cpu_default): Removed.

14755

+ (processor_type): Reordered.

14756

+

14757

+2014-01-08 Uros Bizjak <ubizjak@gmail.com>

14758

+

14759

+ Backport from mainline

14760

+ 2014-01-05 Uros Bizjak <ubizjak@gmail.com>

14761

+

14762

+ * config/i386/i386.c (ix86_data_alignment): Calculate max_align

14763

+ from prefetch_block tune setting.

14764

+ (nocona_cost): Correct size of prefetch block to 64.

14765

+

14766

+2014-01-08 Martin Jambor <mjambor@suse.cz>

14767

+

14768

+ PR ipa/59610

14769

+ * ipa-prop.c (ipa_compute_jump_functions): Bail out if not optimizing.

14770

+ (parm_preserved_before_stmt_p): Assume modification present when not

14771

+ optimizing.

14772

+

14773

+2014-01-07 John David Anglin <danglin@gcc.gnu.org>

14774

+

14775

+ PR target/59652

14776

+ * config/pa/pa.c (pa_legitimate_address_p): Return false before reload

14777

+ for 14-bit register offsets when INT14_OK_STRICT is false.

14778

+

14779

+2014-01-07 Roland Stigge <stigge@antcom.de>

14780

+ Michael Meissner <meissner@linux.vnet.ibm.com>

14781

+

14782

+ PR 57386/target

14783

+ * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p):

14784

+ Only check TFmode for SPE constants. Don't check TImode or TDmode.

14785

+

14786

+2014-01-07 Jakub Jelinek <jakub@redhat.com>

14787

+

14788

+ PR rtl-optimization/58668

14789

+ * cfgcleanup.c (flow_find_cross_jump): Don't count

14790

+ any jumps if dir_p is NULL. Remove p1 variable and make USE/CLOBBER

14791

+ check consistent with other places.

14792

+ (flow_find_head_matching_sequence): Don't count USE or CLOBBER insns.

14793

+ (try_head_merge_bb): Adjust for the flow_find_head_matching_sequence

14794

+ counting change.

14795

+ * ifcvt.c (count_bb_insns): Don't count USE or CLOBBER insns.

14796

+

14797

+2014-01-07 Mike Stump <mikestump@comcast.net>

14798

+ Jakub Jelinek <jakub@redhat.com>

14799

+

14800

+ PR pch/59436

14801

+ * tree.h (struct tree_optimization_option): Change optabs

14802

+ type from unsigned char * to void *.

14803

+ * optabs.c (init_tree_optimization_optabs): Adjust

14804

+ TREE_OPTIMIZATION_OPTABS initialization.

14805

+

14806

+2014-01-07 Jakub Jelinek <jakub@redhat.com>

14807

+

14808

+ Backported from mainline

14809

+ 2013-12-16 Jakub Jelinek <jakub@redhat.com>

14810

+

14811

+ PR middle-end/58956

14812

+ PR middle-end/59470

14813

+ * gimple.h (walk_stmt_load_store_addr_fn): New typedef.

14814

+ (walk_stmt_load_store_addr_ops, walk_stmt_load_store_ops): Use it

14815

+ for callback params.

14816

+ * gimple.c (walk_stmt_load_store_ops): Likewise.

14817

+ (walk_stmt_load_store_addr_ops): Likewise. Adjust all callback

14818

+ calls to supply the gimple operand containing the base tree

14819

+ as an extra argument.

14820

+ * tree-ssa-ter.c (find_ssaname, find_ssaname_in_store): New helper

14821

+ functions.

14822

+ (find_replaceable_in_bb): For calls or GIMPLE_ASM, only set

14823

+ same_root_var if USE is used somewhere in the stores of the stmt.

14824

+ * ipa-prop.c (visit_ref_for_mod_analysis): Remove name of the stmt

14825

+ argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.

14826

+ * ipa-pure-const.c (check_load, check_store, check_ipa_load,

14827

+ check_ipa_store): Likewise.

14828

+ * gimple.c (gimple_ior_addresses_taken_1): Likewise.

14829

+ * ipa-split.c (test_nonssa_use, mark_nonssa_use): Likewise.

14830

+ (verify_non_ssa_vars, visit_bb): Adjust their callers.

14831

+ * cfgexpand.c (add_scope_conflicts_1): Use

14832

+ walk_stmt_load_store_addr_fn type for visit variable.

14833

+ (visit_op, visit_conflict): Remove name of the stmt

14834

+ argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.

14835

+ * tree-sra.c (asm_visit_addr): Likewise. Remove name of the data

14836

+ argument and ATTRIBUTE_UNUSED.

14837

+ * cgraphbuild.c (mark_address, mark_load, mark_store): Add another

14838

+ unnamed tree argument.

14839

+

14840

+2014-01-03 Andreas Schwab <schwab@linux-m68k.org>

14841

+

14842

+ * config/m68k/m68k.c (handle_move_double): Handle pushes with

14843

+ overlapping registers also for registers other than the stack

14844

+ pointer.

14845

+

14846

+2014-01-03 Jakub Jelinek <jakub@redhat.com>

14847

+

14848

+ PR target/59625

14849

+ * config/i386/i386.c (ix86_avoid_jump_mispredicts): Don't consider

14850

+ asm goto as jump.

14851

+

14852

+2014-01-01 Jakub Jelinek <jakub@redhat.com>

14853

+

14854

+ PR rtl-optimization/59647

14855

+ * cse.c (cse_process_notes_1): Don't substitute negative VOIDmode

14856

+ new_rtx into UNSIGNED_FLOAT rtxes.

14857

+

14858

+2013-12-28 Eric Botcazou <ebotcazou@adacore.com>

14859

+

14860

+ * doc/invoke.texi (output file options): Document -fada-spec-parent.

14861

+

14862

+2013-12-26 Uros Bizjak <ubizjak@gmail.com>

14863

+

14864

+ * config/i386/driver-i386.c (decode_caches_intel): Add missing entries.

14865

+

14866

+2013-12-20 Jakub Jelinek <jakub@redhat.com>

14867

+

14868

+ PR c++/59255

14869

+ Backported from mainline

14870

+ 2013-08-19 Dehao Chen <dehao@google.com>

14871

+

14872

+ * value-prof.c (gimple_ic): Fix the bug of adding EH edge.

14873

+

14874

+2013-12-19 James Greenhalgh <james.greenhalgh@arm.com>

14875

+

14876

+ Backport from Mainline.

14877

+ 2013-05-01 James Greenhalgh <james.greenhalgh@arm.com>

14878

+

14879

+ * config/aarch64/aarch64-simd-builtins.def (cmhs): Rename to...

14880

+ (cmgeu): ...This.

14881

+ (cmhi): Rename to...

14882

+ (cmgtu): ...This.

14883

+ * config/aarch64/aarch64-simd.md

14884

+ (simd_mode): Add SF.

14885

+ (aarch64_vcond_internal): Use new names for unsigned comparison insns.

14886

+ (aarch64_cm<optab><mode>): Rewrite to not use UNSPECs.

14887

+ * config/aarch64/aarch64.md (*cstore<mode>_neg): Rename to...

14888

+ (cstore<mode>_neg): ...This.

14889

+ * config/aarch64/iterators.md

14890

+ (VALLF): new.

14891

+ (unspec): Remove UNSPEC_CM<EQ, LE, LT, GE, GT, HS, HI, TST>.

14892

+ (COMPARISONS): New.

14893

+ (UCOMPARISONS): Likewise.

14894

+ (optab): Add missing comparisons.

14895

+ (n_optab): New.

14896

+ (cmp_1): Likewise.

14897

+ (cmp_2): Likewise.

14898

+ (CMP): Likewise.

14899

+ (cmp): Remove.

14900

+ (VCMP_S): Likewise.

14901

+ (VCMP_U): Likewise.

14902

+ (V_cmp_result): Add DF, SF modes.

14903

+ (v_cmp_result): Likewise.

14904

+ (v): Likewise.

14905

+ (vmtype): Likewise.

14906

+ * config/aarch64/predicates.md (aarch64_reg_or_fp_zero): New.

14907

+

14908

+ Partial Backport from mainline.

14909

+ 2013-05-01 James Greenhalgh <james.greenhalgh@arm.com>

14910

+

14911

+ * config/aarch64/arm_neon.h

14912

+ (vc<eq, lt, le, gt, ge, tst><qsd>_<u><8,16,32,64>): Remap

14913

+ to builtins or C as appropriate.

14914

+

14915

+2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

14916

+ Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14917

+

14918

+ Backport from mainline

14919

+ 2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

14920

+ * config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New

14921

+ constant

14922

+ (s390_hotpatch_trampoline_halfwords_max): New constant

14923

+ (s390_hotpatch_trampoline_halfwords): New static variable

14924

+ (get_hotpatch_attribute): New function

14925

+ (s390_handle_hotpatch_attribute): New function

14926

+ (s390_attribute_table): New target specific attribute table to implement

14927

+ the hotpatch attribute

14928

+ (s390_option_override): Parse hotpatch options

14929

+ (s390_function_num_hotpatch_trampoline_halfwords): New function

14930

+ (s390_can_inline_p): Implement target hook to

14931

+ suppress hotpatching for explicitly inlined functions

14932

+ (s390_asm_output_function_label): Generate hotpatch prologue

14933

+ (TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table

14934

+ (TARGET_CAN_INLINE_P): Define to implement target hook

14935

+ * config/s390/s390.opt (mhotpatch): New options -mhotpatch, -mhotpatch=

14936

+ * config/s390/s390-protos.h (s390_asm_output_function_label): Add

14937

+ prototype

14938

+ * config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific

14939

+ function label generation for hotpatching

14940

+ (FUNCTION_BOUNDARY): Align functions to eight bytes

14941

+ * doc/extend.texi: Document hotpatch attribute

14942

+ * doc/invoke.texi: Document -mhotpatch option

14943

+

14944

+2013-12-18 Eric Botcazou <ebotcazou@adacore.com>

14945

+

14946

+ * config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko.

14947

+

14948

+2013-12-12 Vladimir Makarov <vmakarov@redhat.com>

14949

+

14950

+ PR middle-end/59470

14951

+ * lra-coalesce.c (lra_coalesce): Invalidate inheritance pseudo

14952

+ values if necessary.

14953

+

14954

+2013-12-12 Jakub Jelinek <jakub@redhat.com>

14955

+

14956

+ PR libgomp/59467

14957

+ * gimplify.c (omp_check_private): Add copyprivate argument, if it

14958

+ is true, don't check omp_privatize_by_reference.

14959

+ (gimplify_scan_omp_clauses): For OMP_CLAUSE_COPYPRIVATE verify

14960

+ decl is private in outer context. Adjust omp_check_private caller.

14961

+

14962

+2013-12-10 Eric Botcazou <ebotcazou@adacore.com>

14963

+

14964

+ PR rtl-optimization/58295

14965

+ * simplify-rtx.c (simplify_truncation): Restrict the distribution for

14966

+ WORD_REGISTER_OPERATIONS targets.

14967

+

14968

+2013-12-10 Kai Tietz <ktietz@redhat.com>

14969

+

14970

+ PR target/56807

14971

+ * config/i386/i386.c (ix86_expand_prologue): Address saved

14972

+ registers stack-relative, not via frame-pointer.

14973

+

14974

+2013-12-09 Alan Modra <amodra@gmail.com>

14975

+

14976

+ Apply from mainline

14977

+ 2013-12-05 Alan Modra <amodra@gmail.com>

14978

+ * configure.ac (BUILD_CXXFLAGS) Don't use ALL_CXXFLAGS for

14979

+ build != host.

14980

+ <recursive call for build != host>: Clear GMPINC. Don't bother

14981

+ saving CFLAGS.

14982

+ * configure: Regenerate.

14983

+

14984

+2013-12-08 Uros Bizjak <ubizjak@gmail.com>

14985

+

14986

+ Backport from mainline

14987

+ 2013-12-06 Uros Bizjak <ubizjak@gmail.com>

14988

+

14989

+ PR target/59405

14990

+ * config/i386/i386.c (type_natural_mode): Properly handle

14991

+ size 8 for !TARGET_64BIT.

14992

+

14993

+2013-12-07 Ralf Corsépius <ralf.corsepius@rtems.org>

14994

+

14995

+ * config.gcc (microblaze*-*-rtems*): Add TARGET_BIG_ENDIAN_DEFAULT.

14996

+

14997

+2013-12-06 Jakub Jelinek <jakub@redhat.com>

14998

+

14999

+ PR tree-optimization/59388

15000

+ * tree-ssa-reassoc.c (update_range_test): If op == range->exp,

15001

+ gimplify tem after stmt rather than before it.

15002

+

15003

+2013-12-06 Oleg Endo <olegendo@gcc.gnu.org>

15004

+

15005

+ Backport from mainline

15006

+ 2013-11-26 Oleg Endo <olegendo@gcc.gnu.org>

15007

+

15008

+ PR target/58314

15009

+ PR target/50751

15010

+ * config/sh/sh.c (max_mov_insn_displacement, disp_addr_displacement):

15011

+ Prefix function names with 'sh_'. Make them non-static.

15012

+ * config/sh/sh-protos.h (sh_disp_addr_displacement,

15013

+ sh_max_mov_insn_displacement): Add declarations.

15014

+ * config/sh/constraints.md (Q): Reject QImode.

15015

+ (Sdd): Use match_code "mem".

15016

+ (Snd): Fix erroneous matching of non-memory operands.

15017

+ * config/sh/predicates.md (short_displacement_mem_operand): New

15018

+ predicate.

15019

+ (general_movsrc_operand): Disallow PC relative QImode loads.

15020

+ * config/sh/sh.md (*mov<mode>_reg_reg): Remove it.

15021

+ (*movqi, *movhi): Merge both insns into...

15022

+ (*mov<mode>): ... this new insn. Replace generic 'm' constraints with

15023

+ 'Snd' and 'Sdd' constraints. Calculate insn length dynamically based

15024

+ on the operand types.

15025

+

15026

+2013-12-06 Richard Biener <rguenther@suse.de>

15027

+

15028

+ Backport from mainline

15029

+ 2013-11-29 Richard Biener <rguenther@suse.de>

15030

+

15031

+ PR tree-optimization/59334

15032

+ * tree-ssa-dce.c (eliminate_unnecessary_stmts): Fix bug

15033

+ in previous commit.

15034

+

15035

+ 2013-11-28 Richard Biener <rguenther@suse.de>

15036

+

15037

+ PR tree-optimization/59330

15038

+ * tree-ssa-dce.c (eliminate_unnecessary_stmts): Simplify

15039

+ and fix delayed marking of free calls not necessary.

15040

+

15041

+2013-12-06 Richard Biener <rguenther@suse.de>

15042

+

15043

+ Backport from mainline

15044

+ 2013-11-27 Richard Biener <rguenther@suse.de>

15045

+

15046

+ PR tree-optimization/59288

15047

+ * tree-vect-loop.c (get_initial_def_for_induction): Do not

15048

+ re-analyze the PHI but use STMT_VINFO_LOOP_PHI_EVOLUTION_PART.

15049

+

15050

+ 2013-11-19 Richard Biener <rguenther@suse.de>

15051

+

15052

+ PR tree-optimization/59164

15053

+ * tree-vect-loop.c (vect_analyze_loop_operations): Adjust

15054

+ check whether we can create an epilogue loop to reflect the

15055

+ cases where we create one.

15056

+

15057

+ 2013-09-05 Richard Biener <rguenther@suse.de>

15058

+

15059

+ PR tree-optimization/58137

15060

+ * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size):

15061

+ Do not create vectors of pointers.

15062

+ * tree-vect-loop.c (get_initial_def_for_induction): Use proper

15063

+ types for the components of the vector initializer.

15064

+ * tree-cfg.c (verify_gimple_assign_binary): Remove special-casing

15065

+ allowing pointer vectors with PLUS_EXPR/MINUS_EXPR.

15066

+

15067

+2013-12-06 Oleg Endo <olegendo@gcc.gnu.org>

15068

+

15069

+ PR target/51244

15070

+ PR target/59343

15071

+ * config/sh/sh.md (*cbranch_t): Check that there are no labels between

15072

+ the s1 insn and the testing insn. Remove REG_DEAD note from s1 insn.

15073

+

15074

+2013-12-05 Richard Biener <rguenther@suse.de>

15075

+

15076

+ Backport from mainline

15077

+ 2013-11-19 Richard Biener <rguenther@suse.de>

15078

+

15079

+ PR middle-end/58956

15080

+ * tree-ssa-ter.c (find_replaceable_in_bb): Avoid forwarding

15081

+ loads into stmts that may clobber it.

15082

+

15083

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

15084

+

15085

+ PR rtl-optimization/58726

15086

+ * combine.c (force_to_mode): Fix comment typo. Don't destructively

15087

+ modify x for ROTATE, ROTATERT and IF_THEN_ELSE.

15088

+

15089

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

15090

+ Uros Bizjak <ubizjak@gmail.com>

15091

+

15092

+ PR target/59163

15093

+ * config/i386/i386.c (ix86_legitimate_combined_insn): If for

15094

+ !TARGET_AVX there is misaligned MEM operand with vector mode

15095

+ and get_attr_ssememalign is 0, return false.

15096

+ (ix86_expand_special_args_builtin): Add get_pointer_alignment

15097

+ computed alignment and for non-temporal loads/stores also

15098

+ at least GET_MODE_ALIGNMENT as MEM_ALIGN.

15099

+ * config/i386/sse.md

15100

+ (<sse>_loadu<ssemodesuffix><avxsizesuffix>,

15101

+ <sse>_storeu<ssemodesuffix><avxsizesuffix>,

15102

+ <sse2>_loaddqu<avxsizesuffix>,

15103

+ <sse2>_storedqu<avxsizesuffix>, <sse3>_lddqu<avxsizesuffix>,

15104

+ sse_vmrcpv4sf2, sse_vmrsqrtv4sf2, sse2_cvtdq2pd, sse_movhlps,

15105

+ sse_movlhps, sse_storehps, sse_loadhps, sse_loadlps,

15106

+ *vec_interleave_highv2df, *vec_interleave_lowv2df,

15107

+ *vec_extractv2df_1_sse, sse2_loadhpd, sse2_loadlpd, sse2_movsd,

15108

+ sse4_1_<code>v8qiv8hi2, sse4_1_<code>v4qiv4si2,

15109

+ sse4_1_<code>v4hiv4si2, sse4_1_<code>v2qiv2di2,

15110

+ sse4_1_<code>v2hiv2di2, sse4_1_<code>v2siv2di2, sse4_2_pcmpestr,

15111

+ *sse4_2_pcmpestr_unaligned, sse4_2_pcmpestri, sse4_2_pcmpestrm,

15112

+ sse4_2_pcmpestr_cconly, sse4_2_pcmpistr, *sse4_2_pcmpistr_unaligned,

15113

+ sse4_2_pcmpistri, sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Add

15114

+ ssememalign attribute.

15115

+ * config/i386/i386.md (ssememalign): New define_attr.

15116

+

15117

+2013-12-03 Jakub Jelinek <jakub@redhat.com>

15118

+

15119

+ PR middle-end/59011

15120

+ * gimplify.c (nonlocal_vla_vars): New variable.

15121

+ (gimplify_var_or_parm_decl): Put VAR_DECLs for VLAs into

15122

+ nonlocal_vla_vars chain.

15123

+ (gimplify_body): Call declare_vars on nonlocal_vla_vars chain

15124

+ if outer_bind has DECL_INITIAL (current_function_decl) block.

15125

+

15126

+ PR target/58864

15127

+ * optabs.c (emit_conditional_move): Save and restore

15128

+ pending_stack_adjust and stack_pointer_delta if cmove can't be used.

15129

+

15130

+2013-12-02 Jakub Jelinek <jakub@redhat.com>

15131

+

15132

+ PR tree-optimization/59358

15133

+ * tree-vrp.c (union_ranges): To check for the partially

15134

+ overlapping ranges or adjacent ranges, also compare *vr0max

15135

+ with vr1max.

15136

+

15137

+2013-12-02 Richard Biener <rguenther@suse.de>

15138

+

15139

+ PR tree-optimization/59139

15140

+ * tree-ssa-loop-niter.c (chain_of_csts_start): Properly match

15141

+ code in get_val_for.

15142

+ (get_val_for): Use gcc_checking_asserts.

15143

+

15144

+2013-11-27 Tom de Vries <tom@codesourcery.com>

15145

+ Marc Glisse <marc.glisse@inria.fr>

15146

+

15147

+ PR middle-end/59037

15148

+ * fold-const.c (fold_indirect_ref_1): Don't create out-of-bounds

15149

+ BIT_FIELD_REF.

15150

+ * gimplify.c (gimple_fold_indirect_ref): Same.

15151

+

15152

+2013-12-01 Eric Botcazou <ebotcazou@adacore.com>

15153

+

15154

+ * config/i386/winnt.c (i386_pe_asm_named_section): Be prepared for an

15155

+ identifier node.

15156

+

15157

+2013-12-01 Bernd Edlinger <bernd.edlinger@hotmail.de>

15158

+

15159

+ * expr.c (emit_group_store): Fix off-by-one BITFIELD_END argument.

15160

+

15161

+2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

15162

+

15163

+ Backport from mainline

15164

+ 2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

15165

+

15166

+ * config/arm/iterators.md (vrint_conds): New int attribute.

15167

+ * config/arm/vfp.md (<vrint_pattern><SDF:mode>2): Set conds attribute.

15168

+ (smax<mode>3): Likewise.

15169

+ (smin<mode>3): Likewise.

15170

+

15171

+2013-11-28 Uros Bizjak <ubizjak@gmail.com>

15172

+

15173

+ Backport from mainline

15174

+ 2013-11-27 Uros Bizjak <ubizjak@gmail.com>

15175

+ Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>

15176

+

15177

+ PR target/56788

15178

+ * gcc.target/i386/xop-frczX.c: New test.

15179

+

15180

+2013-11-28 Terry Guo <terry.guo@arm.com>

15181

+

15182

+ Backport mainline r205391

15183

+ 2013-11-26 Terry Guo <terry.guo@arm.com>

15184

+

15185

+ * config/arm/arm.c (require_pic_register): Handle high pic base

15186

+ register for thumb-1.

15187

+ (arm_load_pic_register): Also initialize high pic base register.

15188

+ * doc/invoke.texi: Update documentation for option -mpic-register.

15189

+

15190

+2013-11-27 Jakub Jelinek <jakub@redhat.com>

15191

+

15192

+ Backported from mainline

15193

+ 2013-11-26 Jakub Jelinek <jakub@redhat.com>

15194

+

15195

+ PR tree-optimization/59014

15196

+ * tree-vrp.c (register_edge_assert_for_1): Don't look

15197

+ through conversions from non-integral types or through

15198

+ narrowing conversions.

15199

+

15200

+2013-11-27 Eric Botcazou <ebotcazou@adacore.com>

15201

+

15202

+ PR middle-end/59138

15203

+ * expr.c (emit_group_store): Don't write past the end of the structure.

15204

+ (store_bit_field): Fix formatting.

15205

+

15206

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

15207

+

15208

+ Backport from mainline

15209

+ 2013-09-17 Sebastian Huber <sebastian.huber@embedded-brains.de>

15210

+

15211

+ * config/sparc/t-rtems: Add leon3 multilibs.

15212

+

15213

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

15214

+

15215

+ Backport from mainline

15216

+ 2013-08-09 Eric Botcazou <ebotcazou@adacore.com>

15217

+

15218

+ * configure.ac: Add GAS check for LEON instructions on SPARC.

15219

+ * configure: Regenerate.

15220

+ * config.in: Likewise.

15221

+ * config.gcc (with_cpu): Remove sparc-leon*-* and deal with LEON in the

15222

+ sparc*-*-* block.

15223

+ * config/sparc/sparc.opt (LEON, LEON3): New masks.

15224

+ * config/sparc/sparc.h (ASM_CPU32_DEFAULT_SPEC): Set to AS_LEON_FLAG

15225

+ for LEON or LEON3.

15226

+ (ASM_CPU_SPEC): Pass AS_LEON_FLAG if -mcpu=leon or -mcpu=leon3.

15227

+ (AS_LEON_FLAG): New macro.

15228

+ * config/sparc/sparc.c (sparc_option_override): Set MASK_LEON for leon

15229

+ and MASK_LEON3 for leon3 and unset them if HAVE_AS_LEON is not defined.

15230

+ Deal with LEON and LEON3 for the memory model.

15231

+ * config/sparc/sync.md (atomic_compare_and_swap<mode>): Enable if LEON3

15232

+ (atomic_compare_and_swap<mode>_1): Likewise.

15233

+ (*atomic_compare_and_swap<mode>_1): Likewise.

15234

+

15235

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

15236

+

15237

+ Backport from mainline

15238

+ 2013-07-23 Eric Botcazou <ebotcazou@adacore.com>

15239

+

15240

+ * doc/invoke.texi (SPARC Options): Document new leon3 processor value.

15241

+

15242

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

15243

+

15244

+ Backport from mainline

15245

+ 2013-07-22 Eric Botcazou <ebotcazou@adacore.com>

15246

+

15247

+ * config.gcc (sparc*-*-*): Accept leon3 processor.

15248

+ (sparc-leon*-*): Merge with sparc*-*-* and add leon3 support.

15249

+ * doc/invoke.texi (SPARC Options): Adjust -mfix-ut699 entry.

15250

+ * config/sparc/sparc-opts.h (enum processor_type): Add PROCESSOR_LEON3.

15251

+ * config/sparc/sparc.opt (enum processor_type): Add leon3.

15252

+ (mfix-ut699): Adjust comment.

15253

+ * config/sparc/sparc.h (TARGET_CPU_leon3): New define.

15254

+ (CPP_CPU32_DEFAULT_SPEC): Add leon3 support.

15255

+ (CPP_CPU_SPEC): Likewise.

15256

+ (ASM_CPU_SPEC): Likewise.

15257

+ * config/sparc/sparc.c (leon3_cost): New constant.

15258

+ (sparc_option_override): Add leon3 support.

15259

+ (mem_ref): New function.

15260

+ (sparc_gate_work_around_errata): Return true if -mfix-ut699 is enabled.

15261

+ (sparc_do_work_around_errata): Look into the instruction in the delay

15262

+ slot and adjust accordingly. Add fix for the data cache nullify issues

15263

+ of the UT699. Change insertion position for the NOP.

15264

+ * config/sparc/leon.md (leon_fpalu, leon_fpmds, write_buf): Delete.

15265

+ (leon3_load): New reservation.

15266

+ (leon_store): Bump latency to 2.

15267

+ (grfpu): New automaton.

15268

+ (grfpu_alu): New unit.

15269

+ (grfpu_ds): Likewise.

15270

+ (leon_fp_alu): Adjust.

15271

+ (leon_fp_mult): Delete.

15272

+ (leon_fp_div): Split into leon_fp_divs and leon_fp_divd.

15273

+ (leon_fp_sqrt): Split into leon_fp_sqrts and leon_fp_sqrtd.

15274

+ * config/sparc/sparc.md (cpu): Add leon3.

15275

+ * config/sparc/sync.md (atomic_exchangesi): Disable if -mfix-ut699.

15276

+ (swapsi): Likewise.

15277

+ (atomic_test_and_set): Likewise.

15278

+ (ldstub): Likewise.

15279

+

15280

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

15281

+

15282

+ Backport from mainline

15283

+ 2013-04-10 Steven Bosscher <steven@gcc.gnu.org>

15284

+

15285

+ * config/sparc/sparc.c: Include tree-pass.h.

15286

+ (TARGET_MACHINE_DEPENDENT_REORG): Do not redefine.

15287

+ (sparc_reorg): Rename to sparc_do_work_around_errata. Move to

15288

+ head of file. Change return type. Split off gate function.

15289

+ (sparc_gate_work_around_errata): New function.

15290

+ (pass_work_around_errata): New pass definition.

15291

+ (insert_pass_work_around_errata) New pass insert definition to

15292

+ insert pass_work_around_errata just after delayed-branch scheduling.

15293

+ (sparc_option_override): Insert the pass.

15294

+ * config/sparc/t-sparc (sparc.o): Add TREE_PASS_H dependence.

15295

+

15296

+2013-11-24 Sebastian Huber <sebastian.huber@embedded-brains.de>

15297

+

15298

+ Backport from mainline

15299

+ 2013-05-28 Eric Botcazou <ebotcazou@adacore.com>

15300

+

15301

+ * doc/invoke.texi (SPARC Options): Document -mfix-ut699.

15302

+ * builtins.c (expand_builtin_mathfn) <BUILT_IN_SQRT>: Try to widen the

15303

+ mode if the instruction isn't available in the original mode.

15304

+ * config/sparc/sparc.opt (mfix-ut699): New option.

15305

+ * config/sparc/sparc.md (muldf3_extend): Disable if -mfix-ut699.

15306

+ (divdf3): Turn into expander.

15307

+ (divdf3_nofix): New insn.

15308

+ (divdf3_fix): Likewise.

15309

+ (divsf3): Disable if -mfix-ut699.

15310

+ (sqrtdf2): Turn into expander.

15311

+ (sqrtdf2_nofix): New insn.

15312

+ (sqrtdf2_fix): Likewise.

15313

+ (sqrtsf2): Disable if -mfix-ut699.

15314

+

15315

+2013-11-22 Eric Botcazou <ebotcazou@adacore.com>

15316

+

15317

+ * print-rtl.c (print_rtx) <case MEM>: Output a space if no MEM_EXPR.

15318

+

15319

+2013-11-21 Zhenqiang Chen <zhenqiang.chen@linaro.org>

15320

+

15321

+ PR bootstrap/57683

15322

+ Backport from mainline: r197467 and r198999.

15323

+ 2013-04-03 Jeff Law <law@redhat.com>

15324

+

15325

+ * Makefile.in (lra-constraints.o): Depend on $(OPTABS_H).

15326

+ (lra-eliminations.o): Likewise.

15327

+

15328

+ 2013-05-16 Jeff Law <law@redhat.com>

15329

+

15330

+ * Makefile.in (tree-switch-conversion.o): Depend on $(OPTABS_H).

15331

+

15332

+2013-11-20 Eric Botcazou <ebotcazou@adacore.com>

15333

+

15334

+ PR target/59207

15335

+ * config/sparc/sparc.c (sparc_fold_builtin) <case CODE_FOR_pdist_vis>:

15336

+ Make sure neg2_ovf is set before being used.

15337

+

15338

+2013-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

15339

+ Dominik Vogt <vogt@linux.vnet.ibm.com>

15340

+

15341

+ Backport from mainline

15342

+ * config/s390/s390.c (s390_canonicalize_comparison): Don't fold

15343

+ int comparisons with an out of range condition code.

15344

+ (s390_optimize_nonescaping_tx): Skip empty BBs.

15345

+ Generate the new tbegin RTX when removing the FPR clobbers (with

15346

+ two SETs).

15347

+ (s390_expand_tbegin): Fix the retry loop counter. Copy CC to the

15348

+ result before doing the retry calculations.

15349

+ (s390_init_builtins): Make tbegin "returns_twice" and tabort

15350

+ "noreturn".

15351

+ * config/s390/s390.md (UNSPECV_TBEGIN_TDB): New constant used for

15352

+ the TDB setting part of an tbegin.

15353

+ ("tbegin_1", "tbegin_nofloat_1"): Add a set for the TDB.

15354

+ ("tx_assist"): Set unused argument to an immediate zero instead of

15355

+ loading zero into a GPR and pass it as argument.

15356

+ * config/s390/htmxlintrin.h (__TM_simple_begin, __TM_begin):

15357

+ Remove inline and related attributes.

15358

+ (__TM_nesting_depth, __TM_is_user_abort, __TM_is_named_user_abort)

15359

+ (__TM_is_illegal, __TM_is_footprint_exceeded)

15360

+ (__TM_is_nested_too_deep, __TM_is_conflict): Fix format value

15361

+ check.

15362

+

15363

+2013-11-19 Uros Bizjak <ubizjak@gmail.com>

15364

+

15365

+ Backport from mainline

15366

+ 2013-11-18 Uros Bizjak <ubizjak@gmail.com>

15367

+

15368

+ * config/i386/i386.c (ix86_decompose_address): Use REG_P instead of

15369

+ ix86_address_subreg_operand. Move subreg checks to

15370

+ ix86_validate_address_register. Move address override check to

15371

+ ix86_legitimate_address_p.

15372

+ (ix86_validate_address_register): New function.

15373

+ (ix86_legitimate_address_p): Call ix86_validate_address_register

15374

+ to validate base and index registers. Add address override check

15375

+ from ix86_decompose_address.

15376

+ (ix86_decompose_address): Remove.

15377

+

15378

+ Backport from mainline

15379

+ 2013-11-17 Uros Bizjak <ubizjak@gmail.com>

15380

+

15381

+ PR target/59153

15382

+ * config/i386/i386.c (ix86_address_subreg_operand): Do not

15383

+ reject non-integer subregs.

15384

+ (ix86_decompose_address): Do not reject invalid CONST_INT RTXes.

15385

+ Move check for invalid x32 constant addresses ...

15386

+ (ix86_legitimate_address_p): ... here.

15387

+

15388

+2013-11-19 Richard Biener <rguenther@suse.de>

15389

+

15390

+ Backport from mainline

15391

+ 2013-11-07 Richard Biener <rguenther@suse.de>

15392

+

15393

+ * tree-dfa.c (get_ref_base_and_extent): Fix casting.

15394

+

15395

+2013-11-19 Richard Biener <rguenther@suse.de>

15396

+

15397

+ PR tree-optimization/57517

15398

+ * tree-predcom.c (combinable_refs_p): Verify the combination

15399

+ is always executed when the refs are.

15400

+

15401

+2013-11-19 Richard Biener <rguenther@suse.de>

15402

+

15403

+ Backport from mainline

15404

+ 2013-11-05 Richard Biener <rguenther@suse.de>

15405

+

15406

+ PR middle-end/58941

15407

+ * tree-dfa.c (get_ref_base_and_extent): Merge common code

15408

+ in MEM_REF and TARGET_MEM_REF handling. Make sure to

15409

+ process trailing array detection before diving into the

15410

+ view-converted object (and possibly apply some extra offset).

15411

+

15412

+2013-11-18 Richard Biener <rguenther@suse.de>

15413

+

15414

+ Backport from mainline

15415

+ 2013-10-21 Richard Biener <rguenther@suse.de>

15416

+

15417

+ PR tree-optimization/58794

15418

+ * fold-const.c (operand_equal_p): Compare FIELD_DECL operand

15419

+ of COMPONENT_REFs with OEP_CONSTANT_ADDRESS_OF left in place.

15420

+

15421

+ 2013-10-21 Richard Biener <rguenther@suse.de>

15422

+

15423

+ PR middle-end/58742

15424

+ * fold-const.c (fold_binary_loc): Fold ((T) (X /[ex] C)) * C

15425

+ to (T) X for sign-changing conversions (or no conversion).

15426

+

15427

+ 2013-11-06 Richard Biener <rguenther@suse.de>

15428

+

15429

+ PR tree-optimization/58653

15430

+ * tree-predcom.c (ref_at_iteration): Rewrite to generate

15431

+ a MEM_REF.

15432

+ (prepare_initializers_chain): Adjust.

15433

+

15434

+ PR tree-optimization/59047

15435

+ * tree-predcom.c (ref_at_iteration): Handle bitfield accesses

15436

+ properly.

15437

+

15438

+ 2013-10-15 Richard Biener <rguenther@suse.de>

15439

+

15440

+ PR tree-optimization/58143

15441

+ * tree-ssa-loop-im.c (arith_code_with_undefined_signed_overflow):

15442

+ New function.

15443

+ (rewrite_to_defined_overflow): Likewise.

15444

+ (move_computations_dom_walker::before_dom): Rewrite stmts

15445

+ with undefined signed overflow that are not always executed

15446

+ into unsigned arithmetic.

15447

+

15448

+2013-11-14 Uros Bizjak <ubizjak@gmail.com>

15449

+

15450

+ Backport from mainline

15451

+ 2013-11-10 Uros Bizjak <ubizjak@gmail.com>

15452

+

15453

+ * mode-switching.c (optimize_mode_switching): Mark block as

15454

+ nontransparent, if last_mode at block exit is different from no_mode.

15455

+

15456

+ Backport from mainline

15457

+ 2013-11-06 Uros Bizjak <ubizjak@gmail.com>

15458

+

15459

+ PR target/59021

15460

+ * config/i386/i386.c (ix86_avx_u128_mode_needed): Require

15461

+ AVX_U128_DIRTY mode for call_insn RTXes that use AVX256 registers.

15462

+ (ix86_avx_u128_mode_needed): Return AVX_U128_DIRTY mode for call_insn

15463

+ RTXes that return in AVX256 register.

15464

+

15465

+2013-11-14 Jakub Jelinek <jakub@redhat.com>

15466

+ Uros Bizjak <ubizjak@gmail.com>

15467

+

15468

+ PR target/59101

15469

+ * config/i386/i386.md (*anddi_2): Only allow CCZmode if

15470

+ operands[2] satisfies_constraint_Z that might have bit 31 set.

15471

+

15472

+2013-11-12 H.J. Lu <hongjiu.lu@intel.com>

15473

+

15474

+ Backported from mainline

15475

+ 2013-11-12 H.J. Lu <hongjiu.lu@intel.com>

15476

+

15477

+ PR target/59088

15478

+ * config/i386/i386.c (initial_ix86_tune_features): Set

15479

+ X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL and

15480

+ X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL for m_HASWELL.

15481

+

15482

+2013-11-11 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

15483

+

15484

+ Backported from mainline

15485

+ 2013-10-30 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

15486

+

15487

+ PR target/58854

15488

+ * config/arm/arm.c (arm_expand_epilogue_apcs_frame): Emit blockage

15489

+

15490

+2013-11-11 Jakub Jelinek <jakub@redhat.com>

15491

+

15492

+ Backported from mainline

15493

+ 2013-11-06 Jakub Jelinek <jakub@redhat.com>

15494

+

15495

+ PR middle-end/58970

15496

+ * expr.c (get_bit_range): Handle *offset == NULL_TREE.

15497

+ (expand_assignment): If *bitpos is negative, set *offset

15498

+ and adjust *bitpos, so that it is not negative.

15499

+

15500

+ 2013-11-05 Jakub Jelinek <jakub@redhat.com>

15501

+

15502

+ PR rtl-optimization/58997

15503

+ * loop-iv.c (iv_subreg): For IV_UNKNOWN_EXTEND, expect

15504

+ get_iv_value to be in iv->mode rather than iv->extend_mode.

15505

+ (iv_extend): Likewise. Otherwise, if iv->extend != extend,

15506

+ use lowpart_subreg on get_iv_value before calling simplify_gen_unary.

15507

+ * loop-unswitch.c (may_unswitch_on): Make sure op[i] is in the right

15508

+ mode.

15509

+

15510

+2013-11-10 Karlson2k <k2k@narod.ru>

15511

+ Kai Tietz <ktietz@redhat.com>

15512

+

15513

+ Merged from trunk

15514

+ PR plugins/52872

15515

+ * configure.ac: Adding for exported symbols check

15516

+ and for rdynamic-check executable-extension.

15517

+ * configure: Regenerated.

15518

+

15519

+2013-11-07 H.J. Lu <hongjiu.lu@intel.com>

15520

+

15521

+ PR target/59034

15522

+ * config/i386/i386.md (push peepholer/splitter): Use Pmode

15523

+ with stack_pointer_rtx.

15524

+

15525

+2013-11-05 Uros Bizjak <ubizjak@gmail.com>

15526

+

15527

+ * config/i386/t-rtems (MULTILIB_MATCHES): Fix option typos.

15528

+

15529

+2013-11-05 Jakub Jelinek <jakub@redhat.com>

15530

+

15531

+ PR tree-optimization/58984

15532

+ * ipa-prop.c (ipa_load_from_parm_agg_1): Add SIZE_P argument,

15533

+ set *SIZE_P if non-NULL on success.

15534

+ (ipa_load_from_parm_agg, ipa_analyze_indirect_call_uses): Adjust

15535

+ callers.

15536

+ (ipcp_transform_function): Likewise. Punt if size of access

15537

+ is different from TYPE_SIZE on v->value's type.

15538

+

15539

+2013-11-03 H.J. Lu <hongjiu.lu@intel.com>

15540

+

15541

+ Backport from mainline

15542

+ 2013-10-12 H.J. Lu <hongjiu.lu@intel.com>

15543

+

15544

+ PR target/58690

15545

+ * config/i386/i386.c (ix86_copy_addr_to_reg): New function.

15546

+ (ix86_expand_movmem): Replace copy_addr_to_reg with

15547

+ ix86_copy_addr_to_reg.

15548

+ (ix86_expand_setmem): Likewise.

15549

+

15550

+2013-10-29 Uros Bizjak <ubizjak@gmail.com>

15551

+

15552

+ Backport from mainline

15553

+ 2013-08-08 Richard Sandiford <rdsandiford@googlemail.com>

15554

+

15555

+ PR rtl-optimization/58079

15556

+ * combine.c (combine_simplify_rtx): Avoid using SUBST if

15557

+ simplify_comparison has widened a comparison with an integer.

15558

+

15559

+2013-10-29 Martin Jambor <mjambor@suse.cz>

15560

+

15561

+ PR middle-end/58789

15562

+ Backport from mainline

15563

+ 2013-05-09 Martin Jambor <mjambor@suse.cz>

15564

+

15565

+ PR lto/57084

15566

+ * gimple-fold.c (canonicalize_constructor_val): Call

15567

+ cgraph_get_create_real_symbol_node instead of cgraph_get_create_node.

15568

+

15569

+ Backport from mainline

15570

+ 2013-03-16 Jan Hubicka <jh@suse.cz>

15571

+

15572

+ * cgraph.h (cgraph_get_create_real_symbol_node): Declare.

15573

+ * cgraph.c (cgraph_get_create_real_symbol_node): New function.

15574

+ * cgrpahbuild.c: Use cgraph_get_create_real_symbol_node instead

15575

+ of cgraph_get_create_node.

15576

+ * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.

15577

+

15578

+2013-10-28 Tom de Vries <tom@codesourcery.com>

15579

+

15580

+ * cfgexpand.c (gimple_expand_cfg): Remove test for parm_birth_insn.

15581

+ Don't commit insertions after NOTE_INSN_FUNCTION_BEG.

15582

+

15583

+2013-10-26 Uros Bizjak <ubizjak@gmail.com>

15584

+

15585

+ Backport from mainline

15586

+ 2013-10-22 Uros Bizjak <ubizjak@gmail.com>

15587

+

15588

+ PR target/58779

15589

+ * config/i386/i386.c (put_condition_code) <case GTU, case LEU>:

15590

+ Remove CCCmode handling.

15591

+ <case LTU>: Return 'c' suffix for CCCmode.

15592

+ <case GEU>: Return 'nc' suffix for CCCmode.

15593

+ (ix86_cc_mode) <case GTU, case LEU>: Do not generate overflow checks.

15594

+ * config/i386/i386.md (*sub<mode>3_cconly_overflow): Remove.

15595

+ (*sub<mode>3_cc_overflow): Ditto.

15596

+ (*subsi3_zext_cc_overflow): Ditto.

15597

+

15598

+2013-10-26 Uros Bizjak <ubizjak@gmail.com>

15599

+

15600

+ Backport from mainline

15601

+ 2013-10-19 Uros Bizjak <ubizjak@gmail.com>

15602

+

15603

+ PR target/58792

15604

+ * config/i386/i386.c (ix86_function_value_regno): Add DX_REG,

15605

+ ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG

15606

+ and SI_REG for 64bit SYSV ABI targets.

15607

+

15608

+2013-08-25 Richard Henderson <rth@twiddle.net>

15609

+

15610

+ PR rtl/58542

15611

+ * optabs.c (maybe_emit_atomic_exchange): Use create_input_operand

15612

+ instead of create_convert_operand_to.

15613

+ (maybe_emit_sync_lock_test_and_set): Likewise.

15614

+ (expand_atomic_compare_and_swap): Likewise.

15615

+ (maybe_emit_compare_and_swap_exchange_loop): Don't convert_modes.

15616

+

15617

+2013-10-25 Eric Botcazou <ebotcazou@adacore.com>

15618

+

15619

+ PR rtl-optimization/58831

15620

+ * alias.c (init_alias_analysis): At the beginning of each iteration, set

15621

+ the reg_seen[N] bit if static_reg_base_value[N] is non-null.

15622

+

15623

+2013-10-25 Eric Botcazou <ebotcazou@adacore.com>

15624

+

15625

+ * recog.c (search_ofs): New static variable moved from...

15626

+ (peep2_find_free_register): ...here.

15627

+ (peephole2_optimize): Initialize it.

15628

+

15629

+2013-10-24 David Edelsohn <dje.gcc@gmail.com>

15630

+

15631

+ Backport from mainline

15632

+ 2013-10-23 David Edelsohn <dje.gcc@gmail.com>

15633

+

15634

+ PR target/58838

15635

+ * config/rs6000/rs6000.md (mulsi3_internal1 and splitter): Add

15636

+ TARGET_32BIT final condition.

15637

+ (mulsi3_internal2 and splitter): Same.

15638

+

15639

+2013-10-23 Tom de Vries <tom@codesourcery.com>

15640

+

15641

+ PR tree-optimization/58805

15642

+ * tree-ssa-tail-merge.c (stmt_local_def): Add gimple_vdef check.

15643

+

15644

+2013-10-23 Richard Biener <rguenther@suse.de>

15645

+

15646

+ Backport from mainline

15647

+ 2013-06-24 Richard Biener <rguenther@suse.de>

15648

+

15649

+ PR tree-optimization/57488

15650

+ * tree-ssa-pre.c (insert): Clear NEW sets before each iteration.

15651

+

15652

+2013-10-16 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>

15653

+

15654

+ Backport from mainline

15655

+ 2013-10-16 Ganesh Gopalasubramanian

15656

+ <Ganesh.Gopalasubramanian@amd.com>

15657

+

15658

+ * config/i386/i386.c (ix86_option_override_internal): Enable FMA4

15659

+ for AMD bdver3.

15660

+

15661

2013-10-16 Release Manager

15662

15663

* GCC 4.8.2 released.

15664

@@ -639,7 +6081,7 @@

15665

2013-07-31 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

15666

15667

Backport from mainline

15668

- 2013-03-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

15669

+ 2013-03-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

15670

15671

* config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Define.

15672

15673

Index: gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c

15674

===================================================================

15675

--- a/src/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c (.../tags/gcc_4_8_2_release)

15676

+++ b/src/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c (.../branches/gcc-4_8-branch)

15677

@@ -0,0 +1,11 @@

15678

+/* { dg-do compile } */

15679

+/* { dg-require-effective-target arm_thumb1_ok } */

15680

+/* { dg-options "-mthumb -fpic -msingle-pic-base" } */

15681

+

15682

+int g_test;

15683

+

15684

+int

15685

+foo (int par)

15686

+{

15687

+ g_test = par;

15688

+}

15689

Index: gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c

15690

===================================================================

15691

--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c (.../tags/gcc_4_8_2_release)

15692

+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c (.../branches/gcc-4_8-branch)

15693

@@ -0,0 +1,25 @@

15694

+/* Test the `vst1Q_laneu64' ARM Neon intrinsic. */

15695

+

15696

+/* Detect ICE in the case of unaligned memory address. */

15697

+

15698

+/* { dg-do compile } */

15699

+/* { dg-require-effective-target arm_neon_ok } */

15700

+/* { dg-add-options arm_neon } */

15701

+

15702

+#include "arm_neon.h"

15703

+

15704

+unsigned char dummy_store[1000];

15705

+

15706

+void

15707

+foo (char* addr)

15708

+{

15709

+ uint8x16_t vdata = vld1q_u8 (addr);

15710

+ vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0);

15711

+}

15712

+

15713

+uint64_t

15714

+bar (uint64x2_t vdata)

15715

+{

15716

+ vdata = vld1q_lane_u64 ((uint64_t*) &dummy_store, vdata, 0);

15717

+ return vgetq_lane_u64 (vdata, 0);

15718

+}

15719

Index: gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c

15720

===================================================================

15721

--- a/src/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c (.../tags/gcc_4_8_2_release)

15722

+++ b/src/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c (.../branches/gcc-4_8-branch)

15723

@@ -0,0 +1,11 @@

15724

+/* { dg-do compile } */

15725

+/* { dg-require-effective-target arm_thumb1_ok } */

15726

+/* { dg-options "-mthumb -fpic -mpic-register=9" } */

15727

+

15728

+int g_test;

15729

+

15730

+int

15731

+foo (int par)

15732

+{

15733

+ g_test = par;

15734

+}

15735

Index: gcc/testsuite/gcc.target/arm/require-pic-register-loc.c

15736

===================================================================

15737

--- a/src/gcc/testsuite/gcc.target/arm/require-pic-register-loc.c (.../tags/gcc_4_8_2_release)

15738

+++ b/src/gcc/testsuite/gcc.target/arm/require-pic-register-loc.c (.../branches/gcc-4_8-branch)

15739

@@ -0,0 +1,29 @@

15740

+/* { dg-do compile } */

15741

+/* { dg-options "-g -fPIC" } */

15742

+

15743

+void *v;

15744

+void a (void *x) { }

15745

+void b (void) { }

15746

+ /* line 7. */

15747

+int /* line 8. */

15748

+main (int argc) /* line 9. */

15749

+{ /* line 10. */

15750

+ if (argc == 12345) /* line 11. */

15751

+ {

15752

+ a (v);

15753

+ return 1;

15754

+ }

15755

+ b ();

15756

+

15757

+ return 0;

15758

+}

15759

+

15760

+/* { dg-final { scan-assembler-not "\.loc 1 7 0" } } */

15761

+/* { dg-final { scan-assembler-not "\.loc 1 8 0" } } */

15762

+/* { dg-final { scan-assembler-not "\.loc 1 9 0" } } */

15763

+

15764

+/* The loc at the start of the prologue. */

15765

+/* { dg-final { scan-assembler-times "\.loc 1 10 0" 1 } } */

15766

+

15767

+/* The loc at the end of the prologue, with the first user line. */

15768

+/* { dg-final { scan-assembler-times "\.loc 1 11 0" 1 } } */

15769

Index: gcc/testsuite/gcc.target/arm/vrinta-ce.c

15770

===================================================================

15771

--- a/src/gcc/testsuite/gcc.target/arm/vrinta-ce.c (.../tags/gcc_4_8_2_release)

15772

+++ b/src/gcc/testsuite/gcc.target/arm/vrinta-ce.c (.../branches/gcc-4_8-branch)

15773

@@ -0,0 +1,15 @@

15774

+/* { dg-do compile } */

15775

+/* { dg-require-effective-target arm_v8_vfp_ok } */

15776

+/* { dg-options "-O2 -marm -march=armv8-a" } */

15777

+/* { dg-add-options arm_v8_vfp } */

15778

+

15779

+double foo (double a)

15780

+{

15781

+ if (a > 3.0)

15782

+ return __builtin_round (a);

15783

+

15784

+ return 0.0;

15785

+}

15786

+

15787

+/* { dg-final { scan-assembler-times "vrinta.f64\td\[0-9\]+" 1 } } */

15788

+

15789

Index: gcc/testsuite/gcc.target/arm/pr54300.C

15790

===================================================================

15791

--- a/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../tags/gcc_4_8_2_release)

15792

+++ b/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../branches/gcc-4_8-branch)

15793

@@ -0,0 +1,61 @@

15794

+/* { dg-do run } */

15795

+/* { dg-require-effective-target arm_neon } */

15796

+/* { dg-options "-O2" } */

15797

+/* { dg-add-options arm_neon } */

15798

+

15799

+#include <arm_neon.h>

15800

+#include <stdlib.h>

15801

+

15802

+struct __attribute__ ((aligned(8))) _v16u8_ {

15803

+ uint8x16_t val;

15804

+ _v16u8_( const int16x8_t &src) { val = vreinterpretq_u8_s16(src); }

15805

+ operator int16x8_t () const { return vreinterpretq_s16_u8(val); }

15806

+};

15807

+typedef struct _v16u8_ v16u8;

15808

+

15809

+struct __attribute__ ((aligned(4))) _v8u8_ {

15810

+ uint8x8_t val;

15811

+ _v8u8_( const uint8x8_t &src) { val = src; }

15812

+ operator int16x4_t () const { return vreinterpret_s16_u8(val); }

15813

+};

15814

+typedef struct _v8u8_ v8u8;

15815

+

15816

+typedef v16u8 v8i16;

15817

+typedef int32x4_t v4i32;

15818

+typedef const short cv1i16;

15819

+typedef const unsigned char cv1u8;

15820

+typedef const v8i16 cv8i16;

15821

+

15822

+static inline __attribute__((always_inline)) v8u8 zero_64(){ return vdup_n_u8( 0 ); }

15823

+

15824

+static inline __attribute__((always_inline)) v8i16 loadlo_8i16( cv8i16* p ){

15825

+ return vcombine_s16( vld1_s16( (cv1i16 *)p ), zero_64() );

15826

+}

15827

+static inline __attribute__((always_inline)) v8i16 _loadlo_8i16( cv8i16* p, int offset ){

15828

+ return loadlo_8i16( (cv8i16*)(&((cv1u8*)p)[offset]) );

15829

+}

15830

+

15831

+void __attribute__((noinline))

15832

+test(unsigned short *_Inp, int32_t *_Out,

15833

+ unsigned int s1v, unsigned int dv0,

15834

+ unsigned int smask_v)

15835

+{

15836

+ int32x4_t c = vdupq_n_s32(0);

15837

+

15838

+ for(unsigned int sv=0 ; sv!=dv0 ; sv=(sv+s1v)&smask_v )

15839

+ {

15840

+ int32x4_t s;

15841

+ s = vmovl_s16( vget_low_s16( _loadlo_8i16( (cv8i16*) _Inp, sv ) ) );

15842

+ c = vaddq_s32( c, s );

15843

+ }

15844

+ vst1q_s32( _Out, c );

15845

+}

15846

+

15847

+main()

15848

+{

15849

+ unsigned short a[4] = {1, 2, 3, 4};

15850

+ int32_t b[4] = {0, 0, 0, 0};

15851

+ test(a, b, 1, 1, ~0);

15852

+ if (b[0] != 1 || b[1] != 2 || b[2] != 3 || b[3] != 4)

15853

+ abort();

15854

+}

15855

Index: gcc/testsuite/gcc.target/arm/pr59826.c

15856

===================================================================

15857

--- a/src/gcc/testsuite/gcc.target/arm/pr59826.c (.../tags/gcc_4_8_2_release)

15858

+++ b/src/gcc/testsuite/gcc.target/arm/pr59826.c (.../branches/gcc-4_8-branch)

15859

@@ -0,0 +1,35 @@

15860

+/* { dg-do compile } */

15861

+/* { dg-options "-mthumb -mcpu=cortex-m4 -fprefetch-loop-arrays -O2" } */

15862

+

15863

+typedef struct genxWriter_rec * genxWriter;

15864

+typedef unsigned char * utf8;

15865

+typedef const unsigned char * constUtf8;

15866

+

15867

+int genxScrubText(genxWriter w, constUtf8 in, utf8 out)

15868

+{

15869

+ int problems = 0;

15870

+ constUtf8 last = in;

15871

+

15872

+ while (*in)

15873

+ {

15874

+ int c = genxNextUnicodeChar(&in);

15875

+ if (c == -1)

15876

+ {

15877

+ problems++;

15878

+ last = in;

15879

+ continue;

15880

+ }

15881

+

15882

+ if (!isXMLChar(w, c))

15883

+ {

15884

+ problems++;

15885

+ last = in;

15886

+ continue;

15887

+ }

15888

+

15889

+ while (last < in)

15890

+ *out++ = *last++;

15891

+ }

15892

+ *out = 0;

15893

+ return problems;

15894

+}

15895

Index: gcc/testsuite/gcc.target/arm/pr57637.c

15896

===================================================================

15897

--- a/src/gcc/testsuite/gcc.target/arm/pr57637.c (.../tags/gcc_4_8_2_release)

15898

+++ b/src/gcc/testsuite/gcc.target/arm/pr57637.c (.../branches/gcc-4_8-branch)

15899

@@ -0,0 +1,206 @@

15900

+/* { dg-do run } */

15901

+/* { dg-options "-O2 -fno-inline" } */

15902

+

15903

+typedef struct _GtkCssStyleProperty GtkCssStyleProperty;

15904

+

15905

+struct _GtkCssStyleProperty

15906

+{

15907

+ int *initial_value;

15908

+ unsigned int id;

15909

+ unsigned int inherit :1;

15910

+ unsigned int animated :1;

15911

+ unsigned int affects_size :1;

15912

+ unsigned int affects_font :1;

15913

+

15914

+ int * parse_value;

15915

+ int * query_value;

15916

+ int * assign_value;

15917

+};

15918

+

15919

+void

15920

+g_assertion_message_expr (const char *domain,

15921

+ const char *file,

15922

+ int line,

15923

+ const char *func,

15924

+ const char *expr) __attribute__((__noreturn__));

15925

+

15926

+void

15927

+g_assertion_message_expr (const char *domain,

15928

+ const char *file,

15929

+ int line,

15930

+ const char *func,

15931

+ const char *expr)

15932

+{

15933

+ __builtin_abort ();

15934

+}

15935

+int

15936

+get_id (GtkCssStyleProperty *property)

15937

+{

15938

+ return 1;

15939

+}

15940

+int

15941

+_gtk_css_style_property_get_type ()

15942

+{

15943

+ return 1;

15944

+}

15945

+

15946

+GtkCssStyleProperty *

15947

+g_object_new (int object_type,

15948

+ const char *first_property_name,

15949

+ ...)

15950

+{

15951

+ return (GtkCssStyleProperty *) __builtin_malloc (sizeof (GtkCssStyleProperty));

15952

+}

15953

+

15954

+typedef enum {

15955

+ INHERIT = (1 << 0),

15956

+ ANIMATED = (1 << 1),

15957

+ RESIZE = (1 << 2),

15958

+ FONT = (1 << 3)

15959

+} GtkStylePropertyFlags;

15960

+

15961

+int t = 0;

15962

+void

15963

+gtk_css_style_property_register (const char * name,

15964

+ int expected_id,

15965

+ int value_type,

15966

+ int flags,

15967

+ int *parse_value,

15968

+ int *query_value,

15969

+ int *assign_value,

15970

+ int *initial_value)

15971

+{

15972

+ GtkCssStyleProperty *node;

15973

+

15974

+ do

15975

+ {

15976

+ if (__builtin_expect (__extension__ (

15977

+ {

15978

+ int _g_boolean_var_;

15979

+ if (initial_value != ((void *)0))

15980

+ _g_boolean_var_ = 1;

15981

+ else

15982

+ _g_boolean_var_ = 0;

15983

+ _g_boolean_var_;

15984

+ }),

15985

+ 1))

15986

+ ;

15987

+ else

15988

+ g_assertion_message_expr ("Gtk",

15989

+ "gtkcssstylepropertyimpl.c",

15990

+ 85,

15991

+ ((const char*) (__PRETTY_FUNCTION__)),

15992

+ "initial_value != NULL");

15993

+ } while (0);

15994

+

15995

+ do

15996

+ {

15997

+ if (__builtin_expect (__extension__ (

15998

+ {

15999

+ int _g_boolean_var_;

16000

+ if (parse_value != ((void *)0))

16001

+ _g_boolean_var_ = 1;

16002

+ else

16003

+ _g_boolean_var_ = 0;

16004

+ _g_boolean_var_;

16005

+ }),

16006

+ 1))

16007

+ ;

16008

+ else

16009

+ g_assertion_message_expr ("Gtk",

16010

+ "gtkcssstylepropertyimpl.c",

16011

+ 86,

16012

+ ((const char*) (__PRETTY_FUNCTION__)),

16013

+ "parse_value != NULL");

16014

+ } while (0);

16015

+

16016

+ do

16017

+ {

16018

+ if (__builtin_expect (__extension__ (

16019

+ {

16020

+ int _g_boolean_var_;

16021

+ if (value_type == ((int) ((1) << (2)))

16022

+ || query_value != ((void *)0))

16023

+ _g_boolean_var_ = 1;

16024

+ else

16025

+ _g_boolean_var_ = 0;

16026

+ _g_boolean_var_;

16027

+ }),

16028

+ 1))

16029

+ ;

16030

+ else

16031

+ g_assertion_message_expr ("Gtk",

16032

+ "gtkcssstylepropertyimpl.c",

16033

+ 87, ((const char*) (__PRETTY_FUNCTION__)),

16034

+ "value_type == NONE || query_value != NULL");

16035

+ } while (0);

16036

+

16037

+ /* FLAGS is changed in a cond_exec instruction with pr57637. */

16038

+ if (flags == 15)

16039

+ t = 15;

16040

+

16041

+ do

16042

+ {

16043

+ if (__builtin_expect (__extension__ (

16044

+ {

16045

+ int _g_boolean_var_;

16046

+ if (value_type == ((1) << (2))

16047

+ || assign_value != ((void *)0))

16048

+ _g_boolean_var_ = 1;

16049

+ else

16050

+ _g_boolean_var_ = 0;

16051

+ _g_boolean_var_;

16052

+ }),

16053

+ 1))

16054

+ ;

16055

+ else

16056

+ g_assertion_message_expr ("Gtk",

16057

+ "gtkcssstylepropertyimpl.c",

16058

+ 88, ((const char*) (__PRETTY_FUNCTION__)),

16059

+ "value_type == NONE || assign_value != NULL");

16060

+ } while (0);

16061

+

16062

+ node = g_object_new ((_gtk_css_style_property_get_type ()),

16063

+ "value-type", value_type,

16064

+ "affects-size", (flags & RESIZE) ? (0) : (!(0)),

16065

+ "affects-font", (flags & FONT) ? (!(0)) : (0),

16066

+ "animated", (flags & ANIMATED) ? (!(0)) : (0),

16067

+ "inherit", (flags & INHERIT) ? (!(0)) : (0),

16068

+ "initial-value", initial_value,

16069

+ "name", name,

16070

+ ((void *)0));

16071

+

16072

+ node->parse_value = parse_value;

16073

+ node->query_value = query_value;

16074

+ node->assign_value = assign_value;

16075

+

16076

+ do

16077

+ {

16078

+ if (__builtin_expect (__extension__ (

16079

+ {

16080

+ int _g_boolean_var_;

16081

+ if (get_id (node) == expected_id)

16082

+ _g_boolean_var_ = 1;

16083

+ else

16084

+ _g_boolean_var_ = 0;

16085

+ _g_boolean_var_;

16086

+ }),

16087

+ 1))

16088

+ ;

16089

+ else

16090

+ g_assertion_message_expr ("Gtk",

16091

+ "gtkcssstylepropertyimpl.c",

16092

+ 106,

16093

+ ((const char*) (__PRETTY_FUNCTION__)),

16094

+ "get_id (node) == expected_id");

16095

+ } while (0);

16096

+}

16097

+

16098

+int main ()

16099

+{

16100

+ gtk_css_style_property_register ("test", 1, 4, 15, &t, &t, &t, &t);

16101

+

16102

+ if (t != 15)

16103

+ __builtin_abort ();

16104

+ return 0;

16105

+}

16106

Index: gcc/testsuite/gcc.target/powerpc/ppc-target-2.c

16107

===================================================================

16108

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c (.../tags/gcc_4_8_2_release)

16109

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c (.../branches/gcc-4_8-branch)

16110

@@ -5,8 +5,7 @@

16111

/* { dg-final { scan-assembler-times "fabs" 3 } } */

16112

/* { dg-final { scan-assembler-times "fnabs" 3 } } */

16113

/* { dg-final { scan-assembler-times "fsel" 3 } } */

16114

-/* { dg-final { scan-assembler-times "fcpsgn" 3 } } */

16115

-/* { dg-final { scan-assembler-times "xscpsgndp" 1 } } */

16116

+/* { dg-final { scan-assembler-times "fcpsgn\|xscpsgndp" 4 } } */

16117

16118

/* fabs/fnabs/fsel */

16119

double normal1 (double a, double b) { return __builtin_copysign (a, b); }

16120

Index: gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c

16121

===================================================================

16122

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c (.../tags/gcc_4_8_2_release)

16123

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c (.../branches/gcc-4_8-branch)

16124

@@ -0,0 +1,88 @@

16125

+/* { dg-do compile { target { powerpc*-*-linux* } } } */

16126

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16127

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

16128

+/* { dg-require-effective-target powerpc_vsx_ok } */

16129

+/* { dg-options "-mcpu=power7 -O2" } */

16130

+/* { dg-final { scan-assembler-times "ddedpd " 4 } } */

16131

+/* { dg-final { scan-assembler-times "denbcd " 2 } } */

16132

+/* { dg-final { scan-assembler-times "dxex " 1 } } */

16133

+/* { dg-final { scan-assembler-times "diex " 1 } } */

16134

+/* { dg-final { scan-assembler-times "dscli " 2 } } */

16135

+/* { dg-final { scan-assembler-times "dscri " 2 } } */

16136

+/* { dg-final { scan-assembler-not "bl __builtin" } } */

16137

+/* { dg-final { scan-assembler-not "dctqpq" } } */

16138

+/* { dg-final { scan-assembler-not "drdpq" } } */

16139

+/* { dg-final { scan-assembler-not "stfd" } } */

16140

+/* { dg-final { scan-assembler-not "lfd" } } */

16141

+

16142

+_Decimal64

16143

+do_dedpd_0 (_Decimal64 a)

16144

+{

16145

+ return __builtin_ddedpd (0, a);

16146

+}

16147

+

16148

+_Decimal64

16149

+do_dedpd_1 (_Decimal64 a)

16150

+{

16151

+ return __builtin_ddedpd (1, a);

16152

+}

16153

+

16154

+_Decimal64

16155

+do_dedpd_2 (_Decimal64 a)

16156

+{

16157

+ return __builtin_ddedpd (2, a);

16158

+}

16159

+

16160

+_Decimal64

16161

+do_dedpd_3 (_Decimal64 a)

16162

+{

16163

+ return __builtin_ddedpd (3, a);

16164

+}

16165

+

16166

+_Decimal64

16167

+do_enbcd_0 (_Decimal64 a)

16168

+{

16169

+ return __builtin_denbcd (0, a);

16170

+}

16171

+

16172

+_Decimal64

16173

+do_enbcd_1 (_Decimal64 a)

16174

+{

16175

+ return __builtin_denbcd (1, a);

16176

+}

16177

+

16178

+_Decimal64

16179

+do_xex (_Decimal64 a)

16180

+{

16181

+ return __builtin_dxex (a);

16182

+}

16183

+

16184

+_Decimal64

16185

+do_iex (_Decimal64 a, _Decimal64 b)

16186

+{

16187

+ return __builtin_diex (a, b);

16188

+}

16189

+

16190

+_Decimal64

16191

+do_scli_1 (_Decimal64 a)

16192

+{

16193

+ return __builtin_dscli (a, 1);

16194

+}

16195

+

16196

+_Decimal64

16197

+do_scli_10 (_Decimal64 a)

16198

+{

16199

+ return __builtin_dscli (a, 10);

16200

+}

16201

+

16202

+_Decimal64

16203

+do_scri_1 (_Decimal64 a)

16204

+{

16205

+ return __builtin_dscri (a, 1);

16206

+}

16207

+

16208

+_Decimal64

16209

+do_scri_10 (_Decimal64 a)

16210

+{

16211

+ return __builtin_dscri (a, 10);

16212

+}

16213

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c

16214

===================================================================

16215

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c (.../tags/gcc_4_8_2_release)

16216

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c (.../branches/gcc-4_8-branch)

16217

@@ -0,0 +1,65 @@

16218

+/* { dg-do compile { target { powerpc*-*-* } } } */

16219

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16220

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16221

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

16222

+

16223

+#ifndef TYPE

16224

+#define TYPE long long

16225

+#endif

16226

+

16227

+#ifndef SIGN_TYPE

16228

+#define SIGN_TYPE signed TYPE

16229

+#endif

16230

+

16231

+#ifndef UNS_TYPE

16232

+#define UNS_TYPE unsigned TYPE

16233

+#endif

16234

+

16235

+typedef vector SIGN_TYPE v_sign;

16236

+typedef vector UNS_TYPE v_uns;

16237

+

16238

+v_sign sign_add (v_sign a, v_sign b)

16239

+{

16240

+ return a + b;

16241

+}

16242

+

16243

+v_sign sign_sub (v_sign a, v_sign b)

16244

+{

16245

+ return a - b;

16246

+}

16247

+

16248

+v_sign sign_shift_left (v_sign a, v_sign b)

16249

+{

16250

+ return a << b;

16251

+}

16252

+

16253

+v_sign sign_shift_right (v_sign a, v_sign b)

16254

+{

16255

+ return a >> b;

16256

+}

16257

+

16258

+v_uns uns_add (v_uns a, v_uns b)

16259

+{

16260

+ return a + b;

16261

+}

16262

+

16263

+v_uns uns_sub (v_uns a, v_uns b)

16264

+{

16265

+ return a - b;

16266

+}

16267

+

16268

+v_uns uns_shift_left (v_uns a, v_uns b)

16269

+{

16270

+ return a << b;

16271

+}

16272

+

16273

+v_uns uns_shift_right (v_uns a, v_uns b)

16274

+{

16275

+ return a >> b;

16276

+}

16277

+

16278

+/* { dg-final { scan-assembler-times "vaddudm" 2 } } */

16279

+/* { dg-final { scan-assembler-times "vsubudm" 2 } } */

16280

+/* { dg-final { scan-assembler-times "vsld" 2 } } */

16281

+/* { dg-final { scan-assembler-times "vsrad" 1 } } */

16282

+/* { dg-final { scan-assembler-times "vsrd" 1 } } */

16283

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c

16284

===================================================================

16285

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c (.../tags/gcc_4_8_2_release)

16286

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c (.../branches/gcc-4_8-branch)

16287

@@ -0,0 +1,200 @@

16288

+/* { dg-do compile { target { powerpc*-*-* } } } */

16289

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16290

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16291

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

16292

+

16293

+#ifndef SIZE

16294

+#define SIZE 1024

16295

+#endif

16296

+

16297

+#ifndef ALIGN

16298

+#define ALIGN 32

16299

+#endif

16300

+

16301

+#ifndef TYPE

16302

+#define TYPE long long

16303

+#endif

16304

+

16305

+#ifndef SIGN_TYPE

16306

+#define SIGN_TYPE signed TYPE

16307

+#endif

16308

+

16309

+#ifndef UNS_TYPE

16310

+#define UNS_TYPE unsigned TYPE

16311

+#endif

16312

+

16313

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

16314

+

16315

+SIGN_TYPE sa[SIZE] ALIGN_ATTR;

16316

+SIGN_TYPE sb[SIZE] ALIGN_ATTR;

16317

+SIGN_TYPE sc[SIZE] ALIGN_ATTR;

16318

+

16319

+UNS_TYPE ua[SIZE] ALIGN_ATTR;

16320

+UNS_TYPE ub[SIZE] ALIGN_ATTR;

16321

+UNS_TYPE uc[SIZE] ALIGN_ATTR;

16322

+

16323

+void

16324

+sign_add (void)

16325

+{

16326

+ unsigned long i;

16327

+

16328

+ for (i = 0; i < SIZE; i++)

16329

+ sa[i] = sb[i] + sc[i];

16330

+}

16331

+

16332

+void

16333

+sign_sub (void)

16334

+{

16335

+ unsigned long i;

16336

+

16337

+ for (i = 0; i < SIZE; i++)

16338

+ sa[i] = sb[i] - sc[i];

16339

+}

16340

+

16341

+void

16342

+sign_shift_left (void)

16343

+{

16344

+ unsigned long i;

16345

+

16346

+ for (i = 0; i < SIZE; i++)

16347

+ sa[i] = sb[i] << sc[i];

16348

+}

16349

+

16350

+void

16351

+sign_shift_right (void)

16352

+{

16353

+ unsigned long i;

16354

+

16355

+ for (i = 0; i < SIZE; i++)

16356

+ sa[i] = sb[i] >> sc[i];

16357

+}

16358

+

16359

+void

16360

+sign_max (void)

16361

+{

16362

+ unsigned long i;

16363

+

16364

+ for (i = 0; i < SIZE; i++)

16365

+ sa[i] = (sb[i] > sc[i]) ? sb[i] : sc[i];

16366

+}

16367

+

16368

+void

16369

+sign_min (void)

16370

+{

16371

+ unsigned long i;

16372

+

16373

+ for (i = 0; i < SIZE; i++)

16374

+ sa[i] = (sb[i] < sc[i]) ? sb[i] : sc[i];

16375

+}

16376

+

16377

+void

16378

+sign_abs (void)

16379

+{

16380

+ unsigned long i;

16381

+

16382

+ for (i = 0; i < SIZE; i++)

16383

+ sa[i] = (sb[i] < 0) ? -sb[i] : sb[i]; /* xor, vsubudm, vmaxsd. */

16384

+}

16385

+

16386

+void

16387

+sign_eq (SIGN_TYPE val1, SIGN_TYPE val2)

16388

+{

16389

+ unsigned long i;

16390

+

16391

+ for (i = 0; i < SIZE; i++)

16392

+ sa[i] = (sb[i] == sc[i]) ? val1 : val2;

16393

+}

16394

+

16395

+void

16396

+sign_lt (SIGN_TYPE val1, SIGN_TYPE val2)

16397

+{

16398

+ unsigned long i;

16399

+

16400

+ for (i = 0; i < SIZE; i++)

16401

+ sa[i] = (sb[i] < sc[i]) ? val1 : val2;

16402

+}

16403

+

16404

+void

16405

+uns_add (void)

16406

+{

16407

+ unsigned long i;

16408

+

16409

+ for (i = 0; i < SIZE; i++)

16410

+ ua[i] = ub[i] + uc[i];

16411

+}

16412

+

16413

+void

16414

+uns_sub (void)

16415

+{

16416

+ unsigned long i;

16417

+

16418

+ for (i = 0; i < SIZE; i++)

16419

+ ua[i] = ub[i] - uc[i];

16420

+}

16421

+

16422

+void

16423

+uns_shift_left (void)

16424

+{

16425

+ unsigned long i;

16426

+

16427

+ for (i = 0; i < SIZE; i++)

16428

+ ua[i] = ub[i] << uc[i];

16429

+}

16430

+

16431

+void

16432

+uns_shift_right (void)

16433

+{

16434

+ unsigned long i;

16435

+

16436

+ for (i = 0; i < SIZE; i++)

16437

+ ua[i] = ub[i] >> uc[i];

16438

+}

16439

+

16440

+void

16441

+uns_max (void)

16442

+{

16443

+ unsigned long i;

16444

+

16445

+ for (i = 0; i < SIZE; i++)

16446

+ ua[i] = (ub[i] > uc[i]) ? ub[i] : uc[i];

16447

+}

16448

+

16449

+void

16450

+uns_min (void)

16451

+{

16452

+ unsigned long i;

16453

+

16454

+ for (i = 0; i < SIZE; i++)

16455

+ ua[i] = (ub[i] < uc[i]) ? ub[i] : uc[i];

16456

+}

16457

+

16458

+void

16459

+uns_eq (UNS_TYPE val1, UNS_TYPE val2)

16460

+{

16461

+ unsigned long i;

16462

+

16463

+ for (i = 0; i < SIZE; i++)

16464

+ ua[i] = (ub[i] == uc[i]) ? val1 : val2;

16465

+}

16466

+

16467

+void

16468

+uns_lt (UNS_TYPE val1, UNS_TYPE val2)

16469

+{

16470

+ unsigned long i;

16471

+

16472

+ for (i = 0; i < SIZE; i++)

16473

+ ua[i] = (ub[i] < uc[i]) ? val1 : val2;

16474

+}

16475

+

16476

+/* { dg-final { scan-assembler-times "\[\t \]vaddudm\[\t \]" 2 } } */

16477

+/* { dg-final { scan-assembler-times "\[\t \]vsubudm\[\t \]" 3 } } */

16478

+/* { dg-final { scan-assembler-times "\[\t \]vmaxsd\[\t \]" 2 } } */

16479

+/* { dg-final { scan-assembler-times "\[\t \]vmaxud\[\t \]" 1 } } */

16480

+/* { dg-final { scan-assembler-times "\[\t \]vminsd\[\t \]" 1 } } */

16481

+/* { dg-final { scan-assembler-times "\[\t \]vminud\[\t \]" 1 } } */

16482

+/* { dg-final { scan-assembler-times "\[\t \]vsld\[\t \]" 2 } } */

16483

+/* { dg-final { scan-assembler-times "\[\t \]vsrad\[\t \]" 1 } } */

16484

+/* { dg-final { scan-assembler-times "\[\t \]vsrd\[\t \]" 1 } } */

16485

+/* { dg-final { scan-assembler-times "\[\t \]vcmpequd\[\t \]" 2 } } */

16486

+/* { dg-final { scan-assembler-times "\[\t \]vcmpgtsd\[\t \]" 1 } } */

16487

+/* { dg-final { scan-assembler-times "\[\t \]vcmpgtud\[\t \]" 1 } } */

16488

Index: gcc/testsuite/gcc.target/powerpc/pr57744.c

16489

===================================================================

16490

--- a/src/gcc/testsuite/gcc.target/powerpc/pr57744.c (.../tags/gcc_4_8_2_release)

16491

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr57744.c (.../branches/gcc-4_8-branch)

16492

@@ -0,0 +1,39 @@

16493

+/* { dg-do run { target { powerpc*-*-* && lp64 } } } */

16494

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16495

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16496

+/* { dg-options "-mcpu=power8 -O3" } */

16497

+

16498

+void abort (void);

16499

+

16500

+typedef unsigned U_16 __attribute__((mode(TI)));

16501

+

16502

+extern int libat_compare_exchange_16 (U_16 *, U_16 *, U_16, int, int)

16503

+ __attribute__((__noinline__));

16504

+

16505

+/* PR 57744: lqarx/stqcx needs even/odd register pairs. The assembler will

16506

+ complain if the compiler gets an odd/even register pair. Create a function

16507

+ which has the 16 byte compare and exchange instructions, but don't actually

16508

+ execute it, so that we can detect these failures on older machines. */

16509

+

16510

+int

16511

+libat_compare_exchange_16 (U_16 *mptr, U_16 *eptr, U_16 newval,

16512

+ int smodel, int fmodel __attribute__((unused)))

16513

+{

16514

+ if (((smodel) == 0))

16515

+ return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 0, 0);

16516

+ else if (((smodel) != 5))

16517

+ return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 4, 0);

16518

+ else

16519

+ return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 5, 0);

16520

+}

16521

+

16522

+U_16 a = 1, b = 1, c = -2;

16523

+volatile int do_test = 0;

16524

+

16525

+int main (void)

16526

+{

16527

+ if (do_test && !libat_compare_exchange_16 (&a, &b, c, 0, 0))

16528

+ abort ();

16529

+

16530

+ return 0;

16531

+}

16532

Index: gcc/testsuite/gcc.target/powerpc/recip-1.c

16533

===================================================================

16534

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-1.c (.../tags/gcc_4_8_2_release)

16535

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-1.c (.../branches/gcc-4_8-branch)

16536

@@ -3,8 +3,8 @@

16537

/* { dg-options "-O2 -mrecip -ffast-math -mcpu=power6" } */

16538

/* { dg-final { scan-assembler-times "frsqrte" 2 } } */

16539

/* { dg-final { scan-assembler-times "fmsub" 2 } } */

16540

-/* { dg-final { scan-assembler-times "fmul" 8 } } */

16541

-/* { dg-final { scan-assembler-times "fnmsub" 4 } } */

16542

+/* { dg-final { scan-assembler-times "fmul" 6 } } */

16543

+/* { dg-final { scan-assembler-times "fnmsub" 3 } } */

16544

16545

double

16546

rsqrt_d (double a)

16547

Index: gcc/testsuite/gcc.target/powerpc/darwin-longlong.c

16548

===================================================================

16549

--- a/src/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c (.../tags/gcc_4_8_2_release)

16550

+++ b/src/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c (.../branches/gcc-4_8-branch)

16551

@@ -11,7 +11,11 @@

16552

int i[2];

16553

} ud;

16554

ud.ll = in;

16555

+#ifdef __LITTLE_ENDIAN__

16556

+ return ud.i[1];

16557

+#else

16558

return ud.i[0];

16559

+#endif

16560

}

16561

16562

int main()

16563

Index: gcc/testsuite/gcc.target/powerpc/bool2-p8.c

16564

===================================================================

16565

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-p8.c (.../tags/gcc_4_8_2_release)

16566

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-p8.c (.../branches/gcc-4_8-branch)

16567

@@ -0,0 +1,32 @@

16568

+/* { dg-do compile { target { powerpc*-*-* } } } */

16569

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16570

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16571

+/* { dg-options "-O2 -mcpu=power8" } */

16572

+/* { dg-final { scan-assembler-not "\[ \t\]and " } } */

16573

+/* { dg-final { scan-assembler-not "\[ \t\]or " } } */

16574

+/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */

16575

+/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */

16576

+/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */

16577

+/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */

16578

+/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */

16579

+/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */

16580

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

16581

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

16582

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

16583

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

16584

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

16585

+/* { dg-final { scan-assembler "\[ \t\]xxland " } } */

16586

+/* { dg-final { scan-assembler "\[ \t\]xxlor " } } */

16587

+/* { dg-final { scan-assembler "\[ \t\]xxlxor " } } */

16588

+/* { dg-final { scan-assembler "\[ \t\]xxlnor " } } */

16589

+/* { dg-final { scan-assembler "\[ \t\]xxlandc " } } */

16590

+/* { dg-final { scan-assembler "\[ \t\]xxleqv " } } */

16591

+/* { dg-final { scan-assembler "\[ \t\]xxlorc " } } */

16592

+/* { dg-final { scan-assembler "\[ \t\]xxlnand " } } */

16593

+

16594

+#ifndef TYPE

16595

+typedef int v4si __attribute__ ((vector_size (16)));

16596

+#define TYPE v4si

16597

+#endif

16598

+

16599

+#include "bool2.h"

16600

Index: gcc/testsuite/gcc.target/powerpc/mmfpgpr.c

16601

===================================================================

16602

--- a/src/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c (.../tags/gcc_4_8_2_release)

16603

+++ b/src/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c (.../branches/gcc-4_8-branch)

16604

@@ -0,0 +1,22 @@

16605

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16606

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16607

+/* { dg-require-effective-target powerpc_vsx_ok } */

16608

+/* { dg-options "-O2 -mcpu=power6x -mmfpgpr" } */

16609

+/* { dg-final { scan-assembler "mffgpr" } } */

16610

+/* { dg-final { scan-assembler "mftgpr" } } */

16611

+

16612

+/* Test that we generate the instructions to move between the GPR and FPR

16613

+ registers under power6x. */

16614

+

16615

+extern long return_long (void);

16616

+extern double return_double (void);

16617

+

16618

+double return_double2 (void)

16619

+{

16620

+ return (double) return_long ();

16621

+}

16622

+

16623

+long return_long2 (void)

16624

+{

16625

+ return (long) return_double ();

16626

+}

16627

Index: gcc/testsuite/gcc.target/powerpc/pr60203.c

16628

===================================================================

16629

--- a/src/gcc/testsuite/gcc.target/powerpc/pr60203.c (.../tags/gcc_4_8_2_release)

16630

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr60203.c (.../branches/gcc-4_8-branch)

16631

@@ -0,0 +1,40 @@

16632

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16633

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16634

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16635

+/* { dg-options "-mcpu=power8 -O3" } */

16636

+

16637

+union u_ld { long double ld; double d[2]; };

16638

+

16639

+long double

16640

+pack (double a, double aa)

16641

+{

16642

+ union u_ld u;

16643

+ u.d[0] = a;

16644

+ u.d[1] = aa;

16645

+ return u.ld;

16646

+}

16647

+

16648

+double

16649

+unpack_0 (long double x)

16650

+{

16651

+ union u_ld u;

16652

+ u.ld = x;

16653

+ return u.d[0];

16654

+}

16655

+

16656

+double

16657

+unpack_1 (long double x)

16658

+{

16659

+ union u_ld u;

16660

+ u.ld = x;

16661

+ return u.d[1];

16662

+}

16663

+

16664

+/* { dg-final { scan-assembler-not "stfd" } } */

16665

+/* { dg-final { scan-assembler-not "lfd" } } */

16666

+/* { dg-final { scan-assembler-not "lxsdx" } } */

16667

+/* { dg-final { scan-assembler-not "stxsdx" } } */

16668

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

16669

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

16670

+

16671

+

16672

Index: gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c

16673

===================================================================

16674

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c (.../tags/gcc_4_8_2_release)

16675

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c (.../branches/gcc-4_8-branch)

16676

@@ -0,0 +1,14 @@

16677

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

16678

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16679

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

16680

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16681

+/* { dg-options "-mcpu=power8 -O2" } */

16682

+/* { dg-final { scan-assembler "mtvsrd" } } */

16683

+/* { dg-final { scan-assembler "mfvsrd" } } */

16684

+

16685

+/* Check code generation for direct move for vector types. */

16686

+

16687

+#define TYPE vector int

16688

+#define VSX_REG_ATTR "wa"

16689

+

16690

+#include "direct-move.h"

16691

Index: gcc/testsuite/gcc.target/powerpc/bool2-av.c

16692

===================================================================

16693

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-av.c (.../tags/gcc_4_8_2_release)

16694

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-av.c (.../branches/gcc-4_8-branch)

16695

@@ -0,0 +1,32 @@

16696

+/* { dg-do compile { target { powerpc*-*-* } } } */

16697

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16698

+/* { dg-require-effective-target powerpc_altivec_ok } */

16699

+/* { dg-options "-O2 -mcpu=power6 -maltivec" } */

16700

+/* { dg-final { scan-assembler-not "\[ \t\]and " } } */

16701

+/* { dg-final { scan-assembler-not "\[ \t\]or " } } */

16702

+/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */

16703

+/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */

16704

+/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */

16705

+/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */

16706

+/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */

16707

+/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */

16708

+/* { dg-final { scan-assembler "\[ \t\]vand " } } */

16709

+/* { dg-final { scan-assembler "\[ \t\]vandc " } } */

16710

+/* { dg-final { scan-assembler "\[ \t\]vor " } } */

16711

+/* { dg-final { scan-assembler "\[ \t\]vxor " } } */

16712

+/* { dg-final { scan-assembler "\[ \t\]vnor " } } */

16713

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

16714

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

16715

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

16716

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

16717

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

16718

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

16719

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

16720

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

16721

+

16722

+#ifndef TYPE

16723

+typedef int v4si __attribute__ ((vector_size (16)));

16724

+#define TYPE v4si

16725

+#endif

16726

+

16727

+#include "bool2.h"

16728

Index: gcc/testsuite/gcc.target/powerpc/pr43154.c

16729

===================================================================

16730

--- a/src/gcc/testsuite/gcc.target/powerpc/pr43154.c (.../tags/gcc_4_8_2_release)

16731

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr43154.c (.../branches/gcc-4_8-branch)

16732

@@ -1,5 +1,6 @@

16733

/* { dg-do compile { target { powerpc*-*-* } } } */

16734

/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16735

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

16736

/* { dg-require-effective-target powerpc_vsx_ok } */

16737

/* { dg-options "-O2 -mcpu=power7" } */

16738

16739

Index: gcc/testsuite/gcc.target/powerpc/pr59054.c

16740

===================================================================

16741

--- a/src/gcc/testsuite/gcc.target/powerpc/pr59054.c (.../tags/gcc_4_8_2_release)

16742

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr59054.c (.../branches/gcc-4_8-branch)

16743

@@ -0,0 +1,9 @@

16744

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

16745

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16746

+/* { dg-require-effective-target powerpc_vsx_ok } */

16747

+/* { dg-options "-mcpu=power7 -O0 -m64" } */

16748

+

16749

+long foo (void) { return 0; }

16750

+

16751

+/* { dg-final { scan-assembler-not "xxlor" } } */

16752

+/* { dg-final { scan-assembler-not "stfd" } } */

16753

Index: gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c

16754

===================================================================

16755

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c (.../tags/gcc_4_8_2_release)

16756

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c (.../branches/gcc-4_8-branch)

16757

@@ -0,0 +1,88 @@

16758

+/* { dg-do compile { target { powerpc*-*-linux* } } } */

16759

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16760

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

16761

+/* { dg-require-effective-target powerpc_vsx_ok } */

16762

+/* { dg-options "-mcpu=power7 -O2" } */

16763

+/* { dg-final { scan-assembler-times "ddedpdq " 4 } } */

16764

+/* { dg-final { scan-assembler-times "denbcdq " 2 } } */

16765

+/* { dg-final { scan-assembler-times "dxexq " 1 } } */

16766

+/* { dg-final { scan-assembler-times "diexq " 1 } } */

16767

+/* { dg-final { scan-assembler-times "dscliq " 2 } } */

16768

+/* { dg-final { scan-assembler-times "dscriq " 2 } } */

16769

+/* { dg-final { scan-assembler-not "bl __builtin" } } */

16770

+/* { dg-final { scan-assembler-not "dctqpq" } } */

16771

+/* { dg-final { scan-assembler-not "drdpq" } } */

16772

+/* { dg-final { scan-assembler-not "stfd" } } */

16773

+/* { dg-final { scan-assembler-not "lfd" } } */

16774

+

16775

+_Decimal128

16776

+do_dedpdq_0 (_Decimal128 a)

16777

+{

16778

+ return __builtin_ddedpdq (0, a);

16779

+}

16780

+

16781

+_Decimal128

16782

+do_dedpdq_1 (_Decimal128 a)

16783

+{

16784

+ return __builtin_ddedpdq (1, a);

16785

+}

16786

+

16787

+_Decimal128

16788

+do_dedpdq_2 (_Decimal128 a)

16789

+{

16790

+ return __builtin_ddedpdq (2, a);

16791

+}

16792

+

16793

+_Decimal128

16794

+do_dedpdq_3 (_Decimal128 a)

16795

+{

16796

+ return __builtin_ddedpdq (3, a);

16797

+}

16798

+

16799

+_Decimal128

16800

+do_enbcdq_0 (_Decimal128 a)

16801

+{

16802

+ return __builtin_denbcdq (0, a);

16803

+}

16804

+

16805

+_Decimal128

16806

+do_enbcdq_1 (_Decimal128 a)

16807

+{

16808

+ return __builtin_denbcdq (1, a);

16809

+}

16810

+

16811

+_Decimal128

16812

+do_xexq (_Decimal128 a)

16813

+{

16814

+ return __builtin_dxexq (a);

16815

+}

16816

+

16817

+_Decimal128

16818

+do_iexq (_Decimal128 a, _Decimal128 b)

16819

+{

16820

+ return __builtin_diexq (a, b);

16821

+}

16822

+

16823

+_Decimal128

16824

+do_scliq_1 (_Decimal128 a)

16825

+{

16826

+ return __builtin_dscliq (a, 1);

16827

+}

16828

+

16829

+_Decimal128

16830

+do_scliq_10 (_Decimal128 a)

16831

+{

16832

+ return __builtin_dscliq (a, 10);

16833

+}

16834

+

16835

+_Decimal128

16836

+do_scriq_1 (_Decimal128 a)

16837

+{

16838

+ return __builtin_dscriq (a, 1);

16839

+}

16840

+

16841

+_Decimal128

16842

+do_scriq_10 (_Decimal128 a)

16843

+{

16844

+ return __builtin_dscriq (a, 10);

16845

+}

16846

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c

16847

===================================================================

16848

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c (.../tags/gcc_4_8_2_release)

16849

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c (.../branches/gcc-4_8-branch)

16850

@@ -0,0 +1,204 @@

16851

+/* { dg-do compile { target { powerpc*-*-* } } } */

16852

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

16853

+/* { dg-require-effective-target powerpc_p8vector_ok } */

16854

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

16855

+

16856

+#include <altivec.h>

16857

+

16858

+typedef vector long long v_sign;

16859

+typedef vector unsigned long long v_uns;

16860

+typedef vector bool long long v_bool;

16861

+

16862

+v_sign sign_add_1 (v_sign a, v_sign b)

16863

+{

16864

+ return __builtin_altivec_vaddudm (a, b);

16865

+}

16866

+

16867

+v_sign sign_add_2 (v_sign a, v_sign b)

16868

+{

16869

+ return vec_add (a, b);

16870

+}

16871

+

16872

+v_sign sign_add_3 (v_sign a, v_sign b)

16873

+{

16874

+ return vec_vaddudm (a, b);

16875

+}

16876

+

16877

+v_sign sign_sub_1 (v_sign a, v_sign b)

16878

+{

16879

+ return __builtin_altivec_vsubudm (a, b);

16880

+}

16881

+

16882

+v_sign sign_sub_2 (v_sign a, v_sign b)

16883

+{

16884

+ return vec_sub (a, b);

16885

+}

16886

+

16887

+

16888

+v_sign sign_sub_3 (v_sign a, v_sign b)

16889

+{

16890

+ return vec_vsubudm (a, b);

16891

+}

16892

+

16893

+v_sign sign_min_1 (v_sign a, v_sign b)

16894

+{

16895

+ return __builtin_altivec_vminsd (a, b);

16896

+}

16897

+

16898

+v_sign sign_min_2 (v_sign a, v_sign b)

16899

+{

16900

+ return vec_min (a, b);

16901

+}

16902

+

16903

+v_sign sign_min_3 (v_sign a, v_sign b)

16904

+{

16905

+ return vec_vminsd (a, b);

16906

+}

16907

+

16908

+v_sign sign_max_1 (v_sign a, v_sign b)

16909

+{

16910

+ return __builtin_altivec_vmaxsd (a, b);

16911

+}

16912

+

16913

+v_sign sign_max_2 (v_sign a, v_sign b)

16914

+{

16915

+ return vec_max (a, b);

16916

+}

16917

+

16918

+v_sign sign_max_3 (v_sign a, v_sign b)

16919

+{

16920

+ return vec_vmaxsd (a, b);

16921

+}

16922

+

16923

+v_sign sign_abs (v_sign a)

16924

+{

16925

+ return vec_abs (a); /* xor, vsubudm, vmaxsd. */

16926

+}

16927

+

16928

+v_bool sign_eq (v_sign a, v_sign b)

16929

+{

16930

+ return vec_cmpeq (a, b);

16931

+}

16932

+

16933

+v_bool sign_lt (v_sign a, v_sign b)

16934

+{

16935

+ return vec_cmplt (a, b);

16936

+}

16937

+

16938

+v_uns uns_add_2 (v_uns a, v_uns b)

16939

+{

16940

+ return vec_add (a, b);

16941

+}

16942

+

16943

+v_uns uns_add_3 (v_uns a, v_uns b)

16944

+{

16945

+ return vec_vaddudm (a, b);

16946

+}

16947

+

16948

+v_uns uns_sub_2 (v_uns a, v_uns b)

16949

+{

16950

+ return vec_sub (a, b);

16951

+}

16952

+

16953

+v_uns uns_sub_3 (v_uns a, v_uns b)

16954

+{

16955

+ return vec_vsubudm (a, b);

16956

+}

16957

+

16958

+v_uns uns_min_2 (v_uns a, v_uns b)

16959

+{

16960

+ return vec_min (a, b);

16961

+}

16962

+

16963

+v_uns uns_min_3 (v_uns a, v_uns b)

16964

+{

16965

+ return vec_vminud (a, b);

16966

+}

16967

+

16968

+v_uns uns_max_2 (v_uns a, v_uns b)

16969

+{

16970

+ return vec_max (a, b);

16971

+}

16972

+

16973

+v_uns uns_max_3 (v_uns a, v_uns b)

16974

+{

16975

+ return vec_vmaxud (a, b);

16976

+}

16977

+

16978

+v_bool uns_eq (v_uns a, v_uns b)

16979

+{

16980

+ return vec_cmpeq (a, b);

16981

+}

16982

+

16983

+v_bool uns_lt (v_uns a, v_uns b)

16984

+{

16985

+ return vec_cmplt (a, b);

16986

+}

16987

+

16988

+v_sign sign_rl_1 (v_sign a, v_sign b)

16989

+{

16990

+ return __builtin_altivec_vrld (a, b);

16991

+}

16992

+

16993

+v_sign sign_rl_2 (v_sign a, v_uns b)

16994

+{

16995

+ return vec_rl (a, b);

16996

+}

16997

+

16998

+v_uns uns_rl_2 (v_uns a, v_uns b)

16999

+{

17000

+ return vec_rl (a, b);

17001

+}

17002

+

17003

+v_sign sign_sl_1 (v_sign a, v_sign b)

17004

+{

17005

+ return __builtin_altivec_vsld (a, b);

17006

+}

17007

+

17008

+v_sign sign_sl_2 (v_sign a, v_uns b)

17009

+{

17010

+ return vec_sl (a, b);

17011

+}

17012

+

17013

+v_sign sign_sl_3 (v_sign a, v_uns b)

17014

+{

17015

+ return vec_vsld (a, b);

17016

+}

17017

+

17018

+v_uns uns_sl_2 (v_uns a, v_uns b)

17019

+{

17020

+ return vec_sl (a, b);

17021

+}

17022

+

17023

+v_uns uns_sl_3 (v_uns a, v_uns b)

17024

+{

17025

+ return vec_vsld (a, b);

17026

+}

17027

+

17028

+v_sign sign_sra_1 (v_sign a, v_sign b)

17029

+{

17030

+ return __builtin_altivec_vsrad (a, b);

17031

+}

17032

+

17033

+v_sign sign_sra_2 (v_sign a, v_uns b)

17034

+{

17035

+ return vec_sra (a, b);

17036

+}

17037

+

17038

+v_sign sign_sra_3 (v_sign a, v_uns b)

17039

+{

17040

+ return vec_vsrad (a, b);

17041

+}

17042

+

17043

+/* { dg-final { scan-assembler-times "vaddudm" 5 } } */

17044

+/* { dg-final { scan-assembler-times "vsubudm" 6 } } */

17045

+/* { dg-final { scan-assembler-times "vmaxsd" 4 } } */

17046

+/* { dg-final { scan-assembler-times "vminsd" 3 } } */

17047

+/* { dg-final { scan-assembler-times "vmaxud" 2 } } */

17048

+/* { dg-final { scan-assembler-times "vminud" 2 } } */

17049

+/* { dg-final { scan-assembler-times "vcmpequd" 2 } } */

17050

+/* { dg-final { scan-assembler-times "vcmpgtsd" 1 } } */

17051

+/* { dg-final { scan-assembler-times "vcmpgtud" 1 } } */

17052

+/* { dg-final { scan-assembler-times "vrld" 3 } } */

17053

+/* { dg-final { scan-assembler-times "vsld" 5 } } */

17054

+/* { dg-final { scan-assembler-times "vsrad" 3 } } */

17055

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c

17056

===================================================================

17057

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c (.../tags/gcc_4_8_2_release)

17058

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c (.../branches/gcc-4_8-branch)

17059

@@ -0,0 +1,30 @@

17060

+/* { dg-do compile { target { powerpc*-*-* } } } */

17061

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17062

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17063

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model" } */

17064

+

17065

+#include <stddef.h>

17066

+

17067

+#ifndef SIZE

17068

+#define SIZE 1024

17069

+#endif

17070

+

17071

+#ifndef ALIGN

17072

+#define ALIGN 32

17073

+#endif

17074

+

17075

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

17076

+

17077

+long long sign_ll[SIZE] ALIGN_ATTR;

17078

+int sign_i [SIZE] ALIGN_ATTR;

17079

+

17080

+void copy_int_to_long_long (void)

17081

+{

17082

+ size_t i;

17083

+

17084

+ for (i = 0; i < SIZE; i++)

17085

+ sign_ll[i] = sign_i[i];

17086

+}

17087

+

17088

+/* { dg-final { scan-assembler "vupkhsw" } } */

17089

+/* { dg-final { scan-assembler "vupklsw" } } */

17090

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c

17091

===================================================================

17092

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c (.../tags/gcc_4_8_2_release)

17093

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c (.../branches/gcc-4_8-branch)

17094

@@ -0,0 +1,27 @@

17095

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17096

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17097

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17098

+/* { dg-options "-O3 -mcpu=power8" } */

17099

+/* { dg-final { scan-assembler "vbpermq" } } */

17100

+/* { dg-final { scan-assembler "mfvsrd" } } */

17101

+/* { dg-final { scan-assembler-not "stfd" } } */

17102

+/* { dg-final { scan-assembler-not "stxvd2x" } } */

17103

+

17104

+#include <altivec.h>

17105

+

17106

+#if __LITTLE_ENDIAN__

17107

+#define OFFSET 1

17108

+#else

17109

+#define OFFSET 0

17110

+#endif

17111

+

17112

+long foos (vector signed char a, vector signed char b)

17113

+{

17114

+ return vec_extract (vec_vbpermq (a, b), OFFSET);

17115

+}

17116

+

17117

+long foou (vector unsigned char a, vector unsigned char b)

17118

+{

17119

+ return vec_extract (vec_vbpermq (a, b), OFFSET);

17120

+}

17121

+

17122

Index: gcc/testsuite/gcc.target/powerpc/bcd-1.c

17123

===================================================================

17124

--- a/src/gcc/testsuite/gcc.target/powerpc/bcd-1.c (.../tags/gcc_4_8_2_release)

17125

+++ b/src/gcc/testsuite/gcc.target/powerpc/bcd-1.c (.../branches/gcc-4_8-branch)

17126

@@ -0,0 +1,27 @@

17127

+/* { dg-do compile { target { powerpc*-*-linux* } } } */

17128

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17129

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

17130

+/* { dg-require-effective-target powerpc_vsx_ok } */

17131

+/* { dg-options "-mcpu=power7 -O2" } */

17132

+/* { dg-final { scan-assembler-times "cdtbcd " 1 } } */

17133

+/* { dg-final { scan-assembler-times "cbcdtd " 1 } } */

17134

+/* { dg-final { scan-assembler-times "addg6s " 1 } } */

17135

+/* { dg-final { scan-assembler-not "bl __builtin" } } */

17136

+

17137

+unsigned int

17138

+to_bcd (unsigned int a)

17139

+{

17140

+ return __builtin_cdtbcd (a);

17141

+}

17142

+

17143

+unsigned int

17144

+from_bcd (unsigned int a)

17145

+{

17146

+ return __builtin_cbcdtd (a);

17147

+}

17148

+

17149

+unsigned int

17150

+bcd_arith (unsigned int a, unsigned int b)

17151

+{

17152

+ return __builtin_addg6s (a, b);

17153

+}

17154

Index: gcc/testsuite/gcc.target/powerpc/pr60735.c

17155

===================================================================

17156

--- a/src/gcc/testsuite/gcc.target/powerpc/pr60735.c (.../tags/gcc_4_8_2_release)

17157

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr60735.c (.../branches/gcc-4_8-branch)

17158

@@ -0,0 +1,11 @@

17159

+/* { dg-do compile } */

17160

+/* { dg-options "-mcpu=8548 -mspe -mabi=spe -O2" } */

17161

+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */

17162

+

17163

+/* In PR60735, the type _Decimal64 generated an insn not found message. */

17164

+

17165

+void

17166

+pr60735 (_Decimal64 *p, _Decimal64 *q)

17167

+{

17168

+ *p = *q;

17169

+}

17170

Index: gcc/testsuite/gcc.target/powerpc/extend-divide-1.c

17171

===================================================================

17172

--- a/src/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c (.../tags/gcc_4_8_2_release)

17173

+++ b/src/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c (.../branches/gcc-4_8-branch)

17174

@@ -0,0 +1,34 @@

17175

+/* { dg-do compile { target { powerpc*-*-linux* } } } */

17176

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17177

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

17178

+/* { dg-require-effective-target powerpc_vsx_ok } */

17179

+/* { dg-options "-mcpu=power7 -O2" } */

17180

+/* { dg-final { scan-assembler-times "divwe " 1 } } */

17181

+/* { dg-final { scan-assembler-times "divweo " 1 } } */

17182

+/* { dg-final { scan-assembler-times "divweu " 1 } } */

17183

+/* { dg-final { scan-assembler-times "divweuo " 1 } } */

17184

+/* { dg-final { scan-assembler-not "bl __builtin" } } */

17185

+

17186

+int

17187

+div_we (int a, int b)

17188

+{

17189

+ return __builtin_divwe (a, b);

17190

+}

17191

+

17192

+int

17193

+div_weo (int a, int b)

17194

+{

17195

+ return __builtin_divweo (a, b);

17196

+}

17197

+

17198

+unsigned int

17199

+div_weu (unsigned int a, unsigned int b)

17200

+{

17201

+ return __builtin_divweu (a, b);

17202

+}

17203

+

17204

+unsigned int

17205

+div_weuo (unsigned int a, unsigned int b)

17206

+{

17207

+ return __builtin_divweuo (a, b);

17208

+}

17209

Index: gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c

17210

===================================================================

17211

--- a/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c (.../tags/gcc_4_8_2_release)

17212

+++ b/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c (.../branches/gcc-4_8-branch)

17213

@@ -0,0 +1,23 @@

17214

+/* { dg-do compile } */

17215

+/* { dg-require-effective-target powerpc_altivec_ok } */

17216

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

17217

+/* { dg-options "-O -maltivec -mno-vsx" } */

17218

+

17219

+typedef unsigned char V __attribute__((vector_size(16)));

17220

+

17221

+V p2(V x, V y)

17222

+{

17223

+ return __builtin_shuffle(x, y,

17224

+ (V){ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 });

17225

+

17226

+}

17227

+

17228

+V p4(V x, V y)

17229

+{

17230

+ return __builtin_shuffle(x, y,

17231

+ (V){ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 });

17232

+}

17233

+

17234

+/* { dg-final { scan-assembler-not "vperm" } } */

17235

+/* { dg-final { scan-assembler "vpkuhum" } } */

17236

+/* { dg-final { scan-assembler "vpkuwum" } } */

17237

Index: gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c

17238

===================================================================

17239

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c (.../tags/gcc_4_8_2_release)

17240

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c (.../branches/gcc-4_8-branch)

17241

@@ -0,0 +1,85 @@

17242

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17243

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17244

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17245

+/* { dg-options "-mcpu=power8 -O3 -mvsx-timode" } */

17246

+

17247

+#include <altivec.h>

17248

+

17249

+#ifndef TYPE

17250

+#define TYPE vector __int128_t

17251

+#endif

17252

+

17253

+TYPE

17254

+do_addcuq (TYPE p, TYPE q)

17255

+{

17256

+ return __builtin_vec_vaddcuq (p, q);

17257

+}

17258

+

17259

+TYPE

17260

+do_adduqm (TYPE p, TYPE q)

17261

+{

17262

+ return __builtin_vec_add (p, q);

17263

+}

17264

+

17265

+TYPE

17266

+do_addeuqm (TYPE p, TYPE q, TYPE r)

17267

+{

17268

+ return __builtin_vec_vaddeuqm (p, q, r);

17269

+}

17270

+

17271

+TYPE

17272

+do_addecuq (TYPE p, TYPE q, TYPE r)

17273

+{

17274

+ return __builtin_vec_vaddecuq (p, q, r);

17275

+}

17276

+

17277

+TYPE

17278

+do_subeuqm (TYPE p, TYPE q, TYPE r)

17279

+{

17280

+ return __builtin_vec_vsubeuqm (p, q, r);

17281

+}

17282

+

17283

+TYPE

17284

+do_subecuq (TYPE p, TYPE q, TYPE r)

17285

+{

17286

+ return __builtin_vec_vsubecuq (p, q, r);

17287

+}

17288

+

17289

+TYPE

17290

+do_subcuq (TYPE p, TYPE q)

17291

+{

17292

+ return __builtin_vec_vsubcuq (p, q);

17293

+}

17294

+

17295

+TYPE

17296

+do_subuqm (TYPE p, TYPE q)

17297

+{

17298

+ return __builtin_vec_vsubuqm (p, q);

17299

+}

17300

+

17301

+TYPE

17302

+do_zero (void)

17303

+{

17304

+ return (TYPE) { 0 };

17305

+}

17306

+

17307

+TYPE

17308

+do_minus_one (void)

17309

+{

17310

+ return (TYPE) { -1 };

17311

+}

17312

+

17313

+/* { dg-final { scan-assembler "vaddcuq" } } */

17314

+/* { dg-final { scan-assembler "vadduqm" } } */

17315

+/* { dg-final { scan-assembler "vaddecuq" } } */

17316

+/* { dg-final { scan-assembler "vaddeuqm" } } */

17317

+/* { dg-final { scan-assembler "vsubecuq" } } */

17318

+/* { dg-final { scan-assembler "vsubeuqm" } } */

17319

+/* { dg-final { scan-assembler "vsubcuq" } } */

17320

+/* { dg-final { scan-assembler "vsubuqm" } } */

17321

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

17322

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

17323

+/* { dg-final { scan-assembler-not "ori 2,2,0" } } */

17324

+/* { dg-final { scan-assembler-not "xxpermdi" } } */

17325

+/* { dg-final { scan-assembler-not "stxvd2x" } } */

17326

+/* { dg-final { scan-assembler-not "stxvw4x" } } */

17327

Index: gcc/testsuite/gcc.target/powerpc/pr58673-1.c

17328

===================================================================

17329

--- a/src/gcc/testsuite/gcc.target/powerpc/pr58673-1.c (.../tags/gcc_4_8_2_release)

17330

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr58673-1.c (.../branches/gcc-4_8-branch)

17331

@@ -0,0 +1,78 @@

17332

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17333

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17334

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17335

+/* { dg-options "-mcpu=power8 -m64 -O1" } */

17336

+

17337

+enum typecode

17338

+{

17339

+ QIcode, QUcode, HIcode, HUcode, SIcode, SUcode, DIcode, DUcode, SFcode,

17340

+ DFcode, XFcode, Pcode, Tcode, LAST_AND_UNUSED_TYPECODE

17341

+};

17342

+enum bytecode_opcode

17343

+{

17344

+ neverneverland, drop, duplicate, over, setstackSI, adjstackSI, constQI,

17345

+ constHI, constSI, constDI, constSF, constDF, constXF, constP, loadQI,

17346

+ loadHI, loadSI, loadDI, loadSF, loadDF, loadXF, loadP, storeQI, storeHI,

17347

+ storeSI, storeDI, storeSF, storeDF, storeXF, storeP, storeBLK, clearBLK,

17348

+ addconstPSI, newlocalSI, localP, argP, convertQIHI, convertHISI,

17349

+ convertSIDI, convertQISI, convertQUHU, convertHUSU, convertSUDU,

17350

+ convertQUSU, convertSFDF, convertDFXF, convertHIQI, convertSIHI,

17351

+ convertDISI, convertSIQI, convertSUQU, convertDFSF, convertXFDF,

17352

+ convertSISF, convertSIDF, convertSIXF, convertSUSF, convertSUDF,

17353

+ convertSUXF, convertDISF, convertDIDF, convertDIXF, convertDUSF,

17354

+ convertDUDF, convertDUXF, convertSFSI, convertDFSI, convertXFSI,

17355

+ convertSFSU, convertDFSU, convertXFSU, convertSFDI, convertDFDI,

17356

+ convertXFDI, convertSFDU, convertDFDU, convertXFDU, convertPSI,

17357

+ convertSIP, convertSIT, convertDIT, convertSFT, convertDFT, convertXFT,

17358

+ convertPT, zxloadBI, sxloadBI, sstoreBI, addSI, addDI, addSF, addDF,

17359

+ addXF, addPSI, subSI, subDI, subSF, subDF, subXF, subPP, mulSI, mulDI,

17360

+ mulSU, mulDU, mulSF, mulDF, mulXF, divSI, divDI, divSU, divDU, divSF,

17361

+ divDF, divXF, modSI, modDI, modSU, modDU, andSI, andDI, iorSI, iorDI,

17362

+ xorSI, xorDI, lshiftSI, lshiftSU, lshiftDI, lshiftDU, rshiftSI, rshiftSU,

17363

+ rshiftDI, rshiftDU, ltSI, ltSU, ltDI, ltDU, ltSF, ltDF, ltXF, ltP, leSI,

17364

+ leSU, leDI, leDU, leSF, leDF, leXF, leP, geSI, geSU, geDI, geDU, geSF,

17365

+ geDF, geXF, geP, gtSI, gtSU, gtDI, gtDU, gtSF, gtDF, gtXF, gtP, eqSI,

17366

+ eqDI, eqSF, eqDF, eqXF, eqP, neSI, neDI, neSF, neDF, neXF, neP, negSI,

17367

+ negDI, negSF, negDF, negXF, notSI, notDI, notT, predecQI, predecHI,

17368

+ predecSI, predecDI, predecP, predecSF, predecDF, predecXF, predecBI,

17369

+ preincQI, preincHI, preincSI, preincDI, preincP, preincSF, preincDF,

17370

+ preincXF, preincBI, postdecQI, postdecHI, postdecSI, postdecDI, postdecP,

17371

+ postdecSF, postdecDF, postdecXF, postdecBI, postincQI, postincHI,

17372

+ postincSI, postincDI, postincP, postincSF, postincDF, postincXF,

17373

+ postincBI, xjumpif, xjumpifnot, jump, jumpP, caseSI, caseSU, caseDI,

17374

+ caseDU, call, returnP, ret, linenote, LAST_AND_UNUSED_OPCODE

17375

+};

17376

+struct binary_operator

17377

+{

17378

+ enum bytecode_opcode opcode;

17379

+ enum typecode arg0;

17380

+};

17381

+static struct conversion_recipe

17382

+{

17383

+ unsigned char *opcodes;

17384

+ int cost;

17385

+}

17386

+conversion_recipe[((int) LAST_AND_UNUSED_TYPECODE)][((int)

17387

+ LAST_AND_UNUSED_TYPECODE)];

17388

+static struct conversion_recipe

17389

+deduce_conversion (from, to)

17390

+ enum typecode from, to;

17391

+{

17392

+ (conversion_recipe[(int) from][(int) to].

17393

+ opcodes ? 0 : (conversion_recipe[(int) from][(int) to] =

17394

+ deduce_conversion (from, to), 0));

17395

+}

17396

+

17397

+void

17398

+bc_expand_binary_operation (optab, resulttype, arg0, arg1)

17399

+ struct binary_operator optab[];

17400

+{

17401

+ int i, besti, cost, bestcost;

17402

+ enum typecode resultcode, arg0code;

17403

+ for (i = 0; optab[i].opcode != -1; ++i)

17404

+ {

17405

+ (conversion_recipe[(int) arg0code][(int) optab[i].arg0].

17406

+ opcodes ? 0 : (conversion_recipe[(int) arg0code][(int) optab[i].arg0] =

17407

+ deduce_conversion (arg0code, optab[i].arg0), 0));

17408

+ }

17409

+}

17410

Index: gcc/testsuite/gcc.target/powerpc/no-r11-1.c

17411

===================================================================

17412

--- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-1.c (.../tags/gcc_4_8_2_release)

17413

+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-1.c (.../branches/gcc-4_8-branch)

17414

@@ -1,5 +1,6 @@

17415

/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17416

/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */

17417

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

17418

/* { dg-options "-O2 -mno-pointers-to-nested-functions" } */

17419

17420

int

17421

Index: gcc/testsuite/gcc.target/powerpc/p8vector-fp.c

17422

===================================================================

17423

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c (.../tags/gcc_4_8_2_release)

17424

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c (.../branches/gcc-4_8-branch)

17425

@@ -0,0 +1,139 @@

17426

+/* { dg-do compile { target { powerpc*-*-* } } } */

17427

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17428

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17429

+/* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf -fno-math-errno" } */

17430

+

17431

+float abs_sf (float *p)

17432

+{

17433

+ float f = *p;

17434

+ __asm__ ("# reg %x0" : "+v" (f));

17435

+ return __builtin_fabsf (f);

17436

+}

17437

+

17438

+float nabs_sf (float *p)

17439

+{

17440

+ float f = *p;

17441

+ __asm__ ("# reg %x0" : "+v" (f));

17442

+ return - __builtin_fabsf (f);

17443

+}

17444

+

17445

+float neg_sf (float *p)

17446

+{

17447

+ float f = *p;

17448

+ __asm__ ("# reg %x0" : "+v" (f));

17449

+ return - f;

17450

+}

17451

+

17452

+float add_sf (float *p, float *q)

17453

+{

17454

+ float f1 = *p;

17455

+ float f2 = *q;

17456

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

17457

+ return f1 + f2;

17458

+}

17459

+

17460

+float sub_sf (float *p, float *q)

17461

+{

17462

+ float f1 = *p;

17463

+ float f2 = *q;

17464

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

17465

+ return f1 - f2;

17466

+}

17467

+

17468

+float mul_sf (float *p, float *q)

17469

+{

17470

+ float f1 = *p;

17471

+ float f2 = *q;

17472

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

17473

+ return f1 * f2;

17474

+}

17475

+

17476

+float div_sf (float *p, float *q)

17477

+{

17478

+ float f1 = *p;

17479

+ float f2 = *q;

17480

+ __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2));

17481

+ return f1 / f2;

17482

+}

17483

+

17484

+float sqrt_sf (float *p)

17485

+{

17486

+ float f = *p;

17487

+ __asm__ ("# reg %x0" : "+v" (f));

17488

+ return __builtin_sqrtf (f);

17489

+}

17490

+

17491

+

17492

+double abs_df (double *p)

17493

+{

17494

+ double d = *p;

17495

+ __asm__ ("# reg %x0" : "+v" (d));

17496

+ return __builtin_fabs (d);

17497

+}

17498

+

17499

+double nabs_df (double *p)

17500

+{

17501

+ double d = *p;

17502

+ __asm__ ("# reg %x0" : "+v" (d));

17503

+ return - __builtin_fabs (d);

17504

+}

17505

+

17506

+double neg_df (double *p)

17507

+{

17508

+ double d = *p;

17509

+ __asm__ ("# reg %x0" : "+v" (d));

17510

+ return - d;

17511

+}

17512

+

17513

+double add_df (double *p, double *q)

17514

+{

17515

+ double d1 = *p;

17516

+ double d2 = *q;

17517

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

17518

+ return d1 + d2;

17519

+}

17520

+

17521

+double sub_df (double *p, double *q)

17522

+{

17523

+ double d1 = *p;

17524

+ double d2 = *q;

17525

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

17526

+ return d1 - d2;

17527

+}

17528

+

17529

+double mul_df (double *p, double *q)

17530

+{

17531

+ double d1 = *p;

17532

+ double d2 = *q;

17533

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

17534

+ return d1 * d2;

17535

+}

17536

+

17537

+double div_df (double *p, double *q)

17538

+{

17539

+ double d1 = *p;

17540

+ double d2 = *q;

17541

+ __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2));

17542

+ return d1 / d2;

17543

+}

17544

+

17545

+double sqrt_df (float *p)

17546

+{

17547

+ double d = *p;

17548

+ __asm__ ("# reg %x0" : "+v" (d));

17549

+ return __builtin_sqrt (d);

17550

+}

17551

+

17552

+/* { dg-final { scan-assembler "xsabsdp" } } */

17553

+/* { dg-final { scan-assembler "xsadddp" } } */

17554

+/* { dg-final { scan-assembler "xsaddsp" } } */

17555

+/* { dg-final { scan-assembler "xsdivdp" } } */

17556

+/* { dg-final { scan-assembler "xsdivsp" } } */

17557

+/* { dg-final { scan-assembler "xsmuldp" } } */

17558

+/* { dg-final { scan-assembler "xsmulsp" } } */

17559

+/* { dg-final { scan-assembler "xsnabsdp" } } */

17560

+/* { dg-final { scan-assembler "xsnegdp" } } */

17561

+/* { dg-final { scan-assembler "xssqrtdp" } } */

17562

+/* { dg-final { scan-assembler "xssqrtsp" } } */

17563

+/* { dg-final { scan-assembler "xssubdp" } } */

17564

+/* { dg-final { scan-assembler "xssubsp" } } */

17565

Index: gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c

17566

===================================================================

17567

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c (.../tags/gcc_4_8_2_release)

17568

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c (.../branches/gcc-4_8-branch)

17569

@@ -0,0 +1,13 @@

17570

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

17571

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17572

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

17573

+/* { dg-require-effective-target p8vector_hw } */

17574

+/* { dg-options "-mcpu=power8 -O2" } */

17575

+

17576

+/* Check whether we get the right bits for direct move at runtime. */

17577

+

17578

+#define TYPE vector int

17579

+#define DO_MAIN

17580

+#define VSX_REG_ATTR "wa"

17581

+

17582

+#include "direct-move.h"

17583

Index: gcc/testsuite/gcc.target/powerpc/bool3-p7.c

17584

===================================================================

17585

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3-p7.c (.../tags/gcc_4_8_2_release)

17586

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3-p7.c (.../branches/gcc-4_8-branch)

17587

@@ -0,0 +1,37 @@

17588

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

17589

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17590

+/* { dg-require-effective-target powerpc_vsx_ok } */

17591

+/* { dg-options "-O2 -mcpu=power7" } */

17592

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

17593

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

17594

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

17595

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

17596

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

17597

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

17598

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

17599

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

17600

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

17601

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

17602

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

17603

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

17604

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

17605

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

17606

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

17607

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

17608

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

17609

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

17610

+

17611

+/* On power7, for 128-bit types, ORC/ANDC/EQV might not show up, since the

17612

+ vector unit doesn't support these, so the appropriate combine patterns may

17613

+ not be generated. */

17614

+

17615

+#ifndef TYPE

17616

+#ifdef _ARCH_PPC64

17617

+#define TYPE __int128_t

17618

+#else

17619

+typedef int v4si __attribute__ ((vector_size (16)));

17620

+#define TYPE v4si

17621

+#endif

17622

+#endif

17623

+

17624

+#include "bool3.h"

17625

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c

17626

===================================================================

17627

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c (.../tags/gcc_4_8_2_release)

17628

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c (.../branches/gcc-4_8-branch)

17629

@@ -0,0 +1,104 @@

17630

+/* { dg-do compile { target { powerpc*-*-* } } } */

17631

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17632

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17633

+/* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model" } */

17634

+

17635

+#include <altivec.h>

17636

+

17637

+typedef vector long long vll_sign;

17638

+typedef vector unsigned long long vll_uns;

17639

+typedef vector bool long long vll_bool;

17640

+

17641

+typedef vector int vi_sign;

17642

+typedef vector unsigned int vi_uns;

17643

+typedef vector bool int vi_bool;

17644

+

17645

+typedef vector short vs_sign;

17646

+typedef vector unsigned short vs_uns;

17647

+typedef vector bool short vs_bool;

17648

+

17649

+typedef vector signed char vc_sign;

17650

+typedef vector unsigned char vc_uns;

17651

+typedef vector bool char vc_bool;

17652

+

17653

+

17654

+vi_sign vi_pack_1 (vll_sign a, vll_sign b)

17655

+{

17656

+ return __builtin_altivec_vpkudum (a, b);

17657

+}

17658

+

17659

+vi_sign vi_pack_2 (vll_sign a, vll_sign b)

17660

+{

17661

+ return vec_pack (a, b);

17662

+}

17663

+

17664

+vi_sign vi_pack_3 (vll_sign a, vll_sign b)

17665

+{

17666

+ return vec_vpkudum (a, b);

17667

+}

17668

+

17669

+vs_sign vs_pack_1 (vi_sign a, vi_sign b)

17670

+{

17671

+ return __builtin_altivec_vpkuwum (a, b);

17672

+}

17673

+

17674

+vs_sign vs_pack_2 (vi_sign a, vi_sign b)

17675

+{

17676

+ return vec_pack (a, b);

17677

+}

17678

+

17679

+vs_sign vs_pack_3 (vi_sign a, vi_sign b)

17680

+{

17681

+ return vec_vpkuwum (a, b);

17682

+}

17683

+

17684

+vc_sign vc_pack_1 (vs_sign a, vs_sign b)

17685

+{

17686

+ return __builtin_altivec_vpkuhum (a, b);

17687

+}

17688

+

17689

+vc_sign vc_pack_2 (vs_sign a, vs_sign b)

17690

+{

17691

+ return vec_pack (a, b);

17692

+}

17693

+

17694

+vc_sign vc_pack_3 (vs_sign a, vs_sign b)

17695

+{

17696

+ return vec_vpkuhum (a, b);

17697

+}

17698

+

17699

+vll_sign vll_unpack_hi_1 (vi_sign a)

17700

+{

17701

+ return __builtin_altivec_vupkhsw (a);

17702

+}

17703

+

17704

+vll_sign vll_unpack_hi_2 (vi_sign a)

17705

+{

17706

+ return vec_unpackh (a);

17707

+}

17708

+

17709

+vll_sign vll_unpack_hi_3 (vi_sign a)

17710

+{

17711

+ return __builtin_vec_vupkhsw (a);

17712

+}

17713

+

17714

+vll_sign vll_unpack_lo_1 (vi_sign a)

17715

+{

17716

+ return vec_vupklsw (a);

17717

+}

17718

+

17719

+vll_sign vll_unpack_lo_2 (vi_sign a)

17720

+{

17721

+ return vec_unpackl (a);

17722

+}

17723

+

17724

+vll_sign vll_unpack_lo_3 (vi_sign a)

17725

+{

17726

+ return vec_vupklsw (a);

17727

+}

17728

+

17729

+/* { dg-final { scan-assembler-times "vpkudum" 3 } } */

17730

+/* { dg-final { scan-assembler-times "vpkuwum" 3 } } */

17731

+/* { dg-final { scan-assembler-times "vpkuhum" 3 } } */

17732

+/* { dg-final { scan-assembler-times "vupklsw" 3 } } */

17733

+/* { dg-final { scan-assembler-times "vupkhsw" 3 } } */

17734

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c

17735

===================================================================

17736

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c (.../tags/gcc_4_8_2_release)

17737

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c (.../branches/gcc-4_8-branch)

17738

@@ -0,0 +1,29 @@

17739

+/* { dg-do compile { target { powerpc*-*-* } } } */

17740

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17741

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17742

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model" } */

17743

+

17744

+#include <stddef.h>

17745

+

17746

+#ifndef SIZE

17747

+#define SIZE 1024

17748

+#endif

17749

+

17750

+#ifndef ALIGN

17751

+#define ALIGN 32

17752

+#endif

17753

+

17754

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

17755

+

17756

+long long sign_ll[SIZE] ALIGN_ATTR;

17757

+int sign_i [SIZE] ALIGN_ATTR;

17758

+

17759

+void copy_long_long_to_int (void)

17760

+{

17761

+ size_t i;

17762

+

17763

+ for (i = 0; i < SIZE; i++)

17764

+ sign_i[i] = sign_ll[i];

17765

+}

17766

+

17767

+/* { dg-final { scan-assembler "vpkudum" } } */

17768

Index: gcc/testsuite/gcc.target/powerpc/direct-move.h

17769

===================================================================

17770

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move.h (.../tags/gcc_4_8_2_release)

17771

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move.h (.../branches/gcc-4_8-branch)

17772

@@ -0,0 +1,188 @@

17773

+/* Test functions for direct move support. */

17774

+

17775

+#include <math.h>

17776

+extern void abort (void);

17777

+

17778

+#ifndef VSX_REG_ATTR

17779

+#define VSX_REG_ATTR "wa"

17780

+#endif

17781

+

17782

+void __attribute__((__noinline__))

17783

+copy (TYPE *a, TYPE *b)

17784

+{

17785

+ *b = *a;

17786

+}

17787

+

17788

+#ifndef NO_GPR

17789

+void __attribute__((__noinline__))

17790

+load_gpr (TYPE *a, TYPE *b)

17791

+{

17792

+ TYPE c = *a;

17793

+ __asm__ ("# gpr, reg = %0" : "+b" (c));

17794

+ *b = c;

17795

+}

17796

+#endif

17797

+

17798

+#ifndef NO_FPR

17799

+void __attribute__((__noinline__))

17800

+load_fpr (TYPE *a, TYPE *b)

17801

+{

17802

+ TYPE c = *a;

17803

+ __asm__ ("# fpr, reg = %0" : "+d" (c));

17804

+ *b = c;

17805

+}

17806

+#endif

17807

+

17808

+#ifndef NO_ALTIVEC

17809

+void __attribute__((__noinline__))

17810

+load_altivec (TYPE *a, TYPE *b)

17811

+{

17812

+ TYPE c = *a;

17813

+ __asm__ ("# altivec, reg = %0" : "+v" (c));

17814

+ *b = c;

17815

+}

17816

+#endif

17817

+

17818

+#ifndef NO_VSX

17819

+void __attribute__((__noinline__))

17820

+load_vsx (TYPE *a, TYPE *b)

17821

+{

17822

+ TYPE c = *a;

17823

+ __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (c));

17824

+ *b = c;

17825

+}

17826

+#endif

17827

+

17828

+#ifndef NO_GPR_TO_VSX

17829

+void __attribute__((__noinline__))

17830

+load_gpr_to_vsx (TYPE *a, TYPE *b)

17831

+{

17832

+ TYPE c = *a;

17833

+ TYPE d;

17834

+ __asm__ ("# gpr, reg = %0" : "+b" (c));

17835

+ d = c;

17836

+ __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (d));

17837

+ *b = d;

17838

+}

17839

+#endif

17840

+

17841

+#ifndef NO_VSX_TO_GPR

17842

+void __attribute__((__noinline__))

17843

+load_vsx_to_gpr (TYPE *a, TYPE *b)

17844

+{

17845

+ TYPE c = *a;

17846

+ TYPE d;

17847

+ __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (c));

17848

+ d = c;

17849

+ __asm__ ("# gpr, reg = %0" : "+b" (d));

17850

+ *b = d;

17851

+}

17852

+#endif

17853

+

17854

+#ifdef DO_MAIN

17855

+typedef void (fn_type (TYPE *, TYPE *));

17856

+

17857

+struct test_struct {

17858

+ fn_type *func;

17859

+ const char *name;

17860

+};

17861

+

17862

+const struct test_struct test_functions[] = {

17863

+ { copy, "copy" },

17864

+#ifndef NO_GPR

17865

+ { load_gpr, "load_gpr" },

17866

+#endif

17867

+#ifndef NO_FPR

17868

+ { load_fpr, "load_fpr" },

17869

+#endif

17870

+#ifndef NO_ALTIVEC

17871

+ { load_altivec, "load_altivec" },

17872

+#endif

17873

+#ifndef NO_VSX

17874

+ { load_vsx, "load_vsx" },

17875

+#endif

17876

+#ifndef NO_GPR_TO_VSX

17877

+ { load_gpr_to_vsx, "load_gpr_to_vsx" },

17878

+#endif

17879

+#ifndef NO_VSX_TO_GPR

17880

+ { load_vsx_to_gpr, "load_vsx_to_gpr" },

17881

+#endif

17882

+};

17883

+

17884

+/* Test a given value for each of the functions. */

17885

+void __attribute__((__noinline__))

17886

+test_value (TYPE a)

17887

+{

17888

+ long i;

17889

+

17890

+ for (i = 0; i < sizeof (test_functions) / sizeof (test_functions[0]); i++)

17891

+ {

17892

+ TYPE b;

17893

+

17894

+ test_functions[i].func (&a, &b);

17895

+ if (memcmp ((void *)&a, (void *)&b, sizeof (TYPE)) != 0)

17896

+ abort ();

17897

+ }

17898

+}

17899

+

17900

+/* Main program. */

17901

+int

17902

+main (void)

17903

+{

17904

+ long i,j;

17905

+ union {

17906

+ TYPE value;

17907

+ unsigned char bytes[sizeof (TYPE)];

17908

+ } u;

17909

+

17910

+#if IS_INT

17911

+ TYPE value = (TYPE)-5;

17912

+ for (i = 0; i < 12; i++)

17913

+ {

17914

+ test_value (value);

17915

+ value++;

17916

+ }

17917

+

17918

+ for (i = 0; i < 8*sizeof (TYPE); i++)

17919

+ test_value (((TYPE)1) << i);

17920

+

17921

+#elif IS_UNS

17922

+ TYPE value = (TYPE)0;

17923

+ for (i = 0; i < 10; i++)

17924

+ {

17925

+ test_value (value);

17926

+ test_value (~ value);

17927

+ value++;

17928

+ }

17929

+

17930

+ for (i = 0; i < 8*sizeof (TYPE); i++)

17931

+ test_value (((TYPE)1) << i);

17932

+

17933

+#elif IS_FLOAT

17934

+ TYPE value = (TYPE)-5;

17935

+ for (i = 0; i < 12; i++)

17936

+ {

17937

+ test_value (value);

17938

+ value++;

17939

+ }

17940

+

17941

+ test_value ((TYPE)3.1415926535);

17942

+ test_value ((TYPE)1.23456);

17943

+ test_value ((TYPE)(-0.0));

17944

+ test_value ((TYPE)NAN);

17945

+ test_value ((TYPE)+INFINITY);

17946

+ test_value ((TYPE)-INFINITY);

17947

+#else

17948

+

17949

+ for (j = 0; j < 10; j++)

17950

+ {

17951

+ for (i = 0; i < sizeof (TYPE); i++)

17952

+ u.bytes[i] = (unsigned char) (random () >> 4);

17953

+

17954

+ test_value (u.value);

17955

+ }

17956

+#endif

17957

+

17958

+ return 0;

17959

+}

17960

+#endif

17961

Index: gcc/testsuite/gcc.target/powerpc/sd-vsx.c

17962

===================================================================

17963

--- a/src/gcc/testsuite/gcc.target/powerpc/sd-vsx.c (.../tags/gcc_4_8_2_release)

17964

+++ b/src/gcc/testsuite/gcc.target/powerpc/sd-vsx.c (.../branches/gcc-4_8-branch)

17965

@@ -0,0 +1,20 @@

17966

+/* { dg-do compile { target { powerpc*-*-* } } } */

17967

+/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */

17968

+/* { dg-require-effective-target powerpc_vsx_ok } */

17969

+/* { dg-options "-O2 -mcpu=power7 -mhard-dfp" } */

17970

+/* { dg-final { scan-assembler-times "lfiwzx" 2 } } */

17971

+/* { dg-final { scan-assembler-times "stfiwx" 1 } } */

17972

+/* { dg-final { scan-assembler-not "lfd" } } */

17973

+/* { dg-final { scan-assembler-not "stfd" } } */

17974

+/* { dg-final { scan-assembler-times "dctdp" 2 } } */

17975

+/* { dg-final { scan-assembler-times "dadd" 1 } } */

17976

+/* { dg-final { scan-assembler-times "drsp" 1 } } */

17977

+

17978

+/* Test that power7 can directly load/store SDmode variables without using a

17979

+ bounce buffer. */

17980

+_Decimal32 a;

17981

+

17982

+void inc_dec32 (void)

17983

+{

17984

+ a += (_Decimal32) 1.0;

17985

+}

17986

Index: gcc/testsuite/gcc.target/powerpc/bcd-2.c

17987

===================================================================

17988

--- a/src/gcc/testsuite/gcc.target/powerpc/bcd-2.c (.../tags/gcc_4_8_2_release)

17989

+++ b/src/gcc/testsuite/gcc.target/powerpc/bcd-2.c (.../branches/gcc-4_8-branch)

17990

@@ -0,0 +1,44 @@

17991

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

17992

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

17993

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

17994

+/* { dg-require-effective-target powerpc_p8vector_ok } */

17995

+/* { dg-options "-mcpu=power8 -O2" } */

17996

+/* { dg-final { scan-assembler-times "bcdadd\[.\] " 2 } } */

17997

+/* { dg-final { scan-assembler-times "bcdsub\[.\] " 2 } } */

17998

+/* { dg-final { scan-assembler-not "bl __builtin" } } */

17999

+/* { dg-final { scan-assembler-not "mtvsr" } } */

18000

+/* { dg-final { scan-assembler-not "mfvsr" } } */

18001

+/* { dg-final { scan-assembler-not "lvx" } } */

18002

+/* { dg-final { scan-assembler-not "lxvw4x" } } */

18003

+/* { dg-final { scan-assembler-not "lxvd2x" } } */

18004

+/* { dg-final { scan-assembler-not "stvx" } } */

18005

+/* { dg-final { scan-assembler-not "stxvw4x" } } */

18006

+/* { dg-final { scan-assembler-not "stxvd2x" } } */

18007

+

18008

+typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t;

18009

+typedef __int128_t scalar_128_t;

18010

+typedef unsigned long long scalar_64_t;

18011

+

18012

+vector_128_t

18013

+do_add_0 (vector_128_t a, vector_128_t b)

18014

+{

18015

+ return __builtin_bcdadd (a, b, 0);

18016

+}

18017

+

18018

+vector_128_t

18019

+do_add_1 (vector_128_t a, vector_128_t b)

18020

+{

18021

+ return __builtin_bcdadd (a, b, 1);

18022

+}

18023

+

18024

+vector_128_t

18025

+do_sub_0 (vector_128_t a, vector_128_t b)

18026

+{

18027

+ return __builtin_bcdsub (a, b, 0);

18028

+}

18029

+

18030

+vector_128_t

18031

+do_sub_1 (vector_128_t a, vector_128_t b)

18032

+{

18033

+ return __builtin_bcdsub (a, b, 1);

18034

+}

18035

Index: gcc/testsuite/gcc.target/powerpc/extend-divide-2.c

18036

===================================================================

18037

--- a/src/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c (.../tags/gcc_4_8_2_release)

18038

+++ b/src/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c (.../branches/gcc-4_8-branch)

18039

@@ -0,0 +1,34 @@

18040

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

18041

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18042

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

18043

+/* { dg-require-effective-target powerpc_vsx_ok } */

18044

+/* { dg-options "-mcpu=power7 -O2" } */

18045

+/* { dg-final { scan-assembler-times "divde " 1 } } */

18046

+/* { dg-final { scan-assembler-times "divdeo " 1 } } */

18047

+/* { dg-final { scan-assembler-times "divdeu " 1 } } */

18048

+/* { dg-final { scan-assembler-times "divdeuo " 1 } } */

18049

+/* { dg-final { scan-assembler-not "bl __builtin" } } */

18050

+

18051

+long

18052

+div_de (long a, long b)

18053

+{

18054

+ return __builtin_divde (a, b);

18055

+}

18056

+

18057

+long

18058

+div_deo (long a, long b)

18059

+{

18060

+ return __builtin_divdeo (a, b);

18061

+}

18062

+

18063

+unsigned long

18064

+div_deu (unsigned long a, unsigned long b)

18065

+{

18066

+ return __builtin_divdeu (a, b);

18067

+}

18068

+

18069

+unsigned long

18070

+div_deuo (unsigned long a, unsigned long b)

18071

+{

18072

+ return __builtin_divdeuo (a, b);

18073

+}

18074

Index: gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c

18075

===================================================================

18076

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c (.../tags/gcc_4_8_2_release)

18077

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c (.../branches/gcc-4_8-branch)

18078

@@ -0,0 +1,177 @@

18079

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

18080

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18081

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

18082

+/* { dg-require-effective-target p8vector_hw } */

18083

+/* { dg-options "-mcpu=power8 -O2" } */

18084

+

18085

+#include <stddef.h>

18086

+#include <stdlib.h>

18087

+#include <altivec.h>

18088

+

18089

+#ifdef DEBUG

18090

+#include <stdio.h>

18091

+#define UNUSED

18092

+

18093

+#ifdef __LITTLE_ENDIAN__

18094

+#define HI_WORD 1

18095

+#define LO_WORD 0

18096

+#else

18097

+#define HI_WORD 0

18098

+#define LO_WORD 1

18099

+#endif

18100

+

18101

+#else

18102

+#define UNUSED __attribute__((__unused__))

18103

+#endif

18104

+

18105

+#ifndef S_TYPE

18106

+#define S_TYPE __uint128_t

18107

+#endif

18108

+

18109

+#ifndef V_TYPE

18110

+#define V_TYPE vector S_TYPE

18111

+#endif

18112

+

18113

+static int compare (S_TYPE, V_TYPE, const char *, const char *)

18114

+ __attribute__((__noinline__));

18115

+

18116

+static int

18117

+compare (S_TYPE scalar,

18118

+ V_TYPE vect,

18119

+ const char *nl UNUSED,

18120

+ const char *which UNUSED)

18121

+{

18122

+ unsigned long scalar_lo = (unsigned long) scalar;

18123

+ unsigned long scalar_hi = (unsigned long) (scalar >> 64);

18124

+ unsigned long vect_lo;

18125

+ unsigned long vect_hi;

18126

+ vector long long tmp;

18127

+ int ret;

18128

+

18129

+ __asm__ ("mfvsrd %0,%x3\n\t"

18130

+ "xxpermdi %x2,%x3,%x3,3\n\t"

18131

+ "mfvsrd %1,%x2"

18132

+ : "=r" (vect_hi),

18133

+ "=r" (vect_lo),

18134

+ "=wa" (tmp)

18135

+ : "wa" (vect));

18136

+

18137

+ ret = (scalar_lo != vect_lo) || (scalar_hi != vect_hi);

18138

+

18139

+#ifdef DEBUG

18140

+ printf ("%s%s: 0x%.16lx %.16lx %s 0x%.16lx %.16lx\n",

18141

+ nl, which,

18142

+ scalar_hi, scalar_lo,

18143

+ (ret) ? "!=" : "==",

18144

+ vect_hi, vect_lo);

18145

+

18146

+ fflush (stdout);

18147

+#endif

18148

+

18149

+ return ret;

18150

+}

18151

+

18152

+static void convert_via_mem (V_TYPE *, S_TYPE *)

18153

+ __attribute__((__noinline__));

18154

+

18155

+static void

18156

+convert_via_mem (V_TYPE *v, S_TYPE *s)

18157

+{

18158

+ *v = (V_TYPE) { *s };

18159

+ __asm__ volatile ("nop"

18160

+ : "+m" (*s), "+m" (*v)

18161

+ :

18162

+ : "memory");

18163

+

18164

+}

18165

+

18166

+

18167

+/* Check if vadduqm returns the same values as normal 128-bit add. */

18168

+

18169

+/* Values to add together. */

18170

+const static struct {

18171

+ unsigned long hi_1;

18172

+ unsigned long lo_1;

18173

+ unsigned long hi_2;

18174

+ unsigned long lo_2;

18175

+} values[] = {

18176

+ { 0x0000000000000000UL, 0xfffffffffffffffeUL,

18177

+ 0x0000000000000000UL, 0x0000000000000002UL },

18178

+ { 0x0000000000000000UL, 0x0000000000000002UL,

18179

+ 0x0000000000000000UL, 0xfffffffffffffffeUL },

18180

+ { 0xffffffffffffffffUL, 0xfffffffffffffffeUL,

18181

+ 0x0000000000000000UL, 0x0000000000000002UL },

18182

+ { 0xfffffffffffffff2UL, 0xffffffffffffffffUL,

18183

+ 0x0000000000000002UL, 0x0000000000000000UL },

18184

+ { 0x7fffffffffffffffUL, 0xfffffffffffffffeUL,

18185

+ 0x0000000000000000UL, 0x0000000000000002UL },

18186

+ { 0x7ffffffffffffff2UL, 0xffffffffffffffffUL,

18187

+ 0x0000000000000002UL, 0x0000000000000000UL },

18188

+};

18189

+

18190

+int

18191

+main (void)

18192

+{

18193

+ int reg_errors = 0;

18194

+ int mem_errors = 0;

18195

+ size_t i;

18196

+ const char *nl = "";

18197

+

18198

+ for (i = 0; i < sizeof (values) / sizeof (values[0]); i++)

18199

+ {

18200

+ S_TYPE s_reg_res, s_reg_in1, s_reg_in2, s_mem_res, s_mem_in1, s_mem_in2;

18201

+ V_TYPE v_reg_res, v_reg_in1, v_reg_in2, v_mem_res, v_mem_in1, v_mem_in2;

18202

+

18203

+ s_reg_in1 = ((((S_TYPE)values[i].hi_1 << 64)) + ((S_TYPE)values[i].lo_1));

18204

+ reg_errors += compare (s_reg_in1, (V_TYPE) { s_reg_in1 }, nl, "reg, in1");

18205

+

18206

+ s_reg_in2 = ((((S_TYPE)values[i].hi_2 << 64)) + ((S_TYPE)values[i].lo_2));

18207

+ reg_errors += compare (s_reg_in2, (V_TYPE) { s_reg_in2 }, "", "reg, in2");

18208

+

18209

+ s_reg_res = s_reg_in1 + s_reg_in2;

18210

+

18211

+ v_reg_in1 = (V_TYPE) { s_reg_in1 };

18212

+ v_reg_in2 = (V_TYPE) { s_reg_in2 };

18213

+ v_reg_res = vec_vadduqm (v_reg_in1, v_reg_in2);

18214

+ reg_errors += compare (s_reg_res, v_reg_res, "", "reg, res");

18215

+

18216

+ s_mem_in1 = s_reg_in1;

18217

+ convert_via_mem (&v_mem_in1, &s_mem_in1);

18218

+ mem_errors += compare (s_mem_in1, (V_TYPE) { s_mem_in1 }, "\n", "mem, in1");

18219

+

18220

+ s_mem_in2 = s_reg_in2;

18221

+ convert_via_mem (&v_mem_in2, &s_mem_in2);

18222

+ mem_errors += compare (s_mem_in2, (V_TYPE) { s_mem_in2 }, "", "mem, in2");

18223

+

18224

+ s_mem_res = s_mem_in1 + s_mem_in2;

18225

+ v_mem_res = vec_vadduqm (v_mem_in1, v_mem_in2);

18226

+ mem_errors += compare (s_mem_res, v_mem_res, "", "mem, res");

18227

+

18228

+ nl = "\n";

18229

+ }

18230

+

18231

+#ifdef DEBUG

18232

+ putchar ('\n');

18233

+

18234

+ if (!reg_errors)

18235

+ fputs ("no errors found on register operations\n", stdout);

18236

+ else

18237

+ printf ("%d error%s found on register operations\n",

18238

+ reg_errors,

18239

+ (reg_errors == 1) ? "s" : "");

18240

+

18241

+ if (!mem_errors)

18242

+ fputs ("no errors found on memory operations\n", stdout);

18243

+ else

18244

+ printf ("%d error%s found on memory operations\n",

18245

+ mem_errors,

18246

+ (mem_errors == 1) ? "s" : "");

18247

+

18248

+ fflush (stdout);

18249

+#endif

18250

+

18251

+ if ((reg_errors + mem_errors) != 0)

18252

+ abort ();

18253

+

18254

+ return 0;

18255

+}

18256

Index: gcc/testsuite/gcc.target/powerpc/pr58673-2.c

18257

===================================================================

18258

--- a/src/gcc/testsuite/gcc.target/powerpc/pr58673-2.c (.../tags/gcc_4_8_2_release)

18259

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr58673-2.c (.../branches/gcc-4_8-branch)

18260

@@ -0,0 +1,217 @@

18261

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

18262

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18263

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18264

+/* { dg-options "-mcpu=power8 -O3 -m64 -funroll-loops" } */

18265

+

18266

+#include <stddef.h>

18267

+#include <stdlib.h>

18268

+#include <math.h>

18269

+#include <string.h>

18270

+

18271

+typedef long unsigned int size_t;

18272

+typedef struct _IO_FILE FILE;

18273

+typedef float real;

18274

+typedef real rvec[3];

18275

+typedef real matrix[3][3];

18276

+typedef real tensor[3][3];

18277

+enum

18278

+{

18279

+ F_BONDS, F_G96BONDS, F_MORSE, F_CUBICBONDS, F_CONNBONDS, F_HARMONIC,

18280

+ F_ANGLES, F_G96ANGLES, F_PDIHS, F_RBDIHS, F_IDIHS, F_LJ14, F_COUL14, F_LJ,

18281

+ F_BHAM, F_LJLR, F_DISPCORR, F_SR, F_LR, F_WPOL, F_POSRES, F_DISRES,

18282

+ F_DISRESVIOL, F_ORIRES, F_ORIRESDEV, F_ANGRES, F_ANGRESZ, F_SHAKE,

18283

+ F_SHAKENC, F_SETTLE, F_DUMMY2, F_DUMMY3, F_DUMMY3FD, F_DUMMY3FAD,

18284

+ F_DUMMY3OUT, F_DUMMY4FD, F_EQM, F_EPOT, F_EKIN, F_ETOT, F_TEMP, F_PRES,

18285

+ F_DVDL, F_DVDLKIN, F_NRE

18286

+};

18287

+typedef union

18288

+{

18289

+ struct

18290

+ {

18291

+ }

18292

+ bham;

18293

+ struct

18294

+ {

18295

+ real rA, krA, rB, krB;

18296

+ }

18297

+ harmonic;

18298

+}

18299

+t_iparams;

18300

+typedef struct

18301

+{

18302

+ t_iparams *iparams;

18303

+}

18304

+t_idef;

18305

+typedef struct

18306

+{

18307

+}

18308

+t_inputrec;

18309

+typedef struct

18310

+{

18311

+}

18312

+t_commrec;

18313

+typedef struct

18314

+{

18315

+}

18316

+t_forcerec;

18317

+typedef struct

18318

+{

18319

+}

18320

+t_mdatoms;

18321

+typedef struct

18322

+{

18323

+}

18324

+t_filenm;

18325

+enum

18326

+{

18327

+ eoPres, eoEpot, eoVir, eoDist, eoMu, eoForce, eoFx, eoFy, eoFz, eoPx, eoPy,

18328

+ eoPz, eoPolarizability, eoDipole, eoObsNR, eoMemory =

18329

+ eoObsNR, eoInter, eoUseVirial, eoNR

18330

+};

18331

+extern char *eoNames[eoNR];

18332

+typedef struct

18333

+{

18334

+ int bPrint;

18335

+}

18336

+t_coupl_LJ;

18337

+typedef struct

18338

+{

18339

+ int eObs;

18340

+ t_iparams xi;

18341

+}

18342

+t_coupl_iparams;

18343

+typedef struct

18344

+{

18345

+ real act_value[eoObsNR];

18346

+ real av_value[eoObsNR];

18347

+ real ref_value[eoObsNR];

18348

+ int bObsUsed[eoObsNR];

18349

+ int nLJ, nBU, nQ, nIP;

18350

+ t_coupl_LJ *tcLJ;

18351

+}

18352

+t_coupl_rec;

18353

+static void

18354

+pr_ff (t_coupl_rec * tcr, real time, t_idef * idef, t_commrec * cr, int nfile,

18355

+ t_filenm fnm[])

18356

+{

18357

+ static FILE *prop;

18358

+ static FILE **out = ((void *) 0);

18359

+ static FILE **qq = ((void *) 0);

18360

+ static FILE **ip = ((void *) 0);

18361

+ char buf[256];

18362

+ char *leg[] = {

18363

+ "C12", "C6"

18364

+ };

18365

+ char **raleg;

18366

+ int i, j, index;

18367

+ if ((prop == ((void *) 0)) && (out == ((void *) 0)) && (qq == ((void *) 0))

18368

+ && (ip == ((void *) 0)))

18369

+ {

18370

+ for (i = j = 0; (i < eoObsNR); i++)

18371

+ {

18372

+ if (tcr->bObsUsed[i])

18373

+ {

18374

+ raleg[j++] =

18375

+ (__extension__

18376

+ (__builtin_constant_p (eoNames[i])

18377

+ && ((size_t) (const void *) ((eoNames[i]) + 1) -

18378

+ (size_t) (const void *) (eoNames[i]) ==

18379

+ 1) ? (((const char *) (eoNames[i]))[0] ==

18380

+ '\0' ? (char *) calloc ((size_t) 1,

18381

+ (size_t) 1) : (

18382

+ {

18383

+ size_t

18384

+ __len

18385

+ =

18386

+ strlen

18387

+ (eoNames

18388

+ [i])

18389

+ +

18390

+ 1;

18391

+ char

18392

+ *__retval

18393

+ =

18394

+ (char

18395

+ *)

18396

+ malloc

18397

+ (__len);

18398

+ __retval;}

18399

+ )): __strdup (eoNames[i])));

18400

+ raleg[j++] =

18401

+ (__extension__

18402

+ (__builtin_constant_p (buf)

18403

+ && ((size_t) (const void *) ((buf) + 1) -

18404

+ (size_t) (const void *) (buf) ==

18405

+ 1) ? (((const char *) (buf))[0] ==

18406

+ '\0' ? (char *) calloc ((size_t) 1,

18407

+ (size_t) 1) : (

18408

+ {

18409

+ size_t

18410

+ __len

18411

+ =

18412

+ strlen

18413

+ (buf)

18414

+ +

18415

+ 1;

18416

+ char

18417

+ *__retval

18418

+ =

18419

+ (char

18420

+ *)

18421

+ malloc

18422

+ (__len);

18423

+ __retval;}

18424

+ )): __strdup (buf)));

18425

+ }

18426

+ }

18427

+ if (tcr->nLJ)

18428

+ {

18429

+ for (i = 0; (i < tcr->nLJ); i++)

18430

+ {

18431

+ if (tcr->tcLJ[i].bPrint)

18432

+ {

18433

+ xvgr_legend (out[i], (sizeof (leg) / sizeof ((leg)[0])),

18434

+ leg);

18435

+ }

18436

+ }

18437

+ }

18438

+ }

18439

+}

18440

+

18441

+void

18442

+do_coupling (FILE * log, int nfile, t_filenm fnm[], t_coupl_rec * tcr, real t,

18443

+ int step, real ener[], t_forcerec * fr, t_inputrec * ir,

18444

+ int bMaster, t_mdatoms * md, t_idef * idef, real mu_aver,

18445

+ int nmols, t_commrec * cr, matrix box, tensor virial,

18446

+ tensor pres, rvec mu_tot, rvec x[], rvec f[], int bDoIt)

18447

+{

18448

+ int i, j, ati, atj, atnr2, type, ftype;

18449

+ real deviation[eoObsNR], prdev[eoObsNR], epot0, dist, rmsf;

18450

+ real ff6, ff12, ffa, ffb, ffc, ffq, factor, dt, mu_ind;

18451

+ int bTest, bPrint;

18452

+ t_coupl_iparams *tip;

18453

+ if (bPrint)

18454

+ {

18455

+ pr_ff (tcr, t, idef, cr, nfile, fnm);

18456

+ }

18457

+ for (i = 0; (i < eoObsNR); i++)

18458

+ {

18459

+ deviation[i] =

18460

+ calc_deviation (tcr->av_value[i], tcr->act_value[i],

18461

+ tcr->ref_value[i]);

18462

+ prdev[i] = tcr->ref_value[i] - tcr->act_value[i];

18463

+ }

18464

+ if (bPrint)

18465

+ pr_dev (tcr, t, prdev, cr, nfile, fnm);

18466

+ for (i = 0; (i < atnr2); i++)

18467

+ {

18468

+ factor = dt * deviation[tip->eObs];

18469

+ switch (ftype)

18470

+ {

18471

+ case F_BONDS:

18472

+ if (fabs (tip->xi.harmonic.krA) > 1.2e-38)

18473

+ idef->iparams[type].harmonic.krA *=

18474

+ (1 + factor / tip->xi.harmonic.krA);

18475

+ }

18476

+ }

18477

+}

18478

Index: gcc/testsuite/gcc.target/powerpc/atomic-p7.c

18479

===================================================================

18480

--- a/src/gcc/testsuite/gcc.target/powerpc/atomic-p7.c (.../tags/gcc_4_8_2_release)

18481

+++ b/src/gcc/testsuite/gcc.target/powerpc/atomic-p7.c (.../branches/gcc-4_8-branch)

18482

@@ -0,0 +1,207 @@

18483

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

18484

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18485

+/* { dg-require-effective-target powerpc_vsx_ok } */

18486

+/* { dg-options "-mcpu=power7 -O2" } */

18487

+/* { dg-final { scan-assembler-not "lbarx" } } */

18488

+/* { dg-final { scan-assembler-not "lharx" } } */

18489

+/* { dg-final { scan-assembler-times "lwarx" 18 } } */

18490

+/* { dg-final { scan-assembler-times "ldarx" 6 } } */

18491

+/* { dg-final { scan-assembler-not "lqarx" } } */

18492

+/* { dg-final { scan-assembler-not "stbcx" } } */

18493

+/* { dg-final { scan-assembler-not "sthcx" } } */

18494

+/* { dg-final { scan-assembler-times "stwcx" 18 } } */

18495

+/* { dg-final { scan-assembler-times "stdcx" 6 } } */

18496

+/* { dg-final { scan-assembler-not "stqcx" } } */

18497

+/* { dg-final { scan-assembler-times "bl __atomic" 6 } } */

18498

+/* { dg-final { scan-assembler-times "isync" 12 } } */

18499

+/* { dg-final { scan-assembler-times "lwsync" 8 } } */

18500

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

18501

+/* { dg-final { scan-assembler-not "mtvsrwa" } } */

18502

+/* { dg-final { scan-assembler-not "mtvsrwz" } } */

18503

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

18504

+/* { dg-final { scan-assembler-not "mfvsrwz" } } */

18505

+

18506

+/* Test for the byte atomic operations on power8 using lbarx/stbcx. */

18507

+char

18508

+char_fetch_add_relaxed (char *ptr, int value)

18509

+{

18510

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18511

+}

18512

+

18513

+char

18514

+char_fetch_sub_consume (char *ptr, int value)

18515

+{

18516

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18517

+}

18518

+

18519

+char

18520

+char_fetch_and_acquire (char *ptr, int value)

18521

+{

18522

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18523

+}

18524

+

18525

+char

18526

+char_fetch_ior_release (char *ptr, int value)

18527

+{

18528

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18529

+}

18530

+

18531

+char

18532

+char_fetch_xor_acq_rel (char *ptr, int value)

18533

+{

18534

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18535

+}

18536

+

18537

+char

18538

+char_fetch_nand_seq_cst (char *ptr, int value)

18539

+{

18540

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18541

+}

18542

+

18543

+/* Test for the half word atomic operations on power8 using lharx/sthcx. */

18544

+short

18545

+short_fetch_add_relaxed (short *ptr, int value)

18546

+{

18547

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18548

+}

18549

+

18550

+short

18551

+short_fetch_sub_consume (short *ptr, int value)

18552

+{

18553

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18554

+}

18555

+

18556

+short

18557

+short_fetch_and_acquire (short *ptr, int value)

18558

+{

18559

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18560

+}

18561

+

18562

+short

18563

+short_fetch_ior_release (short *ptr, int value)

18564

+{

18565

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18566

+}

18567

+

18568

+short

18569

+short_fetch_xor_acq_rel (short *ptr, int value)

18570

+{

18571

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18572

+}

18573

+

18574

+short

18575

+short_fetch_nand_seq_cst (short *ptr, int value)

18576

+{

18577

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18578

+}

18579

+

18580

+/* Test for the word atomic operations on power8 using lwarx/stwcx. */

18581

+int

18582

+int_fetch_add_relaxed (int *ptr, int value)

18583

+{

18584

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18585

+}

18586

+

18587

+int

18588

+int_fetch_sub_consume (int *ptr, int value)

18589

+{

18590

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18591

+}

18592

+

18593

+int

18594

+int_fetch_and_acquire (int *ptr, int value)

18595

+{

18596

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18597

+}

18598

+

18599

+int

18600

+int_fetch_ior_release (int *ptr, int value)

18601

+{

18602

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18603

+}

18604

+

18605

+int

18606

+int_fetch_xor_acq_rel (int *ptr, int value)

18607

+{

18608

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18609

+}

18610

+

18611

+int

18612

+int_fetch_nand_seq_cst (int *ptr, int value)

18613

+{

18614

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18615

+}

18616

+

18617

+/* Test for the double word atomic operations on power8 using ldarx/stdcx. */

18618

+long

18619

+long_fetch_add_relaxed (long *ptr, long value)

18620

+{

18621

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18622

+}

18623

+

18624

+long

18625

+long_fetch_sub_consume (long *ptr, long value)

18626

+{

18627

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18628

+}

18629

+

18630

+long

18631

+long_fetch_and_acquire (long *ptr, long value)

18632

+{

18633

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18634

+}

18635

+

18636

+long

18637

+long_fetch_ior_release (long *ptr, long value)

18638

+{

18639

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18640

+}

18641

+

18642

+long

18643

+long_fetch_xor_acq_rel (long *ptr, long value)

18644

+{

18645

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18646

+}

18647

+

18648

+long

18649

+long_fetch_nand_seq_cst (long *ptr, long value)

18650

+{

18651

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18652

+}

18653

+

18654

+/* Test for the quad word atomic operations on power8 using ldarx/stdcx. */

18655

+__int128_t

18656

+quad_fetch_add_relaxed (__int128_t *ptr, __int128_t value)

18657

+{

18658

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

18659

+}

18660

+

18661

+__int128_t

18662

+quad_fetch_sub_consume (__int128_t *ptr, __int128_t value)

18663

+{

18664

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

18665

+}

18666

+

18667

+__int128_t

18668

+quad_fetch_and_acquire (__int128_t *ptr, __int128_t value)

18669

+{

18670

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

18671

+}

18672

+

18673

+__int128_t

18674

+quad_fetch_ior_release (__int128_t *ptr, __int128_t value)

18675

+{

18676

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

18677

+}

18678

+

18679

+__int128_t

18680

+quad_fetch_xor_acq_rel (__int128_t *ptr, __int128_t value)

18681

+{

18682

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

18683

+}

18684

+

18685

+__int128_t

18686

+quad_fetch_nand_seq_cst (__int128_t *ptr, __int128_t value)

18687

+{

18688

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

18689

+}

18690

Index: gcc/testsuite/gcc.target/powerpc/recip-3.c

18691

===================================================================

18692

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-3.c (.../tags/gcc_4_8_2_release)

18693

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-3.c (.../branches/gcc-4_8-branch)

18694

@@ -1,14 +1,14 @@

18695

/* { dg-do compile { target { { powerpc*-*-* } && { ! powerpc*-apple-darwin* } } } } */

18696

/* { dg-require-effective-target powerpc_fprs } */

18697

/* { dg-options "-O2 -mrecip -ffast-math -mcpu=power7" } */

18698

-/* { dg-final { scan-assembler-times "xsrsqrtedp" 1 } } */

18699

+/* { dg-final { scan-assembler-times "xsrsqrtedp\|frsqrte\ " 1 } } */

18700

/* { dg-final { scan-assembler-times "xsmsub.dp\|fmsub\ " 1 } } */

18701

-/* { dg-final { scan-assembler-times "xsmuldp" 4 } } */

18702

+/* { dg-final { scan-assembler-times "xsmuldp\|fmul\ " 4 } } */

18703

/* { dg-final { scan-assembler-times "xsnmsub.dp\|fnmsub\ " 2 } } */

18704

-/* { dg-final { scan-assembler-times "frsqrtes" 1 } } */

18705

-/* { dg-final { scan-assembler-times "fmsubs" 1 } } */

18706

-/* { dg-final { scan-assembler-times "fmuls" 4 } } */

18707

-/* { dg-final { scan-assembler-times "fnmsubs" 2 } } */

18708

+/* { dg-final { scan-assembler-times "xsrsqrtesp\|frsqrtes" 1 } } */

18709

+/* { dg-final { scan-assembler-times "xsmsub.sp\|fmsubs" 1 } } */

18710

+/* { dg-final { scan-assembler-times "xsmulsp\|fmuls" 2 } } */

18711

+/* { dg-final { scan-assembler-times "xsnmsub.sp\|fnmsubs" 1 } } */

18712

18713

double

18714

rsqrt_d (double a)

18715

Index: gcc/testsuite/gcc.target/powerpc/timode_off.c

18716

===================================================================

18717

--- a/src/gcc/testsuite/gcc.target/powerpc/timode_off.c (.../tags/gcc_4_8_2_release)

18718

+++ b/src/gcc/testsuite/gcc.target/powerpc/timode_off.c (.../branches/gcc-4_8-branch)

18719

@@ -1,5 +1,5 @@

18720

/* { dg-do assemble { target { lp64 } } } */

18721

-/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps" } */

18722

+/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps -mcpu=power5" } */

18723

18724

typedef int TImode __attribute__ ((mode (TI)));

18725

18726

@@ -46,6 +46,12 @@

18727

TImode r20 (void *x) { return *(TImode *) (x + 32748); }

18728

18729

/* test should really be == 616, see pr54110 */

18730

+/* When TImode is allowed in VSX registers, the allowable address modes for

18731

+ TImode is just a single indirect address in order for the value to be loaded

18732

+ and store in either GPR or VSX registers. This affects the generated code,

18733

+ and it would cause this test to fail, when such an option is used. Fall

18734

+ back to power5 to test the code. */

18735

+

18736

/* { dg-final { object-size text <= 700 } } */

18737

/* { dg-final { scan-assembler-not "(st|l)fd" } } */

18738

/* { dg-final { cleanup-saved-temps "timode_off" } } */

18739

Index: gcc/testsuite/gcc.target/powerpc/no-r11-2.c

18740

===================================================================

18741

--- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-2.c (.../tags/gcc_4_8_2_release)

18742

+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-2.c (.../branches/gcc-4_8-branch)

18743

@@ -1,5 +1,6 @@

18744

/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

18745

/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */

18746

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

18747

/* { dg-options "-O2 -mpointers-to-nested-functions" } */

18748

18749

int

18750

Index: gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c

18751

===================================================================

18752

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c (.../tags/gcc_4_8_2_release)

18753

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c (.../branches/gcc-4_8-branch)

18754

@@ -0,0 +1,42 @@

18755

+/* { dg-do compile { target { powerpc*-*-* } } } */

18756

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18757

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18758

+/* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf" } */

18759

+

18760

+float load_sf (float *p)

18761

+{

18762

+ float f = *p;

18763

+ __asm__ ("# reg %x0" : "+v" (f));

18764

+ return f;

18765

+}

18766

+

18767

+double load_df (double *p)

18768

+{

18769

+ double d = *p;

18770

+ __asm__ ("# reg %x0" : "+v" (d));

18771

+ return d;

18772

+}

18773

+

18774

+double load_dfsf (float *p)

18775

+{

18776

+ double d = (double) *p;

18777

+ __asm__ ("# reg %x0" : "+v" (d));

18778

+ return d;

18779

+}

18780

+

18781

+void store_sf (float *p, float f)

18782

+{

18783

+ __asm__ ("# reg %x0" : "+v" (f));

18784

+ *p = f;

18785

+}

18786

+

18787

+void store_df (double *p, double d)

18788

+{

18789

+ __asm__ ("# reg %x0" : "+v" (d));

18790

+ *p = d;

18791

+}

18792

+

18793

+/* { dg-final { scan-assembler "lxsspx" } } */

18794

+/* { dg-final { scan-assembler "lxsdx" } } */

18795

+/* { dg-final { scan-assembler "stxsspx" } } */

18796

+/* { dg-final { scan-assembler "stxsdx" } } */

18797

Index: gcc/testsuite/gcc.target/powerpc/pack01.c

18798

===================================================================

18799

--- a/src/gcc/testsuite/gcc.target/powerpc/pack01.c (.../tags/gcc_4_8_2_release)

18800

+++ b/src/gcc/testsuite/gcc.target/powerpc/pack01.c (.../branches/gcc-4_8-branch)

18801

@@ -0,0 +1,91 @@

18802

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

18803

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18804

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

18805

+/* { dg-require-effective-target p8vector_hw } */

18806

+/* { dg-options "-mcpu=power8 -O2" } */

18807

+

18808

+#include <stddef.h>

18809

+#include <stdlib.h>

18810

+#include <altivec.h>

18811

+

18812

+#ifdef DEBUG

18813

+#include <stdio.h>

18814

+#endif

18815

+

18816

+typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t;

18817

+typedef __int128_t scalar_128_t;

18818

+typedef unsigned long long scalar_64_t;

18819

+

18820

+volatile scalar_64_t one = 1;

18821

+volatile scalar_64_t two = 2;

18822

+

18823

+int

18824

+main (void)

18825

+{

18826

+ scalar_128_t a = (((scalar_128_t)one) << 64) | ((scalar_128_t)two);

18827

+ vector_128_t v1 = (vector_128_t) { a };

18828

+ vector_128_t v2 = __builtin_pack_vector_int128 (one, two);

18829

+ scalar_64_t x0 = __builtin_unpack_vector_int128 (v1, 0);

18830

+ scalar_64_t x1 = __builtin_unpack_vector_int128 (v1, 1);

18831

+ vector_128_t v3 = __builtin_pack_vector_int128 (x0, x1);

18832

+

18833

+ size_t i;

18834

+ union {

18835

+ scalar_128_t i128;

18836

+ vector_128_t v128;

18837

+ scalar_64_t u64;

18838

+ unsigned char uc[sizeof (scalar_128_t)];

18839

+ char c[sizeof (scalar_128_t)];

18840

+ } u, u2;

18841

+

18842

+#ifdef DEBUG

18843

+ {

18844

+ printf ("a = 0x");

18845

+ u.i128 = a;

18846

+ for (i = 0; i < sizeof (scalar_128_t); i++)

18847

+ printf ("%.2x", u.uc[i]);

18848

+

18849

+ printf ("\nv1 = 0x");

18850

+ u.v128 = v1;

18851

+ for (i = 0; i < sizeof (scalar_128_t); i++)

18852

+ printf ("%.2x", u.uc[i]);

18853

+

18854

+ printf ("\nv2 = 0x");

18855

+ u.v128 = v2;

18856

+ for (i = 0; i < sizeof (scalar_128_t); i++)

18857

+ printf ("%.2x", u.uc[i]);

18858

+

18859

+ printf ("\nv3 = 0x");

18860

+ u.v128 = v3;

18861

+ for (i = 0; i < sizeof (scalar_128_t); i++)

18862

+ printf ("%.2x", u.uc[i]);

18863

+

18864

+ printf ("\nx0 = 0x");

18865

+ u.u64 = x0;

18866

+ for (i = 0; i < sizeof (scalar_64_t); i++)

18867

+ printf ("%.2x", u.uc[i]);

18868

+

18869

+ printf ("\nx1 = 0x");

18870

+ u.u64 = x1;

18871

+ for (i = 0; i < sizeof (scalar_64_t); i++)

18872

+ printf ("%.2x", u.uc[i]);

18873

+

18874

+ printf ("\n");

18875

+ }

18876

+#endif

18877

+

18878

+ u2.i128 = a;

18879

+ u.v128 = v1;

18880

+ if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0)

18881

+ abort ();

18882

+

18883

+ u.v128 = v2;

18884

+ if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0)

18885

+ abort ();

18886

+

18887

+ u.v128 = v3;

18888

+ if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0)

18889

+ abort ();

18890

+

18891

+ return 0;

18892

+}

18893

Index: gcc/testsuite/gcc.target/powerpc/bool3-p8.c

18894

===================================================================

18895

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3-p8.c (.../tags/gcc_4_8_2_release)

18896

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3-p8.c (.../branches/gcc-4_8-branch)

18897

@@ -0,0 +1,36 @@

18898

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

18899

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18900

+/* { dg-require-effective-target powerpc_p8vector_ok } */

18901

+/* { dg-options "-O2 -mcpu=power8" } */

18902

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

18903

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

18904

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

18905

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

18906

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

18907

+/* { dg-final { scan-assembler "\[ \t\]eqv " } } */

18908

+/* { dg-final { scan-assembler "\[ \t\]orc " } } */

18909

+/* { dg-final { scan-assembler "\[ \t\]nand " } } */

18910

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

18911

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

18912

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

18913

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

18914

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

18915

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

18916

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

18917

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

18918

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

18919

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

18920

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

18921

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

18922

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

18923

+

18924

+#ifndef TYPE

18925

+#ifdef _ARCH_PPC64

18926

+#define TYPE __int128_t

18927

+#else

18928

+typedef int v4si __attribute__ ((vector_size (16)));

18929

+#define TYPE v4si

18930

+#endif

18931

+#endif

18932

+

18933

+#include "bool3.h"

18934

Index: gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c

18935

===================================================================

18936

--- a/src/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c (.../tags/gcc_4_8_2_release)

18937

+++ b/src/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c (.../branches/gcc-4_8-branch)

18938

@@ -0,0 +1,32 @@

18939

+/* This checks the availability of the XL compiler intrinsics for

18940

+ transactional execution with the expected prototypes. */

18941

+

18942

+/* { dg-do compile { target { powerpc*-*-* } } } */

18943

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

18944

+/* { dg-require-effective-target powerpc_htm_ok } */

18945

+/* { dg-options "-O2 -mhtm" } */

18946

+

18947

+#include <htmxlintrin.h>

18948

+

18949

+void

18950

+foo (void *TM_buff, long *result, unsigned char *code)

18951

+{

18952

+ *result++ = __TM_simple_begin ();

18953

+ *result++ = __TM_begin (TM_buff);

18954

+ *result++ = __TM_end ();

18955

+ __TM_abort ();

18956

+ __TM_named_abort (*code);

18957

+ __TM_resume ();

18958

+ __TM_suspend ();

18959

+ *result++ = __TM_is_user_abort (TM_buff);

18960

+ *result++ = __TM_is_named_user_abort (TM_buff, code);

18961

+ *result++ = __TM_is_illegal (TM_buff);

18962

+ *result++ = __TM_is_footprint_exceeded (TM_buff);

18963

+ *result++ = __TM_nesting_depth (TM_buff);

18964

+ *result++ = __TM_is_nested_too_deep (TM_buff);

18965

+ *result++ = __TM_is_conflict (TM_buff);

18966

+ *result++ = __TM_is_failure_persistent (TM_buff);

18967

+ *result++ = __TM_failure_address (TM_buff);

18968

+ *result++ = __TM_failure_code (TM_buff);

18969

+}

18970

+

18971

Index: gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c

18972

===================================================================

18973

--- a/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../tags/gcc_4_8_2_release)

18974

+++ b/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../branches/gcc-4_8-branch)

18975

@@ -0,0 +1,21 @@

18976

+/* Test accuracy of long double division (glibc bug 15396). */

18977

+/* { dg-do run { target powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } */

18978

+/* { dg-options "-mlong-double-128" } */

18979

+

18980

+extern void exit (int);

18981

+extern void abort (void);

18982

+

18983

+volatile long double a = 0x1p-1024L;

18984

+volatile long double b = 0x3p-53L;

18985

+volatile long double r;

18986

+volatile long double expected = 0x1.55555555555555555555555555p-973L;

18987

+

18988

+int

18989

+main (void)

18990

+{

18991

+ r = a / b;

18992

+ /* Allow error up to 2ulp. */

18993

+ if (__builtin_fabsl (r - expected) > 0x1p-1073L)

18994

+ abort ();

18995

+ exit (0);

18996

+}

18997

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c

18998

===================================================================

18999

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c (.../tags/gcc_4_8_2_release)

19000

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c (.../branches/gcc-4_8-branch)

19001

@@ -0,0 +1,249 @@

19002

+/* { dg-do compile { target { powerpc*-*-* } } } */

19003

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19004

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19005

+/* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model" } */

19006

+

19007

+#include <altivec.h>

19008

+

19009

+typedef vector long long vll_sign;

19010

+typedef vector unsigned long long vll_uns;

19011

+typedef vector bool long long vll_bool;

19012

+

19013

+typedef vector int vi_sign;

19014

+typedef vector unsigned int vi_uns;

19015

+typedef vector bool int vi_bool;

19016

+

19017

+typedef vector short vs_sign;

19018

+typedef vector unsigned short vs_uns;

19019

+typedef vector bool short vs_bool;

19020

+

19021

+typedef vector signed char vc_sign;

19022

+typedef vector unsigned char vc_uns;

19023

+typedef vector bool char vc_bool;

19024

+

19025

+vll_sign vll_clz_1 (vll_sign a)

19026

+{

19027

+ return __builtin_altivec_vclzd (a);

19028

+}

19029

+

19030

+vll_sign vll_clz_2 (vll_sign a)

19031

+{

19032

+ return vec_vclz (a);

19033

+}

19034

+

19035

+vll_sign vll_clz_3 (vll_sign a)

19036

+{

19037

+ return vec_vclzd (a);

19038

+}

19039

+

19040

+vll_uns vll_clz_4 (vll_uns a)

19041

+{

19042

+ return vec_vclz (a);

19043

+}

19044

+

19045

+vll_uns vll_clz_5 (vll_uns a)

19046

+{

19047

+ return vec_vclzd (a);

19048

+}

19049

+

19050

+vi_sign vi_clz_1 (vi_sign a)

19051

+{

19052

+ return __builtin_altivec_vclzw (a);

19053

+}

19054

+

19055

+vi_sign vi_clz_2 (vi_sign a)

19056

+{

19057

+ return vec_vclz (a);

19058

+}

19059

+

19060

+vi_sign vi_clz_3 (vi_sign a)

19061

+{

19062

+ return vec_vclzw (a);

19063

+}

19064

+

19065

+vi_uns vi_clz_4 (vi_uns a)

19066

+{

19067

+ return vec_vclz (a);

19068

+}

19069

+

19070

+vi_uns vi_clz_5 (vi_uns a)

19071

+{

19072

+ return vec_vclzw (a);

19073

+}

19074

+

19075

+vs_sign vs_clz_1 (vs_sign a)

19076

+{

19077

+ return __builtin_altivec_vclzh (a);

19078

+}

19079

+

19080

+vs_sign vs_clz_2 (vs_sign a)

19081

+{

19082

+ return vec_vclz (a);

19083

+}

19084

+

19085

+vs_sign vs_clz_3 (vs_sign a)

19086

+{

19087

+ return vec_vclzh (a);

19088

+}

19089

+

19090

+vs_uns vs_clz_4 (vs_uns a)

19091

+{

19092

+ return vec_vclz (a);

19093

+}

19094

+

19095

+vs_uns vs_clz_5 (vs_uns a)

19096

+{

19097

+ return vec_vclzh (a);

19098

+}

19099

+

19100

+vc_sign vc_clz_1 (vc_sign a)

19101

+{

19102

+ return __builtin_altivec_vclzb (a);

19103

+}

19104

+

19105

+vc_sign vc_clz_2 (vc_sign a)

19106

+{

19107

+ return vec_vclz (a);

19108

+}

19109

+

19110

+vc_sign vc_clz_3 (vc_sign a)

19111

+{

19112

+ return vec_vclzb (a);

19113

+}

19114

+

19115

+vc_uns vc_clz_4 (vc_uns a)

19116

+{

19117

+ return vec_vclz (a);

19118

+}

19119

+

19120

+vc_uns vc_clz_5 (vc_uns a)

19121

+{

19122

+ return vec_vclzb (a);

19123

+}

19124

+

19125

+vll_sign vll_popcnt_1 (vll_sign a)

19126

+{

19127

+ return __builtin_altivec_vpopcntd (a);

19128

+}

19129

+

19130

+vll_sign vll_popcnt_2 (vll_sign a)

19131

+{

19132

+ return vec_vpopcnt (a);

19133

+}

19134

+

19135

+vll_sign vll_popcnt_3 (vll_sign a)

19136

+{

19137

+ return vec_vpopcntd (a);

19138

+}

19139

+

19140

+vll_uns vll_popcnt_4 (vll_uns a)

19141

+{

19142

+ return vec_vpopcnt (a);

19143

+}

19144

+

19145

+vll_uns vll_popcnt_5 (vll_uns a)

19146

+{

19147

+ return vec_vpopcntd (a);

19148

+}

19149

+

19150

+vi_sign vi_popcnt_1 (vi_sign a)

19151

+{

19152

+ return __builtin_altivec_vpopcntw (a);

19153

+}

19154

+

19155

+vi_sign vi_popcnt_2 (vi_sign a)

19156

+{

19157

+ return vec_vpopcnt (a);

19158

+}

19159

+

19160

+vi_sign vi_popcnt_3 (vi_sign a)

19161

+{

19162

+ return vec_vpopcntw (a);

19163

+}

19164

+

19165

+vi_uns vi_popcnt_4 (vi_uns a)

19166

+{

19167

+ return vec_vpopcnt (a);

19168

+}

19169

+

19170

+vi_uns vi_popcnt_5 (vi_uns a)

19171

+{

19172

+ return vec_vpopcntw (a);

19173

+}

19174

+

19175

+vs_sign vs_popcnt_1 (vs_sign a)

19176

+{

19177

+ return __builtin_altivec_vpopcnth (a);

19178

+}

19179

+

19180

+vs_sign vs_popcnt_2 (vs_sign a)

19181

+{

19182

+ return vec_vpopcnt (a);

19183

+}

19184

+

19185

+vs_sign vs_popcnt_3 (vs_sign a)

19186

+{

19187

+ return vec_vpopcnth (a);

19188

+}

19189

+

19190

+vs_uns vs_popcnt_4 (vs_uns a)

19191

+{

19192

+ return vec_vpopcnt (a);

19193

+}

19194

+

19195

+vs_uns vs_popcnt_5 (vs_uns a)

19196

+{

19197

+ return vec_vpopcnth (a);

19198

+}

19199

+

19200

+vc_sign vc_popcnt_1 (vc_sign a)

19201

+{

19202

+ return __builtin_altivec_vpopcntb (a);

19203

+}

19204

+

19205

+vc_sign vc_popcnt_2 (vc_sign a)

19206

+{

19207

+ return vec_vpopcnt (a);

19208

+}

19209

+

19210

+vc_sign vc_popcnt_3 (vc_sign a)

19211

+{

19212

+ return vec_vpopcntb (a);

19213

+}

19214

+

19215

+vc_uns vc_popcnt_4 (vc_uns a)

19216

+{

19217

+ return vec_vpopcnt (a);

19218

+}

19219

+

19220

+vc_uns vc_popcnt_5 (vc_uns a)

19221

+{

19222

+ return vec_vpopcntb (a);

19223

+}

19224

+

19225

+vc_uns vc_gbb_1 (vc_uns a)

19226

+{

19227

+ return __builtin_altivec_vgbbd (a);

19228

+}

19229

+

19230

+vc_sign vc_gbb_2 (vc_sign a)

19231

+{

19232

+ return vec_vgbbd (a);

19233

+}

19234

+

19235

+vc_uns vc_gbb_3 (vc_uns a)

19236

+{

19237

+ return vec_vgbbd (a);

19238

+}

19239

+

19240

+/* { dg-final { scan-assembler-times "vclzd" 5 } } */

19241

+/* { dg-final { scan-assembler-times "vclzw" 5 } } */

19242

+/* { dg-final { scan-assembler-times "vclzh" 5 } } */

19243

+/* { dg-final { scan-assembler-times "vclzb" 5 } } */

19244

+

19245

+/* { dg-final { scan-assembler-times "vpopcntd" 5 } } */

19246

+/* { dg-final { scan-assembler-times "vpopcntw" 5 } } */

19247

+/* { dg-final { scan-assembler-times "vpopcnth" 5 } } */

19248

+/* { dg-final { scan-assembler-times "vpopcntb" 5 } } */

19249

+

19250

+/* { dg-final { scan-assembler-times "vgbbd" 3 } } */

19251

Index: gcc/testsuite/gcc.target/powerpc/bool3-av.c

19252

===================================================================

19253

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3-av.c (.../tags/gcc_4_8_2_release)

19254

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3-av.c (.../branches/gcc-4_8-branch)

19255

@@ -0,0 +1,37 @@

19256

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

19257

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19258

+/* { dg-require-effective-target powerpc_altivec_ok } */

19259

+/* { dg-options "-O2 -mcpu=power6 -mabi=altivec -maltivec -mno-vsx" } */

19260

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

19261

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

19262

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

19263

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

19264

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

19265

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

19266

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

19267

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

19268

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

19269

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

19270

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

19271

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

19272

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

19273

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

19274

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

19275

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

19276

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

19277

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

19278

+

19279

+/* On altivec, for 128-bit types, ORC/ANDC/EQV might not show up, since the

19280

+ vector unit doesn't support these, so the appropriate combine patterns may

19281

+ not be generated. */

19282

+

19283

+#ifndef TYPE

19284

+#ifdef _ARCH_PPC64

19285

+#define TYPE __int128_t

19286

+#else

19287

+typedef int v4si __attribute__ ((vector_size (16)));

19288

+#define TYPE v4si

19289

+#endif

19290

+#endif

19291

+

19292

+#include "bool3.h"

19293

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c

19294

===================================================================

19295

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c (.../tags/gcc_4_8_2_release)

19296

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c (.../branches/gcc-4_8-branch)

19297

@@ -0,0 +1,69 @@

19298

+/* { dg-do compile { target { powerpc*-*-* } } } */

19299

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19300

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19301

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

19302

+

19303

+#ifndef SIZE

19304

+#define SIZE 1024

19305

+#endif

19306

+

19307

+#ifndef ALIGN

19308

+#define ALIGN 32

19309

+#endif

19310

+

19311

+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))

19312

+

19313

+#define DO_BUILTIN(PREFIX, TYPE, CLZ, POPCNT) \

19314

+TYPE PREFIX ## _a[SIZE] ALIGN_ATTR; \

19315

+TYPE PREFIX ## _b[SIZE] ALIGN_ATTR; \

19316

+ \

19317

+void \

19318

+PREFIX ## _clz (void) \

19319

+{ \

19320

+ unsigned long i; \

19321

+ \

19322

+ for (i = 0; i < SIZE; i++) \

19323

+ PREFIX ## _a[i] = CLZ (PREFIX ## _b[i]); \

19324

+} \

19325

+ \

19326

+void \

19327

+PREFIX ## _popcnt (void) \

19328

+{ \

19329

+ unsigned long i; \

19330

+ \

19331

+ for (i = 0; i < SIZE; i++) \

19332

+ PREFIX ## _a[i] = POPCNT (PREFIX ## _b[i]); \

19333

+}

19334

+

19335

+#if !defined(DO_LONG_LONG) && !defined(DO_LONG) && !defined(DO_INT) && !defined(DO_SHORT) && !defined(DO_CHAR)

19336

+#define DO_INT 1

19337

+#endif

19338

+

19339

+#if DO_LONG_LONG

19340

+/* At the moment, only int is auto vectorized. */

19341

+DO_BUILTIN (sll, long long, __builtin_clzll, __builtin_popcountll)

19342

+DO_BUILTIN (ull, unsigned long long, __builtin_clzll, __builtin_popcountll)

19343

+#endif

19344

+

19345

+#if defined(_ARCH_PPC64) && DO_LONG

19346

+DO_BUILTIN (sl, long, __builtin_clzl, __builtin_popcountl)

19347

+DO_BUILTIN (ul, unsigned long, __builtin_clzl, __builtin_popcountl)

19348

+#endif

19349

+

19350

+#if DO_INT

19351

+DO_BUILTIN (si, int, __builtin_clz, __builtin_popcount)

19352

+DO_BUILTIN (ui, unsigned int, __builtin_clz, __builtin_popcount)

19353

+#endif

19354

+

19355

+#if DO_SHORT

19356

+DO_BUILTIN (ss, short, __builtin_clz, __builtin_popcount)

19357

+DO_BUILTIN (us, unsigned short, __builtin_clz, __builtin_popcount)

19358

+#endif

19359

+

19360

+#if DO_CHAR

19361

+DO_BUILTIN (sc, signed char, __builtin_clz, __builtin_popcount)

19362

+DO_BUILTIN (uc, unsigned char, __builtin_clz, __builtin_popcount)

19363

+#endif

19364

+

19365

+/* { dg-final { scan-assembler-times "vclzw" 2 } } */

19366

+/* { dg-final { scan-assembler-times "vpopcntw" 2 } } */

19367

Index: gcc/testsuite/gcc.target/powerpc/bcd-3.c

19368

===================================================================

19369

--- a/src/gcc/testsuite/gcc.target/powerpc/bcd-3.c (.../tags/gcc_4_8_2_release)

19370

+++ b/src/gcc/testsuite/gcc.target/powerpc/bcd-3.c (.../branches/gcc-4_8-branch)

19371

@@ -0,0 +1,103 @@

19372

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

19373

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19374

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19375

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19376

+/* { dg-options "-mcpu=power8 -O2" } */

19377

+/* { dg-final { scan-assembler-times "bcdadd\[.\] " 4 } } */

19378

+/* { dg-final { scan-assembler-times "bcdsub\[.\] " 4 } } */

19379

+/* { dg-final { scan-assembler-not "bl __builtin" } } */

19380

+/* { dg-final { scan-assembler-not "mtvsr" } } */

19381

+/* { dg-final { scan-assembler-not "mfvsr" } } */

19382

+/* { dg-final { scan-assembler-not "lvx" } } */

19383

+/* { dg-final { scan-assembler-not "lxvw4x" } } */

19384

+/* { dg-final { scan-assembler-not "lxvd2x" } } */

19385

+/* { dg-final { scan-assembler-not "stvx" } } */

19386

+/* { dg-final { scan-assembler-not "stxvw4x" } } */

19387

+/* { dg-final { scan-assembler-not "stxvd2x" } } */

19388

+

19389

+typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t;

19390

+typedef __int128_t scalar_128_t;

19391

+typedef unsigned long long scalar_64_t;

19392

+

19393

+/* Test whether the peephole works to allow folding a bcdadd, with a

19394

+ bcdadd_<test> into a single instruction. */

19395

+

19396

+vector_128_t

19397

+do_add_lt (vector_128_t a, vector_128_t b, int *p)

19398

+{

19399

+ vector_128_t ret = __builtin_bcdadd (a, b, 0);

19400

+ if (__builtin_bcdadd_lt (a, b, 0))

19401

+ *p = 1;

19402

+

19403

+ return ret;

19404

+}

19405

+

19406

+vector_128_t

19407

+do_add_eq (vector_128_t a, vector_128_t b, int *p)

19408

+{

19409

+ vector_128_t ret = __builtin_bcdadd (a, b, 0);

19410

+ if (__builtin_bcdadd_eq (a, b, 0))

19411

+ *p = 1;

19412

+

19413

+ return ret;

19414

+}

19415

+

19416

+vector_128_t

19417

+do_add_gt (vector_128_t a, vector_128_t b, int *p)

19418

+{

19419

+ vector_128_t ret = __builtin_bcdadd (a, b, 0);

19420

+ if (__builtin_bcdadd_gt (a, b, 0))

19421

+ *p = 1;

19422

+

19423

+ return ret;

19424

+}

19425

+

19426

+vector_128_t

19427

+do_add_ov (vector_128_t a, vector_128_t b, int *p)

19428

+{

19429

+ vector_128_t ret = __builtin_bcdadd (a, b, 0);

19430

+ if (__builtin_bcdadd_ov (a, b, 0))

19431

+ *p = 1;

19432

+

19433

+ return ret;

19434

+}

19435

+

19436

+vector_128_t

19437

+do_sub_lt (vector_128_t a, vector_128_t b, int *p)

19438

+{

19439

+ vector_128_t ret = __builtin_bcdsub (a, b, 0);

19440

+ if (__builtin_bcdsub_lt (a, b, 0))

19441

+ *p = 1;

19442

+

19443

+ return ret;

19444

+}

19445

+

19446

+vector_128_t

19447

+do_sub_eq (vector_128_t a, vector_128_t b, int *p)

19448

+{

19449

+ vector_128_t ret = __builtin_bcdsub (a, b, 0);

19450

+ if (__builtin_bcdsub_eq (a, b, 0))

19451

+ *p = 1;

19452

+

19453

+ return ret;

19454

+}

19455

+

19456

+vector_128_t

19457

+do_sub_gt (vector_128_t a, vector_128_t b, int *p)

19458

+{

19459

+ vector_128_t ret = __builtin_bcdsub (a, b, 0);

19460

+ if (__builtin_bcdsub_gt (a, b, 0))

19461

+ *p = 1;

19462

+

19463

+ return ret;

19464

+}

19465

+

19466

+vector_128_t

19467

+do_sub_ov (vector_128_t a, vector_128_t b, int *p)

19468

+{

19469

+ vector_128_t ret = __builtin_bcdsub (a, b, 0);

19470

+ if (__builtin_bcdsub_ov (a, b, 0))

19471

+ *p = 1;

19472

+

19473

+ return ret;

19474

+}

19475

Index: gcc/testsuite/gcc.target/powerpc/pr57949-1.c

19476

===================================================================

19477

--- a/src/gcc/testsuite/gcc.target/powerpc/pr57949-1.c (.../tags/gcc_4_8_2_release)

19478

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr57949-1.c (.../branches/gcc-4_8-branch)

19479

@@ -0,0 +1,20 @@

19480

+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */

19481

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19482

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

19483

+/* { dg-options "-O2 -mcpu=power7 -mno-compat-align-parm" } */

19484

+

19485

+/* Verify that vs is 16-byte aligned with -mcompat-align-parm. */

19486

+

19487

+typedef float v4sf __attribute__ ((vector_size (16)));

19488

+struct s { long m; v4sf v; };

19489

+long n;

19490

+v4sf ve;

19491

+

19492

+void pr57949 (long d1, long d2, long d3, long d4, long d5, long d6,

19493

+ long d7, long d8, long d9, struct s vs) {

19494

+ n = vs.m;

19495

+ ve = vs.v;

19496

+}

19497

+

19498

+/* { dg-final { scan-assembler "li \.\*,144" } } */

19499

+/* { dg-final { scan-assembler "ld \.\*,128\$1\$" } } */

19500

Index: gcc/testsuite/gcc.target/powerpc/atomic-p8.c

19501

===================================================================

19502

--- a/src/gcc/testsuite/gcc.target/powerpc/atomic-p8.c (.../tags/gcc_4_8_2_release)

19503

+++ b/src/gcc/testsuite/gcc.target/powerpc/atomic-p8.c (.../branches/gcc-4_8-branch)

19504

@@ -0,0 +1,237 @@

19505

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

19506

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19507

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19508

+/* { dg-options "-mcpu=power8 -O2" } */

19509

+/* { dg-final { scan-assembler-times "lbarx" 7 } } */

19510

+/* { dg-final { scan-assembler-times "lharx" 7 } } */

19511

+/* { dg-final { scan-assembler-times "lwarx" 7 } } */

19512

+/* { dg-final { scan-assembler-times "ldarx" 7 } } */

19513

+/* { dg-final { scan-assembler-times "lqarx" 7 } } */

19514

+/* { dg-final { scan-assembler-times "stbcx" 7 } } */

19515

+/* { dg-final { scan-assembler-times "sthcx" 7 } } */

19516

+/* { dg-final { scan-assembler-times "stwcx" 7 } } */

19517

+/* { dg-final { scan-assembler-times "stdcx" 7 } } */

19518

+/* { dg-final { scan-assembler-times "stqcx" 7 } } */

19519

+/* { dg-final { scan-assembler-not "bl __atomic" } } */

19520

+/* { dg-final { scan-assembler-times "isync" 20 } } */

19521

+/* { dg-final { scan-assembler-times "lwsync" 10 } } */

19522

+/* { dg-final { scan-assembler-not "mtvsrd" } } */

19523

+/* { dg-final { scan-assembler-not "mtvsrwa" } } */

19524

+/* { dg-final { scan-assembler-not "mtvsrwz" } } */

19525

+/* { dg-final { scan-assembler-not "mfvsrd" } } */

19526

+/* { dg-final { scan-assembler-not "mfvsrwz" } } */

19527

+

19528

+/* Test for the byte atomic operations on power8 using lbarx/stbcx. */

19529

+char

19530

+char_fetch_add_relaxed (char *ptr, int value)

19531

+{

19532

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

19533

+}

19534

+

19535

+char

19536

+char_fetch_sub_consume (char *ptr, int value)

19537

+{

19538

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

19539

+}

19540

+

19541

+char

19542

+char_fetch_and_acquire (char *ptr, int value)

19543

+{

19544

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

19545

+}

19546

+

19547

+char

19548

+char_fetch_ior_release (char *ptr, int value)

19549

+{

19550

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

19551

+}

19552

+

19553

+char

19554

+char_fetch_xor_acq_rel (char *ptr, int value)

19555

+{

19556

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

19557

+}

19558

+

19559

+char

19560

+char_fetch_nand_seq_cst (char *ptr, int value)

19561

+{

19562

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

19563

+}

19564

+

19565

+void

19566

+char_val_compare_and_swap (char *p, int i, int j, char *q)

19567

+{

19568

+ *q = __sync_val_compare_and_swap (p, i, j);

19569

+}

19570

+

19571

+/* Test for the half word atomic operations on power8 using lharx/sthcx. */

19572

+short

19573

+short_fetch_add_relaxed (short *ptr, int value)

19574

+{

19575

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

19576

+}

19577

+

19578

+short

19579

+short_fetch_sub_consume (short *ptr, int value)

19580

+{

19581

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

19582

+}

19583

+

19584

+short

19585

+short_fetch_and_acquire (short *ptr, int value)

19586

+{

19587

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

19588

+}

19589

+

19590

+short

19591

+short_fetch_ior_release (short *ptr, int value)

19592

+{

19593

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

19594

+}

19595

+

19596

+short

19597

+short_fetch_xor_acq_rel (short *ptr, int value)

19598

+{

19599

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

19600

+}

19601

+

19602

+short

19603

+short_fetch_nand_seq_cst (short *ptr, int value)

19604

+{

19605

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

19606

+}

19607

+

19608

+void

19609

+short_val_compare_and_swap (short *p, int i, int j, short *q)

19610

+{

19611

+ *q = __sync_val_compare_and_swap (p, i, j);

19612

+}

19613

+

19614

+/* Test for the word atomic operations on power8 using lwarx/stwcx. */

19615

+int

19616

+int_fetch_add_relaxed (int *ptr, int value)

19617

+{

19618

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

19619

+}

19620

+

19621

+int

19622

+int_fetch_sub_consume (int *ptr, int value)

19623

+{

19624

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

19625

+}

19626

+

19627

+int

19628

+int_fetch_and_acquire (int *ptr, int value)

19629

+{

19630

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

19631

+}

19632

+

19633

+int

19634

+int_fetch_ior_release (int *ptr, int value)

19635

+{

19636

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

19637

+}

19638

+

19639

+int

19640

+int_fetch_xor_acq_rel (int *ptr, int value)

19641

+{

19642

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

19643

+}

19644

+

19645

+int

19646

+int_fetch_nand_seq_cst (int *ptr, int value)

19647

+{

19648

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

19649

+}

19650

+

19651

+void

19652

+int_val_compare_and_swap (int *p, int i, int j, int *q)

19653

+{

19654

+ *q = __sync_val_compare_and_swap (p, i, j);

19655

+}

19656

+

19657

+/* Test for the double word atomic operations on power8 using ldarx/stdcx. */

19658

+long

19659

+long_fetch_add_relaxed (long *ptr, long value)

19660

+{

19661

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

19662

+}

19663

+

19664

+long

19665

+long_fetch_sub_consume (long *ptr, long value)

19666

+{

19667

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

19668

+}

19669

+

19670

+long

19671

+long_fetch_and_acquire (long *ptr, long value)

19672

+{

19673

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

19674

+}

19675

+

19676

+long

19677

+long_fetch_ior_release (long *ptr, long value)

19678

+{

19679

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

19680

+}

19681

+

19682

+long

19683

+long_fetch_xor_acq_rel (long *ptr, long value)

19684

+{

19685

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

19686

+}

19687

+

19688

+long

19689

+long_fetch_nand_seq_cst (long *ptr, long value)

19690

+{

19691

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

19692

+}

19693

+

19694

+void

19695

+long_val_compare_and_swap (long *p, long i, long j, long *q)

19696

+{

19697

+ *q = __sync_val_compare_and_swap (p, i, j);

19698

+}

19699

+

19700

+/* Test for the quad word atomic operations on power8 using ldarx/stdcx. */

19701

+__int128_t

19702

+quad_fetch_add_relaxed (__int128_t *ptr, __int128_t value)

19703

+{

19704

+ return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);

19705

+}

19706

+

19707

+__int128_t

19708

+quad_fetch_sub_consume (__int128_t *ptr, __int128_t value)

19709

+{

19710

+ return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME);

19711

+}

19712

+

19713

+__int128_t

19714

+quad_fetch_and_acquire (__int128_t *ptr, __int128_t value)

19715

+{

19716

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

19717

+}

19718

+

19719

+__int128_t

19720

+quad_fetch_ior_release (__int128_t *ptr, __int128_t value)

19721

+{

19722

+ return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE);

19723

+}

19724

+

19725

+__int128_t

19726

+quad_fetch_xor_acq_rel (__int128_t *ptr, __int128_t value)

19727

+{

19728

+ return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL);

19729

+}

19730

+

19731

+__int128_t

19732

+quad_fetch_nand_seq_cst (__int128_t *ptr, __int128_t value)

19733

+{

19734

+ return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST);

19735

+}

19736

+

19737

+void

19738

+quad_val_compare_and_swap (__int128_t *p, __int128_t i, __int128_t j, __int128_t *q)

19739

+{

19740

+ *q = __sync_val_compare_and_swap (p, i, j);

19741

+}

19742

Index: gcc/testsuite/gcc.target/powerpc/sd-pwr6.c

19743

===================================================================

19744

--- a/src/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c (.../tags/gcc_4_8_2_release)

19745

+++ b/src/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c (.../branches/gcc-4_8-branch)

19746

@@ -0,0 +1,19 @@

19747

+/* { dg-do compile { target { powerpc*-*-* } } } */

19748

+/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */

19749

+/* { dg-require-effective-target powerpc_vsx_ok } */

19750

+/* { dg-options "-O2 -mcpu=power6 -mhard-dfp" } */

19751

+/* { dg-final { scan-assembler-not "lfiwzx" } } */

19752

+/* { dg-final { scan-assembler-times "lfd" 2 } } */

19753

+/* { dg-final { scan-assembler-times "dctdp" 2 } } */

19754

+/* { dg-final { scan-assembler-times "dadd" 1 } } */

19755

+/* { dg-final { scan-assembler-times "drsp" 1 } } */

19756

+

19757

+/* Test that for power6 we need to use a bounce buffer on the stack to load

19758

+ SDmode variables because the power6 does not have a way to directly load

19759

+ 32-bit values from memory. */

19760

+_Decimal32 a;

19761

+

19762

+void inc_dec32 (void)

19763

+{

19764

+ a += (_Decimal32) 1.0;

19765

+}

19766

Index: gcc/testsuite/gcc.target/powerpc/recip-4.c

19767

===================================================================

19768

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-4.c (.../tags/gcc_4_8_2_release)

19769

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-4.c (.../branches/gcc-4_8-branch)

19770

@@ -7,8 +7,8 @@

19771

/* { dg-final { scan-assembler-times "xvnmsub.dp" 2 } } */

19772

/* { dg-final { scan-assembler-times "xvrsqrtesp" 1 } } */

19773

/* { dg-final { scan-assembler-times "xvmsub.sp" 1 } } */

19774

-/* { dg-final { scan-assembler-times "xvmulsp" 4 } } */

19775

-/* { dg-final { scan-assembler-times "xvnmsub.sp" 2 } } */

19776

+/* { dg-final { scan-assembler-times "xvmulsp" 2 } } */

19777

+/* { dg-final { scan-assembler-times "xvnmsub.sp" 1 } } */

19778

19779

#define SIZE 1024

19780

19781

Index: gcc/testsuite/gcc.target/powerpc/no-r11-3.c

19782

===================================================================

19783

--- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-3.c (.../tags/gcc_4_8_2_release)

19784

+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-3.c (.../branches/gcc-4_8-branch)

19785

@@ -1,5 +1,6 @@

19786

/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

19787

/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */

19788

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

19789

/* { dg-options "-O2 -mno-pointers-to-nested-functions" } */

19790

19791

extern void ext_call (int (func) (void));

19792

Index: gcc/testsuite/gcc.target/powerpc/pack02.c

19793

===================================================================

19794

--- a/src/gcc/testsuite/gcc.target/powerpc/pack02.c (.../tags/gcc_4_8_2_release)

19795

+++ b/src/gcc/testsuite/gcc.target/powerpc/pack02.c (.../branches/gcc-4_8-branch)

19796

@@ -0,0 +1,95 @@

19797

+/* { dg-do run { target { powerpc*-*-linux* } } } */

19798

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19799

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

19800

+/* { dg-require-effective-target powerpc_fprs } */

19801

+/* { dg-options "-O2 -mhard-float" } */

19802

+

19803

+#include <stddef.h>

19804

+#include <stdlib.h>

19805

+#include <math.h>

19806

+

19807

+#ifdef DEBUG

19808

+#include <stdio.h>

19809

+#endif

19810

+

19811

+int

19812

+main (void)

19813

+{

19814

+ double high = pow (2.0, 60);

19815

+ double low = 2.0;

19816

+ long double a = ((long double)high) + ((long double)low);

19817

+ double x0 = __builtin_unpack_longdouble (a, 0);

19818

+ double x1 = __builtin_unpack_longdouble (a, 1);

19819

+ long double b = __builtin_pack_longdouble (x0, x1);

19820

+

19821

+#ifdef DEBUG

19822

+ {

19823

+ size_t i;

19824

+ union {

19825

+ long double ld;

19826

+ double d;

19827

+ unsigned char uc[sizeof (long double)];

19828

+ char c[sizeof (long double)];

19829

+ } u;

19830

+

19831

+ printf ("a = 0x");

19832

+ u.ld = a;

19833

+ for (i = 0; i < sizeof (long double); i++)

19834

+ printf ("%.2x", u.uc[i]);

19835

+

19836

+ printf (", %Lg\n", a);

19837

+

19838

+ printf ("b = 0x");

19839

+ u.ld = b;

19840

+ for (i = 0; i < sizeof (long double); i++)

19841

+ printf ("%.2x", u.uc[i]);

19842

+

19843

+ printf (", %Lg\n", b);

19844

+

19845

+ printf ("hi = 0x");

19846

+ u.d = high;

19847

+ for (i = 0; i < sizeof (double); i++)

19848

+ printf ("%.2x", u.uc[i]);

19849

+

19850

+ printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", high);

19851

+

19852

+ printf ("lo = 0x");

19853

+ u.d = low;

19854

+ for (i = 0; i < sizeof (double); i++)

19855

+ printf ("%.2x", u.uc[i]);

19856

+

19857

+ printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", low);

19858

+

19859

+ printf ("x0 = 0x");

19860

+ u.d = x0;

19861

+ for (i = 0; i < sizeof (double); i++)

19862

+ printf ("%.2x", u.uc[i]);

19863

+

19864

+ printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", x0);

19865

+

19866

+ printf ("x1 = 0x");

19867

+ u.d = x1;

19868

+ for (i = 0; i < sizeof (double); i++)

19869

+ printf ("%.2x", u.uc[i]);

19870

+

19871

+ printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", x1);

19872

+ }

19873

+#endif

19874

+

19875

+ if (high != x0)

19876

+ abort ();

19877

+

19878

+ if (low != x1)

19879

+ abort ();

19880

+

19881

+ if (a != b)

19882

+ abort ();

19883

+

19884

+ if (x0 != high)

19885

+ abort ();

19886

+

19887

+ if (x1 != low)

19888

+ abort ();

19889

+

19890

+ return 0;

19891

+}

19892

Index: gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c

19893

===================================================================

19894

--- a/src/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c (.../tags/gcc_4_8_2_release)

19895

+++ b/src/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c (.../branches/gcc-4_8-branch)

19896

@@ -0,0 +1,130 @@

19897

+/* { dg-do compile { target { powerpc*-*-* } } } */

19898

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

19899

+/* { dg-require-effective-target powerpc_p8vector_ok } */

19900

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

19901

+

19902

+typedef vector unsigned long long crypto_t;

19903

+typedef vector unsigned long long v2di_t;

19904

+typedef vector unsigned int v4si_t;

19905

+typedef vector unsigned short v8hi_t;

19906

+typedef vector unsigned char v16qi_t;

19907

+

19908

+crypto_t crpyto1 (crypto_t a)

19909

+{

19910

+ return __builtin_crypto_vsbox (a);

19911

+}

19912

+

19913

+crypto_t crypto2 (crypto_t a, crypto_t b)

19914

+{

19915

+ return __builtin_crypto_vcipher (a, b);

19916

+}

19917

+

19918

+crypto_t crypto3 (crypto_t a, crypto_t b)

19919

+{

19920

+ return __builtin_crypto_vcipherlast (a, b);

19921

+}

19922

+

19923

+crypto_t crypto4 (crypto_t a, crypto_t b)

19924

+{

19925

+ return __builtin_crypto_vncipher (a, b);

19926

+}

19927

+

19928

+crypto_t crypto5 (crypto_t a, crypto_t b)

19929

+{

19930

+ return __builtin_crypto_vncipherlast (a, b);

19931

+}

19932

+

19933

+v16qi_t crypto6a (v16qi_t a, v16qi_t b, v16qi_t c)

19934

+{

19935

+ return __builtin_crypto_vpermxor (a, b, c);

19936

+}

19937

+

19938

+v8hi_t crypto6b (v8hi_t a, v8hi_t b, v8hi_t c)

19939

+{

19940

+ return __builtin_crypto_vpermxor (a, b, c);

19941

+}

19942

+

19943

+v4si_t crypto6c (v4si_t a, v4si_t b, v4si_t c)

19944

+{

19945

+ return __builtin_crypto_vpermxor (a, b, c);

19946

+}

19947

+

19948

+v2di_t crypto6d (v2di_t a, v2di_t b, v2di_t c)

19949

+{

19950

+ return __builtin_crypto_vpermxor (a, b, c);

19951

+}

19952

+

19953

+v16qi_t crypto7a (v16qi_t a, v16qi_t b)

19954

+{

19955

+ return __builtin_crypto_vpmsumb (a, b);

19956

+}

19957

+

19958

+v16qi_t crypto7b (v16qi_t a, v16qi_t b)

19959

+{

19960

+ return __builtin_crypto_vpmsum (a, b);

19961

+}

19962

+

19963

+v8hi_t crypto7c (v8hi_t a, v8hi_t b)

19964

+{

19965

+ return __builtin_crypto_vpmsumh (a, b);

19966

+}

19967

+

19968

+v8hi_t crypto7d (v8hi_t a, v8hi_t b)

19969

+{

19970

+ return __builtin_crypto_vpmsum (a, b);

19971

+}

19972

+

19973

+v4si_t crypto7e (v4si_t a, v4si_t b)

19974

+{

19975

+ return __builtin_crypto_vpmsumw (a, b);

19976

+}

19977

+

19978

+v4si_t crypto7f (v4si_t a, v4si_t b)

19979

+{

19980

+ return __builtin_crypto_vpmsum (a, b);

19981

+}

19982

+

19983

+v2di_t crypto7g (v2di_t a, v2di_t b)

19984

+{

19985

+ return __builtin_crypto_vpmsumd (a, b);

19986

+}

19987

+

19988

+v2di_t crypto7h (v2di_t a, v2di_t b)

19989

+{

19990

+ return __builtin_crypto_vpmsum (a, b);

19991

+}

19992

+

19993

+v2di_t crypto8a (v2di_t a)

19994

+{

19995

+ return __builtin_crypto_vshasigmad (a, 0, 8);

19996

+}

19997

+

19998

+v2di_t crypto8b (v2di_t a)

19999

+{

20000

+ return __builtin_crypto_vshasigma (a, 0, 8);

20001

+}

20002

+

20003

+v4si_t crypto8c (v4si_t a)

20004

+{

20005

+ return __builtin_crypto_vshasigmaw (a, 1, 15);

20006

+}

20007

+

20008

+v4si_t crypto8d (v4si_t a)

20009

+{

20010

+ return __builtin_crypto_vshasigma (a, 1, 15);

20011

+}

20012

+

20013

+/* Note space is used after the instruction so that vcipherlast does not match

20014

+ vcipher. */

20015

+/* { dg-final { scan-assembler-times "vcipher " 1 } } */

20016

+/* { dg-final { scan-assembler-times "vcipherlast " 1 } } */

20017

+/* { dg-final { scan-assembler-times "vncipher " 1 } } */

20018

+/* { dg-final { scan-assembler-times "vncipherlast " 1 } } */

20019

+/* { dg-final { scan-assembler-times "vpermxor " 4 } } */

20020

+/* { dg-final { scan-assembler-times "vpmsumb " 2 } } */

20021

+/* { dg-final { scan-assembler-times "vpmsumd " 2 } } */

20022

+/* { dg-final { scan-assembler-times "vpmsumh " 2 } } */

20023

+/* { dg-final { scan-assembler-times "vpmsumw " 2 } } */

20024

+/* { dg-final { scan-assembler-times "vsbox " 1 } } */

20025

+/* { dg-final { scan-assembler-times "vshasigmad " 2 } } */

20026

+/* { dg-final { scan-assembler-times "vshasigmaw " 2 } } */

20027

Index: gcc/testsuite/gcc.target/powerpc/pr42747.c

20028

===================================================================

20029

--- a/src/gcc/testsuite/gcc.target/powerpc/pr42747.c (.../tags/gcc_4_8_2_release)

20030

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr42747.c (.../branches/gcc-4_8-branch)

20031

@@ -5,4 +5,4 @@

20032

20033

double foo (double x) { return __builtin_sqrt (x); }

20034

20035

-/* { dg-final { scan-assembler "xssqrtdp" } } */

20036

+/* { dg-final { scan-assembler "xssqrtdp\|fsqrt" } } */

20037

Index: gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c

20038

===================================================================

20039

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c (.../tags/gcc_4_8_2_release)

20040

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c (.../branches/gcc-4_8-branch)

20041

@@ -0,0 +1,26 @@

20042

+/* Test generation of DFP instructions for POWER6. */

20043

+/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */

20044

+/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */

20045

+

20046

+/* { dg-final { scan-assembler-times "fneg" 1 } } */

20047

+/* { dg-final { scan-assembler-times "fabs" 1 } } */

20048

+/* { dg-final { scan-assembler-times "fnabs" 1 } } */

20049

+/* { dg-final { scan-assembler-times "fmr" 0 } } */

20050

+

20051

+_Decimal64

20052

+func1 (_Decimal64 a, _Decimal64 b)

20053

+{

20054

+ return -b;

20055

+}

20056

+

20057

+_Decimal64

20058

+func2 (_Decimal64 a, _Decimal64 b)

20059

+{

20060

+ return __builtin_fabsd64 (b);

20061

+}

20062

+

20063

+_Decimal64

20064

+func3 (_Decimal64 a, _Decimal64 b)

20065

+{

20066

+ return - __builtin_fabsd64 (b);

20067

+}

20068

Index: gcc/testsuite/gcc.target/powerpc/direct-move-float1.c

20069

===================================================================

20070

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c (.../tags/gcc_4_8_2_release)

20071

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c (.../branches/gcc-4_8-branch)

20072

@@ -0,0 +1,18 @@

20073

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

20074

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20075

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

20076

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20077

+/* { dg-options "-mcpu=power8 -O2" } */

20078

+/* { dg-final { scan-assembler "mtvsrd" } } */

20079

+/* { dg-final { scan-assembler "mfvsrd" } } */

20080

+/* { dg-final { scan-assembler "xscvdpspn" } } */

20081

+/* { dg-final { scan-assembler "xscvspdpn" } } */

20082

+

20083

+/* Check code generation for direct move for float types. */

20084

+

20085

+#define TYPE float

20086

+#define IS_FLOAT 1

20087

+#define NO_ALTIVEC 1

20088

+#define VSX_REG_ATTR "ww"

20089

+

20090

+#include "direct-move.h"

20091

Index: gcc/testsuite/gcc.target/powerpc/dfp-td-2.c

20092

===================================================================

20093

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-td-2.c (.../tags/gcc_4_8_2_release)

20094

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-td-2.c (.../branches/gcc-4_8-branch)

20095

@@ -0,0 +1,29 @@

20096

+/* Test generation of DFP instructions for POWER6. */

20097

+/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */

20098

+/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */

20099

+

20100

+/* { dg-final { scan-assembler-times "fneg" 1 } } */

20101

+/* { dg-final { scan-assembler-times "fabs" 1 } } */

20102

+/* { dg-final { scan-assembler-times "fnabs" 1 } } */

20103

+/* { dg-final { scan-assembler-times "fmr" 0 } } */

20104

+

20105

+/* These tests verify we only generate fneg, fabs and fnabs

20106

+ instructions and no fmr's since these are done in place. */

20107

+

20108

+_Decimal128

20109

+func1 (_Decimal128 a)

20110

+{

20111

+ return -a;

20112

+}

20113

+

20114

+_Decimal128

20115

+func2 (_Decimal128 a)

20116

+{

20117

+ return __builtin_fabsd128 (a);

20118

+}

20119

+

20120

+_Decimal128

20121

+func3 (_Decimal128 a)

20122

+{

20123

+ return - __builtin_fabsd128 (a);

20124

+}

20125

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c

20126

===================================================================

20127

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c (.../tags/gcc_4_8_2_release)

20128

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c (.../branches/gcc-4_8-branch)

20129

@@ -0,0 +1,105 @@

20130

+/* { dg-do compile { target { powerpc*-*-* } } } */

20131

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20132

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20133

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

20134

+

20135

+#include <altivec.h>

20136

+

20137

+#ifndef SIZE

20138

+#define SIZE 1024

20139

+#endif

20140

+

20141

+#ifndef ALIGN

20142

+#define ALIGN 32

20143

+#endif

20144

+

20145

+#ifndef ATTR_ALIGN

20146

+#define ATTR_ALIGN __attribute__((__aligned__(ALIGN)))

20147

+#endif

20148

+

20149

+#define DOIT(TYPE, PREFIX) \

20150

+TYPE PREFIX ## _eqv_builtin (TYPE a, TYPE b) \

20151

+{ \

20152

+ return vec_eqv (a, b); \

20153

+} \

20154

+ \

20155

+TYPE PREFIX ## _eqv_arith (TYPE a, TYPE b) \

20156

+{ \

20157

+ return ~(a ^ b); \

20158

+} \

20159

+ \

20160

+TYPE PREFIX ## _nand_builtin (TYPE a, TYPE b) \

20161

+{ \

20162

+ return vec_nand (a, b); \

20163

+} \

20164

+ \

20165

+TYPE PREFIX ## _nand_arith1 (TYPE a, TYPE b) \

20166

+{ \

20167

+ return ~(a & b); \

20168

+} \

20169

+ \

20170

+TYPE PREFIX ## _nand_arith2 (TYPE a, TYPE b) \

20171

+{ \

20172

+ return (~a) | (~b); \

20173

+} \

20174

+ \

20175

+TYPE PREFIX ## _orc_builtin (TYPE a, TYPE b) \

20176

+{ \

20177

+ return vec_orc (a, b); \

20178

+} \

20179

+ \

20180

+TYPE PREFIX ## _orc_arith1 (TYPE a, TYPE b) \

20181

+{ \

20182

+ return (~ a) | b; \

20183

+} \

20184

+ \

20185

+TYPE PREFIX ## _orc_arith2 (TYPE a, TYPE b) \

20186

+{ \

20187

+ return a | (~ b); \

20188

+}

20189

+

20190

+#define DOIT_FLOAT(TYPE, PREFIX) \

20191

+TYPE PREFIX ## _eqv_builtin (TYPE a, TYPE b) \

20192

+{ \

20193

+ return vec_eqv (a, b); \

20194

+} \

20195

+ \

20196

+TYPE PREFIX ## _nand_builtin (TYPE a, TYPE b) \

20197

+{ \

20198

+ return vec_nand (a, b); \

20199

+} \

20200

+ \

20201

+TYPE PREFIX ## _orc_builtin (TYPE a, TYPE b) \

20202

+{ \

20203

+ return vec_orc (a, b); \

20204

+}

20205

+

20206

+typedef vector signed char sign_char_vec;

20207

+typedef vector short sign_short_vec;

20208

+typedef vector int sign_int_vec;

20209

+typedef vector long long sign_llong_vec;

20210

+

20211

+typedef vector unsigned char uns_char_vec;

20212

+typedef vector unsigned short uns_short_vec;

20213

+typedef vector unsigned int uns_int_vec;

20214

+typedef vector unsigned long long uns_llong_vec;

20215

+

20216

+typedef vector float float_vec;

20217

+typedef vector double double_vec;

20218

+

20219

+DOIT(sign_char_vec, sign_char)

20220

+DOIT(sign_short_vec, sign_short)

20221

+DOIT(sign_int_vec, sign_int)

20222

+DOIT(sign_llong_vec, sign_llong)

20223

+

20224

+DOIT(uns_char_vec, uns_char)

20225

+DOIT(uns_short_vec, uns_short)

20226

+DOIT(uns_int_vec, uns_int)

20227

+DOIT(uns_llong_vec, uns_llong)

20228

+

20229

+DOIT_FLOAT(float_vec, float)

20230

+DOIT_FLOAT(double_vec, double)

20231

+

20232

+/* { dg-final { scan-assembler-times "xxleqv" 18 } } */

20233

+/* { dg-final { scan-assembler-times "xxlnand" 26 } } */

20234

+/* { dg-final { scan-assembler-times "xxlorc" 26 } } */

20235

Index: gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c

20236

===================================================================

20237

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c (.../tags/gcc_4_8_2_release)

20238

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c (.../branches/gcc-4_8-branch)

20239

@@ -0,0 +1,87 @@

20240

+/* { dg-do compile { target { powerpc*-*-* } } } */

20241

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20242

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20243

+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */

20244

+

20245

+#ifndef SIZE

20246

+#define SIZE 1024

20247

+#endif

20248

+

20249

+#ifndef ALIGN

20250

+#define ALIGN 32

20251

+#endif

20252

+

20253

+#ifndef ATTR_ALIGN

20254

+#define ATTR_ALIGN __attribute__((__aligned__(ALIGN)))

20255

+#endif

20256

+

20257

+#ifndef TYPE

20258

+#define TYPE unsigned int

20259

+#endif

20260

+

20261

+TYPE in1 [SIZE] ATTR_ALIGN;

20262

+TYPE in2 [SIZE] ATTR_ALIGN;

20263

+TYPE eqv [SIZE] ATTR_ALIGN;

20264

+TYPE nand1[SIZE] ATTR_ALIGN;

20265

+TYPE nand2[SIZE] ATTR_ALIGN;

20266

+TYPE orc1 [SIZE] ATTR_ALIGN;

20267

+TYPE orc2 [SIZE] ATTR_ALIGN;

20268

+

20269

+void

20270

+do_eqv (void)

20271

+{

20272

+ unsigned long i;

20273

+

20274

+ for (i = 0; i < SIZE; i++)

20275

+ {

20276

+ eqv[i] = ~(in1[i] ^ in2[i]);

20277

+ }

20278

+}

20279

+

20280

+void

20281

+do_nand1 (void)

20282

+{

20283

+ unsigned long i;

20284

+

20285

+ for (i = 0; i < SIZE; i++)

20286

+ {

20287

+ nand1[i] = ~(in1[i] & in2[i]);

20288

+ }

20289

+}

20290

+

20291

+void

20292

+do_nand2 (void)

20293

+{

20294

+ unsigned long i;

20295

+

20296

+ for (i = 0; i < SIZE; i++)

20297

+ {

20298

+ nand2[i] = (~in1[i]) | (~in2[i]);

20299

+ }

20300

+}

20301

+

20302

+void

20303

+do_orc1 (void)

20304

+{

20305

+ unsigned long i;

20306

+

20307

+ for (i = 0; i < SIZE; i++)

20308

+ {

20309

+ orc1[i] = (~in1[i]) | in2[i];

20310

+ }

20311

+}

20312

+

20313

+void

20314

+do_orc2 (void)

20315

+{

20316

+ unsigned long i;

20317

+

20318

+ for (i = 0; i < SIZE; i++)

20319

+ {

20320

+ orc1[i] = in1[i] | (~in2[i]);

20321

+ }

20322

+}

20323

+

20324

+/* { dg-final { scan-assembler-times "xxleqv" 1 } } */

20325

+/* { dg-final { scan-assembler-times "xxlnand" 2 } } */

20326

+/* { dg-final { scan-assembler-times "xxlorc" 2 } } */

20327

Index: gcc/testsuite/gcc.target/powerpc/pr57949-2.c

20328

===================================================================

20329

--- a/src/gcc/testsuite/gcc.target/powerpc/pr57949-2.c (.../tags/gcc_4_8_2_release)

20330

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr57949-2.c (.../branches/gcc-4_8-branch)

20331

@@ -0,0 +1,20 @@

20332

+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */

20333

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20334

+/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */

20335

+/* { dg-options "-O2 -mcpu=power7" } */

20336

+

20337

+/* Verify that vs is not 16-byte aligned in the absence of -mno-compat-align-parm. */

20338

+

20339

+typedef float v4sf __attribute__ ((vector_size (16)));

20340

+struct s { long m; v4sf v; };

20341

+long n;

20342

+v4sf ve;

20343

+

20344

+void pr57949 (long d1, long d2, long d3, long d4, long d5, long d6,

20345

+ long d7, long d8, long d9, struct s vs) {

20346

+ n = vs.m;

20347

+ ve = vs.v;

20348

+}

20349

+

20350

+/* { dg-final { scan-assembler "ld .\*,136\$1\$" } } */

20351

+/* { dg-final { scan-assembler "ld .\*,120\$1\$" } } */

20352

Index: gcc/testsuite/gcc.target/powerpc/recip-5.c

20353

===================================================================

20354

--- a/src/gcc/testsuite/gcc.target/powerpc/recip-5.c (.../tags/gcc_4_8_2_release)

20355

+++ b/src/gcc/testsuite/gcc.target/powerpc/recip-5.c (.../branches/gcc-4_8-branch)

20356

@@ -4,8 +4,16 @@

20357

/* { dg-options "-O3 -ftree-vectorize -mrecip=all -ffast-math -mcpu=power7 -fno-unroll-loops" } */

20358

/* { dg-final { scan-assembler-times "xvredp" 4 } } */

20359

/* { dg-final { scan-assembler-times "xvresp" 5 } } */

20360

-/* { dg-final { scan-assembler-times "xsredp" 2 } } */

20361

-/* { dg-final { scan-assembler-times "fres" 2 } } */

20362

+/* { dg-final { scan-assembler-times "xsredp\|fre\ " 2 } } */

20363

+/* { dg-final { scan-assembler-times "xsresp\|fres" 2 } } */

20364

+/* { dg-final { scan-assembler-times "xsmulsp\|fmuls" 2 } } */

20365

+/* { dg-final { scan-assembler-times "xsnmsub.sp\|fnmsubs" 2 } } */

20366

+/* { dg-final { scan-assembler-times "xsmuldp\|fmul\ " 2 } } */

20367

+/* { dg-final { scan-assembler-times "xsnmsub.dp\|fnmsub\ " 4 } } */

20368

+/* { dg-final { scan-assembler-times "xvmulsp" 7 } } */

20369

+/* { dg-final { scan-assembler-times "xvnmsub.sp" 5 } } */

20370

+/* { dg-final { scan-assembler-times "xvmuldp" 6 } } */

20371

+/* { dg-final { scan-assembler-times "xvnmsub.dp" 8 } } */

20372

20373

#include <altivec.h>

20374

20375

Index: gcc/testsuite/gcc.target/powerpc/pack03.c

20376

===================================================================

20377

--- a/src/gcc/testsuite/gcc.target/powerpc/pack03.c (.../tags/gcc_4_8_2_release)

20378

+++ b/src/gcc/testsuite/gcc.target/powerpc/pack03.c (.../branches/gcc-4_8-branch)

20379

@@ -0,0 +1,88 @@

20380

+/* { dg-do run { target { powerpc*-*-linux* } } } */

20381

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20382

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

20383

+/* { dg-require-effective-target dfp_hw } */

20384

+/* { dg-options "-O2 -mhard-dfp" } */

20385

+

20386

+#include <stddef.h>

20387

+#include <stdlib.h>

20388

+#include <math.h>

20389

+

20390

+#ifdef DEBUG

20391

+#include <stdio.h>

20392

+#endif

20393

+

20394

+int

20395

+main (void)

20396

+{

20397

+ _Decimal128 one = (_Decimal128)1.0;

20398

+ _Decimal128 two = (_Decimal128)2.0;

20399

+ _Decimal128 ten = (_Decimal128)10.0;

20400

+ _Decimal128 a = one;

20401

+ _Decimal128 b;

20402

+ _Decimal128 c;

20403

+ unsigned long long x0;

20404

+ unsigned long long x1;

20405

+ size_t i;

20406

+

20407

+ for (i = 0; i < 25; i++)

20408

+ a *= ten;

20409

+

20410

+ a += two;

20411

+

20412

+ x0 = __builtin_unpack_dec128 (a, 0);

20413

+ x1 = __builtin_unpack_dec128 (a, 1);

20414

+ b = __builtin_pack_dec128 (x0, x1);

20415

+ c = __builtin_dscliq (one, 25) + two;

20416

+

20417

+#ifdef DEBUG

20418

+ {

20419

+ union {

20420

+ _Decimal128 d;

20421

+ unsigned long long ull;

20422

+ unsigned char uc[sizeof (_Decimal128)];

20423

+ } u;

20424

+

20425

+ printf ("a = 0x");

20426

+ u.d = a;

20427

+ for (i = 0; i < sizeof (_Decimal128); i++)

20428

+ printf ("%.2x", u.uc[i]);

20429

+

20430

+ printf (", %Lg\n", (long double)a);

20431

+

20432

+ printf ("b = 0x");

20433

+ u.d = b;

20434

+ for (i = 0; i < sizeof (_Decimal128); i++)

20435

+ printf ("%.2x", u.uc[i]);

20436

+

20437

+ printf (", %Lg\n", (long double)b);

20438

+

20439

+ printf ("c = 0x");

20440

+ u.d = c;

20441

+ for (i = 0; i < sizeof (_Decimal128); i++)

20442

+ printf ("%.2x", u.uc[i]);

20443

+

20444

+ printf (", %Lg\n", (long double)c);

20445

+

20446

+ printf ("x0 = 0x");

20447

+ u.ull = x0;

20448

+ for (i = 0; i < sizeof (unsigned long long); i++)

20449

+ printf ("%.2x", u.uc[i]);

20450

+

20451

+ printf ("\nx1 = 0x");

20452

+ u.ull = x1;

20453

+ for (i = 0; i < sizeof (unsigned long long); i++)

20454

+ printf ("%.2x", u.uc[i]);

20455

+

20456

+ printf ("\n");

20457

+ }

20458

+#endif

20459

+

20460

+ if (a != b)

20461

+ abort ();

20462

+

20463

+ if (a != c)

20464

+ abort ();

20465

+

20466

+ return 0;

20467

+}

20468

Index: gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c

20469

===================================================================

20470

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c (.../tags/gcc_4_8_2_release)

20471

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c (.../branches/gcc-4_8-branch)

20472

@@ -89,8 +89,10 @@

20473

long a1;

20474

long a2;

20475

long a3;

20476

+#if _CALL_ELF != 2

20477

long a4;

20478

long a5;

20479

+#endif

20480

parm_t slot[100];

20481

} stack_frame_t;

20482

20483

Index: gcc/testsuite/gcc.target/powerpc/direct-move-float2.c

20484

===================================================================

20485

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c (.../tags/gcc_4_8_2_release)

20486

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c (.../branches/gcc-4_8-branch)

20487

@@ -0,0 +1,15 @@

20488

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

20489

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20490

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

20491

+/* { dg-require-effective-target p8vector_hw } */

20492

+/* { dg-options "-mcpu=power8 -O2" } */

20493

+

20494

+/* Check whether we get the right bits for direct move at runtime. */

20495

+

20496

+#define TYPE float

20497

+#define IS_FLOAT 1

20498

+#define NO_ALTIVEC 1

20499

+#define DO_MAIN

20500

+#define VSX_REG_ATTR "ww"

20501

+

20502

+#include "direct-move.h"

20503

Index: gcc/testsuite/gcc.target/powerpc/direct-move-double1.c

20504

===================================================================

20505

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c (.../tags/gcc_4_8_2_release)

20506

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c (.../branches/gcc-4_8-branch)

20507

@@ -0,0 +1,16 @@

20508

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

20509

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20510

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

20511

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20512

+/* { dg-options "-mcpu=power8 -O2" } */

20513

+/* { dg-final { scan-assembler "mtvsrd" } } */

20514

+/* { dg-final { scan-assembler "mfvsrd" } } */

20515

+

20516

+/* Check code generation for direct move for double types. */

20517

+

20518

+#define TYPE double

20519

+#define IS_FLOAT 1

20520

+#define NO_ALTIVEC 1

20521

+#define VSX_REG_ATTR "ws"

20522

+

20523

+#include "direct-move.h"

20524

Index: gcc/testsuite/gcc.target/powerpc/dfp-td-3.c

20525

===================================================================

20526

--- a/src/gcc/testsuite/gcc.target/powerpc/dfp-td-3.c (.../tags/gcc_4_8_2_release)

20527

+++ b/src/gcc/testsuite/gcc.target/powerpc/dfp-td-3.c (.../branches/gcc-4_8-branch)

20528

@@ -0,0 +1,29 @@

20529

+/* Test generation of DFP instructions for POWER6. */

20530

+/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */

20531

+/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */

20532

+

20533

+/* { dg-final { scan-assembler-times "fneg" 1 } } */

20534

+/* { dg-final { scan-assembler-times "fabs" 1 } } */

20535

+/* { dg-final { scan-assembler-times "fnabs" 1 } } */

20536

+/* { dg-final { scan-assembler-times "fmr" 3 } } */

20537

+

20538

+/* These tests verify we generate fneg, fabs and fnabs and

20539

+ associated fmr's since these are not done in place. */

20540

+

20541

+_Decimal128

20542

+func1 (_Decimal128 a, _Decimal128 b)

20543

+{

20544

+ return -b;

20545

+}

20546

+

20547

+_Decimal128

20548

+func2 (_Decimal128 a, _Decimal128 b)

20549

+{

20550

+ return __builtin_fabsd128 (b);

20551

+}

20552

+

20553

+_Decimal128

20554

+func3 (_Decimal128 a, _Decimal128 b)

20555

+{

20556

+ return - __builtin_fabsd128 (b);

20557

+}

20558

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c

20559

===================================================================

20560

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c (.../tags/gcc_4_8_2_release)

20561

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c (.../branches/gcc-4_8-branch)

20562

@@ -0,0 +1,10 @@

20563

+/* { dg-do compile { target { powerpc*-*-* } } } */

20564

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20565

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20566

+/* { dg-options "-mcpu=power8 -O2" } */

20567

+

20568

+vector float dbl_to_float_p8 (double x) { return __builtin_vsx_xscvdpspn (x); }

20569

+double float_to_dbl_p8 (vector float x) { return __builtin_vsx_xscvspdpn (x); }

20570

+

20571

+/* { dg-final { scan-assembler "xscvdpspn" } } */

20572

+/* { dg-final { scan-assembler "xscvspdpn" } } */

20573

Index: gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c

20574

===================================================================

20575

--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c (.../tags/gcc_4_8_2_release)

20576

+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c (.../branches/gcc-4_8-branch)

20577

@@ -16,9 +16,9 @@

20578

/* { dg-final { scan-assembler "xvrspiz" } } */

20579

/* { dg-final { scan-assembler "xsrdpi" } } */

20580

/* { dg-final { scan-assembler "xsrdpic" } } */

20581

-/* { dg-final { scan-assembler "xsrdpim" } } */

20582

-/* { dg-final { scan-assembler "xsrdpip" } } */

20583

-/* { dg-final { scan-assembler "xsrdpiz" } } */

20584

+/* { dg-final { scan-assembler "xsrdpim\|frim" } } */

20585

+/* { dg-final { scan-assembler "xsrdpip\|frip" } } */

20586

+/* { dg-final { scan-assembler "xsrdpiz\|friz" } } */

20587

/* { dg-final { scan-assembler "xsmaxdp" } } */

20588

/* { dg-final { scan-assembler "xsmindp" } } */

20589

/* { dg-final { scan-assembler "xxland" } } */

20590

Index: gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c

20591

===================================================================

20592

--- a/src/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c (.../tags/gcc_4_8_2_release)

20593

+++ b/src/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c (.../branches/gcc-4_8-branch)

20594

@@ -0,0 +1,51 @@

20595

+/* { dg-do compile { target { powerpc*-*-* } } } */

20596

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20597

+/* { dg-require-effective-target powerpc_htm_ok } */

20598

+/* { dg-options "-O2 -mhtm" } */

20599

+

20600

+/* { dg-final { scan-assembler-times "tbegin\\." 1 } } */

20601

+/* { dg-final { scan-assembler-times "tend\\." 2 } } */

20602

+/* { dg-final { scan-assembler-times "tabort\\." 2 } } */

20603

+/* { dg-final { scan-assembler-times "tabortdc\\." 1 } } */

20604

+/* { dg-final { scan-assembler-times "tabortdci\\." 1 } } */

20605

+/* { dg-final { scan-assembler-times "tabortwc\\." 1 } } */

20606

+/* { dg-final { scan-assembler-times "tabortwci\\." 2 } } */

20607

+/* { dg-final { scan-assembler-times "tcheck\\." 1 } } */

20608

+/* { dg-final { scan-assembler-times "trechkpt\\." 1 } } */

20609

+/* { dg-final { scan-assembler-times "treclaim\\." 1 } } */

20610

+/* { dg-final { scan-assembler-times "tsr\\." 3 } } */

20611

+/* { dg-final { scan-assembler-times "mfspr" 4 } } */

20612

+/* { dg-final { scan-assembler-times "mtspr" 4 } } */

20613

+

20614

+void use_builtins (long *p, char code, long *a, long *b)

20615

+{

20616

+ p[0] = __builtin_tbegin (0);

20617

+ p[1] = __builtin_tend (0);

20618

+ p[2] = __builtin_tendall ();

20619

+ p[3] = __builtin_tabort (0);

20620

+ p[4] = __builtin_tabort (code);

20621

+

20622

+ p[5] = __builtin_tabortdc (0xf, a[5], b[5]);

20623

+ p[6] = __builtin_tabortdci (0xf, a[6], 13);

20624

+ p[7] = __builtin_tabortwc (0xf, a[7], b[7]);

20625

+ p[8] = __builtin_tabortwci (0xf, a[8], 13);

20626

+

20627

+ p[9] = __builtin_tcheck (5);

20628

+ p[10] = __builtin_trechkpt ();

20629

+ p[11] = __builtin_treclaim (0);

20630

+ p[12] = __builtin_tresume ();

20631

+ p[13] = __builtin_tsuspend ();

20632

+ p[14] = __builtin_tsr (0);

20633

+ p[15] = __builtin_ttest (); /* This expands to a tabortwci. */

20634

+

20635

+

20636

+ p[16] = __builtin_get_texasr ();

20637

+ p[17] = __builtin_get_texasru ();

20638

+ p[18] = __builtin_get_tfhar ();

20639

+ p[19] = __builtin_get_tfiar ();

20640

+

20641

+ __builtin_set_texasr (a[20]);

20642

+ __builtin_set_texasru (a[21]);

20643

+ __builtin_set_tfhar (a[22]);

20644

+ __builtin_set_tfiar (a[23]);

20645

+}

20646

Index: gcc/testsuite/gcc.target/powerpc/bool.c

20647

===================================================================

20648

--- a/src/gcc/testsuite/gcc.target/powerpc/bool.c (.../tags/gcc_4_8_2_release)

20649

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool.c (.../branches/gcc-4_8-branch)

20650

@@ -0,0 +1,14 @@

20651

+/* { dg-do compile { target { powerpc*-*-* } } } */

20652

+/* { dg-options "-O2" } */

20653

+/* { dg-final { scan-assembler "eqv" } } */

20654

+/* { dg-final { scan-assembler "nand" } } */

20655

+/* { dg-final { scan-assembler "nor" } } */

20656

+

20657

+#ifndef TYPE

20658

+#define TYPE unsigned long

20659

+#endif

20660

+

20661

+TYPE op1 (TYPE a, TYPE b) { return ~(a ^ b); } /* eqv */

20662

+TYPE op2 (TYPE a, TYPE b) { return ~(a & b); } /* nand */

20663

+TYPE op3 (TYPE a, TYPE b) { return ~(a | b); } /* nor */

20664

+

20665

Index: gcc/testsuite/gcc.target/powerpc/bool2-p5.c

20666

===================================================================

20667

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-p5.c (.../tags/gcc_4_8_2_release)

20668

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-p5.c (.../branches/gcc-4_8-branch)

20669

@@ -0,0 +1,32 @@

20670

+/* { dg-do compile { target { powerpc*-*-* } } } */

20671

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20672

+/* { dg-require-effective-target powerpc_altivec_ok } */

20673

+/* { dg-options "-O2 -mcpu=power5 -mabi=altivec -mno-altivec -mno-vsx" } */

20674

+/* { dg-final { scan-assembler "\[ \t\]and " } } */

20675

+/* { dg-final { scan-assembler "\[ \t\]or " } } */

20676

+/* { dg-final { scan-assembler "\[ \t\]xor " } } */

20677

+/* { dg-final { scan-assembler "\[ \t\]nor " } } */

20678

+/* { dg-final { scan-assembler "\[ \t\]andc " } } */

20679

+/* { dg-final { scan-assembler "\[ \t\]eqv " } } */

20680

+/* { dg-final { scan-assembler "\[ \t\]orc " } } */

20681

+/* { dg-final { scan-assembler "\[ \t\]nand " } } */

20682

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

20683

+/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */

20684

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

20685

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

20686

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

20687

+/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */

20688

+/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */

20689

+/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */

20690

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */

20691

+/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */

20692

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

20693

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

20694

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

20695

+

20696

+#ifndef TYPE

20697

+typedef int v4si __attribute__ ((vector_size (16)));

20698

+#define TYPE v4si

20699

+#endif

20700

+

20701

+#include "bool2.h"

20702

Index: gcc/testsuite/gcc.target/powerpc/fusion.c

20703

===================================================================

20704

--- a/src/gcc/testsuite/gcc.target/powerpc/fusion.c (.../tags/gcc_4_8_2_release)

20705

+++ b/src/gcc/testsuite/gcc.target/powerpc/fusion.c (.../branches/gcc-4_8-branch)

20706

@@ -0,0 +1,24 @@

20707

+/* { dg-do compile { target { powerpc*-*-* } } } */

20708

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20709

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

20710

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20711

+/* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */

20712

+

20713

+#define LARGE 0x12345

20714

+

20715

+int fusion_uchar (unsigned char *p){ return p[LARGE]; }

20716

+int fusion_schar (signed char *p){ return p[LARGE]; }

20717

+int fusion_ushort (unsigned short *p){ return p[LARGE]; }

20718

+int fusion_short (short *p){ return p[LARGE]; }

20719

+int fusion_int (int *p){ return p[LARGE]; }

20720

+unsigned fusion_uns (unsigned *p){ return p[LARGE]; }

20721

+

20722

+vector double fusion_vector (vector double *p) { return p[2]; }

20723

+

20724

+/* { dg-final { scan-assembler-times "gpr load fusion" 6 } } */

20725

+/* { dg-final { scan-assembler-times "vector load fusion" 1 } } */

20726

+/* { dg-final { scan-assembler-times "lbz" 2 } } */

20727

+/* { dg-final { scan-assembler-times "extsb" 1 } } */

20728

+/* { dg-final { scan-assembler-times "lhz" 2 } } */

20729

+/* { dg-final { scan-assembler-times "extsh" 1 } } */

20730

+/* { dg-final { scan-assembler-times "lwz" 2 } } */

20731

Index: gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c

20732

===================================================================

20733

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c (.../tags/gcc_4_8_2_release)

20734

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c (.../branches/gcc-4_8-branch)

20735

@@ -107,8 +107,10 @@

20736

long a1;

20737

long a2;

20738

long a3;

20739

+#if _CALL_ELF != 2

20740

long a4;

20741

long a5;

20742

+#endif

20743

parm_t slot[100];

20744

} stack_frame_t;

20745

20746

@@ -119,6 +121,12 @@

20747

vector int v;

20748

} vector_int_t;

20749

20750

+#ifdef __LITTLE_ENDIAN__

20751

+#define MAKE_SLOT(x, y) ((long)x | ((long)y << 32))

20752

+#else

20753

+#define MAKE_SLOT(x, y) ((long)y | ((long)x << 32))

20754

+#endif

20755

+

20756

/* Paramter passing.

20757

s : gpr 3

20758

v : vpr 2

20759

@@ -226,8 +234,8 @@

20760

sp = __builtin_frame_address(0);

20761

sp = sp->backchain;

20762

20763

- if (sp->slot[2].l != 0x100000002ULL

20764

- || sp->slot[4].l != 0x500000006ULL)

20765

+ if (sp->slot[2].l != MAKE_SLOT (1, 2)

20766

+ || sp->slot[4].l != MAKE_SLOT (5, 6))

20767

abort();

20768

}

20769

20770

@@ -268,8 +276,8 @@

20771

sp = __builtin_frame_address(0);

20772

sp = sp->backchain;

20773

20774

- if (sp->slot[4].l != 0x100000002ULL

20775

- || sp->slot[6].l != 0x500000006ULL)

20776

+ if (sp->slot[4].l != MAKE_SLOT (1, 2)

20777

+ || sp->slot[6].l != MAKE_SLOT (5, 6))

20778

abort();

20779

}

20780

20781

@@ -296,8 +304,8 @@

20782

sp = __builtin_frame_address(0);

20783

sp = sp->backchain;

20784

20785

- if (sp->slot[4].l != 0x100000002ULL

20786

- || sp->slot[6].l != 0x500000006ULL)

20787

+ if (sp->slot[4].l != MAKE_SLOT (1, 2)

20788

+ || sp->slot[6].l != MAKE_SLOT (5, 6))

20789

abort();

20790

}

20791

20792

Index: gcc/testsuite/gcc.target/powerpc/direct-move-long1.c

20793

===================================================================

20794

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c (.../tags/gcc_4_8_2_release)

20795

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c (.../branches/gcc-4_8-branch)

20796

@@ -0,0 +1,16 @@

20797

+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */

20798

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20799

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

20800

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20801

+/* { dg-options "-mcpu=power8 -O2" } */

20802

+/* { dg-final { scan-assembler "mtvsrd" } } */

20803

+/* { dg-final { scan-assembler "mfvsrd" } } */

20804

+

20805

+/* Check code generation for direct move for long types. */

20806

+

20807

+#define TYPE long

20808

+#define IS_INT 1

20809

+#define NO_ALTIVEC 1

20810

+#define VSX_REG_ATTR "d"

20811

+

20812

+#include "direct-move.h"

20813

Index: gcc/testsuite/gcc.target/powerpc/direct-move-double2.c

20814

===================================================================

20815

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c (.../tags/gcc_4_8_2_release)

20816

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c (.../branches/gcc-4_8-branch)

20817

@@ -0,0 +1,15 @@

20818

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

20819

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20820

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

20821

+/* { dg-require-effective-target p8vector_hw } */

20822

+/* { dg-options "-mcpu=power8 -O2" } */

20823

+

20824

+/* Check whether we get the right bits for direct move at runtime. */

20825

+

20826

+#define TYPE double

20827

+#define IS_FLOAT 1

20828

+#define NO_ALTIVEC 1

20829

+#define DO_MAIN

20830

+#define VSX_REG_ATTR "ws"

20831

+

20832

+#include "direct-move.h"

20833

Index: gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c

20834

===================================================================

20835

--- a/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c (.../tags/gcc_4_8_2_release)

20836

+++ b/src/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c (.../branches/gcc-4_8-branch)

20837

@@ -0,0 +1,32 @@

20838

+/* { dg-do compile { target { powerpc*-*-* } } } */

20839

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20840

+/* { dg-require-effective-target powerpc_p8vector_ok } */

20841

+/* { dg-options "-mcpu=power8 -O2" } */

20842

+

20843

+#include <altivec.h>

20844

+

20845

+typedef vector int v_sign;

20846

+typedef vector unsigned int v_uns;

20847

+

20848

+v_sign even_sign (v_sign a, v_sign b)

20849

+{

20850

+ return vec_vmrgew (a, b);

20851

+}

20852

+

20853

+v_uns even_uns (v_uns a, v_uns b)

20854

+{

20855

+ return vec_vmrgew (a, b);

20856

+}

20857

+

20858

+v_sign odd_sign (v_sign a, v_sign b)

20859

+{

20860

+ return vec_vmrgow (a, b);

20861

+}

20862

+

20863

+v_uns odd_uns (v_uns a, v_uns b)

20864

+{

20865

+ return vec_vmrgow (a, b);

20866

+}

20867

+

20868

+/* { dg-final { scan-assembler-times "vmrgew" 2 } } */

20869

+/* { dg-final { scan-assembler-times "vmrgow" 2 } } */

20870

Index: gcc/testsuite/gcc.target/powerpc/bool2.h

20871

===================================================================

20872

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2.h (.../tags/gcc_4_8_2_release)

20873

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2.h (.../branches/gcc-4_8-branch)

20874

@@ -0,0 +1,29 @@

20875

+/* Test various logical operations. */

20876

+

20877

+TYPE arg1 (TYPE p, TYPE q) { return p & q; } /* AND */

20878

+TYPE arg2 (TYPE p, TYPE q) { return p | q; } /* OR */

20879

+TYPE arg3 (TYPE p, TYPE q) { return p ^ q; } /* XOR */

20880

+TYPE arg4 (TYPE p) { return ~ p; } /* NOR */

20881

+TYPE arg5 (TYPE p, TYPE q) { return ~(p & q); } /* NAND */

20882

+TYPE arg6 (TYPE p, TYPE q) { return ~(p | q); } /* NOR */

20883

+TYPE arg7 (TYPE p, TYPE q) { return ~(p ^ q); } /* EQV */

20884

+TYPE arg8 (TYPE p, TYPE q) { return (~p) & q; } /* ANDC */

20885

+TYPE arg9 (TYPE p, TYPE q) { return (~p) | q; } /* ORC */

20886

+TYPE arg10(TYPE p, TYPE q) { return (~p) ^ q; } /* EQV */

20887

+TYPE arg11(TYPE p, TYPE q) { return p & (~q); } /* ANDC */

20888

+TYPE arg12(TYPE p, TYPE q) { return p | (~q); } /* ORC */

20889

+TYPE arg13(TYPE p, TYPE q) { return p ^ (~q); } /* EQV */

20890

+

20891

+void ptr1 (TYPE *p) { p[0] = p[1] & p[2]; } /* AND */

20892

+void ptr2 (TYPE *p) { p[0] = p[1] | p[2]; } /* OR */

20893

+void ptr3 (TYPE *p) { p[0] = p[1] ^ p[2]; } /* XOR */

20894

+void ptr4 (TYPE *p) { p[0] = ~p[1]; } /* NOR */

20895

+void ptr5 (TYPE *p) { p[0] = ~(p[1] & p[2]); } /* NAND */

20896

+void ptr6 (TYPE *p) { p[0] = ~(p[1] | p[2]); } /* NOR */

20897

+void ptr7 (TYPE *p) { p[0] = ~(p[1] ^ p[2]); } /* EQV */

20898

+void ptr8 (TYPE *p) { p[0] = ~(p[1]) & p[2]; } /* ANDC */

20899

+void ptr9 (TYPE *p) { p[0] = (~p[1]) | p[2]; } /* ORC */

20900

+void ptr10(TYPE *p) { p[0] = (~p[1]) ^ p[2]; } /* EQV */

20901

+void ptr11(TYPE *p) { p[0] = p[1] & (~p[2]); } /* ANDC */

20902

+void ptr12(TYPE *p) { p[0] = p[1] | (~p[2]); } /* ORC */

20903

+void ptr13(TYPE *p) { p[0] = p[1] ^ (~p[2]); } /* EQV */

20904

Index: gcc/testsuite/gcc.target/powerpc/pr48258-1.c

20905

===================================================================

20906

--- a/src/gcc/testsuite/gcc.target/powerpc/pr48258-1.c (.../tags/gcc_4_8_2_release)

20907

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr48258-1.c (.../branches/gcc-4_8-branch)

20908

@@ -1,5 +1,6 @@

20909

/* { dg-do compile } */

20910

/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20911

+/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */

20912

/* { dg-require-effective-target powerpc_vsx_ok } */

20913

/* { dg-options "-O3 -mcpu=power7 -mabi=altivec -ffast-math -fno-unroll-loops" } */

20914

/* { dg-final { scan-assembler-times "xvaddsp" 3 } } */

20915

Index: gcc/testsuite/gcc.target/powerpc/quad-atomic.c

20916

===================================================================

20917

--- a/src/gcc/testsuite/gcc.target/powerpc/quad-atomic.c (.../tags/gcc_4_8_2_release)

20918

+++ b/src/gcc/testsuite/gcc.target/powerpc/quad-atomic.c (.../branches/gcc-4_8-branch)

20919

@@ -0,0 +1,67 @@

20920

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

20921

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

20922

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

20923

+/* { dg-require-effective-target p8vector_hw } */

20924

+/* { dg-options "-mcpu=power8 -O2" } */

20925

+

20926

+/* Test whether we get the right bits for quad word atomic instructions. */

20927

+#include <stdlib.h>

20928

+

20929

+static __int128_t quad_fetch_and (__int128_t *, __int128_t value) __attribute__((__noinline__));

20930

+static __int128_t quad_fetch_or (__int128_t *, __int128_t value) __attribute__((__noinline__));

20931

+static __int128_t quad_fetch_add (__int128_t *, __int128_t value) __attribute__((__noinline__));

20932

+

20933

+static __int128_t

20934

+quad_fetch_and (__int128_t *ptr, __int128_t value)

20935

+{

20936

+ return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE);

20937

+}

20938

+

20939

+static __int128_t

20940

+quad_fetch_or (__int128_t *ptr, __int128_t value)

20941

+{

20942

+ return __atomic_fetch_or (ptr, value, __ATOMIC_ACQUIRE);

20943

+}

20944

+

20945

+static __int128_t

20946

+quad_fetch_add (__int128_t *ptr, __int128_t value)

20947

+{

20948

+ return __atomic_fetch_add (ptr, value, __ATOMIC_ACQUIRE);

20949

+}

20950

+

20951

+int

20952

+main (void)

20953

+{

20954

+ __int128_t result;

20955

+ __int128_t value;

20956

+ __int128_t and_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL));

20957

+ __int128_t and_value = ((((__int128_t) 0xfffffffffffffff0ULL) << 64) | ((__int128_t) 0xfffffffffffffff0ULL));

20958

+ __int128_t and_exp = ((((__int128_t) 0x1234567890abcde0ULL) << 64) | ((__int128_t) 0xfedcba0987654320ULL));

20959

+

20960

+ __int128_t or_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL));

20961

+ __int128_t or_value = ((((__int128_t) 0x0000000000000010ULL) << 64) | ((__int128_t) 0x000000000000000eULL));

20962

+ __int128_t or_exp = ((((__int128_t) 0x1234567890abcdffULL) << 64) | ((__int128_t) 0xfedcba098765432fULL));

20963

+

20964

+ __int128_t add_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL));

20965

+ __int128_t add_value = ((((__int128_t) 0x0000000001000000ULL) << 64) | ((__int128_t) 0x0000001000000000ULL));

20966

+ __int128_t add_exp = ((((__int128_t) 0x1234567891abcdefULL) << 64) | ((__int128_t) 0xfedcba1987654321ULL));

20967

+

20968

+

20969

+ value = and_input;

20970

+ result = quad_fetch_and (&value, and_value);

20971

+ if (result != and_input || value != and_exp)

20972

+ abort ();

20973

+

20974

+ value = or_input;

20975

+ result = quad_fetch_or (&value, or_value);

20976

+ if (result != or_input || value != or_exp)

20977

+ abort ();

20978

+

20979

+ value = add_input;

20980

+ result = quad_fetch_add (&value, add_value);

20981

+ if (result != add_input || value != add_exp)

20982

+ abort ();

20983

+

20984

+ return 0;

20985

+}

20986

+

20987

Index: gcc/testsuite/gcc.target/powerpc/ti_math1.c

20988

===================================================================

20989

--- a/src/gcc/testsuite/gcc.target/powerpc/ti_math1.c (.../tags/gcc_4_8_2_release)

20990

+++ b/src/gcc/testsuite/gcc.target/powerpc/ti_math1.c (.../branches/gcc-4_8-branch)

20991

@@ -0,0 +1,20 @@

20992

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

20993

+/* { dg-options "-O2" } */

20994

+/* { dg-final { scan-assembler-times "addc" 1 } } */

20995

+/* { dg-final { scan-assembler-times "adde" 1 } } */

20996

+/* { dg-final { scan-assembler-times "subfc" 1 } } */

20997

+/* { dg-final { scan-assembler-times "subfe" 1 } } */

20998

+/* { dg-final { scan-assembler-not "subf " } } */

20999

+

21000

+__int128

21001

+add_128 (__int128 *ptr, __int128 val)

21002

+{

21003

+ return (*ptr + val);

21004

+}

21005

+

21006

+__int128

21007

+sub_128 (__int128 *ptr, __int128 val)

21008

+{

21009

+ return (*ptr - val);

21010

+}

21011

+

21012

Index: gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c

21013

===================================================================

21014

--- a/src/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c (.../tags/gcc_4_8_2_release)

21015

+++ b/src/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c (.../branches/gcc-4_8-branch)

21016

@@ -0,0 +1,22 @@

21017

+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */

21018

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

21019

+/* { dg-require-effective-target powerpc_p8vector_ok } */

21020

+/* { dg-options "-mcpu=power8 -O2" } */

21021

+/* { dg-final { scan-assembler-times "lq" 1 } } */

21022

+/* { dg-final { scan-assembler-times "stq" 1 } } */

21023

+/* { dg-final { scan-assembler-not "bl __atomic" } } */

21024

+/* { dg-final { scan-assembler-not "lqarx" } } */

21025

+/* { dg-final { scan-assembler-not "stqcx" } } */

21026

+

21027

+__int128

21028

+atomic_load_128_relaxed (__int128 *ptr)

21029

+{

21030

+ return __atomic_load_n (ptr, __ATOMIC_RELAXED);

21031

+}

21032

+

21033

+void

21034

+atomic_store_128_relaxed (__int128 *ptr, __int128 val)

21035

+{

21036

+ __atomic_store_n (ptr, val, __ATOMIC_RELAXED);

21037

+}

21038

+

21039

Index: gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c

21040

===================================================================

21041

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c (.../tags/gcc_4_8_2_release)

21042

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c (.../branches/gcc-4_8-branch)

21043

@@ -33,15 +33,27 @@

21044

21045

21046

/* Wrapper to save the GPRs and FPRs and then jump to the real function. */

21047

+#if _CALL_ELF != 2

21048

+#define FUNC_START(NAME) \

21049

+ "\t.globl\t" NAME "\n\t" \

21050

+ ".section \".opd\",\"aw\"\n\t" \

21051

+ ".align 3\n" \

21052

+ NAME ":\n\t" \

21053

+ ".quad .L." NAME ",.TOC.@tocbase,0\n\t" \

21054

+ ".text\n\t" \

21055

+ ".type " NAME ", @function\n" \

21056

+ ".L." NAME ":\n\t"

21057

+#else

21058

+#define FUNC_START(NAME) \

21059

+ "\t.globl\t" NAME "\n\t" \

21060

+ ".text\n\t" \

21061

+ NAME ":\n" \

21062

+ "0:\taddis 2,12,(.TOC.-0b)@ha\n\t" \

21063

+ "addi 2,2,(.TOC.-0b)@l\n\t" \

21064

+ ".localentry " NAME ",.-" NAME "\n\t"

21065

+#endif

21066

#define WRAPPER(NAME) \

21067

-__asm__ ("\t.globl\t" #NAME "_asm\n\t" \

21068

- ".section \".opd\",\"aw\"\n\t" \

21069

- ".align 3\n" \

21070

- #NAME "_asm:\n\t" \

21071

- ".quad .L." #NAME "_asm,.TOC.@tocbase,0\n\t" \

21072

- ".text\n\t" \

21073

- ".type " #NAME "_asm, @function\n" \

21074

- ".L." #NAME "_asm:\n\t" \

21075

+__asm__ (FUNC_START (#NAME "_asm") \

21076

"ld 11,gparms@got(2)\n\t" \

21077

"std 3,0(11)\n\t" \

21078

"std 4,8(11)\n\t" \

21079

@@ -75,8 +87,10 @@

21080

long a1;

21081

long a2;

21082

long a3;

21083

+#if _CALL_ELF != 2

21084

long a4;

21085

long a5;

21086

+#endif

21087

unsigned long slot[100];

21088

} stack_frame_t;

21089

21090

Index: gcc/testsuite/gcc.target/powerpc/direct-move-long2.c

21091

===================================================================

21092

--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c (.../tags/gcc_4_8_2_release)

21093

+++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c (.../branches/gcc-4_8-branch)

21094

@@ -0,0 +1,15 @@

21095

+/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */

21096

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

21097

+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */

21098

+/* { dg-require-effective-target p8vector_hw } */

21099

+/* { dg-options "-mcpu=power8 -O2" } */

21100

+

21101

+/* Check whether we get the right bits for direct move at runtime. */

21102

+

21103

+#define TYPE long

21104

+#define IS_INT 1

21105

+#define NO_ALTIVEC 1

21106

+#define DO_MAIN

21107

+#define VSX_REG_ATTR "d"

21108

+

21109

+#include "direct-move.h"

21110

Index: gcc/testsuite/gcc.target/powerpc/vsx-float0.c

21111

===================================================================

21112

--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-float0.c (.../tags/gcc_4_8_2_release)

21113

+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-float0.c (.../branches/gcc-4_8-branch)

21114

@@ -0,0 +1,16 @@

21115

+/* { dg-do compile { target { powerpc*-*-* } } } */

21116

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

21117

+/* { dg-require-effective-target powerpc_vsx_ok } */

21118

+/* { dg-options "-O2 -mcpu=power7" } */

21119

+/* { dg-final { scan-assembler "xxlxor" } } */

21120

+

21121

+/* Test that we generate xxlor to clear a SFmode register. */

21122

+

21123

+float sum (float *p, unsigned long n)

21124

+{

21125

+ float sum = 0.0f; /* generate xxlxor instead of load */

21126

+ while (n-- > 0)

21127

+ sum += *p++;

21128

+

21129

+ return sum;

21130

+}

21131

Index: gcc/testsuite/gcc.target/powerpc/ppc-target-1.c

21132

===================================================================

21133

--- a/src/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c (.../tags/gcc_4_8_2_release)

21134

+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c (.../branches/gcc-4_8-branch)

21135

@@ -5,8 +5,7 @@

21136

/* { dg-final { scan-assembler-times "fabs" 3 } } */

21137

/* { dg-final { scan-assembler-times "fnabs" 3 } } */

21138

/* { dg-final { scan-assembler-times "fsel" 3 } } */

21139

-/* { dg-final { scan-assembler-times "fcpsgn" 3 } } */

21140

-/* { dg-final { scan-assembler-times "xscpsgndp" 1 } } */

21141

+/* { dg-final { scan-assembler-times "fcpsgn\|xscpsgndp" 4 } } */

21142

21143

double normal1 (double, double);

21144

double power5 (double, double) __attribute__((__target__("cpu=power5")));

21145

Index: gcc/testsuite/gcc.target/powerpc/pr60137.c

21146

===================================================================

21147

--- a/src/gcc/testsuite/gcc.target/powerpc/pr60137.c (.../tags/gcc_4_8_2_release)

21148

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr60137.c (.../branches/gcc-4_8-branch)

21149

@@ -0,0 +1,17 @@

21150

+/* { dg-do compile { target { powerpc*-*-* } } } */

21151

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

21152

+/* { dg-require-effective-target powerpc_p8vector_ok } */

21153

+/* { dg-options "-mcpu=power8 -O3 -mno-vsx" } */

21154

+

21155

+/* target/60137, compiler got a 'could not split insn error'. */

21156

+

21157

+extern int target_flags;

21158

+extern char fixed_regs[53];

21159

+extern char call_used_regs[53];

21160

+

21161

+void init_reg_sets_1(void)

21162

+{

21163

+ int i;

21164

+ for (i = 0; i < 53; i++)

21165

+ fixed_regs[i] = call_used_regs[i] = (call_used_regs[i] &((target_flags & 0x02000000) ? 2 : 1)) != 0;

21166

+}

21167

Index: gcc/testsuite/gcc.target/powerpc/bool3.h

21168

===================================================================

21169

--- a/src/gcc/testsuite/gcc.target/powerpc/bool3.h (.../tags/gcc_4_8_2_release)

21170

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool3.h (.../branches/gcc-4_8-branch)

21171

@@ -0,0 +1,186 @@

21172

+/* Test forcing 128-bit logical types into GPR registers. */

21173

+

21174

+#if defined(NO_ASM)

21175

+#define FORCE_REG1(X)

21176

+#define FORCE_REG2(X,Y)

21177

+

21178

+#else

21179

+#if defined(USE_ALTIVEC)

21180

+#define REG_CLASS "+v"

21181

+#define PRINT_REG1 "# altivec reg %0"

21182

+#define PRINT_REG2 "# altivec reg %0, %1"

21183

+

21184

+#elif defined(USE_FPR)

21185

+#define REG_CLASS "+d"

21186

+#define PRINT_REG1 "# fpr reg %0"

21187

+#define PRINT_REG2 "# fpr reg %0, %1"

21188

+

21189

+#elif defined(USE_VSX)

21190

+#define REG_CLASS "+wa"

21191

+#define PRINT_REG1 "# vsx reg %x0"

21192

+#define PRINT_REG2 "# vsx reg %x0, %x1"

21193

+

21194

+#else

21195

+#define REG_CLASS "+r"

21196

+#define PRINT_REG1 "# gpr reg %0"

21197

+#define PRINT_REG2 "# gpr reg %0, %1"

21198

+#endif

21199

+

21200

+#define FORCE_REG1(X) __asm__ (PRINT_REG1 : REG_CLASS (X))

21201

+#define FORCE_REG2(X,Y) __asm__ (PRINT_REG2 : REG_CLASS (X), REG_CLASS (Y))

21202

+#endif

21203

+

21204

+void ptr1 (TYPE *p)

21205

+{

21206

+ TYPE a = p[1];

21207

+ TYPE b = p[2];

21208

+ TYPE c;

21209

+

21210

+ FORCE_REG2 (a, b);

21211

+ c = a & b; /* AND */

21212

+ FORCE_REG1 (c);

21213

+ p[0] = c;

21214

+}

21215

+

21216

+void ptr2 (TYPE *p)

21217

+{

21218

+ TYPE a = p[1];

21219

+ TYPE b = p[2];

21220

+ TYPE c;

21221

+

21222

+ FORCE_REG2 (a, b);

21223

+ c = a | b; /* OR */

21224

+ FORCE_REG1 (c);

21225

+ p[0] = c;

21226

+}

21227

+

21228

+void ptr3 (TYPE *p)

21229

+{

21230

+ TYPE a = p[1];

21231

+ TYPE b = p[2];

21232

+ TYPE c;

21233

+

21234

+ FORCE_REG2 (a, b);

21235

+ c = a ^ b; /* XOR */

21236

+ FORCE_REG1 (c);

21237

+ p[0] = c;

21238

+}

21239

+

21240

+void ptr4 (TYPE *p)

21241

+{

21242

+ TYPE a = p[1];

21243

+ TYPE b;

21244

+

21245

+ FORCE_REG1 (a);

21246

+ b = ~a; /* NOR */

21247

+ FORCE_REG1 (b);

21248

+ p[0] = b;

21249

+}

21250

+

21251

+void ptr5 (TYPE *p)

21252

+{

21253

+ TYPE a = p[1];

21254

+ TYPE b = p[2];

21255

+ TYPE c;

21256

+

21257

+ FORCE_REG2 (a, b);

21258

+ c = ~(a & b); /* NAND */

21259

+ FORCE_REG1 (c);

21260

+ p[0] = c;

21261

+}

21262

+

21263

+void ptr6 (TYPE *p)

21264

+{

21265

+ TYPE a = p[1];

21266

+ TYPE b = p[2];

21267

+ TYPE c;

21268

+

21269

+ FORCE_REG2 (a, b);

21270

+ c = ~(a | b); /* AND */

21271

+ FORCE_REG1 (c);

21272

+ p[0] = c;

21273

+}

21274

+

21275

+void ptr7 (TYPE *p)

21276

+{

21277

+ TYPE a = p[1];

21278

+ TYPE b = p[2];

21279

+ TYPE c;

21280

+

21281

+ FORCE_REG2 (a, b);

21282

+ c = ~(a ^ b); /* EQV */

21283

+ FORCE_REG1 (c);

21284

+ p[0] = c;

21285

+}

21286

+

21287

+void ptr8 (TYPE *p)

21288

+{

21289

+ TYPE a = p[1];

21290

+ TYPE b = p[2];

21291

+ TYPE c;

21292

+

21293

+ FORCE_REG2 (a, b);

21294

+ c = (~a) & b; /* ANDC */

21295

+ FORCE_REG1 (c);

21296

+ p[0] = c;

21297

+}

21298

+

21299

+void ptr9 (TYPE *p)

21300

+{

21301

+ TYPE a = p[1];

21302

+ TYPE b = p[2];

21303

+ TYPE c;

21304

+

21305

+ FORCE_REG2 (a, b);

21306

+ c = (~a) | b; /* ORC */

21307

+ FORCE_REG1 (c);

21308

+ p[0] = c;

21309

+}

21310

+

21311

+void ptr10 (TYPE *p)

21312

+{

21313

+ TYPE a = p[1];

21314

+ TYPE b = p[2];

21315

+ TYPE c;

21316

+

21317

+ FORCE_REG2 (a, b);

21318

+ c = (~a) ^ b; /* EQV */

21319

+ FORCE_REG1 (c);

21320

+ p[0] = c;

21321

+}

21322

+

21323

+void ptr11 (TYPE *p)

21324

+{

21325

+ TYPE a = p[1];

21326

+ TYPE b = p[2];

21327

+ TYPE c;

21328

+

21329

+ FORCE_REG2 (a, b);

21330

+ c = a & (~b); /* ANDC */

21331

+ FORCE_REG1 (c);

21332

+ p[0] = c;

21333

+}

21334

+

21335

+void ptr12 (TYPE *p)

21336

+{

21337

+ TYPE a = p[1];

21338

+ TYPE b = p[2];

21339

+ TYPE c;

21340

+

21341

+ FORCE_REG2 (a, b);

21342

+ c = a | (~b); /* ORC */

21343

+ FORCE_REG1 (c);

21344

+ p[0] = c;

21345

+}

21346

+

21347

+void ptr13 (TYPE *p)

21348

+{

21349

+ TYPE a = p[1];

21350

+ TYPE b = p[2];

21351

+ TYPE c;

21352

+

21353

+ FORCE_REG2 (a, b);

21354

+ c = a ^ (~b); /* AND */

21355

+ FORCE_REG1 (c);

21356

+ p[0] = c;

21357

+}

21358

Index: gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c

21359

===================================================================

21360

--- a/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c (.../tags/gcc_4_8_2_release)

21361

+++ b/src/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c (.../branches/gcc-4_8-branch)

21362

@@ -19,19 +19,6 @@

21363

return __builtin_shuffle(x, (V){ 4,5,6,7, 4,5,6,7, 4,5,6,7, 4,5,6,7, });

21364

}

21365

21366

-V p2(V x, V y)

21367

-{

21368

- return __builtin_shuffle(x, y,

21369

- (V){ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 });

21370

-

21371

-}

21372

-

21373

-V p4(V x, V y)

21374

-{

21375

- return __builtin_shuffle(x, y,

21376

- (V){ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 });

21377

-}

21378

-

21379

V h1(V x, V y)

21380

{

21381

return __builtin_shuffle(x, y,

21382

@@ -72,5 +59,3 @@

21383

/* { dg-final { scan-assembler "vspltb" } } */

21384

/* { dg-final { scan-assembler "vsplth" } } */

21385

/* { dg-final { scan-assembler "vspltw" } } */

21386

-/* { dg-final { scan-assembler "vpkuhum" } } */

21387

-/* { dg-final { scan-assembler "vpkuwum" } } */

21388

Index: gcc/testsuite/gcc.target/powerpc/bool2-p7.c

21389

===================================================================

21390

--- a/src/gcc/testsuite/gcc.target/powerpc/bool2-p7.c (.../tags/gcc_4_8_2_release)

21391

+++ b/src/gcc/testsuite/gcc.target/powerpc/bool2-p7.c (.../branches/gcc-4_8-branch)

21392

@@ -0,0 +1,31 @@

21393

+/* { dg-do compile { target { powerpc*-*-* } } } */

21394

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

21395

+/* { dg-require-effective-target powerpc_vsx_ok } */

21396

+/* { dg-options "-O2 -mcpu=power7" } */

21397

+/* { dg-final { scan-assembler-not "\[ \t\]and " } } */

21398

+/* { dg-final { scan-assembler-not "\[ \t\]or " } } */

21399

+/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */

21400

+/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */

21401

+/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */

21402

+/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */

21403

+/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */

21404

+/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */

21405

+/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */

21406

+/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */

21407

+/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */

21408

+/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */

21409

+/* { dg-final { scan-assembler "\[ \t\]xxland " } } */

21410

+/* { dg-final { scan-assembler "\[ \t\]xxlor " } } */

21411

+/* { dg-final { scan-assembler "\[ \t\]xxlxor " } } */

21412

+/* { dg-final { scan-assembler "\[ \t\]xxlnor " } } */

21413

+/* { dg-final { scan-assembler "\[ \t\]xxlandc " } } */

21414

+/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */

21415

+/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */

21416

+/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */

21417

+

21418

+#ifndef TYPE

21419

+typedef int v4si __attribute__ ((vector_size (16)));

21420

+#define TYPE v4si

21421

+#endif

21422

+

21423

+#include "bool2.h"

21424

Index: gcc/testsuite/gcc.target/powerpc/ti_math2.c

21425

===================================================================

21426

--- a/src/gcc/testsuite/gcc.target/powerpc/ti_math2.c (.../tags/gcc_4_8_2_release)

21427

+++ b/src/gcc/testsuite/gcc.target/powerpc/ti_math2.c (.../branches/gcc-4_8-branch)

21428

@@ -0,0 +1,73 @@

21429

+/* { dg-do run { target { powerpc*-*-* && lp64 } } } */

21430

+/* { dg-options "-O2 -fno-inline" } */

21431

+

21432

+union U {

21433

+ __int128 i128;

21434

+ struct {

21435

+ long l1;

21436

+ long l2;

21437

+ } s;

21438

+};

21439

+

21440

+union U u1,u2;

21441

+

21442

+__int128

21443

+create_128 (long most_sig, long least_sig)

21444

+{

21445

+ union U u;

21446

+

21447

+#if __LITTLE_ENDIAN__

21448

+ u.s.l1 = least_sig;

21449

+ u.s.l2 = most_sig;

21450

+#else

21451

+ u.s.l1 = most_sig;

21452

+ u.s.l2 = least_sig;

21453

+#endif

21454

+ return u.i128;

21455

+}

21456

+

21457

+long most_sig (union U * u)

21458

+{

21459

+#if __LITTLE_ENDIAN__

21460

+ return (*u).s.l2;

21461

+#else

21462

+ return (*u).s.l1;

21463

+#endif

21464

+}

21465

+

21466

+long least_sig (union U * u)

21467

+{

21468

+#if __LITTLE_ENDIAN__

21469

+ return (*u).s.l1;

21470

+#else

21471

+ return (*u).s.l2;

21472

+#endif

21473

+}

21474

+

21475

+__int128

21476

+add_128 (__int128 *ptr, __int128 val)

21477

+{

21478

+ return (*ptr + val);

21479

+}

21480

+

21481

+__int128

21482

+sub_128 (__int128 *ptr, __int128 val)

21483

+{

21484

+ return (*ptr - val);

21485

+}

21486

+

21487

+int

21488

+main (void)

21489

+{

21490

+ /* Do a simple add/sub to make sure carry is happening between the dwords

21491

+ and that dwords are in correct endian order. */

21492

+ u1.i128 = create_128 (1, -1);

21493

+ u2.i128 = add_128 (&u1.i128, 1);

21494

+ if ((most_sig (&u2) != 2) || (least_sig (&u2) != 0))

21495

+ __builtin_abort ();

21496

+ u2.i128 = sub_128 (&u2.i128, 1);

21497

+ if ((most_sig (&u2) != 1) || (least_sig (&u2) != -1))

21498

+ __builtin_abort ();

21499

+ return 0;

21500

+}

21501

+

21502

Index: gcc/testsuite/gcc.target/microblaze/others/mem_reload.c

21503

===================================================================

21504

--- a/src/gcc/testsuite/gcc.target/microblaze/others/mem_reload.c (.../tags/gcc_4_8_2_release)

21505

+++ b/src/gcc/testsuite/gcc.target/microblaze/others/mem_reload.c (.../branches/gcc-4_8-branch)

21506

@@ -0,0 +1,74 @@

21507

+/* { dg-options "-O2 -fPIC" } */

21508

+

21509

+typedef struct test_struct

21510

+{

21511

+ unsigned long long h[8];

21512

+ unsigned long long Nl,Nh;

21513

+ union {

21514

+ unsigned long long d[16];

21515

+ unsigned char p[(16*8)];

21516

+ } u;

21517

+ unsigned int num,md_len;

21518

+} TEST_STRUCT;

21519

+

21520

+static const unsigned long long K512[12] = {

21521

+ 0x428a2f98d728ae22,0x7137449123ef65cd,

21522

+ 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc,

21523

+ 0x3956c25bf348b538,0x59f111f1b605d019,

21524

+ 0x923f82a4af194f9b,0xab1c5ed5da6d8118,

21525

+ 0xd807aa98a3030242,0x12835b0145706fbe,

21526

+ 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2};

21527

+

21528

+#define ROTR(x,s) (((x)>>s) | (x)<<(64-s))

21529

+#define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))

21530

+#define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))

21531

+#define Ch(x,y,z) (((x) & (y)) ^ ((~(x)) & (z)))

21532

+#define Maj(x,y,z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))

21533

+

21534

+#define ROUND_00_15(i,a,b,c,d,e,f,g,h) do { \

21535

+ T1 += h + Sigma1(e) + Ch(e,f,g) + K512[i]; \

21536

+ h = Sigma0(a) + Maj(a,b,c); \

21537

+ d += T1; h += T1; } while (0)

21538

+

21539

+#define ROUND_16_80(i,a,b,c,d,e,f,g,h,X) do { \

21540

+ T1 = X[(i)&0x0f] += s0 + s1 + X[(i+9)&0x0f]; \

21541

+ ROUND_00_15(i,a,b,c,d,e,f,g,h); } while (0)

21542

+

21543

+static void testfunc1 (TEST_STRUCT *ctx, const void *in, unsigned int num)

21544

+{

21545

+ const unsigned long long *W=in;

21546

+ unsigned long long a,b,c,d,e,f,g,h,s0,s1,T1;

21547

+ unsigned long long X[16];

21548

+ int i;

21549

+

21550

+ while (num--) {

21551

+

21552

+ T1 = X[0] = W[0]; ROUND_00_15(0,a,b,c,d,e,f,g,h);

21553

+ T1 = X[1] = W[1]; ROUND_00_15(1,h,a,b,c,d,e,f,g);

21554

+ T1 = X[2] = W[2]; ROUND_00_15(2,g,h,a,b,c,d,e,f);

21555

+ T1 = X[3] = W[3]; ROUND_00_15(3,f,g,h,a,b,c,d,e);

21556

+ T1 = X[4] = W[4]; ROUND_00_15(4,e,f,g,h,a,b,c,d);

21557

+ T1 = X[5] = W[5]; ROUND_00_15(5,d,e,f,g,h,a,b,c);

21558

+ T1 = X[6] = W[6]; ROUND_00_15(6,c,d,e,f,g,h,a,b);

21559

+ T1 = X[7] = W[7]; ROUND_00_15(7,b,c,d,e,f,g,h,a);

21560

+ T1 = X[8] = W[8]; ROUND_00_15(8,a,b,c,d,e,f,g,h);

21561

+ T1 = X[9] = W[9]; ROUND_00_15(9,h,a,b,c,d,e,f,g);

21562

+

21563

+ for (i=16;i<80;i+=8)

21564

+ {

21565

+ ROUND_16_80(i+0,a,b,c,d,e,f,g,h,X);

21566

+ }

21567

+

21568

+ ctx->h[4] += e; ctx->h[5] += f; ctx->h[6] += g; ctx->h[7] += h;

21569

+ }

21570

+}

21571

+

21572

+int testfunc2 (TEST_STRUCT *c, const void *_data, unsigned int len)

21573

+{

21574

+ const unsigned char *data=(const unsigned char *)_data;

21575

+

21576

+ unsigned char *p=(unsigned char *)c->u.p;

21577

+

21578

+ testfunc1 (c,p,0);

21579

+ testfunc1 (c,data,len/sizeof(c->u));

21580

+}

21581

Index: gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c

21582

===================================================================

21583

--- a/src/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c (.../tags/gcc_4_8_2_release)

21584

+++ b/src/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c (.../branches/gcc-4_8-branch)

21585

@@ -0,0 +1,8 @@

21586

+/* { dg-do compile } */

21587

+

21588

+void trap ()

21589

+{

21590

+ __builtin_trap ();

21591

+}

21592

+

21593

+/* { dg-final { scan-assembler "brki\tr0,-1" } } */

21594

\ No newline at end of file

21595

Index: gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c

21596

===================================================================

21597

--- a/src/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c (.../tags/gcc_4_8_2_release)

21598

+++ b/src/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c (.../branches/gcc-4_8-branch)

21599

@@ -0,0 +1,9 @@

21600

+/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */

21601

+

21602

+void float_func(float f1, float f2, float f3)

21603

+{

21604

+ /* { dg-final { scan-assembler "fcmp\.eq\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */

21605

+ /* { dg-final { scan-assembler "fcmp\.le\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */

21606

+ if(f1==f2 && f1<=f3)

21607

+ print ("f1 eq f2 && f1 le f3");

21608

+}

21609

Index: gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c

21610

===================================================================

21611

--- a/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (.../tags/gcc_4_8_2_release)

21612

+++ b/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (.../branches/gcc-4_8-branch)

21613

@@ -1,8 +1,14 @@

21614

/* { dg-do compile } */

21615

/* { dg-options "-O2" } */

21616

21617

-#include "../../../config/aarch64/arm_neon.h"

21618

+#include <arm_neon.h>

21619

21620

+/* Used to force a variable to a SIMD register. */

21621

+#define force_simd(V1) asm volatile ("mov %d0, %1.d[0]" \

21622

+ : "=w"(V1) \

21623

+ : "w"(V1) \

21624

+ : /* No clobbers */);

21625

+

21626

/* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */

21627

21628

uint64x1_t

21629

@@ -31,7 +37,12 @@

21630

uint64x1_t

21631

test_vceqd_s64 (int64x1_t a, int64x1_t b)

21632

{

21633

- return vceqd_s64 (a, b);

21634

+ uint64x1_t res;

21635

+ force_simd (a);

21636

+ force_simd (b);

21637

+ res = vceqd_s64 (a, b);

21638

+ force_simd (res);

21639

+ return res;

21640

}

21641

21642

/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

21643

@@ -39,7 +50,11 @@

21644

uint64x1_t

21645

test_vceqzd_s64 (int64x1_t a)

21646

{

21647

- return vceqzd_s64 (a);

21648

+ uint64x1_t res;

21649

+ force_simd (a);

21650

+ res = vceqzd_s64 (a);

21651

+ force_simd (res);

21652

+ return res;

21653

}

21654

21655

/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */

21656

@@ -47,21 +62,36 @@

21657

uint64x1_t

21658

test_vcged_s64 (int64x1_t a, int64x1_t b)

21659

{

21660

- return vcged_s64 (a, b);

21661

+ uint64x1_t res;

21662

+ force_simd (a);

21663

+ force_simd (b);

21664

+ res = vcged_s64 (a, b);

21665

+ force_simd (res);

21666

+ return res;

21667

}

21668

21669

uint64x1_t

21670

test_vcled_s64 (int64x1_t a, int64x1_t b)

21671

{

21672

- return vcled_s64 (a, b);

21673

+ uint64x1_t res;

21674

+ force_simd (a);

21675

+ force_simd (b);

21676

+ res = vcled_s64 (a, b);

21677

+ force_simd (res);

21678

+ return res;

21679

}

21680

21681

-/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

21682

+/* Idiom recognition will cause this testcase not to generate

21683

+ the expected cmge instruction, so do not check for it. */

21684

21685

uint64x1_t

21686

test_vcgezd_s64 (int64x1_t a)

21687

{

21688

- return vcgezd_s64 (a);

21689

+ uint64x1_t res;

21690

+ force_simd (a);

21691

+ res = vcgezd_s64 (a);

21692

+ force_simd (res);

21693

+ return res;

21694

}

21695

21696

/* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */

21697

@@ -69,7 +99,12 @@

21698

uint64x1_t

21699

test_vcged_u64 (uint64x1_t a, uint64x1_t b)

21700

{

21701

- return vcged_u64 (a, b);

21702

+ uint64x1_t res;

21703

+ force_simd (a);

21704

+ force_simd (b);

21705

+ res = vcged_u64 (a, b);

21706

+ force_simd (res);

21707

+ return res;

21708

}

21709

21710

/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */

21711

@@ -77,13 +112,23 @@

21712

uint64x1_t

21713

test_vcgtd_s64 (int64x1_t a, int64x1_t b)

21714

{

21715

- return vcgtd_s64 (a, b);

21716

+ uint64x1_t res;

21717

+ force_simd (a);

21718

+ force_simd (b);

21719

+ res = vcgtd_s64 (a, b);

21720

+ force_simd (res);

21721

+ return res;

21722

}

21723

21724

uint64x1_t

21725

test_vcltd_s64 (int64x1_t a, int64x1_t b)

21726

{

21727

- return vcltd_s64 (a, b);

21728

+ uint64x1_t res;

21729

+ force_simd (a);

21730

+ force_simd (b);

21731

+ res = vcltd_s64 (a, b);

21732

+ force_simd (res);

21733

+ return res;

21734

}

21735

21736

/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

21737

@@ -91,7 +136,11 @@

21738

uint64x1_t

21739

test_vcgtzd_s64 (int64x1_t a)

21740

{

21741

- return vcgtzd_s64 (a);

21742

+ uint64x1_t res;

21743

+ force_simd (a);

21744

+ res = vcgtzd_s64 (a);

21745

+ force_simd (res);

21746

+ return res;

21747

}

21748

21749

/* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */

21750

@@ -99,7 +148,12 @@

21751

uint64x1_t

21752

test_vcgtd_u64 (uint64x1_t a, uint64x1_t b)

21753

{

21754

- return vcgtd_u64 (a, b);

21755

+ uint64x1_t res;

21756

+ force_simd (a);

21757

+ force_simd (b);

21758

+ res = vcgtd_u64 (a, b);

21759

+ force_simd (res);

21760

+ return res;

21761

}

21762

21763

/* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

21764

@@ -107,15 +161,24 @@

21765

uint64x1_t

21766

test_vclezd_s64 (int64x1_t a)

21767

{

21768

- return vclezd_s64 (a);

21769

+ uint64x1_t res;

21770

+ force_simd (a);

21771

+ res = vclezd_s64 (a);

21772

+ force_simd (res);

21773

+ return res;

21774

}

21775

21776

-/* { dg-final { scan-assembler-times "\\tcmlt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */

21777

+/* Idiom recognition will cause this testcase not to generate

21778

+ the expected cmlt instruction, so do not check for it. */

21779

21780

uint64x1_t

21781

test_vcltzd_s64 (int64x1_t a)

21782

{

21783

- return vcltzd_s64 (a);

21784

+ uint64x1_t res;

21785

+ force_simd (a);

21786

+ res = vcltzd_s64 (a);

21787

+ force_simd (res);

21788

+ return res;

21789

}

21790

21791

/* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */

21792

@@ -179,13 +242,23 @@

21793

int64x1_t

21794

test_vtst_s64 (int64x1_t a, int64x1_t b)

21795

{

21796

- return vtstd_s64 (a, b);

21797

+ uint64x1_t res;

21798

+ force_simd (a);

21799

+ force_simd (b);

21800

+ res = vtstd_s64 (a, b);

21801

+ force_simd (res);

21802

+ return res;

21803

}

21804

21805

uint64x1_t

21806

test_vtst_u64 (uint64x1_t a, uint64x1_t b)

21807

{

21808

- return vtstd_u64 (a, b);

21809

+ uint64x1_t res;

21810

+ force_simd (a);

21811

+ force_simd (b);

21812

+ res = vtstd_s64 (a, b);

21813

+ force_simd (res);

21814

+ return res;

21815

}

21816

21817

/* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */

21818

@@ -722,8 +795,11 @@

21819

return vrshld_u64 (a, b);

21820

}

21821

21822

-/* { dg-final { scan-assembler-times "\\tasr\\tx\[0-9\]+" 1 } } */

21823

+/* Other intrinsics can generate an asr instruction (vcltzd, vcgezd),

21824

+ so we cannot check scan-assembler-times. */

21825

21826

+/* { dg-final { scan-assembler "\\tasr\\tx\[0-9\]+" } } */

21827

+

21828

int64x1_t

21829

test_vshrd_n_s64 (int64x1_t a)

21830

{

21831

Index: gcc/testsuite/gcc.target/avr/torture/pr61055.c

21832

===================================================================

21833

--- a/src/gcc/testsuite/gcc.target/avr/torture/pr61055.c (.../tags/gcc_4_8_2_release)

21834

+++ b/src/gcc/testsuite/gcc.target/avr/torture/pr61055.c (.../branches/gcc-4_8-branch)

21835

@@ -0,0 +1,88 @@

21836

+/* { dg-do run } */

21837

+/* { dg-options { -fno-peephole2 } } */

21838

+

21839

+#include <stdlib.h>

21840

+

21841

+typedef __UINT16_TYPE__ uint16_t;

21842

+typedef __INT16_TYPE__ int16_t;

21843

+typedef __UINT8_TYPE__ uint8_t;

21844

+

21845

+uint8_t __attribute__((noinline,noclone))

21846

+fun_inc (uint8_t c0)

21847

+{

21848

+ register uint8_t c asm ("r15") = c0;

21849

+

21850

+ /* Force target value into R15 (lower register) */

21851

+ asm ("" : "+l" (c));

21852

+

21853

+ c++;

21854

+ if (c >= 0x80)

21855

+ c = 0;

21856

+

21857

+ asm ("" : "+l" (c));

21858

+

21859

+ return c;

21860

+}

21861

+

21862

+uint8_t __attribute__((noinline,noclone))

21863

+fun_dec (uint8_t c0)

21864

+{

21865

+ register uint8_t c asm ("r15") = c0;

21866

+

21867

+ /* Force target value into R15 (lower register) */

21868

+ asm ("" : "+l" (c));

21869

+

21870

+ c--;

21871

+ if (c < 0x80)

21872

+ c = 0;

21873

+

21874

+ asm ("" : "+l" (c));

21875

+

21876

+ return c;

21877

+}

21878

+

21879

+

21880

+uint8_t __attribute__((noinline,noclone))

21881

+fun_neg (uint8_t c0)

21882

+{

21883

+ register uint8_t c asm ("r15") = c0;

21884

+

21885

+ c = -c;

21886

+ if (c >= 0x80)

21887

+ c = 0;

21888

+

21889

+ return c;

21890

+}

21891

+

21892

+uint16_t __attribute__((noinline,noclone))

21893

+fun_adiw (uint16_t c0)

21894

+{

21895

+ register uint16_t c asm ("r24") = c0;

21896

+

21897

+ /* Force target value into R24 (for ADIW) */

21898

+ asm ("" : "+r" (c));

21899

+

21900

+ c += 2;

21901

+ if (c >= 0x8000)

21902

+ c = 0;

21903

+

21904

+ asm ("" : "+r" (c));

21905

+

21906

+ return c;

21907

+}

21908

+

21909

+

21910

+int main()

21911

+{

21912

+ if (fun_inc (0x7f) != 0)

21913

+ abort();

21914

+

21915

+ if (fun_neg (0x80) != 0)

21916

+ abort();

21917

+

21918

+ if (fun_adiw (0x7ffe) != 0)

21919

+ abort();

21920

+

21921

+ exit (0);

21922

+ return 0;

21923

+}

21924

Index: gcc/testsuite/gcc.target/avr/pr60991.c

21925

===================================================================

21926

--- a/src/gcc/testsuite/gcc.target/avr/pr60991.c (.../tags/gcc_4_8_2_release)

21927

+++ b/src/gcc/testsuite/gcc.target/avr/pr60991.c (.../branches/gcc-4_8-branch)

21928

@@ -0,0 +1,21 @@

21929

+/* { dg-do run } */

21930

+/* { dg-options "-O1" } */

21931

+

21932

+/* This testcase (simplified from the original bug report) exposes

21933

+ PR60991. The code generated for writing the __int24 value corrupts

21934

+ the frame pointer if the offset is <= 63 + MAX_LD_OFFSET */

21935

+

21936

+#include <stdlib.h>

21937

+

21938

+int main(void)

21939

+{

21940

+ volatile char junk[62];

21941

+ junk[0] = 5;

21942

+ volatile __int24 staticConfig = 0;

21943

+

21944

+ if (junk[0] != 5)

21945

+ abort();

21946

+

21947

+ exit(0);

21948

+ return 0;

21949

+}

21950

Index: gcc/testsuite/gcc.target/i386/pr59405.c

21951

===================================================================

21952

--- a/src/gcc/testsuite/gcc.target/i386/pr59405.c (.../tags/gcc_4_8_2_release)

21953

+++ b/src/gcc/testsuite/gcc.target/i386/pr59405.c (.../branches/gcc-4_8-branch)

21954

@@ -0,0 +1,24 @@

21955

+/* { dg-do run } */

21956

+/* { dg-options "-mmmx -mfpmath=387" } */

21957

+

21958

+#include "mmx-check.h"

21959

+

21960

+#include <mmintrin.h>

21961

+

21962

+typedef float float32x2_t __attribute__ ((vector_size (8)));

21963

+

21964

+float

21965

+foo32x2_be (float32x2_t x)

21966

+{

21967

+ _mm_empty ();

21968

+ return x[1];

21969

+}

21970

+

21971

+static void

21972

+mmx_test (void)

21973

+{

21974

+ float32x2_t b = { 0.0f, 1.0f };

21975

+

21976

+ if (foo32x2_be (b) != 1.0f)

21977

+ abort ();

21978

+}

21979

Index: gcc/testsuite/gcc.target/i386/pr59794-5.c

21980

===================================================================

21981

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-5.c (.../tags/gcc_4_8_2_release)

21982

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-5.c (.../branches/gcc-4_8-branch)

21983

@@ -0,0 +1,14 @@

21984

+/* PR target/59794 */

21985

+/* { dg-do compile { target { ia32 } } } */

21986

+/* { dg-options "-O2 -mno-sse" } */

21987

+/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */

21988

+

21989

+typedef int __v4si __attribute__ ((__vector_size__ (16)));

21990

+

21991

+extern __v4si x;

21992

+

21993

+__v4si

21994

+foo (void)

21995

+{ /* { dg-warning "SSE vector return without SSE enabled changes the ABI" } */

21996

+ return x;

21997

+}

21998

Index: gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c

21999

===================================================================

22000

--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c (.../tags/gcc_4_8_2_release)

22001

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-17.c (.../branches/gcc-4_8-branch)

22002

@@ -1,5 +1,5 @@

22003

/* { dg-do compile { target lp64 } } */

22004

-/* { dg-options "-O2 -mavx -mabi=ms -mtune=generic -dp" } */

22005

+/* { dg-options "-O2 -mavx -mabi=ms -maccumulate-outgoing-args -dp" } */

22006

22007

typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));

22008

22009

Index: gcc/testsuite/gcc.target/i386/pr54694.c

22010

===================================================================

22011

--- a/src/gcc/testsuite/gcc.target/i386/pr54694.c (.../tags/gcc_4_8_2_release)

22012

+++ b/src/gcc/testsuite/gcc.target/i386/pr54694.c (.../branches/gcc-4_8-branch)

22013

@@ -0,0 +1,11 @@

22014

+/* { dg-do compile } */

22015

+/* { dg-options "-O" } */

22016

+

22017

+register void *hfp __asm__("%ebp"); /* { dg-message "note: for" } */

22018

+

22019

+extern void g(void *);

22020

+

22021

+void f(int x) /* { dg-error "frame pointer required" } */

22022

+{

22023

+ g(__builtin_alloca(x));

22024

+}

22025

Index: gcc/testsuite/gcc.target/i386/pr59470.c

22026

===================================================================

22027

--- a/src/gcc/testsuite/gcc.target/i386/pr59470.c (.../tags/gcc_4_8_2_release)

22028

+++ b/src/gcc/testsuite/gcc.target/i386/pr59470.c (.../branches/gcc-4_8-branch)

22029

@@ -0,0 +1,17 @@

22030

+/* PR middle-end/58956 */

22031

+/* PR middle-end/59470 */

22032

+/* { dg-do run } */

22033

+/* { dg-options "-O2" } */

22034

+

22035

+int a, b, d[1024];

22036

+

22037

+int

22038

+main ()

22039

+{

22040

+ int c = a;

22041

+ asm ("{movl $6, (%2); movl $1, %0|mov dword ptr [%2], 6; mov %0, 1}"

22042

+ : "=r" (d[c]) : "rm" (b), "r" (&a) : "memory");

22043

+ if (d[0] != 1 || d[6] != 0)

22044

+ __builtin_abort ();

22045

+ return 0;

22046

+}

22047

Index: gcc/testsuite/gcc.target/i386/pr59034-1.c

22048

===================================================================

22049

--- a/src/gcc/testsuite/gcc.target/i386/pr59034-1.c (.../tags/gcc_4_8_2_release)

22050

+++ b/src/gcc/testsuite/gcc.target/i386/pr59034-1.c (.../branches/gcc-4_8-branch)

22051

@@ -0,0 +1,10 @@

22052

+/* { dg-do compile { target { ! { ia32 } } } } */

22053

+/* { dg-require-effective-target maybe_x32 } */

22054

+/* { dg-options "-O -mx32 -mtune=corei7 -maddress-mode=short" } */

22055

+

22056

+extern int foo(int, ...);

22057

+int bar(void) {

22058

+ long double l = 1.2345E6;

22059

+ foo(0, l);

22060

+ return 0;

22061

+}

22062

Index: gcc/testsuite/gcc.target/i386/pr58690.c

22063

===================================================================

22064

--- a/src/gcc/testsuite/gcc.target/i386/pr58690.c (.../tags/gcc_4_8_2_release)

22065

+++ b/src/gcc/testsuite/gcc.target/i386/pr58690.c (.../branches/gcc-4_8-branch)

22066

@@ -0,0 +1,14 @@

22067

+/* { dg-do compile { target { ! { ia32 } } } } */

22068

+/* { dg-require-effective-target maybe_x32 } */

22069

+/* { dg-options "-O2 -mx32 -maddress-mode=short" } */

22070

+

22071

+struct gomp_thread

22072

+{

22073

+ char foo[41];

22074

+};

22075

+extern __thread struct gomp_thread gomp_tls_data;

22076

+void

22077

+foo (void)

22078

+{

22079

+ __builtin_memset (&gomp_tls_data, '\0', sizeof (gomp_tls_data));

22080

+}

22081

Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c

22082

===================================================================

22083

--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../tags/gcc_4_8_2_release)

22084

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../branches/gcc-4_8-branch)

22085

@@ -15,7 +15,7 @@

22086

avx_test (void)

22087

{

22088

union256d u;

22089

- double e [4] __attribute__ ((aligned (8))) = {0.0};

22090

+ double e [4] __attribute__ ((aligned (32))) = {0.0};

22091

22092

u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215);

22093

22094

Index: gcc/testsuite/gcc.target/i386/pr9771-1.c

22095

===================================================================

22096

--- a/src/gcc/testsuite/gcc.target/i386/pr9771-1.c (.../tags/gcc_4_8_2_release)

22097

+++ b/src/gcc/testsuite/gcc.target/i386/pr9771-1.c (.../branches/gcc-4_8-branch)

22098

@@ -45,7 +45,17 @@

22099

exit(0);

22100

}

22101

22102

-int main()

22103

+/* main usually performs dynamic realignment of the stack in case

22104

+ _start would fail to properly align the stack, but for dynamic

22105

+ stack realignment we need frame pointer which is incompatible

22106

+ with -ffixed-ebp and the global register var. So, cheat here

22107

+ and hide from the compiler that main is really main. */

22108

+#define ASMNAME(cname) ASMNAME2 (__USER_LABEL_PREFIX__, cname)

22109

+#define ASMNAME2(prefix, cname) STRING (prefix) cname

22110

+#define STRING(x) #x

22111

+int real_main() __asm (ASMNAME ("main"));

22112

+

22113

+int real_main()

22114

{

22115

test();

22116

return 0;

22117

Index: gcc/testsuite/gcc.target/i386/pr60700.c

22118

===================================================================

22119

--- a/src/gcc/testsuite/gcc.target/i386/pr60700.c (.../tags/gcc_4_8_2_release)

22120

+++ b/src/gcc/testsuite/gcc.target/i386/pr60700.c (.../branches/gcc-4_8-branch)

22121

@@ -0,0 +1,59 @@

22122

+/* PR rtl-optimization/60700 */

22123

+/* { dg-do run { target ia32 } } */

22124

+/* { dg-options "-O3 -march=i686" } */

22125

+

22126

+int

22127

+__attribute__((noinline))

22128

+foo (void)

22129

+{

22130

+ return 0;

22131

+}

22132

+

22133

+void *g = (void *)1;

22134

+

22135

+struct st {

22136

+ char data[36]; /* must be greater than 32. */

22137

+};

22138

+

22139

+int

22140

+__attribute__((noinline))

22141

+repro(struct st **out)

22142

+{

22143

+ int status = 0;

22144

+

22145

+ *out = 0;

22146

+

22147

+ status = foo();

22148

+ if (status != 0) {

22149

+ return status;

22150

+ }

22151

+

22152

+ if (0 == g) {

22153

+ status = 999;

22154

+ return status;

22155

+ }

22156

+

22157

+ *out = (struct st *)__builtin_malloc(sizeof(struct st));

22158

+ if (0 == *out) {

22159

+ status = 42;

22160

+ return status;

22161

+ }

22162

+

22163

+ __builtin_memset(*out, 0, sizeof(struct st));

22164

+

22165

+ return status;

22166

+}

22167

+

22168

+int

22169

+main ()

22170

+{

22171

+ struct st *p;

22172

+ int ret = repro (&p);

22173

+ unsigned int i;

22174

+

22175

+ for (i = 0; i < sizeof (p->data)/sizeof (p->data[0]); i++)

22176

+ if (p->data[i] != 0)

22177

+ __builtin_abort ();

22178

+

22179

+ return ret;

22180

+}

22181

Index: gcc/testsuite/gcc.target/i386/pr59794-2.c

22182

===================================================================

22183

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-2.c (.../tags/gcc_4_8_2_release)

22184

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-2.c (.../branches/gcc-4_8-branch)

22185

@@ -0,0 +1,15 @@

22186

+/* PR target/59794 */

22187

+/* { dg-prune-output "ABI for passing parameters" } */

22188

+/* { dg-options "-O2 -mno-sse" } */

22189

+/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */

22190

+

22191

+typedef double __v2df __attribute__ ((__vector_size__ (16)));

22192

+

22193

+extern __v2df x;

22194

+

22195

+extern void bar (__v2df);

22196

+void

22197

+foo (void)

22198

+{

22199

+ bar (x); /* { dg-message "warning: SSE vector argument without SSE enabled changes the ABI" } */

22200

+}

22201

Index: gcc/testsuite/gcc.target/i386/pr57003.c

22202

===================================================================

22203

--- a/src/gcc/testsuite/gcc.target/i386/pr57003.c (.../tags/gcc_4_8_2_release)

22204

+++ b/src/gcc/testsuite/gcc.target/i386/pr57003.c (.../branches/gcc-4_8-branch)

22205

@@ -1,6 +1,6 @@

22206

/* PR rtl-optimization/57003 */

22207

/* { dg-do run } */

22208

-/* { dg-options "-O2" } */

22209

+/* { dg-options "-O2 -maccumulate-outgoing-args" } */

22210

22211

#define N 2001

22212

unsigned short *b, *c, *d;

22213

Index: gcc/testsuite/gcc.target/i386/pr59929.c

22214

===================================================================

22215

--- a/src/gcc/testsuite/gcc.target/i386/pr59929.c (.../tags/gcc_4_8_2_release)

22216

+++ b/src/gcc/testsuite/gcc.target/i386/pr59929.c (.../branches/gcc-4_8-branch)

22217

@@ -0,0 +1,55 @@

22218

+/* { dg-do run } */

22219

+/* { dg-options "-O0 -mno-accumulate-outgoing-args" } */

22220

+/* { dg-options "-O0 -mno-accumulate-outgoing-args -mx32 -maddress-mode=short" { target x32 } } */

22221

+

22222

+void

22223

+__attribute__ ((noinline))

22224

+test (float x1, float x2, float x3, float x4, float x5, float x6,

22225

+ float x7, float x8, float x9, float x10, float x11, float x12,

22226

+ float x13, float x14, float x15, float x16)

22227

+{

22228

+ if (x1 != 91

22229

+ || x2 != 92

22230

+ || x3 != 93

22231

+ || x4 != 94

22232

+ || x5 != 95

22233

+ || x6 != 96

22234

+ || x7 != 97

22235

+ || x8 != 98

22236

+ || x9 != 99

22237

+ || x10 != 100

22238

+ || x11 != 101

22239

+ || x12 != 102

22240

+ || x13 != 103

22241

+ || x14 != 104

22242

+ || x15 != 105

22243

+ || x16 != 106)

22244

+ __builtin_abort ();

22245

+}

22246

+

22247

+float x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13,

22248

+ x14, x15, x16;

22249

+

22250

+int

22251

+main ()

22252

+{

22253

+ x1 = 91;

22254

+ x2 = 92;

22255

+ x3 = 93;

22256

+ x4 = 94;

22257

+ x5 = 95;

22258

+ x6 = 96;

22259

+ x7 = 97;

22260

+ x8 = 98;

22261

+ x9 = 99;

22262

+ x10 = 100;

22263

+ x11 = 101;

22264

+ x12 = 102;

22265

+ x13 = 103;

22266

+ x14 = 104;

22267

+ x15 = 105;

22268

+ x16 = 106;

22269

+ test (x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13,

22270

+ x14, x15, x16);

22271

+ return 0;

22272

+}

22273

Index: gcc/testsuite/gcc.target/i386/pr59794-6.c

22274

===================================================================

22275

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-6.c (.../tags/gcc_4_8_2_release)

22276

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-6.c (.../branches/gcc-4_8-branch)

22277

@@ -0,0 +1,14 @@

22278

+/* PR target/59794 */

22279

+/* { dg-do compile { target { ! ia32 } } } */

22280

+/* { dg-options "-O2 -mno-sse" } */

22281

+/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */

22282

+

22283

+typedef int __v4si __attribute__ ((__vector_size__ (16)));

22284

+

22285

+extern __v4si x;

22286

+

22287

+__v4si

22288

+foo (void)

22289

+{ /* { dg-error "SSE register return with SSE disabled" } */

22290

+ return x;

22291

+}

22292

Index: gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c

22293

===================================================================

22294

--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c (.../tags/gcc_4_8_2_release)

22295

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-18.c (.../branches/gcc-4_8-branch)

22296

@@ -1,5 +1,5 @@

22297

/* { dg-do compile { target lp64 } } */

22298

-/* { dg-options "-O0 -mavx -mabi=ms -mtune=generic -dp" } */

22299

+/* { dg-options "-O0 -mavx -mabi=ms -maccumulate-outgoing-args -dp" } */

22300

22301

typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));

22302

22303

Index: gcc/testsuite/gcc.target/i386/sse2-movapd-1.c

22304

===================================================================

22305

--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../tags/gcc_4_8_2_release)

22306

+++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../branches/gcc-4_8-branch)

22307

@@ -25,7 +25,7 @@

22308

TEST (void)

22309

{

22310

union128d u;

22311

- double e[2] __attribute__ ((aligned (8))) = {2134.3343,1234.635654};

22312

+ double e[2] __attribute__ ((aligned (16))) = {2134.3343,1234.635654};

22313

22314

u.x = test (e);

22315

22316

Index: gcc/testsuite/gcc.target/i386/pr59021.c

22317

===================================================================

22318

--- a/src/gcc/testsuite/gcc.target/i386/pr59021.c (.../tags/gcc_4_8_2_release)

22319

+++ b/src/gcc/testsuite/gcc.target/i386/pr59021.c (.../branches/gcc-4_8-branch)

22320

@@ -0,0 +1,23 @@

22321

+/* { dg-do compile } */

22322

+/* { dg-options "-O2 -mavx -mvzeroupper" } */

22323

+

22324

+extern void abort (void);

22325

+

22326

+struct S {

22327

+ int i1;

22328

+ int i2;

22329

+ int i3;

22330

+};

22331

+

22332

+typedef double v4df __attribute__ ((vector_size (32)));

22333

+

22334

+extern int foo (v4df, int i1, int i2, int i3, int i4, int i5, struct S s);

22335

+

22336

+void bar (v4df v, struct S s)

22337

+{

22338

+ int r = foo (v, 1, 2, 3, 4, 5, s);

22339

+ if (r)

22340

+ abort ();

22341

+}

22342

+

22343

+/* { dg-final { scan-assembler-not "vzeroupper" } } */

22344

Index: gcc/testsuite/gcc.target/i386/pr59034-2.c

22345

===================================================================

22346

--- a/src/gcc/testsuite/gcc.target/i386/pr59034-2.c (.../tags/gcc_4_8_2_release)

22347

+++ b/src/gcc/testsuite/gcc.target/i386/pr59034-2.c (.../branches/gcc-4_8-branch)

22348

@@ -0,0 +1,10 @@

22349

+/* { dg-do compile { target { ! { ia32 } } } } */

22350

+/* { dg-require-effective-target maybe_x32 } */

22351

+/* { dg-options "-O -mx32 -mtune=corei7 -maddress-mode=long" } */

22352

+

22353

+extern int foo(int, ...);

22354

+int bar(void) {

22355

+ long double l = 1.2345E6;

22356

+ foo(0, l);

22357

+ return 0;

22358

+}

22359

Index: gcc/testsuite/gcc.target/i386/pr60693.c

22360

===================================================================

22361

--- a/src/gcc/testsuite/gcc.target/i386/pr60693.c (.../tags/gcc_4_8_2_release)

22362

+++ b/src/gcc/testsuite/gcc.target/i386/pr60693.c (.../branches/gcc-4_8-branch)

22363

@@ -0,0 +1,13 @@

22364

+/* PR target/60693 */

22365

+/* { dg-do compile } */

22366

+/* { dg-options "-O0" } */

22367

+

22368

+void bar (char *);

22369

+

22370

+void

22371

+foo (void)

22372

+{

22373

+ char buf[4096];

22374

+ __builtin_memcpy (buf, (void *) 0x8000, 4096);

22375

+ bar (buf);

22376

+}

22377

Index: gcc/testsuite/gcc.target/i386/pr59794-3.c

22378

===================================================================

22379

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-3.c (.../tags/gcc_4_8_2_release)

22380

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-3.c (.../branches/gcc-4_8-branch)

22381

@@ -0,0 +1,15 @@

22382

+/* PR target/59794 */

22383

+/* { dg-prune-output "ABI for passing parameters" } */

22384

+/* { dg-options "-O2 -mno-avx" } */

22385

+/* { dg-skip-if "no AVX vector" { *-*-mingw* } } */

22386

+

22387

+typedef int __v8si __attribute__ ((__vector_size__ (32)));

22388

+

22389

+extern __v8si x;

22390

+

22391

+extern void bar (__v8si);

22392

+void

22393

+foo (void)

22394

+{

22395

+ bar (x); /* { dg-message "warning: AVX vector argument without AVX enabled changes the ABI" } */

22396

+}

22397

Index: gcc/testsuite/gcc.target/i386/pr59839.c

22398

===================================================================

22399

--- a/src/gcc/testsuite/gcc.target/i386/pr59839.c (.../tags/gcc_4_8_2_release)

22400

+++ b/src/gcc/testsuite/gcc.target/i386/pr59839.c (.../branches/gcc-4_8-branch)

22401

@@ -0,0 +1,12 @@

22402

+/* PR target/59839 */

22403

+/* { dg-do compile } */

22404

+/* { dg-options "-O0 -mavx2" } */

22405

+

22406

+#include <x86intrin.h>

22407

+

22408

+void

22409

+test (const float *x)

22410

+{

22411

+ __m256i i = _mm256_set1_epi32 (1);

22412

+ __m256 d = _mm256_i32gather_ps (x, i, 1);

22413

+}

22414

Index: gcc/testsuite/gcc.target/i386/pr60516.c

22415

===================================================================

22416

--- a/src/gcc/testsuite/gcc.target/i386/pr60516.c (.../tags/gcc_4_8_2_release)

22417

+++ b/src/gcc/testsuite/gcc.target/i386/pr60516.c (.../branches/gcc-4_8-branch)

22418

@@ -0,0 +1,20 @@

22419

+/* PR target/60516 */

22420

+/* { dg-do compile } */

22421

+/* { dg-options "-O2" } */

22422

+

22423

+struct S { char c[65536]; };

22424

+

22425

+__attribute__((ms_abi, thiscall)) void

22426

+foo (void *x, struct S y)

22427

+{

22428

+}

22429

+

22430

+__attribute__((ms_abi, fastcall)) void

22431

+bar (void *x, void *y, struct S z)

22432

+{

22433

+}

22434

+

22435

+__attribute__((ms_abi, stdcall)) void

22436

+baz (struct S x)

22437

+{

22438

+}

22439

Index: gcc/testsuite/gcc.target/i386/xop-frczX.c

22440

===================================================================

22441

--- a/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../tags/gcc_4_8_2_release)

22442

+++ b/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../branches/gcc-4_8-branch)

22443

@@ -0,0 +1,60 @@

22444

+/* { dg-do run } */

22445

+/* { dg-require-effective-target xop } */

22446

+/* { dg-options "-O2 -mxop" } */

22447

+

22448

+#include "xop-check.h"

22449

+

22450

+#include <x86intrin.h>

22451

+

22452

+void

22453

+check_mm_vmfrcz_sd (__m128d __A, __m128d __B)

22454

+{

22455

+ union128d a, b, c;

22456

+ double d[2];

22457

+

22458

+ a.x = __A;

22459

+ b.x = __B;

22460

+ c.x = _mm_frcz_sd (__A, __B);

22461

+ d[0] = b.a[0] - (int)b.a[0] ;

22462

+ d[1] = a.a[1];

22463

+ if (check_union128d (c, d))

22464

+ abort ();

22465

+}

22466

+

22467

+void

22468

+check_mm_vmfrcz_ss (__m128 __A, __m128 __B)

22469

+{

22470

+ union128 a, b, c;

22471

+ float f[4];

22472

+

22473

+ a.x = __A;

22474

+ b.x = __B;

22475

+ c.x = _mm_frcz_ss (__A, __B);

22476

+ f[0] = b.a[0] - (int)b.a[0] ;

22477

+ f[1] = a.a[1];

22478

+ f[2] = a.a[2];

22479

+ f[3] = a.a[3];

22480

+ if (check_union128 (c, f))

22481

+ abort ();

22482

+}

22483

+

22484

+static void

22485

+xop_test (void)

22486

+{

22487

+ union128 a, b;

22488

+ union128d c,d;

22489

+ int i;

22490

+

22491

+ for (i = 0; i < 4; i++)

22492

+ {

22493

+ a.a[i] = i + 3.5;

22494

+ b.a[i] = i + 7.9;

22495

+ }

22496

+ for (i = 0; i < 2; i++)

22497

+ {

22498

+ c.a[i] = i + 3.5;

22499

+ d.a[i] = i + 7.987654321;

22500

+ }

22501

+ check_mm_vmfrcz_ss (a.x, b.x);

22502

+ check_mm_vmfrcz_sd (c.x, d.x);

22503

+}

22504

Index: gcc/testsuite/gcc.target/i386/pr59794-7.c

22505

===================================================================

22506

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-7.c (.../tags/gcc_4_8_2_release)

22507

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-7.c (.../branches/gcc-4_8-branch)

22508

@@ -0,0 +1,13 @@

22509

+/* PR target/59794 */

22510

+/* { dg-options "-O2 -mno-avx" } */

22511

+/* { dg-skip-if "no AVX vector" { *-*-mingw* } } */

22512

+

22513

+typedef int __v8si __attribute__ ((__vector_size__ (32)));

22514

+

22515

+extern __v8si x;

22516

+

22517

+__v8si

22518

+foo (void)

22519

+{ /* { dg-warning "AVX vector return without AVX enabled changes the ABI" } */

22520

+ return x;

22521

+}

22522

Index: gcc/testsuite/gcc.target/i386/pr59625.c

22523

===================================================================

22524

--- a/src/gcc/testsuite/gcc.target/i386/pr59625.c (.../tags/gcc_4_8_2_release)

22525

+++ b/src/gcc/testsuite/gcc.target/i386/pr59625.c (.../branches/gcc-4_8-branch)

22526

@@ -0,0 +1,36 @@

22527

+/* PR target/59625 */

22528

+/* { dg-do compile } */

22529

+/* { dg-options "-O2 -mtune=atom" } */

22530

+

22531

+int

22532

+foo (void)

22533

+{

22534

+ asm goto ("" : : : : lab);

22535

+ asm goto ("" : : : : lab);

22536

+ asm goto ("" : : : : lab);

22537

+ asm goto ("" : : : : lab);

22538

+ asm goto ("" : : : : lab);

22539

+ asm goto ("" : : : : lab);

22540

+ asm goto ("" : : : : lab);

22541

+ asm goto ("" : : : : lab);

22542

+ asm goto ("" : : : : lab);

22543

+ asm goto ("" : : : : lab);

22544

+ asm goto ("" : : : : lab);

22545

+ asm goto ("" : : : : lab);

22546

+ asm goto ("" : : : : lab);

22547

+ asm goto ("" : : : : lab);

22548

+ asm goto ("" : : : : lab);

22549

+ asm goto ("" : : : : lab);

22550

+ asm goto ("" : : : : lab);

22551

+ asm goto ("" : : : : lab);

22552

+ asm goto ("" : : : : lab);

22553

+ asm goto ("" : : : : lab);

22554

+ return 0;

22555

+lab:

22556

+ return 1;

22557

+}

22558

+

22559

+/* Verify we don't consider asm goto as a jump for four jumps limit

22560

+ optimization. asm goto doesn't have to contain a jump at all,

22561

+ the branching to labels can happen through different means. */

22562

+/* { dg-final { scan-assembler-not "(p2align\[^\n\r\]*\[\n\r]*\[^\n\r\]*){8}p2align" } } */

22563

Index: gcc/testsuite/gcc.target/i386/sse2-movapd-2.c

22564

===================================================================

22565

--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../tags/gcc_4_8_2_release)

22566

+++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../branches/gcc-4_8-branch)

22567

@@ -25,7 +25,7 @@

22568

TEST (void)

22569

{

22570

union128d u;

22571

- double e[2] __attribute__ ((aligned (8))) = {0.0};

22572

+ double e[2] __attribute__ ((aligned (16))) = {0.0};

22573

22574

u.x = _mm_set_pd (2134.3343,1234.635654);

22575

22576

Index: gcc/testsuite/gcc.target/i386/sse-5.c

22577

===================================================================

22578

--- a/src/gcc/testsuite/gcc.target/i386/sse-5.c (.../tags/gcc_4_8_2_release)

22579

+++ b/src/gcc/testsuite/gcc.target/i386/sse-5.c (.../branches/gcc-4_8-branch)

22580

@@ -1,6 +1,7 @@

22581

/* { dg-do compile } */

22582

/* { dg-require-effective-target ia32 } */

22583

-/* { dg-options "-Winline -Wno-psabi -O2 -mno-sse" } */

22584

+/* { dg-prune-output "ABI for passing parameters" } */

22585

+/* { dg-options "-Winline -O2 -mno-sse" } */

22586

22587

typedef double v2df __attribute__ ((vector_size (16)));

22588

v2df p;

22589

Index: gcc/testsuite/gcc.target/i386/pr39162.c

22590

===================================================================

22591

--- a/src/gcc/testsuite/gcc.target/i386/pr39162.c (.../tags/gcc_4_8_2_release)

22592

+++ b/src/gcc/testsuite/gcc.target/i386/pr39162.c (.../branches/gcc-4_8-branch)

22593

@@ -1,11 +1,14 @@

22594

/* { dg-do compile } */

22595

-/* { dg-options "-O2 -Wno-psabi -msse2 -mno-avx" } */

22596

+/* { dg-prune-output "ABI for passing parameters" } */

22597

+/* { dg-options "-O2 -msse2 -mno-avx" } */

22598

/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */

22599

22600

typedef long long __m256i __attribute__ ((__vector_size__ (32), __may_alias__));

22601

22602

-__m256i

22603

+extern __m256i y;

22604

+

22605

+void

22606

bar (__m256i x) /* { dg-warning "AVX" "" } */

22607

{

22608

- return x;

22609

+ y = x;

22610

}

22611

Index: gcc/testsuite/gcc.target/i386/pr60909-1.c

22612

===================================================================

22613

--- a/src/gcc/testsuite/gcc.target/i386/pr60909-1.c (.../tags/gcc_4_8_2_release)

22614

+++ b/src/gcc/testsuite/gcc.target/i386/pr60909-1.c (.../branches/gcc-4_8-branch)

22615

@@ -0,0 +1,11 @@

22616

+/* { dg-do compile } */

22617

+/* { dg-options "-mrdrnd" } */

22618

+

22619

+extern void bar (int);

22620

+

22621

+void

22622

+foo (unsigned *u)

22623

+{

22624

+ int i = __builtin_ia32_rdrand32_step (u);

22625

+ bar (i);

22626

+}

22627

Index: gcc/testsuite/gcc.target/i386/pr58137.c

22628

===================================================================

22629

--- a/src/gcc/testsuite/gcc.target/i386/pr58137.c (.../tags/gcc_4_8_2_release)

22630

+++ b/src/gcc/testsuite/gcc.target/i386/pr58137.c (.../branches/gcc-4_8-branch)

22631

@@ -0,0 +1,33 @@

22632

+/* { dg-do compile } */

22633

+/* { dg-options "-O3 -mavx2" } */

22634

+

22635

+typedef unsigned int U32;

22636

+

22637

+struct sv {

22638

+ void* sv_any;

22639

+ U32 sv_refcnt;

22640

+ U32 sv_flags;

22641

+};

22642

+typedef struct sv SV;

22643

+

22644

+struct xrv {

22645

+ SV * xrv_rv;

22646

+};

22647

+typedef struct xrv XRV;

22648

+

22649

+extern XRV * PL_xrv_root;

22650

+

22651

+void

22652

+more_xrv (void)

22653

+{

22654

+ register XRV* xrv;

22655

+ register XRV* xrvend;

22656

+ xrv = PL_xrv_root;

22657

+ xrvend = &xrv[200 / sizeof (XRV) - 1];

22658

+ while (xrv < xrvend)

22659

+ {

22660

+ xrv->xrv_rv = (SV*)(xrv + 1);

22661

+ xrv++;

22662

+ }

22663

+ xrv->xrv_rv = 0;

22664

+}

22665

Index: gcc/testsuite/gcc.target/i386/pr59794-4.c

22666

===================================================================

22667

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-4.c (.../tags/gcc_4_8_2_release)

22668

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-4.c (.../branches/gcc-4_8-branch)

22669

@@ -0,0 +1,14 @@

22670

+/* PR target/59794 */

22671

+/* { dg-do compile { target { ia32 } } } */

22672

+/* { dg-options "-O2 -mno-mmx" } */

22673

+/* { dg-skip-if "no MMX vector" { *-*-mingw* } } */

22674

+

22675

+typedef int __v2si __attribute__ ((__vector_size__ (8)));

22676

+

22677

+extern __v2si x;

22678

+

22679

+__v2si

22680

+foo (void)

22681

+{ /* { dg-warning "MMX vector return without MMX enabled changes the ABI" } */

22682

+ return x;

22683

+}

22684

Index: gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c

22685

===================================================================

22686

--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c (.../tags/gcc_4_8_2_release)

22687

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-16.c (.../branches/gcc-4_8-branch)

22688

@@ -1,5 +1,5 @@

22689

/* { dg-do compile { target lp64 } } */

22690

-/* { dg-options "-O2 -mavx -mabi=ms -mtune=generic -dp" } */

22691

+/* { dg-options "-O2 -mavx -mabi=ms -maccumulate-outgoing-args -dp" } */

22692

22693

typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__));

22694

22695

Index: gcc/testsuite/gcc.target/i386/pr30315.c

22696

===================================================================

22697

--- a/src/gcc/testsuite/gcc.target/i386/pr30315.c (.../tags/gcc_4_8_2_release)

22698

+++ b/src/gcc/testsuite/gcc.target/i386/pr30315.c (.../branches/gcc-4_8-branch)

22699

@@ -1,6 +1,6 @@

22700

/* { dg-do compile } */

22701

/* { dg-options "-O2" } */

22702

-/* { dg-final { scan-assembler-times "cmp" 4 } } */

22703

+/* { dg-final { scan-assembler-not "cmp" } } */

22704

22705

extern void abort (void);

22706

int c;

22707

@@ -34,39 +34,10 @@

22708

}

22709

#define PLUSCCONLY(T, t) PLUSCCONLY1(T, t, a) PLUSCCONLY1(T, t, b)

22710

22711

-#define MINUSCC(T, t) \

22712

-T minuscc##t (T a, T b) \

22713

-{ \

22714

- T difference = a - b; \

22715

- if (difference > a) \

22716

- abort (); \

22717

- return difference; \

22718

-}

22719

-

22720

-#define DECCC(T, t) \

22721

-T deccc##t (T a, T b) \

22722

-{ \

22723

- T difference = a - b; \

22724

- if (difference > a) \

22725

- c --; \

22726

- return difference; \

22727

-}

22728

-

22729

-#define MINUSCCONLY(T, t) \

22730

-void minuscconly##t (T a, T b) \

22731

-{ \

22732

- T difference = a - b; \

22733

- if (difference > a) \

22734

- abort (); \

22735

-}

22736

-

22737

#define TEST(T, t) \

22738

PLUSCC(T, t) \

22739

PLUSCCONLY(T, t) \

22740

- INCCC(T, t) \

22741

- MINUSCC(T, t) \

22742

- MINUSCCONLY(T, t) \

22743

- DECCC(T, t)

22744

+ INCCC(T, t)

22745

22746

TEST (unsigned long, l)

22747

TEST (unsigned int, i)

22748

@@ -84,14 +55,3 @@

22749

22750

PLUSCCZEXT(a)

22751

PLUSCCZEXT(b)

22752

-

22753

-#define MINUSCCZEXT \

22754

-unsigned long minuscczext (unsigned int a, unsigned int b) \

22755

-{ \

22756

- unsigned int difference = a - b; \

22757

- if (difference > a) \

22758

- abort (); \

22759

- return difference; \

22760

-}

22761

-

22762

-MINUSCCZEXT

22763

Index: gcc/testsuite/gcc.target/i386/pr43869.c

22764

===================================================================

22765

--- a/src/gcc/testsuite/gcc.target/i386/pr43869.c (.../tags/gcc_4_8_2_release)

22766

+++ b/src/gcc/testsuite/gcc.target/i386/pr43869.c (.../branches/gcc-4_8-branch)

22767

@@ -1,4 +1,5 @@

22768

/* { dg-do compile { target lp64 } } */

22769

+/* { dg-options "-maccumulate-outgoing-args" } */

22770

22771

int __attribute__((__noinline__))

22772

bugged(float f1, float f2, float f3, float f4,

22773

Index: gcc/testsuite/gcc.target/i386/pr43546.c

22774

===================================================================

22775

--- a/src/gcc/testsuite/gcc.target/i386/pr43546.c (.../tags/gcc_4_8_2_release)

22776

+++ b/src/gcc/testsuite/gcc.target/i386/pr43546.c (.../branches/gcc-4_8-branch)

22777

@@ -0,0 +1,12 @@

22778

+/* PR target/43546 */

22779

+/* { dg-do compile } */

22780

+/* { dg-options "-O1" } */

22781

+/* { dg-additional-options "-mpreferred-stack-boundary=2 -msseregparm -msse" { target ia32 } } */

22782

+

22783

+extern void bar (double);

22784

+

22785

+void

22786

+foo (void)

22787

+{

22788

+ bar (1.0);

22789

+}

22790

Index: gcc/testsuite/gcc.target/i386/pr43662.c

22791

===================================================================

22792

--- a/src/gcc/testsuite/gcc.target/i386/pr43662.c (.../tags/gcc_4_8_2_release)

22793

+++ b/src/gcc/testsuite/gcc.target/i386/pr43662.c (.../branches/gcc-4_8-branch)

22794

@@ -1,5 +1,5 @@

22795

/* { dg-do compile { target lp64 } } */

22796

-/* { dg-options "-O2" } */

22797

+/* { dg-options "-O2 -maccumulate-outgoing-args" } */

22798

22799

void __attribute__ ((ms_abi)) foo (void)

22800

{

22801

Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c

22802

===================================================================

22803

--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../tags/gcc_4_8_2_release)

22804

+++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../branches/gcc-4_8-branch)

22805

@@ -15,7 +15,7 @@

22806

avx_test (void)

22807

{

22808

union256d u;

22809

- double e [4] __attribute__ ((aligned (8))) = {41124.234,2344.2354,8653.65635,856.43576};

22810

+ double e [4] __attribute__ ((aligned (32))) = {41124.234,2344.2354,8653.65635,856.43576};

22811

22812

u.x = test (e);

22813

22814

Index: gcc/testsuite/gcc.target/i386/nest-1.c

22815

===================================================================

22816

--- a/src/gcc/testsuite/gcc.target/i386/nest-1.c (.../tags/gcc_4_8_2_release)

22817

+++ b/src/gcc/testsuite/gcc.target/i386/nest-1.c (.../branches/gcc-4_8-branch)

22818

@@ -0,0 +1,14 @@

22819

+/* { dg-do compile { target llp64 } } */

22820

+/* { dg-options "" } */

22821

+

22822

+void foo (int i)

22823

+{

22824

+ void nested (void)

22825

+ {

22826

+ char arr[(1U << 31) + 4U];

22827

+ arr[i] = 0;

22828

+ }

22829

+

22830

+ nested ();

22831

+}

22832

+

22833

Index: gcc/testsuite/gcc.target/i386/pr60909-2.c

22834

===================================================================

22835

--- a/src/gcc/testsuite/gcc.target/i386/pr60909-2.c (.../tags/gcc_4_8_2_release)

22836

+++ b/src/gcc/testsuite/gcc.target/i386/pr60909-2.c (.../branches/gcc-4_8-branch)

22837

@@ -0,0 +1,11 @@

22838

+/* { dg-do compile } */

22839

+/* { dg-options "-mrdseed" } */

22840

+

22841

+extern void bar (int);

22842

+

22843

+void

22844

+foo (unsigned *u)

22845

+{

22846

+ int i = __builtin_ia32_rdseed_si_step (u);

22847

+ bar (i);

22848

+}

22849

Index: gcc/testsuite/gcc.target/i386/pr59794-1.c

22850

===================================================================

22851

--- a/src/gcc/testsuite/gcc.target/i386/pr59794-1.c (.../tags/gcc_4_8_2_release)

22852

+++ b/src/gcc/testsuite/gcc.target/i386/pr59794-1.c (.../branches/gcc-4_8-branch)

22853

@@ -0,0 +1,15 @@

22854

+/* PR target/59794 */

22855

+/* { dg-do compile { target { ia32 } } } */

22856

+/* { dg-options "-O2 -mno-mmx" } */

22857

+/* { dg-skip-if "no MMX vector" { *-*-mingw* } } */

22858

+

22859

+typedef int __v2si __attribute__ ((__vector_size__ (8)));

22860

+

22861

+extern __v2si x;

22862

+

22863

+extern void bar (__v2si);

22864

+void

22865

+foo (void)

22866

+{

22867

+ bar (x); /* { dg-message "warning: MMX vector argument without MMX enabled changes the ABI" } */

22868

+}

22869

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/pr38891.c

22870

===================================================================

22871

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/pr38891.c (.../tags/gcc_4_8_2_release)

22872

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/pr38891.c (.../branches/gcc-4_8-branch)

22873

@@ -1,7 +1,7 @@

22874

/* Test for cross x86_64<->w64 abi standard calls.

22875

*/

22876

/* { dg-do compile } */

22877

-/* { dg-options "-mno-sse" } */

22878

+/* { dg-options "-mno-sse -maccumulate-outgoing-args" } */

22879

#include "callabi.h"

22880

22881

long double

22882

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-1.c

22883

===================================================================

22884

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-1.c (.../tags/gcc_4_8_2_release)

22885

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-1.c (.../branches/gcc-4_8-branch)

22886

@@ -2,7 +2,7 @@

22887

*/

22888

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

22889

/* { dg-do run } */

22890

-/* { dg-options "-std=gnu99" } */

22891

+/* { dg-options "-std=gnu99 -maccumulate-outgoing-args" } */

22892

#include "callabi.h"

22893

22894

extern __SIZE_TYPE__ strlen (const char *);

22895

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-2.c

22896

===================================================================

22897

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-2.c (.../tags/gcc_4_8_2_release)

22898

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-2.c (.../branches/gcc-4_8-branch)

22899

@@ -2,7 +2,7 @@

22900

*/

22901

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

22902

/* { dg-do run } */

22903

-/* { dg-options "-std=gnu99" } */

22904

+/* { dg-options "-std=gnu99 -maccumulate-outgoing-args" } */

22905

#include "callabi.h"

22906

22907

extern void abort (void);

22908

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-3.c

22909

===================================================================

22910

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-3.c (.../tags/gcc_4_8_2_release)

22911

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-3.c (.../branches/gcc-4_8-branch)

22912

@@ -2,7 +2,7 @@

22913

*/

22914

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

22915

/* { dg-do run } */

22916

-/* { dg-options "-std=gnu99" } */

22917

+/* { dg-options "-std=gnu99 -maccumulate-outgoing-args" } */

22918

#include "callabi.h"

22919

22920

extern void abort (void);

22921

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c

22922

===================================================================

22923

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c (.../tags/gcc_4_8_2_release)

22924

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c (.../branches/gcc-4_8-branch)

22925

@@ -1,6 +1,6 @@

22926

/* Test for cross x86_64<->w64 abi va_list calls. */

22927

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

22928

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

22929

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

22930

/* { dg-additional-sources "vaarg-4b.c" } */

22931

22932

extern __SIZE_TYPE__ __attribute__ ((sysv_abi)) strlen (const char *);

22933

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c

22934

===================================================================

22935

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c (.../tags/gcc_4_8_2_release)

22936

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c (.../branches/gcc-4_8-branch)

22937

@@ -1,6 +1,6 @@

22938

/* Test for cross x86_64<->w64 abi va_list calls. */

22939

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

22940

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

22941

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

22942

/* { dg-additional-sources "vaarg-5b.c" } */

22943

22944

extern void __attribute__ ((sysv_abi)) abort (void);

22945

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4b.c

22946

===================================================================

22947

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4b.c (.../tags/gcc_4_8_2_release)

22948

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4b.c (.../branches/gcc-4_8-branch)

22949

@@ -1,5 +1,5 @@

22950

/* Test for cross x86_64<->w64 abi va_list calls. */

22951

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

22952

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

22953

22954

#include <stdarg.h>

22955

22956

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5b.c

22957

===================================================================

22958

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5b.c (.../tags/gcc_4_8_2_release)

22959

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5b.c (.../branches/gcc-4_8-branch)

22960

@@ -1,5 +1,5 @@

22961

/* Test for cross x86_64<->w64 abi va_list calls. */

22962

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */

22963

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */

22964

22965

#include <stdarg.h>

22966

22967

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-1.c

22968

===================================================================

22969

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-1.c (.../tags/gcc_4_8_2_release)

22970

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-1.c (.../branches/gcc-4_8-branch)

22971

@@ -1,5 +1,5 @@

22972

/* { dg-do compile } */

22973

-/* { dg-options "-O2 -mabi=sysv" } */

22974

+/* { dg-options "-O2 -mabi=sysv -maccumulate-outgoing-args" } */

22975

22976

__attribute__ ((ms_abi))

22977

int foo (void)

22978

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-2.c

22979

===================================================================

22980

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-2.c (.../tags/gcc_4_8_2_release)

22981

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/leaf-2.c (.../branches/gcc-4_8-branch)

22982

@@ -1,5 +1,5 @@

22983

/* { dg-do compile } */

22984

-/* { dg-options "-O2 -mabi=sysv" } */

22985

+/* { dg-options "-O2 -mabi=sysv -maccumulate-outgoing-args" } */

22986

22987

extern int glb1, gbl2, gbl3;

22988

22989

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c

22990

===================================================================

22991

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c (.../tags/gcc_4_8_2_release)

22992

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-1.c (.../branches/gcc-4_8-branch)

22993

@@ -2,7 +2,7 @@

22994

*/

22995

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

22996

/* { dg-do run } */

22997

-/* { dg-options "-std=gnu99 -ffast-math" } */

22998

+/* { dg-options "-std=gnu99 -ffast-math -maccumulate-outgoing-args" } */

22999

#include "callabi.h"

23000

23001

extern void abort (void);

23002

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c

23003

===================================================================

23004

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c (.../tags/gcc_4_8_2_release)

23005

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c (.../branches/gcc-4_8-branch)

23006

@@ -1,6 +1,6 @@

23007

/* Test for cross x86_64<->w64 abi standard calls via variable. */

23008

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

23009

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

23010

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

23011

/* { dg-additional-sources "func-indirect-2b.c" } */

23012

23013

extern void __attribute__ ((sysv_abi)) abort (void);

23014

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect.c

23015

===================================================================

23016

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect.c (.../tags/gcc_4_8_2_release)

23017

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect.c (.../branches/gcc-4_8-branch)

23018

@@ -2,7 +2,7 @@

23019

*/

23020

/* Origin: Kai Tietz <kai.tietz@onevision.com> */

23021

/* { dg-do run } */

23022

-/* { dg-options "-std=gnu99 -ffast-math" } */

23023

+/* { dg-options "-std=gnu99 -ffast-math -maccumulate-outgoing-args" } */

23024

#include "callabi.h"

23025

23026

extern void abort (void);

23027

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c

23028

===================================================================

23029

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c (.../tags/gcc_4_8_2_release)

23030

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c (.../branches/gcc-4_8-branch)

23031

@@ -1,6 +1,6 @@

23032

/* Test for cross x86_64<->w64 abi standard calls. */

23033

/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */

23034

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

23035

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

23036

/* { dg-additional-sources "func-2b.c" } */

23037

23038

extern void __attribute__ ((sysv_abi)) abort (void);

23039

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2b.c

23040

===================================================================

23041

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2b.c (.../tags/gcc_4_8_2_release)

23042

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2b.c (.../branches/gcc-4_8-branch)

23043

@@ -1,5 +1,5 @@

23044

/* Test for cross x86_64<->w64 abi standard calls via variable. */

23045

-/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

23046

+/* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

23047

23048

typedef int (*func)(void *, char *, char *, short, long long);

23049

23050

Index: gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2b.c

23051

===================================================================

23052

--- a/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2b.c (.../tags/gcc_4_8_2_release)

23053

+++ b/src/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2b.c (.../branches/gcc-4_8-branch)

23054

@@ -1,5 +1,5 @@

23055

/* Test for cross x86_64<->w64 abi standard calls. */

23056

-/* { dg-options "-mabi=ms -std=gnu99 -ffast-math -fno-builtin" } */

23057

+/* { dg-options "-mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */

23058

23059

long double func_cross (long double a, double b, float c, long d, int e,

23060

char f)

23061

Index: gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c

23062

===================================================================

23063

--- a/src/gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c (.../tags/gcc_4_8_2_release)

23064

+++ b/src/gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c (.../branches/gcc-4_8-branch)

23065

@@ -1,37 +0,0 @@

23066

-/* This checks the availability of the XL compiler intrinsics for

23067

- transactional execution with the expected prototypes. */

23068

-

23069

-/* { dg-do compile } */

23070

-/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23071

-

23072

-#include <htmxlintrin.h>

23073

-

23074

-int a = 0;

23075

-unsigned long g;

23076

-

23077

-int

23078

-foo ()

23079

-{

23080

- struct __htm_tdb *tdb_struct;

23081

- void * const tdb = tdb_struct;

23082

- long result;

23083

- unsigned char code;

23084

-

23085

- result = __TM_simple_begin ();

23086

- result = __TM_begin (tdb);

23087

- result = __TM_end ();

23088

- __TM_abort ();

23089

- __TM_named_abort (42);

23090

- __TM_non_transactional_store (&g, 42);

23091

- result = __TM_nesting_depth (tdb);

23092

-

23093

- result = __TM_is_user_abort (tdb);

23094

- result = __TM_is_named_user_abort (tdb, &code);

23095

- result = __TM_is_illegal (tdb);

23096

- result = __TM_is_footprint_exceeded (tdb);

23097

- result = __TM_is_nested_too_deep (tdb);

23098

- result = __TM_is_conflict (tdb);

23099

- result = __TM_is_failure_persistent (result);

23100

- result = __TM_failure_address (tdb);

23101

- result = __TM_failure_code (tdb);

23102

-}

23103

Index: gcc/testsuite/gcc.target/s390/htm-1.c

23104

===================================================================

23105

--- a/src/gcc/testsuite/gcc.target/s390/htm-1.c (.../tags/gcc_4_8_2_release)

23106

+++ b/src/gcc/testsuite/gcc.target/s390/htm-1.c (.../branches/gcc-4_8-branch)

23107

@@ -1,73 +0,0 @@

23108

-/* This checks the availability of the low-level builtins introduced

23109

- for transactional execution. */

23110

-

23111

-/* { dg-do compile } */

23112

-/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23113

-

23114

-#include <stdint.h>

23115

-#include <htmintrin.h>

23116

-

23117

-int global = 0;

23118

-uint64_t g;

23119

-struct __htm_tdb global_tdb;

23120

-

23121

-int

23122

-foo (struct __htm_tdb* tdb, int reg, int *mem, uint64_t *mem64)

23123

-{

23124

-

23125

- int cc;

23126

- int n;

23127

-

23128

- cc = __builtin_tbegin (0);

23129

- cc = __builtin_tbegin (tdb);

23130

- cc = __builtin_tbegin (&global_tdb);

23131

-

23132

- cc = __builtin_tbegin_nofloat (0);

23133

- cc = __builtin_tbegin_nofloat (&global_tdb);

23134

-

23135

- cc = __builtin_tbegin_retry (0, 42);

23136

- cc = __builtin_tbegin_retry (0, reg);

23137

- cc = __builtin_tbegin_retry (0, *mem);

23138

- cc = __builtin_tbegin_retry (0, global);

23139

- cc = __builtin_tbegin_retry (tdb, 42);

23140

- cc = __builtin_tbegin_retry (&global_tdb, 42);

23141

-

23142

- cc = __builtin_tbegin_retry_nofloat (0, 42);

23143

- cc = __builtin_tbegin_retry_nofloat (0, reg);

23144

- cc = __builtin_tbegin_retry_nofloat (0, *mem);

23145

- cc = __builtin_tbegin_retry_nofloat (0, global);

23146

- cc = __builtin_tbegin_retry_nofloat (&global_tdb, 42);

23147

-

23148

- __builtin_tbeginc ();

23149

-

23150

- n = __builtin_tx_nesting_depth();

23151

-

23152

- __builtin_non_tx_store(&g, 23);

23153

- __builtin_non_tx_store(mem64, 23);

23154

- __builtin_non_tx_store(&g, reg);

23155

- __builtin_non_tx_store(&g, *mem);

23156

- __builtin_non_tx_store(&g, global);

23157

-

23158

- __builtin_tabort (42 + 255);

23159

- __builtin_tabort (reg);

23160

- /* { dg-final { scan-assembler-times "tabort\t255" 1 } } */

23161

- __builtin_tabort (reg + 255);

23162

- __builtin_tabort (*mem);

23163

- __builtin_tabort (global);

23164

- /* Here global + 255 gets reloaded into a reg. Better would be to

23165

- just reload global or *mem and get the +255 for free as address

23166

- arithmetic. */

23167

- __builtin_tabort (*mem + 255);

23168

- __builtin_tabort (global + 255);

23169

-

23170

- __builtin_tend();

23171

-

23172

- __builtin_tx_assist (23);

23173

- __builtin_tx_assist (reg);

23174

- __builtin_tx_assist (*mem);

23175

- __builtin_tx_assist (global);

23176

-}

23177

-

23178

-/* Make sure the tdb NULL argument ends up as immediate value in the

23179

- instruction. */

23180

-/* { dg-final { scan-assembler-times "tbegin\t0," 10 } } */

23181

Index: gcc/testsuite/gcc.target/s390/htm-nofloat-2.c

23182

===================================================================

23183

--- a/src/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c (.../tags/gcc_4_8_2_release)

23184

+++ b/src/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c (.../branches/gcc-4_8-branch)

23185

@@ -1,55 +0,0 @@

23186

-/* { dg-do run } */

23187

-/* { dg-options "-O3 -mhtm -Wa,-march=zEC12,-mzarch --save-temps" } */

23188

-

23189

-/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin

23190

- instruction does not automatically preserves them. If the

23191

- transaction body is fully contained in a function the backend tries

23192

- after reload to get rid of the FPR save/restore operations

23193

- triggered by the clobbers. This testcase failed since the backend

23194

- was able to get rid of all FPR saves/restores and since these were

23195

- the only stack operations also of the entire stack space. So even

23196

- the save/restore of the stack pointer was omitted in the end.

23197

- However, since the frame layout has been fixed before, the prologue

23198

- still generated the stack pointer decrement making foo return with

23199

- a modified stack pointer. */

23200

-

23201

-void abort(void);

23202

-

23203

-void __attribute__((noinline))

23204

-foo (int a)

23205

-{

23206

- /* This is just to prevent the tbegin code from actually being

23207

- executed. That way the test may even run on machines prior to

23208

- zEC12. */

23209

- if (a == 42)

23210

- return;

23211

-

23212

- if (__builtin_tbegin (0) == 0)

23213

- __builtin_tend ();

23214

-}

23215

-

23216

-#ifdef __s390x__

23217

-#define GET_STACK_POINTER(SP) \

23218

- asm volatile ("stg %%r15, %0" : "=QRST" (SP));

23219

-#else

23220

-#define GET_STACK_POINTER(SP) \

23221

- asm volatile ("st %%r15, %0" : "=QR" (SP));

23222

-#endif

23223

-

23224

-int main(void)

23225

-{

23226

- unsigned long new_sp, old_sp;

23227

-

23228

- GET_STACK_POINTER (old_sp);

23229

- foo(42);

23230

- GET_STACK_POINTER (new_sp);

23231

-

23232

- if (old_sp != new_sp)

23233

- abort ();

23234

-

23235

- return 0;

23236

-}

23237

-

23238

-/* Make sure no FPR saves/restores are emitted. */

23239

-/* { dg-final { scan-assembler-not "\tstd\t" } } */

23240

-/* { dg-final { scan-assembler-not "\tld\t" } } */

23241

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c

23242

===================================================================

23243

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c (.../tags/gcc_4_8_2_release)

23244

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c (.../branches/gcc-4_8-branch)

23245

@@ -0,0 +1,27 @@

23246

+/* Functional tests for the function hotpatching feature. */

23247

+

23248

+/* { dg-do run } */

23249

+/* { dg-options "-O3 -mzarch -mhotpatch" } */

23250

+

23251

+#include <stdio.h>

23252

+

23253

+void hp1(void)

23254

+{

23255

+ printf("hello, world!\n");

23256

+}

23257

+

23258

+inline void hp2(void)

23259

+{

23260

+ printf("hello, world!\n");

23261

+}

23262

+

23263

+__attribute__ ((always_inline))

23264

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

23265

+{

23266

+ printf("hello, world!\n");

23267

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

23268

+

23269

+int main (void)

23270

+{

23271

+ return 0;

23272

+}

23273

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c

23274

===================================================================

23275

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c (.../tags/gcc_4_8_2_release)

23276

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c (.../branches/gcc-4_8-branch)

23277

@@ -0,0 +1,27 @@

23278

+/* Functional tests for the function hotpatching feature. */

23279

+

23280

+/* { dg-do run } */

23281

+/* { dg-options "-O3 -mzarch -mhotpatch=0" } */

23282

+

23283

+#include <stdio.h>

23284

+

23285

+void hp1(void)

23286

+{

23287

+ printf("hello, world!\n");

23288

+}

23289

+

23290

+inline void hp2(void)

23291

+{

23292

+ printf("hello, world!\n");

23293

+}

23294

+

23295

+__attribute__ ((always_inline))

23296

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

23297

+{

23298

+ printf("hello, world!\n");

23299

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

23300

+

23301

+int main (void)

23302

+{

23303

+ return 0;

23304

+}

23305

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c

23306

===================================================================

23307

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c (.../tags/gcc_4_8_2_release)

23308

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c (.../branches/gcc-4_8-branch)

23309

@@ -0,0 +1,27 @@

23310

+/* Functional tests for the function hotpatching feature. */

23311

+

23312

+/* { dg-do run } */

23313

+/* { dg-options "-O3 -mzarch -mhotpatch=1" } */

23314

+

23315

+#include <stdio.h>

23316

+

23317

+void hp1(void)

23318

+{

23319

+ printf("hello, world!\n");

23320

+}

23321

+

23322

+inline void hp2(void)

23323

+{

23324

+ printf("hello, world!\n");

23325

+}

23326

+

23327

+__attribute__ ((always_inline))

23328

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

23329

+{

23330

+ printf("hello, world!\n");

23331

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

23332

+

23333

+int main (void)

23334

+{

23335

+ return 0;

23336

+}

23337

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c

23338

===================================================================

23339

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c (.../tags/gcc_4_8_2_release)

23340

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c (.../branches/gcc-4_8-branch)

23341

@@ -0,0 +1,11 @@

23342

+/* Functional tests for the function hotpatching feature. */

23343

+

23344

+/* { dg-do compile } */

23345

+/* { dg-options "-O3 -mzarch -mhotpatch=-1" } */

23346

+

23347

+int main (void)

23348

+{

23349

+ return 0;

23350

+}

23351

+

23352

+/* { dg-excess-errors "argument to '-mhotpatch=' should be a non-negative integer" } */

23353

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c

23354

===================================================================

23355

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c (.../tags/gcc_4_8_2_release)

23356

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c (.../branches/gcc-4_8-branch)

23357

@@ -0,0 +1,28 @@

23358

+/* Functional tests for the function hotpatching feature. */

23359

+

23360

+/* { dg-do compile } */

23361

+/* { dg-options "-O3 -mzarch -mhotpatch=1000000" } */

23362

+

23363

+#include <stdio.h>

23364

+

23365

+void hp1(void)

23366

+{

23367

+ printf("hello, world!\n");

23368

+}

23369

+

23370

+__attribute__ ((hotpatch(1000000)))

23371

+void hp2(void)

23372

+{

23373

+ printf("hello, world!\n");

23374

+}

23375

+

23376

+__attribute__ ((hotpatch(1000001)))

23377

+void hp3(void)

23378

+{ /* { dg-error "requested 'hotpatch' attribute is not a non-negative integer constant or too large .max. 1000000." } */

23379

+ printf("hello, world!\n");

23380

+}

23381

+

23382

+int main (void)

23383

+{

23384

+ return 0;

23385

+}

23386

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c

23387

===================================================================

23388

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c (.../tags/gcc_4_8_2_release)

23389

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c (.../branches/gcc-4_8-branch)

23390

@@ -0,0 +1,11 @@

23391

+/* Functional tests for the function hotpatching feature. */

23392

+

23393

+/* { dg-do compile } */

23394

+/* { dg-options "-O3 -mzarch -mhotpatch=1000001" } */

23395

+

23396

+int main (void)

23397

+{

23398

+ return 0;

23399

+}

23400

+

23401

+/* { dg-excess-errors "argument to '-mhotpatch=' is too large .max. 1000000." } */

23402

Index: gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c

23403

===================================================================

23404

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c (.../tags/gcc_4_8_2_release)

23405

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c (.../branches/gcc-4_8-branch)

23406

@@ -0,0 +1,164 @@

23407

+/* This checks the availability of the low-level builtins introduced

23408

+ for transactional execution. */

23409

+

23410

+/* { dg-do compile } */

23411

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23412

+

23413

+#include <stdint.h>

23414

+#include <htmintrin.h>

23415

+

23416

+int global = 0;

23417

+uint64_t g;

23418

+struct __htm_tdb global_tdb;

23419

+

23420

+int

23421

+foo (struct __htm_tdb* tdb, int reg, int *mem, uint64_t *mem64)

23422

+{

23423

+

23424

+ int cc;

23425

+ int n;

23426

+

23427

+ __builtin_tbegin ((void *)0);

23428

+ __builtin_tbegin ((void *)-99999);

23429

+ __builtin_tbegin ((void *)99999);

23430

+ while (__builtin_tbegin ((void *)0) != 0)

23431

+ {

23432

+ }

23433

+ cc = __builtin_tbegin ((void *)0x12345678);

23434

+ cc = __builtin_tbegin (tdb);

23435

+ cc = __builtin_tbegin (&global_tdb);

23436

+ cc = __builtin_tbegin ((void *)(long)(reg + 0x12345678));

23437

+ cc = __builtin_tbegin ((void *)(long)(reg));

23438

+

23439

+ __builtin_tbegin_nofloat ((void *)0);

23440

+ __builtin_tbegin_nofloat ((void *)-99999);

23441

+ __builtin_tbegin_nofloat ((void *)99999);

23442

+ cc = __builtin_tbegin_nofloat ((void *)0x12345678);

23443

+ cc = __builtin_tbegin_nofloat (tdb);

23444

+ cc = __builtin_tbegin_nofloat (&global_tdb);

23445

+ cc = __builtin_tbegin_nofloat ((void *)(long)(reg + 0x12345678));

23446

+ cc = __builtin_tbegin_nofloat ((void *)(long)(reg));

23447

+

23448

+ __builtin_tbegin_retry ((void *)0, 0);

23449

+ cc = __builtin_tbegin_retry ((void *)0, 1);

23450

+ cc = __builtin_tbegin_retry ((void *)0, -1);

23451

+ cc = __builtin_tbegin_retry ((void *)0, 42);

23452

+ cc = __builtin_tbegin_retry ((void *)0, reg);

23453

+ cc = __builtin_tbegin_retry ((void *)0, *mem);

23454

+ cc = __builtin_tbegin_retry ((void *)0, global);

23455

+ cc = __builtin_tbegin_retry (tdb, 42);

23456

+ cc = __builtin_tbegin_retry (&global_tdb, 42);

23457

+ cc = __builtin_tbegin_retry ((void *)0x12345678, global);

23458

+ cc = __builtin_tbegin_retry (

23459

+ (void *)(long) (reg + 0x12345678), global + 1);

23460

+ cc = __builtin_tbegin_retry (

23461

+ (void *)(long)(reg), global - 1);

23462

+

23463

+ __builtin_tbegin_retry_nofloat ((void *)0, 0);

23464

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, 1);

23465

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, -1);

23466

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, 42);

23467

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, reg);

23468

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, *mem);

23469

+ cc = __builtin_tbegin_retry_nofloat ((void *)0, global);

23470

+ cc = __builtin_tbegin_retry_nofloat (tdb, 42);

23471

+ cc = __builtin_tbegin_retry_nofloat (&global_tdb, 42);

23472

+ cc = __builtin_tbegin_retry_nofloat ((void *)0x12345678, global);

23473

+ cc = __builtin_tbegin_retry_nofloat (

23474

+ (void *)(long) (reg + 0x12345678), global + 1);

23475

+ cc = __builtin_tbegin_retry_nofloat (

23476

+ (void *)(long)(reg), global - 1);

23477

+

23478

+ __builtin_tbeginc ();

23479

+

23480

+ __builtin_tx_nesting_depth ();

23481

+ n = __builtin_tx_nesting_depth ();

23482

+

23483

+ __builtin_non_tx_store (mem64, 0);

23484

+ {

23485

+ const uint64_t val_var = 0x1122334455667788;

23486

+

23487

+ __builtin_non_tx_store (mem64, val_var);

23488

+ }

23489

+ __builtin_non_tx_store (mem64, (uint64_t)reg);

23490

+ __builtin_non_tx_store (mem64, g);

23491

+ __builtin_non_tx_store ((uint64_t *)0, 0);

23492

+ __builtin_non_tx_store ((uint64_t *)0x12345678, 0);

23493

+ __builtin_non_tx_store (&g, 23);

23494

+ __builtin_non_tx_store (&g, reg);

23495

+ __builtin_non_tx_store (&g, *mem);

23496

+ __builtin_non_tx_store (&g, global);

23497

+

23498

+ __builtin_tend();

23499

+

23500

+ __builtin_tx_assist (0);

23501

+ __builtin_tx_assist (1);

23502

+ __builtin_tx_assist (reg);

23503

+ __builtin_tx_assist (*mem);

23504

+ __builtin_tx_assist (global);

23505

+}

23506

+

23507

+/* The taborts must go into separate function since they are

23508

+ "noreturn". */

23509

+

23510

+void

23511

+tabort1 ()

23512

+{

23513

+ __builtin_tabort (256);

23514

+}

23515

+

23516

+void

23517

+tabort2 (int reg)

23518

+{

23519

+ __builtin_tabort (reg);

23520

+}

23521

+

23522

+void

23523

+tabort3 (int reg)

23524

+{

23525

+ /* { dg-final { scan-assembler-times "tabort\t255" 1 } } */

23526

+ __builtin_tabort (reg + 255);

23527

+}

23528

+

23529

+void

23530

+tabort4 (int *mem)

23531

+{

23532

+ __builtin_tabort (*mem);

23533

+}

23534

+

23535

+void

23536

+tabort5 ()

23537

+{

23538

+ __builtin_tabort (global);

23539

+}

23540

+

23541

+void

23542

+tabort6 (int *mem)

23543

+{

23544

+ /* Here global + 255 gets reloaded into a reg. Better would be to

23545

+ just reload global or *mem and get the +255 for free as address

23546

+ arithmetic. */

23547

+ __builtin_tabort (*mem + 255);

23548

+}

23549

+

23550

+void

23551

+tabort7 ()

23552

+{

23553

+ __builtin_tabort (global + 255);

23554

+}

23555

+

23556

+void

23557

+tabort8 ()

23558

+{

23559

+ __builtin_tabort (-1);

23560

+}

23561

+

23562

+

23563

+/* Make sure the tdb NULL argument ends up as immediate value in the

23564

+ instruction. */

23565

+/* { dg-final { scan-assembler-times "tbegin\t0," 17 } } */

23566

+/* { dg-final { scan-assembler-times "tbegin\t" 41 } } */

23567

+/* Check number of occurences of certain instructions. */

23568

+/* { dg-final { scan-assembler-times "tbeginc\t" 1 } } */

23569

+/* { dg-final { scan-assembler-times "tabort\t" 8 } } */

23570

+/* { dg-final { scan-assembler "ppa\t" } } */

23571

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c

23572

===================================================================

23573

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c (.../tags/gcc_4_8_2_release)

23574

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c (.../branches/gcc-4_8-branch)

23575

@@ -0,0 +1,68 @@

23576

+/* Functional tests for the function hotpatching feature. */

23577

+

23578

+/* { dg-do run } */

23579

+/* { dg-options "-O3 -mzarch -mno-hotpatch" } */

23580

+

23581

+#include <stdio.h>

23582

+

23583

+__attribute__ ((hotpatch))

23584

+void hp1(void)

23585

+{

23586

+ printf("hello, world!\n");

23587

+}

23588

+

23589

+__attribute__ ((hotpatch))

23590

+inline void hp2(void)

23591

+{

23592

+ printf("hello, world!\n");

23593

+}

23594

+

23595

+__attribute__ ((hotpatch))

23596

+__attribute__ ((always_inline))

23597

+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */

23598

+{

23599

+ printf("hello, world!\n");

23600

+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */

23601

+

23602

+__attribute__ ((hotpatch(0)))

23603

+void hp4(void)

23604

+{

23605

+ printf("hello, world!\n");

23606

+}

23607

+

23608

+__attribute__ ((hotpatch(0)))

23609

+inline void hp5(void)

23610

+{

23611

+ printf("hello, world!\n");

23612

+}

23613

+

23614

+__attribute__ ((hotpatch(0)))

23615

+__attribute__ ((always_inline))

23616

+void hp6(void) /* { dg-warning "always_inline function might not be inlinable" } */

23617

+{

23618

+ printf("hello, world!\n");

23619

+} /* { dg-warning "function 'hp6' with the 'always_inline' attribute is not hotpatchable" } */

23620

+

23621

+__attribute__ ((hotpatch(1)))

23622

+void hp7(void)

23623

+{

23624

+ printf("hello, world!\n");

23625

+}

23626

+

23627

+__attribute__ ((hotpatch(1)))

23628

+inline void hp8(void)

23629

+{

23630

+ printf("hello, world!\n");

23631

+}

23632

+

23633

+__attribute__ ((hotpatch(1)))

23634

+__attribute__ ((always_inline))

23635

+void hp9(void) /* { dg-warning "always_inline function might not be inlinable" } */

23636

+{

23637

+ printf("hello, world!\n");

23638

+} /* { dg-warning "function 'hp9' with the 'always_inline' attribute is not hotpatchable" } */

23639

+

23640

+int main (void)

23641

+{

23642

+ return 0;

23643

+}

23644

Index: gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c

23645

===================================================================

23646

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c (.../tags/gcc_4_8_2_release)

23647

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c (.../branches/gcc-4_8-branch)

23648

@@ -0,0 +1,12 @@

23649

+/* { dg-do compile } */

23650

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23651

+

23652

+void must_not_compile1 (void)

23653

+{

23654

+ __builtin_tabort (0); /* { dg-error "Invalid transaction abort code:" } */

23655

+}

23656

+

23657

+void must_not_compile2 (void)

23658

+{

23659

+ __builtin_tabort (255); /* { dg-error "Invalid transaction abort code:" } */

23660

+}

23661

Index: gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c

23662

===================================================================

23663

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c (.../tags/gcc_4_8_2_release)

23664

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c (.../branches/gcc-4_8-branch)

23665

@@ -0,0 +1,23 @@

23666

+/* Functional tests for the function hotpatching feature. */

23667

+

23668

+/* { dg-do run } */

23669

+/* { dg-options "-O3 -mzarch -mhotpatch" } */

23670

+

23671

+#include <stdio.h>

23672

+

23673

+int hp1(void)

23674

+{

23675

+ int nested1(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */

23676

+ { return 1; }

23677

+

23678

+ __attribute__ ((hotpatch))

23679

+ int nested2(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */

23680

+ { return 1; }

23681

+

23682

+ return nested1() - nested2();

23683

+}

23684

+

23685

+int main (void)

23686

+{

23687

+ return hp1();

23688

+}

23689

Index: gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c

23690

===================================================================

23691

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c (.../tags/gcc_4_8_2_release)

23692

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c (.../branches/gcc-4_8-branch)

23693

@@ -0,0 +1,37 @@

23694

+/* This checks the availability of the XL compiler intrinsics for

23695

+ transactional execution with the expected prototypes. */

23696

+

23697

+/* { dg-do compile } */

23698

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23699

+

23700

+#include <htmxlintrin.h>

23701

+

23702

+int a = 0;

23703

+unsigned long g;

23704

+

23705

+int

23706

+foo ()

23707

+{

23708

+ struct __htm_tdb *tdb_struct;

23709

+ void * const tdb = tdb_struct;

23710

+ long result;

23711

+ unsigned char code;

23712

+

23713

+ result = __TM_simple_begin ();

23714

+ result = __TM_begin (tdb);

23715

+ result = __TM_end ();

23716

+ __TM_abort ();

23717

+ __TM_named_abort (42);

23718

+ __TM_non_transactional_store (&g, 42);

23719

+ result = __TM_nesting_depth (tdb);

23720

+

23721

+ result = __TM_is_user_abort (tdb);

23722

+ result = __TM_is_named_user_abort (tdb, &code);

23723

+ result = __TM_is_illegal (tdb);

23724

+ result = __TM_is_footprint_exceeded (tdb);

23725

+ result = __TM_is_nested_too_deep (tdb);

23726

+ result = __TM_is_conflict (tdb);

23727

+ result = __TM_is_failure_persistent (result);

23728

+ result = __TM_failure_address (tdb);

23729

+ result = __TM_failure_code (tdb);

23730

+}

23731

Index: gcc/testsuite/gcc.target/s390/s390.exp

23732

===================================================================

23733

--- a/src/gcc/testsuite/gcc.target/s390/s390.exp (.../tags/gcc_4_8_2_release)

23734

+++ b/src/gcc/testsuite/gcc.target/s390/s390.exp (.../branches/gcc-4_8-branch)

23735

@@ -24,6 +24,19 @@

23736

# Load support procs.

23737

load_lib gcc-dg.exp

23738

23739

+# Return 1 if htm (etnd - extract nesting depth) instructions are

23740

+# understood by the assembler and can be executed.

23741

+proc check_effective_target_htm { } {

23742

+ if { ![check_runtime s390_check_htm [subst {

23743

+ int main (void)

23744

+ {

23745

+ unsigned int nd;

23746

+ asm ("etnd %0" : "=d" (nd));

23747

+ return nd;

23748

+ }

23749

+ }] "-march=zEC12 -mzarch" ] } { return 0 } else { return 1 }

23750

+}

23751

+

23752

# If a testcase doesn't have special options, use these.

23753

global DEFAULT_CFLAGS

23754

if ![info exists DEFAULT_CFLAGS] then {

23755

Index: gcc/testsuite/gcc.target/s390/htm-nofloat-1.c

23756

===================================================================

23757

--- a/src/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c (.../tags/gcc_4_8_2_release)

23758

+++ b/src/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c (.../branches/gcc-4_8-branch)

23759

@@ -1,12 +1,50 @@

23760

-/* { dg-do compile } */

23761

-/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23762

+/* { dg-do run } */

23763

+/* { dg-require-effective-target htm } */

23764

+/* { dg-options "-O3 -march=zEC12 -mzarch --save-temps" } */

23765

23766

-int

23767

-foo ()

23768

+/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin

23769

+ instruction does not automatically preserves them. If the

23770

+ transaction body is fully contained in a function the backend tries

23771

+ after reload to get rid of the FPR save/restore operations

23772

+ triggered by the clobbers. This testcase failed since the backend

23773

+ was able to get rid of all FPR saves/restores and since these were

23774

+ the only stack operations also of the entire stack space. So even

23775

+ the save/restore of the stack pointer was omitted in the end.

23776

+ However, since the frame layout has been fixed before, the prologue

23777

+ still generated the stack pointer decrement making foo return with

23778

+ a modified stack pointer. */

23779

+

23780

+void abort(void);

23781

+

23782

+void __attribute__((noinline))

23783

+foo (int a)

23784

{

23785

- __builtin_tbegin_nofloat (0);

23786

- __builtin_tbegin_retry_nofloat (0, 42);

23787

+ if (__builtin_tbegin (0) == 0)

23788

+ __builtin_tend ();

23789

}

23790

+

23791

+#ifdef __s390x__

23792

+#define GET_STACK_POINTER(SP) \

23793

+ asm volatile ("stg %%r15, %0" : "=QRST" (SP));

23794

+#else

23795

+#define GET_STACK_POINTER(SP) \

23796

+ asm volatile ("st %%r15, %0" : "=QR" (SP));

23797

+#endif

23798

+

23799

+int main(void)

23800

+{

23801

+ unsigned long new_sp, old_sp;

23802

+

23803

+ GET_STACK_POINTER (old_sp);

23804

+ foo(42);

23805

+ GET_STACK_POINTER (new_sp);

23806

+

23807

+ if (old_sp != new_sp)

23808

+ abort ();

23809

+

23810

+ return 0;

23811

+}

23812

+

23813

/* Make sure no FPR saves/restores are emitted. */

23814

-/* { dg-final { scan-assembler-not "std" } } */

23815

-/* { dg-final { scan-assembler-not "ld" } } */

23816

+/* { dg-final { scan-assembler-not "\tstd\t" } } */

23817

+/* { dg-final { scan-assembler-not "\tld\t" } } */

23818

Index: gcc/testsuite/gcc.target/s390/hotpatch-1.c

23819

===================================================================

23820

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-1.c (.../tags/gcc_4_8_2_release)

23821

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-1.c (.../branches/gcc-4_8-branch)

23822

@@ -0,0 +1,20 @@

23823

+/* Functional tests for the function hotpatching feature. */

23824

+

23825

+/* { dg-do run } */

23826

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

23827

+

23828

+#include <stdio.h>

23829

+

23830

+void hp1(void)

23831

+{

23832

+ printf("hello, world!\n");

23833

+}

23834

+

23835

+int main (void)

23836

+{

23837

+ return 0;

23838

+}

23839

+

23840

+/* Check number of occurences of certain instructions. */

23841

+/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */

23842

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

23843

Index: gcc/testsuite/gcc.target/s390/hotpatch-2.c

23844

===================================================================

23845

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-2.c (.../tags/gcc_4_8_2_release)

23846

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-2.c (.../branches/gcc-4_8-branch)

23847

@@ -0,0 +1,20 @@

23848

+/* Functional tests for the function hotpatching feature. */

23849

+

23850

+/* { dg-do run } */

23851

+/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */

23852

+

23853

+#include <stdio.h>

23854

+

23855

+void hp1(void)

23856

+{

23857

+ printf("hello, world!\n");

23858

+}

23859

+

23860

+int main (void)

23861

+{

23862

+ return 0;

23863

+}

23864

+

23865

+/* Check number of occurences of certain instructions. */

23866

+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */

23867

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

23868

Index: gcc/testsuite/gcc.target/s390/hotpatch-3.c

23869

===================================================================

23870

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-3.c (.../tags/gcc_4_8_2_release)

23871

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-3.c (.../branches/gcc-4_8-branch)

23872

@@ -0,0 +1,20 @@

23873

+/* Functional tests for the function hotpatching feature. */

23874

+

23875

+/* { dg-do run } */

23876

+/* { dg-options "-O3 -mzarch -mhotpatch=0 --save-temps" } */

23877

+

23878

+#include <stdio.h>

23879

+

23880

+void hp1(void)

23881

+{

23882

+ printf("hello, world!\n");

23883

+}

23884

+

23885

+int main (void)

23886

+{

23887

+ return 0;

23888

+}

23889

+

23890

+/* Check number of occurences of certain instructions. */

23891

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

23892

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

23893

Index: gcc/testsuite/gcc.target/s390/hotpatch-4.c

23894

===================================================================

23895

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-4.c (.../tags/gcc_4_8_2_release)

23896

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-4.c (.../branches/gcc-4_8-branch)

23897

@@ -0,0 +1,26 @@

23898

+/* Functional tests for the function hotpatching feature. */

23899

+

23900

+/* { dg-do run } */

23901

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

23902

+

23903

+#include <stdio.h>

23904

+

23905

+inline void hp1(void)

23906

+{

23907

+ printf("hello, world!\n");

23908

+}

23909

+

23910

+__attribute__ ((always_inline))

23911

+void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */

23912

+{

23913

+ printf("hello, world!\n");

23914

+} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */

23915

+

23916

+int main (void)

23917

+{

23918

+ return 0;

23919

+}

23920

+

23921

+/* Check number of occurences of certain instructions. */

23922

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

23923

+/* { dg-final { scan-assembler-not "nop\t0" } } */

23924

Index: gcc/testsuite/gcc.target/s390/hotpatch-5.c

23925

===================================================================

23926

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-5.c (.../tags/gcc_4_8_2_release)

23927

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-5.c (.../branches/gcc-4_8-branch)

23928

@@ -0,0 +1,21 @@

23929

+/* Functional tests for the function hotpatching feature. */

23930

+

23931

+/* { dg-do run } */

23932

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

23933

+

23934

+#include <stdio.h>

23935

+

23936

+__attribute__ ((hotpatch))

23937

+void hp1(void)

23938

+{

23939

+ printf("hello, world!\n");

23940

+}

23941

+

23942

+int main (void)

23943

+{

23944

+ return 0;

23945

+}

23946

+

23947

+/* Check number of occurences of certain instructions. */

23948

+/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */

23949

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

23950

Index: gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c

23951

===================================================================

23952

--- a/src/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c (.../tags/gcc_4_8_2_release)

23953

+++ b/src/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c (.../branches/gcc-4_8-branch)

23954

@@ -0,0 +1,12 @@

23955

+/* { dg-do compile } */

23956

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

23957

+

23958

+int

23959

+foo ()

23960

+{

23961

+ __builtin_tbegin_nofloat (0);

23962

+ __builtin_tbegin_retry_nofloat (0, 42);

23963

+}

23964

+/* Make sure no FPR saves/restores are emitted. */

23965

+/* { dg-final { scan-assembler-not "std" } } */

23966

+/* { dg-final { scan-assembler-not "ld" } } */

23967

Index: gcc/testsuite/gcc.target/s390/hotpatch-6.c

23968

===================================================================

23969

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-6.c (.../tags/gcc_4_8_2_release)

23970

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-6.c (.../branches/gcc-4_8-branch)

23971

@@ -0,0 +1,21 @@

23972

+/* Functional tests for the function hotpatching feature. */

23973

+

23974

+/* { dg-do run } */

23975

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

23976

+

23977

+#include <stdio.h>

23978

+

23979

+__attribute__ ((hotpatch(1)))

23980

+void hp1(void)

23981

+{

23982

+ printf("hello, world!\n");

23983

+}

23984

+

23985

+int main (void)

23986

+{

23987

+ return 0;

23988

+}

23989

+

23990

+/* Check number of occurences of certain instructions. */

23991

+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */

23992

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

23993

Index: gcc/testsuite/gcc.target/s390/htm-builtins-1.c

23994

===================================================================

23995

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-1.c (.../tags/gcc_4_8_2_release)

23996

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-1.c (.../branches/gcc-4_8-branch)

23997

@@ -0,0 +1,1073 @@

23998

+/* Functional tests of the htm __builtin_... macros. */

23999

+

24000

+/* { dg-do run } */

24001

+/* { dg-require-effective-target htm } */

24002

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

24003

+

24004

+/* ---------------------------- included header files ---------------------- */

24005

+

24006

+#include <stdio.h>

24007

+#include <string.h>

24008

+#include <stdint.h>

24009

+#include <htmintrin.h>

24010

+

24011

+/* ---------------------------- local definitions -------------------------- */

24012

+

24013

+#define DEFAULT_MAX_REPETITIONS 5

24014

+#define DEFAULT_REQUIRED_QUORUM ((DEFAULT_MAX_REPETITIONS) - 1)

24015

+#define NUM_WARMUP_RUNS 10

24016

+

24017

+/* ---------------------------- local macros ------------------------------- */

24018

+

24019

+#define TEST_DF_REP(name) \

24020

+ { #name, name, DEFAULT_MAX_REPETITIONS, DEFAULT_REQUIRED_QUORUM }

24021

+#define TEST_NO_REP(name) { #name, name, 1, 1 }

24022

+

24023

+/* ---------------------------- local types -------------------------------- */

24024

+

24025

+typedef int (*test_func_t)(void);

24026

+

24027

+typedef struct

24028

+{

24029

+ const char *name;

24030

+ test_func_t test_func;

24031

+ int max_repetitions;

24032

+ int required_quorum;

24033

+} test_table_entry_t;

24034

+

24035

+/* ---------------------------- local variables ---------------------------- */

24036

+

24037

+__attribute__ ((aligned(256))) static struct __htm_tdb local_tdb256;

24038

+static struct __htm_tdb local_tdb;

24039

+static int do_dump_tdb = 0;

24040

+

24041

+/* ---------------------------- exported variables (globals) --------------- */

24042

+

24043

+__attribute__ ((aligned(256))) struct

24044

+{

24045

+ float float_1;

24046

+ float float_2;

24047

+ float float_3;

24048

+} global = { 1.0, 2.5, 0.0 };

24049

+

24050

+__attribute__ ((aligned(256))) struct

24051

+{

24052

+ volatile uint64_t c1;

24053

+ volatile uint64_t c2;

24054

+ volatile uint64_t c3;

24055

+} counters = { 0, 0, 0 };

24056

+

24057

+/* ---------------------------- local helper functions --------------------- */

24058

+

24059

+static void dump_tdb (struct __htm_tdb *tdb)

24060

+{

24061

+ unsigned char *p;

24062

+ int i;

24063

+ int j;

24064

+

24065

+ if (do_dump_tdb == 0)

24066

+ {

24067

+ return;

24068

+ }

24069

+ p = (unsigned char *)tdb;

24070

+ for (i = 0; i < 16; i++)

24071

+ {

24072

+ fprintf (stderr, "0x%02x ", i * 16);

24073

+ for (j = 0; j < 16; j++)

24074

+ {

24075

+ fprintf (stderr, "%02x", (int)p[i * 16 + j]);

24076

+ if (j < 15)

24077

+ {

24078

+ fprintf (stderr, " ");

24079

+ }

24080

+ if (j == 7)

24081

+ {

24082

+ fprintf (stderr, " ");

24083

+ }

24084

+ }

24085

+ fprintf (stderr, "\n");

24086

+ }

24087

+

24088

+ return;

24089

+}

24090

+

24091

+/* ---------------------------- local test functions ----------------------- */

24092

+

24093

+/* Check values of the constants defined in htmintrin.h. */

24094

+static int test_constants (void)

24095

+{

24096

+ if (_HTM_TBEGIN_STARTED != 0)

24097

+ {

24098

+ return 100 * _HTM_TBEGIN_STARTED + 1;

24099

+ }

24100

+ if (_HTM_TBEGIN_INDETERMINATE != 1)

24101

+ {

24102

+ return 100 * _HTM_TBEGIN_INDETERMINATE + 2;

24103

+ }

24104

+ if (_HTM_TBEGIN_TRANSIENT != 2)

24105

+ {

24106

+ return 100 * _HTM_TBEGIN_TRANSIENT + 3;

24107

+ }

24108

+ if (_HTM_TBEGIN_PERSISTENT != 3)

24109

+ {

24110

+ return 100 * _HTM_TBEGIN_PERSISTENT + 4;

24111

+ }

24112

+

24113

+ return 0;

24114

+}

24115

+

24116

+static int test_tbegin_ntstg_tend (void)

24117

+{

24118

+ int rc;

24119

+

24120

+ counters.c1 = 0;

24121

+ counters.c2 = 0;

24122

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

24123

+ {

24124

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, 1);

24125

+ counters.c2 = 2;

24126

+ rc = __builtin_tend ();

24127

+ if (rc != 0)

24128

+ {

24129

+ return 100 * rc + 5;

24130

+ }

24131

+ if (counters.c1 != 1)

24132

+ {

24133

+ return 100 * counters.c1 + 2;

24134

+ }

24135

+ if (counters.c2 != 2)

24136

+ {

24137

+ return 100 * counters.c2 + 3;

24138

+ }

24139

+ }

24140

+ else

24141

+ {

24142

+ return 100 * rc + 4;

24143

+ }

24144

+

24145

+ return 0;

24146

+}

24147

+

24148

+static int test_tbegin_ntstg_tabort (void)

24149

+{

24150

+ float f;

24151

+

24152

+ counters.c1 = 0;

24153

+ counters.c2 = 0;

24154

+ f = 0;

24155

+ if (__builtin_tbegin ((void *)0) == 0)

24156

+ {

24157

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, 1);

24158

+ counters.c2 = 2;

24159

+ f = 1;

24160

+ __builtin_tabort (256);

24161

+ return 1;

24162

+ }

24163

+ if (counters.c1 != 1)

24164

+ {

24165

+ return 100 * counters.c1 + 2;

24166

+ }

24167

+ if (counters.c2 != 0)

24168

+ {

24169

+ return 100 * counters.c2 + 3;

24170

+ }

24171

+ if (f != 0)

24172

+ {

24173

+ return 100 * f + 4;

24174

+ }

24175

+

24176

+ return 0;

24177

+}

24178

+

24179

+static int test_tbegin_nofloat (void)

24180

+{

24181

+ int rc;

24182

+

24183

+ counters.c1 = 0;

24184

+ counters.c2 = 0;

24185

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

24186

+ {

24187

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, 1);

24188

+ counters.c2 = 2;

24189

+ rc = __builtin_tend ();

24190

+ if (rc != 0)

24191

+ {

24192

+ return 100 * rc + 5;

24193

+ }

24194

+ if (counters.c1 != 1)

24195

+ {

24196

+ return 100 * counters.c1 + 2;

24197

+ }

24198

+ if (counters.c2 != 2)

24199

+ {

24200

+ return 100 * counters.c2 + 3;

24201

+ }

24202

+ }

24203

+ else

24204

+ {

24205

+ return 100 * rc + 4;

24206

+ }

24207

+

24208

+ return 0;

24209

+}

24210

+

24211

+static int test_tbegin_retry (void)

24212

+{

24213

+ int rc;

24214

+

24215

+ counters.c1 = 0;

24216

+ counters.c2 = 0;

24217

+ counters.c3 = 0;

24218

+ if ((rc = __builtin_tbegin_retry ((void *)0, 5)) == 0)

24219

+ {

24220

+ int do_abort;

24221

+

24222

+ do_abort = (counters.c1 == 0) ? 1 : 0;

24223

+ __builtin_non_tx_store (

24224

+ (uint64_t *)&counters.c1, counters.c1 + 1);

24225

+ if (do_abort == 1)

24226

+ {

24227

+ __builtin_tabort (256);

24228

+ }

24229

+ counters.c2 = counters.c2 + 10;

24230

+ __builtin_non_tx_store ((uint64_t *)&counters.c3, 3);

24231

+ rc = __builtin_tend ();

24232

+ if (rc != 0)

24233

+ {

24234

+ return 100 * rc + 5;

24235

+ }

24236

+ if (counters.c1 != 2)

24237

+ {

24238

+ return 100 * counters.c1 + 2;

24239

+ }

24240

+ if (counters.c2 != 10)

24241

+ {

24242

+ return 100 * counters.c2 + 3;

24243

+ }

24244

+ if (counters.c3 != 3)

24245

+ {

24246

+ return 100 * counters.c3 + 6;

24247

+ }

24248

+ }

24249

+ else

24250

+ {

24251

+ return 100 * rc + 4;

24252

+ }

24253

+

24254

+ return 0;

24255

+}

24256

+

24257

+static int test_tbegin_retry_nofloat (void)

24258

+{

24259

+ int rc;

24260

+

24261

+ counters.c1 = 0;

24262

+ counters.c2 = 0;

24263

+ counters.c3 = 0;

24264

+ if ((rc = __builtin_tbegin_retry_nofloat ((void *)0, 5)) == 0)

24265

+ {

24266

+ int do_abort;

24267

+

24268

+ do_abort = (counters.c1 == 0) ? 1 : 0;

24269

+ __builtin_non_tx_store (

24270

+ (uint64_t *)&counters.c1, counters.c1 + 1);

24271

+ if (do_abort == 1)

24272

+ {

24273

+ __builtin_tabort (256);

24274

+ }

24275

+ counters.c2 = counters.c2 + 10;

24276

+ __builtin_non_tx_store ((uint64_t *)&counters.c3, 3);

24277

+ rc = __builtin_tend ();

24278

+ if (rc != 0)

24279

+ {

24280

+ return 100 * rc + 5;

24281

+ }

24282

+ if (counters.c1 != 2)

24283

+ {

24284

+ return 100 * counters.c1 + 2;

24285

+ }

24286

+ if (counters.c2 != 10)

24287

+ {

24288

+ return 100 * counters.c2 + 3;

24289

+ }

24290

+ if (counters.c3 != 3)

24291

+ {

24292

+ return 100 * counters.c3 + 6;

24293

+ }

24294

+ }

24295

+ else

24296

+ {

24297

+ return 100 * rc + 4;

24298

+ }

24299

+

24300

+ return 0;

24301

+}

24302

+

24303

+static int test_tbegin_aborts (void)

24304

+{

24305

+ float f;

24306

+ int rc;

24307

+

24308

+ f = 77;

24309

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

24310

+ {

24311

+ f = 88;

24312

+ __builtin_tabort (256);

24313

+ return 2;

24314

+ }

24315

+ else if (rc != 2)

24316

+ {

24317

+ return 3;

24318

+ }

24319

+ if (f != 77)

24320

+ {

24321

+ return 4;

24322

+ }

24323

+ f = 66;

24324

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

24325

+ {

24326

+ f = 99;

24327

+ __builtin_tabort (257);

24328

+ return 5;

24329

+ }

24330

+ else if (rc != 3)

24331

+ {

24332

+ return 100 * rc + 6;

24333

+ }

24334

+ if (f != 66)

24335

+ {

24336

+ return 100 * f + 7;

24337

+ }

24338

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

24339

+ {

24340

+ global.float_3 = global.float_1 + global.float_2;

24341

+ rc = __builtin_tend ();

24342

+ if (rc != 0)

24343

+ {

24344

+ return 100 * rc + 8;

24345

+ }

24346

+ }

24347

+ else

24348

+ {

24349

+ return 100 * rc + 9;

24350

+ }

24351

+ if (global.float_3 != global.float_1 + global.float_2)

24352

+ {

24353

+ return 100 * rc + 10;

24354

+ }

24355

+

24356

+ return 0;

24357

+}

24358

+

24359

+static __attribute__((noinline)) void indirect_abort(int abort_code)

24360

+{

24361

+ __builtin_tabort (abort_code);

24362

+

24363

+ return;

24364

+}

24365

+

24366

+static int test_tbegin_indirect_aborts (void)

24367

+{

24368

+ float f;

24369

+ int rc;

24370

+

24371

+ f = 77;

24372

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

24373

+ {

24374

+ f = 88;

24375

+ indirect_abort(256);

24376

+ return 2;

24377

+ }

24378

+ else if (rc != 2)

24379

+ {

24380

+ return 100 * rc + 3;

24381

+ }

24382

+ if (f != 77)

24383

+ {

24384

+ return 100 * rc + 4;

24385

+ }

24386

+ f = 66;

24387

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

24388

+ {

24389

+ f = 99;

24390

+ indirect_abort(257);

24391

+ return 5;

24392

+ }

24393

+ else if (rc != 3)

24394

+ {

24395

+ return 100 * rc + 6;

24396

+ }

24397

+ if (f != 66)

24398

+ {

24399

+ return 100 * f + 7;

24400

+ }

24401

+

24402

+ return 0;

24403

+}

24404

+

24405

+static int test_tbegin_nofloat_aborts (void)

24406

+{

24407

+ int rc;

24408

+

24409

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

24410

+ {

24411

+ __builtin_tabort (256);

24412

+ return 2;

24413

+ }

24414

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

24415

+ {

24416

+ __builtin_tabort (257);

24417

+ return 1005;

24418

+ }

24419

+ else if (rc != 3)

24420

+ {

24421

+ return 1000 * rc + 6;

24422

+ }

24423

+

24424

+ return 0;

24425

+}

24426

+

24427

+static int test_tbegin_nofloat_indirect_aborts (void)

24428

+{

24429

+ int rc;

24430

+

24431

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

24432

+ {

24433

+ indirect_abort (256);

24434

+ return 2;

24435

+ }

24436

+ if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0)

24437

+ {

24438

+ indirect_abort (257);

24439

+ return 1005;

24440

+ }

24441

+ else if (rc != 3)

24442

+ {

24443

+ return 1000 * rc + 6;

24444

+ }

24445

+

24446

+ return 0;

24447

+}

24448

+

24449

+static

24450

+int _test_tbegin_retry_aborts (int retries, uint64_t abort_code)

24451

+{

24452

+ int rc;

24453

+

24454

+ counters.c1 = 0;

24455

+ if ((rc = __builtin_tbegin_retry ((void *)0, retries)) == 0)

24456

+ {

24457

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, counters.c1 + 1);

24458

+ __builtin_tabort (abort_code);

24459

+ return 2;

24460

+ }

24461

+ else

24462

+ {

24463

+ if ((abort_code & 1) == 0)

24464

+ {

24465

+ if (rc != 2)

24466

+ {

24467

+ return 100 * rc + 2003;

24468

+ }

24469

+ else if (counters.c1 != (uint64_t)retries + 1)

24470

+ {

24471

+ return 1000 * counters.c1 + 100 * retries + 4;

24472

+ }

24473

+ }

24474

+ else

24475

+ {

24476

+ if (rc != 3)

24477

+ {

24478

+ return 100 * rc + 3005;

24479

+ }

24480

+ else if (counters.c1 != 1)

24481

+ {

24482

+ return 1000 * counters.c1 + 100 * retries + 6;

24483

+ }

24484

+ }

24485

+ }

24486

+

24487

+ return 0;

24488

+}

24489

+

24490

+static int test_tbegin_retry_aborts (void)

24491

+{

24492

+ int rc;

24493

+ int retries;

24494

+

24495

+ for (retries = 1; retries <= 3; retries++)

24496

+ {

24497

+ rc = _test_tbegin_retry_aborts (retries, 256);

24498

+ if (rc != 0)

24499

+ {

24500

+ return 10000 + rc;

24501

+ }

24502

+ }

24503

+ for (retries = 1; retries <= 3; retries++)

24504

+ {

24505

+ rc = _test_tbegin_retry_aborts (retries, 257);

24506

+ if (rc != 0)

24507

+ {

24508

+ return 20000 + rc;

24509

+ }

24510

+ }

24511

+ if ((rc = __builtin_tbegin_retry ((void *)0, 5)) == 0)

24512

+ {

24513

+ global.float_3 = global.float_1 + global.float_2;

24514

+ rc = __builtin_tend ();

24515

+ if (rc != 0)

24516

+ {

24517

+ return 30000 + 100 * rc + 6;

24518

+ }

24519

+ }

24520

+ else

24521

+ {

24522

+ return 30000 + 100 * rc + 7;

24523

+ }

24524

+

24525

+ return 0;

24526

+}

24527

+

24528

+static int _test_tbegin_retry_nofloat_aborts (int retries, uint64_t abort_code)

24529

+{

24530

+ int rc;

24531

+

24532

+ counters.c1 = 0;

24533

+ if ((rc = __builtin_tbegin_retry_nofloat ((void *)0, retries)) == 0)

24534

+ {

24535

+ __builtin_non_tx_store ((uint64_t *)&counters.c1, counters.c1 + 1);

24536

+ __builtin_tabort (abort_code);

24537

+ return 2;

24538

+ }

24539

+ else

24540

+ {

24541

+ if ((abort_code & 1) == 0)

24542

+ {

24543

+ if (rc != 2)

24544

+ {

24545

+ return 100 * rc + 2003;

24546

+ }

24547

+ else if (counters.c1 != (uint64_t)retries + 1)

24548

+ {

24549

+ return 1000 * counters.c1 + 100 * retries + 4;

24550

+ }

24551

+ }

24552

+ else

24553

+ {

24554

+ if (rc != 3)

24555

+ {

24556

+ return 100 * rc + 3005;

24557

+ }

24558

+ else if (counters.c1 != 1)

24559

+ {

24560

+ return 1000 * counters.c1 + 100 * retries + 6;

24561

+ }

24562

+ }

24563

+ }

24564

+

24565

+ return 0;

24566

+}

24567

+

24568

+static int test_tbegin_retry_nofloat_aborts (void)

24569

+{

24570

+ int rc;

24571

+ int retries;

24572

+

24573

+ for (retries = 1; retries <= 3; retries++)

24574

+ {

24575

+ rc = _test_tbegin_retry_nofloat_aborts (retries, 256);

24576

+ if (rc != 0)

24577

+ {

24578

+ return 10 * retries + rc;

24579

+ }

24580

+ }

24581

+ for (retries = 1; retries <= 3; retries++)

24582

+ {

24583

+ rc = _test_tbegin_retry_nofloat_aborts (retries, 257);

24584

+ if (rc != 0)

24585

+ {

24586

+ return 10000 + 10 * retries + rc;

24587

+ }

24588

+ }

24589

+

24590

+ return 0;

24591

+}

24592

+

24593

+static int test_tbegin_tdb (void)

24594

+{

24595

+ int rc;

24596

+

24597

+ local_tdb.format = 0;

24598

+ if ((rc = __builtin_tbegin (&local_tdb)) == 0)

24599

+ {

24600

+ rc = __builtin_tend ();

24601

+ if (rc != 0)

24602

+ {

24603

+ return 100 * rc + 1;

24604

+ }

24605

+ if (local_tdb.format != 0)

24606

+ {

24607

+ dump_tdb (&local_tdb);

24608

+ return 100 * local_tdb.format + 2;

24609

+ }

24610

+ }

24611

+ else

24612

+ {

24613

+ return 100 * rc + 3;

24614

+ }

24615

+ local_tdb.format = 0;

24616

+ if ((rc = __builtin_tbegin (&local_tdb)) == 0)

24617

+ {

24618

+ __builtin_tabort (257);

24619

+ return 4;

24620

+ }

24621

+ else

24622

+ {

24623

+ if (rc != 3)

24624

+ {

24625

+ return 100 * rc + 5;

24626

+ }

24627

+ if (local_tdb.format != 1)

24628

+ {

24629

+ dump_tdb (&local_tdb);

24630

+ return 100 * local_tdb.format + 6;

24631

+ }

24632

+ }

24633

+ local_tdb256.format = 0;

24634

+ if ((rc = __builtin_tbegin (&local_tdb256)) == 0)

24635

+ {

24636

+ rc = __builtin_tend ();

24637

+ if (rc != 0)

24638

+ {

24639

+ return 1100 * rc + 1;

24640

+ }

24641

+ if (local_tdb256.format != 0)

24642

+ {

24643

+ dump_tdb (&local_tdb256);

24644

+ return 1100 * local_tdb256.format + 2;

24645

+ }

24646

+ }

24647

+ else

24648

+ {

24649

+ return 1100 * rc + 3;

24650

+ }

24651

+ local_tdb256.format = 0;

24652

+ if ((rc = __builtin_tbegin (&local_tdb256)) == 0)

24653

+ {

24654

+ __builtin_tabort (257);

24655

+ return 2004;

24656

+ }

24657

+ else

24658

+ {

24659

+ if (rc != 3)

24660

+ {

24661

+ return 2100 * rc + 5;

24662

+ }

24663

+ if (local_tdb256.format != 1)

24664

+ {

24665

+ dump_tdb (&local_tdb256);

24666

+ return 2100 * local_tdb256.format + 6;

24667

+ }

24668

+ }

24669

+

24670

+ return 0;

24671

+}

24672

+

24673

+static int test_tbegin_nofloat_tdb (void)

24674

+{

24675

+ int rc;

24676

+

24677

+ local_tdb.format = 0;

24678

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb)) == 0)

24679

+ {

24680

+ rc = __builtin_tend ();

24681

+ if (rc != 0)

24682

+ {

24683

+ return 100 * rc + 1;

24684

+ }

24685

+ if (local_tdb.format != 0)

24686

+ {

24687

+ dump_tdb (&local_tdb);

24688

+ return 100 * local_tdb.format + 2;

24689

+ }

24690

+ }

24691

+ else

24692

+ {

24693

+ return 3;

24694

+ }

24695

+ local_tdb.format = 0;

24696

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb)) == 0)

24697

+ {

24698

+ __builtin_tabort (257);

24699

+ return 4;

24700

+ }

24701

+ else

24702

+ {

24703

+ if (rc != 3)

24704

+ {

24705

+ return 100 * rc + 5;

24706

+ }

24707

+ if (local_tdb.format != 1)

24708

+ {

24709

+ dump_tdb (&local_tdb);

24710

+ return 100 * local_tdb.format + 6;

24711

+ }

24712

+ }

24713

+ local_tdb256.format = 0;

24714

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb256)) == 0)

24715

+ {

24716

+ rc = __builtin_tend ();

24717

+ if (rc != 0)

24718

+ {

24719

+ return 1100 * rc + 1;

24720

+ }

24721

+ if (local_tdb256.format != 0)

24722

+ {

24723

+ dump_tdb (&local_tdb256);

24724

+ return 1100 * local_tdb256.format + 2;

24725

+ }

24726

+ }

24727

+ else

24728

+ {

24729

+ return 1003;

24730

+ }

24731

+ local_tdb256.format = 0;

24732

+ if ((rc = __builtin_tbegin_nofloat (&local_tdb256)) == 0)

24733

+ {

24734

+ __builtin_tabort (257);

24735

+ return 2004;

24736

+ }

24737

+ else

24738

+ {

24739

+ if (rc != 3)

24740

+ {

24741

+ return 2100 * rc + 5;

24742

+ }

24743

+ if (local_tdb256.format != 1)

24744

+ {

24745

+ dump_tdb (&local_tdb256);

24746

+ return 2100 * local_tdb256.format + 6;

24747

+ }

24748

+ }

24749

+

24750

+ return 0;

24751

+}

24752

+

24753

+static int test_tbegin_retry_tdb (void)

24754

+{

24755

+ int rc;

24756

+

24757

+ local_tdb256.format = 0;

24758

+ if ((rc = __builtin_tbegin_retry (&local_tdb256, 2)) == 0)

24759

+ {

24760

+ rc = __builtin_tend ();

24761

+ if (rc != 0)

24762

+ {

24763

+ return 1100 * rc + 1;

24764

+ }

24765

+ if (local_tdb256.format != 0)

24766

+ {

24767

+ dump_tdb (&local_tdb256);

24768

+ return 1100 * local_tdb256.format + 2;

24769

+ }

24770

+ }

24771

+ else

24772

+ {

24773

+ return 1003;

24774

+ }

24775

+ local_tdb256.format = 0;

24776

+ if ((rc = __builtin_tbegin_retry (&local_tdb256, 2)) == 0)

24777

+ {

24778

+ __builtin_tabort (257);

24779

+ return 2004;

24780

+ }

24781

+ else

24782

+ {

24783

+ if (rc != 3)

24784

+ {

24785

+ return 2100 * rc + 5;

24786

+ }

24787

+ if (local_tdb256.format != 1)

24788

+ {

24789

+ dump_tdb (&local_tdb256);

24790

+ return 2100 * local_tdb256.format + 6;

24791

+ }

24792

+ }

24793

+

24794

+ return 0;

24795

+}

24796

+

24797

+static int test_tbegin_retry_nofloat_tdb (void)

24798

+{

24799

+ int rc;

24800

+

24801

+ local_tdb.format = 0;

24802

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb, 2)) == 0)

24803

+ {

24804

+ rc = __builtin_tend ();

24805

+ if (rc != 0)

24806

+ {

24807

+ return 100 * rc + 1;

24808

+ }

24809

+ if (local_tdb.format != 0)

24810

+ {

24811

+ dump_tdb (&local_tdb);

24812

+ return 100 * local_tdb.format + 2;

24813

+ }

24814

+ }

24815

+ else

24816

+ {

24817

+ return 100 * rc + 3;

24818

+ }

24819

+ local_tdb.format = 0;

24820

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb, 2)) == 0)

24821

+ {

24822

+ __builtin_tabort (257);

24823

+ return 4;

24824

+ }

24825

+ else

24826

+ {

24827

+ if (rc != 3)

24828

+ {

24829

+ return 100 * rc + 5;

24830

+ }

24831

+ if (local_tdb.format != 1)

24832

+ {

24833

+ dump_tdb (&local_tdb);

24834

+ return 100 * local_tdb.format + 6;

24835

+ }

24836

+ }

24837

+ local_tdb256.format = 0;

24838

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb256, 2)) == 0)

24839

+ {

24840

+ rc = __builtin_tend ();

24841

+ if (rc != 0)

24842

+ {

24843

+ return 1100 * rc + 1;

24844

+ }

24845

+ if (local_tdb256.format != 0)

24846

+ {

24847

+ dump_tdb (&local_tdb256);

24848

+ return 1100 * local_tdb256.format + 2;

24849

+ }

24850

+ }

24851

+ else

24852

+ {

24853

+ return 1100 * rc + 3;

24854

+ }

24855

+ local_tdb256.format = 0;

24856

+ if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb256, 2)) == 0)

24857

+ {

24858

+ __builtin_tabort (257);

24859

+ return 2004;

24860

+ }

24861

+ else

24862

+ {

24863

+ if (rc != 3)

24864

+ {

24865

+ return 2100 * rc + 5;

24866

+ }

24867

+ if (local_tdb256.format != 1)

24868

+ {

24869

+ dump_tdb (&local_tdb256);

24870

+ return 2100 * local_tdb256.format + 6;

24871

+ }

24872

+ }

24873

+

24874

+ return 0;

24875

+}

24876

+

24877

+static int test_etnd (void)

24878

+{

24879

+ int rc;

24880

+

24881

+ counters.c1 = 0;

24882

+ counters.c2 = 0;

24883

+ counters.c3 = 0;

24884

+ if ((rc = __builtin_tbegin ((void *)0)) == 0)

24885

+ {

24886

+ counters.c1 = __builtin_tx_nesting_depth ();

24887

+ if (__builtin_tbegin ((void *)0) == 0)

24888

+ {

24889

+ counters.c2 = __builtin_tx_nesting_depth ();

24890

+ if (__builtin_tbegin ((void *)0) == 0)

24891

+ {

24892

+ counters.c3 = __builtin_tx_nesting_depth ();

24893

+ __builtin_tend ();

24894

+ }

24895

+ __builtin_tend ();

24896

+ }

24897

+ __builtin_tend ();

24898

+ }

24899

+ else

24900

+ {

24901

+ return 100 * rc + 1;

24902

+ }

24903

+ if (counters.c1 != 1)

24904

+ {

24905

+ return 100 * counters.c1 + 2;

24906

+ }

24907

+ if (counters.c2 != 2)

24908

+ {

24909

+ return 100 * counters.c2 + 3;

24910

+ }

24911

+ if (counters.c3 != 3)

24912

+ {

24913

+ return 100 * counters.c3 + 4;

24914

+ }

24915

+

24916

+ return 0;

24917

+}

24918

+

24919

+static int test_tbeginc (void)

24920

+{

24921

+ int rc;

24922

+

24923

+ counters.c1 = 0;

24924

+ __builtin_tbeginc ();

24925

+ counters.c1 = 1;

24926

+ rc = __builtin_tend ();

24927

+ if (rc != 0)

24928

+ {

24929

+ return 10000 * rc + 1;

24930

+ }

24931

+ if (counters.c1 != 1)

24932

+ {

24933

+ return 100000 * counters.c1 + 3;

24934

+ }

24935

+

24936

+ return 0;

24937

+}

24938

+

24939

+/* ---------------------------- local testing framework functions ---------- */

24940

+

24941

+static int run_one_test (const test_table_entry_t *test_entry)

24942

+{

24943

+ int do_print_passes;

24944

+ int succeeded;

24945

+ int rc;

24946

+ int i;

24947

+

24948

+ /* Warmup run to get all necessary data and instruction pages into the page

24949

+ * tables. */

24950

+ {

24951

+ int run;

24952

+

24953

+ do_dump_tdb = 0;

24954

+ for (run = 0; run < NUM_WARMUP_RUNS; run++)

24955

+ {

24956

+ test_entry->test_func ();

24957

+ }

24958

+ do_dump_tdb = 1;

24959

+ }

24960

+ do_print_passes = (

24961

+ test_entry->required_quorum != 1 ||

24962

+ test_entry->max_repetitions != 1);

24963

+ printf ("RRR RUN %s\n", test_entry->name);

24964

+ if (do_print_passes == 1)

24965

+ {

24966

+ printf (

24967

+ " (requires %d successful out of %d runs)\n",

24968

+ test_entry->required_quorum,

24969

+ test_entry->max_repetitions);

24970

+ }

24971

+ succeeded = 0;

24972

+ rc = 0;

24973

+ for (rc = 0, i = 0; i < test_entry->max_repetitions; i++)

24974

+ {

24975

+ if (do_print_passes == 1)

24976

+ {

24977

+ if (i == 0)

24978

+ {

24979

+ printf (" ");

24980

+ }

24981

+ else

24982

+ {

24983

+ printf (",");

24984

+ }

24985

+ }

24986

+ rc = test_entry->test_func ();

24987

+ if (rc == 0)

24988

+ {

24989

+ if (do_print_passes == 1)

24990

+ {

24991

+ printf (" success");

24992

+ }

24993

+ succeeded++;

24994

+ if (succeeded >= test_entry->required_quorum)

24995

+ {

24996

+ break;

24997

+ }

24998

+ }

24999

+ else

25000

+ {

25001

+ printf (" failed (rc = %d)", rc);

25002

+ }

25003

+ }

25004

+ if (do_print_passes == 1 || rc != 0)

25005

+ {

25006

+ printf ("\n");

25007

+ }

25008

+ if (succeeded >= test_entry->required_quorum)

25009

+ {

25010

+ printf ("+++ OK %s\n", test_entry->name);

25011

+

25012

+ return 0;

25013

+ }

25014

+ else

25015

+ {

25016

+ printf ("--- FAIL %s\n", test_entry->name);

25017

+

25018

+ return (rc != 0) ? rc : -1;

25019

+ }

25020

+}

25021

+

25022

+static int run_all_tests (const test_table_entry_t *test_table)

25023

+{

25024

+ const test_table_entry_t *test;

25025

+ int rc;

25026

+

25027

+ for (

25028

+ rc = 0, test = &test_table[0];

25029

+ test->test_func != NULL && rc == 0; test++)

25030

+ {

25031

+ rc = run_one_test (test);

25032

+ }

25033

+

25034

+ return rc;

25035

+}

25036

+

25037

+/* ---------------------------- interface functions ------------------------ */

25038

+

25039

+int main (void)

25040

+{

25041

+ const test_table_entry_t test_table[] = {

25042

+ TEST_NO_REP (test_constants),

25043

+ TEST_DF_REP (test_tbegin_ntstg_tend),

25044

+ TEST_DF_REP (test_tbegin_ntstg_tabort),

25045

+ TEST_DF_REP (test_tbegin_nofloat),

25046

+ TEST_NO_REP (test_tbegin_retry),

25047

+ TEST_NO_REP (test_tbegin_retry_nofloat),

25048

+ TEST_DF_REP (test_tbegin_aborts),

25049

+ TEST_DF_REP (test_tbegin_indirect_aborts),

25050

+ TEST_DF_REP (test_tbegin_nofloat_aborts),

25051

+ TEST_DF_REP (test_tbegin_nofloat_indirect_aborts),

25052

+ TEST_NO_REP (test_tbegin_retry_aborts),

25053

+ TEST_NO_REP (test_tbegin_retry_nofloat_aborts),

25054

+ TEST_DF_REP (test_tbegin_tdb),

25055

+ TEST_DF_REP (test_tbegin_nofloat_tdb),

25056

+ TEST_NO_REP (test_tbegin_retry_tdb),

25057

+ TEST_NO_REP (test_tbegin_retry_nofloat_tdb),

25058

+ TEST_DF_REP (test_etnd),

25059

+ TEST_DF_REP (test_tbeginc),

25060

+ { (void *)0, 0, 0 }

25061

+ };

25062

+

25063

+ {

25064

+ int rc;

25065

+

25066

+ rc = run_all_tests (test_table);

25067

+

25068

+ return rc;

25069

+ }

25070

+}

25071

Index: gcc/testsuite/gcc.target/s390/hotpatch-7.c

25072

===================================================================

25073

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-7.c (.../tags/gcc_4_8_2_release)

25074

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-7.c (.../branches/gcc-4_8-branch)

25075

@@ -0,0 +1,21 @@

25076

+/* Functional tests for the function hotpatching feature. */

25077

+

25078

+/* { dg-do run } */

25079

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

25080

+

25081

+#include <stdio.h>

25082

+

25083

+__attribute__ ((hotpatch(0)))

25084

+void hp1(void)

25085

+{

25086

+ printf("hello, world!\n");

25087

+}

25088

+

25089

+int main (void)

25090

+{

25091

+ return 0;

25092

+}

25093

+

25094

+/* Check number of occurences of certain instructions. */

25095

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

25096

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

25097

Index: gcc/testsuite/gcc.target/s390/htm-builtins-2.c

25098

===================================================================

25099

--- a/src/gcc/testsuite/gcc.target/s390/htm-builtins-2.c (.../tags/gcc_4_8_2_release)

25100

+++ b/src/gcc/testsuite/gcc.target/s390/htm-builtins-2.c (.../branches/gcc-4_8-branch)

25101

@@ -0,0 +1,682 @@

25102

+/* Functional tests of the htm __TM_... macros. */

25103

+

25104

+/* { dg-do run } */

25105

+/* { dg-require-effective-target htm } */

25106

+/* { dg-options "-O3 -march=zEC12 -mzarch" } */

25107

+

25108

+/* ---------------------------- included header files ---------------------- */

25109

+

25110

+#include <stdio.h>

25111

+#include <string.h>

25112

+#include <inttypes.h>

25113

+#include <htmxlintrin.h>

25114

+

25115

+/* ---------------------------- local definitions -------------------------- */

25116

+

25117

+#define DEFAULT_MAX_REPETITIONS 5

25118

+#define DEFAULT_REQUIRED_QUORUM ((DEFAULT_MAX_REPETITIONS) - 1)

25119

+#define DEFAULT_ABORT_ADDRESS (0x12345678u)

25120

+

25121

+/* ---------------------------- local macros ------------------------------- */

25122

+

25123

+#define TEST_DF_REP(name) \

25124

+ { #name, name, DEFAULT_MAX_REPETITIONS, DEFAULT_REQUIRED_QUORUM }

25125

+#define TEST_NO_REP(name) { #name, name, 1, 1 }

25126

+

25127

+/* ---------------------------- local types -------------------------------- */

25128

+

25129

+typedef int (*test_func_t)(void);

25130

+

25131

+typedef struct

25132

+{

25133

+ const char *name;

25134

+ test_func_t test_func;

25135

+ int max_repetitions;

25136

+ int required_quorum;

25137

+} test_table_entry_t;

25138

+

25139

+typedef enum

25140

+{

25141

+ ABORT_T_SYSTEM = 0,

25142

+ ABORT_T_USER = 1,

25143

+} abort_user_t;

25144

+

25145

+typedef enum

25146

+{

25147

+ ABORT_T_NONE = 0,

25148

+ ABORT_T_ILLEGAL,

25149

+ ABORT_T_FOOTPRINT_EXCEEDED,

25150

+ ABORT_T_NESTED_TOO_DEEP,

25151

+ ABORT_T_CONFLICT,

25152

+

25153

+ ABORT_T_INVALID_ABORT_CODE

25154

+} abort_t;

25155

+

25156

+/* ---------------------------- local variables ---------------------------- */

25157

+

25158

+__attribute__ ((aligned(256))) static struct __htm_tdb local_tdb256;

25159

+static struct __htm_tdb local_tdb;

25160

+

25161

+static abort_t const abort_classes[] =

25162

+{

25163

+ ABORT_T_INVALID_ABORT_CODE,

25164

+ ABORT_T_NONE,

25165

+ ABORT_T_NONE,

25166

+ ABORT_T_NONE,

25167

+

25168

+ ABORT_T_ILLEGAL,

25169

+ ABORT_T_NONE,

25170

+ ABORT_T_NONE,

25171

+ ABORT_T_FOOTPRINT_EXCEEDED,

25172

+

25173

+ ABORT_T_FOOTPRINT_EXCEEDED,

25174

+ ABORT_T_CONFLICT,

25175

+ ABORT_T_CONFLICT,

25176

+ ABORT_T_ILLEGAL,

25177

+

25178

+ ABORT_T_NONE,

25179

+ ABORT_T_NESTED_TOO_DEEP,

25180

+ ABORT_T_NONE,

25181

+ ABORT_T_NONE,

25182

+

25183

+ ABORT_T_NONE

25184

+};

25185

+

25186

+static size_t num_abort_classes = sizeof(abort_classes) / sizeof(abort_t);

25187

+

25188

+/* ---------------------------- exported variables (globals) --------------- */

25189

+

25190

+int global_int = 0;

25191

+uint64_t global_u64 = 0;

25192

+float global_float_1 = 1.0;

25193

+float global_float_2 = 2.5;

25194

+float global_float_3 = 0.0;

25195

+__attribute__ ((aligned(256))) struct

25196

+{

25197

+ volatile uint64_t c1;

25198

+ volatile uint64_t c2;

25199

+ volatile uint64_t c3;

25200

+} counters = { 0, 0, 0 };

25201

+

25202

+/* ---------------------------- local helper functions --------------------- */

25203

+

25204

+static void dump_tdb(struct __htm_tdb *tdb)

25205

+{

25206

+ unsigned char *p;

25207

+ int i;

25208

+ int j;

25209

+

25210

+ p = (unsigned char *)tdb;

25211

+ for (i = 0; i < 16; i++)

25212

+ {

25213

+ fprintf(stderr, "0x%02x ", i * 16);

25214

+ for (j = 0; j < 16; j++)

25215

+ {

25216

+ fprintf(stderr, "%02x", (int)p[i * 16 + j]);

25217

+ if (j < 15)

25218

+ {

25219

+ fprintf(stderr, " ");

25220

+ }

25221

+ if (j == 7)

25222

+ {

25223

+ fprintf(stderr, " ");

25224

+ }

25225

+ }

25226

+ fprintf(stderr, "\n");

25227

+ }

25228

+

25229

+ return;

25230

+}

25231

+

25232

+static void make_fake_tdb(struct __htm_tdb *tdb)

25233

+{

25234

+ memset(tdb, 0, sizeof(*tdb));

25235

+ tdb->format = 1;

25236

+ tdb->nesting_depth = 1;

25237

+ tdb->atia = DEFAULT_ABORT_ADDRESS;

25238

+ tdb->abort_code = 11;

25239

+

25240

+ return;

25241

+}

25242

+

25243

+static int check_abort_code_in_tdb(struct __htm_tdb *tdb, uint64_t abort_code)

25244

+{

25245

+ long expect_rc;

25246

+ long rc;

25247

+

25248

+ if (abort_code != 0)

25249

+ {

25250

+ long addr;

25251

+

25252

+ addr = __TM_failure_address(&local_tdb);

25253

+ if (addr != DEFAULT_ABORT_ADDRESS)

25254

+ {

25255

+ return 11;

25256

+ }

25257

+ }

25258

+ {

25259

+ long long tdb_abort_code;

25260

+

25261

+ tdb_abort_code = __TM_failure_code(tdb);

25262

+ if ((uint64_t)tdb_abort_code != abort_code)

25263

+ {

25264

+ fprintf(

25265

+ stderr, "tm_ac %" PRIu64 ", ac %" PRIu64

25266

+ ", tdb_ac %" PRIu64 "\n",

25267

+ (uint64_t)tdb_abort_code, abort_code,

25268

+ (uint64_t)tdb->abort_code);

25269

+ return 10;

25270

+ }

25271

+ }

25272

+ expect_rc = (abort_code >= 256) ? 1 : 0;

25273

+ rc = __TM_is_user_abort(tdb);

25274

+ if (rc != expect_rc)

25275

+ {

25276

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

25277

+ return 1;

25278

+ }

25279

+ {

25280

+ unsigned char code;

25281

+

25282

+ code = 0xffu;

25283

+ rc = __TM_is_named_user_abort(tdb, &code);

25284

+ if (rc != expect_rc)

25285

+ {

25286

+ fprintf(

25287

+ stderr, "rc %ld, expect_rc %ld\n", rc,

25288

+ expect_rc);

25289

+ return 2;

25290

+ }

25291

+ if (expect_rc == 1 && code != abort_code - 256)

25292

+ {

25293

+ return 3;

25294

+ }

25295

+ }

25296

+ if (abort_code > (uint64_t)num_abort_classes)

25297

+ {

25298

+ abort_code = (uint64_t)num_abort_classes;

25299

+ }

25300

+ expect_rc = (abort_classes[abort_code] == ABORT_T_ILLEGAL) ? 1 : 0;

25301

+ rc = __TM_is_illegal(tdb);

25302

+ if (rc != expect_rc)

25303

+ {

25304

+ dump_tdb(tdb);

25305

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

25306

+ return 4;

25307

+ }

25308

+ expect_rc =

25309

+ (abort_classes[abort_code] == ABORT_T_FOOTPRINT_EXCEEDED) ?

25310

+ 1 : 0;

25311

+ rc = __TM_is_footprint_exceeded(tdb);

25312

+ if (rc != expect_rc)

25313

+ {

25314

+ dump_tdb(tdb);

25315

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

25316

+ return 5;

25317

+ }

25318

+ expect_rc =

25319

+ (abort_classes[abort_code] == ABORT_T_NESTED_TOO_DEEP) ? 1 : 0;

25320

+ rc = __TM_is_nested_too_deep(tdb);

25321

+ if (rc != expect_rc)

25322

+ {

25323

+ dump_tdb(tdb);

25324

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

25325

+ return 6;

25326

+ }

25327

+ expect_rc = (abort_classes[abort_code] == ABORT_T_CONFLICT) ? 1 : 0;

25328

+ rc = __TM_is_conflict(tdb);

25329

+ if (rc != expect_rc)

25330

+ {

25331

+ dump_tdb(tdb);

25332

+ fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc);

25333

+ return 7;

25334

+ }

25335

+

25336

+ return 0;

25337

+}

25338

+

25339

+/* ---------------------------- local test functions ----------------------- */

25340

+

25341

+/* Not a test; make sure that the involved global cachelines are reserved for

25342

+ * writing. */

25343

+static int init_cache(void)

25344

+{

25345

+ make_fake_tdb(&local_tdb);

25346

+ make_fake_tdb(&local_tdb256);

25347

+ global_int = 0;

25348

+ global_u64 = 0;

25349

+ global_float_1 = 1.0;

25350

+ global_float_2 = 2.5;

25351

+ global_float_3 = 0.0;

25352

+ counters.c1 = 0;

25353

+ counters.c2 = 0;

25354

+ counters.c3 = 0;

25355

+

25356

+ return 0;

25357

+}

25358

+

25359

+static int test_abort_classification(void)

25360

+{

25361

+ int i;

25362

+

25363

+ make_fake_tdb(&local_tdb);

25364

+ for (i = 0; i <= 256; i++)

25365

+ {

25366

+ int rc;

25367

+

25368

+ local_tdb.abort_code = (uint64_t)i;

25369

+ rc = check_abort_code_in_tdb(&local_tdb, (uint64_t)i);

25370

+ if (rc != 0)

25371

+ {

25372

+ return 100 * i + rc;

25373

+ }

25374

+ }

25375

+

25376

+ return 0;

25377

+}

25378

+

25379

+static int test_cc_classification(void)

25380

+{

25381

+ long rc;

25382

+

25383

+ rc = __TM_is_failure_persistent(0);

25384

+ if (rc != 0)

25385

+ {

25386

+ return 1;

25387

+ }

25388

+ rc = __TM_is_failure_persistent(1);

25389

+ if (rc != 0)

25390

+ {

25391

+ return 2;

25392

+ }

25393

+ rc = __TM_is_failure_persistent(2);

25394

+ if (rc != 0)

25395

+ {

25396

+ return 3;

25397

+ }

25398

+ rc = __TM_is_failure_persistent(3);

25399

+ if (rc != 1)

25400

+ {

25401

+ return 4;

25402

+ }

25403

+

25404

+ return 0;

25405

+}

25406

+

25407

+static int test_tbegin_ntstg_tend(void)

25408

+{

25409

+ long rc;

25410

+

25411

+ counters.c1 = 0;

25412

+ counters.c2 = 0;

25413

+ if ((rc = __TM_simple_begin()) == 0)

25414

+ {

25415

+ __TM_non_transactional_store((uint64_t *)&counters.c1, 1);

25416

+ counters.c2 = 2;

25417

+ rc = __TM_end();

25418

+ if (rc != 0)

25419

+ {

25420

+ return 100 * rc + 5;

25421

+ }

25422

+ if (counters.c1 != 1)

25423

+ {

25424

+ return 100 * counters.c1 + 2;

25425

+ }

25426

+ if (counters.c2 != 2)

25427

+ {

25428

+ return 100 * counters.c2 + 3;

25429

+ }

25430

+ }

25431

+ else

25432

+ {

25433

+ return 100 * rc + 4;

25434

+ }

25435

+

25436

+ return 0;

25437

+}

25438

+

25439

+static int test_tbegin_ntstg_tabort(void)

25440

+{

25441

+ register float f;

25442

+

25443

+ counters.c1 = 0;

25444

+ counters.c2 = 0;

25445

+ f = 0;

25446

+ if (__TM_simple_begin() == 0)

25447

+ {

25448

+ __TM_non_transactional_store((uint64_t *)&counters.c1, 1);

25449

+ counters.c2 = 2;

25450

+ f = 1;

25451

+ __TM_named_abort(0);

25452

+ return 1;

25453

+ }

25454

+ if (counters.c1 != 1)

25455

+ {

25456

+ return 100 * counters.c1 + 2;

25457

+ }

25458

+ if (counters.c2 != 0)

25459

+ {

25460

+ return 100 * counters.c2 + 3;

25461

+ }

25462

+ if (f != 0)

25463

+ {

25464

+ return 100 * f + 4;

25465

+ }

25466

+

25467

+ return 0;

25468

+}

25469

+

25470

+static int test_tbegin_aborts(void)

25471

+{

25472

+ float f;

25473

+ long rc;

25474

+

25475

+ f = 77;

25476

+ if ((rc = __TM_simple_begin()) == 0)

25477

+ {

25478

+ f = 88;

25479

+ __TM_abort();

25480

+ return 2;

25481

+ }

25482

+ else if (rc != 2)

25483

+ {

25484

+ return 3;

25485

+ }

25486

+ if (f != 77)

25487

+ {

25488

+ return 4;

25489

+ }

25490

+ f = 66;

25491

+ if ((rc = __TM_simple_begin()) == 0)

25492

+ {

25493

+ f = 99;

25494

+ __TM_named_abort(3);

25495

+ return 5;

25496

+ }

25497

+ else if (rc != 3)

25498

+ {

25499

+ return 100 * rc + 6;

25500

+ }

25501

+ if (f != 66)

25502

+ {

25503

+ return 100 * f + 7;

25504

+ }

25505

+ if ((rc = __TM_simple_begin()) == 0)

25506

+ {

25507

+ global_float_3 = global_float_1 + global_float_2;

25508

+ rc = __TM_end();

25509

+ if (rc != 0)

25510

+ {

25511

+ return 100 * rc + 8;

25512

+ }

25513

+ }

25514

+ else

25515

+ {

25516

+ return 100 * rc + 9;

25517

+ }

25518

+ if (global_float_3 != global_float_1 + global_float_2)

25519

+ {

25520

+ return 100 * rc + 10;

25521

+ }

25522

+

25523

+ return 0;

25524

+}

25525

+

25526

+static int test_tbegin_tdb(void)

25527

+{

25528

+ long rc;

25529

+

25530

+ local_tdb.format = 0;

25531

+ if ((rc = __TM_begin(&local_tdb)) == 0)

25532

+ {

25533

+ rc = __TM_end();

25534

+ if (rc != 0)

25535

+ {

25536

+ return 100 * rc + 1;

25537

+ }

25538

+ if (local_tdb.format != 0)

25539

+ {

25540

+ dump_tdb(&local_tdb);

25541

+ return 100 * local_tdb.format + 2;

25542

+ }

25543

+ }

25544

+ else

25545

+ {

25546

+ return 100 * rc + 3;

25547

+ }

25548

+ local_tdb.format = 0;

25549

+ if ((rc = __TM_begin(&local_tdb)) == 0)

25550

+ {

25551

+ __TM_named_abort(1);

25552

+ return 4;

25553

+ }

25554

+ else

25555

+ {

25556

+ if (rc != 3)

25557

+ {

25558

+ return 100 * rc + 5;

25559

+ }

25560

+ if (local_tdb.format != 1)

25561

+ {

25562

+ dump_tdb(&local_tdb);

25563

+ return 100 * local_tdb.format + 6;

25564

+ }

25565

+ }

25566

+ local_tdb256.format = 0;

25567

+ if ((rc = __TM_begin(&local_tdb256)) == 0)

25568

+ {

25569

+ rc = __TM_end();

25570

+ if (rc != 0)

25571

+ {

25572

+ return 1100 * rc + 1;

25573

+ }

25574

+ if (local_tdb256.format != 0)

25575

+ {

25576

+ dump_tdb(&local_tdb256);

25577

+ return 1100 * local_tdb256.format + 2;

25578

+ }

25579

+ }

25580

+ else

25581

+ {

25582

+ return 1100 * rc + 3;

25583

+ }

25584

+#if 1 /*!!!does not work*/

25585

+ local_tdb256.format = 0;

25586

+ if ((rc = __TM_begin(&local_tdb256)) == 0)

25587

+ {

25588

+ __TM_named_abort(1);

25589

+ return 2004;

25590

+ }

25591

+ else

25592

+ {

25593

+ if (rc != 3)

25594

+ {

25595

+ return 2100 * rc + 5;

25596

+ }

25597

+ if (local_tdb256.format != 1)

25598

+ {

25599

+ dump_tdb(&local_tdb256);

25600

+ return 2100 * local_tdb256.format + 6;

25601

+ }

25602

+ }

25603

+#endif

25604

+

25605

+ return 0;

25606

+}

25607

+

25608

+static int test_etnd(void)

25609

+{

25610

+ long rc;

25611

+

25612

+ {

25613

+ long nd;

25614

+

25615

+ make_fake_tdb(&local_tdb);

25616

+ local_tdb.nesting_depth = 0;

25617

+ nd = __TM_nesting_depth(&local_tdb);

25618

+ if (nd != 0)

25619

+ {

25620

+ return 1;

25621

+ }

25622

+ local_tdb.nesting_depth = 7;

25623

+ nd = __TM_nesting_depth(&local_tdb);

25624

+ if (nd != 7)

25625

+ {

25626

+ return 7;

25627

+ }

25628

+ local_tdb.format = 0;

25629

+ nd = __TM_nesting_depth(&local_tdb);

25630

+ if (nd != 0)

25631

+ {

25632

+ return 2;

25633

+ }

25634

+ }

25635

+ counters.c1 = 0;

25636

+ counters.c1 = 0;

25637

+ counters.c2 = 0;

25638

+ counters.c3 = 0;

25639

+ if ((rc = __TM_simple_begin()) == 0)

25640

+ {

25641

+ counters.c1 = __TM_nesting_depth(0);

25642

+ if (__TM_simple_begin() == 0)

25643

+ {

25644

+ counters.c2 = __TM_nesting_depth(0);

25645

+ if (__TM_simple_begin() == 0)

25646

+ {

25647

+ counters.c3 = __TM_nesting_depth(0);

25648

+ __TM_end();

25649

+ }

25650

+ __TM_end();

25651

+ }

25652

+ __TM_end();

25653

+ }

25654

+ else

25655

+ {

25656

+ return 100 * rc + 1;

25657

+ }

25658

+ if (counters.c1 != 1)

25659

+ {

25660

+ return 100 * counters.c1 + 2;

25661

+ }

25662

+ if (counters.c2 != 2)

25663

+ {

25664

+ return 100 * counters.c2 + 3;

25665

+ }

25666

+ if (counters.c3 != 3)

25667

+ {

25668

+ return 100 * counters.c3 + 4;

25669

+ }

25670

+

25671

+ return 0;

25672

+}

25673

+

25674

+/* ---------------------------- local testing framework functions ---------- */

25675

+

25676

+static int run_one_test(const test_table_entry_t *test_entry)

25677

+{

25678

+ int do_print_passes;

25679

+ int succeeded;

25680

+ int rc;

25681

+ int i;

25682

+

25683

+ do_print_passes = (

25684

+ test_entry->required_quorum != 1 ||

25685

+ test_entry->max_repetitions != 1);

25686

+ printf("RRR RUN %s\n", test_entry->name);

25687

+ if (do_print_passes == 1)

25688

+ {

25689

+ printf(

25690

+ " (requires %d successful out of %d runs)\n",

25691

+ test_entry->required_quorum,

25692

+ test_entry->max_repetitions);

25693

+ }

25694

+ succeeded = 0;

25695

+ rc = 0;

25696

+ for (rc = 0, i = 0; i < test_entry->max_repetitions; i++)

25697

+ {

25698

+ if (do_print_passes == 1)

25699

+ {

25700

+ if (i == 0)

25701

+ {

25702

+ printf(" ");

25703

+ }

25704

+ else

25705

+ {

25706

+ printf(",");

25707

+ }

25708

+ }

25709

+ rc = test_entry->test_func();

25710

+ if (rc == 0)

25711

+ {

25712

+ if (do_print_passes == 1)

25713

+ {

25714

+ printf(" success");

25715

+ }

25716

+ succeeded++;

25717

+ if (succeeded >= test_entry->required_quorum)

25718

+ {

25719

+ break;

25720

+ }

25721

+ }

25722

+ else

25723

+ {

25724

+ printf(" failed (rc = %d)", rc);

25725

+ }

25726

+ }

25727

+ if (do_print_passes == 1 || rc != 0)

25728

+ {

25729

+ printf("\n");

25730

+ }

25731

+ if (succeeded >= test_entry->required_quorum)

25732

+ {

25733

+ printf("+++ OK %s\n", test_entry->name);

25734

+

25735

+ return 0;

25736

+ }

25737

+ else

25738

+ {

25739

+ printf("--- FAIL %s\n", test_entry->name);

25740

+

25741

+ return (rc != 0) ? rc : -1;

25742

+ }

25743

+}

25744

+

25745

+static int run_all_tests(const test_table_entry_t *test_table)

25746

+{

25747

+ const test_table_entry_t *test;

25748

+ int rc;

25749

+

25750

+ for (

25751

+ rc = 0, test = &test_table[0];

25752

+ test->test_func != NULL && rc == 0; test++)

25753

+ {

25754

+ rc = run_one_test(test);

25755

+ }

25756

+

25757

+ return rc;

25758

+}

25759

+

25760

+/* ---------------------------- interface functions ------------------------ */

25761

+

25762

+int main(void)

25763

+{

25764

+ const test_table_entry_t test_table[] = {

25765

+ TEST_NO_REP(init_cache),

25766

+ TEST_NO_REP(test_abort_classification),

25767

+ TEST_NO_REP(test_cc_classification),

25768

+ TEST_DF_REP(test_tbegin_ntstg_tend),

25769

+ TEST_DF_REP(test_tbegin_ntstg_tabort),

25770

+ TEST_DF_REP(test_tbegin_aborts),

25771

+ TEST_DF_REP(test_tbegin_tdb),

25772

+ TEST_DF_REP(test_etnd),

25773

+ { (void *)0, 0, 0 }

25774

+ };

25775

+

25776

+ {

25777

+ int rc;

25778

+

25779

+ rc = run_all_tests(test_table);

25780

+

25781

+ return rc;

25782

+ }

25783

+}

25784

Index: gcc/testsuite/gcc.target/s390/hotpatch-8.c

25785

===================================================================

25786

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-8.c (.../tags/gcc_4_8_2_release)

25787

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-8.c (.../branches/gcc-4_8-branch)

25788

@@ -0,0 +1,28 @@

25789

+/* Functional tests for the function hotpatching feature. */

25790

+

25791

+/* { dg-do run } */

25792

+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */

25793

+

25794

+#include <stdio.h>

25795

+

25796

+__attribute__ ((hotpatch))

25797

+inline void hp1(void)

25798

+{

25799

+ printf("hello, world!\n");

25800

+}

25801

+

25802

+__attribute__ ((hotpatch))

25803

+__attribute__ ((always_inline))

25804

+void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */

25805

+{

25806

+ printf("hello, world!\n");

25807

+} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */

25808

+

25809

+int main (void)

25810

+{

25811

+ return 0;

25812

+}

25813

+

25814

+/* Check number of occurences of certain instructions. */

25815

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

25816

+/* { dg-final { scan-assembler-not "nop\t0" } } */

25817

Index: gcc/testsuite/gcc.target/s390/hotpatch-9.c

25818

===================================================================

25819

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-9.c (.../tags/gcc_4_8_2_release)

25820

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-9.c (.../branches/gcc-4_8-branch)

25821

@@ -0,0 +1,21 @@

25822

+/* Functional tests for the function hotpatching feature. */

25823

+

25824

+/* { dg-do run } */

25825

+/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */

25826

+

25827

+#include <stdio.h>

25828

+

25829

+__attribute__ ((hotpatch(2)))

25830

+void hp1(void)

25831

+{

25832

+ printf("hello, world!\n");

25833

+}

25834

+

25835

+int main (void)

25836

+{

25837

+ return 0;

25838

+}

25839

+

25840

+/* Check number of occurences of certain instructions. */

25841

+/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */

25842

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

25843

Index: gcc/testsuite/gcc.target/s390/hotpatch-10.c

25844

===================================================================

25845

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-10.c (.../tags/gcc_4_8_2_release)

25846

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-10.c (.../branches/gcc-4_8-branch)

25847

@@ -0,0 +1,21 @@

25848

+/* Functional tests for the function hotpatching feature. */

25849

+

25850

+/* { dg-do run } */

25851

+/* { dg-options "-O3 -mzarch -mno-hotpatch --save-temps" } */

25852

+

25853

+#include <stdio.h>

25854

+

25855

+__attribute__ ((hotpatch(2)))

25856

+void hp1(void)

25857

+{

25858

+ printf("hello, world!\n");

25859

+}

25860

+

25861

+int main (void)

25862

+{

25863

+ return 0;

25864

+}

25865

+

25866

+/* Check number of occurences of certain instructions. */

25867

+/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */

25868

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

25869

Index: gcc/testsuite/gcc.target/s390/hotpatch-11.c

25870

===================================================================

25871

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-11.c (.../tags/gcc_4_8_2_release)

25872

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-11.c (.../branches/gcc-4_8-branch)

25873

@@ -0,0 +1,20 @@

25874

+/* Functional tests for the function hotpatching feature. */

25875

+

25876

+/* { dg-do run } */

25877

+/* { dg-options "-O3 -mzarch -mhotpatch -mno-hotpatch --save-temps" } */

25878

+

25879

+#include <stdio.h>

25880

+

25881

+void hp1(void)

25882

+{

25883

+ printf("hello, world!\n");

25884

+}

25885

+

25886

+int main (void)

25887

+{

25888

+ return 0;

25889

+}

25890

+

25891

+/* Check number of occurences of certain instructions. */

25892

+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */

25893

+/* { dg-final { scan-assembler-not "nop\t0" } } */

25894

Index: gcc/testsuite/gcc.target/s390/hotpatch-12.c

25895

===================================================================

25896

--- a/src/gcc/testsuite/gcc.target/s390/hotpatch-12.c (.../tags/gcc_4_8_2_release)

25897

+++ b/src/gcc/testsuite/gcc.target/s390/hotpatch-12.c (.../branches/gcc-4_8-branch)

25898

@@ -0,0 +1,20 @@

25899

+/* Functional tests for the function hotpatching feature. */

25900

+

25901

+/* { dg-do run } */

25902

+/* { dg-options "-O3 -mzarch -mno-hotpatch -mhotpatch=1 --save-temps" } */

25903

+

25904

+#include <stdio.h>

25905

+

25906

+void hp1(void)

25907

+{

25908

+ printf("hello, world!\n");

25909

+}

25910

+

25911

+int main (void)

25912

+{

25913

+ return 0;

25914

+}

25915

+

25916

+/* Check number of occurences of certain instructions. */

25917

+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */

25918

+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */

25919

Index: gcc/testsuite/gcc.target/mips/bswap-1.c

25920

===================================================================

25921

--- a/src/gcc/testsuite/gcc.target/mips/bswap-1.c (.../tags/gcc_4_8_2_release)

25922

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-1.c (.../branches/gcc-4_8-branch)

25923

@@ -0,0 +1,10 @@

25924

+/* { dg-options "isa_rev>=2" } */

25925

+/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */

25926

+

25927

+NOMIPS16 unsigned short

25928

+foo (unsigned short x)

25929

+{

25930

+ return ((x << 8) & 0xff00) | ((x >> 8) & 0xff);

25931

+}

25932

+

25933

+/* { dg-final { scan-assembler "\twsbh\t" } } */

25934

Index: gcc/testsuite/gcc.target/mips/bswap-2.c

25935

===================================================================

25936

--- a/src/gcc/testsuite/gcc.target/mips/bswap-2.c (.../tags/gcc_4_8_2_release)

25937

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-2.c (.../branches/gcc-4_8-branch)

25938

@@ -0,0 +1,9 @@

25939

+/* { dg-options "isa_rev>=2" } */

25940

+

25941

+NOMIPS16 unsigned short

25942

+foo (unsigned short x)

25943

+{

25944

+ return __builtin_bswap16 (x);

25945

+}

25946

+

25947

+/* { dg-final { scan-assembler "\twsbh\t" } } */

25948

Index: gcc/testsuite/gcc.target/mips/pr59137.c

25949

===================================================================

25950

--- a/src/gcc/testsuite/gcc.target/mips/pr59137.c (.../tags/gcc_4_8_2_release)

25951

+++ b/src/gcc/testsuite/gcc.target/mips/pr59137.c (.../branches/gcc-4_8-branch)

25952

@@ -0,0 +1,34 @@

25953

+/* { dg-do run } */

25954

+/* { dg-options "-mno-plt" } */

25955

+

25956

+extern void abort (void);

25957

+

25958

+struct lispstruct

25959

+{

25960

+ int e;

25961

+ int t;

25962

+};

25963

+

25964

+struct lispstruct Cnil_body;

25965

+struct lispstruct Ct_body;

25966

+int nvalues;

25967

+

25968

+struct lispstruct * __attribute__ ((noinline))

25969

+fLlistp (struct lispstruct *x0)

25970

+{

25971

+ if (x0 == &Cnil_body

25972

+ || (((unsigned long) x0 >= 0x80000000) ? 0

25973

+ : (!x0->e ? (x0 != &Cnil_body) : x0->t)))

25974

+ x0 = &Ct_body;

25975

+ else

25976

+ x0 = &Cnil_body;

25977

+ nvalues = 1;

25978

+ return x0;

25979

+}

25980

+

25981

+int main ()

25982

+{

25983

+ if (fLlistp ((struct lispstruct *) 0xa0000001) != &Cnil_body)

25984

+ abort ();

25985

+ return 0;

25986

+}

25987

Index: gcc/testsuite/gcc.target/mips/bswap-3.c

25988

===================================================================

25989

--- a/src/gcc/testsuite/gcc.target/mips/bswap-3.c (.../tags/gcc_4_8_2_release)

25990

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-3.c (.../branches/gcc-4_8-branch)

25991

@@ -0,0 +1,14 @@

25992

+/* { dg-options "isa_rev>=2" } */

25993

+/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */

25994

+

25995

+NOMIPS16 unsigned int

25996

+foo (unsigned int x)

25997

+{

25998

+ return (((x << 24) & 0xff000000)

25999

+ | ((x << 8) & 0xff0000)

26000

+ | ((x >> 8) & 0xff00)

26001

+ | ((x >> 24) & 0xff));

26002

+}

26003

+

26004

+/* { dg-final { scan-assembler "\twsbh\t" } } */

26005

+/* { dg-final { scan-assembler "\tror\t" } } */

26006

Index: gcc/testsuite/gcc.target/mips/bswap-4.c

26007

===================================================================

26008

--- a/src/gcc/testsuite/gcc.target/mips/bswap-4.c (.../tags/gcc_4_8_2_release)

26009

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-4.c (.../branches/gcc-4_8-branch)

26010

@@ -0,0 +1,10 @@

26011

+/* { dg-options "isa_rev>=2" } */

26012

+

26013

+NOMIPS16 unsigned int

26014

+foo (unsigned int x)

26015

+{

26016

+ return __builtin_bswap32 (x);

26017

+}

26018

+

26019

+/* { dg-final { scan-assembler "\twsbh\t" } } */

26020

+/* { dg-final { scan-assembler "\tror\t" } } */

26021

Index: gcc/testsuite/gcc.target/mips/bswap-5.c

26022

===================================================================

26023

--- a/src/gcc/testsuite/gcc.target/mips/bswap-5.c (.../tags/gcc_4_8_2_release)

26024

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-5.c (.../branches/gcc-4_8-branch)

26025

@@ -0,0 +1,20 @@

26026

+/* { dg-options "isa_rev>=2 -mgp64" } */

26027

+/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */

26028

+

26029

+typedef unsigned long long uint64_t;

26030

+

26031

+NOMIPS16 uint64_t

26032

+foo (uint64_t x)

26033

+{

26034

+ return (((x << 56) & 0xff00000000000000ull)

26035

+ | ((x << 40) & 0xff000000000000ull)

26036

+ | ((x << 24) & 0xff0000000000ull)

26037

+ | ((x << 8) & 0xff00000000ull)

26038

+ | ((x >> 8) & 0xff000000)

26039

+ | ((x >> 24) & 0xff0000)

26040

+ | ((x >> 40) & 0xff00)

26041

+ | ((x >> 56) & 0xff));

26042

+}

26043

+

26044

+/* { dg-final { scan-assembler "\tdsbh\t" } } */

26045

+/* { dg-final { scan-assembler "\tdshd\t" } } */

26046

Index: gcc/testsuite/gcc.target/mips/bswap-6.c

26047

===================================================================

26048

--- a/src/gcc/testsuite/gcc.target/mips/bswap-6.c (.../tags/gcc_4_8_2_release)

26049

+++ b/src/gcc/testsuite/gcc.target/mips/bswap-6.c (.../branches/gcc-4_8-branch)

26050

@@ -0,0 +1,12 @@

26051

+/* { dg-options "isa_rev>=2 -mgp64" } */

26052

+

26053

+typedef unsigned long long uint64_t;

26054

+

26055

+NOMIPS16 uint64_t

26056

+foo (uint64_t x)

26057

+{

26058

+ return __builtin_bswap64 (x);

26059

+}

26060

+

26061

+/* { dg-final { scan-assembler "\tdsbh\t" } } */

26062

+/* { dg-final { scan-assembler "\tdshd\t" } } */

26063

Index: gcc/testsuite/gcc.target/sh/pr51244-19.c

26064

===================================================================

26065

--- a/src/gcc/testsuite/gcc.target/sh/pr51244-19.c (.../tags/gcc_4_8_2_release)

26066

+++ b/src/gcc/testsuite/gcc.target/sh/pr51244-19.c (.../branches/gcc-4_8-branch)

26067

@@ -22,11 +22,16 @@

26068

unwanted sequences. Thus, if we see any movt insns, something is not

26069

working as expected. This test requires -O2 because the T bit stores

26070

in question will be eliminated in additional insn split passes after

26071

- reload. */

26072

+ reload.

26073

+

26074

+ Notice: When this test case was initially added, the T bit optimization

26075

+ was buggy and this test case resulted in wrong code. The movt

26076

+ instructions actually have to be present in this case to get

26077

+ correct code. */

26078

/* { dg-do compile { target "sh*-*-*" } } */

26079

/* { dg-options "-O2" } */

26080

/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */

26081

-/* { dg-final { scan-assembler-not "movt" } } */

26082

+/* { dg-final { scan-assembler "movt" } } */

26083

26084

struct request

26085

{

26086

Index: gcc/testsuite/gcc.target/sh/pr54089-3.c

26087

===================================================================

26088

--- a/src/gcc/testsuite/gcc.target/sh/pr54089-3.c (.../tags/gcc_4_8_2_release)

26089

+++ b/src/gcc/testsuite/gcc.target/sh/pr54089-3.c (.../branches/gcc-4_8-branch)

26090

@@ -5,7 +5,7 @@

26091

/* { dg-options "-O1" } */

26092

/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m1*" "-m2" "-m2e*" } } */

26093

/* { dg-final { scan-assembler-not "and" } } */

26094

-/* { dg-final { scan-assembler-not "31" } } */

26095

+/* { dg-final { scan-assembler-not "#31" } } */

26096

26097

int

26098

test00 (unsigned int a, int* b, int c, int* d, unsigned int e)

26099

Index: gcc/testsuite/go.test/go-test.exp

26100

===================================================================

26101

--- a/src/gcc/testsuite/go.test/go-test.exp (.../tags/gcc_4_8_2_release)

26102

+++ b/src/gcc/testsuite/go.test/go-test.exp (.../branches/gcc-4_8-branch)

26103

@@ -333,17 +333,16 @@

26104

}

26105

26106

if { ( [file tail $test] == "select2.go" \

26107

- || [file tail $test] == "stack.go" ) \

26108

+ || [file tail $test] == "stack.go" \

26109

+ || [file tail $test] == "peano.go" ) \

26110

&& ! [check_effective_target_split_stack] } {

26111

- # chan/select2.go fails on targets without split stack,

26112

- # because they allocate a large stack segment that blows

26113

- # out the memory calculations.

26114

+ # These tests fails on targets without split stack.

26115

untested $name

26116

continue

26117

}

26118

26119

- if { [file tail $test] == "rotate.go" } {

26120

- # This test produces a temporary file that takes too long

26121

+ if [string match "*go.test/test/rotate\[0123\].go" $test] {

26122

+ # These tests produces a temporary file that takes too long

26123

# to compile--5 minutes on my laptop without optimization.

26124

# When compiling without optimization it tests nothing

26125

# useful, since the point of the test is to see whether

26126

Index: gcc/testsuite/lib/target-supports.exp

26127

===================================================================

26128

--- a/src/gcc/testsuite/lib/target-supports.exp (.../tags/gcc_4_8_2_release)

26129

+++ b/src/gcc/testsuite/lib/target-supports.exp (.../branches/gcc-4_8-branch)

26130

@@ -1311,6 +1311,32 @@

26131

return 0

26132

}

26133

26134

+# Return 1 if the target supports executing power8 vector instructions, 0

26135

+# otherwise. Cache the result.

26136

+

26137

+proc check_p8vector_hw_available { } {

26138

+ return [check_cached_effective_target p8vector_hw_available {

26139

+ # Some simulators are known to not support VSX/power8 instructions.

26140

+ # For now, disable on Darwin

26141

+ if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {

26142

+ expr 0

26143

+ } else {

26144

+ set options "-mpower8-vector"

26145

+ check_runtime_nocache p8vector_hw_available {

26146

+ int main()

26147

+ {

26148

+ #ifdef __MACH__

26149

+ asm volatile ("xxlorc vs0,vs0,vs0");

26150

+ #else

26151

+ asm volatile ("xxlorc 0,0,0");

26152

+ #endif

26153

+ return 0;

26154

+ }

26155

+ } $options

26156

+ }

26157

+ }]

26158

+}

26159

+

26160

# Return 1 if the target supports executing VSX instructions, 0

26161

# otherwise. Cache the result.

26162

26163

@@ -1858,6 +1884,32 @@

26164

}]

26165

}

26166

26167

+# Return 1 if the target supports executing DFP hardware instructions,

26168

+# 0 otherwise. Cache the result.

26169

+

26170

+proc check_dfp_hw_available { } {

26171

+ return [check_cached_effective_target dfp_hw_available {

26172

+ # For now, disable on Darwin

26173

+ if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {

26174

+ expr 0

26175

+ } else {

26176

+ check_runtime_nocache dfp_hw_available {

26177

+ volatile _Decimal64 r;

26178

+ volatile _Decimal64 a = 4.0DD;

26179

+ volatile _Decimal64 b = 2.0DD;

26180

+ int main()

26181

+ {

26182

+ asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));

26183

+ asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));

26184

+ asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));

26185

+ asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));

26186

+ return 0;

26187

+ }

26188

+ } "-mcpu=power6 -mhard-float"

26189

+ }

26190

+ }]

26191

+}

26192

+

26193

# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.

26194

26195

proc check_effective_target_ucn_nocache { } {

26196

@@ -2672,6 +2724,33 @@

26197

}

26198

}

26199

26200

+# Return 1 if this is a PowerPC target supporting -mpower8-vector

26201

+

26202

+proc check_effective_target_powerpc_p8vector_ok { } {

26203

+ if { ([istarget powerpc*-*-*]

26204

+ && ![istarget powerpc-*-linux*paired*])

26205

+ || [istarget rs6000-*-*] } {

26206

+ # AltiVec is not supported on AIX before 5.3.

26207

+ if { [istarget powerpc*-*-aix4*]

26208

+ || [istarget powerpc*-*-aix5.1*]

26209

+ || [istarget powerpc*-*-aix5.2*] } {

26210

+ return 0

26211

+ }

26212

+ return [check_no_compiler_messages powerpc_p8vector_ok object {

26213

+ int main (void) {

26214

+#ifdef __MACH__

26215

+ asm volatile ("xxlorc vs0,vs0,vs0");

26216

+#else

26217

+ asm volatile ("xxlorc 0,0,0");

26218

+#endif

26219

+ return 0;

26220

+ }

26221

+ } "-mpower8-vector"]

26222

+ } else {

26223

+ return 0

26224

+ }

26225

+}

26226

+

26227

# Return 1 if this is a PowerPC target supporting -mvsx

26228

26229

proc check_effective_target_powerpc_vsx_ok { } {

26230

@@ -2699,6 +2778,27 @@

26231

}

26232

}

26233

26234

+# Return 1 if this is a PowerPC target supporting -mhtm

26235

+

26236

+proc check_effective_target_powerpc_htm_ok { } {

26237

+ if { ([istarget powerpc*-*-*]

26238

+ && ![istarget powerpc-*-linux*paired*])

26239

+ || [istarget rs6000-*-*] } {

26240

+ # HTM is not supported on AIX yet.

26241

+ if { [istarget powerpc*-*-aix*] } {

26242

+ return 0

26243

+ }

26244

+ return [check_no_compiler_messages powerpc_htm_ok object {

26245

+ int main (void) {

26246

+ asm volatile ("tbegin. 0");

26247

+ return 0;

26248

+ }

26249

+ } "-mhtm"]

26250

+ } else {

26251

+ return 0

26252

+ }

26253

+}

26254

+

26255

# Return 1 if this is a PowerPC target supporting -mcpu=cell.

26256

26257

proc check_effective_target_powerpc_ppu_ok { } {

26258

@@ -2794,6 +2894,22 @@

26259

}

26260

}

26261

26262

+# Return 1 if this is a PowerPC target using the ELFv2 ABI.

26263

+

26264

+proc check_effective_target_powerpc_elfv2 { } {

26265

+ if { [istarget powerpc*-*-*] } {

26266

+ return [check_no_compiler_messages powerpc_elfv2 object {

26267

+ #if _CALL_ELF != 2

26268

+ #error not ELF v2 ABI

26269

+ #else

26270

+ int dummy;

26271

+ #endif

26272

+ }]

26273

+ } else {

26274

+ return 0

26275

+ }

26276

+}

26277

+

26278

# Return 1 if this is a SPU target with a toolchain that

26279

# supports automatic overlay generation.

26280

26281

@@ -4499,7 +4615,9 @@

26282

switch $arg {

26283

"vmx_hw" { set selected [check_vmx_hw_available] }

26284

"vsx_hw" { set selected [check_vsx_hw_available] }

26285

+ "p8vector_hw" { set selected [check_p8vector_hw_available] }

26286

"ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }

26287

+ "dfp_hw" { set selected [check_dfp_hw_available] }

26288

"named_sections" { set selected [check_named_sections_available] }

26289

"gc_sections" { set selected [check_gc_sections_available] }

26290

"cxa_atexit" { set selected [check_cxa_atexit_available] }

26291

@@ -4520,7 +4638,9 @@

26292

switch $arg {

26293

"vmx_hw" { return 1 }

26294

"vsx_hw" { return 1 }

26295

+ "p8vector_hw" { return 1 }

26296

"ppc_recip_hw" { return 1 }

26297

+ "dfp_hw" { return 1 }

26298

"named_sections" { return 1 }

26299

"gc_sections" { return 1 }

26300

"cxa_atexit" { return 1 }

26301

@@ -5077,7 +5197,9 @@

26302

}

26303

26304

lappend DEFAULT_VECTCFLAGS "-maltivec"

26305

- if [check_vsx_hw_available] {

26306

+ if [check_p8vector_hw_available] {

26307

+ lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"

26308

+ } elseif [check_vsx_hw_available] {

26309

lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"

26310

}

26311

26312

Index: gcc/testsuite/gfortran.dg/shape_8.f90

26313

===================================================================

26314

--- a/src/gcc/testsuite/gfortran.dg/shape_8.f90 (.../tags/gcc_4_8_2_release)

26315

+++ b/src/gcc/testsuite/gfortran.dg/shape_8.f90 (.../branches/gcc-4_8-branch)

26316

@@ -0,0 +1,10 @@

26317

+! { dg-do compile }

26318

+!

26319

+! PR 60450: [4.7/4.8 Regression] ICE with SHAPE intrinsic

26320

+!

26321

+! Contributed by Dave Allured <dave.allured@noaa.gov>

26322

+

26323

+ real, allocatable :: x(:,:)

26324

+ allocate (x(3,2), source=99.)

26325

+ print *, shape (x / 10.0)

26326

+end

26327

Index: gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90

26328

===================================================================

26329

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90 (.../tags/gcc_4_8_2_release)

26330

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90 (.../branches/gcc-4_8-branch)

26331

@@ -0,0 +1,12 @@

26332

+! { dg-do compile }

26333

+!

26334

+! PR fortran/58803

26335

+!

26336

+! Contributed by Vittorio Zecca

26337

+!

26338

+! Was before ICEing due to a double free

26339

+!

26340

+ type t

26341

+ procedure(real), pointer, nopass :: f1, f2

26342

+ end type

26343

+ end

26344

Index: gcc/testsuite/gfortran.dg/where_4.f90

26345

===================================================================

26346

--- a/src/gcc/testsuite/gfortran.dg/where_4.f90 (.../tags/gcc_4_8_2_release)

26347

+++ b/src/gcc/testsuite/gfortran.dg/where_4.f90 (.../branches/gcc-4_8-branch)

26348

@@ -0,0 +1,18 @@

26349

+! { dg-do compile }

26350

+! PR 60522 - this used to ICE.

26351

+! Original test case Roger Ferrer Ibanez

26352

+subroutine foo(a, b)

26353

+ implicit none

26354

+ integer, dimension(:), intent(inout) :: a

26355

+ integer, dimension(:), intent(in) :: b

26356

+

26357

+ where (b(:) > 0)

26358

+ where (b(:) > 100)

26359

+ a(lbound(a, 1):ubound(a, 1)) = b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1)) - 100

26360

+ elsewhere

26361

+ a(lbound(a, 1):ubound(a, 1)) = b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1))

26362

+ end where

26363

+ elsewhere

26364

+ a(lbound(a, 1):ubound(a, 1)) = - b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1))

26365

+ end where

26366

+end subroutine foo

26367

Index: gcc/testsuite/gfortran.dg/gomp/pr59467.f90

26368

===================================================================

26369

--- a/src/gcc/testsuite/gfortran.dg/gomp/pr59467.f90 (.../tags/gcc_4_8_2_release)

26370

+++ b/src/gcc/testsuite/gfortran.dg/gomp/pr59467.f90 (.../branches/gcc-4_8-branch)

26371

@@ -0,0 +1,24 @@

26372

+! PR libgomp/59467

26373

+! { dg-do compile }

26374

+! { dg-options "-fopenmp" }

26375

+ FUNCTION t()

26376

+ INTEGER :: a, b, t

26377

+ a = 0

26378

+ b = 0

26379

+ !$OMP PARALLEL REDUCTION(+:b)

26380

+ !$OMP SINGLE ! { dg-error "is not threadprivate or private in outer context" }

26381

+ !$OMP ATOMIC WRITE

26382

+ a = 6

26383

+ !$OMP END SINGLE COPYPRIVATE (a)

26384

+ b = a

26385

+ !$OMP END PARALLEL

26386

+ t = b

26387

+ b = 0

26388

+ !$OMP PARALLEL REDUCTION(+:b)

26389

+ !$OMP SINGLE

26390

+ !$OMP ATOMIC WRITE

26391

+ b = 6

26392

+ !$OMP END SINGLE COPYPRIVATE (b)

26393

+ !$OMP END PARALLEL

26394

+ t = t + b

26395

+ END FUNCTION

26396

Index: gcc/testsuite/gfortran.dg/allocate_class_3.f90

26397

===================================================================

26398

--- a/src/gcc/testsuite/gfortran.dg/allocate_class_3.f90 (.../tags/gcc_4_8_2_release)

26399

+++ b/src/gcc/testsuite/gfortran.dg/allocate_class_3.f90 (.../branches/gcc-4_8-branch)

26400

@@ -0,0 +1,107 @@

26401

+! { dg-do run }

26402

+! Tests the fix for PR59414, comment #3, in which the allocate

26403

+! expressions were not correctly being stripped to provide the

26404

+! vpointer as an lhs to the pointer assignment of the vptr from

26405

+! the SOURCE expression.

26406

+!

26407

+! Contributed by Antony Lewis <antony@cosmologist.info>

26408

+!

26409

+module ObjectLists

26410

+ implicit none

26411

+

26412

+ type :: t

26413

+ integer :: i

26414

+ end type

26415

+

26416

+ type Object_array_pointer

26417

+ class(t), pointer :: p(:)

26418

+ end type

26419

+

26420

+contains

26421

+

26422

+ subroutine AddArray1 (P, Pt)

26423

+ class(t) :: P(:)

26424

+ class(Object_array_pointer) :: Pt

26425

+

26426

+ select type (Pt)

26427

+ class is (Object_array_pointer)

26428

+ if (associated (Pt%P)) deallocate (Pt%P)

26429

+ allocate(Pt%P(1:SIZE(P)), source=P)

26430

+ end select

26431

+ end subroutine

26432

+

26433

+ subroutine AddArray2 (P, Pt)

26434

+ class(t) :: P(:)

26435

+ class(Object_array_pointer) :: Pt

26436

+

26437

+ select type (Pt)

26438

+ type is (Object_array_pointer)

26439

+ if (associated (Pt%P)) deallocate (Pt%P)

26440

+ allocate(Pt%P(1:SIZE(P)), source=P)

26441

+ end select

26442

+ end subroutine

26443

+

26444

+ subroutine AddArray3 (P, Pt)

26445

+ class(t) :: P

26446

+ class(Object_array_pointer) :: Pt

26447

+

26448

+ select type (Pt)

26449

+ class is (Object_array_pointer)

26450

+ if (associated (Pt%P)) deallocate (Pt%P)

26451

+ allocate(Pt%P(1:4), source=P)

26452

+ end select

26453

+ end subroutine

26454

+

26455

+ subroutine AddArray4 (P, Pt)

26456

+ type(t) :: P(:)

26457

+ class(Object_array_pointer) :: Pt

26458

+

26459

+ select type (Pt)

26460

+ class is (Object_array_pointer)

26461

+ if (associated (Pt%P)) deallocate (Pt%P)

26462

+ allocate(Pt%P(1:SIZE(P)), source=P)

26463

+ end select

26464

+ end subroutine

26465

+end module

26466

+

26467

+ use ObjectLists

26468

+ type(Object_array_pointer), pointer :: Pt

26469

+ class(t), pointer :: P(:)

26470

+

26471

+ allocate (P(2), source = [t(1),t(2)])

26472

+ allocate (Pt, source = Object_array_pointer(NULL()))

26473

+ call AddArray1 (P, Pt)

26474

+ select type (x => Pt%p)

26475

+ type is (t)

26476

+ if (any (x%i .ne. [1,2])) call abort

26477

+ end select

26478

+ deallocate (P)

26479

+ deallocate (pt)

26480

+

26481

+ allocate (P(3), source = [t(3),t(4),t(5)])

26482

+ allocate (Pt, source = Object_array_pointer(NULL()))

26483

+ call AddArray2 (P, Pt)

26484

+ select type (x => Pt%p)

26485

+ type is (t)

26486

+ if (any (x%i .ne. [3,4,5])) call abort

26487

+ end select

26488

+ deallocate (P)

26489

+ deallocate (pt)

26490

+

26491

+ allocate (Pt, source = Object_array_pointer(NULL()))

26492

+ call AddArray3 (t(6), Pt)

26493

+ select type (x => Pt%p)

26494

+ type is (t)

26495

+ if (any (x%i .ne. [6,6,6,6])) call abort

26496

+ end select

26497

+ deallocate (pt)

26498

+

26499

+ allocate (Pt, source = Object_array_pointer(NULL()))

26500

+ call AddArray4 ([t(7), t(8)], Pt)

26501

+ select type (x => Pt%p)

26502

+ type is (t)

26503

+ if (any (x%i .ne. [7,8])) call abort

26504

+ end select

26505

+ deallocate (pt)

26506

+ end

26507

+

26508

Index: gcc/testsuite/gfortran.dg/reshape_6.f90

26509

===================================================================

26510

--- a/src/gcc/testsuite/gfortran.dg/reshape_6.f90 (.../tags/gcc_4_8_2_release)

26511

+++ b/src/gcc/testsuite/gfortran.dg/reshape_6.f90 (.../branches/gcc-4_8-branch)

26512

@@ -0,0 +1,19 @@

26513

+! { dg-do compile }

26514

+! PR fortran/58989

26515

+!

26516

+program test

26517

+

26518

+ real(8), dimension(4,4) :: fluxes

26519

+ real(8), dimension(2,2,2,2) :: f

26520

+ integer, dimension(3) :: dmmy

26521

+ integer, parameter :: indx(4)=(/2,2,2,2/)

26522

+

26523

+ fluxes = 1

26524

+

26525

+ dmmy = (/2,2,2/)

26526

+

26527

+ f = reshape(fluxes,(/dmmy,2/)) ! Caused an ICE

26528

+ f = reshape(fluxes,(/2,2,2,2/)) ! Works as expected

26529

+ f = reshape(fluxes,indx) ! Works as expected

26530

+

26531

+end program test

26532

Index: gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90

26533

===================================================================

26534

--- a/src/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 (.../tags/gcc_4_8_2_release)

26535

+++ b/src/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 (.../branches/gcc-4_8-branch)

26536

@@ -0,0 +1,36 @@

26537

+! { dg-do compile }

26538

+!

26539

+! PR fortran/58007

26540

+! Unresolved fiixup while loading a module.

26541

+!

26542

+! This tests that the specification expression A%MAX_DEGREE in module BSR is

26543

+! correctly loaded and resolved in program MAIN.

26544

+!

26545

+! Original testcase from Daniel Shapiro <shapero@uw.edu>

26546

+

26547

+module matrix

26548

+ type :: sparse_matrix

26549

+ integer :: max_degree

26550

+ end type

26551

+end module

26552

+

26553

+module bsr

26554

+ use matrix

26555

+

26556

+ type, extends(sparse_matrix) :: bsr_matrix

26557

+ end type

26558

+

26559

+ integer :: i1

26560

+ integer :: i2

26561

+ integer :: i3

26562

+contains

26563

+ function get_neighbors (A)

26564

+ type(bsr_matrix), intent(in) :: A

26565

+ integer :: get_neighbors(A%max_degree)

26566

+ end function

26567

+end module

26568

+

26569

+program main

26570

+ use matrix

26571

+ use bsr

26572

+end

26573

Index: gcc/testsuite/gfortran.dg/init_flag_12.f90

26574

===================================================================

26575

--- a/src/gcc/testsuite/gfortran.dg/init_flag_12.f90 (.../tags/gcc_4_8_2_release)

26576

+++ b/src/gcc/testsuite/gfortran.dg/init_flag_12.f90 (.../branches/gcc-4_8-branch)

26577

@@ -0,0 +1,13 @@

26578

+! { dg-do compile }

26579

+! { dg-options "-fno-automatic -finit-local-zero" }

26580

+!

26581

+! PR 55907: [4.7/4.8/4.9 Regression] ICE with -fno-automatic -finit-local-zero

26582

+!

26583

+! Contributed by J.R. Garcia <garcia.espinosa.jr@gmail.com>

26584

+

26585

+subroutine cchaine (i)

26586

+ implicit none

26587

+ integer :: i

26588

+ character(len=i) :: chaine

26589

+ write(*,*) chaine

26590

+end subroutine

26591

Index: gcc/testsuite/gfortran.dg/derived_external_function_1.f90

26592

===================================================================

26593

--- a/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../tags/gcc_4_8_2_release)

26594

+++ b/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../branches/gcc-4_8-branch)

26595

@@ -0,0 +1,27 @@

26596

+! { dg-do run }

26597

+!

26598

+! PR fortran/58771

26599

+!

26600

+! Contributed by Vittorio Secca <zeccav@gmail.com>

26601

+!

26602

+! ICEd on the write statement with f() because the derived type backend

26603

+! declaration not built.

26604

+!

26605

+module m

26606

+ type t

26607

+ integer(4) g

26608

+ end type

26609

+end

26610

+

26611

+type(t) function f() result(ff)

26612

+ use m

26613

+ ff%g = 42

26614

+end

26615

+

26616

+ use m

26617

+ character (20) :: line1, line2

26618

+ type(t) f

26619

+ write (line1, *) f()

26620

+ write (line2, *) 42_4

26621

+ if (line1 .ne. line2) call abort

26622

+end

26623

Index: gcc/testsuite/gfortran.dg/implicit_pure_4.f90

26624

===================================================================

26625

--- a/src/gcc/testsuite/gfortran.dg/implicit_pure_4.f90 (.../tags/gcc_4_8_2_release)

26626

+++ b/src/gcc/testsuite/gfortran.dg/implicit_pure_4.f90 (.../branches/gcc-4_8-branch)

26627

@@ -0,0 +1,22 @@

26628

+! { dg-do compile }

26629

+!

26630

+! PR fortran/60543

26631

+! PR fortran/60283

26632

+!

26633

+module m

26634

+contains

26635

+ REAL(8) FUNCTION random()

26636

+ CALL RANDOM_NUMBER(random)

26637

+ END FUNCTION random

26638

+ REAL(8) FUNCTION random2()

26639

+ block

26640

+ block

26641

+ block

26642

+ CALL RANDOM_NUMBER(random2)

26643

+ end block

26644

+ end block

26645

+ end block

26646

+ END FUNCTION random2

26647

+end module m

26648

+

26649

+! { dg-final { scan-module-absence "m" "IMPLICIT_PURE" } }

26650

Index: gcc/testsuite/gfortran.dg/null_6.f90

26651

===================================================================

26652

--- a/src/gcc/testsuite/gfortran.dg/null_6.f90 (.../tags/gcc_4_8_2_release)

26653

+++ b/src/gcc/testsuite/gfortran.dg/null_6.f90 (.../branches/gcc-4_8-branch)

26654

@@ -30,5 +30,5 @@

26655

26656

subroutine test_PR34547_3 ()

26657

integer, allocatable :: i(:)

26658

- print *, NULL(i)

26659

+ print *, NULL(i) ! { dg-error "Invalid context for NULL" }

26660

end subroutine test_PR34547_3

26661

Index: gcc/testsuite/gfortran.dg/fmt_en.f90

26662

===================================================================

26663

--- a/src/gcc/testsuite/gfortran.dg/fmt_en.f90 (.../tags/gcc_4_8_2_release)

26664

+++ b/src/gcc/testsuite/gfortran.dg/fmt_en.f90 (.../branches/gcc-4_8-branch)

26665

@@ -0,0 +1,186 @@

26666

+! { dg-do run { target fd_truncate } }

26667

+! PR60128 Invalid outputs with EN descriptors

26668

+! Test case provided by Walt Brainerd.

26669

+program pr60128

26670

+use ISO_FORTRAN_ENV

26671

+ implicit none

26672

+ integer, parameter :: j(size(real_kinds)+4)=[REAL_KINDS, [4, 4, 4, 4]]

26673

+ logical :: l_skip(4) = .false.

26674

+ integer :: i

26675

+ integer :: n_tst = 0, n_cnt = 0, n_skip = 0

26676

+ character(len=20) :: s, s1

26677

+

26678

+ open (unit = 10, file = 'fmt_en.res')

26679

+! Check that the default rounding mode is to nearest and to even on tie.

26680

+ do i=1,size(real_kinds)

26681

+ if (i == 1) then

26682

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(1)), &

26683

+ real(9.49999905,kind=j(1)), &

26684

+ real(9.5,kind=j(1)), real(8.5,kind=j(1))

26685

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(1)), &

26686

+ real(98765.0,kind=j(1))

26687

+ else if (i == 2) then

26688

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(2)), &

26689

+ real(9.49999905,kind=j(2)), &

26690

+ real(9.5,kind=j(2)), real(8.5,kind=j(2))

26691

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(2)), &

26692

+ real(98765.0,kind=j(2))

26693

+ else if (i == 3) then

26694

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(3)), &

26695

+ real(9.49999905,kind=j(3)), &

26696

+ real(9.5,kind=j(3)), real(8.5,kind=j(3))

26697

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(3)), &

26698

+ real(98765.0,kind=j(3))

26699

+ else if (i == 4) then

26700

+ write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(4)), &

26701

+ real(9.49999905,kind=j(4)), &

26702

+ real(9.5,kind=j(4)), real(8.5,kind=j(4))

26703

+ write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(4)), &

26704

+ real(98765.0,kind=j(4))

26705

+ end if

26706

+ if (s /= '-9.5 9.5 10. 8.' .or. s1 /= ' 987.4E+03 98.76E+03') then

26707

+ l_skip(i) = .true.

26708

+! print "('Unsupported rounding for real(',i0,')')", j(i)

26709

+ end if

26710

+ end do

26711

+

26712

+

26713

+! Original test.

26714

+ call checkfmt("(en15.2)", -.44444, " -444.44E-03")

26715

+

26716

+! Test for the bug in comment 6.

26717

+ call checkfmt("(en15.0)", 1.0, " 1.E+00")

26718

+ call checkfmt("(en15.0)", 1.00000012, " 1.E+00")

26719

+ call checkfmt("(en15.0)", 0.99999994, " 1.E+00")

26720

+ call checkfmt("(en15.0)", 10.0, " 10.E+00")

26721

+ call checkfmt("(en15.0)", 10.0000010, " 10.E+00")

26722

+ call checkfmt("(en15.0)", 9.99999905, " 10.E+00")

26723

+ call checkfmt("(en15.0)", 100.0, " 100.E+00")

26724

+ call checkfmt("(en15.0)", 100.000008, " 100.E+00")

26725

+ call checkfmt("(en15.0)", 99.9999924, " 100.E+00")

26726

+ call checkfmt("(en15.0)", 1000.0, " 1.E+03")

26727

+ call checkfmt("(en15.0)", 1000.00006, " 1.E+03")

26728

+ call checkfmt("(en15.0)", 999.999939, " 1.E+03")

26729

+ call checkfmt("(en15.0)", 9.5, " 10.E+00")

26730

+ call checkfmt("(en15.0)", 9.50000095, " 10.E+00")

26731

+ call checkfmt("(en15.0)", 9.49999905, " 9.E+00")

26732

+ call checkfmt("(en15.0)", 99.5, " 100.E+00")

26733

+ call checkfmt("(en15.0)", 99.5000076, " 100.E+00")

26734

+ call checkfmt("(en15.0)", 99.4999924, " 99.E+00")

26735

+ call checkfmt("(en15.0)", 999.5, " 1.E+03")

26736

+ call checkfmt("(en15.0)", 999.500061, " 1.E+03")

26737

+ call checkfmt("(en15.0)", 999.499939, " 999.E+00")

26738

+ call checkfmt("(en15.0)", 9500.0, " 10.E+03")

26739

+ call checkfmt("(en15.0)", 9500.00098, " 10.E+03")

26740

+ call checkfmt("(en15.0)", 9499.99902, " 9.E+03")

26741

+ call checkfmt("(en15.1)", 9950.0, " 10.0E+03")

26742

+ call checkfmt("(en15.2)", 9995.0, " 10.00E+03")

26743

+ call checkfmt("(en15.3)", 9999.5, " 10.000E+03")

26744

+ call checkfmt("(en15.1)", 9.5, " 9.5E+00")

26745

+ call checkfmt("(en15.1)", 9.50000095, " 9.5E+00")

26746

+ call checkfmt("(en15.1)", 9.49999905, " 9.5E+00")

26747

+ call checkfmt("(en15.1)", 0.099951, " 100.0E-03")

26748

+ call checkfmt("(en15.1)", 0.009951, " 10.0E-03")

26749

+ call checkfmt("(en15.1)", 0.000999951," 1.0E-03")

26750

+

26751

+ call checkfmt("(en15.0)", -1.0, " -1.E+00")

26752

+ call checkfmt("(en15.0)", -1.00000012, " -1.E+00")

26753

+ call checkfmt("(en15.0)", -0.99999994, " -1.E+00")

26754

+ call checkfmt("(en15.0)", -10.0, " -10.E+00")

26755

+ call checkfmt("(en15.0)", -10.0000010, " -10.E+00")

26756

+ call checkfmt("(en15.0)", -9.99999905, " -10.E+00")

26757

+ call checkfmt("(en15.0)", -100.0, " -100.E+00")

26758

+ call checkfmt("(en15.0)", -100.000008, " -100.E+00")

26759

+ call checkfmt("(en15.0)", -99.9999924, " -100.E+00")

26760

+ call checkfmt("(en15.0)", -1000.0, " -1.E+03")

26761

+ call checkfmt("(en15.0)", -1000.00006, " -1.E+03")

26762

+ call checkfmt("(en15.0)", -999.999939, " -1.E+03")

26763

+ call checkfmt("(en15.0)", -9.5, " -10.E+00")

26764

+ call checkfmt("(en15.0)", -9.50000095, " -10.E+00")

26765

+ call checkfmt("(en15.0)", -9.49999905, " -9.E+00")

26766

+ call checkfmt("(en15.0)", -99.5, " -100.E+00")

26767

+ call checkfmt("(en15.0)", -99.5000076, " -100.E+00")

26768

+ call checkfmt("(en15.0)", -99.4999924, " -99.E+00")

26769

+ call checkfmt("(en15.0)", -999.5, " -1.E+03")

26770

+ call checkfmt("(en15.0)", -999.500061, " -1.E+03")

26771

+ call checkfmt("(en15.0)", -999.499939, " -999.E+00")

26772

+ call checkfmt("(en15.0)", -9500.0, " -10.E+03")

26773

+ call checkfmt("(en15.0)", -9500.00098, " -10.E+03")

26774

+ call checkfmt("(en15.0)", -9499.99902, " -9.E+03")

26775

+ call checkfmt("(en15.1)", -9950.0, " -10.0E+03")

26776

+ call checkfmt("(en15.2)", -9995.0, " -10.00E+03")

26777

+ call checkfmt("(en15.3)", -9999.5, " -10.000E+03")

26778

+ call checkfmt("(en15.1)", -9.5, " -9.5E+00")

26779

+ call checkfmt("(en15.1)", -9.50000095, " -9.5E+00")

26780

+ call checkfmt("(en15.1)", -9.49999905, " -9.5E+00")

26781

+ call checkfmt("(en15.1)", -0.099951, " -100.0E-03")

26782

+ call checkfmt("(en15.1)", -0.009951, " -10.0E-03")

26783

+ call checkfmt("(en15.1)", -0.000999951," -1.0E-03")

26784

+

26785

+ call checkfmt("(en15.1)", 987350., " 987.4E+03")

26786

+ call checkfmt("(en15.2)", 98735., " 98.74E+03")

26787

+ call checkfmt("(en15.3)", 9873.5, " 9.874E+03")

26788

+ call checkfmt("(en15.1)", 987650., " 987.6E+03")

26789

+ call checkfmt("(en15.2)", 98765., " 98.76E+03")

26790

+ call checkfmt("(en15.3)", 9876.5, " 9.876E+03")

26791

+ call checkfmt("(en15.1)", 3.125E-02, " 31.2E-03")

26792

+ call checkfmt("(en15.1)", 9.375E-02, " 93.8E-03")

26793

+ call checkfmt("(en15.2)", 1.5625E-02, " 15.62E-03")

26794

+ call checkfmt("(en15.2)", 4.6875E-02, " 46.88E-03")

26795

+ call checkfmt("(en15.3)", 7.8125E-03, " 7.812E-03")

26796

+ call checkfmt("(en15.3)", 2.34375E-02, " 23.438E-03")

26797

+ call checkfmt("(en15.3)", 9.765625E-04," 976.562E-06")

26798

+ call checkfmt("(en15.6)", 2.9296875E-03," 2.929688E-03")

26799

+

26800

+ call checkfmt("(en15.1)", -987350., " -987.4E+03")

26801

+ call checkfmt("(en15.2)", -98735., " -98.74E+03")

26802

+ call checkfmt("(en15.3)", -9873.5, " -9.874E+03")

26803

+ call checkfmt("(en15.1)", -987650., " -987.6E+03")

26804

+ call checkfmt("(en15.2)", -98765., " -98.76E+03")

26805

+ call checkfmt("(en15.3)", -9876.5, " -9.876E+03")

26806

+ call checkfmt("(en15.1)", -3.125E-02, " -31.2E-03")

26807

+ call checkfmt("(en15.1)", -9.375E-02, " -93.8E-03")

26808

+ call checkfmt("(en15.2)", -1.5625E-02, " -15.62E-03")

26809

+ call checkfmt("(en15.2)", -4.6875E-02, " -46.88E-03")

26810

+ call checkfmt("(en15.3)", -7.8125E-03, " -7.812E-03")

26811

+ call checkfmt("(en15.3)", -2.34375E-02, " -23.438E-03")

26812

+ call checkfmt("(en15.3)", -9.765625E-04," -976.562E-06")

26813

+ call checkfmt("(en15.6)", -2.9296875E-03," -2.929688E-03")

26814

+

26815

+ ! print *, n_tst, n_cnt, n_skip

26816

+ if (n_cnt /= 0) call abort

26817

+ if (all(.not. l_skip)) write (10, *) "All kinds rounded to nearest"

26818

+ close (10)

26819

+

26820

+contains

26821

+ subroutine checkfmt(fmt, x, cmp)

26822

+ implicit none

26823

+ integer :: i

26824

+ character(len=*), intent(in) :: fmt

26825

+ real, intent(in) :: x

26826

+ character(len=*), intent(in) :: cmp

26827

+ do i=1,size(real_kinds)

26828

+ if (i == 1) then

26829

+ write(s, fmt) real(x,kind=j(1))

26830

+ else if (i == 2) then

26831

+ write(s, fmt) real(x,kind=j(2))

26832

+ else if (i == 3) then

26833

+ write(s, fmt) real(x,kind=j(3))

26834

+ else if (i == 4) then

26835

+ write(s, fmt) real(x,kind=j(4))

26836

+ end if

26837

+ n_tst = n_tst + 1

26838

+ if (s /= cmp) then

26839

+ if (l_skip(i)) then

26840

+ n_skip = n_skip + 1

26841

+ else

26842

+ print "(a,1x,a,' expected: ',1x,a)", fmt, s, cmp

26843

+ n_cnt = n_cnt + 1

26844

+ end if

26845

+ end if

26846

+ end do

26847

+

26848

+ end subroutine

26849

+end program

26850

+! { dg-final { scan-file fmt_en.res "All kinds rounded to nearest" { xfail { i?86-*-solaris2.9* hppa*-*-hpux* } } } }

26851

+! { dg-final { cleanup-saved-temps } }

26852

Index: gcc/testsuite/gfortran.dg/constructor_9.f90

26853

===================================================================

26854

--- a/src/gcc/testsuite/gfortran.dg/constructor_9.f90 (.../tags/gcc_4_8_2_release)

26855

+++ b/src/gcc/testsuite/gfortran.dg/constructor_9.f90 (.../branches/gcc-4_8-branch)

26856

@@ -0,0 +1,22 @@

26857

+! { dg-do compile }

26858

+! { dg-options "-Wall" }

26859

+!

26860

+! PR 58471: [4.8/4.9 Regression] ICE on invalid with missing type constructor and -Wall

26861

+!

26862

+! Contributed by Andrew Benson <abensonca@gmail.com>

26863

+

26864

+module cf

26865

+ implicit none

26866

+ type :: cfmde

26867

+ end type

26868

+ interface cfmde

26869

+ module procedure mdedc ! { dg-error "is neither function nor subroutine" }

26870

+ end interface

26871

+contains

26872

+ subroutine cfi()

26873

+ type(cfmde), pointer :: cfd

26874

+ cfd=cfmde() ! { dg-error "Can't convert" }

26875

+ end subroutine

26876

+end module

26877

+

26878

+! { dg-final { cleanup-modules "cf" } }

26879

Index: gcc/testsuite/gfortran.dg/round_3.f08

26880

===================================================================

26881

--- a/src/gcc/testsuite/gfortran.dg/round_3.f08 (.../tags/gcc_4_8_2_release)

26882

+++ b/src/gcc/testsuite/gfortran.dg/round_3.f08 (.../branches/gcc-4_8-branch)

26883

@@ -16,19 +16,44 @@

26884

call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00")

26885

call checkfmt("(RU,1P,G10.4E2)", 2.3456e5, "2.3456E+05")

26886

26887

- call checkfmt("(RU,F2.0)", 0.09, "1.") ! 0.

26888

+ call checkfmt("(RC,G10.2)", 99.5, " 0.10E+03") ! pr59774

26889

+ call checkfmt("(RC,G10.2)", 995., " 0.10E+04") ! pr59774

26890

+ call checkfmt("(RC,G10.3)", 999.5, " 0.100E+04") ! pr59774

26891

+ call checkfmt("(RC,G10.3)", 9995., " 0.100E+05") ! pr59774

26892

+ call checkfmt("(RU,G10.2)", .099, " 0.10 ") ! pr59774

26893

+ call checkfmt("(RC,G10.1)", .095, " 0.1 ") ! pr59774

26894

+ call checkfmt("(RU,G10.3)", .0999, " 0.100 ") ! pr59774

26895

+ call checkfmt("(RC,G10.2)", .0995, " 0.10 ") ! pr59774

26896

+

26897

+ call checkfmt("(RU,G9.3)", 891.1, " 892.") ! pr59836

26898

+ call checkfmt("(RD,G9.3)", -891.1, "-892.") ! pr59836

26899

+

26900

+ call checkfmt("(RU,F6.4)", 0.00006, "0.0001")! 0.

26901

+ call checkfmt("(RU,F5.3)", 0.0007, "0.001") ! 0.

26902

+ call checkfmt("(RU,F4.2)", 0.008, "0.01") ! 0.

26903

+ call checkfmt("(RU,F3.1)", 0.09, "0.1") ! 0.

26904

+

26905

+ call checkfmt("(RU,F2.0)", 0.09, "1.") ! 0.

26906

call checkfmt("(RD,F3.0)", -0.09, "-1.") ! -0.

26907

- call checkfmt("(RU,F2.0)", 2.0, "2.") ! 3.

26908

- call checkfmt("(RD,F3.0)", -2.0, "-2.") ! -3.

26909

- call checkfmt("(RU,F6.4)", 2.0, "2.0000") ! 2.0001

26910

- call checkfmt("(RD,F7.4)", -2.0, "-2.0000") ! -2.0001

26911

- call checkfmt("(RU,1P,E6.0E2)", 2.0, "2.E+00") ! 3.E+00

26912

+ call checkfmt("(RU,F2.0)", 0.9, "1.") ! pr59836

26913

+ call checkfmt("(RC,F2.0)", 0.4, "0.") ! pr59836

26914

+ call checkfmt("(RC,F2.0)", 0.5, "1.") ! pr59836

26915

+ call checkfmt("(RC,F2.0)", 0.6, "1.") ! pr59836

26916

+ call checkfmt("(RD,F3.0)", -0.9, "-1.") ! pr59836

26917

+ call checkfmt("(RC,F3.0)", -0.4, "-0.") ! pr59836

26918

+ call checkfmt("(RC,F3.0)", -0.5, "-1.") ! pr59836

26919

+ call checkfmt("(RC,F3.0)", -0.6, "-1.") ! pr59836

26920

+ call checkfmt("(RU,F2.0)", 2.0, "2.") ! 3.

26921

+ call checkfmt("(RD,F3.0)", -2.0, "-2.") ! -3.

26922

+ call checkfmt("(RU,F6.4)", 2.0, "2.0000") ! 2.0001

26923

+ call checkfmt("(RD,F7.4)", -2.0, "-2.0000") ! -2.0001

26924

+ call checkfmt("(RU,1P,E6.0E2)", 2.0, "2.E+00") ! 3.E+00

26925

call checkfmt("(RD,1P,E7.0E2)", -2.0, "-2.E+00") ! -3.E+00

26926

- call checkfmt("(RU,1P,E7.1E2)", 2.5, "2.5E+00") ! 2.6E+00

26927

+ call checkfmt("(RU,1P,E7.1E2)", 2.5, "2.5E+00") ! 2.6E+00

26928

call checkfmt("(RD,1P,E8.1E2)", -2.5, "-2.5E+00") ! -2.6E+00

26929

call checkfmt("(RU,1P,E10.4E2)", 2.5, "2.5000E+00") ! 2.5001E+00

26930

call checkfmt("(RD,1P,E11.4E2)", -2.5, "-2.5000E+00") ! -2.5001E+00

26931

- call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") ! 3.E+00

26932

+ call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") ! 3.E+00

26933

call checkfmt("(RD,1P,G7.0E2)", -2.0, "-2.E+00") ! -3.E+00

26934

call checkfmt("(RU,1P,G10.4E2)", 2.3456e5, "2.3456E+05") ! 2.3457E+05

26935

call checkfmt("(RD,1P,G11.4E2)", -2.3456e5, "-2.3456E+05") ! -2.3457E+05

26936

Index: gcc/testsuite/gfortran.dg/default_initialization_7.f90

26937

===================================================================

26938

--- a/src/gcc/testsuite/gfortran.dg/default_initialization_7.f90 (.../tags/gcc_4_8_2_release)

26939

+++ b/src/gcc/testsuite/gfortran.dg/default_initialization_7.f90 (.../branches/gcc-4_8-branch)

26940

@@ -0,0 +1,22 @@

26941

+! { dg-do compile }

26942

+!

26943

+! PR fortran/57033

26944

+! ICE on a structure constructor of an extended derived type whose parent

26945

+! type last component has a default initializer

26946

+!

26947

+! Contributed by Tilo Schwarz <tilo@tilo-schwarz.de>

26948

+

26949

+program ice

26950

+

26951

+type m

26952

+ integer i

26953

+ logical :: f = .false.

26954

+end type m

26955

+

26956

+type, extends(m) :: me

26957

+end type me

26958

+

26959

+type(me) meo

26960

+

26961

+meo = me(1) ! ICE

26962

+end program ice

26963

Index: gcc/testsuite/gfortran.dg/proc_ptr_46.f90

26964

===================================================================

26965

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_46.f90 (.../tags/gcc_4_8_2_release)

26966

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_46.f90 (.../branches/gcc-4_8-branch)

26967

@@ -0,0 +1,14 @@

26968

+! { dg-do compile }

26969

+!

26970

+! PR fortran/49397

26971

+!

26972

+! Invalid per IR F08/0060 and F2008Corr2, C729

26973

+!

26974

+

26975

+! Print *,f() ! << Valid when uncommented

26976

+Contains

26977

+ Subroutine s

26978

+ Procedure(Real),Pointer :: p

26979

+ p => f ! { dg-error "Procedure pointer target 'f' at .1. must be either an intrinsic, host or use associated, referenced or have the EXTERNAL attribute" }

26980

+ End Subroutine

26981

+End

26982

Index: gcc/testsuite/gfortran.dg/pr52370.f90

26983

===================================================================

26984

--- a/src/gcc/testsuite/gfortran.dg/pr52370.f90 (.../tags/gcc_4_8_2_release)

26985

+++ b/src/gcc/testsuite/gfortran.dg/pr52370.f90 (.../branches/gcc-4_8-branch)

26986

@@ -0,0 +1,21 @@

26987

+! PR fortran/52370

26988

+! { dg-do compile }

26989

+! { dg-options "-O1 -Wall" }

26990

+

26991

+module pr52370

26992

+contains

26993

+ subroutine foo(a,b)

26994

+ real, intent(out) :: a

26995

+ real, dimension(:), optional, intent(out) :: b

26996

+ a=0.5

26997

+ if (present(b)) then

26998

+ b=1.0

26999

+ end if

27000

+ end subroutine foo

27001

+end module pr52370

27002

+

27003

+program prg52370

27004

+ use pr52370

27005

+ real :: a

27006

+ call foo(a)

27007

+end program prg52370

27008

Index: gcc/testsuite/gfortran.dg/graphite/pr59817.f

27009

===================================================================

27010

--- a/src/gcc/testsuite/gfortran.dg/graphite/pr59817.f (.../tags/gcc_4_8_2_release)

27011

+++ b/src/gcc/testsuite/gfortran.dg/graphite/pr59817.f (.../branches/gcc-4_8-branch)

27012

@@ -0,0 +1,14 @@

27013

+! { dg-do compile }

27014

+! { dg-options "-O2 -floop-interchange" }

27015

+ SUBROUTINE PREPD(ICAST,ICAS,ICASX,ICAS1,ICAS2,NDET,NM,III,IMP,

27016

+ * CASMIN)

27017

+ LOGICAL CASMIN

27018

+ DIMENSION ICAST(NDET,NM),IMP(NM)

27019

+ IF(CASMIN) THEN

27020

+ DO K=1,NDET

27021

+ DO L=1,NM

27022

+ IF(L.EQ.K-1) ICAST(K,L) = 1

27023

+ END DO

27024

+ END DO

27025

+ END IF

27026

+ END SUBROUTINE

27027

Index: gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90

27028

===================================================================

27029

--- a/src/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 (.../tags/gcc_4_8_2_release)

27030

+++ b/src/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 (.../branches/gcc-4_8-branch)

27031

@@ -0,0 +1,22 @@

27032

+! { dg-do compile }

27033

+! { dg-options "-ffrontend-optimize" }

27034

+!

27035

+! PR fortran/60341

27036

+! An unguarded union access was wrongly enabling a frontend optimization on a

27037

+! string comparison, leading to an ICE.

27038

+!

27039

+! Original testcase from Steve Chapel <steve.chapel@a2pg.com>.

27040

+! Reduced by Steven G. Kargl <kargl@gcc.gnu.org>.

27041

+!

27042

+

27043

+ subroutine modelg(ncm)

27044

+ implicit none

27045

+ integer, parameter :: pc = 30, pm = pc - 1

27046

+ integer i

27047

+ character*4 catt(pm,2)

27048

+ integer ncm,iatt(pm,pc)

27049

+ do i=1,ncm

27050

+ if (catt(i,1)//catt(i,2).eq.'central') exit

27051

+ end do

27052

+ iatt(i,4)=1

27053

+ end

27054

Index: gcc/testsuite/gfortran.dg/list_read_12.f90

27055

===================================================================

27056

--- a/src/gcc/testsuite/gfortran.dg/list_read_12.f90 (.../tags/gcc_4_8_2_release)

27057

+++ b/src/gcc/testsuite/gfortran.dg/list_read_12.f90 (.../branches/gcc-4_8-branch)

27058

@@ -0,0 +1,11 @@

27059

+! { dg-do run }

27060

+! PR58324 Bogus end of file condition

27061

+integer :: i, ios

27062

+open(99, access='stream', form='unformatted')

27063

+write(99) "5 a"

27064

+close(99)

27065

+

27066

+open(99, access='sequential', form='formatted')

27067

+read(99, *, iostat=ios) i

27068

+if (ios /= 0) call abort

27069

+end

27070

Index: gcc/testsuite/gfortran.dg/generic_28.f90

27071

===================================================================

27072

--- a/src/gcc/testsuite/gfortran.dg/generic_28.f90 (.../tags/gcc_4_8_2_release)

27073

+++ b/src/gcc/testsuite/gfortran.dg/generic_28.f90 (.../branches/gcc-4_8-branch)

27074

@@ -0,0 +1,18 @@

27075

+! { dg-do compile }

27076

+!

27077

+! PR 58998: [4.8/4.9 Regression] Generic interface problem with gfortran

27078

+!

27079

+! Contributed by Paul van Delst

27080

+

27081

+ interface iargc

27082

+ procedure iargc_8

27083

+ end interface

27084

+

27085

+contains

27086

+

27087

+ integer(8) function iargc_8()

27088

+ integer(4) iargc

27089

+ iargc_8 = iargc()

27090

+ end function

27091

+

27092

+end

27093

Index: gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90

27094

===================================================================

27095

--- a/src/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 (.../tags/gcc_4_8_2_release)

27096

+++ b/src/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 (.../branches/gcc-4_8-branch)

27097

@@ -0,0 +1,44 @@

27098

+! { dg-do compile }

27099

+!

27100

+! PR fortran/58007

27101

+! Unresolved fixup while loading a module.

27102

+!

27103

+! This tests that the specification expression A%MAX_DEGREE in module BSR is

27104

+! correctly loaded and resolved in program MAIN.

27105

+!

27106

+! Original testcase from Daniel Shapiro <shapero@uw.edu>

27107

+! Reduced by Tobias Burnus <burnus@net-b.de> and Janus Weil <janus@gcc.gnu.org>

27108

+

27109

+module matrix

27110

+ type :: sparse_matrix

27111

+ integer :: max_degree

27112

+ end type

27113

+contains

27114

+ subroutine init_interface (A)

27115

+ class(sparse_matrix), intent(in) :: A

27116

+ end subroutine

27117

+ real function get_value_interface()

27118

+ end function

27119

+end module

27120

+

27121

+module ellpack

27122

+ use matrix

27123

+end module

27124

+

27125

+module bsr

27126

+ use matrix

27127

+ type, extends(sparse_matrix) :: bsr_matrix

27128

+ contains

27129

+ procedure :: get_neighbors

27130

+ end type

27131

+contains

27132

+ function get_neighbors (A)

27133

+ class(bsr_matrix), intent(in) :: A

27134

+ integer :: get_neighbors(A%max_degree)

27135

+ end function

27136

+end module

27137

+

27138

+program main

27139

+ use ellpack

27140

+ use bsr

27141

+end

27142

Index: gcc/testsuite/gfortran.dg/lto/pr60635_1.c

27143

===================================================================

27144

--- a/src/gcc/testsuite/gfortran.dg/lto/pr60635_1.c (.../tags/gcc_4_8_2_release)

27145

+++ b/src/gcc/testsuite/gfortran.dg/lto/pr60635_1.c (.../branches/gcc-4_8-branch)

27146

@@ -0,0 +1,14 @@

27147

+#include <stdint.h>

27148

+#include <stdbool.h>

27149

+

27150

+static bool littleendian=true;

27151

+

27152

+uint16_t bigendc16(union{uint16_t * n;uint8_t* b;}x){

27153

+

27154

+ if (!littleendian) return *x.n;

27155

+

27156

+ uint16_t res = ((uint16_t)(x.b[1])<<0) |

27157

+ ((uint16_t)(x.b[0])<<8);

27158

+ return res;

27159

+}

27160

+

27161

Index: gcc/testsuite/gfortran.dg/lto/pr60635_0.f90

27162

===================================================================

27163

--- a/src/gcc/testsuite/gfortran.dg/lto/pr60635_0.f90 (.../tags/gcc_4_8_2_release)

27164

+++ b/src/gcc/testsuite/gfortran.dg/lto/pr60635_0.f90 (.../branches/gcc-4_8-branch)

27165

@@ -0,0 +1,16 @@

27166

+! { dg-lto-do link }

27167

+program test

27168

+ use iso_fortran_env

27169

+

27170

+ interface

27171

+ integer(int16) function bigendc16(x) bind(C)

27172

+ import

27173

+ integer(int16), intent(in) :: x

27174

+ end function

27175

+ end interface

27176

+

27177

+ integer(int16) :: x16 = 12345

27178

+ x16 = bigendc16(x16)

27179

+ print *,x16

27180

+end program

27181

+

27182

Index: gcc/testsuite/gfortran.dg/arrayio_13.f90

27183

===================================================================

27184

--- a/src/gcc/testsuite/gfortran.dg/arrayio_13.f90 (.../tags/gcc_4_8_2_release)

27185

+++ b/src/gcc/testsuite/gfortran.dg/arrayio_13.f90 (.../branches/gcc-4_8-branch)

27186

@@ -0,0 +1,14 @@

27187

+! { dg-do run }

27188

+! PR60810 Bogus end-of-file

27189

+program readstrlist

27190

+ character(len=80), dimension(2) :: ver

27191

+ integer :: a, b, c

27192

+ a = 1

27193

+ b = 2

27194

+ c = 3

27195

+ ver(1) = '285 383'

27196

+ ver(2) = '985'

27197

+ read( ver, *) a, b, c

27198

+ if (a /= 285 .or. b /= 383 .or. c /= 985) call abort

27199

+ !write ( *, *) a, b, c

27200

+end

27201

Index: gcc/testsuite/gfortran.dg/null_5.f90

27202

===================================================================

27203

--- a/src/gcc/testsuite/gfortran.dg/null_5.f90 (.../tags/gcc_4_8_2_release)

27204

+++ b/src/gcc/testsuite/gfortran.dg/null_5.f90 (.../branches/gcc-4_8-branch)

27205

@@ -34,7 +34,7 @@

27206

end subroutine test_PR34547_1

27207

27208

subroutine test_PR34547_2 ()

27209

- print *, null () ! { dg-error "in data transfer statement requires MOLD" }

27210

+ print *, null () ! { dg-error "Invalid context" }

27211

end subroutine test_PR34547_2

27212

27213

subroutine test_PR34547_3 ()

27214

Index: gcc/testsuite/gfortran.dg/proc_ptr_43.f90

27215

===================================================================

27216

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_43.f90 (.../tags/gcc_4_8_2_release)

27217

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_43.f90 (.../branches/gcc-4_8-branch)

27218

@@ -0,0 +1,19 @@

27219

+! { dg-do compile }

27220

+!

27221

+! PR 58099: [4.8/4.9 Regression] [F03] over-zealous procedure-pointer error checking

27222

+!

27223

+! Contributed by Daniel Price <daniel.price@monash.edu>

27224

+

27225

+ implicit none

27226

+ procedure(real), pointer :: wfunc

27227

+

27228

+ wfunc => w_cubic

27229

+

27230

+contains

27231

+

27232

+ pure real function w_cubic(q2)

27233

+ real, intent(in) :: q2

27234

+ w_cubic = 0.

27235

+ end function

27236

+

27237

+end

27238

Index: gcc/testsuite/gfortran.dg/nan_7.f90

27239

===================================================================

27240

--- a/src/gcc/testsuite/gfortran.dg/nan_7.f90 (.../tags/gcc_4_8_2_release)

27241

+++ b/src/gcc/testsuite/gfortran.dg/nan_7.f90 (.../branches/gcc-4_8-branch)

27242

@@ -2,6 +2,7 @@

27243

! { dg-options "-fno-range-check" }

27244

! { dg-require-effective-target fortran_real_16 }

27245

! { dg-require-effective-target fortran_integer_16 }

27246

+! { dg-skip-if "" { "powerpc*le-*-*" } { "*" } { "" } }

27247

! PR47293 NAN not correctly read

27248

character(len=200) :: str

27249

real(16) :: r

27250

Index: gcc/testsuite/gfortran.dg/typebound_generic_15.f90

27251

===================================================================

27252

--- a/src/gcc/testsuite/gfortran.dg/typebound_generic_15.f90 (.../tags/gcc_4_8_2_release)

27253

+++ b/src/gcc/testsuite/gfortran.dg/typebound_generic_15.f90 (.../branches/gcc-4_8-branch)

27254

@@ -0,0 +1,18 @@

27255

+! { dg-do compile }

27256

+!

27257

+! PR 60231: [4.8/4.9 Regression] ICE on undefined generic

27258

+!

27259

+! Contributed by Antony Lewis <antony@cosmologist.info>

27260

+

27261

+module Objects

27262

+

27263

+ Type TObjectList

27264

+ contains

27265

+ procedure :: Add1 ! { dg-error "must be a module procedure" }

27266

+ procedure :: Add2 ! { dg-error "must be a module procedure" }

27267

+ generic :: Add => Add1, Add2 ! { dg-error "are ambiguous" }

27268

+ end Type

27269

+

27270

+end module

27271

+

27272

+! { dg-final { cleanup-modules "Objects" } }

27273

Index: gcc/testsuite/gfortran.dg/extends_15.f90

27274

===================================================================

27275

--- a/src/gcc/testsuite/gfortran.dg/extends_15.f90 (.../tags/gcc_4_8_2_release)

27276

+++ b/src/gcc/testsuite/gfortran.dg/extends_15.f90 (.../branches/gcc-4_8-branch)

27277

@@ -0,0 +1,16 @@

27278

+! { dg-do compile }

27279

+!

27280

+! PR 58355: [4.7/4.8/4.9 Regression] [F03] ICE with TYPE, EXTENDS before parent TYPE defined

27281

+!

27282

+! Contributed by Andrew Benson <abensonca@gmail.com>

27283

+

27284

+module ct

27285

+ public :: t1

27286

+

27287

+ type, extends(t1) :: t2 ! { dg-error "has not been previously defined" }

27288

+

27289

+ type :: t1

27290

+ end type

27291

+end

27292

+

27293

+! { dg-final { cleanup-modules "ct" } }

27294

Index: gcc/testsuite/gfortran.dg/optional_class_1.f90

27295

===================================================================

27296

--- a/src/gcc/testsuite/gfortran.dg/optional_class_1.f90 (.../tags/gcc_4_8_2_release)

27297

+++ b/src/gcc/testsuite/gfortran.dg/optional_class_1.f90 (.../branches/gcc-4_8-branch)

27298

@@ -0,0 +1,45 @@

27299

+! { dg-do run }

27300

+!

27301

+! PR fortran/57445

27302

+!

27303

+! Contributed by Tobias Burnus <burnus@gcc.gnu.org>

27304

+!

27305

+! Spurious assert was added at revision 192495

27306

+!

27307

+module m

27308

+ implicit none

27309

+ type t

27310

+ integer :: i

27311

+ end type t

27312

+contains

27313

+ subroutine opt(xa, xc, xaa, xca)

27314

+ type(t), allocatable, intent(out), optional :: xa

27315

+ class(t), allocatable, intent(out), optional :: xc

27316

+ type(t), allocatable, intent(out), optional :: xaa(:)

27317

+ class(t), allocatable, intent(out), optional :: xca(:)

27318

+ if (present (xca)) call foo_opt(xca=xca)

27319

+ end subroutine opt

27320

+ subroutine foo_opt(xa, xc, xaa, xca)

27321

+ type(t), allocatable, intent(out), optional :: xa

27322

+ class(t), allocatable, intent(out), optional :: xc

27323

+ type(t), allocatable, intent(out), optional :: xaa(:)

27324

+ class(t), allocatable, intent(out), optional :: xca(:)

27325

+ if (present (xca)) then

27326

+ if (allocated (xca)) deallocate (xca)

27327

+ allocate (xca(3), source = [t(9),t(99),t(999)])

27328

+ end if

27329

+ end subroutine foo_opt

27330

+end module m

27331

+ use m

27332

+ class(t), allocatable :: xca(:)

27333

+ allocate (xca(1), source = t(42))

27334

+ select type (xca)

27335

+ type is (t)

27336

+ if (any (xca%i .ne. [42])) call abort

27337

+ end select

27338

+ call opt (xca = xca)

27339

+ select type (xca)

27340

+ type is (t)

27341

+ if (any (xca%i .ne. [9,99,999])) call abort

27342

+ end select

27343

+end

27344

Index: gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90

27345

===================================================================

27346

--- a/src/gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90 (.../tags/gcc_4_8_2_release)

27347

+++ b/src/gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90 (.../branches/gcc-4_8-branch)

27348

@@ -0,0 +1,74 @@

27349

+! { dg-do run }

27350

+!

27351

+! PR 59654: [4.8/4.9 Regression] [OOP] Broken function table with complex OO use case

27352

+!

27353

+! Contributed by Thomas Clune <Thomas.L.Clune@nasa.gov>

27354

+

27355

+module TestResult_mod

27356

+ implicit none

27357

+

27358

+ type TestResult

27359

+ integer :: numRun = 0

27360

+ contains

27361

+ procedure :: run

27362

+ procedure, nopass :: getNumRun

27363

+ end type

27364

+

27365

+contains

27366

+

27367

+ subroutine run (this)

27368

+ class (TestResult) :: this

27369

+ this%numRun = this%numRun + 1

27370

+ end subroutine

27371

+

27372

+ subroutine getNumRun()

27373

+ end subroutine

27374

+

27375

+end module

27376

+

27377

+

27378

+module BaseTestRunner_mod

27379

+ implicit none

27380

+

27381

+ type :: BaseTestRunner

27382

+ contains

27383

+ procedure, nopass :: norun

27384

+ end type

27385

+

27386

+contains

27387

+

27388

+ function norun () result(result)

27389

+ use TestResult_mod, only: TestResult

27390

+ type (TestResult) :: result

27391

+ end function

27392

+

27393

+end module

27394

+

27395

+

27396

+module TestRunner_mod

27397

+ use BaseTestRunner_mod, only: BaseTestRunner

27398

+ implicit none

27399

+end module

27400

+

27401

+

27402

+program main

27403

+ use TestRunner_mod, only: BaseTestRunner

27404

+ use TestResult_mod, only: TestResult

27405

+ implicit none

27406

+

27407

+ type (TestResult) :: result

27408

+

27409

+ call runtest (result)

27410

+

27411

+contains

27412

+

27413

+ subroutine runtest (result)

27414

+ use TestResult_mod, only: TestResult

27415

+ class (TestResult) :: result

27416

+ call result%run()

27417

+ if (result%numRun /= 1) call abort()

27418

+ end subroutine

27419

+

27420

+end

27421

+

27422

+! { dg-final { cleanup-modules "TestResult_mod BaseTestRunner_mod TestRunner_mod" } }

27423

Index: gcc/testsuite/gfortran.dg/proc_ptr_45.f90

27424

===================================================================

27425

--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_45.f90 (.../tags/gcc_4_8_2_release)

27426

+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_45.f90 (.../branches/gcc-4_8-branch)

27427

@@ -0,0 +1,24 @@

27428

+! { dg-do compile }

27429

+!

27430

+! PR fortran/49397

27431

+!

27432

+! Valid per IR F08/0060 and F2008Corr2, C729

27433

+!

27434

+Program m5

27435

+ Print *,f()

27436

+Contains

27437

+ Subroutine s

27438

+ Procedure(Real),Pointer :: p

27439

+ Print *,g()

27440

+ p => f ! (1)

27441

+ Print *,p()

27442

+ p => g ! (2)

27443

+ Print *,p()

27444

+ End Subroutine

27445

+End Program

27446

+Function f()

27447

+ f = 1

27448

+End Function

27449

+Function g()

27450

+ g = 2

27451

+End Function

27452

Index: gcc/testsuite/gfortran.dg/pr59700.f90

27453

===================================================================

27454

--- a/src/gcc/testsuite/gfortran.dg/pr59700.f90 (.../tags/gcc_4_8_2_release)

27455

+++ b/src/gcc/testsuite/gfortran.dg/pr59700.f90 (.../branches/gcc-4_8-branch)

27456

@@ -0,0 +1,40 @@

27457

+! { dg-do run }

27458

+! PR59700 Test case by Steve Kargl

27459

+program foo

27460

+

27461

+ implicit none

27462

+

27463

+ character(len=80) msg

27464

+ integer, parameter :: fd = 10

27465

+ integer i1, i2, i3, i4

27466

+ real x1, x2, x3, x4

27467

+ complex c1, c2

27468

+ logical a

27469

+

27470

+ open(unit=fd, status='scratch')

27471

+ write(fd, '(A)') '1 2 3.4 q'

27472

+

27473

+ rewind(fd)

27474

+ msg = 'ok'

27475

+ read(fd, *, err=10, iomsg=msg) i1, i2, i3, i4

27476

+10 if (msg /= 'Bad integer for item 3 in list input') call abort

27477

+ rewind(fd)

27478

+ msg = 'ok'

27479

+ read(fd, *, err=20, iomsg=msg) x1, x2, x3, x4

27480

+20 if (msg /= 'Bad real number in item 4 of list input') call abort

27481

+ rewind(fd)

27482

+ msg = 'ok'

27483

+ read(fd, *, err=30, iomsg=msg) i1, x2, x1, a

27484

+30 if (msg /= 'Bad logical value while reading item 4') call abort

27485

+ rewind(fd)

27486

+ read(fd, *, err=31, iomsg=msg) i1, x2, a, x1

27487

+31 if (msg /= 'Bad repeat count in item 3 of list input') call abort

27488

+ close(fd)

27489

+ open(unit=fd, status='scratch')

27490

+ write(fd, '(A)') '(1, 2) (3.4, q)'

27491

+ rewind(fd)

27492

+ msg = 'ok'

27493

+ read(fd, *, err=40, iomsg=msg) c1, c2

27494

+40 if (msg /= 'Bad floating point number for item 2') call abort

27495

+ close(fd)

27496

+end program foo

27497

Index: gcc/testsuite/gfortran.dg/ichar_3.f90

27498

===================================================================

27499

--- a/src/gcc/testsuite/gfortran.dg/ichar_3.f90 (.../tags/gcc_4_8_2_release)

27500

+++ b/src/gcc/testsuite/gfortran.dg/ichar_3.f90 (.../branches/gcc-4_8-branch)

27501

@@ -0,0 +1,13 @@

27502

+! { dg-do compile }

27503

+!

27504

+! PR fortran/59599

27505

+! The call to ichar was triggering an ICE.

27506

+!

27507

+! Original testcase from Fran Martinez Fadrique <fmartinez@gmv.com>

27508

+

27509

+character(1) cpk(2)

27510

+integer res(2)

27511

+cpk = 'a'

27512

+res = ichar( cpk, kind=1 )

27513

+print *, ichar( cpk, kind=1 )

27514

+end

27515

Index: gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90

27516

===================================================================

27517

--- a/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90 (.../tags/gcc_4_8_2_release)

27518

+++ b/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90 (.../branches/gcc-4_8-branch)

27519

@@ -0,0 +1,17 @@

27520

+! { dg-do compile }

27521

+!

27522

+! PR 59493: [OOP] ICE: Segfault on Class(*) pointer association

27523

+!

27524

+! Contributed by Hossein Talebi <talebi.hossein@gmail.com>

27525

+

27526

+ implicit none

27527

+

27528

+ type ty_mytype1

27529

+ end type

27530

+

27531

+ class(ty_mytype1), allocatable, target:: cla1

27532

+ class(*), pointer :: ptr

27533

+

27534

+ ptr => cla1

27535

+

27536

+end

27537

Index: gcc/testsuite/gfortran.dg/fmt_g_1.f90

27538

===================================================================

27539

--- a/src/gcc/testsuite/gfortran.dg/fmt_g_1.f90 (.../tags/gcc_4_8_2_release)

27540

+++ b/src/gcc/testsuite/gfortran.dg/fmt_g_1.f90 (.../branches/gcc-4_8-branch)

27541

@@ -0,0 +1,11 @@

27542

+! { dg-do run }

27543

+! PR59771 Cleanup handling of Gw.0 and Gw.0Ee format

27544

+! Test case prepared by Dominique d'Humieres <dominiq@lps.ens.fr>

27545

+ PROGRAM FOO

27546

+ character(len=60) :: buffer, buffer1

27547

+

27548

+ write (buffer ,'(6(1X,1PG9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0

27549

+ write (buffer1,'(6(1X,1PE9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0

27550

+

27551

+ if (buffer /= buffer1) call abort

27552

+ end

27553

Index: gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90

27554

===================================================================

27555

--- a/src/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 (.../tags/gcc_4_8_2_release)

27556

+++ b/src/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 (.../branches/gcc-4_8-branch)

27557

@@ -0,0 +1,39 @@

27558

+! { dg-do run }

27559

+!

27560

+! PR fortran/59906

27561

+!

27562

+! Contributed by H Anlauf <anlauf@gmx.de>

27563

+!

27564

+! Failed generate character scalar for scalarized loop for elemantal call.

27565

+!

27566

+program x

27567

+ implicit none

27568

+ call y('bbb')

27569

+contains

27570

+

27571

+ subroutine y(str)

27572

+ character(len=*), intent(in) :: str

27573

+ character(len=len_trim(str)) :: str_aux

27574

+ character(len=3) :: str3 = 'abc'

27575

+

27576

+ str_aux = str

27577

+

27578

+ ! Compiled but did not give correct result

27579

+ if (any (str_cmp((/'aaa','bbb'/), str) .neqv. [.FALSE.,.TRUE.])) call abort

27580

+

27581

+ ! Did not compile

27582

+ if (any (str_cmp((/'bbb', 'aaa'/), str_aux) .neqv. [.TRUE.,.FALSE.])) call abort

27583

+

27584

+ ! Verify patch

27585

+ if (any (str_cmp((/'bbb', 'aaa'/), str3) .neqv. [.FALSE.,.FALSE.])) call abort

27586

+ if (any (str_cmp((/'bbb', 'aaa'/), 'aaa') .neqv. [.FALSE.,.TRUE.])) call abort

27587

+

27588

+ end subroutine y

27589

+

27590

+ elemental logical function str_cmp(str1, str2)

27591

+ character(len=*), intent(in) :: str1

27592

+ character(len=*), intent(in) :: str2

27593

+ str_cmp = (str1 == str2)

27594

+ end function str_cmp

27595

+

27596

+end program x

27597

Index: gcc/testsuite/gcc.c-torture/execute/20140212-1.c

27598

===================================================================

27599

--- a/src/gcc/testsuite/gcc.c-torture/execute/20140212-1.c (.../tags/gcc_4_8_2_release)

27600

+++ b/src/gcc/testsuite/gcc.c-torture/execute/20140212-1.c (.../branches/gcc-4_8-branch)

27601

@@ -0,0 +1,37 @@

27602

+/* PR rtl-optimization/60116 */

27603

+/* Reported by Zhendong Su <su@cs.ucdavis.edu> */

27604

+

27605

+extern void abort (void);

27606

+

27607

+int a, b, c, d = 1, e, f = 1, h, i, k;

27608

+char g, j;

27609

+

27610

+void

27611

+fn1 (void)

27612

+{

27613

+ int l;

27614

+ e = 0;

27615

+ c = 0;

27616

+ for (;;)

27617

+ {

27618

+ k = a && b;

27619

+ j = k * 54;

27620

+ g = j * 147;

27621

+ l = ~g + (long long) e && 1;

27622

+ if (d)

27623

+ c = l;

27624

+ else

27625

+ h = i = l * 9UL;

27626

+ if (f)

27627

+ return;

27628

+ }

27629

+}

27630

+

27631

+int

27632

+main (void)

27633

+{

27634

+ fn1 ();

27635

+ if (c != 1)

27636

+ abort ();

27637

+ return 0;

27638

+}

27639

Index: gcc/testsuite/gcc.c-torture/execute/pr58984.c

27640

===================================================================

27641

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58984.c (.../tags/gcc_4_8_2_release)

27642

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58984.c (.../branches/gcc-4_8-branch)

27643

@@ -0,0 +1,57 @@

27644

+/* PR tree-optimization/58984 */

27645

+

27646

+struct S { int f0 : 8; int : 6; int f1 : 5; };

27647

+struct T { char f0; int : 6; int f1 : 5; };

27648

+

27649

+int a, *c = &a, e, n, b, m;

27650

+

27651

+static int

27652

+foo (struct S p)

27653

+{

27654

+ const unsigned short *f[36];

27655

+ for (; e < 2; e++)

27656

+ {

27657

+ const unsigned short **i = &f[0];

27658

+ *c ^= 1;

27659

+ if (p.f1)

27660

+ {

27661

+ *i = 0;

27662

+ return b;

27663

+ }

27664

+ }

27665

+ return 0;

27666

+}

27667

+

27668

+static int

27669

+bar (struct T p)

27670

+{

27671

+ const unsigned short *f[36];

27672

+ for (; e < 2; e++)

27673

+ {

27674

+ const unsigned short **i = &f[0];

27675

+ *c ^= 1;

27676

+ if (p.f1)

27677

+ {

27678

+ *i = 0;

27679

+ return b;

27680

+ }

27681

+ }

27682

+ return 0;

27683

+}

27684

+

27685

+int

27686

+main ()

27687

+{

27688

+ struct S o = { 1, 1 };

27689

+ foo (o);

27690

+ m = n || o.f0;

27691

+ if (a != 1)

27692

+ __builtin_abort ();

27693

+ e = 0;

27694

+ struct T p = { 1, 1 };

27695

+ bar (p);

27696

+ m |= n || p.f0;

27697

+ if (a != 0)

27698

+ __builtin_abort ();

27699

+ return 0;

27700

+}

27701

Index: gcc/testsuite/gcc.c-torture/execute/pr60454.c

27702

===================================================================

27703

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60454.c (.../tags/gcc_4_8_2_release)

27704

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60454.c (.../branches/gcc-4_8-branch)

27705

@@ -0,0 +1,31 @@

27706

+#ifdef __UINT32_TYPE__

27707

+typedef __UINT32_TYPE__ uint32_t;

27708

+#else

27709

+typedef unsigned uint32_t;

27710

+#endif

27711

+

27712

+#define __fake_const_swab32(x) ((uint32_t)( \

27713

+ (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \

27714

+ (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \

27715

+ (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 8) | \

27716

+ (((uint32_t)(x) & (uint32_t)0x0000ff00UL) ) | \

27717

+ (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))

27718

+

27719

+/* Previous version of bswap optimization would detect byte swap when none

27720

+ happen. This test aims at catching such wrong detection to avoid

27721

+ regressions. */

27722

+

27723

+__attribute__ ((noinline, noclone)) uint32_t

27724

+fake_swap32 (uint32_t in)

27725

+{

27726

+ return __fake_const_swab32 (in);

27727

+}

27728

+

27729

+int main(void)

27730

+{

27731

+ if (sizeof (uint32_t) * __CHAR_BIT__ != 32)

27732

+ return 0;

27733

+ if (fake_swap32 (0x12345678UL) != 0x78567E12UL)

27734

+ __builtin_abort ();

27735

+ return 0;

27736

+}

27737

Index: gcc/testsuite/gcc.c-torture/execute/pr60017.c

27738

===================================================================

27739

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60017.c (.../tags/gcc_4_8_2_release)

27740

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60017.c (.../branches/gcc-4_8-branch)

27741

@@ -0,0 +1,33 @@

27742

+/* PR target/60017 */

27743

+

27744

+extern void abort (void);

27745

+

27746

+struct S0

27747

+{

27748

+ short m0;

27749

+ short m1;

27750

+};

27751

+

27752

+struct S1

27753

+{

27754

+ unsigned m0:1;

27755

+ char m1[2][2];

27756

+ struct S0 m2[2];

27757

+};

27758

+

27759

+struct S1 x = { 1, {{2, 3}, {4, 5}}, {{6, 7}, {8, 9}} };

27760

+

27761

+struct S1 func (void)

27762

+{

27763

+ return x;

27764

+}

27765

+

27766

+int main (void)

27767

+{

27768

+ struct S1 ret = func ();

27769

+

27770

+ if (ret.m2[1].m1 != 9)

27771

+ abort ();

27772

+

27773

+ return 0;

27774

+}

27775

Index: gcc/testsuite/gcc.c-torture/execute/20131127-1.c

27776

===================================================================

27777

--- a/src/gcc/testsuite/gcc.c-torture/execute/20131127-1.c (.../tags/gcc_4_8_2_release)

27778

+++ b/src/gcc/testsuite/gcc.c-torture/execute/20131127-1.c (.../branches/gcc-4_8-branch)

27779

@@ -0,0 +1,34 @@

27780

+/* PR middle-end/59138 */

27781

+/* Testcase by John Regehr <regehr@cs.utah.edu> */

27782

+

27783

+extern void abort (void);

27784

+

27785

+#pragma pack(1)

27786

+

27787

+struct S0 {

27788

+ int f0;

27789

+ int f1;

27790

+ int f2;

27791

+ short f3;

27792

+};

27793

+

27794

+short a = 1;

27795

+

27796

+struct S0 b = { 1 }, c, d, e;

27797

+

27798

+struct S0 fn1() { return c; }

27799

+

27800

+void fn2 (void)

27801

+{

27802

+ b = fn1 ();

27803

+ a = 0;

27804

+ d = e;

27805

+}

27806

+

27807

+int main (void)

27808

+{

27809

+ fn2 ();

27810

+ if (a != 0)

27811

+ abort ();

27812

+ return 0;

27813

+}

27814

Index: gcc/testsuite/gcc.c-torture/execute/pr59358.c

27815

===================================================================

27816

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59358.c (.../tags/gcc_4_8_2_release)

27817

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59358.c (.../branches/gcc-4_8-branch)

27818

@@ -0,0 +1,44 @@

27819

+/* PR tree-optimization/59358 */

27820

+

27821

+__attribute__((noinline, noclone)) int

27822

+foo (int *x, int y)

27823

+{

27824

+ int z = *x;

27825

+ if (y > z && y <= 16)

27826

+ while (y > z)

27827

+ z *= 2;

27828

+ return z;

27829

+}

27830

+

27831

+int

27832

+main ()

27833

+{

27834

+ int i;

27835

+ for (i = 1; i < 17; i++)

27836

+ {

27837

+ int j = foo (&i, 16);

27838

+ int k;

27839

+ if (i >= 8 && i <= 15)

27840

+ k = 16 + (i - 8) * 2;

27841

+ else if (i >= 4 && i <= 7)

27842

+ k = 16 + (i - 4) * 4;

27843

+ else if (i == 3)

27844

+ k = 24;

27845

+ else

27846

+ k = 16;

27847

+ if (j != k)

27848

+ __builtin_abort ();

27849

+ j = foo (&i, 7);

27850

+ if (i >= 7)

27851

+ k = i;

27852

+ else if (i >= 4)

27853

+ k = 8 + (i - 4) * 2;

27854

+ else if (i == 3)

27855

+ k = 12;

27856

+ else

27857

+ k = 8;

27858

+ if (j != k)

27859

+ __builtin_abort ();

27860

+ }

27861

+ return 0;

27862

+}

27863

Index: gcc/testsuite/gcc.c-torture/execute/pr60062.c

27864

===================================================================

27865

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60062.c (.../tags/gcc_4_8_2_release)

27866

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60062.c (.../branches/gcc-4_8-branch)

27867

@@ -0,0 +1,25 @@

27868

+/* PR target/60062 */

27869

+

27870

+int a;

27871

+

27872

+static void

27873

+foo (const char *p1, int p2)

27874

+{

27875

+ if (__builtin_strcmp (p1, "hello") != 0)

27876

+ __builtin_abort ();

27877

+}

27878

+

27879

+static void

27880

+bar (const char *p1)

27881

+{

27882

+ if (__builtin_strcmp (p1, "hello") != 0)

27883

+ __builtin_abort ();

27884

+}

27885

+

27886

+__attribute__((optimize (0))) int

27887

+main ()

27888

+{

27889

+ foo ("hello", a);

27890

+ bar ("hello");

27891

+ return 0;

27892

+}

27893

Index: gcc/testsuite/gcc.c-torture/execute/20140425-1.c

27894

===================================================================

27895

--- a/src/gcc/testsuite/gcc.c-torture/execute/20140425-1.c (.../tags/gcc_4_8_2_release)

27896

+++ b/src/gcc/testsuite/gcc.c-torture/execute/20140425-1.c (.../branches/gcc-4_8-branch)

27897

@@ -0,0 +1,23 @@

27898

+/* PR target/60941 */

27899

+/* Reported by Martin Husemann <martin@netbsd.org> */

27900

+

27901

+extern void abort (void);

27902

+

27903

+static void __attribute__((noinline))

27904

+set (unsigned long *l)

27905

+{

27906

+ *l = 31;

27907

+}

27908

+

27909

+int main (void)

27910

+{

27911

+ unsigned long l;

27912

+ int i;

27913

+

27914

+ set (&l);

27915

+ i = (int) l;

27916

+ l = (unsigned long)(2U << i);

27917

+ if (l != 0)

27918

+ abort ();

27919

+ return 0;

27920

+}

27921

Index: gcc/testsuite/gcc.c-torture/execute/pr59014-2.c

27922

===================================================================

27923

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59014-2.c (.../tags/gcc_4_8_2_release)

27924

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59014-2.c (.../branches/gcc-4_8-branch)

27925

@@ -0,0 +1,23 @@

27926

+/* PR tree-optimization/59014 */

27927

+

27928

+__attribute__((noinline, noclone)) long long int

27929

+foo (long long int x, long long int y)

27930

+{

27931

+ if (((int) x | (int) y) != 0)

27932

+ return 6;

27933

+ return x + y;

27934

+}

27935

+

27936

+int

27937

+main ()

27938

+{

27939

+ if (sizeof (long long) == sizeof (int))

27940

+ return 0;

27941

+ int shift_half = sizeof (int) * __CHAR_BIT__ / 2;

27942

+ long long int x = (3LL << shift_half) << shift_half;

27943

+ long long int y = (5LL << shift_half) << shift_half;

27944

+ long long int z = foo (x, y);

27945

+ if (z != ((8LL << shift_half) << shift_half))

27946

+ __builtin_abort ();

27947

+ return 0;

27948

+}

27949

Index: gcc/testsuite/gcc.c-torture/execute/pr59101.c

27950

===================================================================

27951

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59101.c (.../tags/gcc_4_8_2_release)

27952

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59101.c (.../branches/gcc-4_8-branch)

27953

@@ -0,0 +1,15 @@

27954

+/* PR target/59101 */

27955

+

27956

+__attribute__((noinline, noclone)) int

27957

+foo (int a)

27958

+{

27959

+ return (~a & 4102790424LL) > 0 | 6;

27960

+}

27961

+

27962

+int

27963

+main ()

27964

+{

27965

+ if (foo (0) != 7)

27966

+ __builtin_abort ();

27967

+ return 0;

27968

+}

27969

Index: gcc/testsuite/gcc.c-torture/execute/pr58831.c

27970

===================================================================

27971

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c (.../tags/gcc_4_8_2_release)

27972

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c (.../branches/gcc-4_8-branch)

27973

@@ -0,0 +1,40 @@

27974

+#include <assert.h>

27975

+

27976

+int a, *b, c, d, f, **i, p, q, *r;

27977

+short o, j;

27978

+

27979

+static int __attribute__((noinline, noclone))

27980

+fn1 (int *p1, int **p2)

27981

+{

27982

+ int **e = &b;

27983

+ for (; p; p++)

27984

+ *p1 = 1;

27985

+ *e = *p2 = &d;

27986

+

27987

+ assert (r);

27988

+

27989

+ return c;

27990

+}

27991

+

27992

+static int ** __attribute__((noinline, noclone))

27993

+fn2 (void)

27994

+{

27995

+ for (f = 0; f != 42; f++)

27996

+ {

27997

+ int *g[3] = {0, 0, 0};

27998

+ for (o = 0; o; o--)

27999

+ for (; a > 1;)

28000

+ {

28001

+ int **h[1] = { &g[2] };

28002

+ }

28003

+ }

28004

+ return &r;

28005

+}

28006

+

28007

+int

28008

+main (void)

28009

+{

28010

+ i = fn2 ();

28011

+ fn1 (b, i);

28012

+ return 0;

28013

+}

28014

Index: gcc/testsuite/gcc.c-torture/execute/pr58726.c

28015

===================================================================

28016

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58726.c (.../tags/gcc_4_8_2_release)

28017

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58726.c (.../branches/gcc-4_8-branch)

28018

@@ -0,0 +1,26 @@

28019

+/* PR rtl-optimization/58726 */

28020

+

28021

+int a, c;

28022

+union { int f1; int f2 : 1; } b;

28023

+

28024

+short

28025

+foo (short p)

28026

+{

28027

+ return p < 0 ? p : a;

28028

+}

28029

+

28030

+int

28031

+main ()

28032

+{

28033

+ if (sizeof (short) * __CHAR_BIT__ != 16

28034

+ || sizeof (int) * __CHAR_BIT__ != 32)

28035

+ return 0;

28036

+ b.f1 = 56374;

28037

+ unsigned short d;

28038

+ int e = b.f2;

28039

+ d = e == 0 ? b.f1 : 0;

28040

+ c = foo (d);

28041

+ if (c != (short) 56374)

28042

+ __builtin_abort ();

28043

+ return 0;

28044

+}

28045

Index: gcc/testsuite/gcc.c-torture/execute/pr59014.c

28046

===================================================================

28047

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59014.c (.../tags/gcc_4_8_2_release)

28048

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59014.c (.../branches/gcc-4_8-branch)

28049

@@ -0,0 +1,25 @@

28050

+/* PR tree-optimization/59014 */

28051

+

28052

+int a = 2, b, c, d;

28053

+

28054

+int

28055

+foo ()

28056

+{

28057

+ for (;; c++)

28058

+ if ((b > 0) | (a & 1))

28059

+ ;

28060

+ else

28061

+ {

28062

+ d = a;

28063

+ return 0;

28064

+ }

28065

+}

28066

+

28067

+int

28068

+main ()

28069

+{

28070

+ foo ();

28071

+ if (d != 2)

28072

+ __builtin_abort ();

28073

+ return 0;

28074

+}

28075

Index: gcc/testsuite/gcc.c-torture/execute/pr60960.c

28076

===================================================================

28077

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60960.c (.../tags/gcc_4_8_2_release)

28078

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60960.c (.../branches/gcc-4_8-branch)

28079

@@ -0,0 +1,38 @@

28080

+/* PR tree-optimization/60960 */

28081

+

28082

+typedef unsigned char v4qi __attribute__ ((vector_size (4)));

28083

+

28084

+__attribute__((noinline, noclone)) v4qi

28085

+f1 (v4qi v)

28086

+{

28087

+ return v / 2;

28088

+}

28089

+

28090

+__attribute__((noinline, noclone)) v4qi

28091

+f2 (v4qi v)

28092

+{

28093

+ return v / (v4qi) { 2, 2, 2, 2 };

28094

+}

28095

+

28096

+__attribute__((noinline, noclone)) v4qi

28097

+f3 (v4qi x, v4qi y)

28098

+{

28099

+ return x / y;

28100

+}

28101

+

28102

+int

28103

+main ()

28104

+{

28105

+ v4qi x = { 5, 5, 5, 5 };

28106

+ v4qi y = { 2, 2, 2, 2 };

28107

+ v4qi z = f1 (x);

28108

+ if (__builtin_memcmp (&y, &z, sizeof (y)) != 0)

28109

+ __builtin_abort ();

28110

+ z = f2 (x);

28111

+ if (__builtin_memcmp (&y, &z, sizeof (y)) != 0)

28112

+ __builtin_abort ();

28113

+ z = f3 (x, y);

28114

+ if (__builtin_memcmp (&y, &z, sizeof (y)) != 0)

28115

+ __builtin_abort ();

28116

+ return 0;

28117

+}

28118

Index: gcc/testsuite/gcc.c-torture/execute/pr60072.c

28119

===================================================================

28120

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60072.c (.../tags/gcc_4_8_2_release)

28121

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60072.c (.../branches/gcc-4_8-branch)

28122

@@ -0,0 +1,16 @@

28123

+/* PR target/60072 */

28124

+

28125

+int c = 1;

28126

+

28127

+__attribute__ ((optimize (1)))

28128

+static int *foo (int *p)

28129

+{

28130

+ return p;

28131

+}

28132

+

28133

+int

28134

+main ()

28135

+{

28136

+ *foo (&c) = 2;

28137

+ return c - 2;

28138

+}

28139

Index: gcc/testsuite/gcc.c-torture/execute/20140326-1.c

28140

===================================================================

28141

--- a/src/gcc/testsuite/gcc.c-torture/execute/20140326-1.c (.../tags/gcc_4_8_2_release)

28142

+++ b/src/gcc/testsuite/gcc.c-torture/execute/20140326-1.c (.../branches/gcc-4_8-branch)

28143

@@ -0,0 +1,10 @@

28144

+int a;

28145

+

28146

+int

28147

+main (void)

28148

+{

28149

+ char e[2] = { 0, 0 }, f = 0;

28150

+ if (a == 131072)

28151

+ f = e[a];

28152

+ return f;

28153

+}

28154

Index: gcc/testsuite/gcc.c-torture/execute/pr59388.c

28155

===================================================================

28156

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr59388.c (.../tags/gcc_4_8_2_release)

28157

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr59388.c (.../branches/gcc-4_8-branch)

28158

@@ -0,0 +1,11 @@

28159

+/* PR tree-optimization/59388 */

28160

+

28161

+int a;

28162

+struct S { unsigned int f:1; } b;

28163

+

28164

+int

28165

+main ()

28166

+{

28167

+ a = (0 < b.f) | b.f;

28168

+ return a;

28169

+}

28170

Index: gcc/testsuite/gcc.c-torture/compile/pr58970-1.c

28171

===================================================================

28172

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr58970-1.c (.../tags/gcc_4_8_2_release)

28173

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr58970-1.c (.../branches/gcc-4_8-branch)

28174

@@ -0,0 +1,11 @@

28175

+/* PR middle-end/58970 */

28176

+

28177

+struct T { int b : 1; };

28178

+struct S { struct T t[1]; };

28179

+

28180

+void

28181

+foo (int x, struct S *s)

28182

+{

28183

+ if (x == -1)

28184

+ s->t[x].b = 0;

28185

+}

28186

Index: gcc/testsuite/gcc.c-torture/compile/pr59803.c

28187

===================================================================

28188

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr59803.c (.../tags/gcc_4_8_2_release)

28189

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr59803.c (.../branches/gcc-4_8-branch)

28190

@@ -0,0 +1,27 @@

28191

+/* PR target/59803 */

28192

+

28193

+extern void baz (void) __attribute__ ((__noreturn__));

28194

+struct A { int g, h; };

28195

+extern struct A a;

28196

+struct B { unsigned char i, j, k, l, m; };

28197

+int c, d, e;

28198

+static int f;

28199

+

28200

+void

28201

+foo (void)

28202

+{

28203

+ f = 1;

28204

+}

28205

+

28206

+void

28207

+bar (struct B *x)

28208

+{

28209

+ x->i = e;

28210

+ x->k = c;

28211

+ x->l = d;

28212

+ x->j = a.h;

28213

+ x->m = f;

28214

+ if (x->i != e) baz ();

28215

+ if (x->k != c) baz ();

28216

+ if (x->j != a.h) baz ();

28217

+}

28218

Index: gcc/testsuite/gcc.c-torture/compile/pr58997.c

28219

===================================================================

28220

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr58997.c (.../tags/gcc_4_8_2_release)

28221

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr58997.c (.../branches/gcc-4_8-branch)

28222

@@ -0,0 +1,19 @@

28223

+/* PR rtl-optimization/58997 */

28224

+

28225

+int a, b, c, e;

28226

+short d;

28227

+char h;

28228

+

28229

+void

28230

+foo ()

28231

+{

28232

+ while (b)

28233

+ {

28234

+ d = a ? c : 1 % a;

28235

+ c = d;

28236

+ h = d;

28237

+ if (!h)

28238

+ while (e)

28239

+ ;

28240

+ }

28241

+}

28242

Index: gcc/testsuite/gcc.c-torture/compile/pr60502.c

28243

===================================================================

28244

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr60502.c (.../tags/gcc_4_8_2_release)

28245

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr60502.c (.../branches/gcc-4_8-branch)

28246

@@ -0,0 +1,18 @@

28247

+/* PR tree-optimization/60502 */

28248

+

28249

+typedef signed char v16i8 __attribute__ ((vector_size (16)));

28250

+typedef unsigned char v16u8 __attribute__ ((vector_size (16)));

28251

+

28252

+void

28253

+foo (v16i8 *x)

28254

+{

28255

+ v16i8 m1 = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };

28256

+ *x |= *x ^ m1;

28257

+}

28258

+

28259

+void

28260

+bar (v16u8 *x)

28261

+{

28262

+ v16u8 m1 = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };

28263

+ *x |= *x ^ m1;

28264

+}

28265

Index: gcc/testsuite/gcc.c-torture/compile/pr58970-2.c

28266

===================================================================

28267

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr58970-2.c (.../tags/gcc_4_8_2_release)

28268

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr58970-2.c (.../branches/gcc-4_8-branch)

28269

@@ -0,0 +1,11 @@

28270

+/* PR middle-end/58970 */

28271

+

28272

+struct T { char a : 8; char b : 1; };

28273

+struct S { char x; struct T t[1]; };

28274

+

28275

+void

28276

+foo (int x, struct S *s)

28277

+{

28278

+ if (x == -1)

28279

+ s->t[x].b = 0;

28280

+}

28281

Index: gcc/testsuite/gcc.c-torture/compile/pr59362.c

28282

===================================================================

28283

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr59362.c (.../tags/gcc_4_8_2_release)

28284

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr59362.c (.../branches/gcc-4_8-branch)

28285

@@ -0,0 +1,21 @@

28286

+/* PR tree-optimization/59362 */

28287

+

28288

+char *

28289

+foo (char *r, int s)

28290

+{

28291

+ r = __builtin___stpcpy_chk (r, "abc", __builtin_object_size (r, 1));

28292

+ if (s)

28293

+ r = __builtin___stpcpy_chk (r, "d", __builtin_object_size (r, 1));

28294

+ return r;

28295

+}

28296

+

28297

+char *a;

28298

+long int b;

28299

+

28300

+void

28301

+bar (void)

28302

+{

28303

+ b = __builtin_object_size (0, 0);

28304

+ a = __builtin___stpcpy_chk (0, "", b);

28305

+ b = __builtin_object_size (a, 0);

28306

+}

28307

Index: gcc/testsuite/gnat.dg/opt32.adb

28308

===================================================================

28309

--- a/src/gcc/testsuite/gnat.dg/opt32.adb (.../tags/gcc_4_8_2_release)

28310

+++ b/src/gcc/testsuite/gnat.dg/opt32.adb (.../branches/gcc-4_8-branch)

28311

@@ -0,0 +1,37 @@

28312

+-- { dg-do compile }

28313

+-- { dg-options "-O2" }

28314

+

28315

+with Ada.Containers; use Ada.Containers;

28316

+with Ada.Containers.Vectors;

28317

+

28318

+function Opt32 return Natural is

28319

+

28320

+ package My_Vectors

28321

+ is new Vectors (Index_Type => Natural, Element_Type => Integer);

28322

+ use My_Vectors;

28323

+

28324

+ V : Vector;

28325

+

28326

+ function Sign_Changes return Natural is

28327

+ Cur : Cursor := To_Cursor (V, 0);

28328

+ R : Natural := 0;

28329

+ Negative : Boolean;

28330

+ begin

28331

+ Negative := Element (Cur) < 0;

28332

+

28333

+ loop

28334

+ Cur := Next (Cur);

28335

+ exit when R > 100;

28336

+

28337

+ if (Element (Cur) < 0) /= Negative then

28338

+ Negative := not Negative;

28339

+ R := R + 1;

28340

+ end if;

28341

+ end loop;

28342

+

28343

+ return R;

28344

+ end;

28345

+

28346

+begin

28347

+ return Sign_Changes;

28348

+end;

28349

Index: gcc/testsuite/gcc.dg/pr58668.c

28350

===================================================================

28351

--- a/src/gcc/testsuite/gcc.dg/pr58668.c (.../tags/gcc_4_8_2_release)

28352

+++ b/src/gcc/testsuite/gcc.dg/pr58668.c (.../branches/gcc-4_8-branch)

28353

@@ -0,0 +1,25 @@

28354

+/* PR rtl-optimization/58668 */

28355

+/* { dg-do compile } */

28356

+/* { dg-options "-O2" } */

28357

+/* { dg-additional-options "-mthumb" { target { { arm*-*-* } && arm_thumb2_ok } } } */

28358

+

28359

+void *fn1 (void *);

28360

+void *fn2 (void *, const char *);

28361

+void fn3 (void *);

28362

+void fn4 (void *, int);

28363

+

28364

+void *

28365

+test (void *x)

28366

+{

28367

+ void *a, *b;

28368

+ if (!(a = fn1 (x)))

28369

+ return (void *) 0;

28370

+ if (!(b = fn2 (a, "w")))

28371

+ {

28372

+ fn3 (a);

28373

+ return (void *) 0;

28374

+ }

28375

+ fn3 (a);

28376

+ fn4 (b, 1);

28377

+ return b;

28378

+}

28379

Index: gcc/testsuite/gcc.dg/pr57518.c

28380

===================================================================

28381

--- a/src/gcc/testsuite/gcc.dg/pr57518.c (.../tags/gcc_4_8_2_release)

28382

+++ b/src/gcc/testsuite/gcc.dg/pr57518.c (.../branches/gcc-4_8-branch)

28383

@@ -1,8 +1,8 @@

28384

-/* PR rtl-optimization/57130 */

28385

+/* PR rtl-optimization/57518 */

28386

28387

/* { dg-do compile } */

28388

/* { dg-options "-O2 -fdump-rtl-ira" } */

28389

-/* { dg-final { scan-rtl-dump-not "REG_EQUIV.*mem.*\"ip\"" "ira" } } */

28390

+/* { dg-final { scan-rtl-dump-not "REG_EQUIV\[^\n\]*mem\[^\n\]*\"ip\".*subreg" "ira" } } */

28391

28392

char ip[10];

28393

int total;

28394

Index: gcc/testsuite/gcc.dg/builtin-object-size-14.c

28395

===================================================================

28396

--- a/src/gcc/testsuite/gcc.dg/builtin-object-size-14.c (.../tags/gcc_4_8_2_release)

28397

+++ b/src/gcc/testsuite/gcc.dg/builtin-object-size-14.c (.../branches/gcc-4_8-branch)

28398

@@ -0,0 +1,28 @@

28399

+/* { dg-do run } */

28400

+/* { dg-options "-O2" } */

28401

+

28402

+extern void abort (void);

28403

+extern char *strncpy(char *, const char *, __SIZE_TYPE__);

28404

+

28405

+union u {

28406

+ struct {

28407

+ char vi[8];

28408

+ char pi[16];

28409

+ };

28410

+ char all[8+16+4];

28411

+};

28412

+

28413

+void __attribute__((noinline,noclone))

28414

+f(union u *u)

28415

+{

28416

+ char vi[8+1];

28417

+ __builtin_strncpy(vi, u->vi, sizeof(u->vi));

28418

+ if (__builtin_object_size (u->all, 1) != -1)

28419

+ abort ();

28420

+}

28421

+int main()

28422

+{

28423

+ union u u;

28424

+ f (&u);

28425

+ return 0;

28426

+}

28427

Index: gcc/testsuite/gcc.dg/gomp/pr58809.c

28428

===================================================================

28429

--- a/src/gcc/testsuite/gcc.dg/gomp/pr58809.c (.../tags/gcc_4_8_2_release)

28430

+++ b/src/gcc/testsuite/gcc.dg/gomp/pr58809.c (.../branches/gcc-4_8-branch)

28431

@@ -0,0 +1,13 @@

28432

+/* PR middle-end/58809 */

28433

+/* { dg-do compile } */

28434

+/* { dg-options "-fopenmp -O" } */

28435

+

28436

+int i;

28437

+#pragma omp threadprivate (i)

28438

+

28439

+void foo()

28440

+{

28441

+ _Complex int j;

28442

+#pragma omp parallel copyin (i) reduction (&&:j)

28443

+ ;

28444

+}

28445

Index: gcc/testsuite/gcc.dg/20050922-1.c

28446

===================================================================

28447

--- a/src/gcc/testsuite/gcc.dg/20050922-1.c (.../tags/gcc_4_8_2_release)

28448

+++ b/src/gcc/testsuite/gcc.dg/20050922-1.c (.../branches/gcc-4_8-branch)

28449

@@ -4,7 +4,7 @@

28450

/* { dg-do run } */

28451

/* { dg-options "-O1 -std=c99" } */

28452

28453

-#include <stdlib.h>

28454

+extern void abort (void);

28455

28456

#if __INT_MAX__ == 2147483647

28457

typedef unsigned int uint32_t;

28458

Index: gcc/testsuite/gcc.dg/pr46309.c

28459

===================================================================

28460

--- a/src/gcc/testsuite/gcc.dg/pr46309.c (.../tags/gcc_4_8_2_release)

28461

+++ b/src/gcc/testsuite/gcc.dg/pr46309.c (.../branches/gcc-4_8-branch)

28462

@@ -1,5 +1,5 @@

28463

/* PR tree-optimization/46309 */

28464

-/* { dg-do compile } */

28465

+/* { dg-do compile { target { ! { cris*-*-* } } } } */

28466

/* { dg-options "-O2 -fdump-tree-reassoc-details" } */

28467

/* The transformation depends on BRANCH_COST being greater than 1

28468

(see the notes in the PR), so try to force that. */

28469

Index: gcc/testsuite/gcc.dg/pr60485-2.c

28470

===================================================================

28471

--- a/src/gcc/testsuite/gcc.dg/pr60485-2.c (.../tags/gcc_4_8_2_release)

28472

+++ b/src/gcc/testsuite/gcc.dg/pr60485-2.c (.../branches/gcc-4_8-branch)

28473

@@ -0,0 +1,38 @@

28474

+/* { dg-do run } */

28475

+/* { dg-options "-O2" } */

28476

+

28477

+extern void abort (void);

28478

+struct S {

28479

+ int *i[4];

28480

+ int *p1;

28481

+ int *p2;

28482

+ int *p3;

28483

+ int *p4;

28484

+ int **x;

28485

+};

28486

+int **b;

28487

+int main()

28488

+{

28489

+ int i = 1;

28490

+ struct S s;

28491

+ s.p3 = &i;

28492

+ int **p;

28493

+ if (b)

28494

+ p = b;

28495

+ else

28496

+ p = &s.i[2];

28497

+ p += 4;

28498

+ /* prevert fowrprop from creating an offsetted sd constraint and

28499

+ preserve the pointer offsetting constraint. */

28500

+ s.x = p;

28501

+ p = s.x;

28502

+ if (!b)

28503

+ {

28504

+ int *z = *p;

28505

+ /* z should point to i (and non-local/escaped). */

28506

+ *z = 0;

28507

+ }

28508

+ if (i != 0)

28509

+ abort ();

28510

+ return i;

28511

+}

28512

Index: gcc/testsuite/gcc.dg/atomic-store-6.c

28513

===================================================================

28514

--- a/src/gcc/testsuite/gcc.dg/atomic-store-6.c (.../tags/gcc_4_8_2_release)

28515

+++ b/src/gcc/testsuite/gcc.dg/atomic-store-6.c (.../branches/gcc-4_8-branch)

28516

@@ -0,0 +1,13 @@

28517

+/* { dg-do run } */

28518

+/* { dg-require-effective-target sync_int_128_runtime } */

28519

+/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */

28520

+

28521

+__int128_t i;

28522

+

28523

+int main()

28524

+{

28525

+ __atomic_store_16(&i, -1, 0);

28526

+ if (i != -1)

28527

+ __builtin_abort();

28528

+ return 0;

28529

+}

28530

Index: gcc/testsuite/gcc.dg/guality/pr59776.c

28531

===================================================================

28532

--- a/src/gcc/testsuite/gcc.dg/guality/pr59776.c (.../tags/gcc_4_8_2_release)

28533

+++ b/src/gcc/testsuite/gcc.dg/guality/pr59776.c (.../branches/gcc-4_8-branch)

28534

@@ -0,0 +1,29 @@

28535

+/* PR debug/59776 */

28536

+/* { dg-do run } */

28537

+/* { dg-options "-g" } */

28538

+

28539

+#include "../nop.h"

28540

+

28541

+struct S { float f, g; };

28542

+

28543

+__attribute__((noinline, noclone)) void

28544

+foo (struct S *p)

28545

+{

28546

+ struct S s1, s2; /* { dg-final { gdb-test pr59776.c:17 "s1.f" "5.0" } } */

28547

+ s1 = *p; /* { dg-final { gdb-test pr59776.c:17 "s1.g" "6.0" } } */

28548

+ s2 = s1; /* { dg-final { gdb-test pr59776.c:17 "s2.f" "0.0" } } */

28549

+ *(int *) &s2.f = 0; /* { dg-final { gdb-test pr59776.c:17 "s2.g" "6.0" } } */

28550

+ asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s1.f" "5.0" } } */

28551

+ asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s1.g" "6.0" } } */

28552

+ s2 = s1; /* { dg-final { gdb-test pr59776.c:20 "s2.f" "5.0" } } */

28553

+ asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s2.g" "6.0" } } */

28554

+ asm volatile (NOP : : : "memory");

28555

+}

28556

+

28557

+int

28558

+main ()

28559

+{

28560

+ struct S x = { 5.0f, 6.0f };

28561

+ foo (&x);

28562

+ return 0;

28563

+}

28564

Index: gcc/testsuite/gcc.dg/attr-weakref-1.c

28565

===================================================================

28566

--- a/src/gcc/testsuite/gcc.dg/attr-weakref-1.c (.../tags/gcc_4_8_2_release)

28567

+++ b/src/gcc/testsuite/gcc.dg/attr-weakref-1.c (.../branches/gcc-4_8-branch)

28568

@@ -4,12 +4,14 @@

28569

// This test requires support for undefined weak symbols. This support

28570

// is not available on hppa*-*-hpux*. The test is skipped rather than

28571

// xfailed to suppress the warning that would otherwise arise.

28572

-// { dg-skip-if "" { "*-*-darwin*" "hppa*-*-hpux*" } "*" { "" } }

28573

+// { dg-skip-if "" { "hppa*-*-hpux*" } "*" { "" } }

28574

// For kernel modules and static RTPs, the loader treats undefined weak

28575

// symbols in the same way as undefined strong symbols. The test

28576

// therefore fails to load, so skip it.

28577

// { dg-skip-if "" { "*-*-vxworks*" && nonpic } "*" { "-non-static" } }

28578

// { dg-options "-O2" }

28579

+// { dg-additional-options "-Wl,-undefined,dynamic_lookup" { target *-*-darwin* } }

28580

+// { dg-additional-options "-Wl,-flat_namespace" { target *-*-darwin[89]* } }

28581

// { dg-additional-sources "attr-weakref-1a.c" }

28582

28583

28584

Index: gcc/testsuite/gcc.dg/pr59827.c

28585

===================================================================

28586

--- a/src/gcc/testsuite/gcc.dg/pr59827.c (.../tags/gcc_4_8_2_release)

28587

+++ b/src/gcc/testsuite/gcc.dg/pr59827.c (.../branches/gcc-4_8-branch)

28588

@@ -0,0 +1,15 @@

28589

+/* PR middle-end/59827 */

28590

+/* { dg-do compile } */

28591

+

28592

+int

28593

+foo (int p[2][]) /* { dg-error "array type has incomplete element type" } */

28594

+{

28595

+ return p[0][0];

28596

+}

28597

+

28598

+void

28599

+bar (void)

28600

+{

28601

+ int p[2][1];

28602

+ foo (p); /* { dg-error "type of formal parameter 1 is incomplete" } */

28603

+}

28604

Index: gcc/testsuite/gcc.dg/vmx/stl-be-order.c

28605

===================================================================

28606

--- a/src/gcc/testsuite/gcc.dg/vmx/stl-be-order.c (.../tags/gcc_4_8_2_release)

28607

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl-be-order.c (.../branches/gcc-4_8-branch)

28608

@@ -0,0 +1,83 @@

28609

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28610

+

28611

+#include "harness.h"

28612

+

28613

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28614

+static signed char svsc[16] __attribute__ ((aligned (16)));

28615

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

28616

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28617

+static signed short svss[8] __attribute__ ((aligned (16)));

28618

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

28619

+static unsigned short svp[8] __attribute__ ((aligned (16)));

28620

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28621

+static signed int svsi[4] __attribute__ ((aligned (16)));

28622

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

28623

+static float svf[4] __attribute__ ((aligned (16)));

28624

+

28625

+static void check_arrays ()

28626

+{

28627

+ unsigned int i;

28628

+ for (i = 0; i < 16; ++i)

28629

+ {

28630

+ check (svuc[i] == i, "svuc");

28631

+ check (svsc[i] == i - 8, "svsc");

28632

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

28633

+ }

28634

+ for (i = 0; i < 8; ++i)

28635

+ {

28636

+ check (svus[i] == i, "svus");

28637

+ check (svss[i] == i - 4, "svss");

28638

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

28639

+ check (svp[i] == i, "svp");

28640

+ }

28641

+ for (i = 0; i < 4; ++i)

28642

+ {

28643

+ check (svui[i] == i, "svui");

28644

+ check (svsi[i] == i - 2, "svsi");

28645

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

28646

+ check (svf[i] == i * 1.0f, "svf");

28647

+ }

28648

+}

28649

+

28650

+static void test ()

28651

+{

28652

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28653

+ vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

28654

+ vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

28655

+ vector bool char vbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

28656

+ vector unsigned short vus = {7,6,5,4,3,2,1,0};

28657

+ vector signed short vss = {3,2,1,0,-1,-2,-3,-4};

28658

+ vector bool short vbs = {65535,0,65535,0,65535,0,65535,0};

28659

+ vector pixel vp = {7,6,5,4,3,2,1,0};

28660

+ vector unsigned int vui = {3,2,1,0};

28661

+ vector signed int vsi = {1,0,-1,-2};

28662

+ vector bool int vbi = {0xffffffff,0,0xffffffff,0};

28663

+ vector float vf = {3.0,2.0,1.0,0.0};

28664

+#else

28665

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28666

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28667

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

28668

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

28669

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

28670

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

28671

+ vector pixel vp = {0,1,2,3,4,5,6,7};

28672

+ vector unsigned int vui = {0,1,2,3};

28673

+ vector signed int vsi = {-2,-1,0,1};

28674

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

28675

+ vector float vf = {0.0,1.0,2.0,3.0};

28676

+#endif

28677

+

28678

+ vec_stl (vuc, 0, (vector unsigned char *)svuc);

28679

+ vec_stl (vsc, 0, (vector signed char *)svsc);

28680

+ vec_stl (vbc, 0, (vector bool char *)svbc);

28681

+ vec_stl (vus, 0, (vector unsigned short *)svus);

28682

+ vec_stl (vss, 0, (vector signed short *)svss);

28683

+ vec_stl (vbs, 0, (vector bool short *)svbs);

28684

+ vec_stl (vp, 0, (vector pixel *)svp);

28685

+ vec_stl (vui, 0, (vector unsigned int *)svui);

28686

+ vec_stl (vsi, 0, (vector signed int *)svsi);

28687

+ vec_stl (vbi, 0, (vector bool int *)svbi);

28688

+ vec_stl (vf, 0, (vector float *)svf);

28689

+

28690

+ check_arrays ();

28691

+}

28692

Index: gcc/testsuite/gcc.dg/vmx/perm-be-order.c

28693

===================================================================

28694

--- a/src/gcc/testsuite/gcc.dg/vmx/perm-be-order.c (.../tags/gcc_4_8_2_release)

28695

+++ b/src/gcc/testsuite/gcc.dg/vmx/perm-be-order.c (.../branches/gcc-4_8-branch)

28696

@@ -0,0 +1,74 @@

28697

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28698

+

28699

+#include "harness.h"

28700

+

28701

+static void test()

28702

+{

28703

+ /* Input vectors. */

28704

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28705

+ vector unsigned char vucb = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

28706

+ vector signed char vsca = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

28707

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28708

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

28709

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

28710

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

28711

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

28712

+ vector unsigned int vuia = {0,1,2,3};

28713

+ vector unsigned int vuib = {4,5,6,7};

28714

+ vector signed int vsia = {-4,-3,-2,-1};

28715

+ vector signed int vsib = {0,1,2,3};

28716

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

28717

+ vector float vfb = {0.0,1.0,2.0,3.0};

28718

+

28719

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28720

+ vector unsigned char vucp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23};

28721

+ vector unsigned char vscp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23};

28722

+ vector unsigned char vusp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22};

28723

+ vector unsigned char vssp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22};

28724

+ vector unsigned char vuip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};

28725

+ vector unsigned char vsip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};

28726

+ vector unsigned char vfp = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};

28727

+#else

28728

+ vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

28729

+ vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

28730

+ vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

28731

+ vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

28732

+ vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

28733

+ vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

28734

+ vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

28735

+#endif

28736

+

28737

+ /* Result vectors. */

28738

+ vector unsigned char vuc;

28739

+ vector signed char vsc;

28740

+ vector unsigned short vus;

28741

+ vector signed short vss;

28742

+ vector unsigned int vui;

28743

+ vector signed int vsi;

28744

+ vector float vf;

28745

+

28746

+ /* Expected result vectors. */

28747

+ vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

28748

+ vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8};

28749

+ vector unsigned short vusr = {0,15,1,14,2,13,3,12};

28750

+ vector signed short vssr = {-8,7,-7,6,-6,5,-5,4};

28751

+ vector unsigned int vuir = {0,7,1,6};

28752

+ vector signed int vsir = {-4,3,-3,2};

28753

+ vector float vfr = {-4.0,3.0,-3.0,2.0};

28754

+

28755

+ vuc = vec_perm (vuca, vucb, vucp);

28756

+ vsc = vec_perm (vsca, vscb, vscp);

28757

+ vus = vec_perm (vusa, vusb, vusp);

28758

+ vss = vec_perm (vssa, vssb, vssp);

28759

+ vui = vec_perm (vuia, vuib, vuip);

28760

+ vsi = vec_perm (vsia, vsib, vsip);

28761

+ vf = vec_perm (vfa, vfb, vfp );

28762

+

28763

+ check (vec_all_eq (vuc, vucr), "vuc");

28764

+ check (vec_all_eq (vsc, vscr), "vsc");

28765

+ check (vec_all_eq (vus, vusr), "vus");

28766

+ check (vec_all_eq (vss, vssr), "vss");

28767

+ check (vec_all_eq (vui, vuir), "vui");

28768

+ check (vec_all_eq (vsi, vsir), "vsi");

28769

+ check (vec_all_eq (vf, vfr), "vf" );

28770

+}

28771

Index: gcc/testsuite/gcc.dg/vmx/insert-be-order.c

28772

===================================================================

28773

--- a/src/gcc/testsuite/gcc.dg/vmx/insert-be-order.c (.../tags/gcc_4_8_2_release)

28774

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert-be-order.c (.../branches/gcc-4_8-branch)

28775

@@ -0,0 +1,65 @@

28776

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

28777

+

28778

+#include "harness.h"

28779

+

28780

+static void test()

28781

+{

28782

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28783

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28784

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

28785

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

28786

+ vector unsigned int ve = {0,1,2,3};

28787

+ vector signed int vf = {-2,-1,0,1};

28788

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

28789

+

28790

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28791

+ check (vec_all_eq (vec_insert (16, va, 5),

28792

+ ((vector unsigned char)

28793

+ {0,1,2,3,4,5,6,7,8,9,16,11,12,13,14,15})),

28794

+ "vec_insert (va LE)");

28795

+ check (vec_all_eq (vec_insert (-16, vb, 0),

28796

+ ((vector signed char)

28797

+ {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,-16})),

28798

+ "vec_insert (vb LE)");

28799

+ check (vec_all_eq (vec_insert (16, vc, 7),

28800

+ ((vector unsigned short){16,1,2,3,4,5,6,7})),

28801

+ "vec_insert (vc LE)");

28802

+ check (vec_all_eq (vec_insert (-16, vd, 3),

28803

+ ((vector signed short){-4,-3,-2,-1,-16,1,2,3})),

28804

+ "vec_insert (vd LE)");

28805

+ check (vec_all_eq (vec_insert (16, ve, 2),

28806

+ ((vector unsigned int){0,16,2,3})),

28807

+ "vec_insert (ve LE)");

28808

+ check (vec_all_eq (vec_insert (-16, vf, 1),

28809

+ ((vector signed int){-2,-1,-16,1})),

28810

+ "vec_insert (vf LE)");

28811

+ check (vec_all_eq (vec_insert (-16.0f, vg, 0),

28812

+ ((vector float){-2.0f,-1.0f,0.0f,-16.0f})),

28813

+ "vec_insert (vg LE)");

28814

+#else

28815

+ check (vec_all_eq (vec_insert (16, va, 5),

28816

+ ((vector unsigned char)

28817

+ {0,1,2,3,4,16,6,7,8,9,10,11,12,13,14,15})),

28818

+ "vec_insert (va BE)");

28819

+ check (vec_all_eq (vec_insert (-16, vb, 0),

28820

+ ((vector signed char)

28821

+ {-16,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7})),

28822

+ "vec_insert (vb BE)");

28823

+ check (vec_all_eq (vec_insert (16, vc, 7),

28824

+ ((vector unsigned short){0,1,2,3,4,5,6,16})),

28825

+ "vec_insert (vc BE)");

28826

+ check (vec_all_eq (vec_insert (-16, vd, 3),

28827

+ ((vector signed short){-4,-3,-2,-16,0,1,2,3})),

28828

+ "vec_insert (vd BE)");

28829

+ check (vec_all_eq (vec_insert (16, ve, 2),

28830

+ ((vector unsigned int){0,1,16,3})),

28831

+ "vec_insert (ve BE)");

28832

+ check (vec_all_eq (vec_insert (-16, vf, 1),

28833

+ ((vector signed int){-2,-16,0,1})),

28834

+ "vec_insert (vf BE)");

28835

+ check (vec_all_eq (vec_insert (-16.0f, vg, 0),

28836

+ ((vector float){-16.0f,-1.0f,0.0f,1.0f})),

28837

+ "vec_insert (vg BE)");

28838

+#endif

28839

+}

28840

+

28841

Index: gcc/testsuite/gcc.dg/vmx/ldl.c

28842

===================================================================

28843

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl.c (.../tags/gcc_4_8_2_release)

28844

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl.c (.../branches/gcc-4_8-branch)

28845

@@ -0,0 +1,91 @@

28846

+#include "harness.h"

28847

+

28848

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

28849

+static signed char svsc[16] __attribute__ ((aligned (16)));

28850

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

28851

+static unsigned short svus[8] __attribute__ ((aligned (16)));

28852

+static signed short svss[8] __attribute__ ((aligned (16)));

28853

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

28854

+static unsigned short svp[8] __attribute__ ((aligned (16)));

28855

+static unsigned int svui[4] __attribute__ ((aligned (16)));

28856

+static signed int svsi[4] __attribute__ ((aligned (16)));

28857

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

28858

+static float svf[4] __attribute__ ((aligned (16)));

28859

+

28860

+static void init ()

28861

+{

28862

+ unsigned int i;

28863

+ for (i = 0; i < 16; ++i)

28864

+ {

28865

+ svuc[i] = i;

28866

+ svsc[i] = i - 8;

28867

+ svbc[i] = (i % 2) ? 0xff : 0;

28868

+ }

28869

+ for (i = 0; i < 8; ++i)

28870

+ {

28871

+ svus[i] = i;

28872

+ svss[i] = i - 4;

28873

+ svbs[i] = (i % 2) ? 0xffff : 0;

28874

+ svp[i] = i;

28875

+ }

28876

+ for (i = 0; i < 4; ++i)

28877

+ {

28878

+ svui[i] = i;

28879

+ svsi[i] = i - 2;

28880

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

28881

+ svf[i] = i * 1.0f;

28882

+ }

28883

+}

28884

+

28885

+static void test ()

28886

+{

28887

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

28888

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

28889

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

28890

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

28891

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

28892

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

28893

+ vector pixel evp = {0,1,2,3,4,5,6,7};

28894

+ vector unsigned int evui = {0,1,2,3};

28895

+ vector signed int evsi = {-2,-1,0,1};

28896

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

28897

+ vector float evf = {0.0,1.0,2.0,3.0};

28898

+

28899

+ vector unsigned char vuc;

28900

+ vector signed char vsc;

28901

+ vector bool char vbc;

28902

+ vector unsigned short vus;

28903

+ vector signed short vss;

28904

+ vector bool short vbs;

28905

+ vector pixel vp;

28906

+ vector unsigned int vui;

28907

+ vector signed int vsi;

28908

+ vector bool int vbi;

28909

+ vector float vf;

28910

+

28911

+ init ();

28912

+

28913

+ vuc = vec_ldl (0, (vector unsigned char *)svuc);

28914

+ vsc = vec_ldl (0, (vector signed char *)svsc);

28915

+ vbc = vec_ldl (0, (vector bool char *)svbc);

28916

+ vus = vec_ldl (0, (vector unsigned short *)svus);

28917

+ vss = vec_ldl (0, (vector signed short *)svss);

28918

+ vbs = vec_ldl (0, (vector bool short *)svbs);

28919

+ vp = vec_ldl (0, (vector pixel *)svp);

28920

+ vui = vec_ldl (0, (vector unsigned int *)svui);

28921

+ vsi = vec_ldl (0, (vector signed int *)svsi);

28922

+ vbi = vec_ldl (0, (vector bool int *)svbi);

28923

+ vf = vec_ldl (0, (vector float *)svf);

28924

+

28925

+ check (vec_all_eq (vuc, evuc), "vuc");

28926

+ check (vec_all_eq (vsc, evsc), "vsc");

28927

+ check (vec_all_eq (vbc, evbc), "vbc");

28928

+ check (vec_all_eq (vus, evus), "vus");

28929

+ check (vec_all_eq (vss, evss), "vss");

28930

+ check (vec_all_eq (vbs, evbs), "vbs");

28931

+ check (vec_all_eq (vp, evp ), "vp" );

28932

+ check (vec_all_eq (vui, evui), "vui");

28933

+ check (vec_all_eq (vsi, evsi), "vsi");

28934

+ check (vec_all_eq (vbi, evbi), "vbi");

28935

+ check (vec_all_eq (vf, evf ), "vf" );

28936

+}

28937

Index: gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c

28938

===================================================================

28939

--- a/src/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c (.../tags/gcc_4_8_2_release)

28940

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c (.../branches/gcc-4_8-branch)

28941

@@ -0,0 +1,34 @@

28942

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

28943

+/* { dg-require-effective-target powerpc_vsx_ok } */

28944

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

28945

+

28946

+#include "harness.h"

28947

+

28948

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

28949

+static double svd[2] __attribute__ ((aligned (16)));

28950

+

28951

+static void check_arrays ()

28952

+{

28953

+ unsigned int i;

28954

+ for (i = 0; i < 2; ++i)

28955

+ {

28956

+ check (svul[i] == i, "svul");

28957

+ check (svd[i] == i * 1.0, "svd");

28958

+ }

28959

+}

28960

+

28961

+static void test ()

28962

+{

28963

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

28964

+ vector unsigned long long vul = {1,0};

28965

+ vector double vd = {1.0,0.0};

28966

+#else

28967

+ vector unsigned long long vul = {0,1};

28968

+ vector double vd = {0.0,1.0};

28969

+#endif

28970

+

28971

+ vec_stl (vul, 0, (vector unsigned long long *)svul);

28972

+ vec_stl (vd, 0, (vector double *)svd);

28973

+

28974

+ check_arrays ();

28975

+}

28976

Index: gcc/testsuite/gcc.dg/vmx/vsums.c

28977

===================================================================

28978

--- a/src/gcc/testsuite/gcc.dg/vmx/vsums.c (.../tags/gcc_4_8_2_release)

28979

+++ b/src/gcc/testsuite/gcc.dg/vmx/vsums.c (.../branches/gcc-4_8-branch)

28980

@@ -0,0 +1,12 @@

28981

+#include "harness.h"

28982

+

28983

+static void test()

28984

+{

28985

+ vector signed int va = {-7,11,-13,17};

28986

+ vector signed int vb = {0,0,0,128};

28987

+ vector signed int evd = {0,0,0,136};

28988

+

28989

+ vector signed int vd = vec_sums (va, vb);

28990

+

28991

+ check (vec_all_eq (vd, evd), "sums");

28992

+}

28993

Index: gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c

28994

===================================================================

28995

--- a/src/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c (.../tags/gcc_4_8_2_release)

28996

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c (.../branches/gcc-4_8-branch)

28997

@@ -0,0 +1,34 @@

28998

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

28999

+/* { dg-require-effective-target powerpc_vsx_ok } */

29000

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

29001

+

29002

+#include "harness.h"

29003

+

29004

+static int vec_long_long_eq (vector long long x, vector long long y)

29005

+{

29006

+ return (x[0] == y[0] && x[1] == y[1]);

29007

+}

29008

+

29009

+static int vec_dbl_eq (vector double x, vector double y)

29010

+{

29011

+ return (x[0] == y[0] && x[1] == y[1]);

29012

+}

29013

+

29014

+static void test()

29015

+{

29016

+ vector long long vl = {0, 1};

29017

+ vector double vd = {0.0, 1.0};

29018

+ vector long long vlr = vec_insert (2, vl, 0);

29019

+ vector double vdr = vec_insert (2.0, vd, 1);

29020

+

29021

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29022

+ vector long long vler = {0, 2};

29023

+ vector double vder = {2.0, 1.0};

29024

+#else

29025

+ vector long long vler = {2, 1};

29026

+ vector double vder = {0.0, 2.0};

29027

+#endif

29028

+

29029

+ check (vec_long_long_eq (vlr, vler), "vl");

29030

+ check (vec_dbl_eq (vdr, vder), "vd");

29031

+}

29032

Index: gcc/testsuite/gcc.dg/vmx/unpack.c

29033

===================================================================

29034

--- a/src/gcc/testsuite/gcc.dg/vmx/unpack.c (.../tags/gcc_4_8_2_release)

29035

+++ b/src/gcc/testsuite/gcc.dg/vmx/unpack.c (.../branches/gcc-4_8-branch)

29036

@@ -0,0 +1,67 @@

29037

+#include "harness.h"

29038

+

29039

+#define BIG 4294967295

29040

+

29041

+static void test()

29042

+{

29043

+ /* Input vectors. */

29044

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29045

+ vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

29046

+ vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3,

29047

+ (1<<15) + (4<<10) + (5<<5) + 6,

29048

+ (0<<15) + (7<<10) + (8<<5) + 9,

29049

+ (1<<15) + (10<<10) + (11<<5) + 12,

29050

+ (1<<15) + (13<<10) + (14<<5) + 15,

29051

+ (0<<15) + (16<<10) + (17<<5) + 18,

29052

+ (1<<15) + (19<<10) + (20<<5) + 21,

29053

+ (0<<15) + (22<<10) + (23<<5) + 24};

29054

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

29055

+ vector bool short vbs = {0,65535,65535,0,0,0,65535,0};

29056

+

29057

+ /* Result vectors. */

29058

+ vector signed short vsch, vscl;

29059

+ vector bool short vbsh, vbsl;

29060

+ vector unsigned int vuih, vuil;

29061

+ vector signed int vsih, vsil;

29062

+ vector bool int vbih, vbil;

29063

+

29064

+ /* Expected result vectors. */

29065

+ vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1};

29066

+ vector signed short vsclr = {0,1,2,3,4,5,6,7};

29067

+ vector bool short vbshr = {0,65535,65535,0,0,0,65535,0};

29068

+ vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535};

29069

+ vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3,

29070

+ (65535<<24) + (4<<16) + (5<<8) + 6,

29071

+ (0<<24) + (7<<16) + (8<<8) + 9,

29072

+ (65535<<24) + (10<<16) + (11<<8) + 12};

29073

+ vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15,

29074

+ (0<<24) + (16<<16) + (17<<8) + 18,

29075

+ (65535<<24) + (19<<16) + (20<<8) + 21,

29076

+ (0<<24) + (22<<16) + (23<<8) + 24};

29077

+ vector signed int vsihr = {-4,-3,-2,-1};

29078

+ vector signed int vsilr = {0,1,2,3};

29079

+ vector bool int vbihr = {0,BIG,BIG,0};

29080

+ vector bool int vbilr = {0,0,BIG,0};

29081

+

29082

+ vsch = vec_unpackh (vsc);

29083

+ vscl = vec_unpackl (vsc);

29084

+ vbsh = vec_unpackh (vbc);

29085

+ vbsl = vec_unpackl (vbc);

29086

+ vuih = vec_unpackh (vp);

29087

+ vuil = vec_unpackl (vp);

29088

+ vsih = vec_unpackh (vss);

29089

+ vsil = vec_unpackl (vss);

29090

+ vbih = vec_unpackh (vbs);

29091

+ vbil = vec_unpackl (vbs);

29092

+

29093

+ check (vec_all_eq (vsch, vschr), "vsch");

29094

+ check (vec_all_eq (vscl, vsclr), "vscl");

29095

+ check (vec_all_eq (vbsh, vbshr), "vbsh");

29096

+ check (vec_all_eq (vbsl, vbslr), "vbsl");

29097

+ check (vec_all_eq (vuih, vuihr), "vuih");

29098

+ check (vec_all_eq (vuil, vuilr), "vuil");

29099

+ check (vec_all_eq (vsih, vsihr), "vsih");

29100

+ check (vec_all_eq (vsil, vsilr), "vsil");

29101

+ check (vec_all_eq (vbih, vbihr), "vbih");

29102

+ check (vec_all_eq (vbil, vbilr), "vbil");

29103

+}

29104

Index: gcc/testsuite/gcc.dg/vmx/splat.c

29105

===================================================================

29106

--- a/src/gcc/testsuite/gcc.dg/vmx/splat.c (.../tags/gcc_4_8_2_release)

29107

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat.c (.../branches/gcc-4_8-branch)

29108

@@ -0,0 +1,47 @@

29109

+#include "harness.h"

29110

+

29111

+static void test()

29112

+{

29113

+ /* Input vectors. */

29114

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29115

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29116

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

29117

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

29118

+ vector unsigned int vui = {0,1,2,3};

29119

+ vector signed int vsi = {-2,-1,0,1};

29120

+ vector float vf = {-2.0,-1.0,0.0,1.0};

29121

+

29122

+ /* Result vectors. */

29123

+ vector unsigned char vucr;

29124

+ vector signed char vscr;

29125

+ vector unsigned short vusr;

29126

+ vector signed short vssr;

29127

+ vector unsigned int vuir;

29128

+ vector signed int vsir;

29129

+ vector float vfr;

29130

+

29131

+ /* Expected result vectors. */

29132

+ vector unsigned char vucer = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};

29133

+ vector signed char vscer = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

29134

+ vector unsigned short vuser = {7,7,7,7,7,7,7,7};

29135

+ vector signed short vsser = {-4,-4,-4,-4,-4,-4,-4,-4};

29136

+ vector unsigned int vuier = {2,2,2,2};

29137

+ vector signed int vsier = {1,1,1,1};

29138

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

29139

+

29140

+ vucr = vec_splat (vuc, 1);

29141

+ vscr = vec_splat (vsc, 8);

29142

+ vusr = vec_splat (vus, 7);

29143

+ vssr = vec_splat (vss, 0);

29144

+ vuir = vec_splat (vui, 2);

29145

+ vsir = vec_splat (vsi, 3);

29146

+ vfr = vec_splat (vf, 1);

29147

+

29148

+ check (vec_all_eq (vucr, vucer), "vuc");

29149

+ check (vec_all_eq (vscr, vscer), "vsc");

29150

+ check (vec_all_eq (vusr, vuser), "vus");

29151

+ check (vec_all_eq (vssr, vsser), "vss");

29152

+ check (vec_all_eq (vuir, vuier), "vui");

29153

+ check (vec_all_eq (vsir, vsier), "vsi");

29154

+ check (vec_all_eq (vfr, vfer ), "vf");

29155

+}

29156

Index: gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c

29157

===================================================================

29158

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c (.../tags/gcc_4_8_2_release)

29159

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c (.../branches/gcc-4_8-branch)

29160

@@ -0,0 +1,44 @@

29161

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29162

+/* { dg-require-effective-target powerpc_vsx_ok } */

29163

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

29164

+

29165

+#include "harness.h"

29166

+

29167

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

29168

+static double svd[2] __attribute__ ((aligned (16)));

29169

+

29170

+static void init ()

29171

+{

29172

+ unsigned int i;

29173

+ for (i = 0; i < 2; ++i)

29174

+ {

29175

+ svul[i] = i;

29176

+ svd[i] = i * 1.0;

29177

+ }

29178

+}

29179

+

29180

+static void test ()

29181

+{

29182

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29183

+ vector unsigned long long evul = {1,0};

29184

+ vector double evd = {1.0,0.0};

29185

+#else

29186

+ vector unsigned long long evul = {0,1};

29187

+ vector double evd = {0.0,1.0};

29188

+#endif

29189

+

29190

+ vector unsigned long long vul;

29191

+ vector double vd;

29192

+ unsigned i;

29193

+

29194

+ init ();

29195

+

29196

+ vul = vec_ldl (0, (vector unsigned long long *)svul);

29197

+ vd = vec_ldl (0, (vector double *)svd);

29198

+

29199

+ for (i = 0; i < 2; ++i)

29200

+ {

29201

+ check (vul[i] == evul[i], "vul");

29202

+ check (vd[i] == evd[i], "vd" );

29203

+ }

29204

+}

29205

Index: gcc/testsuite/gcc.dg/vmx/merge-be-order.c

29206

===================================================================

29207

--- a/src/gcc/testsuite/gcc.dg/vmx/merge-be-order.c (.../tags/gcc_4_8_2_release)

29208

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge-be-order.c (.../branches/gcc-4_8-branch)

29209

@@ -0,0 +1,96 @@

29210

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

29211

+

29212

+#include "harness.h"

29213

+

29214

+static void test()

29215

+{

29216

+ /* Input vectors. */

29217

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29218

+ vector unsigned char vucb

29219

+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

29220

+ vector signed char vsca

29221

+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

29222

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29223

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

29224

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

29225

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

29226

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

29227

+ vector unsigned int vuia = {0,1,2,3};

29228

+ vector unsigned int vuib = {4,5,6,7};

29229

+ vector signed int vsia = {-4,-3,-2,-1};

29230

+ vector signed int vsib = {0,1,2,3};

29231

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

29232

+ vector float vfb = {0.0,1.0,2.0,3.0};

29233

+

29234

+ /* Result vectors. */

29235

+ vector unsigned char vuch, vucl;

29236

+ vector signed char vsch, vscl;

29237

+ vector unsigned short vush, vusl;

29238

+ vector signed short vssh, vssl;

29239

+ vector unsigned int vuih, vuil;

29240

+ vector signed int vsih, vsil;

29241

+ vector float vfh, vfl;

29242

+

29243

+ /* Expected result vectors. */

29244

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29245

+ vector unsigned char vucrh = {24,8,25,9,26,10,27,11,28,12,29,13,30,14,31,15};

29246

+ vector unsigned char vucrl = {16,0,17,1,18,2,19,3,20,4,21,5,22,6,23,7};

29247

+ vector signed char vscrh = {8,-8,9,-7,10,-6,11,-5,12,-4,13,-3,14,-2,15,-1};

29248

+ vector signed char vscrl = {0,-16,1,-15,2,-14,3,-13,4,-12,5,-11,6,-10,7,-9};

29249

+ vector unsigned short vusrh = {12,4,13,5,14,6,15,7};

29250

+ vector unsigned short vusrl = {8,0,9,1,10,2,11,3};

29251

+ vector signed short vssrh = {4,-4,5,-3,6,-2,7,-1};

29252

+ vector signed short vssrl = {0,-8,1,-7,2,-6,3,-5};

29253

+ vector unsigned int vuirh = {6,2,7,3};

29254

+ vector unsigned int vuirl = {4,0,5,1};

29255

+ vector signed int vsirh = {2,-2,3,-1};

29256

+ vector signed int vsirl = {0,-4,1,-3};

29257

+ vector float vfrh = {2.0,-2.0,3.0,-1.0};

29258

+ vector float vfrl = {0.0,-4.0,1.0,-3.0};

29259

+#else

29260

+ vector unsigned char vucrh = {0,16,1,17,2,18,3,19,4,20,5,21,6,22,7,23};

29261

+ vector unsigned char vucrl = {8,24,9,25,10,26,11,27,12,28,13,29,14,30,15,31};

29262

+ vector signed char vscrh = {-16,0,-15,1,-14,2,-13,3,-12,4,-11,5,-10,6,-9,7};

29263

+ vector signed char vscrl = {-8,8,-7,9,-6,10,-5,11,-4,12,-3,13,-2,14,-1,15};

29264

+ vector unsigned short vusrh = {0,8,1,9,2,10,3,11};

29265

+ vector unsigned short vusrl = {4,12,5,13,6,14,7,15};

29266

+ vector signed short vssrh = {-8,0,-7,1,-6,2,-5,3};

29267

+ vector signed short vssrl = {-4,4,-3,5,-2,6,-1,7};

29268

+ vector unsigned int vuirh = {0,4,1,5};

29269

+ vector unsigned int vuirl = {2,6,3,7};

29270

+ vector signed int vsirh = {-4,0,-3,1};

29271

+ vector signed int vsirl = {-2,2,-1,3};

29272

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

29273

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

29274

+#endif

29275

+

29276

+ vuch = vec_mergeh (vuca, vucb);

29277

+ vucl = vec_mergel (vuca, vucb);

29278

+ vsch = vec_mergeh (vsca, vscb);

29279

+ vscl = vec_mergel (vsca, vscb);

29280

+ vush = vec_mergeh (vusa, vusb);

29281

+ vusl = vec_mergel (vusa, vusb);

29282

+ vssh = vec_mergeh (vssa, vssb);

29283

+ vssl = vec_mergel (vssa, vssb);

29284

+ vuih = vec_mergeh (vuia, vuib);

29285

+ vuil = vec_mergel (vuia, vuib);

29286

+ vsih = vec_mergeh (vsia, vsib);

29287

+ vsil = vec_mergel (vsia, vsib);

29288

+ vfh = vec_mergeh (vfa, vfb );

29289

+ vfl = vec_mergel (vfa, vfb );

29290

+

29291

+ check (vec_all_eq (vuch, vucrh), "vuch");

29292

+ check (vec_all_eq (vucl, vucrl), "vucl");

29293

+ check (vec_all_eq (vsch, vscrh), "vsch");

29294

+ check (vec_all_eq (vscl, vscrl), "vscl");

29295

+ check (vec_all_eq (vush, vusrh), "vush");

29296

+ check (vec_all_eq (vusl, vusrl), "vusl");

29297

+ check (vec_all_eq (vssh, vssrh), "vssh");

29298

+ check (vec_all_eq (vssl, vssrl), "vssl");

29299

+ check (vec_all_eq (vuih, vuirh), "vuih");

29300

+ check (vec_all_eq (vuil, vuirl), "vuil");

29301

+ check (vec_all_eq (vsih, vsirh), "vsih");

29302

+ check (vec_all_eq (vsil, vsirl), "vsil");

29303

+ check (vec_all_eq (vfh, vfrh), "vfh");

29304

+ check (vec_all_eq (vfl, vfrl), "vfl");

29305

+}

29306

Index: gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c

29307

===================================================================

29308

--- a/src/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c (.../tags/gcc_4_8_2_release)

29309

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c (.../branches/gcc-4_8-branch)

29310

@@ -0,0 +1,37 @@

29311

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29312

+/* { dg-require-effective-target powerpc_vsx_ok } */

29313

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

29314

+

29315

+#include "harness.h"

29316

+

29317

+static void test()

29318

+{

29319

+ /* Input vectors. */

29320

+ vector unsigned int vui = {0,1,2,3};

29321

+ vector signed int vsi = {-2,-1,0,1};

29322

+ vector float vf = {-2.0,-1.0,0.0,1.0};

29323

+

29324

+ /* Result vectors. */

29325

+ vector unsigned int vuir;

29326

+ vector signed int vsir;

29327

+ vector float vfr;

29328

+

29329

+ /* Expected result vectors. */

29330

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29331

+ vector unsigned int vuier = {1,1,1,1};

29332

+ vector signed int vsier = {-2,-2,-2,-2};

29333

+ vector float vfer = {0.0,0.0,0.0,0.0};

29334

+#else

29335

+ vector unsigned int vuier = {2,2,2,2};

29336

+ vector signed int vsier = {1,1,1,1};

29337

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

29338

+#endif

29339

+

29340

+ vuir = vec_splat (vui, 2);

29341

+ vsir = vec_splat (vsi, 3);

29342

+ vfr = vec_splat (vf, 1);

29343

+

29344

+ check (vec_all_eq (vuir, vuier), "vui");

29345

+ check (vec_all_eq (vsir, vsier), "vsi");

29346

+ check (vec_all_eq (vfr, vfer ), "vf");

29347

+}

29348

Index: gcc/testsuite/gcc.dg/vmx/merge.c

29349

===================================================================

29350

--- a/src/gcc/testsuite/gcc.dg/vmx/merge.c (.../tags/gcc_4_8_2_release)

29351

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge.c (.../branches/gcc-4_8-branch)

29352

@@ -0,0 +1,77 @@

29353

+#include "harness.h"

29354

+

29355

+static void test()

29356

+{

29357

+ /* Input vectors. */

29358

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29359

+ vector unsigned char vucb

29360

+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

29361

+ vector signed char vsca

29362

+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

29363

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29364

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

29365

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

29366

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

29367

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

29368

+ vector unsigned int vuia = {0,1,2,3};

29369

+ vector unsigned int vuib = {4,5,6,7};

29370

+ vector signed int vsia = {-4,-3,-2,-1};

29371

+ vector signed int vsib = {0,1,2,3};

29372

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

29373

+ vector float vfb = {0.0,1.0,2.0,3.0};

29374

+

29375

+ /* Result vectors. */

29376

+ vector unsigned char vuch, vucl;

29377

+ vector signed char vsch, vscl;

29378

+ vector unsigned short vush, vusl;

29379

+ vector signed short vssh, vssl;

29380

+ vector unsigned int vuih, vuil;

29381

+ vector signed int vsih, vsil;

29382

+ vector float vfh, vfl;

29383

+

29384

+ /* Expected result vectors. */

29385

+ vector unsigned char vucrh = {0,16,1,17,2,18,3,19,4,20,5,21,6,22,7,23};

29386

+ vector unsigned char vucrl = {8,24,9,25,10,26,11,27,12,28,13,29,14,30,15,31};

29387

+ vector signed char vscrh = {-16,0,-15,1,-14,2,-13,3,-12,4,-11,5,-10,6,-9,7};

29388

+ vector signed char vscrl = {-8,8,-7,9,-6,10,-5,11,-4,12,-3,13,-2,14,-1,15};

29389

+ vector unsigned short vusrh = {0,8,1,9,2,10,3,11};

29390

+ vector unsigned short vusrl = {4,12,5,13,6,14,7,15};

29391

+ vector signed short vssrh = {-8,0,-7,1,-6,2,-5,3};

29392

+ vector signed short vssrl = {-4,4,-3,5,-2,6,-1,7};

29393

+ vector unsigned int vuirh = {0,4,1,5};

29394

+ vector unsigned int vuirl = {2,6,3,7};

29395

+ vector signed int vsirh = {-4,0,-3,1};

29396

+ vector signed int vsirl = {-2,2,-1,3};

29397

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

29398

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

29399

+

29400

+ vuch = vec_mergeh (vuca, vucb);

29401

+ vucl = vec_mergel (vuca, vucb);

29402

+ vsch = vec_mergeh (vsca, vscb);

29403

+ vscl = vec_mergel (vsca, vscb);

29404

+ vush = vec_mergeh (vusa, vusb);

29405

+ vusl = vec_mergel (vusa, vusb);

29406

+ vssh = vec_mergeh (vssa, vssb);

29407

+ vssl = vec_mergel (vssa, vssb);

29408

+ vuih = vec_mergeh (vuia, vuib);

29409

+ vuil = vec_mergel (vuia, vuib);

29410

+ vsih = vec_mergeh (vsia, vsib);

29411

+ vsil = vec_mergel (vsia, vsib);

29412

+ vfh = vec_mergeh (vfa, vfb );

29413

+ vfl = vec_mergel (vfa, vfb );

29414

+

29415

+ check (vec_all_eq (vuch, vucrh), "vuch");

29416

+ check (vec_all_eq (vucl, vucrl), "vucl");

29417

+ check (vec_all_eq (vsch, vscrh), "vsch");

29418

+ check (vec_all_eq (vscl, vscrl), "vscl");

29419

+ check (vec_all_eq (vush, vusrh), "vush");

29420

+ check (vec_all_eq (vusl, vusrl), "vusl");

29421

+ check (vec_all_eq (vssh, vssrh), "vssh");

29422

+ check (vec_all_eq (vssl, vssrl), "vssl");

29423

+ check (vec_all_eq (vuih, vuirh), "vuih");

29424

+ check (vec_all_eq (vuil, vuirl), "vuil");

29425

+ check (vec_all_eq (vsih, vsirh), "vsih");

29426

+ check (vec_all_eq (vsil, vsirl), "vsil");

29427

+ check (vec_all_eq (vfh, vfrh), "vfh");

29428

+ check (vec_all_eq (vfl, vfrl), "vfl");

29429

+}

29430

Index: gcc/testsuite/gcc.dg/vmx/vec-set.c

29431

===================================================================

29432

--- a/src/gcc/testsuite/gcc.dg/vmx/vec-set.c (.../tags/gcc_4_8_2_release)

29433

+++ b/src/gcc/testsuite/gcc.dg/vmx/vec-set.c (.../branches/gcc-4_8-branch)

29434

@@ -0,0 +1,14 @@

29435

+#include "harness.h"

29436

+

29437

+vector short

29438

+vec_set (short m)

29439

+{

29440

+ return (vector short){m, 0, 0, 0, 0, 0, 0, 0};

29441

+}

29442

+

29443

+static void test()

29444

+{

29445

+ check (vec_all_eq (vec_set (7),

29446

+ ((vector short){7, 0, 0, 0, 0, 0, 0, 0})),

29447

+ "vec_set");

29448

+}

29449

Index: gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c

29450

===================================================================

29451

--- a/src/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c (.../tags/gcc_4_8_2_release)

29452

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c (.../branches/gcc-4_8-branch)

29453

@@ -0,0 +1,44 @@

29454

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29455

+/* { dg-require-effective-target powerpc_vsx_ok } */

29456

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

29457

+

29458

+#include "harness.h"

29459

+

29460

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

29461

+static double svd[2] __attribute__ ((aligned (16)));

29462

+

29463

+static void init ()

29464

+{

29465

+ unsigned int i;

29466

+ for (i = 0; i < 2; ++i)

29467

+ {

29468

+ svul[i] = i;

29469

+ svd[i] = i * 1.0;

29470

+ }

29471

+}

29472

+

29473

+static void test ()

29474

+{

29475

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29476

+ vector unsigned long long evul = {1,0};

29477

+ vector double evd = {1.0,0.0};

29478

+#else

29479

+ vector unsigned long long evul = {0,1};

29480

+ vector double evd = {0.0,1.0};

29481

+#endif

29482

+

29483

+ vector unsigned long long vul;

29484

+ vector double vd;

29485

+ unsigned i;

29486

+

29487

+ init ();

29488

+

29489

+ vul = vec_ld (0, (vector unsigned long long *)svul);

29490

+ vd = vec_ld (0, (vector double *)svd);

29491

+

29492

+ for (i = 0; i < 2; ++i)

29493

+ {

29494

+ check (vul[i] == evul[i], "vul");

29495

+ check (vd[i] == evd[i], "vd" );

29496

+ }

29497

+}

29498

Index: gcc/testsuite/gcc.dg/vmx/extract.c

29499

===================================================================

29500

--- a/src/gcc/testsuite/gcc.dg/vmx/extract.c (.../tags/gcc_4_8_2_release)

29501

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract.c (.../branches/gcc-4_8-branch)

29502

@@ -0,0 +1,21 @@

29503

+#include "harness.h"

29504

+

29505

+static void test()

29506

+{

29507

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29508

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29509

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

29510

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

29511

+ vector unsigned int ve = {0,1,2,3};

29512

+ vector signed int vf = {-2,-1,0,1};

29513

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

29514

+

29515

+ check (vec_extract (va, 5) == 5, "vec_extract (va, 5)");

29516

+ check (vec_extract (vb, 0) == -8, "vec_extract (vb, 0)");

29517

+ check (vec_extract (vc, 7) == 7, "vec_extract (vc, 7)");

29518

+ check (vec_extract (vd, 3) == -1, "vec_extract (vd, 3)");

29519

+ check (vec_extract (ve, 2) == 2, "vec_extract (ve, 2)");

29520

+ check (vec_extract (vf, 1) == -1, "vec_extract (vf, 1)");

29521

+ check (vec_extract (vg, 0) == -2.0f, "vec_extract (vg, 0)");

29522

+}

29523

+

29524

Index: gcc/testsuite/gcc.dg/vmx/pack-be-order.c

29525

===================================================================

29526

--- a/src/gcc/testsuite/gcc.dg/vmx/pack-be-order.c (.../tags/gcc_4_8_2_release)

29527

+++ b/src/gcc/testsuite/gcc.dg/vmx/pack-be-order.c (.../branches/gcc-4_8-branch)

29528

@@ -0,0 +1,136 @@

29529

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

29530

+

29531

+#include "harness.h"

29532

+

29533

+#define BIG 4294967295

29534

+

29535

+static void test()

29536

+{

29537

+ /* Input vectors. */

29538

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

29539

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

29540

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

29541

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

29542

+ vector bool short vbsa = {0,65535,65535,0,0,0,65535,0};

29543

+ vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535};

29544

+ vector unsigned int vuia = {0,1,2,3};

29545

+ vector unsigned int vuib = {4,5,6,7};

29546

+ vector signed int vsia = {-4,-3,-2,-1};

29547

+ vector signed int vsib = {0,1,2,3};

29548

+ vector bool int vbia = {0,BIG,BIG,BIG};

29549

+ vector bool int vbib = {BIG,0,0,0};

29550

+ vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3),

29551

+ (1<<24) + (5<<19) + (6<<11) + (7<<3),

29552

+ (0<<24) + (8<<19) + (9<<11) + (10<<3),

29553

+ (1<<24) + (11<<19) + (12<<11) + (13<<3)};

29554

+ vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3),

29555

+ (0<<24) + (17<<19) + (18<<11) + (19<<3),

29556

+ (1<<24) + (20<<19) + (21<<11) + (22<<3),

29557

+ (0<<24) + (23<<19) + (24<<11) + (25<<3)};

29558

+ vector unsigned short vusc = {0,256,1,257,2,258,3,259};

29559

+ vector unsigned short vusd = {4,260,5,261,6,262,7,263};

29560

+ vector signed short vssc = {-1,-128,0,127,-2,-129,1,128};

29561

+ vector signed short vssd = {-3,-130,2,129,-4,-131,3,130};

29562

+ vector unsigned int vuic = {0,65536,1,65537};

29563

+ vector unsigned int vuid = {2,65538,3,65539};

29564

+ vector signed int vsic = {-1,-32768,0,32767};

29565

+ vector signed int vsid = {-2,-32769,1,32768};

29566

+

29567

+ /* Result vectors. */

29568

+ vector unsigned char vucr;

29569

+ vector signed char vscr;

29570

+ vector bool char vbcr;

29571

+ vector unsigned short vusr;

29572

+ vector signed short vssr;

29573

+ vector bool short vbsr;

29574

+ vector pixel vpr;

29575

+ vector unsigned char vucsr;

29576

+ vector signed char vscsr;

29577

+ vector unsigned short vussr;

29578

+ vector signed short vsssr;

29579

+ vector unsigned char vucsur1, vucsur2;

29580

+ vector unsigned short vussur1, vussur2;

29581

+

29582

+ /* Expected result vectors. */

29583

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29584

+ vector unsigned char vucer = {8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7};

29585

+ vector signed char vscer = {0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1};

29586

+ vector bool char vbcer = {255,0,0,255,255,255,0,255,0,255,255,0,0,0,255,0};

29587

+ vector unsigned short vuser = {4,5,6,7,0,1,2,3};

29588

+ vector signed short vsser = {0,1,2,3,-4,-3,-2,-1};

29589

+ vector bool short vbser = {65535,0,0,0,0,65535,65535,65535};

29590

+ vector pixel vper = {(1<<15) + (14<<10) + (15<<5) + 16,

29591

+ (0<<15) + (17<<10) + (18<<5) + 19,

29592

+ (1<<15) + (20<<10) + (21<<5) + 22,

29593

+ (0<<15) + (23<<10) + (24<<5) + 25,

29594

+ (0<<15) + (2<<10) + (3<<5) + 4,

29595

+ (1<<15) + (5<<10) + (6<<5) + 7,

29596

+ (0<<15) + (8<<10) + (9<<5) + 10,

29597

+ (1<<15) + (11<<10) + (12<<5) + 13};

29598

+ vector unsigned char vucser = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255};

29599

+ vector signed char vscser = {-3,-128,2,127,-4,-128,3,127,

29600

+ -1,-128,0,127,-2,-128,1,127};

29601

+ vector unsigned short vusser = {2,65535,3,65535,0,65535,1,65535};

29602

+ vector signed short vssser = {-2,-32768,1,32767,-1,-32768,0,32767};

29603

+ vector unsigned char vucsuer1 = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255};

29604

+ vector unsigned char vucsuer2 = {0,0,2,129,0,0,3,130,0,0,0,127,0,0,1,128};

29605

+ vector unsigned short vussuer1 = {2,65535,3,65535,0,65535,1,65535};

29606

+ vector unsigned short vussuer2 = {0,0,1,32768,0,0,0,32767};

29607

+#else

29608

+ vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29609

+ vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29610

+ vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

29611

+ vector unsigned short vuser = {0,1,2,3,4,5,6,7};

29612

+ vector signed short vsser = {-4,-3,-2,-1,0,1,2,3};

29613

+ vector bool short vbser = {0,65535,65535,65535,65535,0,0,0};

29614

+ vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4,

29615

+ (1<<15) + (5<<10) + (6<<5) + 7,

29616

+ (0<<15) + (8<<10) + (9<<5) + 10,

29617

+ (1<<15) + (11<<10) + (12<<5) + 13,

29618

+ (1<<15) + (14<<10) + (15<<5) + 16,

29619

+ (0<<15) + (17<<10) + (18<<5) + 19,

29620

+ (1<<15) + (20<<10) + (21<<5) + 22,

29621

+ (0<<15) + (23<<10) + (24<<5) + 25};

29622

+ vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

29623

+ vector signed char vscser = {-1,-128,0,127,-2,-128,1,127,

29624

+ -3,-128,2,127,-4,-128,3,127};

29625

+ vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535};

29626

+ vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767};

29627

+ vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

29628

+ vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130};

29629

+ vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535};

29630

+ vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768};

29631

+#endif

29632

+

29633

+ vucr = vec_pack (vusa, vusb);

29634

+ vscr = vec_pack (vssa, vssb);

29635

+ vbcr = vec_pack (vbsa, vbsb);

29636

+ vusr = vec_pack (vuia, vuib);

29637

+ vssr = vec_pack (vsia, vsib);

29638

+ vbsr = vec_pack (vbia, vbib);

29639

+ vpr = vec_packpx (vipa, vipb);

29640

+ vucsr = vec_packs (vusc, vusd);

29641

+ vscsr = vec_packs (vssc, vssd);

29642

+ vussr = vec_packs (vuic, vuid);

29643

+ vsssr = vec_packs (vsic, vsid);

29644

+ vucsur1 = vec_packsu (vusc, vusd);

29645

+ vucsur2 = vec_packsu (vssc, vssd);

29646

+ vussur1 = vec_packsu (vuic, vuid);

29647

+ vussur2 = vec_packsu (vsic, vsid);

29648

+

29649

+ check (vec_all_eq (vucr, vucer), "vucr");

29650

+ check (vec_all_eq (vscr, vscer), "vscr");

29651

+ check (vec_all_eq (vbcr, vbcer), "vbcr");

29652

+ check (vec_all_eq (vusr, vuser), "vusr");

29653

+ check (vec_all_eq (vssr, vsser), "vssr");

29654

+ check (vec_all_eq (vbsr, vbser), "vbsr");

29655

+ check (vec_all_eq (vpr, vper ), "vpr" );

29656

+ check (vec_all_eq (vucsr, vucser), "vucsr");

29657

+ check (vec_all_eq (vscsr, vscser), "vscsr");

29658

+ check (vec_all_eq (vussr, vusser), "vussr");

29659

+ check (vec_all_eq (vsssr, vssser), "vsssr");

29660

+ check (vec_all_eq (vucsur1, vucsuer1), "vucsur1");

29661

+ check (vec_all_eq (vucsur2, vucsuer2), "vucsur2");

29662

+ check (vec_all_eq (vussur1, vussuer1), "vussur1");

29663

+ check (vec_all_eq (vussur2, vussuer2), "vussur2");

29664

+}

29665

Index: gcc/testsuite/gcc.dg/vmx/st-be-order.c

29666

===================================================================

29667

--- a/src/gcc/testsuite/gcc.dg/vmx/st-be-order.c (.../tags/gcc_4_8_2_release)

29668

+++ b/src/gcc/testsuite/gcc.dg/vmx/st-be-order.c (.../branches/gcc-4_8-branch)

29669

@@ -0,0 +1,83 @@

29670

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

29671

+

29672

+#include "harness.h"

29673

+

29674

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

29675

+static signed char svsc[16] __attribute__ ((aligned (16)));

29676

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

29677

+static unsigned short svus[8] __attribute__ ((aligned (16)));

29678

+static signed short svss[8] __attribute__ ((aligned (16)));

29679

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

29680

+static unsigned short svp[8] __attribute__ ((aligned (16)));

29681

+static unsigned int svui[4] __attribute__ ((aligned (16)));

29682

+static signed int svsi[4] __attribute__ ((aligned (16)));

29683

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

29684

+static float svf[4] __attribute__ ((aligned (16)));

29685

+

29686

+static void check_arrays ()

29687

+{

29688

+ unsigned int i;

29689

+ for (i = 0; i < 16; ++i)

29690

+ {

29691

+ check (svuc[i] == i, "svuc");

29692

+ check (svsc[i] == i - 8, "svsc");

29693

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

29694

+ }

29695

+ for (i = 0; i < 8; ++i)

29696

+ {

29697

+ check (svus[i] == i, "svus");

29698

+ check (svss[i] == i - 4, "svss");

29699

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

29700

+ check (svp[i] == i, "svp");

29701

+ }

29702

+ for (i = 0; i < 4; ++i)

29703

+ {

29704

+ check (svui[i] == i, "svui");

29705

+ check (svsi[i] == i - 2, "svsi");

29706

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

29707

+ check (svf[i] == i * 1.0f, "svf");

29708

+ }

29709

+}

29710

+

29711

+static void test ()

29712

+{

29713

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29714

+ vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

29715

+ vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

29716

+ vector bool char vbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

29717

+ vector unsigned short vus = {7,6,5,4,3,2,1,0};

29718

+ vector signed short vss = {3,2,1,0,-1,-2,-3,-4};

29719

+ vector bool short vbs = {65535,0,65535,0,65535,0,65535,0};

29720

+ vector pixel vp = {7,6,5,4,3,2,1,0};

29721

+ vector unsigned int vui = {3,2,1,0};

29722

+ vector signed int vsi = {1,0,-1,-2};

29723

+ vector bool int vbi = {0xffffffff,0,0xffffffff,0};

29724

+ vector float vf = {3.0,2.0,1.0,0.0};

29725

+#else

29726

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29727

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29728

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

29729

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

29730

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

29731

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

29732

+ vector pixel vp = {0,1,2,3,4,5,6,7};

29733

+ vector unsigned int vui = {0,1,2,3};

29734

+ vector signed int vsi = {-2,-1,0,1};

29735

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

29736

+ vector float vf = {0.0,1.0,2.0,3.0};

29737

+#endif

29738

+

29739

+ vec_st (vuc, 0, (vector unsigned char *)svuc);

29740

+ vec_st (vsc, 0, (vector signed char *)svsc);

29741

+ vec_st (vbc, 0, (vector bool char *)svbc);

29742

+ vec_st (vus, 0, (vector unsigned short *)svus);

29743

+ vec_st (vss, 0, (vector signed short *)svss);

29744

+ vec_st (vbs, 0, (vector bool short *)svbs);

29745

+ vec_st (vp, 0, (vector pixel *)svp);

29746

+ vec_st (vui, 0, (vector unsigned int *)svui);

29747

+ vec_st (vsi, 0, (vector signed int *)svsi);

29748

+ vec_st (vbi, 0, (vector bool int *)svbi);

29749

+ vec_st (vf, 0, (vector float *)svf);

29750

+

29751

+ check_arrays ();

29752

+}

29753

Index: gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c

29754

===================================================================

29755

--- a/src/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c (.../tags/gcc_4_8_2_release)

29756

+++ b/src/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c (.../branches/gcc-4_8-branch)

29757

@@ -13,6 +13,20 @@

29758

#define DO_INLINE __attribute__ ((always_inline))

29759

#define DONT_INLINE __attribute__ ((noinline))

29760

29761

+#ifdef __LITTLE_ENDIAN__

29762

+static inline DO_INLINE int inline_me(vector signed short data)

29763

+{

29764

+ union {vector signed short v; signed short s[8];} u;

29765

+ signed short x;

29766

+ unsigned char x1, x2;

29767

+

29768

+ u.v = data;

29769

+ x = u.s[7];

29770

+ x1 = (x >> 8) & 0xff;

29771

+ x2 = x & 0xff;

29772

+ return ((x2 << 8) | x1);

29773

+}

29774

+#else

29775

static inline DO_INLINE int inline_me(vector signed short data)

29776

{

29777

union {vector signed short v; signed short s[8];} u;

29778

@@ -19,6 +33,7 @@

29779

u.v = data;

29780

return u.s[7];

29781

}

29782

+#endif

29783

29784

static DONT_INLINE int foo(vector signed short data)

29785

{

29786

Index: gcc/testsuite/gcc.dg/vmx/eg-5.c

29787

===================================================================

29788

--- a/src/gcc/testsuite/gcc.dg/vmx/eg-5.c (.../tags/gcc_4_8_2_release)

29789

+++ b/src/gcc/testsuite/gcc.dg/vmx/eg-5.c (.../branches/gcc-4_8-branch)

29790

@@ -6,12 +6,10 @@

29791

{

29792

/* Set result to a vector of f32 0's */

29793

vector float result = ((vector float){0.,0.,0.,0.});

29794

-

29795

result = vec_madd (c0, vec_splat (v, 0), result);

29796

result = vec_madd (c1, vec_splat (v, 1), result);

29797

result = vec_madd (c2, vec_splat (v, 2), result);

29798

result = vec_madd (c3, vec_splat (v, 3), result);

29799

-

29800

return result;

29801

}

29802

29803

Index: gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c

29804

===================================================================

29805

--- a/src/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c (.../tags/gcc_4_8_2_release)

29806

+++ b/src/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c (.../branches/gcc-4_8-branch)

29807

@@ -0,0 +1,34 @@

29808

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

29809

+/* { dg-require-effective-target powerpc_vsx_ok } */

29810

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

29811

+

29812

+#include "harness.h"

29813

+

29814

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

29815

+static double svd[2] __attribute__ ((aligned (16)));

29816

+

29817

+static void check_arrays ()

29818

+{

29819

+ unsigned int i;

29820

+ for (i = 0; i < 2; ++i)

29821

+ {

29822

+ check (svul[i] == i, "svul");

29823

+ check (svd[i] == i * 1.0, "svd");

29824

+ }

29825

+}

29826

+

29827

+static void test ()

29828

+{

29829

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

29830

+ vector unsigned long long vul = {1,0};

29831

+ vector double vd = {1.0,0.0};

29832

+#else

29833

+ vector unsigned long long vul = {0,1};

29834

+ vector double vd = {0.0,1.0};

29835

+#endif

29836

+

29837

+ vec_st (vul, 0, (vector unsigned long long *)svul);

29838

+ vec_st (vd, 0, (vector double *)svd);

29839

+

29840

+ check_arrays ();

29841

+}

29842

Index: gcc/testsuite/gcc.dg/vmx/lde.c

29843

===================================================================

29844

--- a/src/gcc/testsuite/gcc.dg/vmx/lde.c (.../tags/gcc_4_8_2_release)

29845

+++ b/src/gcc/testsuite/gcc.dg/vmx/lde.c (.../branches/gcc-4_8-branch)

29846

@@ -0,0 +1,59 @@

29847

+#include "harness.h"

29848

+

29849

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

29850

+static signed char svsc[16] __attribute__ ((aligned (16)));

29851

+static unsigned short svus[8] __attribute__ ((aligned (16)));

29852

+static signed short svss[8] __attribute__ ((aligned (16)));

29853

+static unsigned int svui[4] __attribute__ ((aligned (16)));

29854

+static signed int svsi[4] __attribute__ ((aligned (16)));

29855

+static float svf[4] __attribute__ ((aligned (16)));

29856

+

29857

+static void init ()

29858

+{

29859

+ unsigned int i;

29860

+ for (i = 0; i < 16; ++i)

29861

+ {

29862

+ svuc[i] = i;

29863

+ svsc[i] = i - 8;

29864

+ }

29865

+ for (i = 0; i < 8; ++i)

29866

+ {

29867

+ svus[i] = i;

29868

+ svss[i] = i - 4;

29869

+ }

29870

+ for (i = 0; i < 4; ++i)

29871

+ {

29872

+ svui[i] = i;

29873

+ svsi[i] = i - 2;

29874

+ svf[i] = i * 1.0f;

29875

+ }

29876

+}

29877

+

29878

+static void test ()

29879

+{

29880

+ vector unsigned char vuc;

29881

+ vector signed char vsc;

29882

+ vector unsigned short vus;

29883

+ vector signed short vss;

29884

+ vector unsigned int vui;

29885

+ vector signed int vsi;

29886

+ vector float vf;

29887

+

29888

+ init ();

29889

+

29890

+ vuc = vec_lde (9*1, (unsigned char *)svuc);

29891

+ vsc = vec_lde (14*1, (signed char *)svsc);

29892

+ vus = vec_lde (7*2, (unsigned short *)svus);

29893

+ vss = vec_lde (1*2, (signed short *)svss);

29894

+ vui = vec_lde (3*4, (unsigned int *)svui);

29895

+ vsi = vec_lde (2*4, (signed int *)svsi);

29896

+ vf = vec_lde (0*4, (float *)svf);

29897

+

29898

+ check (vec_extract (vuc, 9) == 9, "vuc");

29899

+ check (vec_extract (vsc, 14) == 6, "vsc");

29900

+ check (vec_extract (vus, 7) == 7, "vus");

29901

+ check (vec_extract (vss, 1) == -3, "vss");

29902

+ check (vec_extract (vui, 3) == 3, "vui");

29903

+ check (vec_extract (vsi, 2) == 0, "vsi");

29904

+ check (vec_extract (vf, 0) == 0.0, "vf");

29905

+}

29906

Index: gcc/testsuite/gcc.dg/vmx/pack.c

29907

===================================================================

29908

--- a/src/gcc/testsuite/gcc.dg/vmx/pack.c (.../tags/gcc_4_8_2_release)

29909

+++ b/src/gcc/testsuite/gcc.dg/vmx/pack.c (.../branches/gcc-4_8-branch)

29910

@@ -0,0 +1,108 @@

29911

+#include "harness.h"

29912

+

29913

+#define BIG 4294967295

29914

+

29915

+static void test()

29916

+{

29917

+ /* Input vectors. */

29918

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

29919

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

29920

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

29921

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

29922

+ vector bool short vbsa = {0,65535,65535,0,0,0,65535,0};

29923

+ vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535};

29924

+ vector unsigned int vuia = {0,1,2,3};

29925

+ vector unsigned int vuib = {4,5,6,7};

29926

+ vector signed int vsia = {-4,-3,-2,-1};

29927

+ vector signed int vsib = {0,1,2,3};

29928

+ vector bool int vbia = {0,BIG,BIG,BIG};

29929

+ vector bool int vbib = {BIG,0,0,0};

29930

+ vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3),

29931

+ (1<<24) + (5<<19) + (6<<11) + (7<<3),

29932

+ (0<<24) + (8<<19) + (9<<11) + (10<<3),

29933

+ (1<<24) + (11<<19) + (12<<11) + (13<<3)};

29934

+ vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3),

29935

+ (0<<24) + (17<<19) + (18<<11) + (19<<3),

29936

+ (1<<24) + (20<<19) + (21<<11) + (22<<3),

29937

+ (0<<24) + (23<<19) + (24<<11) + (25<<3)};

29938

+ vector unsigned short vusc = {0,256,1,257,2,258,3,259};

29939

+ vector unsigned short vusd = {4,260,5,261,6,262,7,263};

29940

+ vector signed short vssc = {-1,-128,0,127,-2,-129,1,128};

29941

+ vector signed short vssd = {-3,-130,2,129,-4,-131,3,130};

29942

+ vector unsigned int vuic = {0,65536,1,65537};

29943

+ vector unsigned int vuid = {2,65538,3,65539};

29944

+ vector signed int vsic = {-1,-32768,0,32767};

29945

+ vector signed int vsid = {-2,-32769,1,32768};

29946

+

29947

+ /* Result vectors. */

29948

+ vector unsigned char vucr;

29949

+ vector signed char vscr;

29950

+ vector bool char vbcr;

29951

+ vector unsigned short vusr;

29952

+ vector signed short vssr;

29953

+ vector bool short vbsr;

29954

+ vector pixel vpr;

29955

+ vector unsigned char vucsr;

29956

+ vector signed char vscsr;

29957

+ vector unsigned short vussr;

29958

+ vector signed short vsssr;

29959

+ vector unsigned char vucsur1, vucsur2;

29960

+ vector unsigned short vussur1, vussur2;

29961

+

29962

+ /* Expected result vectors. */

29963

+ vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

29964

+ vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

29965

+ vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

29966

+ vector unsigned short vuser = {0,1,2,3,4,5,6,7};

29967

+ vector signed short vsser = {-4,-3,-2,-1,0,1,2,3};

29968

+ vector bool short vbser = {0,65535,65535,65535,65535,0,0,0};

29969

+ vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4,

29970

+ (1<<15) + (5<<10) + (6<<5) + 7,

29971

+ (0<<15) + (8<<10) + (9<<5) + 10,

29972

+ (1<<15) + (11<<10) + (12<<5) + 13,

29973

+ (1<<15) + (14<<10) + (15<<5) + 16,

29974

+ (0<<15) + (17<<10) + (18<<5) + 19,

29975

+ (1<<15) + (20<<10) + (21<<5) + 22,

29976

+ (0<<15) + (23<<10) + (24<<5) + 25};

29977

+ vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

29978

+ vector signed char vscser = {-1,-128,0,127,-2,-128,1,127,

29979

+ -3,-128,2,127,-4,-128,3,127};

29980

+ vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535};

29981

+ vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767};

29982

+ vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};

29983

+ vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130};

29984

+ vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535};

29985

+ vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768};

29986

+

29987

+ vucr = vec_pack (vusa, vusb);

29988

+ vscr = vec_pack (vssa, vssb);

29989

+ vbcr = vec_pack (vbsa, vbsb);

29990

+ vusr = vec_pack (vuia, vuib);

29991

+ vssr = vec_pack (vsia, vsib);

29992

+ vbsr = vec_pack (vbia, vbib);

29993

+ vpr = vec_packpx (vipa, vipb);

29994

+ vucsr = vec_packs (vusc, vusd);

29995

+ vscsr = vec_packs (vssc, vssd);

29996

+ vussr = vec_packs (vuic, vuid);

29997

+ vsssr = vec_packs (vsic, vsid);

29998

+ vucsur1 = vec_packsu (vusc, vusd);

29999

+ vucsur2 = vec_packsu (vssc, vssd);

30000

+ vussur1 = vec_packsu (vuic, vuid);

30001

+ vussur2 = vec_packsu (vsic, vsid);

30002

+

30003

+ check (vec_all_eq (vucr, vucer), "vucr");

30004

+ check (vec_all_eq (vscr, vscer), "vscr");

30005

+ check (vec_all_eq (vbcr, vbcer), "vbcr");

30006

+ check (vec_all_eq (vusr, vuser), "vusr");

30007

+ check (vec_all_eq (vssr, vsser), "vssr");

30008

+ check (vec_all_eq (vbsr, vbser), "vbsr");

30009

+ check (vec_all_eq (vpr, vper ), "vpr" );

30010

+ check (vec_all_eq (vucsr, vucser), "vucsr");

30011

+ check (vec_all_eq (vscsr, vscser), "vscsr");

30012

+ check (vec_all_eq (vussr, vusser), "vussr");

30013

+ check (vec_all_eq (vsssr, vssser), "vsssr");

30014

+ check (vec_all_eq (vucsur1, vucsuer1), "vucsur1");

30015

+ check (vec_all_eq (vucsur2, vucsuer2), "vucsur2");

30016

+ check (vec_all_eq (vussur1, vussuer1), "vussur1");

30017

+ check (vec_all_eq (vussur2, vussuer2), "vussur2");

30018

+}

30019

Index: gcc/testsuite/gcc.dg/vmx/unpack-be-order.c

30020

===================================================================

30021

--- a/src/gcc/testsuite/gcc.dg/vmx/unpack-be-order.c (.../tags/gcc_4_8_2_release)

30022

+++ b/src/gcc/testsuite/gcc.dg/vmx/unpack-be-order.c (.../branches/gcc-4_8-branch)

30023

@@ -0,0 +1,88 @@

30024

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

30025

+

30026

+#include "harness.h"

30027

+

30028

+#define BIG 4294967295

30029

+

30030

+static void test()

30031

+{

30032

+ /* Input vectors. */

30033

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30034

+ vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};

30035

+ vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3,

30036

+ (1<<15) + (4<<10) + (5<<5) + 6,

30037

+ (0<<15) + (7<<10) + (8<<5) + 9,

30038

+ (1<<15) + (10<<10) + (11<<5) + 12,

30039

+ (1<<15) + (13<<10) + (14<<5) + 15,

30040

+ (0<<15) + (16<<10) + (17<<5) + 18,

30041

+ (1<<15) + (19<<10) + (20<<5) + 21,

30042

+ (0<<15) + (22<<10) + (23<<5) + 24};

30043

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

30044

+ vector bool short vbs = {0,65535,65535,0,0,0,65535,0};

30045

+

30046

+ /* Result vectors. */

30047

+ vector signed short vsch, vscl;

30048

+ vector bool short vbsh, vbsl;

30049

+ vector unsigned int vuih, vuil;

30050

+ vector signed int vsih, vsil;

30051

+ vector bool int vbih, vbil;

30052

+

30053

+ /* Expected result vectors. */

30054

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

30055

+ vector signed short vschr = {0,1,2,3,4,5,6,7};

30056

+ vector signed short vsclr = {-8,-7,-6,-5,-4,-3,-2,-1};

30057

+ vector bool short vbshr = {65535,0,0,65535,65535,65535,0,65535};

30058

+ vector bool short vbslr = {0,65535,65535,0,0,0,65535,0};

30059

+ vector unsigned int vuihr = {(65535<<24) + (13<<16) + (14<<8) + 15,

30060

+ (0<<24) + (16<<16) + (17<<8) + 18,

30061

+ (65535<<24) + (19<<16) + (20<<8) + 21,

30062

+ (0<<24) + (22<<16) + (23<<8) + 24};

30063

+ vector unsigned int vuilr = {(0<<24) + (1<<16) + (2<<8) + 3,

30064

+ (65535<<24) + (4<<16) + (5<<8) + 6,

30065

+ (0<<24) + (7<<16) + (8<<8) + 9,

30066

+ (65535<<24) + (10<<16) + (11<<8) + 12};

30067

+ vector signed int vsihr = {0,1,2,3};

30068

+ vector signed int vsilr = {-4,-3,-2,-1};

30069

+ vector bool int vbihr = {0,0,BIG,0};

30070

+ vector bool int vbilr = {0,BIG,BIG,0};

30071

+#else

30072

+ vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1};

30073

+ vector signed short vsclr = {0,1,2,3,4,5,6,7};

30074

+ vector bool short vbshr = {0,65535,65535,0,0,0,65535,0};

30075

+ vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535};

30076

+ vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3,

30077

+ (65535<<24) + (4<<16) + (5<<8) + 6,

30078

+ (0<<24) + (7<<16) + (8<<8) + 9,

30079

+ (65535<<24) + (10<<16) + (11<<8) + 12};

30080

+ vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15,

30081

+ (0<<24) + (16<<16) + (17<<8) + 18,

30082

+ (65535<<24) + (19<<16) + (20<<8) + 21,

30083

+ (0<<24) + (22<<16) + (23<<8) + 24};

30084

+ vector signed int vsihr = {-4,-3,-2,-1};

30085

+ vector signed int vsilr = {0,1,2,3};

30086

+ vector bool int vbihr = {0,BIG,BIG,0};

30087

+ vector bool int vbilr = {0,0,BIG,0};

30088

+#endif

30089

+

30090

+ vsch = vec_unpackh (vsc);

30091

+ vscl = vec_unpackl (vsc);

30092

+ vbsh = vec_unpackh (vbc);

30093

+ vbsl = vec_unpackl (vbc);

30094

+ vuih = vec_unpackh (vp);

30095

+ vuil = vec_unpackl (vp);

30096

+ vsih = vec_unpackh (vss);

30097

+ vsil = vec_unpackl (vss);

30098

+ vbih = vec_unpackh (vbs);

30099

+ vbil = vec_unpackl (vbs);

30100

+

30101

+ check (vec_all_eq (vsch, vschr), "vsch");

30102

+ check (vec_all_eq (vscl, vsclr), "vscl");

30103

+ check (vec_all_eq (vbsh, vbshr), "vbsh");

30104

+ check (vec_all_eq (vbsl, vbslr), "vbsl");

30105

+ check (vec_all_eq (vuih, vuihr), "vuih");

30106

+ check (vec_all_eq (vuil, vuilr), "vuil");

30107

+ check (vec_all_eq (vsih, vsihr), "vsih");

30108

+ check (vec_all_eq (vsil, vsilr), "vsil");

30109

+ check (vec_all_eq (vbih, vbihr), "vbih");

30110

+ check (vec_all_eq (vbil, vbilr), "vbil");

30111

+}

30112

Index: gcc/testsuite/gcc.dg/vmx/st.c

30113

===================================================================

30114

--- a/src/gcc/testsuite/gcc.dg/vmx/st.c (.../tags/gcc_4_8_2_release)

30115

+++ b/src/gcc/testsuite/gcc.dg/vmx/st.c (.../branches/gcc-4_8-branch)

30116

@@ -0,0 +1,67 @@

30117

+#include "harness.h"

30118

+

30119

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

30120

+static signed char svsc[16] __attribute__ ((aligned (16)));

30121

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

30122

+static unsigned short svus[8] __attribute__ ((aligned (16)));

30123

+static signed short svss[8] __attribute__ ((aligned (16)));

30124

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

30125

+static unsigned short svp[8] __attribute__ ((aligned (16)));

30126

+static unsigned int svui[4] __attribute__ ((aligned (16)));

30127

+static signed int svsi[4] __attribute__ ((aligned (16)));

30128

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

30129

+static float svf[4] __attribute__ ((aligned (16)));

30130

+

30131

+static void check_arrays ()

30132

+{

30133

+ unsigned int i;

30134

+ for (i = 0; i < 16; ++i)

30135

+ {

30136

+ check (svuc[i] == i, "svuc");

30137

+ check (svsc[i] == i - 8, "svsc");

30138

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

30139

+ }

30140

+ for (i = 0; i < 8; ++i)

30141

+ {

30142

+ check (svus[i] == i, "svus");

30143

+ check (svss[i] == i - 4, "svss");

30144

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

30145

+ check (svp[i] == i, "svp");

30146

+ }

30147

+ for (i = 0; i < 4; ++i)

30148

+ {

30149

+ check (svui[i] == i, "svui");

30150

+ check (svsi[i] == i - 2, "svsi");

30151

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

30152

+ check (svf[i] == i * 1.0f, "svf");

30153

+ }

30154

+}

30155

+

30156

+static void test ()

30157

+{

30158

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30159

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30160

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

30161

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

30162

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

30163

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

30164

+ vector pixel vp = {0,1,2,3,4,5,6,7};

30165

+ vector unsigned int vui = {0,1,2,3};

30166

+ vector signed int vsi = {-2,-1,0,1};

30167

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

30168

+ vector float vf = {0.0,1.0,2.0,3.0};

30169

+

30170

+ vec_st (vuc, 0, (vector unsigned char *)svuc);

30171

+ vec_st (vsc, 0, (vector signed char *)svsc);

30172

+ vec_st (vbc, 0, (vector bool char *)svbc);

30173

+ vec_st (vus, 0, (vector unsigned short *)svus);

30174

+ vec_st (vss, 0, (vector signed short *)svss);

30175

+ vec_st (vbs, 0, (vector bool short *)svbs);

30176

+ vec_st (vp, 0, (vector pixel *)svp);

30177

+ vec_st (vui, 0, (vector unsigned int *)svui);

30178

+ vec_st (vsi, 0, (vector signed int *)svsi);

30179

+ vec_st (vbi, 0, (vector bool int *)svbi);

30180

+ vec_st (vf, 0, (vector float *)svf);

30181

+

30182

+ check_arrays ();

30183

+}

30184

Index: gcc/testsuite/gcc.dg/vmx/ste-be-order.c

30185

===================================================================

30186

--- a/src/gcc/testsuite/gcc.dg/vmx/ste-be-order.c (.../tags/gcc_4_8_2_release)

30187

+++ b/src/gcc/testsuite/gcc.dg/vmx/ste-be-order.c (.../branches/gcc-4_8-branch)

30188

@@ -0,0 +1,53 @@

30189

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

30190

+

30191

+#include "harness.h"

30192

+

30193

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

30194

+static signed char svsc[16] __attribute__ ((aligned (16)));

30195

+static unsigned short svus[8] __attribute__ ((aligned (16)));

30196

+static signed short svss[8] __attribute__ ((aligned (16)));

30197

+static unsigned int svui[4] __attribute__ ((aligned (16)));

30198

+static signed int svsi[4] __attribute__ ((aligned (16)));

30199

+static float svf[4] __attribute__ ((aligned (16)));

30200

+

30201

+static void check_arrays ()

30202

+{

30203

+ check (svuc[9] == 9, "svuc");

30204

+ check (svsc[14] == 6, "svsc");

30205

+ check (svus[7] == 7, "svus");

30206

+ check (svss[1] == -3, "svss");

30207

+ check (svui[3] == 3, "svui");

30208

+ check (svsi[2] == 0, "svsi");

30209

+ check (svf[0] == 0.0, "svf");

30210

+}

30211

+

30212

+static void test ()

30213

+{

30214

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

30215

+ vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

30216

+ vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

30217

+ vector unsigned short vus = {7,6,5,4,3,2,1,0};

30218

+ vector signed short vss = {3,2,1,0,-1,-2,-3,-4};

30219

+ vector unsigned int vui = {3,2,1,0};

30220

+ vector signed int vsi = {1,0,-1,-2};

30221

+ vector float vf = {3.0,2.0,1.0,0.0};

30222

+#else

30223

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30224

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30225

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

30226

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

30227

+ vector unsigned int vui = {0,1,2,3};

30228

+ vector signed int vsi = {-2,-1,0,1};

30229

+ vector float vf = {0.0,1.0,2.0,3.0};

30230

+#endif

30231

+

30232

+ vec_ste (vuc, 9*1, (unsigned char *)svuc);

30233

+ vec_ste (vsc, 14*1, (signed char *)svsc);

30234

+ vec_ste (vus, 7*2, (unsigned short *)svus);

30235

+ vec_ste (vss, 1*2, (signed short *)svss);

30236

+ vec_ste (vui, 3*4, (unsigned int *)svui);

30237

+ vec_ste (vsi, 2*4, (signed int *)svsi);

30238

+ vec_ste (vf, 0*4, (float *)svf);

30239

+

30240

+ check_arrays ();

30241

+}

30242

Index: gcc/testsuite/gcc.dg/vmx/insert.c

30243

===================================================================

30244

--- a/src/gcc/testsuite/gcc.dg/vmx/insert.c (.../tags/gcc_4_8_2_release)

30245

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert.c (.../branches/gcc-4_8-branch)

30246

@@ -0,0 +1,37 @@

30247

+#include "harness.h"

30248

+

30249

+static void test()

30250

+{

30251

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30252

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30253

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

30254

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

30255

+ vector unsigned int ve = {0,1,2,3};

30256

+ vector signed int vf = {-2,-1,0,1};

30257

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

30258

+

30259

+ check (vec_all_eq (vec_insert (16, va, 5),

30260

+ ((vector unsigned char)

30261

+ {0,1,2,3,4,16,6,7,8,9,10,11,12,13,14,15})),

30262

+ "vec_insert (va)");

30263

+ check (vec_all_eq (vec_insert (-16, vb, 0),

30264

+ ((vector signed char)

30265

+ {-16,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7})),

30266

+ "vec_insert (vb)");

30267

+ check (vec_all_eq (vec_insert (16, vc, 7),

30268

+ ((vector unsigned short){0,1,2,3,4,5,6,16})),

30269

+ "vec_insert (vc)");

30270

+ check (vec_all_eq (vec_insert (-16, vd, 3),

30271

+ ((vector signed short){-4,-3,-2,-16,0,1,2,3})),

30272

+ "vec_insert (vd)");

30273

+ check (vec_all_eq (vec_insert (16, ve, 2),

30274

+ ((vector unsigned int){0,1,16,3})),

30275

+ "vec_insert (ve)");

30276

+ check (vec_all_eq (vec_insert (-16, vf, 1),

30277

+ ((vector signed int){-2,-16,0,1})),

30278

+ "vec_insert (vf)");

30279

+ check (vec_all_eq (vec_insert (-16.0f, vg, 0),

30280

+ ((vector float){-16.0f,-1.0f,0.0f,1.0f})),

30281

+ "vec_insert (vg)");

30282

+}

30283

+

30284

Index: gcc/testsuite/gcc.dg/vmx/ld-vsx.c

30285

===================================================================

30286

--- a/src/gcc/testsuite/gcc.dg/vmx/ld-vsx.c (.../tags/gcc_4_8_2_release)

30287

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld-vsx.c (.../branches/gcc-4_8-branch)

30288

@@ -0,0 +1,39 @@

30289

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

30290

+/* { dg-require-effective-target powerpc_vsx_ok } */

30291

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

30292

+

30293

+#include "harness.h"

30294

+

30295

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

30296

+static double svd[2] __attribute__ ((aligned (16)));

30297

+

30298

+static void init ()

30299

+{

30300

+ unsigned int i;

30301

+ for (i = 0; i < 2; ++i)

30302

+ {

30303

+ svul[i] = i;

30304

+ svd[i] = i * 1.0;

30305

+ }

30306

+}

30307

+

30308

+static void test ()

30309

+{

30310

+ vector unsigned long long evul = {0,1};

30311

+ vector double evd = {0.0,1.0};

30312

+

30313

+ vector unsigned long long vul;

30314

+ vector double vd;

30315

+ unsigned i;

30316

+

30317

+ init ();

30318

+

30319

+ vul = vec_ld (0, (vector unsigned long long *)svul);

30320

+ vd = vec_ld (0, (vector double *)svd);

30321

+

30322

+ for (i = 0; i < 2; ++i)

30323

+ {

30324

+ check (vul[i] == evul[i], "vul");

30325

+ check (vd[i] == evd[i], "vd" );

30326

+ }

30327

+}

30328

Index: gcc/testsuite/gcc.dg/vmx/extract-vsx.c

30329

===================================================================

30330

--- a/src/gcc/testsuite/gcc.dg/vmx/extract-vsx.c (.../tags/gcc_4_8_2_release)

30331

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract-vsx.c (.../branches/gcc-4_8-branch)

30332

@@ -0,0 +1,16 @@

30333

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

30334

+/* { dg-require-effective-target powerpc_vsx_ok } */

30335

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

30336

+

30337

+#include "harness.h"

30338

+

30339

+static void test()

30340

+{

30341

+ vector long long vl = {0, 1};

30342

+ vector double vd = {0.0, 1.0};

30343

+

30344

+ check (vec_extract (vl, 0) == 0, "vec_extract, vl, 0");

30345

+ check (vec_extract (vd, 1) == 1.0, "vec_extract, vd, 1");

30346

+ check (vl[0] == 0, "[], vl, 0");

30347

+ check (vd[1] == 1.0, "[], vd, 0");

30348

+}

30349

Index: gcc/testsuite/gcc.dg/vmx/perm.c

30350

===================================================================

30351

--- a/src/gcc/testsuite/gcc.dg/vmx/perm.c (.../tags/gcc_4_8_2_release)

30352

+++ b/src/gcc/testsuite/gcc.dg/vmx/perm.c (.../branches/gcc-4_8-branch)

30353

@@ -0,0 +1,69 @@

30354

+#include "harness.h"

30355

+

30356

+static void test()

30357

+{

30358

+ /* Input vectors. */

30359

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30360

+ vector unsigned char vucb

30361

+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};

30362

+ vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

30363

+

30364

+ vector signed char vsca

30365

+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};

30366

+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30367

+ vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

30368

+

30369

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

30370

+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};

30371

+ vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

30372

+

30373

+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};

30374

+ vector signed short vssb = {0,1,2,3,4,5,6,7};

30375

+ vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};

30376

+

30377

+ vector unsigned int vuia = {0,1,2,3};

30378

+ vector unsigned int vuib = {4,5,6,7};

30379

+ vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

30380

+

30381

+ vector signed int vsia = {-4,-3,-2,-1};

30382

+ vector signed int vsib = {0,1,2,3};

30383

+ vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

30384

+

30385

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

30386

+ vector float vfb = {0.0,1.0,2.0,3.0};

30387

+ vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};

30388

+

30389

+ /* Result vectors. */

30390

+ vector unsigned char vuc;

30391

+ vector signed char vsc;

30392

+ vector unsigned short vus;

30393

+ vector signed short vss;

30394

+ vector unsigned int vui;

30395

+ vector signed int vsi;

30396

+ vector float vf;

30397

+

30398

+ /* Expected result vectors. */

30399

+ vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};

30400

+ vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8};

30401

+ vector unsigned short vusr = {0,15,1,14,2,13,3,12};

30402

+ vector signed short vssr = {-8,7,-7,6,-6,5,-5,4};

30403

+ vector unsigned int vuir = {0,7,1,6};

30404

+ vector signed int vsir = {-4,3,-3,2};

30405

+ vector float vfr = {-4.0,3.0,-3.0,2.0};

30406

+

30407

+ vuc = vec_perm (vuca, vucb, vucp);

30408

+ vsc = vec_perm (vsca, vscb, vscp);

30409

+ vus = vec_perm (vusa, vusb, vusp);

30410

+ vss = vec_perm (vssa, vssb, vssp);

30411

+ vui = vec_perm (vuia, vuib, vuip);

30412

+ vsi = vec_perm (vsia, vsib, vsip);

30413

+ vf = vec_perm (vfa, vfb, vfp );

30414

+

30415

+ check (vec_all_eq (vuc, vucr), "vuc");

30416

+ check (vec_all_eq (vsc, vscr), "vsc");

30417

+ check (vec_all_eq (vus, vusr), "vus");

30418

+ check (vec_all_eq (vss, vssr), "vss");

30419

+ check (vec_all_eq (vui, vuir), "vui");

30420

+ check (vec_all_eq (vsi, vsir), "vsi");

30421

+ check (vec_all_eq (vf, vfr), "vf" );

30422

+}

30423

Index: gcc/testsuite/gcc.dg/vmx/extract-be-order.c

30424

===================================================================

30425

--- a/src/gcc/testsuite/gcc.dg/vmx/extract-be-order.c (.../tags/gcc_4_8_2_release)

30426

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract-be-order.c (.../branches/gcc-4_8-branch)

30427

@@ -0,0 +1,33 @@

30428

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

30429

+

30430

+#include "harness.h"

30431

+

30432

+static void test()

30433

+{

30434

+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30435

+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30436

+ vector unsigned short vc = {0,1,2,3,4,5,6,7};

30437

+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};

30438

+ vector unsigned int ve = {0,1,2,3};

30439

+ vector signed int vf = {-2,-1,0,1};

30440

+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};

30441

+

30442

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

30443

+ check (vec_extract (va, 5) == 10, "vec_extract (va, 5)");

30444

+ check (vec_extract (vb, 0) == 7, "vec_extract (vb, 0)");

30445

+ check (vec_extract (vc, 7) == 0, "vec_extract (vc, 7)");

30446

+ check (vec_extract (vd, 3) == 0, "vec_extract (vd, 3)");

30447

+ check (vec_extract (ve, 2) == 1, "vec_extract (ve, 2)");

30448

+ check (vec_extract (vf, 1) == 0, "vec_extract (vf, 1)");

30449

+ check (vec_extract (vg, 0) == 1.0f, "vec_extract (vg, 0)");

30450

+#else

30451

+ check (vec_extract (va, 5) == 5, "vec_extract (va, 5)");

30452

+ check (vec_extract (vb, 0) == -8, "vec_extract (vb, 0)");

30453

+ check (vec_extract (vc, 7) == 7, "vec_extract (vc, 7)");

30454

+ check (vec_extract (vd, 3) == -1, "vec_extract (vd, 3)");

30455

+ check (vec_extract (ve, 2) == 2, "vec_extract (ve, 2)");

30456

+ check (vec_extract (vf, 1) == -1, "vec_extract (vf, 1)");

30457

+ check (vec_extract (vg, 0) == -2.0f, "vec_extract (vg, 0)");

30458

+#endif

30459

+}

30460

+

30461

Index: gcc/testsuite/gcc.dg/vmx/ldl-be-order.c

30462

===================================================================

30463

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl-be-order.c (.../tags/gcc_4_8_2_release)

30464

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl-be-order.c (.../branches/gcc-4_8-branch)

30465

@@ -0,0 +1,107 @@

30466

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

30467

+

30468

+#include "harness.h"

30469

+

30470

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

30471

+static signed char svsc[16] __attribute__ ((aligned (16)));

30472

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

30473

+static unsigned short svus[8] __attribute__ ((aligned (16)));

30474

+static signed short svss[8] __attribute__ ((aligned (16)));

30475

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

30476

+static unsigned short svp[8] __attribute__ ((aligned (16)));

30477

+static unsigned int svui[4] __attribute__ ((aligned (16)));

30478

+static signed int svsi[4] __attribute__ ((aligned (16)));

30479

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

30480

+static float svf[4] __attribute__ ((aligned (16)));

30481

+

30482

+static void init ()

30483

+{

30484

+ unsigned int i;

30485

+ for (i = 0; i < 16; ++i)

30486

+ {

30487

+ svuc[i] = i;

30488

+ svsc[i] = i - 8;

30489

+ svbc[i] = (i % 2) ? 0xff : 0;

30490

+ }

30491

+ for (i = 0; i < 8; ++i)

30492

+ {

30493

+ svus[i] = i;

30494

+ svss[i] = i - 4;

30495

+ svbs[i] = (i % 2) ? 0xffff : 0;

30496

+ svp[i] = i;

30497

+ }

30498

+ for (i = 0; i < 4; ++i)

30499

+ {

30500

+ svui[i] = i;

30501

+ svsi[i] = i - 2;

30502

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

30503

+ svf[i] = i * 1.0f;

30504

+ }

30505

+}

30506

+

30507

+static void test ()

30508

+{

30509

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

30510

+ vector unsigned char evuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

30511

+ vector signed char evsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

30512

+ vector bool char evbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

30513

+ vector unsigned short evus = {7,6,5,4,3,2,1,0};

30514

+ vector signed short evss = {3,2,1,0,-1,-2,-3,-4};

30515

+ vector bool short evbs = {65535,0,65535,0,65535,0,65535,0};

30516

+ vector pixel evp = {7,6,5,4,3,2,1,0};

30517

+ vector unsigned int evui = {3,2,1,0};

30518

+ vector signed int evsi = {1,0,-1,-2};

30519

+ vector bool int evbi = {0xffffffff,0,0xffffffff,0};

30520

+ vector float evf = {3.0,2.0,1.0,0.0};

30521

+#else

30522

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30523

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30524

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

30525

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

30526

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

30527

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

30528

+ vector pixel evp = {0,1,2,3,4,5,6,7};

30529

+ vector unsigned int evui = {0,1,2,3};

30530

+ vector signed int evsi = {-2,-1,0,1};

30531

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

30532

+ vector float evf = {0.0,1.0,2.0,3.0};

30533

+#endif

30534

+

30535

+ vector unsigned char vuc;

30536

+ vector signed char vsc;

30537

+ vector bool char vbc;

30538

+ vector unsigned short vus;

30539

+ vector signed short vss;

30540

+ vector bool short vbs;

30541

+ vector pixel vp;

30542

+ vector unsigned int vui;

30543

+ vector signed int vsi;

30544

+ vector bool int vbi;

30545

+ vector float vf;

30546

+

30547

+ init ();

30548

+

30549

+ vuc = vec_ldl (0, (vector unsigned char *)svuc);

30550

+ vsc = vec_ldl (0, (vector signed char *)svsc);

30551

+ vbc = vec_ldl (0, (vector bool char *)svbc);

30552

+ vus = vec_ldl (0, (vector unsigned short *)svus);

30553

+ vss = vec_ldl (0, (vector signed short *)svss);

30554

+ vbs = vec_ldl (0, (vector bool short *)svbs);

30555

+ vp = vec_ldl (0, (vector pixel *)svp);

30556

+ vui = vec_ldl (0, (vector unsigned int *)svui);

30557

+ vsi = vec_ldl (0, (vector signed int *)svsi);

30558

+ vbi = vec_ldl (0, (vector bool int *)svbi);

30559

+ vf = vec_ldl (0, (vector float *)svf);

30560

+

30561

+ check (vec_all_eq (vuc, evuc), "vuc");

30562

+ check (vec_all_eq (vsc, evsc), "vsc");

30563

+ check (vec_all_eq (vbc, evbc), "vbc");

30564

+ check (vec_all_eq (vus, evus), "vus");

30565

+ check (vec_all_eq (vss, evss), "vss");

30566

+ check (vec_all_eq (vbs, evbs), "vbs");

30567

+ check (vec_all_eq (vp, evp ), "vp" );

30568

+ check (vec_all_eq (vui, evui), "vui");

30569

+ check (vec_all_eq (vsi, evsi), "vsi");

30570

+ check (vec_all_eq (vbi, evbi), "vbi");

30571

+ check (vec_all_eq (vf, evf ), "vf" );

30572

+}

30573

Index: gcc/testsuite/gcc.dg/vmx/mult-even-odd.c

30574

===================================================================

30575

--- a/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd.c (.../tags/gcc_4_8_2_release)

30576

+++ b/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd.c (.../branches/gcc-4_8-branch)

30577

@@ -0,0 +1,43 @@

30578

+#include "harness.h"

30579

+

30580

+static void test()

30581

+{

30582

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30583

+ vector unsigned char vucb = {2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3};

30584

+ vector signed char vsca = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30585

+ vector signed char vscb = {2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3};

30586

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

30587

+ vector unsigned short vusb = {2,3,2,3,2,3,2,3};

30588

+ vector signed short vssa = {-4,-3,-2,-1,0,1,2,3};

30589

+ vector signed short vssb = {2,-3,2,-3,2,-3,2,-3};

30590

+ vector unsigned short vuse, vuso;

30591

+ vector signed short vsse, vsso;

30592

+ vector unsigned int vuie, vuio;

30593

+ vector signed int vsie, vsio;

30594

+

30595

+ vuse = vec_mule (vuca, vucb);

30596

+ vuso = vec_mulo (vuca, vucb);

30597

+ vsse = vec_mule (vsca, vscb);

30598

+ vsso = vec_mulo (vsca, vscb);

30599

+ vuie = vec_mule (vusa, vusb);

30600

+ vuio = vec_mulo (vusa, vusb);

30601

+ vsie = vec_mule (vssa, vssb);

30602

+ vsio = vec_mulo (vssa, vssb);

30603

+

30604

+ check (vec_all_eq (vuse,

30605

+ ((vector unsigned short){0,4,8,12,16,20,24,28})),

30606

+ "vuse");

30607

+ check (vec_all_eq (vuso,

30608

+ ((vector unsigned short){3,9,15,21,27,33,39,45})),

30609

+ "vuso");

30610

+ check (vec_all_eq (vsse,

30611

+ ((vector signed short){-16,-12,-8,-4,0,4,8,12})),

30612

+ "vsse");

30613

+ check (vec_all_eq (vsso,

30614

+ ((vector signed short){21,15,9,3,-3,-9,-15,-21})),

30615

+ "vsso");

30616

+ check (vec_all_eq (vuie, ((vector unsigned int){0,4,8,12})), "vuie");

30617

+ check (vec_all_eq (vuio, ((vector unsigned int){3,9,15,21})), "vuio");

30618

+ check (vec_all_eq (vsie, ((vector signed int){-8,-4,0,4})), "vsie");

30619

+ check (vec_all_eq (vsio, ((vector signed int){9,3,-3,-9})), "vsio");

30620

+}

30621

Index: gcc/testsuite/gcc.dg/vmx/splat-be-order.c

30622

===================================================================

30623

--- a/src/gcc/testsuite/gcc.dg/vmx/splat-be-order.c (.../tags/gcc_4_8_2_release)

30624

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat-be-order.c (.../branches/gcc-4_8-branch)

30625

@@ -0,0 +1,59 @@

30626

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

30627

+

30628

+#include "harness.h"

30629

+

30630

+static void test()

30631

+{

30632

+ /* Input vectors. */

30633

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30634

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30635

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

30636

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

30637

+ vector unsigned int vui = {0,1,2,3};

30638

+ vector signed int vsi = {-2,-1,0,1};

30639

+ vector float vf = {-2.0,-1.0,0.0,1.0};

30640

+

30641

+ /* Result vectors. */

30642

+ vector unsigned char vucr;

30643

+ vector signed char vscr;

30644

+ vector unsigned short vusr;

30645

+ vector signed short vssr;

30646

+ vector unsigned int vuir;

30647

+ vector signed int vsir;

30648

+ vector float vfr;

30649

+

30650

+ /* Expected result vectors. */

30651

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

30652

+ vector unsigned char vucer = {14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14};

30653

+ vector signed char vscer = {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1};

30654

+ vector unsigned short vuser = {0,0,0,0,0,0,0,0};

30655

+ vector signed short vsser = {3,3,3,3,3,3,3,3};

30656

+ vector unsigned int vuier = {1,1,1,1};

30657

+ vector signed int vsier = {-2,-2,-2,-2};

30658

+ vector float vfer = {0.0,0.0,0.0,0.0};

30659

+#else

30660

+ vector unsigned char vucer = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};

30661

+ vector signed char vscer = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

30662

+ vector unsigned short vuser = {7,7,7,7,7,7,7,7};

30663

+ vector signed short vsser = {-4,-4,-4,-4,-4,-4,-4,-4};

30664

+ vector unsigned int vuier = {2,2,2,2};

30665

+ vector signed int vsier = {1,1,1,1};

30666

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

30667

+#endif

30668

+

30669

+ vucr = vec_splat (vuc, 1);

30670

+ vscr = vec_splat (vsc, 8);

30671

+ vusr = vec_splat (vus, 7);

30672

+ vssr = vec_splat (vss, 0);

30673

+ vuir = vec_splat (vui, 2);

30674

+ vsir = vec_splat (vsi, 3);

30675

+ vfr = vec_splat (vf, 1);

30676

+

30677

+ check (vec_all_eq (vucr, vucer), "vuc");

30678

+ check (vec_all_eq (vscr, vscer), "vsc");

30679

+ check (vec_all_eq (vusr, vuser), "vus");

30680

+ check (vec_all_eq (vssr, vsser), "vss");

30681

+ check (vec_all_eq (vuir, vuier), "vui");

30682

+ check (vec_all_eq (vsir, vsier), "vsi");

30683

+ check (vec_all_eq (vfr, vfer ), "vf");

30684

+}

30685

Index: gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c

30686

===================================================================

30687

--- a/src/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c (.../tags/gcc_4_8_2_release)

30688

+++ b/src/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c (.../branches/gcc-4_8-branch)

30689

@@ -0,0 +1,19 @@

30690

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

30691

+/* { dg-require-effective-target powerpc_vsx_ok } */

30692

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

30693

+

30694

+#include "harness.h"

30695

+

30696

+static void test()

30697

+{

30698

+ vector long long vl = {0, 1};

30699

+ vector double vd = {0.0, 1.0};

30700

+

30701

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

30702

+ check (vec_extract (vl, 0) == 1, "vl, 0");

30703

+ check (vec_extract (vd, 1) == 0.0, "vd, 1");

30704

+#else

30705

+ check (vec_extract (vl, 0) == 0, "vl, 0");

30706

+ check (vec_extract (vd, 1) == 1.0, "vd, 1");

30707

+#endif

30708

+}

30709

Index: gcc/testsuite/gcc.dg/vmx/ld-be-order.c

30710

===================================================================

30711

--- a/src/gcc/testsuite/gcc.dg/vmx/ld-be-order.c (.../tags/gcc_4_8_2_release)

30712

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld-be-order.c (.../branches/gcc-4_8-branch)

30713

@@ -0,0 +1,107 @@

30714

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

30715

+

30716

+#include "harness.h"

30717

+

30718

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

30719

+static signed char svsc[16] __attribute__ ((aligned (16)));

30720

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

30721

+static unsigned short svus[8] __attribute__ ((aligned (16)));

30722

+static signed short svss[8] __attribute__ ((aligned (16)));

30723

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

30724

+static unsigned short svp[8] __attribute__ ((aligned (16)));

30725

+static unsigned int svui[4] __attribute__ ((aligned (16)));

30726

+static signed int svsi[4] __attribute__ ((aligned (16)));

30727

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

30728

+static float svf[4] __attribute__ ((aligned (16)));

30729

+

30730

+static void init ()

30731

+{

30732

+ unsigned int i;

30733

+ for (i = 0; i < 16; ++i)

30734

+ {

30735

+ svuc[i] = i;

30736

+ svsc[i] = i - 8;

30737

+ svbc[i] = (i % 2) ? 0xff : 0;

30738

+ }

30739

+ for (i = 0; i < 8; ++i)

30740

+ {

30741

+ svus[i] = i;

30742

+ svss[i] = i - 4;

30743

+ svbs[i] = (i % 2) ? 0xffff : 0;

30744

+ svp[i] = i;

30745

+ }

30746

+ for (i = 0; i < 4; ++i)

30747

+ {

30748

+ svui[i] = i;

30749

+ svsi[i] = i - 2;

30750

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

30751

+ svf[i] = i * 1.0f;

30752

+ }

30753

+}

30754

+

30755

+static void test ()

30756

+{

30757

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

30758

+ vector unsigned char evuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};

30759

+ vector signed char evsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};

30760

+ vector bool char evbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0};

30761

+ vector unsigned short evus = {7,6,5,4,3,2,1,0};

30762

+ vector signed short evss = {3,2,1,0,-1,-2,-3,-4};

30763

+ vector bool short evbs = {65535,0,65535,0,65535,0,65535,0};

30764

+ vector pixel evp = {7,6,5,4,3,2,1,0};

30765

+ vector unsigned int evui = {3,2,1,0};

30766

+ vector signed int evsi = {1,0,-1,-2};

30767

+ vector bool int evbi = {0xffffffff,0,0xffffffff,0};

30768

+ vector float evf = {3.0,2.0,1.0,0.0};

30769

+#else

30770

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30771

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30772

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

30773

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

30774

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

30775

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

30776

+ vector pixel evp = {0,1,2,3,4,5,6,7};

30777

+ vector unsigned int evui = {0,1,2,3};

30778

+ vector signed int evsi = {-2,-1,0,1};

30779

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

30780

+ vector float evf = {0.0,1.0,2.0,3.0};

30781

+#endif

30782

+

30783

+ vector unsigned char vuc;

30784

+ vector signed char vsc;

30785

+ vector bool char vbc;

30786

+ vector unsigned short vus;

30787

+ vector signed short vss;

30788

+ vector bool short vbs;

30789

+ vector pixel vp;

30790

+ vector unsigned int vui;

30791

+ vector signed int vsi;

30792

+ vector bool int vbi;

30793

+ vector float vf;

30794

+

30795

+ init ();

30796

+

30797

+ vuc = vec_ld (0, (vector unsigned char *)svuc);

30798

+ vsc = vec_ld (0, (vector signed char *)svsc);

30799

+ vbc = vec_ld (0, (vector bool char *)svbc);

30800

+ vus = vec_ld (0, (vector unsigned short *)svus);

30801

+ vss = vec_ld (0, (vector signed short *)svss);

30802

+ vbs = vec_ld (0, (vector bool short *)svbs);

30803

+ vp = vec_ld (0, (vector pixel *)svp);

30804

+ vui = vec_ld (0, (vector unsigned int *)svui);

30805

+ vsi = vec_ld (0, (vector signed int *)svsi);

30806

+ vbi = vec_ld (0, (vector bool int *)svbi);

30807

+ vf = vec_ld (0, (vector float *)svf);

30808

+

30809

+ check (vec_all_eq (vuc, evuc), "vuc");

30810

+ check (vec_all_eq (vsc, evsc), "vsc");

30811

+ check (vec_all_eq (vbc, evbc), "vbc");

30812

+ check (vec_all_eq (vus, evus), "vus");

30813

+ check (vec_all_eq (vss, evss), "vss");

30814

+ check (vec_all_eq (vbs, evbs), "vbs");

30815

+ check (vec_all_eq (vp, evp ), "vp" );

30816

+ check (vec_all_eq (vui, evui), "vui");

30817

+ check (vec_all_eq (vsi, evsi), "vsi");

30818

+ check (vec_all_eq (vbi, evbi), "vbi");

30819

+ check (vec_all_eq (vf, evf ), "vf" );

30820

+}

30821

Index: gcc/testsuite/gcc.dg/vmx/ld.c

30822

===================================================================

30823

--- a/src/gcc/testsuite/gcc.dg/vmx/ld.c (.../tags/gcc_4_8_2_release)

30824

+++ b/src/gcc/testsuite/gcc.dg/vmx/ld.c (.../branches/gcc-4_8-branch)

30825

@@ -0,0 +1,91 @@

30826

+#include "harness.h"

30827

+

30828

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

30829

+static signed char svsc[16] __attribute__ ((aligned (16)));

30830

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

30831

+static unsigned short svus[8] __attribute__ ((aligned (16)));

30832

+static signed short svss[8] __attribute__ ((aligned (16)));

30833

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

30834

+static unsigned short svp[8] __attribute__ ((aligned (16)));

30835

+static unsigned int svui[4] __attribute__ ((aligned (16)));

30836

+static signed int svsi[4] __attribute__ ((aligned (16)));

30837

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

30838

+static float svf[4] __attribute__ ((aligned (16)));

30839

+

30840

+static void init ()

30841

+{

30842

+ unsigned int i;

30843

+ for (i = 0; i < 16; ++i)

30844

+ {

30845

+ svuc[i] = i;

30846

+ svsc[i] = i - 8;

30847

+ svbc[i] = (i % 2) ? 0xff : 0;

30848

+ }

30849

+ for (i = 0; i < 8; ++i)

30850

+ {

30851

+ svus[i] = i;

30852

+ svss[i] = i - 4;

30853

+ svbs[i] = (i % 2) ? 0xffff : 0;

30854

+ svp[i] = i;

30855

+ }

30856

+ for (i = 0; i < 4; ++i)

30857

+ {

30858

+ svui[i] = i;

30859

+ svsi[i] = i - 2;

30860

+ svbi[i] = (i % 2) ? 0xffffffff : 0;

30861

+ svf[i] = i * 1.0f;

30862

+ }

30863

+}

30864

+

30865

+static void test ()

30866

+{

30867

+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30868

+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30869

+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

30870

+ vector unsigned short evus = {0,1,2,3,4,5,6,7};

30871

+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};

30872

+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};

30873

+ vector pixel evp = {0,1,2,3,4,5,6,7};

30874

+ vector unsigned int evui = {0,1,2,3};

30875

+ vector signed int evsi = {-2,-1,0,1};

30876

+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};

30877

+ vector float evf = {0.0,1.0,2.0,3.0};

30878

+

30879

+ vector unsigned char vuc;

30880

+ vector signed char vsc;

30881

+ vector bool char vbc;

30882

+ vector unsigned short vus;

30883

+ vector signed short vss;

30884

+ vector bool short vbs;

30885

+ vector pixel vp;

30886

+ vector unsigned int vui;

30887

+ vector signed int vsi;

30888

+ vector bool int vbi;

30889

+ vector float vf;

30890

+

30891

+ init ();

30892

+

30893

+ vuc = vec_ld (0, (vector unsigned char *)svuc);

30894

+ vsc = vec_ld (0, (vector signed char *)svsc);

30895

+ vbc = vec_ld (0, (vector bool char *)svbc);

30896

+ vus = vec_ld (0, (vector unsigned short *)svus);

30897

+ vss = vec_ld (0, (vector signed short *)svss);

30898

+ vbs = vec_ld (0, (vector bool short *)svbs);

30899

+ vp = vec_ld (0, (vector pixel *)svp);

30900

+ vui = vec_ld (0, (vector unsigned int *)svui);

30901

+ vsi = vec_ld (0, (vector signed int *)svsi);

30902

+ vbi = vec_ld (0, (vector bool int *)svbi);

30903

+ vf = vec_ld (0, (vector float *)svf);

30904

+

30905

+ check (vec_all_eq (vuc, evuc), "vuc");

30906

+ check (vec_all_eq (vsc, evsc), "vsc");

30907

+ check (vec_all_eq (vbc, evbc), "vbc");

30908

+ check (vec_all_eq (vus, evus), "vus");

30909

+ check (vec_all_eq (vss, evss), "vss");

30910

+ check (vec_all_eq (vbs, evbs), "vbs");

30911

+ check (vec_all_eq (vp, evp ), "vp" );

30912

+ check (vec_all_eq (vui, evui), "vui");

30913

+ check (vec_all_eq (vsi, evsi), "vsi");

30914

+ check (vec_all_eq (vbi, evbi), "vbi");

30915

+ check (vec_all_eq (vf, evf ), "vf" );

30916

+}

30917

Index: gcc/testsuite/gcc.dg/vmx/sn7153.c

30918

===================================================================

30919

--- a/src/gcc/testsuite/gcc.dg/vmx/sn7153.c (.../tags/gcc_4_8_2_release)

30920

+++ b/src/gcc/testsuite/gcc.dg/vmx/sn7153.c (.../branches/gcc-4_8-branch)

30921

@@ -34,7 +34,11 @@

30922

30923

void validate_sat()

30924

{

30925

+#ifdef __LITTLE_ENDIAN__

30926

+ if (vec_any_ne(vec_splat(vec_mfvscr(), 0), ((vector unsigned short){1,1,1,1,1,1,1,1})))

30927

+#else

30928

if (vec_any_ne(vec_splat(vec_mfvscr(), 7), ((vector unsigned short){1,1,1,1,1,1,1,1})))

30929

+#endif

30930

{

30931

union {vector unsigned short v; unsigned short s[8];} u;

30932

u.v = vec_mfvscr();

30933

Index: gcc/testsuite/gcc.dg/vmx/stl.c

30934

===================================================================

30935

--- a/src/gcc/testsuite/gcc.dg/vmx/stl.c (.../tags/gcc_4_8_2_release)

30936

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl.c (.../branches/gcc-4_8-branch)

30937

@@ -0,0 +1,67 @@

30938

+#include "harness.h"

30939

+

30940

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

30941

+static signed char svsc[16] __attribute__ ((aligned (16)));

30942

+static unsigned char svbc[16] __attribute__ ((aligned (16)));

30943

+static unsigned short svus[8] __attribute__ ((aligned (16)));

30944

+static signed short svss[8] __attribute__ ((aligned (16)));

30945

+static unsigned short svbs[8] __attribute__ ((aligned (16)));

30946

+static unsigned short svp[8] __attribute__ ((aligned (16)));

30947

+static unsigned int svui[4] __attribute__ ((aligned (16)));

30948

+static signed int svsi[4] __attribute__ ((aligned (16)));

30949

+static unsigned int svbi[4] __attribute__ ((aligned (16)));

30950

+static float svf[4] __attribute__ ((aligned (16)));

30951

+

30952

+static void check_arrays ()

30953

+{

30954

+ unsigned int i;

30955

+ for (i = 0; i < 16; ++i)

30956

+ {

30957

+ check (svuc[i] == i, "svuc");

30958

+ check (svsc[i] == i - 8, "svsc");

30959

+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");

30960

+ }

30961

+ for (i = 0; i < 8; ++i)

30962

+ {

30963

+ check (svus[i] == i, "svus");

30964

+ check (svss[i] == i - 4, "svss");

30965

+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");

30966

+ check (svp[i] == i, "svp");

30967

+ }

30968

+ for (i = 0; i < 4; ++i)

30969

+ {

30970

+ check (svui[i] == i, "svui");

30971

+ check (svsi[i] == i - 2, "svsi");

30972

+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");

30973

+ check (svf[i] == i * 1.0f, "svf");

30974

+ }

30975

+}

30976

+

30977

+static void test ()

30978

+{

30979

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

30980

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

30981

+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};

30982

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

30983

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

30984

+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};

30985

+ vector pixel vp = {0,1,2,3,4,5,6,7};

30986

+ vector unsigned int vui = {0,1,2,3};

30987

+ vector signed int vsi = {-2,-1,0,1};

30988

+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};

30989

+ vector float vf = {0.0,1.0,2.0,3.0};

30990

+

30991

+ vec_stl (vuc, 0, (vector unsigned char *)svuc);

30992

+ vec_stl (vsc, 0, (vector signed char *)svsc);

30993

+ vec_stl (vbc, 0, (vector bool char *)svbc);

30994

+ vec_stl (vus, 0, (vector unsigned short *)svus);

30995

+ vec_stl (vss, 0, (vector signed short *)svss);

30996

+ vec_stl (vbs, 0, (vector bool short *)svbs);

30997

+ vec_stl (vp, 0, (vector pixel *)svp);

30998

+ vec_stl (vui, 0, (vector unsigned int *)svui);

30999

+ vec_stl (vsi, 0, (vector signed int *)svsi);

31000

+ vec_stl (vbi, 0, (vector bool int *)svbi);

31001

+ vec_stl (vf, 0, (vector float *)svf);

31002

+

31003

+ check_arrays ();

31004

+}

31005

Index: gcc/testsuite/gcc.dg/vmx/st-vsx.c

31006

===================================================================

31007

--- a/src/gcc/testsuite/gcc.dg/vmx/st-vsx.c (.../tags/gcc_4_8_2_release)

31008

+++ b/src/gcc/testsuite/gcc.dg/vmx/st-vsx.c (.../branches/gcc-4_8-branch)

31009

@@ -0,0 +1,29 @@

31010

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

31011

+/* { dg-require-effective-target powerpc_vsx_ok } */

31012

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

31013

+

31014

+#include "harness.h"

31015

+

31016

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

31017

+static double svd[2] __attribute__ ((aligned (16)));

31018

+

31019

+static void check_arrays ()

31020

+{

31021

+ unsigned int i;

31022

+ for (i = 0; i < 2; ++i)

31023

+ {

31024

+ check (svul[i] == i, "svul");

31025

+ check (svd[i] == i * 1.0, "svd");

31026

+ }

31027

+}

31028

+

31029

+static void test ()

31030

+{

31031

+ vector unsigned long long vul = {0,1};

31032

+ vector double vd = {0.0,1.0};

31033

+

31034

+ vec_st (vul, 0, (vector unsigned long long *)svul);

31035

+ vec_st (vd, 0, (vector double *)svd);

31036

+

31037

+ check_arrays ();

31038

+}

31039

Index: gcc/testsuite/gcc.dg/vmx/sum2s.c

31040

===================================================================

31041

--- a/src/gcc/testsuite/gcc.dg/vmx/sum2s.c (.../tags/gcc_4_8_2_release)

31042

+++ b/src/gcc/testsuite/gcc.dg/vmx/sum2s.c (.../branches/gcc-4_8-branch)

31043

@@ -0,0 +1,13 @@

31044

+#include "harness.h"

31045

+

31046

+static void test()

31047

+{

31048

+ vector signed int vsia = {-10,1,2,3};

31049

+ vector signed int vsib = {100,101,102,-103};

31050

+ vector signed int vsir;

31051

+ vector signed int vsier = {0,92,0,-98};

31052

+

31053

+ vsir = vec_sum2s (vsia, vsib);

31054

+

31055

+ check (vec_all_eq (vsir, vsier), "vsir");

31056

+}

31057

Index: gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c

31058

===================================================================

31059

--- a/src/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c (.../tags/gcc_4_8_2_release)

31060

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c (.../branches/gcc-4_8-branch)

31061

@@ -0,0 +1,84 @@

31062

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

31063

+/* { dg-require-effective-target powerpc_vsx_ok } */

31064

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */

31065

+

31066

+#include "harness.h"

31067

+

31068

+static int vec_long_long_eq (vector long long x, vector long long y)

31069

+{

31070

+ return (x[0] == y[0] && x[1] == y[1]);

31071

+}

31072

+

31073

+static int vec_double_eq (vector double x, vector double y)

31074

+{

31075

+ return (x[0] == y[0] && x[1] == y[1]);

31076

+}

31077

+

31078

+static void test()

31079

+{

31080

+ /* Input vectors. */

31081

+ vector long long vla = {-2,-1};

31082

+ vector long long vlb = {0,1};

31083

+ vector double vda = {-2.0,-1.0};

31084

+ vector double vdb = {0.0,1.0};

31085

+ vector unsigned int vuia = {0,1,2,3};

31086

+ vector unsigned int vuib = {4,5,6,7};

31087

+ vector signed int vsia = {-4,-3,-2,-1};

31088

+ vector signed int vsib = {0,1,2,3};

31089

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

31090

+ vector float vfb = {0.0,1.0,2.0,3.0};

31091

+

31092

+ /* Result vectors. */

31093

+ vector long long vlh, vll;

31094

+ vector double vdh, vdl;

31095

+ vector unsigned int vuih, vuil;

31096

+ vector signed int vsih, vsil;

31097

+ vector float vfh, vfl;

31098

+

31099

+ /* Expected result vectors. */

31100

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

31101

+ vector long long vlrh = {1,-1};

31102

+ vector long long vlrl = {0,-2};

31103

+ vector double vdrh = {1.0,-1.0};

31104

+ vector double vdrl = {0.0,-2.0};

31105

+ vector unsigned int vuirh = {6,2,7,3};

31106

+ vector unsigned int vuirl = {4,0,5,1};

31107

+ vector signed int vsirh = {2,-2,3,-1};

31108

+ vector signed int vsirl = {0,-4,1,-3};

31109

+ vector float vfrh = {2.0,-2.0,3.0,-1.0};

31110

+ vector float vfrl = {0.0,-4.0,1.0,-3.0};

31111

+#else

31112

+ vector long long vlrh = {-2,0};

31113

+ vector long long vlrl = {-1,1};

31114

+ vector double vdrh = {-2.0,0.0};

31115

+ vector double vdrl = {-1.0,1.0};

31116

+ vector unsigned int vuirh = {0,4,1,5};

31117

+ vector unsigned int vuirl = {2,6,3,7};

31118

+ vector signed int vsirh = {-4,0,-3,1};

31119

+ vector signed int vsirl = {-2,2,-1,3};

31120

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

31121

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

31122

+#endif

31123

+

31124

+ vlh = vec_mergeh (vla, vlb);

31125

+ vll = vec_mergel (vla, vlb);

31126

+ vdh = vec_mergeh (vda, vdb);

31127

+ vdl = vec_mergel (vda, vdb);

31128

+ vuih = vec_mergeh (vuia, vuib);

31129

+ vuil = vec_mergel (vuia, vuib);

31130

+ vsih = vec_mergeh (vsia, vsib);

31131

+ vsil = vec_mergel (vsia, vsib);

31132

+ vfh = vec_mergeh (vfa, vfb );

31133

+ vfl = vec_mergel (vfa, vfb );

31134

+

31135

+ check (vec_long_long_eq (vlh, vlrh), "vlh");

31136

+ check (vec_long_long_eq (vll, vlrl), "vll");

31137

+ check (vec_double_eq (vdh, vdrh), "vdh" );

31138

+ check (vec_double_eq (vdl, vdrl), "vdl" );

31139

+ check (vec_all_eq (vuih, vuirh), "vuih");

31140

+ check (vec_all_eq (vuil, vuirl), "vuil");

31141

+ check (vec_all_eq (vsih, vsirh), "vsih");

31142

+ check (vec_all_eq (vsil, vsirl), "vsil");

31143

+ check (vec_all_eq (vfh, vfrh), "vfh");

31144

+ check (vec_all_eq (vfl, vfrl), "vfl");

31145

+}

31146

Index: gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c

31147

===================================================================

31148

--- a/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c (.../tags/gcc_4_8_2_release)

31149

+++ b/src/gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c (.../branches/gcc-4_8-branch)

31150

@@ -0,0 +1,64 @@

31151

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

31152

+

31153

+#include "harness.h"

31154

+

31155

+static void test()

31156

+{

31157

+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

31158

+ vector unsigned char vucb = {2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3};

31159

+ vector signed char vsca = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

31160

+ vector signed char vscb = {2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3};

31161

+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};

31162

+ vector unsigned short vusb = {2,3,2,3,2,3,2,3};

31163

+ vector signed short vssa = {-4,-3,-2,-1,0,1,2,3};

31164

+ vector signed short vssb = {2,-3,2,-3,2,-3,2,-3};

31165

+ vector unsigned short vuse, vuso;

31166

+ vector signed short vsse, vsso;

31167

+ vector unsigned int vuie, vuio;

31168

+ vector signed int vsie, vsio;

31169

+

31170

+ vuse = vec_mule (vuca, vucb);

31171

+ vuso = vec_mulo (vuca, vucb);

31172

+ vsse = vec_mule (vsca, vscb);

31173

+ vsso = vec_mulo (vsca, vscb);

31174

+ vuie = vec_mule (vusa, vusb);

31175

+ vuio = vec_mulo (vusa, vusb);

31176

+ vsie = vec_mule (vssa, vssb);

31177

+ vsio = vec_mulo (vssa, vssb);

31178

+

31179

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

31180

+ check (vec_all_eq (vuse,

31181

+ ((vector unsigned short){3,9,15,21,27,33,39,45})),

31182

+ "vuse");

31183

+ check (vec_all_eq (vuso,

31184

+ ((vector unsigned short){0,4,8,12,16,20,24,28})),

31185

+ "vuso");

31186

+ check (vec_all_eq (vsse,

31187

+ ((vector signed short){21,15,9,3,-3,-9,-15,-21})),

31188

+ "vsse");

31189

+ check (vec_all_eq (vsso,

31190

+ ((vector signed short){-16,-12,-8,-4,0,4,8,12})),

31191

+ "vsso");

31192

+ check (vec_all_eq (vuie, ((vector unsigned int){3,9,15,21})), "vuie");

31193

+ check (vec_all_eq (vuio, ((vector unsigned int){0,4,8,12})), "vuio");

31194

+ check (vec_all_eq (vsie, ((vector signed int){9,3,-3,-9})), "vsie");

31195

+ check (vec_all_eq (vsio, ((vector signed int){-8,-4,0,4})), "vsio");

31196

+#else

31197

+ check (vec_all_eq (vuse,

31198

+ ((vector unsigned short){0,4,8,12,16,20,24,28})),

31199

+ "vuse");

31200

+ check (vec_all_eq (vuso,

31201

+ ((vector unsigned short){3,9,15,21,27,33,39,45})),

31202

+ "vuso");

31203

+ check (vec_all_eq (vsse,

31204

+ ((vector signed short){-16,-12,-8,-4,0,4,8,12})),

31205

+ "vsse");

31206

+ check (vec_all_eq (vsso,

31207

+ ((vector signed short){21,15,9,3,-3,-9,-15,-21})),

31208

+ "vsso");

31209

+ check (vec_all_eq (vuie, ((vector unsigned int){0,4,8,12})), "vuie");

31210

+ check (vec_all_eq (vuio, ((vector unsigned int){3,9,15,21})), "vuio");

31211

+ check (vec_all_eq (vsie, ((vector signed int){-8,-4,0,4})), "vsie");

31212

+ check (vec_all_eq (vsio, ((vector signed int){9,3,-3,-9})), "vsio");

31213

+#endif

31214

+}

31215

Index: gcc/testsuite/gcc.dg/vmx/insert-vsx.c

31216

===================================================================

31217

--- a/src/gcc/testsuite/gcc.dg/vmx/insert-vsx.c (.../tags/gcc_4_8_2_release)

31218

+++ b/src/gcc/testsuite/gcc.dg/vmx/insert-vsx.c (.../branches/gcc-4_8-branch)

31219

@@ -0,0 +1,28 @@

31220

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

31221

+/* { dg-require-effective-target powerpc_vsx_ok } */

31222

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

31223

+

31224

+#include "harness.h"

31225

+

31226

+static int vec_long_long_eq (vector long long x, vector long long y)

31227

+{

31228

+ return (x[0] == y[0] && x[1] == y[1]);

31229

+}

31230

+

31231

+static int vec_dbl_eq (vector double x, vector double y)

31232

+{

31233

+ return (x[0] == y[0] && x[1] == y[1]);

31234

+}

31235

+

31236

+static void test()

31237

+{

31238

+ vector long long vl = {0, 1};

31239

+ vector double vd = {0.0, 1.0};

31240

+ vector long long vlr = vec_insert (2, vl, 0);

31241

+ vector double vdr = vec_insert (2.0, vd, 1);

31242

+ vector long long vler = {2, 1};

31243

+ vector double vder = {0.0, 2.0};

31244

+

31245

+ check (vec_long_long_eq (vlr, vler), "vl");

31246

+ check (vec_dbl_eq (vdr, vder), "vd");

31247

+}

31248

Index: gcc/testsuite/gcc.dg/vmx/vsums-be-order.c

31249

===================================================================

31250

--- a/src/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c (.../tags/gcc_4_8_2_release)

31251

+++ b/src/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c (.../branches/gcc-4_8-branch)

31252

@@ -0,0 +1,20 @@

31253

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

31254

+

31255

+#include "harness.h"

31256

+

31257

+static void test()

31258

+{

31259

+ vector signed int va = {-7,11,-13,17};

31260

+

31261

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

31262

+ vector signed int vb = {128,0,0,0};

31263

+ vector signed int evd = {136,0,0,0};

31264

+#else

31265

+ vector signed int vb = {0,0,0,128};

31266

+ vector signed int evd = {0,0,0,136};

31267

+#endif

31268

+

31269

+ vector signed int vd = vec_sums (va, vb);

31270

+

31271

+ check (vec_all_eq (vd, evd), "sums");

31272

+}

31273

Index: gcc/testsuite/gcc.dg/vmx/ldl-vsx.c

31274

===================================================================

31275

--- a/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c (.../tags/gcc_4_8_2_release)

31276

+++ b/src/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c (.../branches/gcc-4_8-branch)

31277

@@ -0,0 +1,39 @@

31278

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

31279

+/* { dg-require-effective-target powerpc_vsx_ok } */

31280

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

31281

+

31282

+#include "harness.h"

31283

+

31284

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

31285

+static double svd[2] __attribute__ ((aligned (16)));

31286

+

31287

+static void init ()

31288

+{

31289

+ unsigned int i;

31290

+ for (i = 0; i < 2; ++i)

31291

+ {

31292

+ svul[i] = i;

31293

+ svd[i] = i * 1.0;

31294

+ }

31295

+}

31296

+

31297

+static void test ()

31298

+{

31299

+ vector unsigned long long evul = {0,1};

31300

+ vector double evd = {0.0,1.0};

31301

+

31302

+ vector unsigned long long vul;

31303

+ vector double vd;

31304

+ unsigned i;

31305

+

31306

+ init ();

31307

+

31308

+ vul = vec_ldl (0, (vector unsigned long long *)svul);

31309

+ vd = vec_ldl (0, (vector double *)svd);

31310

+

31311

+ for (i = 0; i < 2; ++i)

31312

+ {

31313

+ check (vul[i] == evul[i], "vul");

31314

+ check (vd[i] == evd[i], "vd" );

31315

+ }

31316

+}

31317

Index: gcc/testsuite/gcc.dg/vmx/ste.c

31318

===================================================================

31319

--- a/src/gcc/testsuite/gcc.dg/vmx/ste.c (.../tags/gcc_4_8_2_release)

31320

+++ b/src/gcc/testsuite/gcc.dg/vmx/ste.c (.../branches/gcc-4_8-branch)

31321

@@ -0,0 +1,41 @@

31322

+#include "harness.h"

31323

+

31324

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

31325

+static signed char svsc[16] __attribute__ ((aligned (16)));

31326

+static unsigned short svus[8] __attribute__ ((aligned (16)));

31327

+static signed short svss[8] __attribute__ ((aligned (16)));

31328

+static unsigned int svui[4] __attribute__ ((aligned (16)));

31329

+static signed int svsi[4] __attribute__ ((aligned (16)));

31330

+static float svf[4] __attribute__ ((aligned (16)));

31331

+

31332

+static void check_arrays ()

31333

+{

31334

+ check (svuc[9] == 9, "svuc");

31335

+ check (svsc[14] == 6, "svsc");

31336

+ check (svus[7] == 7, "svus");

31337

+ check (svss[1] == -3, "svss");

31338

+ check (svui[3] == 3, "svui");

31339

+ check (svsi[2] == 0, "svsi");

31340

+ check (svf[0] == 0.0, "svf");

31341

+}

31342

+

31343

+static void test ()

31344

+{

31345

+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

31346

+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};

31347

+ vector unsigned short vus = {0,1,2,3,4,5,6,7};

31348

+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};

31349

+ vector unsigned int vui = {0,1,2,3};

31350

+ vector signed int vsi = {-2,-1,0,1};

31351

+ vector float vf = {0.0,1.0,2.0,3.0};

31352

+

31353

+ vec_ste (vuc, 9*1, (unsigned char *)svuc);

31354

+ vec_ste (vsc, 14*1, (signed char *)svsc);

31355

+ vec_ste (vus, 7*2, (unsigned short *)svus);

31356

+ vec_ste (vss, 1*2, (signed short *)svss);

31357

+ vec_ste (vui, 3*4, (unsigned int *)svui);

31358

+ vec_ste (vsi, 2*4, (signed int *)svsi);

31359

+ vec_ste (vf, 0*4, (float *)svf);

31360

+

31361

+ check_arrays ();

31362

+}

31363

Index: gcc/testsuite/gcc.dg/vmx/lde-be-order.c

31364

===================================================================

31365

--- a/src/gcc/testsuite/gcc.dg/vmx/lde-be-order.c (.../tags/gcc_4_8_2_release)

31366

+++ b/src/gcc/testsuite/gcc.dg/vmx/lde-be-order.c (.../branches/gcc-4_8-branch)

31367

@@ -0,0 +1,73 @@

31368

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

31369

+

31370

+#include "harness.h"

31371

+

31372

+static unsigned char svuc[16] __attribute__ ((aligned (16)));

31373

+static signed char svsc[16] __attribute__ ((aligned (16)));

31374

+static unsigned short svus[8] __attribute__ ((aligned (16)));

31375

+static signed short svss[8] __attribute__ ((aligned (16)));

31376

+static unsigned int svui[4] __attribute__ ((aligned (16)));

31377

+static signed int svsi[4] __attribute__ ((aligned (16)));

31378

+static float svf[4] __attribute__ ((aligned (16)));

31379

+

31380

+static void init ()

31381

+{

31382

+ int i;

31383

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

31384

+ for (i = 15; i >= 0; --i)

31385

+#else

31386

+ for (i = 0; i < 16; ++i)

31387

+#endif

31388

+ {

31389

+ svuc[i] = i;

31390

+ svsc[i] = i - 8;

31391

+ }

31392

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

31393

+ for (i = 7; i >= 0; --i)

31394

+#else

31395

+ for (i = 0; i < 8; ++i)

31396

+#endif

31397

+ {

31398

+ svus[i] = i;

31399

+ svss[i] = i - 4;

31400

+ }

31401

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

31402

+ for (i = 3; i >= 0; --i)

31403

+#else

31404

+ for (i = 0; i < 4; ++i)

31405

+#endif

31406

+ {

31407

+ svui[i] = i;

31408

+ svsi[i] = i - 2;

31409

+ svf[i] = i * 1.0f;

31410

+ }

31411

+}

31412

+

31413

+static void test ()

31414

+{

31415

+ vector unsigned char vuc;

31416

+ vector signed char vsc;

31417

+ vector unsigned short vus;

31418

+ vector signed short vss;

31419

+ vector unsigned int vui;

31420

+ vector signed int vsi;

31421

+ vector float vf;

31422

+

31423

+ init ();

31424

+

31425

+ vuc = vec_lde (9*1, (unsigned char *)svuc);

31426

+ vsc = vec_lde (14*1, (signed char *)svsc);

31427

+ vus = vec_lde (7*2, (unsigned short *)svus);

31428

+ vss = vec_lde (1*2, (signed short *)svss);

31429

+ vui = vec_lde (3*4, (unsigned int *)svui);

31430

+ vsi = vec_lde (2*4, (signed int *)svsi);

31431

+ vf = vec_lde (0*4, (float *)svf);

31432

+

31433

+ check (vec_extract (vuc, 9) == 9, "vuc");

31434

+ check (vec_extract (vsc, 14) == 6, "vsc");

31435

+ check (vec_extract (vus, 7) == 7, "vus");

31436

+ check (vec_extract (vss, 1) == -3, "vss");

31437

+ check (vec_extract (vui, 3) == 3, "vui");

31438

+ check (vec_extract (vsi, 2) == 0, "vsi");

31439

+ check (vec_extract (vf, 0) == 0.0, "vf");

31440

+}

31441

Index: gcc/testsuite/gcc.dg/vmx/splat-vsx.c

31442

===================================================================

31443

--- a/src/gcc/testsuite/gcc.dg/vmx/splat-vsx.c (.../tags/gcc_4_8_2_release)

31444

+++ b/src/gcc/testsuite/gcc.dg/vmx/splat-vsx.c (.../branches/gcc-4_8-branch)

31445

@@ -0,0 +1,31 @@

31446

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

31447

+/* { dg-require-effective-target powerpc_vsx_ok } */

31448

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

31449

+

31450

+#include "harness.h"

31451

+

31452

+static void test()

31453

+{

31454

+ /* Input vectors. */

31455

+ vector unsigned int vui = {0,1,2,3};

31456

+ vector signed int vsi = {-2,-1,0,1};

31457

+ vector float vf = {-2.0,-1.0,0.0,1.0};

31458

+

31459

+ /* Result vectors. */

31460

+ vector unsigned int vuir;

31461

+ vector signed int vsir;

31462

+ vector float vfr;

31463

+

31464

+ /* Expected result vectors. */

31465

+ vector unsigned int vuier = {2,2,2,2};

31466

+ vector signed int vsier = {1,1,1,1};

31467

+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};

31468

+

31469

+ vuir = vec_splat (vui, 2);

31470

+ vsir = vec_splat (vsi, 3);

31471

+ vfr = vec_splat (vf, 1);

31472

+

31473

+ check (vec_all_eq (vuir, vuier), "vui");

31474

+ check (vec_all_eq (vsir, vsier), "vsi");

31475

+ check (vec_all_eq (vfr, vfer ), "vf");

31476

+}

31477

Index: gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c

31478

===================================================================

31479

--- a/src/gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c (.../tags/gcc_4_8_2_release)

31480

+++ b/src/gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c (.../branches/gcc-4_8-branch)

31481

@@ -0,0 +1,19 @@

31482

+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */

31483

+

31484

+#include "harness.h"

31485

+

31486

+static void test()

31487

+{

31488

+ vector signed int vsia = {-10,1,2,3};

31489

+ vector signed int vsib = {100,101,102,-103};

31490

+ vector signed int vsir;

31491

+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

31492

+ vector signed int vsier = {91,0,107,0};

31493

+#else

31494

+ vector signed int vsier = {0,92,0,-98};

31495

+#endif

31496

+

31497

+ vsir = vec_sum2s (vsia, vsib);

31498

+

31499

+ check (vec_all_eq (vsir, vsier), "vsir");

31500

+}

31501

Index: gcc/testsuite/gcc.dg/vmx/merge-vsx.c

31502

===================================================================

31503

--- a/src/gcc/testsuite/gcc.dg/vmx/merge-vsx.c (.../tags/gcc_4_8_2_release)

31504

+++ b/src/gcc/testsuite/gcc.dg/vmx/merge-vsx.c (.../branches/gcc-4_8-branch)

31505

@@ -0,0 +1,71 @@

31506

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

31507

+/* { dg-require-effective-target powerpc_vsx_ok } */

31508

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

31509

+

31510

+#include "harness.h"

31511

+

31512

+static int vec_long_long_eq (vector long long x, vector long long y)

31513

+{

31514

+ return (x[0] == y[0] && x[1] == y[1]);

31515

+}

31516

+

31517

+static int vec_double_eq (vector double x, vector double y)

31518

+{

31519

+ return (x[0] == y[0] && x[1] == y[1]);

31520

+}

31521

+

31522

+static void test()

31523

+{

31524

+ /* Input vectors. */

31525

+ vector long long vla = {-2,-1};

31526

+ vector long long vlb = {0,1};

31527

+ vector double vda = {-2.0,-1.0};

31528

+ vector double vdb = {0.0,1.0};

31529

+ vector unsigned int vuia = {0,1,2,3};

31530

+ vector unsigned int vuib = {4,5,6,7};

31531

+ vector signed int vsia = {-4,-3,-2,-1};

31532

+ vector signed int vsib = {0,1,2,3};

31533

+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};

31534

+ vector float vfb = {0.0,1.0,2.0,3.0};

31535

+

31536

+ /* Result vectors. */

31537

+ vector long long vlh, vll;

31538

+ vector double vdh, vdl;

31539

+ vector unsigned int vuih, vuil;

31540

+ vector signed int vsih, vsil;

31541

+ vector float vfh, vfl;

31542

+

31543

+ /* Expected result vectors. */

31544

+ vector long long vlrh = {-2,0};

31545

+ vector long long vlrl = {-1,1};

31546

+ vector double vdrh = {-2.0,0.0};

31547

+ vector double vdrl = {-1.0,1.0};

31548

+ vector unsigned int vuirh = {0,4,1,5};

31549

+ vector unsigned int vuirl = {2,6,3,7};

31550

+ vector signed int vsirh = {-4,0,-3,1};

31551

+ vector signed int vsirl = {-2,2,-1,3};

31552

+ vector float vfrh = {-4.0,0.0,-3.0,1.0};

31553

+ vector float vfrl = {-2.0,2.0,-1.0,3.0};

31554

+

31555

+ vlh = vec_mergeh (vla, vlb);

31556

+ vll = vec_mergel (vla, vlb);

31557

+ vdh = vec_mergeh (vda, vdb);

31558

+ vdl = vec_mergel (vda, vdb);

31559

+ vuih = vec_mergeh (vuia, vuib);

31560

+ vuil = vec_mergel (vuia, vuib);

31561

+ vsih = vec_mergeh (vsia, vsib);

31562

+ vsil = vec_mergel (vsia, vsib);

31563

+ vfh = vec_mergeh (vfa, vfb );

31564

+ vfl = vec_mergel (vfa, vfb );

31565

+

31566

+ check (vec_long_long_eq (vlh, vlrh), "vlh");

31567

+ check (vec_long_long_eq (vll, vlrl), "vll");

31568

+ check (vec_double_eq (vdh, vdrh), "vdh" );

31569

+ check (vec_double_eq (vdl, vdrl), "vdl" );

31570

+ check (vec_all_eq (vuih, vuirh), "vuih");

31571

+ check (vec_all_eq (vuil, vuirl), "vuil");

31572

+ check (vec_all_eq (vsih, vsirh), "vsih");

31573

+ check (vec_all_eq (vsil, vsirl), "vsil");

31574

+ check (vec_all_eq (vfh, vfrh), "vfh");

31575

+ check (vec_all_eq (vfl, vfrl), "vfl");

31576

+}

31577

Index: gcc/testsuite/gcc.dg/vmx/stl-vsx.c

31578

===================================================================

31579

--- a/src/gcc/testsuite/gcc.dg/vmx/stl-vsx.c (.../tags/gcc_4_8_2_release)

31580

+++ b/src/gcc/testsuite/gcc.dg/vmx/stl-vsx.c (.../branches/gcc-4_8-branch)

31581

@@ -0,0 +1,29 @@

31582

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

31583

+/* { dg-require-effective-target powerpc_vsx_ok } */

31584

+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */

31585

+

31586

+#include "harness.h"

31587

+

31588

+static unsigned long long svul[2] __attribute__ ((aligned (16)));

31589

+static double svd[2] __attribute__ ((aligned (16)));

31590

+

31591

+static void check_arrays ()

31592

+{

31593

+ unsigned int i;

31594

+ for (i = 0; i < 2; ++i)

31595

+ {

31596

+ check (svul[i] == i, "svul");

31597

+ check (svd[i] == i * 1.0, "svd");

31598

+ }

31599

+}

31600

+

31601

+static void test ()

31602

+{

31603

+ vector unsigned long long vul = {0,1};

31604

+ vector double vd = {0.0,1.0};

31605

+

31606

+ vec_stl (vul, 0, (vector unsigned long long *)svul);

31607

+ vec_stl (vd, 0, (vector double *)svd);

31608

+

31609

+ check_arrays ();

31610

+}

31611

Index: gcc/testsuite/gcc.dg/strlenopt-4gf.c

31612

===================================================================

31613

--- a/src/gcc/testsuite/gcc.dg/strlenopt-4gf.c (.../tags/gcc_4_8_2_release)

31614

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-4gf.c (.../branches/gcc-4_8-branch)

31615

@@ -7,13 +7,13 @@

31616

#include "strlenopt-4.c"

31617

31618

/* { dg-final { scan-tree-dump-times "strlen \\(" 1 "strlen" } } */

31619

-/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 4 "strlen" } } */

31620

-/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 1 "strlen" } } */

31621

+/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 0 "strlen" } } */

31622

+/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 0 "strlen" } } */

31623

/* { dg-final { scan-tree-dump-times "__strcat_chk \\(" 0 "strlen" } } */

31624

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

31625

-/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 5 "strlen" } } */

31626

-/* { dg-final { scan-tree-dump-times "memcpy \\(" 0 "strlen" } } */

31627

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */

31628

+/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 0 "strlen" } } */

31629

+/* { dg-final { scan-tree-dump-times "memcpy \\(" 4 "strlen" } } */

31630

+/* { dg-final { scan-tree-dump-times "strcpy \\(" 1 "strlen" } } */

31631

/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */

31632

-/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

31633

+/* { dg-final { scan-tree-dump-times "stpcpy \\(" 5 "strlen" } } */

31634

/* { dg-final { cleanup-tree-dump "strlen" } } */

31635

Index: gcc/testsuite/gcc.dg/pr59351.c

31636

===================================================================

31637

--- a/src/gcc/testsuite/gcc.dg/pr59351.c (.../tags/gcc_4_8_2_release)

31638

+++ b/src/gcc/testsuite/gcc.dg/pr59351.c (.../branches/gcc-4_8-branch)

31639

@@ -0,0 +1,8 @@

31640

+/* { dg-do compile } */

31641

+/* { dg-options "-std=c99 -Wpedantic" } */

31642

+

31643

+unsigned int

31644

+foo (void)

31645

+{

31646

+ return sizeof ((int[]) {}); /* { dg-warning "ISO C forbids empty initializer braces" } */

31647

+}

31648

Index: gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c

31649

===================================================================

31650

--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c (.../tags/gcc_4_8_2_release)

31651

+++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c (.../branches/gcc-4_8-branch)

31652

@@ -0,0 +1,7 @@

31653

+/* Test to make sure the macro info includes the predefined macros with line number 0. */

31654

+/* { dg-do compile } */

31655

+/* { dg-options "-g3 -gdwarf-2 -dA -fverbose-asm" } */

31656

+/* { dg-final { scan-assembler "At line number 0" } } */

31657

+

31658

+#define FOO 1

31659

+int i;

31660

Index: gcc/testsuite/gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c

31661

===================================================================

31662

--- a/src/gcc/testsuite/gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c (.../tags/gcc_4_8_2_release)

31663

+++ b/src/gcc/testsuite/gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c (.../branches/gcc-4_8-branch)

31664

@@ -1,6 +1,7 @@

31665

/* { dg-do compile } */

31666

/* { dg-options "-O2 -Wall" } */

31667

/* { dg-options "-O2 -Wall -mabi=altivec" { target { { powerpc*-*-linux* } && ilp32 } } } */

31668

+/* { dg-options "-O2 -Wall -msse2" { target { i?86-*-* x86_64-*-* } } } */

31669

31670

typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));

31671

31672

Index: gcc/testsuite/gcc.dg/builtin-object-size-8.c

31673

===================================================================

31674

--- a/src/gcc/testsuite/gcc.dg/builtin-object-size-8.c (.../tags/gcc_4_8_2_release)

31675

+++ b/src/gcc/testsuite/gcc.dg/builtin-object-size-8.c (.../branches/gcc-4_8-branch)

31676

@@ -1,4 +1,4 @@

31677

-/* { dg-do run { xfail *-*-* } } */

31678

+/* { dg-do run } */

31679

/* { dg-options "-O2" } */

31680

31681

typedef __SIZE_TYPE__ size_t;

31682

Index: gcc/testsuite/gcc.dg/20050922-2.c

31683

===================================================================

31684

--- a/src/gcc/testsuite/gcc.dg/20050922-2.c (.../tags/gcc_4_8_2_release)

31685

+++ b/src/gcc/testsuite/gcc.dg/20050922-2.c (.../branches/gcc-4_8-branch)

31686

@@ -4,7 +4,8 @@

31687

/* { dg-do run } */

31688

/* { dg-options "-O1 -std=c99" } */

31689

31690

-#include <stdlib.h>

31691

+extern void abort (void);

31692

+extern void exit (int);

31693

31694

#if __INT_MAX__ == 2147483647

31695

typedef unsigned int uint32_t;

31696

Index: gcc/testsuite/gcc.dg/graphite/pr55022.c

31697

===================================================================

31698

--- a/src/gcc/testsuite/gcc.dg/graphite/pr55022.c (.../tags/gcc_4_8_2_release)

31699

+++ b/src/gcc/testsuite/gcc.dg/graphite/pr55022.c (.../branches/gcc-4_8-branch)

31700

@@ -0,0 +1,27 @@

31701

+/* { dg-do run } */

31702

+/* { dg-options "-O2 -fgraphite-identity" } */

31703

+

31704

+extern void abort (void);

31705

+

31706

+void __attribute__((noinline,noclone))

31707

+f(int *limit, int minLen, int maxLen)

31708

+{

31709

+ int i;

31710

+

31711

+ for (i = minLen; i <= maxLen; i++) {

31712

+ limit[i] = i;

31713

+ }

31714

+}

31715

+

31716

+int main()

31717

+{

31718

+ int limit[256], i;

31719

+ f (limit, 0, 255);

31720

+ for (i = 0; i < 256; ++i)

31721

+ {

31722

+ if (limit[i] != i)

31723

+ abort ();

31724

+ __asm__ volatile ("" : : : "memory");

31725

+ }

31726

+ return 0;

31727

+}

31728

Index: gcc/testsuite/gcc.dg/graphite/pr59817-2.c

31729

===================================================================

31730

--- a/src/gcc/testsuite/gcc.dg/graphite/pr59817-2.c (.../tags/gcc_4_8_2_release)

31731

+++ b/src/gcc/testsuite/gcc.dg/graphite/pr59817-2.c (.../branches/gcc-4_8-branch)

31732

@@ -0,0 +1,15 @@

31733

+/* { dg-do compile } */

31734

+/* { dg-options "-O2 -floop-interchange" } */

31735

+

31736

+void

31737

+xl(void)

31738

+{

31739

+ static int j3;

31740

+ for (j3 = 0; j3 < 1; ++j3) {

31741

+ static int f2;

31742

+ static int w7;

31743

+ short int b5;

31744

+ int ok;

31745

+ f2 = (b5 += ok) ? (w7 = 0): (w7 ? 0 : (f2 = ok));

31746

+ }

31747

+}

31748

Index: gcc/testsuite/gcc.dg/graphite/pr60740.c

31749

===================================================================

31750

--- a/src/gcc/testsuite/gcc.dg/graphite/pr60740.c (.../tags/gcc_4_8_2_release)

31751

+++ b/src/gcc/testsuite/gcc.dg/graphite/pr60740.c (.../branches/gcc-4_8-branch)

31752

@@ -0,0 +1,16 @@

31753

+/* { dg-options "-O2 -floop-interchange" } */

31754

+

31755

+int **db6 = 0;

31756

+

31757

+void

31758

+k26(void)

31759

+{

31760

+ static int geb = 0;

31761

+ int *a22 = &geb;

31762

+ int **l30 = &a22;

31763

+ int *c4b;

31764

+ int ndf;

31765

+ for (ndf = 0; ndf <= 1; ++ndf)

31766

+ *c4b = (db6 == l30) && (*a22)--;

31767

+}

31768

+

31769

Index: gcc/testsuite/gcc.dg/graphite/pr59817-1.c

31770

===================================================================

31771

--- a/src/gcc/testsuite/gcc.dg/graphite/pr59817-1.c (.../tags/gcc_4_8_2_release)

31772

+++ b/src/gcc/testsuite/gcc.dg/graphite/pr59817-1.c (.../branches/gcc-4_8-branch)

31773

@@ -0,0 +1,16 @@

31774

+/* { dg-do compile } */

31775

+/* { dg-options "-O2 -floop-interchange" } */

31776

+

31777

+int kd;

31778

+

31779

+void

31780

+n2(void)

31781

+{

31782

+ static int so;

31783

+ static short int i5;

31784

+ int wj;

31785

+ int *il;

31786

+ int *nk = &so;

31787

+ for (wj = 0; wj < 2; ++wj)

31788

+ *nk = ((i5 += *il) || kd );

31789

+}

31790

Index: gcc/testsuite/gcc.dg/pr59860.c

31791

===================================================================

31792

--- a/src/gcc/testsuite/gcc.dg/pr59860.c (.../tags/gcc_4_8_2_release)

31793

+++ b/src/gcc/testsuite/gcc.dg/pr59860.c (.../branches/gcc-4_8-branch)

31794

@@ -0,0 +1,15 @@

31795

+/* { dg-do compile } */

31796

+/* { dg-options "-O" } */

31797

+

31798

+extern __inline __attribute__ ((__always_inline__)) __attribute__ ((__gnu_inline__)) __attribute__ ((__artificial__)) char * __attribute__ ((__nothrow__ , __leaf__))

31799

+strcat (char *__restrict __dest, const char *__restrict __src)

31800

+{

31801

+ return __builtin___strcat_chk (__dest, __src, __builtin_object_size (__dest, 2 > 1));

31802

+}

31803

+static char raw_decode;

31804

+void foo (char **argv, char *outfilename)

31805

+{

31806

+ if (**argv == 'r')

31807

+ raw_decode = 1;

31808

+ strcat (outfilename, raw_decode ? ".raw" : ".wav");

31809

+}

31810

Index: gcc/testsuite/gcc.dg/stack-usage-1.c

31811

===================================================================

31812

--- a/src/gcc/testsuite/gcc.dg/stack-usage-1.c (.../tags/gcc_4_8_2_release)

31813

+++ b/src/gcc/testsuite/gcc.dg/stack-usage-1.c (.../branches/gcc-4_8-branch)

31814

@@ -38,7 +38,11 @@

31815

# endif

31816

#elif defined (__powerpc64__) || defined (__ppc64__) || defined (__POWERPC64__) \

31817

|| defined (__PPC64__)

31818

-# define SIZE 180

31819

+# if _CALL_ELF == 2

31820

+# define SIZE 208

31821

+# else

31822

+# define SIZE 180

31823

+# endif

31824

#elif defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) \

31825

|| defined (__POWERPC__) || defined (PPC) || defined (_IBMR2)

31826

# if defined (__ALTIVEC__)

31827

Index: gcc/testsuite/gcc.dg/pr59011.c

31828

===================================================================

31829

--- a/src/gcc/testsuite/gcc.dg/pr59011.c (.../tags/gcc_4_8_2_release)

31830

+++ b/src/gcc/testsuite/gcc.dg/pr59011.c (.../branches/gcc-4_8-branch)

31831

@@ -0,0 +1,22 @@

31832

+/* PR middle-end/59011 */

31833

+/* { dg-do compile } */

31834

+/* { dg-options "-std=gnu99" } */

31835

+

31836

+void

31837

+foo (int m)

31838

+{

31839

+ int a[m];

31840

+ void

31841

+ bar (void)

31842

+ {

31843

+ {

31844

+ int

31845

+ baz (void)

31846

+ {

31847

+ return a[0];

31848

+ }

31849

+ }

31850

+ a[0] = 42;

31851

+ }

31852

+ bar ();

31853

+}

31854

Index: gcc/testsuite/gcc.dg/pr58805.c

31855

===================================================================

31856

--- a/src/gcc/testsuite/gcc.dg/pr58805.c (.../tags/gcc_4_8_2_release)

31857

+++ b/src/gcc/testsuite/gcc.dg/pr58805.c (.../branches/gcc-4_8-branch)

31858

@@ -0,0 +1,24 @@

31859

+/* { dg-do compile } */

31860

+/* { dg-options "-O2 -ftree-tail-merge -fdump-tree-pre" } */

31861

+

31862

+/* Type that matches the 'p' constraint. */

31863

+#define TYPE void *

31864

+

31865

+static inline

31866

+void bar (TYPE *r)

31867

+{

31868

+ TYPE t;

31869

+ __asm__ ("" : "=&p" (t), "=p" (*r));

31870

+}

31871

+

31872

+void

31873

+foo (int n, TYPE *x, TYPE *y)

31874

+{

31875

+ if (n == 0)

31876

+ bar (x);

31877

+ else

31878

+ bar (y);

31879

+}

31880

+

31881

+/* { dg-final { scan-tree-dump-times "__asm__" 2 "pre"} } */

31882

+/* { dg-final { cleanup-tree-dump "pre" } } */

31883

Index: gcc/testsuite/gcc.dg/strlenopt-14gf.c

31884

===================================================================

31885

--- a/src/gcc/testsuite/gcc.dg/strlenopt-14gf.c (.../tags/gcc_4_8_2_release)

31886

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-14gf.c (.../branches/gcc-4_8-branch)

31887

@@ -11,14 +11,14 @@

31888

memcpy. */

31889

/* { dg-final { scan-tree-dump-times "strlen \\(" 4 "strlen" } } */

31890

/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 0 "strlen" } } */

31891

-/* { dg-final { scan-tree-dump-times "__mempcpy_chk \\(" 2 "strlen" } } */

31892

+/* { dg-final { scan-tree-dump-times "__mempcpy_chk \\(" 0 "strlen" } } */

31893

/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 0 "strlen" } } */

31894

/* { dg-final { scan-tree-dump-times "__strcat_chk \\(" 0 "strlen" } } */

31895

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

31896

-/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 3 "strlen" } } */

31897

-/* { dg-final { scan-tree-dump-times "memcpy \\(" 0 "strlen" } } */

31898

-/* { dg-final { scan-tree-dump-times "mempcpy \\(" 0 "strlen" } } */

31899

+/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 0 "strlen" } } */

31900

+/* { dg-final { scan-tree-dump-times "memcpy \\(" 1 "strlen" } } */

31901

+/* { dg-final { scan-tree-dump-times "mempcpy \\(" 2 "strlen" } } */

31902

/* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */

31903

/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */

31904

-/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

31905

+/* { dg-final { scan-tree-dump-times "stpcpy \\(" 2 "strlen" } } */

31906

/* { dg-final { cleanup-tree-dump "strlen" } } */

31907

Index: gcc/testsuite/gcc.dg/torture/pr57425-2.c

31908

===================================================================

31909

--- a/src/gcc/testsuite/gcc.dg/torture/pr57425-2.c (.../tags/gcc_4_8_2_release)

31910

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57425-2.c (.../branches/gcc-4_8-branch)

31911

@@ -0,0 +1,31 @@

31912

+/* { dg-do run } */

31913

+

31914

+extern void abort (void) __attribute__((noreturn));

31915

+

31916

+int

31917

+main ()

31918

+{

31919

+ int sum = 0;

31920

+ {

31921

+ int a[20];

31922

+ int *c;

31923

+ c = a;

31924

+ asm ("": "=r" (c):"0" (c));

31925

+ *c = 0;

31926

+ asm ("": "=r" (c):"0" (c));

31927

+ sum += *c;

31928

+ }

31929

+ {

31930

+ long b[10];

31931

+ long *c;

31932

+ c = b;

31933

+ asm ("": "=r" (c):"0" (c));

31934

+ *c = 1;

31935

+ asm ("": "=r" (c):"0" (c));

31936

+ sum += *c;

31937

+ }

31938

+

31939

+ if (sum != 1)

31940

+ abort();

31941

+ return 0;

31942

+}

31943

Index: gcc/testsuite/gcc.dg/torture/pr57425-3.c

31944

===================================================================

31945

--- a/src/gcc/testsuite/gcc.dg/torture/pr57425-3.c (.../tags/gcc_4_8_2_release)

31946

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57425-3.c (.../branches/gcc-4_8-branch)

31947

@@ -0,0 +1,31 @@

31948

+/* { dg-do run } */

31949

+

31950

+extern void abort (void) __attribute__((noreturn));

31951

+

31952

+int

31953

+main ()

31954

+{

31955

+ int sum = 0;

31956

+ {

31957

+ long a[20];

31958

+ long *c;

31959

+ c = a;

31960

+ asm ("": "=r" (c):"0" (c));

31961

+ *c = 0;

31962

+ asm ("": "=r" (c):"0" (c));

31963

+ sum += *c;

31964

+ }

31965

+ {

31966

+ long long b[10];

31967

+ long long *c;

31968

+ c = b;

31969

+ asm ("": "=r" (c):"0" (c));

31970

+ *c = 1;

31971

+ asm ("": "=r" (c):"0" (c));

31972

+ sum += *c;

31973

+ }

31974

+

31975

+ if (sum != 1)

31976

+ abort();

31977

+ return 0;

31978

+}

31979

Index: gcc/testsuite/gcc.dg/torture/pr59047.c

31980

===================================================================

31981

--- a/src/gcc/testsuite/gcc.dg/torture/pr59047.c (.../tags/gcc_4_8_2_release)

31982

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59047.c (.../branches/gcc-4_8-branch)

31983

@@ -0,0 +1,39 @@

31984

+/* { dg-do run } */

31985

+

31986

+extern void abort (void);

31987

+

31988

+struct

31989

+{

31990

+ int f0;

31991

+ int f1:1;

31992

+ int f2:2;

31993

+} a = {0, 0, 1};

31994

+

31995

+int b, c, *d, e, f;

31996

+

31997

+int

31998

+fn1 ()

31999

+{

32000

+ for (; b < 1; ++b)

32001

+ {

32002

+ for (e = 0; e < 1; e = 1)

32003

+ {

32004

+ int **g = &d;

32005

+ *g = &c;

32006

+ }

32007

+ *d = 0;

32008

+ f = a.f1;

32009

+ if (f)

32010

+ return 0;

32011

+ }

32012

+ return 0;

32013

+}

32014

+

32015

+int

32016

+main ()

32017

+{

32018

+ fn1 ();

32019

+ if (b != 1)

32020

+ abort ();

32021

+ return 0;

32022

+}

32023

Index: gcc/testsuite/gcc.dg/torture/pr58956.c

32024

===================================================================

32025

--- a/src/gcc/testsuite/gcc.dg/torture/pr58956.c (.../tags/gcc_4_8_2_release)

32026

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58956.c (.../branches/gcc-4_8-branch)

32027

@@ -0,0 +1,30 @@

32028

+/* { dg-do run } */

32029

+

32030

+extern void abort (void);

32031

+

32032

+struct S

32033

+{

32034

+ int f0;

32035

+} a = {1}, b, g, *c = &b, **f = &c;

32036

+

32037

+int *d, **e = &d, h;

32038

+

32039

+struct S

32040

+foo ()

32041

+{

32042

+ *e = &h;

32043

+ if (!d)

32044

+ __builtin_unreachable ();

32045

+ *f = &g;

32046

+ return a;

32047

+}

32048

+

32049

+int

32050

+main ()

32051

+{

32052

+ struct S *i = c;

32053

+ *i = foo ();

32054

+ if (b.f0 != 1)

32055

+ abort ();

32056

+ return 0;

32057

+}

32058

Index: gcc/testsuite/gcc.dg/torture/pr60183.c

32059

===================================================================

32060

--- a/src/gcc/testsuite/gcc.dg/torture/pr60183.c (.../tags/gcc_4_8_2_release)

32061

+++ b/src/gcc/testsuite/gcc.dg/torture/pr60183.c (.../branches/gcc-4_8-branch)

32062

@@ -0,0 +1,38 @@

32063

+/* { dg-do run } */

32064

+

32065

+/* Large so an out-of-bound read will crash. */

32066

+unsigned char c[0x30001] = { 1 };

32067

+int j = 2;

32068

+

32069

+static void

32070

+foo (unsigned long *x, unsigned char *y)

32071

+{

32072

+ int i;

32073

+ unsigned long w = x[0];

32074

+ for (i = 0; i < j; i++)

32075

+ {

32076

+ w += *y;

32077

+ y += 0x10000;

32078

+ w += *y;

32079

+ y += 0x10000;

32080

+ }

32081

+ x[1] = w;

32082

+}

32083

+

32084

+__attribute__ ((noinline, noclone)) void

32085

+bar (unsigned long *x)

32086

+{

32087

+ foo (x, c);

32088

+}

32089

+

32090

+int

32091

+main ()

32092

+{

32093

+ unsigned long a[2] = { 0, -1UL };

32094

+ asm volatile (""::"r" (c):"memory");

32095

+ c[0] = 0;

32096

+ bar (a);

32097

+ if (a[1] != 0)

32098

+ __builtin_abort ();

32099

+ return 0;

32100

+}

32101

Index: gcc/testsuite/gcc.dg/torture/pr57517.c

32102

===================================================================

32103

--- a/src/gcc/testsuite/gcc.dg/torture/pr57517.c (.../tags/gcc_4_8_2_release)

32104

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57517.c (.../branches/gcc-4_8-branch)

32105

@@ -0,0 +1,16 @@

32106

+/* { dg-do compile } */

32107

+

32108

+int x[1024], y[1024], z[1024], w[1024];

32109

+void foo (void)

32110

+{

32111

+ int i;

32112

+ for (i = 1; i < 1024; ++i)

32113

+ {

32114

+ int a = x[i];

32115

+ int b = y[i];

32116

+ int c = x[i-1];

32117

+ int d = y[i-1];

32118

+ if (w[i])

32119

+ z[i] = (a + b) + (c + d);

32120

+ }

32121

+}

32122

Index: gcc/testsuite/gcc.dg/torture/pr59891.c

32123

===================================================================

32124

--- a/src/gcc/testsuite/gcc.dg/torture/pr59891.c (.../tags/gcc_4_8_2_release)

32125

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59891.c (.../branches/gcc-4_8-branch)

32126

@@ -0,0 +1,9 @@

32127

+/* PR c/59891 */

32128

+

32129

+unsigned int a;

32130

+

32131

+int

32132

+main ()

32133

+{

32134

+ return (0 ? a : 0) ? : 0 % 0; /* { dg-warning "division by zero" } */

32135

+}

32136

Index: gcc/testsuite/gcc.dg/torture/pr59164.c

32137

===================================================================

32138

--- a/src/gcc/testsuite/gcc.dg/torture/pr59164.c (.../tags/gcc_4_8_2_release)

32139

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59164.c (.../branches/gcc-4_8-branch)

32140

@@ -0,0 +1,21 @@

32141

+/* { dg-do compile } */

32142

+

32143

+int a, d, e;

32144

+long b[10];

32145

+int c[10][8];

32146

+

32147

+int fn1(p1)

32148

+{

32149

+ return 1 >> p1;

32150

+}

32151

+

32152

+void fn2(void)

32153

+{

32154

+ int f;

32155

+ for (a=1; a <= 4; a++)

32156

+ {

32157

+ f = fn1(0 < c[a][0]);

32158

+ if (f || d)

32159

+ e = b[a] = 1;

32160

+ }

32161

+}

32162

Index: gcc/testsuite/gcc.dg/torture/pr58779.c

32163

===================================================================

32164

--- a/src/gcc/testsuite/gcc.dg/torture/pr58779.c (.../tags/gcc_4_8_2_release)

32165

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58779.c (.../branches/gcc-4_8-branch)

32166

@@ -0,0 +1,12 @@

32167

+/* { dg-do run } */

32168

+

32169

+int a, c;

32170

+

32171

+int main ()

32172

+{

32173

+ int e = -1;

32174

+ short d = (c <= 0) ^ e;

32175

+ if ((unsigned int) a - (a || d) <= (unsigned int) a)

32176

+ __builtin_abort ();

32177

+ return 0;

32178

+}

32179

Index: gcc/testsuite/gcc.dg/torture/pr59139.c

32180

===================================================================

32181

--- a/src/gcc/testsuite/gcc.dg/torture/pr59139.c (.../tags/gcc_4_8_2_release)

32182

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59139.c (.../branches/gcc-4_8-branch)

32183

@@ -0,0 +1,20 @@

32184

+/* { dg-do compile } */

32185

+

32186

+int a, b, c, d, e;

32187

+int fn1(p1, p2) { return p2 == 0 ? p1 : 1 % p2; }

32188

+

32189

+void fn2()

32190

+{

32191

+ c = 0;

32192

+ for (;; c = (unsigned short)c)

32193

+ {

32194

+ b = 2;

32195

+ for (; b; b = a)

32196

+ {

32197

+ e = fn1(2, c && 1);

32198

+ d = c == 0 ? e : c;

32199

+ if (d)

32200

+ return;

32201

+ }

32202

+ }

32203

+}

32204

Index: gcc/testsuite/gcc.dg/torture/pr58079.c

32205

===================================================================

32206

--- a/src/gcc/testsuite/gcc.dg/torture/pr58079.c (.../tags/gcc_4_8_2_release)

32207

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58079.c (.../branches/gcc-4_8-branch)

32208

@@ -0,0 +1,107 @@

32209

+/* { dg-options "-mlong-calls" { target mips*-*-* } } */

32210

+

32211

+typedef unsigned char u8;

32212

+typedef unsigned short u16;

32213

+typedef unsigned int __kernel_size_t;

32214

+typedef __kernel_size_t size_t;

32215

+struct list_head {

32216

+ struct list_head *next;

32217

+};

32218

+

32219

+struct dmx_ts_feed {

32220

+ int is_filtering;

32221

+};

32222

+struct dmx_section_feed {

32223

+ u16 secbufp;

32224

+ u16 seclen;

32225

+ u16 tsfeedp;

32226

+};

32227

+

32228

+typedef int (*dmx_ts_cb) (

32229

+ const u8 * buffer1,

32230

+ size_t buffer1_length,

32231

+ const u8 * buffer2,

32232

+ size_t buffer2_length

32233

+);

32234

+

32235

+struct dvb_demux_feed {

32236

+ union {

32237

+ struct dmx_ts_feed ts;

32238

+ struct dmx_section_feed sec;

32239

+ } feed;

32240

+ union {

32241

+ dmx_ts_cb ts;

32242

+ } cb;

32243

+ int type;

32244

+ u16 pid;

32245

+ int ts_type;

32246

+ struct list_head list_head;

32247

+};

32248

+

32249

+struct dvb_demux {

32250

+ int (*stop_feed)(struct dvb_demux_feed *feed);

32251

+ struct list_head feed_list;

32252

+};

32253

+

32254

+

32255

+static

32256

+inline

32257

+__attribute__((always_inline))

32258

+u8

32259

+payload(const u8 *tsp)

32260

+{

32261

+ if (tsp[3] & 0x20) {

32262

+ return 184 - 1 - tsp[4];

32263

+ }

32264

+ return 184;

32265

+}

32266

+

32267

+static

32268

+inline

32269

+__attribute__((always_inline))

32270

+int

32271

+dvb_dmx_swfilter_payload(struct dvb_demux_feed *feed, const u8 *buf)

32272

+{

32273

+ int count = payload(buf);

32274

+ int p;

32275

+ if (count == 0)

32276

+ return -1;

32277

+ return feed->cb.ts(&buf[p], count, ((void *)0), 0);

32278

+}

32279

+

32280

+static

32281

+inline

32282

+__attribute__((always_inline))

32283

+void

32284

+dvb_dmx_swfilter_packet_type(struct dvb_demux_feed *feed, const u8 *buf)

32285

+{

32286

+ switch (feed->type) {

32287

+ case 0:

32288

+ if (feed->ts_type & 1) {

32289

+ dvb_dmx_swfilter_payload(feed, buf);

32290

+ }

32291

+ if (dvb_dmx_swfilter_section_packet(feed, buf) < 0)

32292

+ feed->feed.sec.seclen = feed->feed.sec.secbufp = 0;

32293

+ }

32294

+}

32295

+

32296

+static

32297

+void

32298

+dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf)

32299

+{

32300

+ struct dvb_demux_feed *feed;

32301

+ int dvr_done = 0;

32302

+

32303

+ for (feed = ({ const typeof( ((typeof(*feed) *)0)->list_head ) *__mptr = ((&demux->feed_list)->next); (typeof(*feed) *)( (char *)__mptr - __builtin_offsetof(typeof(*feed),list_head) );}); __builtin_prefetch(feed->list_head.next), &feed->list_head != (&demux->feed_list); feed = ({ const typeof( ((typeof(*feed) *)0)->list_head ) *__mptr = (feed->list_head.next); (typeof(*feed) *)( (char *)__mptr - __builtin_offsetof(typeof(*feed),list_head) );})) {

32304

+ if (((((feed)->type == 0) && ((feed)->feed.ts.is_filtering) && (((feed)->ts_type & (1 | 8)) == 1))) && (dvr_done++))

32305

+ dvb_dmx_swfilter_packet_type(feed, buf);

32306

+ else if (feed->pid == 0x2000)

32307

+ feed->cb.ts(buf, 188, ((void *)0), 0);

32308

+ }

32309

+}

32310

+void dvb_dmx_swfilter_packets(struct dvb_demux *demux, const u8 *buf, size_t count)

32311

+{

32312

+ while (count--) {

32313

+ dvb_dmx_swfilter_packet(demux, buf);

32314

+ }

32315

+}

32316

Index: gcc/testsuite/gcc.dg/torture/pr60903.c

32317

===================================================================

32318

--- a/src/gcc/testsuite/gcc.dg/torture/pr60903.c (.../tags/gcc_4_8_2_release)

32319

+++ b/src/gcc/testsuite/gcc.dg/torture/pr60903.c (.../branches/gcc-4_8-branch)

32320

@@ -0,0 +1,22 @@

32321

+/* { dg-do compile } */

32322

+

32323

+extern int a, b, k, q;

32324

+

32325

+void

32326

+foo ()

32327

+{

32328

+ if (a)

32329

+ {

32330

+ while (q)

32331

+ {

32332

+ lbl:

32333

+ if (a)

32334

+ {

32335

+ a = 0;

32336

+ goto lbl;

32337

+ }

32338

+ }

32339

+ b = k;

32340

+ }

32341

+ goto lbl;

32342

+}

32343

Index: gcc/testsuite/gcc.dg/torture/pr58830.c

32344

===================================================================

32345

--- a/src/gcc/testsuite/gcc.dg/torture/pr58830.c (.../tags/gcc_4_8_2_release)

32346

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58830.c (.../branches/gcc-4_8-branch)

32347

@@ -0,0 +1,42 @@

32348

+/* { dg-do run } */

32349

+/* { dg-additional-options "-ftree-pre -ftree-partial-pre" } */

32350

+

32351

+extern void abort (void);

32352

+

32353

+int b, c, d, f, g, h, i, j[6], *l = &b, *m, n, *o, r;

32354

+char k;

32355

+

32356

+static int

32357

+foo ()

32358

+{

32359

+ char *p = &k;

32360

+

32361

+ for (; d; d++)

32362

+ if (i)

32363

+ h = 0;

32364

+ else

32365

+ h = c || (r = 0);

32366

+

32367

+ for (f = 0; f < 2; f++)

32368

+ {

32369

+ unsigned int q;

32370

+ *l = 0;

32371

+ if (n)

32372

+ *m = g;

32373

+ if (g)

32374

+ o = 0;

32375

+ for (q = -8; q >= 5; q++)

32376

+ (*p)--;

32377

+ }

32378

+

32379

+ return 0;

32380

+}

32381

+

32382

+int

32383

+main ()

32384

+{

32385

+ foo ();

32386

+ if (j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[0]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]] ^ (k & 15)] != 0)

32387

+ abort ();

32388

+ return 0;

32389

+}

32390

Index: gcc/testsuite/gcc.dg/torture/pr60930.c

32391

===================================================================

32392

--- a/src/gcc/testsuite/gcc.dg/torture/pr60930.c (.../tags/gcc_4_8_2_release)

32393

+++ b/src/gcc/testsuite/gcc.dg/torture/pr60930.c (.../branches/gcc-4_8-branch)

32394

@@ -0,0 +1,22 @@

32395

+/* { dg-do run } */

32396

+

32397

+int x = 1;

32398

+

32399

+__attribute__((noinline, noclone)) void

32400

+foo (unsigned long long t)

32401

+{

32402

+ asm volatile ("" : : "r" (&t));

32403

+ if (t == 1)

32404

+ __builtin_abort ();

32405

+}

32406

+

32407

+int

32408

+main ()

32409

+{

32410

+#if __SIZEOF_LONG_LONG__ >= 8

32411

+ unsigned long long t = 0xffffffffffffffffULL * (0xffffffffUL * x);

32412

+ if (t != 0xffffffff00000001ULL)

32413

+ foo (t);;

32414

+#endif

32415

+ return 0;

32416

+}

32417

Index: gcc/testsuite/gcc.dg/torture/pr59715.c

32418

===================================================================

32419

--- a/src/gcc/testsuite/gcc.dg/torture/pr59715.c (.../tags/gcc_4_8_2_release)

32420

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59715.c (.../branches/gcc-4_8-branch)

32421

@@ -0,0 +1,21 @@

32422

+/* { dg-do run } */

32423

+

32424

+extern void abort (void);

32425

+

32426

+int a = 2, b;

32427

+

32428

+int

32429

+main ()

32430

+{

32431

+ int c;

32432

+ if (!b)

32433

+ {

32434

+ b = a;

32435

+ c = a == 0 ? 1 : 1 % a;

32436

+ if (c)

32437

+ b = 0;

32438

+ }

32439

+ if (b != 0)

32440

+ abort ();

32441

+ return 0;

32442

+}

32443

Index: gcc/testsuite/gcc.dg/torture/pr60115.c

32444

===================================================================

32445

--- a/src/gcc/testsuite/gcc.dg/torture/pr60115.c (.../tags/gcc_4_8_2_release)

32446

+++ b/src/gcc/testsuite/gcc.dg/torture/pr60115.c (.../branches/gcc-4_8-branch)

32447

@@ -0,0 +1,14 @@

32448

+/* { dg-do run } */

32449

+

32450

+int a, b[2];

32451

+

32452

+int

32453

+main ()

32454

+{

32455

+lbl:

32456

+ for (; a; a--)

32457

+ if (b[10000])

32458

+ goto lbl;

32459

+

32460

+ return 0;

32461

+}

32462

Index: gcc/testsuite/gcc.dg/torture/pr59903.c

32463

===================================================================

32464

--- a/src/gcc/testsuite/gcc.dg/torture/pr59903.c (.../tags/gcc_4_8_2_release)

32465

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59903.c (.../branches/gcc-4_8-branch)

32466

@@ -0,0 +1,56 @@

32467

+/* { dg-do compile } */

32468

+

32469

+int a, b, c, d, e, f, g, h, i[3], l, m, n, o, p, q, r;

32470

+

32471

+struct S0

32472

+{

32473

+ int f0;

32474

+ int f1;

32475

+ int f2;

32476

+ int f3;

32477

+} j;

32478

+

32479

+static int

32480

+fn1 (int p1)

32481

+{

32482

+ return p1 || ((p1 > 0) > (e << 1));

32483

+}

32484

+

32485

+static struct S0

32486

+fn2 (struct S0 p1)

32487

+{

32488

+ char s;

32489

+ struct S0 t = {0,0,0,0};

32490

+ int u = 2;

32491

+ for (;;)

32492

+ {

32493

+ if (i[0])

32494

+ break;

32495

+ for (m = 0; m < 4; m++)

32496

+ for (p1.f0 = 0; p1.f0 < 3; p1.f0++)

32497

+ {

32498

+ j = t;

32499

+ t.f3 = i[p1.f0];

32500

+ o = b || 1 >> b ? 0 : a < 0;

32501

+ q = 1 % d;

32502

+ if ((g < fn1 ((1 ^ (q & 1)) | n)) ^ u)

32503

+ j.f3 |= p % 2;

32504

+ s = j.f3 > 0 ? j.f3 : j.f3 << 1;

32505

+ r = l = s && p1.f1 * c;

32506

+ h = p1.f1;

32507

+ }

32508

+ }

32509

+ return p1;

32510

+}

32511

+

32512

+int

32513

+main ()

32514

+{

32515

+ for (;f;)

32516

+ {

32517

+ struct S0 v = {0,0,0,0};

32518

+ fn2 (v);

32519

+ j.f3 = 0;

32520

+ }

32521

+ return 0;

32522

+}

32523

Index: gcc/testsuite/gcc.dg/torture/pr58143-1.c

32524

===================================================================

32525

--- a/src/gcc/testsuite/gcc.dg/torture/pr58143-1.c (.../tags/gcc_4_8_2_release)

32526

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58143-1.c (.../branches/gcc-4_8-branch)

32527

@@ -0,0 +1,51 @@

32528

+/* { dg-do run } */

32529

+/* { dg-additional-options "-fstrict-overflow" } */

32530

+

32531

+extern void abort (void);

32532

+

32533

+int a, b, c, d, e, f, g, h = 1, i;

32534

+

32535

+int foo (int p)

32536

+{

32537

+ return p < 0 && a < - __INT_MAX__ - 1 - p ? 0 : 1;

32538

+}

32539

+

32540

+int *bar ()

32541

+{

32542

+ int j;

32543

+ i = h ? 0 : 1 % h;

32544

+ for (j = 0; j < 1; j++)

32545

+ for (d = 0; d; d++)

32546

+ for (e = 1; e;)

32547

+ return 0;

32548

+ return 0;

32549

+}

32550

+

32551

+int baz ()

32552

+{

32553

+ for (; b >= 0; b--)

32554

+ for (c = 1; c >= 0; c--)

32555

+ {

32556

+ int *k = &c;

32557

+ for (;;)

32558

+ {

32559

+ for (f = 0; f < 1; f++)

32560

+ {

32561

+ g = foo (*k);

32562

+ bar ();

32563

+ }

32564

+ if (*k)

32565

+ break;

32566

+ return 0;

32567

+ }

32568

+ }

32569

+ return 0;

32570

+}

32571

+

32572

+int main ()

32573

+{

32574

+ baz ();

32575

+ if (b != 0)

32576

+ abort ();

32577

+ return 0;

32578

+}

32579

Index: gcc/testsuite/gcc.dg/torture/pr58143-2.c

32580

===================================================================

32581

--- a/src/gcc/testsuite/gcc.dg/torture/pr58143-2.c (.../tags/gcc_4_8_2_release)

32582

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58143-2.c (.../branches/gcc-4_8-branch)

32583

@@ -0,0 +1,34 @@

32584

+/* { dg-do run } */

32585

+/* { dg-additional-options "-fstrict-overflow" } */

32586

+

32587

+int a, b, d, e, f, *g, h, i;

32588

+volatile int c;

32589

+

32590

+char foo (unsigned char p)

32591

+{

32592

+ return p + 1;

32593

+}

32594

+

32595

+int bar ()

32596

+{

32597

+ for (h = 0; h < 3; h = foo (h))

32598

+ {

32599

+ c;

32600

+ for (f = 0; f < 1; f++)

32601

+ {

32602

+ i = a && 0 < -__INT_MAX__ - h ? 0 : 1;

32603

+ if (e)

32604

+ for (; d;)

32605

+ b = 0;

32606

+ else

32607

+ g = 0;

32608

+ }

32609

+ }

32610

+ return 0;

32611

+}

32612

+

32613

+int main ()

32614

+{

32615

+ bar ();

32616

+ return 0;

32617

+}

32618

Index: gcc/testsuite/gcc.dg/torture/pr58941.c

32619

===================================================================

32620

--- a/src/gcc/testsuite/gcc.dg/torture/pr58941.c (.../tags/gcc_4_8_2_release)

32621

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58941.c (.../branches/gcc-4_8-branch)

32622

@@ -0,0 +1,33 @@

32623

+/* { dg-do run } */

32624

+

32625

+extern void abort (void);

32626

+

32627

+typedef struct {

32628

+ int msgLength;

32629

+ unsigned char data[1000];

32630

+} SMsg;

32631

+

32632

+typedef struct {

32633

+ int dummy;

32634

+ int d[0];

32635

+} SData;

32636

+

32637

+int condition = 3;

32638

+

32639

+int main()

32640

+{

32641

+ SMsg msg;

32642

+ SData *pData = (SData*)(msg.data);

32643

+ unsigned int i = 0;

32644

+ for (i = 0; i < 1; i++)

32645

+ {

32646

+ pData->d[i] = 0;

32647

+ if(condition & 1)

32648

+ pData->d[i] |= 0x55;

32649

+ if(condition & 2)

32650

+ pData->d[i] |= 0xaa;

32651

+ }

32652

+ if (pData->d[0] != 0xff)

32653

+ abort ();

32654

+ return 0;

32655

+}

32656

Index: gcc/testsuite/gcc.dg/torture/pr57488.c

32657

===================================================================

32658

--- a/src/gcc/testsuite/gcc.dg/torture/pr57488.c (.../tags/gcc_4_8_2_release)

32659

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57488.c (.../branches/gcc-4_8-branch)

32660

@@ -0,0 +1,58 @@

32661

+/* { dg-do run } */

32662

+

32663

+extern void abort (void);

32664

+

32665

+int i, j, *pj = &j, **ppj = &pj;

32666

+int x, *px = &x;

32667

+

32668

+short s, *ps = &s, k;

32669

+

32670

+unsigned short u, *pu = &u, **ppu = &pu;

32671

+

32672

+char c, *pc = &c;

32673

+

32674

+unsigned char v = 48;

32675

+

32676

+static int

32677

+bar (int p)

32678

+{

32679

+ p = k;

32680

+ *px = **ppu = i;

32681

+ *ppj = &p;

32682

+ if (**ppj)

32683

+ *pj = p;

32684

+ return p;

32685

+}

32686

+

32687

+void __attribute__((noinline))

32688

+foo ()

32689

+{

32690

+ for (; i <= 3; i++)

32691

+ for (; j; j--);

32692

+

32693

+ u ^= bar (*pj);

32694

+

32695

+ for (k = 1; k >= 0; k--)

32696

+ {

32697

+ int l;

32698

+ bar (0);

32699

+ for (l = 1; l < 5; l++)

32700

+ {

32701

+ int m;

32702

+ for (m = 6; m; m--)

32703

+ {

32704

+ v--;

32705

+ *ps = *pc;

32706

+ }

32707

+ }

32708

+ }

32709

+}

32710

+

32711

+int

32712

+main ()

32713

+{

32714

+ foo ();

32715

+ if (v != 0)

32716

+ abort ();

32717

+ return 0;

32718

+}

32719

Index: gcc/testsuite/gcc.dg/torture/pr57569.c

32720

===================================================================

32721

--- a/src/gcc/testsuite/gcc.dg/torture/pr57569.c (.../tags/gcc_4_8_2_release)

32722

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57569.c (.../branches/gcc-4_8-branch)

32723

@@ -0,0 +1,37 @@

32724

+/* { dg-do run } */

32725

+

32726

+extern void abort (void) __attribute__((noreturn));

32727

+

32728

+struct S { int f0; } a;

32729

+

32730

+int b, e, *d = &b, f;

32731

+

32732

+void

32733

+fn1 ()

32734

+{

32735

+ int **g[9][6];

32736

+ int ***h = &g[6][3];

32737

+ for (; e < 9; e++) {

32738

+ f = 0;

32739

+ for (; f < 6; f++)

32740

+ g[e][f] = &d;

32741

+ }

32742

+ ***h = 0;

32743

+}

32744

+

32745

+void

32746

+fn2 ()

32747

+{

32748

+ fn1 ();

32749

+ struct S c[4][10] = {};

32750

+ a = c[3][9];

32751

+}

32752

+

32753

+int

32754

+main ()

32755

+{

32756

+ fn2 ();

32757

+ if (a.f0 != 0)

32758

+ abort ();

32759

+ return 0;

32760

+}

32761

Index: gcc/testsuite/gcc.dg/torture/pr58143-3.c

32762

===================================================================

32763

--- a/src/gcc/testsuite/gcc.dg/torture/pr58143-3.c (.../tags/gcc_4_8_2_release)

32764

+++ b/src/gcc/testsuite/gcc.dg/torture/pr58143-3.c (.../branches/gcc-4_8-branch)

32765

@@ -0,0 +1,18 @@

32766

+/* { dg-do run } */

32767

+/* { dg-additional-options "-fstrict-overflow" } */

32768

+

32769

+int a, b, c, d, e;

32770

+

32771

+int

32772

+main ()

32773

+{

32774

+ for (b = 4; b > -30; b--)

32775

+ for (; c;)

32776

+ for (;;)

32777

+ {

32778

+ e = a > __INT_MAX__ - b;

32779

+ if (d)

32780

+ break;

32781

+ }

32782

+ return 0;

32783

+}

32784

Index: gcc/testsuite/gcc.dg/torture/pr53922.c

32785

===================================================================

32786

--- a/src/gcc/testsuite/gcc.dg/torture/pr53922.c (.../tags/gcc_4_8_2_release)

32787

+++ b/src/gcc/testsuite/gcc.dg/torture/pr53922.c (.../branches/gcc-4_8-branch)

32788

@@ -3,6 +3,7 @@

32789

/* { dg-skip-if "No undefined" { *-*-mingw* } { "*" } { "" } } */

32790

/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } { "*" } { "" } } */

32791

/* { dg-options "-Wl,-undefined,dynamic_lookup" { target *-*-darwin* } } */

32792

+/* { dg-additional-options "-Wl,-flat_namespace" { target *-*-darwin[89]* } } */

32793

32794

int x(int a)

32795

{

32796

Index: gcc/testsuite/gcc.dg/torture/pr57864.c

32797

===================================================================

32798

--- a/src/gcc/testsuite/gcc.dg/torture/pr57864.c (.../tags/gcc_4_8_2_release)

32799

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57864.c (.../branches/gcc-4_8-branch)

32800

@@ -0,0 +1,37 @@

32801

+/* { dg-do compile } */

32802

+

32803

+union U {

32804

+ double val;

32805

+ union U *ptr;

32806

+};

32807

+

32808

+union U *d;

32809

+double a;

32810

+int b;

32811

+int c;

32812

+

32813

+static void fn1(union U *p1, int p2, _Bool p3)

32814

+{

32815

+ union U *e;

32816

+

32817

+ if (p2 == 0)

32818

+ a = ((union U*)((unsigned long)p1 & ~1))->val;

32819

+

32820

+ if (b) {

32821

+ e = p1;

32822

+ } else if (c) {

32823

+ e = ((union U*)((unsigned long)p1 & ~1))->ptr;

32824

+ d = e;

32825

+ } else {

32826

+ e = 0;

32827

+ d = ((union U*)0)->ptr;

32828

+ }

32829

+

32830

+ fn1 (e, 0, 0);

32831

+ fn1 (0, 0, p3);

32832

+}

32833

+

32834

+void fn2 (void)

32835

+{

32836

+ fn1 (0, 0, 0);

32837

+}

32838

Index: gcc/testsuite/gcc.dg/torture/pr59288.c

32839

===================================================================

32840

--- a/src/gcc/testsuite/gcc.dg/torture/pr59288.c (.../tags/gcc_4_8_2_release)

32841

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59288.c (.../branches/gcc-4_8-branch)

32842

@@ -0,0 +1,9 @@

32843

+/* { dg-do compile } */

32844

+

32845

+void

32846

+baz (int *d)

32847

+{

32848

+ long int i, j, k;

32849

+ for (i = 0, j = 0, k = 0; i < 512; i = (int) i + 1, j = (int) j + 1, k = (int) k + 3)

32850

+ d[i] = j ^ (i * 3) ^ (2 * k + 2);

32851

+}

32852

Index: gcc/testsuite/gcc.dg/torture/pr60766.c

32853

===================================================================

32854

--- a/src/gcc/testsuite/gcc.dg/torture/pr60766.c (.../tags/gcc_4_8_2_release)

32855

+++ b/src/gcc/testsuite/gcc.dg/torture/pr60766.c (.../branches/gcc-4_8-branch)

32856

@@ -0,0 +1,15 @@

32857

+/* { dg-do run } */

32858

+

32859

+int m = 9;

32860

+

32861

+int main()

32862

+{

32863

+ int n, x;

32864

+

32865

+ n = m;

32866

+ for (x = 0; x <= n; x++)

32867

+ if (n == x + (x + 1) + (x + 2))

32868

+ return 0;

32869

+

32870

+ __builtin_abort();

32871

+}

32872

Index: gcc/testsuite/gcc.dg/torture/pr57425-1.c

32873

===================================================================

32874

--- a/src/gcc/testsuite/gcc.dg/torture/pr57425-1.c (.../tags/gcc_4_8_2_release)

32875

+++ b/src/gcc/testsuite/gcc.dg/torture/pr57425-1.c (.../branches/gcc-4_8-branch)

32876

@@ -0,0 +1,37 @@

32877

+/* { dg-do run } */

32878

+

32879

+extern void abort (void) __attribute__((noreturn));

32880

+

32881

+union setconflict

32882

+{

32883

+ int a[20];

32884

+ long b[10];

32885

+};

32886

+

32887

+int

32888

+main ()

32889

+{

32890

+ int sum = 0;

32891

+ {

32892

+ union setconflict a;

32893

+ int *c;

32894

+ c = a.a;

32895

+ asm ("": "=r" (c):"0" (c));

32896

+ *c = 0;

32897

+ asm ("": "=r" (c):"0" (c));

32898

+ sum += *c;

32899

+ }

32900

+ {

32901

+ union setconflict a;

32902

+ long *c;

32903

+ c = a.b;

32904

+ asm ("": "=r" (c):"0" (c));

32905

+ *c = 1;

32906

+ asm ("": "=r" (c):"0" (c));

32907

+ sum += *c;

32908

+ }

32909

+

32910

+ if (sum != 1)

32911

+ abort();

32912

+ return 0;

32913

+}

32914

Index: gcc/testsuite/gcc.dg/torture/pr59330.c

32915

===================================================================

32916

--- a/src/gcc/testsuite/gcc.dg/torture/pr59330.c (.../tags/gcc_4_8_2_release)

32917

+++ b/src/gcc/testsuite/gcc.dg/torture/pr59330.c (.../branches/gcc-4_8-branch)

32918

@@ -0,0 +1,17 @@

32919

+/* { dg-do run } */

32920

+

32921

+void free(void *ptr)

32922

+{

32923

+}

32924

+

32925

+void *foo(void)

32926

+{

32927

+ return 0;

32928

+}

32929

+

32930

+int main(void)

32931

+{

32932

+ void *p = foo();

32933

+ free(p);

32934

+ return 0;

32935

+}

32936

Index: gcc/testsuite/gcc.dg/unused-8b.c

32937

===================================================================

32938

--- a/src/gcc/testsuite/gcc.dg/unused-8b.c (.../tags/gcc_4_8_2_release)

32939

+++ b/src/gcc/testsuite/gcc.dg/unused-8b.c (.../branches/gcc-4_8-branch)

32940

@@ -0,0 +1,4 @@

32941

+/* { dg-do compile } */

32942

+/* { dg-options "-Wall -Wno-unused -Wextra" } */

32943

+

32944

+void foo(int x) { }

32945

Index: gcc/testsuite/gcc.dg/tree-ssa/20040517-1.c

32946

===================================================================

32947

--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040517-1.c (.../tags/gcc_4_8_2_release)

32948

+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040517-1.c (.../branches/gcc-4_8-branch)

32949

@@ -16,6 +16,7 @@

32950

/* We used to treat malloc functions like pure and const functions, but

32951

malloc functions may clobber global memory. Only the function result

32952

does not alias any other pointer.

32953

- Hence, we must have a VDEF for a before and after the call to foo(). */

32954

-/* { dg-final { scan-tree-dump-times "VDEF" 2 "alias"} } */

32955

+ Hence, we must have a VDEF for a before and after the call to foo().

32956

+ And one after the call to abort(). */

32957

+/* { dg-final { scan-tree-dump-times "VDEF" 3 "alias"} } */

32958

/* { dg-final { cleanup-tree-dump "alias" } } */

32959

Index: gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c

32960

===================================================================

32961

--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c (.../tags/gcc_4_8_2_release)

32962

+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c (.../branches/gcc-4_8-branch)

32963

@@ -0,0 +1,14 @@

32964

+/* { dg-do run } */

32965

+/* { dg-options "-O3" } */

32966

+

32967

+int a, c, e[5][2];

32968

+unsigned int d;

32969

+

32970

+int

32971

+main ()

32972

+{

32973

+ for (d = 0; d < 2; d++)

32974

+ if (a ? 0 : e[c + 3][d] & e[c + 4][d])

32975

+ break;

32976

+ return 0;

32977

+}

32978

Index: gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c

32979

===================================================================

32980

--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c (.../tags/gcc_4_8_2_release)

32981

+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c (.../branches/gcc-4_8-branch)

32982

@@ -0,0 +1,18 @@

32983

+/* { dg-do run } */

32984

+/* { dg-options "-O3 -fdump-tree-pcom-details" } */

32985

+

32986

+int b, f, d[5][2];

32987

+unsigned int c;

32988

+

32989

+int

32990

+main ()

32991

+{

32992

+ for (c = 0; c < 2; c++)

32993

+ if (d[b + 3][c] & d[b + 4][c])

32994

+ if (f)

32995

+ break;

32996

+ return 0;

32997

+}

32998

+

32999

+/* { dg-final { scan-tree-dump "Executing predictive commoning" "pcom" } } */

33000

+/* { dg-final { cleanup-tree-dump "pcom" } } */

33001

Index: gcc/testsuite/gcc.dg/tls/pr58595.c

33002

===================================================================

33003

--- a/src/gcc/testsuite/gcc.dg/tls/pr58595.c (.../tags/gcc_4_8_2_release)

33004

+++ b/src/gcc/testsuite/gcc.dg/tls/pr58595.c (.../branches/gcc-4_8-branch)

33005

@@ -0,0 +1,28 @@

33006

+/* PR target/58595 */

33007

+/* { dg-do run } */

33008

+/* { dg-options "-O2" } */

33009

+/* { dg-additional-options "-fpic" { target fpic } } */

33010

+/* { dg-require-effective-target tls } */

33011

+/* { dg-require-effective-target sync_int_long } */

33012

+

33013

+struct S { unsigned long a, b; };

33014

+__thread struct S s;

33015

+void bar (unsigned long *);

33016

+

33017

+__attribute__((noinline)) void

33018

+foo (void)

33019

+{

33020

+ int i;

33021

+ for (i = 0; i < 10; i++)

33022

+ __sync_fetch_and_add (&s.b, 1L);

33023

+}

33024

+

33025

+int

33026

+main ()

33027

+{

33028

+ s.b = 12;

33029

+ foo ();

33030

+ if (s.b != 22)

33031

+ __builtin_abort ();

33032

+ return 0;

33033

+}

33034

Index: gcc/testsuite/gcc.dg/strlenopt-4.c

33035

===================================================================

33036

--- a/src/gcc/testsuite/gcc.dg/strlenopt-4.c (.../tags/gcc_4_8_2_release)

33037

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-4.c (.../branches/gcc-4_8-branch)

33038

@@ -66,16 +66,10 @@

33039

return 0;

33040

}

33041

33042

-/* For targets providing a movstr pattern strcat is already decomposed

33043

- into strlen + strcpy by fold_builtin_strcat. */

33044

-

33045

-/* { dg-final { scan-tree-dump-times "strlen \\(" 3 "strlen" { target { ! s390*-*-* } } } } */

33046

-/* { dg-final { scan-tree-dump-times "strlen \\(" 6 "strlen" { target s390*-*-* } } } */

33047

+/* { dg-final { scan-tree-dump-times "strlen \\(" 3 "strlen" } } */

33048

/* { dg-final { scan-tree-dump-times "memcpy \\(" 4 "strlen" } } */

33049

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 3 "strlen" { target { ! s390*-*-* } } } } */

33050

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 6 "strlen" { target s390*-*-* } } } */

33051

-/* { dg-final { scan-tree-dump-times "strcat \\(" 3 "strlen" { target { ! s390*-*-* } } } } */

33052

-/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" { target s390*-*-* } } } */

33053

+/* { dg-final { scan-tree-dump-times "strcpy \\(" 3 "strlen" } } */

33054

+/* { dg-final { scan-tree-dump-times "strcat \\(" 3 "strlen" } } */

33055

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

33056

/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

33057

/* { dg-final { cleanup-tree-dump "strlen" } } */

33058

Index: gcc/testsuite/gcc.dg/pr56824.c

33059

===================================================================

33060

--- a/src/gcc/testsuite/gcc.dg/pr56824.c (.../tags/gcc_4_8_2_release)

33061

+++ b/src/gcc/testsuite/gcc.dg/pr56824.c (.../branches/gcc-4_8-branch)

33062

@@ -0,0 +1,18 @@

33063

+/* PR preprocessor/56824 */

33064

+/* { dg-do compile } */

33065

+/* { dg-options "-Waggregate-return" } */

33066

+

33067

+struct S { int i; };

33068

+struct S foo (void);

33069

+

33070

+#pragma GCC diagnostic push

33071

+#pragma GCC diagnostic ignored "-Waggregate-return"

33072

+

33073

+int

33074

+main ()

33075

+{

33076

+ foo ();

33077

+ return 0;

33078

+}

33079

+

33080

+#pragma GCC diagnostic pop

33081

Index: gcc/testsuite/gcc.dg/ipa/pr55260.c

33082

===================================================================

33083

--- a/src/gcc/testsuite/gcc.dg/ipa/pr55260.c (.../tags/gcc_4_8_2_release)

33084

+++ b/src/gcc/testsuite/gcc.dg/ipa/pr55260.c (.../branches/gcc-4_8-branch)

33085

@@ -0,0 +1,38 @@

33086

+/* { dg-do compile } */

33087

+/* { dg-options "-O2 -fno-inline -fipa-cp-clone" } */

33088

+

33089

+typedef struct {

33090

+ int *ptr;

33091

+ int len;

33092

+} string;

33093

+typedef struct {

33094

+ string nantstr;

33095

+ int *nant;

33096

+} malv;

33097

+typedef struct {

33098

+ int *nor;

33099

+} list_heads;

33100

+int b;

33101

+list_heads *fn1(string, int *, unsigned);

33102

+void fn2(malv *p1, list_heads *p2, unsigned p3) {

33103

+ string a = p1->nantstr;

33104

+ fn1(a, p1->nant, p3);

33105

+}

33106

+

33107

+void fn3(unsigned p1) { fn2(0, 0, p1); }

33108

+

33109

+list_heads *fn1(string p1, int *p2, unsigned p3) {

33110

+ while (1) {

33111

+ if (p3)

33112

+ fn3(1);

33113

+ if (b)

33114

+ return 0;

33115

+ fn3(1);

33116

+ }

33117

+}

33118

+

33119

+void fn5() {

33120

+ list_heads c;

33121

+ c.nor = 0;

33122

+ fn2(0, &c, 1);

33123

+}

33124

Index: gcc/testsuite/gcc.dg/ipa/pr59610.c

33125

===================================================================

33126

--- a/src/gcc/testsuite/gcc.dg/ipa/pr59610.c (.../tags/gcc_4_8_2_release)

33127

+++ b/src/gcc/testsuite/gcc.dg/ipa/pr59610.c (.../branches/gcc-4_8-branch)

33128

@@ -0,0 +1,11 @@

33129

+/* { dg-do compile } */

33130

+/* { dg-options "-O2" } */

33131

+

33132

+struct A { int a; };

33133

+extern void *y;

33134

+

33135

+__attribute__((optimize (0))) void

33136

+foo (void *p, struct A x)

33137

+{

33138

+ foo (y, x);

33139

+}

33140

Index: gcc/testsuite/gcc.dg/pr60485-1.c

33141

===================================================================

33142

--- a/src/gcc/testsuite/gcc.dg/pr60485-1.c (.../tags/gcc_4_8_2_release)

33143

+++ b/src/gcc/testsuite/gcc.dg/pr60485-1.c (.../branches/gcc-4_8-branch)

33144

@@ -0,0 +1,29 @@

33145

+/* { dg-do run } */

33146

+/* { dg-options "-O2" } */

33147

+

33148

+extern void abort (void);

33149

+struct S {

33150

+ int *i[4];

33151

+ int *p1;

33152

+ int *p2;

33153

+ int *p3;

33154

+ int *p4;

33155

+};

33156

+int **b;

33157

+int main()

33158

+{

33159

+ int i = 1;

33160

+ struct S s;

33161

+ s.p3 = &i;

33162

+ int **p;

33163

+ if (b)

33164

+ p = b;

33165

+ else

33166

+ p = &s.i[2];

33167

+ p += 4;

33168

+ if (!b)

33169

+ **p = 0;

33170

+ if (i != 0)

33171

+ abort ();

33172

+ return i;

33173

+}

33174

Index: gcc/testsuite/gcc.dg/strlenopt-1f.c

33175

===================================================================

33176

--- a/src/gcc/testsuite/gcc.dg/strlenopt-1f.c (.../tags/gcc_4_8_2_release)

33177

+++ b/src/gcc/testsuite/gcc.dg/strlenopt-1f.c (.../branches/gcc-4_8-branch)

33178

@@ -6,13 +6,13 @@

33179

#include "strlenopt-1.c"

33180

33181

/* { dg-final { scan-tree-dump-times "strlen \\(" 2 "strlen" } } */

33182

-/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 3 "strlen" } } */

33183

-/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 1 "strlen" } } */

33184

+/* { dg-final { scan-tree-dump-times "__memcpy_chk \\(" 0 "strlen" } } */

33185

+/* { dg-final { scan-tree-dump-times "__strcpy_chk \\(" 0 "strlen" } } */

33186

/* { dg-final { scan-tree-dump-times "__strcat_chk \\(" 0 "strlen" } } */

33187

/* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */

33188

/* { dg-final { scan-tree-dump-times "__stpcpy_chk \\(" 0 "strlen" } } */

33189

-/* { dg-final { scan-tree-dump-times "memcpy \\(" 0 "strlen" } } */

33190

-/* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */

33191

+/* { dg-final { scan-tree-dump-times "memcpy \\(" 3 "strlen" } } */

33192

+/* { dg-final { scan-tree-dump-times "strcpy \\(" 1 "strlen" } } */

33193

/* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */

33194

/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */

33195

/* { dg-final { cleanup-tree-dump "strlen" } } */

33196

Index: gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c

33197

===================================================================

33198

--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c (.../tags/gcc_4_8_2_release)

33199

+++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c (.../branches/gcc-4_8-branch)

33200

@@ -1,4 +1,5 @@

33201

/* { dg-require-effective-target vect_int } */

33202

+/* { dg-skip-if "cost too high" { powerpc*le-*-* } { "*" } { "" } } */

33203

33204

#include <stdarg.h>

33205

#include "../../tree-vect.h"

33206

Index: gcc/testsuite/gcc.dg/vect/pr60382.c

33207

===================================================================

33208

--- a/src/gcc/testsuite/gcc.dg/vect/pr60382.c (.../tags/gcc_4_8_2_release)

33209

+++ b/src/gcc/testsuite/gcc.dg/vect/pr60382.c (.../branches/gcc-4_8-branch)

33210

@@ -0,0 +1,32 @@

33211

+#include "tree-vect.h"

33212

+

33213

+int a, b, c, e, f;

33214

+

33215

+void

33216

+foo ()

33217

+{

33218

+ for (b = 0; b < 3; b++)

33219

+ if (e)

33220

+ {

33221

+ for (c = 0; c < 4; c++)

33222

+ {

33223

+ if (b)

33224

+ continue;

33225

+ f = 1;

33226

+ for (a = 0; a < 2; a++)

33227

+ f |= 1;

33228

+ }

33229

+ for (;;)

33230

+ ;

33231

+ }

33232

+}

33233

+

33234

+int

33235

+main ()

33236

+{

33237

+ check_vect ();

33238

+ foo ();

33239

+ return 0;

33240

+}

33241

+

33242

+/* { dg-final { cleanup-tree-dump "vect" } } */

33243

Index: gcc/testsuite/gcc.dg/vect/pr60276.c

33244

===================================================================

33245

--- a/src/gcc/testsuite/gcc.dg/vect/pr60276.c (.../tags/gcc_4_8_2_release)

33246

+++ b/src/gcc/testsuite/gcc.dg/vect/pr60276.c (.../branches/gcc-4_8-branch)

33247

@@ -0,0 +1,52 @@

33248

+/* { dg-do run } */

33249

+

33250

+extern void abort (void);

33251

+

33252

+static void

33253

+foo (int *out, const int *lp, unsigned samples)

33254

+{

33255

+ int x, target;

33256

+ for (x = 0, target = 0; x < (int)samples; x += 2, target++)

33257

+ {

33258

+ out[x] = lp[target];

33259

+ out[x - 1] = out[x - 2] + out[x];

33260

+ }

33261

+}

33262

+

33263

+static void

33264

+foo_novec (int *out, const int *lp, unsigned samples)

33265

+{

33266

+ int x, target;

33267

+ for (x = 0, target = 0; x < (int)samples; x += 2, target++)

33268

+ {

33269

+ out[x] = lp[target];

33270

+ out[x - 1] = out[x - 2] + out[x];

33271

+ __asm__ volatile ("" : : : "memory");

33272

+ }

33273

+}

33274

+

33275

+int main(void)

33276

+{

33277

+ const int lp[25] = {

33278

+ 0, 2, 4, 6, 8,

33279

+ 10, 12, 14, 16,

33280

+ 18, 20, 22, 24,

33281

+ 26, 28, 30, 32,

33282

+ 34, 36, 38, 40,

33283

+ 42, 44, 46, 48,

33284

+ };

33285

+ int out[49] = {0};

33286

+ int out2[49] = {0};

33287

+ int s;

33288

+

33289

+ foo (out + 2, lp + 1, 48);

33290

+ foo_novec (out2 + 2, lp + 1, 48);

33291

+

33292

+ for (s = 0; s < 49; s++)

33293

+ if (out[s] != out2[s])

33294

+ abort ();

33295

+

33296

+ return 0;

33297

+}

33298

+

33299

+/* { dg-final { cleanup-tree-dump "vect" } } */

33300

Index: gcc/testsuite/gcc.dg/pr53060.c

33301

===================================================================

33302

--- a/src/gcc/testsuite/gcc.dg/pr53060.c (.../tags/gcc_4_8_2_release)

33303

+++ b/src/gcc/testsuite/gcc.dg/pr53060.c (.../branches/gcc-4_8-branch)

33304

@@ -25,3 +25,4 @@

33305

33306

/* Ignore a warning that is irrelevant to the purpose of this test. */

33307

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

33308

+/* { dg-prune-output "changes the ABI" } */

33309

Index: gcc/testsuite/ChangeLog

33310

===================================================================

33311

--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_8_2_release)

33312

+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_8-branch)

33313

@@ -1,3 +1,1861 @@

33314

+2014-05-14 Matthias Klose <doko@ubuntu.com>

33315

+

33316

+ PR driver/61106

33317

+ * gcc-dg/unused-8a.c: Remove.

33318

+

33319

+2014-05-13 Peter Bergner <bergner@vnet.ibm.com>

33320

+

33321

+ * lib/target-support.exp (check_dfp_hw_available): New function.

33322

+ (is-effective-target): Check $arg for dfp_hw.

33323

+ (is-effective-target-keyword): Likewise.

33324

+ * gcc.target/powerpc/pack03.c: (dg-require-effective-target):

33325

+ Change target to dfp_hw.

33326

+

33327

+2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>

33328

+

33329

+ Backport from mainline

33330

+ 2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>

33331

+

33332

+ PR target/60991

33333

+ * gcc.target/avr/pr60991.c: New testcase.

33334

+

33335

+2014-05-09 Georg-Johann Lay <avr@gjlay.de>

33336

+

33337

+ Backport from 2014-05-09 trunk r210267

33338

+

33339

+ PR target/61055

33340

+ * gcc.target/avr/torture/pr61055.c: New test.

33341

+

33342

+2014-05-08 Matthias Klose <doko@ubuntu.com>

33343

+

33344

+ PR driver/61106

33345

+ * gcc-dg/unused-8a.c: New.

33346

+ * gcc-dg/unused-8b.c: Likewise.

33347

+

33348

+2014-05-07 Richard Biener <rguenther@suse.de>

33349

+

33350

+ PR tree-optimization/57864

33351

+ * gcc.dg/torture/pr57864.c: New testcase.

33352

+

33353

+2014-05-06 Richard Biener <rguenther@suse.de>

33354

+

33355

+ Backport from mainline

33356

+ 2014-04-14 Richard Biener <rguenther@suse.de>

33357

+

33358

+ PR middle-end/55022

33359

+ * gcc.dg/graphite/pr55022.c: New testcase.

33360

+

33361

+2014-05-06 Richard Biener <rguenther@suse.de>

33362

+

33363

+ Backport from mainline

33364

+ 2014-04-17 Richard Biener <rguenther@suse.de>

33365

+

33366

+ PR middle-end/60849

33367

+ * g++.dg/opt/pr60849.C: New testcase.

33368

+

33369

+ 2014-04-07 Richard Biener <rguenther@suse.de>

33370

+

33371

+ PR tree-optimization/60766

33372

+ * gcc.dg/torture/pr60766.c: New testcase.

33373

+

33374

+ 2014-04-23 Richard Biener <rguenther@suse.de>

33375

+

33376

+ PR tree-optimization/60903

33377

+ * gcc.dg/torture/pr60903.c: New testcase.

33378

+

33379

+2014-05-05 Richard Biener <rguenther@suse.de>

33380

+

33381

+ Backport from mainline

33382

+ 2014-04-23 Richard Biener <rguenther@suse.de>

33383

+

33384

+ PR middle-end/60895

33385

+ * g++.dg/torture/pr60895.C: New testcase.

33386

+

33387

+ 2014-04-07 Richard Biener <rguenther@suse.de>

33388

+

33389

+ PR middle-end/60750

33390

+ * g++.dg/torture/pr60750.C: New testcase.

33391

+ * gcc.dg/tree-ssa/20040517-1.c: Adjust.

33392

+

33393

+ 2014-04-14 Richard Biener <rguenther@suse.de>

33394

+

33395

+ PR tree-optimization/59817

33396

+ PR tree-optimization/60453

33397

+ * gfortran.dg/graphite/pr59817.f: New testcase.

33398

+ * gcc.dg/graphite/pr59817-1.c: Likewise.

33399

+ * gcc.dg/graphite/pr59817-2.c: Likewise.

33400

+

33401

+ 2014-04-17 Richard Biener <rguenther@suse.de>

33402

+

33403

+ PR tree-optimization/60836

33404

+ * g++.dg/vect/pr60836.cc: New testcase.

33405

+

33406

+2014-05-05 Jakub Jelinek <jakub@redhat.com>

33407

+

33408

+ Backported from mainline

33409

+ 2014-04-25 Jakub Jelinek <jakub@redhat.com>

33410

+

33411

+ PR tree-optimization/60960

33412

+ * gcc.c-torture/execute/pr60960.c: New test.

33413

+

33414

+2014-05-04 Peter Bergner <bergner@vnet.ibm.com>

33415

+

33416

+ * gcc.target/powerpc/pack02.c (dg-options): Add -mhard-float.

33417

+ (dg-require-effective-target): Change target to powerpc_fprs.

33418

+ * gcc.target/powerpc/pack03.c (dg-options): Add -mhard-dfp.

33419

+ (dg-require-effective-target): Change target to dfprt.

33420

+

33421

+2014-05-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33422

+

33423

+ PR tree-optimization/60930

33424

+ * gcc.dg/torture/pr60930.c: New test.

33425

+

33426

+2014-04-30 Michael Meissner <meissner@linux.vnet.ibm.com>

33427

+

33428

+ Back port from mainline

33429

+ 2014-04-24 Michael Meissner <meissner@linux.vnet.ibm.com>

33430

+

33431

+ * gcc.target/powerpc/pack01.c: New test to test the new pack and

33432

+ unpack builtin functionss for 128-bit types.

33433

+ * gcc.target/powerpc/pack02.c: Likewise.

33434

+ * gcc.target/powerpc/pack03.c: Likewise.

33435

+ * gcc.target/powerpc/extend-divide-1.c: New test to test extended

33436

+ divide builtin functionss.

33437

+ * gcc.target/powerpc/extend-divide-2.c: Likewise.

33438

+ * gcc.target/powerpc/bcd-1.c: New test for the new BCD builtin

33439

+ functions.

33440

+ * gcc.target/powerpc/bcd-2.c: Likewise.

33441

+ * gcc.target/powerpc/bcd-3.c: Likewise.

33442

+ * gcc.target/powerpc/dfp-builtin-1.c: New test for the new DFP

33443

+ builtin functionss.

33444

+ * gcc.target/powerpc/dfp-builtin-2.c: Likewise.

33445

+

33446

+2014-04-29 Pat Haugen <pthaugen@us.ibm.com>

33447

+

33448

+ Backport from mainline

33449

+ 2014-04-17 Pat Haugen <pthaugen@us.ibm.com>

33450

+

33451

+ * gcc.target/powerpc/ti_math1.c: New.

33452

+ * gcc.target/powerpc/ti_math2.c: New.

33453

+

33454

+2014-04-25 Eric Botcazou <ebotcazou@adacore.com>

33455

+

33456

+ * gcc.c-torture/execute/20140425-1.c: New test.

33457

+

33458

+2014-04-23 Michael Meissner <meissner@linux.vnet.ibm.com>

33459

+

33460

+ Back port from main line:

33461

+ 2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>

33462

+

33463

+ * gcc.target/powerpc/p8vector-vbpermq.c: New test to test the

33464

+ vbpermq builtin.

33465

+

33466

+2014-04-23 Uros Bizjak <ubizjak@gmail.com>

33467

+

33468

+ Backport from mainline

33469

+ 2014-04-21 Uros Bizjak <ubizjak@gmail.com>

33470

+

33471

+ PR target/60909

33472

+ * gcc.target/i386/pr60909-1.c: New test.

33473

+ * gcc.target/i386/pr60909-2.c: Ditto.

33474

+

33475

+2014-04-23 Richard Biener <rguenther@suse.de>

33476

+

33477

+ Backport from mainline

33478

+ 2014-04-02 Richard Biener <rguenther@suse.de>

33479

+

33480

+ PR middle-end/60729

33481

+ * g++.dg/vect/pr60729.cc: New testcase.

33482

+

33483

+ 2014-04-03 Richard Biener <rguenther@suse.de>

33484

+

33485

+ PR tree-optimization/60740

33486

+ * gcc.dg/graphite/pr60740.c: New testcase.

33487

+

33488

+2014-04-23 Richard Biener <rguenther@suse.de>

33489

+

33490

+ PR middle-end/60635

33491

+ * gfortran.dg/lto/pr60635_0.f90: New testcase.

33492

+ * gfortran.dg/lto/pr60635_1.c: Likewise.

33493

+

33494

+2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

33495

+

33496

+ Back port from the trunk, subversion id 209546.

33497

+

33498

+ 2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>

33499

+

33500

+ PR target/60735

33501

+ * gcc.target/powerpc/pr60735.c: New test. Insure _Decimal64 does

33502

+ not cause errors if -mspe.

33503

+

33504

+2014-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33505

+

33506

+ * gcc.dg/vmx/merge-vsx.c: Add V4SI and V4SF tests.

33507

+ * gcc.dg/vmx/merge-vsx-be-order.c: Likewise.

33508

+

33509

+2014-04-12 Jerry DeLisle <jvdelisle@gcc.gnu>

33510

+

33511

+ Backport from mainline

33512

+ PR libfortran/60810

33513

+ * gfortran.dg/arrayio_13.f90: New test.

33514

+

33515

+2014-04-11 Hans-Peter Nilsson <hp@axis.com>

33516

+

33517

+ * gfortran.dg/fmt_en.f90: Gate test on effective_target

33518

+ fd_truncate.

33519

+

33520

+2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

33521

+

33522

+ * gcc.target/s390/htm-nofloat-1.c: Rename to ...

33523

+ * gcc.target/s390/htm-nofloat-compile-1.c: ... this one.

33524

+ * gcc.target/s390/htm-nofloat-2.c: Add check for htm target and

33525

+ rename to ...

33526

+ * gcc.target/s390/htm-nofloat-1.c: ... this one.

33527

+ * gcc.target/s390/s390.exp: Make sure the assembler supports htm

33528

+ instructions as well.

33529

+

33530

+2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

33531

+

33532

+ * gcc.target/s390/htm-builtins-compile-1.c: Replace long long with

33533

+ long.

33534

+

33535

+2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

33536

+

33537

+ * gcc.target/s390/htm-builtins-compile-1.c: Remove htm check.

33538

+ * gcc.target/s390/htm-builtins-compile-2.c: Remove htm check.

33539

+

33540

+2014-04-10 Vladimir Makarov <vmakarov@redhat.com>

33541

+

33542

+ PR rtl-optimization/60769

33543

+ * g++.dg/pr60769.C: New.

33544

+

33545

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

33546

+

33547

+ Backport from mainline

33548

+ 2014-03-12 Jakub Jelinek <jakub@redhat.com>

33549

+ Marc Glisse <marc.glisse@inria.fr>

33550

+

33551

+ PR tree-optimization/60502

33552

+ * gcc.c-torture/compile/pr60502.c: New test.

33553

+

33554

+ 2014-03-28 Jakub Jelinek <jakub@redhat.com>

33555

+

33556

+ PR target/60693

33557

+ * gcc.target/i386/pr60693.c: New test.

33558

+

33559

+ PR c++/60689

33560

+ * c-c++-common/pr60689.c: New test.

33561

+

33562

+ 2014-03-22 Jakub Jelinek <jakub@redhat.com>

33563

+

33564

+ PR debug/60603

33565

+ * gcc.dg/debug/dwarf2/dwarf2-macro2.c: New test.

33566

+

33567

+ 2014-03-17 Jakub Jelinek <jakub@redhat.com>

33568

+

33569

+ PR target/60516

33570

+ * gcc.target/i386/pr60516.c: New test.

33571

+

33572

+ 2014-03-13 Jakub Jelinek <jakub@redhat.com>

33573

+

33574

+ PR middle-end/36282

33575

+ * c-c++-common/pr36282-1.c: New test.

33576

+ * c-c++-common/pr36282-2.c: New test.

33577

+ * c-c++-common/pr36282-3.c: New test.

33578

+ * c-c++-common/pr36282-4.c: New test.

33579

+

33580

+ 2014-03-06 Jakub Jelinek <jakub@redhat.com>

33581

+

33582

+ PR target/58595

33583

+ * gcc.dg/tls/pr58595.c: New test.

33584

+

33585

+2014-04-07 Martin Jambor <mjambor@suse.cz>

33586

+

33587

+ PR ipa/60640

33588

+ * g++.dg/ipa/pr60640-1.C: New test.

33589

+ * g++.dg/ipa/pr60640-2.C: Likewise.

33590

+ * g++.dg/ipa/pr60640-3.C: Likewise.

33591

+

33592

+2014-04-06 Dominique d'Humieres <dominiq@lps.ens.fr>

33593

+ Iain Sandoe <iain@codesourcery.com>

33594

+

33595

+ PR target/54083

33596

+ * gcc.dg/attr-weakref-1.c: Allow the test on darwin with

33597

+ the additional options -Wl,-undefined,dynamic_lookup and

33598

+ -Wl,-flat_namespace

33599

+ * gcc.dg/torture/pr53922.c: Additional option

33600

+ -Wl,-flat_namespace for darwin[89].

33601

+

33602

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33603

+

33604

+ Backport from mainline

33605

+ 2013-04-05 David Edelsohn <dje.gcc@gmail.com>

33606

+

33607

+ * gcc.target/powerpc/sd-vsx.c: Skip on AIX.

33608

+ * gcc.target/powerpc/sd-pwr6.c: Same.

33609

+

33610

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33611

+

33612

+ Back port from trunk

33613

+ 2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com>

33614

+

33615

+ * gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA

33616

+ 2.07 128-bit arithmetic.

33617

+ * gcc.target/powerpc/p8vector-int128-2.c: Likewise.

33618

+

33619

+ * gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,

33620

+ due to when TImode is allowed in VSX registers, the allowable

33621

+ address modes for TImode is just a single indirect address in

33622

+ order for the value to be loaded and store in either GPR or VSX

33623

+ registers. This affects the generated code, and it would cause

33624

+ this test to fail, when such an option is used.

33625

+

33626

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33627

+

33628

+ Backport from mainline r207699.

33629

+ 2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>

33630

+

33631

+ PR target/60137

33632

+ * gcc.target/powerpc/pr60137.c: New file.

33633

+

33634

+ Backport from mainline r207808.

33635

+ 2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>

33636

+

33637

+ PR target/60203

33638

+ * gcc.target/powerpc/pr60203.c: New testsuite.

33639

+

33640

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33641

+

33642

+ Little Endian Vector API Support

33643

+ Backport from mainline r206590

33644

+ 2014-01-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33645

+

33646

+ * gcc.dg/vmx/insert.c: New.

33647

+ * gcc.dg/vmx/insert-be-order.c: New.

33648

+ * gcc.dg/vmx/extract.c: New.

33649

+ * gcc.dg/vmx/extract-be-order.c: New.

33650

+

33651

+ Backport from mainline r206641

33652

+ 2014-01-15 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

33653

+

33654

+ * gcc.dg/vmx/mult-even-odd.c: New.

33655

+ * gcc.dg/vmx/mult-even-odd-be-order.c: New.

33656

+

33657

+ Backport from mainline r206926

33658

+ 2014-01-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33659

+

33660

+ * gcc.dg/vmx/insert-vsx-be-order.c: New.

33661

+ * gcc.dg/vmx/extract-vsx.c: New.

33662

+ * gcc.dg/vmx/extract-vsx-be-order.c: New.

33663

+ * gcc.dg/vmx/insert-vsx.c: New.

33664

+

33665

+ Backport from mainline r207262

33666

+ 2014-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33667

+

33668

+ * gcc.dg/vmx/merge-be-order.c: New.

33669

+ * gcc.dg/vmx/merge.c: New.

33670

+ * gcc.dg/vmx/merge-vsx-be-order.c: New.

33671

+ * gcc.dg/vmx/merge-vsx.c: New.

33672

+

33673

+ Backport from mainline r207318

33674

+ 2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33675

+

33676

+ * gcc.dg/vmx/splat.c: New.

33677

+ * gcc.dg/vmx/splat-vsx.c: New.

33678

+ * gcc.dg/vmx/splat-be-order.c: New.

33679

+ * gcc.dg/vmx/splat-vsx-be-order.c: New.

33680

+ * gcc.dg/vmx/eg-5.c: Remove special casing for little endian.

33681

+ * gcc.dg/vmx/sn7153.c: Add special casing for little endian.

33682

+

33683

+ Backport from mainline r207414

33684

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33685

+

33686

+ * gcc.dg/vmx/vsums.c: New.

33687

+ * gcc.dg/vmx/vsums-be-order.c: New.

33688

+

33689

+ Backport from mainline r207415

33690

+ 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33691

+

33692

+ * gcc.dg/vmx/3b-15.c: Remove special handling for little endian.

33693

+ * gcc.dg/vmx/perm.c: New.

33694

+ * gcc.dg/vmx/perm-be-order.c: New.

33695

+

33696

+ Backport from mainline r207520

33697

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33698

+

33699

+ * gcc.dg/vmx/pack.c: New.

33700

+ * gcc.dg/vmx/pack-be-order.c: New.

33701

+ * gcc.dg/vmx/unpack.c: New.

33702

+ * gcc.dg/vmx/unpack-be-order.c: New.

33703

+

33704

+ Backport from mainline r207521

33705

+ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33706

+

33707

+ * gcc.dg/vmx/sum2s.c: New.

33708

+ * gcc.dg/vmx/sum2s-be-order.c: New.

33709

+

33710

+ Backport from mainline 208019

33711

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33712

+

33713

+ * gcc.dg/vmx/ld.c: New test.

33714

+ * gcc.dg/vmx/ld-be-order.c: New test.

33715

+ * gcc.dg/vmx/ld-vsx.c: New test.

33716

+ * gcc.dg/vmx/ld-vsx-be-order.c: New test.

33717

+ * gcc.dg/vmx/ldl.c: New test.

33718

+ * gcc.dg/vmx/ldl-be-order.c: New test.

33719

+ * gcc.dg/vmx/ldl-vsx.c: New test.

33720

+ * gcc.dg/vmx/ldl-vsx-be-order.c: New test.

33721

+ * gcc.dg/vmx/st.c: New test.

33722

+ * gcc.dg/vmx/st-be-order.c: New test.

33723

+ * gcc.dg/vmx/st-vsx.c: New test.

33724

+ * gcc.dg/vmx/st-vsx-be-order.c: New test.

33725

+ * gcc.dg/vmx/stl.c: New test.

33726

+ * gcc.dg/vmx/stl-be-order.c: New test.

33727

+ * gcc.dg/vmx/stl-vsx.c: New test.

33728

+ * gcc.dg/vmx/stl-vsx-be-order.c: New test.

33729

+

33730

+ Backport from mainline 208021

33731

+ 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33732

+

33733

+ * gcc.dg/vmx/vsums.c: Check entire result vector.

33734

+ * gcc.dg/vmx/vsums-be-order.c: Likewise.

33735

+

33736

+ Backport from mainline 208049

33737

+ 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33738

+

33739

+ * gcc.dg/vmx/lde.c: New test.

33740

+ * gcc.dg/vmx/lde-be-order.c: New test.

33741

+ * gcc.dg/vmx/ste.c: New test.

33742

+ * gcc.dg/vmx/ste-be-order.c: New test.

33743

+

33744

+ Backport from mainline 208120

33745

+ 2014-02-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33746

+

33747

+ * gcc.dg/vmx/ld-vsx.c: Don't use vec_all_eq.

33748

+ * gcc.dg/vmx/ld-vsx-be-order.c: Likewise.

33749

+ * gcc.dg/vmx/ldl-vsx.c: Likewise.

33750

+ * gcc.dg/vmx/ldl-vsx-be-order.c: Likewise.

33751

+ * gcc.dg/vmx/merge-vsx.c: Likewise.

33752

+ * gcc.dg/vmx/merge-vsx-be-order.c: Likewise.

33753

+

33754

+ Backport from mainline 208321

33755

+ 2014-03-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33756

+

33757

+ * gcc.dg/vmx/extract-vsx.c: Replace "vector long" with "vector

33758

+ long long" throughout.

33759

+ * gcc.dg/vmx/extract-vsx-be-order.c: Likewise.

33760

+ * gcc.dg/vmx/insert-vsx.c: Likewise.

33761

+ * gcc.dg/vmx/insert-vsx-be-order.c: Likewise.

33762

+ * gcc.dg/vmx/ld-vsx.c: Likewise.

33763

+ * gcc.dg/vmx/ld-vsx-be-order.c: Likewise.

33764

+ * gcc.dg/vmx/ldl-vsx.c: Likewise.

33765

+ * gcc.dg/vmx/ldl-vsx-be-order.c: Likewise.

33766

+ * gcc.dg/vmx/merge-vsx.c: Likewise.

33767

+ * gcc.dg/vmx/merge-vsx-be-order.c: Likewise.

33768

+ * gcc.dg/vmx/st-vsx.c: Likewise.

33769

+ * gcc.dg/vmx/st-vsx-be-order.c: Likewise.

33770

+ * gcc.dg/vmx/stl-vsx.c: Likewise.

33771

+ * gcc.dg/vmx/stl-vsx-be-order.c: Likewise.

33772

+

33773

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33774

+

33775

+ Back port from mainline

33776

+ 2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com>

33777

+

33778

+ PR target/59909

33779

+ * gcc.target/powerpc/quad-atomic.c: New file to test power8 quad

33780

+ word atomic functions at runtime.

33781

+

33782

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33783

+

33784

+ Backport from mainline

33785

+ 2013-10-23 Pat Haugen <pthaugen@us.ibm.com>

33786

+

33787

+ * gcc.target/powerpc/direct-move.h: Fix header for executable tests.

33788

+

33789

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33790

+

33791

+ Backport from mainline

33792

+ 2013-04-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33793

+

33794

+ PR target/56843

33795

+ * gcc.target/powerpc/recip-1.c: Modify expected output.

33796

+ * gcc.target/powerpc/recip-3.c: Likewise.

33797

+ * gcc.target/powerpc/recip-4.c: Likewise.

33798

+ * gcc.target/powerpc/recip-5.c: Add expected output for iterations.

33799

+

33800

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33801

+

33802

+ Backport from mainline

33803

+ 2013-08-19 Peter Bergner <bergner@vnet.ibm.com>

33804

+

33805

+ * gcc.target/powerpc/dfp-dd-2.c: New test.

33806

+ * gcc.target/powerpc/dfp-td-2.c: Likewise.

33807

+ * gcc.target/powerpc/dfp-td-3.c: Likewise.

33808

+

33809

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33810

+

33811

+ ELFv2 ABI Support

33812

+ Backport from mainline r204808:

33813

+

33814

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

33815

+

33816

+ * gcc.target/powerpc/ppc64-abi-1.c (stack_frame_t): Remove

33817

+ compiler and linker field if _CALL_ELF == 2.

33818

+ * gcc.target/powerpc/ppc64-abi-2.c (stack_frame_t): Likewise.

33819

+ * gcc.target/powerpc/ppc64-abi-dfp-1.c (stack_frame_t): Likewise.

33820

+ * gcc.dg/stack-usage-1.c (SIZE): Update value for _CALL_ELF == 2.

33821

+

33822

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

33823

+

33824

+ * gcc.target/powerpc/ppc64-abi-dfp-1.c (FUNC_START): New macro.

33825

+ (WRAPPER): Use it.

33826

+ * gcc.target/powerpc/no-r11-1.c: Skip on powerpc_elfv2.

33827

+ * gcc.target/powerpc/no-r11-2.c: Skip on powerpc_elfv2.

33828

+ * gcc.target/powerpc/no-r11-3.c: Skip on powerpc_elfv2.

33829

+

33830

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

33831

+

33832

+ * lib/target-supports.exp (check_effective_target_powerpc_elfv2):

33833

+ New function.

33834

+ * gcc.target/powerpc/pr57949-1.c: Disable for powerpc_elfv2.

33835

+ * gcc.target/powerpc/pr57949-2.c: Likewise.

33836

+

33837

+ Backport from mainline r204799:

33838

+

33839

+ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

33840

+

33841

+ * g++.dg/eh/ppc64-sighandle-cr.C: New test.

33842

+

33843

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33844

+

33845

+ Backport from mainline r201750.

33846

+ Note: Default setting of -mcompat-align-parm inverted!

33847

+

33848

+ 2013-08-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33849

+

33850

+ PR target/57949

33851

+ * gcc.target/powerpc/pr57949-1.c: New.

33852

+ * gcc.target/powerpc/pr57949-2.c: New.

33853

+

33854

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33855

+

33856

+ Little Endian Vector Support

33857

+ Backport from mainline r205638

33858

+ 2013-12-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33859

+

33860

+ * gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c: Skip for little

33861

+ endian.

33862

+

33863

+ Backport from mainline r205146

33864

+ 2013-11-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33865

+

33866

+ * gcc.target/powerpc/pr48258-1.c: Skip for little endian.

33867

+

33868

+ Backport from mainline r204862

33869

+ 2013-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33870

+

33871

+ * gcc.dg/vmx/3b-15.c: Revise for little endian.

33872

+

33873

+ Backport from mainline r204321

33874

+ 2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com>

33875

+

33876

+ * gcc.dg/vmx/vec-set.c: New.

33877

+

33878

+ Backport from mainline r204138

33879

+ 2013-10-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33880

+

33881

+ * gcc.dg/vmx/gcc-bug-i.c: Add little endian variant.

33882

+ * gcc.dg/vmx/eg-5.c: Likewise.

33883

+

33884

+ Backport from mainline r203930

33885

+ 2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com>

33886

+

33887

+ * gcc.target/powerpc/altivec-perm-1.c: Move the two vector pack

33888

+ tests into...

33889

+ * gcc.target/powerpc/altivec-perm-3.c: ...this new test, which is

33890

+ restricted to big-endian targets.

33891

+

33892

+ Backport from mainline r203246

33893

+ 2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33894

+

33895

+ * gcc.target/powerpc/pr43154.c: Skip for ppc64 little endian.

33896

+ * gcc.target/powerpc/fusion.c: Likewise.

33897

+

33898

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33899

+

33900

+ Backport from mainline

33901

+ 2013-11-27 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33902

+

33903

+ * gfortran.dg/nan_7.f90: Disable for little endian PowerPC.

33904

+

33905

+ Backport from mainline r205106:

33906

+

33907

+ 2013-11-20 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

33908

+

33909

+ * gcc.target/powerpc/darwin-longlong.c (msw): Make endian-safe.

33910

+

33911

+ Backport from mainline r205046:

33912

+

33913

+ 2013-11-19 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

33914

+

33915

+ * gcc.target/powerpc/ppc64-abi-2.c (MAKE_SLOT): New macro to

33916

+ construct parameter slot value in endian-independent way.

33917

+ (fcevv, fciievv, fcvevv): Use it.

33918

+

33919

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33920

+

33921

+ Power8 HTM Support

33922

+ Backport from mainline

33923

+ * lib/target-supports.exp (check_effective_target_powerpc_htm_ok): New

33924

+ function to test if HTM is available.

33925

+ * gcc.target/powerpc/htm-xl-intrin-1.c: New test.

33926

+ * gcc.target/powerpc/htm-builtin-1.c: New test.

33927

+

33928

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

33929

+

33930

+ Power8 Base Support

33931

+ Backport from mainline

33932

+ 2013-11-22 Michael Meissner <meissner@linux.vnet.ibm.com>

33933

+

33934

+ PR target/59054

33935

+ * gcc.target/powerpc/direct-move.h (VSX_REG_ATTR): Allow test to

33936

+ specify an appropriate register class for VSX operations.

33937

+ (load_vsx): Use it.

33938

+ (load_gpr_to_vsx): Likewise.

33939

+ (load_vsx_to_gpr): Likewise.

33940

+ * gcc.target/powerpc/direct-move-vint1.c: Use an appropriate

33941

+ register class for VSX registers that the type can handle. Remove

33942

+ checks for explicit number of instructions generated, just check

33943

+ if the instruction is generated.

33944

+ * gcc.target/powerpc/direct-move-vint2.c: Likewise.

33945

+ * gcc.target/powerpc/direct-move-float1.c: Likewise.

33946

+ * gcc.target/powerpc/direct-move-float2.c: Likewise.

33947

+ * gcc.target/powerpc/direct-move-double1.c: Likewise.

33948

+ * gcc.target/powerpc/direct-move-double2.c: Likewise.

33949

+ * gcc.target/powerpc/direct-move-long1.c: Likewise.

33950

+ * gcc.target/powerpc/direct-move-long2.c: Likewise.

33951

+

33952

+ * gcc.target/powerpc/bool3-av.c: Limit to 64-bit mode for now.

33953

+ * gcc.target/powerpc/bool3-p7.c: Likewise.

33954

+ * gcc.target/powerpc/bool3-p8.c: Likewise.

33955

+

33956

+ * gcc.target/powerpc/p8vector-ldst.c: Just check that the

33957

+ appropriate instructions are generated, don't check the count.

33958

+

33959

+ 2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com>

33960

+

33961

+ PR target/59054

33962

+ * gcc.target/powerpc/pr59054.c: New test.

33963

+

33964

+ 2013-08-22 Michael Meissner <meissner@linux.vnet.ibm.com>

33965

+

33966

+ * gcc.target/powerpc/pr57744.c: Declare abort.

33967

+

33968

+ 2013-07-18 Pat Haugen <pthaugen@us.ibm.com>

33969

+

33970

+ * gcc.target/powerpc/pr57744.c: Fix typo.

33971

+

33972

+ Back port from mainline

33973

+ 2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>

33974

+

33975

+ * gcc.target/powerpc/p8vector-fp.c: New test for floating point

33976

+ scalar operations when using -mupper-regs-sf and -mupper-regs-df.

33977

+ * gcc.target/powerpc/ppc-target-1.c: Update tests to allow either

33978

+ VSX scalar operations or the traditional floating point form of

33979

+ the instruction.

33980

+ * gcc.target/powerpc/ppc-target-2.c: Likewise.

33981

+ * gcc.target/powerpc/recip-3.c: Likewise.

33982

+ * gcc.target/powerpc/recip-5.c: Likewise.

33983

+ * gcc.target/powerpc/pr72747.c: Likewise.

33984

+ * gcc.target/powerpc/vsx-builtin-3.c: Likewise.

33985

+

33986

+ Back port from mainline

33987

+ 2013-09-27 Michael Meissner <meissner@linux.vnet.ibm.com>

33988

+

33989

+ * gcc.target/powerpc/p8vector-ldst.c: New test for -mupper-regs-sf

33990

+ and -mupper-regs-df.

33991

+

33992

+ Back port from mainline

33993

+ 2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>

33994

+

33995

+ PR target/58673

33996

+ * gcc.target/powerpc/pr58673-1.c: New file to test whether

33997

+ -mquad-word + -mno-vsx-timode causes errors.

33998

+ * gcc.target/powerpc/pr58673-2.c: Likewise.

33999

+

34000

+

34001

+ Backport from trunk.

34002

+ 2013-07-23 Michael Meissner <meissner@linux.vnet.ibm.com>

34003

+

34004

+ * gcc.target/powerpc/bool2.h: New file, test the code generation

34005

+ of logical operations for power5, altivec, power7, and power8 systems.

34006

+ * gcc.target/powerpc/bool2-p5.c: Likewise.

34007

+ * gcc.target/powerpc/bool2-av.c: Likewise.

34008

+ * gcc.target/powerpc/bool2-p7.c: Likewise.

34009

+ * gcc.target/powerpc/bool2-p8.c: Likewise.

34010

+ * gcc.target/powerpc/bool3.h: Likewise.

34011

+ * gcc.target/powerpc/bool3-av.c: Likewise.

34012

+ * gcc.target/powerpc/bool2-p7.c: Likewise.

34013

+ * gcc.target/powerpc/bool2-p8.c: Likewise.

34014

+

34015

+ Backport from trunk.

34016

+ 2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com>

34017

+

34018

+ * gcc.target/powerpc/fusion.c: New file, test power8 fusion support.

34019

+

34020

+ Back port from the trunk

34021

+ 2013-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>

34022

+

34023

+ PR target/57744

34024

+ * gcc.target/powerpc/pr57744.c: New test to make sure lqarx and

34025

+ stqcx. get even registers.

34026

+

34027

+ Back port from the trunk

34028

+

34029

+ 2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com>

34030

+ Pat Haugen <pthaugen@us.ibm.com>

34031

+ Peter Bergner <bergner@vnet.ibm.com>

34032

+

34033

+ * gcc.target/powerpc/atomic-p7.c: New file, add tests for atomic

34034

+ load/store instructions on power7, power8.

34035

+ * gcc.target/powerpc/atomic-p8.c: Likewise.

34036

+

34037

+ Back port from the trunk

34038

+

34039

+ 2013-06-10 Michael Meissner <meissner@linux.vnet.ibm.com>

34040

+ Pat Haugen <pthaugen@us.ibm.com>

34041

+ Peter Bergner <bergner@vnet.ibm.com>

34042

+

34043

+ * gcc.target/powerpc/direct-move-vint1.c: New tests for power8

34044

+ direct move instructions.

34045

+ * gcc.target/powerpc/direct-move-vint2.c: Likewise.

34046

+ * gcc.target/powerpc/direct-move.h: Likewise.

34047

+ * gcc.target/powerpc/direct-move-float1.c: Likewise.

34048

+ * gcc.target/powerpc/direct-move-float2.c: Likewise.

34049

+ * gcc.target/powerpc/direct-move-double1.c: Likewise.

34050

+ * gcc.target/powerpc/direct-move-double2.c: Likewise.

34051

+ * gcc.target/powerpc/direct-move-long1.c: Likewise.

34052

+ * gcc.target/powerpc/direct-move-long2.c: Likewise.

34053

+

34054

+ Backport from the trunk

34055

+

34056

+ 2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com>

34057

+ Pat Haugen <pthaugen@us.ibm.com>

34058

+ Peter Bergner <bergner@vnet.ibm.com>

34059

+

34060

+ * gcc.target/powerpc/p8vector-builtin-1.c: New test to test

34061

+ power8 builtin functions.

34062

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c: Likewise.

34063

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c: Likewise.

34064

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c: Likewise.

34065

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c: Likewise.

34066

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c: Likewise.

34067

+ * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c: Likewise.

34068

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c: New

34069

+ tests to test power8 auto-vectorization.

34070

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c: Likewise.

34071

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c: Likewise.

34072

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c: Likewise.

34073

+ * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c: Likewise.

34074

+

34075

+ * gcc.target/powerpc/crypto-builtin-1.c: Use effective target

34076

+ powerpc_p8vector_ok instead of powerpc_vsx_ok.

34077

+

34078

+ * gcc.target/powerpc/bool.c: New file, add eqv, nand, nor tests.

34079

+

34080

+ * lib/target-supports.exp (check_p8vector_hw_available) Add power8

34081

+ support.

34082

+ (check_effective_target_powerpc_p8vector_ok): Likewise.

34083

+ (is-effective-target): Likewise.

34084

+ (check_vect_support_and_set_flags): Likewise.

34085

+

34086

+ Backport from trunk

34087

+

34088

+ 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>

34089

+ Pat Haugen <pthaugen@us.ibm.com>

34090

+ Peter Bergner <bergner@vnet.ibm.com>

34091

+

34092

+ * gcc.target/powerpc/crypto-builtin-1.c: New file, test for power8

34093

+ crypto builtins.

34094

+

34095

+ Backport from mainline

34096

+ 2013-03-20 Michael Meissner <meissner@linux.vnet.ibm.com>

34097

+

34098

+ * gcc.target/powerpc/mmfpgpr.c: New test.

34099

+ * gcc.target/powerpc/sd-vsx.c: Likewise.

34100

+ * gcc.target/powerpc/sd-pwr6.c: Likewise.

34101

+ * gcc.target/powerpc/vsx-float0.c: Likewise.

34102

+

34103

+2014-04-01 Dominique d'Humieres <dominiq@lps.ens.fr>

34104

+

34105

+ PR libfortran/60128

34106

+ * gfortran.dg/fmt_en.f90: Skip unsupported rounding tests.

34107

+ XFAIL for i?86-*-solaris2.9* and hppa*-*-hpux*.

34108

+

34109

+2014-03-31 H.J. Lu <hongjiu.lu@intel.com>

34110

+

34111

+ Backport from mainline

34112

+ 2014-03-31 H.J. Lu <hongjiu.lu@intel.com>

34113

+

34114

+ PR rtl-optimization/60700

34115

+ * gcc.target/i386/pr60700.c: New test.

34116

+

34117

+2014-03-28 H.J. Lu <hongjiu.lu@intel.com>

34118

+

34119

+ PR rtl-optimization/60700

34120

+ Backport from mainline

34121

+ 2013-07-30 Zhenqiang Chen <zhenqiang.chen@linaro.org>

34122

+

34123

+ * gcc.target/arm/pr57637.c: New testcase.

34124

+

34125

+2014-04-28 Thomas Koenig <tkoenig@gcc.gnu.org>

34126

+

34127

+ PR fortran/60522

34128

+ * gfortran.dg/where_4.f90: New test case.

34129

+

34130

+2014-03-26 Martin Jambor <mjambor@suse.cz>

34131

+

34132

+ PR ipa/60419

34133

+ * g++.dg/ipa/pr60419.C: New test.

34134

+

34135

+2014-03-26 Eric Botcazou <ebotcazou@adacore.com>

34136

+

34137

+ * gcc.c-torture/execute/20140326-1.c: New test.

34138

+

34139

+2014-03-20 Tobias Burnus <burnus@net-b.de>

34140

+

34141

+ PR fortran/60543

34142

+ PR fortran/60283

34143

+ * gfortran.dg/implicit_pure_4.f90: New.

34144

+

34145

+2014-03-17 Mikael Pettersson <mikpelinux@gmail.com>

34146

+ Committed by Bill Schmidt <wschmidt@linux.vnet.ibm.com>

34147

+

34148

+ Backport from mainline:

34149

+

34150

+ 2013-06-16 Joern Rennecke <joern.rennecke@embecosm.com>

34151

+

34152

+ PR rtl-optimization/57425

34153

+ PR rtl-optimization/57569

34154

+ * gcc.dg/torture/pr57425-1.c, gcc.dg/torture/pr57425-2.c: New files.

34155

+ * gcc.dg/torture/pr57425-3.c, gcc.dg/torture/pr57569.c: Likewise.

34156

+

34157

+2014-03-17 Richard Biener <rguenther@suse.de>

34158

+

34159

+ Backport from mainline

34160

+ 2014-03-11 Richard Biener <rguenther@suse.de>

34161

+

34162

+ PR tree-optimization/60429

34163

+ PR tree-optimization/60485

34164

+ * gcc.dg/pr60485-1.c: New testcase.

34165

+ * gcc.dg/pr60485-2.c: Likewise.

34166

+

34167

+2014-03-15 Dominique d'Humieres <dominiq@lps.ens.fr>

34168

+

34169

+ Backport from mainline

34170

+ PR libfortran/60128

34171

+ * gfortran.dg/fmt_en.f90: New test.

34172

+

34173

+2014-03-15 Jerry DeLisle <jvdelisle@gcc.gnu>

34174

+

34175

+ Backport from mainline

34176

+ PR libfortran/58324

34177

+ * gfortran.dg/list_read_12.f90: New test.

34178

+

34179

+2014-03-13 Joey Ye <joey.ye@arm.com>

34180

+

34181

+ Backport from mainline

34182

+ 2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com>

34183

+

34184

+ PR tree-optimization/60454

34185

+ * gcc.c-torture/execute/pr60454.c: New test.

34186

+

34187

+2014-03-08 Janus Weil <janus@gcc.gnu.org>

34188

+

34189

+ PR fortran/60450

34190

+ * gfortran.dg/shape_8.f90: New.

34191

+

34192

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

34193

+

34194

+ Backport from mainline

34195

+ 2014-02-19 Jakub Jelinek <jakub@redhat.com>

34196

+

34197

+ PR c/37743

34198

+ * g++.dg/ext/builtin-bswap1.C: New test.

34199

+ * c-c++-common/pr37743.c: New test.

34200

+

34201

+ PR preprocessor/58844

34202

+ * c-c++-common/cpp/pr58844-1.c: New test.

34203

+ * c-c++-common/cpp/pr58844-2.c: New test.

34204

+

34205

+ 2014-02-13 Jakub Jelinek <jakub@redhat.com>

34206

+

34207

+ PR target/43546

34208

+ * gcc.target/i386/pr43546.c: New test.

34209

+

34210

+ 2014-02-12 Jakub Jelinek <jakub@redhat.com>

34211

+

34212

+ PR c/60101

34213

+ * c-c++-common/pr60101.c: New test.

34214

+

34215

+ 2014-02-11 Jakub Jelinek <jakub@redhat.com>

34216

+

34217

+ PR fortran/52370

34218

+ * gfortran.dg/pr52370.f90: New test.

34219

+

34220

+ PR debug/59776

34221

+ * gcc.dg/guality/pr59776.c: New test.

34222

+

34223

+ 2014-02-07 Jakub Jelinek <jakub@redhat.com>

34224

+

34225

+ PR preprocessor/56824

34226

+ * gcc.dg/pr56824.c: New test.

34227

+

34228

+ 2014-02-06 Jakub Jelinek <jakub@redhat.com>

34229

+

34230

+ PR target/60062

34231

+ * gcc.c-torture/execute/pr60062.c: New test.

34232

+ * gcc.c-torture/execute/pr60072.c: New test.

34233

+

34234

+ 2014-02-04 Jakub Jelinek <jakub@redhat.com>

34235

+

34236

+ PR ipa/60026

34237

+ * c-c++-common/torture/pr60026.c: New test.

34238

+

34239

+ 2014-02-05 Jakub Jelinek <jakub@redhat.com>

34240

+

34241

+ PR middle-end/57499

34242

+ * g++.dg/torture/pr57499.C: New test.

34243

+

34244

+ 2014-03-03 Jakub Jelinek <jakub@redhat.com>

34245

+

34246

+ PR preprocessor/60400

34247

+ * c-c++-common/cpp/pr60400.c: New test.

34248

+ * c-c++-common/cpp/pr60400-1.h: New file.

34249

+ * c-c++-common/cpp/pr60400-2.h: New file.

34250

+

34251

+2014-03-04 Richard Biener <rguenther@suse.de>

34252

+

34253

+ PR tree-optimization/60382

34254

+ * gcc.dg/vect/pr60382.c: New testcase.

34255

+

34256

+2014-03-02 Mikael Morin <mikael@gcc.gnu.org>

34257

+

34258

+ PR fortran/60341

34259

+ * gfortran.dg/str_comp_optimize_1.f90: New test.

34260

+

34261

+2014-02-25 Richard Biener <rguenther@suse.de>

34262

+

34263

+ Backport from mainline

34264

+ 2014-02-21 Richard Biener <rguenther@suse.de>

34265

+

34266

+ PR tree-optimization/60276

34267

+ * gcc.dg/vect/pr60276.c: New testcase.

34268

+

34269

+2014-02-25 Richard Biener <rguenther@suse.de>

34270

+

34271

+ Backport from mainline

34272

+ 2014-02-14 Richard Biener <rguenther@suse.de>

34273

+

34274

+ PR tree-optimization/60183

34275

+ * gcc.dg/torture/pr60183.c: New testcase.

34276

+

34277

+2014-02-24 Fabien Chêne <fabien@gcc.gnu.org>

34278

+

34279

+ PR c++/37140

34280

+ * g++.dg/template/using27.C: New.

34281

+ * g++.dg/template/using28.C: New.

34282

+ * g++.dg/template/using29.C: New.

34283

+

34284

+2014-02-23 David Holsgrove <david.holsgrove@xilinx.com>

34285

+

34286

+ * gcc/testsuite/gcc.target/microblaze/others/mem_reload.c: New test.

34287

+

34288

+2014-02-22 Mikael Morin <mikael@gcc.gnu.org>

34289

+

34290

+ PR fortran/59599

34291

+ * gfortran.dg/ichar_3.f90: New test.

34292

+

34293

+2014-02-21 Steven G. Kargl <kargl@gcc.gnu.org>

34294

+

34295

+ Backport from mainline

34296

+ PR fortran/59700

34297

+ * gfortran.dg/pr59700.f90: New test.

34298

+

34299

+2014-02-21 Martin Jambor <mjambor@suse.cz>

34300

+

34301

+ PR ipa/55260

34302

+ * gcc.dg/ipa/pr55260.c: New test.

34303

+

34304

+2014-02-19 Tobias Burnus <burnus@net-b.de>

34305

+

34306

+ PR fortran/49397

34307

+ * gfortran.dg/proc_ptr_45.f90: New.

34308

+ * gfortran.dg/proc_ptr_46.f90: New.

34309

+

34310

+2014-02-19 Uros Bizjak <ubizjak@gmail.com>

34311

+

34312

+ Backport from mainline

34313

+ 2014-02-19 Uros Bizjak <ubizjak@gmail.com>

34314

+

34315

+ PR target/59794

34316

+ * gcc.target/i386/pr39162.c: Add dg-prune-output.

34317

+ (dg-options): Remove -Wno-psabi.

34318

+ * gcc.target/i386/pr59794-2.c: Ditto.

34319

+ * gcc.target/i386/sse-5.c: Ditto.

34320

+

34321

+2014-02-19 Janus Weil <janus@gcc.gnu.org>

34322

+

34323

+ Backports from mainline:

34324

+ 2014-02-17 Janus Weil <janus@gcc.gnu.org>

34325

+

34326

+ PR fortran/55907

34327

+ * gfortran.dg/init_flag_12.f90: New.

34328

+

34329

+ 2014-02-18 Janus Weil <janus@gcc.gnu.org>

34330

+

34331

+ PR fortran/60231

34332

+ * gfortran.dg/typebound_generic_15.f90: New.

34333

+

34334

+2014-02-18 Kai Tietz <ktietz@redhat.com>

34335

+

34336

+ PR target/60193

34337

+ * gcc.target/i386/nest-1.c: New testcase.

34338

+

34339

+2014-02-18 Eric Botcazou <ebotcazou@adacore.com>

34340

+

34341

+ * gnat.dg/opt32.adb: New test.

34342

+

34343

+2014-02-15 Jerry DeLisle <jvdelisle@gcc.gnu>

34344

+ Dominique d'Humieres <dominiq@lps.ens.fr>

34345

+

34346

+ Backport from mainline

34347

+ PR libfortran/59771

34348

+ PR libfortran/59774

34349

+ PR libfortran/59836

34350

+ * gfortran.dg/fmt_g_1.f90: New test.

34351

+ * gfortran.dg/round_3.f08: New cases added.

34352

+

34353

+2014-02-13 Dominik Vogt <vogt@linux.vnet.ibm.com>

34354

+

34355

+ * gcc.target/s390/hotpatch-compile-8.c: New test.

34356

+

34357

+2014-02-12 Eric Botcazou <ebotcazou@adacore.com>

34358

+

34359

+ * gcc.c-torture/execute/20140212-1.c: New test.

34360

+

34361

+2014-02-10 Richard Biener <rguenther@suse.de>

34362

+

34363

+ Backport from mainline

34364

+ 2014-01-30 Richard Biener <rguenther@suse.de>

34365

+

34366

+ PR tree-optimization/59903

34367

+ * gcc.dg/torture/pr59903.c: New testcase.

34368

+

34369

+ 2014-02-10 Richard Biener <rguenther@suse.de>

34370

+

34371

+ PR tree-optimization/60115

34372

+ * gcc.dg/torture/pr60115.c: New testcase.

34373

+

34374

+2014-02-09 Janus Weil <janus@gcc.gnu.org>

34375

+

34376

+ Backport from mainline

34377

+ 2013-10-21 Tobias Burnus <burnus@net-b.de>

34378

+

34379

+ PR fortran/58803

34380

+ PR fortran/59395

34381

+ * gfortran.dg/proc_ptr_comp_38.f90: New.

34382

+

34383

+2014-02-08 Mikael Morin <mikael@gcc.gnu.org>

34384

+

34385

+ PR fortran/57033

34386

+ * gfortran.dg/default_initialization_7.f90: New test.

34387

+

34388

+2014-02-07 Paul Thomas <pault@gcc.gnu.org>

34389

+

34390

+ PR fortran/59906

34391

+ * gfortran.dg/elemental_subroutine_9.f90 : New test

34392

+

34393

+2014-02-04 Uros Bizjak <ubizjak@gmail.com>

34394

+

34395

+ Backport from mainline

34396

+ 2014-02-02 Uros Bizjak <ubizjak@gmail.com>

34397

+

34398

+ PR target/60017

34399

+ * gcc.c-torture/execute/pr60017.c: New test.

34400

+

34401

+2014-02-01 Paul Thomas <pault@gcc.gnu.org>

34402

+

34403

+ PR fortran/59414

34404

+ * gfortran.dg/allocate_class_3.f90 : New test

34405

+

34406

+2014-01-30 David Holsgrove <david.holsgrove@xilinx.com>

34407

+

34408

+ Backport from mainline.

34409

+ * gcc.target/microblaze/isa/fcmp4.c: New.

34410

+

34411

+2014-01-26 Mikael Morin <mikael@gcc.gnu.org>

34412

+

34413

+ PR fortran/58007

34414

+ * gfortran.dg/unresolved_fixup_1.f90: New test.

34415

+ * gfortran.dg/unresolved_fixup_2.f90: New test.

34416

+

34417

+2014-01-24 H.J. Lu <hongjiu.lu@intel.com>

34418

+

34419

+ Backport from mainline.

34420

+ 2014-01-23 H.J. Lu <hongjiu.lu@intel.com>

34421

+

34422

+ PR target/59929

34423

+ * gcc.target/i386/pr59929.c: New test.

34424

+

34425

+2014-01-24 Paolo Carlini <paolo.carlini@oracle.com>

34426

+

34427

+ PR c++/57524

34428

+ * g++.dg/ext/timevar2.C: New.

34429

+

34430

+2014-01-23 David Holsgrove <david.holsgrove@xilinx.com>

34431

+

34432

+ Backport from mainline.

34433

+ * gcc.target/microblaze/others/builtin-trap.c: New test.

34434

+

34435

+2014-01-23 Marek Polacek <polacek@redhat.com>

34436

+

34437

+ Backport from mainline

34438

+ 2013-10-21 Marek Polacek <polacek@redhat.com>

34439

+

34440

+ PR middle-end/58809

34441

+ * gcc.dg/gomp/pr58809.c: New test.

34442

+

34443

+2014-01-23 Jakub Jelinek <jakub@redhat.com>

34444

+

34445

+ PR middle-end/58809

34446

+ * c-c++-common/gomp/pr58809.c: New test.

34447

+

34448

+2014-01-22 Marek Polacek <polacek@redhat.com>

34449

+

34450

+ Backport from mainline

34451

+ 2014-01-22 Marek Polacek <polacek@redhat.com>

34452

+

34453

+ PR c/59891

34454

+ * gcc.dg/torture/pr59891.c: New test.

34455

+

34456

+2014-01-21 Jakub Jelinek <jakub@redhat.com>

34457

+

34458

+ PR middle-end/59860

34459

+ * gcc.dg/strlenopt-4.c: Expect the same counts on s390*-* as on all

34460

+ other targets.

34461

+

34462

+2014-01-20 Richard Biener <rguenther@suse.de>

34463

+

34464

+ PR middle-end/59860

34465

+ * gcc.dg/pr59860.c: New testcase.

34466

+

34467

+2014-01-20 Marek Polacek <polacek@redhat.com>

34468

+

34469

+ Backported from mainline

34470

+ 2014-01-17 Marek Polacek <polacek@redhat.com>

34471

+

34472

+ PR c++/59838

34473

+ * g++.dg/diagnostic/pr59838.C: New test.

34474

+

34475

+2014-01-19 Paul Thomas <pault@gcc.gnu.org>

34476

+

34477

+ Backport from mainline

34478

+ 2013-12-01 Paul Thomas <pault@gcc.gnu.org>

34479

+

34480

+ PR fortran/34547

34481

+ * gfortran.dg/null_5.f90 : Include new error.

34482

+ * gfortran.dg/null_6.f90 : Include new error.

34483

+

34484

+2014-01-17 H.J. Lu <hongjiu.lu@intel.com>

34485

+

34486

+ Backport from mainline

34487

+ 2014-01-15 H.J. Lu <hongjiu.lu@intel.com>

34488

+

34489

+ PR target/59794

34490

+ * c-c++-common/convert-vec-1.c: Also prune ABI change for

34491

+ Linux/x86.

34492

+ * g++.dg/cpp0x/constexpr-53094-2.C: Likewise.

34493

+ * g++.dg/ext/attribute-test-1.C: Likewise.

34494

+ * g++.dg/ext/attribute-test-2.C: Likewise.

34495

+ * g++.dg/ext/attribute-test-3.C: Likewise.

34496

+ * g++.dg/ext/attribute-test-4.C: Likewise.

34497

+ * g++.dg/torture/pr38565.C: Likewise.

34498

+ * gcc.dg/pr53060.c: Likewise.

34499

+ * c-c++-common/scal-to-vec2.c: Add -msse2 for x86.

34500

+ * c-c++-common/vector-compare-2.c: Likewise.

34501

+ * gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c: Likewise.

34502

+ * g++.dg/conversion/simd1.C: Add -msse2 for x86. Adjust

34503

+ dg-message line number.

34504

+

34505

+2014-01-17 H.J. Lu <hongjiu.lu@intel.com>

34506

+

34507

+ Backport from mainline

34508

+ 2014-01-14 H.J. Lu <hongjiu.lu@intel.com>

34509

+

34510

+ PR target/59794

34511

+ * gcc.target/i386/pr39162.c (y): New __m256i variable.

34512

+ (bar): Change return type to void. Set y to x.

34513

+ * gcc.target/i386/pr59794-1.c: New testcase.

34514

+ * gcc.target/i386/pr59794-2.c: Likewise.

34515

+ * gcc.target/i386/pr59794-3.c: Likewise.

34516

+ * gcc.target/i386/pr59794-4.c: Likewise.

34517

+ * gcc.target/i386/pr59794-5.c: Likewise.

34518

+ * gcc.target/i386/pr59794-6.c: Likewise.

34519

+ * gcc.target/i386/pr59794-7.c: Likewise.

34520

+

34521

+2014-01-17 Matthias Klose <doko@ubuntu.com>

34522

+

34523

+ Backport from the trunk:

34524

+ 2014-01-09 Uros Bizjak <ubizjak@gmail.com>

34525

+ * go.test/go-test.exp (go-gc-tests): Don't run peano.go on systems

34526

+ which don't support -fsplit-stack. Skip rotate[0123].go tests.

34527

+

34528

+2014-01-15 Kugan Vivekanandarajah <kuganv@linaro.org>

34529

+

34530

+ Backport from mainline

34531

+ 2014-01-15 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org>

34532

+ Kugan Vivekanandarajah <kuganv@linaro.org>

34533

+

34534

+ PR target/59695

34535

+ * g++.dg/pr59695.C: New testcase.

34536

+

34537

+2014-01-17 Terry Guo <terry.guo@arm.com>

34538

+

34539

+ * gcc.target/arm/pr59826.c: New test.

34540

+

34541

+2014-01-16 Jakub Jelinek <jakub@redhat.com>

34542

+

34543

+ PR target/59839

34544

+ * gcc.target/i386/pr59839.c: New test.

34545

+

34546

+ PR debug/54694

34547

+ * gcc.target/i386/pr9771-1.c (main): Rename to...

34548

+ (real_main): ... this. Add __asm name "main".

34549

+ (ASMNAME, ASMNAME2, STRING): Define.

34550

+

34551

+2014-01-16 Marek Polacek <polacek@redhat.com>

34552

+

34553

+ Backported from mainline

34554

+ 2014-01-16 Marek Polacek <polacek@redhat.com>

34555

+

34556

+ PR middle-end/59827

34557

+ * gcc.dg/pr59827.c: New test.

34558

+

34559

+2014-01-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

34560

+

34561

+ PR target/59803

34562

+ * gcc.c-torture/compile/pr59803.c: New testcase.

34563

+

34564

+2014-01-10 Yufeng Zhang <yufeng.zhang@arm.com>

34565

+

34566

+ * gcc.target/arm/neon/vst1Q_laneu64-1.c: New test.

34567

+

34568

+2014-01-10 Hans-Peter Nilsson <hp@axis.com>

34569

+

34570

+ * gcc.dg/pr46309.c: Disable for cris*-*-*.

34571

+

34572

+2014-01-10 Paolo Carlini <paolo.carlini@oracle.com>

34573

+

34574

+ PR c++/56060

34575

+ PR c++/59730

34576

+ * g++.dg/cpp0x/variadic144.C: New.

34577

+ * g++.dg/cpp0x/variadic145.C: Likewise.

34578

+

34579

+2014-01-10 Richard Biener <rguenther@suse.de>

34580

+

34581

+ PR tree-optimization/59715

34582

+ * gcc.dg/torture/pr59715.c: New testcase.

34583

+

34584

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

34585

+

34586

+ * gcc.target/mips/bswap-1.c, gcc.target/mips/bswap-2.c,

34587

+ gcc.target/mips/bswap-3.c, gcc.target/mips/bswap-4.c,

34588

+ gcc.target/mips/bswap-5.c, gcc.target/mips/bswap-6.c: New tests.

34589

+

34590

+2014-01-09 Richard Sandiford <rdsandiford@googlemail.com>

34591

+

34592

+ PR rtl-optimization/59137

34593

+ * gcc.target/mips/pr59137.c: New test.

34594

+

34595

+2014-01-09 Richard Biener <rguenther@suse.de>

34596

+

34597

+ Backport from mainline

34598

+ 2013-11-18 Richard Biener <rguenther@suse.de>

34599

+

34600

+ PR tree-optimization/59125

34601

+ PR tree-optimization/54570

34602

+ * gcc.dg/builtin-object-size-8.c: Un-xfail.

34603

+ * gcc.dg/builtin-object-size-14.c: New testcase.

34604

+ * gcc.dg/strlenopt-14gf.c: Adjust.

34605

+ * gcc.dg/strlenopt-1f.c: Likewise.

34606

+ * gcc.dg/strlenopt-4gf.c: Likewise.

34607

+

34608

+ 2013-12-03 Jakub Jelinek <jakub@redhat.com>

34609

+

34610

+ PR tree-optimization/59362

34611

+ * gcc.c-torture/compile/pr59362.c: New test.

34612

+

34613

+2014-01-09 Richard Earnshaw <rearnsha@arm.com>

34614

+

34615

+ PR rtl-optimization/54300

34616

+ * gcc.target/arm/pr54300.C: New test.

34617

+

34618

+2014-01-08 Martin Jambor <mjambor@suse.cz>

34619

+

34620

+ PR ipa/59610

34621

+ * gcc.dg/ipa/pr59610.c: New test.

34622

+

34623

+2014-01-07 Jakub Jelinek <jakub@redhat.com>

34624

+

34625

+ PR rtl-optimization/58668

34626

+ * gcc.dg/pr58668.c: New test.

34627

+

34628

+ Backported from mainline

34629

+ 2013-12-16 Jakub Jelinek <jakub@redhat.com>

34630

+

34631

+ PR middle-end/58956

34632

+ PR middle-end/59470

34633

+ * gcc.target/i386/pr59470.c: New test.

34634

+

34635

+2014-01-04 Janus Weil <janus@gcc.gnu.org>

34636

+

34637

+ Backport from mainline

34638

+ 2014-01-02 Janus Weil <janus@gcc.gnu.org>

34639

+

34640

+ PR fortran/59654

34641

+ * gfortran.dg/dynamic_dispatch_12.f90: New.

34642

+

34643

+2014-01-03 Joseph Myers <joseph@codesourcery.com>

34644

+

34645

+ * gcc.target/powerpc/rs6000-ldouble-3.c: New test.

34646

+

34647

+2014-01-03 Jakub Jelinek <jakub@redhat.com>

34648

+

34649

+ PR target/59625

34650

+ * gcc.target/i386/pr59625.c: New test.

34651

+

34652

+2014-01-01 Jakub Jelinek <jakub@redhat.com>

34653

+

34654

+ PR rtl-optimization/59647

34655

+ * g++.dg/opt/pr59647.C: New test.

34656

+

34657

+2013-12-31 Janus Weil <janus@gcc.gnu.org>

34658

+

34659

+ Backport from mainline

34660

+ 2013-12-30 Janus Weil <janus@gcc.gnu.org>

34661

+

34662

+ PR fortran/58998

34663

+ * gfortran.dg/generic_28.f90: New.

34664

+

34665

+2013-12-20 Jakub Jelinek <jakub@redhat.com>

34666

+

34667

+ PR c++/59255

34668

+ * g++.dg/tree-prof/pr59255.C: New test.

34669

+

34670

+2013-12-19 James Greenhalgh <james.greenhalgh@arm.com>

34671

+

34672

+ Backport from Mainline

34673

+ 2013-05-01 James Greenhalgh <james.greenhalgh@arm.com>

34674

+

34675

+ * gcc.target/aarch64/scalar_intrinsics.c (force_simd): New.

34676

+ (test_vceqd_s64): Force arguments to SIMD registers.

34677

+ (test_vceqzd_s64): Likewise.

34678

+ (test_vcged_s64): Likewise.

34679

+ (test_vcled_s64): Likewise.

34680

+ (test_vcgezd_s64): Likewise.

34681

+ (test_vcged_u64): Likewise.

34682

+ (test_vcgtd_s64): Likewise.

34683

+ (test_vcltd_s64): Likewise.

34684

+ (test_vcgtzd_s64): Likewise.

34685

+ (test_vcgtd_u64): Likewise.

34686

+ (test_vclezd_s64): Likewise.

34687

+ (test_vcltzd_s64): Likewise.

34688

+ (test_vtst_s64): Likewise.

34689

+ (test_vtst_u64): Likewise.

34690

+

34691

+2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

34692

+ Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

34693

+

34694

+ Backport from mainline

34695

+ 2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>

34696

+ * gcc/testsuite/gcc.target/s390/hotpatch-1.c: New test

34697

+ * gcc/testsuite/gcc.target/s390/hotpatch-2.c: New test

34698

+ * gcc/testsuite/gcc.target/s390/hotpatch-3.c: New test

34699

+ * gcc/testsuite/gcc.target/s390/hotpatch-4.c: New test

34700

+ * gcc/testsuite/gcc.target/s390/hotpatch-5.c: New test

34701

+ * gcc/testsuite/gcc.target/s390/hotpatch-6.c: New test

34702

+ * gcc/testsuite/gcc.target/s390/hotpatch-7.c: New test

34703

+ * gcc/testsuite/gcc.target/s390/hotpatch-8.c: New test

34704

+ * gcc/testsuite/gcc.target/s390/hotpatch-9.c: New test

34705

+ * gcc/testsuite/gcc.target/s390/hotpatch-10.c: New test

34706

+ * gcc/testsuite/gcc.target/s390/hotpatch-11.c: New test

34707

+ * gcc/testsuite/gcc.target/s390/hotpatch-12.c: New test

34708

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c: New test

34709

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c: New test

34710

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c: New test

34711

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c: New test

34712

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c: New test

34713

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c: New test

34714

+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c: New test

34715

+

34716

+2013-12-18 Janus Weil <janus@gcc.gnu.org>

34717

+

34718

+ Backport from mainline

34719

+ 2013-12-15 Janus Weil <janus@gcc.gnu.org>

34720

+

34721

+ PR fortran/59493

34722

+ * gfortran.dg/unlimited_polymorphic_15.f90: New.

34723

+

34724

+2013-12-15 Uros Bizjak <ubizjak@gmail.com>

34725

+

34726

+ PR testsuite/58630

34727

+ * gcc.target/i386/pr43662.c (dg-options):

34728

+ Add -maccumulate-outgoing-args.

34729

+ * gcc.target/i386/pr43869.c (dg-options): Ditto.

34730

+ * gcc.target/i386/pr57003.c (dg-options): Ditto.

34731

+ * gcc.target/i386/avx-vzeroupper-16.c (dg-options):

34732

+ Remove -mtune=generic and add -maccumulate-outgoing-args instead.

34733

+ * gcc.target/i386/avx-vzeroupper-17.c (dg-options): Ditto.

34734

+ * gcc.target/i386/avx-vzeroupper-18.c (dg-options): Ditto.

34735

+ * gcc.target/x86_64/abi/callabi/func-1.c (dg-options):

34736

+ Add -maccumulate-outgoing-args.

34737

+ * gcc.target/x86_64/abi/callabi/func-2a.c (dg-options): Ditto.

34738

+ * gcc.target/x86_64/abi/callabi/func-2b.c (dg-options): Ditto.

34739

+ * gcc.target/x86_64/abi/callabi/func-indirect.c (dg-options): Ditto.

34740

+ * gcc.target/x86_64/abi/callabi/func-indirect-2a.c (dg-options): Ditto.

34741

+ * gcc.target/x86_64/abi/callabi/func-indirect-2b.c (dg-options): Ditto.

34742

+ * gcc.target/x86_64/abi/callabi/leaf-1.c (dg-options): Ditto.

34743

+ * gcc.target/x86_64/abi/callabi/leaf-2.c (dg-options): Ditto.

34744

+ * gcc.target/x86_64/abi/callabi/pr38891.c (dg-options): Ditto.

34745

+ * gcc.target/x86_64/abi/callabi/vaarg-1.c (dg-options): Ditto.

34746

+ * gcc.target/x86_64/abi/callabi/vaarg-2.c (dg-options): Ditto.

34747

+ * gcc.target/x86_64/abi/callabi/vaarg-3.c (dg-options): Ditto.

34748

+ * gcc.target/x86_64/abi/callabi/vaarg-4a.c (dg-options): Ditto.

34749

+ * gcc.target/x86_64/abi/callabi/vaarg-4b.c (dg-options): Ditto.

34750

+ * gcc.target/x86_64/abi/callabi/vaarg-5a.c (dg-options): Ditto.

34751

+ * gcc.target/x86_64/abi/callabi/vaarg-5b.c (dg-options): Ditto.

34752

+

34753

+2013-12-12 Jakub Jelinek <jakub@redhat.com>

34754

+

34755

+ PR middle-end/59470

34756

+ * g++.dg/opt/pr59470.C: New test.

34757

+

34758

+ PR libgomp/59467

34759

+ * gfortran.dg/gomp/pr59467.f90: New test.

34760

+ * c-c++-common/gomp/pr59467.c: New test.

34761

+

34762

+2013-12-12 Uros Bizjak <ubizjak@gmail.com>

34763

+

34764

+ Backport from mainline

34765

+ 2013-12-12 Ryan Mansfield <rmansfield@qnx.com>

34766

+

34767

+ PR testsuite/59442

34768

+ * gcc.target/i386/sse2-movapd-1.c: Fix alignment attributes.

34769

+ * gcc.target/i386/sse2-movapd-2.c: Likewise.

34770

+ * gcc.target/i386/avx-vmovapd-256-1.c: Likewise.

34771

+ * gcc.target/i386/avx-vmovapd-256-2.c: Likewise.

34772

+

34773

+2013-12-08 Uros Bizjak <ubizjak@gmail.com>

34774

+

34775

+ Backport from mainline

34776

+ 2013-12-06 Uros Bizjak <ubizjak@gmail.com>

34777

+

34778

+ PR target/59405

34779

+ * gcc.target/i386/pr59405.c: New test.

34780

+

34781

+2013-12-06 Jakub Jelinek <jakub@redhat.com>

34782

+

34783

+ PR tree-optimization/59388

34784

+ * gcc.c-torture/execute/pr59388.c: New test.

34785

+

34786

+2013-12-06 Richard Biener <rguenther@suse.de>

34787

+

34788

+ Backport from mainline

34789

+ 2013-11-28 Richard Biener <rguenther@suse.de>

34790

+

34791

+ PR tree-optimization/59330

34792

+ * gcc.dg/torture/pr59330.c: New testcase.

34793

+

34794

+2013-12-06 Richard Biener <rguenther@suse.de>

34795

+

34796

+ Backport from mainline

34797

+ 2013-11-27 Richard Biener <rguenther@suse.de>

34798

+

34799

+ PR tree-optimization/59288

34800

+ * gcc.dg/torture/pr59288.c: New testcase.

34801

+

34802

+ 2013-11-19 Richard Biener <rguenther@suse.de>

34803

+

34804

+ PR tree-optimization/59164

34805

+ * gcc.dg/torture/pr59164.c: New testcase.

34806

+

34807

+ 2013-09-05 Richard Biener <rguenther@suse.de>

34808

+

34809

+ PR tree-optimization/58137

34810

+ * gcc.target/i386/pr58137.c: New testcase.

34811

+

34812

+2013-12-06 Oleg Endo <olegendo@gcc.gnu.org>

34813

+

34814

+ PR target/51244

34815

+ PR target/59343

34816

+ * gcc.target/sh/pr51244-19.c: Adjust test case.

34817

+

34818

+2013-12-05 Richard Biener <rguenther@suse.de>

34819

+

34820

+ Backport from mainline

34821

+ 2013-11-19 Richard Biener <rguenther@suse.de>

34822

+

34823

+ PR middle-end/58956

34824

+ * gcc.dg/torture/pr58956.c: New testcase.

34825

+

34826

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

34827

+

34828

+ PR c++/59268

34829

+ * g++.dg/cpp0x/constexpr-template6.C: New test.

34830

+

34831

+ PR rtl-optimization/58726

34832

+ * gcc.c-torture/execute/pr58726.c: New test.

34833

+

34834

+ PR target/59163

34835

+ * g++.dg/torture/pr59163.C: New test.

34836

+

34837

+2013-12-03 Marek Polacek <polacek@redhat.com>

34838

+

34839

+ Backport from mainline

34840

+ 2013-12-03 Marek Polacek <polacek@redhat.com>

34841

+

34842

+ PR c/59351

34843

+ * gcc.dg/pr59351.c: New test.

34844

+

34845

+2013-12-03 Jakub Jelinek <jakub@redhat.com>

34846

+

34847

+ PR middle-end/59011

34848

+ * gcc.dg/pr59011.c: New test.

34849

+

34850

+ PR target/58864

34851

+ * g++.dg/opt/pr58864.C: New test.

34852

+

34853

+2013-12-02 Jakub Jelinek <jakub@redhat.com>

34854

+

34855

+ PR tree-optimization/59358

34856

+ * gcc.c-torture/execute/pr59358.c: New test.

34857

+

34858

+2013-12-02 Richard Biener <rguenther@suse.de>

34859

+

34860

+ PR tree-optimization/59139

34861

+ * gcc.dg/torture/pr59139.c: New testcase.

34862

+

34863

+2013-11-27 Tom de Vries <tom@codesourcery.com>

34864

+ Marc Glisse <marc.glisse@inria.fr>

34865

+

34866

+ PR c++/59032

34867

+ * c-c++-common/pr59032.c: New testcase.

34868

+

34869

+2013-11-27 Tom de Vries <tom@codesourcery.com>

34870

+ Marc Glisse <marc.glisse@inria.fr>

34871

+

34872

+ PR middle-end/59037

34873

+ * c-c++-common/pr59037.c: New testcase.

34874

+

34875

+2013-11-30 Paul Thomas <pault@gcc.gnu.org>

34876

+

34877

+ Backport from mainline

34878

+ 2013-11-04 Paul Thomas <pault@gcc.gnu.org>

34879

+

34880

+ PR fortran/57445

34881

+ * gfortran.dg/optional_class_1.f90 : New test

34882

+

34883

+2013-11-29 Jakub Jelinek <jakub@redhat.com>

34884

+

34885

+ PR c/59280

34886

+ * c-c++-common/pr59280.c: New test.

34887

+

34888

+2013-11-28 Jakub Jelinek <jakub@redhat.com>

34889

+

34890

+ PR c++/59297

34891

+ * g++.dg/gomp/pr59297.C: New test.

34892

+

34893

+2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

34894

+

34895

+ Backport from mainline

34896

+ 2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>

34897

+

34898

+ * gcc.target/arm/vrinta-ce.c: New testcase.

34899

+

34900

+2013-11-28 Uros Bizjak <ubizjak@gmail.com>

34901

+

34902

+ Backport from mainline

34903

+ 2013-11-23 Uros Bizjak <ubizjak@gmail.com>

34904

+

34905

+ PR target/56788

34906

+ * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>:

34907

+ Declare as MULTI_ARG_1_SF instruction.

34908

+ <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction.

34909

+ * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename

34910

+ from *xop_vmfrcz_<mode>.

34911

+ * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss

34912

+ to merge scalar result with __A.

34913

+ (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar

34914

+ result with __A.

34915

+

34916

+2013-11-28 Terry Guo <terry.guo@arm.com>

34917

+

34918

+ Backport mainline r205391

34919

+ 2013-11-26 Terry Guo <terry.guo@arm.com>

34920

+

34921

+ * gcc.target/arm/thumb1-pic-high-reg.c: New case.

34922

+ * gcc.target/arm/thumb1-pic-single-base.c: New case.

34923

+

34924

+2013-11-27 Jakub Jelinek <jakub@redhat.com>

34925

+

34926

+ Backported from mainline

34927

+ 2013-11-27 Jakub Jelinek <jakub@redhat.com>

34928

+

34929

+ PR tree-optimization/59014

34930

+ * gcc.c-torture/execute/pr59014-2.c: New test.

34931

+

34932

+ 2013-11-26 Jakub Jelinek <jakub@redhat.com>

34933

+

34934

+ PR tree-optimization/59014

34935

+ * gcc.c-torture/execute/pr59014.c: New test.

34936

+

34937

+2013-11-27 Eric Botcazou <ebotcazou@adacore.com>

34938

+

34939

+ * gcc.c-torture/execute/20131127-1.c: New test.

34940

+

34941

+2013-11-25 Vidya Praveen <vidyapraveen@arm.com>

34942

+

34943

+ Backport from mainline

34944

+ 2013-10-21 Vidya Praveen <vidyapraveen@arm.com>

34945

+

34946

+ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort().

34947

+ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort() and exit().

34948

+

34949

+2013-11-20 Dominik Vogt <vogt@linux.vnet.ibm.com>

34950

+

34951

+ Backport from mainline

34952

+ * gcc.target/s390/htm-1.c: Rename to ...

34953

+ * gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c: ... this

34954

+ one.

34955

+ * gcc.target/s390/htm-xl-intrin-1.c: Rename to ...

34956

+ * gcc.target/s390/htm-builtins-compile-3.c: ... this one.

34957

+ * gcc.target/s390/htm-builtins-compile-2.c: New testcase.

34958

+ * gcc.target/s390/htm-builtins-1.c: New testcase.

34959

+ * gcc.target/s390/htm-builtins-2.c: New testcase.

34960

+ * gcc.target/s390/s390.exp: Add check for htm machine.

34961

+

34962

+2013-11-19 Richard Biener <rguenther@suse.de>

34963

+

34964

+ PR tree-optimization/57517

34965

+ * gfortran.fortran-torture/compile/pr57517.f90: New testcase.

34966

+ * gcc.dg/torture/pr57517.c: Likewise.

34967

+

34968

+2013-11-19 Richard Biener <rguenther@suse.de>

34969

+

34970

+ Backport from mainline

34971

+ 2013-11-05 Richard Biener <rguenther@suse.de>

34972

+

34973

+ PR middle-end/58941

34974

+ * gcc.dg/torture/pr58941.c: New testcase.

34975

+

34976

+2013-11-18 Richard Biener <rguenther@suse.de>

34977

+

34978

+ Backport from mainline

34979

+ 2013-10-21 Richard Biener <rguenther@suse.de>

34980

+

34981

+ PR tree-optimization/58794

34982

+ * c-c++-common/torture/pr58794-1.c: New testcase.

34983

+ * c-c++-common/torture/pr58794-2.c: Likewise.

34984

+

34985

+ 2013-10-21 Richard Biener <rguenther@suse.de>

34986

+

34987

+ PR middle-end/58742

34988

+ * c-c++-common/fold-divmul-1.c: New testcase.

34989

+

34990

+ 2013-11-06 Richard Biener <rguenther@suse.de>

34991

+

34992

+ PR tree-optimization/58653

34993

+ * gcc.dg/tree-ssa/predcom-6.c: New testcase.

34994

+ * gcc.dg/tree-ssa/predcom-7.c: Likewise.

34995

+

34996

+ PR tree-optimization/59047

34997

+ * gcc.dg/torture/pr59047.c: New testcase.

34998

+

34999

+ 2013-10-15 Richard Biener <rguenther@suse.de>

35000

+

35001

+ PR tree-optimization/58143

35002

+ * gcc.dg/torture/pr58143-1.c: New testcase.

35003

+ * gcc.dg/torture/pr58143-2.c: Likewise.

35004

+ * gcc.dg/torture/pr58143-3.c: Likewise.

35005

+

35006

+2013-11-17 Janus Weil <janus@gcc.gnu.org>

35007

+

35008

+ Backport from mainline

35009

+ 2013-11-07 Janus Weil <janus@gcc.gnu.org>

35010

+

35011

+ PR fortran/58471

35012

+ * gfortran.dg/constructor_9.f90: New.

35013

+

35014

+2013-11-16 Janus Weil <janus@gcc.gnu.org>

35015

+

35016

+ Backport from mainline

35017

+ 2013-09-20 Janus Weil <janus@gcc.gnu.org>

35018

+

35019

+ PR fortran/58099

35020

+ * gfortran.dg/proc_ptr_43.f90: New.

35021

+

35022

+2013-11-16 Paul Thomas <pault@gcc.gnu.org>

35023

+

35024

+ PR fortran/58771

35025

+ * gfortran.dg/derived_external_function_1.f90 : New test

35026

+

35027

+2013-11-14 Uros Bizjak <ubizjak@gmail.com>

35028

+

35029

+ Backport from mainline

35030

+ 2013-11-06 Uros Bizjak <ubizjak@gmail.com>

35031

+

35032

+ PR target/59021

35033

+ * gcc.target/i386/pr59021.c: New test.

35034

+

35035

+2013-11-14 Jakub Jelinek <jakub@redhat.com>

35036

+

35037

+ PR target/59101

35038

+ * gcc.c-torture/execute/pr59101.c: New test.

35039

+

35040

+2013-11-11 Jakub Jelinek <jakub@redhat.com>

35041

+

35042

+ Backported from mainline

35043

+ 2013-11-06 Jakub Jelinek <jakub@redhat.com>

35044

+

35045

+ PR middle-end/58970

35046

+ * gcc.c-torture/compile/pr58970-1.c: New test.

35047

+ * gcc.c-torture/compile/pr58970-2.c: New test.

35048

+

35049

+ 2013-11-05 Jakub Jelinek <jakub@redhat.com>

35050

+

35051

+ PR rtl-optimization/58997

35052

+ * gcc.c-torture/compile/pr58997.c: New test.

35053

+

35054

+2013-11-10 Wei Mi <wmi@google.com>

35055

+

35056

+ * gcc.dg/pr57518.c: Backport regex fix from r200720.

35057

+

35058

+2013-11-07 H.J. Lu <hongjiu.lu@intel.com>

35059

+

35060

+ Backport from mainline

35061

+ 2013-11-07 H.J. Lu <hongjiu.lu@intel.com>

35062

+

35063

+ PR target/59034

35064

+ * gcc.target/i386/pr59034-1.c: New test.

35065

+ * gcc.target/i386/pr59034-2.c: Likewise.

35066

+

35067

+2013-11-06 Wei Mi <wmi@google.com>

35068

+

35069

+ PR regression/58985

35070

+ * gcc.dg/pr57518.c: Add subreg in regexp pattern.

35071

+

35072

+2013-11-05 Steven G. Kargl <kargl@gcc.gnu.org>

35073

+

35074

+ PR fortran/58989

35075

+ * gfortran.dg/reshape_6.f90: New test.

35076

+

35077

+2013-11-05 Jakub Jelinek <jakub@redhat.com>

35078

+

35079

+ PR tree-optimization/58984

35080

+ * gcc.c-torture/execute/pr58984.c: New test.

35081

+

35082

+2013-11-04 Marek Polacek <polacek@redhat.com>

35083

+

35084

+ Backport from mainline

35085

+ 2013-11-04 Marek Polacek <polacek@redhat.com>

35086

+

35087

+ PR c++/58979

35088

+ * g++.dg/diagnostic/pr58979.C: New test.

35089

+

35090

+2013-11-03 H.J. Lu <hongjiu.lu@intel.com>

35091

+

35092

+ Backport from mainline

35093

+ 2013-10-12 H.J. Lu <hongjiu.lu@intel.com>

35094

+

35095

+ PR target/58690

35096

+ * gcc.target/i386/pr58690.c: New test

35097

+

35098

+2013-11-02 Janus Weil <janus@gcc.gnu.org>

35099

+

35100

+ Backport from mainline

35101

+ 2013-09-23 Janus Weil <janus@gcc.gnu.org>

35102

+

35103

+ PR fortran/58355

35104

+ * gfortran.dg/extends_15.f90: New.

35105

+

35106

+2013-10-29 Uros Bizjak <ubizjak@gmail.com>

35107

+

35108

+ Backport from mainline

35109

+ 2013-08-08 Richard Sandiford <rdsandiford@googlemail.com>

35110

+

35111

+ PR rtl-optimization/58079

35112

+ * gcc.dg/torture/pr58079.c: New test.

35113

+

35114

+2013-10-28 Tom de Vries <tom@codesourcery.com>

35115

+

35116

+ * gcc.target/arm/require-pic-register-loc.c: New test.

35117

+

35118

+2013-10-26 Uros Bizjak <ubizjak@gmail.com>

35119

+

35120

+ Backport from mainline

35121

+ 2013-10-22 Uros Bizjak <ubizjak@gmail.com>

35122

+

35123

+ PR target/58779

35124

+ * gcc.target/i386/pr30315.c: Remove MINUSCC, DECCC, MINUSCCONLY

35125

+ and MINUSCCZEXT defines. Update scan-assembler dg directive.

35126

+ * gcc.dg/torture/pr58779.c: New test.

35127

+

35128

+2013-10-25 Richard Henderson <rth@redhat.com>

35129

+

35130

+ PR rtl/58542

35131

+ * gcc.dg/atomic-store-6.c: New.

35132

+

35133

+2013-10-25 Tom de Vries <tom@codesourcery.com>

35134

+

35135

+ PR c++/58282

35136

+ * g++.dg/tm/noexcept-6.C: New test.

35137

+

35138

+2013-10-25 Eric Botcazou <ebotcazou@adacore.com>

35139

+

35140

+ * gcc.c-torture/execute/pr58831.c: New test.

35141

+

35142

+2013-10-23 Tom de Vries <tom@codesourcery.com>

35143

+

35144

+ PR tree-optimization/58805

35145

+ * gcc.dg/pr58805.c: New test.

35146

+

35147

+2013-10-23 Richard Biener <rguenther@suse.de>

35148

+

35149

+ * gcc.dg/torture/pr58830.c: New testcase.

35150

+

35151

+ Backport from mainline

35152

+ 2013-06-24 Richard Biener <rguenther@suse.de>

35153

+

35154

+ PR tree-optimization/57488

35155

+ * gcc.dg/torture/pr57488.c: New testcase.

35156

+

35157

+2013-10-19 Oleg Endo <olegendo@gcc.gnu.org>

35158

+

35159

+ * gcc.target/sh/pr54089-3.c: Fix test for load of constant 31.

35160

+

35161

+2013-10-17 Paolo Carlini <paolo.carlini@oracle.com>

35162

+

35163

+ PR c++/58596

35164

+ * g++.dg/cpp0x/lambda/lambda-nsdmi5.C: New

35165

+

35166

+2013-10-16 Paolo Carlini <paolo.carlini@oracle.com>

35167

+

35168

+ PR c++/58633

35169

+ * g++.dg/cpp0x/decltype57.C: New.

35170

+ * g++.dg/cpp0x/enum18.C: Revert r174385 changes.

35171

+

35172

2013-10-16 Release Manager

35173

35174

* GCC 4.8.2 released.

35175

@@ -39,9 +1897,9 @@

35176

Backport from mainline

35177

2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

35178

35179

- * gcc.target/s390/htm-1.c: New file.

35180

- * gcc.target/s390/htm-nofloat-1.c: New file.

35181

- * gcc.target/s390/htm-xl-intrin-1.c: New file.

35182

+ * gcc.target/s390/htm-1.c: New file.

35183

+ * gcc.target/s390/htm-nofloat-1.c: New file.

35184

+ * gcc.target/s390/htm-xl-intrin-1.c: New file.

35185

35186

2013-10-04 Tobias Burnus <burnus@net-b.de>

35187

35188

@@ -307,8 +2165,8 @@

35189

Backport from mainline

35190

2013-08-12 Perez Read <netfirewall@gmail.com>

35191

35192

- PR target/58132

35193

- * gcc.target/i386/movabs-1.c: New test.

35194

+ PR target/58132

35195

+ * gcc.target/i386/movabs-1.c: New test.

35196

35197

2013-08-11 Janus Weil <janus@gcc.gnu.org>

35198

35199

@@ -494,7 +2352,7 @@

35200

2013-06-19 Wei Mi <wmi@google.com>

35201

35202

PR rtl-optimization/57518

35203

- * testsuite/gcc.dg/pr57518.c: New test.

35204

+ * gcc.dg/pr57518.c: New test.

35205

35206

2013-06-11 Tobias Burnus <burnus@net-b.de>

35207

35208

@@ -623,8 +2481,8 @@

35209

35210

2013-05-09 Martin Jambor <mjambor@suse.cz>

35211

35212

- PR middle-end/56988

35213

- * gcc.dg/ipa/pr56988.c: New test.

35214

+ PR middle-end/56988

35215

+ * gcc.dg/ipa/pr56988.c: New test.

35216

35217

2013-05-08 Marc Glisse <marc.glisse@inria.fr>

35218

35219

@@ -701,7 +2559,7 @@

35220

2013-04-25 Marek Polacek <polacek@redhat.com>

35221

35222

PR tree-optimization/57066

35223

- * gcc.dg/torture/builtin-logb-1.c: Adjust testcase.

35224

+ * gcc.dg/torture/builtin-logb-1.c: Adjust testcase.

35225

35226

2013-05-02 Jakub Jelinek <jakub@redhat.com>

35227

35228

@@ -727,8 +2585,8 @@

35229

Backport from mainline

35230

2013-04-24 Vladimir Makarov <vmakarov@redhat.com>

35231

35232

- PR rtl-optimizations/57046

35233

- * gcc.target/i386/pr57046.c: New test.

35234

+ PR rtl-optimizations/57046

35235

+ * gcc.target/i386/pr57046.c: New test.

35236

35237

2013-05-02 Vladimir Makarov <vmakarov@redhat.com>

35238

35239

@@ -735,8 +2593,8 @@

35240

Backport from mainline

35241

2013-04-22 Vladimir Makarov <vmakarov@redhat.com>

35242

35243

- PR target/57018

35244

- * gcc.target/i386/pr57018.c: New test.

35245

+ PR target/57018

35246

+ * gcc.target/i386/pr57018.c: New test.

35247

35248

2013-05-02 Vladimir Makarov <vmakarov@redhat.com>

35249

35250

@@ -743,8 +2601,8 @@

35251

Backport from mainline

35252

2013-04-18 Jakub Jelinek <jakub@redhat.com>

35253

35254

- PR rtl-optimization/56999

35255

- * g++.dg/opt/pr56999.C: New test.

35256

+ PR rtl-optimization/56999

35257

+ * g++.dg/opt/pr56999.C: New test.

35258

35259

2013-05-02 Vladimir Makarov <vmakarov@redhat.com>

35260

35261

@@ -751,8 +2609,8 @@

35262

Backport from mainline

35263

2013-04-19 Vladimir Makarov <vmakarov@redhat.com>

35264

35265

- PR rtl-optimization/56847

35266

- * gcc.dg/pr56847.c: New test.

35267

+ PR rtl-optimization/56847

35268

+ * gcc.dg/pr56847.c: New test.

35269

35270

2013-05-02 Ian Bolton <ian.bolton@arm.com>

35271

35272

@@ -1102,7 +2960,7 @@

35273

2013-03-29 Tobias Burnus <burnus@net-b.de>

35274

35275

PR fortran/56737

35276

- * testsuite/gfortran.dg/fmt_cache_3.f90: New.

35277

+ * gfortran.dg/fmt_cache_3.f90: New.

35278

35279

2013-04-02 Richard Biener <rguenther@suse.de>

35280

35281

@@ -1636,7 +3494,7 @@

35282

2013-02-20 Jan Hubicka <jh@suse.cz>

35283

35284

PR tree-optimization/56265

35285

- * testsuite/g++.dg/ipa/devirt-11.C: New testcase.

35286

+ * g++.dg/ipa/devirt-11.C: New testcase.

35287

35288

2013-02-20 Richard Biener <rguenther@suse.de>

35289

35290

@@ -1823,11 +3681,9 @@

35291

35292

Avoid instrumenting duplicated memory access in the same basic block

35293

* c-c++-common/asan/no-redundant-instrumentation-1.c: New test.

35294

- * testsuite/c-c++-common/asan/no-redundant-instrumentation-2.c:

35295

- Likewise.

35296

- * testsuite/c-c++-common/asan/no-redundant-instrumentation-3.c:

35297

- Likewise.

35298

- * testsuite/c-c++-common/asan/inc.c: Likewise.

35299

+ * c-c++-common/asan/no-redundant-instrumentation-2.c: Likewise.

35300

+ * c-c++-common/asan/no-redundant-instrumentation-3.c: Likewise.

35301

+ * c-c++-common/asan/inc.c: Likewise.

35302

35303

2013-02-12 Vladimir Makarov <vmakarov@redhat.com>

35304

35305

Index: gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90

35306

===================================================================

35307

--- a/src/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 (.../tags/gcc_4_8_2_release)

35308

+++ b/src/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 (.../branches/gcc-4_8-branch)

35309

@@ -0,0 +1,13 @@

35310

+SUBROUTINE cal_helicity (uh, ph, phb, wavg, ims, ime, its, ite)

35311

+ INTEGER, INTENT( IN ) :: ims, ime, its, ite

35312

+ REAL, DIMENSION( ims:ime), INTENT( IN ) :: ph, phb, wavg

35313

+ REAL, DIMENSION( ims:ime), INTENT( INOUT ) :: uh

35314

+ INTEGER :: i

35315

+ REAL :: zu

35316

+ DO i = its, ite

35317

+ zu = (ph(i ) + phb(i)) + (ph(i-1) + phb(i-1))

35318

+ IF (wavg(i) .GT. 0) THEN

35319

+ uh(i) = uh(i) + zu

35320

+ ENDIF

35321

+ END DO

35322

+END SUBROUTINE cal_helicity

35323

Index: gcc/testsuite/g++.dg/ext/attribute-test-2.C

35324

===================================================================

35325

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-2.C (.../tags/gcc_4_8_2_release)

35326

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-2.C (.../branches/gcc-4_8-branch)

35327

@@ -50,3 +50,4 @@

35328

35329

/* Ignore a warning that is irrelevant to the purpose of this test. */

35330

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

35331

+/* { dg-prune-output "changes the ABI" } */

35332

Index: gcc/testsuite/g++.dg/ext/attribute-test-3.C

35333

===================================================================

35334

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-3.C (.../tags/gcc_4_8_2_release)

35335

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-3.C (.../branches/gcc-4_8-branch)

35336

@@ -52,3 +52,4 @@

35337

35338

/* Ignore a warning that is irrelevant to the purpose of this test. */

35339

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

35340

+/* { dg-prune-output "changes the ABI" } */

35341

Index: gcc/testsuite/g++.dg/ext/traits1.C

35342

===================================================================

35343

--- a/src/gcc/testsuite/g++.dg/ext/traits1.C (.../tags/gcc_4_8_2_release)

35344

+++ b/src/gcc/testsuite/g++.dg/ext/traits1.C (.../branches/gcc-4_8-branch)

35345

@@ -0,0 +1,4 @@

35346

+// PR c++/58504

35347

+

35348

+template<bool = __has_nothrow_assign(void)> struct A {};

35349

+A<> a;

35350

Index: gcc/testsuite/g++.dg/ext/attribute-test-4.C

35351

===================================================================

35352

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-4.C (.../tags/gcc_4_8_2_release)

35353

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-4.C (.../branches/gcc-4_8-branch)

35354

@@ -49,3 +49,4 @@

35355

35356

/* Ignore a warning that is irrelevant to the purpose of this test. */

35357

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

35358

+/* { dg-prune-output "changes the ABI" } */

35359

Index: gcc/testsuite/g++.dg/ext/stmtexpr15.C

35360

===================================================================

35361

--- a/src/gcc/testsuite/g++.dg/ext/stmtexpr15.C (.../tags/gcc_4_8_2_release)

35362

+++ b/src/gcc/testsuite/g++.dg/ext/stmtexpr15.C (.../branches/gcc-4_8-branch)

35363

@@ -0,0 +1,7 @@

35364

+// PR c++/59097

35365

+// { dg-options "" }

35366

+

35367

+void foo()

35368

+{

35369

+ int x[({ return; })]; // { dg-error "non-integral" }

35370

+}

35371

Index: gcc/testsuite/g++.dg/ext/vector25.C

35372

===================================================================

35373

--- a/src/gcc/testsuite/g++.dg/ext/vector25.C (.../tags/gcc_4_8_2_release)

35374

+++ b/src/gcc/testsuite/g++.dg/ext/vector25.C (.../branches/gcc-4_8-branch)

35375

@@ -0,0 +1,6 @@

35376

+volatile int i __attribute__((vector_size(8)));

35377

+

35378

+void foo()

35379

+{

35380

+ i += i;

35381

+}

35382

Index: gcc/testsuite/g++.dg/ext/builtin-bswap1.C

35383

===================================================================

35384

--- a/src/gcc/testsuite/g++.dg/ext/builtin-bswap1.C (.../tags/gcc_4_8_2_release)

35385

+++ b/src/gcc/testsuite/g++.dg/ext/builtin-bswap1.C (.../branches/gcc-4_8-branch)

35386

@@ -0,0 +1,22 @@

35387

+// PR c/37743

35388

+// { dg-do compile }

35389

+

35390

+#if defined(__UINT32_TYPE__) && defined(__INT32_TYPE__)

35391

+

35392

+void foo (__UINT32_TYPE__);

35393

+void foo (__INT32_TYPE__);

35394

+

35395

+void

35396

+bar (__UINT32_TYPE__ x)

35397

+{

35398

+ foo (__builtin_bswap32 (x));

35399

+}

35400

+

35401

+#else

35402

+

35403

+void

35404

+bar ()

35405

+{

35406

+}

35407

+

35408

+#endif

35409

Index: gcc/testsuite/g++.dg/ext/attrib48.C

35410

===================================================================

35411

--- a/src/gcc/testsuite/g++.dg/ext/attrib48.C (.../tags/gcc_4_8_2_release)

35412

+++ b/src/gcc/testsuite/g++.dg/ext/attrib48.C (.../branches/gcc-4_8-branch)

35413

@@ -0,0 +1,6 @@

35414

+// PR c++/54652

35415

+

35416

+typedef unsigned L __attribute__ ((aligned));

35417

+typedef unsigned L __attribute__ ((aligned));

35418

+

35419

+L l;

35420

Index: gcc/testsuite/g++.dg/ext/vector27.C

35421

===================================================================

35422

--- a/src/gcc/testsuite/g++.dg/ext/vector27.C (.../tags/gcc_4_8_2_release)

35423

+++ b/src/gcc/testsuite/g++.dg/ext/vector27.C (.../branches/gcc-4_8-branch)

35424

@@ -0,0 +1,7 @@

35425

+// PR c++/58845

35426

+

35427

+void foo()

35428

+{

35429

+ int v __attribute__((vector_size(8)));

35430

+ v = v || v; // { dg-bogus "" "" { xfail *-*-* } }

35431

+}

35432

Index: gcc/testsuite/g++.dg/ext/timevar2.C

35433

===================================================================

35434

--- a/src/gcc/testsuite/g++.dg/ext/timevar2.C (.../tags/gcc_4_8_2_release)

35435

+++ b/src/gcc/testsuite/g++.dg/ext/timevar2.C (.../branches/gcc-4_8-branch)

35436

@@ -0,0 +1,14 @@

35437

+// PR c++/57524

35438

+// { dg-options "-ftime-report" }

35439

+// { dg-prune-output "wall" }

35440

+// { dg-prune-output "times" }

35441

+// { dg-prune-output "TOTAL" }

35442

+// { dg-prune-output "checks" }

35443

+

35444

+namespace detail {

35445

+namespace indirect_traits {}

35446

+using namespace indirect_traits;

35447

+void fn1() {

35448

+using namespace detail;

35449

+}

35450

+}

35451

Index: gcc/testsuite/g++.dg/ext/attribute-test-1.C

35452

===================================================================

35453

--- a/src/gcc/testsuite/g++.dg/ext/attribute-test-1.C (.../tags/gcc_4_8_2_release)

35454

+++ b/src/gcc/testsuite/g++.dg/ext/attribute-test-1.C (.../branches/gcc-4_8-branch)

35455

@@ -36,3 +36,4 @@

35456

35457

/* Ignore a warning that is irrelevant to the purpose of this test. */

35458

/* { dg-prune-output ".*GCC vector returned by reference.*" } */

35459

+/* { dg-prune-output "changes the ABI" } */

35460

Index: gcc/testsuite/g++.dg/vect/pr60836.cc

35461

===================================================================

35462

--- a/src/gcc/testsuite/g++.dg/vect/pr60836.cc (.../tags/gcc_4_8_2_release)

35463

+++ b/src/gcc/testsuite/g++.dg/vect/pr60836.cc (.../branches/gcc-4_8-branch)

35464

@@ -0,0 +1,39 @@

35465

+// { dg-do compile }

35466

+

35467

+int a, b;

35468

+typedef double (*NormFunc) (const int &);

35469

+int &

35470

+max (int &p1, int &p2)

35471

+{

35472

+ if (p1 < p2)

35473

+ return p2;

35474

+ return p1;

35475

+}

35476

+

35477

+struct A

35478

+{

35479

+ int operator () (int p1, int p2)

35480

+ {

35481

+ return max (p1, p2);

35482

+ }

35483

+};

35484

+template < class, class > double

35485

+norm_ (const int &)

35486

+{

35487

+ char c, d;

35488

+ A e;

35489

+ for (; a; a++)

35490

+ {

35491

+ b = e (b, d);

35492

+ b = e (b, c);

35493

+ }

35494

+}

35495

+

35496

+void

35497

+norm ()

35498

+{

35499

+ static NormFunc f = norm_ < int, A >;

35500

+ f = 0;

35501

+}

35502

+

35503

+// { dg-final { cleanup-tree-dump "vect" } }

35504

Index: gcc/testsuite/g++.dg/vect/pr60729.cc

35505

===================================================================

35506

--- a/src/gcc/testsuite/g++.dg/vect/pr60729.cc (.../tags/gcc_4_8_2_release)

35507

+++ b/src/gcc/testsuite/g++.dg/vect/pr60729.cc (.../branches/gcc-4_8-branch)

35508

@@ -0,0 +1,10 @@

35509

+// { dg-do compile }

35510

+// { dg-additional-options "-ftrapv" }

35511

+

35512

+void doSomething(int dim, double *Y, double *A)

35513

+{

35514

+ for (int k=0; k<dim; k++)

35515

+ Y[k] += __builtin_fabs (A[k]);

35516

+}

35517

+

35518

+// { dg-final { cleanup-tree-dump "vect" } }

35519

Index: gcc/testsuite/g++.dg/opt/pr60849.C

35520

===================================================================

35521

--- a/src/gcc/testsuite/g++.dg/opt/pr60849.C (.../tags/gcc_4_8_2_release)

35522

+++ b/src/gcc/testsuite/g++.dg/opt/pr60849.C (.../branches/gcc-4_8-branch)

35523

@@ -0,0 +1,13 @@

35524

+// { dg-do compile }

35525

+// { dg-options "-O2" }

35526

+

35527

+int g;

35528

+

35529

+extern "C" int isnan ();

35530

+

35531

+void foo(float a) {

35532

+ int (*xx)(...);

35533

+ xx = isnan;

35534

+ if (xx(a))

35535

+ g++;

35536

+}

35537

Index: gcc/testsuite/g++.dg/opt/pr59647.C

35538

===================================================================

35539

--- a/src/gcc/testsuite/g++.dg/opt/pr59647.C (.../tags/gcc_4_8_2_release)

35540

+++ b/src/gcc/testsuite/g++.dg/opt/pr59647.C (.../branches/gcc-4_8-branch)

35541

@@ -0,0 +1,32 @@

35542

+// PR rtl-optimization/59647

35543

+// { dg-do compile }

35544

+// { dg-options "-O2 -fno-tree-vrp" }

35545

+// { dg-additional-options "-msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ia32 } } }

35546

+

35547

+void f1 (int);

35548

+void f2 ();

35549

+double f3 (int);

35550

+

35551

+struct A

35552

+{

35553

+ int f4 () const

35554

+ {

35555

+ if (a == 0)

35556

+ return 1;

35557

+ return 0;

35558

+ }

35559

+ unsigned f5 ()

35560

+ {

35561

+ if (!f4 ())

35562

+ f2 ();

35563

+ return a;

35564

+ }

35565

+ int a;

35566

+};

35567

+

35568

+void

35569

+f6 (A *x)

35570

+{

35571

+ unsigned b = x->f5 ();

35572

+ f1 (b - 1 - f3 (x->f5 () - 1U));

35573

+}

35574

Index: gcc/testsuite/g++.dg/opt/pr59470.C

35575

===================================================================

35576

--- a/src/gcc/testsuite/g++.dg/opt/pr59470.C (.../tags/gcc_4_8_2_release)

35577

+++ b/src/gcc/testsuite/g++.dg/opt/pr59470.C (.../branches/gcc-4_8-branch)

35578

@@ -0,0 +1,188 @@

35579

+// PR middle-end/59470

35580

+// { dg-do run }

35581

+// { dg-options "-O2 -fstack-protector" }

35582

+// { dg-additional-options "-fPIC" { target fpic } }

35583

+// { dg-require-effective-target fstack_protector }

35584

+

35585

+struct A

35586

+{

35587

+ int a1;

35588

+ A () throw () : a1 (0) {}

35589

+};

35590

+

35591

+struct B

35592

+{

35593

+ unsigned int b1 () throw ();

35594

+};

35595

+

35596

+__attribute__((noinline, noclone)) unsigned int

35597

+B::b1 () throw ()

35598

+{

35599

+ asm volatile ("" : : : "memory");

35600

+ return 0;

35601

+}

35602

+

35603

+struct C

35604

+{

35605

+ const A **c1;

35606

+ void c2 (const A *, unsigned int);

35607

+};

35608

+

35609

+__attribute__((noinline, noclone)) void

35610

+C::c2 (const A *, unsigned int)

35611

+{

35612

+ asm volatile ("" : : : "memory");

35613

+}

35614

+

35615

+struct D

35616

+{

35617

+ C *d1;

35618

+};

35619

+

35620

+struct E

35621

+{

35622

+ int e1;

35623

+ int e2;

35624

+ D e3;

35625

+};

35626

+

35627

+struct F

35628

+{

35629

+ virtual int f1 (const char * s, int n);

35630

+};

35631

+

35632

+struct G

35633

+{

35634

+ F *g1;

35635

+ bool g2;

35636

+ G & g3 (const char * ws, int len)

35637

+ {

35638

+ if (__builtin_expect (!g2, true)

35639

+ && __builtin_expect (this->g1->f1 (ws, len) != len, false))

35640

+ g2 = true;

35641

+ return *this;

35642

+ }

35643

+};

35644

+

35645

+struct H : public A

35646

+{

35647

+ const char *h1;

35648

+ unsigned int h2;

35649

+ bool h3;

35650

+ const char *h4;

35651

+ char h5;

35652

+ char h6;

35653

+ char h7[31];

35654

+ bool h8;

35655

+ H () : h1 (0), h2 (0), h4 (0), h5 (0), h6 (0), h8 (false) {}

35656

+ void h9 (const D &) __attribute__((noinline, noclone));

35657

+};

35658

+

35659

+void

35660

+H::h9 (const D &)

35661

+{

35662

+ h3 = true;

35663

+ __builtin_memset (h7, 0, sizeof (h7));

35664

+ asm volatile ("" : : : "memory");

35665

+};

35666

+

35667

+B b;

35668

+

35669

+inline const H *

35670

+foo (const D &x)

35671

+{

35672

+ const unsigned int i = b.b1 ();

35673

+ const A **j = x.d1->c1;

35674

+ if (!j[i])

35675

+ {

35676

+ H *k = 0;

35677

+ try

35678

+ {

35679

+ k = new H;

35680

+ k->h9 (x);

35681

+ }

35682

+ catch (...)

35683

+ {

35684

+ }

35685

+ x.d1->c2 (k, i);

35686

+ }

35687

+ return static_cast <const H *>(j[i]);

35688

+}

35689

+

35690

+__attribute__((noinline, noclone)) int

35691

+bar (char *x, unsigned long v, const char *y, int z, bool w)

35692

+{

35693

+ asm volatile ("" : : "r" (x), "r" (v), "r" (y) : "memory");

35694

+ asm volatile ("" : : "r" (z), "r" (w) : "memory");

35695

+ return 8;

35696

+}

35697

+

35698

+__attribute__((noinline, noclone)) void

35699

+baz (void *z, const char *g, unsigned int h, char s, E &e, char *n, char *c, int &l)

35700

+{

35701

+ asm volatile ("" : : "r" (z), "r" (g), "r" (h) : "memory");

35702

+ asm volatile ("" : : "r" (s), "r" (&e), "r" (n) : "memory");

35703

+ asm volatile ("" : : "r" (c), "r" (&l) : "memory");

35704

+ if (n == c)

35705

+ __builtin_abort ();

35706

+ int i = 0;

35707

+ asm ("" : "+r" (i));

35708

+ if (i == 0)

35709

+ __builtin_exit (0);

35710

+}

35711

+

35712

+__attribute__((noinline, noclone)) G

35713

+test (void *z, G s, E &x, char, long v)

35714

+{

35715

+ const D &d = x.e3;

35716

+ const H *h = foo (d);

35717

+ const char *q = h->h7;

35718

+ const int f = x.e2;

35719

+ const int i = 5 * sizeof (long);

35720

+ char *c = static_cast <char *>(__builtin_alloca (i));

35721

+ const int b = f & 74;

35722

+ const bool e = (b != 64 && b != 8);

35723

+ const unsigned long u = ((v > 0 || !e) ? (unsigned long) v : -(unsigned long) v);

35724

+ int l = bar (c + i, u, q, f, e);

35725

+ c += i - l;

35726

+ if (h->h3)

35727

+ {

35728

+ char *c2 = static_cast <char *>(__builtin_alloca ((l + 1) * 2));

35729

+ baz (z, h->h1, h->h2, h->h6, x, c2 + 2, c, l);

35730

+ c = c2 + 2;

35731

+ }

35732

+ if (__builtin_expect (e, true))

35733

+ {

35734

+ }

35735

+ else if ((f & 4096) && v)

35736

+ {

35737

+ {

35738

+ const bool m = f & 176;

35739

+ *--c = q[m];

35740

+ *--c = q[1];

35741

+ }

35742

+ }

35743

+ const int w = x.e1;

35744

+ if (w > l)

35745

+ {

35746

+ char * c3 = static_cast <char *>(__builtin_alloca (w));

35747

+ c = c3;

35748

+ }

35749

+ return s.g3 (c, l);

35750

+}

35751

+

35752

+int

35753

+main ()

35754

+{

35755

+ H h;

35756

+ const A *j[1];

35757

+ C c;

35758

+ G g;

35759

+ E e;

35760

+ h.h9 (e.e3);

35761

+ j[0] = &h;

35762

+ c.c1 = j;

35763

+ e.e3.d1 = &c;

35764

+ test (0, g, e, 0, 0);

35765

+ __builtin_abort ();

35766

+}

35767

Index: gcc/testsuite/g++.dg/opt/pr58864.C

35768

===================================================================

35769

--- a/src/gcc/testsuite/g++.dg/opt/pr58864.C (.../tags/gcc_4_8_2_release)

35770

+++ b/src/gcc/testsuite/g++.dg/opt/pr58864.C (.../branches/gcc-4_8-branch)

35771

@@ -0,0 +1,21 @@

35772

+// PR target/58864

35773

+// { dg-do compile }

35774

+// { dg-options "-Os" }

35775

+// { dg-additional-options "-march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } }

35776

+

35777

+struct A { A (); ~A (); };

35778

+struct B { B (); };

35779

+

35780

+float d, e;

35781

+

35782

+void

35783

+foo ()

35784

+{

35785

+ A a;

35786

+ float c = d;

35787

+ while (1)

35788

+ {

35789

+ B b;

35790

+ e = c ? -c : 0;

35791

+ }

35792

+}

35793

Index: gcc/testsuite/g++.dg/tree-prof/pr59255.C

35794

===================================================================

35795

--- a/src/gcc/testsuite/g++.dg/tree-prof/pr59255.C (.../tags/gcc_4_8_2_release)

35796

+++ b/src/gcc/testsuite/g++.dg/tree-prof/pr59255.C (.../branches/gcc-4_8-branch)

35797

@@ -0,0 +1,29 @@

35798

+// PR c++/59255

35799

+// { dg-options "-O2 -std=c++11" }

35800

+

35801

+struct S

35802

+{

35803

+ __attribute__((noinline, noclone)) ~S () noexcept (true)

35804

+ {

35805

+ if (fn)

35806

+ fn (1);

35807

+ }

35808

+ void (*fn) (int);

35809

+};

35810

+

35811

+__attribute__((noinline, noclone)) void

35812

+foo (int x)

35813

+{

35814

+ if (x != 1)

35815

+ throw 1;

35816

+}

35817

+

35818

+int

35819

+main ()

35820

+{

35821

+ for (int i = 0; i < 100; i++)

35822

+ {

35823

+ S s;

35824

+ s.fn = foo;

35825

+ }

35826

+}

35827

Index: gcc/testsuite/g++.dg/expr/cast2.C

35828

===================================================================

35829

--- a/src/gcc/testsuite/g++.dg/expr/cast2.C (.../tags/gcc_4_8_2_release)

35830

+++ b/src/gcc/testsuite/g++.dg/expr/cast2.C (.../branches/gcc-4_8-branch)

35831

@@ -1,3 +1,5 @@

35832

+// { dg-options "-pedantic" }

35833

+

35834

void (*p)();

35835

35836

void f() {

35837

Index: gcc/testsuite/g++.dg/gomp/for-20.C

35838

===================================================================

35839

--- a/src/gcc/testsuite/g++.dg/gomp/for-20.C (.../tags/gcc_4_8_2_release)

35840

+++ b/src/gcc/testsuite/g++.dg/gomp/for-20.C (.../branches/gcc-4_8-branch)

35841

@@ -0,0 +1,16 @@

35842

+// PR c++/60146

35843

+// { dg-do compile }

35844

+// { dg-options -fopenmp }

35845

+

35846

+int foo() { return 0; }

35847

+

35848

+template<typename T> void bar()

35849

+{

35850

+#pragma omp parallel for

35851

+ for (T i = foo(); i < 8; ++i) {}

35852

+}

35853

+

35854

+void baz()

35855

+{

35856

+ bar<int>();

35857

+}

35858

Index: gcc/testsuite/g++.dg/gomp/pr59297.C

35859

===================================================================

35860

--- a/src/gcc/testsuite/g++.dg/gomp/pr59297.C (.../tags/gcc_4_8_2_release)

35861

+++ b/src/gcc/testsuite/g++.dg/gomp/pr59297.C (.../branches/gcc-4_8-branch)

35862

@@ -0,0 +1,25 @@

35863

+// PR c++/59297

35864

+// { dg-do compile }

35865

+// { dg-options "-fopenmp" }

35866

+

35867

+template <typename T>

35868

+struct A

35869

+{

35870

+ ~A ();

35871

+ const T &operator[] (int) const;

35872

+};

35873

+

35874

+struct B

35875

+{

35876

+ int &operator () (A <int>);

35877

+};

35878

+

35879

+void

35880

+foo (B &x, int &z)

35881

+{

35882

+ A<A<int> > y;

35883

+ #pragma omp atomic

35884

+ x (y[0]) += 1;

35885

+ #pragma omp atomic

35886

+ z += x(y[1]);

35887

+}

35888

Index: gcc/testsuite/g++.dg/diagnostic/pr59838.C

35889

===================================================================

35890

--- a/src/gcc/testsuite/g++.dg/diagnostic/pr59838.C (.../tags/gcc_4_8_2_release)

35891

+++ b/src/gcc/testsuite/g++.dg/diagnostic/pr59838.C (.../branches/gcc-4_8-branch)

35892

@@ -0,0 +1,4 @@

35893

+// PR c++/59838

35894

+// { dg-do compile }

35895

+

35896

+enum E { a, b = (E) a }; // { dg-error "conversion to incomplete type" }

35897

Index: gcc/testsuite/g++.dg/diagnostic/pedantic.C

35898

===================================================================

35899

--- a/src/gcc/testsuite/g++.dg/diagnostic/pedantic.C (.../tags/gcc_4_8_2_release)

35900

+++ b/src/gcc/testsuite/g++.dg/diagnostic/pedantic.C (.../branches/gcc-4_8-branch)

35901

@@ -0,0 +1,11 @@

35902

+// { dg-do compile }

35903

+// { dg-options "-pedantic" }

35904

+typedef void F(void);

35905

+

35906

+void foo()

35907

+{

35908

+ void* p = 0;

35909

+ F* f1 = reinterpret_cast<F*>(p); // { dg-warning "ISO" }

35910

+#pragma GCC diagnostic ignored "-pedantic"

35911

+ F* f2 = reinterpret_cast<F*>(p);

35912

+}

35913

Index: gcc/testsuite/g++.dg/diagnostic/pr58979.C

35914

===================================================================

35915

--- a/src/gcc/testsuite/g++.dg/diagnostic/pr58979.C (.../tags/gcc_4_8_2_release)

35916

+++ b/src/gcc/testsuite/g++.dg/diagnostic/pr58979.C (.../branches/gcc-4_8-branch)

35917

@@ -0,0 +1,4 @@

35918

+// PR c++/58979

35919

+// { dg-do compile }

35920

+

35921

+int i = 0->*0; // { dg-error "invalid type argument of" }

35922

Index: gcc/testsuite/g++.dg/conversion/dr195.C

35923

===================================================================

35924

--- a/src/gcc/testsuite/g++.dg/conversion/dr195.C (.../tags/gcc_4_8_2_release)

35925

+++ b/src/gcc/testsuite/g++.dg/conversion/dr195.C (.../branches/gcc-4_8-branch)

35926

@@ -6,6 +6,7 @@

35927

// it (yet).

35928

35929

// This checks we warn when being pedantic.

35930

+// { dg-options "-pedantic" }

35931

35932

typedef void (*PF)(void);

35933

typedef void *PV;

35934

Index: gcc/testsuite/g++.dg/conversion/simd1.C

35935

===================================================================

35936

--- a/src/gcc/testsuite/g++.dg/conversion/simd1.C (.../tags/gcc_4_8_2_release)

35937

+++ b/src/gcc/testsuite/g++.dg/conversion/simd1.C (.../branches/gcc-4_8-branch)

35938

@@ -1,4 +1,5 @@

35939

/* { dg-do compile } */

35940

+/* { dg-options "-msse2" { target { i?86-*-* x86_64-*-* } } } */

35941

35942

/* Test overload resolution of vector types.

35943

From Janis Johnson and Paolo Bonzini, based on PR/16882 */

35944

@@ -17,7 +18,7 @@

35945

void foo ()

35946

{

35947

vss = vld(i, vscp); /* { dg-error "no matching function for call" } */

35948

- // { dg-message "candidate" "candidate note" { target *-*-* } 19 }

35949

+ // { dg-message "candidate" "candidate note" { target *-*-* } 20 }

35950

vss = vld(i, vssp);

35951

vss = vld(i, cvssp);

35952

}

35953

Index: gcc/testsuite/g++.dg/tls/thread_local8.C

35954

===================================================================

35955

--- a/src/gcc/testsuite/g++.dg/tls/thread_local8.C (.../tags/gcc_4_8_2_release)

35956

+++ b/src/gcc/testsuite/g++.dg/tls/thread_local8.C (.../branches/gcc-4_8-branch)

35957

@@ -0,0 +1,12 @@

35958

+// PR c++/55800

35959

+// { dg-options "-std=c++11" }

35960

+// { dg-require-alias "" }

35961

+// { dg-require-effective-target tls }

35962

+// { dg-final { scan-assembler "_ZTH12foo_instance" { target tls_native } } }

35963

+

35964

+struct foo

35965

+{

35966

+ foo();

35967

+};

35968

+

35969

+thread_local foo foo_instance;

35970

Index: gcc/testsuite/g++.dg/tls/thread_local-ice2.C

35971

===================================================================

35972

--- a/src/gcc/testsuite/g++.dg/tls/thread_local-ice2.C (.../tags/gcc_4_8_2_release)

35973

+++ b/src/gcc/testsuite/g++.dg/tls/thread_local-ice2.C (.../branches/gcc-4_8-branch)

35974

@@ -0,0 +1,11 @@

35975

+// PR c++/58672

35976

+// { dg-options "-std=c++11" }

35977

+// { dg-require-effective-target tls }

35978

+

35979

+struct A

35980

+{

35981

+ A(int);

35982

+ i; // { dg-error "" }

35983

+};

35984

+

35985

+thread_local A a(0);

35986

Index: gcc/testsuite/g++.dg/pr60769.C

35987

===================================================================

35988

--- a/src/gcc/testsuite/g++.dg/pr60769.C (.../tags/gcc_4_8_2_release)

35989

+++ b/src/gcc/testsuite/g++.dg/pr60769.C (.../branches/gcc-4_8-branch)

35990

@@ -0,0 +1,43 @@

35991

+/* { dg-do compile } */

35992

+/* { dg-options "-O" } */

35993

+

35994

+template <class T> void fun(T);

35995

+struct B {};

35996

+struct R {

35997

+ int *x;

35998

+ B f;

35999

+};

36000

+R v(int &, R);

36001

+void rfun(R &);

36002

+struct A {

36003

+ void m_fn2(R p1) {

36004

+ R a = p1;

36005

+ rfun(p1);

36006

+ fun(this);

36007

+ fun(a);

36008

+ }

36009

+};

36010

+struct J {

36011

+ A ep;

36012

+ A ap;

36013

+ int c2a;

36014

+ void m_fn1(R &p2) {

36015

+ R d, e, b;

36016

+ v(c2a, p2);

36017

+ e = v(c2a, b);

36018

+ ap.m_fn2(e);

36019

+ v(c2a, p2);

36020

+ d = v(c2a, b);

36021

+ ep.m_fn2(d);

36022

+ }

36023

+};

36024

+struct N {

36025

+ int &p_;

36026

+ J cfo;

36027

+};

36028

+void fn3(N&n) {

36029

+ R h;

36030

+ n.cfo.m_fn1(h);

36031

+}

36032

+extern N &c;

36033

+void fn1() { fn3(c); }

36034

Index: gcc/testsuite/g++.dg/tm/pr60004.C

36035

===================================================================

36036

--- a/src/gcc/testsuite/g++.dg/tm/pr60004.C (.../tags/gcc_4_8_2_release)

36037

+++ b/src/gcc/testsuite/g++.dg/tm/pr60004.C (.../branches/gcc-4_8-branch)

36038

@@ -0,0 +1,10 @@

36039

+// { dg-do compile }

36040

+// { dg-options "-fgnu-tm" }

36041

+

36042

+int a;

36043

+int f() {

36044

+ __transaction_atomic {

36045

+ if (a == 5)

36046

+ return 1;

36047

+ }

36048

+}

36049

Index: gcc/testsuite/g++.dg/tm/noexcept-6.C

36050

===================================================================

36051

--- a/src/gcc/testsuite/g++.dg/tm/noexcept-6.C (.../tags/gcc_4_8_2_release)

36052

+++ b/src/gcc/testsuite/g++.dg/tm/noexcept-6.C (.../branches/gcc-4_8-branch)

36053

@@ -0,0 +1,23 @@

36054

+// { dg-do compile }

36055

+// { dg-options "-fno-exceptions -fgnu-tm -O -std=c++0x -fdump-tree-tmlower" }

36056

+

36057

+struct TrueFalse

36058

+{

36059

+ static constexpr bool v() { return true; }

36060

+};

36061

+

36062

+int global;

36063

+

36064

+template<typename T> int foo()

36065

+{

36066

+ return __transaction_atomic noexcept(T::v()) (global + 1);

36067

+}

36068

+

36069

+int f1()

36070

+{

36071

+ return foo<TrueFalse>();

36072

+}

36073

+

36074

+/* { dg-final { scan-tree-dump-times "eh_must_not_throw" 0 "tmlower" } } */

36075

+/* { dg-final { scan-tree-dump-times "__transaction_atomic" 1 "tmlower" } } */

36076

+/* { dg-final { cleanup-tree-dump "tmlower" } } */

36077

Index: gcc/testsuite/g++.dg/pr59695.C

36078

===================================================================

36079

--- a/src/gcc/testsuite/g++.dg/pr59695.C (.../tags/gcc_4_8_2_release)

36080

+++ b/src/gcc/testsuite/g++.dg/pr59695.C (.../branches/gcc-4_8-branch)

36081

@@ -0,0 +1,125 @@

36082

+

36083

+/* PR target/59695 */

36084

+/* { dg-do run } */

36085

+/* { dg-options "-O0" } */

36086

+

36087

+#define DEFINE_VIRTUALS_FNS(i) virtual void xxx##i () {} \

36088

+ virtual void foo1_##i () {}\

36089

+ virtual void foo2_##i () {}\

36090

+ virtual void foo3_##i () {}\

36091

+ virtual void foo4_##i () {}\

36092

+ virtual void foo5_##i () {}\

36093

+ virtual void foo6_##i () {}\

36094

+ virtual void foo7_##i () {}\

36095

+ virtual void foo8_##i () {}\

36096

+ virtual void foo9_##i () {}\

36097

+ virtual void foo10_##i () {}\

36098

+ virtual void foo11_##i () {}\

36099

+ virtual void foo12_##i () {}\

36100

+ virtual void foo13_##i () {}\

36101

+ virtual void foo14_##i () {}\

36102

+ virtual void foo15_##i () {}\

36103

+ virtual void foo16_##i () {}\

36104

+ virtual void foo17_##i () {}\

36105

+ virtual void foo18_##i () {}\

36106

+ virtual void foo19_##i () {}\

36107

+ virtual void foo20_##i () {}\

36108

+ virtual void foo21_##i () {}\

36109

+ virtual void foo22_##i () {}\

36110

+

36111

+class base_class_2

36112

+{

36113

+

36114

+public:

36115

+ /* Define lots of virtual functions */

36116

+ DEFINE_VIRTUALS_FNS (1)

36117

+ DEFINE_VIRTUALS_FNS (2)

36118

+ DEFINE_VIRTUALS_FNS (3)

36119

+ DEFINE_VIRTUALS_FNS (4)

36120

+ DEFINE_VIRTUALS_FNS (5)

36121

+ DEFINE_VIRTUALS_FNS (6)

36122

+ DEFINE_VIRTUALS_FNS (7)

36123

+ DEFINE_VIRTUALS_FNS (8)

36124

+ DEFINE_VIRTUALS_FNS (9)

36125

+ DEFINE_VIRTUALS_FNS (10)

36126

+ DEFINE_VIRTUALS_FNS (11)

36127

+ DEFINE_VIRTUALS_FNS (12)

36128

+ DEFINE_VIRTUALS_FNS (13)

36129

+ DEFINE_VIRTUALS_FNS (14)

36130

+ DEFINE_VIRTUALS_FNS (15)

36131

+ DEFINE_VIRTUALS_FNS (16)

36132

+ DEFINE_VIRTUALS_FNS (17)

36133

+ DEFINE_VIRTUALS_FNS (18)

36134

+ DEFINE_VIRTUALS_FNS (19)

36135

+ DEFINE_VIRTUALS_FNS (20)

36136

+

36137

+ base_class_2();

36138

+ virtual ~base_class_2 ();

36139

+};

36140

+

36141

+base_class_2::base_class_2()

36142

+{

36143

+}

36144

+

36145

+base_class_2::~base_class_2 ()

36146

+{

36147

+}

36148

+

36149

+class base_class_1

36150

+{

36151

+public:

36152

+ virtual ~base_class_1();

36153

+ base_class_1();

36154

+};

36155

+

36156

+base_class_1::base_class_1()

36157

+{

36158

+}

36159

+

36160

+base_class_1::~base_class_1()

36161

+{

36162

+}

36163

+

36164

+class base_Impl_class :

36165

+ virtual public base_class_2, public base_class_1

36166

+{

36167

+public:

36168

+ base_Impl_class ();

36169

+ virtual ~base_Impl_class ();

36170

+};

36171

+

36172

+base_Impl_class::base_Impl_class ()

36173

+{

36174

+}

36175

+

36176

+base_Impl_class::~base_Impl_class ()

36177

+{

36178

+}

36179

+

36180

+

36181

+class test_cls : public base_Impl_class

36182

+{

36183

+public:

36184

+ test_cls();

36185

+ virtual ~test_cls();

36186

+};

36187

+

36188

+test_cls::test_cls()

36189

+{

36190

+}

36191

+

36192

+test_cls::~test_cls()

36193

+{

36194

+}

36195

+

36196

+int main()

36197

+{

36198

+ test_cls *test = new test_cls;

36199

+ base_class_2 *p1 = test;

36200

+

36201

+ /* PR59695 destructor thunk offsets are not setup

36202

+ correctly resulting in crash. */

36203

+ delete p1;

36204

+ return 0;

36205

+}

36206

+

36207

Index: gcc/testsuite/g++.dg/cpp0x/initlist79.C

36208

===================================================================

36209

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist79.C (.../tags/gcc_4_8_2_release)

36210

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist79.C (.../branches/gcc-4_8-branch)

36211

@@ -0,0 +1,8 @@

36212

+// PR c++/59646

36213

+// { dg-require-effective-target c++11 }

36214

+

36215

+#include <initializer_list>

36216

+

36217

+struct A {};

36218

+

36219

+std::initializer_list<volatile A> x = {{}};

36220

Index: gcc/testsuite/g++.dg/cpp0x/enum_base2.C

36221

===================================================================

36222

--- a/src/gcc/testsuite/g++.dg/cpp0x/enum_base2.C (.../tags/gcc_4_8_2_release)

36223

+++ b/src/gcc/testsuite/g++.dg/cpp0x/enum_base2.C (.../branches/gcc-4_8-branch)

36224

@@ -0,0 +1,9 @@

36225

+// PR c++/60187

36226

+// { dg-require-effective-target c++11 }

36227

+

36228

+template<typename... T> struct A

36229

+{

36230

+ enum E : T {}; // { dg-error "parameter pack" }

36231

+};

36232

+

36233

+A<int> a;

36234

Index: gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C

36235

===================================================================

36236

--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C (.../tags/gcc_4_8_2_release)

36237

+++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C (.../branches/gcc-4_8-branch)

36238

@@ -0,0 +1,7 @@

36239

+// PR c++/58596

36240

+// { dg-do compile { target c++11 } }

36241

+

36242

+struct A

36243

+{

36244

+ int i = [] { return decltype(i)(); }();

36245

+};

36246

Index: gcc/testsuite/g++.dg/cpp0x/variadic149.C

36247

===================================================================

36248

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic149.C (.../tags/gcc_4_8_2_release)

36249

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic149.C (.../branches/gcc-4_8-branch)

36250

@@ -0,0 +1,11 @@

36251

+// PR c++/60248

36252

+// { dg-options "-std=c++11 -g -fabi-version=2" }

36253

+

36254

+template<int...> struct A {};

36255

+

36256

+template<> struct A<0>

36257

+{

36258

+ typedef enum { e } B;

36259

+};

36260

+

36261

+A<0> a;

36262

Index: gcc/testsuite/g++.dg/cpp0x/constexpr-53094-2.C

36263

===================================================================

36264

--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-53094-2.C (.../tags/gcc_4_8_2_release)

36265

+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-53094-2.C (.../branches/gcc-4_8-branch)

36266

@@ -2,6 +2,7 @@

36267

// { dg-options "-std=gnu++11" }

36268

// Ignore warning on some powerpc-ibm-aix configurations.

36269

// { dg-prune-output "non-standard ABI extension" }

36270

+// { dg-prune-output "changes the ABI" }

36271

36272

typedef float __attribute__ ((vector_size (4 * sizeof (float)))) V4;

36273

constexpr V4 build (float x, float y, float z) { return (V4){ x, y, z, 0 };}

36274

Index: gcc/testsuite/g++.dg/cpp0x/defaulted48.C

36275

===================================================================

36276

--- a/src/gcc/testsuite/g++.dg/cpp0x/defaulted48.C (.../tags/gcc_4_8_2_release)

36277

+++ b/src/gcc/testsuite/g++.dg/cpp0x/defaulted48.C (.../branches/gcc-4_8-branch)

36278

@@ -0,0 +1,17 @@

36279

+// PR c++/60108

36280

+// { dg-require-effective-target c++11 }

36281

+

36282

+template<int> struct A

36283

+{

36284

+ virtual ~A();

36285

+};

36286

+

36287

+template<typename> struct B : A<0>, A<1>

36288

+{

36289

+ ~B() = default;

36290

+};

36291

+

36292

+struct C : B<bool>

36293

+{

36294

+ C() {}

36295

+};

36296

Index: gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C

36297

===================================================================

36298

--- a/src/gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C (.../tags/gcc_4_8_2_release)

36299

+++ b/src/gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C (.../branches/gcc-4_8-branch)

36300

@@ -0,0 +1,18 @@

36301

+// PR c++/60182

36302

+// { dg-require-effective-target c++11 }

36303

+

36304

+class B {};

36305

+template <typename> using __allocator_base = B;

36306

+template <typename> class F : __allocator_base<int> {};

36307

+class C {};

36308

+template <typename, typename = F<int> > class G : C {};

36309

+template <typename> class D;

36310

+class A {

36311

+ using Container = G<D<char>>;

36312

+ A();

36313

+ A(D<char> const &);

36314

+ Container m_elements;

36315

+};

36316

+template <template <class, class> class C, class A = F<D<int>>>

36317

+void doSomething(C<D<char>, A> &);

36318

+A::A(D<char> const &) : A() { doSomething(m_elements); }

36319

Index: gcc/testsuite/g++.dg/cpp0x/initlist81.C

36320

===================================================================

36321

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist81.C (.../tags/gcc_4_8_2_release)

36322

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist81.C (.../branches/gcc-4_8-branch)

36323

@@ -0,0 +1,25 @@

36324

+// PR c++/60713

36325

+// { dg-options "-O" }

36326

+// { dg-do compile { target c++11 } }

36327

+

36328

+template < class x0, class x1, class x2, class x3, class x4 >

36329

+int *x5 (x0 *, x2 (x1::*)(x3, x4));

36330

+

36331

+class x6

36332

+{

36333

+ void x7 ();

36334

+ struct x8

36335

+ {

36336

+ int *x9;

36337

+ };

36338

+ void x10 (x8);

36339

+ void x11 (int *, int *);

36340

+};

36341

+

36342

+void

36343

+x6::x7 ()

36344

+{

36345

+ x10 ({

36346

+ x5 (this, &x6::x11)

36347

+ });

36348

+}

36349

Index: gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C

36350

===================================================================

36351

--- a/src/gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C (.../tags/gcc_4_8_2_release)

36352

+++ b/src/gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C (.../branches/gcc-4_8-branch)

36353

@@ -0,0 +1,10 @@

36354

+// PR c++/58965

36355

+// { dg-require-effective-target c++11 }

36356

+

36357

+void foo()

36358

+{

36359

+ static union

36360

+ {

36361

+ int i = i;

36362

+ };

36363

+}

36364

Index: gcc/testsuite/g++.dg/cpp0x/variadic144.C

36365

===================================================================

36366

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic144.C (.../tags/gcc_4_8_2_release)

36367

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic144.C (.../branches/gcc-4_8-branch)

36368

@@ -0,0 +1,15 @@

36369

+// PR c++/56060

36370

+// { dg-do compile { target c++11 } }

36371

+

36372

+template<typename T> struct baz { };

36373

+template<typename T> T bar();

36374

+

36375

+template<typename T, typename ... U>

36376

+baz<decltype(bar<T>()(bar<U> ...))> // { dg-error "cannot be used" }

36377

+foo();

36378

+

36379

+int main()

36380

+{

36381

+ foo<int>(); // { dg-error "no matching" }

36382

+ return 0;

36383

+}

36384

Index: gcc/testsuite/g++.dg/cpp0x/enum18.C

36385

===================================================================

36386

--- a/src/gcc/testsuite/g++.dg/cpp0x/enum18.C (.../tags/gcc_4_8_2_release)

36387

+++ b/src/gcc/testsuite/g++.dg/cpp0x/enum18.C (.../branches/gcc-4_8-branch)

36388

@@ -4,5 +4,5 @@

36389

int main(void) {

36390

enum e {};

36391

e ev;

36392

- ev.e::~e_u(); // { dg-error "e_u. has not been declared" }

36393

+ ev.e::~e_u(); // { dg-error "" }

36394

}

36395

Index: gcc/testsuite/g++.dg/cpp0x/noexcept22.C

36396

===================================================================

36397

--- a/src/gcc/testsuite/g++.dg/cpp0x/noexcept22.C (.../tags/gcc_4_8_2_release)

36398

+++ b/src/gcc/testsuite/g++.dg/cpp0x/noexcept22.C (.../branches/gcc-4_8-branch)

36399

@@ -0,0 +1,21 @@

36400

+// PR c++/60046

36401

+// { dg-require-effective-target c++11 }

36402

+

36403

+constexpr bool foo () { return noexcept (true); }

36404

+template <typename T>

36405

+struct V

36406

+{

36407

+ void bar (V &) noexcept (foo ()) {}

36408

+};

36409

+template <typename T>

36410

+struct W : public V <int>

36411

+{

36412

+ void bar (W &x) { V <int>::bar (x); }

36413

+};

36414

+

36415

+int

36416

+main ()

36417

+{

36418

+ W <int> a, b;

36419

+ a.bar (b);

36420

+}

36421

Index: gcc/testsuite/g++.dg/cpp0x/initlist76.C

36422

===================================================================

36423

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist76.C (.../tags/gcc_4_8_2_release)

36424

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist76.C (.../branches/gcc-4_8-branch)

36425

@@ -0,0 +1,5 @@

36426

+// PR c++/58812

36427

+// { dg-require-effective-target c++11 }

36428

+

36429

+int i;

36430

+int&& j{{ i }}; // { dg-error "too many braces" }

36431

Index: gcc/testsuite/g++.dg/cpp0x/access02.C

36432

===================================================================

36433

--- a/src/gcc/testsuite/g++.dg/cpp0x/access02.C (.../tags/gcc_4_8_2_release)

36434

+++ b/src/gcc/testsuite/g++.dg/cpp0x/access02.C (.../branches/gcc-4_8-branch)

36435

@@ -0,0 +1,39 @@

36436

+// PR c++/58954

36437

+// { dg-require-effective-target c++11 }

36438

+

36439

+template<class T>

36440

+T&& declval();

36441

+

36442

+template<class T>

36443

+struct foo_argument

36444

+{

36445

+ template<class Ret, class C, class Arg>

36446

+ static Arg test(Ret (C::*)(Arg));

36447

+

36448

+ typedef decltype(test(&T::template foo<>)) type;

36449

+};

36450

+

36451

+template<class T, class>

36452

+struct dependent { typedef T type; };

36453

+

36454

+template<class T>

36455

+struct base

36456

+{

36457

+ template<class Ignore = void>

36458

+ auto foo(int i) -> decltype(declval<

36459

+ typename dependent<T&, Ignore>::type

36460

+ >().foo_impl(i));

36461

+};

36462

+

36463

+struct derived : base<derived>

36464

+{

36465

+ friend struct base<derived>;

36466

+private:

36467

+ int foo_impl(int i);

36468

+};

36469

+

36470

+int main()

36471

+{

36472

+ foo_argument<derived>::type var = 0;

36473

+ return var;

36474

+}

36475

Index: gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C

36476

===================================================================

36477

--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C (.../tags/gcc_4_8_2_release)

36478

+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C (.../branches/gcc-4_8-branch)

36479

@@ -0,0 +1,20 @@

36480

+// PR c++/59268

36481

+// { dg-do compile }

36482

+// { dg-options "-std=c++11" }

36483

+

36484

+template <typename>

36485

+struct A

36486

+{

36487

+ constexpr A (int) {}

36488

+ virtual void foo ()

36489

+ {

36490

+ constexpr A<void> a (0);

36491

+ }

36492

+};

36493

+

36494

+void

36495

+bar ()

36496

+{

36497

+ A<int> a (3);

36498

+ a.foo ();

36499

+}

36500

Index: gcc/testsuite/g++.dg/cpp0x/initlist78.C

36501

===================================================================

36502

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist78.C (.../tags/gcc_4_8_2_release)

36503

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist78.C (.../branches/gcc-4_8-branch)

36504

@@ -0,0 +1,12 @@

36505

+// PR c++/58639

36506

+// { dg-require-effective-target c++11 }

36507

+

36508

+struct node {

36509

+ node &parent;

36510

+};

36511

+

36512

+struct vector {

36513

+ node n;

36514

+};

36515

+

36516

+vector v({}); // { dg-error "" }

36517

Index: gcc/testsuite/g++.dg/cpp0x/variadic148.C

36518

===================================================================

36519

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic148.C (.../tags/gcc_4_8_2_release)

36520

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic148.C (.../branches/gcc-4_8-branch)

36521

@@ -0,0 +1,6 @@

36522

+// PR c++/59989

36523

+// { dg-require-effective-target c++11 }

36524

+

36525

+template<typename T> struct X {};

36526

+template<template<typename...> class D, typename ...U> int test(D<U...>*);

36527

+int n = test<X, int>(0); // { dg-error "no match" }

36528

Index: gcc/testsuite/g++.dg/cpp0x/auto42.C

36529

===================================================================

36530

--- a/src/gcc/testsuite/g++.dg/cpp0x/auto42.C (.../tags/gcc_4_8_2_release)

36531

+++ b/src/gcc/testsuite/g++.dg/cpp0x/auto42.C (.../branches/gcc-4_8-branch)

36532

@@ -0,0 +1,9 @@

36533

+// PR c++/60628

36534

+// { dg-do compile { target c++11 } }

36535

+

36536

+#include <initializer_list>

36537

+

36538

+void foo(int i)

36539

+{

36540

+ auto x[1] = { 0 }; // { dg-error "array of .auto" }

36541

+}

36542

Index: gcc/testsuite/g++.dg/cpp0x/nsdmi9.C

36543

===================================================================

36544

--- a/src/gcc/testsuite/g++.dg/cpp0x/nsdmi9.C (.../tags/gcc_4_8_2_release)

36545

+++ b/src/gcc/testsuite/g++.dg/cpp0x/nsdmi9.C (.../branches/gcc-4_8-branch)

36546

@@ -0,0 +1,13 @@

36547

+// PR c++/58162

36548

+// { dg-require-effective-target c++11 }

36549

+

36550

+struct A {

36551

+ A();

36552

+ A(A&&);

36553

+};

36554

+

36555

+struct B {

36556

+ A const a = A();

36557

+};

36558

+

36559

+B b;

36560

Index: gcc/testsuite/g++.dg/cpp0x/deleted3.C

36561

===================================================================

36562

--- a/src/gcc/testsuite/g++.dg/cpp0x/deleted3.C (.../tags/gcc_4_8_2_release)

36563

+++ b/src/gcc/testsuite/g++.dg/cpp0x/deleted3.C (.../branches/gcc-4_8-branch)

36564

@@ -0,0 +1,11 @@

36565

+// PR c++/60216

36566

+// { dg-require-effective-target c++11 }

36567

+

36568

+struct A

36569

+{

36570

+ template<typename T> A(T) = delete;

36571

+};

36572

+

36573

+template<> A::A<int>(int) {}

36574

+

36575

+A a(0);

36576

Index: gcc/testsuite/g++.dg/cpp0x/variadic150.C

36577

===================================================================

36578

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic150.C (.../tags/gcc_4_8_2_release)

36579

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic150.C (.../branches/gcc-4_8-branch)

36580

@@ -0,0 +1,9 @@

36581

+// PR c++/60219

36582

+// { dg-require-effective-target c++11 }

36583

+

36584

+template<typename..., int> void foo();

36585

+

36586

+void bar()

36587

+{

36588

+ foo<0>; // { dg-error "" }

36589

+}

36590

Index: gcc/testsuite/g++.dg/cpp0x/initlist82.C

36591

===================================================================

36592

--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist82.C (.../tags/gcc_4_8_2_release)

36593

+++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist82.C (.../branches/gcc-4_8-branch)

36594

@@ -0,0 +1,20 @@

36595

+// PR c++/60708

36596

+// { dg-do compile { target c++11 } }

36597

+

36598

+template <class T, class U> struct mypair {

36599

+ mypair(T, U) {}

36600

+};

36601

+

36602

+template<typename T> struct S {

36603

+ mypair<T *, int> get_pair() noexcept {

36604

+ return mypair<T*,int>(nullptr, 0);

36605

+ }

36606

+};

36607

+

36608

+static void foo(const mypair<char *, int> (&a)[2]) noexcept { }

36609

+

36610

+int main()

36611

+{

36612

+ S<char> s;

36613

+ foo({s.get_pair(), s.get_pair()});

36614

+}

36615

Index: gcc/testsuite/g++.dg/cpp0x/static_assert9.C

36616

===================================================================

36617

--- a/src/gcc/testsuite/g++.dg/cpp0x/static_assert9.C (.../tags/gcc_4_8_2_release)

36618

+++ b/src/gcc/testsuite/g++.dg/cpp0x/static_assert9.C (.../branches/gcc-4_8-branch)

36619

@@ -0,0 +1,7 @@

36620

+// PR c++/58837

36621

+// { dg-require-effective-target c++11 }

36622

+

36623

+void f();

36624

+static_assert(f, "");

36625

+struct A {};

36626

+static_assert(A::~A, ""); // { dg-error "non-static member function" }

36627

Index: gcc/testsuite/g++.dg/cpp0x/variadic145.C

36628

===================================================================

36629

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic145.C (.../tags/gcc_4_8_2_release)

36630

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic145.C (.../branches/gcc-4_8-branch)

36631

@@ -0,0 +1,13 @@

36632

+// PR c++/59730

36633

+// { dg-do compile { target c++11 } }

36634

+

36635

+template <typename> void declval();

36636

+template <typename> void forward();

36637

+template <typename> class D;

36638

+template <typename _Functor, typename... _Bound_args>

36639

+class D <_Functor(_Bound_args...)> {

36640

+ template <typename... _Args, decltype(declval<_Functor>)>

36641

+ void operator()(...) {

36642

+ 0(forward<_Args>...);

36643

+ }

36644

+};

36645

Index: gcc/testsuite/g++.dg/cpp0x/decltype57.C

36646

===================================================================

36647

--- a/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C (.../tags/gcc_4_8_2_release)

36648

+++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C (.../branches/gcc-4_8-branch)

36649

@@ -0,0 +1,8 @@

36650

+// PR c++/58633

36651

+// { dg-do compile { target c++11 } }

36652

+

36653

+void foo(int i)

36654

+{

36655

+ typedef int I;

36656

+ decltype(i.I::~I())* p;

36657

+}

36658

Index: gcc/testsuite/g++.dg/cpp0x/variadic147.C

36659

===================================================================

36660

--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic147.C (.../tags/gcc_4_8_2_release)

36661

+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic147.C (.../branches/gcc-4_8-branch)

36662

@@ -0,0 +1,10 @@

36663

+// PR c++/58466

36664

+// { dg-require-effective-target c++11 }

36665

+

36666

+template<char, char...> struct A;

36667

+

36668

+template<typename> struct B;

36669

+

36670

+template<char... C> struct B<A<C...>> {};

36671

+

36672

+B<A<'X'>> b;

36673

Index: gcc/testsuite/g++.dg/eh/uncaught1.C

36674

===================================================================

36675

--- a/src/gcc/testsuite/g++.dg/eh/uncaught1.C (.../tags/gcc_4_8_2_release)

36676

+++ b/src/gcc/testsuite/g++.dg/eh/uncaught1.C (.../branches/gcc-4_8-branch)

36677

@@ -13,7 +13,7 @@

36678

36679

static Check const data[] = {

36680

{ 0, 0, false }, // construct [0]

36681

- { 1, 0, true }, // [1] = [0]

36682

+ { 1, 0, false }, // [1] = [0]

36683

{ 0, 0, true }, // destruct [0]

36684

{ 2, 1, true }, // [2] = [1]

36685

{ 2, 2, true }, // destruct [2]

36686

Index: gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C

36687

===================================================================

36688

--- a/src/gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C (.../tags/gcc_4_8_2_release)

36689

+++ b/src/gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C (.../branches/gcc-4_8-branch)

36690

@@ -0,0 +1,54 @@

36691

+// { dg-do run { target { powerpc64*-*-linux* } } }

36692

+// { dg-options "-fexceptions -fnon-call-exceptions" }

36693

+

36694

+#include <signal.h>

36695

+#include <stdlib.h>

36696

+#include <fenv.h>

36697

+

36698

+#define SET_CR(R,V) __asm__ __volatile__ ("mtcrf %0,%1" : : "n" (1<<(7-R)), "r" (V<<(4*(7-R))) : "cr" #R)

36699

+#define GET_CR(R) ({ int tmp; __asm__ __volatile__ ("mfcr %0" : "=r" (tmp)); (tmp >> 4*(7-R)) & 15; })

36700

+

36701

+void sighandler (int signo, siginfo_t * si, void * uc)

36702

+{

36703

+ SET_CR(2, 3);

36704

+ SET_CR(3, 2);

36705

+ SET_CR(4, 1);

36706

+

36707

+ throw 0;

36708

+}

36709

+

36710

+float test (float a, float b) __attribute__ ((__noinline__));

36711

+float test (float a, float b)

36712

+{

36713

+ float x;

36714

+ asm ("mtcrf %1,%2" : "=f" (x) : "n" (1 << (7-3)), "r" (0), "0" (b) : "cr3");

36715

+ return a / x;

36716

+}

36717

+

36718

+int main ()

36719

+{

36720

+ struct sigaction sa;

36721

+ int status;

36722

+

36723

+ sa.sa_sigaction = sighandler;

36724

+ sa.sa_flags = SA_SIGINFO;

36725

+

36726

+ status = sigaction (SIGFPE, & sa, NULL);

36727

+

36728

+ feenableexcept (FE_DIVBYZERO);

36729

+

36730

+ SET_CR(2, 6);

36731

+ SET_CR(3, 9);

36732

+ SET_CR(4, 12);

36733

+

36734

+ try {

36735

+ test (1, 0);

36736

+ }

36737

+ catch (...) {

36738

+ return GET_CR(2) != 6 || GET_CR(3) != 9 || GET_CR(4) != 12;

36739

+ }

36740

+

36741

+ return 1;

36742

+}

36743

+

36744

+

36745

Index: gcc/testsuite/g++.dg/eh/uncaught4.C

36746

===================================================================

36747

--- a/src/gcc/testsuite/g++.dg/eh/uncaught4.C (.../tags/gcc_4_8_2_release)

36748

+++ b/src/gcc/testsuite/g++.dg/eh/uncaught4.C (.../branches/gcc-4_8-branch)

36749

@@ -0,0 +1,29 @@

36750

+// PR c++/41174

36751

+// { dg-do run }

36752

+

36753

+#include <exception>

36754

+

36755

+#define assert(E) if (!(E)) __builtin_abort();

36756

+

36757

+struct e {

36758

+ e()

36759

+ {

36760

+ assert( !std::uncaught_exception() );

36761

+ try {

36762

+ throw 1;

36763

+ } catch (int i) {

36764

+ assert( !std::uncaught_exception() );

36765

+ throw;

36766

+ }

36767

+ }

36768

+};

36769

+

36770

+int main()

36771

+{

36772

+ try {

36773

+ throw e();

36774

+ } catch (int i) {

36775

+ assert( !std::uncaught_exception() );

36776

+ }

36777

+ assert( !std::uncaught_exception() );

36778

+}

36779

Index: gcc/testsuite/g++.dg/inherit/virtual11.C

36780

===================================================================

36781

--- a/src/gcc/testsuite/g++.dg/inherit/virtual11.C (.../tags/gcc_4_8_2_release)

36782

+++ b/src/gcc/testsuite/g++.dg/inherit/virtual11.C (.../branches/gcc-4_8-branch)

36783

@@ -0,0 +1,17 @@

36784

+// PR c++/59031

36785

+// { dg-do compile }

36786

+// { dg-options "-fdump-tree-gimple " }

36787

+class B {

36788

+ public:

36789

+ virtual int add (int a, int b) {return a+ b;}

36790

+};

36791

+

36792

+class D : public B {

36793

+};

36794

+

36795

+int foo (int a, int b) {

36796

+ D d;

36797

+ return d.add(a, b);

36798

+}

36799

+// { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "gimple" } }

36800

+// { dg-final { cleanup-tree-dump "gimple" } }

36801

Index: gcc/testsuite/g++.dg/torture/pr38565.C

36802

===================================================================

36803

--- a/src/gcc/testsuite/g++.dg/torture/pr38565.C (.../tags/gcc_4_8_2_release)

36804

+++ b/src/gcc/testsuite/g++.dg/torture/pr38565.C (.../branches/gcc-4_8-branch)

36805

@@ -1,6 +1,7 @@

36806

// { dg-do compile }

36807

// Ignore warning on some powerpc-linux configurations.

36808

// { dg-prune-output "non-standard ABI extension" }

36809

+// { dg-prune-output "changes the ABI" }

36810

#define vector __attribute__((vector_size(16) ))

36811

vector unsigned int f(int a)

36812

{

36813

Index: gcc/testsuite/g++.dg/torture/pr60609.C

36814

===================================================================

36815

--- a/src/gcc/testsuite/g++.dg/torture/pr60609.C (.../tags/gcc_4_8_2_release)

36816

+++ b/src/gcc/testsuite/g++.dg/torture/pr60609.C (.../branches/gcc-4_8-branch)

36817

@@ -0,0 +1,252 @@

36818

+/* { dg-do assemble } */

36819

+

36820

+class exception

36821

+{

36822

+};

36823

+class bad_alloc:exception

36824

+{

36825

+};

36826

+class logic_error:exception

36827

+{

36828

+};

36829

+class domain_error:logic_error

36830

+{

36831

+};

36832

+class invalid_argument:logic_error

36833

+{

36834

+};

36835

+class length_error:logic_error

36836

+{

36837

+};

36838

+class overflow_error:exception

36839

+{

36840

+};

36841

+typedef int mpz_t[];

36842

+template < class > class __gmp_expr;

36843

+template <> class __gmp_expr < mpz_t >

36844

+{

36845

+ ~__gmp_expr ();

36846

+};

36847

+

36848

+class PIP_Solution_Node;

36849

+class internal_exception

36850

+{

36851

+ ~internal_exception ();

36852

+};

36853

+class not_an_integer:internal_exception

36854

+{

36855

+};

36856

+class not_a_variable:internal_exception

36857

+{

36858

+};

36859

+class not_an_optimization_mode:internal_exception

36860

+{

36861

+};

36862

+class not_a_bounded_integer_type_width:internal_exception

36863

+{

36864

+};

36865

+class not_a_bounded_integer_type_representation:internal_exception

36866

+{

36867

+};

36868

+class not_a_bounded_integer_type_overflow:internal_exception

36869

+{

36870

+};

36871

+class not_a_complexity_class:internal_exception

36872

+{

36873

+};

36874

+class not_a_control_parameter_name:internal_exception

36875

+{

36876

+};

36877

+class not_a_control_parameter_value:internal_exception

36878

+{

36879

+};

36880

+class not_a_pip_problem_control_parameter_name:internal_exception

36881

+{

36882

+};

36883

+class not_a_pip_problem_control_parameter_value:internal_exception

36884

+{

36885

+};

36886

+class not_a_relation:internal_exception

36887

+{

36888

+};

36889

+class ppl_handle_mismatch:internal_exception

36890

+{

36891

+};

36892

+class timeout_exception

36893

+{

36894

+ ~timeout_exception ();

36895

+};

36896

+class deterministic_timeout_exception:timeout_exception

36897

+{

36898

+};

36899

+void __assert_fail (const char *, const char *, int, int *)

36900

+__attribute__ ((__noreturn__));

36901

+void PL_get_pointer (void *);

36902

+int Prolog_is_address ();

36903

+inline int

36904

+Prolog_get_address (void **p1)

36905

+{

36906

+ Prolog_is_address ()? static_cast <

36907

+ void >(0) : __assert_fail ("Prolog_is_address", "./swi_cfli.hh", 0, 0);

36908

+ PL_get_pointer (p1);

36909

+ return 0;

36910

+}

36911

+

36912

+class non_linear:internal_exception

36913

+{

36914

+};

36915

+class not_unsigned_integer:internal_exception

36916

+{

36917

+};

36918

+class not_universe_or_empty:internal_exception

36919

+{

36920

+};

36921

+class not_a_nil_terminated_list:internal_exception

36922

+{

36923

+};

36924

+class PPL_integer_out_of_range

36925

+{

36926

+ __gmp_expr < mpz_t > n;

36927

+};

36928

+void handle_exception ();

36929

+template < typename T > T * term_to_handle (int, const char *)

36930

+{

36931

+ if (Prolog_is_address ())

36932

+ {

36933

+ void *p;

36934

+ Prolog_get_address (&p);

36935

+ return static_cast < T * >(0);

36936

+ }

36937

+ throw;

36938

+}

36939

+

36940

+void

36941

+ppl_new_MIP_Problem_from_MIP_Problem ()

36942

+try

36943

+{

36944

+ term_to_handle < int >(0, "ppl_new_MIP_Problem_from_MIP_Problem/2");

36945

+}

36946

+

36947

+catch (exception &)

36948

+{

36949

+}

36950

+

36951

+int

36952

+ppl_PIP_Tree_Node_parametric_values ()

36953

+{

36954

+ try

36955

+ {

36956

+ PIP_Solution_Node *a = term_to_handle < PIP_Solution_Node > (0, 0);

36957

+ (void)a;

36958

+ return 1;

36959

+ }

36960

+ catch (internal_exception &)

36961

+ {

36962

+ }

36963

+ catch (not_unsigned_integer &)

36964

+ {

36965

+ handle_exception ();

36966

+ }

36967

+ catch (non_linear &)

36968

+ {

36969

+ handle_exception ();

36970

+ }

36971

+ catch (not_a_variable &)

36972

+ {

36973

+ handle_exception ();

36974

+ }

36975

+ catch (not_an_integer &)

36976

+ {

36977

+ handle_exception ();

36978

+ }

36979

+ catch (ppl_handle_mismatch &)

36980

+ {

36981

+ handle_exception ();

36982

+ }

36983

+ catch (not_an_optimization_mode &)

36984

+ {

36985

+ handle_exception ();

36986

+ }

36987

+ catch (not_a_complexity_class &)

36988

+ {

36989

+ handle_exception ();

36990

+ }

36991

+ catch (not_a_bounded_integer_type_width &)

36992

+ {

36993

+ handle_exception ();

36994

+ }

36995

+ catch (not_a_bounded_integer_type_representation &)

36996

+ {

36997

+ handle_exception ();

36998

+ }

36999

+ catch (not_a_bounded_integer_type_overflow &)

37000

+ {

37001

+ handle_exception ();

37002

+ }

37003

+ catch (not_a_control_parameter_name &)

37004

+ {

37005

+ handle_exception ();

37006

+ }

37007

+ catch (not_a_control_parameter_value &)

37008

+ {

37009

+ handle_exception ();

37010

+ }

37011

+ catch (not_a_pip_problem_control_parameter_name &)

37012

+ {

37013

+ handle_exception ();

37014

+ }

37015

+ catch (not_a_pip_problem_control_parameter_value &)

37016

+ {

37017

+ handle_exception ();

37018

+ }

37019

+ catch (not_universe_or_empty &)

37020

+ {

37021

+ handle_exception ();

37022

+ }

37023

+ catch (not_a_relation &)

37024

+ {

37025

+ handle_exception ();

37026

+ }

37027

+ catch (not_a_nil_terminated_list &)

37028

+ {

37029

+ handle_exception ();

37030

+ }

37031

+ catch (PPL_integer_out_of_range &)

37032

+ {

37033

+ handle_exception ();

37034

+ }

37035

+ catch (int &)

37036

+ {

37037

+ } catch (timeout_exception &)

37038

+ {

37039

+ handle_exception ();

37040

+ } catch (deterministic_timeout_exception &)

37041

+ {

37042

+ handle_exception ();

37043

+ } catch (overflow_error &)

37044

+ {

37045

+ handle_exception ();

37046

+ } catch (domain_error &)

37047

+ {

37048

+ handle_exception ();

37049

+ } catch (length_error &)

37050

+ {

37051

+ handle_exception ();

37052

+ } catch (invalid_argument &)

37053

+ {

37054

+ handle_exception ();

37055

+ } catch (logic_error &)

37056

+ {

37057

+ handle_exception ();

37058

+ } catch (bad_alloc &)

37059

+ {

37060

+ handle_exception ();

37061

+ } catch (exception &)

37062

+ {

37063

+ handle_exception ();

37064

+ } catch ( ...)

37065

+ {

37066

+ handle_exception ();

37067

+ }

37068

+ return 0;

37069

+}

37070

Index: gcc/testsuite/g++.dg/torture/pr57499.C

37071

===================================================================

37072

--- a/src/gcc/testsuite/g++.dg/torture/pr57499.C (.../tags/gcc_4_8_2_release)

37073

+++ b/src/gcc/testsuite/g++.dg/torture/pr57499.C (.../branches/gcc-4_8-branch)

37074

@@ -0,0 +1,14 @@

37075

+// PR middle-end/57499

37076

+// { dg-do compile }

37077

+

37078

+struct S

37079

+{

37080

+ ~S () __attribute__ ((noreturn)) {} // { dg-warning "function does return" }

37081

+};

37082

+

37083

+void

37084

+foo ()

37085

+{

37086

+ S s;

37087

+ throw 1;

37088

+}

37089

Index: gcc/testsuite/g++.dg/torture/pr60750.C

37090

===================================================================

37091

--- a/src/gcc/testsuite/g++.dg/torture/pr60750.C (.../tags/gcc_4_8_2_release)

37092

+++ b/src/gcc/testsuite/g++.dg/torture/pr60750.C (.../branches/gcc-4_8-branch)

37093

@@ -0,0 +1,21 @@

37094

+// { dg-do run }

37095

+// { dg-options "-std=c++11" }

37096

+

37097

+#include <string>

37098

+#include <stdexcept>

37099

+

37100

+const std::string err_prefix = "Problem: ";

37101

+void thrower (std::string msg)

37102

+{

37103

+ throw std::runtime_error(err_prefix + std::move(msg));

37104

+}

37105

+

37106

+int main(int argc, char **argv)

37107

+{

37108

+ try {

37109

+ std::string base = "hello";

37110

+ thrower(std::move(base));

37111

+ } catch (const std::runtime_error &e) {

37112

+ }

37113

+ return 0;

37114

+}

37115

Index: gcc/testsuite/g++.dg/torture/pr59163.C

37116

===================================================================

37117

--- a/src/gcc/testsuite/g++.dg/torture/pr59163.C (.../tags/gcc_4_8_2_release)

37118

+++ b/src/gcc/testsuite/g++.dg/torture/pr59163.C (.../branches/gcc-4_8-branch)

37119

@@ -0,0 +1,30 @@

37120

+// PR target/59163

37121

+// { dg-do run }

37122

+

37123

+struct A { float a[4]; };

37124

+struct B { int b; A a; };

37125

+

37126

+__attribute__((noinline, noclone)) void

37127

+bar (A &a)

37128

+{

37129

+ if (a.a[0] != 36.0f || a.a[1] != 42.0f || a.a[2] != 48.0f || a.a[3] != 54.0f)

37130

+ __builtin_abort ();

37131

+}

37132

+

37133

+__attribute__((noinline, noclone)) void

37134

+foo (A &a)

37135

+{

37136

+ int i;

37137

+ A c = a;

37138

+ for (i = 0; i < 4; i++)

37139

+ c.a[i] *= 6.0f;

37140

+ a = c;

37141

+ bar (a);

37142

+}

37143

+

37144

+int

37145

+main ()

37146

+{

37147

+ B b = { 5, { 6, 7, 8, 9 } };

37148

+ foo (b.a);

37149

+}

37150

Index: gcc/testsuite/g++.dg/torture/pr60895.C

37151

===================================================================

37152

--- a/src/gcc/testsuite/g++.dg/torture/pr60895.C (.../tags/gcc_4_8_2_release)

37153

+++ b/src/gcc/testsuite/g++.dg/torture/pr60895.C (.../branches/gcc-4_8-branch)

37154

@@ -0,0 +1,32 @@

37155

+// { dg-do compile }

37156

+

37157

+struct C

37158

+{

37159

+ double elems[3];

37160

+};

37161

+

37162

+C

37163

+foo ()

37164

+{

37165

+ C a;

37166

+ double *f = a.elems;

37167

+ int b;

37168

+ for (; b;)

37169

+ {

37170

+ *f = 0;

37171

+ ++f;

37172

+ }

37173

+ return a;

37174

+}

37175

+

37176

+struct J

37177

+{

37178

+ C c;

37179

+ __attribute__((always_inline)) J () : c (foo ()) {}

37180

+};

37181

+

37182

+void

37183

+bar ()

37184

+{

37185

+ J ();

37186

+}

37187

Index: gcc/testsuite/g++.dg/ipa/pr60640-1.C

37188

===================================================================

37189

--- a/src/gcc/testsuite/g++.dg/ipa/pr60640-1.C (.../tags/gcc_4_8_2_release)

37190

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60640-1.C (.../branches/gcc-4_8-branch)

37191

@@ -0,0 +1,50 @@

37192

+// { dg-do compile }

37193

+// { dg-options "-O3" }

37194

+

37195

+class ASN1Object

37196

+{

37197

+public:

37198

+ virtual ~ASN1Object ();

37199

+};

37200

+class A

37201

+{

37202

+ virtual unsigned m_fn1 () const;

37203

+};

37204

+class B

37205

+{

37206

+public:

37207

+ ASN1Object Element;

37208

+ virtual unsigned m_fn1 (bool) const;

37209

+};

37210

+template <class BASE> class C : public BASE

37211

+{

37212

+};

37213

+

37214

+class D : ASN1Object, public B

37215

+{

37216

+};

37217

+class G : public D

37218

+{

37219

+ unsigned m_fn1 (bool) const {}

37220

+};

37221

+class F : A

37222

+{

37223

+public:

37224

+ F (A);

37225

+ unsigned m_fn1 () const

37226

+ {

37227

+ int a;

37228

+ a = m_fn2 ().m_fn1 (0);

37229

+ return a;

37230

+ }

37231

+ const B &m_fn2 () const { return m_groupParameters; }

37232

+ C<G> m_groupParameters;

37233

+};

37234

+template <class D> void BenchMarkKeyAgreement (int *, int *, int)

37235

+{

37236

+ A f;

37237

+ D d (f);

37238

+}

37239

+

37240

+void BenchmarkAll2 () { BenchMarkKeyAgreement<F>(0, 0, 0); }

37241

+

37242

Index: gcc/testsuite/g++.dg/ipa/pr60640-2.C

37243

===================================================================

37244

--- a/src/gcc/testsuite/g++.dg/ipa/pr60640-2.C (.../tags/gcc_4_8_2_release)

37245

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60640-2.C (.../branches/gcc-4_8-branch)

37246

@@ -0,0 +1,15 @@

37247

+// { dg-do compile }

37248

+// { dg-options "-O3" }

37249

+

37250

+struct B { virtual unsigned f () const; };

37251

+struct C { virtual void f (); };

37252

+struct F { virtual unsigned f (bool) const; ~F (); };

37253

+struct J : C, F {};

37254

+struct G : J { unsigned f (bool) const { return 0; } };

37255

+struct H : B

37256

+{

37257

+ H (int);

37258

+ unsigned f () const { return ((const F &) h).f (0); }

37259

+ G h;

37260

+};

37261

+H h (0);

37262

Index: gcc/testsuite/g++.dg/ipa/pr60640-3.C

37263

===================================================================

37264

--- a/src/gcc/testsuite/g++.dg/ipa/pr60640-3.C (.../tags/gcc_4_8_2_release)

37265

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60640-3.C (.../branches/gcc-4_8-branch)

37266

@@ -0,0 +1,81 @@

37267

+// { dg-do run }

37268

+// { dg-options "-O3" }

37269

+

37270

+struct Distraction

37271

+{

37272

+ char fc[8];

37273

+ virtual Distraction * return_self ()

37274

+ { return this; }

37275

+};

37276

+

37277

+namespace {

37278

+

37279

+struct A;

37280

+static A * __attribute__ ((noinline, noclone)) get_an_A ();

37281

+

37282

+static int go;

37283

+

37284

+struct A

37285

+{

37286

+ int fi;

37287

+

37288

+ A () : fi(777) {}

37289

+ A (int pi) : fi (pi) {}

37290

+ virtual A * foo (int p) = 0;

37291

+};

37292

+

37293

+struct B;

37294

+static B * __attribute__ ((noinline, noclone)) get_a_B ();

37295

+

37296

+struct B : public Distraction, A

37297

+{

37298

+ B () : Distraction(), A() { }

37299

+ B (int pi) : Distraction (), A (pi) {}

37300

+ virtual B * foo (int p)

37301

+ {

37302

+ int o = fi;

37303

+ for (int i = 0; i < p; i++)

37304

+ o += i + i * i;

37305

+ go = o;

37306

+

37307

+ return get_a_B ();

37308

+ }

37309

+};

37310

+

37311

+

37312

+struct B gb1 (1111), gb2 (2);

37313

+static B * __attribute__ ((noinline, noclone))

37314

+get_a_B ()

37315

+{

37316

+ return &gb1;

37317

+}

37318

+

37319

+static A * __attribute__ ((noinline, noclone))

37320

+get_an_A ()

37321

+{

37322

+ return &gb2;

37323

+}

37324

+

37325

+}

37326

+

37327

+static int __attribute__ ((noinline, noclone))

37328

+get_a_number ()

37329

+{

37330

+ return 5;

37331

+}

37332

+

37333

+extern "C" void abort (void);

37334

+

37335

+int main (int argc, char *argv[])

37336

+{

37337

+ for (int i = 0; i < get_a_number (); i++)

37338

+ {

37339

+ struct A *p = get_an_A ();

37340

+ struct A *r = p->foo (4);

37341

+ if (r->fi != 1111)

37342

+ abort ();

37343

+ if (go != 22)

37344

+ abort ();

37345

+ }

37346

+ return 0;

37347

+}

37348

Index: gcc/testsuite/g++.dg/ipa/pr60419.C

37349

===================================================================

37350

--- a/src/gcc/testsuite/g++.dg/ipa/pr60419.C (.../tags/gcc_4_8_2_release)

37351

+++ b/src/gcc/testsuite/g++.dg/ipa/pr60419.C (.../branches/gcc-4_8-branch)

37352

@@ -0,0 +1,80 @@

37353

+// PR middle-end/60419

37354

+// { dg-do compile }

37355

+// { dg-options "-O2" }

37356

+

37357

+struct C

37358

+{

37359

+};

37360

+

37361

+struct I : C

37362

+{

37363

+ I ();

37364

+};

37365

+

37366

+struct J

37367

+{

37368

+ void foo ();

37369

+ J ();

37370

+ virtual void foo (int &, int);

37371

+};

37372

+

37373

+template <class>

37374

+struct D

37375

+{

37376

+ virtual void foo (I &) const;

37377

+ void bar ()

37378

+ {

37379

+ I p;

37380

+ foo (p);

37381

+ }

37382

+};

37383

+

37384

+struct K : J, public D<int>

37385

+{

37386

+};

37387

+

37388

+struct F

37389

+{

37390

+ K *operator->();

37391

+};

37392

+

37393

+struct N : public K

37394

+{

37395

+ void foo (int &, int);

37396

+ I n;

37397

+ void foo (I &) const {}

37398

+};

37399

+

37400

+struct L : J

37401

+{

37402

+ F l;

37403

+};

37404

+

37405

+struct M : F

37406

+{

37407

+ L *operator->();

37408

+};

37409

+

37410

+struct G

37411

+{

37412

+ G ();

37413

+};

37414

+

37415

+M h;

37416

+

37417

+G::G ()

37418

+try

37419

+{

37420

+ N f;

37421

+ f.bar ();

37422

+ throw;

37423

+}

37424

+catch (int)

37425

+{

37426

+}

37427

+

37428

+void

37429

+baz ()

37430

+{

37431

+ h->l->bar ();

37432

+}

37433

Index: gcc/testsuite/g++.dg/overload/defarg8.C

37434

===================================================================

37435

--- a/src/gcc/testsuite/g++.dg/overload/defarg8.C (.../tags/gcc_4_8_2_release)

37436

+++ b/src/gcc/testsuite/g++.dg/overload/defarg8.C (.../branches/gcc-4_8-branch)

37437

@@ -0,0 +1,22 @@

37438

+// PR c++/60367

37439

+// { dg-do run { target c++11 } }

37440

+

37441

+extern "C" int printf (const char *, ...);

37442

+extern "C" void abort();

37443

+

37444

+void *p;

37445

+struct foo {

37446

+ foo() { p = this; }

37447

+ foo (const foo &) { abort(); }

37448

+ ~foo() { if (p != this) abort(); }

37449

+};

37450

+

37451

+void do_something( foo f = {} )

37452

+{

37453

+ if (&f != p) abort();

37454

+}

37455

+

37456

+int main()

37457

+{

37458

+ do_something();

37459

+}

37460

Index: gcc/testsuite/g++.dg/template/ref7.C

37461

===================================================================

37462

--- a/src/gcc/testsuite/g++.dg/template/ref7.C (.../tags/gcc_4_8_2_release)

37463

+++ b/src/gcc/testsuite/g++.dg/template/ref7.C (.../branches/gcc-4_8-branch)

37464

@@ -0,0 +1,16 @@

37465

+// PR c++/60274

37466

+

37467

+typedef const char *const& ProtocolIdType;

37468

+

37469

+template <ProtocolIdType protocolId>

37470

+struct C {

37471

+ typedef int ProtocolVersion;

37472

+ struct D {

37473

+ ProtocolVersion GetProtocolVersion();

37474

+ };

37475

+};

37476

+template <ProtocolIdType protocolId>

37477

+typename C<protocolId>::ProtocolVersion C<protocolId>::D::GetProtocolVersion()

37478

+{

37479

+ return 1;

37480

+}

37481

Index: gcc/testsuite/g++.dg/template/using28.C

37482

===================================================================

37483

--- a/src/gcc/testsuite/g++.dg/template/using28.C (.../tags/gcc_4_8_2_release)

37484

+++ b/src/gcc/testsuite/g++.dg/template/using28.C (.../branches/gcc-4_8-branch)

37485

@@ -0,0 +1,17 @@

37486

+// PR c++/37140

37487

+

37488

+struct C

37489

+{

37490

+ static const int block_size = 1;

37491

+};

37492

+

37493

+template <typename T> struct A {

37494

+ typedef C type;

37495

+};

37496

+

37497

+template <typename T> struct B : public A<T> {

37498

+ using typename A<T>::type;

37499

+ static const int block_size = type::block_size;

37500

+};

37501

+

37502

+template class B<int>;

37503

Index: gcc/testsuite/g++.dg/template/shadow1.C

37504

===================================================================

37505

--- a/src/gcc/testsuite/g++.dg/template/shadow1.C (.../tags/gcc_4_8_2_release)

37506

+++ b/src/gcc/testsuite/g++.dg/template/shadow1.C (.../branches/gcc-4_8-branch)

37507

@@ -0,0 +1,4 @@

37508

+// PR c++/58632

37509

+

37510

+template<template<int I> class A> // { dg-message "shadows" }

37511

+class A {}; // { dg-error "declaration" }

37512

Index: gcc/testsuite/g++.dg/template/partial14.C

37513

===================================================================

37514

--- a/src/gcc/testsuite/g++.dg/template/partial14.C (.../tags/gcc_4_8_2_release)

37515

+++ b/src/gcc/testsuite/g++.dg/template/partial14.C (.../branches/gcc-4_8-branch)

37516

@@ -0,0 +1,16 @@

37517

+// PR c++/59044

37518

+

37519

+template <class T>

37520

+class C {

37521

+private:

37522

+ template <T a, T b>

37523

+ struct Implementation {};

37524

+public:

37525

+ typedef typename Implementation<0, 0>::Typedef Type;

37526

+};

37527

+

37528

+template <class T>

37529

+template <T b>

37530

+struct C<T>::Implementation<0, b> { typedef void Typedef; };

37531

+

37532

+template class C<unsigned>;

37533

Index: gcc/testsuite/g++.dg/template/using27.C

37534

===================================================================

37535

--- a/src/gcc/testsuite/g++.dg/template/using27.C (.../tags/gcc_4_8_2_release)

37536

+++ b/src/gcc/testsuite/g++.dg/template/using27.C (.../branches/gcc-4_8-branch)

37537

@@ -0,0 +1,33 @@

37538

+// PR c++/37140

37539

+

37540

+struct X

37541

+{

37542

+ typedef int nested_type;

37543

+};

37544

+

37545

+template <class T>

37546

+struct A

37547

+{

37548

+ typedef X type;

37549

+};

37550

+

37551

+template <class T>

37552

+struct B : A<T>

37553

+{

37554

+ using typename A<T>::type;

37555

+ typename type::nested_type x;

37556

+};

37557

+

37558

+template <class T>

37559

+struct C : B<T>

37560

+{

37561

+ using typename B<T>::type;

37562

+ typename type::nested_type y;

37563

+};

37564

+

37565

+struct D : C<int>

37566

+{

37567

+ using C<int>::type;

37568

+ type::nested_type z;

37569

+};

37570

+

37571

Index: gcc/testsuite/g++.dg/template/using29.C

37572

===================================================================

37573

--- a/src/gcc/testsuite/g++.dg/template/using29.C (.../tags/gcc_4_8_2_release)

37574

+++ b/src/gcc/testsuite/g++.dg/template/using29.C (.../branches/gcc-4_8-branch)

37575

@@ -0,0 +1,21 @@

37576

+// PR c++/58047

37577

+

37578

+template <int N>

37579

+struct print_arg { };

37580

+

37581

+struct const_holder {

37582

+ static const int CONSTANT = 42;

37583

+};

37584

+

37585

+template <typename T>

37586

+struct identity {

37587

+ typedef T type;

37588

+};

37589

+

37590

+template <class T>

37591

+struct test_case : public identity<T> {

37592

+ using typename identity<T>::type;

37593

+ print_arg<type::CONSTANT> printer;

37594

+};

37595

+

37596

+template struct test_case<const_holder>;

37597

Index: gcc/testsuite/g++.dg/template/partial15.C

37598

===================================================================

37599

--- a/src/gcc/testsuite/g++.dg/template/partial15.C (.../tags/gcc_4_8_2_release)

37600

+++ b/src/gcc/testsuite/g++.dg/template/partial15.C (.../branches/gcc-4_8-branch)

37601

@@ -0,0 +1,19 @@

37602

+// PR c++/57043

37603

+// { dg-do link }

37604

+

37605

+template<typename D> struct complex { };

37606

+

37607

+template<typename Tp>

37608

+complex<Tp>

37609

+pow(const complex<Tp>& x, const complex<Tp>& y) { return complex<Tp>(); }

37610

+

37611

+template<typename T, typename U>

37612

+struct promote_2 { typedef T type; };

37613

+

37614

+template<typename Tp, typename Up>

37615

+complex<typename promote_2<Tp, Up>::type>

37616

+pow(const complex<Tp>& x, const complex<Up>& y);

37617

+

37618

+complex<double> (*powcc)(const complex<double>&, const complex<double>&) = pow;

37619

+

37620

+int main() {}

37621

Index: gcc/testsuite/c-c++-common/cpp/pr60400-1.h

37622

===================================================================

37623

--- a/src/gcc/testsuite/c-c++-common/cpp/pr60400-1.h (.../tags/gcc_4_8_2_release)

37624

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr60400-1.h (.../branches/gcc-4_8-branch)

37625

@@ -0,0 +1,3 @@

37626

+??=ifndef PR60400_1_H

37627

+??=define PR60400_1_H

37628

+??=endif

37629

Index: gcc/testsuite/c-c++-common/cpp/pr60400-2.h

37630

===================================================================

37631

--- a/src/gcc/testsuite/c-c++-common/cpp/pr60400-2.h (.../tags/gcc_4_8_2_release)

37632

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr60400-2.h (.../branches/gcc-4_8-branch)

37633

@@ -0,0 +1,4 @@

37634

+??=ifndef PR60400_2_H

37635

+??=define PR60400_2_H

37636

+??=include "pr60400-1.h"

37637

+??=endif

37638

Index: gcc/testsuite/c-c++-common/cpp/pr60400.c

37639

===================================================================

37640

--- a/src/gcc/testsuite/c-c++-common/cpp/pr60400.c (.../tags/gcc_4_8_2_release)

37641

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr60400.c (.../branches/gcc-4_8-branch)

37642

@@ -0,0 +1,13 @@

37643

+/* PR preprocessor/60400 */

37644

+/* { dg-do compile } */

37645

+/* { dg-options "-trigraphs -Wtrigraphs" } */

37646

+

37647

+??=include "pr60400-1.h"

37648

+??=include "pr60400-2.h"

37649

+

37650

+/* { dg-warning "trigraph" "" { target *-*-* } 1 } */

37651

+/* { dg-warning "trigraph" "" { target *-*-* } 2 } */

37652

+/* { dg-warning "trigraph" "" { target *-*-* } 3 } */

37653

+/* { dg-warning "trigraph" "" { target *-*-* } 4 } */

37654

+/* { dg-warning "trigraph" "" { target *-*-* } 5 } */

37655

+/* { dg-warning "trigraph" "" { target *-*-* } 6 } */

37656

Index: gcc/testsuite/c-c++-common/cpp/pr58844-1.c

37657

===================================================================

37658

--- a/src/gcc/testsuite/c-c++-common/cpp/pr58844-1.c (.../tags/gcc_4_8_2_release)

37659

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr58844-1.c (.../branches/gcc-4_8-branch)

37660

@@ -0,0 +1,8 @@

37661

+/* PR preprocessor/58844 */

37662

+/* { dg-do compile } */

37663

+/* { dg-options "-ftrack-macro-expansion=0" } */

37664

+

37665

+#define A x######x

37666

+int A = 1;

37667

+#define A x######x /* { dg-message "previous definition" } */

37668

+#define A x##x /* { dg-warning "redefined" } */

37669

Index: gcc/testsuite/c-c++-common/cpp/pr58844-2.c

37670

===================================================================

37671

--- a/src/gcc/testsuite/c-c++-common/cpp/pr58844-2.c (.../tags/gcc_4_8_2_release)

37672

+++ b/src/gcc/testsuite/c-c++-common/cpp/pr58844-2.c (.../branches/gcc-4_8-branch)

37673

@@ -0,0 +1,8 @@

37674

+/* PR preprocessor/58844 */

37675

+/* { dg-do compile } */

37676

+/* { dg-options "-ftrack-macro-expansion=2" } */

37677

+

37678

+#define A x######x

37679

+int A = 1;

37680

+#define A x######x /* { dg-message "previous definition" } */

37681

+#define A x##x /* { dg-warning "redefined" } */

37682

Index: gcc/testsuite/c-c++-common/convert-vec-1.c

37683

===================================================================

37684

--- a/src/gcc/testsuite/c-c++-common/convert-vec-1.c (.../tags/gcc_4_8_2_release)

37685

+++ b/src/gcc/testsuite/c-c++-common/convert-vec-1.c (.../branches/gcc-4_8-branch)

37686

@@ -1,3 +1,4 @@

37687

/* { dg-do compile } */

37688

+/* { dg-prune-output "changes the ABI" } */

37689

typedef float v2sf __attribute__ ((vector_size (8)));

37690

v2sf sub (void) { return (v2sf) 0.0; } /* { dg-error "can't convert" } */

37691

Index: gcc/testsuite/c-c++-common/pr60101.c

37692

===================================================================

37693

--- a/src/gcc/testsuite/c-c++-common/pr60101.c (.../tags/gcc_4_8_2_release)

37694

+++ b/src/gcc/testsuite/c-c++-common/pr60101.c (.../branches/gcc-4_8-branch)

37695

@@ -0,0 +1,112 @@

37696

+/* PR c/60101 */

37697

+/* { dg-do compile } */

37698

+/* { dg-options "-O2 -Wall" } */

37699

+

37700

+extern int *a, b, *c, *d;

37701

+

37702

+void

37703

+foo (double _Complex *x, double _Complex *y, double _Complex *z, unsigned int l, int w)

37704

+{

37705

+ unsigned int e = (unsigned int) a[3];

37706

+ double _Complex (*v)[l][4][e][l][4] = (double _Complex (*)[l][4][e][l][4]) z;

37707

+ double _Complex (*f)[l][b][l] = (double _Complex (*)[l][b][l]) y;

37708

+ unsigned int g = c[0] * c[1] * c[2];

37709

+ unsigned int h = d[0] + c[0] * (d[1] + c[1] * d[2]);

37710

+ unsigned int i;

37711

+

37712

+ for (i = 0; i < e; i++)

37713

+ {

37714

+ int j = e * d[3] + i;

37715

+

37716

+ unsigned int n0, n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11;

37717

+ float _Complex s = 0.;

37718

+ unsigned int t = 0;

37719

+

37720

+ for (n0 = 0; n0 < l; n0++)

37721

+ for (n1 = 0; n1 < l; n1++)

37722

+ for (n2 = 0; n2 < l; n2++)

37723

+ for (n3 = 0; n3 < l; n3++)

37724

+ for (n4 = 0; n4 < l; n4++)

37725

+ for (n5 = 0; n5 < l; n5++)

37726

+ for (n6 = 0; n6 < l; n6++)

37727

+ for (n7 = 0; n7 < l; n7++)

37728

+ for (n8 = 0; n8 < l; n8++)

37729

+ for (n9 = 0; n9 < l; n9++)

37730

+ for (n10 = 0; n10 < l; n10++)

37731

+ for (n11 = 0; n11 < l; n11++)

37732

+ {

37733

+ if (t % g == h)

37734

+ s

37735

+ += f[n0][n4][j][n8] * f[n1][n5][j][n9] * ~(f[n2][n6][w][n10]) * ~(f[n3][n7][w][n11])

37736

+ * (+0.25 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1]

37737

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0]

37738

+ + 0.25 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1]

37739

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

37740

+ - 0.5 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1]

37741

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

37742

+ + 0.25 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1]

37743

+ * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0]

37744

+ - 0.5 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1]

37745

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

37746

+ + 0.25 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1]

37747

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

37748

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1]

37749

+ * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0]

37750

+ - 0.5 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1]

37751

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

37752

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1]

37753

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

37754

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1]

37755

+ * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0]

37756

+ + 0.25 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1]

37757

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

37758

+ - 0.5 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1]

37759

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

37760

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

37761

+ * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0]

37762

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

37763

+ * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0]

37764

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

37765

+ * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0]

37766

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

37767

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0]

37768

+ + 1. * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

37769

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

37770

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1]

37771

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

37772

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

37773

+ * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0]

37774

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

37775

+ * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0]

37776

+ + 0.25 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

37777

+ * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0]

37778

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

37779

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0]

37780

+ - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

37781

+ * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0]

37782

+ + 1. * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1]

37783

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0]

37784

+ + 0.5 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

37785

+ * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] * v[0][n10][0][i][n8][0]

37786

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

37787

+ * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0] * v[0][n10][0][i][n8][0]

37788

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

37789

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n0][0] * v[0][n10][0][i][n1][0]

37790

+ + 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

37791

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n10][0][i][n0][0]

37792

+ + 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

37793

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n0][0] * v[0][n10][0][i][n1][0]

37794

+ - 0.5 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1]

37795

+ * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n10][0][i][n0][0]

37796

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1]

37797

+ * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] * v[0][n3][0][i][n8][0]

37798

+ - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1]

37799

+ * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n0][0] * v[0][n3][0][i][n1][0]);

37800

+ t++;

37801

+ }

37802

+ int u = (j - w + b) % b;

37803

+ int q = (j >= w ? +1 : -1);

37804

+ int r = q;

37805

+ x[u] += r * s;

37806

+ }

37807

+}

37808

Index: gcc/testsuite/c-c++-common/pr36282-3.c

37809

===================================================================

37810

--- a/src/gcc/testsuite/c-c++-common/pr36282-3.c (.../tags/gcc_4_8_2_release)

37811

+++ b/src/gcc/testsuite/c-c++-common/pr36282-3.c (.../branches/gcc-4_8-branch)

37812

@@ -0,0 +1,13 @@

37813

+/* PR middle-end/36282 */

37814

+/* { dg-do compile } */

37815

+

37816

+void bar (void);

37817

+#pragma weak bar

37818

+

37819

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

37820

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

37821

+

37822

+void

37823

+foo (void)

37824

+{

37825

+}

37826

Index: gcc/testsuite/c-c++-common/pr59037.c

37827

===================================================================

37828

--- a/src/gcc/testsuite/c-c++-common/pr59037.c (.../tags/gcc_4_8_2_release)

37829

+++ b/src/gcc/testsuite/c-c++-common/pr59037.c (.../branches/gcc-4_8-branch)

37830

@@ -0,0 +1,12 @@

37831

+/* { dg-do compile } */

37832

+/* { dg-options "-O3" } */

37833

+

37834

+typedef int v4si __attribute__ ((vector_size (16)));

37835

+

37836

+int

37837

+main (int argc, char** argv)

37838

+{

37839

+ v4si x = {0,1,2,3};

37840

+ x = (v4si) {(x)[3], (x)[2], (x)[1], (x)[0]};

37841

+ return x[4];

37842

+}

37843

Index: gcc/testsuite/c-c++-common/pr59280.c

37844

===================================================================

37845

--- a/src/gcc/testsuite/c-c++-common/pr59280.c (.../tags/gcc_4_8_2_release)

37846

+++ b/src/gcc/testsuite/c-c++-common/pr59280.c (.../branches/gcc-4_8-branch)

37847

@@ -0,0 +1,4 @@

37848

+/* PR c/59280 */

37849

+/* { dg-do compile } */

37850

+

37851

+void bar (char *) __attribute__((constructor(foo))); /* { dg-error "constructor priorities must be integers|was not declared|constructor priorities are not supported" } */

37852

Index: gcc/testsuite/c-c++-common/pr37743.c

37853

===================================================================

37854

--- a/src/gcc/testsuite/c-c++-common/pr37743.c (.../tags/gcc_4_8_2_release)

37855

+++ b/src/gcc/testsuite/c-c++-common/pr37743.c (.../branches/gcc-4_8-branch)

37856

@@ -0,0 +1,13 @@

37857

+/* PR c/37743 */

37858

+/* This needs to be run only on targets where __UINT32_TYPE__ is defined

37859

+ to unsigned int. */

37860

+/* { dg-do compile { target *-*-linux-gnu* } } */

37861

+/* { dg-options "-Wformat" } */

37862

+

37863

+int foo (const char *, ...) __attribute__ ((format (printf, 1, 2)));

37864

+

37865

+void

37866

+bar (unsigned int x)

37867

+{

37868

+ foo ("%x", __builtin_bswap32 (x));

37869

+}

37870

Index: gcc/testsuite/c-c++-common/fold-divmul-1.c

37871

===================================================================

37872

--- a/src/gcc/testsuite/c-c++-common/fold-divmul-1.c (.../tags/gcc_4_8_2_release)

37873

+++ b/src/gcc/testsuite/c-c++-common/fold-divmul-1.c (.../branches/gcc-4_8-branch)

37874

@@ -0,0 +1,11 @@

37875

+/* { dg-do compile } */

37876

+/* { dg-options "-fdump-tree-original" } */

37877

+

37878

+int *

37879

+fx (int *b, int *e)

37880

+{

37881

+ return b + (e - b);

37882

+}

37883

+

37884

+/* { dg-final { scan-tree-dump-not "/\\\[ex\\\]" "original" } } */

37885

+/* { dg-final { cleanup-tree-dump "original" } } */

37886

Index: gcc/testsuite/c-c++-common/torture/pr58794-1.c

37887

===================================================================

37888

--- a/src/gcc/testsuite/c-c++-common/torture/pr58794-1.c (.../tags/gcc_4_8_2_release)

37889

+++ b/src/gcc/testsuite/c-c++-common/torture/pr58794-1.c (.../branches/gcc-4_8-branch)

37890

@@ -0,0 +1,29 @@

37891

+/* { dg-do compile } */

37892

+

37893

+struct S0

37894

+{

37895

+ int f;

37896

+};

37897

+

37898

+struct S1

37899

+{

37900

+ struct S0 f1;

37901

+ volatile int f2;

37902

+};

37903

+

37904

+struct S2

37905

+{

37906

+ struct S1 g;

37907

+} a, b;

37908

+

37909

+static int *c[1][2] = {{0, (int *)&a.g.f2}};

37910

+static int d;

37911

+

37912

+int

37913

+main ()

37914

+{

37915

+ for (d = 0; d < 1; d++)

37916

+ for (b.g.f1.f = 0; b.g.f1.f < 1; b.g.f1.f++)

37917

+ *c[b.g.f1.f][d + 1] = 0;

37918

+ return 0;

37919

+}

37920

Index: gcc/testsuite/c-c++-common/torture/pr58794-2.c

37921

===================================================================

37922

--- a/src/gcc/testsuite/c-c++-common/torture/pr58794-2.c (.../tags/gcc_4_8_2_release)

37923

+++ b/src/gcc/testsuite/c-c++-common/torture/pr58794-2.c (.../branches/gcc-4_8-branch)

37924

@@ -0,0 +1,21 @@

37925

+/* { dg-do compile } */

37926

+

37927

+struct S

37928

+{

37929

+ volatile int f;

37930

+} a;

37931

+

37932

+unsigned int b;

37933

+

37934

+static int *c[1][2] = {{0, (int *)&a.f}};

37935

+static unsigned int d;

37936

+

37937

+int

37938

+main ()

37939

+{

37940

+ for (; d < 1; d++)

37941

+ for (; b < 1; b++)

37942

+ *c[b][d + 1] = 0;

37943

+

37944

+ return 0;

37945

+}

37946

Index: gcc/testsuite/c-c++-common/torture/pr60026.c

37947

===================================================================

37948

--- a/src/gcc/testsuite/c-c++-common/torture/pr60026.c (.../tags/gcc_4_8_2_release)

37949

+++ b/src/gcc/testsuite/c-c++-common/torture/pr60026.c (.../branches/gcc-4_8-branch)

37950

@@ -0,0 +1,28 @@

37951

+/* PR ipa/60026 */

37952

+/* { dg-do compile } */

37953

+

37954

+struct S { int f; } a;

37955

+

37956

+__attribute__((optimize (0)))

37957

+struct S foo (int x, struct S y)

37958

+{

37959

+ int b = y.f;

37960

+ return a;

37961

+}

37962

+

37963

+void

37964

+bar ()

37965

+{

37966

+ while (a.f)

37967

+ {

37968

+ struct S c = {0};

37969

+ foo (0, c);

37970

+ }

37971

+}

37972

+

37973

+int

37974

+main ()

37975

+{

37976

+ bar ();

37977

+ return 0;

37978

+}

37979

Index: gcc/testsuite/c-c++-common/vector-compare-2.c

37980

===================================================================

37981

--- a/src/gcc/testsuite/c-c++-common/vector-compare-2.c (.../tags/gcc_4_8_2_release)

37982

+++ b/src/gcc/testsuite/c-c++-common/vector-compare-2.c (.../branches/gcc-4_8-branch)

37983

@@ -1,6 +1,7 @@

37984

/* { dg-do compile } */

37985

/* { dg-options "-fno-common" { target hppa*-*-hpux* } } */

37986

/* { dg-options "-mabi=altivec" { target { { powerpc*-*-linux* } && ilp32 } } } */

37987

+/* { dg-options "-msse2" { target { i?86-*-* x86_64-*-* } } } */

37988

/* Ignore warning on some powerpc-ibm-aix configurations. */

37989

/* { dg-prune-output "non-standard ABI extension" } */

37990

37991

Index: gcc/testsuite/c-c++-common/pr36282-4.c

37992

===================================================================

37993

--- a/src/gcc/testsuite/c-c++-common/pr36282-4.c (.../tags/gcc_4_8_2_release)

37994

+++ b/src/gcc/testsuite/c-c++-common/pr36282-4.c (.../branches/gcc-4_8-branch)

37995

@@ -0,0 +1,13 @@

37996

+/* PR middle-end/36282 */

37997

+/* { dg-do compile } */

37998

+

37999

+#pragma weak bar

38000

+void bar (void);

38001

+

38002

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

38003

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

38004

+

38005

+void

38006

+foo (void)

38007

+{

38008

+}

38009

Index: gcc/testsuite/c-c++-common/gomp/pr58809.c

38010

===================================================================

38011

--- a/src/gcc/testsuite/c-c++-common/gomp/pr58809.c (.../tags/gcc_4_8_2_release)

38012

+++ b/src/gcc/testsuite/c-c++-common/gomp/pr58809.c (.../branches/gcc-4_8-branch)

38013

@@ -0,0 +1,31 @@

38014

+/* PR middle-end/58809 */

38015

+/* { dg-do compile } */

38016

+/* { dg-options "-fopenmp" } */

38017

+

38018

+_Complex int j;

38019

+_Complex double d;

38020

+

38021

+void

38022

+foo (void)

38023

+{

38024

+ #pragma omp parallel reduction (&:j) /* { dg-error "has invalid type for" } */

38025

+ ;

38026

+ #pragma omp parallel reduction (|:j) /* { dg-error "has invalid type for" } */

38027

+ ;

38028

+ #pragma omp parallel reduction (^:j) /* { dg-error "has invalid type for" } */

38029

+ ;

38030

+ #pragma omp parallel reduction (min:j) /* { dg-error "has invalid type for" } */

38031

+ ;

38032

+ #pragma omp parallel reduction (max:j) /* { dg-error "has invalid type for" } */

38033

+ ;

38034

+ #pragma omp parallel reduction (&:d) /* { dg-error "has invalid type for" } */

38035

+ ;

38036

+ #pragma omp parallel reduction (|:d) /* { dg-error "has invalid type for" } */

38037

+ ;

38038

+ #pragma omp parallel reduction (^:d) /* { dg-error "has invalid type for" } */

38039

+ ;

38040

+ #pragma omp parallel reduction (min:d) /* { dg-error "has invalid type for" } */

38041

+ ;

38042

+ #pragma omp parallel reduction (max:d) /* { dg-error "has invalid type for" } */

38043

+ ;

38044

+}

38045

Index: gcc/testsuite/c-c++-common/gomp/pr59467.c

38046

===================================================================

38047

--- a/src/gcc/testsuite/c-c++-common/gomp/pr59467.c (.../tags/gcc_4_8_2_release)

38048

+++ b/src/gcc/testsuite/c-c++-common/gomp/pr59467.c (.../branches/gcc-4_8-branch)

38049

@@ -0,0 +1,68 @@

38050

+/* PR libgomp/59467 */

38051

+

38052

+int v;

38053

+

38054

+void

38055

+foo (void)

38056

+{

38057

+ int x = 0, y = 0;

38058

+ #pragma omp parallel

38059

+ {

38060

+ int z;

38061

+ #pragma omp single copyprivate (x) /* { dg-error "is not threadprivate or private in outer context" } */

38062

+ {

38063

+ #pragma omp atomic write

38064

+ x = 6;

38065

+ }

38066

+ #pragma omp atomic read

38067

+ z = x;

38068

+ #pragma omp atomic

38069

+ y += z;

38070

+ }

38071

+ #pragma omp parallel

38072

+ {

38073

+ int z;

38074

+ #pragma omp single copyprivate (v) /* { dg-error "is not threadprivate or private in outer context" } */

38075

+ {

38076

+ #pragma omp atomic write

38077

+ v = 6;

38078

+ }

38079

+ #pragma omp atomic read

38080

+ z = v;

38081

+ #pragma omp atomic

38082

+ y += z;

38083

+ }

38084

+ #pragma omp parallel private (x)

38085

+ {

38086

+ int z;

38087

+ #pragma omp single copyprivate (x)

38088

+ {

38089

+ #pragma omp atomic write

38090

+ x = 6;

38091

+ }

38092

+ #pragma omp atomic read

38093

+ z = x;

38094

+ #pragma omp atomic

38095

+ y += z;

38096

+ }

38097

+ x = 0;

38098

+ #pragma omp parallel reduction (+:x)

38099

+ {

38100

+ #pragma omp single copyprivate (x)

38101

+ {

38102

+ #pragma omp atomic write

38103

+ x = 6;

38104

+ }

38105

+ #pragma omp atomic

38106

+ y += x;

38107

+ }

38108

+ #pragma omp single copyprivate (x)

38109

+ {

38110

+ x = 7;

38111

+ }

38112

+ #pragma omp single copyprivate (v) /* { dg-error "is not threadprivate or private in outer context" } */

38113

+ {

38114

+ #pragma omp atomic write

38115

+ v = 6;

38116

+ }

38117

+}

38118

Index: gcc/testsuite/c-c++-common/pr36282-1.c

38119

===================================================================

38120

--- a/src/gcc/testsuite/c-c++-common/pr36282-1.c (.../tags/gcc_4_8_2_release)

38121

+++ b/src/gcc/testsuite/c-c++-common/pr36282-1.c (.../branches/gcc-4_8-branch)

38122

@@ -0,0 +1,12 @@

38123

+/* PR middle-end/36282 */

38124

+/* { dg-do compile } */

38125

+

38126

+#pragma weak bar

38127

+

38128

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

38129

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

38130

+

38131

+void

38132

+foo (void)

38133

+{

38134

+}

38135

Index: gcc/testsuite/c-c++-common/pr60689.c

38136

===================================================================

38137

--- a/src/gcc/testsuite/c-c++-common/pr60689.c (.../tags/gcc_4_8_2_release)

38138

+++ b/src/gcc/testsuite/c-c++-common/pr60689.c (.../branches/gcc-4_8-branch)

38139

@@ -0,0 +1,10 @@

38140

+/* PR c++/60689 */

38141

+/* { dg-do compile } */

38142

+

38143

+struct S { char x[9]; };

38144

+

38145

+void

38146

+foo (struct S *x, struct S *y, struct S *z)

38147

+{

38148

+ __atomic_exchange (x, y, z, __ATOMIC_SEQ_CST);

38149

+}

38150

Index: gcc/testsuite/c-c++-common/scal-to-vec2.c

38151

===================================================================

38152

--- a/src/gcc/testsuite/c-c++-common/scal-to-vec2.c (.../tags/gcc_4_8_2_release)

38153

+++ b/src/gcc/testsuite/c-c++-common/scal-to-vec2.c (.../branches/gcc-4_8-branch)

38154

@@ -1,6 +1,7 @@

38155

/* { dg-do compile } */

38156

/* { dg-options "-fno-common" { target hppa*-*-hpux* } } */

38157

/* { dg-options "-mabi=altivec" { target { { powerpc*-*-linux* } && ilp32 } } } */

38158

+/* { dg-options "-msse2" { target { i?86-*-* x86_64-*-* } } } */

38159

/* Ignore warning on some powerpc-ibm-aix configurations. */

38160

/* { dg-prune-output "non-standard ABI extension" } */

38161

38162

Index: gcc/testsuite/c-c++-common/pr59032.c

38163

===================================================================

38164

--- a/src/gcc/testsuite/c-c++-common/pr59032.c (.../tags/gcc_4_8_2_release)

38165

+++ b/src/gcc/testsuite/c-c++-common/pr59032.c (.../branches/gcc-4_8-branch)

38166

@@ -0,0 +1,30 @@

38167

+/* { dg-do compile } */

38168

+/* { dg-options "-O2" } */

38169

+

38170

+void

38171

+foo()

38172

+{

38173

+ float v __attribute__((vector_size(8)));

38174

+ v++;

38175

+}

38176

+

38177

+void

38178

+foo2 ()

38179

+{

38180

+ float v __attribute__((vector_size(8)));

38181

+ ++v;

38182

+}

38183

+

38184

+void

38185

+foo3 ()

38186

+{

38187

+ float v __attribute__((vector_size(8)));

38188

+ v--;

38189

+}

38190

+

38191

+void

38192

+foo4 ()

38193

+{

38194

+ float v __attribute__((vector_size(8)));

38195

+ --v;

38196

+}

38197

Index: gcc/testsuite/c-c++-common/pr36282-2.c

38198

===================================================================

38199

--- a/src/gcc/testsuite/c-c++-common/pr36282-2.c (.../tags/gcc_4_8_2_release)

38200

+++ b/src/gcc/testsuite/c-c++-common/pr36282-2.c (.../branches/gcc-4_8-branch)

38201

@@ -0,0 +1,10 @@

38202

+/* PR middle-end/36282 */

38203

+/* { dg-do compile } */

38204

+

38205

+extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n);

38206

+extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */

38207

+

38208

+void

38209

+foo (void)

38210

+{

38211

+}

38212

Index: gcc/cp/typeck.c

38213

===================================================================

38214

--- a/src/gcc/cp/typeck.c (.../tags/gcc_4_8_2_release)

38215

+++ b/src/gcc/cp/typeck.c (.../branches/gcc-4_8-branch)

38216

@@ -4103,6 +4103,11 @@

38217

case TRUTH_ORIF_EXPR:

38218

case TRUTH_AND_EXPR:

38219

case TRUTH_OR_EXPR:

38220

+ if (TREE_CODE (type0) == VECTOR_TYPE || TREE_CODE (type1) == VECTOR_TYPE)

38221

+ {

38222

+ sorry ("logical operation on vector type");

38223

+ return error_mark_node;

38224

+ }

38225

result_type = boolean_type_node;

38226

break;

38227

38228

@@ -5010,7 +5015,10 @@

38229

cp_truthvalue_conversion (tree expr)

38230

{

38231

tree type = TREE_TYPE (expr);

38232

- if (TYPE_PTRDATAMEM_P (type))

38233

+ if (TYPE_PTRDATAMEM_P (type)

38234

+ /* Avoid ICE on invalid use of non-static member function. */

38235

+ || (TREE_CODE (expr) == FUNCTION_DECL

38236

+ && DECL_NONSTATIC_MEMBER_FUNCTION_P (expr)))

38237

return build_binary_op (EXPR_LOCATION (expr),

38238

NE_EXPR, expr, nullptr_node, 1);

38239

else if (TYPE_PTR_P (type) || TYPE_PTRMEMFUNC_P (type))

38240

@@ -5588,7 +5596,9 @@

38241

inc = cxx_sizeof_nowarn (TREE_TYPE (argtype));

38242

}

38243

else

38244

- inc = integer_one_node;

38245

+ inc = (TREE_CODE (argtype) == VECTOR_TYPE

38246

+ ? build_one_cst (argtype)

38247

+ : integer_one_node);

38248

38249

inc = cp_convert (argtype, inc, complain);

38250

38251

@@ -6639,7 +6649,7 @@

38252

where possible, and it is necessary in some cases. DR 195

38253

addresses this issue, but as of 2004/10/26 is still in

38254

drafting. */

38255

- warning (0, "ISO C++ forbids casting between pointer-to-function and pointer-to-object");

38256

+ warning (OPT_Wpedantic, "ISO C++ forbids casting between pointer-to-function and pointer-to-object");

38257

return fold_if_not_in_template (build_nop (type, expr));

38258

}

38259

else if (TREE_CODE (type) == VECTOR_TYPE)

38260

@@ -7194,8 +7204,7 @@

38261

side effect associated with any single compound assignment

38262

operator. -- end note ] */

38263

lhs = stabilize_reference (lhs);

38264

- if (TREE_SIDE_EFFECTS (rhs))

38265

- rhs = mark_rvalue_use (rhs);

38266

+ rhs = rvalue (rhs);

38267

rhs = stabilize_expr (rhs, &init);

38268

newrhs = cp_build_binary_op (input_location,

38269

modifycode, lhs, rhs,

38270

@@ -7611,7 +7620,7 @@

38271

/* Handle null pointer to member function conversions. */

38272

if (null_ptr_cst_p (pfn))

38273

{

38274

- pfn = build_c_cast (input_location, type, pfn);

38275

+ pfn = cp_build_c_cast (type, pfn, complain);

38276

return build_ptrmemfunc1 (to_type,

38277

integer_zero_node,

38278

pfn);

38279

Index: gcc/cp/decl.c

38280

===================================================================

38281

--- a/src/gcc/cp/decl.c (.../tags/gcc_4_8_2_release)

38282

+++ b/src/gcc/cp/decl.c (.../branches/gcc-4_8-branch)

38283

@@ -1867,9 +1867,9 @@

38284

/* Merge the data types specified in the two decls. */

38285

newtype = merge_types (TREE_TYPE (newdecl), TREE_TYPE (olddecl));

38286

38287

- /* If merge_types produces a non-typedef type, just use the old type. */

38288

- if (TREE_CODE (newdecl) == TYPE_DECL

38289

- && newtype == DECL_ORIGINAL_TYPE (newdecl))

38290

+ /* For typedefs use the old type, as the new type's DECL_NAME points

38291

+ at newdecl, which will be ggc_freed. */

38292

+ if (TREE_CODE (newdecl) == TYPE_DECL)

38293

newtype = oldtype;

38294

38295

if (TREE_CODE (newdecl) == VAR_DECL)

38296

@@ -8193,7 +8193,9 @@

38297

abi_1_itype = error_mark_node;

38298

}

38299

38300

- size = maybe_constant_value (size);

38301

+ if (INTEGRAL_OR_UNSCOPED_ENUMERATION_TYPE_P (type))

38302

+ size = maybe_constant_value (size);

38303

+

38304

if (!TREE_CONSTANT (size))

38305

size = osize;

38306

}

38307

@@ -8473,6 +8475,14 @@

38308

return error_mark_node;

38309

}

38310

38311

+ /* 8.3.4p1: ...if the type of the identifier of D contains the auto

38312

+ type-specifier, the program is ill-formed. */

38313

+ if (type_uses_auto (type))

38314

+ {

38315

+ error ("%qD declared as array of %qT", name, type);

38316

+ return error_mark_node;

38317

+ }

38318

+

38319

/* Figure out the index type for the array. */

38320

if (size)

38321

itype = compute_array_index_type (name, size, tf_warning_or_error);

38322

@@ -11891,7 +11901,10 @@

38323

38324

if (decl

38325

&& (DECL_CLASS_TEMPLATE_P (decl)

38326

- || DECL_TEMPLATE_TEMPLATE_PARM_P (decl)))

38327

+ /* If scope is ts_current we're defining a class, so ignore a

38328

+ template template parameter. */

38329

+ || (scope != ts_current

38330

+ && DECL_TEMPLATE_TEMPLATE_PARM_P (decl))))

38331

decl = DECL_TEMPLATE_RESULT (decl);

38332

38333

if (decl && TREE_CODE (decl) == TYPE_DECL)

38334

Index: gcc/cp/except.c

38335

===================================================================

38336

--- a/src/gcc/cp/except.c (.../tags/gcc_4_8_2_release)

38337

+++ b/src/gcc/cp/except.c (.../branches/gcc-4_8-branch)

38338

@@ -380,6 +380,9 @@

38339

{

38340

tree type = body ? TREE_TYPE (body) : void_type_node;

38341

38342

+ if (!flag_exceptions)

38343

+ return body;

38344

+

38345

if (cond && !value_dependent_expression_p (cond))

38346

{

38347

cond = cxx_constant_value (cond);

38348

Index: gcc/cp/ChangeLog

38349

===================================================================

38350

--- a/src/gcc/cp/ChangeLog (.../tags/gcc_4_8_2_release)

38351

+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-4_8-branch)

38352

@@ -1,3 +1,268 @@

38353

+2014-05-13 Jason Merrill <jason@redhat.com>

38354

+

38355

+ PR c++/60708

38356

+ * call.c (build_array_conv): Call complete_type.

38357

+

38358

+ PR c++/60713

38359

+ * typeck2.c (PICFLAG_SIDE_EFFECTS): New.

38360

+ (picflag_from_initializer): Return it.

38361

+ (process_init_constructor): Handle it.

38362

+

38363

+ PR c++/60628

38364

+ * decl.c (create_array_type_for_decl): Complain about array of auto.

38365

+

38366

+ PR c++/60367

38367

+ * call.c (convert_default_arg): Remove special handling for

38368

+ CONSTRUCTOR.

38369

+

38370

+2014-04-28 Daniel Gutson <daniel.gutson@tallertechnologies.com>

38371

+

38372

+ * typeck.c (build_reinterpret_cast_1): Pass proper argument to

38373

+ warn() in pedantic.

38374

+

38375

+2014-02-28 Jason Merrill <jason@redhat.com>

38376

+

38377

+ PR c++/58845

38378

+ * typeck.c (cp_build_binary_op): Sorry on vector&&vector.

38379

+

38380

+2014-02-26 Jason Merrill <jason@redhat.com>

38381

+

38382

+ PR c++/60182

38383

+ * pt.c (unify): Ignore alias templates when deducing a template

38384

+ template parameter.

38385

+

38386

+2014-02-24 Jason Merrill <jason@redhat.com>

38387

+

38388

+ PR c++/60146

38389

+ * pt.c (tsubst_omp_for_iterator): Don't let substitution of the

38390

+ DECL_EXPR initialize a non-class iterator.

38391

+

38392

+2014-02-24 Fabien Chêne <fabien@gcc.gnu.org>

38393

+ PR c++/37140

38394

+ * parser.c (cp_parser_nonclass_name): Call strip_using_decl and

38395

+ move the code handling dependent USING_DECLs...

38396

+ * name-lookup.c (strip_using_decl): ...Here.

38397

+

38398

+2014-02-21 Jason Merrill <jason@redhat.com>

38399

+

38400

+ PR c++/60108

38401

+ * semantics.c (expand_or_defer_fn_1): Check DECL_DEFAULTED_FN.

38402

+

38403

+ PR c++/60187

38404

+ * parser.c (cp_parser_enum_specifier): Call

38405

+ check_for_bare_parameter_packs.

38406

+

38407

+ PR c++/60216

38408

+ * pt.c (register_specialization): Copy DECL_DELETED_FN to clones.

38409

+

38410

+ PR c++/60219

38411

+ * pt.c (coerce_template_parms): Bail if argument packing fails.

38412

+

38413

+ PR c++/60248

38414

+ * mangle.c (mangle_decl): Don't make an alias for a TYPE_DECL.

38415

+

38416

+2014-02-20 Jason Merrill <jason@redhat.com>

38417

+

38418

+ PR c++/60274

38419

+ Revert:

38420

+ PR c++/58606

38421

+ * pt.c (template_parm_to_arg): Call convert_from_reference.

38422

+ (tsubst_template_arg): Don't strip reference refs.

38423

+

38424

+2014-02-20 Kai Tietz <ktietz@redhat.com>

38425

+

38426

+ PR c++/58873

38427

+ * parser.c (cp_parser_functional_cast): Treat NULL_TREE

38428

+ valued type argument as error_mark_node.

38429

+

38430

+ PR c++/58835

38431

+ * semantics.c (finish_fname): Handle error_mark_node.

38432

+

38433

+2014-02-19 Jason Merrill <jason@redhat.com>

38434

+

38435

+ PR c++/60046

38436

+ * pt.c (maybe_instantiate_noexcept): Don't instantiate exception

38437

+ spec from template context.

38438

+

38439

+2014-01-31 Jason Merrill <jason@redhat.com>

38440

+

38441

+ PR c++/58672

38442

+ * decl2.c (handle_tls_init): Handle null init fn.

38443

+

38444

+ PR c++/55800

38445

+ * decl2.c (get_tls_init_fn): Copy DECL_EXTERNAL from the variable.

38446

+

38447

+ PR c++/59646

38448

+ * call.c (convert_like_real) [ck_aggr]: Set TARGET_EXPR_LIST_INIT_P.

38449

+ [ck_list]: Check for error_mark_node.

38450

+

38451

+ PR c++/57043

38452

+ * pt.c (fn_type_unification): Don't do DEDUCE_EXACT check

38453

+ during partial ordering.

38454

+

38455

+2014-01-30 Jason Merrill <jason@redhat.com>

38456

+

38457

+ PR c++/57899

38458

+ * pt.c (instantiate_template_1): Save/restore local_specializations.

38459

+

38460

+2014-01-29 Jason Merrill <jason@redhat.com>

38461

+

38462

+ PR c++/59989

38463

+ * pt.c (expand_template_argument_pack): Correct

38464

+ non_default_args_count calculation.

38465

+

38466

+ PR c++/58466

38467

+ * pt.c (unify_pack_expansion): Call expand_template_argument_pack.

38468

+

38469

+2014-01-28 Jason Merrill <jason@redhat.com>

38470

+

38471

+ PR c++/58632

38472

+ * decl.c (lookup_and_check_tag): Ignore template parameters if

38473

+ scope == ts_current.

38474

+ * pt.c (check_template_shadow): Don't complain about the injected

38475

+ class name.

38476

+

38477

+2014-01-27 Jason Merrill <jason@redhat.com>

38478

+

38479

+ PR c++/54652

38480

+ * decl.c (duplicate_decls): Always use oldtype for TYPE_DECL.

38481

+

38482

+ PR c++/58504

38483

+ * pt.c (tsubst_copy_and_build) [TRAIT_EXPR]: Use tsubst for

38484

+ types.

38485

+

38486

+ PR c++/58606

38487

+ * pt.c (template_parm_to_arg): Call convert_from_reference.

38488

+ (tsubst_template_arg): Don't strip reference refs.

38489

+

38490

+ PR c++/58639

38491

+ * call.c (build_aggr_conv): Reject value-initialization of reference.

38492

+

38493

+ PR c++/58812

38494

+ * call.c (convert_like_real): Give helpful error about excess braces

38495

+ for reference binding, too.

38496

+

38497

+ PR c++/58814

38498

+ * typeck.c (cp_build_modify_expr): Make the RHS an rvalue before

38499

+ stabilizing.

38500

+

38501

+ PR c++/58837

38502

+ * typeck.c (cp_truthvalue_conversion): Use explicit comparison for

38503

+ FUNCTION_DECL.

38504

+

38505

+ PR c++/59097

38506

+ * decl.c (compute_array_index_type): Don't call

38507

+ maybe_constant_value for a non-integral expression.

38508

+

38509

+ PR c++/58965

38510

+ * mangle.c (write_guarded_var_name): Handle null DECL_NAME.

38511

+

38512

+2014-01-24 Paolo Carlini <paolo.carlini@oracle.com>

38513

+

38514

+ PR c++/57524

38515

+ * name-lookup.c (push_using_directive): Use timevar_cond_start.

38516

+

38517

+2014-01-23 Jakub Jelinek <jakub@redhat.com>

38518

+

38519

+ PR middle-end/58809

38520

+ * semantics.c (finish_omp_clauses): Reject MIN_EXPR, MAX_EXPR,

38521

+ BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR on COMPLEX_TYPEs.

38522

+

38523

+2014-01-20 Marek Polacek <polacek@redhat.com>

38524

+

38525

+ Backported from mainline

38526

+ 2014-01-17 Marek Polacek <polacek@redhat.com>

38527

+

38528

+ PR c++/59838

38529

+ * cvt.c (ocp_convert): Don't segfault on non-existing

38530

+ ENUM_UNDERLYING_TYPE.

38531

+

38532

+2014-01-10 Paolo Carlini <paolo.carlini@oracle.com>

38533

+

38534

+ PR c++/56060

38535

+ PR c++/59730

38536

+ * pt.c (type_dependent_expression_p): Handle EXPR_PACK_EXPANSION.

38537

+

38538

+2013-12-12 Jason Merrill <jason@redhat.com>

38539

+

38540

+ PR c++/58954

38541

+ * pt.c (resolve_overloaded_unification): Discard access checks.

38542

+

38543

+2013-12-05 Jason Merrill <jason@redhat.com>

38544

+

38545

+ PR c++/59044

38546

+ PR c++/59052

38547

+ * pt.c (most_specialized_class): Use the partially instantiated

38548

+ template for deduction. Drop the TMPL parameter.

38549

+

38550

+2013-12-04 Jakub Jelinek <jakub@redhat.com>

38551

+

38552

+ PR c++/59268

38553

+ * pt.c (tsubst_copy_and_build): Handle POINTER_PLUS_EXPR.

38554

+

38555

+2013-11-27 Tom de Vries <tom@codesourcery.com>

38556

+ Marc Glisse <marc.glisse@inria.fr>

38557

+

38558

+ PR c++/59032

38559

+ * typeck.c (cp_build_unary_op): Allow vector increment and decrement.

38560

+

38561

+2013-11-27 Tom de Vries <tom@codesourcery.com>

38562

+ Marc Glisse <marc.glisse@inria.fr>

38563

+

38564

+ PR middle-end/59037

38565

+ * semantics.c (cxx_fold_indirect_ref): Don't create out-of-bounds

38566

+ BIT_FIELD_REF.

38567

+

38568

+2013-11-28 Jakub Jelinek <jakub@redhat.com>

38569

+

38570

+ PR c++/59297

38571

+ * semantics.c (finish_omp_atomic): Call finish_expr_stmt

38572

+ rather than add_stmt.

38573

+

38574

+2013-11-23 Easwaran Raman <eraman@google.com>

38575

+

38576

+ PR c++/59031

38577

+ * call.c (build_new_method_call_1): Comnpare function context

38578

+ with BASELINK_BINFO type rather than instance type before

38579

+ marking the call with LOOKUP_NONVIRTUAL.

38580

+

38581

+2013-10-31 Jason Merrill <jason@redhat.com>

38582

+

38583

+ PR c++/58162

38584

+ * parser.c (cp_parser_late_parse_one_default_arg): Set

38585

+ TARGET_EXPR_DIRECT_INIT_P.

38586

+

38587

+2013-11-11 Paolo Carlini <paolo.carlini@oracle.com>

38588

+

38589

+ * cvt.c (cp_convert_to_pointer): Call build_ptrmemfunc before

38590

+ maybe_warn_zero_as_null_pointer_constant to avoid duplicate

38591

+ -Wzero-as-null-pointer-constant diagnostics.

38592

+

38593

+ * typeck.c (build_ptrmemfunc): Use cp_build_c_cast.

38594

+

38595

+2013-10-25 Tom de Vries <tom@codesourcery.com>

38596

+

38597

+ PR c++/58282

38598

+ * except.c (build_must_not_throw_expr): Handle

38599

+ flag_exceptions.

38600

+

38601

+2013-10-17 Paolo Carlini <paolo.carlini@oracle.com>

38602

+

38603

+ PR c++/58596

38604

+ * semantics.c (lambda_expr_this_capture): Handle NSDMIs in the

38605

+ cp_unevaluated_operand case.

38606

+

38607

+2013-10-16 Paolo Carlini <paolo.carlini@oracle.com>

38608

+

38609

+ PR c++/58633

38610

+ * parser.c (cp_parser_pseudo_destructor_name): Revert r174385 changes.

38611

+

38612

+2013-10-16 Jason Merrill <jason@redhat.com>

38613

+

38614

+ PR c++/57850

38615

+ * decl2.c (dump_tu): Split out from...

38616

+ (cp_write_global_declarations): ...here. Call it in PCH mode.

38617

+

38618

2013-10-16 Release Manager

38619

38620

* GCC 4.8.2 released.

38621

Index: gcc/cp/typeck2.c

38622

===================================================================

38623

--- a/src/gcc/cp/typeck2.c (.../tags/gcc_4_8_2_release)

38624

+++ b/src/gcc/cp/typeck2.c (.../branches/gcc-4_8-branch)

38625

@@ -1015,6 +1015,7 @@

38626

#define PICFLAG_ERRONEOUS 1

38627

#define PICFLAG_NOT_ALL_CONSTANT 2

38628

#define PICFLAG_NOT_ALL_SIMPLE 4

38629

+#define PICFLAG_SIDE_EFFECTS 8

38630

38631

/* Given an initializer INIT, return the flag (PICFLAG_*) which better

38632

describe it. */

38633

@@ -1025,7 +1026,12 @@

38634

if (init == error_mark_node)

38635

return PICFLAG_ERRONEOUS;

38636

else if (!TREE_CONSTANT (init))

38637

- return PICFLAG_NOT_ALL_CONSTANT;

38638

+ {

38639

+ if (TREE_SIDE_EFFECTS (init))

38640

+ return PICFLAG_SIDE_EFFECTS;

38641

+ else

38642

+ return PICFLAG_NOT_ALL_CONSTANT;

38643

+ }

38644

else if (!initializer_constant_valid_p (init, TREE_TYPE (init)))

38645

return PICFLAG_NOT_ALL_SIMPLE;

38646

return 0;

38647

@@ -1392,7 +1398,12 @@

38648

TREE_TYPE (init) = type;

38649

if (TREE_CODE (type) == ARRAY_TYPE && TYPE_DOMAIN (type) == NULL_TREE)

38650

cp_complete_array_type (&TREE_TYPE (init), init, /*do_default=*/0);

38651

- if (flags & PICFLAG_NOT_ALL_CONSTANT)

38652

+ if (flags & PICFLAG_SIDE_EFFECTS)

38653

+ {

38654

+ TREE_CONSTANT (init) = false;

38655

+ TREE_SIDE_EFFECTS (init) = true;

38656

+ }

38657

+ else if (flags & PICFLAG_NOT_ALL_CONSTANT)

38658

/* Make sure TREE_CONSTANT isn't set from build_constructor. */

38659

TREE_CONSTANT (init) = false;

38660

else

38661

Index: gcc/cp/pt.c

38662

===================================================================

38663

--- a/src/gcc/cp/pt.c (.../tags/gcc_4_8_2_release)

38664

+++ b/src/gcc/cp/pt.c (.../branches/gcc-4_8-branch)

38665

@@ -170,7 +170,7 @@

38666

static tree tsubst_template_args (tree, tree, tsubst_flags_t, tree);

38667

static tree tsubst_template_parms (tree, tree, tsubst_flags_t);

38668

static void regenerate_decl_from_template (tree, tree);

38669

-static tree most_specialized_class (tree, tree, tsubst_flags_t);

38670

+static tree most_specialized_class (tree, tsubst_flags_t);

38671

static tree tsubst_aggr_type (tree, tree, tsubst_flags_t, tree, int);

38672

static tree tsubst_arg_types (tree, tree, tree, tsubst_flags_t, tree);

38673

static tree tsubst_function_type (tree, tree, tsubst_flags_t, tree);

38674

@@ -1419,6 +1419,8 @@

38675

= DECL_DECLARED_INLINE_P (fn);

38676

DECL_SOURCE_LOCATION (clone)

38677

= DECL_SOURCE_LOCATION (fn);

38678

+ DECL_DELETED_FN (clone)

38679

+ = DECL_DELETED_FN (fn);

38680

}

38681

check_specialization_namespace (tmpl);

38682

38683

@@ -3436,7 +3438,7 @@

38684

for (i = 0; i < num_packed; ++i, ++out_arg)

38685

TREE_VEC_ELT (result_args, out_arg) = TREE_VEC_ELT(packed, i);

38686

if (non_default_args_count > 0)

38687

- non_default_args_count += num_packed;

38688

+ non_default_args_count += num_packed - 1;

38689

}

38690

else

38691

{

38692

@@ -3491,6 +3493,11 @@

38693

|| TEMPLATE_PARMS_FOR_INLINE (current_template_parms))

38694

return true;

38695

38696

+ /* Don't complain about the injected class name, as we've already

38697

+ complained about the class itself. */

38698

+ if (DECL_SELF_REFERENCE_P (decl))

38699

+ return false;

38700

+

38701

error ("declaration of %q+#D", decl);

38702

error (" shadows template parm %q+#D", olddecl);

38703

return false;

38704

@@ -4261,7 +4268,7 @@

38705

if (COMPLETE_TYPE_P (inst_type)

38706

&& CLASSTYPE_IMPLICIT_INSTANTIATION (inst_type))

38707

{

38708

- tree spec = most_specialized_class (inst_type, maintmpl, tf_none);

38709

+ tree spec = most_specialized_class (inst_type, tf_none);

38710

if (spec && TREE_TYPE (spec) == type)

38711

permerror (input_location,

38712

"partial specialization of %qT after instantiation "

38713

@@ -6672,6 +6679,8 @@

38714

/* Store this argument. */

38715

if (arg == error_mark_node)

38716

lost++;

38717

+ if (lost)

38718

+ break;

38719

TREE_VEC_ELT (new_inner_args, parm_idx) = arg;

38720

38721

/* We are done with all of the arguments. */

38722

@@ -8572,7 +8581,7 @@

38723

38724

/* Determine what specialization of the original template to

38725

instantiate. */

38726

- t = most_specialized_class (type, templ, tf_warning_or_error);

38727

+ t = most_specialized_class (type, tf_warning_or_error);

38728

if (t == error_mark_node)

38729

{

38730

TYPE_BEING_DEFINED (type) = 1;

38731

@@ -12694,27 +12703,43 @@

38732

tsubst_expr ((NODE), args, complain, in_decl, \

38733

integral_constant_expression_p)

38734

tree decl, init, cond, incr;

38735

- bool init_decl;

38736

38737

init = TREE_VEC_ELT (OMP_FOR_INIT (t), i);

38738

gcc_assert (TREE_CODE (init) == MODIFY_EXPR);

38739

decl = TREE_OPERAND (init, 0);

38740

init = TREE_OPERAND (init, 1);

38741

- /* Do this before substituting into decl to handle 'auto'. */

38742

- init_decl = (init && TREE_CODE (init) == DECL_EXPR);

38743

- init = RECUR (init);

38744

- decl = RECUR (decl);

38745

- if (init_decl)

38746

+ tree decl_expr = NULL_TREE;

38747

+ if (init && TREE_CODE (init) == DECL_EXPR)

38748

{

38749

- gcc_assert (!processing_template_decl);

38750

- init = DECL_INITIAL (decl);

38751

- DECL_INITIAL (decl) = NULL_TREE;

38752

+ /* We need to jump through some hoops to handle declarations in the

38753

+ for-init-statement, since we might need to handle auto deduction,

38754

+ but we need to keep control of initialization. */

38755

+ decl_expr = init;

38756

+ init = DECL_INITIAL (DECL_EXPR_DECL (init));

38757

+ decl = tsubst_decl (decl, args, complain);

38758

}

38759

+ else

38760

+ decl = RECUR (decl);

38761

+ init = RECUR (init);

38762

38763

+ tree auto_node = type_uses_auto (TREE_TYPE (decl));

38764

+ if (auto_node && init)

38765

+ TREE_TYPE (decl)

38766

+ = do_auto_deduction (TREE_TYPE (decl), init, auto_node);

38767

+

38768

gcc_assert (!type_dependent_expression_p (decl));

38769

38770

if (!CLASS_TYPE_P (TREE_TYPE (decl)))

38771

{

38772

+ if (decl_expr)

38773

+ {

38774

+ /* Declare the variable, but don't let that initialize it. */

38775

+ tree init_sav = DECL_INITIAL (DECL_EXPR_DECL (decl_expr));

38776

+ DECL_INITIAL (DECL_EXPR_DECL (decl_expr)) = NULL_TREE;

38777

+ RECUR (decl_expr);

38778

+ DECL_INITIAL (DECL_EXPR_DECL (decl_expr)) = init_sav;

38779

+ }

38780

+

38781

cond = RECUR (TREE_VEC_ELT (OMP_FOR_COND (t), i));

38782

incr = TREE_VEC_ELT (OMP_FOR_INCR (t), i);

38783

if (TREE_CODE (incr) == MODIFY_EXPR)

38784

@@ -12731,8 +12756,14 @@

38785

return;

38786

}

38787

38788

- if (init && !init_decl)

38789

+ if (decl_expr)

38790

{

38791

+ /* Declare and initialize the variable. */

38792

+ RECUR (decl_expr);

38793

+ init = NULL_TREE;

38794

+ }

38795

+ else if (init)

38796

+ {

38797

tree c;

38798

for (c = *clauses; c ; c = OMP_CLAUSE_CHAIN (c))

38799

{

38800

@@ -13710,6 +13741,10 @@

38801

RETURN (r);

38802

}

38803

38804

+ case POINTER_PLUS_EXPR:

38805

+ return fold_build_pointer_plus (RECUR (TREE_OPERAND (t, 0)),

38806

+ RECUR (TREE_OPERAND (t, 1)));

38807

+

38808

case SCOPE_REF:

38809

RETURN (tsubst_qualified_id (t, args, complain, in_decl, /*done=*/true,

38810

/*address_p=*/false));

38811

@@ -14471,12 +14506,12 @@

38812

38813

case TRAIT_EXPR:

38814

{

38815

- tree type1 = tsubst_copy (TRAIT_EXPR_TYPE1 (t), args,

38816

- complain, in_decl);

38817

+ tree type1 = tsubst (TRAIT_EXPR_TYPE1 (t), args,

38818

+ complain, in_decl);

38819

38820

tree type2 = TRAIT_EXPR_TYPE2 (t);

38821

if (type2)

38822

- type2 = tsubst_copy (type2, args, complain, in_decl);

38823

+ type2 = tsubst (type2, args, complain, in_decl);

38824

38825

RETURN (finish_trait_expr (TRAIT_EXPR_KIND (t), type1, type2));

38826

}

38827

@@ -14778,6 +14813,8 @@

38828

/* Instantiation of the function happens in the context of the function

38829

template, not the context of the overload resolution we're doing. */

38830

push_to_top_level ();

38831

+ struct pointer_map_t *saved_local_specializations = local_specializations;

38832

+ local_specializations = NULL;

38833

/* If there are dependent arguments, e.g. because we're doing partial

38834

ordering, make sure processing_template_decl stays set. */

38835

if (uses_template_parms (targ_ptr))

38836

@@ -14793,6 +14830,7 @@

38837

targ_ptr, complain, gen_tmpl);

38838

if (DECL_CLASS_SCOPE_P (gen_tmpl))

38839

pop_nested_class ();

38840

+ local_specializations = saved_local_specializations;

38841

pop_from_top_level ();

38842

38843

if (fndecl == error_mark_node)

38844

@@ -15192,8 +15230,11 @@

38845

38846

/* If we're looking for an exact match, check that what we got

38847

is indeed an exact match. It might not be if some template

38848

- parameters are used in non-deduced contexts. */

38849

- if (strict == DEDUCE_EXACT)

38850

+ parameters are used in non-deduced contexts. But don't check

38851

+ for an exact match if we have dependent template arguments;

38852

+ in that case we're doing partial ordering, and we already know

38853

+ that we have two candidates that will provide the actual type. */

38854

+ if (strict == DEDUCE_EXACT && !any_dependent_template_arguments_p (targs))

38855

{

38856

tree substed = TREE_TYPE (decl);

38857

unsigned int i;

38858

@@ -15749,7 +15790,7 @@

38859

if (subargs != error_mark_node

38860

&& !any_dependent_template_arguments_p (subargs))

38861

{

38862

- elem = tsubst (TREE_TYPE (fn), subargs, tf_none, NULL_TREE);

38863

+ elem = TREE_TYPE (instantiate_template (fn, subargs, tf_none));

38864

if (try_one_overload (tparms, targs, tempargs, parm,

38865

elem, strict, sub_strict, addr_p, explain_p)

38866

&& (!goodfn || !same_type_p (goodfn, elem)))

38867

@@ -16207,6 +16248,9 @@

38868

tree pattern = PACK_EXPANSION_PATTERN (parm);

38869

tree pack, packs = NULL_TREE;

38870

int i, start = TREE_VEC_LENGTH (packed_parms) - 1;

38871

+

38872

+ packed_args = expand_template_argument_pack (packed_args);

38873

+

38874

int len = TREE_VEC_LENGTH (packed_args);

38875

38876

/* Determine the parameter packs we will be deducing from the

38877

@@ -16574,9 +16618,11 @@

38878

if (TREE_CODE (arg) != BOUND_TEMPLATE_TEMPLATE_PARM

38879

&& !CLASSTYPE_SPECIALIZATION_OF_PRIMARY_TEMPLATE_P (arg))

38880

return unify_template_deduction_failure (explain_p, parm, arg);

38881

-

38882

{

38883

tree parmvec = TYPE_TI_ARGS (parm);

38884

+ /* An alias template name is never deduced. */

38885

+ if (TYPE_ALIAS_P (arg))

38886

+ arg = strip_typedefs (arg);

38887

tree argvec = INNERMOST_TEMPLATE_ARGS (TYPE_TI_ARGS (arg));

38888

tree full_argvec = add_to_template_args (targs, argvec);

38889

tree parm_parms

38890

@@ -17553,7 +17599,7 @@

38891

return -1;

38892

}

38893

38894

-/* Determine which of two partial specializations of MAIN_TMPL is more

38895

+/* Determine which of two partial specializations of TMPL is more

38896

specialized.

38897

38898

PAT1 is a TREE_LIST whose TREE_TYPE is the _TYPE node corresponding

38899

@@ -17569,7 +17615,7 @@

38900

two templates is more specialized. */

38901

38902

static int

38903

-more_specialized_class (tree main_tmpl, tree pat1, tree pat2)

38904

+more_specialized_class (tree tmpl, tree pat1, tree pat2)

38905

{

38906

tree targs;

38907

tree tmpl1, tmpl2;

38908

@@ -17584,7 +17630,7 @@

38909

types in the arguments, and we need our dependency check functions

38910

to behave correctly. */

38911

++processing_template_decl;

38912

- targs = get_class_bindings (main_tmpl, TREE_VALUE (pat1),

38913

+ targs = get_class_bindings (tmpl, TREE_VALUE (pat1),

38914

CLASSTYPE_TI_ARGS (tmpl1),

38915

CLASSTYPE_TI_ARGS (tmpl2));

38916

if (targs)

38917

@@ -17593,7 +17639,7 @@

38918

any_deductions = true;

38919

}

38920

38921

- targs = get_class_bindings (main_tmpl, TREE_VALUE (pat2),

38922

+ targs = get_class_bindings (tmpl, TREE_VALUE (pat2),

38923

CLASSTYPE_TI_ARGS (tmpl2),

38924

CLASSTYPE_TI_ARGS (tmpl1));

38925

if (targs)

38926

@@ -17673,7 +17719,7 @@

38927

}

38928

38929

/* Return the innermost template arguments that, when applied to a partial

38930

- specialization of MAIN_TMPL whose innermost template parameters are

38931

+ specialization of TMPL whose innermost template parameters are

38932

TPARMS, and whose specialization arguments are SPEC_ARGS, yield the

38933

ARGS.

38934

38935

@@ -17688,7 +17734,7 @@

38936

is bound to `double'. */

38937

38938

static tree

38939

-get_class_bindings (tree main_tmpl, tree tparms, tree spec_args, tree args)

38940

+get_class_bindings (tree tmpl, tree tparms, tree spec_args, tree args)

38941

{

38942

int i, ntparms = TREE_VEC_LENGTH (tparms);

38943

tree deduced_args;

38944

@@ -17728,8 +17774,8 @@

38945

`T' is `A' but unify () does not check whether `typename T::X'

38946

is `int'. */

38947

spec_args = tsubst (spec_args, deduced_args, tf_none, NULL_TREE);

38948

- spec_args = coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (main_tmpl),

38949

- spec_args, main_tmpl,

38950

+ spec_args = coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (tmpl),

38951

+ spec_args, tmpl,

38952

tf_none, false, false);

38953

if (spec_args == error_mark_node

38954

/* We only need to check the innermost arguments; the other

38955

@@ -17877,8 +17923,8 @@

38956

}

38957

38958

/* Return the most specialized of the class template partial

38959

- specializations of TMPL which can produce TYPE, a specialization of

38960

- TMPL. The value returned is actually a TREE_LIST; the TREE_TYPE is

38961

+ specializations which can produce TYPE, a specialization of some class

38962

+ template. The value returned is actually a TREE_LIST; the TREE_TYPE is

38963

a _TYPE node corresponding to the partial specialization, while the

38964

TREE_PURPOSE is the set of template arguments that must be

38965

substituted into the TREE_TYPE in order to generate TYPE.

38966

@@ -17885,11 +17931,11 @@

38967

38968

If the choice of partial specialization is ambiguous, a diagnostic

38969

is issued, and the error_mark_node is returned. If there are no

38970

- partial specializations of TMPL matching TYPE, then NULL_TREE is

38971

- returned. */

38972

+ partial specializations matching TYPE, then NULL_TREE is

38973

+ returned, indicating that the primary template should be used. */

38974

38975

static tree

38976

-most_specialized_class (tree type, tree tmpl, tsubst_flags_t complain)

38977

+most_specialized_class (tree type, tsubst_flags_t complain)

38978

{

38979

tree list = NULL_TREE;

38980

tree t;

38981

@@ -17896,11 +17942,11 @@

38982

tree champ;

38983

int fate;

38984

bool ambiguous_p;

38985

- tree args;

38986

tree outer_args = NULL_TREE;

38987

38988

- tmpl = most_general_template (tmpl);

38989

- args = CLASSTYPE_TI_ARGS (type);

38990

+ tree tmpl = CLASSTYPE_TI_TEMPLATE (type);

38991

+ tree main_tmpl = most_general_template (tmpl);

38992

+ tree args = CLASSTYPE_TI_ARGS (type);

38993

38994

/* For determining which partial specialization to use, only the

38995

innermost args are interesting. */

38996

@@ -17910,7 +17956,7 @@

38997

args = INNERMOST_TEMPLATE_ARGS (args);

38998

}

38999

39000

- for (t = DECL_TEMPLATE_SPECIALIZATIONS (tmpl); t; t = TREE_CHAIN (t))

39001

+ for (t = DECL_TEMPLATE_SPECIALIZATIONS (main_tmpl); t; t = TREE_CHAIN (t))

39002

{

39003

tree partial_spec_args;

39004

tree spec_args;

39005

@@ -17944,8 +17990,7 @@

39006

39007

partial_spec_args =

39008

coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (tmpl),

39009

- add_to_template_args (outer_args,

39010

- partial_spec_args),

39011

+ partial_spec_args,

39012

tmpl, tf_none,

39013

/*require_all_args=*/true,

39014

/*use_default_args=*/true);

39015

@@ -18553,6 +18598,10 @@

39016

{

39017

tree fntype, spec, noex, clone;

39018

39019

+ /* Don't instantiate a noexcept-specification from template context. */

39020

+ if (processing_template_decl)

39021

+ return;

39022

+

39023

if (DECL_CLONED_FUNCTION_P (fn))

39024

fn = DECL_CLONED_FUNCTION (fn);

39025

fntype = TREE_TYPE (fn);

39026

@@ -19955,6 +20004,10 @@

39027

if (TREE_CODE (expression) == SCOPE_REF)

39028

return false;

39029

39030

+ /* Always dependent, on the number of arguments if nothing else. */

39031

+ if (TREE_CODE (expression) == EXPR_PACK_EXPANSION)

39032

+ return true;

39033

+

39034

if (BASELINK_P (expression))

39035

expression = BASELINK_FUNCTIONS (expression);

39036

39037

Index: gcc/cp/semantics.c

39038

===================================================================

39039

--- a/src/gcc/cp/semantics.c (.../tags/gcc_4_8_2_release)

39040

+++ b/src/gcc/cp/semantics.c (.../branches/gcc-4_8-branch)

39041

@@ -2501,7 +2501,8 @@

39042

tree decl;

39043

39044

decl = fname_decl (input_location, C_RID_CODE (id), id);

39045

- if (processing_template_decl && current_function_decl)

39046

+ if (processing_template_decl && current_function_decl

39047

+ && decl != error_mark_node)

39048

decl = DECL_NAME (decl);

39049

return decl;

39050

}

39051

@@ -3853,7 +3854,7 @@

39052

linkage of all functions, and as that causes writes to

39053

the data mapped in from the PCH file, it's advantageous

39054

to mark the functions at this point. */

39055

- if (!DECL_IMPLICIT_INSTANTIATION (fn))

39056

+ if (!DECL_IMPLICIT_INSTANTIATION (fn) || DECL_DEFAULTED_FN (fn))

39057

{

39058

/* This function must have external linkage, as

39059

otherwise DECL_INTERFACE_KNOWN would have been

39060

@@ -4291,7 +4292,8 @@

39061

error ("%qE has invalid type for %<reduction%>", t);

39062

remove = true;

39063

}

39064

- else if (FLOAT_TYPE_P (TREE_TYPE (t)))

39065

+ else if (FLOAT_TYPE_P (TREE_TYPE (t))

39066

+ || TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

39067

{

39068

enum tree_code r_code = OMP_CLAUSE_REDUCTION_CODE (c);

39069

switch (r_code)

39070

@@ -4299,10 +4301,26 @@

39071

case PLUS_EXPR:

39072

case MULT_EXPR:

39073

case MINUS_EXPR:

39074

+ break;

39075

case MIN_EXPR:

39076

case MAX_EXPR:

39077

+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)

39078

+ r_code = ERROR_MARK;

39079

break;

39080

+ case BIT_AND_EXPR:

39081

+ case BIT_XOR_EXPR:

39082

+ case BIT_IOR_EXPR:

39083

default:

39084

+ r_code = ERROR_MARK;

39085

+ break;

39086

+ case TRUTH_ANDIF_EXPR:

39087

+ case TRUTH_ORIF_EXPR:

39088

+ if (FLOAT_TYPE_P (TREE_TYPE (t)))

39089

+ r_code = ERROR_MARK;

39090

+ break;

39091

+ }

39092

+ if (r_code == ERROR_MARK)

39093

+ {

39094

error ("%qE has invalid type for %<reduction(%s)%>",

39095

t, operator_name_info[r_code].name);

39096

remove = true;

39097

@@ -5059,7 +5077,7 @@

39098

}

39099

stmt = build2 (OMP_ATOMIC, void_type_node, integer_zero_node, stmt);

39100

}

39101

- add_stmt (stmt);

39102

+ finish_expr_stmt (stmt);

39103

}

39104

39105

void

39106

@@ -7543,7 +7561,7 @@

39107

unsigned HOST_WIDE_INT indexi = offset * BITS_PER_UNIT;

39108

tree index = bitsize_int (indexi);

39109

39110

- if (offset/part_widthi <= TYPE_VECTOR_SUBPARTS (op00type))

39111

+ if (offset / part_widthi < TYPE_VECTOR_SUBPARTS (op00type))

39112

return fold_build3_loc (loc,

39113

BIT_FIELD_REF, type, op00,

39114

part_width, index);

39115

@@ -9481,7 +9499,14 @@

39116

/* In unevaluated context this isn't an odr-use, so just return the

39117

nearest 'this'. */

39118

if (cp_unevaluated_operand)

39119

- return lookup_name (this_identifier);

39120

+ {

39121

+ /* In an NSDMI the fake 'this' pointer that we're using for

39122

+ parsing is in scope_chain. */

39123

+ if (LAMBDA_EXPR_EXTRA_SCOPE (lambda)

39124

+ && TREE_CODE (LAMBDA_EXPR_EXTRA_SCOPE (lambda)) == FIELD_DECL)

39125

+ return scope_chain->x_current_class_ptr;

39126

+ return lookup_name (this_identifier);

39127

+ }

39128

39129

/* Try to default capture 'this' if we can. */

39130

if (!this_capture

39131

Index: gcc/cp/decl2.c

39132

===================================================================

39133

--- a/src/gcc/cp/decl2.c (.../tags/gcc_4_8_2_release)

39134

+++ b/src/gcc/cp/decl2.c (.../branches/gcc-4_8-branch)

39135

@@ -2884,7 +2884,7 @@

39136

TREE_PUBLIC (fn) = TREE_PUBLIC (var);

39137

DECL_ARTIFICIAL (fn) = true;

39138

DECL_COMDAT (fn) = DECL_COMDAT (var);

39139

- DECL_EXTERNAL (fn) = true;

39140

+ DECL_EXTERNAL (fn) = DECL_EXTERNAL (var);

39141

if (DECL_ONE_ONLY (var))

39142

make_decl_one_only (fn, cxx_comdat_group (fn));

39143

if (TREE_PUBLIC (var))

39144

@@ -3946,6 +3946,8 @@

39145

if (TREE_PUBLIC (var))

39146

{

39147

tree single_init_fn = get_tls_init_fn (var);

39148

+ if (single_init_fn == NULL_TREE)

39149

+ continue;

39150

cgraph_node *alias

39151

= cgraph_same_body_alias (cgraph_get_create_node (fn),

39152

single_init_fn, fn);

39153

@@ -3960,6 +3962,22 @@

39154

expand_or_defer_fn (finish_function (0));

39155

}

39156

39157

+/* The entire file is now complete. If requested, dump everything

39158

+ to a file. */

39159

+

39160

+static void

39161

+dump_tu (void)

39162

+{

39163

+ int flags;

39164

+ FILE *stream = dump_begin (TDI_tu, &flags);

39165

+

39166

+ if (stream)

39167

+ {

39168

+ dump_node (global_namespace, flags & ~TDF_SLIM, stream);

39169

+ dump_end (TDI_tu, stream);

39170

+ }

39171

+}

39172

+

39173

/* This routine is called at the end of compilation.

39174

Its job is to create all the code needed to initialize and

39175

destroy the global aggregates. We do the destruction

39176

@@ -3990,6 +4008,7 @@

39177

if (pch_file)

39178

{

39179

c_common_write_pch ();

39180

+ dump_tu ();

39181

return;

39182

}

39183

39184

@@ -4359,17 +4378,8 @@

39185

39186

/* The entire file is now complete. If requested, dump everything

39187

to a file. */

39188

- {

39189

- int flags;

39190

- FILE *stream = dump_begin (TDI_tu, &flags);

39191

+ dump_tu ();

39192

39193

- if (stream)

39194

- {

39195

- dump_node (global_namespace, flags & ~TDF_SLIM, stream);

39196

- dump_end (TDI_tu, stream);

39197

- }

39198

- }

39199

-

39200

if (flag_detailed_statistics)

39201

{

39202

dump_tree_statistics ();

39203

Index: gcc/cp/parser.c

39204

===================================================================

39205

--- a/src/gcc/cp/parser.c (.../tags/gcc_4_8_2_release)

39206

+++ b/src/gcc/cp/parser.c (.../branches/gcc-4_8-branch)

39207

@@ -6421,10 +6421,6 @@

39208

/* Look for the `~'. */

39209

cp_parser_require (parser, CPP_COMPL, RT_COMPL);

39210

39211

- /* Once we see the ~, this has to be a pseudo-destructor. */

39212

- if (!processing_template_decl && !cp_parser_error_occurred (parser))

39213

- cp_parser_commit_to_tentative_parse (parser);

39214

-

39215

/* Look for the type-name again. We are not responsible for

39216

checking that it matches the first type-name. */

39217

*type = cp_parser_nonclass_name (parser);

39218

@@ -14168,25 +14164,7 @@

39219

/* Look up the type-name. */

39220

type_decl = cp_parser_lookup_name_simple (parser, identifier, token->location);

39221

39222

- if (TREE_CODE (type_decl) == USING_DECL)

39223

- {

39224

- if (!DECL_DEPENDENT_P (type_decl))

39225

- type_decl = strip_using_decl (type_decl);

39226

- else if (USING_DECL_TYPENAME_P (type_decl))

39227

- {

39228

- /* We have found a type introduced by a using

39229

- declaration at class scope that refers to a dependent

39230

- type.

39231

-

39232

- using typename :: [opt] nested-name-specifier unqualified-id ;

39233

- */

39234

- type_decl = make_typename_type (TREE_TYPE (type_decl),

39235

- DECL_NAME (type_decl),

39236

- typename_type, tf_error);

39237

- if (type_decl != error_mark_node)

39238

- type_decl = TYPE_NAME (type_decl);

39239

- }

39240

- }

39241

+ type_decl = strip_using_decl (type_decl);

39242

39243

if (TREE_CODE (type_decl) != TYPE_DECL

39244

&& (objc_is_id (identifier) || objc_is_class_name (identifier)))

39245

@@ -14742,7 +14720,8 @@

39246

{

39247

underlying_type = grokdeclarator (NULL, &type_specifiers, TYPENAME,

39248

/*initialized=*/0, NULL);

39249

- if (underlying_type == error_mark_node)

39250

+ if (underlying_type == error_mark_node

39251

+ || check_for_bare_parameter_packs (underlying_type))

39252

underlying_type = NULL_TREE;

39253

}

39254

}

39255

@@ -22209,6 +22188,9 @@

39256

tree cast;

39257

bool nonconst_p;

39258

39259

+ if (!type)

39260

+ type = error_mark_node;

39261

+

39262

if (cp_lexer_next_token_is (parser->lexer, CPP_OPEN_BRACE))

39263

{

39264

maybe_warn_cpp0x (CPP0X_INITIALIZER_LISTS);

39265

@@ -22576,6 +22558,9 @@

39266

&& CONSTRUCTOR_IS_DIRECT_INIT (parsed_arg))

39267

flags = LOOKUP_NORMAL;

39268

parsed_arg = digest_init_flags (TREE_TYPE (decl), parsed_arg, flags);

39269

+ if (TREE_CODE (parsed_arg) == TARGET_EXPR)

39270

+ /* This represents the whole initialization. */

39271

+ TARGET_EXPR_DIRECT_INIT_P (parsed_arg) = true;

39272

}

39273

}

39274

39275

Index: gcc/cp/call.c

39276

===================================================================

39277

--- a/src/gcc/cp/call.c (.../tags/gcc_4_8_2_release)

39278

+++ b/src/gcc/cp/call.c (.../branches/gcc-4_8-branch)

39279

@@ -892,6 +892,9 @@

39280

39281

if (i < CONSTRUCTOR_NELTS (ctor))

39282

val = CONSTRUCTOR_ELT (ctor, i)->value;

39283

+ else if (TREE_CODE (ftype) == REFERENCE_TYPE)

39284

+ /* Value-initialization of reference is ill-formed. */

39285

+ return NULL;

39286

else

39287

{

39288

if (empty_ctor == NULL_TREE)

39289

@@ -940,6 +943,9 @@

39290

bool user = false;

39291

enum conversion_rank rank = cr_exact;

39292

39293

+ /* We might need to propagate the size from the element to the array. */

39294

+ complete_type (type);

39295

+

39296

if (TYPE_DOMAIN (type))

39297

{

39298

unsigned HOST_WIDE_INT alen = tree_low_cst (array_type_nelts_top (type), 1);

39299

@@ -5806,9 +5812,11 @@

39300

&& convs->kind != ck_ambig

39301

&& (convs->kind != ck_ref_bind

39302

|| convs->user_conv_p)

39303

- && convs->kind != ck_rvalue

39304

+ && (convs->kind != ck_rvalue

39305

+ || SCALAR_TYPE_P (totype))

39306

&& convs->kind != ck_base)

39307

{

39308

+ bool complained = false;

39309

conversion *t = convs;

39310

39311

/* Give a helpful error if this is bad because of excess braces. */

39312

@@ -5816,7 +5824,14 @@

39313

&& SCALAR_TYPE_P (totype)

39314

&& CONSTRUCTOR_NELTS (expr) > 0

39315

&& BRACE_ENCLOSED_INITIALIZER_P (CONSTRUCTOR_ELT (expr, 0)->value))

39316

- permerror (loc, "too many braces around initializer for %qT", totype);

39317

+ {

39318

+ complained = true;

39319

+ permerror (loc, "too many braces around initializer "

39320

+ "for %qT", totype);

39321

+ while (BRACE_ENCLOSED_INITIALIZER_P (expr)

39322

+ && CONSTRUCTOR_NELTS (expr) == 1)

39323

+ expr = CONSTRUCTOR_ELT (expr, 0)->value;

39324

+ }

39325

39326

for (; t ; t = next_conversion (t))

39327

{

39328

@@ -5853,8 +5868,9 @@

39329

break;

39330

}

39331

39332

- permerror (loc, "invalid conversion from %qT to %qT",

39333

- TREE_TYPE (expr), totype);

39334

+ if (!complained)

39335

+ permerror (loc, "invalid conversion from %qT to %qT",

39336

+ TREE_TYPE (expr), totype);

39337

if (fn)

39338

permerror (DECL_SOURCE_LOCATION (fn),

39339

" initializing argument %P of %qD", argnum, fn);

39340

@@ -5999,6 +6015,8 @@

39341

to avoid the error about taking the address of a temporary. */

39342

array = cp_build_addr_expr (array, complain);

39343

array = cp_convert (build_pointer_type (elttype), array, complain);

39344

+ if (array == error_mark_node)

39345

+ return error_mark_node;

39346

39347

/* Build up the initializer_list object. */

39348

totype = complete_type (totype);

39349

@@ -6023,8 +6041,11 @@

39350

return fold_if_not_in_template (expr);

39351

}

39352

expr = reshape_init (totype, expr, complain);

39353

- return get_target_expr_sfinae (digest_init (totype, expr, complain),

39354

+ expr = get_target_expr_sfinae (digest_init (totype, expr, complain),

39355

complain);

39356

+ if (expr != error_mark_node)

39357

+ TARGET_EXPR_LIST_INIT_P (expr) = true;

39358

+ return expr;

39359

39360

default:

39361

break;

39362

@@ -6405,20 +6426,10 @@

39363

/* We must make a copy of ARG, in case subsequent processing

39364

alters any part of it. */

39365

arg = break_out_target_exprs (arg);

39366

- if (TREE_CODE (arg) == CONSTRUCTOR)

39367

- {

39368

- arg = digest_init (type, arg, complain);

39369

- arg = convert_for_initialization (0, type, arg, LOOKUP_IMPLICIT,

39370

- ICR_DEFAULT_ARGUMENT, fn, parmnum,

39371

- complain);

39372

- }

39373

- else

39374

- {

39375

- arg = convert_for_initialization (0, type, arg, LOOKUP_IMPLICIT,

39376

- ICR_DEFAULT_ARGUMENT, fn, parmnum,

39377

- complain);

39378

- arg = convert_for_arg_passing (type, arg, complain);

39379

- }

39380

+ arg = convert_for_initialization (0, type, arg, LOOKUP_IMPLICIT,

39381

+ ICR_DEFAULT_ARGUMENT, fn, parmnum,

39382

+ complain);

39383

+ arg = convert_for_arg_passing (type, arg, complain);

39384

pop_deferring_access_checks();

39385

39386

pop_defarg_context ();

39387

@@ -7414,7 +7425,7 @@

39388

struct z_candidate *candidates = 0, *cand;

39389

tree explicit_targs = NULL_TREE;

39390

tree basetype = NULL_TREE;

39391

- tree access_binfo;

39392

+ tree access_binfo, binfo;

39393

tree optype;

39394

tree first_mem_arg = NULL_TREE;

39395

tree instance_ptr;

39396

@@ -7454,6 +7465,7 @@

39397

if (!conversion_path)

39398

conversion_path = BASELINK_BINFO (fns);

39399

access_binfo = BASELINK_ACCESS_BINFO (fns);

39400

+ binfo = BASELINK_BINFO (fns);

39401

optype = BASELINK_OPTYPE (fns);

39402

fns = BASELINK_FUNCTIONS (fns);

39403

if (TREE_CODE (fns) == TEMPLATE_ID_EXPR)

39404

@@ -7697,13 +7709,13 @@

39405

{

39406

/* Optimize away vtable lookup if we know that this

39407

function can't be overridden. We need to check if

39408

- the context and the instance type are the same,

39409

+ the context and the type where we found fn are the same,

39410

actually FN might be defined in a different class

39411

type because of a using-declaration. In this case, we

39412

do not want to perform a non-virtual call. */

39413

if (DECL_VINDEX (fn) && ! (flags & LOOKUP_NONVIRTUAL)

39414

&& same_type_ignoring_top_level_qualifiers_p

39415

- (DECL_CONTEXT (fn), TREE_TYPE (instance))

39416

+ (DECL_CONTEXT (fn), BINFO_TYPE (binfo))

39417

&& resolves_to_fixed_type_p (instance, 0))

39418

flags |= LOOKUP_NONVIRTUAL;

39419

if (explicit_targs)

39420

Index: gcc/cp/cvt.c

39421

===================================================================

39422

--- a/src/gcc/cp/cvt.c (.../tags/gcc_4_8_2_release)

39423

+++ b/src/gcc/cp/cvt.c (.../branches/gcc-4_8-branch)

39424

@@ -203,13 +203,13 @@

39425

39426

if (null_ptr_cst_p (expr))

39427

{

39428

- if (complain & tf_warning)

39429

- maybe_warn_zero_as_null_pointer_constant (expr, loc);

39430

-

39431

if (TYPE_PTRMEMFUNC_P (type))

39432

return build_ptrmemfunc (TYPE_PTRMEMFUNC_FN_TYPE (type), expr, 0,

39433

/*c_cast_p=*/false, complain);

39434

39435

+ if (complain & tf_warning)

39436

+ maybe_warn_zero_as_null_pointer_constant (expr, loc);

39437

+

39438

/* A NULL pointer-to-data-member is represented by -1, not by

39439

zero. */

39440

tree val = (TYPE_PTRDATAMEM_P (type)

39441

@@ -743,6 +743,7 @@

39442

unspecified. */

39443

if ((complain & tf_warning)

39444

&& TREE_CODE (e) == INTEGER_CST

39445

+ && ENUM_UNDERLYING_TYPE (type)

39446

&& !int_fits_type_p (e, ENUM_UNDERLYING_TYPE (type)))

39447

warning_at (loc, OPT_Wconversion,

39448

"the result of the conversion is unspecified because "

39449

Index: gcc/cp/mangle.c

39450

===================================================================

39451

--- a/src/gcc/cp/mangle.c (.../tags/gcc_4_8_2_release)

39452

+++ b/src/gcc/cp/mangle.c (.../branches/gcc-4_8-branch)

39453

@@ -3478,6 +3478,7 @@

39454

39455

if (G.need_abi_warning

39456

/* Don't do this for a fake symbol we aren't going to emit anyway. */

39457

+ && TREE_CODE (decl) != TYPE_DECL

39458

&& !DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P (decl)

39459

&& !DECL_MAYBE_IN_CHARGE_DESTRUCTOR_P (decl))

39460

{

39461

@@ -3773,7 +3774,8 @@

39462

static void

39463

write_guarded_var_name (const tree variable)

39464

{

39465

- if (strncmp (IDENTIFIER_POINTER (DECL_NAME (variable)), "_ZGR", 4) == 0)

39466

+ if (DECL_NAME (variable)

39467

+ && strncmp (IDENTIFIER_POINTER (DECL_NAME (variable)), "_ZGR", 4) == 0)

39468

/* The name of a guard variable for a reference temporary should refer

39469

to the reference, not the temporary. */

39470

write_string (IDENTIFIER_POINTER (DECL_NAME (variable)) + 4);

39471

Index: gcc/cp/cp-tree.h

39472

===================================================================

39473

--- a/src/gcc/cp/cp-tree.h (.../tags/gcc_4_8_2_release)

39474

+++ b/src/gcc/cp/cp-tree.h (.../branches/gcc-4_8-branch)

39475

@@ -344,7 +344,8 @@

39476

/* Returns true iff NODE is a BASELINK. */

39477

#define BASELINK_P(NODE) \

39478

(TREE_CODE (NODE) == BASELINK)

39479

-/* The BINFO indicating the base from which the BASELINK_FUNCTIONS came. */

39480

+/* The BINFO indicating the base in which lookup found the

39481

+ BASELINK_FUNCTIONS. */

39482

#define BASELINK_BINFO(NODE) \

39483

(((struct tree_baselink*) BASELINK_CHECK (NODE))->binfo)

39484

/* The functions referred to by the BASELINK; either a FUNCTION_DECL,

39485

Index: gcc/cp/name-lookup.c

39486

===================================================================

39487

--- a/src/gcc/cp/name-lookup.c (.../tags/gcc_4_8_2_release)

39488

+++ b/src/gcc/cp/name-lookup.c (.../branches/gcc-4_8-branch)

39489

@@ -394,7 +394,8 @@

39490

}

39491

}

39492

39493

-/* Strip non dependent using declarations. */

39494

+/* Strip non dependent using declarations. If DECL is dependent,

39495

+ surreptitiously create a typename_type and return it. */

39496

39497

tree

39498

strip_using_decl (tree decl)

39499

@@ -404,6 +405,23 @@

39500

39501

while (TREE_CODE (decl) == USING_DECL && !DECL_DEPENDENT_P (decl))

39502

decl = USING_DECL_DECLS (decl);

39503

+

39504

+ if (TREE_CODE (decl) == USING_DECL && DECL_DEPENDENT_P (decl)

39505

+ && USING_DECL_TYPENAME_P (decl))

39506

+ {

39507

+ /* We have found a type introduced by a using

39508

+ declaration at class scope that refers to a dependent

39509

+ type.

39510

+

39511

+ using typename :: [opt] nested-name-specifier unqualified-id ;

39512

+ */

39513

+ decl = make_typename_type (TREE_TYPE (decl),

39514

+ DECL_NAME (decl),

39515

+ typename_type, tf_error);

39516

+ if (decl != error_mark_node)

39517

+ decl = TYPE_NAME (decl);

39518

+ }

39519

+

39520

return decl;

39521

}

39522

39523

@@ -5605,9 +5623,9 @@

39524

push_using_directive (tree used)

39525

{

39526

tree ret;

39527

- timevar_start (TV_NAME_LOOKUP);

39528

+ bool subtime = timevar_cond_start (TV_NAME_LOOKUP);

39529

ret = push_using_directive_1 (used);

39530

- timevar_stop (TV_NAME_LOOKUP);

39531

+ timevar_cond_stop (TV_NAME_LOOKUP, subtime);

39532

return ret;

39533

}

39534

39535

Index: gcc/builtins.def

39536

===================================================================

39537

--- a/src/gcc/builtins.def (.../tags/gcc_4_8_2_release)

39538

+++ b/src/gcc/builtins.def (.../branches/gcc-4_8-branch)

39539

@@ -252,6 +252,9 @@

39540

DEF_LIB_BUILTIN (BUILT_IN_FABS, "fabs", BT_FN_DOUBLE_DOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)

39541

DEF_C99_C90RES_BUILTIN (BUILT_IN_FABSF, "fabsf", BT_FN_FLOAT_FLOAT, ATTR_CONST_NOTHROW_LEAF_LIST)

39542

DEF_C99_C90RES_BUILTIN (BUILT_IN_FABSL, "fabsl", BT_FN_LONGDOUBLE_LONGDOUBLE, ATTR_CONST_NOTHROW_LEAF_LIST)

39543

+DEF_GCC_BUILTIN (BUILT_IN_FABSD32, "fabsd32", BT_FN_DFLOAT32_DFLOAT32, ATTR_CONST_NOTHROW_LEAF_LIST)

39544

+DEF_GCC_BUILTIN (BUILT_IN_FABSD64, "fabsd64", BT_FN_DFLOAT64_DFLOAT64, ATTR_CONST_NOTHROW_LEAF_LIST)

39545

+DEF_GCC_BUILTIN (BUILT_IN_FABSD128, "fabsd128", BT_FN_DFLOAT128_DFLOAT128, ATTR_CONST_NOTHROW_LEAF_LIST)

39546

DEF_C99_BUILTIN (BUILT_IN_FDIM, "fdim", BT_FN_DOUBLE_DOUBLE_DOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)

39547

DEF_C99_BUILTIN (BUILT_IN_FDIMF, "fdimf", BT_FN_FLOAT_FLOAT_FLOAT, ATTR_MATHFN_FPROUNDING_ERRNO)

39548

DEF_C99_BUILTIN (BUILT_IN_FDIML, "fdiml", BT_FN_LONGDOUBLE_LONGDOUBLE_LONGDOUBLE, ATTR_MATHFN_FPROUNDING_ERRNO)

39549

Index: gcc/tree-ssa-loop-ivopts.c

39550

===================================================================

39551

--- a/src/gcc/tree-ssa-loop-ivopts.c (.../tags/gcc_4_8_2_release)

39552

+++ b/src/gcc/tree-ssa-loop-ivopts.c (.../branches/gcc-4_8-branch)

39553

@@ -4236,8 +4236,10 @@

39554

tree steptype = type;

39555

if (POINTER_TYPE_P (type))

39556

steptype = sizetype;

39557

+ steptype = unsigned_type_for (type);

39558

39559

- tree_to_aff_combination (iv->step, steptype, &step);

39560

+ tree_to_aff_combination (iv->step, TREE_TYPE (iv->step), &step);

39561

+ aff_combination_convert (&step, steptype);

39562

tree_to_aff_combination (niter, TREE_TYPE (niter), &nit);

39563

aff_combination_convert (&nit, steptype);

39564

aff_combination_mult (&nit, &step, &delta);

39565

@@ -4245,6 +4247,8 @@

39566

aff_combination_add (&delta, &step);

39567

39568

tree_to_aff_combination (iv->base, type, val);

39569

+ if (!POINTER_TYPE_P (type))

39570

+ aff_combination_convert (val, steptype);

39571

aff_combination_add (val, &delta);

39572

}

39573

39574

@@ -4623,7 +4627,8 @@

39575

39576

cand_value_at (loop, cand, use->stmt, desc->niter, &bnd);

39577

39578

- *bound = aff_combination_to_tree (&bnd);

39579

+ *bound = fold_convert (TREE_TYPE (cand->iv->base),

39580

+ aff_combination_to_tree (&bnd));

39581

*comp = iv_elimination_compare (data, use);

39582

39583

/* It is unlikely that computing the number of iterations using division

39584

Index: gcc/mode-switching.c

39585

===================================================================

39586

--- a/src/gcc/mode-switching.c (.../tags/gcc_4_8_2_release)

39587

+++ b/src/gcc/mode-switching.c (.../branches/gcc-4_8-branch)

39588

@@ -568,12 +568,15 @@

39589

39590

info[bb->index].computing = last_mode;

39591

/* Check for blocks without ANY mode requirements.

39592

- N.B. because of MODE_AFTER, last_mode might still be different

39593

- from no_mode. */

39594

+ N.B. because of MODE_AFTER, last_mode might still

39595

+ be different from no_mode, in which case we need to

39596

+ mark the block as nontransparent. */

39597

if (!any_set_required)

39598

{

39599

ptr = new_seginfo (no_mode, BB_END (bb), bb->index, live_now);

39600

add_seginfo (info + bb->index, ptr);

39601

+ if (last_mode != no_mode)

39602

+ bitmap_clear_bit (transp[bb->index], j);

39603

}

39604

}

39605

#if defined (MODE_ENTRY) && defined (MODE_EXIT)

39606

Index: gcc/ipa-pure-const.c

39607

===================================================================

39608

--- a/src/gcc/ipa-pure-const.c (.../tags/gcc_4_8_2_release)

39609

+++ b/src/gcc/ipa-pure-const.c (.../branches/gcc-4_8-branch)

39610

@@ -588,7 +588,7 @@

39611

/* Wrapper around check_decl for loads in local more. */

39612

39613

static bool

39614

-check_load (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

39615

+check_load (gimple, tree op, tree, void *data)

39616

{

39617

if (DECL_P (op))

39618

check_decl ((funct_state)data, op, false, false);

39619

@@ -600,7 +600,7 @@

39620

/* Wrapper around check_decl for stores in local more. */

39621

39622

static bool

39623

-check_store (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

39624

+check_store (gimple, tree op, tree, void *data)

39625

{

39626

if (DECL_P (op))

39627

check_decl ((funct_state)data, op, true, false);

39628

@@ -612,7 +612,7 @@

39629

/* Wrapper around check_decl for loads in ipa mode. */

39630

39631

static bool

39632

-check_ipa_load (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

39633

+check_ipa_load (gimple, tree op, tree, void *data)

39634

{

39635

if (DECL_P (op))

39636

check_decl ((funct_state)data, op, false, true);

39637

@@ -624,7 +624,7 @@

39638

/* Wrapper around check_decl for stores in ipa mode. */

39639

39640

static bool

39641

-check_ipa_store (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

39642

+check_ipa_store (gimple, tree op, tree, void *data)

39643

{

39644

if (DECL_P (op))

39645

check_decl ((funct_state)data, op, true, true);

39646

Index: gcc/cse.c

39647

===================================================================

39648

--- a/src/gcc/cse.c (.../tags/gcc_4_8_2_release)

39649

+++ b/src/gcc/cse.c (.../branches/gcc-4_8-branch)

39650

@@ -1824,7 +1824,7 @@

39651

}

39652

}

39653

39654

-/* Function called for each rtx to check whether true dependence exist. */

39655

+/* Function called for each rtx to check whether an anti dependence exist. */

39656

struct check_dependence_data

39657

{

39658

enum machine_mode mode;

39659

@@ -1837,7 +1837,7 @@

39660

{

39661

struct check_dependence_data *d = (struct check_dependence_data *) data;

39662

if (*x && MEM_P (*x))

39663

- return canon_true_dependence (d->exp, d->mode, d->addr, *x, NULL_RTX);

39664

+ return canon_anti_dependence (*x, true, d->exp, d->mode, d->addr);

39665

else

39666

return 0;

39667

}

39668

@@ -5659,9 +5659,10 @@

39669

invalidate (XEXP (dest, 0), GET_MODE (dest));

39670

}

39671

39672

- /* A volatile ASM or an UNSPEC_VOLATILE invalidates everything. */

39673

+ /* A volatile ASM invalidates everything. */

39674

if (NONJUMP_INSN_P (insn)

39675

- && volatile_insn_p (PATTERN (insn)))

39676

+ && GET_CODE (PATTERN (insn)) == ASM_OPERANDS

39677

+ && MEM_VOLATILE_P (PATTERN (insn)))

39678

flush_hash_table ();

39679

39680

/* Don't cse over a call to setjmp; on some machines (eg VAX)

39681

@@ -6082,6 +6083,18 @@

39682

return x;

39683

}

39684

39685

+ case UNSIGNED_FLOAT:

39686

+ {

39687

+ rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);

39688

+ /* We don't substitute negative VOIDmode constants into these rtx,

39689

+ since they would impede folding. */

39690

+ if (GET_MODE (new_rtx) != VOIDmode

39691

+ || (CONST_INT_P (new_rtx) && INTVAL (new_rtx) >= 0)

39692

+ || (CONST_DOUBLE_P (new_rtx) && CONST_DOUBLE_HIGH (new_rtx) >= 0))

39693

+ validate_change (object, &XEXP (x, 0), new_rtx, 0);

39694

+ return x;

39695

+ }

39696

+

39697

case REG:

39698

i = REG_QTY (REGNO (x));

39699

39700

Index: gcc/tree-ssa-math-opts.c

39701

===================================================================

39702

--- a/src/gcc/tree-ssa-math-opts.c (.../tags/gcc_4_8_2_release)

39703

+++ b/src/gcc/tree-ssa-math-opts.c (.../branches/gcc-4_8-branch)

39704

@@ -1718,7 +1718,9 @@

39705

39706

if (rhs_class == GIMPLE_BINARY_RHS)

39707

{

39708

+ int i;

39709

struct symbolic_number n1, n2;

39710

+ unsigned HOST_WIDEST_INT mask;

39711

tree source_expr2;

39712

39713

if (code != BIT_IOR_EXPR)

39714

@@ -1744,6 +1746,15 @@

39715

return NULL_TREE;

39716

39717

n->size = n1.size;

39718

+ for (i = 0, mask = 0xff; i < n->size; i++, mask <<= BITS_PER_UNIT)

39719

+ {

39720

+ unsigned HOST_WIDEST_INT masked1, masked2;

39721

+

39722

+ masked1 = n1.n & mask;

39723

+ masked2 = n2.n & mask;

39724

+ if (masked1 && masked2 && masked1 != masked2)

39725

+ return NULL_TREE;

39726

+ }

39727

n->n = n1.n | n2.n;

39728

39729

if (!verify_symbolic_number_p (n, stmt))

39730

Index: gcc/tree-ssa-propagate.c

39731

===================================================================

39732

--- a/src/gcc/tree-ssa-propagate.c (.../tags/gcc_4_8_2_release)

39733

+++ b/src/gcc/tree-ssa-propagate.c (.../branches/gcc-4_8-branch)

39734

@@ -556,8 +556,18 @@

39735

/* All constants are ok. */

39736

break;

39737

39738

+ case tcc_comparison:

39739

+ /* GENERIC allows comparisons with non-boolean types, reject

39740

+ those for GIMPLE. Let vector-typed comparisons pass - rules

39741

+ for GENERIC and GIMPLE are the same here. */

39742

+ if (!(INTEGRAL_TYPE_P (TREE_TYPE (expr))

39743

+ && (TREE_CODE (TREE_TYPE (expr)) == BOOLEAN_TYPE

39744

+ || TYPE_PRECISION (TREE_TYPE (expr)) == 1))

39745

+ && TREE_CODE (TREE_TYPE (expr)) != VECTOR_TYPE)

39746

+ return false;

39747

+

39748

+ /* Fallthru. */

39749

case tcc_binary:

39750

- case tcc_comparison:

39751

if (!is_gimple_val (TREE_OPERAND (expr, 0))

39752

|| !is_gimple_val (TREE_OPERAND (expr, 1)))

39753

return false;

39754

Index: gcc/sel-sched.c

39755

===================================================================

39756

--- a/src/gcc/sel-sched.c (.../tags/gcc_4_8_2_release)

39757

+++ b/src/gcc/sel-sched.c (.../branches/gcc-4_8-branch)

39758

@@ -1253,7 +1253,7 @@

39759

39760

if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)

39761

add_to_hard_reg_set (&reg_rename_p->unavailable_hard_regs,

39762

- Pmode, HARD_FRAME_POINTER_IS_FRAME_POINTER);

39763

+ Pmode, HARD_FRAME_POINTER_REGNUM);

39764

}

39765

39766

#ifdef STACK_REGS

39767

Index: gcc/gimple-low.c

39768

===================================================================

39769

--- a/src/gcc/gimple-low.c (.../tags/gcc_4_8_2_release)

39770

+++ b/src/gcc/gimple-low.c (.../branches/gcc-4_8-branch)

39771

@@ -238,6 +238,7 @@

39772

break;

39773

arg = gimple_call_arg (stmt, i);

39774

if (p == error_mark_node

39775

+ || DECL_ARG_TYPE (p) == error_mark_node

39776

|| arg == error_mark_node

39777

|| (!types_compatible_p (DECL_ARG_TYPE (p), TREE_TYPE (arg))

39778

&& !fold_convertible_p (DECL_ARG_TYPE (p), arg)))

39779

Index: gcc/tree-ssa-sink.c

39780

===================================================================

39781

--- a/src/gcc/tree-ssa-sink.c (.../tags/gcc_4_8_2_release)

39782

+++ b/src/gcc/tree-ssa-sink.c (.../branches/gcc-4_8-branch)

39783

@@ -559,7 +559,7 @@

39784

execute_sink_code (void)

39785

{

39786

loop_optimizer_init (LOOPS_NORMAL);

39787

-

39788

+ split_critical_edges ();

39789

connect_infinite_loops_to_exit ();

39790

memset (&sink_stats, 0, sizeof (sink_stats));

39791

calculate_dominance_info (CDI_DOMINATORS);

39792

Index: gcc/config.in

39793

===================================================================

39794

--- a/src/gcc/config.in (.../tags/gcc_4_8_2_release)

39795

+++ b/src/gcc/config.in (.../branches/gcc-4_8-branch)

39796

@@ -363,6 +363,12 @@

39797

#endif

39798

39799

39800

+/* Define if your assembler supports the 'ud2' mnemonic. */

39801

+#ifndef USED_FOR_TARGET

39802

+#undef HAVE_AS_IX86_UD2

39803

+#endif

39804

+

39805

+

39806

/* Define if your assembler supports the lituse_jsrdirect relocation. */

39807

#ifndef USED_FOR_TARGET

39808

#undef HAVE_AS_JSRDIRECT_RELOCS

39809

@@ -375,6 +381,12 @@

39810

#endif

39811

39812

39813

+/* Define if your assembler supports LEON instructions. */

39814

+#ifndef USED_FOR_TARGET

39815

+#undef HAVE_AS_LEON

39816

+#endif

39817

+

39818

+

39819

/* Define if the assembler won't complain about a line such as # 0 "" 2. */

39820

#ifndef USED_FOR_TARGET

39821

#undef HAVE_AS_LINE_ZERO

39822

Index: gcc/ifcvt.c

39823

===================================================================

39824

--- a/src/gcc/ifcvt.c (.../tags/gcc_4_8_2_release)

39825

+++ b/src/gcc/ifcvt.c (.../branches/gcc-4_8-branch)

39826

@@ -115,7 +115,11 @@

39827

39828

while (1)

39829

{

39830

- if (CALL_P (insn) || NONJUMP_INSN_P (insn))

39831

+ if ((CALL_P (insn) || NONJUMP_INSN_P (insn))

39832

+ /* Don't count USE/CLOBBER insns, flow_find_cross_jump etc.

39833

+ don't count them either and we need consistency. */

39834

+ && GET_CODE (PATTERN (insn)) != USE

39835

+ && GET_CODE (PATTERN (insn)) != CLOBBER)

39836

count++;

39837

39838

if (insn == BB_END (bb))

39839

@@ -505,7 +509,10 @@

39840

n_insns -= 2 * n_matching;

39841

}

39842

39843

- if (then_start && else_start)

39844

+ if (then_start

39845

+ && else_start

39846

+ && then_n_insns > n_matching

39847

+ && else_n_insns > n_matching)

39848

{

39849

int longest_match = MIN (then_n_insns - n_matching,

39850

else_n_insns - n_matching);

39851

Index: gcc/expr.c

39852

===================================================================

39853

--- a/src/gcc/expr.c (.../tags/gcc_4_8_2_release)

39854

+++ b/src/gcc/expr.c (.../branches/gcc-4_8-branch)

39855

@@ -1994,12 +1994,14 @@

39856

HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));

39857

enum machine_mode mode = GET_MODE (tmps[i]);

39858

unsigned int bytelen = GET_MODE_SIZE (mode);

39859

- unsigned int adj_bytelen = bytelen;

39860

+ unsigned int adj_bytelen;

39861

rtx dest = dst;

39862

39863

/* Handle trailing fragments that run over the size of the struct. */

39864

if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)

39865

adj_bytelen = ssize - bytepos;

39866

+ else

39867

+ adj_bytelen = bytelen;

39868

39869

if (GET_CODE (dst) == CONCAT)

39870

{

39871

@@ -2040,6 +2042,7 @@

39872

}

39873

}

39874

39875

+ /* Handle trailing fragments that run over the size of the struct. */

39876

if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)

39877

{

39878

/* store_bit_field always takes its value from the lsb.

39879

@@ -2057,16 +2060,22 @@

39880

tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],

39881

shift, tmps[i], 0);

39882

}

39883

- bytelen = adj_bytelen;

39884

+

39885

+ /* Make sure not to write past the end of the struct. */

39886

+ store_bit_field (dest,

39887

+ adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,

39888

+ bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,

39889

+ VOIDmode, tmps[i]);

39890

}

39891

39892

/* Optimize the access just a bit. */

39893

- if (MEM_P (dest)

39894

- && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))

39895

- || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))

39896

- && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0

39897

- && bytelen == GET_MODE_SIZE (mode))

39898

+ else if (MEM_P (dest)

39899

+ && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))

39900

+ || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))

39901

+ && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0

39902

+ && bytelen == GET_MODE_SIZE (mode))

39903

emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);

39904

+

39905

else

39906

store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,

39907

0, 0, mode, tmps[i]);

39908

@@ -3602,12 +3611,21 @@

39909

into a new pseudo. This constant may be used in different modes,

39910

and if not, combine will put things back together for us. */

39911

trunc_y = force_reg (srcmode, trunc_y);

39912

- emit_unop_insn (ic, x, trunc_y, UNKNOWN);

39913

+

39914

+ /* If x is a hard register, perform the extension into a pseudo,

39915

+ so that e.g. stack realignment code is aware of it. */

39916

+ rtx target = x;

39917

+ if (REG_P (x) && HARD_REGISTER_P (x))

39918

+ target = gen_reg_rtx (dstmode);

39919

+

39920

+ emit_unop_insn (ic, target, trunc_y, UNKNOWN);

39921

last_insn = get_last_insn ();

39922

39923

- if (REG_P (x))

39924

+ if (REG_P (target))

39925

set_unique_reg_note (last_insn, REG_EQUAL, y);

39926

39927

+ if (target != x)

39928

+ return emit_move_insn (x, target);

39929

return last_insn;

39930

}

39931

39932

@@ -4551,19 +4569,19 @@

39933

- tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));

39934

39935

/* If the adjustment is larger than bitpos, we would have a negative bit

39936

- position for the lower bound and this may wreak havoc later. This can

39937

- occur only if we have a non-null offset, so adjust offset and bitpos

39938

- to make the lower bound non-negative. */

39939

+ position for the lower bound and this may wreak havoc later. Adjust

39940

+ offset and bitpos to make the lower bound non-negative in that case. */

39941

if (bitoffset > *bitpos)

39942

{

39943

HOST_WIDE_INT adjust = bitoffset - *bitpos;

39944

-

39945

gcc_assert ((adjust % BITS_PER_UNIT) == 0);

39946

- gcc_assert (*offset != NULL_TREE);

39947

39948

*bitpos += adjust;

39949

- *offset

39950

- = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));

39951

+ if (*offset == NULL_TREE)

39952

+ *offset = size_int (-adjust / BITS_PER_UNIT);

39953

+ else

39954

+ *offset

39955

+ = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));

39956

*bitstart = 0;

39957

}

39958

else

39959

@@ -4668,8 +4686,7 @@

39960

expand_insn (icode, 2, ops);

39961

}

39962

else

39963

- store_bit_field (mem, GET_MODE_BITSIZE (mode),

39964

- 0, 0, 0, mode, reg);

39965

+ store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);

39966

return;

39967

}

39968

39969

@@ -4698,6 +4715,15 @@

39970

tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,

39971

&unsignedp, &volatilep, true);

39972

39973

+ /* Make sure bitpos is not negative, it can wreak havoc later. */

39974

+ if (bitpos < 0)

39975

+ {

39976

+ gcc_assert (offset == NULL_TREE);

39977

+ offset = size_int (bitpos >> (BITS_PER_UNIT == 8

39978

+ ? 3 : exact_log2 (BITS_PER_UNIT)));

39979

+ bitpos &= BITS_PER_UNIT - 1;

39980

+ }

39981

+

39982

if (TREE_CODE (to) == COMPONENT_REF

39983

&& DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))

39984

get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);

39985

Index: gcc/expr.h

39986

===================================================================

39987

--- a/src/gcc/expr.h (.../tags/gcc_4_8_2_release)

39988

+++ b/src/gcc/expr.h (.../branches/gcc-4_8-branch)

39989

@@ -521,8 +521,8 @@

39990

rtx, int);

39991

#endif

39992

39993

-extern void locate_and_pad_parm (enum machine_mode, tree, int, int, tree,

39994

- struct args_size *,

39995

+extern void locate_and_pad_parm (enum machine_mode, tree, int, int, int,

39996

+ tree, struct args_size *,

39997

struct locate_and_pad_arg_data *);

39998

39999

/* Return the CODE_LABEL rtx for a LABEL_DECL, creating it if necessary. */

40000

Index: gcc/go/go-gcc.cc

40001

===================================================================

40002

--- a/src/gcc/go/go-gcc.cc (.../tags/gcc_4_8_2_release)

40003

+++ b/src/gcc/go/go-gcc.cc (.../branches/gcc-4_8-branch)

40004

@@ -232,6 +232,9 @@

40005

Bexpression*

40006

convert_expression(Btype* type, Bexpression* expr, Location);

40007

40008

+ Bexpression*

40009

+ function_code_expression(Bfunction*, Location);

40010

+

40011

// Statements.

40012

40013

Bstatement*

40014

@@ -334,6 +337,17 @@

40015

Bexpression*

40016

label_address(Blabel*, Location);

40017

40018

+ // Functions.

40019

+

40020

+ Bfunction*

40021

+ error_function()

40022

+ { return this->make_function(error_mark_node); }

40023

+

40024

+ Bfunction*

40025

+ function(Btype* fntype, const std::string& name, const std::string& asm_name,

40026

+ bool is_visible, bool is_declaration, bool is_inlinable,

40027

+ bool disable_split_stack, bool in_unique_section, Location);

40028

+

40029

private:

40030

// Make a Bexpression from a tree.

40031

Bexpression*

40032

@@ -350,6 +364,10 @@

40033

make_type(tree t)

40034

{ return new Btype(t); }

40035

40036

+ Bfunction*

40037

+ make_function(tree t)

40038

+ { return new Bfunction(t); }

40039

+

40040

Btype*

40041

fill_in_struct(Btype*, const std::vector<Btyped_identifier>&);

40042

40043

@@ -966,6 +984,19 @@

40044

return tree_to_expr(ret);

40045

}

40046

40047

+// Get the address of a function.

40048

+

40049

+Bexpression*

40050

+Gcc_backend::function_code_expression(Bfunction* bfunc, Location location)

40051

+{

40052

+ tree func = bfunc->get_tree();

40053

+ if (func == error_mark_node)

40054

+ return this->error_expression();

40055

+

40056

+ tree ret = build_fold_addr_expr_loc(location.gcc_location(), func);

40057

+ return this->make_expression(ret);

40058

+}

40059

+

40060

// An expression as a statement.

40061

40062

Bstatement*

40063

@@ -1724,6 +1755,56 @@

40064

return this->make_expression(ret);

40065

}

40066

40067

+// Declare or define a new function.

40068

+

40069

+Bfunction*

40070

+Gcc_backend::function(Btype* fntype, const std::string& name,

40071

+ const std::string& asm_name, bool is_visible,

40072

+ bool is_declaration, bool is_inlinable,

40073

+ bool disable_split_stack, bool in_unique_section,

40074

+ Location location)

40075

+{

40076

+ tree functype = fntype->get_tree();

40077

+ if (functype != error_mark_node)

40078

+ {

40079

+ gcc_assert(FUNCTION_POINTER_TYPE_P(functype));

40080

+ functype = TREE_TYPE(functype);

40081

+ }

40082

+ tree id = get_identifier_from_string(name);

40083

+ if (functype == error_mark_node || id == error_mark_node)

40084

+ return this->error_function();

40085

+

40086

+ tree decl = build_decl(location.gcc_location(), FUNCTION_DECL, id, functype);

40087

+ if (!asm_name.empty())

40088

+ SET_DECL_ASSEMBLER_NAME(decl, get_identifier_from_string(asm_name));

40089

+ if (is_visible)

40090

+ TREE_PUBLIC(decl) = 1;

40091

+ if (is_declaration)

40092

+ DECL_EXTERNAL(decl) = 1;

40093

+ else

40094

+ {

40095

+ tree restype = TREE_TYPE(functype);

40096

+ tree resdecl =

40097

+ build_decl(location.gcc_location(), RESULT_DECL, NULL_TREE, restype);

40098

+ DECL_ARTIFICIAL(resdecl) = 1;

40099

+ DECL_IGNORED_P(resdecl) = 1;

40100

+ DECL_CONTEXT(resdecl) = decl;

40101

+ DECL_RESULT(decl) = resdecl;

40102

+ }

40103

+ if (!is_inlinable)

40104

+ DECL_UNINLINABLE(decl) = 1;

40105

+ if (disable_split_stack)

40106

+ {

40107

+ tree attr = get_identifier("__no_split_stack__");

40108

+ DECL_ATTRIBUTES(decl) = tree_cons(attr, NULL_TREE, NULL_TREE);

40109

+ }

40110

+ if (in_unique_section)

40111

+ resolve_unique_section(decl, 0, 1);

40112

+

40113

+ go_preserve_from_gc(decl);

40114

+ return new Bfunction(decl);

40115

+}

40116

+

40117

// The single backend.

40118

40119

static Gcc_backend gcc_backend;

40120

@@ -1799,3 +1880,9 @@

40121

{

40122

return bv->get_tree();

40123

}

40124

+

40125

+tree

40126

+function_to_tree(Bfunction* bf)

40127

+{

40128

+ return bf->get_tree();

40129

+}

40130

Index: gcc/go/ChangeLog

40131

===================================================================

40132

--- a/src/gcc/go/ChangeLog (.../tags/gcc_4_8_2_release)

40133

+++ b/src/gcc/go/ChangeLog (.../branches/gcc-4_8-branch)

40134

@@ -1,3 +1,22 @@

40135

+2013-12-11 Ian Lance Taylor <iant@google.com>

40136

+

40137

+ * go-lang.c (go_langhook_post_options): Disable sibling calls by

40138

+ default.

40139

+

40140

+2013-10-16 Ian Lance Taylor <iant@google.com>

40141

+

40142

+ Bring in from mainline:

40143

+

40144

+ 2013-10-11 Chris Manghane <cmang@google.com>

40145

+ * go-gcc.cc (Gcc_backend::function_code_expression): New

40146

+ function.

40147

+

40148

+ 2013-10-10 Chris Manghane <cmang@google.com>

40149

+ * go-gcc.cc (Backend::error_function): New function.

40150

+ (Backend::function): New function.

40151

+ (Backend::make_function): New function.

40152

+ (function_to_tree): New function.

40153

+

40154

2013-10-16 Release Manager

40155

40156

* GCC 4.8.2 released.

40157

Index: gcc/go/go-lang.c

40158

===================================================================

40159

--- a/src/gcc/go/go-lang.c (.../tags/gcc_4_8_2_release)

40160

+++ b/src/gcc/go/go-lang.c (.../branches/gcc-4_8-branch)

40161

@@ -269,6 +269,10 @@

40162

if (flag_excess_precision_cmdline == EXCESS_PRECISION_DEFAULT)

40163

flag_excess_precision_cmdline = EXCESS_PRECISION_STANDARD;

40164

40165

+ /* Tail call optimizations can confuse uses of runtime.Callers. */

40166

+ if (!global_options_set.x_flag_optimize_sibling_calls)

40167

+ global_options.x_flag_optimize_sibling_calls = 0;

40168

+

40169

/* Returning false means that the backend should be used. */

40170

return false;

40171

}

40172

Index: gcc/go/gofrontend/gogo.cc

40173

===================================================================

40174

--- a/src/gcc/go/gofrontend/gogo.cc (.../tags/gcc_4_8_2_release)

40175

+++ b/src/gcc/go/gofrontend/gogo.cc (.../branches/gcc-4_8-branch)

40176

@@ -2822,7 +2822,10 @@

40177

if (orig_fntype->is_varargs())

40178

new_fntype->set_is_varargs();

40179

40180

- std::string name = orig_no->name() + "$recover";

40181

+ std::string name = orig_no->name();

40182

+ if (orig_fntype->is_method())

40183

+ name += "$" + orig_fntype->receiver()->type()->mangled_name(gogo);

40184

+ name += "$recover";

40185

Named_object *new_no = gogo->start_function(name, new_fntype, false,

40186

location);

40187

Function *new_func = new_no->func_value();

40188

@@ -2916,7 +2919,25 @@

40189

&& !orig_rec_no->var_value()->is_receiver());

40190

orig_rec_no->var_value()->set_is_receiver();

40191

40192

- const std::string& new_receiver_name(orig_fntype->receiver()->name());

40193

+ std::string new_receiver_name(orig_fntype->receiver()->name());

40194

+ if (new_receiver_name.empty())

40195

+ {

40196

+ // Find the receiver. It was named "r.NNN" in

40197

+ // Gogo::start_function.

40198

+ for (Bindings::const_definitions_iterator p =

40199

+ new_bindings->begin_definitions();

40200

+ p != new_bindings->end_definitions();

40201

+ ++p)

40202

+ {

40203

+ const std::string& pname((*p)->name());

40204

+ if (pname[0] == 'r' && pname[1] == '.')

40205

+ {

40206

+ new_receiver_name = pname;

40207

+ break;

40208

+ }

40209

+ }

40210

+ go_assert(!new_receiver_name.empty());

40211

+ }

40212

Named_object* new_rec_no = new_bindings->lookup_local(new_receiver_name);

40213

if (new_rec_no == NULL)

40214

go_assert(saw_errors());

40215

@@ -3320,7 +3341,8 @@

40216

closure_var_(NULL), block_(block), location_(location), labels_(),

40217

local_type_count_(0), descriptor_(NULL), fndecl_(NULL), defer_stack_(NULL),

40218

is_sink_(false), results_are_named_(false), nointerface_(false),

40219

- calls_recover_(false), is_recover_thunk_(false), has_recover_thunk_(false),

40220

+ is_unnamed_type_stub_method_(false), calls_recover_(false),

40221

+ is_recover_thunk_(false), has_recover_thunk_(false),

40222

in_unique_section_(false)

40223

{

40224

}

40225

@@ -3819,6 +3841,81 @@

40226

*presults = results;

40227

}

40228

40229

+// Get the backend representation.

40230

+

40231

+Bfunction*

40232

+Function::get_or_make_decl(Gogo* gogo, Named_object* no)

40233

+{

40234

+ if (this->fndecl_ == NULL)

40235

+ {

40236

+ std::string asm_name;

40237

+ bool is_visible = false;

40238

+ if (no->package() != NULL)

40239

+ ;

40240

+ else if (this->enclosing_ != NULL || Gogo::is_thunk(no))

40241

+ ;

40242

+ else if (Gogo::unpack_hidden_name(no->name()) == "init"

40243

+ && !this->type_->is_method())

40244

+ ;

40245

+ else if (Gogo::unpack_hidden_name(no->name()) == "main"

40246

+ && gogo->is_main_package())

40247

+ is_visible = true;

40248

+ // Methods have to be public even if they are hidden because

40249

+ // they can be pulled into type descriptors when using

40250

+ // anonymous fields.

40251

+ else if (!Gogo::is_hidden_name(no->name())

40252

+ || this->type_->is_method())

40253

+ {

40254

+ if (!this->is_unnamed_type_stub_method_)

40255

+ is_visible = true;

40256

+ std::string pkgpath = gogo->pkgpath_symbol();

40257

+ if (this->type_->is_method()

40258

+ && Gogo::is_hidden_name(no->name())

40259

+ && Gogo::hidden_name_pkgpath(no->name()) != gogo->pkgpath())

40260

+ {

40261

+ // This is a method we created for an unexported

40262

+ // method of an imported embedded type. We need to

40263

+ // use the pkgpath of the imported package to avoid

40264

+ // a possible name collision. See bug478 for a test

40265

+ // case.

40266

+ pkgpath = Gogo::hidden_name_pkgpath(no->name());

40267

+ pkgpath = Gogo::pkgpath_for_symbol(pkgpath);

40268

+ }

40269

+

40270

+ asm_name = pkgpath;

40271

+ asm_name.append(1, '.');

40272

+ asm_name.append(Gogo::unpack_hidden_name(no->name()));

40273

+ if (this->type_->is_method())

40274

+ {

40275

+ asm_name.append(1, '.');

40276

+ Type* rtype = this->type_->receiver()->type();

40277

+ asm_name.append(rtype->mangled_name(gogo));

40278

+ }

40279

+ }

40280

+

40281

+ // If a function calls the predeclared recover function, we

40282

+ // can't inline it, because recover behaves differently in a

40283

+ // function passed directly to defer. If this is a recover

40284

+ // thunk that we built to test whether a function can be

40285

+ // recovered, we can't inline it, because that will mess up

40286

+ // our return address comparison.

40287

+ bool is_inlinable = !(this->calls_recover_ || this->is_recover_thunk_);

40288

+

40289

+ // If this is a thunk created to call a function which calls

40290

+ // the predeclared recover function, we need to disable

40291

+ // stack splitting for the thunk.

40292

+ bool disable_split_stack = this->is_recover_thunk_;

40293

+

40294

+ Btype* functype = this->type_->get_backend_fntype(gogo);

40295

+ this->fndecl_ =

40296

+ gogo->backend()->function(functype, no->get_id(gogo), asm_name,

40297

+ is_visible, false, is_inlinable,

40298

+ disable_split_stack,

40299

+ this->in_unique_section_, this->location());

40300

+ }

40301

+ return this->fndecl_;

40302

+}

40303

+

40304

// Class Block.

40305

40306

Block::Block(Block* enclosing, Location location)

40307

@@ -5110,6 +5207,75 @@

40308

go_unreachable();

40309

}

40310

40311

+

40312

+// Return the external identifier for this object.

40313

+

40314

+std::string

40315

+Named_object::get_id(Gogo* gogo)

40316

+{

40317

+ go_assert(!this->is_variable() && !this->is_result_variable());

40318

+ std::string decl_name;

40319

+ if (this->is_function_declaration()

40320

+ && !this->func_declaration_value()->asm_name().empty())

40321

+ decl_name = this->func_declaration_value()->asm_name();

40322

+ else if (this->is_type()

40323

+ && Linemap::is_predeclared_location(this->type_value()->location()))

40324

+ {

40325

+ // We don't need the package name for builtin types.

40326

+ decl_name = Gogo::unpack_hidden_name(this->name_);

40327

+ }

40328

+ else

40329

+ {

40330

+ std::string package_name;

40331

+ if (this->package_ == NULL)

40332

+ package_name = gogo->package_name();

40333

+ else

40334

+ package_name = this->package_->package_name();

40335

+

40336

+ // Note that this will be misleading if this is an unexported

40337

+ // method generated for an embedded imported type. In that case

40338

+ // the unexported method should have the package name of the

40339

+ // package from which it is imported, but we are going to give

40340

+ // it our package name. Fixing this would require knowing the

40341

+ // package name, but we only know the package path. It might be

40342

+ // better to use package paths here anyhow. This doesn't affect

40343

+ // the assembler code, because we always set that name in

40344

+ // Function::get_or_make_decl anyhow. FIXME.

40345

+

40346

+ decl_name = package_name + '.' + Gogo::unpack_hidden_name(this->name_);

40347

+

40348

+ Function_type* fntype;

40349

+ if (this->is_function())

40350

+ fntype = this->func_value()->type();

40351

+ else if (this->is_function_declaration())

40352

+ fntype = this->func_declaration_value()->type();

40353

+ else

40354

+ fntype = NULL;

40355

+ if (fntype != NULL && fntype->is_method())

40356

+ {

40357

+ decl_name.push_back('.');

40358

+ decl_name.append(fntype->receiver()->type()->mangled_name(gogo));

40359

+ }

40360

+ }

40361

+ if (this->is_type())

40362

+ {

40363

+ unsigned int index;

40364

+ const Named_object* in_function = this->type_value()->in_function(&index);

40365

+ if (in_function != NULL)

40366

+ {

40367

+ decl_name += '$' + Gogo::unpack_hidden_name(in_function->name());

40368

+ if (index > 0)

40369

+ {

40370

+ char buf[30];

40371

+ snprintf(buf, sizeof buf, "%u", index);

40372

+ decl_name += '$';

40373

+ decl_name += buf;

40374

+ }

40375

+ }

40376

+ }

40377

+ return decl_name;

40378

+}

40379

+

40380

// Class Bindings.

40381

40382

Bindings::Bindings(Bindings* enclosing)

40383

Index: gcc/go/gofrontend/runtime.def

40384

===================================================================

40385

--- a/src/gcc/go/gofrontend/runtime.def (.../tags/gcc_4_8_2_release)

40386

+++ b/src/gcc/go/gofrontend/runtime.def (.../branches/gcc-4_8-branch)

40387

@@ -68,6 +68,12 @@

40388

P1(STRING), R1(SLICE))

40389

40390

40391

+// Complex division.

40392

+DEF_GO_RUNTIME(COMPLEX64_DIV, "__go_complex64_div",

40393

+ P2(COMPLEX64, COMPLEX64), R1(COMPLEX64))

40394

+DEF_GO_RUNTIME(COMPLEX128_DIV, "__go_complex128_div",

40395

+ P2(COMPLEX128, COMPLEX128), R1(COMPLEX128))

40396

+

40397

// Make a slice.

40398

DEF_GO_RUNTIME(MAKESLICE1, "__go_make_slice1", P2(TYPE, UINTPTR), R1(SLICE))

40399

DEF_GO_RUNTIME(MAKESLICE2, "__go_make_slice2", P3(TYPE, UINTPTR, UINTPTR),

40400

Index: gcc/go/gofrontend/gogo.h

40401

===================================================================

40402

--- a/src/gcc/go/gofrontend/gogo.h (.../tags/gcc_4_8_2_release)

40403

+++ b/src/gcc/go/gofrontend/gogo.h (.../branches/gcc-4_8-branch)

40404

@@ -48,6 +48,7 @@

40405

class Bblock;

40406

class Bvariable;

40407

class Blabel;

40408

+class Bfunction;

40409

40410

// This file declares the basic classes used to hold the internal

40411

// representation of Go which is built by the parser.

40412

@@ -952,6 +953,15 @@

40413

this->nointerface_ = true;

40414

}

40415

40416

+ // Record that this function is a stub method created for an unnamed

40417

+ // type.

40418

+ void

40419

+ set_is_unnamed_type_stub_method()

40420

+ {

40421

+ go_assert(this->is_method());

40422

+ this->is_unnamed_type_stub_method_ = true;

40423

+ }

40424

+

40425

// Add a new field to the closure variable.

40426

void

40427

add_closure_field(Named_object* var, Location loc)

40428

@@ -1089,17 +1099,13 @@

40429

this->descriptor_ = descriptor;

40430

}

40431

40432

- // Return the function's decl given an identifier.

40433

- tree

40434

- get_or_make_decl(Gogo*, Named_object*, tree id);

40435

+ // Return the backend representation.

40436

+ Bfunction*

40437

+ get_or_make_decl(Gogo*, Named_object*);

40438

40439

// Return the function's decl after it has been built.

40440

tree

40441

- get_decl() const

40442

- {

40443

- go_assert(this->fndecl_ != NULL);

40444

- return this->fndecl_;

40445

- }

40446

+ get_decl() const;

40447

40448

// Set the function decl to hold a tree of the function code.

40449

void

40450

@@ -1170,7 +1176,7 @@

40451

// The function descriptor, if any.

40452

Expression* descriptor_;

40453

// The function decl.

40454

- tree fndecl_;

40455

+ Bfunction* fndecl_;

40456

// The defer stack variable. A pointer to this variable is used to

40457

// distinguish the defer stack for one function from another. This

40458

// is NULL unless we actually need a defer stack.

40459

@@ -1181,6 +1187,9 @@

40460

bool results_are_named_ : 1;

40461

// True if this method should not be included in the type descriptor.

40462

bool nointerface_ : 1;

40463

+ // True if this function is a stub method created for an unnamed

40464

+ // type.

40465

+ bool is_unnamed_type_stub_method_ : 1;

40466

// True if this function calls the predeclared recover function.

40467

bool calls_recover_ : 1;

40468

// True if this a thunk built for a function which calls recover.

40469

@@ -1265,9 +1274,9 @@

40470

has_descriptor() const

40471

{ return this->descriptor_ != NULL; }

40472

40473

- // Return a decl for the function given an identifier.

40474

- tree

40475

- get_or_make_decl(Gogo*, Named_object*, tree id);

40476

+ // Return a backend representation.

40477

+ Bfunction*

40478

+ get_or_make_decl(Gogo*, Named_object*);

40479

40480

// If there is a descriptor, build it into the backend

40481

// representation.

40482

@@ -1290,7 +1299,7 @@

40483

// The function descriptor, if any.

40484

Expression* descriptor_;

40485

// The function decl if needed.

40486

- tree fndecl_;

40487

+ Bfunction* fndecl_;

40488

};

40489

40490

// A variable.

40491

@@ -2181,8 +2190,8 @@

40492

Bvariable*

40493

get_backend_variable(Gogo*, Named_object* function);

40494

40495

- // Return a tree for the external identifier for this object.

40496

- tree

40497

+ // Return the external identifier for this object.

40498

+ std::string

40499

get_id(Gogo*);

40500

40501

// Return a tree representing this object.

40502

Index: gcc/go/gofrontend/types.h

40503

===================================================================

40504

--- a/src/gcc/go/gofrontend/types.h (.../tags/gcc_4_8_2_release)

40505

+++ b/src/gcc/go/gofrontend/types.h (.../branches/gcc-4_8-branch)

40506

@@ -1138,6 +1138,13 @@

40507

Function_type* equal_fntype, Named_object** hash_fn,

40508

Named_object** equal_fn);

40509

40510

+ void

40511

+ write_named_hash(Gogo*, Named_type*, Function_type* hash_fntype,

40512

+ Function_type* equal_fntype);

40513

+

40514

+ void

40515

+ write_named_equal(Gogo*, Named_type*);

40516

+

40517

// Build a composite literal for the uncommon type information.

40518

Expression*

40519

uncommon_type_constructor(Gogo*, Type* uncommon_type,

40520

@@ -1717,7 +1724,8 @@

40521

Typed_identifier_list* results, Location location)

40522

: Type(TYPE_FUNCTION),

40523

receiver_(receiver), parameters_(parameters), results_(results),

40524

- location_(location), is_varargs_(false), is_builtin_(false)

40525

+ location_(location), is_varargs_(false), is_builtin_(false),

40526

+ fnbtype_(NULL)

40527

{ }

40528

40529

// Get the receiver.

40530

@@ -1789,6 +1797,12 @@

40531

Function_type*

40532

copy_with_receiver(Type*) const;

40533

40534

+ // Return a copy of this type with the receiver treated as the first

40535

+ // parameter. If WANT_POINTER_RECEIVER is true, the receiver is

40536

+ // forced to be a pointer.

40537

+ Function_type*

40538

+ copy_with_receiver_as_param(bool want_pointer_receiver) const;

40539

+

40540

// Return a copy of this type ignoring any receiver and using dummy

40541

// names for all parameters. This is used for thunks for method

40542

// values.

40543

@@ -1798,6 +1812,11 @@

40544

static Type*

40545

make_function_type_descriptor_type();

40546

40547

+ // Return the backend representation of this function type. This is used

40548

+ // as the real type of a backend function declaration or defintion.

40549

+ Btype*

40550

+ get_backend_fntype(Gogo*);

40551

+

40552

protected:

40553

int

40554

do_traverse(Traverse*);

40555

@@ -1851,6 +1870,9 @@

40556

// Whether this is a special builtin function which can not simply

40557

// be called. This is used for len, cap, etc.

40558

bool is_builtin_;

40559

+ // The backend representation of this type for backend function

40560

+ // declarations and definitions.

40561

+ Btype* fnbtype_;

40562

};

40563

40564

// The type of a pointer.

40565

@@ -1915,7 +1937,7 @@

40566

{

40567

public:

40568

explicit Struct_field(const Typed_identifier& typed_identifier)

40569

- : typed_identifier_(typed_identifier), tag_(NULL)

40570

+ : typed_identifier_(typed_identifier), tag_(NULL), is_imported_(false)

40571

{ }

40572

40573

// The field name.

40574

@@ -1926,6 +1948,10 @@

40575

bool

40576

is_field_name(const std::string& name) const;

40577

40578

+ // Return whether this struct field is an unexported field named NAME.

40579

+ bool

40580

+ is_unexported_field_name(Gogo*, const std::string& name) const;

40581

+

40582

// Return whether this struct field is an embedded built-in type.

40583

bool

40584

is_embedded_builtin(Gogo*) const;

40585

@@ -1963,6 +1989,11 @@

40586

set_tag(const std::string& tag)

40587

{ this->tag_ = new std::string(tag); }

40588

40589

+ // Record that this field is defined in an imported struct.

40590

+ void

40591

+ set_is_imported()

40592

+ { this->is_imported_ = true; }

40593

+

40594

// Set the type. This is only used in error cases.

40595

void

40596

set_type(Type* type)

40597

@@ -1973,6 +2004,8 @@

40598

Typed_identifier typed_identifier_;

40599

// The field tag. This is NULL if the field has no tag.

40600

std::string* tag_;

40601

+ // Whether this field is defined in an imported struct.

40602

+ bool is_imported_;

40603

};

40604

40605

// A list of struct fields.

40606

Index: gcc/go/gofrontend/parse.cc

40607

===================================================================

40608

--- a/src/gcc/go/gofrontend/parse.cc (.../tags/gcc_4_8_2_release)

40609

+++ b/src/gcc/go/gofrontend/parse.cc (.../branches/gcc-4_8-branch)

40610

@@ -744,6 +744,8 @@

40611

return NULL;

40612

40613

Parse::Names names;

40614

+ if (receiver != NULL)

40615

+ names[receiver->name()] = receiver;

40616

if (params != NULL)

40617

this->check_signature_names(params, &names);

40618

if (results != NULL)

40619

Index: gcc/go/gofrontend/import.h

40620

===================================================================

40621

--- a/src/gcc/go/gofrontend/import.h (.../tags/gcc_4_8_2_release)

40622

+++ b/src/gcc/go/gofrontend/import.h (.../branches/gcc-4_8-branch)

40623

@@ -149,6 +149,11 @@

40624

location() const

40625

{ return this->location_; }

40626

40627

+ // Return the package we are importing.

40628

+ Package*

40629

+ package() const

40630

+ { return this->package_; }

40631

+

40632

// Return the next character.

40633

int

40634

peek_char()

40635

Index: gcc/go/gofrontend/runtime.cc

40636

===================================================================

40637

--- a/src/gcc/go/gofrontend/runtime.cc (.../tags/gcc_4_8_2_release)

40638

+++ b/src/gcc/go/gofrontend/runtime.cc (.../branches/gcc-4_8-branch)

40639

@@ -42,6 +42,8 @@

40640

RFT_RUNE,

40641

// Go type float64, C type double.

40642

RFT_FLOAT64,

40643

+ // Go type complex64, C type __complex float.

40644

+ RFT_COMPLEX64,

40645

// Go type complex128, C type __complex double.

40646

RFT_COMPLEX128,

40647

// Go type string, C type struct __go_string.

40648

@@ -126,6 +128,10 @@

40649

t = Type::lookup_float_type("float64");

40650

break;

40651

40652

+ case RFT_COMPLEX64:

40653

+ t = Type::lookup_complex_type("complex64");

40654

+ break;

40655

+

40656

case RFT_COMPLEX128:

40657

t = Type::lookup_complex_type("complex128");

40658

break;

40659

@@ -216,6 +222,7 @@

40660

case RFT_UINTPTR:

40661

case RFT_RUNE:

40662

case RFT_FLOAT64:

40663

+ case RFT_COMPLEX64:

40664

case RFT_COMPLEX128:

40665

case RFT_STRING:

40666

case RFT_POINTER:

40667

Index: gcc/go/gofrontend/expressions.h

40668

===================================================================

40669

--- a/src/gcc/go/gofrontend/expressions.h (.../tags/gcc_4_8_2_release)

40670

+++ b/src/gcc/go/gofrontend/expressions.h (.../branches/gcc-4_8-branch)

40671

@@ -1514,8 +1514,8 @@

40672

closure()

40673

{ return this->closure_; }

40674

40675

- // Return a tree for the code for a function.

40676

- static tree

40677

+ // Return a backend expression for the code of a function.

40678

+ static Bexpression*

40679

get_code_pointer(Gogo*, Named_object* function, Location loc);

40680

40681

protected:

40682

Index: gcc/go/gofrontend/gogo-tree.cc

40683

===================================================================

40684

--- a/src/gcc/go/gofrontend/gogo-tree.cc (.../tags/gcc_4_8_2_release)

40685

+++ b/src/gcc/go/gofrontend/gogo-tree.cc (.../branches/gcc-4_8-branch)

40686

@@ -985,74 +985,6 @@

40687

delete[] vec;

40688

}

40689

40690

-// Get a tree for the identifier for a named object.

40691

-

40692

-tree

40693

-Named_object::get_id(Gogo* gogo)

40694

-{

40695

- go_assert(!this->is_variable() && !this->is_result_variable());

40696

- std::string decl_name;

40697

- if (this->is_function_declaration()

40698

- && !this->func_declaration_value()->asm_name().empty())

40699

- decl_name = this->func_declaration_value()->asm_name();

40700

- else if (this->is_type()

40701

- && Linemap::is_predeclared_location(this->type_value()->location()))

40702

- {

40703

- // We don't need the package name for builtin types.

40704

- decl_name = Gogo::unpack_hidden_name(this->name_);

40705

- }

40706

- else

40707

- {

40708

- std::string package_name;

40709

- if (this->package_ == NULL)

40710

- package_name = gogo->package_name();

40711

- else

40712

- package_name = this->package_->package_name();

40713

-

40714

- // Note that this will be misleading if this is an unexported

40715

- // method generated for an embedded imported type. In that case

40716

- // the unexported method should have the package name of the

40717

- // package from which it is imported, but we are going to give

40718

- // it our package name. Fixing this would require knowing the

40719

- // package name, but we only know the package path. It might be

40720

- // better to use package paths here anyhow. This doesn't affect

40721

- // the assembler code, because we always set that name in

40722

- // Function::get_or_make_decl anyhow. FIXME.

40723

-

40724

- decl_name = package_name + '.' + Gogo::unpack_hidden_name(this->name_);

40725

-

40726

- Function_type* fntype;

40727

- if (this->is_function())

40728

- fntype = this->func_value()->type();

40729

- else if (this->is_function_declaration())

40730

- fntype = this->func_declaration_value()->type();

40731

- else

40732

- fntype = NULL;

40733

- if (fntype != NULL && fntype->is_method())

40734

- {

40735

- decl_name.push_back('.');

40736

- decl_name.append(fntype->receiver()->type()->mangled_name(gogo));

40737

- }

40738

- }

40739

- if (this->is_type())

40740

- {

40741

- unsigned int index;

40742

- const Named_object* in_function = this->type_value()->in_function(&index);

40743

- if (in_function != NULL)

40744

- {

40745

- decl_name += '$' + Gogo::unpack_hidden_name(in_function->name());

40746

- if (index > 0)

40747

- {

40748

- char buf[30];

40749

- snprintf(buf, sizeof buf, "%u", index);

40750

- decl_name += '$';

40751

- decl_name += buf;

40752

- }

40753

- }

40754

- }

40755

- return get_identifier_from_string(decl_name);

40756

-}

40757

-

40758

// Get a tree for a named object.

40759

40760

tree

40761

@@ -1067,11 +999,6 @@

40762

return error_mark_node;

40763

}

40764

40765

- tree name;

40766

- if (this->classification_ == NAMED_OBJECT_TYPE)

40767

- name = NULL_TREE;

40768

- else

40769

- name = this->get_id(gogo);

40770

tree decl;

40771

switch (this->classification_)

40772

{

40773

@@ -1099,6 +1026,7 @@

40774

decl = error_mark_node;

40775

else if (INTEGRAL_TYPE_P(TREE_TYPE(expr_tree)))

40776

{

40777

+ tree name = get_identifier_from_string(this->get_id(gogo));

40778

decl = build_decl(named_constant->location().gcc_location(),

40779

CONST_DECL, name, TREE_TYPE(expr_tree));

40780

DECL_INITIAL(decl) = expr_tree;

40781

@@ -1161,7 +1089,7 @@

40782

case NAMED_OBJECT_FUNC:

40783

{

40784

Function* func = this->u_.func_value;

40785

- decl = func->get_or_make_decl(gogo, this, name);

40786

+ decl = function_to_tree(func->get_or_make_decl(gogo, this));

40787

if (decl != error_mark_node)

40788

{

40789

if (func->block() != NULL)

40790

@@ -1286,124 +1214,13 @@

40791

return block_tree;

40792

}

40793

40794

-// Get a tree for a function decl.

40795

+// Get the backend representation.

40796

40797

-tree

40798

-Function::get_or_make_decl(Gogo* gogo, Named_object* no, tree id)

40799

+Bfunction*

40800

+Function_declaration::get_or_make_decl(Gogo* gogo, Named_object* no)

40801

{

40802

- if (this->fndecl_ == NULL_TREE)

40803

+ if (this->fndecl_ == NULL)

40804

{

40805

- tree functype = type_to_tree(this->type_->get_backend(gogo));

40806

-

40807

- if (functype != error_mark_node)

40808

- {

40809

- // The type of a function comes back as a pointer to a

40810

- // struct whose first field is the function, but we want the

40811

- // real function type for a function declaration.

40812

- go_assert(POINTER_TYPE_P(functype)

40813

- && TREE_CODE(TREE_TYPE(functype)) == RECORD_TYPE);

40814

- functype = TREE_TYPE(TYPE_FIELDS(TREE_TYPE(functype)));

40815

- go_assert(FUNCTION_POINTER_TYPE_P(functype));

40816

- functype = TREE_TYPE(functype);

40817

- }

40818

-

40819

- if (functype == error_mark_node)

40820

- this->fndecl_ = error_mark_node;

40821

- else

40822

- {

40823

- tree decl = build_decl(this->location().gcc_location(), FUNCTION_DECL,

40824

- id, functype);

40825

-

40826

- this->fndecl_ = decl;

40827

-

40828

- if (no->package() != NULL)

40829

- ;

40830

- else if (this->enclosing_ != NULL || Gogo::is_thunk(no))

40831

- ;

40832

- else if (Gogo::unpack_hidden_name(no->name()) == "init"

40833

- && !this->type_->is_method())

40834

- ;

40835

- else if (Gogo::unpack_hidden_name(no->name()) == "main"

40836

- && gogo->is_main_package())

40837

- TREE_PUBLIC(decl) = 1;

40838

- // Methods have to be public even if they are hidden because

40839

- // they can be pulled into type descriptors when using

40840

- // anonymous fields.

40841

- else if (!Gogo::is_hidden_name(no->name())

40842

- || this->type_->is_method())

40843

- {

40844

- TREE_PUBLIC(decl) = 1;

40845

- std::string pkgpath = gogo->pkgpath_symbol();

40846

- if (this->type_->is_method()

40847

- && Gogo::is_hidden_name(no->name())

40848

- && Gogo::hidden_name_pkgpath(no->name()) != gogo->pkgpath())

40849

- {

40850

- // This is a method we created for an unexported

40851

- // method of an imported embedded type. We need to

40852

- // use the pkgpath of the imported package to avoid

40853

- // a possible name collision. See bug478 for a test

40854

- // case.

40855

- pkgpath = Gogo::hidden_name_pkgpath(no->name());

40856

- pkgpath = Gogo::pkgpath_for_symbol(pkgpath);

40857

- }

40858

-

40859

- std::string asm_name = pkgpath;

40860

- asm_name.append(1, '.');

40861

- asm_name.append(Gogo::unpack_hidden_name(no->name()));

40862

- if (this->type_->is_method())

40863

- {

40864

- asm_name.append(1, '.');

40865

- Type* rtype = this->type_->receiver()->type();

40866

- asm_name.append(rtype->mangled_name(gogo));

40867

- }

40868

- SET_DECL_ASSEMBLER_NAME(decl,

40869

- get_identifier_from_string(asm_name));

40870

- }

40871

-

40872

- // Why do we have to do this in the frontend?

40873

- tree restype = TREE_TYPE(functype);

40874

- tree resdecl =

40875

- build_decl(this->location().gcc_location(), RESULT_DECL, NULL_TREE,

40876

- restype);

40877

- DECL_ARTIFICIAL(resdecl) = 1;

40878

- DECL_IGNORED_P(resdecl) = 1;

40879

- DECL_CONTEXT(resdecl) = decl;

40880

- DECL_RESULT(decl) = resdecl;

40881

-

40882

- // If a function calls the predeclared recover function, we

40883

- // can't inline it, because recover behaves differently in a

40884

- // function passed directly to defer. If this is a recover

40885

- // thunk that we built to test whether a function can be

40886

- // recovered, we can't inline it, because that will mess up

40887

- // our return address comparison.

40888

- if (this->calls_recover_ || this->is_recover_thunk_)

40889

- DECL_UNINLINABLE(decl) = 1;

40890

-

40891

- // If this is a thunk created to call a function which calls

40892

- // the predeclared recover function, we need to disable

40893

- // stack splitting for the thunk.

40894

- if (this->is_recover_thunk_)

40895

- {

40896

- tree attr = get_identifier("__no_split_stack__");

40897

- DECL_ATTRIBUTES(decl) = tree_cons(attr, NULL_TREE, NULL_TREE);

40898

- }

40899

-

40900

- if (this->in_unique_section_)

40901

- resolve_unique_section (decl, 0, 1);

40902

-

40903

- go_preserve_from_gc(decl);

40904

- }

40905

- }

40906

- return this->fndecl_;

40907

-}

40908

-

40909

-// Get a tree for a function declaration.

40910

-

40911

-tree

40912

-Function_declaration::get_or_make_decl(Gogo* gogo, Named_object* no, tree id)

40913

-{

40914

- if (this->fndecl_ == NULL_TREE)

40915

- {

40916

// Let Go code use an asm declaration to pick up a builtin

40917

// function.

40918

if (!this->asm_name_.empty())

40919

@@ -1412,58 +1229,46 @@

40920

builtin_functions.find(this->asm_name_);

40921

if (p != builtin_functions.end())

40922

{

40923

- this->fndecl_ = p->second;

40924

+ this->fndecl_ = tree_to_function(p->second);

40925

return this->fndecl_;

40926

}

40927

}

40928

40929

- tree functype = type_to_tree(this->fntype_->get_backend(gogo));

40930

+ std::string asm_name;

40931

+ if (this->asm_name_.empty())

40932

+ {

40933

+ asm_name = (no->package() == NULL

40934

+ ? gogo->pkgpath_symbol()

40935

+ : no->package()->pkgpath_symbol());

40936

+ asm_name.append(1, '.');

40937

+ asm_name.append(Gogo::unpack_hidden_name(no->name()));

40938

+ if (this->fntype_->is_method())

40939

+ {

40940

+ asm_name.append(1, '.');

40941

+ Type* rtype = this->fntype_->receiver()->type();

40942

+ asm_name.append(rtype->mangled_name(gogo));

40943

+ }

40944

+ }

40945

40946

- if (functype != error_mark_node)

40947

- {

40948

- // The type of a function comes back as a pointer to a

40949

- // struct whose first field is the function, but we want the

40950

- // real function type for a function declaration.

40951

- go_assert(POINTER_TYPE_P(functype)

40952

- && TREE_CODE(TREE_TYPE(functype)) == RECORD_TYPE);

40953

- functype = TREE_TYPE(TYPE_FIELDS(TREE_TYPE(functype)));

40954

- go_assert(FUNCTION_POINTER_TYPE_P(functype));

40955

- functype = TREE_TYPE(functype);

40956

- }

40957

+ Btype* functype = this->fntype_->get_backend_fntype(gogo);

40958

+ this->fndecl_ =

40959

+ gogo->backend()->function(functype, no->get_id(gogo), asm_name,

40960

+ true, true, true, false, false,

40961

+ this->location());

40962

+ }

40963

40964

- tree decl;

40965

- if (functype == error_mark_node)

40966

- decl = error_mark_node;

40967

- else

40968

- {

40969

- decl = build_decl(this->location().gcc_location(), FUNCTION_DECL, id,

40970

- functype);

40971

- TREE_PUBLIC(decl) = 1;

40972

- DECL_EXTERNAL(decl) = 1;

40973

-

40974

- if (this->asm_name_.empty())

40975

- {

40976

- std::string asm_name = (no->package() == NULL

40977

- ? gogo->pkgpath_symbol()

40978

- : no->package()->pkgpath_symbol());

40979

- asm_name.append(1, '.');

40980

- asm_name.append(Gogo::unpack_hidden_name(no->name()));

40981

- if (this->fntype_->is_method())

40982

- {

40983

- asm_name.append(1, '.');

40984

- Type* rtype = this->fntype_->receiver()->type();

40985

- asm_name.append(rtype->mangled_name(gogo));

40986

- }

40987

- SET_DECL_ASSEMBLER_NAME(decl,

40988

- get_identifier_from_string(asm_name));

40989

- }

40990

- }

40991

- this->fndecl_ = decl;

40992

- go_preserve_from_gc(decl);

40993

- }

40994

return this->fndecl_;

40995

}

40996

40997

+// Return the function's decl after it has been built.

40998

+

40999

+tree

41000

+Function::get_decl() const

41001

+{

41002

+ go_assert(this->fndecl_ != NULL);

41003

+ return function_to_tree(this->fndecl_);

41004

+}

41005

+

41006

// We always pass the receiver to a method as a pointer. If the

41007

// receiver is actually declared as a non-pointer type, then we copy

41008

// the value into a local variable, so that it has the right type. In

41009

@@ -1558,7 +1363,7 @@

41010

void

41011

Function::build_tree(Gogo* gogo, Named_object* named_function)

41012

{

41013

- tree fndecl = this->fndecl_;

41014

+ tree fndecl = this->get_decl();

41015

go_assert(fndecl != NULL_TREE);

41016

41017

tree params = NULL_TREE;

41018

@@ -1796,7 +1601,7 @@

41019

set = NULL_TREE;

41020

else

41021

set = fold_build2_loc(end_loc.gcc_location(), MODIFY_EXPR, void_type_node,

41022

- DECL_RESULT(this->fndecl_), retval);

41023

+ DECL_RESULT(this->get_decl()), retval);

41024

tree ret_stmt = fold_build1_loc(end_loc.gcc_location(), RETURN_EXPR,

41025

void_type_node, set);

41026

append_to_statement_list(ret_stmt, &stmt_list);

41027

@@ -1851,7 +1656,7 @@

41028

retval = this->return_value(gogo, named_function, end_loc,

41029

&stmt_list);

41030

set = fold_build2_loc(end_loc.gcc_location(), MODIFY_EXPR, void_type_node,

41031

- DECL_RESULT(this->fndecl_), retval);

41032

+ DECL_RESULT(this->get_decl()), retval);

41033

ret_stmt = fold_build1_loc(end_loc.gcc_location(), RETURN_EXPR,

41034

void_type_node, set);

41035

41036

@@ -1869,7 +1674,7 @@

41037

*fini = stmt_list;

41038

}

41039

41040

-// Return the value to assign to DECL_RESULT(this->fndecl_). This may

41041

+// Return the value to assign to DECL_RESULT(this->get_decl()). This may

41042

// also add statements to STMT_LIST, which need to be executed before

41043

// the assignment. This is used for a return statement with no

41044

// explicit values.

41045

@@ -1902,7 +1707,7 @@

41046

}

41047

else

41048

{

41049

- tree rettype = TREE_TYPE(DECL_RESULT(this->fndecl_));

41050

+ tree rettype = TREE_TYPE(DECL_RESULT(this->get_decl()));

41051

retval = create_tmp_var(rettype, "RESULT");

41052

tree field = TYPE_FIELDS(rettype);

41053

int index = 0;

41054

@@ -2323,18 +2128,14 @@

41055

go_assert(m != NULL);

41056

41057

Named_object* no = m->named_object();

41058

-

41059

- tree fnid = no->get_id(this);

41060

-

41061

- tree fndecl;

41062

+ Bfunction* bf;

41063

if (no->is_function())

41064

- fndecl = no->func_value()->get_or_make_decl(this, no, fnid);

41065

+ bf = no->func_value()->get_or_make_decl(this, no);

41066

else if (no->is_function_declaration())

41067

- fndecl = no->func_declaration_value()->get_or_make_decl(this, no,

41068

- fnid);

41069

+ bf = no->func_declaration_value()->get_or_make_decl(this, no);

41070

else

41071

go_unreachable();

41072

- fndecl = build_fold_addr_expr(fndecl);

41073

+ tree fndecl = build_fold_addr_expr(function_to_tree(bf));

41074

41075

elt = pointers->quick_push(empty);

41076

elt->index = size_int(i);

41077

@@ -2353,10 +2154,11 @@

41078

TREE_CONSTANT(decl) = 1;

41079

DECL_INITIAL(decl) = constructor;

41080

41081

- // If the interface type has hidden methods, then this is the only

41082

- // definition of the table. Otherwise it is a comdat table which

41083

- // may be defined in multiple packages.

41084

- if (has_hidden_methods)

41085

+ // If the interface type has hidden methods, and the table is for a

41086

+ // named type, then this is the only definition of the table.

41087

+ // Otherwise it is a comdat table which may be defined in multiple

41088

+ // packages.

41089

+ if (has_hidden_methods && type->named_type() != NULL)

41090

TREE_PUBLIC(decl) = 1;

41091

else

41092

{

41093

Index: gcc/go/gofrontend/lex.cc

41094

===================================================================

41095

--- a/src/gcc/go/gofrontend/lex.cc (.../tags/gcc_4_8_2_release)

41096

+++ b/src/gcc/go/gofrontend/lex.cc (.../branches/gcc-4_8-branch)

41097

@@ -873,7 +873,28 @@

41098

&& (cc < 'a' || cc > 'z')

41099

&& cc != '_'

41100

&& (cc < '0' || cc > '9'))

41101

- break;

41102

+ {

41103

+ // Check for an invalid character here, as we get better

41104

+ // error behaviour if we swallow them as part of the

41105

+ // identifier we are building.

41106

+ if ((cc >= ' ' && cc < 0x7f)

41107

+ || cc == '\t'

41108

+ || cc == '\r'

41109

+ || cc == '\n')

41110

+ break;

41111

+

41112

+ this->lineoff_ = p - this->linebuf_;

41113

+ error_at(this->location(),

41114

+ "invalid character 0x%x in identifier",

41115

+ cc);

41116

+ if (!has_non_ascii_char)

41117

+ {

41118

+ buf.assign(pstart, p - pstart);

41119

+ has_non_ascii_char = true;

41120

+ }

41121

+ if (!Lex::is_invalid_identifier(buf))

41122

+ buf.append("$INVALID$");

41123

+ }

41124

++p;

41125

if (is_first)

41126

{

41127

Index: gcc/go/gofrontend/backend.h

41128

===================================================================

41129

--- a/src/gcc/go/gofrontend/backend.h (.../tags/gcc_4_8_2_release)

41130

+++ b/src/gcc/go/gofrontend/backend.h (.../branches/gcc-4_8-branch)

41131

@@ -23,7 +23,7 @@

41132

// The backend representation of a statement.

41133

class Bstatement;

41134

41135

-// The backend representation of a function definition.

41136

+// The backend representation of a function definition or declaration.

41137

class Bfunction;

41138

41139

// The backend representation of a block.

41140

@@ -266,6 +266,11 @@

41141

virtual Bexpression*

41142

convert_expression(Btype* type, Bexpression* expr, Location) = 0;

41143

41144

+ // Create an expression for the address of a function. This is used to

41145

+ // get the address of the code for a function.

41146

+ virtual Bexpression*

41147

+ function_code_expression(Bfunction*, Location) = 0;

41148

+

41149

// Statements.

41150

41151

// Create an error statement. This is used for cases which should

41152

@@ -498,6 +503,32 @@

41153

// recover.

41154

virtual Bexpression*

41155

label_address(Blabel*, Location) = 0;

41156

+

41157

+ // Functions.

41158

+

41159

+ // Create an error function. This is used for cases which should

41160

+ // not occur in a correct program, in order to keep the compilation

41161

+ // going without crashing.

41162

+ virtual Bfunction*

41163

+ error_function() = 0;

41164

+

41165

+ // Declare or define a function of FNTYPE.

41166

+ // NAME is the Go name of the function. ASM_NAME, if not the empty string, is

41167

+ // the name that should be used in the symbol table; this will be non-empty if

41168

+ // a magic extern comment is used.

41169

+ // IS_VISIBLE is true if this function should be visible outside of the

41170

+ // current compilation unit. IS_DECLARATION is true if this is a function

41171

+ // declaration rather than a definition; the function definition will be in

41172

+ // another compilation unit.

41173

+ // IS_INLINABLE is true if the function can be inlined.

41174

+ // DISABLE_SPLIT_STACK is true if this function may not split the stack; this

41175

+ // is used for the implementation of recover.

41176

+ // IN_UNIQUE_SECTION is true if this function should be put into a unique

41177

+ // location if possible; this is used for field tracking.

41178

+ virtual Bfunction*

41179

+ function(Btype* fntype, const std::string& name, const std::string& asm_name,

41180

+ bool is_visible, bool is_declaration, bool is_inlinable,

41181

+ bool disable_split_stack, bool in_unique_section, Location) = 0;

41182

};

41183

41184

// The backend interface has to define this function.

41185

@@ -517,5 +548,6 @@

41186

extern tree stat_to_tree(Bstatement*);

41187

extern tree block_to_tree(Bblock*);

41188

extern tree var_to_tree(Bvariable*);

41189

+extern tree function_to_tree(Bfunction*);

41190

41191

#endif // !defined(GO_BACKEND_H)

41192

Index: gcc/go/gofrontend/types.cc

41193

===================================================================

41194

--- a/src/gcc/go/gofrontend/types.cc (.../tags/gcc_4_8_2_release)

41195

+++ b/src/gcc/go/gofrontend/types.cc (.../branches/gcc-4_8-branch)

41196

@@ -1834,7 +1834,9 @@

41197

bloc);

41198

gogo->start_block(bloc);

41199

41200

- if (this->struct_type() != NULL)

41201

+ if (name != NULL && name->real_type()->named_type() != NULL)

41202

+ this->write_named_hash(gogo, name, hash_fntype, equal_fntype);

41203

+ else if (this->struct_type() != NULL)

41204

this->struct_type()->write_hash_function(gogo, name, hash_fntype,

41205

equal_fntype);

41206

else if (this->array_type() != NULL)

41207

@@ -1852,7 +1854,9 @@

41208

false, bloc);

41209

gogo->start_block(bloc);

41210

41211

- if (this->struct_type() != NULL)

41212

+ if (name != NULL && name->real_type()->named_type() != NULL)

41213

+ this->write_named_equal(gogo, name);

41214

+ else if (this->struct_type() != NULL)

41215

this->struct_type()->write_equal_function(gogo, name);

41216

else if (this->array_type() != NULL)

41217

this->array_type()->write_equal_function(gogo, name);

41218

@@ -1865,6 +1869,100 @@

41219

gogo->finish_function(bloc);

41220

}

41221

41222

+// Write a hash function that simply calls the hash function for a

41223

+// named type. This is used when one named type is defined as

41224

+// another. This ensures that this case works when the other named

41225

+// type is defined in another package and relies on calling hash

41226

+// functions defined only in that package.

41227

+

41228

+void

41229

+Type::write_named_hash(Gogo* gogo, Named_type* name,

41230

+ Function_type* hash_fntype, Function_type* equal_fntype)

41231

+{

41232

+ Location bloc = Linemap::predeclared_location();

41233

+

41234

+ Named_type* base_type = name->real_type()->named_type();

41235

+ go_assert(base_type != NULL);

41236

+

41237

+ // The pointer to the type we are going to hash. This is an

41238

+ // unsafe.Pointer.

41239

+ Named_object* key_arg = gogo->lookup("key", NULL);

41240

+ go_assert(key_arg != NULL);

41241

+

41242

+ // The size of the type we are going to hash.

41243

+ Named_object* keysz_arg = gogo->lookup("key_size", NULL);

41244

+ go_assert(keysz_arg != NULL);

41245

+

41246

+ Named_object* hash_fn;

41247

+ Named_object* equal_fn;

41248

+ name->real_type()->type_functions(gogo, base_type, hash_fntype, equal_fntype,

41249

+ &hash_fn, &equal_fn);

41250

+

41251

+ // Call the hash function for the base type.

41252

+ Expression* key_ref = Expression::make_var_reference(key_arg, bloc);

41253

+ Expression* keysz_ref = Expression::make_var_reference(keysz_arg, bloc);

41254

+ Expression_list* args = new Expression_list();

41255

+ args->push_back(key_ref);

41256

+ args->push_back(keysz_ref);

41257

+ Expression* func = Expression::make_func_reference(hash_fn, NULL, bloc);

41258

+ Expression* call = Expression::make_call(func, args, false, bloc);

41259

+

41260

+ // Return the hash of the base type.

41261

+ Expression_list* vals = new Expression_list();

41262

+ vals->push_back(call);

41263

+ Statement* s = Statement::make_return_statement(vals, bloc);

41264

+ gogo->add_statement(s);

41265

+}

41266

+

41267

+// Write an equality function that simply calls the equality function

41268

+// for a named type. This is used when one named type is defined as

41269

+// another. This ensures that this case works when the other named

41270

+// type is defined in another package and relies on calling equality

41271

+// functions defined only in that package.

41272

+

41273

+void

41274

+Type::write_named_equal(Gogo* gogo, Named_type* name)

41275

+{

41276

+ Location bloc = Linemap::predeclared_location();

41277

+

41278

+ // The pointers to the types we are going to compare. These have

41279

+ // type unsafe.Pointer.

41280

+ Named_object* key1_arg = gogo->lookup("key1", NULL);

41281

+ Named_object* key2_arg = gogo->lookup("key2", NULL);

41282

+ go_assert(key1_arg != NULL && key2_arg != NULL);

41283

+

41284

+ Named_type* base_type = name->real_type()->named_type();

41285

+ go_assert(base_type != NULL);

41286

+

41287

+ // Build temporaries with the base type.

41288

+ Type* pt = Type::make_pointer_type(base_type);

41289

+

41290

+ Expression* ref = Expression::make_var_reference(key1_arg, bloc);

41291

+ ref = Expression::make_cast(pt, ref, bloc);

41292

+ Temporary_statement* p1 = Statement::make_temporary(pt, ref, bloc);

41293

+ gogo->add_statement(p1);

41294

+

41295

+ ref = Expression::make_var_reference(key2_arg, bloc);

41296

+ ref = Expression::make_cast(pt, ref, bloc);

41297

+ Temporary_statement* p2 = Statement::make_temporary(pt, ref, bloc);

41298

+ gogo->add_statement(p2);

41299

+

41300

+ // Compare the values for equality.

41301

+ Expression* t1 = Expression::make_temporary_reference(p1, bloc);

41302

+ t1 = Expression::make_unary(OPERATOR_MULT, t1, bloc);

41303

+

41304

+ Expression* t2 = Expression::make_temporary_reference(p2, bloc);

41305

+ t2 = Expression::make_unary(OPERATOR_MULT, t2, bloc);

41306

+

41307

+ Expression* cond = Expression::make_binary(OPERATOR_EQEQ, t1, t2, bloc);

41308

+

41309

+ // Return the equality comparison.

41310

+ Expression_list* vals = new Expression_list();

41311

+ vals->push_back(cond);

41312

+ Statement* s = Statement::make_return_statement(vals, bloc);

41313

+ gogo->add_statement(s);

41314

+}

41315

+

41316

// Return a composite literal for the type descriptor for a plain type

41317

// of kind RUNTIME_TYPE_KIND named NAME.

41318

41319

@@ -2164,26 +2262,9 @@

41320

41321

++p;

41322

go_assert(p->is_field_name("typ"));

41323

- if (!only_value_methods && m->is_value_method())

41324

- {

41325

- // This is a value method on a pointer type. Change the type of

41326

- // the method to use a pointer receiver. The implementation

41327

- // always uses a pointer receiver anyhow.

41328

- Type* rtype = mtype->receiver()->type();

41329

- Type* prtype = Type::make_pointer_type(rtype);

41330

- Typed_identifier* receiver =

41331

- new Typed_identifier(mtype->receiver()->name(), prtype,

41332

- mtype->receiver()->location());

41333

- mtype = Type::make_function_type(receiver,

41334

- (mtype->parameters() == NULL

41335

- ? NULL

41336

- : mtype->parameters()->copy()),

41337

- (mtype->results() == NULL

41338

- ? NULL

41339

- : mtype->results()->copy()),

41340

- mtype->location());

41341

- }

41342

- vals->push_back(Expression::make_type_descriptor(mtype, bloc));

41343

+ bool want_pointer_receiver = !only_value_methods && m->is_value_method();

41344

+ nonmethod_type = mtype->copy_with_receiver_as_param(want_pointer_receiver);

41345

+ vals->push_back(Expression::make_type_descriptor(nonmethod_type, bloc));

41346

41347

++p;

41348

go_assert(p->is_field_name("tfn"));

41349

@@ -3383,6 +3464,68 @@

41350

// Get the backend representation for a function type.

41351

41352

Btype*

41353

+Function_type::get_backend_fntype(Gogo* gogo)

41354

+{

41355

+ if (this->fnbtype_ == NULL)

41356

+ {

41357

+ Backend::Btyped_identifier breceiver;

41358

+ if (this->receiver_ != NULL)

41359

+ {

41360

+ breceiver.name = Gogo::unpack_hidden_name(this->receiver_->name());

41361

+

41362

+ // We always pass the address of the receiver parameter, in

41363

+ // order to make interface calls work with unknown types.

41364

+ Type* rtype = this->receiver_->type();

41365

+ if (rtype->points_to() == NULL)

41366

+ rtype = Type::make_pointer_type(rtype);

41367

+ breceiver.btype = rtype->get_backend(gogo);

41368

+ breceiver.location = this->receiver_->location();

41369

+ }

41370

+

41371

+ std::vector<Backend::Btyped_identifier> bparameters;

41372

+ if (this->parameters_ != NULL)

41373

+ {

41374

+ bparameters.resize(this->parameters_->size());

41375

+ size_t i = 0;

41376

+ for (Typed_identifier_list::const_iterator p =

41377

+ this->parameters_->begin(); p != this->parameters_->end();

41378

+ ++p, ++i)

41379

+ {

41380

+ bparameters[i].name = Gogo::unpack_hidden_name(p->name());

41381

+ bparameters[i].btype = p->type()->get_backend(gogo);

41382

+ bparameters[i].location = p->location();

41383

+ }

41384

+ go_assert(i == bparameters.size());

41385

+ }

41386

+

41387

+ std::vector<Backend::Btyped_identifier> bresults;

41388

+ if (this->results_ != NULL)

41389

+ {

41390

+ bresults.resize(this->results_->size());

41391

+ size_t i = 0;

41392

+ for (Typed_identifier_list::const_iterator p =

41393

+ this->results_->begin(); p != this->results_->end();

41394

+ ++p, ++i)

41395

+ {

41396

+ bresults[i].name = Gogo::unpack_hidden_name(p->name());

41397

+ bresults[i].btype = p->type()->get_backend(gogo);

41398

+ bresults[i].location = p->location();

41399

+ }

41400

+ go_assert(i == bresults.size());

41401

+ }

41402

+

41403

+ this->fnbtype_ = gogo->backend()->function_type(breceiver, bparameters,

41404

+ bresults,

41405

+ this->location());

41406

+

41407

+ }

41408

+

41409

+ return this->fnbtype_;

41410

+}

41411

+

41412

+// Get the backend representation for a Go function type.

41413

+

41414

+Btype*

41415

Function_type::do_get_backend(Gogo* gogo)

41416

{

41417

// When we do anything with a function value other than call it, it

41418

@@ -3395,57 +3538,9 @@

41419

gogo->backend()->placeholder_struct_type("__go_descriptor", loc);

41420

Btype* ptr_struct_type = gogo->backend()->pointer_type(struct_type);

41421

41422

- Backend::Btyped_identifier breceiver;

41423

- if (this->receiver_ != NULL)

41424

- {

41425

- breceiver.name = Gogo::unpack_hidden_name(this->receiver_->name());

41426

-

41427

- // We always pass the address of the receiver parameter, in

41428

- // order to make interface calls work with unknown types.

41429

- Type* rtype = this->receiver_->type();

41430

- if (rtype->points_to() == NULL)

41431

- rtype = Type::make_pointer_type(rtype);

41432

- breceiver.btype = rtype->get_backend(gogo);

41433

- breceiver.location = this->receiver_->location();

41434

- }

41435

-

41436

- std::vector<Backend::Btyped_identifier> bparameters;

41437

- if (this->parameters_ != NULL)

41438

- {

41439

- bparameters.resize(this->parameters_->size());

41440

- size_t i = 0;

41441

- for (Typed_identifier_list::const_iterator p = this->parameters_->begin();

41442

- p != this->parameters_->end();

41443

- ++p, ++i)

41444

- {

41445

- bparameters[i].name = Gogo::unpack_hidden_name(p->name());

41446

- bparameters[i].btype = p->type()->get_backend(gogo);

41447

- bparameters[i].location = p->location();

41448

- }

41449

- go_assert(i == bparameters.size());

41450

- }

41451

-

41452

- std::vector<Backend::Btyped_identifier> bresults;

41453

- if (this->results_ != NULL)

41454

- {

41455

- bresults.resize(this->results_->size());

41456

- size_t i = 0;

41457

- for (Typed_identifier_list::const_iterator p = this->results_->begin();

41458

- p != this->results_->end();

41459

- ++p, ++i)

41460

- {

41461

- bresults[i].name = Gogo::unpack_hidden_name(p->name());

41462

- bresults[i].btype = p->type()->get_backend(gogo);

41463

- bresults[i].location = p->location();

41464

- }

41465

- go_assert(i == bresults.size());

41466

- }

41467

-

41468

- Btype* fntype = gogo->backend()->function_type(breceiver, bparameters,

41469

- bresults, loc);

41470

std::vector<Backend::Btyped_identifier> fields(1);

41471

fields[0].name = "code";

41472

- fields[0].btype = fntype;

41473

+ fields[0].btype = this->get_backend_fntype(gogo);

41474

fields[0].location = loc;

41475

if (!gogo->backend()->set_placeholder_struct_type(struct_type, fields))

41476

return gogo->backend()->error_type();

41477

@@ -3821,6 +3916,32 @@

41478

return ret;

41479

}

41480

41481

+// Make a copy of a function type with the receiver as the first

41482

+// parameter.

41483

+

41484

+Function_type*

41485

+Function_type::copy_with_receiver_as_param(bool want_pointer_receiver) const

41486

+{

41487

+ go_assert(this->is_method());

41488

+ Typed_identifier_list* new_params = new Typed_identifier_list();

41489

+ Type* rtype = this->receiver_->type();

41490

+ if (want_pointer_receiver)

41491

+ rtype = Type::make_pointer_type(rtype);

41492

+ Typed_identifier receiver(this->receiver_->name(), rtype,

41493

+ this->receiver_->location());

41494

+ new_params->push_back(receiver);

41495

+ const Typed_identifier_list* orig_params = this->parameters_;

41496

+ if (orig_params != NULL && !orig_params->empty())

41497

+ {

41498

+ for (Typed_identifier_list::const_iterator p = orig_params->begin();

41499

+ p != orig_params->end();

41500

+ ++p)

41501

+ new_params->push_back(*p);

41502

+ }

41503

+ return Type::make_function_type(NULL, new_params, this->results_,

41504

+ this->location_);

41505

+}

41506

+

41507

// Make a copy of a function type ignoring any receiver and adding a

41508

// closure parameter.

41509

41510

@@ -4195,7 +4316,8 @@

41511

41512

// This is a horrible hack caused by the fact that we don't pack

41513

// the names of builtin types. FIXME.

41514

- if (nt != NULL

41515

+ if (!this->is_imported_

41516

+ && nt != NULL

41517

&& nt->is_builtin()

41518

&& nt->name() == Gogo::unpack_hidden_name(name))

41519

return true;

41520

@@ -4204,6 +4326,36 @@

41521

}

41522

}

41523

41524

+// Return whether this field is an unexported field named NAME.

41525

+

41526

+bool

41527

+Struct_field::is_unexported_field_name(Gogo* gogo,

41528

+ const std::string& name) const

41529

+{

41530

+ const std::string& field_name(this->field_name());

41531

+ if (Gogo::is_hidden_name(field_name)

41532

+ && name == Gogo::unpack_hidden_name(field_name)

41533

+ && gogo->pack_hidden_name(name, false) != field_name)

41534

+ return true;

41535

+

41536

+ // Check for the name of a builtin type. This is like the test in

41537

+ // is_field_name, only there we return false if this->is_imported_,

41538

+ // and here we return true.

41539

+ if (this->is_imported_ && this->is_anonymous())

41540

+ {

41541

+ Type* t = this->typed_identifier_.type();

41542

+ if (t->points_to() != NULL)

41543

+ t = t->points_to();

41544

+ Named_type* nt = t->named_type();

41545

+ if (nt != NULL

41546

+ && nt->is_builtin()

41547

+ && nt->name() == Gogo::unpack_hidden_name(name))

41548

+ return true;

41549

+ }

41550

+

41551

+ return false;

41552

+}

41553

+

41554

// Return whether this field is an embedded built-in type.

41555

41556

bool

41557

@@ -4264,13 +4416,8 @@

41558

++p)

41559

{

41560

Type* t = p->type();

41561

- if (t->is_undefined())

41562

+ if (p->is_anonymous())

41563

{

41564

- error_at(p->location(), "struct field type is incomplete");

41565

- p->set_type(Type::make_error_type());

41566

- }

41567

- else if (p->is_anonymous())

41568

- {

41569

if (t->named_type() != NULL && t->points_to() != NULL)

41570

{

41571

error_at(p->location(), "embedded type may not be a pointer");

41572

@@ -4641,13 +4788,8 @@

41573

for (Struct_field_list::const_iterator pf = fields->begin();

41574

pf != fields->end();

41575

++pf)

41576

- {

41577

- const std::string& field_name(pf->field_name());

41578

- if (Gogo::is_hidden_name(field_name)

41579

- && name == Gogo::unpack_hidden_name(field_name)

41580

- && gogo->pack_hidden_name(name, false) != field_name)

41581

- return true;

41582

- }

41583

+ if (pf->is_unexported_field_name(gogo, name))

41584

+ return true;

41585

}

41586

return false;

41587

}

41588

@@ -5250,6 +5392,7 @@

41589

Type* ftype = imp->read_type();

41590

41591

Struct_field sf(Typed_identifier(name, ftype, imp->location()));

41592

+ sf.set_is_imported();

41593

41594

if (imp->peek_char() == ' ')

41595

{

41596

@@ -9022,6 +9165,8 @@

41597

fntype->is_varargs(), location);

41598

gogo->finish_function(fntype->location());

41599

41600

+ if (type->named_type() == NULL && stub->is_function())

41601

+ stub->func_value()->set_is_unnamed_type_stub_method();

41602

if (m->nointerface() && stub->is_function())

41603

stub->func_value()->set_nointerface();

41604

}

41605

@@ -9289,7 +9434,9 @@

41606

else

41607

{

41608

bool is_unexported;

41609

- if (!Gogo::is_hidden_name(name))

41610

+ // The test for 'a' and 'z' is to handle builtin names,

41611

+ // which are not hidden.

41612

+ if (!Gogo::is_hidden_name(name) && (name[0] < 'a' || name[0] > 'z'))

41613

is_unexported = false;

41614

else

41615

{

41616

Index: gcc/go/gofrontend/expressions.cc

41617

===================================================================

41618

--- a/src/gcc/go/gofrontend/expressions.cc (.../tags/gcc_4_8_2_release)

41619

+++ b/src/gcc/go/gofrontend/expressions.cc (.../branches/gcc-4_8-branch)

41620

@@ -1219,7 +1219,7 @@

41621

41622

// Get the tree for the code of a function expression.

41623

41624

-tree

41625

+Bexpression*

41626

Func_expression::get_code_pointer(Gogo* gogo, Named_object* no, Location loc)

41627

{

41628

Function_type* fntype;

41629

@@ -1237,25 +1237,18 @@

41630

error_at(loc,

41631

"invalid use of special builtin function %qs; must be called",

41632

no->message_name().c_str());

41633

- return error_mark_node;

41634

+ return gogo->backend()->error_expression();

41635

}

41636

41637

- tree id = no->get_id(gogo);

41638

- if (id == error_mark_node)

41639

- return error_mark_node;

41640

-

41641

- tree fndecl;

41642

+ Bfunction* fndecl;

41643

if (no->is_function())

41644

- fndecl = no->func_value()->get_or_make_decl(gogo, no, id);

41645

+ fndecl = no->func_value()->get_or_make_decl(gogo, no);

41646

else if (no->is_function_declaration())

41647

- fndecl = no->func_declaration_value()->get_or_make_decl(gogo, no, id);

41648

+ fndecl = no->func_declaration_value()->get_or_make_decl(gogo, no);

41649

else

41650

go_unreachable();

41651

41652

- if (fndecl == error_mark_node)

41653

- return error_mark_node;

41654

-

41655

- return build_fold_addr_expr_loc(loc.gcc_location(), fndecl);

41656

+ return gogo->backend()->function_code_expression(fndecl, loc);

41657

}

41658

41659

// Get the tree for a function expression. This is used when we take

41660

@@ -1492,8 +1485,10 @@

41661

tree

41662

Func_code_reference_expression::do_get_tree(Translate_context* context)

41663

{

41664

- return Func_expression::get_code_pointer(context->gogo(), this->function_,

41665

- this->location());

41666

+ Bexpression* ret =

41667

+ Func_expression::get_code_pointer(context->gogo(), this->function_,

41668

+ this->location());

41669

+ return expr_to_tree(ret);

41670

}

41671

41672

// Make a reference to the code of a function.

41673

@@ -3055,8 +3050,7 @@

41674

do_lower(Gogo*, Named_object*, Statement_inserter*, int);

41675

41676

bool

41677

- do_is_constant() const

41678

- { return this->expr_->is_constant(); }

41679

+ do_is_constant() const;

41680

41681

bool

41682

do_numeric_constant_value(Numeric_constant*) const;

41683

@@ -3198,6 +3192,27 @@

41684

return this;

41685

}

41686

41687

+// Return whether a type conversion is a constant.

41688

+

41689

+bool

41690

+Type_conversion_expression::do_is_constant() const

41691

+{

41692

+ if (!this->expr_->is_constant())

41693

+ return false;

41694

+

41695

+ // A conversion to a type that may not be used as a constant is not

41696

+ // a constant. For example, []byte(nil).

41697

+ Type* type = this->type_;

41698

+ if (type->integer_type() == NULL

41699

+ && type->float_type() == NULL

41700

+ && type->complex_type() == NULL

41701

+ && !type->is_boolean_type()

41702

+ && !type->is_string_type())

41703

+ return false;

41704

+

41705

+ return true;

41706

+}

41707

+

41708

// Return the constant numeric value if there is one.

41709

41710

bool

41711

@@ -5586,6 +5601,15 @@

41712

subcontext.type = NULL;

41713

}

41714

41715

+ if (this->op_ == OPERATOR_ANDAND || this->op_ == OPERATOR_OROR)

41716

+ {

41717

+ // For a logical operation, the context does not determine the

41718

+ // types of the operands. The operands must be some boolean

41719

+ // type but if the context has a boolean type they do not

41720

+ // inherit it. See http://golang.org/issue/3924.

41721

+ subcontext.type = NULL;

41722

+ }

41723

+

41724

// Set the context for the left hand operand.

41725

if (is_shift_op)

41726

{

41727

@@ -5967,6 +5991,43 @@

41728

right);

41729

}

41730

41731

+ // For complex division Go wants slightly different results than the

41732

+ // GCC library provides, so we have our own runtime routine.

41733

+ if (this->op_ == OPERATOR_DIV && this->left_->type()->complex_type() != NULL)

41734

+ {

41735

+ const char *name;

41736

+ tree *pdecl;

41737

+ Type* ctype;

41738

+ static tree complex64_div_decl;

41739

+ static tree complex128_div_decl;

41740

+ switch (this->left_->type()->complex_type()->bits())

41741

+ {

41742

+ case 64:

41743

+ name = "__go_complex64_div";

41744

+ pdecl = &complex64_div_decl;

41745

+ ctype = Type::lookup_complex_type("complex64");

41746

+ break;

41747

+ case 128:

41748

+ name = "__go_complex128_div";

41749

+ pdecl = &complex128_div_decl;

41750

+ ctype = Type::lookup_complex_type("complex128");

41751

+ break;

41752

+ default:

41753

+ go_unreachable();

41754

+ }

41755

+ Btype* cbtype = ctype->get_backend(gogo);

41756

+ tree ctype_tree = type_to_tree(cbtype);

41757

+ return Gogo::call_builtin(pdecl,

41758

+ this->location(),

41759

+ name,

41760

+ 2,

41761

+ ctype_tree,

41762

+ ctype_tree,

41763

+ fold_convert_loc(gccloc, ctype_tree, left),

41764

+ type,

41765

+ fold_convert_loc(gccloc, ctype_tree, right));

41766

+ }

41767

+

41768

tree compute_type = excess_precision_type(type);

41769

if (compute_type != NULL_TREE)

41770

{

41771

@@ -7191,6 +7252,15 @@

41772

if (this->code_ == BUILTIN_OFFSETOF)

41773

{

41774

Expression* arg = this->one_arg();

41775

+

41776

+ if (arg->bound_method_expression() != NULL

41777

+ || arg->interface_field_reference_expression() != NULL)

41778

+ {

41779

+ this->report_error(_("invalid use of method value as argument "

41780

+ "of Offsetof"));

41781

+ return this;

41782

+ }

41783

+

41784

Field_reference_expression* farg = arg->field_reference_expression();

41785

while (farg != NULL)

41786

{

41787

@@ -7200,7 +7270,8 @@

41788

// it must not be reached through pointer indirections.

41789

if (farg->expr()->deref() != farg->expr())

41790

{

41791

- this->report_error(_("argument of Offsetof implies indirection of an embedded field"));

41792

+ this->report_error(_("argument of Offsetof implies "

41793

+ "indirection of an embedded field"));

41794

return this;

41795

}

41796

// Go up until we reach the original base.

41797

@@ -7476,7 +7547,7 @@

41798

switch (nc.to_unsigned_long(&v))

41799

{

41800

case Numeric_constant::NC_UL_VALID:

41801

- return true;

41802

+ break;

41803

case Numeric_constant::NC_UL_NOTINT:

41804

error_at(e->location(), "non-integer %s argument to make",

41805

is_length ? "len" : "cap");

41806

@@ -7488,8 +7559,23 @@

41807

case Numeric_constant::NC_UL_BIG:

41808

// We don't want to give a compile-time error for a 64-bit

41809

// value on a 32-bit target.

41810

- return true;

41811

+ break;

41812

}

41813

+

41814

+ mpz_t val;

41815

+ if (!nc.to_int(&val))

41816

+ go_unreachable();

41817

+ int bits = mpz_sizeinbase(val, 2);

41818

+ mpz_clear(val);

41819

+ Type* int_type = Type::lookup_integer_type("int");

41820

+ if (bits >= int_type->integer_type()->bits())

41821

+ {

41822

+ error_at(e->location(), "%s argument too large for make",

41823

+ is_length ? "len" : "cap");

41824

+ return false;

41825

+ }

41826

+

41827

+ return true;

41828

}

41829

41830

if (e->type()->integer_type() != NULL)

41831

@@ -7595,6 +7681,8 @@

41832

bool

41833

Builtin_call_expression::do_is_constant() const

41834

{

41835

+ if (this->is_error_expression())

41836

+ return true;

41837

switch (this->code_)

41838

{

41839

case BUILTIN_LEN:

41840

@@ -9744,15 +9832,9 @@

41841

}

41842

41843

tree fntype_tree = type_to_tree(fntype->get_backend(gogo));

41844

- if (fntype_tree == error_mark_node)

41845

+ tree fnfield_type = type_to_tree(fntype->get_backend_fntype(gogo));

41846

+ if (fntype_tree == error_mark_node || fnfield_type == error_mark_node)

41847

return error_mark_node;

41848

- go_assert(POINTER_TYPE_P(fntype_tree));

41849

- if (TREE_TYPE(fntype_tree) == error_mark_node)

41850

- return error_mark_node;

41851

- go_assert(TREE_CODE(TREE_TYPE(fntype_tree)) == RECORD_TYPE);

41852

- tree fnfield_type = TREE_TYPE(TYPE_FIELDS(TREE_TYPE(fntype_tree)));

41853

- if (fnfield_type == error_mark_node)

41854

- return error_mark_node;

41855

go_assert(FUNCTION_POINTER_TYPE_P(fnfield_type));

41856

tree rettype = TREE_TYPE(TREE_TYPE(fnfield_type));

41857

if (rettype == error_mark_node)

41858

@@ -9763,7 +9845,7 @@

41859

if (func != NULL)

41860

{

41861

Named_object* no = func->named_object();

41862

- fn = Func_expression::get_code_pointer(gogo, no, location);

41863

+ fn = expr_to_tree(Func_expression::get_code_pointer(gogo, no, location));

41864

if (!has_closure)

41865

closure_tree = NULL_TREE;

41866

else

41867

@@ -10817,11 +10899,20 @@

41868

void

41869

String_index_expression::do_check_types(Gogo*)

41870

{

41871

- if (this->start_->type()->integer_type() == NULL)

41872

+ Numeric_constant nc;

41873

+ unsigned long v;

41874

+ if (this->start_->type()->integer_type() == NULL

41875

+ && !this->start_->type()->is_error()

41876

+ && (!this->start_->numeric_constant_value(&nc)

41877

+ || nc.to_unsigned_long(&v) == Numeric_constant::NC_UL_NOTINT))

41878

this->report_error(_("index must be integer"));

41879

if (this->end_ != NULL

41880

&& this->end_->type()->integer_type() == NULL

41881

- && !this->end_->is_nil_expression())

41882

+ && !this->end_->type()->is_error()

41883

+ && !this->end_->is_nil_expression()

41884

+ && !this->end_->is_error_expression()

41885

+ && (!this->end_->numeric_constant_value(&nc)

41886

+ || nc.to_unsigned_long(&v) == Numeric_constant::NC_UL_NOTINT))

41887

this->report_error(_("slice end must be integer"));

41888

41889

std::string sval;

41890

Index: gcc/opts.c

41891

===================================================================

41892

--- a/src/gcc/opts.c (.../tags/gcc_4_8_2_release)

41893

+++ b/src/gcc/opts.c (.../branches/gcc-4_8-branch)

41894

@@ -425,8 +425,8 @@

41895

{ OPT_LEVELS_1_PLUS, OPT_fguess_branch_probability, NULL, 1 },

41896

{ OPT_LEVELS_1_PLUS, OPT_fcprop_registers, NULL, 1 },

41897

{ OPT_LEVELS_1_PLUS, OPT_fforward_propagate, NULL, 1 },

41898

- { OPT_LEVELS_1_PLUS, OPT_fif_conversion, NULL, 1 },

41899

- { OPT_LEVELS_1_PLUS, OPT_fif_conversion2, NULL, 1 },

41900

+ { OPT_LEVELS_1_PLUS_NOT_DEBUG, OPT_fif_conversion, NULL, 1 },

41901

+ { OPT_LEVELS_1_PLUS_NOT_DEBUG, OPT_fif_conversion2, NULL, 1 },

41902

{ OPT_LEVELS_1_PLUS, OPT_fipa_pure_const, NULL, 1 },

41903

{ OPT_LEVELS_1_PLUS, OPT_fipa_reference, NULL, 1 },

41904

{ OPT_LEVELS_1_PLUS, OPT_fipa_profile, NULL, 1 },

41905

Index: gcc/recog.c

41906

===================================================================

41907

--- a/src/gcc/recog.c (.../tags/gcc_4_8_2_release)

41908

+++ b/src/gcc/recog.c (.../branches/gcc-4_8-branch)

41909

@@ -3061,6 +3061,9 @@

41910

return 1;

41911

}

41912

41913

+/* Regno offset to be used in the register search. */

41914

+static int search_ofs;

41915

+

41916

/* Try to find a hard register of mode MODE, matching the register class in

41917

CLASS_STR, which is available at the beginning of insn CURRENT_INSN and

41918

remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,

41919

@@ -3076,7 +3079,6 @@

41920

peep2_find_free_register (int from, int to, const char *class_str,

41921

enum machine_mode mode, HARD_REG_SET *reg_set)

41922

{

41923

- static int search_ofs;

41924

enum reg_class cl;

41925

HARD_REG_SET live;

41926

df_ref *def_rec;

41927

@@ -3541,6 +3543,7 @@

41928

/* Initialize the regsets we're going to use. */

41929

for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)

41930

peep2_insn_data[i].live_before = BITMAP_ALLOC (&reg_obstack);

41931

+ search_ofs = 0;

41932

live = BITMAP_ALLOC (&reg_obstack);

41933

41934

FOR_EACH_BB_REVERSE (bb)

41935

Index: gcc/ada/system-linux-s390x.ads

41936

===================================================================

41937

--- a/src/gcc/ada/system-linux-s390x.ads (.../tags/gcc_4_8_2_release)

41938

+++ b/src/gcc/ada/system-linux-s390x.ads (.../branches/gcc-4_8-branch)

41939

@@ -7,7 +7,7 @@

41940

-- S p e c --

41941

-- (GNU-Linux/s390x Version) --

41942

-- --

41943

41944

41945

-- --

41946

-- This specification is derived from the Ada Reference Manual for use with --

41947

-- GNAT. The copyright notice above, and the license provisions that follow --

41948

@@ -35,9 +35,10 @@

41949

------------------------------------------------------------------------------

41950

41951

package System is

41952

-pragma Pure (System);

41953

--- Note that we take advantage of the implementation permission to

41954

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

41955

+ pragma Pure;

41956

+ -- Note that we take advantage of the implementation permission to make

41957

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

41958

+ -- 2005, this is Pure in any case (AI-362).

41959

41960

type Name is (SYSTEM_NAME_GNAT);

41961

System_Name : constant Name := SYSTEM_NAME_GNAT;

41962

@@ -61,6 +62,7 @@

41963

-- Storage-related Declarations

41964

41965

type Address is private;

41966

+ pragma Preelaborable_Initialization (Address);

41967

Null_Address : constant Address;

41968

41969

Storage_Unit : constant := 8;

41970

Index: gcc/ada/system-linux-alpha.ads

41971

===================================================================

41972

--- a/src/gcc/ada/system-linux-alpha.ads (.../tags/gcc_4_8_2_release)

41973

+++ b/src/gcc/ada/system-linux-alpha.ads (.../branches/gcc-4_8-branch)

41974

@@ -7,7 +7,7 @@

41975

-- S p e c --

41976

-- (GNU-Linux/alpha Version) --

41977

-- --

41978

41979

41980

-- --

41981

-- This specification is derived from the Ada Reference Manual for use with --

41982

-- GNAT. The copyright notice above, and the license provisions that follow --

41983

@@ -35,9 +35,10 @@

41984

------------------------------------------------------------------------------

41985

41986

package System is

41987

-pragma Pure (System);

41988

--- Note that we take advantage of the implementation permission to

41989

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

41990

+ pragma Pure;

41991

+ -- Note that we take advantage of the implementation permission to make

41992

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

41993

+ -- 2005, this is Pure in any case (AI-362).

41994

41995

type Name is (SYSTEM_NAME_GNAT);

41996

System_Name : constant Name := SYSTEM_NAME_GNAT;

41997

@@ -61,6 +62,7 @@

41998

-- Storage-related Declarations

41999

42000

type Address is private;

42001

+ pragma Preelaborable_Initialization (Address);

42002

Null_Address : constant Address;

42003

42004

Storage_Unit : constant := 8;

42005

Index: gcc/ada/system-vxworks-arm.ads

42006

===================================================================

42007

--- a/src/gcc/ada/system-vxworks-arm.ads (.../tags/gcc_4_8_2_release)

42008

+++ b/src/gcc/ada/system-vxworks-arm.ads (.../branches/gcc-4_8-branch)

42009

@@ -7,7 +7,7 @@

42010

-- S p e c --

42011

-- (VxWorks Version ARM) --

42012

-- --

42013

42014

42015

-- --

42016

-- This specification is derived from the Ada Reference Manual for use with --

42017

-- GNAT. The copyright notice above, and the license provisions that follow --

42018

@@ -35,10 +35,10 @@

42019

------------------------------------------------------------------------------

42020

42021

package System is

42022

-pragma Pure (System);

42023

--- Note that we take advantage of the implementation permission to make this

42024

--- unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada 2005, this is

42025

--- Pure in any case (AI-362).

42026

+ pragma Pure;

42027

+ -- Note that we take advantage of the implementation permission to make

42028

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

42029

+ -- 2005, this is Pure in any case (AI-362).

42030

42031

type Name is (SYSTEM_NAME_GNAT);

42032

System_Name : constant Name := SYSTEM_NAME_GNAT;

42033

Index: gcc/ada/system-linux-s390.ads

42034

===================================================================

42035

--- a/src/gcc/ada/system-linux-s390.ads (.../tags/gcc_4_8_2_release)

42036

+++ b/src/gcc/ada/system-linux-s390.ads (.../branches/gcc-4_8-branch)

42037

@@ -7,7 +7,7 @@

42038

-- S p e c --

42039

-- (GNU-Linux/s390 Version) --

42040

-- --

42041

42042

42043

-- --

42044

-- This specification is derived from the Ada Reference Manual for use with --

42045

-- GNAT. The copyright notice above, and the license provisions that follow --

42046

@@ -35,9 +35,10 @@

42047

------------------------------------------------------------------------------

42048

42049

package System is

42050

-pragma Pure (System);

42051

--- Note that we take advantage of the implementation permission to

42052

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

42053

+ pragma Pure;

42054

+ -- Note that we take advantage of the implementation permission to make

42055

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

42056

+ -- 2005, this is Pure in any case (AI-362).

42057

42058

type Name is (SYSTEM_NAME_GNAT);

42059

System_Name : constant Name := SYSTEM_NAME_GNAT;

42060

@@ -61,6 +62,7 @@

42061

-- Storage-related Declarations

42062

42063

type Address is private;

42064

+ pragma Preelaborable_Initialization (Address);

42065

Null_Address : constant Address;

42066

42067

Storage_Unit : constant := 8;

42068

Index: gcc/ada/indepsw-darwin.adb

42069

===================================================================

42070

--- a/src/gcc/ada/indepsw-darwin.adb (.../tags/gcc_4_8_2_release)

42071

+++ b/src/gcc/ada/indepsw-darwin.adb (.../branches/gcc-4_8-branch)

42072

@@ -0,0 +1,67 @@

42073

+------------------------------------------------------------------------------

42074

+-- --

42075

+-- GNAT COMPILER COMPONENTS --

42076

+-- --

42077

+-- I N D E P S W --

42078

+-- --

42079

+-- B o d y --

42080

+-- (Darwin version) --

42081

+-- --

42082

42083

+-- --

42084

+-- GNAT is free software; you can redistribute it and/or modify it under --

42085

+-- terms of the GNU General Public License as published by the Free Soft- --

42086

+-- ware Foundation; either version 3, or (at your option) any later ver- --

42087

+-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --

42088

+-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --

42089

+-- or FITNESS FOR A PARTICULAR PURPOSE. --

42090

+-- --

42091

+-- As a special exception under Section 7 of GPL version 3, you are granted --

42092

+-- additional permissions described in the GCC Runtime Library Exception, --

42093

+-- version 3.1, as published by the Free Software Foundation. --

42094

+-- --

42095

+-- You should have received a copy of the GNU General Public License and --

42096

+-- a copy of the GCC Runtime Library Exception along with this program; --

42097

+-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see --

42098

+-- <http://www.gnu.org/licenses/>. --

42099

+-- --

42100

+-- GNAT was originally developed by the GNAT team at New York University. --

42101

+-- Extensive contributions were provided by Ada Core Technologies Inc. --

42102

+-- --

42103

+------------------------------------------------------------------------------

42104

+

42105

+-- This is the Darwin version

42106

+

42107

+package body Indepsw is

42108

+

42109

+ Map_Switch : aliased constant String := "-Wl,-map,";

42110

+

42111

+ -------------

42112

+ -- Convert --

42113

+ -------------

42114

+

42115

+ procedure Convert

42116

+ (Switch : Switch_Kind;

42117

+ Argument : String;

42118

+ To : out String_List_Access)

42119

+ is

42120

+ begin

42121

+ case Switch is

42122

+ when Map_File =>

42123

+ To := new Argument_List'(1 => new String'(Map_Switch & Argument));

42124

+ end case;

42125

+ end Convert;

42126

+

42127

+ ------------------

42128

+ -- Is_Supported --

42129

+ ------------------

42130

+

42131

+ function Is_Supported (Switch : Switch_Kind) return Boolean is

42132

+ begin

42133

+ case Switch is

42134

+ when Map_File =>

42135

+ return True;

42136

+ end case;

42137

+ end Is_Supported;

42138

+

42139

+end Indepsw;

42140

Index: gcc/ada/system-linux-sparcv9.ads

42141

===================================================================

42142

--- a/src/gcc/ada/system-linux-sparcv9.ads (.../tags/gcc_4_8_2_release)

42143

+++ b/src/gcc/ada/system-linux-sparcv9.ads (.../branches/gcc-4_8-branch)

42144

@@ -7,7 +7,7 @@

42145

-- S p e c --

42146

-- (GNU/Linux-SPARCV9 Version) --

42147

-- --

42148

42149

42150

-- --

42151

-- This specification is derived from the Ada Reference Manual for use with --

42152

-- GNAT. The copyright notice above, and the license provisions that follow --

42153

@@ -35,9 +35,10 @@

42154

------------------------------------------------------------------------------

42155

42156

package System is

42157

-pragma Pure (System);

42158

--- Note that we take advantage of the implementation permission to

42159

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

42160

+ pragma Pure;

42161

+ -- Note that we take advantage of the implementation permission to make

42162

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

42163

+ -- 2005, this is Pure in any case (AI-362).

42164

42165

type Name is (SYSTEM_NAME_GNAT);

42166

System_Name : constant Name := SYSTEM_NAME_GNAT;

42167

@@ -61,6 +62,7 @@

42168

-- Storage-related Declarations

42169

42170

type Address is private;

42171

+ pragma Preelaborable_Initialization (Address);

42172

Null_Address : constant Address;

42173

42174

Storage_Unit : constant := 8;

42175

Index: gcc/ada/ChangeLog

42176

===================================================================

42177

--- a/src/gcc/ada/ChangeLog (.../tags/gcc_4_8_2_release)

42178

+++ b/src/gcc/ada/ChangeLog (.../branches/gcc-4_8-branch)

42179

@@ -1,3 +1,60 @@

42180

+2014-03-30 Eric Botcazou <ebotcazou@adacore.com>

42181

+

42182

+ PR ada/60703

42183

+ * system-linux-alpha.ads: Adjust for Ada 2005.

42184

+ * system-linux-mips.ads: Likewise.

42185

+ * system-linux-mips64el.ads: Likewise.

42186

+ * system-linux-mipsel.ads: Likewise.

42187

+ * system-linux-s390.ads: Likewise.

42188

+ * system-linux-s390x.ads: Likewise.

42189

+ * system-linux-sparc.ads: Likewise.

42190

+ * system-linux-sparcv9.ads: Likewise.

42191

+ * system-rtems.ads: Likewise.

42192

+ * system-vxworks-arm.ads: Likewise.

42193

+

42194

+2014-03-13 Eric Botcazou <ebotcazou@adacore.com>

42195

+

42196

+ PR ada/51483

42197

+ * back_end.ads (Register_Type_Proc): Add 'precision' parameter.

42198

+ * cstand.adb (Register_Float_Type): Add 'precision' parameter and use

42199

+ it to set the RM size. Use directly 'size' for the Esize.

42200

+ * gcc-interface/gigi.h (enumerate_modes): Add integer parameter.

42201

+ * gcc-interface/misc.c (enumerate_modes): Likewise. Do not register

42202

+ types for vector modes, pass the size in addition to the precision.

42203

+

42204

+2014-01-12 Eric Botcazou <ebotcazou@adacore.com>

42205

+

42206

+ PR ada/59772

42207

+ * gcc-interface/cuintp.c (build_cst_from_int): Use 32-bit integer type

42208

+ as intermediate type.

42209

+ (UI_To_gnu): Likewise.

42210

+

42211

+2013-12-12 Eric Botcazou <ebotcazou@adacore.com>

42212

+ Iain Sandoe <iain@codesourcery.com>

42213

+

42214

+ PR ada/55946

42215

+ * gcc-interface/Make-lang.in (ada/doctools/xgnatugn): Use gnatmake.

42216

+ * gcc-interface/Makefile.in (GCC_LINK): Add LDFLAGS.

42217

+ (../../gnatmake): Remove LDFLAGS.

42218

+ (../../gnatlink): Likewise.

42219

+

42220

+2013-12-04 Eric Botcazou <ebotcazou@adacore.com>

42221

+

42222

+ PR ada/59382

42223

+ * indepsw-darwin.adb: New file.

42224

+

42225

+2013-10-19 Eric Botcazou <ebotcazou@adacore.com>

42226

+

42227

+ * gcc-interface/utils.c (scale_by_factor_of): New function.

42228

+ (rest_of_record_type_compilation): Use scale_by_factor_of in order to

42229

+ scale the original offset for both rounding cases; in the second case,

42230

+ take into accout the addend to compute the alignment. Tidy up.

42231

+

42232

+2013-10-19 Eric Botcazou <ebotcazou@adacore.com>

42233

+

42234

+ * gcc-interface/utils.c (gnat_set_type_context): New function.

42235

+ (gnat_pushdecl): Use it to set the context of the type.

42236

+

42237

2013-10-16 Release Manager

42238

42239

* GCC 4.8.2 released.

42240

Index: gcc/ada/cstand.adb

42241

===================================================================

42242

--- a/src/gcc/ada/cstand.adb (.../tags/gcc_4_8_2_release)

42243

+++ b/src/gcc/ada/cstand.adb (.../branches/gcc-4_8-branch)

42244

@@ -151,6 +151,7 @@

42245

Complex : Boolean; -- True iff type has real and imaginary parts

42246

Count : Natural; -- Number of elements in vector, 0 otherwise

42247

Float_Rep : Float_Rep_Kind; -- Representation used for fpt type

42248

+ Precision : Positive; -- Precision of representation in bits

42249

Size : Positive; -- Size of representation in bits

42250

Alignment : Natural); -- Required alignment in bits

42251

pragma Convention (C, Register_Float_Type);

42252

@@ -2014,6 +2015,7 @@

42253

Complex : Boolean;

42254

Count : Natural;

42255

Float_Rep : Float_Rep_Kind;

42256

+ Precision : Positive;

42257

Size : Positive;

42258

Alignment : Natural)

42259

is

42260

@@ -2063,14 +2065,25 @@

42261

42262

else

42263

Write_Str ("mod 2**");

42264

- Write_Int (Int (Size / Positive'Max (1, Count)));

42265

+ Write_Int (Int (Precision / Positive'Max (1, Count)));

42266

Write_Line (";");

42267

end if;

42268

42269

- Write_Str ("for " & T & "'Size use ");

42270

- Write_Int (Int (Size));

42271

- Write_Line (";");

42272

+ if Precision = Size then

42273

+ Write_Str ("for " & T (1 .. Last) & "'Size use ");

42274

+ Write_Int (Int (Size));

42275

+ Write_Line (";");

42276

42277

+ else

42278

+ Write_Str ("for " & T (1 .. Last) & "'Value_Size use ");

42279

+ Write_Int (Int (Precision));

42280

+ Write_Line (";");

42281

+

42282

+ Write_Str ("for " & T (1 .. Last) & "'Object_Size use ");

42283

+ Write_Int (Int (Size));

42284

+ Write_Line (";");

42285

+ end if;

42286

+

42287

Write_Str ("for " & T & "'Alignment use ");

42288

Write_Int (Int (Alignment / 8));

42289

Write_Line (";");

42290

@@ -2092,15 +2105,13 @@

42291

if Digs > 0 and then not Complex and then Count = 0 then

42292

declare

42293

Ent : constant Entity_Id := New_Standard_Entity;

42294

- Esize : constant Pos := Pos ((Size + Alignment - 1)

42295

- / Alignment * Alignment);

42296

begin

42297

Set_Defining_Identifier

42298

(New_Node (N_Full_Type_Declaration, Stloc), Ent);

42299

Make_Name (Ent, T (1 .. Last));

42300

Set_Scope (Ent, Standard_Standard);

42301

- Build_Float_Type (Ent, Esize, Float_Rep, Pos (Digs));

42302

- Set_RM_Size (Ent, UI_From_Int (Int (Size)));

42303

+ Build_Float_Type (Ent, Int (Size), Float_Rep, Pos (Digs));

42304

+ Set_RM_Size (Ent, UI_From_Int (Int (Precision)));

42305

Set_Alignment (Ent, UI_From_Int (Int (Alignment / 8)));

42306

42307

if No (Back_End_Float_Types) then

42308

Index: gcc/ada/back_end.ads

42309

===================================================================

42310

--- a/src/gcc/ada/back_end.ads (.../tags/gcc_4_8_2_release)

42311

+++ b/src/gcc/ada/back_end.ads (.../branches/gcc-4_8-branch)

42312

@@ -55,6 +55,7 @@

42313

Complex : Boolean; -- True iff type has real and imaginary parts

42314

Count : Natural; -- Number of elements in vector, 0 otherwise

42315

Float_Rep : Float_Rep_Kind; -- Representation used for fpt type

42316

+ Precision : Positive; -- Precision of representation in bits

42317

Size : Positive; -- Size of representation in bits

42318

Alignment : Natural); -- Required alignment in bits

42319

pragma Convention (C, Register_Type_Proc);

42320

Index: gcc/ada/system-linux-mipsel.ads

42321

===================================================================

42322

--- a/src/gcc/ada/system-linux-mipsel.ads (.../tags/gcc_4_8_2_release)

42323

+++ b/src/gcc/ada/system-linux-mipsel.ads (.../branches/gcc-4_8-branch)

42324

@@ -7,7 +7,7 @@

42325

-- S p e c --

42326

-- (GNU-Linux/MIPSEL Version) --

42327

-- --

42328

42329

42330

-- --

42331

-- This specification is derived from the Ada Reference Manual for use with --

42332

-- GNAT. The copyright notice above, and the license provisions that follow --

42333

@@ -62,6 +62,7 @@

42334

-- Storage-related Declarations

42335

42336

type Address is private;

42337

+ pragma Preelaborable_Initialization (Address);

42338

Null_Address : constant Address;

42339

42340

Storage_Unit : constant := 8;

42341

Index: gcc/ada/system-linux-mips.ads

42342

===================================================================

42343

--- a/src/gcc/ada/system-linux-mips.ads (.../tags/gcc_4_8_2_release)

42344

+++ b/src/gcc/ada/system-linux-mips.ads (.../branches/gcc-4_8-branch)

42345

@@ -7,7 +7,7 @@

42346

-- S p e c --

42347

-- (GNU-Linux/MIPS Version) --

42348

-- --

42349

42350

42351

-- --

42352

-- This specification is derived from the Ada Reference Manual for use with --

42353

-- GNAT. The copyright notice above, and the license provisions that follow --

42354

@@ -62,6 +62,7 @@

42355

-- Storage-related Declarations

42356

42357

type Address is private;

42358

+ pragma Preelaborable_Initialization (Address);

42359

Null_Address : constant Address;

42360

42361

Storage_Unit : constant := 8;

42362

Index: gcc/ada/system-linux-mips64el.ads

42363

===================================================================

42364

--- a/src/gcc/ada/system-linux-mips64el.ads (.../tags/gcc_4_8_2_release)

42365

+++ b/src/gcc/ada/system-linux-mips64el.ads (.../branches/gcc-4_8-branch)

42366

@@ -7,7 +7,7 @@

42367

-- S p e c --

42368

-- (GNU-Linux/MIPS64EL Version) --

42369

-- --

42370

42371

42372

-- --

42373

-- This specification is derived from the Ada Reference Manual for use with --

42374

-- GNAT. The copyright notice above, and the license provisions that follow --

42375

@@ -62,6 +62,7 @@

42376

-- Storage-related Declarations

42377

42378

type Address is private;

42379

+ pragma Preelaborable_Initialization (Address);

42380

Null_Address : constant Address;

42381

42382

Storage_Unit : constant := 8;

42383

Index: gcc/ada/gcc-interface/utils.c

42384

===================================================================

42385

--- a/src/gcc/ada/gcc-interface/utils.c (.../tags/gcc_4_8_2_release)

42386

+++ b/src/gcc/ada/gcc-interface/utils.c (.../branches/gcc-4_8-branch)

42387

@@ -232,6 +232,7 @@

42388

static tree split_plus (tree, tree *);

42389

static tree float_type_for_precision (int, enum machine_mode);

42390

static tree convert_to_fat_pointer (tree, tree);

42391

+static unsigned int scale_by_factor_of (tree, unsigned int);

42392

static bool potential_alignment_gap (tree, tree, tree);

42393

static void process_attributes (tree, struct attrib *);

42394

42395

@@ -532,6 +533,22 @@

42396

free_binding_level = level;

42397

}

42398

42399

+/* Set the context of TYPE and its parallel types (if any) to CONTEXT. */

42400

+

42401

+static void

42402

+gnat_set_type_context (tree type, tree context)

42403

+{

42404

+ tree decl = TYPE_STUB_DECL (type);

42405

+

42406

+ TYPE_CONTEXT (type) = context;

42407

+

42408

+ while (decl && DECL_PARALLEL_TYPE (decl))

42409

+ {

42410

+ TYPE_CONTEXT (DECL_PARALLEL_TYPE (decl)) = context;

42411

+ decl = TYPE_STUB_DECL (DECL_PARALLEL_TYPE (decl));

42412

+ }

42413

+}

42414

+

42415

/* Record DECL as belonging to the current lexical scope and use GNAT_NODE

42416

for location information and flag propagation. */

42417

42418

@@ -613,7 +630,7 @@

42419

if (TREE_CODE (t) == POINTER_TYPE)

42420

TYPE_NEXT_PTR_TO (t) = tt;

42421

TYPE_NAME (tt) = DECL_NAME (decl);

42422

- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl);

42423

+ gnat_set_type_context (tt, DECL_CONTEXT (decl));

42424

TYPE_STUB_DECL (tt) = TYPE_STUB_DECL (t);

42425

DECL_ORIGINAL_TYPE (decl) = tt;

42426

}

42427

@@ -623,7 +640,7 @@

42428

/* We need a variant for the placeholder machinery to work. */

42429

tree tt = build_variant_type_copy (t);

42430

TYPE_NAME (tt) = decl;

42431

- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl);

42432

+ gnat_set_type_context (tt, DECL_CONTEXT (decl));

42433

TREE_USED (tt) = TREE_USED (t);

42434

TREE_TYPE (decl) = tt;

42435

if (DECL_ORIGINAL_TYPE (TYPE_NAME (t)))

42436

@@ -645,7 +662,7 @@

42437

if (!(TYPE_NAME (t) && TREE_CODE (TYPE_NAME (t)) == TYPE_DECL))

42438

{

42439

TYPE_NAME (t) = decl;

42440

- TYPE_CONTEXT (t) = DECL_CONTEXT (decl);

42441

+ gnat_set_type_context (t, DECL_CONTEXT (decl));

42442

}

42443

}

42444

}

42445

@@ -1692,93 +1709,74 @@

42446

TYPE_SIZE_UNIT (new_record_type)

42447

= size_int (TYPE_ALIGN (record_type) / BITS_PER_UNIT);

42448

42449

- /* Now scan all the fields, replacing each field with a new

42450

- field corresponding to the new encoding. */

42451

+ /* Now scan all the fields, replacing each field with a new field

42452

+ corresponding to the new encoding. */

42453

for (old_field = TYPE_FIELDS (record_type); old_field;

42454

old_field = DECL_CHAIN (old_field))

42455

{

42456

tree field_type = TREE_TYPE (old_field);

42457

tree field_name = DECL_NAME (old_field);

42458

- tree new_field;

42459

tree curpos = bit_position (old_field);

42460

+ tree pos, new_field;

42461

bool var = false;

42462

unsigned int align = 0;

42463

- tree pos;

42464

42465

+ /* We're going to do some pattern matching below so remove as many

42466

+ conversions as possible. */

42467

+ curpos = remove_conversions (curpos, true);

42468

+

42469

/* See how the position was modified from the last position.

42470

42471

- There are two basic cases we support: a value was added

42472

- to the last position or the last position was rounded to

42473

- a boundary and they something was added. Check for the

42474

- first case first. If not, see if there is any evidence

42475

- of rounding. If so, round the last position and try

42476

- again.

42477

+ There are two basic cases we support: a value was added

42478

+ to the last position or the last position was rounded to

42479

+ a boundary and they something was added. Check for the

42480

+ first case first. If not, see if there is any evidence

42481

+ of rounding. If so, round the last position and retry.

42482

42483

- If this is a union, the position can be taken as zero. */

42484

-

42485

- /* Some computations depend on the shape of the position expression,

42486

- so strip conversions to make sure it's exposed. */

42487

- curpos = remove_conversions (curpos, true);

42488

-

42489

+ If this is a union, the position can be taken as zero. */

42490

if (TREE_CODE (new_record_type) == UNION_TYPE)

42491

- pos = bitsize_zero_node, align = 0;

42492

+ pos = bitsize_zero_node;

42493

else

42494

pos = compute_related_constant (curpos, last_pos);

42495

42496

- if (!pos && TREE_CODE (curpos) == MULT_EXPR

42497

+ if (!pos

42498

+ && TREE_CODE (curpos) == MULT_EXPR

42499

&& host_integerp (TREE_OPERAND (curpos, 1), 1))

42500

{

42501

tree offset = TREE_OPERAND (curpos, 0);

42502

align = tree_low_cst (TREE_OPERAND (curpos, 1), 1);

42503

-

42504

- /* An offset which is a bitwise AND with a mask increases the

42505

- alignment according to the number of trailing zeros. */

42506

- offset = remove_conversions (offset, true);

42507

- if (TREE_CODE (offset) == BIT_AND_EXPR

42508

- && TREE_CODE (TREE_OPERAND (offset, 1)) == INTEGER_CST)

42509

- {

42510

- unsigned HOST_WIDE_INT mask

42511

- = TREE_INT_CST_LOW (TREE_OPERAND (offset, 1));

42512

- unsigned int i;

42513

-

42514

- for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)

42515

- {

42516

- if (mask & 1)

42517

- break;

42518

- mask >>= 1;

42519

- align *= 2;

42520

- }

42521

- }

42522

-

42523

- pos = compute_related_constant (curpos,

42524

- round_up (last_pos, align));

42525

+ align = scale_by_factor_of (offset, align);

42526

+ last_pos = round_up (last_pos, align);

42527

+ pos = compute_related_constant (curpos, last_pos);

42528

}

42529

- else if (!pos && TREE_CODE (curpos) == PLUS_EXPR

42530

- && TREE_CODE (TREE_OPERAND (curpos, 1)) == INTEGER_CST

42531

+ else if (!pos

42532

+ && TREE_CODE (curpos) == PLUS_EXPR

42533

+ && host_integerp (TREE_OPERAND (curpos, 1), 1)

42534

&& TREE_CODE (TREE_OPERAND (curpos, 0)) == MULT_EXPR

42535

- && host_integerp (TREE_OPERAND

42536

- (TREE_OPERAND (curpos, 0), 1),

42537

- 1))

42538

+ && host_integerp

42539

+ (TREE_OPERAND (TREE_OPERAND (curpos, 0), 1), 1))

42540

{

42541

+ tree offset = TREE_OPERAND (TREE_OPERAND (curpos, 0), 0);

42542

+ unsigned HOST_WIDE_INT addend

42543

+ = tree_low_cst (TREE_OPERAND (curpos, 1), 1);

42544

align

42545

- = tree_low_cst

42546

- (TREE_OPERAND (TREE_OPERAND (curpos, 0), 1), 1);

42547

- pos = compute_related_constant (curpos,

42548

- round_up (last_pos, align));

42549

+ = tree_low_cst (TREE_OPERAND (TREE_OPERAND (curpos, 0), 1), 1);

42550

+ align = scale_by_factor_of (offset, align);

42551

+ align = MIN (align, addend & -addend);

42552

+ last_pos = round_up (last_pos, align);

42553

+ pos = compute_related_constant (curpos, last_pos);

42554

}

42555

- else if (potential_alignment_gap (prev_old_field, old_field,

42556

- pos))

42557

+ else if (potential_alignment_gap (prev_old_field, old_field, pos))

42558

{

42559

align = TYPE_ALIGN (field_type);

42560

- pos = compute_related_constant (curpos,

42561

- round_up (last_pos, align));

42562

+ last_pos = round_up (last_pos, align);

42563

+ pos = compute_related_constant (curpos, last_pos);

42564

}

42565

42566

/* If we can't compute a position, set it to zero.

42567

42568

- ??? We really should abort here, but it's too much work

42569

- to get this correct for all cases. */

42570

-

42571

+ ??? We really should abort here, but it's too much work

42572

+ to get this correct for all cases. */

42573

if (!pos)

42574

pos = bitsize_zero_node;

42575

42576

@@ -2553,6 +2551,32 @@

42577

return false;

42578

}

42579

42580

+/* Return VALUE scaled by the biggest power-of-2 factor of EXPR. */

42581

+

42582

+static unsigned int

42583

+scale_by_factor_of (tree expr, unsigned int value)

42584

+{

42585

+ expr = remove_conversions (expr, true);

42586

+

42587

+ /* An expression which is a bitwise AND with a mask has a power-of-2 factor

42588

+ corresponding to the number of trailing zeros of the mask. */

42589

+ if (TREE_CODE (expr) == BIT_AND_EXPR

42590

+ && TREE_CODE (TREE_OPERAND (expr, 1)) == INTEGER_CST)

42591

+ {

42592

+ unsigned HOST_WIDE_INT mask = TREE_INT_CST_LOW (TREE_OPERAND (expr, 1));

42593

+ unsigned int i = 0;

42594

+

42595

+ while ((mask & 1) == 0 && i < HOST_BITS_PER_WIDE_INT)

42596

+ {

42597

+ mask >>= 1;

42598

+ value *= 2;

42599

+ i++;

42600

+ }

42601

+ }

42602

+

42603

+ return value;

42604

+}

42605

+

42606

/* Given two consecutive field decls PREV_FIELD and CURR_FIELD, return true

42607

unless we can prove these 2 fields are laid out in such a way that no gap

42608

exist between the end of PREV_FIELD and the beginning of CURR_FIELD. OFFSET

42609

Index: gcc/ada/gcc-interface/Makefile.in

42610

===================================================================

42611

--- a/src/gcc/ada/gcc-interface/Makefile.in (.../tags/gcc_4_8_2_release)

42612

+++ b/src/gcc/ada/gcc-interface/Makefile.in (.../branches/gcc-4_8-branch)

42613

@@ -2397,7 +2397,7 @@

42614

"GNATLINK=$(GNATLINK)" \

42615

"GNATBIND=$(GNATBIND)"

42616

42617

-GCC_LINK=$(CC) $(GCC_LINK_FLAGS) $(ADA_INCLUDES)

42618

+GCC_LINK=$(CC) $(GCC_LINK_FLAGS) $(ADA_INCLUDES) $(LDFLAGS)

42619

42620

# Build directory for the tools. Let's copy the target-dependent

42621

# sources using the same mechanism as for gnatlib. The other sources are

42622

@@ -2519,12 +2519,10 @@

42623

42624

# Likewise for the tools

42625

../../gnatmake$(exeext): $(P) b_gnatm.o link.o targext.o $(GNATMAKE_OBJS)

42626

- $(GCC_LINK) $(ALL_CFLAGS) $(LDFLAGS) -o $@ b_gnatm.o $(GNATMAKE_OBJS) \

42627

- $(TOOLS_LIBS)

42628

+ +$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatm.o $(GNATMAKE_OBJS) $(TOOLS_LIBS)

42629

42630

../../gnatlink$(exeext): $(P) b_gnatl.o link.o targext.o $(GNATLINK_OBJS)

42631

- $(GCC_LINK) $(ALL_CFLAGS) $(LDFLAGS) -o $@ b_gnatl.o $(GNATLINK_OBJS) \

42632

- $(TOOLS_LIBS)

42633

+ +$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatl.o $(GNATLINK_OBJS) $(TOOLS_LIBS)

42634

42635

../stamp-gnatlib-$(RTSDIR):

42636

@if [ ! -f stamp-gnatlib-$(RTSDIR) ] ; \

42637

Index: gcc/ada/gcc-interface/cuintp.c

42638

===================================================================

42639

--- a/src/gcc/ada/gcc-interface/cuintp.c (.../tags/gcc_4_8_2_release)

42640

+++ b/src/gcc/ada/gcc-interface/cuintp.c (.../branches/gcc-4_8-branch)

42641

@@ -6,7 +6,7 @@

42642

* *

42643

* C Implementation File *

42644

* *

42645

42646

42647

* *

42648

* GNAT is free software; you can redistribute it and/or modify it under *

42649

* terms of the GNU General Public License as published by the Free Soft- *

42650

@@ -59,8 +59,8 @@

42651

static tree

42652

build_cst_from_int (tree type, HOST_WIDE_INT low)

42653

{

42654

- if (TREE_CODE (type) == REAL_TYPE)

42655

- return convert (type, build_int_cst (NULL_TREE, low));

42656

+ if (SCALAR_FLOAT_TYPE_P (type))

42657

+ return convert (type, build_int_cst (gnat_type_for_size (32, 0), low));

42658

else

42659

return build_int_cst_type (type, low);

42660

}

42661

@@ -99,20 +99,13 @@

42662

gcc_assert (Length > 0);

42663

42664

/* The computations we perform below always require a type at least as

42665

- large as an integer not to overflow. REAL types are always fine, but

42666

+ large as an integer not to overflow. FP types are always fine, but

42667

INTEGER or ENUMERAL types we are handed may be too short. We use a

42668

base integer type node for the computations in this case and will

42669

- convert the final result back to the incoming type later on.

42670

- The base integer precision must be superior than 16. */

42671

+ convert the final result back to the incoming type later on. */

42672

+ if (!SCALAR_FLOAT_TYPE_P (comp_type) && TYPE_PRECISION (comp_type) < 32)

42673

+ comp_type = gnat_type_for_size (32, 0);

42674

42675

- if (TREE_CODE (comp_type) != REAL_TYPE

42676

- && TYPE_PRECISION (comp_type)

42677

- < TYPE_PRECISION (long_integer_type_node))

42678

- {

42679

- comp_type = long_integer_type_node;

42680

- gcc_assert (TYPE_PRECISION (comp_type) > 16);

42681

- }

42682

-

42683

gnu_base = build_cst_from_int (comp_type, Base);

42684

42685

gnu_ret = build_cst_from_int (comp_type, First);

42686

Index: gcc/ada/gcc-interface/Make-lang.in

42687

===================================================================

42688

--- a/src/gcc/ada/gcc-interface/Make-lang.in (.../tags/gcc_4_8_2_release)

42689

+++ b/src/gcc/ada/gcc-interface/Make-lang.in (.../branches/gcc-4_8-branch)

42690

@@ -625,7 +625,7 @@

42691

ada/doctools/xgnatugn$(build_exeext): ada/xgnatugn.adb

42692

-$(MKDIR) ada/doctools

42693

$(CP) $^ ada/doctools

42694

- cd ada/doctools && $(GNATMAKE) -q xgnatugn

42695

+ cd ada/doctools && gnatmake -q xgnatugn

42696

42697

# Note that doc/gnat_ugn.texi and doc/projects.texi do not depend on

42698

# xgnatugn being built so we can distribute a pregenerated doc/gnat_ugn.info

42699

Index: gcc/ada/gcc-interface/gigi.h

42700

===================================================================

42701

--- a/src/gcc/ada/gcc-interface/gigi.h (.../tags/gcc_4_8_2_release)

42702

+++ b/src/gcc/ada/gcc-interface/gigi.h (.../branches/gcc-4_8-branch)

42703

@@ -1014,7 +1014,7 @@

42704

/* This function is called by the front-end to enumerate all the supported

42705

modes for the machine, as well as some predefined C types. */

42706

extern void enumerate_modes (void (*f) (const char *, int, int, int, int, int,

42707

- int));

42708

+ int, int));

42709

42710

#ifdef __cplusplus

42711

}

42712

Index: gcc/ada/gcc-interface/misc.c

42713

===================================================================

42714

--- a/src/gcc/ada/gcc-interface/misc.c (.../tags/gcc_4_8_2_release)

42715

+++ b/src/gcc/ada/gcc-interface/misc.c (.../branches/gcc-4_8-branch)

42716

@@ -648,7 +648,7 @@

42717

/* This function is called by the front-end to enumerate all the supported

42718

modes for the machine, as well as some predefined C types. F is a function

42719

which is called back with the parameters as listed below, first a string,

42720

- then six ints. The name is any arbitrary null-terminated string and has

42721

+ then seven ints. The name is any arbitrary null-terminated string and has

42722

no particular significance, except for the case of predefined C types, where

42723

it should be the name of the C type. For integer types, only signed types

42724

should be listed, unsigned versions are assumed. The order of types should

42725

@@ -664,11 +664,12 @@

42726

COMPLEX_P nonzero is this represents a complex mode

42727

COUNT count of number of items, nonzero for vector mode

42728

FLOAT_REP Float_Rep_Kind for FP, otherwise undefined

42729

- SIZE number of bits used to store data

42730

+ PRECISION number of bits used to store data

42731

+ SIZE number of bits occupied by the mode

42732

ALIGN number of bits to which mode is aligned. */

42733

42734

void

42735

-enumerate_modes (void (*f) (const char *, int, int, int, int, int, int))

42736

+enumerate_modes (void (*f) (const char *, int, int, int, int, int, int, int))

42737

{

42738

const tree c_types[]

42739

= { float_type_node, double_type_node, long_double_type_node };

42740

@@ -742,28 +743,26 @@

42741

42742

/* First register any C types for this mode that the front end

42743

may need to know about, unless the mode should be skipped. */

42744

-

42745

- if (!skip_p)

42746

+ if (!skip_p && !vector_p)

42747

for (nameloop = 0; nameloop < ARRAY_SIZE (c_types); nameloop++)

42748

{

42749

- tree typ = c_types[nameloop];

42750

- const char *nam = c_names[nameloop];

42751

+ tree type = c_types[nameloop];

42752

+ const char *name = c_names[nameloop];

42753

42754

- if (TYPE_MODE (typ) == i)

42755

+ if (TYPE_MODE (type) == i)

42756

{

42757

- f (nam, digs, complex_p,

42758

- vector_p ? GET_MODE_NUNITS (i) : 0, float_rep,

42759

- TYPE_PRECISION (typ), TYPE_ALIGN (typ));

42760

+ f (name, digs, complex_p, 0, float_rep, TYPE_PRECISION (type),

42761

+ TREE_INT_CST_LOW (TYPE_SIZE (type)), TYPE_ALIGN (type));

42762

skip_p = true;

42763

}

42764

}

42765

42766

/* If no predefined C types were found, register the mode itself. */

42767

-

42768

if (!skip_p)

42769

f (GET_MODE_NAME (i), digs, complex_p,

42770

vector_p ? GET_MODE_NUNITS (i) : 0, float_rep,

42771

- GET_MODE_PRECISION (i), GET_MODE_ALIGNMENT (i));

42772

+ GET_MODE_PRECISION (i), GET_MODE_BITSIZE (i),

42773

+ GET_MODE_ALIGNMENT (i));

42774

}

42775

}

42776

42777

Index: gcc/ada/system-linux-sparc.ads

42778

===================================================================

42779

--- a/src/gcc/ada/system-linux-sparc.ads (.../tags/gcc_4_8_2_release)

42780

+++ b/src/gcc/ada/system-linux-sparc.ads (.../branches/gcc-4_8-branch)

42781

@@ -7,7 +7,7 @@

42782

-- S p e c --

42783

-- (GNU/Linux-SPARC Version) --

42784

-- --

42785

42786

42787

-- --

42788

-- This specification is derived from the Ada Reference Manual for use with --

42789

-- GNAT. The copyright notice above, and the license provisions that follow --

42790

@@ -35,9 +35,10 @@

42791

------------------------------------------------------------------------------

42792

42793

package System is

42794

-pragma Pure (System);

42795

--- Note that we take advantage of the implementation permission to

42796

--- make this unit Pure instead of Preelaborable, see RM 13.7(36)

42797

+ pragma Pure;

42798

+ -- Note that we take advantage of the implementation permission to make

42799

+ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada

42800

+ -- 2005, this is Pure in any case (AI-362).

42801

42802

type Name is (SYSTEM_NAME_GNAT);

42803

System_Name : constant Name := SYSTEM_NAME_GNAT;

42804

@@ -61,6 +62,7 @@

42805

-- Storage-related Declarations

42806

42807

type Address is private;

42808

+ pragma Preelaborable_Initialization (Address);

42809

Null_Address : constant Address;

42810

42811

Storage_Unit : constant := 8;

42812

Index: gcc/ada/system-rtems.ads

42813

===================================================================

42814

--- a/src/gcc/ada/system-rtems.ads (.../tags/gcc_4_8_2_release)

42815

+++ b/src/gcc/ada/system-rtems.ads (.../branches/gcc-4_8-branch)

42816

@@ -7,7 +7,7 @@

42817

-- S p e c --

42818

-- (Compiler Version) --

42819

-- --

42820

42821

42822

-- --

42823

-- This specification is derived from the Ada Reference Manual for use with --

42824

-- GNAT. The copyright notice above, and the license provisions that follow --

42825

@@ -34,9 +34,8 @@

42826

-- --

42827

------------------------------------------------------------------------------

42828

42829

--- This version of System is a RTEMS version that is used in building

42830

--- the compiler. This is based as closely as possible on the generic

42831

--- version with the following exceptions:

42832

+-- This version is for RTEMS. It is based as closely as possible on the

42833

+-- generic version with the following exceptions:

42834

-- + priority definitions

42835

42836

package System is

42837

@@ -67,6 +66,7 @@

42838

-- Storage-related Declarations

42839

42840

type Address is private;

42841

+ pragma Preelaborable_Initialization (Address);

42842

Null_Address : constant Address;

42843

42844

Storage_Unit : constant := Standard'Storage_Unit;

42845

Index: gcc/dse.c

42846

===================================================================

42847

--- a/src/gcc/dse.c (.../tags/gcc_4_8_2_release)

42848

+++ b/src/gcc/dse.c (.../branches/gcc-4_8-branch)

42849

@@ -2518,7 +2518,8 @@

42850

/* Cselib clears the table for this case, so we have to essentially

42851

do the same. */

42852

if (NONJUMP_INSN_P (insn)

42853

- && volatile_insn_p (PATTERN (insn)))

42854

+ && GET_CODE (PATTERN (insn)) == ASM_OPERANDS

42855

+ && MEM_VOLATILE_P (PATTERN (insn)))

42856

{

42857

add_wild_read (bb_info);

42858

insn_info->cannot_delete = true;

42859

Index: gcc/gimple-ssa-strength-reduction.c

42860

===================================================================

42861

--- a/src/gcc/gimple-ssa-strength-reduction.c (.../tags/gcc_4_8_2_release)

42862

+++ b/src/gcc/gimple-ssa-strength-reduction.c (.../branches/gcc-4_8-branch)

42863

@@ -735,15 +735,18 @@

42864

X = Y * c

42865

============================

42866

X = (B + i') * (S * c) */

42867

- base = base_cand->base_expr;

42868

- index = base_cand->index;

42869

temp = tree_to_double_int (base_cand->stride)

42870

* tree_to_double_int (stride_in);

42871

- stride = double_int_to_tree (TREE_TYPE (stride_in), temp);

42872

- ctype = base_cand->cand_type;

42873

- if (has_single_use (base_in))

42874

- savings = (base_cand->dead_savings

42875

- + stmt_cost (base_cand->cand_stmt, speed));

42876

+ if (double_int_fits_to_tree_p (TREE_TYPE (stride_in), temp))

42877

+ {

42878

+ base = base_cand->base_expr;

42879

+ index = base_cand->index;

42880

+ stride = double_int_to_tree (TREE_TYPE (stride_in), temp);

42881

+ ctype = base_cand->cand_type;

42882

+ if (has_single_use (base_in))

42883

+ savings = (base_cand->dead_savings

42884

+ + stmt_cost (base_cand->cand_stmt, speed));

42885

+ }

42886

}

42887

else if (base_cand->kind == CAND_ADD

42888

&& operand_equal_p (base_cand->stride, integer_one_node, 0))

42889

Index: gcc/tree-eh.c

42890

===================================================================

42891

--- a/src/gcc/tree-eh.c (.../tags/gcc_4_8_2_release)

42892

+++ b/src/gcc/tree-eh.c (.../branches/gcc-4_8-branch)

42893

@@ -1357,9 +1357,6 @@

42894

x = gimple_seq_last_stmt (finally);

42895

finally_loc = x ? gimple_location (x) : tf_loc;

42896

42897

- /* Lower the finally block itself. */

42898

- lower_eh_constructs_1 (state, &finally);

42899

-

42900

/* Prepare for switch statement generation. */

42901

nlabels = tf->dest_array.length ();

42902

return_index = nlabels;

42903

@@ -1445,6 +1442,7 @@

42904

x = gimple_build_label (finally_label);

42905

gimple_seq_add_stmt (&tf->top_p_seq, x);

42906

42907

+ lower_eh_constructs_1 (state, &finally);

42908

gimple_seq_add_seq (&tf->top_p_seq, finally);

42909

42910

/* Redirect each incoming goto edge. */

42911

@@ -2502,12 +2500,6 @@

42912

restart:

42913

switch (code)

42914

{

42915

- case TARGET_MEM_REF:

42916

- if (TREE_CODE (TMR_BASE (expr)) == ADDR_EXPR

42917

- && !TMR_INDEX (expr) && !TMR_INDEX2 (expr))

42918

- return false;

42919

- return !TREE_THIS_NOTRAP (expr);

42920

-

42921

case COMPONENT_REF:

42922

case REALPART_EXPR:

42923

case IMAGPART_EXPR:

42924

@@ -2534,10 +2526,36 @@

42925

return false;

42926

return !in_array_bounds_p (expr);

42927

42928

+ case TARGET_MEM_REF:

42929

case MEM_REF:

42930

+ if (TREE_CODE (TREE_OPERAND (expr, 0)) == ADDR_EXPR

42931

+ && tree_could_trap_p (TREE_OPERAND (TREE_OPERAND (expr, 0), 0)))

42932

+ return true;

42933

+ if (TREE_THIS_NOTRAP (expr))

42934

+ return false;

42935

+ /* We cannot prove that the access is in-bounds when we have

42936

+ variable-index TARGET_MEM_REFs. */

42937

+ if (code == TARGET_MEM_REF

42938

+ && (TMR_INDEX (expr) || TMR_INDEX2 (expr)))

42939

+ return true;

42940

if (TREE_CODE (TREE_OPERAND (expr, 0)) == ADDR_EXPR)

42941

- return false;

42942

- /* Fallthru. */

42943

+ {

42944

+ tree base = TREE_OPERAND (TREE_OPERAND (expr, 0), 0);

42945

+ double_int off = mem_ref_offset (expr);

42946

+ if (off.is_negative ())

42947

+ return true;

42948

+ if (TREE_CODE (base) == STRING_CST)

42949

+ return double_int::from_uhwi (TREE_STRING_LENGTH (base)).ule (off);

42950

+ else if (DECL_SIZE_UNIT (base) == NULL_TREE

42951

+ || TREE_CODE (DECL_SIZE_UNIT (base)) != INTEGER_CST

42952

+ || tree_to_double_int (DECL_SIZE_UNIT (base)).ule (off))

42953

+ return true;

42954

+ /* Now we are sure the first byte of the access is inside

42955

+ the object. */

42956

+ return false;

42957

+ }

42958

+ return true;

42959

+

42960

case INDIRECT_REF:

42961

return !TREE_THIS_NOTRAP (expr);

42962

42963

@@ -4166,8 +4184,11 @@

42964

/* If the block is totally empty, look for more unsplitting cases. */

42965

if (gsi_end_p (gsi))

42966

{

42967

- /* For the degenerate case of an infinite loop bail out. */

42968

- if (infinite_empty_loop_p (e_out))

42969

+ /* For the degenerate case of an infinite loop bail out.

42970

+ If bb has no successors and is totally empty, which can happen e.g.

42971

+ because of incorrect noreturn attribute, bail out too. */

42972

+ if (e_out == NULL

42973

+ || infinite_empty_loop_p (e_out))

42974

return ret;

42975

42976

return ret | cleanup_empty_eh_unsplit (bb, e_out, lp);

42977

@@ -4304,11 +4325,12 @@

42978

remove_unreachable_handlers ();

42979

42980

/* Watch out for the region tree vanishing due to all unreachable. */

42981

- if (cfun->eh->region_tree && optimize)

42982

+ if (cfun->eh->region_tree)

42983

{

42984

bool changed = false;

42985

42986

- changed |= unsplit_all_eh ();

42987

+ if (optimize)

42988

+ changed |= unsplit_all_eh ();

42989

changed |= cleanup_all_empty_eh ();

42990

42991

if (changed)

42992

Index: gcc/fortran/interface.c

42993

===================================================================

42994

--- a/src/gcc/fortran/interface.c (.../tags/gcc_4_8_2_release)

42995

+++ b/src/gcc/fortran/interface.c (.../branches/gcc-4_8-branch)

42996

@@ -1245,7 +1245,8 @@

42997

return FAILURE;

42998

}

42999

43000

- if (r1->ts.u.cl->length)

43001

+ if (s1->ts.u.cl && s1->ts.u.cl->length

43002

+ && s2->ts.u.cl && s2->ts.u.cl->length)

43003

{

43004

int compval = gfc_dep_compare_expr (r1->ts.u.cl->length,

43005

r2->ts.u.cl->length);

43006

@@ -1367,8 +1368,8 @@

43007

if (s1->attr.function && s2->attr.function)

43008

{

43009

/* If both are functions, check result characteristics. */

43010

- if (check_result_characteristics (s1, s2, errmsg, err_len)

43011

- == FAILURE)

43012

+ if (check_result_characteristics (s1, s2, errmsg, err_len) == FAILURE

43013

+ || check_result_characteristics (s2, s1, errmsg, err_len) == FAILURE)

43014

return 0;

43015

}

43016

43017

Index: gcc/fortran/intrinsic.c

43018

===================================================================

43019

--- a/src/gcc/fortran/intrinsic.c (.../tags/gcc_4_8_2_release)

43020

+++ b/src/gcc/fortran/intrinsic.c (.../branches/gcc-4_8-branch)

43021

@@ -4229,7 +4229,7 @@

43022

c->resolved_sym->attr.elemental = isym->elemental;

43023

}

43024

43025

- if (gfc_pure (NULL) && !isym->pure)

43026

+ if (!isym->pure && gfc_pure (NULL))

43027

{

43028

gfc_error ("Subroutine call to intrinsic '%s' at %L is not PURE", name,

43029

&c->loc);

43030

@@ -4236,6 +4236,9 @@

43031

return MATCH_ERROR;

43032

}

43033

43034

+ if (!isym->pure)

43035

+ gfc_unset_implicit_pure (NULL);

43036

+

43037

c->resolved_sym->attr.noreturn = isym->noreturn;

43038

43039

return MATCH_YES;

43040

Index: gcc/fortran/trans-expr.c

43041

===================================================================

43042

--- a/src/gcc/fortran/trans-expr.c (.../tags/gcc_4_8_2_release)

43043

+++ b/src/gcc/fortran/trans-expr.c (.../branches/gcc-4_8-branch)

43044

@@ -355,7 +355,11 @@

43045

gfc_conv_expr_descriptor (parmse, e);

43046

43047

if (e->rank != class_ts.u.derived->components->as->rank)

43048

- class_array_data_assign (&block, ctree, parmse->expr, true);

43049

+ {

43050

+ gcc_assert (class_ts.u.derived->components->as->type

43051

+ == AS_ASSUMED_RANK);

43052

+ class_array_data_assign (&block, ctree, parmse->expr, false);

43053

+ }

43054

else

43055

{

43056

if (gfc_expr_attr (e).codimension)

43057

@@ -670,7 +674,6 @@

43058

gfc_add_modify (&parmse->post, vptr,

43059

fold_convert (TREE_TYPE (vptr), ctree));

43060

43061

- gcc_assert (!optional || (optional && !copyback));

43062

if (optional)

43063

{

43064

tree tmp2;

43065

@@ -6343,7 +6346,13 @@

43066

/* Returns a reference to the scalar evaluated outside the loop

43067

for this case. */

43068

gfc_conv_expr (se, expr);

43069

- se->expr = gfc_build_addr_expr (NULL_TREE, se->expr);

43070

+

43071

+ if (expr->ts.type == BT_CHARACTER

43072

+ && expr->expr_type != EXPR_FUNCTION)

43073

+ gfc_conv_string_parameter (se);

43074

+ else

43075

+ se->expr = gfc_build_addr_expr (NULL_TREE, se->expr);

43076

+

43077

return;

43078

}

43079

43080

Index: gcc/fortran/trans-array.c

43081

===================================================================

43082

--- a/src/gcc/fortran/trans-array.c (.../tags/gcc_4_8_2_release)

43083

+++ b/src/gcc/fortran/trans-array.c (.../branches/gcc-4_8-branch)

43084

@@ -1,5 +1,5 @@

43085

/* Array translation routines

43086

43087

43088

Contributed by Paul Brook <paul@nowt.org>

43089

and Steven Bosscher <s.bosscher@student.tudelft.nl>

43090

43091

@@ -2487,6 +2487,11 @@

43092

a reference to the value. */

43093

gfc_conv_expr (&se, expr);

43094

}

43095

+

43096

+ /* Ensure that a pointer to the string is stored. */

43097

+ if (expr->ts.type == BT_CHARACTER)

43098

+ gfc_conv_string_parameter (&se);

43099

+

43100

gfc_add_block_to_block (&outer_loop->pre, &se.pre);

43101

gfc_add_block_to_block (&outer_loop->post, &se.post);

43102

if (gfc_is_class_scalar_expr (expr))

43103

@@ -7940,6 +7945,7 @@

43104

tree size1;

43105

tree size2;

43106

tree array1;

43107

+ tree cond_null;

43108

tree cond;

43109

tree tmp;

43110

tree tmp2;

43111

@@ -8015,9 +8021,9 @@

43112

jump_label2 = gfc_build_label_decl (NULL_TREE);

43113

43114

/* Allocate if data is NULL. */

43115

- cond = fold_build2_loc (input_location, EQ_EXPR, boolean_type_node,

43116

+ cond_null = fold_build2_loc (input_location, EQ_EXPR, boolean_type_node,

43117

array1, build_int_cst (TREE_TYPE (array1), 0));

43118

- tmp = build3_v (COND_EXPR, cond,

43119

+ tmp = build3_v (COND_EXPR, cond_null,

43120

build1_v (GOTO_EXPR, jump_label1),

43121

build_empty_stmt (input_location));

43122

gfc_add_expr_to_block (&fblock, tmp);

43123

@@ -8069,13 +8075,25 @@

43124

tmp = build1_v (LABEL_EXPR, jump_label1);

43125

gfc_add_expr_to_block (&fblock, tmp);

43126

43127

- size1 = gfc_conv_descriptor_size (desc, expr1->rank);

43128

+ /* If the lhs has not been allocated, its bounds will not have been

43129

+ initialized and so its size is set to zero. */

43130

+ size1 = gfc_create_var (gfc_array_index_type, NULL);

43131

+ gfc_init_block (&alloc_block);

43132

+ gfc_add_modify (&alloc_block, size1, gfc_index_zero_node);

43133

+ gfc_init_block (&realloc_block);

43134

+ gfc_add_modify (&realloc_block, size1,

43135

+ gfc_conv_descriptor_size (desc, expr1->rank));

43136

+ tmp = build3_v (COND_EXPR, cond_null,

43137

+ gfc_finish_block (&alloc_block),

43138

+ gfc_finish_block (&realloc_block));

43139

+ gfc_add_expr_to_block (&fblock, tmp);

43140

43141

- /* Get the rhs size. Fix both sizes. */

43142

+ /* Get the rhs size and fix it. */

43143

if (expr2)

43144

desc2 = rss->info->data.array.descriptor;

43145

else

43146

desc2 = NULL_TREE;

43147

+

43148

size2 = gfc_index_one_node;

43149

for (n = 0; n < expr2->rank; n++)

43150

{

43151

@@ -8089,8 +8107,6 @@

43152

gfc_array_index_type,

43153

tmp, size2);

43154

}

43155

-

43156

- size1 = gfc_evaluate_now (size1, &fblock);

43157

size2 = gfc_evaluate_now (size2, &fblock);

43158

43159

cond = fold_build2_loc (input_location, NE_EXPR, boolean_type_node,

43160

Index: gcc/fortran/symbol.c

43161

===================================================================

43162

--- a/src/gcc/fortran/symbol.c (.../tags/gcc_4_8_2_release)

43163

+++ b/src/gcc/fortran/symbol.c (.../branches/gcc-4_8-branch)

43164

@@ -1110,8 +1110,8 @@

43165

return FAILURE;

43166

}

43167

43168

- if (s == SAVE_EXPLICIT && gfc_implicit_pure (NULL))

43169

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43170

+ if (s == SAVE_EXPLICIT)

43171

+ gfc_unset_implicit_pure (NULL);

43172

43173

if (s == SAVE_EXPLICIT && attr->save == SAVE_EXPLICIT)

43174

{

43175

Index: gcc/fortran/class.c

43176

===================================================================

43177

--- a/src/gcc/fortran/class.c (.../tags/gcc_4_8_2_release)

43178

+++ b/src/gcc/fortran/class.c (.../branches/gcc-4_8-branch)

43179

@@ -2486,7 +2486,7 @@

43180

return NULL;

43181

43182

/* Sometimes the typespec is passed from a single call. */

43183

- if (ts->type == BT_DERIVED)

43184

+ if (ts->type == BT_DERIVED || ts->type == BT_CLASS)

43185

return gfc_find_derived_vtab (ts->u.derived);

43186

43187

/* Find the top-level namespace. */

43188

Index: gcc/fortran/decl.c

43189

===================================================================

43190

--- a/src/gcc/fortran/decl.c (.../tags/gcc_4_8_2_release)

43191

+++ b/src/gcc/fortran/decl.c (.../branches/gcc-4_8-branch)

43192

@@ -510,10 +510,8 @@

43193

free (newdata);

43194

return MATCH_ERROR;

43195

}

43196

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

43197

43198

- if (gfc_implicit_pure (NULL))

43199

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43200

-

43201

/* Mark the variable as having appeared in a data statement. */

43202

if (gfc_add_data (&sym->attr, sym->name, &sym->declared_at) == FAILURE)

43203

{

43204

@@ -571,10 +569,8 @@

43205

gfc_error ("DATA statement at %C is not allowed in a PURE procedure");

43206

return MATCH_ERROR;

43207

}

43208

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

43209

43210

- if (gfc_implicit_pure (NULL))

43211

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43212

-

43213

return MATCH_YES;

43214

43215

cleanup:

43216

@@ -1737,6 +1733,7 @@

43217

"a PURE procedure");

43218

return MATCH_ERROR;

43219

}

43220

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

43221

43222

/* Match NULL() initialization. */

43223

m = gfc_match_null (init);

43224

@@ -2045,6 +2042,10 @@

43225

m = MATCH_ERROR;

43226

}

43227

43228

+ if (current_attr.flavor != FL_PARAMETER

43229

+ && gfc_state_stack->state != COMP_DERIVED)

43230

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

43231

+

43232

if (m != MATCH_YES)

43233

goto cleanup;

43234

}

43235

@@ -5069,7 +5070,14 @@

43236

if (gfc_add_proc (&c->attr, name, NULL) == FAILURE)

43237

return MATCH_ERROR;

43238

43239

- c->tb = tb;

43240

+ if (num == 1)

43241

+ c->tb = tb;

43242

+ else

43243

+ {

43244

+ c->tb = XCNEW (gfc_typebound_proc);

43245

+ c->tb->where = gfc_current_locus;

43246

+ *c->tb = *tb;

43247

+ }

43248

43249

/* Set interface. */

43250

if (proc_if != NULL)

43251

@@ -7384,6 +7392,7 @@

43252

43253

43254

/* Check a derived type that is being extended. */

43255

+

43256

static gfc_symbol*

43257

check_extended_derived_type (char *name)

43258

{

43259

@@ -7395,14 +7404,15 @@

43260

return NULL;

43261

}

43262

43263

+ extended = gfc_find_dt_in_generic (extended);

43264

+

43265

+ /* F08:C428. */

43266

if (!extended)

43267

{

43268

- gfc_error ("No such symbol in TYPE definition at %C");

43269

+ gfc_error ("Symbol '%s' at %C has not been previously defined", name);

43270

return NULL;

43271

}

43272

43273

- extended = gfc_find_dt_in_generic (extended);

43274

-

43275

if (extended->attr.flavor != FL_DERIVED)

43276

{

43277

gfc_error ("'%s' in EXTENDS expression at %C is not a "

43278

Index: gcc/fortran/dump-parse-tree.c

43279

===================================================================

43280

--- a/src/gcc/fortran/dump-parse-tree.c (.../tags/gcc_4_8_2_release)

43281

+++ b/src/gcc/fortran/dump-parse-tree.c (.../branches/gcc-4_8-branch)

43282

@@ -110,7 +110,8 @@

43283

break;

43284

43285

case BT_CHARACTER:

43286

- show_expr (ts->u.cl->length);

43287

+ if (ts->u.cl)

43288

+ show_expr (ts->u.cl->length);

43289

fprintf(dumpfile, " %d", ts->kind);

43290

break;

43291

43292

Index: gcc/fortran/cpp.c

43293

===================================================================

43294

--- a/src/gcc/fortran/cpp.c (.../tags/gcc_4_8_2_release)

43295

+++ b/src/gcc/fortran/cpp.c (.../branches/gcc-4_8-branch)

43296

@@ -569,6 +569,7 @@

43297

if (gfc_option.flag_preprocessed)

43298

return;

43299

43300

+ cpp_change_file (cpp_in, LC_RENAME, _("<built-in>"));

43301

if (!gfc_cpp_option.no_predefined)

43302

{

43303

/* Make sure all of the builtins about to be declared have

43304

Index: gcc/fortran/gfortran.h

43305

===================================================================

43306

--- a/src/gcc/fortran/gfortran.h (.../tags/gcc_4_8_2_release)

43307

+++ b/src/gcc/fortran/gfortran.h (.../branches/gcc-4_8-branch)

43308

@@ -2830,6 +2830,7 @@

43309

int gfc_impure_variable (gfc_symbol *);

43310

int gfc_pure (gfc_symbol *);

43311

int gfc_implicit_pure (gfc_symbol *);

43312

+void gfc_unset_implicit_pure (gfc_symbol *);

43313

int gfc_elemental (gfc_symbol *);

43314

gfc_try gfc_resolve_iterator (gfc_iterator *, bool, bool);

43315

gfc_try find_forall_index (gfc_expr *, gfc_symbol *, int);

43316

Index: gcc/fortran/ChangeLog

43317

===================================================================

43318

--- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_8_2_release)

43319

+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_8-branch)

43320

@@ -1,3 +1,259 @@

43321

+2014-04-11 Janne Blomqvist <jb@gcc.gnu.org>

43322

+

43323

+ * intrinsic.texi (RANDOM_SEED): Improve example.

43324

+

43325

+2014-04-10 Jakub Jelinek <jakub@redhat.com>

43326

+

43327

+ Backport from mainline

43328

+ 2014-03-22 Jakub Jelinek <jakub@redhat.com>

43329

+

43330

+ PR debug/60603

43331

+ * cpp.c (gfc_cpp_init): Restore cb_change_file call to

43332

+ <built-in>.

43333

+

43334

+2014-03-29 Mikael Morin <mikael@gcc.gnu.org>

43335

+

43336

+ PR fortran/60677

43337

+ * trans-intrinsic.c (gfc_conv_intrinsic_ichar): Enlarge argument

43338

+ list buffer.

43339

+

43340

+2014-03-28 Mikael Morin <mikael@gcc.gnu.org>

43341

+ Tobias Burnus <burnus@net-b.de>

43342

+

43343

+ PR fortran/60576

43344

+ * trans-expr.c (gfc_conv_derived_to_class): Avoid

43345

+ generation of out-of-bounds range expr.

43346

+

43347

+2014-03-28 Thomas Koenig <tkoenig@gcc.gnu.org>

43348

+

43349

+ PR fortran/60522

43350

+ * frontend-passes.c (cfe_code): Do not walk subtrees

43351

+ for WHERE.

43352

+

43353

+2014-03-20 Tobias Burnus <burnus@net-b.de>

43354

+

43355

+ PR fortran/60543

43356

+ PR fortran/60283

43357

+ * gfortran.h (gfc_unset_implicit_pure): New prototype.

43358

+ * resolve.c (gfc_unset_implicit_pure): New.

43359

+ (resolve_structure_cons, resolve_function,

43360

+ pure_subroutine, resolve_ordinary_assign): Use it.

43361

+ * decl.c (match_old_style_init, gfc_match_data,

43362

+ match_pointer_init, variable_decl): Ditto.

43363

+ * expr.c (gfc_check_pointer_assign): Ditto.

43364

+ * intrinsic.c (gfc_intrinsic_sub_interface): Ditto.

43365

+ * io.c (match_vtag, gfc_match_open, gfc_match_close,

43366

+ match_filepos, gfc_match_inquire, gfc_match_print,

43367

+ gfc_match_wait, check_io_constraints): Ditto.

43368

+ * match.c (gfc_match_critical, gfc_match_stopcode,

43369

+ lock_unlock_statement, sync_statement, gfc_match_allocate,

43370

+ gfc_match_deallocate): Ditto.

43371

+ * parse.c (decode_omp_directive): Ditto.

43372

+ * symbol.c (gfc_add_save): Ditto.

43373

+

43374

+2014-03-08 Janus Weil <janus@gcc.gnu.org>

43375

+

43376

+ PR fortran/60450

43377

+ * simplify.c (gfc_simplify_shape): Only clear shape if it was really

43378

+ created successfully.

43379

+

43380

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

43381

+

43382

+ Backport from mainline

43383

+ 2014-02-11 Jakub Jelinek <jakub@redhat.com>

43384

+

43385

+ PR fortran/52370

43386

+ * trans-decl.c (gfc_build_dummy_array_decl): Set TREE_NO_WARNING

43387

+ on decl if sym->attr.optional.

43388

+

43389

+2014-03-02 Mikael Morin <mikael@gcc.gnu.org>

43390

+

43391

+ PR fortran/60341

43392

+ * frontend-passes.c (optimize_comparison): Guard two union accesses

43393

+ with the corresponding tag checks.

43394

+

43395

+2014-02-22 Mikael Morin <mikael@gcc.gnu.org>

43396

+

43397

+ PR fortran/59599

43398

+ * trans-intrinsic.c (gfc_conv_intrinsic_ichar): Calculate the

43399

+ number of arguments.

43400

+

43401

+2014-02-19 Tobias Burnus <burnus@net-b.de>

43402

+

43403

+ PR fortran/49397

43404

+ * expr.c (gfc_check_pointer_assign): Add check for

43405

+ F2008Cor2, C729.

43406

+ * trans-decl.c (gfc_get_symbol_decl): Correctly generate

43407

+ external decl in a corner case.

43408

+

43409

+2014-02-19 Janus Weil <janus@gcc.gnu.org>

43410

+

43411

+ Backports from mainline:

43412

+ 2014-02-17 Janus Weil <janus@gcc.gnu.org>

43413

+

43414

+ PR fortran/55907

43415

+ * resolve.c (build_default_init_expr): Don't initialize character

43416

+ variable if -fno-automatic is given.

43417

+

43418

+ 2014-02-18 Janus Weil <janus@gcc.gnu.org>

43419

+

43420

+ PR fortran/60231

43421

+ * resolve.c (check_generic_tbp_ambiguity): Check for presence of dummy

43422

+ arguments to prevent ICE.

43423

+

43424

+2014-02-09 Janus Weil <janus@gcc.gnu.org>

43425

+

43426

+ Backport from mainline

43427

+ 2013-10-21 Tobias Burnus <burnus@net-b.de>

43428

+

43429

+ PR fortran/58803

43430

+ PR fortran/59395

43431

+ * decl.c (match_ppc_decl): Prevent later double free.

43432

+

43433

+2014-02-08 Mikael Morin <mikael@gcc.gnu.org>

43434

+

43435

+ PR fortran/57033

43436

+ * primary.c (gfc_convert_to_structure_constructor): Avoid null pointer

43437

+ dereference.

43438

+

43439

+2014-02-07 Paul Thomas <pault@gcc.gnu.org>

43440

+

43441

+ PR fortran/59906

43442

+ * trans-stmt.c (gfc_add_loop_ss_code): In the case of character

43443

+ SS_REFERENCE, use gfc_conv_string_parameter to ensure that a

43444

+ pointer to the string is stored.

43445

+ * trans-expr.c (gfc_conv_expr_reference): Likewise, use

43446

+ gfc_conv_string_parameter to ensure that a pointer to is passed

43447

+ to the elemental function.

43448

+

43449

+2014-02-01 Paul Thomas <pault@gcc.gnu.org>

43450

+

43451

+ PR fortran/59414

43452

+ * trans-stmt.c (gfc_trans_allocate): Before the pointer

43453

+ assignment to transfer the source _vptr to a class allocate

43454

+ expression, the final class reference should be exposed. The

43455

+ tail that includes the _data and array references is stored.

43456

+ This reduced expression is transferred to 'lhs' and the _vptr

43457

+ added. Then the tail is restored to the allocate expression.

43458

+

43459

+2014-01-26 Mikael Morin <mikael@gcc.gnu.org>

43460

+

43461

+ PR fortran/58007

43462

+ * module.c

43463

+ (fp2, find_pointer2): Remove.

43464

+ (mio_component_ref): Don't forcedfully set the containing derived type

43465

+ symbol for loading. Remove unused argument.

43466

+ (mio_ref): Update caller

43467

+ (skip_list): New argument nest_level. Initialize level with the new

43468

+ argument.

43469

+ (read_module): Add forced pointer components association for derived

43470

+ type symbols.

43471

+

43472

+2014-01-19 Paul Thomas <pault@gcc.gnu.org>

43473

+

43474

+ Backport from mainline

43475

+ 2013-12-01 Paul Thomas <pault@gcc.gnu.org>

43476

+

43477

+ PR fortran/58410

43478

+ * trans-array.c (gfc_alloc_allocatable_for_assignment): Do not

43479

+ use the array bounds of an unallocated array but set its size

43480

+ to zero instead.

43481

+

43482

+2014-01-19 Paul Thomas <pault@gcc.gnu.org>

43483

+

43484

+ Backport from mainline

43485

+ 2013-12-01 Paul Thomas <pault@gcc.gnu.org>

43486

+

43487

+ PR fortran/34547

43488

+ * resolve.c (resolve_transfer): EXPR_NULL is always in an

43489

+ invalid context in a transfer statement.

43490

+

43491

+2014-01-11 Janus Weil <janus@gcc.gnu.org>

43492

+

43493

+ Backport from mainline

43494

+ 2013-12-29 Janus Weil <janus@gcc.gnu.org>

43495

+

43496

+ PR fortran/59612

43497

+ PR fortran/57042

43498

+ * dump-parse-tree.c (show_typespec): Check for charlen.

43499

+ * invoke.texi: Fix documentation of -fdump-fortran-optimized and

43500

+ -fdump-parse-tree.

43501

+

43502

+2014-01-04 Janus Weil <janus@gcc.gnu.org>

43503

+

43504

+ Backport from mainline

43505

+ 2014-01-02 Janus Weil <janus@gcc.gnu.org>

43506

+

43507

+ PR fortran/59654

43508

+ * resolve.c (resolve_typebound_procedures): No need to create the vtab

43509

+ here.

43510

+

43511

+2013-12-31 Janus Weil <janus@gcc.gnu.org>

43512

+

43513

+ Backport from mainline

43514

+ 2013-12-30 Janus Weil <janus@gcc.gnu.org>

43515

+

43516

+ PR fortran/58998

43517

+ * resolve.c (resolve_symbol): Check that symbol is not only flavorless

43518

+ but also untyped.

43519

+

43520

+2013-12-18 Janus Weil <janus@gcc.gnu.org>

43521

+

43522

+ Backport from mainline

43523

+ 2013-12-15 Janus Weil <janus@gcc.gnu.org>

43524

+

43525

+ PR fortran/59493

43526

+ * class.c (gfc_find_intrinsic_vtab): Handle BT_CLASS.

43527

+

43528

+2013-11-30 Paul Thomas <pault@gcc.gnu.org>

43529

+

43530

+ Backport from mainline

43531

+ 2013-11-04 Paul Thomas <pault@gcc.gnu.org>

43532

+

43533

+ PR fortran/57445

43534

+ * trans-expr.c (gfc_conv_class_to_class): Remove spurious

43535

+ assert.

43536

+

43537

+2013-11-17 Janus Weil <janus@gcc.gnu.org>

43538

+

43539

+ Backport from mainline

43540

+ 2013-11-07 Janus Weil <janus@gcc.gnu.org>

43541

+

43542

+ PR fortran/58471

43543

+ * primary.c (gfc_expr_attr): Check for result symbol.

43544

+

43545

+2013-11-16 Janus Weil <janus@gcc.gnu.org>

43546

+

43547

+ Backport from mainline

43548

+ 2013-09-20 Janus Weil <janus@gcc.gnu.org>

43549

+

43550

+ PR fortran/58099

43551

+ * expr.c (gfc_check_pointer_assign): Remove second call to

43552

+ 'gfc_compare_interfaces' with swapped arguments.

43553

+ * interface.c (gfc_compare_interfaces): Symmetrize the call to

43554

+ 'check_result_characteristics' by calling it with swapped arguments.

43555

+

43556

+2013-11-16 Paul Thomas <pault@gcc.gnu.org>

43557

+

43558

+ PR fortran/58771

43559

+ * trans-io.c (transfer_expr): If the backend_decl for a derived

43560

+ type is missing, build it with gfc_typenode_for_spec.

43561

+

43562

+2013-11-05 Steven G. Kargl <kargl@gcc.gnu.org>

43563

+

43564

+ PR fortran/58989

43565

+ * check.c (gfc_check_reshape): ensure that shape is a constant

43566

+ expression.

43567

+

43568

+2013-11-02 Janus Weil <janus@gcc.gnu.org>

43569

+

43570

+ Backport from mainline

43571

+ 2013-09-23 Janus Weil <janus@gcc.gnu.org>

43572

+

43573

+ PR fortran/58355

43574

+ * decl.c (check_extended_derived_type): Prevent segfault, modify error

43575

+ message.

43576

+

43577

2013-10-16 Release Manager

43578

43579

* GCC 4.8.2 released.

43580

Index: gcc/fortran/trans-stmt.c

43581

===================================================================

43582

--- a/src/gcc/fortran/trans-stmt.c (.../tags/gcc_4_8_2_release)

43583

+++ b/src/gcc/fortran/trans-stmt.c (.../branches/gcc-4_8-branch)

43584

@@ -5104,10 +5104,49 @@

43585

{

43586

gfc_expr *lhs, *rhs;

43587

gfc_se lse;

43588

+ gfc_ref *ref, *class_ref, *tail;

43589

43590

+ /* Find the last class reference. */

43591

+ class_ref = NULL;

43592

+ for (ref = e->ref; ref; ref = ref->next)

43593

+ {

43594

+ if (ref->type == REF_COMPONENT

43595

+ && ref->u.c.component->ts.type == BT_CLASS)

43596

+ class_ref = ref;

43597

+

43598

+ if (ref->next == NULL)

43599

+ break;

43600

+ }

43601

+

43602

+ /* Remove and store all subsequent references after the

43603

+ CLASS reference. */

43604

+ if (class_ref)

43605

+ {

43606

+ tail = class_ref->next;

43607

+ class_ref->next = NULL;

43608

+ }

43609

+ else

43610

+ {

43611

+ tail = e->ref;

43612

+ e->ref = NULL;

43613

+ }

43614

+

43615

lhs = gfc_expr_to_initialize (e);

43616

gfc_add_vptr_component (lhs);

43617

43618

+ /* Remove the _vptr component and restore the original tail

43619

+ references. */

43620

+ if (class_ref)

43621

+ {

43622

+ gfc_free_ref_list (class_ref->next);

43623

+ class_ref->next = tail;

43624

+ }

43625

+ else

43626

+ {

43627

+ gfc_free_ref_list (e->ref);

43628

+ e->ref = tail;

43629

+ }

43630

+

43631

if (class_expr != NULL_TREE)

43632

{

43633

/* Polymorphic SOURCE: VPTR must be determined at run time. */

43634

Index: gcc/fortran/expr.c

43635

===================================================================

43636

--- a/src/gcc/fortran/expr.c (.../tags/gcc_4_8_2_release)

43637

+++ b/src/gcc/fortran/expr.c (.../branches/gcc-4_8-branch)

43638

@@ -3555,11 +3555,13 @@

43639

return FAILURE;

43640

}

43641

43642

- if (!gfc_compare_interfaces (s2, s1, name, 0, 1,

43643

- err, sizeof(err), NULL, NULL))

43644

+ /* Check F2008Cor2, C729. */

43645

+ if (!s2->attr.intrinsic && s2->attr.if_source == IFSRC_UNKNOWN

43646

+ && !s2->attr.external && !s2->attr.subroutine && !s2->attr.function)

43647

{

43648

- gfc_error ("Interface mismatch in procedure pointer assignment "

43649

- "at %L: %s", &rvalue->where, err);

43650

+ gfc_error ("Procedure pointer target '%s' at %L must be either an "

43651

+ "intrinsic, host or use associated, referenced or have "

43652

+ "the EXTERNAL attribute", s2->name, &rvalue->where);

43653

return FAILURE;

43654

}

43655

43656

@@ -3679,9 +3681,8 @@

43657

}

43658

43659

if (is_implicit_pure && gfc_impure_variable (rvalue->symtree->n.sym))

43660

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43661

+ gfc_unset_implicit_pure (gfc_current_ns->proc_name);

43662

43663

-

43664

if (gfc_has_vector_index (rvalue))

43665

{

43666

gfc_error ("Pointer assignment with vector subscript "

43667

Index: gcc/fortran/module.c

43668

===================================================================

43669

--- a/src/gcc/fortran/module.c (.../tags/gcc_4_8_2_release)

43670

+++ b/src/gcc/fortran/module.c (.../branches/gcc-4_8-branch)

43671

@@ -386,37 +386,6 @@

43672

}

43673

43674

43675

-/* Recursive function to find a pointer within a tree by brute force. */

43676

-

43677

-static pointer_info *

43678

-fp2 (pointer_info *p, const void *target)

43679

-{

43680

- pointer_info *q;

43681

-

43682

- if (p == NULL)

43683

- return NULL;

43684

-

43685

- if (p->u.pointer == target)

43686

- return p;

43687

-

43688

- q = fp2 (p->left, target);

43689

- if (q != NULL)

43690

- return q;

43691

-

43692

- return fp2 (p->right, target);

43693

-}

43694

-

43695

-

43696

-/* During reading, find a pointer_info node from the pointer value.

43697

- This amounts to a brute-force search. */

43698

-

43699

-static pointer_info *

43700

-find_pointer2 (void *p)

43701

-{

43702

- return fp2 (pi_root, p);

43703

-}

43704

-

43705

-

43706

/* Resolve any fixups using a known pointer. */

43707

43708

static void

43709

@@ -2522,45 +2491,13 @@

43710

the namespace and is not loaded again. */

43711

43712

static void

43713

-mio_component_ref (gfc_component **cp, gfc_symbol *sym)

43714

+mio_component_ref (gfc_component **cp)

43715

{

43716

- char name[GFC_MAX_SYMBOL_LEN + 1];

43717

- gfc_component *q;

43718

pointer_info *p;

43719

43720

p = mio_pointer_ref (cp);

43721

if (p->type == P_UNKNOWN)

43722

p->type = P_COMPONENT;

43723

-

43724

- if (iomode == IO_OUTPUT)

43725

- mio_pool_string (&(*cp)->name);

43726

- else

43727

- {

43728

- mio_internal_string (name);

43729

-

43730

- if (sym && sym->attr.is_class)

43731

- sym = sym->components->ts.u.derived;

43732

-

43733

- /* It can happen that a component reference can be read before the

43734

- associated derived type symbol has been loaded. Return now and

43735

- wait for a later iteration of load_needed. */

43736

- if (sym == NULL)

43737

- return;

43738

-

43739

- if (sym->components != NULL && p->u.pointer == NULL)

43740

- {

43741

- /* Symbol already loaded, so search by name. */

43742

- q = gfc_find_component (sym, name, true, true);

43743

-

43744

- if (q)

43745

- associate_integer_pointer (p, q);

43746

- }

43747

-

43748

- /* Make sure this symbol will eventually be loaded. */

43749

- p = find_pointer2 (sym);

43750

- if (p->u.rsym.state == UNUSED)

43751

- p->u.rsym.state = NEEDED;

43752

- }

43753

}

43754

43755

43756

@@ -2917,7 +2854,7 @@

43757

43758

case REF_COMPONENT:

43759

mio_symbol_ref (&r->u.c.sym);

43760

- mio_component_ref (&r->u.c.component, r->u.c.sym);

43761

+ mio_component_ref (&r->u.c.component);

43762

break;

43763

43764

case REF_SUBSTRING:

43765

@@ -3772,7 +3709,9 @@

43766

43767

43768

/* Unlike most other routines, the address of the symbol node is already

43769

- fixed on input and the name/module has already been filled in. */

43770

+ fixed on input and the name/module has already been filled in.

43771

+ If you update the symbol format here, don't forget to update read_module

43772

+ as well (look for "seek to the symbol's component list"). */

43773

43774

static void

43775

mio_symbol (gfc_symbol *sym)

43776

@@ -3782,6 +3721,7 @@

43777

mio_lparen ();

43778

43779

mio_symbol_attribute (&sym->attr);

43780

+

43781

mio_typespec (&sym->ts);

43782

if (sym->ts.type == BT_CLASS)

43783

sym->attr.class_ok = 1;

43784

@@ -3812,7 +3752,6 @@

43785

43786

/* Note that components are always saved, even if they are supposed

43787

to be private. Component access is checked during searching. */

43788

-

43789

mio_component_list (&sym->components, sym->attr.vtype);

43790

43791

if (sym->components != NULL)

43792

@@ -3914,14 +3853,17 @@

43793

}

43794

43795

43796

-/* Skip a list between balanced left and right parens. */

43797

+/* Skip a list between balanced left and right parens.

43798

+ By setting NEST_LEVEL one assumes that a number of NEST_LEVEL opening parens

43799

+ have been already parsed by hand, and the remaining of the content is to be

43800

+ skipped here. The default value is 0 (balanced parens). */

43801

43802

static void

43803

-skip_list (void)

43804

+skip_list (int nest_level = 0)

43805

{

43806

int level;

43807

43808

- level = 0;

43809

+ level = nest_level;

43810

do

43811

{

43812

switch (parse_atom ())

43813

@@ -4555,7 +4497,6 @@

43814

info->u.rsym.ns = atom_int;

43815

43816

get_module_locus (&info->u.rsym.where);

43817

- skip_list ();

43818

43819

/* See if the symbol has already been loaded by a previous module.

43820

If so, we reference the existing symbol and prevent it from

43821

@@ -4566,11 +4507,57 @@

43822

43823

if (sym == NULL

43824

|| (sym->attr.flavor == FL_VARIABLE && info->u.rsym.ns !=1))

43825

- continue;

43826

+ {

43827

+ skip_list ();

43828

+ continue;

43829

+ }

43830

43831

info->u.rsym.state = USED;

43832

info->u.rsym.sym = sym;

43833

+ /* The current symbol has already been loaded, so we can avoid loading

43834

+ it again. However, if it is a derived type, some of its components

43835

+ can be used in expressions in the module. To avoid the module loading

43836

+ failing, we need to associate the module's component pointer indexes

43837

+ with the existing symbol's component pointers. */

43838

+ if (sym->attr.flavor == FL_DERIVED)

43839

+ {

43840

+ gfc_component *c;

43841

43842

+ /* First seek to the symbol's component list. */

43843

+ mio_lparen (); /* symbol opening. */

43844

+ skip_list (); /* skip symbol attribute. */

43845

+ skip_list (); /* typespec. */

43846

+ require_atom (ATOM_INTEGER); /* namespace ref. */

43847

+ require_atom (ATOM_INTEGER); /* common ref. */

43848

+ skip_list (); /* formal args. */

43849

+ /* no value. */

43850

+ skip_list (); /* array_spec. */

43851

+ require_atom (ATOM_INTEGER); /* result. */

43852

+ /* not a cray pointer. */

43853

+

43854

+ mio_lparen (); /* component list opening. */

43855

+ for (c = sym->components; c; c = c->next)

43856

+ {

43857

+ pointer_info *p;

43858

+ const char *comp_name;

43859

+ int n;

43860

+

43861

+ mio_lparen (); /* component opening. */

43862

+ mio_integer (&n);

43863

+ p = get_integer (n);

43864

+ if (p->u.pointer == NULL)

43865

+ associate_integer_pointer (p, c);

43866

+ mio_pool_string (&comp_name);

43867

+ gcc_assert (comp_name == c->name);

43868

+ skip_list (1); /* component end. */

43869

+ }

43870

+ mio_rparen (); /* component list closing. */

43871

+

43872

+ skip_list (1); /* symbol end. */

43873

+ }

43874

+ else

43875

+ skip_list ();

43876

+

43877

/* Some symbols do not have a namespace (eg. formal arguments),

43878

so the automatic "unique symtree" mechanism must be suppressed

43879

by marking them as referenced. */

43880

Index: gcc/fortran/io.c

43881

===================================================================

43882

--- a/src/gcc/fortran/io.c (.../tags/gcc_4_8_2_release)

43883

+++ b/src/gcc/fortran/io.c (.../branches/gcc-4_8-branch)

43884

@@ -1309,7 +1309,8 @@

43885

return MATCH_ERROR;

43886

}

43887

43888

- if (gfc_pure (NULL) && gfc_impure_variable (result->symtree->n.sym))

43889

+ bool impure = gfc_impure_variable (result->symtree->n.sym);

43890

+ if (impure && gfc_pure (NULL))

43891

{

43892

gfc_error ("Variable %s cannot be assigned in PURE procedure at %C",

43893

tag->name);

43894

@@ -1317,8 +1318,8 @@

43895

return MATCH_ERROR;

43896

}

43897

43898

- if (gfc_implicit_pure (NULL) && gfc_impure_variable (result->symtree->n.sym))

43899

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43900

+ if (impure)

43901

+ gfc_unset_implicit_pure (NULL);

43902

43903

*v = result;

43904

return MATCH_YES;

43905

@@ -1838,8 +1839,7 @@

43906

goto cleanup;

43907

}

43908

43909

- if (gfc_implicit_pure (NULL))

43910

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43911

+ gfc_unset_implicit_pure (NULL);

43912

43913

warn = (open->err || open->iostat) ? true : false;

43914

43915

@@ -2251,8 +2251,7 @@

43916

goto cleanup;

43917

}

43918

43919

- if (gfc_implicit_pure (NULL))

43920

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43921

+ gfc_unset_implicit_pure (NULL);

43922

43923

warn = (close->iostat || close->err) ? true : false;

43924

43925

@@ -2419,8 +2418,7 @@

43926

goto cleanup;

43927

}

43928

43929

- if (gfc_implicit_pure (NULL))

43930

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43931

+ gfc_unset_implicit_pure (NULL);

43932

43933

new_st.op = op;

43934

new_st.ext.filepos = fp;

43935

@@ -3276,9 +3274,8 @@

43936

"an internal file in a PURE procedure",

43937

io_kind_name (k));

43938

43939

- if (gfc_implicit_pure (NULL) && (k == M_READ || k == M_WRITE))

43940

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43941

-

43942

+ if (k == M_READ || k == M_WRITE)

43943

+ gfc_unset_implicit_pure (NULL);

43944

}

43945

43946

if (k != M_READ)

43947

@@ -3809,8 +3806,7 @@

43948

return MATCH_ERROR;

43949

}

43950

43951

- if (gfc_implicit_pure (NULL))

43952

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43953

+ gfc_unset_implicit_pure (NULL);

43954

43955

return MATCH_YES;

43956

}

43957

@@ -3969,8 +3965,7 @@

43958

return MATCH_ERROR;

43959

}

43960

43961

- if (gfc_implicit_pure (NULL))

43962

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43963

+ gfc_unset_implicit_pure (NULL);

43964

43965

new_st.block = gfc_get_code ();

43966

new_st.block->op = EXEC_IOLENGTH;

43967

@@ -4023,8 +4018,7 @@

43968

goto cleanup;

43969

}

43970

43971

- if (gfc_implicit_pure (NULL))

43972

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43973

+ gfc_unset_implicit_pure (NULL);

43974

43975

if (inquire->id != NULL && inquire->pending == NULL)

43976

{

43977

@@ -4212,8 +4206,7 @@

43978

goto cleanup;

43979

}

43980

43981

- if (gfc_implicit_pure (NULL))

43982

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

43983

+ gfc_unset_implicit_pure (NULL);

43984

43985

new_st.op = EXEC_WAIT;

43986

new_st.ext.wait = wait;

43987

Index: gcc/fortran/frontend-passes.c

43988

===================================================================

43989

--- a/src/gcc/fortran/frontend-passes.c (.../tags/gcc_4_8_2_release)

43990

+++ b/src/gcc/fortran/frontend-passes.c (.../branches/gcc-4_8-branch)

43991

@@ -623,12 +623,35 @@

43992

to insert statements as needed. */

43993

43994

static int

43995

-cfe_code (gfc_code **c, int *walk_subtrees ATTRIBUTE_UNUSED,

43996

- void *data ATTRIBUTE_UNUSED)

43997

+cfe_code (gfc_code **c, int *walk_subtrees, void *data ATTRIBUTE_UNUSED)

43998

{

43999

current_code = c;

44000

inserted_block = NULL;

44001

changed_statement = NULL;

44002

+

44003

+ /* Do not do anything inside a WHERE statement; scalar assignments, BLOCKs

44004

+ and allocation on assigment are prohibited inside WHERE, and finally

44005

+ masking an expression would lead to wrong-code when replacing

44006

+

44007

+ WHERE (a>0)

44008

+ b = sum(foo(a) + foo(a))

44009

+ END WHERE

44010

+

44011

+ with

44012

+

44013

+ WHERE (a > 0)

44014

+ tmp = foo(a)

44015

+ b = sum(tmp + tmp)

44016

+ END WHERE

44017

+*/

44018

+

44019

+ if ((*c)->op == EXEC_WHERE)

44020

+ {

44021

+ *walk_subtrees = 0;

44022

+ return 0;

44023

+ }

44024

+

44025

+

44026

return 0;

44027

}

44028

44029

@@ -1214,7 +1237,9 @@

44030

/* Replace A // B < A // C with B < C, and A // B < C // B

44031

with A < C. */

44032

if (op1->ts.type == BT_CHARACTER && op2->ts.type == BT_CHARACTER

44033

+ && op1->expr_type == EXPR_OP

44034

&& op1->value.op.op == INTRINSIC_CONCAT

44035

+ && op2->expr_type == EXPR_OP

44036

&& op2->value.op.op == INTRINSIC_CONCAT)

44037

{

44038

gfc_expr *op1_left = op1->value.op.op1;

44039

Index: gcc/fortran/resolve.c

44040

===================================================================

44041

--- a/src/gcc/fortran/resolve.c (.../tags/gcc_4_8_2_release)

44042

+++ b/src/gcc/fortran/resolve.c (.../branches/gcc-4_8-branch)

44043

@@ -1,5 +1,5 @@

44044

/* Perform type resolution on the various structures.

44045

44046

44047

Contributed by Andy Vaught

44048

44049

This file is part of GCC.

44050

@@ -1259,9 +1259,10 @@

44051

}

44052

44053

/* F2003, C1272 (3). */

44054

- if (gfc_pure (NULL) && cons->expr->expr_type == EXPR_VARIABLE

44055

- && (gfc_impure_variable (cons->expr->symtree->n.sym)

44056

- || gfc_is_coindexed (cons->expr)))

44057

+ bool impure = cons->expr->expr_type == EXPR_VARIABLE

44058

+ && (gfc_impure_variable (cons->expr->symtree->n.sym)

44059

+ || gfc_is_coindexed (cons->expr));

44060

+ if (impure && gfc_pure (NULL))

44061

{

44062

t = FAILURE;

44063

gfc_error ("Invalid expression in the structure constructor for "

44064

@@ -1269,12 +1270,8 @@

44065

comp->name, &cons->expr->where);

44066

}

44067

44068

- if (gfc_implicit_pure (NULL)

44069

- && cons->expr->expr_type == EXPR_VARIABLE

44070

- && (gfc_impure_variable (cons->expr->symtree->n.sym)

44071

- || gfc_is_coindexed (cons->expr)))

44072

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44073

-

44074

+ if (impure)

44075

+ gfc_unset_implicit_pure (NULL);

44076

}

44077

44078

return t;

44079

@@ -3295,8 +3292,7 @@

44080

t = FAILURE;

44081

}

44082

44083

- if (gfc_implicit_pure (NULL))

44084

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44085

+ gfc_unset_implicit_pure (NULL);

44086

}

44087

44088

/* Functions without the RECURSIVE attribution are not allowed to

44089

@@ -3361,8 +3357,7 @@

44090

gfc_error ("Subroutine call to '%s' at %L is not PURE", sym->name,

44091

&c->loc);

44092

44093

- if (gfc_implicit_pure (NULL))

44094

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44095

+ gfc_unset_implicit_pure (NULL);

44096

}

44097

44098

44099

@@ -8705,10 +8700,11 @@

44100

&& exp->value.op.op == INTRINSIC_PARENTHESES)

44101

exp = exp->value.op.op1;

44102

44103

- if (exp && exp->expr_type == EXPR_NULL && exp->ts.type == BT_UNKNOWN)

44104

+ if (exp && exp->expr_type == EXPR_NULL

44105

+ && code->ext.dt)

44106

{

44107

- gfc_error ("NULL intrinsic at %L in data transfer statement requires "

44108

- "MOLD=", &exp->where);

44109

+ gfc_error ("Invalid context for NULL () intrinsic at %L",

44110

+ &exp->where);

44111

return;

44112

}

44113

44114

@@ -9612,7 +9608,7 @@

44115

if (lhs->expr_type == EXPR_VARIABLE

44116

&& lhs->symtree->n.sym != gfc_current_ns->proc_name

44117

&& lhs->symtree->n.sym->ns != gfc_current_ns)

44118

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44119

+ gfc_unset_implicit_pure (NULL);

44120

44121

if (lhs->ts.type == BT_DERIVED

44122

&& lhs->expr_type == EXPR_VARIABLE

44123

@@ -9620,11 +9616,11 @@

44124

&& rhs->expr_type == EXPR_VARIABLE

44125

&& (gfc_impure_variable (rhs->symtree->n.sym)

44126

|| gfc_is_coindexed (rhs)))

44127

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44128

+ gfc_unset_implicit_pure (NULL);

44129

44130

/* Fortran 2008, C1283. */

44131

if (gfc_is_coindexed (lhs))

44132

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44133

+ gfc_unset_implicit_pure (NULL);

44134

}

44135

44136

/* F03:7.4.1.2. */

44137

@@ -11057,7 +11053,7 @@

44138

init_expr = NULL;

44139

}

44140

if (!init_expr && gfc_option.flag_init_character == GFC_INIT_CHARACTER_ON

44141

- && sym->ts.u.cl->length)

44142

+ && sym->ts.u.cl->length && gfc_option.flag_max_stack_var_size != 0)

44143

{

44144

gfc_actual_arglist *arg;

44145

init_expr = gfc_get_expr ();

44146

@@ -11877,6 +11873,7 @@

44147

{

44148

gfc_symbol *sym1, *sym2;

44149

const char *pass1, *pass2;

44150

+ gfc_formal_arglist *dummy_args;

44151

44152

gcc_assert (t1->specific && t2->specific);

44153

gcc_assert (!t1->specific->is_generic);

44154

@@ -11899,19 +11896,33 @@

44155

return FAILURE;

44156

}

44157

44158

- /* Compare the interfaces. */

44159

+ /* Determine PASS arguments. */

44160

if (t1->specific->nopass)

44161

pass1 = NULL;

44162

else if (t1->specific->pass_arg)

44163

pass1 = t1->specific->pass_arg;

44164

else

44165

- pass1 = gfc_sym_get_dummy_args (t1->specific->u.specific->n.sym)->sym->name;

44166

+ {

44167

+ dummy_args = gfc_sym_get_dummy_args (t1->specific->u.specific->n.sym);

44168

+ if (dummy_args)

44169

+ pass1 = dummy_args->sym->name;

44170

+ else

44171

+ pass1 = NULL;

44172

+ }

44173

if (t2->specific->nopass)

44174

pass2 = NULL;

44175

else if (t2->specific->pass_arg)

44176

pass2 = t2->specific->pass_arg;

44177

else

44178

- pass2 = gfc_sym_get_dummy_args (t2->specific->u.specific->n.sym)->sym->name;

44179

+ {

44180

+ dummy_args = gfc_sym_get_dummy_args (t2->specific->u.specific->n.sym);

44181

+ if (dummy_args)

44182

+ pass2 = dummy_args->sym->name;

44183

+ else

44184

+ pass2 = NULL;

44185

+ }

44186

+

44187

+ /* Compare the interfaces. */

44188

if (gfc_compare_interfaces (sym1, sym2, sym2->name, !t1->is_operator, 0,

44189

NULL, 0, pass1, pass2))

44190

{

44191

@@ -12425,9 +12436,6 @@

44192

resolve_bindings_derived = derived;

44193

resolve_bindings_result = SUCCESS;

44194

44195

- /* Make sure the vtab has been generated. */

44196

- gfc_find_derived_vtab (derived);

44197

-

44198

if (derived->f2k_derived->tb_sym_root)

44199

gfc_traverse_symtree (derived->f2k_derived->tb_sym_root,

44200

&resolve_typebound_procedure);

44201

@@ -13256,7 +13264,8 @@

44202

if (sym->attr.flavor == FL_UNKNOWN

44203

|| (sym->attr.flavor == FL_PROCEDURE && !sym->attr.intrinsic

44204

&& !sym->attr.generic && !sym->attr.external

44205

- && sym->attr.if_source == IFSRC_UNKNOWN))

44206

+ && sym->attr.if_source == IFSRC_UNKNOWN

44207

+ && sym->ts.type == BT_UNKNOWN))

44208

{

44209

44210

/* If we find that a flavorless symbol is an interface in one of the

44211

@@ -14376,6 +14385,33 @@

44212

}

44213

44214

44215

+void

44216

+gfc_unset_implicit_pure (gfc_symbol *sym)

44217

+{

44218

+ gfc_namespace *ns;

44219

+

44220

+ if (sym == NULL)

44221

+ {

44222

+ /* Check if the current procedure is implicit_pure. Walk up

44223

+ the procedure list until we find a procedure. */

44224

+ for (ns = gfc_current_ns; ns; ns = ns->parent)

44225

+ {

44226

+ sym = ns->proc_name;

44227

+ if (sym == NULL)

44228

+ return;

44229

+

44230

+ if (sym->attr.flavor == FL_PROCEDURE)

44231

+ break;

44232

+ }

44233

+ }

44234

+

44235

+ if (sym->attr.flavor == FL_PROCEDURE)

44236

+ sym->attr.implicit_pure = 0;

44237

+ else

44238

+ sym->attr.pure = 0;

44239

+}

44240

+

44241

+

44242

/* Test whether the current procedure is elemental or not. */

44243

44244

int

44245

Index: gcc/fortran/trans-io.c

44246

===================================================================

44247

--- a/src/gcc/fortran/trans-io.c (.../tags/gcc_4_8_2_release)

44248

+++ b/src/gcc/fortran/trans-io.c (.../branches/gcc-4_8-branch)

44249

@@ -243,16 +243,16 @@

44250

44251

/* The code to generate the error. */

44252

gfc_start_block (&block);

44253

-

44254

+

44255

arg1 = gfc_build_addr_expr (NULL_TREE, var);

44256

-

44257

+

44258

arg2 = build_int_cst (integer_type_node, error_code),

44259

-

44260

+

44261

asprintf (&message, "%s", _(msgid));

44262

arg3 = gfc_build_addr_expr (pchar_type_node,

44263

gfc_build_localized_cstring_const (message));

44264

free (message);

44265

-

44266

+

44267

tmp = build_call_expr_loc (input_location,

44268

gfor_fndecl_generate_error, 3, arg1, arg2, arg3);

44269

44270

@@ -521,7 +521,7 @@

44271

gfc_trans_io_runtime_check (cond, var, LIBERROR_BAD_UNIT,

44272

"Unit number in I/O statement too small",

44273

&se.pre);

44274

-

44275

+

44276

/* UNIT numbers should be less than the max. */

44277

val = gfc_conv_mpz_to_tree (gfc_integer_kinds[i].huge, 4);

44278

cond = fold_build2_loc (input_location, GT_EXPR, boolean_type_node,

44279

@@ -1000,7 +1000,7 @@

44280

if (p->convert)

44281

mask |= set_string (&block, &post_block, var, IOPARM_open_convert,

44282

p->convert);

44283

-

44284

+

44285

if (p->newunit)

44286

mask |= set_parameter_ref (&block, &post_block, var, IOPARM_open_newunit,

44287

p->newunit);

44288

@@ -1234,7 +1234,7 @@

44289

{

44290

mask |= set_parameter_ref (&block, &post_block, var, IOPARM_inquire_exist,

44291

p->exist);

44292

-

44293

+

44294

if (p->unit && !p->iostat)

44295

{

44296

p->iostat = create_dummy_iostat ();

44297

@@ -1322,7 +1322,7 @@

44298

if (p->pad)

44299

mask |= set_string (&block, &post_block, var, IOPARM_inquire_pad,

44300

p->pad);

44301

-

44302

+

44303

if (p->convert)

44304

mask |= set_string (&block, &post_block, var, IOPARM_inquire_convert,

44305

p->convert);

44306

@@ -1547,7 +1547,7 @@

44307

tree dtype;

44308

tree dt_parm_addr;

44309

tree decl = NULL_TREE;

44310

- int n_dim;

44311

+ int n_dim;

44312

int itype;

44313

int rank = 0;

44314

44315

@@ -2032,7 +2032,7 @@

44316

if (gfc_notification_std (GFC_STD_GNU) != SILENT)

44317

{

44318

gfc_error_now ("Derived type '%s' at %L has PRIVATE components",

44319

- ts->u.derived->name, code != NULL ? &(code->loc) :

44320

+ ts->u.derived->name, code != NULL ? &(code->loc) :

44321

&gfc_current_locus);

44322

return;

44323

}

44324

@@ -2041,7 +2041,7 @@

44325

ts->kind = ts->u.derived->ts.kind;

44326

ts->f90_type = ts->u.derived->ts.f90_type;

44327

}

44328

-

44329

+

44330

kind = ts->kind;

44331

function = NULL;

44332

arg2 = NULL;

44333

@@ -2123,7 +2123,7 @@

44334

function = iocall[IOCALL_X_CHARACTER_WIDE];

44335

else

44336

function = iocall[IOCALL_X_CHARACTER_WIDE_WRITE];

44337

-

44338

+

44339

tmp = gfc_build_addr_expr (NULL_TREE, dt_parm);

44340

tmp = build_call_expr_loc (input_location,

44341

function, 4, tmp, addr_expr, arg2, arg3);

44342

@@ -2158,6 +2158,12 @@

44343

expr = build_fold_indirect_ref_loc (input_location,

44344

expr);

44345

44346

+ /* Make sure that the derived type has been built. An external

44347

+ function, if only referenced in an io statement requires this

44348

+ check (see PR58771). */

44349

+ if (ts->u.derived->backend_decl == NULL_TREE)

44350

+ tmp = gfc_typenode_for_spec (ts);

44351

+

44352

for (c = ts->u.derived->components; c; c = c->next)

44353

{

44354

field = c->backend_decl;

44355

Index: gcc/fortran/trans-decl.c

44356

===================================================================

44357

--- a/src/gcc/fortran/trans-decl.c (.../tags/gcc_4_8_2_release)

44358

+++ b/src/gcc/fortran/trans-decl.c (.../branches/gcc-4_8-branch)

44359

@@ -1013,6 +1013,10 @@

44360

TREE_STATIC (decl) = 0;

44361

DECL_EXTERNAL (decl) = 0;

44362

44363

+ /* Avoid uninitialized warnings for optional dummy arguments. */

44364

+ if (sym->attr.optional)

44365

+ TREE_NO_WARNING (decl) = 1;

44366

+

44367

/* We should never get deferred shape arrays here. We used to because of

44368

frontend bugs. */

44369

gcc_assert (sym->as->type != AS_DEFERRED);

44370

@@ -1358,9 +1362,10 @@

44371

44372

if (sym->attr.flavor == FL_PROCEDURE)

44373

{

44374

- /* Catch function declarations. Only used for actual parameters,

44375

+ /* Catch functions. Only used for actual parameters,

44376

procedure pointers and procptr initialization targets. */

44377

- if (sym->attr.external || sym->attr.use_assoc || sym->attr.intrinsic)

44378

+ if (sym->attr.external || sym->attr.use_assoc || sym->attr.intrinsic

44379

+ || sym->attr.if_source != IFSRC_DECL)

44380

{

44381

decl = gfc_get_extern_function_decl (sym);

44382

gfc_set_decl_location (decl, &sym->declared_at);

44383

Index: gcc/fortran/match.c

44384

===================================================================

44385

--- a/src/gcc/fortran/match.c (.../tags/gcc_4_8_2_release)

44386

+++ b/src/gcc/fortran/match.c (.../branches/gcc-4_8-branch)

44387

@@ -1753,8 +1753,7 @@

44388

return MATCH_ERROR;

44389

}

44390

44391

- if (gfc_implicit_pure (NULL))

44392

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44393

+ gfc_unset_implicit_pure (NULL);

44394

44395

if (gfc_notify_std (GFC_STD_F2008, "CRITICAL statement at %C")

44396

== FAILURE)

44397

@@ -2683,8 +2682,7 @@

44398

goto cleanup;

44399

}

44400

44401

- if (gfc_implicit_pure (NULL))

44402

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44403

+ gfc_unset_implicit_pure (NULL);

44404

44405

if (st == ST_STOP && gfc_find_state (COMP_CRITICAL) == SUCCESS)

44406

{

44407

@@ -2824,8 +2822,7 @@

44408

return MATCH_ERROR;

44409

}

44410

44411

- if (gfc_implicit_pure (NULL))

44412

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44413

+ gfc_unset_implicit_pure (NULL);

44414

44415

if (gfc_option.coarray == GFC_FCOARRAY_NONE)

44416

{

44417

@@ -3020,8 +3017,7 @@

44418

return MATCH_ERROR;

44419

}

44420

44421

- if (gfc_implicit_pure (NULL))

44422

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44423

+ gfc_unset_implicit_pure (NULL);

44424

44425

if (gfc_notify_std (GFC_STD_F2008, "SYNC statement at %C")

44426

== FAILURE)

44427

@@ -3500,15 +3496,15 @@

44428

if (gfc_check_do_variable (tail->expr->symtree))

44429

goto cleanup;

44430

44431

- if (gfc_pure (NULL) && gfc_impure_variable (tail->expr->symtree->n.sym))

44432

+ bool impure = gfc_impure_variable (tail->expr->symtree->n.sym);

44433

+ if (impure && gfc_pure (NULL))

44434

{

44435

gfc_error ("Bad allocate-object at %C for a PURE procedure");

44436

goto cleanup;

44437

}

44438

44439

- if (gfc_implicit_pure (NULL)

44440

- && gfc_impure_variable (tail->expr->symtree->n.sym))

44441

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44442

+ if (impure)

44443

+ gfc_unset_implicit_pure (NULL);

44444

44445

if (tail->expr->ts.deferred)

44446

{

44447

@@ -3890,14 +3886,15 @@

44448

44449

sym = tail->expr->symtree->n.sym;

44450

44451

- if (gfc_pure (NULL) && gfc_impure_variable (sym))

44452

+ bool impure = gfc_impure_variable (sym);

44453

+ if (impure && gfc_pure (NULL))

44454

{

44455

gfc_error ("Illegal allocate-object at %C for a PURE procedure");

44456

goto cleanup;

44457

}

44458

44459

- if (gfc_implicit_pure (NULL) && gfc_impure_variable (sym))

44460

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44461

+ if (impure)

44462

+ gfc_unset_implicit_pure (NULL);

44463

44464

if (gfc_is_coarray (tail->expr)

44465

&& gfc_find_state (COMP_DO_CONCURRENT) == SUCCESS)

44466

Index: gcc/fortran/parse.c

44467

===================================================================

44468

--- a/src/gcc/fortran/parse.c (.../tags/gcc_4_8_2_release)

44469

+++ b/src/gcc/fortran/parse.c (.../branches/gcc-4_8-branch)

44470

@@ -550,8 +550,7 @@

44471

return ST_NONE;

44472

}

44473

44474

- if (gfc_implicit_pure (NULL))

44475

- gfc_current_ns->proc_name->attr.implicit_pure = 0;

44476

+ gfc_unset_implicit_pure (NULL);

44477

44478

old_locus = gfc_current_locus;

44479

44480

Index: gcc/fortran/check.c

44481

===================================================================

44482

--- a/src/gcc/fortran/check.c (.../tags/gcc_4_8_2_release)

44483

+++ b/src/gcc/fortran/check.c (.../branches/gcc-4_8-branch)

44484

@@ -3208,7 +3208,7 @@

44485

"than %d elements", &shape->where, GFC_MAX_DIMENSIONS);

44486

return FAILURE;

44487

}

44488

- else if (shape->expr_type == EXPR_ARRAY)

44489

+ else if (shape->expr_type == EXPR_ARRAY && gfc_is_constant_expr (shape))

44490

{

44491

gfc_expr *e;

44492

int i, extent;

44493

Index: gcc/fortran/primary.c

44494

===================================================================

44495

--- a/src/gcc/fortran/primary.c (.../tags/gcc_4_8_2_release)

44496

+++ b/src/gcc/fortran/primary.c (.../branches/gcc-4_8-branch)

44497

@@ -2252,7 +2252,7 @@

44498

case EXPR_FUNCTION:

44499

gfc_clear_attr (&attr);

44500

44501

- if (e->value.function.esym != NULL)

44502

+ if (e->value.function.esym && e->value.function.esym->result)

44503

{

44504

gfc_symbol *sym = e->value.function.esym->result;

44505

attr = sym->attr;

44506

@@ -2540,7 +2540,8 @@

44507

if (parent && !comp)

44508

break;

44509

44510

- actual = actual->next;

44511

+ if (actual)

44512

+ actual = actual->next;

44513

}

44514

44515

if (build_actual_constructor (&comp_head, &ctor_head, sym) == FAILURE)

44516

Index: gcc/fortran/trans-intrinsic.c

44517

===================================================================

44518

--- a/src/gcc/fortran/trans-intrinsic.c (.../tags/gcc_4_8_2_release)

44519

+++ b/src/gcc/fortran/trans-intrinsic.c (.../branches/gcc-4_8-branch)

44520

@@ -4684,9 +4684,11 @@

44521

static void

44522

gfc_conv_intrinsic_ichar (gfc_se * se, gfc_expr * expr)

44523

{

44524

- tree args[2], type, pchartype;

44525

+ tree args[3], type, pchartype;

44526

+ int nargs;

44527

44528

- gfc_conv_intrinsic_function_args (se, expr, args, 2);

44529

+ nargs = gfc_intrinsic_argument_list_length (expr);

44530

+ gfc_conv_intrinsic_function_args (se, expr, args, nargs);

44531

gcc_assert (POINTER_TYPE_P (TREE_TYPE (args[1])));

44532

pchartype = gfc_get_pchar_type (expr->value.function.actual->expr->ts.kind);

44533

args[1] = fold_build1_loc (input_location, NOP_EXPR, pchartype, args[1]);

44534

Index: gcc/fortran/simplify.c

44535

===================================================================

44536

--- a/src/gcc/fortran/simplify.c (.../tags/gcc_4_8_2_release)

44537

+++ b/src/gcc/fortran/simplify.c (.../branches/gcc-4_8-branch)

44538

@@ -5528,7 +5528,7 @@

44539

if (e == &gfc_bad_expr || range_check (e, "SHAPE") == &gfc_bad_expr)

44540

{

44541

gfc_free_expr (result);

44542

- if (t)

44543

+ if (t == SUCCESS)

44544

gfc_clear_shape (shape, source->rank);

44545

return &gfc_bad_expr;

44546

}

44547

@@ -5536,7 +5536,7 @@

44548

gfc_constructor_append_expr (&result->value.constructor, e, NULL);

44549

}

44550

44551

- if (t)

44552

+ if (t == SUCCESS)

44553

gfc_clear_shape (shape, source->rank);

44554

44555

return result;

44556

Index: gcc/configure.ac

44557

===================================================================

44558

--- a/src/gcc/configure.ac (.../tags/gcc_4_8_2_release)

44559

+++ b/src/gcc/configure.ac (.../branches/gcc-4_8-branch)

44560

@@ -1516,13 +1516,16 @@

44561

/* | [A-Za-z]:[\\/]* ) realsrcdir=${srcdir};;

44562

*) realsrcdir=../${srcdir};;

44563

esac

44564

- saved_CFLAGS="${CFLAGS}"

44565

+ # Clearing GMPINC is necessary to prevent host headers being

44566

+ # used by the build compiler. Defining GENERATOR_FILE stops

44567

+ # system.h from including gmp.h.

44568

CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \

44569

- LDFLAGS="${LDFLAGS_FOR_BUILD}" \

44570

+ CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \

44571

+ LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \

44572

+ GMPINC="" CPPFLAGS="${CPPFLAGS} -DGENERATOR_FILE" \

44573

${realsrcdir}/configure \

44574

--enable-languages=${enable_languages-all} \

44575

--target=$target_alias --host=$build_alias --build=$build_alias

44576

- CFLAGS="${saved_CFLAGS}"

44577

44578

# We just finished tests for the build machine, so rename

44579

# the file auto-build.h in the gcc directory.

44580

@@ -1887,6 +1890,7 @@

44581

if test x$build != x$host || test "x$coverage_flags" != x

44582

then

44583

BUILD_CFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CFLAGS_FOR_BUILD)'

44584

+ BUILD_CXXFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CXXFLAGS_FOR_BUILD)'

44585

BUILD_LDFLAGS='$(LDFLAGS_FOR_BUILD)'

44586

fi

44587

44588

@@ -3611,6 +3615,19 @@

44589

kasumi_fi_xor %f46, %f48, %f50, %f52],,

44590

[AC_DEFINE(HAVE_AS_SPARC4, 1,

44591

[Define if your assembler supports SPARC4 instructions.])])

44592

+

44593

+ gcc_GAS_CHECK_FEATURE([LEON instructions],

44594

+ gcc_cv_as_sparc_leon,,

44595

+ [-Aleon],

44596

+ [.text

44597

+ .register %g2, #scratch

44598

+ .register %g3, #scratch

44599

+ .align 4

44600

+ smac %g2, %g3, %g1

44601

+ umac %g2, %g3, %g1

44602

+ casa [[%g2]] 0xb, %g3, %g1],,

44603

+ [AC_DEFINE(HAVE_AS_LEON, 1,

44604

+ [Define if your assembler supports LEON instructions.])])

44605

;;

44606

44607

changequote(,)dnl

44608

@@ -3749,8 +3766,13 @@

44609

44610

# These two are used unconditionally by i386.[ch]; it is to be defined

44611

# to 1 if the feature is present, 0 otherwise.

44612

+ as_ix86_gotoff_in_data_opt=

44613

+ if test x$gas = xyes; then

44614

+ as_ix86_gotoff_in_data_opt="--32"

44615

+ fi

44616

gcc_GAS_CHECK_FEATURE([GOTOFF in data],

44617

- gcc_cv_as_ix86_gotoff_in_data, [2,11,0],,

44618

+ gcc_cv_as_ix86_gotoff_in_data, [2,11,0],

44619

+ [$as_ix86_gotoff_in_data_opt],

44620

[ .text

44621

.L0:

44622

nop

44623

@@ -3772,6 +3794,12 @@

44624

[AC_DEFINE(HAVE_AS_IX86_REP_LOCK_PREFIX, 1,

44625

[Define if the assembler supports 'rep <insn>, lock <insn>'.])])

44626

44627

+ gcc_GAS_CHECK_FEATURE([ud2 mnemonic],

44628

+ gcc_cv_as_ix86_ud2,,,

44629

+ [ud2],,

44630

+ [AC_DEFINE(HAVE_AS_IX86_UD2, 1,

44631

+ [Define if your assembler supports the 'ud2' mnemonic.])])

44632

+

44633

gcc_GAS_CHECK_FEATURE([R_386_TLS_GD_PLT reloc],

44634

gcc_cv_as_ix86_tlsgdplt,,,

44635

[call tls_gd@tlsgdplt],

44636

@@ -5193,15 +5221,15 @@

44637

AC_MSG_CHECKING([for exported symbols])

44638

if test "x$export_sym_check" != x; then

44639

echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c

44640

- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1

44641

- if $export_sym_check conftest | grep foobar > /dev/null; then

44642

+ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1

44643

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

44644

: # No need to use a flag

44645

AC_MSG_RESULT([yes])

44646

else

44647

AC_MSG_RESULT([yes])

44648

AC_MSG_CHECKING([for -rdynamic])

44649

- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1

44650

- if $export_sym_check conftest | grep foobar > /dev/null; then

44651

+ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1

44652

+ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then

44653

plugin_rdynamic=yes

44654

pluginlibs="-rdynamic"

44655

else

44656

Index: gcc/function.c

44657

===================================================================

44658

--- a/src/gcc/function.c (.../tags/gcc_4_8_2_release)

44659

+++ b/src/gcc/function.c (.../branches/gcc-4_8-branch)

44660

@@ -2507,6 +2507,7 @@

44661

}

44662

44663

locate_and_pad_parm (data->promoted_mode, data->passed_type, in_regs,

44664

+ all->reg_parm_stack_space,

44665

entry_parm ? data->partial : 0, current_function_decl,

44666

&all->stack_args_size, &data->locate);

44667

44668

@@ -3485,11 +3486,7 @@

44669

/* Adjust function incoming argument size for alignment and

44670

minimum length. */

44671

44672

-#ifdef REG_PARM_STACK_SPACE

44673

- crtl->args.size = MAX (crtl->args.size,

44674

- REG_PARM_STACK_SPACE (fndecl));

44675

-#endif

44676

-

44677

+ crtl->args.size = MAX (crtl->args.size, all.reg_parm_stack_space);

44678

crtl->args.size = CEIL_ROUND (crtl->args.size,

44679

PARM_BOUNDARY / BITS_PER_UNIT);

44680

44681

@@ -3693,6 +3690,9 @@

44682

IN_REGS is nonzero if the argument will be passed in registers. It will

44683

never be set if REG_PARM_STACK_SPACE is not defined.

44684

44685

+ REG_PARM_STACK_SPACE is the number of bytes of stack space reserved

44686

+ for arguments which are passed in registers.

44687

+

44688

FNDECL is the function in which the argument was defined.

44689

44690

There are two types of rounding that are done. The first, controlled by

44691

@@ -3713,7 +3713,8 @@

44692

44693

void

44694

locate_and_pad_parm (enum machine_mode passed_mode, tree type, int in_regs,

44695

- int partial, tree fndecl ATTRIBUTE_UNUSED,

44696

+ int reg_parm_stack_space, int partial,

44697

+ tree fndecl ATTRIBUTE_UNUSED,

44698

struct args_size *initial_offset_ptr,

44699

struct locate_and_pad_arg_data *locate)

44700

{

44701

@@ -3720,12 +3721,8 @@

44702

tree sizetree;

44703

enum direction where_pad;

44704

unsigned int boundary, round_boundary;

44705

- int reg_parm_stack_space = 0;

44706

int part_size_in_regs;

44707

44708

-#ifdef REG_PARM_STACK_SPACE

44709

- reg_parm_stack_space = REG_PARM_STACK_SPACE (fndecl);

44710

-

44711

/* If we have found a stack parm before we reach the end of the

44712

area reserved for registers, skip that area. */

44713

if (! in_regs)

44714

@@ -3743,7 +3740,6 @@

44715

initial_offset_ptr->constant = reg_parm_stack_space;

44716

}

44717

}

44718

-#endif /* REG_PARM_STACK_SPACE */

44719

44720

part_size_in_regs = (reg_parm_stack_space == 0 ? partial : 0);

44721

44722

@@ -3806,11 +3802,7 @@

44723

44724

locate->slot_offset.constant += part_size_in_regs;

44725

44726

- if (!in_regs

44727

-#ifdef REG_PARM_STACK_SPACE

44728

- || REG_PARM_STACK_SPACE (fndecl) > 0

44729

-#endif

44730

- )

44731

+ if (!in_regs || reg_parm_stack_space > 0)

44732

pad_to_arg_alignment (&locate->slot_offset, boundary,

44733

&locate->alignment_pad);

44734

44735

@@ -3830,11 +3822,7 @@

44736

pad_below (&locate->offset, passed_mode, sizetree);

44737

44738

#else /* !ARGS_GROW_DOWNWARD */

44739

- if (!in_regs

44740

-#ifdef REG_PARM_STACK_SPACE

44741

- || REG_PARM_STACK_SPACE (fndecl) > 0

44742

-#endif

44743

- )

44744

+ if (!in_regs || reg_parm_stack_space > 0)

44745

pad_to_arg_alignment (initial_offset_ptr, boundary,

44746

&locate->alignment_pad);

44747

locate->slot_offset = *initial_offset_ptr;

44748

@@ -5093,6 +5081,7 @@

44749

amount. BLKmode results are handled using the group load/store

44750

machinery. */

44751

if (TYPE_MODE (TREE_TYPE (decl_result)) != BLKmode

44752

+ && REG_P (real_decl_rtl)

44753

&& targetm.calls.return_in_msb (TREE_TYPE (decl_result)))

44754

{

44755

emit_move_insn (gen_rtx_REG (GET_MODE (decl_rtl),

44756

@@ -5509,22 +5498,45 @@

44757

except for any part that overlaps SRC (next loop). */

44758

bb_uses = &DF_LR_BB_INFO (bb)->use;

44759

bb_defs = &DF_LR_BB_INFO (bb)->def;

44760

- for (i = dregno; i < end_dregno; i++)

44761

+ if (df_live)

44762

{

44763

- if (REGNO_REG_SET_P (bb_uses, i) || REGNO_REG_SET_P (bb_defs, i))

44764

- next_block = NULL;

44765

- CLEAR_REGNO_REG_SET (live_out, i);

44766

- CLEAR_REGNO_REG_SET (live_in, i);

44767

+ for (i = dregno; i < end_dregno; i++)

44768

+ {

44769

+ if (REGNO_REG_SET_P (bb_uses, i) || REGNO_REG_SET_P (bb_defs, i)

44770

+ || REGNO_REG_SET_P (&DF_LIVE_BB_INFO (bb)->gen, i))

44771

+ next_block = NULL;

44772

+ CLEAR_REGNO_REG_SET (live_out, i);

44773

+ CLEAR_REGNO_REG_SET (live_in, i);

44774

+ }

44775

+

44776

+ /* Check whether BB clobbers SRC. We need to add INSN to BB if so.

44777

+ Either way, SRC is now live on entry. */

44778

+ for (i = sregno; i < end_sregno; i++)

44779

+ {

44780

+ if (REGNO_REG_SET_P (bb_defs, i)

44781

+ || REGNO_REG_SET_P (&DF_LIVE_BB_INFO (bb)->gen, i))

44782

+ next_block = NULL;

44783

+ SET_REGNO_REG_SET (live_out, i);

44784

+ SET_REGNO_REG_SET (live_in, i);

44785

+ }

44786

}

44787

+ else

44788

+ {

44789

+ /* DF_LR_BB_INFO (bb)->def does not comprise the DF_REF_PARTIAL and

44790

+ DF_REF_CONDITIONAL defs. So if DF_LIVE doesn't exist, i.e.

44791

+ at -O1, just give up searching NEXT_BLOCK. */

44792

+ next_block = NULL;

44793

+ for (i = dregno; i < end_dregno; i++)

44794

+ {

44795

+ CLEAR_REGNO_REG_SET (live_out, i);

44796

+ CLEAR_REGNO_REG_SET (live_in, i);

44797

+ }

44798

44799

- /* Check whether BB clobbers SRC. We need to add INSN to BB if so.

44800

- Either way, SRC is now live on entry. */

44801

- for (i = sregno; i < end_sregno; i++)

44802

- {

44803

- if (REGNO_REG_SET_P (bb_defs, i))

44804

- next_block = NULL;

44805

- SET_REGNO_REG_SET (live_out, i);

44806

- SET_REGNO_REG_SET (live_in, i);

44807

+ for (i = sregno; i < end_sregno; i++)

44808

+ {

44809

+ SET_REGNO_REG_SET (live_out, i);

44810

+ SET_REGNO_REG_SET (live_in, i);

44811

+ }

44812

}

44813

44814

/* If we don't need to add the move to BB, look for a single

44815

Index: gcc/print-rtl.c

44816

===================================================================

44817

--- a/src/gcc/print-rtl.c (.../tags/gcc_4_8_2_release)

44818

+++ b/src/gcc/print-rtl.c (.../branches/gcc-4_8-branch)

44819

@@ -582,6 +582,8 @@

44820

44821

if (MEM_EXPR (in_rtx))

44822

print_mem_expr (outfile, MEM_EXPR (in_rtx));

44823

+ else

44824

+ fputc (' ', outfile);

44825

44826

if (MEM_OFFSET_KNOWN_P (in_rtx))

44827

fprintf (outfile, "+" HOST_WIDE_INT_PRINT_DEC, MEM_OFFSET (in_rtx));

44828

Index: gcc/tree-vectorizer.h

44829

===================================================================

44830

--- a/src/gcc/tree-vectorizer.h (.../tags/gcc_4_8_2_release)

44831

+++ b/src/gcc/tree-vectorizer.h (.../branches/gcc-4_8-branch)

44832

@@ -542,6 +542,10 @@

44833

is 1. */

44834

unsigned int gap;

44835

44836

+ /* The minimum negative dependence distance this stmt participates in

44837

+ or zero if none. */

44838

+ unsigned int min_neg_dist;

44839

+

44840

/* Not all stmts in the loop need to be vectorized. e.g, the increment

44841

of the loop induction variable and computation of array indexes. relevant

44842

indicates whether the stmt needs to be vectorized. */

44843

@@ -593,6 +597,7 @@

44844

#define STMT_VINFO_GROUP_READ_WRITE_DEPENDENCE(S) (S)->read_write_dep

44845

#define STMT_VINFO_GROUPED_ACCESS(S) ((S)->first_element != NULL && (S)->data_ref_info)

44846

#define STMT_VINFO_LOOP_PHI_EVOLUTION_PART(S) (S)->loop_phi_evolution_part

44847

+#define STMT_VINFO_MIN_NEG_DIST(S) (S)->min_neg_dist

44848

44849

#define GROUP_FIRST_ELEMENT(S) (S)->first_element

44850

#define GROUP_NEXT_ELEMENT(S) (S)->next_element

44851

Index: gcc/sdbout.c

44852

===================================================================

44853

--- a/src/gcc/sdbout.c (.../tags/gcc_4_8_2_release)

44854

+++ b/src/gcc/sdbout.c (.../branches/gcc-4_8-branch)

44855

@@ -1226,7 +1226,10 @@

44856

sdbout_parms (tree parms)

44857

{

44858

for (; parms; parms = TREE_CHAIN (parms))

44859

- if (DECL_NAME (parms))

44860

+ if (DECL_NAME (parms)

44861

+ && TREE_TYPE (parms) != error_mark_node

44862

+ && DECL_RTL_SET_P (parms)

44863

+ && DECL_INCOMING_RTL (parms))

44864

{

44865

int current_sym_value = 0;

44866

const char *name = IDENTIFIER_POINTER (DECL_NAME (parms));

44867

@@ -1358,7 +1361,10 @@

44868

sdbout_reg_parms (tree parms)

44869

{

44870

for (; parms; parms = TREE_CHAIN (parms))

44871

- if (DECL_NAME (parms))

44872

+ if (DECL_NAME (parms)

44873

+ && TREE_TYPE (parms) != error_mark_node

44874

+ && DECL_RTL_SET_P (parms)

44875

+ && DECL_INCOMING_RTL (parms))

44876

{

44877

const char *name = IDENTIFIER_POINTER (DECL_NAME (parms));

44878

44879

Index: gcc/ipa-split.c

44880

===================================================================

44881

--- a/src/gcc/ipa-split.c (.../tags/gcc_4_8_2_release)

44882

+++ b/src/gcc/ipa-split.c (.../branches/gcc-4_8-branch)

44883

@@ -136,7 +136,7 @@

44884

variable, check it if it is present in bitmap passed via DATA. */

44885

44886

static bool

44887

-test_nonssa_use (gimple stmt ATTRIBUTE_UNUSED, tree t, void *data)

44888

+test_nonssa_use (gimple, tree t, tree, void *data)

44889

{

44890

t = get_base_address (t);

44891

44892

@@ -229,7 +229,7 @@

44893

}

44894

if (gimple_code (stmt) == GIMPLE_LABEL

44895

&& test_nonssa_use (stmt, gimple_label_label (stmt),

44896

- non_ssa_vars))

44897

+ NULL_TREE, non_ssa_vars))

44898

{

44899

ok = false;

44900

goto done;

44901

@@ -258,7 +258,7 @@

44902

if (virtual_operand_p (gimple_phi_result (stmt)))

44903

continue;

44904

if (TREE_CODE (op) != SSA_NAME

44905

- && test_nonssa_use (stmt, op, non_ssa_vars))

44906

+ && test_nonssa_use (stmt, op, op, non_ssa_vars))

44907

{

44908

ok = false;

44909

goto done;

44910

@@ -670,7 +670,7 @@

44911

Return true when access to T prevents splitting the function. */

44912

44913

static bool

44914

-mark_nonssa_use (gimple stmt ATTRIBUTE_UNUSED, tree t, void *data)

44915

+mark_nonssa_use (gimple, tree t, tree, void *data)

44916

{

44917

t = get_base_address (t);

44918

44919

@@ -830,7 +830,7 @@

44920

if (TREE_CODE (op) == SSA_NAME)

44921

bitmap_set_bit (used_ssa_names, SSA_NAME_VERSION (op));

44922

else

44923

- can_split &= !mark_nonssa_use (stmt, op, non_ssa_vars);

44924

+ can_split &= !mark_nonssa_use (stmt, op, op, non_ssa_vars);

44925

}

44926

}

44927

return can_split;

44928

Index: gcc/alias.c

44929

===================================================================

44930

--- a/src/gcc/alias.c (.../tags/gcc_4_8_2_release)

44931

+++ b/src/gcc/alias.c (.../branches/gcc-4_8-branch)

44932

@@ -156,7 +156,9 @@

44933

static alias_set_entry get_alias_set_entry (alias_set_type);

44934

static bool nonoverlapping_component_refs_p (const_rtx, const_rtx);

44935

static tree decl_for_component_ref (tree);

44936

-static int write_dependence_p (const_rtx, const_rtx, int);

44937

+static int write_dependence_p (const_rtx,

44938

+ const_rtx, enum machine_mode, rtx,

44939

+ bool, bool, bool);

44940

44941

static void memory_modified_1 (rtx, const_rtx, void *);

44942

44943

@@ -2558,15 +2560,24 @@

44944

}

44945

44946

/* Returns nonzero if a write to X might alias a previous read from

44947

- (or, if WRITEP is nonzero, a write to) MEM. */

44948

+ (or, if WRITEP is true, a write to) MEM.

44949

+ If X_CANONCALIZED is true, then X_ADDR is the canonicalized address of X,

44950

+ and X_MODE the mode for that access.

44951

+ If MEM_CANONICALIZED is true, MEM is canonicalized. */

44952

44953

static int

44954

-write_dependence_p (const_rtx mem, const_rtx x, int writep)

44955

+write_dependence_p (const_rtx mem,

44956

+ const_rtx x, enum machine_mode x_mode, rtx x_addr,

44957

+ bool mem_canonicalized, bool x_canonicalized, bool writep)

44958

{

44959

- rtx x_addr, mem_addr;

44960

+ rtx mem_addr;

44961

rtx base;

44962

int ret;

44963

44964

+ gcc_checking_assert (x_canonicalized

44965

+ ? (x_addr != NULL_RTX && x_mode != VOIDmode)

44966

+ : (x_addr == NULL_RTX && x_mode == VOIDmode));

44967

+

44968

if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))

44969

return 1;

44970

44971

@@ -2590,17 +2601,21 @@

44972

if (MEM_ADDR_SPACE (mem) != MEM_ADDR_SPACE (x))

44973

return 1;

44974

44975

- x_addr = XEXP (x, 0);

44976

mem_addr = XEXP (mem, 0);

44977

- if (!((GET_CODE (x_addr) == VALUE

44978

- && GET_CODE (mem_addr) != VALUE

44979

- && reg_mentioned_p (x_addr, mem_addr))

44980

- || (GET_CODE (x_addr) != VALUE

44981

- && GET_CODE (mem_addr) == VALUE

44982

- && reg_mentioned_p (mem_addr, x_addr))))

44983

+ if (!x_addr)

44984

{

44985

- x_addr = get_addr (x_addr);

44986

- mem_addr = get_addr (mem_addr);

44987

+ x_addr = XEXP (x, 0);

44988

+ if (!((GET_CODE (x_addr) == VALUE

44989

+ && GET_CODE (mem_addr) != VALUE

44990

+ && reg_mentioned_p (x_addr, mem_addr))

44991

+ || (GET_CODE (x_addr) != VALUE

44992

+ && GET_CODE (mem_addr) == VALUE

44993

+ && reg_mentioned_p (mem_addr, x_addr))))

44994

+ {

44995

+ x_addr = get_addr (x_addr);

44996

+ if (!mem_canonicalized)

44997

+ mem_addr = get_addr (mem_addr);

44998

+ }

44999

}

45000

45001

if (! writep)

45002

@@ -2616,11 +2631,16 @@

45003

GET_MODE (mem)))

45004

return 0;

45005

45006

- x_addr = canon_rtx (x_addr);

45007

- mem_addr = canon_rtx (mem_addr);

45008

+ if (!x_canonicalized)

45009

+ {

45010

+ x_addr = canon_rtx (x_addr);

45011

+ x_mode = GET_MODE (x);

45012

+ }

45013

+ if (!mem_canonicalized)

45014

+ mem_addr = canon_rtx (mem_addr);

45015

45016

if ((ret = memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,

45017

- SIZE_FOR_MODE (x), x_addr, 0)) != -1)

45018

+ GET_MODE_SIZE (x_mode), x_addr, 0)) != -1)

45019

return ret;

45020

45021

if (nonoverlapping_memrefs_p (x, mem, false))

45022

@@ -2634,15 +2654,33 @@

45023

int

45024

anti_dependence (const_rtx mem, const_rtx x)

45025

{

45026

- return write_dependence_p (mem, x, /*writep=*/0);

45027

+ return write_dependence_p (mem, x, VOIDmode, NULL_RTX,

45028

+ /*mem_canonicalized=*/false,

45029

+ /*x_canonicalized*/false, /*writep=*/false);

45030

}

45031

45032

+/* Likewise, but we already have a canonicalized MEM, and X_ADDR for X.

45033

+ Also, consider X in X_MODE (which might be from an enclosing

45034

+ STRICT_LOW_PART / ZERO_EXTRACT).

45035

+ If MEM_CANONICALIZED is true, MEM is canonicalized. */

45036

+

45037

+int

45038

+canon_anti_dependence (const_rtx mem, bool mem_canonicalized,

45039

+ const_rtx x, enum machine_mode x_mode, rtx x_addr)

45040

+{

45041

+ return write_dependence_p (mem, x, x_mode, x_addr,

45042

+ mem_canonicalized, /*x_canonicalized=*/true,

45043

+ /*writep=*/false);

45044

+}

45045

+

45046

/* Output dependence: X is written after store in MEM takes place. */

45047

45048

int

45049

output_dependence (const_rtx mem, const_rtx x)

45050

{

45051

- return write_dependence_p (mem, x, /*writep=*/1);

45052

+ return write_dependence_p (mem, x, VOIDmode, NULL_RTX,

45053

+ /*mem_canonicalized=*/false,

45054

+ /*x_canonicalized*/false, /*writep=*/true);

45055

}

45056

45057

45058

@@ -2871,17 +2909,14 @@

45059

/* Wipe the reg_seen array clean. */

45060

bitmap_clear (reg_seen);

45061

45062

- /* Mark all hard registers which may contain an address.

45063

- The stack, frame and argument pointers may contain an address.

45064

- An argument register which can hold a Pmode value may contain

45065

- an address even if it is not in BASE_REGS.

45066

+ /* Initialize the alias information for this pass. */

45067

+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

45068

+ if (static_reg_base_value[i])

45069

+ {

45070

+ new_reg_base_value[i] = static_reg_base_value[i];

45071

+ bitmap_set_bit (reg_seen, i);

45072

+ }

45073

45074

- The address expression is VOIDmode for an argument and

45075

- Pmode for other registers. */

45076

-

45077

- memcpy (new_reg_base_value, static_reg_base_value,

45078

- FIRST_PSEUDO_REGISTER * sizeof (rtx));

45079

-

45080

/* Walk the insns adding values to the new_reg_base_value array. */

45081

for (i = 0; i < rpo_cnt; i++)

45082

{

45083

Index: gcc/tree-vect-loop.c

45084

===================================================================

45085

--- a/src/gcc/tree-vect-loop.c (.../tags/gcc_4_8_2_release)

45086

+++ b/src/gcc/tree-vect-loop.c (.../branches/gcc-4_8-branch)

45087

@@ -1537,7 +1537,7 @@

45088

45089

if (!LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo)

45090

|| LOOP_VINFO_INT_NITERS (loop_vinfo) % vectorization_factor != 0

45091

- || LOOP_PEELING_FOR_ALIGNMENT (loop_vinfo))

45092

+ || LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo))

45093

{

45094

if (dump_enabled_p ())

45095

dump_printf_loc (MSG_NOTE, vect_location, "epilog loop required.");

45096

@@ -2097,6 +2097,12 @@

45097

|| (!check_reduction && flow_loop_nested_p (vect_loop, loop)));

45098

45099

name = PHI_RESULT (phi);

45100

+ /* ??? If there are no uses of the PHI result the inner loop reduction

45101

+ won't be detected as possibly double-reduction by vectorizable_reduction

45102

+ because that tries to walk the PHI arg from the preheader edge which

45103

+ can be constant. See PR60382. */

45104

+ if (has_zero_uses (name))

45105

+ return NULL;

45106

nloop_uses = 0;

45107

FOR_EACH_IMM_USE_FAST (use_p, imm_iter, name)

45108

{

45109

@@ -3115,7 +3121,6 @@

45110

stmt_vec_info stmt_vinfo = vinfo_for_stmt (iv_phi);

45111

loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo);

45112

struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo);

45113

- tree scalar_type;

45114

tree vectype;

45115

int nunits;

45116

edge pe = loop_preheader_edge (loop);

45117

@@ -3122,7 +3127,6 @@

45118

struct loop *iv_loop;

45119

basic_block new_bb;

45120

tree new_vec, vec_init, vec_step, t;

45121

- tree access_fn;

45122

tree new_var;

45123

tree new_name;

45124

gimple init_stmt, induction_phi, new_stmt;

45125

@@ -3130,7 +3134,6 @@

45126

tree init_expr, step_expr;

45127

int vf = LOOP_VINFO_VECT_FACTOR (loop_vinfo);

45128

int i;

45129

- bool ok;

45130

int ncopies;

45131

tree expr;

45132

stmt_vec_info phi_info = vinfo_for_stmt (iv_phi);

45133

@@ -3159,16 +3162,14 @@

45134

latch_e = loop_latch_edge (iv_loop);

45135

loop_arg = PHI_ARG_DEF_FROM_EDGE (iv_phi, latch_e);

45136

45137

- access_fn = analyze_scalar_evolution (iv_loop, PHI_RESULT (iv_phi));

45138

- gcc_assert (access_fn);

45139

- STRIP_NOPS (access_fn);

45140

- ok = vect_is_simple_iv_evolution (iv_loop->num, access_fn,

45141

- &init_expr, &step_expr);

45142

- gcc_assert (ok);

45143

+ step_expr = STMT_VINFO_LOOP_PHI_EVOLUTION_PART (phi_info);

45144

+ gcc_assert (step_expr != NULL_TREE);

45145

+

45146

pe = loop_preheader_edge (iv_loop);

45147

+ init_expr = PHI_ARG_DEF_FROM_EDGE (iv_phi,

45148

+ loop_preheader_edge (iv_loop));

45149

45150

- scalar_type = TREE_TYPE (init_expr);

45151

- vectype = get_vectype_for_scalar_type (scalar_type);

45152

+ vectype = get_vectype_for_scalar_type (TREE_TYPE (init_expr));

45153

resvectype = get_vectype_for_scalar_type (TREE_TYPE (PHI_RESULT (iv_phi)));

45154

gcc_assert (vectype);

45155

nunits = TYPE_VECTOR_SUBPARTS (vectype);

45156

@@ -3177,6 +3178,16 @@

45157

gcc_assert (phi_info);

45158

gcc_assert (ncopies >= 1);

45159

45160

+ /* Convert the step to the desired type. */

45161

+ step_expr = force_gimple_operand (fold_convert (TREE_TYPE (vectype),

45162

+ step_expr),

45163

+ &stmts, true, NULL_TREE);

45164

+ if (stmts)

45165

+ {

45166

+ new_bb = gsi_insert_seq_on_edge_immediate (pe, stmts);

45167

+ gcc_assert (!new_bb);

45168

+ }

45169

+

45170

/* Find the first insertion point in the BB. */

45171

si = gsi_after_labels (bb);

45172

45173

@@ -3186,9 +3197,7 @@

45174

/* iv_loop is nested in the loop to be vectorized. init_expr had already

45175

been created during vectorization of previous stmts. We obtain it

45176

from the STMT_VINFO_VEC_STMT of the defining stmt. */

45177

- tree iv_def = PHI_ARG_DEF_FROM_EDGE (iv_phi,

45178

- loop_preheader_edge (iv_loop));

45179

- vec_init = vect_get_vec_def_for_operand (iv_def, iv_phi, NULL);

45180

+ vec_init = vect_get_vec_def_for_operand (init_expr, iv_phi, NULL);

45181

/* If the initial value is not of proper type, convert it. */

45182

if (!useless_type_conversion_p (vectype, TREE_TYPE (vec_init)))

45183

{

45184

@@ -3211,8 +3220,11 @@

45185

45186

/* iv_loop is the loop to be vectorized. Create:

45187

vec_init = [X, X+S, X+2*S, X+3*S] (S = step_expr, X = init_expr) */

45188

- new_var = vect_get_new_vect_var (scalar_type, vect_scalar_var, "var_");

45189

- new_name = force_gimple_operand (init_expr, &stmts, false, new_var);

45190

+ new_var = vect_get_new_vect_var (TREE_TYPE (vectype),

45191

+ vect_scalar_var, "var_");

45192

+ new_name = force_gimple_operand (fold_convert (TREE_TYPE (vectype),

45193

+ init_expr),

45194

+ &stmts, false, new_var);

45195

if (stmts)

45196

{

45197

new_bb = gsi_insert_seq_on_edge_immediate (pe, stmts);

45198

@@ -3224,9 +3236,7 @@

45199

for (i = 1; i < nunits; i++)

45200

{

45201

/* Create: new_name_i = new_name + step_expr */

45202

- enum tree_code code = POINTER_TYPE_P (scalar_type)

45203

- ? POINTER_PLUS_EXPR : PLUS_EXPR;

45204

- init_stmt = gimple_build_assign_with_ops (code, new_var,

45205

+ init_stmt = gimple_build_assign_with_ops (PLUS_EXPR, new_var,

45206

new_name, step_expr);

45207

new_name = make_ssa_name (new_var, init_stmt);

45208

gimple_assign_set_lhs (init_stmt, new_name);

45209

@@ -3781,8 +3791,12 @@

45210

/* Set phi nodes arguments. */

45211

FOR_EACH_VEC_ELT (reduction_phis, i, phi)

45212

{

45213

- tree vec_init_def = vec_initial_defs[i];

45214

- tree def = vect_defs[i];

45215

+ tree vec_init_def, def;

45216

+ gimple_seq stmts;

45217

+ vec_init_def = force_gimple_operand (vec_initial_defs[i], &stmts,

45218

+ true, NULL_TREE);

45219

+ gsi_insert_seq_on_edge_immediate (loop_preheader_edge (loop), stmts);

45220

+ def = vect_defs[i];

45221

for (j = 0; j < ncopies; j++)

45222

{

45223

/* Set the loop-entry arg of the reduction-phi. */

45224

@@ -5564,8 +5578,9 @@

45225

&& !STMT_VINFO_LIVE_P (stmt_info))

45226

continue;

45227

45228

- if ((TYPE_VECTOR_SUBPARTS (STMT_VINFO_VECTYPE (stmt_info))

45229

- != (unsigned HOST_WIDE_INT) vectorization_factor)

45230

+ if (STMT_VINFO_VECTYPE (stmt_info)

45231

+ && (TYPE_VECTOR_SUBPARTS (STMT_VINFO_VECTYPE (stmt_info))

45232

+ != (unsigned HOST_WIDE_INT) vectorization_factor)

45233

&& dump_enabled_p ())

45234

dump_printf_loc (MSG_NOTE, vect_location, "multiple-types.");

45235

45236

Index: gcc/ipa.c

45237

===================================================================

45238

--- a/src/gcc/ipa.c (.../tags/gcc_4_8_2_release)

45239

+++ b/src/gcc/ipa.c (.../branches/gcc-4_8-branch)

45240

@@ -359,6 +359,8 @@

45241

{

45242

if (file)

45243

fprintf (file, " %s", cgraph_node_name (node));

45244

+ node->alias = false;

45245

+ node->thunk.thunk_p = false;

45246

cgraph_node_remove_callees (node);

45247

ipa_remove_all_references (&node->symbol.ref_list);

45248

changed = true;

45249

Index: gcc/lra-coalesce.c

45250

===================================================================

45251

--- a/src/gcc/lra-coalesce.c (.../tags/gcc_4_8_2_release)

45252

+++ b/src/gcc/lra-coalesce.c (.../branches/gcc-4_8-branch)

45253

@@ -221,9 +221,12 @@

45254

basic_block bb;

45255

rtx mv, set, insn, next, *sorted_moves;

45256

int i, mv_num, sregno, dregno;

45257

+ unsigned int regno;

45258

int coalesced_moves;

45259

int max_regno = max_reg_num ();

45260

bitmap_head involved_insns_bitmap;

45261

+ bitmap_head result_pseudo_vals_bitmap;

45262

+ bitmap_iterator bi;

45263

45264

timevar_push (TV_LRA_COALESCE);

45265

45266

@@ -318,6 +321,34 @@

45267

}

45268

}

45269

}

45270

+ /* If we have situation after inheritance pass:

45271

+

45272

+ r1 <- ... insn originally setting p1

45273

+ i1 <- r1 setting inheritance i1 from reload r1

45274

+ ...

45275

+ ... <- ... p2 ... dead p2

45276

+ ..

45277

+ p1 <- i1

45278

+ r2 <- i1

45279

+ ...<- ... r2 ...

45280

+

45281

+ And we are coalescing p1 and p2 using p1. In this case i1 and p1

45282

+ should have different values, otherwise they can get the same

45283

+ hard reg and this is wrong for insn using p2 before coalescing.

45284

+ So invalidate such inheritance pseudo values. */

45285

+ bitmap_initialize (&result_pseudo_vals_bitmap, &reg_obstack);

45286

+ EXECUTE_IF_SET_IN_BITMAP (&coalesced_pseudos_bitmap, 0, regno, bi)

45287

+ bitmap_set_bit (&result_pseudo_vals_bitmap,

45288

+ lra_reg_info[first_coalesced_pseudo[regno]].val);

45289

+ EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, regno, bi)

45290

+ if (bitmap_bit_p (&result_pseudo_vals_bitmap, lra_reg_info[regno].val))

45291

+ {

45292

+ lra_set_regno_unique_value (regno);

45293

+ if (lra_dump_file != NULL)

45294

+ fprintf (lra_dump_file,

45295

+ " Make unique value for inheritance r%d\n", regno);

45296

+ }

45297

+ bitmap_clear (&result_pseudo_vals_bitmap);

45298

bitmap_clear (&used_pseudos_bitmap);

45299

bitmap_clear (&involved_insns_bitmap);

45300

bitmap_clear (&coalesced_pseudos_bitmap);

45301

Index: gcc/tree-vect-data-refs.c

45302

===================================================================

45303

--- a/src/gcc/tree-vect-data-refs.c (.../tags/gcc_4_8_2_release)

45304

+++ b/src/gcc/tree-vect-data-refs.c (.../branches/gcc-4_8-branch)

45305

@@ -739,6 +739,13 @@

45306

if (dump_enabled_p ())

45307

dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,

45308

"dependence distance negative.");

45309

+ /* Record a negative dependence distance to later limit the

45310

+ amount of stmt copying / unrolling we can perform.

45311

+ Only need to handle read-after-write dependence. */

45312

+ if (DR_IS_READ (drb)

45313

+ && (STMT_VINFO_MIN_NEG_DIST (stmtinfo_b) == 0

45314

+ || STMT_VINFO_MIN_NEG_DIST (stmtinfo_b) > (unsigned)dist))

45315

+ STMT_VINFO_MIN_NEG_DIST (stmtinfo_b) = dist;

45316

continue;

45317

}

45318

45319

Index: gcc/gimplify.c

45320

===================================================================

45321

--- a/src/gcc/gimplify.c (.../tags/gcc_4_8_2_release)

45322

+++ b/src/gcc/gimplify.c (.../branches/gcc-4_8-branch)

45323

@@ -2060,6 +2060,9 @@

45324

/* Nonlocal VLAs seen in the current function. */

45325

static struct pointer_set_t *nonlocal_vlas;

45326

45327

+/* The VAR_DECLs created for nonlocal VLAs for debug info purposes. */

45328

+static tree nonlocal_vla_vars;

45329

+

45330

/* Gimplify a VAR_DECL or PARM_DECL. Return GS_OK if we expanded a

45331

DECL_VALUE_EXPR, and it's worth re-examining things. */

45332

45333

@@ -2106,14 +2109,13 @@

45334

ctx = ctx->outer_context;

45335

if (!ctx && !pointer_set_insert (nonlocal_vlas, decl))

45336

{

45337

- tree copy = copy_node (decl), block;

45338

+ tree copy = copy_node (decl);

45339

45340

lang_hooks.dup_lang_specific_decl (copy);

45341

SET_DECL_RTL (copy, 0);

45342

TREE_USED (copy) = 1;

45343

- block = DECL_INITIAL (current_function_decl);

45344

- DECL_CHAIN (copy) = BLOCK_VARS (block);

45345

- BLOCK_VARS (block) = copy;

45346

+ DECL_CHAIN (copy) = nonlocal_vla_vars;

45347

+ nonlocal_vla_vars = copy;

45348

SET_DECL_VALUE_EXPR (copy, unshare_expr (value_expr));

45349

DECL_HAS_VALUE_EXPR_P (copy) = 1;

45350

}

45351

@@ -4369,7 +4371,7 @@

45352

unsigned HOST_WIDE_INT indexi = offset * BITS_PER_UNIT;

45353

tree index = bitsize_int (indexi);

45354

if (offset / part_widthi

45355

- <= TYPE_VECTOR_SUBPARTS (TREE_TYPE (addrtype)))

45356

+ < TYPE_VECTOR_SUBPARTS (TREE_TYPE (addrtype)))

45357

return fold_build3 (BIT_FIELD_REF, type, TREE_OPERAND (addr, 0),

45358

part_width, index);

45359

}

45360

@@ -6131,7 +6133,7 @@

45361

region's REDUCTION clause. */

45362

45363

static bool

45364

-omp_check_private (struct gimplify_omp_ctx *ctx, tree decl)

45365

+omp_check_private (struct gimplify_omp_ctx *ctx, tree decl, bool copyprivate)

45366

{

45367

splay_tree_node n;

45368

45369

@@ -6140,8 +6142,11 @@

45370

ctx = ctx->outer_context;

45371

if (ctx == NULL)

45372

return !(is_global_var (decl)

45373

- /* References might be private, but might be shared too. */

45374

- || lang_hooks.decls.omp_privatize_by_reference (decl));

45375

+ /* References might be private, but might be shared too,

45376

+ when checking for copyprivate, assume they might be

45377

+ private, otherwise assume they might be shared. */

45378

+ || (!copyprivate

45379

+ && lang_hooks.decls.omp_privatize_by_reference (decl)));

45380

45381

n = splay_tree_lookup (ctx->variables, (splay_tree_key) decl);

45382

if (n != NULL)

45383

@@ -6267,12 +6272,36 @@

45384

remove = true;

45385

break;

45386

}

45387

+ if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_COPYPRIVATE

45388

+ && !remove

45389

+ && !omp_check_private (ctx, decl, true))

45390

+ {

45391

+ remove = true;

45392

+ if (is_global_var (decl))

45393

+ {

45394

+ if (DECL_THREAD_LOCAL_P (decl))

45395

+ remove = false;

45396

+ else if (DECL_HAS_VALUE_EXPR_P (decl))

45397

+ {

45398

+ tree value = get_base_address (DECL_VALUE_EXPR (decl));

45399

+

45400

+ if (value

45401

+ && DECL_P (value)

45402

+ && DECL_THREAD_LOCAL_P (value))

45403

+ remove = false;

45404

+ }

45405

+ }

45406

+ if (remove)

45407

+ error_at (OMP_CLAUSE_LOCATION (c),

45408

+ "copyprivate variable %qE is not threadprivate"

45409

+ " or private in outer context", DECL_NAME (decl));

45410

+ }

45411

do_notice:

45412

if (outer_ctx)

45413

omp_notice_variable (outer_ctx, decl, true);

45414

if (check_non_private

45415

&& region_type == ORT_WORKSHARE

45416

- && omp_check_private (ctx, decl))

45417

+ && omp_check_private (ctx, decl, false))

45418

{

45419

error ("%s variable %qE is private in outer context",

45420

check_non_private, DECL_NAME (decl));

45421

@@ -8261,6 +8290,21 @@

45422

45423

if (nonlocal_vlas)

45424

{

45425

+ if (nonlocal_vla_vars)

45426

+ {

45427

+ /* tree-nested.c may later on call declare_vars (..., true);

45428

+ which relies on BLOCK_VARS chain to be the tail of the

45429

+ gimple_bind_vars chain. Ensure we don't violate that

45430

+ assumption. */

45431

+ if (gimple_bind_block (outer_bind)

45432

+ == DECL_INITIAL (current_function_decl))

45433

+ declare_vars (nonlocal_vla_vars, outer_bind, true);

45434

+ else

45435

+ BLOCK_VARS (DECL_INITIAL (current_function_decl))

45436

+ = chainon (BLOCK_VARS (DECL_INITIAL (current_function_decl)),

45437

+ nonlocal_vla_vars);

45438

+ nonlocal_vla_vars = NULL_TREE;

45439

+ }

45440

pointer_set_destroy (nonlocal_vlas);

45441

nonlocal_vlas = NULL;

45442

}

45443

@@ -8588,6 +8632,8 @@

45444

gsi_insert_after (gsi_p, post_stmt, GSI_NEW_STMT);

45445

45446

pop_gimplify_context (NULL);

45447

+

45448

+ update_stmt (stmt);

45449

}

45450

45451

/* Expand EXPR to list of gimple statements STMTS. GIMPLE_TEST_F specifies

45452

Index: gcc/graphite-scop-detection.c

45453

===================================================================

45454

--- a/src/gcc/graphite-scop-detection.c (.../tags/gcc_4_8_2_release)

45455

+++ b/src/gcc/graphite-scop-detection.c (.../branches/gcc-4_8-branch)

45456

@@ -203,7 +203,14 @@

45457

45458

switch (TREE_CODE (scev))

45459

{

45460

+ case NEGATE_EXPR:

45461

+ case BIT_NOT_EXPR:

45462

+ CASE_CONVERT:

45463

+ case NON_LVALUE_EXPR:

45464

+ return graphite_can_represent_scev (TREE_OPERAND (scev, 0));

45465

+

45466

case PLUS_EXPR:

45467

+ case POINTER_PLUS_EXPR:

45468

case MINUS_EXPR:

45469

return graphite_can_represent_scev (TREE_OPERAND (scev, 0))

45470

&& graphite_can_represent_scev (TREE_OPERAND (scev, 1));

45471

@@ -225,6 +232,7 @@

45472

if (!evolution_function_right_is_integer_cst (scev)

45473

|| !graphite_can_represent_init (scev))

45474

return false;

45475

+ return graphite_can_represent_scev (CHREC_LEFT (scev));

45476

45477

default:

45478

break;

45479

@@ -231,7 +239,8 @@

45480

}

45481

45482

/* Only affine functions can be represented. */

45483

- if (!scev_is_linear_expression (scev))

45484

+ if (tree_contains_chrecs (scev, NULL)

45485

+ || !scev_is_linear_expression (scev))

45486

return false;

45487

45488

return true;

45489

@@ -330,13 +339,10 @@

45490

45491

case GIMPLE_COND:

45492

{

45493

- tree op;

45494

- ssa_op_iter op_iter;

45495

- enum tree_code code = gimple_cond_code (stmt);

45496

-

45497

/* We can handle all binary comparisons. Inequalities are

45498

also supported as they can be represented with union of

45499

polyhedra. */

45500

+ enum tree_code code = gimple_cond_code (stmt);

45501

if (!(code == LT_EXPR

45502

|| code == GT_EXPR

45503

|| code == LE_EXPR

45504

@@ -345,11 +351,14 @@

45505

|| code == NE_EXPR))

45506

return false;

45507

45508

- FOR_EACH_SSA_TREE_OPERAND (op, stmt, op_iter, SSA_OP_ALL_USES)

45509

- if (!graphite_can_represent_expr (scop_entry, loop, op)

45510

- /* We can not handle REAL_TYPE. Failed for pr39260. */

45511

- || TREE_CODE (TREE_TYPE (op)) == REAL_TYPE)

45512

- return false;

45513

+ for (unsigned i = 0; i < 2; ++i)

45514

+ {

45515

+ tree op = gimple_op (stmt, i);

45516

+ if (!graphite_can_represent_expr (scop_entry, loop, op)

45517

+ /* We can not handle REAL_TYPE. Failed for pr39260. */

45518

+ || TREE_CODE (TREE_TYPE (op)) == REAL_TYPE)

45519

+ return false;

45520

+ }

45521

45522

return true;

45523

}

45524

Index: gcc/lra-constraints.c

45525

===================================================================

45526

--- a/src/gcc/lra-constraints.c (.../tags/gcc_4_8_2_release)

45527

+++ b/src/gcc/lra-constraints.c (.../branches/gcc-4_8-branch)

45528

@@ -1156,6 +1156,8 @@

45529

enum machine_mode mode;

45530

rtx reg, new_reg;

45531

rtx operand = *curr_id->operand_loc[nop];

45532

+ enum reg_class regclass;

45533

+ enum op_type type;

45534

45535

before = after = NULL_RTX;

45536

45537

@@ -1164,6 +1166,7 @@

45538

45539

mode = GET_MODE (operand);

45540

reg = SUBREG_REG (operand);

45541

+ type = curr_static_id->operand[nop].type;

45542

/* If we change address for paradoxical subreg of memory, the

45543

address might violate the necessary alignment or the access might

45544

be slow. So take this into consideration. We should not worry

45545

@@ -1236,6 +1239,55 @@

45546

"Inserting subreg reload");

45547

return true;

45548

}

45549

+ /* Force a reload for a paradoxical subreg. For paradoxical subreg,

45550

+ IRA allocates hardreg to the inner pseudo reg according to its mode

45551

+ instead of the outermode, so the size of the hardreg may not be enough

45552

+ to contain the outermode operand, in that case we may need to insert

45553

+ reload for the reg. For the following two types of paradoxical subreg,

45554

+ we need to insert reload:

45555

+ 1. If the op_type is OP_IN, and the hardreg could not be paired with

45556

+ other hardreg to contain the outermode operand

45557

+ (checked by in_hard_reg_set_p), we need to insert the reload.

45558

+ 2. If the op_type is OP_OUT or OP_INOUT. */

45559

+ else if (REG_P (reg)

45560

+ && REGNO (reg) >= FIRST_PSEUDO_REGISTER

45561

+ && (hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0

45562

+ && (hard_regno_nregs[hard_regno][GET_MODE (reg)]

45563

+ < hard_regno_nregs[hard_regno][mode])

45564

+ && (regclass = lra_get_allocno_class (REGNO (reg)))

45565

+ && (type != OP_IN

45566

+ || !in_hard_reg_set_p (reg_class_contents[regclass],

45567

+ mode, hard_regno)))

45568

+ {

45569

+ /* The class will be defined later in curr_insn_transform. */

45570

+ enum reg_class rclass

45571

+ = (enum reg_class) targetm.preferred_reload_class (reg, ALL_REGS);

45572

+ rtx subreg;

45573

+

45574

+ new_reg = lra_create_new_reg_with_unique_value (mode, reg, rclass,

45575

+ "paradoxical subreg");

45576

+ PUT_MODE (new_reg, mode);

45577

+ subreg = simplify_gen_subreg (GET_MODE (reg), new_reg, mode, 0);

45578

+ if (type != OP_OUT)

45579

+ {

45580

+ push_to_sequence (before);

45581

+ lra_emit_move (subreg, reg);

45582

+ before = get_insns ();

45583

+ end_sequence ();

45584

+ }

45585

+ if (type != OP_IN)

45586

+ {

45587

+ start_sequence ();

45588

+ lra_emit_move (reg, subreg);

45589

+ emit_insn (after);

45590

+ after = get_insns ();

45591

+ end_sequence ();

45592

+ }

45593

+ SUBREG_REG (operand) = new_reg;

45594

+ lra_process_new_insns (curr_insn, before, after,

45595

+ "Inserting paradoxical subreg reload");

45596

+ return true;

45597

+ }

45598

return false;

45599

}

45600

45601

Index: gcc/calls.c

45602

===================================================================

45603

--- a/src/gcc/calls.c (.../tags/gcc_4_8_2_release)

45604

+++ b/src/gcc/calls.c (.../branches/gcc-4_8-branch)

45605

@@ -983,6 +983,7 @@

45606

45607

for (i = 0; i < num_actuals; i++)

45608

if (args[i].reg != 0 && ! args[i].pass_on_stack

45609

+ && GET_CODE (args[i].reg) != PARALLEL

45610

&& args[i].mode == BLKmode

45611

&& MEM_P (args[i].value)

45612

&& (MEM_ALIGN (args[i].value)

45613

@@ -1327,6 +1328,7 @@

45614

#else

45615

args[i].reg != 0,

45616

#endif

45617

+ reg_parm_stack_space,

45618

args[i].pass_on_stack ? 0 : args[i].partial,

45619

fndecl, args_size, &args[i].locate);

45620

#ifdef BLOCK_REG_PADDING

45621

@@ -3171,7 +3173,9 @@

45622

group load/store machinery below. */

45623

if (!structure_value_addr

45624

&& !pcc_struct_value

45625

+ && TYPE_MODE (rettype) != VOIDmode

45626

&& TYPE_MODE (rettype) != BLKmode

45627

+ && REG_P (valreg)

45628

&& targetm.calls.return_in_msb (rettype))

45629

{

45630

if (shift_return_value (TYPE_MODE (rettype), false, valreg))

45631

@@ -3734,7 +3738,8 @@

45632

#else

45633

argvec[count].reg != 0,

45634

#endif

45635

- 0, NULL_TREE, &args_size, &argvec[count].locate);

45636

+ reg_parm_stack_space, 0,

45637

+ NULL_TREE, &args_size, &argvec[count].locate);

45638

45639

if (argvec[count].reg == 0 || argvec[count].partial != 0

45640

|| reg_parm_stack_space > 0)

45641

@@ -3821,7 +3826,7 @@

45642

#else

45643

argvec[count].reg != 0,

45644

#endif

45645

- argvec[count].partial,

45646

+ reg_parm_stack_space, argvec[count].partial,

45647

NULL_TREE, &args_size, &argvec[count].locate);

45648

args_size.constant += argvec[count].locate.size.constant;

45649

gcc_assert (!argvec[count].locate.size.var);

45650

Index: gcc/tree-dfa.c

45651

===================================================================

45652

--- a/src/gcc/tree-dfa.c (.../tags/gcc_4_8_2_release)

45653

+++ b/src/gcc/tree-dfa.c (.../branches/gcc-4_8-branch)

45654

@@ -386,7 +386,6 @@

45655

double_int bit_offset = double_int_zero;

45656

HOST_WIDE_INT hbit_offset;

45657

bool seen_variable_array_ref = false;

45658

- tree base_type;

45659

45660

/* First get the final access size from just the outermost expression. */

45661

if (TREE_CODE (exp) == COMPONENT_REF)

45662

@@ -417,8 +416,6 @@

45663

and find the ultimate containing object. */

45664

while (1)

45665

{

45666

- base_type = TREE_TYPE (exp);

45667

-

45668

switch (TREE_CODE (exp))

45669

{

45670

case BIT_FIELD_REF:

45671

@@ -543,7 +540,38 @@

45672

case VIEW_CONVERT_EXPR:

45673

break;

45674

45675

+ case TARGET_MEM_REF:

45676

+ /* Via the variable index or index2 we can reach the

45677

+ whole object. Still hand back the decl here. */

45678

+ if (TREE_CODE (TMR_BASE (exp)) == ADDR_EXPR

45679

+ && (TMR_INDEX (exp) || TMR_INDEX2 (exp)))

45680

+ {

45681

+ exp = TREE_OPERAND (TMR_BASE (exp), 0);

45682

+ bit_offset = double_int_zero;

45683

+ maxsize = -1;

45684

+ goto done;

45685

+ }

45686

+ /* Fallthru. */

45687

case MEM_REF:

45688

+ /* We need to deal with variable arrays ending structures such as

45689

+ struct { int length; int a[1]; } x; x.a[d]

45690

+ struct { struct { int a; int b; } a[1]; } x; x.a[d].a

45691

+ struct { struct { int a[1]; } a[1]; } x; x.a[0][d], x.a[d][0]

45692

+ struct { int len; union { int a[1]; struct X x; } u; } x; x.u.a[d]

45693

+ where we do not know maxsize for variable index accesses to

45694

+ the array. The simplest way to conservatively deal with this

45695

+ is to punt in the case that offset + maxsize reaches the

45696

+ base type boundary. This needs to include possible trailing

45697

+ padding that is there for alignment purposes. */

45698

+ if (seen_variable_array_ref

45699

+ && maxsize != -1

45700

+ && (!bit_offset.fits_shwi ()

45701

+ || !host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)

45702

+ || (bit_offset.to_shwi () + maxsize

45703

+ == (HOST_WIDE_INT) TREE_INT_CST_LOW

45704

+ (TYPE_SIZE (TREE_TYPE (exp))))))

45705

+ maxsize = -1;

45706

+

45707

/* Hand back the decl for MEM[&decl, off]. */

45708

if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)

45709

{

45710

@@ -565,37 +593,6 @@

45711

}

45712

goto done;

45713

45714

- case TARGET_MEM_REF:

45715

- /* Hand back the decl for MEM[&decl, off]. */

45716

- if (TREE_CODE (TMR_BASE (exp)) == ADDR_EXPR)

45717

- {

45718

- /* Via the variable index or index2 we can reach the

45719

- whole object. */

45720

- if (TMR_INDEX (exp) || TMR_INDEX2 (exp))

45721

- {

45722

- exp = TREE_OPERAND (TMR_BASE (exp), 0);

45723

- bit_offset = double_int_zero;

45724

- maxsize = -1;

45725

- goto done;

45726

- }

45727

- if (integer_zerop (TMR_OFFSET (exp)))

45728

- exp = TREE_OPERAND (TMR_BASE (exp), 0);

45729

- else

45730

- {

45731

- double_int off = mem_ref_offset (exp);

45732

- off = off.alshift (BITS_PER_UNIT == 8

45733

- ? 3 : exact_log2 (BITS_PER_UNIT),

45734

- HOST_BITS_PER_DOUBLE_INT);

45735

- off += bit_offset;

45736

- if (off.fits_shwi ())

45737

- {

45738

- bit_offset = off;

45739

- exp = TREE_OPERAND (TMR_BASE (exp), 0);

45740

- }

45741

- }

45742

- }

45743

- goto done;

45744

-

45745

default:

45746

goto done;

45747

}

45748

@@ -602,8 +599,18 @@

45749

45750

exp = TREE_OPERAND (exp, 0);

45751

}

45752

+

45753

+ /* We need to deal with variable arrays ending structures. */

45754

+ if (seen_variable_array_ref

45755

+ && maxsize != -1

45756

+ && (!bit_offset.fits_shwi ()

45757

+ || !host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)

45758

+ || (bit_offset.to_shwi () + maxsize

45759

+ == (HOST_WIDE_INT)

45760

+ TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp))))))

45761

+ maxsize = -1;

45762

+

45763

done:

45764

-

45765

if (!bit_offset.fits_shwi ())

45766

{

45767

*poffset = 0;

45768

@@ -615,24 +622,6 @@

45769

45770

hbit_offset = bit_offset.to_shwi ();

45771

45772

- /* We need to deal with variable arrays ending structures such as

45773

- struct { int length; int a[1]; } x; x.a[d]

45774

- struct { struct { int a; int b; } a[1]; } x; x.a[d].a

45775

- struct { struct { int a[1]; } a[1]; } x; x.a[0][d], x.a[d][0]

45776

- struct { int len; union { int a[1]; struct X x; } u; } x; x.u.a[d]

45777

- where we do not know maxsize for variable index accesses to

45778

- the array. The simplest way to conservatively deal with this

45779

- is to punt in the case that offset + maxsize reaches the

45780

- base type boundary. This needs to include possible trailing padding

45781

- that is there for alignment purposes. */

45782

-

45783

- if (seen_variable_array_ref

45784

- && maxsize != -1

45785

- && (!host_integerp (TYPE_SIZE (base_type), 1)

45786

- || (hbit_offset + maxsize

45787

- == (signed) TREE_INT_CST_LOW (TYPE_SIZE (base_type)))))

45788

- maxsize = -1;

45789

-

45790

/* In case of a decl or constant base object we can do better. */

45791

45792

if (DECL_P (exp))

45793

Index: gcc/gimple-fold.c

45794

===================================================================

45795

--- a/src/gcc/gimple-fold.c (.../tags/gcc_4_8_2_release)

45796

+++ b/src/gcc/gimple-fold.c (.../branches/gcc-4_8-branch)

45797

@@ -178,7 +178,7 @@

45798

/* Make sure we create a cgraph node for functions we'll reference.

45799

They can be non-existent if the reference comes from an entry

45800

of an external vtable for example. */

45801

- cgraph_get_create_node (base);

45802

+ cgraph_get_create_real_symbol_node (base);

45803

}

45804

/* Fixup types in global initializers. */

45805

if (TREE_TYPE (TREE_TYPE (cval)) != TREE_TYPE (TREE_OPERAND (cval, 0)))

45806

@@ -866,6 +866,7 @@

45807

break;

45808

case BUILT_IN_STRCPY:

45809

case BUILT_IN_STRNCPY:

45810

+ case BUILT_IN_STRCAT:

45811

arg_idx = 1;

45812

type = 0;

45813

break;

45814

@@ -941,6 +942,13 @@

45815

val[1]);

45816

break;

45817

45818

+ case BUILT_IN_STRCAT:

45819

+ if (val[1] && is_gimple_val (val[1]) && nargs == 2)

45820

+ result = fold_builtin_strcat (loc, gimple_call_arg (stmt, 0),

45821

+ gimple_call_arg (stmt, 1),

45822

+ val[1]);

45823

+ break;

45824

+

45825

case BUILT_IN_FPUTS:

45826

if (nargs == 2)

45827

result = fold_builtin_fputs (loc, gimple_call_arg (stmt, 0),

45828

Index: gcc/cfgexpand.c

45829

===================================================================

45830

--- a/src/gcc/cfgexpand.c (.../tags/gcc_4_8_2_release)

45831

+++ b/src/gcc/cfgexpand.c (.../branches/gcc-4_8-branch)

45832

@@ -331,7 +331,7 @@

45833

enter its partition number into bitmap DATA. */

45834

45835

static bool

45836

-visit_op (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

45837

+visit_op (gimple, tree op, tree, void *data)

45838

{

45839

bitmap active = (bitmap)data;

45840

op = get_base_address (op);

45841

@@ -351,7 +351,7 @@

45842

from bitmap DATA. */

45843

45844

static bool

45845

-visit_conflict (gimple stmt ATTRIBUTE_UNUSED, tree op, void *data)

45846

+visit_conflict (gimple, tree op, tree, void *data)

45847

{

45848

bitmap active = (bitmap)data;

45849

op = get_base_address (op);

45850

@@ -385,7 +385,7 @@

45851

edge e;

45852

edge_iterator ei;

45853

gimple_stmt_iterator gsi;

45854

- bool (*visit)(gimple, tree, void *);

45855

+ walk_stmt_load_store_addr_fn visit;

45856

45857

bitmap_clear (work);

45858

FOR_EACH_EDGE (e, ei, bb->preds)

45859

@@ -4707,14 +4707,18 @@

45860

if (e->insns.r)

45861

{

45862

rebuild_jump_labels_chain (e->insns.r);

45863

- /* Avoid putting insns before parm_birth_insn. */

45864

+ /* Put insns after parm birth, but before

45865

+ NOTE_INSNS_FUNCTION_BEG. */

45866

if (e->src == ENTRY_BLOCK_PTR

45867

- && single_succ_p (ENTRY_BLOCK_PTR)

45868

- && parm_birth_insn)

45869

+ && single_succ_p (ENTRY_BLOCK_PTR))

45870

{

45871

rtx insns = e->insns.r;

45872

e->insns.r = NULL_RTX;

45873

- emit_insn_after_noloc (insns, parm_birth_insn, e->dest);

45874

+ if (NOTE_P (parm_birth_insn)

45875

+ && NOTE_KIND (parm_birth_insn) == NOTE_INSN_FUNCTION_BEG)

45876

+ emit_insn_before_noloc (insns, parm_birth_insn, e->dest);

45877

+ else

45878

+ emit_insn_after_noloc (insns, parm_birth_insn, e->dest);

45879

}

45880

else

45881

commit_one_edge_insertion (e);

45882

Index: gcc/cselib.c

45883

===================================================================

45884

--- a/src/gcc/cselib.c (.../tags/gcc_4_8_2_release)

45885

+++ b/src/gcc/cselib.c (.../branches/gcc-4_8-branch)

45886

@@ -2260,8 +2260,8 @@

45887

continue;

45888

}

45889

if (num_mems < PARAM_VALUE (PARAM_MAX_CSELIB_MEMORY_LOCATIONS)

45890

- && ! canon_true_dependence (mem_rtx, GET_MODE (mem_rtx),

45891

- mem_addr, x, NULL_RTX))

45892

+ && ! canon_anti_dependence (x, false, mem_rtx,

45893

+ GET_MODE (mem_rtx), mem_addr))

45894

{

45895

has_mem = true;

45896

num_mems++;

45897

@@ -2623,12 +2623,13 @@

45898

45899

cselib_current_insn = insn;

45900

45901

- /* Forget everything at a CODE_LABEL, a volatile insn, or a setjmp. */

45902

+ /* Forget everything at a CODE_LABEL, a volatile asm, or a setjmp. */

45903

if ((LABEL_P (insn)

45904

|| (CALL_P (insn)

45905

&& find_reg_note (insn, REG_SETJMP, NULL))

45906

|| (NONJUMP_INSN_P (insn)

45907

- && volatile_insn_p (PATTERN (insn))))

45908

+ && GET_CODE (PATTERN (insn)) == ASM_OPERANDS

45909

+ && MEM_VOLATILE_P (PATTERN (insn))))

45910

&& !cselib_preserve_constants)

45911

{

45912

cselib_reset_table (next_uid);

45913

Index: gcc/tree-cfgcleanup.c

45914

===================================================================

45915

--- a/src/gcc/tree-cfgcleanup.c (.../tags/gcc_4_8_2_release)

45916

+++ b/src/gcc/tree-cfgcleanup.c (.../branches/gcc-4_8-branch)

45917

@@ -539,9 +539,6 @@

45918

update_stmt (stmt);

45919

changed = true;

45920

}

45921

- /* Similarly remove VDEF if there is any. */

45922

- else if (gimple_vdef (stmt))

45923

- update_stmt (stmt);

45924

return changed;

45925

}

45926

45927

Index: gcc/tree-ssa-pre.c

45928

===================================================================

45929

--- a/src/gcc/tree-ssa-pre.c (.../tags/gcc_4_8_2_release)

45930

+++ b/src/gcc/tree-ssa-pre.c (.../branches/gcc-4_8-branch)

45931

@@ -3664,6 +3664,12 @@

45932

if (dump_file && dump_flags & TDF_DETAILS)

45933

fprintf (dump_file, "Starting insert iteration %d\n", num_iterations);

45934

new_stuff = insert_aux (ENTRY_BLOCK_PTR);

45935

+

45936

+ /* Clear the NEW sets before the next iteration. We have already

45937

+ fully propagated its contents. */

45938

+ if (new_stuff)

45939

+ FOR_ALL_BB (bb)

45940

+ bitmap_set_free (NEW_SETS (bb));

45941

}

45942

statistics_histogram_event (cfun, "insert iterations", num_iterations);

45943

}

45944

Index: gcc/cfgcleanup.c

45945

===================================================================

45946

--- a/src/gcc/cfgcleanup.c (.../tags/gcc_4_8_2_release)

45947

+++ b/src/gcc/cfgcleanup.c (.../branches/gcc-4_8-branch)

45948

@@ -1293,7 +1293,6 @@

45949

{

45950

rtx i1, i2, last1, last2, afterlast1, afterlast2;

45951

int ninsns = 0;

45952

- rtx p1;

45953

enum replace_direction dir, last_dir, afterlast_dir;

45954

bool follow_fallthru, did_fallthru;

45955

45956

@@ -1321,8 +1320,9 @@

45957

|| (returnjump_p (i2) && !side_effects_p (PATTERN (i2))))

45958

{

45959

last2 = i2;

45960

- /* Count everything except for unconditional jump as insn. */

45961

- if (!simplejump_p (i2) && !returnjump_p (i2) && last1)

45962

+ /* Count everything except for unconditional jump as insn.

45963

+ Don't count any jumps if dir_p is NULL. */

45964

+ if (!simplejump_p (i2) && !returnjump_p (i2) && last1 && dir_p)

45965

ninsns++;

45966

i2 = PREV_INSN (i2);

45967

}

45968

@@ -1373,8 +1373,8 @@

45969

last1 = i1, last2 = i2;

45970

afterlast_dir = last_dir;

45971

last_dir = dir;

45972

- p1 = PATTERN (i1);

45973

- if (!(GET_CODE (p1) == USE || GET_CODE (p1) == CLOBBER))

45974

+ if (GET_CODE (PATTERN (i1)) != USE

45975

+ && GET_CODE (PATTERN (i1)) != CLOBBER)

45976

ninsns++;

45977

}

45978

45979

@@ -1420,7 +1420,8 @@

45980

/* Like flow_find_cross_jump, except start looking for a matching sequence from

45981

the head of the two blocks. Do not include jumps at the end.

45982

If STOP_AFTER is nonzero, stop after finding that many matching

45983

- instructions. */

45984

+ instructions. If STOP_AFTER is zero, count all INSN_P insns, if it is

45985

+ non-zero, only count active insns. */

45986

45987

int

45988

flow_find_head_matching_sequence (basic_block bb1, basic_block bb2, rtx *f1,

45989

@@ -1492,7 +1493,10 @@

45990

45991

beforelast1 = last1, beforelast2 = last2;

45992

last1 = i1, last2 = i2;

45993

- ninsns++;

45994

+ if (!stop_after

45995

+ || (GET_CODE (PATTERN (i1)) != USE

45996

+ && GET_CODE (PATTERN (i1)) != CLOBBER))

45997

+ ninsns++;

45998

}

45999

46000

if (i1 == BB_END (bb1) || i2 == BB_END (bb2)

46001

Index: gcc/simplify-rtx.c

46002

===================================================================

46003

--- a/src/gcc/simplify-rtx.c (.../tags/gcc_4_8_2_release)

46004

+++ b/src/gcc/simplify-rtx.c (.../branches/gcc-4_8-branch)

46005

@@ -639,11 +639,16 @@

46006

XEXP (op, 0), origmode);

46007

}

46008

46009

- /* Simplify (truncate:SI (op:DI (x:DI) (y:DI)))

46010

- to (op:SI (truncate:SI (x:DI)) (truncate:SI (x:DI))). */

46011

- if (GET_CODE (op) == PLUS

46012

- || GET_CODE (op) == MINUS

46013

- || GET_CODE (op) == MULT)

46014

+ /* If the machine can perform operations in the truncated mode, distribute

46015

+ the truncation, i.e. simplify (truncate:QI (op:SI (x:SI) (y:SI))) into

46016

+ (op:QI (truncate:QI (x:SI)) (truncate:QI (y:SI))). */

46017

+ if (1

46018

+#ifdef WORD_REGISTER_OPERATIONS

46019

+ && precision >= BITS_PER_WORD

46020

+#endif

46021

+ && (GET_CODE (op) == PLUS

46022

+ || GET_CODE (op) == MINUS

46023

+ || GET_CODE (op) == MULT))

46024

{

46025

rtx op0 = simplify_gen_unary (TRUNCATE, mode, XEXP (op, 0), op_mode);

46026

if (op0)

46027

Index: gcc/tree-ssa-live.c

46028

===================================================================

46029

--- a/src/gcc/tree-ssa-live.c (.../tags/gcc_4_8_2_release)

46030

+++ b/src/gcc/tree-ssa-live.c (.../branches/gcc-4_8-branch)

46031

@@ -394,7 +394,8 @@

46032

{

46033

/* When a global var becomes used for the first time also walk its

46034

initializer (non global ones don't have any). */

46035

- if (set_is_used (t) && is_global_var (t))

46036

+ if (set_is_used (t) && is_global_var (t)

46037

+ && DECL_CONTEXT (t) == current_function_decl)

46038

mark_all_vars_used (&DECL_INITIAL (t));

46039

}

46040

/* remove_unused_scope_block_p requires information about labels

46041

Index: gcc/tree-sra.c

46042

===================================================================

46043

--- a/src/gcc/tree-sra.c (.../tags/gcc_4_8_2_release)

46044

+++ b/src/gcc/tree-sra.c (.../branches/gcc-4_8-branch)

46045

@@ -1161,8 +1161,7 @@

46046

GIMPLE_ASM operands with memory constrains which cannot be scalarized. */

46047

46048

static bool

46049

-asm_visit_addr (gimple stmt ATTRIBUTE_UNUSED, tree op,

46050

- void *data ATTRIBUTE_UNUSED)

46051

+asm_visit_addr (gimple, tree op, tree, void *)

46052

{

46053

op = get_base_address (op);

46054

if (op

46055

@@ -2890,6 +2889,10 @@

46056

lacc);

46057

else

46058

drhs = NULL_TREE;

46059

+ if (drhs

46060

+ && !useless_type_conversion_p (lacc->type, TREE_TYPE (drhs)))

46061

+ drhs = fold_build1_loc (loc, VIEW_CONVERT_EXPR,

46062

+ lacc->type, drhs);

46063

ds = gimple_build_debug_bind (get_access_replacement (lacc),

46064

drhs, gsi_stmt (*old_gsi));

46065

gsi_insert_after (new_gsi, ds, GSI_NEW_STMT);

46066

@@ -4868,6 +4871,14 @@

46067

return false;

46068

}

46069

46070

+ if (!opt_for_fn (node->symbol.decl, optimize)

46071

+ || !opt_for_fn (node->symbol.decl, flag_ipa_sra))

46072

+ {

46073

+ if (dump_file)

46074

+ fprintf (dump_file, "Function not optimized.\n");

46075

+ return false;

46076

+ }

46077

+

46078

if (DECL_VIRTUAL_P (current_function_decl))

46079

{

46080

if (dump_file)

46081

Index: gcc/tree-predcom.c

46082

===================================================================

46083

--- a/src/gcc/tree-predcom.c (.../tags/gcc_4_8_2_release)

46084

+++ b/src/gcc/tree-predcom.c (.../branches/gcc-4_8-branch)

46085

@@ -1323,90 +1323,43 @@

46086

gsi_insert_after (&bsi, new_stmt, GSI_NEW_STMT);

46087

}

46088

46089

-/* Returns the reference to the address of REF in the ITER-th iteration of

46090

- LOOP, or NULL if we fail to determine it (ITER may be negative). We

46091

- try to preserve the original shape of the reference (not rewrite it

46092

- as an indirect ref to the address), to make tree_could_trap_p in

46093

- prepare_initializers_chain return false more often. */

46094

+/* Returns a memory reference to DR in the ITER-th iteration of

46095

+ the loop it was analyzed in. Append init stmts to STMTS. */

46096

46097

-static tree

46098

-ref_at_iteration (struct loop *loop, tree ref, int iter)

46099

+static tree

46100

+ref_at_iteration (data_reference_p dr, int iter, gimple_seq *stmts)

46101

{

46102

- tree idx, *idx_p, type, val, op0 = NULL_TREE, ret;

46103

- affine_iv iv;

46104

- bool ok;

46105

-

46106

- if (handled_component_p (ref))

46107

+ tree off = DR_OFFSET (dr);

46108

+ tree coff = DR_INIT (dr);

46109

+ if (iter == 0)

46110

+ ;

46111

+ else if (TREE_CODE (DR_STEP (dr)) == INTEGER_CST)

46112

+ coff = size_binop (PLUS_EXPR, coff,

46113

+ size_binop (MULT_EXPR, DR_STEP (dr), ssize_int (iter)));

46114

+ else

46115

+ off = size_binop (PLUS_EXPR, off,

46116

+ size_binop (MULT_EXPR, DR_STEP (dr), ssize_int (iter)));

46117

+ tree addr = fold_build_pointer_plus (DR_BASE_ADDRESS (dr), off);

46118

+ addr = force_gimple_operand_1 (addr, stmts, is_gimple_mem_ref_addr,

46119

+ NULL_TREE);

46120

+ tree alias_ptr = fold_convert (reference_alias_ptr_type (DR_REF (dr)), coff);

46121

+ /* While data-ref analysis punts on bit offsets it still handles

46122

+ bitfield accesses at byte boundaries. Cope with that. Note that

46123

+ we cannot simply re-apply the outer COMPONENT_REF because the

46124

+ byte-granular portion of it is already applied via DR_INIT and

46125

+ DR_OFFSET, so simply build a BIT_FIELD_REF knowing that the bits

46126

+ start at offset zero. */

46127

+ if (TREE_CODE (DR_REF (dr)) == COMPONENT_REF

46128

+ && DECL_BIT_FIELD (TREE_OPERAND (DR_REF (dr), 1)))

46129

{

46130

- op0 = ref_at_iteration (loop, TREE_OPERAND (ref, 0), iter);

46131

- if (!op0)

46132

- return NULL_TREE;

46133

+ tree field = TREE_OPERAND (DR_REF (dr), 1);

46134

+ return build3 (BIT_FIELD_REF, TREE_TYPE (DR_REF (dr)),

46135

+ build2 (MEM_REF, DECL_BIT_FIELD_TYPE (field),

46136

+ addr, alias_ptr),

46137

+ DECL_SIZE (field), bitsize_zero_node);

46138

}

46139

- else if (!INDIRECT_REF_P (ref)

46140

- && TREE_CODE (ref) != MEM_REF)

46141

- return unshare_expr (ref);

46142

-

46143

- if (TREE_CODE (ref) == MEM_REF)

46144

- {

46145

- ret = unshare_expr (ref);

46146

- idx = TREE_OPERAND (ref, 0);

46147

- idx_p = &TREE_OPERAND (ret, 0);

46148

- }

46149

- else if (TREE_CODE (ref) == COMPONENT_REF)

46150

- {

46151

- /* Check that the offset is loop invariant. */

46152

- if (TREE_OPERAND (ref, 2)

46153

- && !expr_invariant_in_loop_p (loop, TREE_OPERAND (ref, 2)))

46154

- return NULL_TREE;

46155

-

46156

- return build3 (COMPONENT_REF, TREE_TYPE (ref), op0,

46157

- unshare_expr (TREE_OPERAND (ref, 1)),

46158

- unshare_expr (TREE_OPERAND (ref, 2)));

46159

- }

46160

- else if (TREE_CODE (ref) == ARRAY_REF)

46161

- {

46162

- /* Check that the lower bound and the step are loop invariant. */

46163

- if (TREE_OPERAND (ref, 2)

46164

- && !expr_invariant_in_loop_p (loop, TREE_OPERAND (ref, 2)))

46165

- return NULL_TREE;

46166

- if (TREE_OPERAND (ref, 3)

46167

- && !expr_invariant_in_loop_p (loop, TREE_OPERAND (ref, 3)))

46168

- return NULL_TREE;

46169

-

46170

- ret = build4 (ARRAY_REF, TREE_TYPE (ref), op0, NULL_TREE,

46171

- unshare_expr (TREE_OPERAND (ref, 2)),

46172

- unshare_expr (TREE_OPERAND (ref, 3)));

46173

- idx = TREE_OPERAND (ref, 1);

46174

- idx_p = &TREE_OPERAND (ret, 1);

46175

- }

46176

else

46177

- return NULL_TREE;

46178

-

46179

- ok = simple_iv (loop, loop, idx, &iv, true);

46180

- if (!ok)

46181

- return NULL_TREE;

46182

- iv.base = expand_simple_operations (iv.base);

46183

- if (integer_zerop (iv.step))

46184

- *idx_p = unshare_expr (iv.base);

46185

- else

46186

- {

46187

- type = TREE_TYPE (iv.base);

46188

- if (POINTER_TYPE_P (type))

46189

- {

46190

- val = fold_build2 (MULT_EXPR, sizetype, iv.step,

46191

- size_int (iter));

46192

- val = fold_build_pointer_plus (iv.base, val);

46193

- }

46194

- else

46195

- {

46196

- val = fold_build2 (MULT_EXPR, type, iv.step,

46197

- build_int_cst_type (type, iter));

46198

- val = fold_build2 (PLUS_EXPR, type, iv.base, val);

46199

- }

46200

- *idx_p = unshare_expr (val);

46201

- }

46202

-

46203

- return ret;

46204

+ return fold_build2 (MEM_REF, TREE_TYPE (DR_REF (dr)), addr, alias_ptr);

46205

}

46206

46207

/* Get the initialization expression for the INDEX-th temporary variable

46208

@@ -2068,7 +2021,11 @@

46209

46210

stmt = find_common_use_stmt (&name1, &name2);

46211

46212

- if (!stmt)

46213

+ if (!stmt

46214

+ /* A simple post-dominance check - make sure the combination

46215

+ is executed under the same condition as the references. */

46216

+ || (gimple_bb (stmt) != gimple_bb (r1->stmt)

46217

+ && gimple_bb (stmt) != gimple_bb (r2->stmt)))

46218

return false;

46219

46220

acode = gimple_assign_rhs_code (stmt);

46221

@@ -2365,14 +2322,10 @@

46222

if (chain->inits[i] != NULL_TREE)

46223

continue;

46224

46225

- init = ref_at_iteration (loop, DR_REF (dr), (int) i - n);

46226

- if (!init)

46227

- return false;

46228

-

46229

+ init = ref_at_iteration (dr, (int) i - n, &stmts);

46230

if (!chain->all_always_accessed && tree_could_trap_p (init))

46231

return false;

46232

46233

- init = force_gimple_operand (init, &stmts, false, NULL_TREE);

46234

if (stmts)

46235

gsi_insert_seq_on_edge_immediate (entry, stmts);

46236

46237

@@ -2449,6 +2402,7 @@

46238

if (!components)

46239

{

46240

free_data_refs (datarefs);

46241

+ free_affine_expand_cache (&name_expansions);

46242

return false;

46243

}

46244

46245

Index: gcc/loop-iv.c

46246

===================================================================

46247

--- a/src/gcc/loop-iv.c (.../tags/gcc_4_8_2_release)

46248

+++ b/src/gcc/loop-iv.c (.../branches/gcc-4_8-branch)

46249

@@ -425,7 +425,9 @@

46250

&& !iv->first_special)

46251

{

46252

rtx val = get_iv_value (iv, const0_rtx);

46253

- val = lowpart_subreg (mode, val, iv->extend_mode);

46254

+ val = lowpart_subreg (mode, val,

46255

+ iv->extend == IV_UNKNOWN_EXTEND

46256

+ ? iv->mode : iv->extend_mode);

46257

46258

iv->base = val;

46259

iv->extend = IV_UNKNOWN_EXTEND;

46260

@@ -465,8 +467,14 @@

46261

&& !iv->first_special)

46262

{

46263

rtx val = get_iv_value (iv, const0_rtx);

46264

+ if (iv->extend_mode != iv->mode

46265

+ && iv->extend != IV_UNKNOWN_EXTEND

46266

+ && iv->extend != extend)

46267

+ val = lowpart_subreg (iv->mode, val, iv->extend_mode);

46268

val = simplify_gen_unary (iv_extend_to_rtx_code (extend), mode,

46269

- val, iv->extend_mode);

46270

+ val,

46271

+ iv->extend == extend

46272

+ ? iv->extend_mode : iv->mode);

46273

iv->base = val;

46274

iv->extend = IV_UNKNOWN_EXTEND;

46275

iv->mode = iv->extend_mode = mode;

46276

Index: gcc/ipa-prop.c

46277

===================================================================

46278

--- a/src/gcc/ipa-prop.c (.../tags/gcc_4_8_2_release)

46279

+++ b/src/gcc/ipa-prop.c (.../branches/gcc-4_8-branch)

46280

@@ -623,16 +623,22 @@

46281

if (parm_ainfo && parm_ainfo->parm_modified)

46282

return false;

46283

46284

- gcc_checking_assert (gimple_vuse (stmt) != NULL_TREE);

46285

- ao_ref_init (&refd, parm_load);

46286

- /* We can cache visited statements only when parm_ainfo is available and when

46287

- we are looking at a naked load of the whole parameter. */

46288

- if (!parm_ainfo || TREE_CODE (parm_load) != PARM_DECL)

46289

- visited_stmts = NULL;

46290

+ if (optimize)

46291

+ {

46292

+ gcc_checking_assert (gimple_vuse (stmt) != NULL_TREE);

46293

+ ao_ref_init (&refd, parm_load);

46294

+ /* We can cache visited statements only when parm_ainfo is available and

46295

+ when we are looking at a naked load of the whole parameter. */

46296

+ if (!parm_ainfo || TREE_CODE (parm_load) != PARM_DECL)

46297

+ visited_stmts = NULL;

46298

+ else

46299

+ visited_stmts = &parm_ainfo->parm_visited_statements;

46300

+ walk_aliased_vdefs (&refd, gimple_vuse (stmt), mark_modified, &modified,

46301

+ visited_stmts);

46302

+ }

46303

else

46304

- visited_stmts = &parm_ainfo->parm_visited_statements;

46305

- walk_aliased_vdefs (&refd, gimple_vuse (stmt), mark_modified, &modified,

46306

- visited_stmts);

46307

+ modified = true;

46308

+

46309

if (parm_ainfo && modified)

46310

parm_ainfo->parm_modified = true;

46311

return !modified;

46312

@@ -740,7 +746,7 @@

46313

ipa_load_from_parm_agg_1 (vec<ipa_param_descriptor_t> descriptors,

46314

struct param_analysis_info *parms_ainfo, gimple stmt,

46315

tree op, int *index_p, HOST_WIDE_INT *offset_p,

46316

- bool *by_ref_p)

46317

+ HOST_WIDE_INT *size_p, bool *by_ref_p)

46318

{

46319

int index;

46320

HOST_WIDE_INT size, max_size;

46321

@@ -758,6 +764,8 @@

46322

{

46323

*index_p = index;

46324

*by_ref_p = false;

46325

+ if (size_p)

46326

+ *size_p = size;

46327

return true;

46328

}

46329

return false;

46330

@@ -800,6 +808,8 @@

46331

{

46332

*index_p = index;

46333

*by_ref_p = true;

46334

+ if (size_p)

46335

+ *size_p = size;

46336

return true;

46337

}

46338

return false;

46339

@@ -814,7 +824,7 @@

46340

bool *by_ref_p)

46341

{

46342

return ipa_load_from_parm_agg_1 (info->descriptors, NULL, stmt, op, index_p,

46343

- offset_p, by_ref_p);

46344

+ offset_p, NULL, by_ref_p);

46345

}

46346

46347

/* Given that an actual argument is an SSA_NAME (given in NAME) and is a result

46348

@@ -1051,7 +1061,8 @@

46349

return;

46350

parm = TREE_OPERAND (expr, 0);

46351

index = ipa_get_param_decl_index (info, SSA_NAME_VAR (parm));

46352

- gcc_assert (index >= 0);

46353

+ if (index < 0)

46354

+ return;

46355

46356

cond_bb = single_pred (assign_bb);

46357

cond = last_stmt (cond_bb);

46358

@@ -1462,6 +1473,9 @@

46359

{

46360

struct cgraph_edge *cs;

46361

46362

+ if (!optimize)

46363

+ return;

46364

+

46365

for (cs = node->callees; cs; cs = cs->next_callee)

46366

{

46367

struct cgraph_node *callee = cgraph_function_or_thunk_node (cs->callee,

46368

@@ -1646,7 +1660,7 @@

46369

if (gimple_assign_single_p (def)

46370

&& ipa_load_from_parm_agg_1 (info->descriptors, parms_ainfo, def,

46371

gimple_assign_rhs1 (def), &index, &offset,

46372

- &by_ref))

46373

+ NULL, &by_ref))

46374

{

46375

struct cgraph_edge *cs = ipa_note_param_call (node, index, call);

46376

cs->indirect_info->offset = offset;

46377

@@ -1847,8 +1861,7 @@

46378

passed in DATA. */

46379

46380

static bool

46381

-visit_ref_for_mod_analysis (gimple stmt ATTRIBUTE_UNUSED,

46382

- tree op, void *data)

46383

+visit_ref_for_mod_analysis (gimple, tree op, tree, void *data)

46384

{

46385

struct ipa_node_params *info = (struct ipa_node_params *) data;

46386

46387

@@ -2126,7 +2139,6 @@

46388

we may create the first reference to the object in the unit. */

46389

if (!callee || callee->global.inlined_to)

46390

{

46391

- struct cgraph_node *first_clone = callee;

46392

46393

/* We are better to ensure we can refer to it.

46394

In the case of static functions we are out of luck, since we already

46395

@@ -2142,31 +2154,7 @@

46396

xstrdup (cgraph_node_name (ie->callee)), ie->callee->uid);

46397

return NULL;

46398

}

46399

-

46400

- /* Create symbol table node. Even if inline clone exists, we can not take

46401

- it as a target of non-inlined call. */

46402

- callee = cgraph_create_node (target);

46403

-

46404

- /* OK, we previously inlined the function, then removed the offline copy and

46405

- now we want it back for external call. This can happen when devirtualizing

46406

- while inlining function called once that happens after extern inlined and

46407

- virtuals are already removed. In this case introduce the external node

46408

- and make it available for call. */

46409

- if (first_clone)

46410

- {

46411

- first_clone->clone_of = callee;

46412

- callee->clones = first_clone;

46413

- symtab_prevail_in_asm_name_hash ((symtab_node)callee);

46414

- symtab_insert_node_to_hashtable ((symtab_node)callee);

46415

- if (dump_file)

46416

- fprintf (dump_file, "ipa-prop: Introduced new external node "

46417

- "(%s/%i) and turned into root of the clone tree.\n",

46418

- xstrdup (cgraph_node_name (callee)), callee->uid);

46419

- }

46420

- else if (dump_file)

46421

- fprintf (dump_file, "ipa-prop: Introduced new external node "

46422

- "(%s/%i).\n",

46423

- xstrdup (cgraph_node_name (callee)), callee->uid);

46424

+ callee = cgraph_get_create_real_symbol_node (target);

46425

}

46426

ipa_check_create_node_params ();

46427

46428

@@ -3902,7 +3890,7 @@

46429

struct ipa_agg_replacement_value *v;

46430

gimple stmt = gsi_stmt (gsi);

46431

tree rhs, val, t;

46432

- HOST_WIDE_INT offset;

46433

+ HOST_WIDE_INT offset, size;

46434

int index;

46435

bool by_ref, vce;

46436

46437

@@ -3929,13 +3917,15 @@

46438

continue;

46439

46440

if (!ipa_load_from_parm_agg_1 (descriptors, parms_ainfo, stmt,

46441

- rhs, &index, &offset, &by_ref))

46442

+ rhs, &index, &offset, &size, &by_ref))

46443

continue;

46444

for (v = aggval; v; v = v->next)

46445

if (v->index == index

46446

&& v->offset == offset)

46447

break;

46448

- if (!v || v->by_ref != by_ref)

46449

+ if (!v

46450

+ || v->by_ref != by_ref

46451

+ || tree_low_cst (TYPE_SIZE (TREE_TYPE (v->value)), 0) != size)

46452

continue;

46453

46454

gcc_checking_assert (is_gimple_ip_invariant (v->value));

46455

Index: gcc/tree-ssa-dce.c

46456

===================================================================

46457

--- a/src/gcc/tree-ssa-dce.c (.../tags/gcc_4_8_2_release)

46458

+++ b/src/gcc/tree-ssa-dce.c (.../branches/gcc-4_8-branch)

46459

@@ -1307,26 +1307,19 @@

46460

stats.total++;

46461

46462

/* We can mark a call to free as not necessary if the

46463

- defining statement of its argument is an allocation

46464

- function and that is not necessary itself. */

46465

- if (gimple_call_builtin_p (stmt, BUILT_IN_FREE))

46466

+ defining statement of its argument is not necessary

46467

+ (and thus is getting removed). */

46468

+ if (gimple_plf (stmt, STMT_NECESSARY)

46469

+ && gimple_call_builtin_p (stmt, BUILT_IN_FREE))

46470

{

46471

tree ptr = gimple_call_arg (stmt, 0);

46472

- tree callee2;

46473

- gimple def_stmt;

46474

- if (TREE_CODE (ptr) != SSA_NAME)

46475

- continue;

46476

- def_stmt = SSA_NAME_DEF_STMT (ptr);

46477

- if (!is_gimple_call (def_stmt)

46478

- || gimple_plf (def_stmt, STMT_NECESSARY))

46479

- continue;

46480

- callee2 = gimple_call_fndecl (def_stmt);

46481

- if (callee2 == NULL_TREE

46482

- || DECL_BUILT_IN_CLASS (callee2) != BUILT_IN_NORMAL

46483

- || (DECL_FUNCTION_CODE (callee2) != BUILT_IN_MALLOC

46484

- && DECL_FUNCTION_CODE (callee2) != BUILT_IN_CALLOC))

46485

- continue;

46486

- gimple_set_plf (stmt, STMT_NECESSARY, false);

46487

+ if (TREE_CODE (ptr) == SSA_NAME)

46488

+ {

46489

+ gimple def_stmt = SSA_NAME_DEF_STMT (ptr);

46490

+ if (!gimple_nop_p (def_stmt)

46491

+ && !gimple_plf (def_stmt, STMT_NECESSARY))

46492

+ gimple_set_plf (stmt, STMT_NECESSARY, false);

46493

+ }

46494

}

46495

46496

/* If GSI is not necessary then remove it. */

46497

Index: gcc/tree-ssa-ter.c

46498

===================================================================

46499

--- a/src/gcc/tree-ssa-ter.c (.../tags/gcc_4_8_2_release)

46500

+++ b/src/gcc/tree-ssa-ter.c (.../branches/gcc-4_8-branch)

46501

@@ -590,6 +590,30 @@

46502

}

46503

46504

46505

+/* Helper function for find_ssaname_in_stores. Called via walk_tree to

46506

+ find a SSA_NAME DATA somewhere in *TP. */

46507

+

46508

+static tree

46509

+find_ssaname (tree *tp, int *walk_subtrees, void *data)

46510

+{

46511

+ tree var = (tree) data;

46512

+ if (*tp == var)

46513

+ return var;

46514

+ else if (IS_TYPE_OR_DECL_P (*tp))

46515

+ *walk_subtrees = 0;

46516

+ return NULL_TREE;

46517

+}

46518

+

46519

+/* Helper function for find_replaceable_in_bb. Return true if SSA_NAME DATA

46520

+ is used somewhere in T, which is a store in the statement. Called via

46521

+ walk_stmt_load_store_addr_ops. */

46522

+

46523

+static bool

46524

+find_ssaname_in_store (gimple, tree, tree t, void *data)

46525

+{

46526

+ return walk_tree (&t, find_ssaname, data, NULL) != NULL_TREE;

46527

+}

46528

+

46529

/* This function processes basic block BB, and looks for variables which can

46530

be replaced by their expressions. Results are stored in the table TAB. */

46531

46532

@@ -643,8 +667,7 @@

46533

/* If the stmt does a memory store and the replacement

46534

is a load aliasing it avoid creating overlapping

46535

assignments which we cannot expand correctly. */

46536

- if (gimple_vdef (stmt)

46537

- && gimple_assign_single_p (stmt))

46538

+ if (gimple_vdef (stmt))

46539

{

46540

gimple def_stmt = SSA_NAME_DEF_STMT (use);

46541

while (is_gimple_assign (def_stmt)

46542

@@ -653,9 +676,29 @@

46543

= SSA_NAME_DEF_STMT (gimple_assign_rhs1 (def_stmt));

46544

if (gimple_vuse (def_stmt)

46545

&& gimple_assign_single_p (def_stmt)

46546

- && refs_may_alias_p (gimple_assign_lhs (stmt),

46547

- gimple_assign_rhs1 (def_stmt)))

46548

- same_root_var = true;

46549

+ && stmt_may_clobber_ref_p (stmt,

46550

+ gimple_assign_rhs1 (def_stmt)))

46551

+ {

46552

+ /* For calls, it is not a problem if USE is among

46553

+ call's arguments or say OBJ_TYPE_REF argument,

46554

+ all those necessarily need to be evaluated before

46555

+ the call that may clobber the memory. But if

46556

+ LHS of the call refers to USE, expansion might

46557

+ evaluate it after the call, prevent TER in that

46558

+ case.

46559

+ For inline asm, allow TER of loads into input

46560

+ arguments, but disallow TER for USEs that occur

46561

+ somewhere in outputs. */

46562

+ if (is_gimple_call (stmt)

46563

+ || gimple_code (stmt) == GIMPLE_ASM)

46564

+ {

46565

+ if (walk_stmt_load_store_ops (stmt, use, NULL,

46566

+ find_ssaname_in_store))

46567

+ same_root_var = true;

46568

+ }

46569

+ else

46570

+ same_root_var = true;

46571

+ }

46572

}

46573

46574

/* Mark expression as replaceable unless stmt is volatile, or the

46575

Index: gcc/ira.c

46576

===================================================================

46577

--- a/src/gcc/ira.c (.../tags/gcc_4_8_2_release)

46578

+++ b/src/gcc/ira.c (.../branches/gcc-4_8-branch)

46579

@@ -4742,6 +4742,18 @@

46580

if (need_dce && optimize)

46581

run_fast_dce ();

46582

46583

+ /* Diagnose uses of the hard frame pointer when it is used as a global

46584

+ register. Often we can get away with letting the user appropriate

46585

+ the frame pointer, but we should let them know when code generation

46586

+ makes that impossible. */

46587

+ if (global_regs[HARD_FRAME_POINTER_REGNUM] && frame_pointer_needed)

46588

+ {

46589

+ tree decl = global_regs_decl[HARD_FRAME_POINTER_REGNUM];

46590

+ error_at (DECL_SOURCE_LOCATION (current_function_decl),

46591

+ "frame pointer required, but reserved");

46592

+ inform (DECL_SOURCE_LOCATION (decl), "for %qD", decl);

46593

+ }

46594

+

46595

timevar_pop (TV_IRA);

46596

}

46597

46598

Index: gcc/rtl.h

46599

===================================================================

46600

--- a/src/gcc/rtl.h (.../tags/gcc_4_8_2_release)

46601

+++ b/src/gcc/rtl.h (.../branches/gcc-4_8-branch)

46602

@@ -2705,6 +2705,8 @@

46603

const_rtx, rtx);

46604

extern int read_dependence (const_rtx, const_rtx);

46605

extern int anti_dependence (const_rtx, const_rtx);

46606

+extern int canon_anti_dependence (const_rtx, bool,

46607

+ const_rtx, enum machine_mode, rtx);

46608

extern int output_dependence (const_rtx, const_rtx);

46609

extern int may_alias_p (const_rtx, const_rtx);

46610

extern void init_alias_target (void);

46611

@@ -2789,6 +2791,8 @@

46612

#define fatal_insn_not_found(insn) \

46613

_fatal_insn_not_found (insn, __FILE__, __LINE__, __FUNCTION__)

46614

46615

+/* reginfo.c */

46616

+extern tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];

46617

46618

46619

#endif /* ! GCC_RTL_H */

46620

Index: gcc/tree-vect-stmts.c

46621

===================================================================

46622

--- a/src/gcc/tree-vect-stmts.c (.../tags/gcc_4_8_2_release)

46623

+++ b/src/gcc/tree-vect-stmts.c (.../branches/gcc-4_8-branch)

46624

@@ -4369,6 +4369,20 @@

46625

return false;

46626

}

46627

46628

+ /* Invalidate assumptions made by dependence analysis when vectorization

46629

+ on the unrolled body effectively re-orders stmts. */

46630

+ if (ncopies > 1

46631

+ && STMT_VINFO_MIN_NEG_DIST (stmt_info) != 0

46632

+ && ((unsigned)LOOP_VINFO_VECT_FACTOR (loop_vinfo)

46633

+ > STMT_VINFO_MIN_NEG_DIST (stmt_info)))

46634

+ {

46635

+ if (dump_enabled_p ())

46636

+ dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,

46637

+ "cannot perform implicit CSE when unrolling "

46638

+ "with negative dependence distance\n");

46639

+ return false;

46640

+ }

46641

+

46642

if (!STMT_VINFO_RELEVANT_P (stmt_info) && !bb_vinfo)

46643

return false;

46644

46645

@@ -4425,6 +4439,20 @@

46646

else if (!vect_grouped_load_supported (vectype, group_size))

46647

return false;

46648

}

46649

+

46650

+ /* Invalidate assumptions made by dependence analysis when vectorization

46651

+ on the unrolled body effectively re-orders stmts. */

46652

+ if (!PURE_SLP_STMT (stmt_info)

46653

+ && STMT_VINFO_MIN_NEG_DIST (stmt_info) != 0

46654

+ && ((unsigned)LOOP_VINFO_VECT_FACTOR (loop_vinfo)

46655

+ > STMT_VINFO_MIN_NEG_DIST (stmt_info)))

46656

+ {

46657

+ if (dump_enabled_p ())

46658

+ dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,

46659

+ "cannot perform implicit CSE when performing "

46660

+ "group loads with negative dependence distance\n");

46661

+ return false;

46662

+ }

46663

}

46664

46665

46666

@@ -6054,8 +6082,7 @@

46667

corresponding to that mode. The theory is that any use that

46668

would cause problems with this will disable vectorization anyway. */

46669

else if (!SCALAR_FLOAT_TYPE_P (scalar_type)

46670

- && !INTEGRAL_TYPE_P (scalar_type)

46671

- && !POINTER_TYPE_P (scalar_type))

46672

+ && !INTEGRAL_TYPE_P (scalar_type))

46673

scalar_type = lang_hooks.types.type_for_mode (inner_mode, 1);

46674

46675

/* We can't build a vector type of elements with alignment bigger than

46676

Index: gcc/tree-inline.c

46677

===================================================================

46678

--- a/src/gcc/tree-inline.c (.../tags/gcc_4_8_2_release)

46679

+++ b/src/gcc/tree-inline.c (.../branches/gcc-4_8-branch)

46680

@@ -2841,7 +2841,8 @@

46681

{

46682

var = return_slot;

46683

gcc_assert (TREE_CODE (var) != SSA_NAME);

46684

- TREE_ADDRESSABLE (var) |= TREE_ADDRESSABLE (result);

46685

+ if (TREE_ADDRESSABLE (result))

46686

+ mark_addressable (var);

46687

}

46688

if ((TREE_CODE (TREE_TYPE (result)) == COMPLEX_TYPE

46689

|| TREE_CODE (TREE_TYPE (result)) == VECTOR_TYPE)

46690

Index: gcc/tree-ssa-phiprop.c

46691

===================================================================

46692

--- a/src/gcc/tree-ssa-phiprop.c (.../tags/gcc_4_8_2_release)

46693

+++ b/src/gcc/tree-ssa-phiprop.c (.../branches/gcc-4_8-branch)

46694

@@ -307,6 +307,12 @@

46695

gimple def_stmt;

46696

tree vuse;

46697

46698

+ /* Only replace loads in blocks that post-dominate the PHI node. That

46699

+ makes sure we don't end up speculating loads. */

46700

+ if (!dominated_by_p (CDI_POST_DOMINATORS,

46701

+ bb, gimple_bb (use_stmt)))

46702

+ continue;

46703

+

46704

/* Check whether this is a load of *ptr. */

46705

if (!(is_gimple_assign (use_stmt)

46706

&& TREE_CODE (gimple_assign_lhs (use_stmt)) == SSA_NAME

46707

@@ -378,6 +384,7 @@

46708

size_t n;

46709

46710

calculate_dominance_info (CDI_DOMINATORS);

46711

+ calculate_dominance_info (CDI_POST_DOMINATORS);

46712

46713

n = num_ssa_names;

46714

phivn = XCNEWVEC (struct phiprop_d, n);

46715

@@ -395,6 +402,8 @@

46716

bbs.release ();

46717

free (phivn);

46718

46719

+ free_dominance_info (CDI_POST_DOMINATORS);

46720

+

46721

return 0;

46722

}

46723

46724

Index: gcc/tree-object-size.c

46725

===================================================================

46726

--- a/src/gcc/tree-object-size.c (.../tags/gcc_4_8_2_release)

46727

+++ b/src/gcc/tree-object-size.c (.../branches/gcc-4_8-branch)

46728

@@ -64,7 +64,7 @@

46729

the subobject (innermost array or field with address taken).

46730

object_sizes[2] is lower bound for number of bytes till the end of

46731

the object and object_sizes[3] lower bound for subobject. */

46732

-static unsigned HOST_WIDE_INT *object_sizes[4];

46733

+static vec<unsigned HOST_WIDE_INT> object_sizes[4];

46734

46735

/* Bitmaps what object sizes have been computed already. */

46736

static bitmap computed[4];

46737

@@ -493,7 +493,7 @@

46738

46739

if (TREE_CODE (ptr) == SSA_NAME

46740

&& POINTER_TYPE_P (TREE_TYPE (ptr))

46741

- && object_sizes[object_size_type] != NULL)

46742

+ && computed[object_size_type] != NULL)

46743

{

46744

if (!bitmap_bit_p (computed[object_size_type], SSA_NAME_VERSION (ptr)))

46745

{

46746

@@ -501,6 +501,8 @@

46747

bitmap_iterator bi;

46748

unsigned int i;

46749

46750

+ if (num_ssa_names > object_sizes[object_size_type].length ())

46751

+ object_sizes[object_size_type].safe_grow (num_ssa_names);

46752

if (dump_file)

46753

{

46754

fprintf (dump_file, "Computing %s %sobject size for ",

46755

@@ -1162,12 +1164,12 @@

46756

{

46757

int object_size_type;

46758

46759

- if (object_sizes[0])

46760

+ if (computed[0])

46761

return;

46762

46763

for (object_size_type = 0; object_size_type <= 3; object_size_type++)

46764

{

46765

- object_sizes[object_size_type] = XNEWVEC (unsigned HOST_WIDE_INT, num_ssa_names);

46766

+ object_sizes[object_size_type].safe_grow (num_ssa_names);

46767

computed[object_size_type] = BITMAP_ALLOC (NULL);

46768

}

46769

46770

@@ -1184,9 +1186,8 @@

46771

46772

for (object_size_type = 0; object_size_type <= 3; object_size_type++)

46773

{

46774

- free (object_sizes[object_size_type]);

46775

+ object_sizes[object_size_type].release ();

46776

BITMAP_FREE (computed[object_size_type]);

46777

- object_sizes[object_size_type] = NULL;

46778

}

46779

}

46780

46781

@@ -1202,18 +1203,11 @@

46782

gimple_stmt_iterator i;

46783

for (i = gsi_start_bb (bb); !gsi_end_p (i); gsi_next (&i))

46784

{

46785

- tree callee, result;

46786

+ tree result;

46787

gimple call = gsi_stmt (i);

46788

-

46789

- if (gimple_code (call) != GIMPLE_CALL)

46790

+ if (!gimple_call_builtin_p (call, BUILT_IN_OBJECT_SIZE))

46791

continue;

46792

46793

- callee = gimple_call_fndecl (call);

46794

- if (!callee

46795

- || DECL_BUILT_IN_CLASS (callee) != BUILT_IN_NORMAL

46796

- || DECL_FUNCTION_CODE (callee) != BUILT_IN_OBJECT_SIZE)

46797

- continue;

46798

-

46799

init_object_sizes ();

46800

result = fold_call_stmt (call, false);

46801

if (!result)

46802

@@ -1240,20 +1234,32 @@

46803

continue;

46804

}

46805

46806

+ gcc_assert (TREE_CODE (result) == INTEGER_CST);

46807

+

46808

if (dump_file && (dump_flags & TDF_DETAILS))

46809

{

46810

fprintf (dump_file, "Simplified\n ");

46811

print_gimple_stmt (dump_file, call, 0, dump_flags);

46812

+ fprintf (dump_file, " to ");

46813

+ print_generic_expr (dump_file, result, 0);

46814

+ fprintf (dump_file, "\n");

46815

}

46816

46817

- if (!update_call_from_tree (&i, result))

46818

- gcc_unreachable ();

46819

+ tree lhs = gimple_call_lhs (call);

46820

+ if (!lhs)

46821

+ continue;

46822

46823

- if (dump_file && (dump_flags & TDF_DETAILS))

46824

+ /* Propagate into all uses and fold those stmts. */

46825

+ gimple use_stmt;

46826

+ imm_use_iterator iter;

46827

+ FOR_EACH_IMM_USE_STMT (use_stmt, iter, lhs)

46828

{

46829

- fprintf (dump_file, "to\n ");

46830

- print_gimple_stmt (dump_file, gsi_stmt (i), 0, dump_flags);

46831

- fprintf (dump_file, "\n");

46832

+ use_operand_p use_p;

46833

+ FOR_EACH_IMM_USE_ON_STMT (use_p, iter)

46834

+ SET_USE (use_p, result);

46835

+ gimple_stmt_iterator gsi = gsi_for_stmt (use_stmt);

46836

+ fold_stmt (&gsi);

46837

+ update_stmt (gsi_stmt (gsi));

46838

}

46839

}

46840

}

46841

Index: gcc/combine.c

46842

===================================================================

46843

--- a/src/gcc/combine.c (.../tags/gcc_4_8_2_release)

46844

+++ b/src/gcc/combine.c (.../branches/gcc-4_8-branch)

46845

@@ -3884,15 +3884,19 @@

46846

46847

PATTERN (undobuf.other_insn) = other_pat;

46848

46849

- /* If any of the notes in OTHER_INSN were REG_UNUSED, ensure that they

46850

- are still valid. Then add any non-duplicate notes added by

46851

- recog_for_combine. */

46852

+ /* If any of the notes in OTHER_INSN were REG_DEAD or REG_UNUSED,

46853

+ ensure that they are still valid. Then add any non-duplicate

46854

+ notes added by recog_for_combine. */

46855

for (note = REG_NOTES (undobuf.other_insn); note; note = next)

46856

{

46857

next = XEXP (note, 1);

46858

46859

- if (REG_NOTE_KIND (note) == REG_UNUSED

46860

- && ! reg_set_p (XEXP (note, 0), PATTERN (undobuf.other_insn)))

46861

+ if ((REG_NOTE_KIND (note) == REG_DEAD

46862

+ && !reg_referenced_p (XEXP (note, 0),

46863

+ PATTERN (undobuf.other_insn)))

46864

+ ||(REG_NOTE_KIND (note) == REG_UNUSED

46865

+ && !reg_set_p (XEXP (note, 0),

46866

+ PATTERN (undobuf.other_insn))))

46867

remove_note (undobuf.other_insn, note);

46868

}

46869

46870

@@ -5798,8 +5802,15 @@

46871

return x;

46872

}

46873

46874

- /* If the code changed, return a whole new comparison. */

46875

- if (new_code != code)

46876

+ /* If the code changed, return a whole new comparison.

46877

+ We also need to avoid using SUBST in cases where

46878

+ simplify_comparison has widened a comparison with a CONST_INT,

46879

+ since in that case the wider CONST_INT may fail the sanity

46880

+ checks in do_SUBST. */

46881

+ if (new_code != code

46882

+ || (CONST_INT_P (op1)

46883

+ && GET_MODE (op0) != GET_MODE (XEXP (x, 0))

46884

+ && GET_MODE (op0) != GET_MODE (XEXP (x, 1))))

46885

return gen_rtx_fmt_ee (new_code, mode, op0, op1);

46886

46887

/* Otherwise, keep this operation, but maybe change its operands.

46888

@@ -7991,7 +8002,7 @@

46889

if (code == CALL || code == ASM_OPERANDS || code == CLOBBER)

46890

return x;

46891

46892

- /* We want to perform the operation is its present mode unless we know

46893

+ /* We want to perform the operation in its present mode unless we know

46894

that the operation is valid in MODE, in which case we do the operation

46895

in MODE. */

46896

op_mode = ((GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (x))

46897

@@ -8427,9 +8438,10 @@

46898

GET_MODE (x), GEN_INT (mask),

46899

XEXP (x, 1));

46900

if (temp && CONST_INT_P (temp))

46901

- SUBST (XEXP (x, 0),

46902

- force_to_mode (XEXP (x, 0), GET_MODE (x),

46903

- INTVAL (temp), next_select));

46904

+ x = simplify_gen_binary (code, GET_MODE (x),

46905

+ force_to_mode (XEXP (x, 0), GET_MODE (x),

46906

+ INTVAL (temp), next_select),

46907

+ XEXP (x, 1));

46908

}

46909

break;

46910

46911

@@ -8497,14 +8509,16 @@

46912

/* We have no way of knowing if the IF_THEN_ELSE can itself be

46913

written in a narrower mode. We play it safe and do not do so. */

46914

46915

- SUBST (XEXP (x, 1),

46916

- gen_lowpart_or_truncate (GET_MODE (x),

46917

- force_to_mode (XEXP (x, 1), mode,

46918

- mask, next_select)));

46919

- SUBST (XEXP (x, 2),

46920

- gen_lowpart_or_truncate (GET_MODE (x),

46921

- force_to_mode (XEXP (x, 2), mode,

46922

- mask, next_select)));

46923

+ op0 = gen_lowpart_or_truncate (GET_MODE (x),

46924

+ force_to_mode (XEXP (x, 1), mode,

46925

+ mask, next_select));

46926

+ op1 = gen_lowpart_or_truncate (GET_MODE (x),

46927

+ force_to_mode (XEXP (x, 2), mode,

46928

+ mask, next_select));

46929

+ if (op0 != XEXP (x, 1) || op1 != XEXP (x, 2))

46930

+ x = simplify_gen_ternary (IF_THEN_ELSE, GET_MODE (x),

46931

+ GET_MODE (XEXP (x, 0)), XEXP (x, 0),

46932

+ op0, op1);

46933

break;

46934

46935

default:

46936

Index: gcc/bb-reorder.c

46937

===================================================================

46938

--- a/src/gcc/bb-reorder.c (.../tags/gcc_4_8_2_release)

46939

+++ b/src/gcc/bb-reorder.c (.../branches/gcc-4_8-branch)

46940

@@ -1685,9 +1685,8 @@

46941

edge e;

46942

edge_iterator ei;

46943

46944

- /* Find EDGE_CAN_FALLTHRU edge. */

46945

FOR_EACH_EDGE (e, ei, cur_bb->succs)

46946

- if (e->flags & EDGE_CAN_FALLTHRU)

46947

+ if (e->flags & EDGE_FALLTHRU)

46948

{

46949

fall_thru = e;

46950

break;

46951

Index: gcc/tree-vect-generic.c

46952

===================================================================

46953

--- a/src/gcc/tree-vect-generic.c (.../tags/gcc_4_8_2_release)

46954

+++ b/src/gcc/tree-vect-generic.c (.../branches/gcc-4_8-branch)

46955

@@ -1006,7 +1006,8 @@

46956

46957

if (!optimize

46958

|| !VECTOR_INTEGER_TYPE_P (type)

46959

- || TREE_CODE (rhs2) != VECTOR_CST)

46960

+ || TREE_CODE (rhs2) != VECTOR_CST

46961

+ || !VECTOR_MODE_P (TYPE_MODE (type)))

46962

break;

46963

46964

ret = expand_vector_divmod (gsi, type, rhs1, rhs2, code);

46965

Index: gcc/tree-flow.h

46966

===================================================================

46967

--- a/src/gcc/tree-flow.h (.../tags/gcc_4_8_2_release)

46968

+++ b/src/gcc/tree-flow.h (.../branches/gcc-4_8-branch)

46969

@@ -425,6 +425,7 @@

46970

basic_block, tree);

46971

void remove_edge_and_dominated_blocks (edge);

46972

bool tree_node_can_be_shared (tree);

46973

+extern unsigned int split_critical_edges (void);

46974

46975

/* In tree-cfgcleanup.c */

46976

extern bitmap cfgcleanup_altered_bbs;

46977

Index: gcc/config.gcc

46978

===================================================================

46979

--- a/src/gcc/config.gcc (.../tags/gcc_4_8_2_release)

46980

+++ b/src/gcc/config.gcc (.../branches/gcc-4_8-branch)

46981

@@ -420,7 +420,7 @@

46982

;;

46983

powerpc*-*-*)

46984

cpu_type=rs6000

46985

- extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h"

46986

+ extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h htmintrin.h htmxlintrin.h"

46987

need_64bit_hwint=yes

46988

case x$with_cpu in

46989

xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[345678]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)

46990

@@ -1761,6 +1761,14 @@

46991

tmake_file="${tmake_file} microblaze/t-microblaze-linux"

46992

;;

46993

microblaze*-*-rtems*)

46994

+ case $target in

46995

+ microblazeel-*)

46996

+ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=0"

46997

+ ;;

46998

+ microblaze-*)

46999

+ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=4321"

47000

+ ;;

47001

+ esac

47002

tm_file="${tm_file} dbxelf.h"

47003

tm_file="${tm_file} microblaze/rtems.h rtems.h newlib-stdint.h"

47004

c_target_objs="${c_target_objs} microblaze-c.o"

47005

@@ -2073,7 +2081,7 @@

47006

tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"

47007

case ${target} in

47008

powerpc*le-*-*)

47009

- tm_file="${tm_file} rs6000/sysv4le.h" ;;

47010

+ tm_file="${tm_file} rs6000/sysv4le.h" ;;

47011

esac

47012

maybe_biarch=yes

47013

case ${target} in

47014

@@ -2096,6 +2104,19 @@

47015

fi

47016

tm_file="rs6000/biarch64.h ${tm_file} rs6000/linux64.h glibc-stdint.h"

47017

tmake_file="$tmake_file rs6000/t-linux64"

47018

+ case ${target} in

47019

+ powerpc*le-*-*)

47020

+ tmake_file="$tmake_file rs6000/t-linux64le"

47021

+ case ${enable_targets} in

47022

+ all | *powerpc64-* | *powerpc-*)

47023

+ tmake_file="$tmake_file rs6000/t-linux64lebe" ;;

47024

+ esac ;;

47025

+ *)

47026

+ case ${enable_targets} in

47027

+ all | *powerpc64le-* | *powerpcle-*)

47028

+ tmake_file="$tmake_file rs6000/t-linux64bele" ;;

47029

+ esac ;;

47030

+ esac

47031

extra_options="${extra_options} rs6000/linux64.opt"

47032

;;

47033

*)

47034

@@ -2963,11 +2984,18 @@

47035

with_cpu=8540

47036

fi

47037

;;

47038

- sparc-leon*-*)

47039

- with_cpu=v8;

47040

- ;;

47041

sparc*-*-*)

47042

- with_cpu="`echo ${target} | sed 's/-.*$//'`"

47043

+ case ${target} in

47044

+ *-leon-*)

47045

+ with_cpu=leon

47046

+ ;;

47047

+ *-leon[3-9]*)

47048

+ with_cpu=leon3

47049

+ ;;

47050

+ *)

47051

+ with_cpu="`echo ${target} | sed 's/-.*$//'`"

47052

+ ;;

47053

+ esac

47054

;;

47055

esac

47056

47057

@@ -3122,6 +3150,11 @@

47058

${srcdir}/config/aarch64/$def | \

47059

sed -e 's/^[^,]*,[ ]*//' | \

47060

sed -e 's/,.*$//'`

47061

+ # Extract the architecture flags from aarch64-arches.def

47062

+ ext_mask=`grep "^$pattern(\"$base_val\"," \

47063

+ ${srcdir}/config/aarch64/$def | \

47064

+ sed -e 's/)$//' | \

47065

+ sed -e 's/^.*,//'`

47066

else

47067

base_id=`grep "^$pattern(\"$base_val\"," \

47068

${srcdir}/config/aarch64/$def | \

47069

@@ -3494,7 +3527,7 @@

47070

;;

47071

47072

powerpc*-*-* | rs6000-*-*)

47073

- supported_defaults="cpu cpu_32 cpu_64 float tune tune_32 tune_64"

47074

+ supported_defaults="abi cpu cpu_32 cpu_64 float tune tune_32 tune_64"

47075

47076

for which in cpu cpu_32 cpu_64 tune tune_32 tune_64; do

47077

eval "val=\$with_$which"

47078

@@ -3531,6 +3564,16 @@

47079

;;

47080

esac

47081

done

47082

+

47083

+ case "$with_abi" in

47084

+ "" | elfv1 | elfv2 )

47085

+ #OK

47086

+ ;;

47087

+ *)

47088

+ echo "Unknown ABI used in --with-abi=$with_abi"

47089

+ exit 1

47090

+ ;;

47091

+ esac

47092

;;

47093

47094

s390*-*-*)

47095

@@ -3587,7 +3630,7 @@

47096

case ${val} in

47097

"" | sparc | sparcv9 | sparc64 \

47098

| v7 | cypress \

47099

- | v8 | supersparc | hypersparc | leon \

47100

47101

| sparclite | f930 | f934 | sparclite86x \

47102

| sparclet | tsc701 \

47103

47104

@@ -3661,10 +3704,8 @@

47105

target_cpu_default2=

47106

case ${target} in

47107

aarch64*-*-*)

47108

- if test x$target_cpu_cname = x

47109

+ if test x"$target_cpu_cname" != x

47110

then

47111

- target_cpu_default2=TARGET_CPU_generic

47112

- else

47113

target_cpu_default2=$target_cpu_cname

47114

fi

47115

;;

47116

@@ -3745,15 +3786,6 @@

47117

cxx_target_objs="${cxx_target_objs} sh-c.o"

47118

;;

47119

47120

- sparc-leon*-*)

47121

- if test x$with_tune = x ; then

47122

- with_tune=leon;

47123

- fi

47124

-

47125

- # The SPARC port checks this value at compile-time.

47126

- target_cpu_default2="TARGET_CPU_$with_cpu"

47127

- ;;

47128

-

47129

sparc*-*-*)

47130

# Some standard aliases.

47131

case x$with_cpu in

47132

@@ -3765,6 +3797,17 @@

47133

;;

47134

esac

47135

47136

+ if test x$with_tune = x ; then

47137

+ case ${target} in

47138

+ *-leon-*)

47139

+ with_tune=leon

47140

+ ;;

47141

+ *-leon[3-9]*)

47142

+ with_tune=leon3

47143

+ ;;

47144

+ esac

47145

+ fi

47146

+

47147

# The SPARC port checks this value at compile-time.

47148

target_cpu_default2="TARGET_CPU_$with_cpu"

47149

;;

47150

Index: gcc/reginfo.c

47151

===================================================================

47152

--- a/src/gcc/reginfo.c (.../tags/gcc_4_8_2_release)

47153

+++ b/src/gcc/reginfo.c (.../branches/gcc-4_8-branch)

47154

@@ -85,7 +85,7 @@

47155

char global_regs[FIRST_PSEUDO_REGISTER];

47156

47157

/* Declaration for the global register. */

47158

-static tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];

47159

+tree global_regs_decl[FIRST_PSEUDO_REGISTER];

47160

47161

/* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used

47162

in dataflow more conveniently. */

47163

@@ -620,40 +620,35 @@

47164

mode = GET_MODE_WIDER_MODE (mode))

47165

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

47166

&& HARD_REGNO_MODE_OK (regno, mode)

47167

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

47168

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

47169

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

47170

found_mode = mode;

47171

47172

- if (found_mode != VOIDmode)

47173

- return found_mode;

47174

-

47175

for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);

47176

mode != VOIDmode;

47177

mode = GET_MODE_WIDER_MODE (mode))

47178

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

47179

&& HARD_REGNO_MODE_OK (regno, mode)

47180

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

47181

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

47182

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

47183

found_mode = mode;

47184

47185

- if (found_mode != VOIDmode)

47186

- return found_mode;

47187

-

47188

for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);

47189

mode != VOIDmode;

47190

mode = GET_MODE_WIDER_MODE (mode))

47191

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

47192

&& HARD_REGNO_MODE_OK (regno, mode)

47193

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

47194

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

47195

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

47196

found_mode = mode;

47197

47198

- if (found_mode != VOIDmode)

47199

- return found_mode;

47200

-

47201

for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);

47202

mode != VOIDmode;

47203

mode = GET_MODE_WIDER_MODE (mode))

47204

if ((unsigned) hard_regno_nregs[regno][mode] == nregs

47205

&& HARD_REGNO_MODE_OK (regno, mode)

47206

- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))

47207

+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))

47208

+ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))

47209

found_mode = mode;

47210

47211

if (found_mode != VOIDmode)

47212

Index: gcc/Makefile.in

47213

===================================================================

47214

--- a/src/gcc/Makefile.in (.../tags/gcc_4_8_2_release)

47215

+++ b/src/gcc/Makefile.in (.../branches/gcc-4_8-branch)

47216

@@ -747,7 +747,8 @@

47217

47218

# Native linker and preprocessor flags. For x-fragment overrides.

47219

BUILD_LDFLAGS=@BUILD_LDFLAGS@

47220

-BUILD_CPPFLAGS=$(ALL_CPPFLAGS)

47221

+BUILD_CPPFLAGS= -I. -I$(@D) -I$(srcdir) -I$(srcdir)/$(@D) \

47222

+ -I$(srcdir)/../include @INCINTL@ $(CPPINC) $(CPPFLAGS)

47223

47224

# Actual name to use when installing a native compiler.

47225

GCC_INSTALL_NAME := $(shell echo gcc|sed '$(program_transform_name)')

47226

@@ -1827,7 +1828,7 @@

47227

"$(MULTILIB_EXCLUSIONS)" \

47228

"$(MULTILIB_OSDIRNAMES)" \

47229

"$(MULTILIB_REQUIRED)" \

47230

- "$(MULTIARCH_DIRNAME)" \

47231

+ "$(if $(MULTILIB_OSDIRNAMES),,$(MULTIARCH_DIRNAME))" \

47232

"$(MULTILIB_REUSE)" \

47233

"@enable_multilib@" \

47234

> tmp-mlib.h; \

47235

@@ -2256,7 +2257,7 @@

47236

$(FUNCTION_H) $(TM_H) coretypes.h \

47237

$(TREE_PASS_H) $(BASIC_BLOCK_H) $(BITMAP_H) \

47238

$(FLAGS_H) $(HASHTAB_H) pointer-set.h \

47239

- $(GIMPLE_H) $(TREE_INLINE_H) $(GIMPLE_PRETTY_PRINT_H)

47240

+ $(GIMPLE_H) $(TREE_INLINE_H) $(GIMPLE_PRETTY_PRINT_H) $(PARAMS_H)

47241

tree-ssa.o : tree-ssa.c $(TREE_FLOW_H) $(CONFIG_H) $(SYSTEM_H) \

47242

$(TREE_H) $(TM_P_H) $(EXPR_H) $(DIAGNOSTIC_H) \

47243

toplev.h $(FUNCTION_H) $(TM_H) coretypes.h \

47244

@@ -3037,7 +3038,7 @@

47245

$(TM_H) coretypes.h $(GIMPLE_H) \

47246

$(TREE_PASS_H) $(FLAGS_H) $(EXPR_H) $(BASIC_BLOCK_H) \

47247

$(GGC_H) $(OBSTACK_H) $(PARAMS_H) $(CPPLIB_H) $(PARAMS_H) \

47248

- $(GIMPLE_PRETTY_PRINT_H) langhooks.h

47249

+ $(GIMPLE_PRETTY_PRINT_H) langhooks.h $(OPTABS_H)

47250

tree-complex.o : tree-complex.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TREE_H) \

47251

$(TM_H) $(FLAGS_H) $(TREE_FLOW_H) $(GIMPLE_H) \

47252

tree-iterator.h $(TREE_PASS_H) tree-ssa-propagate.h

47253

@@ -3276,12 +3277,12 @@

47254

$(TM_H) $(RTL_H) $(REGS_H) insn-config.h insn-codes.h $(DF_H) \

47255

$(RECOG_H) output.h addresses.h $(REGS_H) hard-reg-set.h $(FLAGS_H) \

47256

$(FUNCTION_H) $(EXPR_H) $(BASIC_BLOCK_H) $(TM_P_H) $(EXCEPT_H) \

47257

- ira.h rtl-error.h $(LRA_INT_H)

47258

+ ira.h rtl-error.h $(LRA_INT_H) $(OPTABS_H)

47259

lra-eliminations.o : lra-eliminations.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \

47260

$(TM_H) $(RTL_H) $(REGS_H) insn-config.h $(DF_H) \

47261

$(RECOG_H) output.h $(REGS_H) hard-reg-set.h $(FLAGS_H) $(FUNCTION_H) \

47262

$(EXPR_H) $(BASIC_BLOCK_H) $(TM_P_H) $(EXCEPT_H) ira.h \

47263

- rtl-error.h $(LRA_INT_H)

47264

+ rtl-error.h $(LRA_INT_H) $(OPTABS_H)

47265

lra-lives.o : lra-lives.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \

47266

$(RTL_H) $(REGS_H) insn-config.h $(DF_H) \

47267

$(RECOG_H) output.h $(REGS_H) hard-reg-set.h $(FLAGS_H) $(FUNCTION_H) \

47268

Index: gcc/gimple.c

47269

===================================================================

47270

--- a/src/gcc/gimple.c (.../tags/gcc_4_8_2_release)

47271

+++ b/src/gcc/gimple.c (.../branches/gcc-4_8-branch)

47272

@@ -3841,42 +3841,46 @@

47273

47274

/* For the statement STMT call the callbacks VISIT_LOAD, VISIT_STORE and

47275

VISIT_ADDR if non-NULL on loads, store and address-taken operands

47276

- passing the STMT, the base of the operand and DATA to it. The base

47277

- will be either a decl, an indirect reference (including TARGET_MEM_REF)

47278

- or the argument of an address expression.

47279

+ passing the STMT, the base of the operand, the operand itself containing

47280

+ the base and DATA to it. The base will be either a decl, an indirect

47281

+ reference (including TARGET_MEM_REF) or the argument of an address

47282

+ expression.

47283

Returns the results of these callbacks or'ed. */

47284

47285

bool

47286

walk_stmt_load_store_addr_ops (gimple stmt, void *data,

47287

- bool (*visit_load)(gimple, tree, void *),

47288

- bool (*visit_store)(gimple, tree, void *),

47289

- bool (*visit_addr)(gimple, tree, void *))

47290

+ walk_stmt_load_store_addr_fn visit_load,

47291

+ walk_stmt_load_store_addr_fn visit_store,

47292

+ walk_stmt_load_store_addr_fn visit_addr)

47293

{

47294

bool ret = false;

47295

unsigned i;

47296

if (gimple_assign_single_p (stmt))

47297

{

47298

- tree lhs, rhs;

47299

+ tree lhs, rhs, arg;

47300

if (visit_store)

47301

{

47302

- lhs = get_base_loadstore (gimple_assign_lhs (stmt));

47303

+ arg = gimple_assign_lhs (stmt);

47304

+ lhs = get_base_loadstore (arg);

47305

if (lhs)

47306

- ret |= visit_store (stmt, lhs, data);

47307

+ ret |= visit_store (stmt, lhs, arg, data);

47308

}

47309

- rhs = gimple_assign_rhs1 (stmt);

47310

+ arg = gimple_assign_rhs1 (stmt);

47311

+ rhs = arg;

47312

while (handled_component_p (rhs))

47313

rhs = TREE_OPERAND (rhs, 0);

47314

if (visit_addr)

47315

{

47316

if (TREE_CODE (rhs) == ADDR_EXPR)

47317

- ret |= visit_addr (stmt, TREE_OPERAND (rhs, 0), data);

47318

+ ret |= visit_addr (stmt, TREE_OPERAND (rhs, 0), arg, data);

47319

else if (TREE_CODE (rhs) == TARGET_MEM_REF

47320

&& TREE_CODE (TMR_BASE (rhs)) == ADDR_EXPR)

47321

- ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (rhs), 0), data);

47322

+ ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (rhs), 0), arg,

47323

+ data);

47324

else if (TREE_CODE (rhs) == OBJ_TYPE_REF

47325

&& TREE_CODE (OBJ_TYPE_REF_OBJECT (rhs)) == ADDR_EXPR)

47326

ret |= visit_addr (stmt, TREE_OPERAND (OBJ_TYPE_REF_OBJECT (rhs),

47327

- 0), data);

47328

+ 0), arg, data);

47329

else if (TREE_CODE (rhs) == CONSTRUCTOR)

47330

{

47331

unsigned int ix;

47332

@@ -3884,23 +3888,23 @@

47333

47334

FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (rhs), ix, val)

47335

if (TREE_CODE (val) == ADDR_EXPR)

47336

- ret |= visit_addr (stmt, TREE_OPERAND (val, 0), data);

47337

+ ret |= visit_addr (stmt, TREE_OPERAND (val, 0), arg, data);

47338

else if (TREE_CODE (val) == OBJ_TYPE_REF

47339

&& TREE_CODE (OBJ_TYPE_REF_OBJECT (val)) == ADDR_EXPR)

47340

ret |= visit_addr (stmt,

47341

TREE_OPERAND (OBJ_TYPE_REF_OBJECT (val),

47342

- 0), data);

47343

+ 0), arg, data);

47344

}

47345

lhs = gimple_assign_lhs (stmt);

47346

if (TREE_CODE (lhs) == TARGET_MEM_REF

47347

&& TREE_CODE (TMR_BASE (lhs)) == ADDR_EXPR)

47348

- ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (lhs), 0), data);

47349

+ ret |= visit_addr (stmt, TREE_OPERAND (TMR_BASE (lhs), 0), lhs, data);

47350

}

47351

if (visit_load)

47352

{

47353

rhs = get_base_loadstore (rhs);

47354

if (rhs)

47355

- ret |= visit_load (stmt, rhs, data);

47356

+ ret |= visit_load (stmt, rhs, arg, data);

47357

}

47358

}

47359

else if (visit_addr

47360

@@ -3913,7 +3917,7 @@

47361

if (op == NULL_TREE)

47362

;

47363

else if (TREE_CODE (op) == ADDR_EXPR)

47364

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

47365

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

47366

/* COND_EXPR and VCOND_EXPR rhs1 argument is a comparison

47367

tree with two operands. */

47368

else if (i == 1 && COMPARISON_CLASS_P (op))

47369

@@ -3920,10 +3924,10 @@

47370

{

47371

if (TREE_CODE (TREE_OPERAND (op, 0)) == ADDR_EXPR)

47372

ret |= visit_addr (stmt, TREE_OPERAND (TREE_OPERAND (op, 0),

47373

- 0), data);

47374

+ 0), op, data);

47375

if (TREE_CODE (TREE_OPERAND (op, 1)) == ADDR_EXPR)

47376

ret |= visit_addr (stmt, TREE_OPERAND (TREE_OPERAND (op, 1),

47377

- 0), data);

47378

+ 0), op, data);

47379

}

47380

}

47381

}

47382

@@ -3931,26 +3935,26 @@

47383

{

47384

if (visit_store)

47385

{

47386

- tree lhs = gimple_call_lhs (stmt);

47387

- if (lhs)

47388

+ tree arg = gimple_call_lhs (stmt);

47389

+ if (arg)

47390

{

47391

- lhs = get_base_loadstore (lhs);

47392

+ tree lhs = get_base_loadstore (arg);

47393

if (lhs)

47394

- ret |= visit_store (stmt, lhs, data);

47395

+ ret |= visit_store (stmt, lhs, arg, data);

47396

}

47397

}

47398

if (visit_load || visit_addr)

47399

for (i = 0; i < gimple_call_num_args (stmt); ++i)

47400

{

47401

- tree rhs = gimple_call_arg (stmt, i);

47402

+ tree arg = gimple_call_arg (stmt, i);

47403

if (visit_addr

47404

- && TREE_CODE (rhs) == ADDR_EXPR)

47405

- ret |= visit_addr (stmt, TREE_OPERAND (rhs, 0), data);

47406

+ && TREE_CODE (arg) == ADDR_EXPR)

47407

+ ret |= visit_addr (stmt, TREE_OPERAND (arg, 0), arg, data);

47408

else if (visit_load)

47409

{

47410

- rhs = get_base_loadstore (rhs);

47411

+ tree rhs = get_base_loadstore (arg);

47412

if (rhs)

47413

- ret |= visit_load (stmt, rhs, data);

47414

+ ret |= visit_load (stmt, rhs, arg, data);

47415

}

47416

}

47417

if (visit_addr

47418

@@ -3957,12 +3961,13 @@

47419

&& gimple_call_chain (stmt)

47420

&& TREE_CODE (gimple_call_chain (stmt)) == ADDR_EXPR)

47421

ret |= visit_addr (stmt, TREE_OPERAND (gimple_call_chain (stmt), 0),

47422

- data);

47423

+ gimple_call_chain (stmt), data);

47424

if (visit_addr

47425

&& gimple_call_return_slot_opt_p (stmt)

47426

&& gimple_call_lhs (stmt) != NULL_TREE

47427

&& TREE_ADDRESSABLE (TREE_TYPE (gimple_call_lhs (stmt))))

47428

- ret |= visit_addr (stmt, gimple_call_lhs (stmt), data);

47429

+ ret |= visit_addr (stmt, gimple_call_lhs (stmt),

47430

+ gimple_call_lhs (stmt), data);

47431

}

47432

else if (gimple_code (stmt) == GIMPLE_ASM)

47433

{

47434

@@ -3978,7 +3983,7 @@

47435

tree link = gimple_asm_output_op (stmt, i);

47436

tree op = get_base_loadstore (TREE_VALUE (link));

47437

if (op && visit_store)

47438

- ret |= visit_store (stmt, op, data);

47439

+ ret |= visit_store (stmt, op, TREE_VALUE (link), data);

47440

if (visit_addr)

47441

{

47442

constraint = TREE_STRING_POINTER

47443

@@ -3987,7 +3992,7 @@

47444

parse_output_constraint (&constraint, i, 0, 0, &allows_mem,

47445

&allows_reg, &is_inout);

47446

if (op && !allows_reg && allows_mem)

47447

- ret |= visit_addr (stmt, op, data);

47448

+ ret |= visit_addr (stmt, op, TREE_VALUE (link), data);

47449

}

47450

}

47451

if (visit_load || visit_addr)

47452

@@ -3997,7 +4002,7 @@

47453

tree op = TREE_VALUE (link);

47454

if (visit_addr

47455

&& TREE_CODE (op) == ADDR_EXPR)

47456

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

47457

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

47458

else if (visit_load || visit_addr)

47459

{

47460

op = get_base_loadstore (op);

47461

@@ -4004,7 +4009,7 @@

47462

if (op)

47463

{

47464

if (visit_load)

47465

- ret |= visit_load (stmt, op, data);

47466

+ ret |= visit_load (stmt, op, TREE_VALUE (link), data);

47467

if (visit_addr)

47468

{

47469

constraint = TREE_STRING_POINTER

47470

@@ -4013,7 +4018,8 @@

47471

0, oconstraints,

47472

&allows_mem, &allows_reg);

47473

if (!allows_reg && allows_mem)

47474

- ret |= visit_addr (stmt, op, data);

47475

+ ret |= visit_addr (stmt, op, TREE_VALUE (link),

47476

+ data);

47477

}

47478

}

47479

}

47480

@@ -4026,12 +4032,12 @@

47481

{

47482

if (visit_addr

47483

&& TREE_CODE (op) == ADDR_EXPR)

47484

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

47485

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

47486

else if (visit_load)

47487

{

47488

- op = get_base_loadstore (op);

47489

- if (op)

47490

- ret |= visit_load (stmt, op, data);

47491

+ tree base = get_base_loadstore (op);

47492

+ if (base)

47493

+ ret |= visit_load (stmt, base, op, data);

47494

}

47495

}

47496

}

47497

@@ -4042,7 +4048,7 @@

47498

{

47499

tree op = PHI_ARG_DEF (stmt, i);

47500

if (TREE_CODE (op) == ADDR_EXPR)

47501

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

47502

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

47503

}

47504

}

47505

else if (visit_addr

47506

@@ -4050,7 +4056,7 @@

47507

{

47508

tree op = gimple_goto_dest (stmt);

47509

if (TREE_CODE (op) == ADDR_EXPR)

47510

- ret |= visit_addr (stmt, TREE_OPERAND (op, 0), data);

47511

+ ret |= visit_addr (stmt, TREE_OPERAND (op, 0), op, data);

47512

}

47513

47514

return ret;

47515

@@ -4061,8 +4067,8 @@

47516

47517

bool

47518

walk_stmt_load_store_ops (gimple stmt, void *data,

47519

- bool (*visit_load)(gimple, tree, void *),

47520

- bool (*visit_store)(gimple, tree, void *))

47521

+ walk_stmt_load_store_addr_fn visit_load,

47522

+ walk_stmt_load_store_addr_fn visit_store)

47523

{

47524

return walk_stmt_load_store_addr_ops (stmt, data,

47525

visit_load, visit_store, NULL);

47526

@@ -4071,8 +4077,7 @@

47527

/* Helper for gimple_ior_addresses_taken_1. */

47528

47529

static bool

47530

-gimple_ior_addresses_taken_1 (gimple stmt ATTRIBUTE_UNUSED,

47531

- tree addr, void *data)

47532

+gimple_ior_addresses_taken_1 (gimple, tree addr, tree, void *data)

47533

{

47534

bitmap addresses_taken = (bitmap)data;

47535

addr = get_base_address (addr);

47536

Index: gcc/tree-ssa-structalias.c

47537

===================================================================

47538

--- a/src/gcc/tree-ssa-structalias.c (.../tags/gcc_4_8_2_release)

47539

+++ b/src/gcc/tree-ssa-structalias.c (.../branches/gcc-4_8-branch)

47540

@@ -949,24 +949,27 @@

47541

bitmap_set_bit (result, i);

47542

else

47543

{

47544

- unsigned HOST_WIDE_INT fieldoffset = vi->offset + offset;

47545

+ HOST_WIDE_INT fieldoffset = vi->offset + offset;

47546

+ unsigned HOST_WIDE_INT size = vi->size;

47547

47548

/* If the offset makes the pointer point to before the

47549

variable use offset zero for the field lookup. */

47550

- if (offset < 0

47551

- && fieldoffset > vi->offset)

47552

- fieldoffset = 0;

47553

-

47554

- if (offset != 0)

47555

+ if (fieldoffset < 0)

47556

+ vi = lookup_vi_for_tree (vi->decl);

47557

+ else

47558

vi = first_or_preceding_vi_for_offset (vi, fieldoffset);

47559

47560

- bitmap_set_bit (result, vi->id);

47561

- /* If the result is not exactly at fieldoffset include the next

47562

- field as well. See get_constraint_for_ptr_offset for more

47563

- rationale. */

47564

- if (vi->offset != fieldoffset

47565

- && vi->next != NULL)

47566

- bitmap_set_bit (result, vi->next->id);

47567

+ do

47568

+ {

47569

+ bitmap_set_bit (result, vi->id);

47570

+ if (!vi->next)

47571

+ break;

47572

+

47573

+ /* We have to include all fields that overlap the current field

47574

+ shifted by offset. */

47575

+ vi = vi->next;

47576

+ }

47577

+ while (vi->offset < fieldoffset + size);

47578

}

47579

}

47580

47581

@@ -1607,16 +1610,21 @@

47582

{

47583

varinfo_t v = get_varinfo (j);

47584

HOST_WIDE_INT fieldoffset = v->offset + roffset;

47585

+ unsigned HOST_WIDE_INT size = v->size;

47586

unsigned int t;

47587

47588

if (v->is_full_var)

47589

- fieldoffset = v->offset;

47590

+ ;

47591

else if (roffset != 0)

47592

- v = first_vi_for_offset (v, fieldoffset);

47593

- /* If the access is outside of the variable we can ignore it. */

47594

- if (!v)

47595

- continue;

47596

+ {

47597

+ if (fieldoffset < 0)

47598

+ v = lookup_vi_for_tree (v->decl);

47599

+ else

47600

+ v = first_or_preceding_vi_for_offset (v, fieldoffset);

47601

+ }

47602

47603

+ /* We have to include all fields that overlap the current field

47604

+ shifted by roffset. */

47605

do

47606

{

47607

t = find (v->id);

47608

@@ -1633,16 +1641,13 @@

47609

&& add_graph_edge (graph, lhs, t))

47610

flag |= bitmap_ior_into (sol, get_varinfo (t)->solution);

47611

47612

- /* If the variable is not exactly at the requested offset

47613

- we have to include the next one. */

47614

- if (v->offset == (unsigned HOST_WIDE_INT)fieldoffset

47615

+ if (v->is_full_var

47616

|| v->next == NULL)

47617

break;

47618

47619

v = v->next;

47620

- fieldoffset = v->offset;

47621

}

47622

- while (1);

47623

+ while (v->offset < fieldoffset + size);

47624

}

47625

47626

done:

47627

@@ -1705,15 +1710,20 @@

47628

varinfo_t v = get_varinfo (j);

47629

unsigned int t;

47630

HOST_WIDE_INT fieldoffset = v->offset + loff;

47631

+ unsigned HOST_WIDE_INT size = v->size;

47632

47633

if (v->is_full_var)

47634

- fieldoffset = v->offset;

47635

+ ;

47636

else if (loff != 0)

47637

- v = first_vi_for_offset (v, fieldoffset);

47638

- /* If the access is outside of the variable we can ignore it. */

47639

- if (!v)

47640

- continue;

47641

+ {

47642

+ if (fieldoffset < 0)

47643

+ v = lookup_vi_for_tree (v->decl);

47644

+ else

47645

+ v = first_or_preceding_vi_for_offset (v, fieldoffset);

47646

+ }

47647

47648

+ /* We have to include all fields that overlap the current field

47649

+ shifted by loff. */

47650

do

47651

{

47652

if (v->may_have_pointers)

47653

@@ -1739,16 +1749,13 @@

47654

bitmap_set_bit (changed, t);

47655

}

47656

47657

- /* If the variable is not exactly at the requested offset

47658

- we have to include the next one. */

47659

- if (v->offset == (unsigned HOST_WIDE_INT)fieldoffset

47660

+ if (v->is_full_var

47661

|| v->next == NULL)

47662

break;

47663

47664

v = v->next;

47665

- fieldoffset = v->offset;

47666

}

47667

- while (1);

47668

+ while (v->offset < fieldoffset + size);

47669

}

47670

}

47671

47672

@@ -2997,35 +3004,30 @@

47673

varinfo_t temp;

47674

unsigned HOST_WIDE_INT offset = curr->offset + rhsoffset;

47675

47676

- /* Search the sub-field which overlaps with the

47677

- pointed-to offset. If the result is outside of the variable

47678

- we have to provide a conservative result, as the variable is

47679

- still reachable from the resulting pointer (even though it

47680

- technically cannot point to anything). The last and first

47681

- sub-fields are such conservative results.

47682

- ??? If we always had a sub-field for &object + 1 then

47683

- we could represent this in a more precise way. */

47684

+ /* If curr->offset + rhsoffset is less than zero adjust it. */

47685

if (rhsoffset < 0

47686

&& curr->offset < offset)

47687

offset = 0;

47688

+

47689

+ /* We have to include all fields that overlap the current

47690

+ field shifted by rhsoffset. And we include at least

47691

+ the last or the first field of the variable to represent

47692

+ reachability of off-bound addresses, in particular &object + 1,

47693

+ conservatively correct. */

47694

temp = first_or_preceding_vi_for_offset (curr, offset);

47695

-

47696

- /* If the found variable is not exactly at the pointed to

47697

- result, we have to include the next variable in the

47698

- solution as well. Otherwise two increments by offset / 2

47699

- do not result in the same or a conservative superset

47700

- solution. */

47701

- if (temp->offset != offset

47702

- && temp->next != NULL)

47703

+ c.var = temp->id;

47704

+ c.offset = 0;

47705

+ temp = temp->next;

47706

+ while (temp

47707

+ && temp->offset < offset + curr->size)

47708

{

47709

struct constraint_expr c2;

47710

- c2.var = temp->next->id;

47711

+ c2.var = temp->id;

47712

c2.type = ADDRESSOF;

47713

c2.offset = 0;

47714

results->safe_push (c2);

47715

+ temp = temp->next;

47716

}

47717

- c.var = temp->id;

47718

- c.offset = 0;

47719

}

47720

else

47721

c.offset = rhsoffset;

47722

Index: gcc/gimple.h

47723

===================================================================

47724

--- a/src/gcc/gimple.h (.../tags/gcc_4_8_2_release)

47725

+++ b/src/gcc/gimple.h (.../branches/gcc-4_8-branch)

47726

@@ -176,6 +176,9 @@

47727

/* Nonzero if this statement contains volatile operands. */

47728

unsigned has_volatile_ops : 1;

47729

47730

+ /* Padding to get subcode to 16 bit alignment. */

47731

+ unsigned pad : 1;

47732

+

47733

/* The SUBCODE field can be used for tuple-specific flags for tuples

47734

that do not require subcodes. Note that SUBCODE should be at

47735

least as wide as tree codes, as several tuples store tree codes

47736

@@ -888,13 +891,14 @@

47737

extern alias_set_type gimple_get_alias_set (tree);

47738

extern void count_uses_and_derefs (tree, gimple, unsigned *, unsigned *,

47739

unsigned *);

47740

+typedef bool (*walk_stmt_load_store_addr_fn) (gimple, tree, tree, void *);

47741

extern bool walk_stmt_load_store_addr_ops (gimple, void *,

47742

- bool (*)(gimple, tree, void *),

47743

- bool (*)(gimple, tree, void *),

47744

- bool (*)(gimple, tree, void *));

47745

+ walk_stmt_load_store_addr_fn,

47746

+ walk_stmt_load_store_addr_fn,

47747

+ walk_stmt_load_store_addr_fn);

47748

extern bool walk_stmt_load_store_ops (gimple, void *,

47749

- bool (*)(gimple, tree, void *),

47750

- bool (*)(gimple, tree, void *));

47751

+ walk_stmt_load_store_addr_fn,

47752

+ walk_stmt_load_store_addr_fn);

47753

extern bool gimple_ior_addresses_taken (bitmap, gimple);

47754

extern bool gimple_call_builtin_p (gimple, enum built_in_class);

47755

extern bool gimple_call_builtin_p (gimple, enum built_in_function);

47756

Index: gcc/tree-cfg.c

47757

===================================================================

47758

--- a/src/gcc/tree-cfg.c (.../tags/gcc_4_8_2_release)

47759

+++ b/src/gcc/tree-cfg.c (.../branches/gcc-4_8-branch)

47760

@@ -104,7 +104,6 @@

47761

static void assign_discriminator (location_t, basic_block);

47762

static edge gimple_redirect_edge_and_branch (edge, basic_block);

47763

static edge gimple_try_redirect_by_replacing_jump (edge, basic_block);

47764

-static unsigned int split_critical_edges (void);

47765

47766

/* Various helpers. */

47767

static inline bool stmt_starts_bb_p (gimple, gimple);

47768

@@ -1535,6 +1534,11 @@

47769

47770

FOR_EACH_IMM_USE_STMT (stmt, imm_iter, name)

47771

{

47772

+ /* Mark the block if we change the last stmt in it. */

47773

+ if (cfgcleanup_altered_bbs

47774

+ && stmt_ends_bb_p (stmt))

47775

+ bitmap_set_bit (cfgcleanup_altered_bbs, gimple_bb (stmt)->index);

47776

+

47777

FOR_EACH_IMM_USE_ON_STMT (use, imm_iter)

47778

{

47779

replace_exp (use, val);

47780

@@ -1559,11 +1563,6 @@

47781

gimple orig_stmt = stmt;

47782

size_t i;

47783

47784

- /* Mark the block if we changed the last stmt in it. */

47785

- if (cfgcleanup_altered_bbs

47786

- && stmt_ends_bb_p (stmt))

47787

- bitmap_set_bit (cfgcleanup_altered_bbs, gimple_bb (stmt)->index);

47788

-

47789

/* FIXME. It shouldn't be required to keep TREE_CONSTANT

47790

on ADDR_EXPRs up-to-date on GIMPLE. Propagation will

47791

only change sth from non-invariant to invariant, and only

47792

@@ -3513,11 +3512,10 @@

47793

case PLUS_EXPR:

47794

case MINUS_EXPR:

47795

{

47796

- /* We use regular PLUS_EXPR and MINUS_EXPR for vectors.

47797

- ??? This just makes the checker happy and may not be what is

47798

- intended. */

47799

- if (TREE_CODE (lhs_type) == VECTOR_TYPE

47800

- && POINTER_TYPE_P (TREE_TYPE (lhs_type)))

47801

+ tree lhs_etype = lhs_type;

47802

+ tree rhs1_etype = rhs1_type;

47803

+ tree rhs2_etype = rhs2_type;

47804

+ if (TREE_CODE (lhs_type) == VECTOR_TYPE)

47805

{

47806

if (TREE_CODE (rhs1_type) != VECTOR_TYPE

47807

|| TREE_CODE (rhs2_type) != VECTOR_TYPE)

47808

@@ -3525,22 +3523,13 @@

47809

error ("invalid non-vector operands to vector valued plus");

47810

return true;

47811

}

47812

- lhs_type = TREE_TYPE (lhs_type);

47813

- rhs1_type = TREE_TYPE (rhs1_type);

47814

- rhs2_type = TREE_TYPE (rhs2_type);

47815

- /* PLUS_EXPR is commutative, so we might end up canonicalizing

47816

- the pointer to 2nd place. */

47817

- if (POINTER_TYPE_P (rhs2_type))

47818

- {

47819

- tree tem = rhs1_type;

47820

- rhs1_type = rhs2_type;

47821

- rhs2_type = tem;

47822

- }

47823

- goto do_pointer_plus_expr_check;

47824

+ lhs_etype = TREE_TYPE (lhs_type);

47825

+ rhs1_etype = TREE_TYPE (rhs1_type);

47826

+ rhs2_etype = TREE_TYPE (rhs2_type);

47827

}

47828

- if (POINTER_TYPE_P (lhs_type)

47829

- || POINTER_TYPE_P (rhs1_type)

47830

- || POINTER_TYPE_P (rhs2_type))

47831

+ if (POINTER_TYPE_P (lhs_etype)

47832

+ || POINTER_TYPE_P (rhs1_etype)

47833

+ || POINTER_TYPE_P (rhs2_etype))

47834

{

47835

error ("invalid (pointer) operands to plus/minus");

47836

return true;

47837

@@ -3552,7 +3541,6 @@

47838

47839

case POINTER_PLUS_EXPR:

47840

{

47841

-do_pointer_plus_expr_check:

47842

if (!POINTER_TYPE_P (rhs1_type)

47843

|| !useless_type_conversion_p (lhs_type, rhs1_type)

47844

|| !ptrofftype_p (rhs2_type))

47845

@@ -7658,7 +7646,7 @@

47846

47847

/* Split all critical edges. */

47848

47849

-static unsigned int

47850

+unsigned int

47851

split_critical_edges (void)

47852

{

47853

basic_block bb;

47854

Index: gcc/passes.c

47855

===================================================================

47856

--- a/src/gcc/passes.c (.../tags/gcc_4_8_2_release)

47857

+++ b/src/gcc/passes.c (.../branches/gcc-4_8-branch)

47858

@@ -1398,6 +1398,7 @@

47859

/* After CCP we rewrite no longer addressed locals into SSA

47860

form if possible. */

47861

NEXT_PASS (pass_forwprop);

47862

+ NEXT_PASS (pass_object_sizes);

47863

/* pass_build_alias is a dummy pass that ensures that we

47864

execute TODO_rebuild_alias at this point. */

47865

NEXT_PASS (pass_build_alias);

47866

@@ -1435,7 +1436,6 @@

47867

NEXT_PASS (pass_dce);

47868

NEXT_PASS (pass_forwprop);

47869

NEXT_PASS (pass_phiopt);

47870

- NEXT_PASS (pass_object_sizes);

47871

NEXT_PASS (pass_strlen);

47872

NEXT_PASS (pass_ccp);

47873

/* After CCP we rewrite no longer addressed locals into SSA

47874

Index: gcc/tree-ssa-reassoc.c

47875

===================================================================

47876

--- a/src/gcc/tree-ssa-reassoc.c (.../tags/gcc_4_8_2_release)

47877

+++ b/src/gcc/tree-ssa-reassoc.c (.../branches/gcc-4_8-branch)

47878

@@ -785,8 +785,7 @@

47879

if (opcode == BIT_AND_EXPR)

47880

oe->op = build_zero_cst (TREE_TYPE (oe->op));

47881

else if (opcode == BIT_IOR_EXPR)

47882

- oe->op = build_low_bits_mask (TREE_TYPE (oe->op),

47883

- TYPE_PRECISION (TREE_TYPE (oe->op)));

47884

+ oe->op = build_all_ones_cst (TREE_TYPE (oe->op));

47885

47886

reassociate_stats.ops_eliminated += ops->length () - 1;

47887

ops->truncate (0);

47888

@@ -1980,8 +1979,15 @@

47889

47890

tem = fold_convert_loc (loc, optype, tem);

47891

gsi = gsi_for_stmt (stmt);

47892

- tem = force_gimple_operand_gsi (&gsi, tem, true, NULL_TREE, true,

47893

- GSI_SAME_STMT);

47894

+ /* In rare cases range->exp can be equal to lhs of stmt.

47895

+ In that case we have to insert after the stmt rather then before

47896

+ it. */

47897

+ if (op == range->exp)

47898

+ tem = force_gimple_operand_gsi (&gsi, tem, true, NULL_TREE, false,

47899

+ GSI_SAME_STMT);

47900

+ else

47901

+ tem = force_gimple_operand_gsi (&gsi, tem, true, NULL_TREE, true,

47902

+ GSI_SAME_STMT);

47903

47904

/* If doing inter-bb range test optimization, update the

47905

stmts immediately. Start with changing the first range test

47906

Index: gcc/config/s390/s390.c

47907

===================================================================

47908

--- a/src/gcc/config/s390/s390.c (.../tags/gcc_4_8_2_release)

47909

+++ b/src/gcc/config/s390/s390.c (.../branches/gcc-4_8-branch)

47910

@@ -407,6 +407,65 @@

47911

bytes on a z10 (or higher) CPU. */

47912

#define PREDICT_DISTANCE (TARGET_Z10 ? 384 : 2048)

47913

47914

+static const int s390_hotpatch_trampoline_halfwords_default = 12;

47915

+static const int s390_hotpatch_trampoline_halfwords_max = 1000000;

47916

+static int s390_hotpatch_trampoline_halfwords = -1;

47917

+

47918

+/* Return the argument of the given hotpatch attribute or the default value if

47919

+ no argument is present. */

47920

+

47921

+static inline int

47922

+get_hotpatch_attribute (tree hotpatch_attr)

47923

+{

47924

+ const_tree args;

47925

+

47926

+ args = TREE_VALUE (hotpatch_attr);

47927

+

47928

+ return (args) ?

47929

+ TREE_INT_CST_LOW (TREE_VALUE (args)):

47930

+ s390_hotpatch_trampoline_halfwords_default;

47931

+}

47932

+

47933

+/* Check whether the hotpatch attribute is applied to a function and, if it has

47934

+ an argument, the argument is valid. */

47935

+

47936

+static tree

47937

+s390_handle_hotpatch_attribute (tree *node, tree name, tree args,

47938

+ int flags ATTRIBUTE_UNUSED, bool *no_add_attrs)

47939

+{

47940

+ if (TREE_CODE (*node) != FUNCTION_DECL)

47941

+ {

47942

+ warning (OPT_Wattributes, "%qE attribute only applies to functions",

47943

+ name);

47944

+ *no_add_attrs = true;

47945

+ }

47946

+ else if (args)

47947

+ {

47948

+ tree expr = TREE_VALUE (args);

47949

+

47950

+ if (TREE_CODE (expr) != INTEGER_CST

47951

+ || !INTEGRAL_TYPE_P (TREE_TYPE (expr))

47952

+ || TREE_INT_CST_HIGH (expr) != 0

47953

+ || TREE_INT_CST_LOW (expr) > (unsigned int)

47954

+ s390_hotpatch_trampoline_halfwords_max)

47955

+ {

47956

+ error ("requested %qE attribute is not a non-negative integer"

47957

+ " constant or too large (max. %d)", name,

47958

+ s390_hotpatch_trampoline_halfwords_max);

47959

+ *no_add_attrs = true;

47960

+ }

47961

+ }

47962

+

47963

+ return NULL_TREE;

47964

+}

47965

+

47966

+static const struct attribute_spec s390_attribute_table[] = {

47967

+ { "hotpatch", 0, 1, true, false, false, s390_handle_hotpatch_attribute, false

47968

+ },

47969

+ /* End element. */

47970

+ { NULL, 0, 0, false, false, false, NULL, false }

47971

+};

47972

+

47973

/* Return the alignment for LABEL. We default to the -falign-labels

47974

value except for the literal pool base label. */

47975

int

47976

@@ -883,7 +942,8 @@

47977

{

47978

/* For CCRAWmode put the required cc mask into the second

47979

operand. */

47980

- if (GET_MODE (XVECEXP (*op0, 0, 0)) == CCRAWmode)

47981

+ if (GET_MODE (XVECEXP (*op0, 0, 0)) == CCRAWmode

47982

+ && INTVAL (*op1) >= 0 && INTVAL (*op1) <= 3)

47983

*op1 = gen_rtx_CONST_INT (VOIDmode, 1 << (3 - INTVAL (*op1)));

47984

*op0 = XVECEXP (*op0, 0, 0);

47985

*code = new_code;

47986

@@ -1594,6 +1654,46 @@

47987

static void

47988

s390_option_override (void)

47989

{

47990

+ unsigned int i;

47991

+ cl_deferred_option *opt;

47992

+ vec<cl_deferred_option> *v =

47993

+ (vec<cl_deferred_option> *) s390_deferred_options;

47994

+

47995

+ if (v)

47996

+ FOR_EACH_VEC_ELT (*v, i, opt)

47997

+ {

47998

+ switch (opt->opt_index)

47999

+ {

48000

+ case OPT_mhotpatch:

48001

+ s390_hotpatch_trampoline_halfwords = (opt->value) ?

48002

+ s390_hotpatch_trampoline_halfwords_default : -1;

48003

+ break;

48004

+ case OPT_mhotpatch_:

48005

+ {

48006

+ int val;

48007

+

48008

+ val = integral_argument (opt->arg);

48009

+ if (val == -1)

48010

+ {

48011

+ /* argument is not a plain number */

48012

+ error ("argument to %qs should be a non-negative integer",

48013

+ "-mhotpatch=");

48014

+ break;

48015

+ }

48016

+ else if (val > s390_hotpatch_trampoline_halfwords_max)

48017

+ {

48018

+ error ("argument to %qs is too large (max. %d)",

48019

+ "-mhotpatch=", s390_hotpatch_trampoline_halfwords_max);

48020

+ break;

48021

+ }

48022

+ s390_hotpatch_trampoline_halfwords = val;

48023

+ break;

48024

+ }

48025

+ default:

48026

+ gcc_unreachable ();

48027

+ }

48028

+ }

48029

+

48030

/* Set up function hooks. */

48031

init_machine_status = s390_init_machine_status;

48032

48033

@@ -3015,15 +3115,22 @@

48034

prefer ADDR_REGS. If 'class' is not a superset

48035

of ADDR_REGS, e.g. FP_REGS, reject this reload. */

48036

case CONST:

48037

- /* A larl operand with odd addend will get fixed via secondary

48038

- reload. So don't request it to be pushed into literal

48039

- pool. */

48040

+ /* Symrefs cannot be pushed into the literal pool with -fPIC

48041

+ so we *MUST NOT* return NO_REGS for these cases

48042

+ (s390_cannot_force_const_mem will return true).

48043

+

48044

+ On the other hand we MUST return NO_REGS for symrefs with

48045

+ invalid addend which might have been pushed to the literal

48046

+ pool (no -fPIC). Usually we would expect them to be

48047

+ handled via secondary reload but this does not happen if

48048

+ they are used as literal pool slot replacement in reload

48049

+ inheritance (see emit_input_reload_insns). */

48050

if (TARGET_CPU_ZARCH

48051

&& GET_CODE (XEXP (op, 0)) == PLUS

48052

&& GET_CODE (XEXP (XEXP(op, 0), 0)) == SYMBOL_REF

48053

&& GET_CODE (XEXP (XEXP(op, 0), 1)) == CONST_INT)

48054

{

48055

- if (reg_class_subset_p (ADDR_REGS, rclass))

48056

+ if (flag_pic && reg_class_subset_p (ADDR_REGS, rclass))

48057

return ADDR_REGS;

48058

else

48059

return NO_REGS;

48060

@@ -4683,7 +4790,7 @@

48061

int smode_bsize, mode_bsize;

48062

rtx op, clobber;

48063

48064

- if (bitsize + bitpos > GET_MODE_SIZE (mode))

48065

+ if (bitsize + bitpos > GET_MODE_BITSIZE (mode))

48066

return false;

48067

48068

/* Generate INSERT IMMEDIATE (IILL et al). */

48069

@@ -5311,6 +5418,101 @@

48070

gcc_unreachable ();

48071

}

48072

48073

+/* Returns -1 if the function should not be made hotpatchable. Otherwise it

48074

+ returns a number >= 0 that is the desired size of the hotpatch trampoline

48075

+ in halfwords. */

48076

+

48077

+static int s390_function_num_hotpatch_trampoline_halfwords (tree decl,

48078

+ bool do_warn)

48079

+{

48080

+ tree attr;

48081

+

48082

+ if (DECL_DECLARED_INLINE_P (decl)

48083

+ || DECL_ARTIFICIAL (decl)

48084

+ || MAIN_NAME_P (DECL_NAME (decl)))

48085

+ {

48086

+ /* - Explicitly inlined functions cannot be hotpatched.

48087

+ - Artificial functions need not be hotpatched.

48088

+ - Making the main function hotpatchable is useless. */

48089

+ return -1;

48090

+ }

48091

+ attr = lookup_attribute ("hotpatch", DECL_ATTRIBUTES (decl));

48092

+ if (attr || s390_hotpatch_trampoline_halfwords >= 0)

48093

+ {

48094

+ if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (decl)))

48095

+ {

48096

+ if (do_warn)

48097

+ warning (OPT_Wattributes, "function %qE with the %qs attribute"

48098

+ " is not hotpatchable", DECL_NAME (decl), "always_inline");

48099

+ return -1;

48100

+ }

48101

+ else

48102

+ {

48103

+ return (attr) ?

48104

+ get_hotpatch_attribute (attr) : s390_hotpatch_trampoline_halfwords;

48105

+ }

48106

+ }

48107

+

48108

+ return -1;

48109

+}

48110

+

48111

+/* Hook to determine if one function can safely inline another. */

48112

+

48113

+static bool

48114

+s390_can_inline_p (tree caller, tree callee)

48115

+{

48116

+ if (s390_function_num_hotpatch_trampoline_halfwords (callee, false) >= 0)

48117

+ return false;

48118

+

48119

+ return default_target_can_inline_p (caller, callee);

48120

+}

48121

+

48122

+/* Write the extra assembler code needed to declare a function properly. */

48123

+

48124

+void

48125

+s390_asm_output_function_label (FILE *asm_out_file, const char *fname,

48126

+ tree decl)

48127

+{

48128

+ int hotpatch_trampoline_halfwords = -1;

48129

+

48130

+ if (decl)

48131

+ {

48132

+ hotpatch_trampoline_halfwords =

48133

+ s390_function_num_hotpatch_trampoline_halfwords (decl, true);

48134

+ if (hotpatch_trampoline_halfwords >= 0

48135

+ && decl_function_context (decl) != NULL_TREE)

48136

+ {

48137

+ warning_at (DECL_SOURCE_LOCATION (decl), OPT_mhotpatch,

48138

+ "hotpatching is not compatible with nested functions");

48139

+ hotpatch_trampoline_halfwords = -1;

48140

+ }

48141

+ }

48142

+

48143

+ if (hotpatch_trampoline_halfwords > 0)

48144

+ {

48145

+ int i;

48146

+

48147

+ /* Add a trampoline code area before the function label and initialize it

48148

+ with two-byte nop instructions. This area can be overwritten with code

48149

+ that jumps to a patched version of the function. */

48150

+ for (i = 0; i < hotpatch_trampoline_halfwords; i++)

48151

+ asm_fprintf (asm_out_file, "\tnopr\t%%r7\n");

48152

+ /* Note: The function label must be aligned so that (a) the bytes of the

48153

+ following nop do not cross a cacheline boundary, and (b) a jump address

48154

+ (eight bytes for 64 bit targets, 4 bytes for 32 bit targets) can be

48155

+ stored directly before the label without crossing a cacheline

48156

+ boundary. All this is necessary to make sure the trampoline code can

48157

+ be changed atomically. */

48158

+ }

48159

+

48160

+ ASM_OUTPUT_LABEL (asm_out_file, fname);

48161

+

48162

+ /* Output a four-byte nop if hotpatching is enabled. This can be overwritten

48163

+ atomically with a relative backwards jump to the trampoline area. */

48164

+ if (hotpatch_trampoline_halfwords >= 0)

48165

+ asm_fprintf (asm_out_file, "\tnop\t0\n");

48166

+}

48167

+

48168

/* Output machine-dependent UNSPECs occurring in address constant X

48169

in assembler syntax to stdio stream FILE. Returns true if the

48170

constant X could be recognized, false otherwise. */

48171

@@ -7846,6 +8048,9 @@

48172

{

48173

bb = BASIC_BLOCK (bb_index);

48174

48175

+ if (!bb)

48176

+ continue;

48177

+

48178

FOR_BB_INSNS (bb, insn)

48179

{

48180

rtx ite, cc, pat, target;

48181

@@ -7959,7 +8164,10 @@

48182

if (!result)

48183

return;

48184

48185

- PATTERN (tbegin_insn) = XVECEXP (PATTERN (tbegin_insn), 0, 0);

48186

+ PATTERN (tbegin_insn) = gen_rtx_PARALLEL (VOIDmode,

48187

+ gen_rtvec (2,

48188

+ XVECEXP (PATTERN (tbegin_insn), 0, 0),

48189

+ XVECEXP (PATTERN (tbegin_insn), 0, 1)));

48190

INSN_CODE (tbegin_insn) = -1;

48191

df_insn_rescan (tbegin_insn);

48192

48193

@@ -9568,61 +9776,47 @@

48194

void

48195

s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p)

48196

{

48197

- const int CC0 = 1 << 3;

48198

- const int CC1 = 1 << 2;

48199

- const int CC3 = 1 << 0;

48200

- rtx abort_label = gen_label_rtx ();

48201

- rtx leave_label = gen_label_rtx ();

48202

+ rtx retry_plus_two = gen_reg_rtx (SImode);

48203

rtx retry_reg = gen_reg_rtx (SImode);

48204

rtx retry_label = NULL_RTX;

48205

- rtx jump;

48206

- rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1);

48207

48208

if (retry != NULL_RTX)

48209

{

48210

emit_move_insn (retry_reg, retry);

48211

+ emit_insn (gen_addsi3 (retry_plus_two, retry_reg, const2_rtx));

48212

+ emit_insn (gen_addsi3 (retry_reg, retry_reg, const1_rtx));

48213

retry_label = gen_label_rtx ();

48214

emit_label (retry_label);

48215

}

48216

48217

if (clobber_fprs_p)

48218

- emit_insn (gen_tbegin_1 (tdb,

48219

- gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK)));

48220

+ emit_insn (gen_tbegin_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK), tdb));

48221

else

48222

- emit_insn (gen_tbegin_nofloat_1 (tdb,

48223

- gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK)));

48224

+ emit_insn (gen_tbegin_nofloat_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK),

48225

+ tdb));

48226

48227

- jump = s390_emit_jump (abort_label,

48228

- gen_rtx_NE (VOIDmode,

48229

- gen_rtx_REG (CCRAWmode, CC_REGNUM),

48230

- gen_rtx_CONST_INT (VOIDmode, CC0)));

48231

-

48232

- JUMP_LABEL (jump) = abort_label;

48233

- LABEL_NUSES (abort_label) = 1;

48234

- add_reg_note (jump, REG_BR_PROB, very_unlikely);

48235

-

48236

- /* Initialize CC return value. */

48237

- emit_move_insn (dest, const0_rtx);

48238

-

48239

- s390_emit_jump (leave_label, NULL_RTX);

48240

- LABEL_NUSES (leave_label) = 1;

48241

- emit_barrier ();

48242

-

48243

- /* Abort handler code. */

48244

-

48245

- emit_label (abort_label);

48246

+ emit_move_insn (dest, gen_rtx_UNSPEC (SImode,

48247

+ gen_rtvec (1, gen_rtx_REG (CCRAWmode,

48248

+ CC_REGNUM)),

48249

+ UNSPEC_CC_TO_INT));

48250

if (retry != NULL_RTX)

48251

{

48252

+ const int CC0 = 1 << 3;

48253

+ const int CC1 = 1 << 2;

48254

+ const int CC3 = 1 << 0;

48255

+ rtx jump;

48256

rtx count = gen_reg_rtx (SImode);

48257

+ rtx leave_label = gen_label_rtx ();

48258

+

48259

+ /* Exit for success and permanent failures. */

48260

jump = s390_emit_jump (leave_label,

48261

gen_rtx_EQ (VOIDmode,

48262

gen_rtx_REG (CCRAWmode, CC_REGNUM),

48263

- gen_rtx_CONST_INT (VOIDmode, CC1 | CC3)));

48264

- LABEL_NUSES (leave_label) = 2;

48265

- add_reg_note (jump, REG_BR_PROB, very_unlikely);

48266

+ gen_rtx_CONST_INT (VOIDmode, CC0 | CC1 | CC3)));

48267

+ LABEL_NUSES (leave_label) = 1;

48268

48269

/* CC2 - transient failure. Perform retry with ppa. */

48270

- emit_move_insn (count, retry);

48271

+ emit_move_insn (count, retry_plus_two);

48272

emit_insn (gen_subsi3 (count, count, retry_reg));

48273

emit_insn (gen_tx_assist (count));

48274

jump = emit_jump_insn (gen_doloop_si64 (retry_label,

48275

@@ -9630,13 +9824,8 @@

48276

retry_reg));

48277

JUMP_LABEL (jump) = retry_label;

48278

LABEL_NUSES (retry_label) = 1;

48279

+ emit_label (leave_label);

48280

}

48281

-

48282

- emit_move_insn (dest, gen_rtx_UNSPEC (SImode,

48283

- gen_rtvec (1, gen_rtx_REG (CCRAWmode,

48284

- CC_REGNUM)),

48285

- UNSPEC_CC_TO_INT));

48286

- emit_label (leave_label);

48287

}

48288

48289

/* Builtins. */

48290

@@ -9674,6 +9863,9 @@

48291

s390_init_builtins (void)

48292

{

48293

tree ftype, uint64_type;

48294

+ tree returns_twice_attr = tree_cons (get_identifier ("returns_twice"),

48295

+ NULL, NULL);

48296

+ tree noreturn_attr = tree_cons (get_identifier ("noreturn"), NULL, NULL);

48297

48298

/* void foo (void) */

48299

ftype = build_function_type_list (void_type_node, NULL_TREE);

48300

@@ -9684,7 +9876,7 @@

48301

ftype = build_function_type_list (void_type_node, integer_type_node,

48302

NULL_TREE);

48303

add_builtin_function ("__builtin_tabort", ftype,

48304

- S390_BUILTIN_TABORT, BUILT_IN_MD, NULL, NULL_TREE);

48305

+ S390_BUILTIN_TABORT, BUILT_IN_MD, NULL, noreturn_attr);

48306

add_builtin_function ("__builtin_tx_assist", ftype,

48307

S390_BUILTIN_TX_ASSIST, BUILT_IN_MD, NULL, NULL_TREE);

48308

48309

@@ -9691,10 +9883,10 @@

48310

/* int foo (void *) */

48311

ftype = build_function_type_list (integer_type_node, ptr_type_node, NULL_TREE);

48312

add_builtin_function ("__builtin_tbegin", ftype, S390_BUILTIN_TBEGIN,

48313

- BUILT_IN_MD, NULL, NULL_TREE);

48314

+ BUILT_IN_MD, NULL, returns_twice_attr);

48315

add_builtin_function ("__builtin_tbegin_nofloat", ftype,

48316

S390_BUILTIN_TBEGIN_NOFLOAT,

48317

- BUILT_IN_MD, NULL, NULL_TREE);

48318

+ BUILT_IN_MD, NULL, returns_twice_attr);

48319

48320

/* int foo (void *, int) */

48321

ftype = build_function_type_list (integer_type_node, ptr_type_node,

48322

@@ -9702,11 +9894,11 @@

48323

add_builtin_function ("__builtin_tbegin_retry", ftype,

48324

S390_BUILTIN_TBEGIN_RETRY,

48325

BUILT_IN_MD,

48326

- NULL, NULL_TREE);

48327

+ NULL, returns_twice_attr);

48328

add_builtin_function ("__builtin_tbegin_retry_nofloat", ftype,

48329

S390_BUILTIN_TBEGIN_RETRY_NOFLOAT,

48330

BUILT_IN_MD,

48331

- NULL, NULL_TREE);

48332

+ NULL, returns_twice_attr);

48333

48334

/* int foo (void) */

48335

ftype = build_function_type_list (integer_type_node, NULL_TREE);

48336

@@ -11622,6 +11814,12 @@

48337

#undef TARGET_CANONICALIZE_COMPARISON

48338

#define TARGET_CANONICALIZE_COMPARISON s390_canonicalize_comparison

48339

48340

+#undef TARGET_ATTRIBUTE_TABLE

48341

+#define TARGET_ATTRIBUTE_TABLE s390_attribute_table

48342

+

48343

+#undef TARGET_CAN_INLINE_P

48344

+#define TARGET_CAN_INLINE_P s390_can_inline_p

48345

+

48346

struct gcc_target targetm = TARGET_INITIALIZER;

48347

48348

#include "gt-s390.h"

48349

Index: gcc/config/s390/s390.h

48350

===================================================================

48351

--- a/src/gcc/config/s390/s390.h (.../tags/gcc_4_8_2_release)

48352

+++ b/src/gcc/config/s390/s390.h (.../branches/gcc-4_8-branch)

48353

@@ -217,7 +217,7 @@

48354

#define STACK_BOUNDARY 64

48355

48356

/* Allocation boundary (in *bits*) for the code of a function. */

48357

-#define FUNCTION_BOUNDARY 32

48358

+#define FUNCTION_BOUNDARY 64

48359

48360

/* There is no point aligning anything to a rounder boundary than this. */

48361

#define BIGGEST_ALIGNMENT 64

48362

@@ -878,6 +878,9 @@

48363

fputc ('\n', (FILE)); \

48364

} while (0)

48365

48366

+#undef ASM_OUTPUT_FUNCTION_LABEL

48367

+#define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \

48368

+ s390_asm_output_function_label (FILE, NAME, DECL)

48369

48370

/* Miscellaneous parameters. */

48371

48372

Index: gcc/config/s390/s390.md

48373

===================================================================

48374

--- a/src/gcc/config/s390/s390.md (.../tags/gcc_4_8_2_release)

48375

+++ b/src/gcc/config/s390/s390.md (.../branches/gcc-4_8-branch)

48376

@@ -147,6 +147,7 @@

48377

48378

; Transactional Execution support

48379

UNSPECV_TBEGIN

48380

+ UNSPECV_TBEGIN_TDB

48381

UNSPECV_TBEGINC

48382

UNSPECV_TEND

48383

UNSPECV_TABORT

48384

@@ -9896,9 +9897,10 @@

48385

48386

(define_insn "tbegin_1"

48387

[(set (reg:CCRAW CC_REGNUM)

48388

- (unspec_volatile:CCRAW [(match_operand:BLK 0 "memory_operand" "=Q")

48389

- (match_operand 1 "const_int_operand" " D")]

48390

+ (unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")]

48391

UNSPECV_TBEGIN))

48392

+ (set (match_operand:BLK 1 "memory_operand" "=Q")

48393

+ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_TBEGIN_TDB))

48394

(clobber (reg:DF 16))

48395

(clobber (reg:DF 17))

48396

(clobber (reg:DF 18))

48397

@@ -9917,18 +9919,19 @@

48398

(clobber (reg:DF 31))]

48399

; CONST_OK_FOR_CONSTRAINT_P does not work with D constraint since D is

48400

; not supposed to be used for immediates (see genpreds.c).

48401

- "TARGET_HTM && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 0xffff"

48402

- "tbegin\t%0,%x1"

48403

+ "TARGET_HTM && INTVAL (operands[0]) >= 0 && INTVAL (operands[0]) <= 0xffff"

48404

+ "tbegin\t%1,%x0"

48405

[(set_attr "op_type" "SIL")])

48406

48407

; Same as above but without the FPR clobbers

48408

(define_insn "tbegin_nofloat_1"

48409

[(set (reg:CCRAW CC_REGNUM)

48410

- (unspec_volatile:CCRAW [(match_operand:BLK 0 "memory_operand" "=Q")

48411

- (match_operand 1 "const_int_operand" " D")]

48412

- UNSPECV_TBEGIN))]

48413

- "TARGET_HTM && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 0xffff"

48414

- "tbegin\t%0,%x1"

48415

+ (unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")]

48416

+ UNSPECV_TBEGIN))

48417

+ (set (match_operand:BLK 1 "memory_operand" "=Q")

48418

+ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_TBEGIN_TDB))]

48419

+ "TARGET_HTM && INTVAL (operands[0]) >= 0 && INTVAL (operands[0]) <= 0xffff"

48420

+ "tbegin\t%1,%x0"

48421

[(set_attr "op_type" "SIL")])

48422

48423

48424

@@ -10012,15 +10015,12 @@

48425

; Transaction perform processor assist

48426

48427

(define_expand "tx_assist"

48428

- [(set (match_dup 1) (const_int 0))

48429

- (unspec_volatile [(match_operand:SI 0 "register_operand" "")

48430

- (match_dup 1)

48431

+ [(unspec_volatile [(match_operand:SI 0 "register_operand" "")

48432

+ (reg:SI GPR0_REGNUM)

48433

(const_int 1)]

48434

UNSPECV_PPA)]

48435

"TARGET_HTM"

48436

-{

48437

- operands[1] = gen_reg_rtx (SImode);

48438

-})

48439

+ "")

48440

48441

(define_insn "*ppa"

48442

[(unspec_volatile [(match_operand:SI 0 "register_operand" "d")

48443

@@ -10028,5 +10028,5 @@

48444

(match_operand 2 "const_int_operand" "I")]

48445

UNSPECV_PPA)]

48446

"TARGET_HTM && INTVAL (operands[2]) < 16"

48447

- "ppa\t%0,%1,1"

48448

+ "ppa\t%0,%1,%2"

48449

[(set_attr "op_type" "RRF")])

48450

Index: gcc/config/s390/s390.opt

48451

===================================================================

48452

--- a/src/gcc/config/s390/s390.opt (.../tags/gcc_4_8_2_release)

48453

+++ b/src/gcc/config/s390/s390.opt (.../branches/gcc-4_8-branch)

48454

@@ -96,6 +96,14 @@

48455

Target Report RejectNegative Negative(msoft-float) InverseMask(SOFT_FLOAT, HARD_FLOAT)

48456

Enable hardware floating point

48457

48458

+mhotpatch

48459

+Target Report Var(s390_deferred_options) Defer

48460

+Prepend the function label with 12 two-byte Nop instructions, and add a four byte Nop instruction after the label for hotpatching.

48461

+

48462

+mhotpatch=

48463

+Target RejectNegative Report Joined Var(s390_deferred_options) Defer

48464

+Prepend the function label with the given number of two-byte Nop instructions, and add a four byte Nop instruction after the label for hotpatching.

48465

+

48466

mlong-double-128

48467

Target Report RejectNegative Negative(mlong-double-64) Mask(LONG_DOUBLE_128)

48468

Use 128-bit long double

48469

Index: gcc/config/s390/htmxlintrin.h

48470

===================================================================

48471

--- a/src/gcc/config/s390/htmxlintrin.h (.../tags/gcc_4_8_2_release)

48472

+++ b/src/gcc/config/s390/htmxlintrin.h (.../branches/gcc-4_8-branch)

48473

@@ -33,13 +33,20 @@

48474

the IBM XL compiler. For documentation please see the "z/OS XL

48475

C/C++ Programming Guide" publically available on the web. */

48476

48477

-extern __inline long __attribute__((__gnu_inline__, __always_inline__, __artificial__))

48478

+/* FIXME: __TM_simple_begin and __TM_begin should be marked

48479

+ __always_inline__ as well but this currently produces an error

48480

+ since the tbegin builtins are "returns_twice" and setjmp_call_p

48481

+ (calls.c) therefore identifies the functions as calling setjmp.

48482

+ The tree inliner currently refuses to inline functions calling

48483

+ setjmp. */

48484

+

48485

+long

48486

__TM_simple_begin ()

48487

{

48488

return __builtin_tbegin_nofloat (0);

48489

}

48490

48491

-extern __inline long __attribute__((__gnu_inline__, __always_inline__, __artificial__))

48492

+long

48493

__TM_begin (void* const tdb)

48494

{

48495

return __builtin_tbegin_nofloat (tdb);

48496

@@ -78,7 +85,7 @@

48497

if (depth != 0)

48498

return depth;

48499

48500

- if (tdb->format == 0)

48501

+ if (tdb->format != 1)

48502

return 0;

48503

return tdb->nesting_depth;

48504

}

48505

@@ -90,7 +97,7 @@

48506

{

48507

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

48508

48509

- if (tdb->format == 0)

48510

+ if (tdb->format != 1)

48511

return 0;

48512

48513

return !!(tdb->abort_code >= _HTM_FIRST_USER_ABORT_CODE);

48514

@@ -101,7 +108,7 @@

48515

{

48516

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

48517

48518

- if (tdb->format == 0)

48519

+ if (tdb->format != 1)

48520

return 0;

48521

48522

if (tdb->abort_code >= _HTM_FIRST_USER_ABORT_CODE)

48523

@@ -117,7 +124,7 @@

48524

{

48525

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

48526

48527

- return (tdb->format == 0

48528

+ return (tdb->format == 1

48529

&& (tdb->abort_code == 4 /* unfiltered program interruption */

48530

|| tdb->abort_code == 11 /* restricted instruction */));

48531

}

48532

@@ -127,7 +134,7 @@

48533

{

48534

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

48535

48536

- return (tdb->format == 0

48537

+ return (tdb->format == 1

48538

&& (tdb->abort_code == 7 /* fetch overflow */

48539

|| tdb->abort_code == 8 /* store overflow */));

48540

}

48541

@@ -137,7 +144,7 @@

48542

{

48543

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

48544

48545

- return tdb->format == 0 && tdb->abort_code == 13; /* depth exceeded */

48546

+ return tdb->format == 1 && tdb->abort_code == 13; /* depth exceeded */

48547

}

48548

48549

extern __inline long __attribute__((__gnu_inline__, __always_inline__, __artificial__))

48550

@@ -145,7 +152,7 @@

48551

{

48552

struct __htm_tdb *tdb = (struct __htm_tdb*)tdb_ptr;

48553

48554

- return (tdb->format == 0

48555

+ return (tdb->format == 1

48556

&& (tdb->abort_code == 9 /* fetch conflict */

48557

|| tdb->abort_code == 10 /* store conflict */));

48558

}

48559

Index: gcc/config/s390/s390-protos.h

48560

===================================================================

48561

--- a/src/gcc/config/s390/s390-protos.h (.../tags/gcc_4_8_2_release)

48562

+++ b/src/gcc/config/s390/s390-protos.h (.../branches/gcc-4_8-branch)

48563

@@ -110,5 +110,6 @@

48564

extern int s390_branch_condition_mask (rtx);

48565

extern int s390_compare_and_branch_condition_mask (rtx);

48566

extern bool s390_extzv_shift_ok (int, int, unsigned HOST_WIDE_INT);

48567

+extern void s390_asm_output_function_label (FILE *, const char *, tree);

48568

48569

#endif /* RTX_CODE */

48570

Index: gcc/config/sparc/t-rtems

48571

===================================================================

48572

--- a/src/gcc/config/sparc/t-rtems (.../tags/gcc_4_8_2_release)

48573

+++ b/src/gcc/config/sparc/t-rtems (.../branches/gcc-4_8-branch)

48574

@@ -17,6 +17,6 @@

48575

# <http://www.gnu.org/licenses/>.

48576

#

48577

48578

-MULTILIB_OPTIONS = msoft-float mcpu=v8

48579

-MULTILIB_DIRNAMES = soft v8

48580

+MULTILIB_OPTIONS = msoft-float mcpu=v8/mcpu=leon3

48581

+MULTILIB_DIRNAMES = soft v8 leon3

48582

MULTILIB_MATCHES = msoft-float=mno-fpu

48583

Index: gcc/config/sparc/sparc.md

48584

===================================================================

48585

--- a/src/gcc/config/sparc/sparc.md (.../tags/gcc_4_8_2_release)

48586

+++ b/src/gcc/config/sparc/sparc.md (.../branches/gcc-4_8-branch)

48587

@@ -206,7 +206,7 @@

48588

;; 'f' for all DF/TFmode values, including those that are specific to the v8.

48589

48590

;; Attribute for cpu type.

48591

-;; These must match the values for enum processor_type in sparc.h.

48592

+;; These must match the values of the enum processor_type in sparc-opts.h.

48593

(define_attr "cpu"

48594

"v7,

48595

cypress,

48596

@@ -214,6 +214,7 @@

48597

supersparc,

48598

hypersparc,

48599

leon,

48600

+ leon3,

48601

sparclite,

48602

f930,

48603

f934,

48604

@@ -284,7 +285,8 @@

48605

(const_string "none"))

48606

48607

(define_attr "pic" "false,true"

48608

- (symbol_ref "(flag_pic != 0 ? PIC_TRUE : PIC_FALSE)"))

48609

+ (symbol_ref "(flag_pic != 0

48610

+ ? PIC_TRUE : PIC_FALSE)"))

48611

48612

(define_attr "calls_alloca" "false,true"

48613

(symbol_ref "(cfun->calls_alloca != 0

48614

@@ -306,6 +308,10 @@

48615

(symbol_ref "(TARGET_FLAT != 0

48616

? FLAT_TRUE : FLAT_FALSE)"))

48617

48618

+(define_attr "fix_ut699" "false,true"

48619

+ (symbol_ref "(sparc_fix_ut699 != 0

48620

+ ? FIX_UT699_TRUE : FIX_UT699_FALSE)"))

48621

+

48622

;; Length (in # of insns).

48623

;; Beware that setting a length greater or equal to 3 for conditional branches

48624

;; has a side-effect (see output_cbranch and output_v9branch).

48625

@@ -420,32 +426,18 @@

48626

[(set_attr "length" "2")

48627

(set_attr "type" "multi")])

48628

48629

-;; Attributes for instruction and branch scheduling

48630

-(define_attr "tls_call_delay" "false,true"

48631

- (symbol_ref "(tls_call_delay (insn)

48632

- ? TLS_CALL_DELAY_TRUE : TLS_CALL_DELAY_FALSE)"))

48633

-

48634

+;; Attributes for branch scheduling

48635

(define_attr "in_call_delay" "false,true"

48636

- (cond [(eq_attr "type" "uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

48637

- (const_string "false")

48638

- (eq_attr "type" "load,fpload,store,fpstore")

48639

- (if_then_else (eq_attr "length" "1")

48640

- (const_string "true")

48641

- (const_string "false"))]

48642

- (if_then_else (and (eq_attr "length" "1")

48643

- (eq_attr "tls_call_delay" "true"))

48644

- (const_string "true")

48645

- (const_string "false"))))

48646

+ (symbol_ref "(eligible_for_call_delay (insn)

48647

+ ? IN_CALL_DELAY_TRUE : IN_CALL_DELAY_FALSE)"))

48648

48649

-(define_attr "eligible_for_sibcall_delay" "false,true"

48650

+(define_attr "in_sibcall_delay" "false,true"

48651

(symbol_ref "(eligible_for_sibcall_delay (insn)

48652

- ? ELIGIBLE_FOR_SIBCALL_DELAY_TRUE

48653

- : ELIGIBLE_FOR_SIBCALL_DELAY_FALSE)"))

48654

+ ? IN_SIBCALL_DELAY_TRUE : IN_SIBCALL_DELAY_FALSE)"))

48655

48656

-(define_attr "eligible_for_return_delay" "false,true"

48657

+(define_attr "in_return_delay" "false,true"

48658

(symbol_ref "(eligible_for_return_delay (insn)

48659

- ? ELIGIBLE_FOR_RETURN_DELAY_TRUE

48660

- : ELIGIBLE_FOR_RETURN_DELAY_FALSE)"))

48661

+ ? IN_RETURN_DELAY_TRUE : IN_RETURN_DELAY_FALSE)"))

48662

48663

;; ??? !v9: Should implement the notion of predelay slots for floating-point

48664

;; branches. This would allow us to remove the nop always inserted before

48665

@@ -460,41 +452,34 @@

48666

;; because it prevents us from moving back the final store of inner loops.

48667

48668

(define_attr "in_branch_delay" "false,true"

48669

- (if_then_else (and (eq_attr "type" "!uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

48670

- (eq_attr "length" "1"))

48671

- (const_string "true")

48672

- (const_string "false")))

48673

+ (cond [(eq_attr "type" "uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

48674

+ (const_string "false")

48675

+ (and (eq_attr "fix_ut699" "true") (eq_attr "type" "load,sload"))

48676

+ (const_string "false")

48677

+ (and (eq_attr "fix_ut699" "true")

48678

+ (and (eq_attr "type" "fpload,fp,fpmove,fpmul,fpdivs,fpsqrts")

48679

+ (eq_attr "fptype" "single")))

48680

+ (const_string "false")

48681

+ (eq_attr "length" "1")

48682

+ (const_string "true")

48683

+ ] (const_string "false")))

48684

48685

-(define_attr "in_uncond_branch_delay" "false,true"

48686

- (if_then_else (and (eq_attr "type" "!uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

48687

- (eq_attr "length" "1"))

48688

- (const_string "true")

48689

- (const_string "false")))

48690

-

48691

-(define_attr "in_annul_branch_delay" "false,true"

48692

- (if_then_else (and (eq_attr "type" "!uncond_branch,branch,cbcond,uncond_cbcond,call,sibcall,call_no_delay_slot,multi")

48693

- (eq_attr "length" "1"))

48694

- (const_string "true")

48695

- (const_string "false")))

48696

-

48697

(define_delay (eq_attr "type" "call")

48698

[(eq_attr "in_call_delay" "true") (nil) (nil)])

48699

48700

(define_delay (eq_attr "type" "sibcall")

48701

- [(eq_attr "eligible_for_sibcall_delay" "true") (nil) (nil)])

48702

+ [(eq_attr "in_sibcall_delay" "true") (nil) (nil)])

48703

48704

+(define_delay (eq_attr "type" "return")

48705

+ [(eq_attr "in_return_delay" "true") (nil) (nil)])

48706

+

48707

(define_delay (eq_attr "type" "branch")

48708

- [(eq_attr "in_branch_delay" "true")

48709

- (nil) (eq_attr "in_annul_branch_delay" "true")])

48710

+ [(eq_attr "in_branch_delay" "true") (nil) (eq_attr "in_branch_delay" "true")])

48711

48712

(define_delay (eq_attr "type" "uncond_branch")

48713

- [(eq_attr "in_uncond_branch_delay" "true")

48714

- (nil) (nil)])

48715

+ [(eq_attr "in_branch_delay" "true") (nil) (nil)])

48716

48717

-(define_delay (eq_attr "type" "return")

48718

- [(eq_attr "eligible_for_return_delay" "true") (nil) (nil)])

48719

48720

-

48721

;; Include SPARC DFA schedulers

48722

48723

(include "cypress.md")

48724

@@ -5548,7 +5533,7 @@

48725

[(set (match_operand:DF 0 "register_operand" "=e")

48726

(mult:DF (float_extend:DF (match_operand:SF 1 "register_operand" "f"))

48727

(float_extend:DF (match_operand:SF 2 "register_operand" "f"))))]

48728

- "(TARGET_V8 || TARGET_V9) && TARGET_FPU"

48729

+ "(TARGET_V8 || TARGET_V9) && TARGET_FPU && !sparc_fix_ut699"

48730

"fsmuld\t%1, %2, %0"

48731

[(set_attr "type" "fpmul")

48732

(set_attr "fptype" "double")])

48733

@@ -5575,22 +5560,39 @@

48734

(match_operand:TF 2 "register_operand" "e")))]

48735

"TARGET_FPU && TARGET_HARD_QUAD"

48736

"fdivq\t%1, %2, %0"

48737

- [(set_attr "type" "fpdivd")])

48738

+ [(set_attr "type" "fpdivs")])

48739

48740

-(define_insn "divdf3"

48741

+(define_expand "divdf3"

48742

[(set (match_operand:DF 0 "register_operand" "=e")

48743

(div:DF (match_operand:DF 1 "register_operand" "e")

48744

(match_operand:DF 2 "register_operand" "e")))]

48745

"TARGET_FPU"

48746

+ "")

48747

+

48748

+(define_insn "*divdf3_nofix"

48749

+ [(set (match_operand:DF 0 "register_operand" "=e")

48750

+ (div:DF (match_operand:DF 1 "register_operand" "e")

48751

+ (match_operand:DF 2 "register_operand" "e")))]

48752

+ "TARGET_FPU && !sparc_fix_ut699"

48753

"fdivd\t%1, %2, %0"

48754

[(set_attr "type" "fpdivd")

48755

(set_attr "fptype" "double")])

48756

48757

+(define_insn "*divdf3_fix"

48758

+ [(set (match_operand:DF 0 "register_operand" "=e")

48759

+ (div:DF (match_operand:DF 1 "register_operand" "e")

48760

+ (match_operand:DF 2 "register_operand" "e")))]

48761

+ "TARGET_FPU && sparc_fix_ut699"

48762

+ "fdivd\t%1, %2, %0\n\tstd\t%0, [%%sp-8]"

48763

+ [(set_attr "type" "fpdivd")

48764

+ (set_attr "fptype" "double")

48765

+ (set_attr "length" "2")])

48766

+

48767

(define_insn "divsf3"

48768

[(set (match_operand:SF 0 "register_operand" "=f")

48769

(div:SF (match_operand:SF 1 "register_operand" "f")

48770

(match_operand:SF 2 "register_operand" "f")))]

48771

- "TARGET_FPU"

48772

+ "TARGET_FPU && !sparc_fix_ut699"

48773

"fdivs\t%1, %2, %0"

48774

[(set_attr "type" "fpdivs")])

48775

48776

@@ -5789,20 +5791,35 @@

48777

(sqrt:TF (match_operand:TF 1 "register_operand" "e")))]

48778

"TARGET_FPU && TARGET_HARD_QUAD"

48779

"fsqrtq\t%1, %0"

48780

- [(set_attr "type" "fpsqrtd")])

48781

+ [(set_attr "type" "fpsqrts")])

48782

48783

-(define_insn "sqrtdf2"

48784

+(define_expand "sqrtdf2"

48785

[(set (match_operand:DF 0 "register_operand" "=e")

48786

(sqrt:DF (match_operand:DF 1 "register_operand" "e")))]

48787

"TARGET_FPU"

48788

+ "")

48789

+

48790

+(define_insn "*sqrtdf2_nofix"

48791

+ [(set (match_operand:DF 0 "register_operand" "=e")

48792

+ (sqrt:DF (match_operand:DF 1 "register_operand" "e")))]

48793

+ "TARGET_FPU && !sparc_fix_ut699"

48794

"fsqrtd\t%1, %0"

48795

[(set_attr "type" "fpsqrtd")

48796

(set_attr "fptype" "double")])

48797

48798

+(define_insn "*sqrtdf2_fix"

48799

+ [(set (match_operand:DF 0 "register_operand" "=e")

48800

+ (sqrt:DF (match_operand:DF 1 "register_operand" "e")))]

48801

+ "TARGET_FPU && sparc_fix_ut699"

48802

+ "fsqrtd\t%1, %0\n\tstd\t%0, [%%sp-8]"

48803

+ [(set_attr "type" "fpsqrtd")

48804

+ (set_attr "fptype" "double")

48805

+ (set_attr "length" "2")])

48806

+

48807

(define_insn "sqrtsf2"

48808

[(set (match_operand:SF 0 "register_operand" "=f")

48809

(sqrt:SF (match_operand:SF 1 "register_operand" "f")))]

48810

- "TARGET_FPU"

48811

+ "TARGET_FPU && !sparc_fix_ut699"

48812

"fsqrts\t%1, %0"

48813

[(set_attr "type" "fpsqrts")])

48814

48815

@@ -5821,19 +5838,6 @@

48816

}

48817

[(set_attr "type" "shift")])

48818

48819

-(define_insn "*ashlsi3_extend"

48820

- [(set (match_operand:DI 0 "register_operand" "=r")

48821

- (zero_extend:DI

48822

- (ashift:SI (match_operand:SI 1 "register_operand" "r")

48823

- (match_operand:SI 2 "arith_operand" "rI"))))]

48824

- "TARGET_ARCH64"

48825

-{

48826

- if (GET_CODE (operands[2]) == CONST_INT)

48827

- operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);

48828

- return "sll\t%1, %2, %0";

48829

-}

48830

- [(set_attr "type" "shift")])

48831

-

48832

(define_expand "ashldi3"

48833

[(set (match_operand:DI 0 "register_operand" "=r")

48834

(ashift:DI (match_operand:DI 1 "register_operand" "r")

48835

Index: gcc/config/sparc/t-sparc

48836

===================================================================

48837

--- a/src/gcc/config/sparc/t-sparc (.../tags/gcc_4_8_2_release)

48838

+++ b/src/gcc/config/sparc/t-sparc (.../branches/gcc-4_8-branch)

48839

@@ -23,7 +23,7 @@

48840

insn-codes.h conditions.h output.h $(INSN_ATTR_H) $(FLAGS_H) \

48841

$(FUNCTION_H) $(EXCEPT_H) $(EXPR_H) $(OPTABS_H) $(RECOG_H) \

48842

$(DIAGNOSTIC_CORE_H) $(GGC_H) $(TM_P_H) debug.h $(TARGET_H) \

48843

- $(TARGET_DEF_H) $(COMMON_TARGET_H) $(GIMPLE_H) \

48844

+ $(TARGET_DEF_H) $(COMMON_TARGET_H) $(GIMPLE_H) $(TREE_PASS_H) \

48845

langhooks.h reload.h $(PARAMS_H) $(DF_H) $(OPTS_H) \

48846

gt-sparc.h

48847

48848

Index: gcc/config/sparc/sparc.opt

48849

===================================================================

48850

--- a/src/gcc/config/sparc/sparc.opt (.../tags/gcc_4_8_2_release)

48851

+++ b/src/gcc/config/sparc/sparc.opt (.../branches/gcc-4_8-branch)

48852

@@ -113,6 +113,10 @@

48853

Target

48854

Optimize tail call instructions in assembler and linker

48855

48856

+muser-mode

48857

+Target Report Mask(USER_MODE)

48858

+Do not generate code that can only run in supervisor mode

48859

+

48860

mcpu=

48861

Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)

48862

Use features of and schedule code for given CPU

48863

@@ -146,6 +150,9 @@

48864

Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)

48865

48866

EnumValue

48867

+Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)

48868

+

48869

+EnumValue

48870

Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)

48871

48872

EnumValue

48873

@@ -201,9 +208,19 @@

48874

Enable workaround for single erratum of AT697F processor

48875

(corresponding to erratum #13 of AT697E processor)

48876

48877

+mfix-ut699

48878

+Target Report RejectNegative Var(sparc_fix_ut699)

48879

+Enable workarounds for the errata of the UT699 processor

48880

+

48881

Mask(LONG_DOUBLE_128)

48882

;; Use 128-bit long double

48883

48884

+Mask(LEON)

48885

+;; Generate code for LEON

48886

+

48887

+Mask(LEON3)

48888

+;; Generate code for LEON3

48889

+

48890

Mask(SPARCLITE)

48891

;; Generate code for SPARClite

48892

48893

Index: gcc/config/sparc/sync.md

48894

===================================================================

48895

--- a/src/gcc/config/sparc/sync.md (.../tags/gcc_4_8_2_release)

48896

+++ b/src/gcc/config/sparc/sync.md (.../branches/gcc-4_8-branch)

48897

@@ -161,7 +161,8 @@

48898

(match_operand:SI 5 "const_int_operand" "") ;; is_weak

48899

(match_operand:SI 6 "const_int_operand" "") ;; mod_s

48900

(match_operand:SI 7 "const_int_operand" "")] ;; mod_f

48901

- "TARGET_V9 && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)"

48902

+ "(TARGET_V9 || TARGET_LEON3)

48903

+ && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)"

48904

{

48905

sparc_expand_compare_and_swap (operands);

48906

DONE;

48907

@@ -176,7 +177,7 @@

48908

[(match_operand:I48MODE 2 "register_operand" "")

48909

(match_operand:I48MODE 3 "register_operand" "")]

48910

UNSPECV_CAS))])]

48911

- "TARGET_V9"

48912

+ "TARGET_V9 || TARGET_LEON3"

48913

"")

48914

48915

(define_insn "*atomic_compare_and_swap<mode>_1"

48916

@@ -187,10 +188,27 @@

48917

[(match_operand:I48MODE 2 "register_operand" "r")

48918

(match_operand:I48MODE 3 "register_operand" "0")]

48919

UNSPECV_CAS))]

48920

- "TARGET_V9 && (<MODE>mode == SImode || TARGET_ARCH64)"

48921

+ "TARGET_V9 && (<MODE>mode != DImode || TARGET_ARCH64)"

48922

"cas<modesuffix>\t%1, %2, %0"

48923

[(set_attr "type" "multi")])

48924

48925

+(define_insn "*atomic_compare_and_swap_leon3_1"

48926

+ [(set (match_operand:SI 0 "register_operand" "=r")

48927

+ (match_operand:SI 1 "mem_noofs_operand" "+w"))

48928

+ (set (match_dup 1)

48929

+ (unspec_volatile:SI

48930

+ [(match_operand:SI 2 "register_operand" "r")

48931

+ (match_operand:SI 3 "register_operand" "0")]

48932

+ UNSPECV_CAS))]

48933

+ "TARGET_LEON3"

48934

+{

48935

+ if (TARGET_USER_MODE)

48936

+ return "casa\t%1 0xa, %2, %0"; /* ASI for user data space. */

48937

+ else

48938

+ return "casa\t%1 0xb, %2, %0"; /* ASI for supervisor data space. */

48939

+}

48940

+ [(set_attr "type" "multi")])

48941

+

48942

(define_insn "*atomic_compare_and_swapdi_v8plus"

48943

[(set (match_operand:DI 0 "register_operand" "=h")

48944

(match_operand:DI 1 "mem_noofs_operand" "+w"))

48945

@@ -220,7 +238,7 @@

48946

(match_operand:SI 1 "memory_operand" "")

48947

(match_operand:SI 2 "register_operand" "")

48948

(match_operand:SI 3 "const_int_operand" "")]

48949

- "TARGET_V8 || TARGET_V9"

48950

+ "(TARGET_V8 || TARGET_V9) && !sparc_fix_ut699"

48951

{

48952

enum memmodel model = (enum memmodel) INTVAL (operands[3]);

48953

48954

@@ -236,7 +254,7 @@

48955

UNSPECV_SWAP))

48956

(set (match_dup 1)

48957

(match_operand:SI 2 "register_operand" "0"))]

48958

- "TARGET_V8 || TARGET_V9"

48959

+ "(TARGET_V8 || TARGET_V9) && !sparc_fix_ut699"

48960

"swap\t%1, %0"

48961

[(set_attr "type" "multi")])

48962

48963

@@ -244,7 +262,7 @@

48964

[(match_operand:QI 0 "register_operand" "")

48965

(match_operand:QI 1 "memory_operand" "")

48966

(match_operand:SI 2 "const_int_operand" "")]

48967

- ""

48968

+ "!sparc_fix_ut699"

48969

{

48970

enum memmodel model = (enum memmodel) INTVAL (operands[2]);

48971

rtx ret;

48972

@@ -268,6 +286,6 @@

48973

(unspec_volatile:QI [(match_operand:QI 1 "memory_operand" "+m")]

48974

UNSPECV_LDSTUB))

48975

(set (match_dup 1) (const_int -1))]

48976

- ""

48977

+ "!sparc_fix_ut699"

48978

"ldstub\t%1, %0"

48979

[(set_attr "type" "multi")])

48980

Index: gcc/config/sparc/sparc-opts.h

48981

===================================================================

48982

--- a/src/gcc/config/sparc/sparc-opts.h (.../tags/gcc_4_8_2_release)

48983

+++ b/src/gcc/config/sparc/sparc-opts.h (.../branches/gcc-4_8-branch)

48984

@@ -30,6 +30,7 @@

48985

PROCESSOR_SUPERSPARC,

48986

PROCESSOR_HYPERSPARC,

48987

PROCESSOR_LEON,

48988

+ PROCESSOR_LEON3,

48989

PROCESSOR_SPARCLITE,

48990

PROCESSOR_F930,

48991

PROCESSOR_F934,

48992

Index: gcc/config/sparc/sparc-protos.h

48993

===================================================================

48994

--- a/src/gcc/config/sparc/sparc-protos.h (.../tags/gcc_4_8_2_release)

48995

+++ b/src/gcc/config/sparc/sparc-protos.h (.../branches/gcc-4_8-branch)

48996

@@ -84,9 +84,9 @@

48997

extern int mems_ok_for_ldd_peep (rtx, rtx, rtx);

48998

extern int empty_delay_slot (rtx);

48999

extern int emit_cbcond_nop (rtx);

49000

+extern int eligible_for_call_delay (rtx);

49001

extern int eligible_for_return_delay (rtx);

49002

extern int eligible_for_sibcall_delay (rtx);

49003

-extern int tls_call_delay (rtx);

49004

extern int emit_move_sequence (rtx, enum machine_mode);

49005

extern int fp_sethi_p (rtx);

49006

extern int fp_mov_p (rtx);

49007

Index: gcc/config/sparc/sparc.c

49008

===================================================================

49009

--- a/src/gcc/config/sparc/sparc.c (.../tags/gcc_4_8_2_release)

49010

+++ b/src/gcc/config/sparc/sparc.c (.../branches/gcc-4_8-branch)

49011

@@ -52,6 +52,7 @@

49012

#include "params.h"

49013

#include "df.h"

49014

#include "opts.h"

49015

+#include "tree-pass.h"

49016

49017

/* Processor costs */

49018

49019

@@ -226,6 +227,30 @@

49020

};

49021

49022

static const

49023

+struct processor_costs leon3_costs = {

49024

+ COSTS_N_INSNS (1), /* int load */

49025

+ COSTS_N_INSNS (1), /* int signed load */

49026

+ COSTS_N_INSNS (1), /* int zeroed load */

49027

+ COSTS_N_INSNS (1), /* float load */

49028

+ COSTS_N_INSNS (1), /* fmov, fneg, fabs */

49029

+ COSTS_N_INSNS (1), /* fadd, fsub */

49030

+ COSTS_N_INSNS (1), /* fcmp */

49031

+ COSTS_N_INSNS (1), /* fmov, fmovr */

49032

+ COSTS_N_INSNS (1), /* fmul */

49033

+ COSTS_N_INSNS (14), /* fdivs */

49034

+ COSTS_N_INSNS (15), /* fdivd */

49035

+ COSTS_N_INSNS (22), /* fsqrts */

49036

+ COSTS_N_INSNS (23), /* fsqrtd */

49037

+ COSTS_N_INSNS (5), /* imul */

49038

+ COSTS_N_INSNS (5), /* imulX */

49039

+ 0, /* imul bit factor */

49040

+ COSTS_N_INSNS (35), /* idiv */

49041

+ COSTS_N_INSNS (35), /* idivX */

49042

+ COSTS_N_INSNS (1), /* movcc/movr */

49043

+ 0, /* shift penalty */

49044

+};

49045

+

49046

+static const

49047

struct processor_costs sparclet_costs = {

49048

COSTS_N_INSNS (3), /* int load */

49049

COSTS_N_INSNS (3), /* int signed load */

49050

@@ -538,7 +563,6 @@

49051

HOST_WIDE_INT, tree);

49052

static bool sparc_can_output_mi_thunk (const_tree, HOST_WIDE_INT,

49053

HOST_WIDE_INT, const_tree);

49054

-static void sparc_reorg (void);

49055

static struct machine_function * sparc_init_machine_status (void);

49056

static bool sparc_cannot_force_const_mem (enum machine_mode, rtx);

49057

static rtx sparc_tls_get_addr (void);

49058

@@ -680,9 +704,6 @@

49059

#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK

49060

#define TARGET_ASM_CAN_OUTPUT_MI_THUNK sparc_can_output_mi_thunk

49061

49062

-#undef TARGET_MACHINE_DEPENDENT_REORG

49063

-#define TARGET_MACHINE_DEPENDENT_REORG sparc_reorg

49064

-

49065

#undef TARGET_RTX_COSTS

49066

#define TARGET_RTX_COSTS sparc_rtx_costs

49067

#undef TARGET_ADDRESS_COST

49068

@@ -804,6 +825,306 @@

49069

49070

struct gcc_target targetm = TARGET_INITIALIZER;

49071

49072

+/* Return the memory reference contained in X if any, zero otherwise. */

49073

+

49074

+static rtx

49075

+mem_ref (rtx x)

49076

+{

49077

+ if (GET_CODE (x) == SIGN_EXTEND || GET_CODE (x) == ZERO_EXTEND)

49078

+ x = XEXP (x, 0);

49079

+

49080

+ if (MEM_P (x))

49081

+ return x;

49082

+

49083

+ return NULL_RTX;

49084

+}

49085

+

49086

+/* We use a machine specific pass to enable workarounds for errata.

49087

+ We need to have the (essentially) final form of the insn stream in order

49088

+ to properly detect the various hazards. Therefore, this machine specific

49089

+ pass runs as late as possible. The pass is inserted in the pass pipeline

49090

+ at the end of sparc_option_override. */

49091

+

49092

+static bool

49093

+sparc_gate_work_around_errata (void)

49094

+{

49095

+ /* The only errata we handle are those of the AT697F and UT699. */

49096

+ return sparc_fix_at697f != 0 || sparc_fix_ut699 != 0;

49097

+}

49098

+

49099

+static unsigned int

49100

+sparc_do_work_around_errata (void)

49101

+{

49102

+ rtx insn, next;

49103

+

49104

+ /* Force all instructions to be split into their final form. */

49105

+ split_all_insns_noflow ();

49106

+

49107

+ /* Now look for specific patterns in the insn stream. */

49108

+ for (insn = get_insns (); insn; insn = next)

49109

+ {

49110

+ bool insert_nop = false;

49111

+ rtx set;

49112

+

49113

+ /* Look into the instruction in a delay slot. */

49114

+ if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)

49115

+ insn = XVECEXP (PATTERN (insn), 0, 1);

49116

+

49117

+ /* Look for a single-word load into an odd-numbered FP register. */

49118

+ if (sparc_fix_at697f

49119

+ && NONJUMP_INSN_P (insn)

49120

+ && (set = single_set (insn)) != NULL_RTX

49121

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

49122

+ && MEM_P (SET_SRC (set))

49123

+ && REG_P (SET_DEST (set))

49124

+ && REGNO (SET_DEST (set)) > 31

49125

+ && REGNO (SET_DEST (set)) % 2 != 0)

49126

+ {

49127

+ /* The wrong dependency is on the enclosing double register. */

49128

+ const unsigned int x = REGNO (SET_DEST (set)) - 1;

49129

+ unsigned int src1, src2, dest;

49130

+ int code;

49131

+

49132

+ next = next_active_insn (insn);

49133

+ if (!next)

49134

+ break;

49135

+ /* If the insn is a branch, then it cannot be problematic. */

49136

+ if (!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) == SEQUENCE)

49137

+ continue;

49138

+

49139

+ extract_insn (next);

49140

+ code = INSN_CODE (next);

49141

+

49142

+ switch (code)

49143

+ {

49144

+ case CODE_FOR_adddf3:

49145

+ case CODE_FOR_subdf3:

49146

+ case CODE_FOR_muldf3:

49147

+ case CODE_FOR_divdf3:

49148

+ dest = REGNO (recog_data.operand[0]);

49149

+ src1 = REGNO (recog_data.operand[1]);

49150

+ src2 = REGNO (recog_data.operand[2]);

49151

+ if (src1 != src2)

49152

+ {

49153

+ /* Case [1-4]:

49154

+ ld [address], %fx+1

49155

+ FPOPd %f{x,y}, %f{y,x}, %f{x,y} */

49156

+ if ((src1 == x || src2 == x)

49157

+ && (dest == src1 || dest == src2))

49158

+ insert_nop = true;

49159

+ }

49160

+ else

49161

+ {

49162

+ /* Case 5:

49163

+ ld [address], %fx+1

49164

+ FPOPd %fx, %fx, %fx */

49165

+ if (src1 == x

49166

+ && dest == src1

49167

+ && (code == CODE_FOR_adddf3 || code == CODE_FOR_muldf3))

49168

+ insert_nop = true;

49169

+ }

49170

+ break;

49171

+

49172

+ case CODE_FOR_sqrtdf2:

49173

+ dest = REGNO (recog_data.operand[0]);

49174

+ src1 = REGNO (recog_data.operand[1]);

49175

+ /* Case 6:

49176

+ ld [address], %fx+1

49177

+ fsqrtd %fx, %fx */

49178

+ if (src1 == x && dest == src1)

49179

+ insert_nop = true;

49180

+ break;

49181

+

49182

+ default:

49183

+ break;

49184

+ }

49185

+ }

49186

+

49187

+ /* Look for a single-word load into an integer register. */

49188

+ else if (sparc_fix_ut699

49189

+ && NONJUMP_INSN_P (insn)

49190

+ && (set = single_set (insn)) != NULL_RTX

49191

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) <= 4

49192

+ && mem_ref (SET_SRC (set)) != NULL_RTX

49193

+ && REG_P (SET_DEST (set))

49194

+ && REGNO (SET_DEST (set)) < 32)

49195

+ {

49196

+ /* There is no problem if the second memory access has a data

49197

+ dependency on the first single-cycle load. */

49198

+ rtx x = SET_DEST (set);

49199

+

49200

+ next = next_active_insn (insn);

49201

+ if (!next)

49202

+ break;

49203

+ /* If the insn is a branch, then it cannot be problematic. */

49204

+ if (!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) == SEQUENCE)

49205

+ continue;

49206

+

49207

+ /* Look for a second memory access to/from an integer register. */

49208

+ if ((set = single_set (next)) != NULL_RTX)

49209

+ {

49210

+ rtx src = SET_SRC (set);

49211

+ rtx dest = SET_DEST (set);

49212

+ rtx mem;

49213

+

49214

+ /* LDD is affected. */

49215

+ if ((mem = mem_ref (src)) != NULL_RTX

49216

+ && REG_P (dest)

49217

+ && REGNO (dest) < 32

49218

+ && !reg_mentioned_p (x, XEXP (mem, 0)))

49219

+ insert_nop = true;

49220

+

49221

+ /* STD is *not* affected. */

49222

+ else if (MEM_P (dest)

49223

+ && GET_MODE_SIZE (GET_MODE (dest)) <= 4

49224

+ && (src == CONST0_RTX (GET_MODE (dest))

49225

+ || (REG_P (src)

49226

+ && REGNO (src) < 32

49227

+ && REGNO (src) != REGNO (x)))

49228

+ && !reg_mentioned_p (x, XEXP (dest, 0)))

49229

+ insert_nop = true;

49230

+ }

49231

+ }

49232

+

49233

+ /* Look for a single-word load/operation into an FP register. */

49234

+ else if (sparc_fix_ut699

49235

+ && NONJUMP_INSN_P (insn)

49236

+ && (set = single_set (insn)) != NULL_RTX

49237

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

49238

+ && REG_P (SET_DEST (set))

49239

+ && REGNO (SET_DEST (set)) > 31)

49240

+ {

49241

+ /* Number of instructions in the problematic window. */

49242

+ const int n_insns = 4;

49243

+ /* The problematic combination is with the sibling FP register. */

49244

+ const unsigned int x = REGNO (SET_DEST (set));

49245

+ const unsigned int y = x ^ 1;

49246

+ rtx after;

49247

+ int i;

49248

+

49249

+ next = next_active_insn (insn);

49250

+ if (!next)

49251

+ break;

49252

+ /* If the insn is a branch, then it cannot be problematic. */

49253

+ if (!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) == SEQUENCE)

49254

+ continue;

49255

+

49256

+ /* Look for a second load/operation into the sibling FP register. */

49257

+ if (!((set = single_set (next)) != NULL_RTX

49258

+ && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

49259

+ && REG_P (SET_DEST (set))

49260

+ && REGNO (SET_DEST (set)) == y))

49261

+ continue;

49262

+

49263

+ /* Look for a (possible) store from the FP register in the next N

49264

+ instructions, but bail out if it is again modified or if there

49265

+ is a store from the sibling FP register before this store. */

49266

+ for (after = next, i = 0; i < n_insns; i++)

49267

+ {

49268

+ bool branch_p;

49269

+

49270

+ after = next_active_insn (after);

49271

+ if (!after)

49272

+ break;

49273

+

49274

+ /* This is a branch with an empty delay slot. */

49275

+ if (!NONJUMP_INSN_P (after))

49276

+ {

49277

+ if (++i == n_insns)

49278

+ break;

49279

+ branch_p = true;

49280

+ after = NULL_RTX;

49281

+ }

49282

+ /* This is a branch with a filled delay slot. */

49283

+ else if (GET_CODE (PATTERN (after)) == SEQUENCE)

49284

+ {

49285

+ if (++i == n_insns)

49286

+ break;

49287

+ branch_p = true;

49288

+ after = XVECEXP (PATTERN (after), 0, 1);

49289

+ }

49290

+ /* This is a regular instruction. */

49291

+ else

49292

+ branch_p = false;

49293

+

49294

+ if (after && (set = single_set (after)) != NULL_RTX)

49295

+ {

49296

+ const rtx src = SET_SRC (set);

49297

+ const rtx dest = SET_DEST (set);

49298

+ const unsigned int size = GET_MODE_SIZE (GET_MODE (dest));

49299

+

49300

+ /* If the FP register is again modified before the store,

49301

+ then the store isn't affected. */

49302

+ if (REG_P (dest)

49303

+ && (REGNO (dest) == x

49304

+ || (REGNO (dest) == y && size == 8)))

49305

+ break;

49306

+

49307

+ if (MEM_P (dest) && REG_P (src))

49308

+ {

49309

+ /* If there is a store from the sibling FP register

49310

+ before the store, then the store is not affected. */

49311

+ if (REGNO (src) == y || (REGNO (src) == x && size == 8))

49312

+ break;

49313

+

49314

+ /* Otherwise, the store is affected. */

49315

+ if (REGNO (src) == x && size == 4)

49316

+ {

49317

+ insert_nop = true;

49318

+ break;

49319

+ }

49320

+ }

49321

+ }

49322

+

49323

+ /* If we have a branch in the first M instructions, then we

49324

+ cannot see the (M+2)th instruction so we play safe. */

49325

+ if (branch_p && i <= (n_insns - 2))

49326

+ {

49327

+ insert_nop = true;

49328

+ break;

49329

+ }

49330

+ }

49331

+ }

49332

+

49333

+ else

49334

+ next = NEXT_INSN (insn);

49335

+

49336

+ if (insert_nop)

49337

+ emit_insn_before (gen_nop (), next);

49338

+ }

49339

+

49340

+ return 0;

49341

+}

49342

+

49343

+struct rtl_opt_pass pass_work_around_errata =

49344

+{

49345

+ {

49346

+ RTL_PASS,

49347

+ "errata", /* name */

49348

+ OPTGROUP_NONE, /* optinfo_flags */

49349

+ sparc_gate_work_around_errata, /* gate */

49350

+ sparc_do_work_around_errata, /* execute */

49351

+ NULL, /* sub */

49352

+ NULL, /* next */

49353

+ 0, /* static_pass_number */

49354

+ TV_MACH_DEP, /* tv_id */

49355

+ 0, /* properties_required */

49356

+ 0, /* properties_provided */

49357

+ 0, /* properties_destroyed */

49358

+ 0, /* todo_flags_start */

49359

+ TODO_verify_rtl_sharing, /* todo_flags_finish */

49360

+ }

49361

+};

49362

+

49363

+struct register_pass_info insert_pass_work_around_errata =

49364

+{

49365

+ &pass_work_around_errata.pass, /* pass */

49366

+ "dbr", /* reference_pass_name */

49367

+ 1, /* ref_pass_instance_number */

49368

+ PASS_POS_INSERT_AFTER /* po_op */

49369

+};

49370

+

49371

+/* Helpers for TARGET_DEBUG_OPTIONS. */

49372

static void

49373

dump_target_flag_bits (const int flags)

49374

{

49375

@@ -888,6 +1209,7 @@

49376

{ TARGET_CPU_supersparc, PROCESSOR_SUPERSPARC },

49377

{ TARGET_CPU_hypersparc, PROCESSOR_HYPERSPARC },

49378

{ TARGET_CPU_leon, PROCESSOR_LEON },

49379

+ { TARGET_CPU_leon3, PROCESSOR_LEON3 },

49380

{ TARGET_CPU_sparclite, PROCESSOR_F930 },

49381

{ TARGET_CPU_sparclite86x, PROCESSOR_SPARCLITE86X },

49382

{ TARGET_CPU_sparclet, PROCESSOR_TSC701 },

49383

@@ -902,7 +1224,7 @@

49384

};

49385

const struct cpu_default *def;

49386

/* Table of values for -m{cpu,tune}=. This must match the order of

49387

- the PROCESSOR_* enumeration. */

49388

+ the enum processor_type in sparc-opts.h. */

49389

static struct cpu_table {

49390

const char *const name;

49391

const int disable;

49392

@@ -914,8 +1236,8 @@

49393

/* TI TMS390Z55 supersparc */

49394

{ "supersparc", MASK_ISA, MASK_V8 },

49395

{ "hypersparc", MASK_ISA, MASK_V8|MASK_FPU },

49396

- /* LEON */

49397

- { "leon", MASK_ISA, MASK_V8|MASK_FPU },

49398

+ { "leon", MASK_ISA, MASK_V8|MASK_LEON|MASK_FPU },

49399

+ { "leon3", MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU },

49400

{ "sparclite", MASK_ISA, MASK_SPARCLITE },

49401

/* The Fujitsu MB86930 is the original sparclite chip, with no FPU. */

49402

{ "f930", MASK_ISA|MASK_FPU, MASK_SPARCLITE },

49403

@@ -1075,6 +1397,9 @@

49404

#ifndef HAVE_AS_SPARC4

49405

& ~MASK_CBCOND

49406

#endif

49407

+#ifndef HAVE_AS_LEON

49408

+ & ~(MASK_LEON | MASK_LEON3)

49409

+#endif

49410

);

49411

49412

/* If -mfpu or -mno-fpu was explicitly used, don't override with

49413

@@ -1164,6 +1489,9 @@

49414

case PROCESSOR_LEON:

49415

sparc_costs = &leon_costs;

49416

break;

49417

+ case PROCESSOR_LEON3:

49418

+ sparc_costs = &leon3_costs;

49419

+ break;

49420

case PROCESSOR_SPARCLET:

49421

case PROCESSOR_TSC701:

49422

sparc_costs = &sparclet_costs;

49423

@@ -1200,6 +1528,10 @@

49424

/* Choose the most relaxed model for the processor. */

49425

else if (TARGET_V9)

49426

sparc_memory_model = SMM_RMO;

49427

+ else if (TARGET_LEON3)

49428

+ sparc_memory_model = SMM_TSO;

49429

+ else if (TARGET_LEON)

49430

+ sparc_memory_model = SMM_SC;

49431

else if (TARGET_V8)

49432

sparc_memory_model = SMM_PSO;

49433

else

49434

@@ -1241,6 +1573,13 @@

49435

pessimizes for double floating-point registers. */

49436

if (!global_options_set.x_flag_ira_share_save_slots)

49437

flag_ira_share_save_slots = 0;

49438

+

49439

+ /* We register a machine specific pass to work around errata, if any.

49440

+ The pass mut be scheduled as late as possible so that we have the

49441

+ (essentially) final form of the insn stream to work on.

49442

+ Registering the pass must be done at start up. It's convenient to

49443

+ do it here. */

49444

+ register_pass (&insert_pass_work_around_errata);

49445

}

49446

49447

/* Miscellaneous utilities. */

49448

@@ -3090,10 +3429,13 @@

49449

/* Return nonzero if TRIAL can go into the call delay slot. */

49450

49451

int

49452

-tls_call_delay (rtx trial)

49453

+eligible_for_call_delay (rtx trial)

49454

{

49455

rtx pat;

49456

49457

+ if (get_attr_in_branch_delay (trial) == IN_BRANCH_DELAY_FALSE)

49458

+ return 0;

49459

+

49460

/* Binutils allows

49461

call __tls_get_addr, %tgd_call (foo)

49462

add %l7, %o0, %o0, %tgd_add (foo)

49463

@@ -3175,11 +3517,7 @@

49464

49465

/* If we have the 'return' instruction, anything that does not use

49466

local or output registers and can go into a delay slot wins. */

49467

- else if (return_p

49468

- && TARGET_V9

49469

- && !epilogue_renumber (&pat, 1)

49470

- && get_attr_in_uncond_branch_delay (trial)

49471

- == IN_UNCOND_BRANCH_DELAY_TRUE)

49472

+ else if (return_p && TARGET_V9 && !epilogue_renumber (&pat, 1))

49473

return 1;

49474

49475

/* The 'restore src1,src2,dest' pattern for SImode. */

49476

@@ -3222,22 +3560,21 @@

49477

int regno;

49478

rtx pat;

49479

49480

- if (GET_CODE (trial) != INSN)

49481

- return 0;

49482

-

49483

- if (get_attr_length (trial) != 1)

49484

- return 0;

49485

-

49486

/* If the function uses __builtin_eh_return, the eh_return machinery

49487

occupies the delay slot. */

49488

if (crtl->calls_eh_return)

49489

return 0;

49490

49491

+ if (get_attr_in_branch_delay (trial) == IN_BRANCH_DELAY_FALSE)

49492

+ return 0;

49493

+

49494

/* In the case of a leaf or flat function, anything can go into the slot. */

49495

if (sparc_leaf_function_p || TARGET_FLAT)

49496

- return

49497

- get_attr_in_uncond_branch_delay (trial) == IN_UNCOND_BRANCH_DELAY_TRUE;

49498

+ return 1;

49499

49500

+ if (!NONJUMP_INSN_P (trial))

49501

+ return 0;

49502

+

49503

pat = PATTERN (trial);

49504

if (GET_CODE (pat) == PARALLEL)

49505

{

49506

@@ -3256,9 +3593,7 @@

49507

if (regno >= 8 && regno < 24)

49508

return 0;

49509

}

49510

- return !epilogue_renumber (&pat, 1)

49511

- && (get_attr_in_uncond_branch_delay (trial)

49512

- == IN_UNCOND_BRANCH_DELAY_TRUE);

49513

+ return !epilogue_renumber (&pat, 1);

49514

}

49515

49516

if (GET_CODE (pat) != SET)

49517

@@ -3278,10 +3613,7 @@

49518

instruction, it can probably go in. But restore will not work

49519

with FP_REGS. */

49520

if (! SPARC_INT_REG_P (regno))

49521

- return (TARGET_V9

49522

- && !epilogue_renumber (&pat, 1)

49523

- && get_attr_in_uncond_branch_delay (trial)

49524

- == IN_UNCOND_BRANCH_DELAY_TRUE);

49525

+ return TARGET_V9 && !epilogue_renumber (&pat, 1);

49526

49527

return eligible_for_restore_insn (trial, true);

49528

}

49529

@@ -3293,10 +3625,10 @@

49530

{

49531

rtx pat;

49532

49533

- if (GET_CODE (trial) != INSN || GET_CODE (PATTERN (trial)) != SET)

49534

+ if (get_attr_in_branch_delay (trial) == IN_BRANCH_DELAY_FALSE)

49535

return 0;

49536

49537

- if (get_attr_length (trial) != 1)

49538

+ if (!NONJUMP_INSN_P (trial))

49539

return 0;

49540

49541

pat = PATTERN (trial);

49542

@@ -3315,6 +3647,9 @@

49543

return 1;

49544

}

49545

49546

+ if (GET_CODE (pat) != SET)

49547

+ return 0;

49548

+

49549

/* Otherwise, only operations which can be done in tandem with

49550

a `restore' insn can go into the delay slot. */

49551

if (GET_CODE (SET_DEST (pat)) != REG

49552

@@ -10355,7 +10690,8 @@

49553

tmp = e0.add_with_sign (tmp, false, &add1_ovf);

49554

if (tmp.is_negative ())

49555

tmp = tmp.neg_with_overflow (&neg2_ovf);

49556

-

49557

+ else

49558

+ neg2_ovf = false;

49559

result = result.add_with_sign (tmp, false, &add2_ovf);

49560

overflow |= neg1_ovf | neg2_ovf | add1_ovf | add2_ovf;

49561

}

49562

@@ -10897,107 +11233,6 @@

49563

return (vcall_offset >= -32768 || ! fixed_regs[5]);

49564

}

49565

49566

-/* We use the machine specific reorg pass to enable workarounds for errata. */

49567

-

49568

-static void

49569

-sparc_reorg (void)

49570

-{

49571

- rtx insn, next;

49572

-

49573

- /* The only erratum we handle for now is that of the AT697F processor. */

49574

- if (!sparc_fix_at697f)

49575

- return;

49576

-

49577

- /* We need to have the (essentially) final form of the insn stream in order

49578

- to properly detect the various hazards. Run delay slot scheduling. */

49579

- if (optimize > 0 && flag_delayed_branch)

49580

- {

49581

- cleanup_barriers ();

49582

- dbr_schedule (get_insns ());

49583

- }

49584

-

49585

- /* Now look for specific patterns in the insn stream. */

49586

- for (insn = get_insns (); insn; insn = next)

49587

- {

49588

- bool insert_nop = false;

49589

- rtx set;

49590

-

49591

- /* Look for a single-word load into an odd-numbered FP register. */

49592

- if (NONJUMP_INSN_P (insn)

49593

- && (set = single_set (insn)) != NULL_RTX

49594

- && GET_MODE_SIZE (GET_MODE (SET_SRC (set))) == 4

49595

- && MEM_P (SET_SRC (set))

49596

- && REG_P (SET_DEST (set))

49597

- && REGNO (SET_DEST (set)) > 31

49598

- && REGNO (SET_DEST (set)) % 2 != 0)

49599

- {

49600

- /* The wrong dependency is on the enclosing double register. */

49601

- unsigned int x = REGNO (SET_DEST (set)) - 1;

49602

- unsigned int src1, src2, dest;

49603

- int code;

49604

-

49605

- /* If the insn has a delay slot, then it cannot be problematic. */

49606

- next = next_active_insn (insn);

49607

- if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)

49608

- code = -1;

49609

- else

49610

- {

49611

- extract_insn (next);

49612

- code = INSN_CODE (next);

49613

- }

49614

-

49615

- switch (code)

49616

- {

49617

- case CODE_FOR_adddf3:

49618

- case CODE_FOR_subdf3:

49619

- case CODE_FOR_muldf3:

49620

- case CODE_FOR_divdf3:

49621

- dest = REGNO (recog_data.operand[0]);

49622

- src1 = REGNO (recog_data.operand[1]);

49623

- src2 = REGNO (recog_data.operand[2]);

49624

- if (src1 != src2)

49625

- {

49626

- /* Case [1-4]:

49627

- ld [address], %fx+1

49628

- FPOPd %f{x,y}, %f{y,x}, %f{x,y} */

49629

- if ((src1 == x || src2 == x)

49630

- && (dest == src1 || dest == src2))

49631

- insert_nop = true;

49632

- }

49633

- else

49634

- {

49635

- /* Case 5:

49636

- ld [address], %fx+1

49637

- FPOPd %fx, %fx, %fx */

49638

- if (src1 == x

49639

- && dest == src1

49640

- && (code == CODE_FOR_adddf3 || code == CODE_FOR_muldf3))

49641

- insert_nop = true;

49642

- }

49643

- break;

49644

-

49645

- case CODE_FOR_sqrtdf2:

49646

- dest = REGNO (recog_data.operand[0]);

49647

- src1 = REGNO (recog_data.operand[1]);

49648

- /* Case 6:

49649

- ld [address], %fx+1

49650

- fsqrtd %fx, %fx */

49651

- if (src1 == x && dest == src1)

49652

- insert_nop = true;

49653

- break;

49654

-

49655

- default:

49656

- break;

49657

- }

49658

- }

49659

- else

49660

- next = NEXT_INSN (insn);

49661

-

49662

- if (insert_nop)

49663

- emit_insn_after (gen_nop (), insn);

49664

- }

49665

-}

49666

-

49667

/* How to allocate a 'struct machine_function'. */

49668

49669

static struct machine_function *

49670

Index: gcc/config/sparc/leon.md

49671

===================================================================

49672

--- a/src/gcc/config/sparc/leon.md (.../tags/gcc_4_8_2_release)

49673

+++ b/src/gcc/config/sparc/leon.md (.../branches/gcc-4_8-branch)

49674

@@ -17,40 +17,48 @@

49675

;; along with GCC; see the file COPYING3. If not see

49676

;; <http://www.gnu.org/licenses/>.

49677

49678

+;; Leon is a single-issue processor.

49679

49680

(define_automaton "leon")

49681

49682

-(define_cpu_unit "leon_memory, leon_fpalu" "leon")

49683

-(define_cpu_unit "leon_fpmds" "leon")

49684

-(define_cpu_unit "write_buf" "leon")

49685

+(define_cpu_unit "leon_memory" "leon")

49686

49687

(define_insn_reservation "leon_load" 1

49688

- (and (eq_attr "cpu" "leon")

49689

- (eq_attr "type" "load,sload,fpload"))

49690

+ (and (eq_attr "cpu" "leon") (eq_attr "type" "load,sload"))

49691

"leon_memory")

49692

49693

-(define_insn_reservation "leon_store" 1

49694

- (and (eq_attr "cpu" "leon")

49695

- (eq_attr "type" "store,fpstore"))

49696

- "leon_memory+write_buf")

49697

-

49698

-(define_insn_reservation "leon_fp_alu" 1

49699

- (and (eq_attr "cpu" "leon")

49700

- (eq_attr "type" "fp,fpmove"))

49701

- "leon_fpalu, nothing")

49702

+;; Use a double reservation to work around the load pipeline hazard on UT699.

49703

+(define_insn_reservation "leon3_load" 1

49704

+ (and (eq_attr "cpu" "leon3") (eq_attr "type" "load,sload"))

49705

+ "leon_memory*2")

49706

49707

-(define_insn_reservation "leon_fp_mult" 1

49708

- (and (eq_attr "cpu" "leon")

49709

- (eq_attr "type" "fpmul"))

49710

- "leon_fpmds, nothing")

49711

+(define_insn_reservation "leon_store" 2

49712

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "store"))

49713

+ "leon_memory*2")

49714

49715

-(define_insn_reservation "leon_fp_div" 16

49716

- (and (eq_attr "cpu" "leon")

49717

- (eq_attr "type" "fpdivs,fpdivd"))

49718

- "leon_fpmds, nothing*15")

49719

+;; This describes Gaisler Research's FPU

49720

49721

-(define_insn_reservation "leon_fp_sqrt" 23

49722

- (and (eq_attr "cpu" "leon")

49723

- (eq_attr "type" "fpsqrts,fpsqrtd"))

49724

- "leon_fpmds, nothing*21")

49725

+(define_automaton "grfpu")

49726

49727

+(define_cpu_unit "grfpu_alu" "grfpu")

49728

+(define_cpu_unit "grfpu_ds" "grfpu")

49729

+

49730

+(define_insn_reservation "leon_fp_alu" 4

49731

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fp,fpcmp,fpmul"))

49732

+ "grfpu_alu, nothing*3")

49733

+

49734

+(define_insn_reservation "leon_fp_divs" 16

49735

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpdivs"))

49736

+ "grfpu_ds*14, nothing*2")

49737

+

49738

+(define_insn_reservation "leon_fp_divd" 17

49739

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpdivd"))

49740

+ "grfpu_ds*15, nothing*2")

49741

+

49742

+(define_insn_reservation "leon_fp_sqrts" 24

49743

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpsqrts"))

49744

+ "grfpu_ds*22, nothing*2")

49745

+

49746

+(define_insn_reservation "leon_fp_sqrtd" 25

49747

+ (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpsqrtd"))

49748

+ "grfpu_ds*23, nothing*2")

49749

Index: gcc/config/sparc/sparc.h

49750

===================================================================

49751

--- a/src/gcc/config/sparc/sparc.h (.../tags/gcc_4_8_2_release)

49752

+++ b/src/gcc/config/sparc/sparc.h (.../branches/gcc-4_8-branch)

49753

@@ -136,21 +136,22 @@

49754

#define TARGET_CPU_supersparc 2

49755

#define TARGET_CPU_hypersparc 3

49756

#define TARGET_CPU_leon 4

49757

-#define TARGET_CPU_sparclite 5

49758

-#define TARGET_CPU_f930 5 /* alias */

49759

-#define TARGET_CPU_f934 5 /* alias */

49760

-#define TARGET_CPU_sparclite86x 6

49761

-#define TARGET_CPU_sparclet 7

49762

-#define TARGET_CPU_tsc701 7 /* alias */

49763

-#define TARGET_CPU_v9 8 /* generic v9 implementation */

49764

-#define TARGET_CPU_sparcv9 8 /* alias */

49765

-#define TARGET_CPU_sparc64 8 /* alias */

49766

-#define TARGET_CPU_ultrasparc 9

49767

-#define TARGET_CPU_ultrasparc3 10

49768

-#define TARGET_CPU_niagara 11

49769

-#define TARGET_CPU_niagara2 12

49770

-#define TARGET_CPU_niagara3 13

49771

-#define TARGET_CPU_niagara4 14

49772

+#define TARGET_CPU_leon3 5

49773

+#define TARGET_CPU_sparclite 6

49774

+#define TARGET_CPU_f930 6 /* alias */

49775

+#define TARGET_CPU_f934 6 /* alias */

49776

+#define TARGET_CPU_sparclite86x 7

49777

+#define TARGET_CPU_sparclet 8

49778

+#define TARGET_CPU_tsc701 8 /* alias */

49779

+#define TARGET_CPU_v9 9 /* generic v9 implementation */

49780

+#define TARGET_CPU_sparcv9 9 /* alias */

49781

+#define TARGET_CPU_sparc64 9 /* alias */

49782

+#define TARGET_CPU_ultrasparc 10

49783

+#define TARGET_CPU_ultrasparc3 11

49784

+#define TARGET_CPU_niagara 12

49785

+#define TARGET_CPU_niagara2 13

49786

+#define TARGET_CPU_niagara3 14

49787

+#define TARGET_CPU_niagara4 15

49788

49789

#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \

49790

|| TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \

49791

@@ -232,9 +233,10 @@

49792

#define ASM_CPU32_DEFAULT_SPEC ""

49793

#endif

49794

49795

-#if TARGET_CPU_DEFAULT == TARGET_CPU_leon

49796

+#if TARGET_CPU_DEFAULT == TARGET_CPU_leon \

49797

+ || TARGET_CPU_DEFAULT == TARGET_CPU_leon3

49798

#define CPP_CPU32_DEFAULT_SPEC "-D__leon__ -D__sparc_v8__"

49799

-#define ASM_CPU32_DEFAULT_SPEC ""

49800

+#define ASM_CPU32_DEFAULT_SPEC AS_LEON_FLAG

49801

#endif

49802

49803

#endif

49804

@@ -282,6 +284,7 @@

49805

%{mcpu=supersparc:-D__supersparc__ -D__sparc_v8__} \

49806

%{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \

49807

%{mcpu=leon:-D__leon__ -D__sparc_v8__} \

49808

+%{mcpu=leon3:-D__leon__ -D__sparc_v8__} \

49809

%{mcpu=v9:-D__sparc_v9__} \

49810

%{mcpu=ultrasparc:-D__sparc_v9__} \

49811

%{mcpu=ultrasparc3:-D__sparc_v9__} \

49812

@@ -329,7 +332,8 @@

49813

%{mcpu=v8:-Av8} \

49814

%{mcpu=supersparc:-Av8} \

49815

%{mcpu=hypersparc:-Av8} \

49816

-%{mcpu=leon:-Av8} \

49817

+%{mcpu=leon:" AS_LEON_FLAG "} \

49818

+%{mcpu=leon3:" AS_LEON_FLAG "} \

49819

%{mv8plus:-Av8plus} \

49820

%{mcpu=v9:-Av9} \

49821

%{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \

49822

@@ -1754,6 +1758,12 @@

49823

#define AS_NIAGARA4_FLAG "-Av9" AS_NIAGARA3_FLAG

49824

#endif

49825

49826

+#ifdef HAVE_AS_LEON

49827

+#define AS_LEON_FLAG "-Aleon"

49828

+#else

49829

+#define AS_LEON_FLAG "-Av8"

49830

+#endif

49831

+

49832

/* We use gcc _mcount for profiling. */

49833

#define NO_PROFILE_COUNTERS 0

49834

49835

Index: gcc/config/i386/i386.h

49836

===================================================================

49837

--- a/src/gcc/config/i386/i386.h (.../tags/gcc_4_8_2_release)

49838

+++ b/src/gcc/config/i386/i386.h (.../branches/gcc-4_8-branch)

49839

@@ -197,10 +197,10 @@

49840

49841

/* Macros used in the machine description to test the flags. */

49842

49843

-/* configure can arrange to make this 2, to force a 486. */

49844

+/* configure can arrange to change it. */

49845

49846

#ifndef TARGET_CPU_DEFAULT

49847

-#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_generic

49848

+#define TARGET_CPU_DEFAULT PROCESSOR_GENERIC32

49849

#endif

49850

49851

#ifndef TARGET_FPMATH_DEFAULT

49852

@@ -591,43 +591,6 @@

49853

/* Target Pragmas. */

49854

#define REGISTER_TARGET_PRAGMAS() ix86_register_pragmas ()

49855

49856

-enum target_cpu_default

49857

-{

49858

- TARGET_CPU_DEFAULT_generic = 0,

49859

-

49860

- TARGET_CPU_DEFAULT_i386,

49861

- TARGET_CPU_DEFAULT_i486,

49862

- TARGET_CPU_DEFAULT_pentium,

49863

- TARGET_CPU_DEFAULT_pentium_mmx,

49864

- TARGET_CPU_DEFAULT_pentiumpro,

49865

- TARGET_CPU_DEFAULT_pentium2,

49866

- TARGET_CPU_DEFAULT_pentium3,

49867

- TARGET_CPU_DEFAULT_pentium4,

49868

- TARGET_CPU_DEFAULT_pentium_m,

49869

- TARGET_CPU_DEFAULT_prescott,

49870

- TARGET_CPU_DEFAULT_nocona,

49871

- TARGET_CPU_DEFAULT_core2,

49872

- TARGET_CPU_DEFAULT_corei7,

49873

- TARGET_CPU_DEFAULT_haswell,

49874

- TARGET_CPU_DEFAULT_atom,

49875

-

49876

- TARGET_CPU_DEFAULT_geode,

49877

- TARGET_CPU_DEFAULT_k6,

49878

- TARGET_CPU_DEFAULT_k6_2,

49879

- TARGET_CPU_DEFAULT_k6_3,

49880

- TARGET_CPU_DEFAULT_athlon,

49881

- TARGET_CPU_DEFAULT_athlon_sse,

49882

- TARGET_CPU_DEFAULT_k8,

49883

- TARGET_CPU_DEFAULT_amdfam10,

49884

- TARGET_CPU_DEFAULT_bdver1,

49885

- TARGET_CPU_DEFAULT_bdver2,

49886

- TARGET_CPU_DEFAULT_bdver3,

49887

- TARGET_CPU_DEFAULT_btver1,

49888

- TARGET_CPU_DEFAULT_btver2,

49889

-

49890

- TARGET_CPU_DEFAULT_max

49891

-};

49892

-

49893

#ifndef CC1_SPEC

49894

#define CC1_SPEC "%(cc1_cpu) "

49895

#endif

49896

@@ -2089,25 +2052,27 @@

49897

with x86-64 medium memory model */

49898

#define DEFAULT_LARGE_SECTION_THRESHOLD 65536

49899

49900

-/* Which processor to tune code generation for. */

49901

+/* Which processor to tune code generation for. These must be in sync

49902

+ with processor_target_table in i386.c. */

49903

49904

enum processor_type

49905

{

49906

- PROCESSOR_I386 = 0, /* 80386 */

49907

+ PROCESSOR_GENERIC32 = 0,

49908

+ PROCESSOR_GENERIC64,

49909

+ PROCESSOR_I386, /* 80386 */

49910

PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */

49911

PROCESSOR_PENTIUM,

49912

PROCESSOR_PENTIUMPRO,

49913

- PROCESSOR_GEODE,

49914

- PROCESSOR_K6,

49915

- PROCESSOR_ATHLON,

49916

PROCESSOR_PENTIUM4,

49917

- PROCESSOR_K8,

49918

PROCESSOR_NOCONA,

49919

PROCESSOR_CORE2,

49920

PROCESSOR_COREI7,

49921

PROCESSOR_HASWELL,

49922

- PROCESSOR_GENERIC32,

49923

- PROCESSOR_GENERIC64,

49924

+ PROCESSOR_ATOM,

49925

+ PROCESSOR_GEODE,

49926

+ PROCESSOR_K6,

49927

+ PROCESSOR_ATHLON,

49928

+ PROCESSOR_K8,

49929

PROCESSOR_AMDFAM10,

49930

PROCESSOR_BDVER1,

49931

PROCESSOR_BDVER2,

49932

@@ -2114,7 +2079,6 @@

49933

PROCESSOR_BDVER3,

49934

PROCESSOR_BTVER1,

49935

PROCESSOR_BTVER2,

49936

- PROCESSOR_ATOM,

49937

PROCESSOR_max

49938

};

49939

49940

Index: gcc/config/i386/i386.md

49941

===================================================================

49942

--- a/src/gcc/config/i386/i386.md (.../tags/gcc_4_8_2_release)

49943

+++ b/src/gcc/config/i386/i386.md (.../branches/gcc-4_8-branch)

49944

@@ -363,6 +363,13 @@

49945

(const_string "unknown")]

49946

(const_string "integer")))

49947

49948

+;; The minimum required alignment of vector mode memory operands of the SSE

49949

+;; (non-VEX/EVEX) instruction in bits, if it is different from

49950

+;; GET_MODE_ALIGNMENT of the operand, otherwise 0. If an instruction has

49951

+;; multiple alternatives, this should be conservative maximum of those minimum

49952

+;; required alignments.

49953

+(define_attr "ssememalign" "" (const_int 0))

49954

+

49955

;; The (bounding maximum) length of an instruction immediate.

49956

(define_attr "length_immediate" ""

49957

(cond [(eq_attr "type" "incdec,setcc,icmov,str,lea,other,multi,idiv,leave,

49958

@@ -1570,7 +1577,7 @@

49959

split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]);

49960

49961

operands[1] = gen_lowpart (DImode, operands[2]);

49962

- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx,

49963

+ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx,

49964

GEN_INT (4)));

49965

})

49966

49967

@@ -1587,7 +1594,7 @@

49968

split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]);

49969

49970

operands[1] = gen_lowpart (DImode, operands[2]);

49971

- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx,

49972

+ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx,

49973

GEN_INT (4)));

49974

})

49975

49976

@@ -2715,7 +2722,20 @@

49977

"reload_completed"

49978

[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))

49979

(set (mem:SF (reg:P SP_REG)) (match_dup 1))]

49980

- "operands[2] = GEN_INT (-GET_MODE_SIZE (<P:MODE>mode));")

49981

+{

49982

+ rtx op = XEXP (operands[0], 0);

49983

+ if (GET_CODE (op) == PRE_DEC)

49984

+ {

49985

+ gcc_assert (!TARGET_64BIT);

49986

+ op = GEN_INT (-4);

49987

+ }

49988

+ else

49989

+ {

49990

+ op = XEXP (XEXP (op, 1), 1);

49991

+ gcc_assert (CONST_INT_P (op));

49992

+ }

49993

+ operands[2] = op;

49994

+})

49995

49996

(define_split

49997

[(set (match_operand:SF 0 "push_operand")

49998

@@ -5443,6 +5463,12 @@

49999

mode = SImode;

50000

50001

ix86_split_lea_for_addr (curr_insn, operands, mode);

50002

+

50003

+ /* Zero-extend return register to DImode for zero-extended addresses. */

50004

+ if (mode != <MODE>mode)

50005

+ emit_insn (gen_zero_extendsidi2

50006

+ (operands[0], gen_lowpart (mode, operands[0])));

50007

+

50008

DONE;

50009

}

50010

[(set_attr "type" "lea")

50011

@@ -6589,7 +6615,7 @@

50012

(set_attr "use_carry" "1")

50013

(set_attr "mode" "<MODE>")])

50014

50015

-;; Overflow setting add and subtract instructions

50016

+;; Overflow setting add instructions

50017

50018

(define_insn "*add<mode>3_cconly_overflow"

50019

[(set (reg:CCC FLAGS_REG)

50020

@@ -6604,43 +6630,31 @@

50021

[(set_attr "type" "alu")

50022

(set_attr "mode" "<MODE>")])

50023

50024

-(define_insn "*sub<mode>3_cconly_overflow"

50025

+(define_insn "*add<mode>3_cc_overflow"

50026

[(set (reg:CCC FLAGS_REG)

50027

(compare:CCC

50028

- (minus:SWI

50029

- (match_operand:SWI 0 "nonimmediate_operand" "<r>m,<r>")

50030

- (match_operand:SWI 1 "<general_operand>" "<r><i>,<r>m"))

50031

- (match_dup 0)))]

50032

- ""

50033

- "cmp{<imodesuffix>}\t{%1, %0|%0, %1}"

50034

- [(set_attr "type" "icmp")

50035

- (set_attr "mode" "<MODE>")])

50036

-

50037

-(define_insn "*<plusminus_insn><mode>3_cc_overflow"

50038

- [(set (reg:CCC FLAGS_REG)

50039

- (compare:CCC

50040

- (plusminus:SWI

50041

- (match_operand:SWI 1 "nonimmediate_operand" "<comm>0,0")

50042

+ (plus:SWI

50043

+ (match_operand:SWI 1 "nonimmediate_operand" "%0,0")

50044

(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))

50045

(match_dup 1)))

50046

(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")

50047

- (plusminus:SWI (match_dup 1) (match_dup 2)))]

50048

- "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"

50049

- "<plusminus_mnemonic>{<imodesuffix>}\t{%2, %0|%0, %2}"

50050

+ (plus:SWI (match_dup 1) (match_dup 2)))]

50051

+ "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"

50052

+ "add{<imodesuffix>}\t{%2, %0|%0, %2}"

50053

[(set_attr "type" "alu")

50054

(set_attr "mode" "<MODE>")])

50055

50056

-(define_insn "*<plusminus_insn>si3_zext_cc_overflow"

50057

+(define_insn "*addsi3_zext_cc_overflow"

50058

[(set (reg:CCC FLAGS_REG)

50059

(compare:CCC

50060

- (plusminus:SI

50061

- (match_operand:SI 1 "nonimmediate_operand" "<comm>0")

50062

+ (plus:SI

50063

+ (match_operand:SI 1 "nonimmediate_operand" "%0")

50064

(match_operand:SI 2 "x86_64_general_operand" "rme"))

50065

(match_dup 1)))

50066

(set (match_operand:DI 0 "register_operand" "=r")

50067

- (zero_extend:DI (plusminus:SI (match_dup 1) (match_dup 2))))]

50068

- "TARGET_64BIT && ix86_binary_operator_ok (<CODE>, SImode, operands)"

50069

- "<plusminus_mnemonic>{l}\t{%2, %k0|%k0, %2}"

50070

+ (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]

50071

+ "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"

50072

+ "add{l}\t{%2, %k0|%k0, %2}"

50073

[(set_attr "type" "alu")

50074

(set_attr "mode" "SI")])

50075

50076

@@ -8012,7 +8026,18 @@

50077

(const_int 0)))

50078

(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,rm")

50079

(and:DI (match_dup 1) (match_dup 2)))]

50080

- "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)

50081

+ "TARGET_64BIT

50082

+ && ix86_match_ccmode

50083

+ (insn,

50084

+ /* If we are going to emit andl instead of andq, and the operands[2]

50085

+ constant might have the SImode sign bit set, make sure the sign

50086

+ flag isn't tested, because the instruction will set the sign flag

50087

+ based on bit 31 rather than bit 63. If it isn't CONST_INT,

50088

+ conservatively assume it might have bit 31 set. */

50089

+ (satisfies_constraint_Z (operands[2])

50090

+ && (!CONST_INT_P (operands[2])

50091

+ || val_signbit_known_set_p (SImode, INTVAL (operands[2]))))

50092

+ ? CCZmode : CCNOmode)

50093

&& ix86_binary_operator_ok (AND, DImode, operands)"

50094

"@

50095

and{l}\t{%k2, %k0|%k0, %k2}

50096

@@ -17569,7 +17594,13 @@

50097

(define_insn "trap"

50098

[(trap_if (const_int 1) (const_int 6))]

50099

""

50100

- { return ASM_SHORT "0x0b0f"; }

50101

+{

50102

+#ifdef HAVE_AS_IX86_UD2

50103

+ return "ud2";

50104

+#else

50105

+ return ASM_SHORT "0x0b0f";

50106

+#endif

50107

+}

50108

[(set_attr "length" "2")])

50109

50110

(define_expand "prefetch"

50111

Index: gcc/config/i386/f16cintrin.h

50112

===================================================================

50113

--- a/src/gcc/config/i386/f16cintrin.h (.../tags/gcc_4_8_2_release)

50114

+++ b/src/gcc/config/i386/f16cintrin.h (.../branches/gcc-4_8-branch)

50115

@@ -35,7 +35,7 @@

50116

extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))

50117

_cvtsh_ss (unsigned short __S)

50118

{

50119

- __v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 };

50120

+ __v8hi __H = __extension__ (__v8hi){ (short) __S, 0, 0, 0, 0, 0, 0, 0 };

50121

__v4sf __A = __builtin_ia32_vcvtph2ps (__H);

50122

return __builtin_ia32_vec_ext_v4sf (__A, 0);

50123

}

50124

Index: gcc/config/i386/t-rtems

50125

===================================================================

50126

--- a/src/gcc/config/i386/t-rtems (.../tags/gcc_4_8_2_release)

50127

+++ b/src/gcc/config/i386/t-rtems (.../branches/gcc-4_8-branch)

50128

@@ -17,11 +17,10 @@

50129

# <http://www.gnu.org/licenses/>.

50130

#

50131

50132

-MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro \

50133

-msoft-float

50134

+MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro msoft-float

50135

MULTILIB_DIRNAMES= m486 mpentium mpentiumpro soft-float

50136

-MULTILIB_MATCHES = msoft-float=mno-m80387

50137

-MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?mathlon

50138

+MULTILIB_MATCHES = msoft-float=mno-80387

50139

+MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?athlon

50140

MULTILIB_EXCEPTIONS = \

50141

mtune=pentium/*msoft-float* \

50142

mtune=pentiumpro/*msoft-float*

50143

Index: gcc/config/i386/winnt.c

50144

===================================================================

50145

--- a/src/gcc/config/i386/winnt.c (.../tags/gcc_4_8_2_release)

50146

+++ b/src/gcc/config/i386/winnt.c (.../branches/gcc-4_8-branch)

50147

@@ -547,8 +547,9 @@

50148

sets 'discard' characteristic, rather than telling linker

50149

to warn of size or content mismatch, so do the same. */

50150

bool discard = (flags & SECTION_CODE)

50151

- || lookup_attribute ("selectany",

50152

- DECL_ATTRIBUTES (decl));

50153

+ || (TREE_CODE (decl) != IDENTIFIER_NODE

50154

+ && lookup_attribute ("selectany",

50155

+ DECL_ATTRIBUTES (decl)));

50156

fprintf (asm_out_file, "\t.linkonce %s\n",

50157

(discard ? "discard" : "same_size"));

50158

}

50159

Index: gcc/config/i386/sse.md

50160

===================================================================

50161

--- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_8_2_release)

50162

+++ b/src/gcc/config/i386/sse.md (.../branches/gcc-4_8-branch)

50163

@@ -605,6 +605,7 @@

50164

}

50165

[(set_attr "type" "ssemov")

50166

(set_attr "movu" "1")

50167

+ (set_attr "ssememalign" "8")

50168

(set_attr "prefix" "maybe_vex")

50169

(set (attr "mode")

50170

(cond [(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")

50171

@@ -634,6 +635,7 @@

50172

}

50173

[(set_attr "type" "ssemov")

50174

(set_attr "movu" "1")

50175

+ (set_attr "ssememalign" "8")

50176

(set_attr "prefix" "maybe_vex")

50177

(set (attr "mode")

50178

(cond [(ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")

50179

@@ -663,6 +665,7 @@

50180

}

50181

[(set_attr "type" "ssemov")

50182

(set_attr "movu" "1")

50183

+ (set_attr "ssememalign" "8")

50184

(set (attr "prefix_data16")

50185

(if_then_else

50186

(match_test "TARGET_AVX")

50187

@@ -696,6 +699,7 @@

50188

}

50189

[(set_attr "type" "ssemov")

50190

(set_attr "movu" "1")

50191

+ (set_attr "ssememalign" "8")

50192

(set (attr "prefix_data16")

50193

(if_then_else

50194

(match_test "TARGET_AVX")

50195

@@ -721,6 +725,7 @@

50196

"%vlddqu\t{%1, %0|%0, %1}"

50197

[(set_attr "type" "ssemov")

50198

(set_attr "movu" "1")

50199

+ (set_attr "ssememalign" "8")

50200

(set (attr "prefix_data16")

50201

(if_then_else

50202

(match_test "TARGET_AVX")

50203

@@ -1001,6 +1006,7 @@

50204

vrcpss\t{%1, %2, %0|%0, %2, %1}"

50205

[(set_attr "isa" "noavx,avx")

50206

(set_attr "type" "sse")

50207

+ (set_attr "ssememalign" "32")

50208

(set_attr "atom_sse_attr" "rcp")

50209

(set_attr "btver2_sse_attr" "rcp")

50210

(set_attr "prefix" "orig,vex")

50211

@@ -1089,6 +1095,7 @@

50212

vrsqrtss\t{%1, %2, %0|%0, %2, %1}"

50213

[(set_attr "isa" "noavx,avx")

50214

(set_attr "type" "sse")

50215

+ (set_attr "ssememalign" "32")

50216

(set_attr "prefix" "orig,vex")

50217

(set_attr "mode" "SF")])

50218

50219

@@ -2844,6 +2851,7 @@

50220

"%vcvtdq2pd\t{%1, %0|%0, %q1}"

50221

[(set_attr "type" "ssecvt")

50222

(set_attr "prefix" "maybe_vex")

50223

+ (set_attr "ssememalign" "64")

50224

(set_attr "mode" "V2DF")])

50225

50226

(define_insn "avx_cvtpd2dq256"

50227

@@ -3572,6 +3580,7 @@

50228

%vmovhps\t{%2, %0|%0, %2}"

50229

[(set_attr "isa" "noavx,avx,noavx,avx,*")

50230

(set_attr "type" "ssemov")

50231

+ (set_attr "ssememalign" "64")

50232

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

50233

(set_attr "mode" "V4SF,V4SF,V2SF,V2SF,V2SF")])

50234

50235

@@ -3617,6 +3626,7 @@

50236

%vmovlps\t{%2, %H0|%H0, %2}"

50237

[(set_attr "isa" "noavx,avx,noavx,avx,*")

50238

(set_attr "type" "ssemov")

50239

+ (set_attr "ssememalign" "64")

50240

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

50241

(set_attr "mode" "V4SF,V4SF,V2SF,V2SF,V2SF")])

50242

50243

@@ -3941,6 +3951,7 @@

50244

%vmovhlps\t{%1, %d0|%d0, %1}

50245

%vmovlps\t{%H1, %d0|%d0, %H1}"

50246

[(set_attr "type" "ssemov")

50247

+ (set_attr "ssememalign" "64")

50248

(set_attr "prefix" "maybe_vex")

50249

(set_attr "mode" "V2SF,V4SF,V2SF")])

50250

50251

@@ -3980,6 +3991,7 @@

50252

%vmovlps\t{%2, %H0|%H0, %2}"

50253

[(set_attr "isa" "noavx,avx,noavx,avx,*")

50254

(set_attr "type" "ssemov")

50255

+ (set_attr "ssememalign" "64")

50256

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

50257

(set_attr "mode" "V2SF,V2SF,V4SF,V4SF,V2SF")])

50258

50259

@@ -4033,6 +4045,7 @@

50260

%vmovlps\t{%2, %0|%0, %2}"

50261

[(set_attr "isa" "noavx,avx,noavx,avx,*")

50262

(set_attr "type" "sseshuf,sseshuf,ssemov,ssemov,ssemov")

50263

+ (set_attr "ssememalign" "64")

50264

(set_attr "length_immediate" "1,1,*,*,*")

50265

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex")

50266

(set_attr "mode" "V4SF,V4SF,V2SF,V2SF,V2SF")])

50267

@@ -4642,7 +4655,8 @@

50268

vmovlpd\t{%H1, %2, %0|%0, %2, %H1}

50269

%vmovhpd\t{%1, %0|%0, %1}"

50270

[(set_attr "isa" "noavx,avx,sse3,noavx,avx,*")

50271

- (set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")

50272

+ (set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")

50273

+ (set_attr "ssememalign" "64")

50274

(set_attr "prefix_data16" "*,*,*,1,*,1")

50275

(set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")

50276

(set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])

50277

@@ -4744,6 +4758,7 @@

50278

%vmovlpd\t{%2, %H0|%H0, %2}"

50279

[(set_attr "isa" "noavx,avx,sse3,noavx,avx,*")

50280

(set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")

50281

+ (set_attr "ssememalign" "64")

50282

(set_attr "prefix_data16" "*,*,*,1,*,1")

50283

(set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")

50284

(set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])

50285

@@ -4982,6 +4997,7 @@

50286

movhlps\t{%1, %0|%0, %1}

50287

movlps\t{%H1, %0|%0, %H1}"

50288

[(set_attr "type" "ssemov")

50289

+ (set_attr "ssememalign" "64")

50290

(set_attr "mode" "V2SF,V4SF,V2SF")])

50291

50292

;; Avoid combining registers from different units in a single alternative,

50293

@@ -5077,6 +5093,7 @@

50294

#"

50295

[(set_attr "isa" "noavx,avx,noavx,avx,*,*,*")

50296

(set_attr "type" "ssemov,ssemov,sselog,sselog,ssemov,fmov,imov")

50297

+ (set_attr "ssememalign" "64")

50298

(set_attr "prefix_data16" "1,*,*,*,*,*,*")

50299

(set_attr "prefix" "orig,vex,orig,vex,*,*,*")

50300

(set_attr "mode" "V1DF,V1DF,V2DF,V2DF,DF,DF,DF")])

50301

@@ -5145,6 +5162,7 @@

50302

(const_string "imov")

50303

]

50304

(const_string "ssemov")))

50305

+ (set_attr "ssememalign" "64")

50306

(set_attr "prefix_data16" "*,1,*,*,*,*,1,*,*,*,*")

50307

(set_attr "length_immediate" "*,*,*,*,*,1,*,*,*,*,*")

50308

(set_attr "prefix" "maybe_vex,orig,vex,orig,vex,orig,orig,vex,*,*,*")

50309

@@ -5189,6 +5207,7 @@

50310

(const_string "1")

50311

(const_string "*")))

50312

(set_attr "length_immediate" "*,*,*,*,*,1,*,*,*")

50313

+ (set_attr "ssememalign" "64")

50314

(set_attr "prefix" "orig,vex,orig,vex,maybe_vex,orig,orig,vex,maybe_vex")

50315

(set_attr "mode" "DF,DF,V1DF,V1DF,V1DF,V2DF,V1DF,V1DF,V1DF")])

50316

50317

@@ -8736,6 +8755,7 @@

50318

"TARGET_SSE4_1"

50319

"%vpmov<extsuffix>bw\t{%1, %0|%0, %q1}"

50320

[(set_attr "type" "ssemov")

50321

+ (set_attr "ssememalign" "64")

50322

(set_attr "prefix_extra" "1")

50323

(set_attr "prefix" "maybe_vex")

50324

(set_attr "mode" "TI")])

50325

@@ -8766,6 +8786,7 @@

50326

"TARGET_SSE4_1"

50327

"%vpmov<extsuffix>bd\t{%1, %0|%0, %k1}"

50328

[(set_attr "type" "ssemov")

50329

+ (set_attr "ssememalign" "32")

50330

(set_attr "prefix_extra" "1")

50331

(set_attr "prefix" "maybe_vex")

50332

(set_attr "mode" "TI")])

50333

@@ -8791,6 +8812,7 @@

50334

"TARGET_SSE4_1"

50335

"%vpmov<extsuffix>wd\t{%1, %0|%0, %q1}"

50336

[(set_attr "type" "ssemov")

50337

+ (set_attr "ssememalign" "64")

50338

(set_attr "prefix_extra" "1")

50339

(set_attr "prefix" "maybe_vex")

50340

(set_attr "mode" "TI")])

50341

@@ -8818,6 +8840,7 @@

50342

"TARGET_SSE4_1"

50343

"%vpmov<extsuffix>bq\t{%1, %0|%0, %w1}"

50344

[(set_attr "type" "ssemov")

50345

+ (set_attr "ssememalign" "16")

50346

(set_attr "prefix_extra" "1")

50347

(set_attr "prefix" "maybe_vex")

50348

(set_attr "mode" "TI")])

50349

@@ -8845,6 +8868,7 @@

50350

"TARGET_SSE4_1"

50351

"%vpmov<extsuffix>wq\t{%1, %0|%0, %k1}"

50352

[(set_attr "type" "ssemov")

50353

+ (set_attr "ssememalign" "32")

50354

(set_attr "prefix_extra" "1")

50355

(set_attr "prefix" "maybe_vex")

50356

(set_attr "mode" "TI")])

50357

@@ -8868,6 +8892,7 @@

50358

"TARGET_SSE4_1"

50359

"%vpmov<extsuffix>dq\t{%1, %0|%0, %q1}"

50360

[(set_attr "type" "ssemov")

50361

+ (set_attr "ssememalign" "64")

50362

(set_attr "prefix_extra" "1")

50363

(set_attr "prefix" "maybe_vex")

50364

(set_attr "mode" "TI")])

50365

@@ -9151,6 +9176,7 @@

50366

[(set_attr "type" "sselog")

50367

(set_attr "prefix_data16" "1")

50368

(set_attr "prefix_extra" "1")

50369

+ (set_attr "ssememalign" "8")

50370

(set_attr "length_immediate" "1")

50371

(set_attr "memory" "none,load")

50372

(set_attr "mode" "TI")])

50373

@@ -9213,6 +9239,7 @@

50374

[(set_attr "type" "sselog")

50375

(set_attr "prefix_data16" "1")

50376

(set_attr "prefix_extra" "1")

50377

+ (set_attr "ssememalign" "8")

50378

(set_attr "length_immediate" "1")

50379

(set_attr "memory" "load")

50380

(set_attr "mode" "TI")])

50381

@@ -9240,6 +9267,7 @@

50382

(set_attr "prefix_data16" "1")

50383

(set_attr "prefix_extra" "1")

50384

(set_attr "prefix" "maybe_vex")

50385

+ (set_attr "ssememalign" "8")

50386

(set_attr "length_immediate" "1")

50387

(set_attr "btver2_decode" "vector")

50388

(set_attr "memory" "none,load")

50389

@@ -9267,6 +9295,7 @@

50390

[(set_attr "type" "sselog")

50391

(set_attr "prefix_data16" "1")

50392

(set_attr "prefix_extra" "1")

50393

+ (set_attr "ssememalign" "8")

50394

(set_attr "length_immediate" "1")

50395

(set_attr "prefix" "maybe_vex")

50396

(set_attr "btver2_decode" "vector")

50397

@@ -9293,6 +9322,7 @@

50398

[(set_attr "type" "sselog")

50399

(set_attr "prefix_data16" "1")

50400

(set_attr "prefix_extra" "1")

50401

+ (set_attr "ssememalign" "8")

50402

(set_attr "length_immediate" "1")

50403

(set_attr "memory" "none,load,none,load")

50404

(set_attr "btver2_decode" "vector,vector,vector,vector")

50405

@@ -9346,6 +9376,7 @@

50406

[(set_attr "type" "sselog")

50407

(set_attr "prefix_data16" "1")

50408

(set_attr "prefix_extra" "1")

50409

+ (set_attr "ssememalign" "8")

50410

(set_attr "length_immediate" "1")

50411

(set_attr "memory" "none,load")

50412

(set_attr "mode" "TI")])

50413

@@ -9399,6 +9430,7 @@

50414

[(set_attr "type" "sselog")

50415

(set_attr "prefix_data16" "1")

50416

(set_attr "prefix_extra" "1")

50417

+ (set_attr "ssememalign" "8")

50418

(set_attr "length_immediate" "1")

50419

(set_attr "memory" "load")

50420

(set_attr "mode" "TI")])

50421

@@ -9421,6 +9453,7 @@

50422

[(set_attr "type" "sselog")

50423

(set_attr "prefix_data16" "1")

50424

(set_attr "prefix_extra" "1")

50425

+ (set_attr "ssememalign" "8")

50426

(set_attr "length_immediate" "1")

50427

(set_attr "prefix" "maybe_vex")

50428

(set_attr "memory" "none,load")

50429

@@ -9445,6 +9478,7 @@

50430

[(set_attr "type" "sselog")

50431

(set_attr "prefix_data16" "1")

50432

(set_attr "prefix_extra" "1")

50433

+ (set_attr "ssememalign" "8")

50434

(set_attr "length_immediate" "1")

50435

(set_attr "prefix" "maybe_vex")

50436

(set_attr "memory" "none,load")

50437

@@ -9469,6 +9503,7 @@

50438

[(set_attr "type" "sselog")

50439

(set_attr "prefix_data16" "1")

50440

(set_attr "prefix_extra" "1")

50441

+ (set_attr "ssememalign" "8")

50442

(set_attr "length_immediate" "1")

50443

(set_attr "memory" "none,load,none,load")

50444

(set_attr "prefix" "maybe_vex")

50445

@@ -10213,7 +10248,6 @@

50446

[(set_attr "type" "ssecvt1")

50447

(set_attr "mode" "<MODE>")])

50448

50449

-;; scalar insns

50450

(define_expand "xop_vmfrcz<mode>2"

50451

[(set (match_operand:VF_128 0 "register_operand")

50452

(vec_merge:VF_128

50453

@@ -10220,14 +10254,12 @@

50454

(unspec:VF_128

50455

[(match_operand:VF_128 1 "nonimmediate_operand")]

50456

UNSPEC_FRCZ)

50457

- (match_dup 3)

50458

+ (match_dup 2)

50459

(const_int 1)))]

50460

"TARGET_XOP"

50461

-{

50462

- operands[3] = CONST0_RTX (<MODE>mode);

50463

-})

50464

+ "operands[2] = CONST0_RTX (<MODE>mode);")

50465

50466

-(define_insn "*xop_vmfrcz_<mode>"

50467

+(define_insn "*xop_vmfrcz<mode>2"

50468

[(set (match_operand:VF_128 0 "register_operand" "=x")

50469

(vec_merge:VF_128

50470

(unspec:VF_128

50471

Index: gcc/config/i386/xopintrin.h

50472

===================================================================

50473

--- a/src/gcc/config/i386/xopintrin.h (.../tags/gcc_4_8_2_release)

50474

+++ b/src/gcc/config/i386/xopintrin.h (.../branches/gcc-4_8-branch)

50475

@@ -745,13 +745,17 @@

50476

extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))

50477

_mm_frcz_ss (__m128 __A, __m128 __B)

50478

{

50479

- return (__m128) __builtin_ia32_vfrczss ((__v4sf)__A, (__v4sf)__B);

50480

+ return (__m128) __builtin_ia32_movss ((__v4sf)__A,

50481

+ (__v4sf)

50482

+ __builtin_ia32_vfrczss ((__v4sf)__B));

50483

}

50484

50485

extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))

50486

_mm_frcz_sd (__m128d __A, __m128d __B)

50487

{

50488

- return (__m128d) __builtin_ia32_vfrczsd ((__v2df)__A, (__v2df)__B);

50489

+ return (__m128d) __builtin_ia32_movsd ((__v2df)__A,

50490

+ (__v2df)

50491

+ __builtin_ia32_vfrczsd ((__v2df)__B));

50492

}

50493

50494

extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))

50495

Index: gcc/config/i386/driver-i386.c

50496

===================================================================

50497

--- a/src/gcc/config/i386/driver-i386.c (.../tags/gcc_4_8_2_release)

50498

+++ b/src/gcc/config/i386/driver-i386.c (.../branches/gcc-4_8-branch)

50499

@@ -126,6 +126,18 @@

50500

case 0x0c:

50501

level1->sizekb = 16; level1->assoc = 4; level1->line = 32;

50502

break;

50503

+ case 0x0d:

50504

+ level1->sizekb = 16; level1->assoc = 4; level1->line = 64;

50505

+ break;

50506

+ case 0x0e:

50507

+ level1->sizekb = 24; level1->assoc = 6; level1->line = 64;

50508

+ break;

50509

+ case 0x21:

50510

+ level2->sizekb = 256; level2->assoc = 8; level2->line = 64;

50511

+ break;

50512

+ case 0x24:

50513

+ level2->sizekb = 1024; level2->assoc = 16; level2->line = 64;

50514

+ break;

50515

case 0x2c:

50516

level1->sizekb = 32; level1->assoc = 8; level1->line = 64;

50517

break;

50518

@@ -162,6 +174,9 @@

50519

case 0x45:

50520

level2->sizekb = 2048; level2->assoc = 4; level2->line = 32;

50521

break;

50522

+ case 0x48:

50523

+ level2->sizekb = 3072; level2->assoc = 12; level2->line = 64;

50524

+ break;

50525

case 0x49:

50526

if (xeon_mp)

50527

break;

50528

@@ -203,6 +218,9 @@

50529

case 0x7f:

50530

level2->sizekb = 512; level2->assoc = 2; level2->line = 64;

50531

break;

50532

+ case 0x80:

50533

+ level2->sizekb = 512; level2->assoc = 8; level2->line = 64;

50534

+ break;

50535

case 0x82:

50536

level2->sizekb = 256; level2->assoc = 8; level2->line = 32;

50537

break;

50538

@@ -470,6 +488,28 @@

50539

has_xsaveopt = eax & bit_XSAVEOPT;

50540

}

50541

50542

+ /* Check cpuid level of extended features. */

50543

+ __cpuid (0x80000000, ext_level, ebx, ecx, edx);

50544

+

50545

+ if (ext_level > 0x80000000)

50546

+ {

50547

+ __cpuid (0x80000001, eax, ebx, ecx, edx);

50548

+

50549

+ has_lahf_lm = ecx & bit_LAHF_LM;

50550

+ has_sse4a = ecx & bit_SSE4a;

50551

+ has_abm = ecx & bit_ABM;

50552

+ has_lwp = ecx & bit_LWP;

50553

+ has_fma4 = ecx & bit_FMA4;

50554

+ has_xop = ecx & bit_XOP;

50555

+ has_tbm = ecx & bit_TBM;

50556

+ has_lzcnt = ecx & bit_LZCNT;

50557

+ has_prfchw = ecx & bit_PRFCHW;

50558

+

50559

+ has_longmode = edx & bit_LM;

50560

+ has_3dnowp = edx & bit_3DNOWP;

50561

+ has_3dnow = edx & bit_3DNOW;

50562

+ }

50563

+

50564

/* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */

50565

#define XCR_XFEATURE_ENABLED_MASK 0x0

50566

#define XSTATE_FP 0x1

50567

@@ -488,33 +528,12 @@

50568

has_avx2 = 0;

50569

has_fma = 0;

50570

has_fma4 = 0;

50571

+ has_f16c = 0;

50572

has_xop = 0;

50573

has_xsave = 0;

50574

has_xsaveopt = 0;

50575

}

50576

50577

- /* Check cpuid level of extended features. */

50578

- __cpuid (0x80000000, ext_level, ebx, ecx, edx);

50579

-

50580

- if (ext_level > 0x80000000)

50581

- {

50582

- __cpuid (0x80000001, eax, ebx, ecx, edx);

50583

-

50584

- has_lahf_lm = ecx & bit_LAHF_LM;

50585

- has_sse4a = ecx & bit_SSE4a;

50586

- has_abm = ecx & bit_ABM;

50587

- has_lwp = ecx & bit_LWP;

50588

- has_fma4 = ecx & bit_FMA4;

50589

- has_xop = ecx & bit_XOP;

50590

- has_tbm = ecx & bit_TBM;

50591

- has_lzcnt = ecx & bit_LZCNT;

50592

- has_prfchw = ecx & bit_PRFCHW;

50593

-

50594

- has_longmode = edx & bit_LM;

50595

- has_3dnowp = edx & bit_3DNOWP;

50596

- has_3dnow = edx & bit_3DNOW;

50597

- }

50598

-

50599

if (!arch)

50600

{

50601

if (vendor == signature_AMD_ebx

50602

Index: gcc/config/i386/i386.c

50603

===================================================================

50604

--- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_8_2_release)

50605

+++ b/src/gcc/config/i386/i386.c (.../branches/gcc-4_8-branch)

50606

@@ -1378,7 +1378,7 @@

50607

8, /* MMX or SSE register to integer */

50608

8, /* size of l1 cache. */

50609

1024, /* size of l2 cache. */

50610

- 128, /* size of prefetch block */

50611

+ 64, /* size of prefetch block */

50612

8, /* number of parallel prefetches */

50613

1, /* Branch cost */

50614

COSTS_N_INSNS (6), /* cost of FADD and FSUB insns. */

50615

@@ -1894,10 +1894,10 @@

50616

50617

50618

/* X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL */

50619

- m_COREI7 | m_AMDFAM10 | m_BDVER | m_BTVER,

50620

+ m_COREI7 | m_HASWELL | m_AMDFAM10 | m_BDVER | m_BTVER,

50621

50622

/* X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL */

50623

- m_COREI7 | m_BDVER,

50624

+ m_COREI7 | m_HASWELL| m_BDVER,

50625

50626

/* X86_TUNE_SSE_PACKED_SINGLE_INSN_OPTIMAL */

50627

m_BDVER ,

50628

@@ -2409,6 +2409,7 @@

50629

/* Processor target table, indexed by processor number */

50630

struct ptt

50631

{

50632

+ const char *const name; /* processor name */

50633

const struct processor_costs *cost; /* Processor costs */

50634

const int align_loop; /* Default alignments. */

50635

const int align_loop_max_skip;

50636

@@ -2417,67 +2418,32 @@

50637

const int align_func;

50638

};

50639

50640

+/* This table must be in sync with enum processor_type in i386.h. */

50641

static const struct ptt processor_target_table[PROCESSOR_max] =

50642

{

50643

- {&i386_cost, 4, 3, 4, 3, 4},

50644

- {&i486_cost, 16, 15, 16, 15, 16},

50645

- {&pentium_cost, 16, 7, 16, 7, 16},

50646

- {&pentiumpro_cost, 16, 15, 16, 10, 16},

50647

- {&geode_cost, 0, 0, 0, 0, 0},

50648

- {&k6_cost, 32, 7, 32, 7, 32},

50649

- {&athlon_cost, 16, 7, 16, 7, 16},

50650

- {&pentium4_cost, 0, 0, 0, 0, 0},

50651

- {&k8_cost, 16, 7, 16, 7, 16},

50652

- {&nocona_cost, 0, 0, 0, 0, 0},

50653

- /* Core 2 */

50654

- {&core_cost, 16, 10, 16, 10, 16},

50655

- /* Core i7 */

50656

- {&core_cost, 16, 10, 16, 10, 16},

50657

- /* Core avx2 */

50658

- {&core_cost, 16, 10, 16, 10, 16},

50659

- {&generic32_cost, 16, 7, 16, 7, 16},

50660

- {&generic64_cost, 16, 10, 16, 10, 16},

50661

- {&amdfam10_cost, 32, 24, 32, 7, 32},

50662

- {&bdver1_cost, 16, 10, 16, 7, 11},

50663

- {&bdver2_cost, 16, 10, 16, 7, 11},

50664

- {&bdver3_cost, 16, 10, 16, 7, 11},

50665

- {&btver1_cost, 16, 10, 16, 7, 11},

50666

- {&btver2_cost, 16, 10, 16, 7, 11},

50667

- {&atom_cost, 16, 15, 16, 7, 16}

50668

+ {"generic", &generic32_cost, 16, 7, 16, 7, 16},

50669

+ {"generic", &generic64_cost, 16, 10, 16, 10, 16},

50670

+ {"i386", &i386_cost, 4, 3, 4, 3, 4},

50671

+ {"i486", &i486_cost, 16, 15, 16, 15, 16},

50672

+ {"pentium", &pentium_cost, 16, 7, 16, 7, 16},

50673

+ {"pentiumpro", &pentiumpro_cost, 16, 15, 16, 10, 16},

50674

+ {"pentium4", &pentium4_cost, 0, 0, 0, 0, 0},

50675

+ {"nocona", &nocona_cost, 0, 0, 0, 0, 0},

50676

+ {"core2", &core_cost, 16, 10, 16, 10, 16},

50677

+ {"corei7", &core_cost, 16, 10, 16, 10, 16},

50678

+ {"core-avx2", &core_cost, 16, 10, 16, 10, 16},

50679

+ {"atom", &atom_cost, 16, 15, 16, 7, 16},

50680

+ {"geode", &geode_cost, 0, 0, 0, 0, 0},

50681

+ {"k6", &k6_cost, 32, 7, 32, 7, 32},

50682

+ {"athlon", &athlon_cost, 16, 7, 16, 7, 16},

50683

+ {"k8", &k8_cost, 16, 7, 16, 7, 16},

50684

+ {"amdfam10", &amdfam10_cost, 32, 24, 32, 7, 32},

50685

+ {"bdver1", &bdver1_cost, 16, 10, 16, 7, 11},

50686

+ {"bdver2", &bdver2_cost, 16, 10, 16, 7, 11},

50687

+ {"bdver3", &bdver3_cost, 16, 10, 16, 7, 11},

50688

+ {"btver1", &btver1_cost, 16, 10, 16, 7, 11},

50689

+ {"btver2", &btver2_cost, 16, 10, 16, 7, 11}

50690

};

50691

-

50692

-static const char *const cpu_names[TARGET_CPU_DEFAULT_max] =

50693

-{

50694

- "generic",

50695

- "i386",

50696

- "i486",

50697

- "pentium",

50698

- "pentium-mmx",

50699

- "pentiumpro",

50700

- "pentium2",

50701

- "pentium3",

50702

- "pentium4",

50703

- "pentium-m",

50704

- "prescott",

50705

- "nocona",

50706

- "core2",

50707

- "corei7",

50708

- "core-avx2",

50709

- "atom",

50710

- "geode",

50711

- "k6",

50712

- "k6-2",

50713

- "k6-3",

50714

- "athlon",

50715

- "athlon-4",

50716

- "k8",

50717

- "amdfam10",

50718

- "bdver1",

50719

- "bdver2",

50720

- "bdver3",

50721

- "btver1",

50722

- "btver2"

50723

-};

50724

50725

static bool

50726

gate_insert_vzeroupper (void)

50727

@@ -2920,7 +2886,7 @@

50728

50729

50730

50731

50732

50733

| PTA_XSAVEOPT},

50734

{"atom", PROCESSOR_ATOM, CPU_ATOM,

50735

PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3

50736

@@ -2983,7 +2949,7 @@

50737

{"bdver3", PROCESSOR_BDVER3, CPU_BDVER3,

50738

PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3

50739

50740

- | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX

50741

50742

50743

| PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE

50744

| PTA_XSAVEOPT},

50745

@@ -3125,7 +3091,8 @@

50746

ix86_tune_string = ix86_arch_string;

50747

if (!ix86_tune_string)

50748

{

50749

- ix86_tune_string = cpu_names[TARGET_CPU_DEFAULT];

50750

+ ix86_tune_string

50751

+ = processor_target_table[TARGET_CPU_DEFAULT].name;

50752

ix86_tune_defaulted = 1;

50753

}

50754

50755

@@ -4078,19 +4045,15 @@

50756

= ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_target_flags,

50757

NULL, NULL, ptr->x_ix86_fpmath, false);

50758

50759

+ gcc_assert (ptr->arch < PROCESSOR_max);

50760

fprintf (file, "%*sarch = %d (%s)\n",

50761

indent, "",

50762

- ptr->arch,

50763

- ((ptr->arch < TARGET_CPU_DEFAULT_max)

50764

- ? cpu_names[ptr->arch]

50765

- : "<unknown>"));

50766

+ ptr->arch, processor_target_table[ptr->arch].name);

50767

50768

+ gcc_assert (ptr->tune < PROCESSOR_max);

50769

fprintf (file, "%*stune = %d (%s)\n",

50770

indent, "",

50771

- ptr->tune,

50772

- ((ptr->tune < TARGET_CPU_DEFAULT_max)

50773

- ? cpu_names[ptr->tune]

50774

- : "<unknown>"));

50775

+ ptr->tune, processor_target_table[ptr->tune].name);

50776

50777

fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);

50778

50779

@@ -5213,7 +5176,12 @@

50780

/* Use register calling convention for local functions when possible. */

50781

if (decl

50782

&& TREE_CODE (decl) == FUNCTION_DECL

50783

- && optimize

50784

+ /* Caller and callee must agree on the calling convention, so

50785

+ checking here just optimize means that with

50786

+ __attribute__((optimize (...))) caller could use regparm convention

50787

+ and callee not, or vice versa. Instead look at whether the callee

50788

+ is optimized or not. */

50789

+ && opt_for_fn (decl, optimize)

50790

&& !(profile_flag && !flag_fentry))

50791

{

50792

/* FIXME: remove this CONST_CAST when cgraph.[ch] is constified. */

50793

@@ -5409,6 +5377,17 @@

50794

bool win;

50795

int j;

50796

50797

+ /* For pre-AVX disallow unaligned loads/stores where the

50798

+ instructions don't support it. */

50799

+ if (!TARGET_AVX

50800

+ && VECTOR_MODE_P (GET_MODE (op))

50801

+ && misaligned_operand (op, GET_MODE (op)))

50802

+ {

50803

+ int min_align = get_attr_ssememalign (insn);

50804

+ if (min_align == 0)

50805

+ return false;

50806

+ }

50807

+

50808

/* A unary operator may be accepted by the predicate, but it

50809

is irrelevant for matching constraints. */

50810

if (UNARY_P (op))

50811

@@ -5747,9 +5726,9 @@

50812

cum->nregs = 0;

50813

cum->sse_nregs = 0;

50814

cum->mmx_nregs = 0;

50815

- cum->warn_avx = 0;

50816

- cum->warn_sse = 0;

50817

- cum->warn_mmx = 0;

50818

+ cum->warn_avx = false;

50819

+ cum->warn_sse = false;

50820

+ cum->warn_mmx = false;

50821

return;

50822

}

50823

50824

@@ -5790,10 +5769,14 @@

50825

50826

The midde-end can't deal with the vector types > 16 bytes. In this

50827

case, we return the original mode and warn ABI change if CUM isn't

50828

- NULL. */

50829

+ NULL.

50830

50831

+ If INT_RETURN is true, warn ABI change if the vector mode isn't

50832

+ available for function return value. */

50833

+

50834

static enum machine_mode

50835

-type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum)

50836

+type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum,

50837

+ bool in_return)

50838

{

50839

enum machine_mode mode = TYPE_MODE (type);

50840

50841

@@ -5819,33 +5802,61 @@

50842

if (size == 32 && !TARGET_AVX)

50843

{

50844

static bool warnedavx;

50845

+ static bool warnedavx_ret;

50846

50847

- if (cum

50848

- && !warnedavx

50849

- && cum->warn_avx)

50850

+ if (cum && cum->warn_avx && !warnedavx)

50851

{

50852

- warnedavx = true;

50853

- warning (0, "AVX vector argument without AVX "

50854

- "enabled changes the ABI");

50855

+ if (warning (OPT_Wpsabi, "AVX vector argument "

50856

+ "without AVX enabled changes the ABI"))

50857

+ warnedavx = true;

50858

}

50859

+ else if (in_return && !warnedavx_ret)

50860

+ {

50861

+ if (warning (OPT_Wpsabi, "AVX vector return "

50862

+ "without AVX enabled changes the ABI"))

50863

+ warnedavx_ret = true;

50864

+ }

50865

+

50866

return TYPE_MODE (type);

50867

}

50868

- else if ((size == 8 || size == 16) && !TARGET_SSE)

50869

+ else if (((size == 8 && TARGET_64BIT) || size == 16)

50870

+ && !TARGET_SSE)

50871

{

50872

static bool warnedsse;

50873

+ static bool warnedsse_ret;

50874

50875

- if (cum

50876

- && !warnedsse

50877

- && cum->warn_sse)

50878

+ if (cum && cum->warn_sse && !warnedsse)

50879

{

50880

- warnedsse = true;

50881

- warning (0, "SSE vector argument without SSE "

50882

- "enabled changes the ABI");

50883

+ if (warning (OPT_Wpsabi, "SSE vector argument "

50884

+ "without SSE enabled changes the ABI"))

50885

+ warnedsse = true;

50886

}

50887

- return mode;

50888

+ else if (!TARGET_64BIT && in_return && !warnedsse_ret)

50889

+ {

50890

+ if (warning (OPT_Wpsabi, "SSE vector return "

50891

+ "without SSE enabled changes the ABI"))

50892

+ warnedsse_ret = true;

50893

+ }

50894

}

50895

- else

50896

- return mode;

50897

+ else if ((size == 8 && !TARGET_64BIT) && !TARGET_MMX)

50898

+ {

50899

+ static bool warnedmmx;

50900

+ static bool warnedmmx_ret;

50901

+

50902

+ if (cum && cum->warn_mmx && !warnedmmx)

50903

+ {

50904

+ if (warning (OPT_Wpsabi, "MMX vector argument "

50905

+ "without MMX enabled changes the ABI"))

50906

+ warnedmmx = true;

50907

+ }

50908

+ else if (in_return && !warnedmmx_ret)

50909

+ {

50910

+ if (warning (OPT_Wpsabi, "MMX vector return "

50911

+ "without MMX enabled changes the ABI"))

50912

+ warnedmmx_ret = true;

50913

+ }

50914

+ }

50915

+ return mode;

50916

}

50917

50918

gcc_unreachable ();

50919

@@ -6190,25 +6201,28 @@

50920

case CHImode:

50921

case CQImode:

50922

{

50923

- int size = (bit_offset % 64)+ (int) GET_MODE_BITSIZE (mode);

50924

+ int size = bit_offset + (int) GET_MODE_BITSIZE (mode);

50925

50926

- if (size <= 32)

50927

+ /* Analyze last 128 bits only. */

50928

+ size = (size - 1) & 0x7f;

50929

+

50930

+ if (size < 32)

50931

{

50932

classes[0] = X86_64_INTEGERSI_CLASS;

50933

return 1;

50934

}

50935

- else if (size <= 64)

50936

+ else if (size < 64)

50937

{

50938

classes[0] = X86_64_INTEGER_CLASS;

50939

return 1;

50940

}

50941

- else if (size <= 64+32)

50942

+ else if (size < 64+32)

50943

{

50944

classes[0] = X86_64_INTEGER_CLASS;

50945

classes[1] = X86_64_INTEGERSI_CLASS;

50946

return 2;

50947

}

50948

- else if (size <= 64+64)

50949

+ else if (size < 64+64)

50950

{

50951

classes[0] = classes[1] = X86_64_INTEGER_CLASS;

50952

return 2;

50953

@@ -6475,7 +6489,7 @@

50954

if (n == 2

50955

&& regclass[0] == X86_64_INTEGER_CLASS

50956

&& regclass[1] == X86_64_INTEGER_CLASS

50957

- && (mode == CDImode || mode == TImode || mode == TFmode)

50958

+ && (mode == CDImode || mode == TImode)

50959

&& intreg[0] + 1 == intreg[1])

50960

return gen_rtx_REG (mode, intreg[0]);

50961

50962

@@ -6725,7 +6739,7 @@

50963

words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;

50964

50965

if (type)

50966

- mode = type_natural_mode (type, NULL);

50967

+ mode = type_natural_mode (type, NULL, false);

50968

50969

if (TARGET_64BIT && (cum ? cum->call_abi : ix86_abi) == MS_ABI)

50970

function_arg_advance_ms_64 (cum, bytes, words);

50971

@@ -6753,8 +6767,6 @@

50972

enum machine_mode orig_mode, const_tree type,

50973

HOST_WIDE_INT bytes, HOST_WIDE_INT words)

50974

{

50975

- static bool warnedsse, warnedmmx;

50976

-

50977

/* Avoid the AL settings for the Unix64 ABI. */

50978

if (mode == VOIDmode)

50979

return constm1_rtx;

50980

@@ -6811,12 +6823,6 @@

50981

case V2DFmode:

50982

if (!type || !AGGREGATE_TYPE_P (type))

50983

{

50984

- if (!TARGET_SSE && !warnedsse && cum->warn_sse)

50985

- {

50986

- warnedsse = true;

50987

- warning (0, "SSE vector argument without SSE enabled "

50988

- "changes the ABI");

50989

- }

50990

if (cum->sse_nregs)

50991

return gen_reg_or_parallel (mode, orig_mode,

50992

cum->sse_regno + FIRST_SSE_REG);

50993

@@ -6849,12 +6855,6 @@

50994

case V1DImode:

50995

if (!type || !AGGREGATE_TYPE_P (type))

50996

{

50997

- if (!TARGET_MMX && !warnedmmx && cum->warn_mmx)

50998

- {

50999

- warnedmmx = true;

51000

- warning (0, "MMX vector argument without MMX enabled "

51001

- "changes the ABI");

51002

- }

51003

if (cum->mmx_nregs)

51004

return gen_reg_or_parallel (mode, orig_mode,

51005

cum->mmx_regno + FIRST_MMX_REG);

51006

@@ -6977,7 +6977,7 @@

51007

/* To simplify the code below, represent vector types with a vector mode

51008

even if MMX/SSE are not active. */

51009

if (type && TREE_CODE (type) == VECTOR_TYPE)

51010

- mode = type_natural_mode (type, cum);

51011

+ mode = type_natural_mode (type, cum, false);

51012

51013

if (TARGET_64BIT && (cum ? cum->call_abi : ix86_abi) == MS_ABI)

51014

arg = function_arg_ms_64 (cum, mode, omode, named, bytes);

51015

@@ -7235,9 +7235,15 @@

51016

switch (regno)

51017

{

51018

case AX_REG:

51019

+ case DX_REG:

51020

return true;

51021

+ case DI_REG:

51022

+ case SI_REG:

51023

+ return TARGET_64BIT && ix86_abi != MS_ABI;

51024

51025

- case FIRST_FLOAT_REG:

51026

+ /* Complex values are returned in %st(0)/%st(1) pair. */

51027

+ case ST0_REG:

51028

+ case ST1_REG:

51029

/* TODO: The function should depend on current function ABI but

51030

builtins.c would need updating then. Therefore we use the

51031

default ABI. */

51032

@@ -7245,10 +7251,12 @@

51033

return false;

51034

return TARGET_FLOAT_RETURNS_IN_80387;

51035

51036

- case FIRST_SSE_REG:

51037

+ /* Complex values are returned in %xmm0/%xmm1 pair. */

51038

+ case XMM0_REG:

51039

+ case XMM1_REG:

51040

return TARGET_SSE;

51041

51042

- case FIRST_MMX_REG:

51043

+ case MM0_REG:

51044

if (TARGET_MACHO || TARGET_64BIT)

51045

return false;

51046

return TARGET_MMX;

51047

@@ -7420,7 +7428,7 @@

51048

enum machine_mode mode, orig_mode;

51049

51050

orig_mode = TYPE_MODE (valtype);

51051

- mode = type_natural_mode (valtype, NULL);

51052

+ mode = type_natural_mode (valtype, NULL, true);

51053

return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode);

51054

}

51055

51056

@@ -7535,7 +7543,7 @@

51057

#ifdef SUBTARGET_RETURN_IN_MEMORY

51058

return SUBTARGET_RETURN_IN_MEMORY (type, fntype);

51059

#else

51060

- const enum machine_mode mode = type_natural_mode (type, NULL);

51061

+ const enum machine_mode mode = type_natural_mode (type, NULL, true);

51062

51063

if (TARGET_64BIT)

51064

{

51065

@@ -7549,52 +7557,6 @@

51066

#endif

51067

}

51068

51069

-/* When returning SSE vector types, we have a choice of either

51070

- (1) being abi incompatible with a -march switch, or

51071

- (2) generating an error.

51072

- Given no good solution, I think the safest thing is one warning.

51073

- The user won't be able to use -Werror, but....

51074

-

51075

- Choose the STRUCT_VALUE_RTX hook because that's (at present) only

51076

- called in response to actually generating a caller or callee that

51077

- uses such a type. As opposed to TARGET_RETURN_IN_MEMORY, which is called

51078

- via aggregate_value_p for general type probing from tree-ssa. */

51079

-

51080

-static rtx

51081

-ix86_struct_value_rtx (tree type, int incoming ATTRIBUTE_UNUSED)

51082

-{

51083

- static bool warnedsse, warnedmmx;

51084

-

51085

- if (!TARGET_64BIT && type)

51086

- {

51087

- /* Look at the return type of the function, not the function type. */

51088

- enum machine_mode mode = TYPE_MODE (TREE_TYPE (type));

51089

-

51090

- if (!TARGET_SSE && !warnedsse)

51091

- {

51092

- if (mode == TImode

51093

- || (VECTOR_MODE_P (mode) && GET_MODE_SIZE (mode) == 16))

51094

- {

51095

- warnedsse = true;

51096

- warning (0, "SSE vector return without SSE enabled "

51097

- "changes the ABI");

51098

- }

51099

- }

51100

-

51101

- if (!TARGET_MMX && !warnedmmx)

51102

- {

51103

- if (VECTOR_MODE_P (mode) && GET_MODE_SIZE (mode) == 8)

51104

- {

51105

- warnedmmx = true;

51106

- warning (0, "MMX vector return without MMX enabled "

51107

- "changes the ABI");

51108

- }

51109

- }

51110

- }

51111

-

51112

- return NULL;

51113

-}

51114

-

51115

51116

/* Create the va_list data type. */

51117

51118

@@ -8019,7 +7981,7 @@

51119

size = int_size_in_bytes (type);

51120

rsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;

51121

51122

- nat_mode = type_natural_mode (type, NULL);

51123

+ nat_mode = type_natural_mode (type, NULL, false);

51124

switch (nat_mode)

51125

{

51126

case V8SFmode:

51127

@@ -10560,18 +10522,20 @@

51128

}

51129

m->fs.sp_offset += allocate;

51130

51131

+ /* Use stack_pointer_rtx for relative addressing so that code

51132

+ works for realigned stack, too. */

51133

if (r10_live && eax_live)

51134

{

51135

- t = choose_baseaddr (m->fs.sp_offset - allocate);

51136

+ t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax);

51137

emit_move_insn (gen_rtx_REG (word_mode, R10_REG),

51138

gen_frame_mem (word_mode, t));

51139

- t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD);

51140

+ t = plus_constant (Pmode, t, UNITS_PER_WORD);

51141

emit_move_insn (gen_rtx_REG (word_mode, AX_REG),

51142

gen_frame_mem (word_mode, t));

51143

}

51144

else if (eax_live || r10_live)

51145

{

51146

- t = choose_baseaddr (m->fs.sp_offset - allocate);

51147

+ t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax);

51148

emit_move_insn (gen_rtx_REG (word_mode,

51149

(eax_live ? AX_REG : R10_REG)),

51150

gen_frame_mem (word_mode, t));

51151

@@ -11164,8 +11128,9 @@

51152

m->fs.cfa_offset -= UNITS_PER_WORD;

51153

m->fs.sp_offset -= UNITS_PER_WORD;

51154

51155

- add_reg_note (insn, REG_CFA_ADJUST_CFA,

51156

- copy_rtx (XVECEXP (PATTERN (insn), 0, 1)));

51157

+ rtx x = plus_constant (Pmode, stack_pointer_rtx, UNITS_PER_WORD);

51158

+ x = gen_rtx_SET (VOIDmode, stack_pointer_rtx, x);

51159

+ add_reg_note (insn, REG_CFA_ADJUST_CFA, x);

51160

add_reg_note (insn, REG_CFA_REGISTER,

51161

gen_rtx_SET (VOIDmode, ecx, pc_rtx));

51162

RTX_FRAME_RELATED_P (insn) = 1;

51163

@@ -11561,30 +11526,6 @@

51164

}

51165

}

51166

51167

-/* Determine if op is suitable SUBREG RTX for address. */

51168

-

51169

-static bool

51170

-ix86_address_subreg_operand (rtx op)

51171

-{

51172

- enum machine_mode mode;

51173

-

51174

- if (!REG_P (op))

51175

- return false;

51176

-

51177

- mode = GET_MODE (op);

51178

-

51179

- if (GET_MODE_CLASS (mode) != MODE_INT)

51180

- return false;

51181

-

51182

- /* Don't allow SUBREGs that span more than a word. It can lead to spill

51183

- failures when the register is one word out of a two word structure. */

51184

- if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)

51185

- return false;

51186

-

51187

- /* Allow only SUBREGs of non-eliminable hard registers. */

51188

- return register_no_elim_operand (op, mode);

51189

-}

51190

-

51191

/* Extract the parts of an RTL expression that is a valid memory address

51192

for an instruction. Return 0 if the structure of the address is

51193

grossly off. Return -1 if the address contains ASHIFT, so it is not

51194

@@ -11641,7 +11582,7 @@

51195

base = addr;

51196

else if (GET_CODE (addr) == SUBREG)

51197

{

51198

- if (ix86_address_subreg_operand (SUBREG_REG (addr)))

51199

+ if (REG_P (SUBREG_REG (addr)))

51200

base = addr;

51201

else

51202

return 0;

51203

@@ -11705,7 +11646,7 @@

51204

break;

51205

51206

case SUBREG:

51207

- if (!ix86_address_subreg_operand (SUBREG_REG (op)))

51208

+ if (!REG_P (SUBREG_REG (op)))

51209

return 0;

51210

/* FALLTHRU */

51211

51212

@@ -11750,19 +11691,6 @@

51213

scale = 1 << scale;

51214

retval = -1;

51215

}

51216

- else if (CONST_INT_P (addr))

51217

- {

51218

- if (!x86_64_immediate_operand (addr, VOIDmode))

51219

- return 0;

51220

-

51221

- /* Constant addresses are sign extended to 64bit, we have to

51222

- prevent addresses from 0x80000000 to 0xffffffff in x32 mode. */

51223

- if (TARGET_X32

51224

- && val_signbit_known_set_p (SImode, INTVAL (addr)))

51225

- return 0;

51226

-

51227

- disp = addr;

51228

- }

51229

else

51230

disp = addr; /* displacement */

51231

51232

@@ -11771,18 +11699,12 @@

51233

if (REG_P (index))

51234

;

51235

else if (GET_CODE (index) == SUBREG

51236

- && ix86_address_subreg_operand (SUBREG_REG (index)))

51237

+ && REG_P (SUBREG_REG (index)))

51238

;

51239

else

51240

return 0;

51241

}

51242

51243

-/* Address override works only on the (%reg) part of %fs:(%reg). */

51244

- if (seg != SEG_DEFAULT

51245

- && ((base && GET_MODE (base) != word_mode)

51246

- || (index && GET_MODE (index) != word_mode)))

51247

- return 0;

51248

-

51249

/* Extract the integral value of scale. */

51250

if (scale_rtx)

51251

{

51252

@@ -12258,6 +12180,45 @@

51253

return false;

51254

}

51255

51256

+/* Determine if op is suitable RTX for an address register.

51257

+ Return naked register if a register or a register subreg is

51258

+ found, otherwise return NULL_RTX. */

51259

+

51260

+static rtx

51261

+ix86_validate_address_register (rtx op)

51262

+{

51263

+ enum machine_mode mode = GET_MODE (op);

51264

+

51265

+ /* Only SImode or DImode registers can form the address. */

51266

+ if (mode != SImode && mode != DImode)

51267

+ return NULL_RTX;

51268

+

51269

+ if (REG_P (op))

51270

+ return op;

51271

+ else if (GET_CODE (op) == SUBREG)

51272

+ {

51273

+ rtx reg = SUBREG_REG (op);

51274

+

51275

+ if (!REG_P (reg))

51276

+ return NULL_RTX;

51277

+

51278

+ mode = GET_MODE (reg);

51279

+

51280

+ /* Don't allow SUBREGs that span more than a word. It can

51281

+ lead to spill failures when the register is one word out

51282

+ of a two word structure. */

51283

+ if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)

51284

+ return NULL_RTX;

51285

+

51286

+ /* Allow only SUBREGs of non-eliminable hard registers. */

51287

+ if (register_no_elim_operand (reg, mode))

51288

+ return reg;

51289

+ }

51290

+

51291

+ /* Op is not a register. */

51292

+ return NULL_RTX;

51293

+}

51294

+

51295

/* Recognizes RTL expressions that are valid memory addresses for an

51296

instruction. The MODE argument is the machine mode for the MEM

51297

expression that wants to use this address.

51298

@@ -12273,6 +12234,7 @@

51299

struct ix86_address parts;

51300

rtx base, index, disp;

51301

HOST_WIDE_INT scale;

51302

+ enum ix86_address_seg seg;

51303

51304

if (ix86_decompose_address (addr, &parts) <= 0)

51305

/* Decomposition failed. */

51306

@@ -12282,23 +12244,16 @@

51307

index = parts.index;

51308

disp = parts.disp;

51309

scale = parts.scale;

51310

+ seg = parts.seg;

51311

51312

/* Validate base register. */

51313

if (base)

51314

{

51315

- rtx reg;

51316

+ rtx reg = ix86_validate_address_register (base);

51317

51318

- if (REG_P (base))

51319

- reg = base;

51320

- else if (GET_CODE (base) == SUBREG && REG_P (SUBREG_REG (base)))

51321

- reg = SUBREG_REG (base);

51322

- else

51323

- /* Base is not a register. */

51324

+ if (reg == NULL_RTX)

51325

return false;

51326

51327

- if (GET_MODE (base) != SImode && GET_MODE (base) != DImode)

51328

- return false;

51329

-

51330

if ((strict && ! REG_OK_FOR_BASE_STRICT_P (reg))

51331

|| (! strict && ! REG_OK_FOR_BASE_NONSTRICT_P (reg)))

51332

/* Base is not valid. */

51333

@@ -12308,19 +12263,11 @@

51334

/* Validate index register. */

51335

if (index)

51336

{

51337

- rtx reg;

51338

+ rtx reg = ix86_validate_address_register (index);

51339

51340

- if (REG_P (index))

51341

- reg = index;

51342

- else if (GET_CODE (index) == SUBREG && REG_P (SUBREG_REG (index)))

51343

- reg = SUBREG_REG (index);

51344

- else

51345

- /* Index is not a register. */

51346

+ if (reg == NULL_RTX)

51347

return false;

51348

51349

- if (GET_MODE (index) != SImode && GET_MODE (index) != DImode)

51350

- return false;

51351

-

51352

if ((strict && ! REG_OK_FOR_INDEX_STRICT_P (reg))

51353

|| (! strict && ! REG_OK_FOR_INDEX_NONSTRICT_P (reg)))

51354

/* Index is not valid. */

51355

@@ -12332,6 +12279,12 @@

51356

&& GET_MODE (base) != GET_MODE (index))

51357

return false;

51358

51359

+ /* Address override works only on the (%reg) part of %fs:(%reg). */

51360

+ if (seg != SEG_DEFAULT

51361

+ && ((base && GET_MODE (base) != word_mode)

51362

+ || (index && GET_MODE (index) != word_mode)))

51363

+ return false;

51364

+

51365

/* Validate scale factor. */

51366

if (scale != 1)

51367

{

51368

@@ -12453,6 +12406,12 @@

51369

&& !x86_64_immediate_operand (disp, VOIDmode))

51370

/* Displacement is out of range. */

51371

return false;

51372

+ /* In x32 mode, constant addresses are sign extended to 64bit, so

51373

+ we have to prevent addresses from 0x80000000 to 0xffffffff. */

51374

+ else if (TARGET_X32 && !(index || base)

51375

+ && CONST_INT_P (disp)

51376

+ && val_signbit_known_set_p (SImode, INTVAL (disp)))

51377

+ return false;

51378

}

51379

51380

/* Everything looks valid. */

51381

@@ -13817,8 +13776,6 @@

51382

Those same assemblers have the same but opposite lossage on cmov. */

51383

if (mode == CCmode)

51384

suffix = fp ? "nbe" : "a";

51385

- else if (mode == CCCmode)

51386

- suffix = "b";

51387

else

51388

gcc_unreachable ();

51389

break;

51390

@@ -13840,8 +13797,12 @@

51391

}

51392

break;

51393

case LTU:

51394

- gcc_assert (mode == CCmode || mode == CCCmode);

51395

- suffix = "b";

51396

+ if (mode == CCmode)

51397

+ suffix = "b";

51398

+ else if (mode == CCCmode)

51399

+ suffix = "c";

51400

+ else

51401

+ gcc_unreachable ();

51402

break;

51403

case GE:

51404

switch (mode)

51405

@@ -13861,9 +13822,12 @@

51406

}

51407

break;

51408

case GEU:

51409

- /* ??? As above. */

51410

- gcc_assert (mode == CCmode || mode == CCCmode);

51411

- suffix = fp ? "nb" : "ae";

51412

+ if (mode == CCmode)

51413

+ suffix = fp ? "nb" : "ae";

51414

+ else if (mode == CCCmode)

51415

+ suffix = "nc";

51416

+ else

51417

+ gcc_unreachable ();

51418

break;

51419

case LE:

51420

gcc_assert (mode == CCmode || mode == CCGCmode || mode == CCNOmode);

51421

@@ -13870,11 +13834,8 @@

51422

suffix = "le";

51423

break;

51424

case LEU:

51425

- /* ??? As above. */

51426

if (mode == CCmode)

51427

suffix = "be";

51428

- else if (mode == CCCmode)

51429

- suffix = fp ? "nb" : "ae";

51430

else

51431

gcc_unreachable ();

51432

break;

51433

@@ -15340,7 +15301,7 @@

51434

rtx arg = XEXP (XEXP (link, 0), 0);

51435

51436

if (ix86_check_avx256_register (&arg, NULL))

51437

- return AVX_U128_ANY;

51438

+ return AVX_U128_DIRTY;

51439

}

51440

}

51441

51442

@@ -15460,8 +15421,8 @@

51443

{

51444

bool avx_reg256_found = false;

51445

note_stores (pat, ix86_check_avx256_stores, &avx_reg256_found);

51446

- if (!avx_reg256_found)

51447

- return AVX_U128_CLEAN;

51448

+

51449

+ return avx_reg256_found ? AVX_U128_DIRTY : AVX_U128_CLEAN;

51450

}

51451

51452

/* Otherwise, return current mode. Remember that if insn

51453

@@ -17350,10 +17311,20 @@

51454

if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun))

51455

return false;

51456

51457

- /* Check it is correct to split here. */

51458

- if (!ix86_ok_to_clobber_flags(insn))

51459

+ /* The "at least two components" test below might not catch simple

51460

+ move or zero extension insns if parts.base is non-NULL and parts.disp

51461

+ is const0_rtx as the only components in the address, e.g. if the

51462

+ register is %rbp or %r13. As this test is much cheaper and moves or

51463

+ zero extensions are the common case, do this check first. */

51464

+ if (REG_P (operands[1])

51465

+ || (SImode_address_operand (operands[1], VOIDmode)

51466

+ && REG_P (XEXP (operands[1], 0))))

51467

return false;

51468

51469

+ /* Check if it is OK to split here. */

51470

+ if (!ix86_ok_to_clobber_flags (insn))

51471

+ return false;

51472

+

51473

ok = ix86_decompose_address (operands[1], &parts);

51474

gcc_assert (ok);

51475

51476

@@ -18486,12 +18457,7 @@

51477

return CCmode;

51478

case GTU: /* CF=0 & ZF=0 */

51479

case LEU: /* CF=1 | ZF=1 */

51480

- /* Detect overflow checks. They need just the carry flag. */

51481

- if (GET_CODE (op0) == MINUS

51482

- && rtx_equal_p (op1, XEXP (op0, 0)))

51483

- return CCCmode;

51484

- else

51485

- return CCmode;

51486

+ return CCmode;

51487

/* Codes possibly doable only with sign flag when

51488

comparing against zero. */

51489

case GE: /* SF=OF or SF=0 */

51490

@@ -20500,7 +20466,7 @@

51491

return;

51492

51493

case V8SFmode:

51494

- mask = gen_lowpart (V8SFmode, mask);

51495

+ mask = gen_lowpart (V8SImode, mask);

51496

if (one_operand_shuffle)

51497

emit_insn (gen_avx2_permvarv8sf (target, op0, mask));

51498

else

51499

@@ -21740,6 +21706,21 @@

51500

return SImode;

51501

}

51502

51503

+/* Copy the address to a Pmode register. This is used for x32 to

51504

+ truncate DImode TLS address to a SImode register. */

51505

+

51506

+static rtx

51507

+ix86_copy_addr_to_reg (rtx addr)

51508

+{

51509

+ if (GET_MODE (addr) == Pmode || GET_MODE (addr) == VOIDmode)

51510

+ return copy_addr_to_reg (addr);

51511

+ else

51512

+ {

51513

+ gcc_assert (GET_MODE (addr) == DImode && Pmode == SImode);

51514

+ return gen_rtx_SUBREG (SImode, copy_to_mode_reg (DImode, addr), 0);

51515

+ }

51516

+}

51517

+

51518

/* When SRCPTR is non-NULL, output simple loop to move memory

51519

pointer to SRCPTR to DESTPTR via chunks of MODE unrolled UNROLL times,

51520

overall size is COUNT specified in bytes. When SRCPTR is NULL, output the

51521

@@ -22728,8 +22709,8 @@

51522

gcc_assert (alg != no_stringop);

51523

if (!count)

51524

count_exp = copy_to_mode_reg (GET_MODE (count_exp), count_exp);

51525

- destreg = copy_addr_to_reg (XEXP (dst, 0));

51526

- srcreg = copy_addr_to_reg (XEXP (src, 0));

51527

+ destreg = ix86_copy_addr_to_reg (XEXP (dst, 0));

51528

+ srcreg = ix86_copy_addr_to_reg (XEXP (src, 0));

51529

switch (alg)

51530

{

51531

case libcall:

51532

@@ -23119,7 +23100,7 @@

51533

gcc_assert (alg != no_stringop);

51534

if (!count)

51535

count_exp = copy_to_mode_reg (counter_mode (count_exp), count_exp);

51536

- destreg = copy_addr_to_reg (XEXP (dst, 0));

51537

+ destreg = ix86_copy_addr_to_reg (XEXP (dst, 0));

51538

switch (alg)

51539

{

51540

case libcall:

51541

@@ -24988,7 +24969,8 @@

51542

int

51543

ix86_data_alignment (tree type, int align)

51544

{

51545

- int max_align = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT);

51546

+ int max_align

51547

+ = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT);

51548

51549

if (AGGREGATE_TYPE_P (type)

51550

&& TYPE_SIZE (type)

51551

@@ -27984,8 +27966,8 @@

51552

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv8hi3, "__builtin_ia32_vpshlw", IX86_BUILTIN_VPSHLW, UNKNOWN, (int)MULTI_ARG_2_HI },

51553

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv16qi3, "__builtin_ia32_vpshlb", IX86_BUILTIN_VPSHLB, UNKNOWN, (int)MULTI_ARG_2_QI },

51554

51555

- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_2_SF },

51556

- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_2_DF },

51557

+ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_1_SF },

51558

+ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_1_DF },

51559

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv4sf2, "__builtin_ia32_vfrczps", IX86_BUILTIN_VFRCZPS, UNKNOWN, (int)MULTI_ARG_1_SF },

51560

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv2df2, "__builtin_ia32_vfrczpd", IX86_BUILTIN_VFRCZPD, UNKNOWN, (int)MULTI_ARG_1_DF },

51561

{ OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv8sf2, "__builtin_ia32_vfrczps256", IX86_BUILTIN_VFRCZPS256, UNKNOWN, (int)MULTI_ARG_1_SF2 },

51562

@@ -31245,11 +31227,12 @@

51563

51564

static rtx

51565

ix86_expand_special_args_builtin (const struct builtin_description *d,

51566

- tree exp, rtx target)

51567

+ tree exp, rtx target)

51568

{

51569

tree arg;

51570

rtx pat, op;

51571

unsigned int i, nargs, arg_adjust, memory;

51572

+ bool aligned_mem = false;

51573

struct

51574

{

51575

rtx op;

51576

@@ -31295,6 +31278,15 @@

51577

nargs = 1;

51578

klass = load;

51579

memory = 0;

51580

+ switch (icode)

51581

+ {

51582

+ case CODE_FOR_sse4_1_movntdqa:

51583

+ case CODE_FOR_avx2_movntdqa:

51584

+ aligned_mem = true;

51585

+ break;

51586

+ default:

51587

+ break;

51588

+ }

51589

break;

51590

case VOID_FTYPE_PV2SF_V4SF:

51591

case VOID_FTYPE_PV4DI_V4DI:

51592

@@ -31312,6 +31304,26 @@

51593

klass = store;

51594

/* Reserve memory operand for target. */

51595

memory = ARRAY_SIZE (args);

51596

+ switch (icode)

51597

+ {

51598

+ /* These builtins and instructions require the memory

51599

+ to be properly aligned. */

51600

+ case CODE_FOR_avx_movntv4di:

51601

+ case CODE_FOR_sse2_movntv2di:

51602

+ case CODE_FOR_avx_movntv8sf:

51603

+ case CODE_FOR_sse_movntv4sf:

51604

+ case CODE_FOR_sse4a_vmmovntv4sf:

51605

+ case CODE_FOR_avx_movntv4df:

51606

+ case CODE_FOR_sse2_movntv2df:

51607

+ case CODE_FOR_sse4a_vmmovntv2df:

51608

+ case CODE_FOR_sse2_movntidi:

51609

+ case CODE_FOR_sse_movntq:

51610

+ case CODE_FOR_sse2_movntisi:

51611

+ aligned_mem = true;

51612

+ break;

51613

+ default:

51614

+ break;

51615

+ }

51616

break;

51617

case V4SF_FTYPE_V4SF_PCV2SF:

51618

case V2DF_FTYPE_V2DF_PCDOUBLE:

51619

@@ -31368,6 +31380,17 @@

51620

{

51621

op = force_reg (Pmode, convert_to_mode (Pmode, op, 1));

51622

target = gen_rtx_MEM (tmode, op);

51623

+ /* target at this point has just BITS_PER_UNIT MEM_ALIGN

51624

+ on it. Try to improve it using get_pointer_alignment,

51625

+ and if the special builtin is one that requires strict

51626

+ mode alignment, also from it's GET_MODE_ALIGNMENT.

51627

+ Failure to do so could lead to ix86_legitimate_combined_insn

51628

+ rejecting all changes to such insns. */

51629

+ unsigned int align = get_pointer_alignment (arg);

51630

+ if (aligned_mem && align < GET_MODE_ALIGNMENT (tmode))

51631

+ align = GET_MODE_ALIGNMENT (tmode);

51632

+ if (MEM_ALIGN (target) < align)

51633

+ set_mem_align (target, align);

51634

}

51635

else

51636

target = force_reg (tmode, op);

51637

@@ -31413,8 +31436,17 @@

51638

/* This must be the memory operand. */

51639

op = force_reg (Pmode, convert_to_mode (Pmode, op, 1));

51640

op = gen_rtx_MEM (mode, op);

51641

- gcc_assert (GET_MODE (op) == mode

51642

- || GET_MODE (op) == VOIDmode);

51643

+ /* op at this point has just BITS_PER_UNIT MEM_ALIGN

51644

+ on it. Try to improve it using get_pointer_alignment,

51645

+ and if the special builtin is one that requires strict

51646

+ mode alignment, also from it's GET_MODE_ALIGNMENT.

51647

+ Failure to do so could lead to ix86_legitimate_combined_insn

51648

+ rejecting all changes to such insns. */

51649

+ unsigned int align = get_pointer_alignment (arg);

51650

+ if (aligned_mem && align < GET_MODE_ALIGNMENT (mode))

51651

+ align = GET_MODE_ALIGNMENT (mode);

51652

+ if (MEM_ALIGN (op) < align)

51653

+ set_mem_align (op, align);

51654

}

51655

else

51656

{

51657

@@ -32027,7 +32059,8 @@

51658

else

51659

op2 = gen_rtx_SUBREG (SImode, op0, 0);

51660

51661

- if (target == 0)

51662

+ if (target == 0

51663

+ || !register_operand (target, SImode))

51664

target = gen_reg_rtx (SImode);

51665

51666

pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG),

51667

@@ -32069,7 +32102,8 @@

51668

const0_rtx);

51669

emit_insn (gen_rtx_SET (VOIDmode, op2, pat));

51670

51671

- if (target == 0)

51672

+ if (target == 0

51673

+ || !register_operand (target, SImode))

51674

target = gen_reg_rtx (SImode);

51675

51676

emit_insn (gen_zero_extendqisi2 (target, op2));

51677

@@ -32208,7 +32242,9 @@

51678

mode4 = insn_data[icode].operand[5].mode;

51679

51680

if (target == NULL_RTX

51681

- || GET_MODE (target) != insn_data[icode].operand[0].mode)

51682

+ || GET_MODE (target) != insn_data[icode].operand[0].mode

51683

+ || !insn_data[icode].operand[0].predicate (target,

51684

+ GET_MODE (target)))

51685

subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);

51686

else

51687

subtarget = target;

51688

@@ -33879,10 +33915,10 @@

51689

{

51690

/* We implement the move patterns for all vector modes into and

51691

out of SSE registers, even when no operation instructions

51692

- are available. OImode move is available only when AVX is

51693

- enabled. */

51694

- return ((TARGET_AVX && mode == OImode)

51695

- || VALID_AVX256_REG_MODE (mode)

51696

+ are available. OImode and AVX modes are available only when

51697

+ AVX is enabled. */

51698

+ return ((TARGET_AVX

51699

+ && VALID_AVX256_REG_OR_OI_MODE (mode))

51700

|| VALID_SSE_REG_MODE (mode)

51701

|| VALID_SSE2_REG_MODE (mode)

51702

|| VALID_MMX_REG_MODE (mode)

51703

@@ -35020,7 +35056,7 @@

51704

{

51705

tmp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, fnaddr), UNSPEC_GOTPCREL);

51706

tmp = gen_rtx_CONST (Pmode, tmp);

51707

- fnaddr = gen_rtx_MEM (Pmode, tmp);

51708

+ fnaddr = gen_const_mem (Pmode, tmp);

51709

}

51710

}

51711

else

51712

@@ -35040,8 +35076,9 @@

51713

output_set_got (tmp, NULL_RTX);

51714

51715

fnaddr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, fnaddr), UNSPEC_GOT);

51716

- fnaddr = gen_rtx_PLUS (Pmode, fnaddr, tmp);

51717

- fnaddr = gen_rtx_MEM (Pmode, fnaddr);

51718

+ fnaddr = gen_rtx_CONST (Pmode, fnaddr);

51719

+ fnaddr = gen_rtx_PLUS (Pmode, tmp, fnaddr);

51720

+ fnaddr = gen_const_mem (Pmode, fnaddr);

51721

}

51722

}

51723

51724

@@ -35232,7 +35269,10 @@

51725

The smallest offset in the page INSN can start is the case where START

51726

ends on the offset 0. Offset of INSN is then NBYTES - sizeof (INSN).

51727

We add p2align to 16byte window with maxskip 15 - NBYTES + sizeof (INSN).

51728

- */

51729

+

51730

+ Don't consider asm goto as jump, while it can contain a jump, it doesn't

51731

+ have to, control transfer to label(s) can be performed through other

51732

+ means, and also we estimate minimum length of all asm stmts as 0. */

51733

for (insn = start; insn; insn = NEXT_INSN (insn))

51734

{

51735

int min_size;

51736

@@ -35260,6 +35300,7 @@

51737

{

51738

start = NEXT_INSN (start);

51739

if ((JUMP_P (start)

51740

+ && asm_noperands (PATTERN (start)) < 0

51741

&& GET_CODE (PATTERN (start)) != ADDR_VEC

51742

&& GET_CODE (PATTERN (start)) != ADDR_DIFF_VEC)

51743

|| CALL_P (start))

51744

@@ -35278,6 +35319,7 @@

51745

fprintf (dump_file, "Insn %i estimated to %i bytes\n",

51746

INSN_UID (insn), min_size);

51747

if ((JUMP_P (insn)

51748

+ && asm_noperands (PATTERN (insn)) < 0

51749

&& GET_CODE (PATTERN (insn)) != ADDR_VEC

51750

&& GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)

51751

|| CALL_P (insn))

51752

@@ -35289,6 +35331,7 @@

51753

{

51754

start = NEXT_INSN (start);

51755

if ((JUMP_P (start)

51756

+ && asm_noperands (PATTERN (start)) < 0

51757

&& GET_CODE (PATTERN (start)) != ADDR_VEC

51758

&& GET_CODE (PATTERN (start)) != ADDR_DIFF_VEC)

51759

|| CALL_P (start))

51760

@@ -39371,7 +39414,9 @@

51761

else

51762

dfinal.perm[i] = e;

51763

}

51764

- dfinal.op0 = gen_reg_rtx (dfinal.vmode);

51765

+

51766

+ if (!d->testing_p)

51767

+ dfinal.op0 = gen_reg_rtx (dfinal.vmode);

51768

dfinal.op1 = dfinal.op0;

51769

dfinal.one_operand_p = true;

51770

dremap.target = dfinal.op0;

51771

@@ -39806,6 +39851,9 @@

51772

return false;

51773

gcc_assert (!d->one_operand_p);

51774

51775

+ if (d->testing_p)

51776

+ return true;

51777

+

51778

nelt = d->nelt;

51779

eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));

51780

51781

@@ -40005,6 +40053,8 @@

51782

switch (d->vmode)

51783

{

51784

case V4DFmode:

51785

+ if (d->testing_p)

51786

+ break;

51787

t1 = gen_reg_rtx (V4DFmode);

51788

t2 = gen_reg_rtx (V4DFmode);

51789

51790

@@ -40024,6 +40074,8 @@

51791

{

51792

int mask = odd ? 0xdd : 0x88;

51793

51794

+ if (d->testing_p)

51795

+ break;

51796

t1 = gen_reg_rtx (V8SFmode);

51797

t2 = gen_reg_rtx (V8SFmode);

51798

t3 = gen_reg_rtx (V8SFmode);

51799

@@ -40065,6 +40117,8 @@

51800

return expand_vec_perm_pshufb2 (d);

51801

else

51802

{

51803

+ if (d->testing_p)

51804

+ break;

51805

/* We need 2*log2(N)-1 operations to achieve odd/even

51806

with interleave. */

51807

t1 = gen_reg_rtx (V8HImode);

51808

@@ -40086,6 +40140,8 @@

51809

return expand_vec_perm_pshufb2 (d);

51810

else

51811

{

51812

+ if (d->testing_p)

51813

+ break;

51814

t1 = gen_reg_rtx (V16QImode);

51815

t2 = gen_reg_rtx (V16QImode);

51816

t3 = gen_reg_rtx (V16QImode);

51817

@@ -40118,6 +40174,9 @@

51818

return expand_vec_perm_even_odd_1 (&d_copy, odd);

51819

}

51820

51821

+ if (d->testing_p)

51822

+ break;

51823

+

51824

t1 = gen_reg_rtx (V4DImode);

51825

t2 = gen_reg_rtx (V4DImode);

51826

51827

@@ -40144,6 +40203,9 @@

51828

return expand_vec_perm_even_odd_1 (&d_copy, odd);

51829

}

51830

51831

+ if (d->testing_p)

51832

+ break;

51833

+

51834

t1 = gen_reg_rtx (V8SImode);

51835

t2 = gen_reg_rtx (V8SImode);

51836

51837

@@ -40236,6 +40298,8 @@

51838

case V16QImode:

51839

/* These can be implemented via interleave. We save one insn by

51840

stopping once we have promoted to V4SImode and then use pshufd. */

51841

+ if (d->testing_p)

51842

+ return true;

51843

do

51844

{

51845

rtx dest;

51846

@@ -42473,8 +42537,6 @@

51847

51848

#undef TARGET_PROMOTE_PROTOTYPES

51849

#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true

51850

-#undef TARGET_STRUCT_VALUE_RTX

51851

-#define TARGET_STRUCT_VALUE_RTX ix86_struct_value_rtx

51852

#undef TARGET_SETUP_INCOMING_VARARGS

51853

#define TARGET_SETUP_INCOMING_VARARGS ix86_setup_incoming_varargs

51854

#undef TARGET_MUST_PASS_IN_STACK

51855

Index: gcc/config/tilegx/tilegx.md

51856

===================================================================

51857

--- a/src/gcc/config/tilegx/tilegx.md (.../tags/gcc_4_8_2_release)

51858

+++ b/src/gcc/config/tilegx/tilegx.md (.../branches/gcc-4_8-branch)

51859

@@ -5076,10 +5076,8 @@

51860

51861

;; Network intrinsics

51862

51863

-;; Note the "pseudo" text is handled specially by the

51864

-;; asm_output_opcode routine. If the output is an empty string, the

51865

-;; instruction would bypass the asm_output_opcode routine, bypassing

51866

-;; the bundle handling code.

51867

+;; Note the this barrier is of type "nothing," which is deleted after

51868

+;; the final scheduling pass so that nothing is emitted for it.

51869

(define_insn "tilegx_network_barrier"

51870

[(unspec_volatile:SI [(const_int 0)] UNSPEC_NETWORK_BARRIER)]

51871

""

51872

Index: gcc/config/tilegx/tilegx-c.c

51873

===================================================================

51874

--- a/src/gcc/config/tilegx/tilegx-c.c (.../tags/gcc_4_8_2_release)

51875

+++ b/src/gcc/config/tilegx/tilegx-c.c (.../branches/gcc-4_8-branch)

51876

@@ -47,6 +47,9 @@

51877

if (TARGET_32BIT)

51878

builtin_define ("__tilegx32__");

51879

51880

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");

51881

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");

51882

+

51883

TILEGX_CPU_CPP_ENDIAN_BUILTINS ();

51884

GNU_USER_TARGET_OS_CPP_BUILTINS ();

51885

}

51886

Index: gcc/config/tilegx/sync.md

51887

===================================================================

51888

--- a/src/gcc/config/tilegx/sync.md (.../tags/gcc_4_8_2_release)

51889

+++ b/src/gcc/config/tilegx/sync.md (.../branches/gcc-4_8-branch)

51890

@@ -150,15 +150,22 @@

51891

(match_operand:SI 3 "const_int_operand" "")] ;; model

51892

""

51893

{

51894

+ rtx addend;

51895

enum memmodel model = (enum memmodel) INTVAL (operands[3]);

51896

51897

if (operands[2] != const0_rtx)

51898

- emit_move_insn (operands[2], gen_rtx_NEG (<MODE>mode, operands[2]));

51899

+ {

51900

+ addend = gen_reg_rtx (<MODE>mode);

51901

+ emit_move_insn (addend,

51902

+ gen_rtx_MINUS (<MODE>mode, const0_rtx, operands[2]));

51903

+ }

51904

+ else

51905

+ addend = operands[2];

51906

51907

tilegx_pre_atomic_barrier (model);

51908

emit_insn (gen_atomic_fetch_add_bare<mode> (operands[0],

51909

operands[1],

51910

- operands[2]));

51911

+ addend));

51912

tilegx_post_atomic_barrier (model);

51913

DONE;

51914

})

51915

Index: gcc/config/tilegx/tilegx.c

51916

===================================================================

51917

--- a/src/gcc/config/tilegx/tilegx.c (.../tags/gcc_4_8_2_release)

51918

+++ b/src/gcc/config/tilegx/tilegx.c (.../branches/gcc-4_8-branch)

51919

@@ -702,6 +702,16 @@

51920

}

51921

51922

51923

+/* Implement TARGET_EXPAND_TO_RTL_HOOK. */

51924

+static void

51925

+tilegx_expand_to_rtl_hook (void)

51926

+{

51927

+ /* Exclude earlier sets of crtl->uses_pic_offset_table, because we

51928

+ only care about uses actually emitted. */

51929

+ crtl->uses_pic_offset_table = 0;

51930

+}

51931

+

51932

+

51933

/* Implement TARGET_SHIFT_TRUNCATION_MASK. DImode shifts use the mode

51934

matching insns and therefore guarantee that the shift count is

51935

modulo 64. SImode shifts sometimes use the 64 bit version so do

51936

@@ -3543,6 +3553,12 @@

51937

}

51938

if (!pat)

51939

return NULL_RTX;

51940

+

51941

+ /* If we are generating a prefetch, tell the scheduler not to move

51942

+ it around. */

51943

+ if (GET_CODE (pat) == PREFETCH)

51944

+ PREFETCH_SCHEDULE_BARRIER_P (pat) = true;

51945

+

51946

emit_insn (pat);

51947

51948

if (nonvoid)

51949

@@ -4368,10 +4384,12 @@

51950

basic_block bb;

51951

FOR_EACH_BB (bb)

51952

{

51953

- rtx insn, next;

51954

+ rtx insn, next, prev;

51955

rtx end = NEXT_INSN (BB_END (bb));

51956

51957

- for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; insn = next)

51958

+ prev = NULL_RTX;

51959

+ for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn;

51960

+ prev = insn, insn = next)

51961

{

51962

next = next_insn_to_bundle (NEXT_INSN (insn), end);

51963

51964

@@ -4396,6 +4414,18 @@

51965

PUT_MODE (insn, SImode);

51966

}

51967

}

51968

+

51969

+ /* Delete barrier insns, because they can mess up the

51970

+ emitting of bundle braces. If it is end-of-bundle, then

51971

+ the previous insn must be marked end-of-bundle. */

51972

+ if (get_attr_type (insn) == TYPE_NOTHING) {

51973

+ if (GET_MODE (insn) == QImode && prev != NULL

51974

+ && GET_MODE (prev) == SImode)

51975

+ {

51976

+ PUT_MODE (prev, QImode);

51977

+ }

51978

+ delete_insn (insn);

51979

+ }

51980

}

51981

}

51982

}

51983

@@ -5498,6 +5528,9 @@

51984

#undef TARGET_RTX_COSTS

51985

#define TARGET_RTX_COSTS tilegx_rtx_costs

51986

51987

+#undef TARGET_EXPAND_TO_RTL_HOOK

51988

+#define TARGET_EXPAND_TO_RTL_HOOK tilegx_expand_to_rtl_hook

51989

+

51990

#undef TARGET_SHIFT_TRUNCATION_MASK

51991

#define TARGET_SHIFT_TRUNCATION_MASK tilegx_shift_truncation_mask

51992

51993

Index: gcc/config/sh/predicates.md

51994

===================================================================

51995

--- a/src/gcc/config/sh/predicates.md (.../tags/gcc_4_8_2_release)

51996

+++ b/src/gcc/config/sh/predicates.md (.../branches/gcc-4_8-branch)

51997

@@ -389,6 +389,12 @@

51998

XEXP (XEXP (op, 0), 1),

51999

TARGET_SH2A, true)")))

52000

52001

+;; Returns true if OP is a displacement address that can fit into a

52002

+;; 16 bit (non-SH2A) memory load / store insn.

52003

+(define_predicate "short_displacement_mem_operand"

52004

+ (match_test "sh_disp_addr_displacement (op)

52005

+ <= sh_max_mov_insn_displacement (GET_MODE (op), false)"))

52006

+

52007

;; Returns 1 if the operand can be used in an SH2A movu.{b|w} insn.

52008

(define_predicate "zero_extend_movu_operand"

52009

(and (match_operand 0 "displacement_mem_operand")

52010

@@ -413,6 +419,11 @@

52011

if (t_reg_operand (op, mode))

52012

return 0;

52013

52014

+ /* Disallow PC relative QImode loads, since these is no insn to do that

52015

+ and an imm8 load should be used instead. */

52016

+ if (IS_PC_RELATIVE_LOAD_ADDR_P (op) && GET_MODE (op) == QImode)

52017

+ return false;

52018

+

52019

if (MEM_P (op))

52020

{

52021

rtx inside = XEXP (op, 0);

52022

Index: gcc/config/sh/sh-protos.h

52023

===================================================================

52024

--- a/src/gcc/config/sh/sh-protos.h (.../tags/gcc_4_8_2_release)

52025

+++ b/src/gcc/config/sh/sh-protos.h (.../branches/gcc-4_8-branch)

52026

@@ -159,6 +159,8 @@

52027

extern bool sh_cfun_trap_exit_p (void);

52028

extern rtx sh_find_equiv_gbr_addr (rtx cur_insn, rtx mem);

52029

extern int sh_eval_treg_value (rtx op);

52030

+extern HOST_WIDE_INT sh_disp_addr_displacement (rtx mem_op);

52031

+extern int sh_max_mov_insn_displacement (machine_mode mode, bool consider_sh2a);

52032

52033

/* Result value of sh_find_set_of_reg. */

52034

struct set_of_reg

52035

Index: gcc/config/sh/sh.c

52036

===================================================================

52037

--- a/src/gcc/config/sh/sh.c (.../tags/gcc_4_8_2_release)

52038

+++ b/src/gcc/config/sh/sh.c (.../branches/gcc-4_8-branch)

52039

@@ -24,6 +24,9 @@

52040

malloc & co, which are poisoned by "system.h". The proper solution is

52041

to include <cstdlib> in "system.h" instead of <stdlib.h>. */

52042

#include <cstdlib>

52043

+#include <sstream>

52044

+#include <vector>

52045

+#include <algorithm>

52046

52047

#include "config.h"

52048

#include "system.h"

52049

@@ -60,10 +63,6 @@

52050

#include "tm-constrs.h"

52051

#include "opts.h"

52052

52053

-#include <sstream>

52054

-#include <vector>

52055

-#include <algorithm>

52056

-

52057

int code_for_indirect_jump_scratch = CODE_FOR_indirect_jump_scratch;

52058

52059

#define MSW (TARGET_LITTLE_ENDIAN ? 1 : 0)

52060

@@ -310,9 +309,7 @@

52061

static void sh_conditional_register_usage (void);

52062

static bool sh_legitimate_constant_p (enum machine_mode, rtx);

52063

static int mov_insn_size (enum machine_mode, bool);

52064

-static int max_mov_insn_displacement (enum machine_mode, bool);

52065

static int mov_insn_alignment_mask (enum machine_mode, bool);

52066

-static HOST_WIDE_INT disp_addr_displacement (rtx);

52067

static bool sequence_insn_p (rtx);

52068

static void sh_canonicalize_comparison (int *, rtx *, rtx *, bool);

52069

static void sh_canonicalize_comparison (enum rtx_code&, rtx&, rtx&,

52070

@@ -3628,8 +3625,8 @@

52071

52072

/* Determine the maximum possible displacement for a move insn for the

52073

specified mode. */

52074

-static int

52075

-max_mov_insn_displacement (enum machine_mode mode, bool consider_sh2a)

52076

+int

52077

+sh_max_mov_insn_displacement (machine_mode mode, bool consider_sh2a)

52078

{

52079

/* The 4 byte displacement move insns are the same as the 2 byte

52080

versions but take a 12 bit displacement. All we need to do is to

52081

@@ -3665,8 +3662,8 @@

52082

}

52083

52084

/* Return the displacement value of a displacement address. */

52085

-static inline HOST_WIDE_INT

52086

-disp_addr_displacement (rtx x)

52087

+HOST_WIDE_INT

52088

+sh_disp_addr_displacement (rtx x)

52089

{

52090

gcc_assert (satisfies_constraint_Sdd (x));

52091

return INTVAL (XEXP (XEXP (x, 0), 1));

52092

@@ -3703,12 +3700,12 @@

52093

HImode and QImode loads/stores with displacement put pressure on

52094

R0 which will most likely require another reg copy. Thus account

52095

a higher cost for that. */

52096

- if (offset > 0 && offset <= max_mov_insn_displacement (mode, false))

52097

+ if (offset > 0 && offset <= sh_max_mov_insn_displacement (mode, false))

52098

return (mode == HImode || mode == QImode) ? 2 : 1;

52099

52100

/* The displacement would fit into a 4 byte move insn (SH2A). */

52101

if (TARGET_SH2A

52102

- && offset > 0 && offset <= max_mov_insn_displacement (mode, true))

52103

+ && offset > 0 && offset <= sh_max_mov_insn_displacement (mode, true))

52104

return 2;

52105

52106

/* The displacement is probably out of range and will require extra

52107

@@ -10218,7 +10215,7 @@

52108

else

52109

{

52110

const HOST_WIDE_INT offset = INTVAL (op);

52111

- const int max_disp = max_mov_insn_displacement (mode, consider_sh2a);

52112

+ const int max_disp = sh_max_mov_insn_displacement (mode, consider_sh2a);

52113

const int align_mask = mov_insn_alignment_mask (mode, consider_sh2a);

52114

52115

/* If the mode does not support any displacement always return false.

52116

@@ -10404,7 +10401,7 @@

52117

effectively disable the small displacement insns. */

52118

const int mode_sz = GET_MODE_SIZE (mode);

52119

const int mov_insn_sz = mov_insn_size (mode, false);

52120

- const int max_disp = max_mov_insn_displacement (mode, false);

52121

+ const int max_disp = sh_max_mov_insn_displacement (mode, false);

52122

const int max_disp_next = max_disp + mov_insn_sz;

52123

HOST_WIDE_INT align_modifier = offset > 127 ? mov_insn_sz : 0;

52124

HOST_WIDE_INT offset_adjust;

52125

@@ -13165,7 +13162,8 @@

52126

the insns must have the appropriate alternatives. */

52127

if ((mode == QImode || mode == HImode) && rclass != R0_REGS

52128

&& satisfies_constraint_Sdd (x)

52129

- && disp_addr_displacement (x) <= max_mov_insn_displacement (mode, false))

52130

+ && sh_disp_addr_displacement (x)

52131

+ <= sh_max_mov_insn_displacement (mode, false))

52132

return R0_REGS;

52133

52134

/* When reload is trying to address a QImode or HImode subreg on the stack,

52135

Index: gcc/config/sh/constraints.md

52136

===================================================================

52137

--- a/src/gcc/config/sh/constraints.md (.../tags/gcc_4_8_2_release)

52138

+++ b/src/gcc/config/sh/constraints.md (.../branches/gcc-4_8-branch)

52139

@@ -221,6 +221,7 @@

52140

(define_constraint "Q"

52141

"A pc relative load operand."

52142

(and (match_code "mem")

52143

+ (match_test "GET_MODE (op) != QImode")

52144

(match_test "IS_PC_RELATIVE_LOAD_ADDR_P (XEXP (op, 0))")))

52145

52146

(define_constraint "Bsc"

52147

@@ -295,13 +296,15 @@

52148

52149

(define_memory_constraint "Sdd"

52150

"A memory reference that uses displacement addressing."

52151

- (and (match_test "MEM_P (op) && GET_CODE (XEXP (op, 0)) == PLUS")

52152

+ (and (match_code "mem")

52153

+ (match_test "GET_CODE (XEXP (op, 0)) == PLUS")

52154

(match_test "REG_P (XEXP (XEXP (op, 0), 0))")

52155

(match_test "CONST_INT_P (XEXP (XEXP (op, 0), 1))")))

52156

52157

(define_memory_constraint "Snd"

52158

"A memory reference that excludes displacement addressing."

52159

- (match_test "! satisfies_constraint_Sdd (op)"))

52160

+ (and (match_code "mem")

52161

+ (match_test "! satisfies_constraint_Sdd (op)")))

52162

52163

(define_memory_constraint "Sbv"

52164

"A memory reference, as used in SH2A bclr.b, bset.b, etc."

52165

Index: gcc/config/sh/sh.md

52166

===================================================================

52167

--- a/src/gcc/config/sh/sh.md (.../tags/gcc_4_8_2_release)

52168

+++ b/src/gcc/config/sh/sh.md (.../branches/gcc-4_8-branch)

52169

@@ -2152,6 +2152,7 @@

52170

(udiv:SI (reg:SI R4_REG) (reg:SI R5_REG)))

52171

(clobber (reg:SI T_REG))

52172

(clobber (reg:SI PR_REG))

52173

+ (clobber (reg:SI R1_REG))

52174

(clobber (reg:SI R4_REG))

52175

(use (match_operand:SI 1 "arith_reg_operand" "r"))]

52176

"TARGET_SH1 && TARGET_DIVIDE_CALL_DIV1"

52177

@@ -6831,34 +6832,9 @@

52178

prepare_move_operands (operands, QImode);

52179

})

52180

52181

-;; If movqi_reg_reg is specified as an alternative of movqi, movqi will be

52182

-;; selected to copy QImode regs. If one of them happens to be allocated

52183

-;; on the stack, reload will stick to movqi insn and generate wrong

52184

-;; displacement addressing because of the generic m alternatives.

52185

-;; With the movqi_reg_reg being specified before movqi it will be initially

52186

-;; picked to load/store regs. If the regs regs are on the stack reload

52187

-;; try other insns and not stick to movqi_reg_reg, unless there were spilled

52188

-;; pseudos in which case 'm' constraints pertain.

52189

-;; The same applies to the movhi variants.

52190

-;;

52191

-;; Notice, that T bit is not allowed as a mov src operand here. This is to

52192

-;; avoid things like (set (reg:QI) (subreg:QI (reg:SI T_REG) 0)), which

52193

-;; introduces zero extensions after T bit stores and redundant reg copies.

52194

-;;

52195

-;; FIXME: We can't use 'arith_reg_operand' (which disallows T_REG) as a

52196

-;; predicate for the mov src operand because reload will have trouble

52197

-;; reloading MAC subregs otherwise. For that probably special patterns

52198

-;; would be required.

52199

-(define_insn "*mov<mode>_reg_reg"

52200

- [(set (match_operand:QIHI 0 "arith_reg_dest" "=r,m,*z")

52201

- (match_operand:QIHI 1 "register_operand" "r,*z,m"))]

52202

- "TARGET_SH1 && !t_reg_operand (operands[1], VOIDmode)"

52203

- "@

52204

- mov %1,%0

52205

- mov.<bw> %1,%0

52206

- mov.<bw> %1,%0"

52207

- [(set_attr "type" "move,store,load")])

52208

-

52209

+;; Specifying the displacement addressing load / store patterns separately

52210

+;; before the generic movqi / movhi pattern allows controlling the order

52211

+;; in which load / store insns are selected in a more fine grained way.

52212

;; FIXME: The non-SH2A and SH2A variants should be combined by adding

52213

;; "enabled" attribute as it is done in other targets.

52214

(define_insn "*mov<mode>_store_mem_disp04"

52215

@@ -6908,38 +6884,44 @@

52216

[(set_attr "type" "load")

52217

(set_attr "length" "2,2,4")])

52218

52219

-;; The m constraints basically allow any kind of addresses to be used with any

52220

-;; source/target register as the other operand. This is not true for

52221

-;; displacement addressing modes on anything but SH2A. That's why the

52222

-;; specialized load/store insns are specified above.

52223

-(define_insn "*movqi"

52224

- [(set (match_operand:QI 0 "general_movdst_operand" "=r,r,m,r,l")

52225

- (match_operand:QI 1 "general_movsrc_operand" "i,m,r,l,r"))]

52226

+;; The order of the constraint alternatives is important here.

52227

+;; Q/r has to come first, otherwise PC relative loads might wrongly get

52228

+;; placed into delay slots. Since there is no QImode PC relative load, the

52229

+;; Q constraint and general_movsrc_operand will reject it for QImode.

52230

+;; The Snd alternatives should come before Sdd in order to avoid a preference

52231

+;; of using r0 als the register operand for addressing modes other than

52232

+;; displacement addressing.

52233

+;; The Sdd alternatives allow only r0 as register operand, even though on

52234

+;; SH2A any register could be allowed by switching to a 32 bit insn.

52235

+;; Generally sticking to the r0 is preferrable, since it generates smaller

52236

+;; code. Obvious r0 reloads can then be eliminated with a peephole on SH2A.

52237

+(define_insn "*mov<mode>"

52238

+ [(set (match_operand:QIHI 0 "general_movdst_operand"

52239

+ "=r,r,r,Snd,r, Sdd,z, r,l")

52240

+ (match_operand:QIHI 1 "general_movsrc_operand"

52241

+ "Q,r,i,r, Snd,z, Sdd,l,r"))]

52242

"TARGET_SH1

52243

- && (arith_reg_operand (operands[0], QImode)

52244

- || arith_reg_operand (operands[1], QImode))"

52245

+ && (arith_reg_operand (operands[0], <MODE>mode)

52246

+ || arith_reg_operand (operands[1], <MODE>mode))"

52247

"@

52248

+ mov.<bw> %1,%0

52249

mov %1,%0

52250

- mov.b %1,%0

52251

- mov.b %1,%0

52252

- sts %1,%0

52253

- lds %1,%0"

52254

- [(set_attr "type" "movi8,load,store,prget,prset")])

52255

-

52256

-(define_insn "*movhi"

52257

- [(set (match_operand:HI 0 "general_movdst_operand" "=r,r,r,m,r,l")

52258

- (match_operand:HI 1 "general_movsrc_operand" "Q,i,m,r,l,r"))]

52259

- "TARGET_SH1

52260

- && (arith_reg_operand (operands[0], HImode)

52261

- || arith_reg_operand (operands[1], HImode))"

52262

- "@

52263

- mov.w %1,%0

52264

mov %1,%0

52265

- mov.w %1,%0

52266

- mov.w %1,%0

52267

+ mov.<bw> %1,%0

52268

+ mov.<bw> %1,%0

52269

+ mov.<bw> %1,%0

52270

+ mov.<bw> %1,%0

52271

sts %1,%0

52272

lds %1,%0"

52273

- [(set_attr "type" "pcload,movi8,load,store,prget,prset")])

52274

+ [(set_attr "type" "pcload,move,movi8,store,load,store,load,prget,prset")

52275

+ (set (attr "length")

52276

+ (cond [(and (match_operand 0 "displacement_mem_operand")

52277

+ (not (match_operand 0 "short_displacement_mem_operand")))

52278

+ (const_int 4)

52279

+ (and (match_operand 1 "displacement_mem_operand")

52280

+ (not (match_operand 1 "short_displacement_mem_operand")))

52281

+ (const_int 4)]

52282

+ (const_int 2)))])

52283

52284

(define_insn "*movqi_media"

52285

[(set (match_operand:QI 0 "general_movdst_operand" "=r,r,r,m")

52286

@@ -8427,11 +8409,9 @@

52287

52288

while (true)

52289

{

52290

- /* It's not safe to go beyond the current basic block after reload. */

52291

set_of_reg s1 = sh_find_set_of_reg (tested_reg, s0.insn,

52292

- reload_completed

52293

- ? prev_nonnote_insn_bb

52294

- : prev_nonnote_insn);

52295

+ prev_nonnote_insn);

52296

+

52297

if (s1.set_src == NULL_RTX)

52298

break;

52299

52300

@@ -8449,15 +8429,25 @@

52301

continue;

52302

}

52303

52304

- /* It's only safe to remove the testing insn if the T bit is not

52305

- modified between the testing insn and the insn that stores the

52306

- T bit. Notice that some T bit stores such as negc also modify

52307

- the T bit. */

52308

- if (modified_between_p (get_t_reg_rtx (), s1.insn, testing_insn)

52309

- || modified_in_p (get_t_reg_rtx (), s1.insn))

52310

- operands[2] = NULL_RTX;

52311

+ /* It's only safe to remove the testing insn if the T bit is not

52312

+ modified between the testing insn and the insn that stores the

52313

+ T bit. Notice that some T bit stores such as negc also modify

52314

+ the T bit. */

52315

+ if (modified_between_p (get_t_reg_rtx (), s1.insn, testing_insn)

52316

+ || modified_in_p (get_t_reg_rtx (), s1.insn)

52317

+ || !no_labels_between_p (s1.insn, testing_insn))

52318

+ operands[2] = NULL_RTX;

52319

+ else

52320

+ {

52321

+ /* If the insn that sets the tested reg has a REG_DEAD note on

52322

+ the T bit remove that note since we're extending the usage

52323

+ of the T bit. */

52324

+ rtx n = find_regno_note (s1.insn, REG_DEAD, T_REG);

52325

+ if (n != NULL_RTX)

52326

+ remove_note (s1.insn, n);

52327

+ }

52328

52329

- break;

52330

+ break;

52331

}

52332

52333

if (operands[2] == NULL_RTX)

52334

Index: gcc/config/sh/sh.opt

52335

===================================================================

52336

--- a/src/gcc/config/sh/sh.opt (.../tags/gcc_4_8_2_release)

52337

+++ b/src/gcc/config/sh/sh.opt (.../branches/gcc-4_8-branch)

52338

@@ -21,7 +21,7 @@

52339

;; Used for various architecture options.

52340

Mask(SH_E)

52341

52342

-;; Set if the default precision of th FPU is single.

52343

+;; Set if the default precision of the FPU is single.

52344

Mask(FPU_SINGLE)

52345

52346

;; Set if the a double-precision FPU is present but is restricted to

52347

Index: gcc/config/microblaze/predicates.md

52348

===================================================================

52349

--- a/src/gcc/config/microblaze/predicates.md (.../tags/gcc_4_8_2_release)

52350

+++ b/src/gcc/config/microblaze/predicates.md (.../branches/gcc-4_8-branch)

52351

@@ -85,6 +85,10 @@

52352

(ior (match_operand 0 "const_0_operand")

52353

(match_operand 0 "register_operand")))

52354

52355

+(define_predicate "reg_or_mem_operand"

52356

+ (ior (match_operand 0 "memory_operand")

52357

+ (match_operand 0 "register_operand")))

52358

+

52359

;; Return if the operand is either the PC or a label_ref.

52360

(define_special_predicate "pc_or_label_operand"

52361

(ior (match_code "pc,label_ref")

52362

@@ -119,3 +123,7 @@

52363

;; Test for valid PIC call operand

52364

(define_predicate "call_insn_plt_operand"

52365

(match_test "PLT_ADDR_P (op)"))

52366

+

52367

+;; Return if the code of this rtx pattern is a comparison.

52368

+(define_predicate "cmp_op"

52369

+ (match_code "gt,ge,gtu,geu,lt,le,ltu,leu"))

52370

Index: gcc/config/microblaze/microblaze.md

52371

===================================================================

52372

--- a/src/gcc/config/microblaze/microblaze.md (.../tags/gcc_4_8_2_release)

52373

+++ b/src/gcc/config/microblaze/microblaze.md (.../branches/gcc-4_8-branch)

52374

@@ -74,7 +74,7 @@

52375

;; bshift Shift operations

52376

52377

(define_attr "type"

52378

- "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt"

52379

+ "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap"

52380

(const_string "unknown"))

52381

52382

;; Main data type used by the insn

52383

@@ -365,7 +365,8 @@

52384

[(set (match_operand:HI 0 "register_operand" "=r")

52385

(bswap:HI (match_operand:HI 1 "register_operand" "r")))]

52386

"TARGET_REORDER"

52387

- "swaph %0, %1"

52388

+ "swapb %0, %1

52389

+ swaph %0, %0"

52390

)

52391

52392

;;----------------------------------------------------------------

52393

@@ -1118,6 +1119,18 @@

52394

}

52395

)

52396

52397

+;;Load and store reverse

52398

+(define_insn "movsi4_rev"

52399

+ [(set (match_operand:SI 0 "reg_or_mem_operand" "=r,Q")

52400

+ (bswap:SI (match_operand:SF 1 "reg_or_mem_operand" "Q,r")))]

52401

+ "TARGET_REORDER"

52402

+ "@

52403

+ lwr\t%0,%y1,r0

52404

+ swr\t%1,%y0,r0"

52405

+ [(set_attr "type" "load,store")

52406

+ (set_attr "mode" "SI")

52407

+ (set_attr "length" "4,4")])

52408

+

52409

;; 32-bit floating point moves

52410

52411

(define_expand "movsf"

52412

@@ -1472,7 +1485,7 @@

52413

(set_attr "length" "124")]

52414

)

52415

52416

-(define_insn "*ashlri_reg"

52417

+(define_insn "*ashrsi_reg"

52418

[(set (match_operand:SI 0 "register_operand" "=&d")

52419

(ashiftrt:SI (match_operand:SI 1 "register_operand" "d")

52420

(match_operand:SI 2 "register_operand" "d")))]

52421

@@ -1561,7 +1574,7 @@

52422

(set_attr "length" "124")]

52423

)

52424

52425

-(define_insn "*lshlri_reg"

52426

+(define_insn "*lshrsi_reg"

52427

[(set (match_operand:SI 0 "register_operand" "=&d")

52428

(lshiftrt:SI (match_operand:SI 1 "register_operand" "d")

52429

(match_operand:SI 2 "register_operand" "d")))]

52430

@@ -1622,34 +1635,12 @@

52431

(set_attr "length" "4")]

52432

)

52433

52434

-(define_insn "signed_compare"

52435

- [(set (match_operand:SI 0 "register_operand" "=d")

52436

- (unspec

52437

- [(match_operand:SI 1 "register_operand" "d")

52438

- (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMP))]

52439

- ""

52440

- "cmp\t%0,%1,%2"

52441

- [(set_attr "type" "arith")

52442

- (set_attr "mode" "SI")

52443

- (set_attr "length" "4")])

52444

-

52445

-(define_insn "unsigned_compare"

52446

- [(set (match_operand:SI 0 "register_operand" "=d")

52447

- (unspec

52448

- [(match_operand:SI 1 "register_operand" "d")

52449

- (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMPU))]

52450

- ""

52451

- "cmpu\t%0,%1,%2"

52452

- [(set_attr "type" "arith")

52453

- (set_attr "mode" "SI")

52454

- (set_attr "length" "4")])

52455

-

52456

;;----------------------------------------------------------------

52457

;; Setting a register from an floating point comparison.

52458

;;----------------------------------------------------------------

52459

(define_insn "cstoresf4"

52460

[(set (match_operand:SI 0 "register_operand" "=r")

52461

- (match_operator 1 "comparison_operator"

52462

+ (match_operator:SI 1 "ordered_comparison_operator"

52463

[(match_operand:SF 2 "register_operand" "r")

52464

(match_operand:SF 3 "register_operand" "r")]))]

52465

"TARGET_HARD_FLOAT"

52466

@@ -1678,7 +1669,7 @@

52467

52468

(define_expand "cbranchsf4"

52469

[(set (pc)

52470

- (if_then_else (match_operator 0 "comparison_operator"

52471

+ (if_then_else (match_operator 0 "ordered_comparison_operator"

52472

[(match_operand:SF 1 "register_operand")

52473

(match_operand:SF 2 "register_operand")])

52474

(label_ref (match_operand 3 ""))

52475

@@ -1717,6 +1708,47 @@

52476

(set_attr "length" "4")]

52477

)

52478

52479

+(define_insn "branch_compare"

52480

+ [(set (pc)

52481

+ (if_then_else (match_operator:SI 0 "cmp_op"

52482

+ [(match_operand:SI 1 "register_operand" "d")

52483

+ (match_operand:SI 2 "register_operand" "d")

52484

+ ])

52485

+ (label_ref (match_operand 3))

52486

+ (pc)))

52487

+ (clobber(reg:SI R_TMP))]

52488

+ ""

52489

+ {

52490

+ operands[4] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);

52491

+ enum rtx_code code = GET_CODE (operands[0]);

52492

+

52493

+ if (code == GT || code == LE)

52494

+ {

52495

+ output_asm_insn ("cmp\tr18,%z1,%z2", operands);

52496

+ code = swap_condition (code);

52497

+ }

52498

+ else if (code == GTU || code == LEU)

52499

+ {

52500

+ output_asm_insn ("cmpu\tr18,%z1,%z2", operands);

52501

+ code = swap_condition (code);

52502

+ }

52503

+ else if (code == GE || code == LT)

52504

+ {

52505

+ output_asm_insn ("cmp\tr18,%z2,%z1", operands);

52506

+ }

52507

+ else if (code == GEU || code == LTU)

52508

+ {

52509

+ output_asm_insn ("cmpu\tr18,%z2,%z1", operands);

52510

+ }

52511

+

52512

+ operands[0] = gen_rtx_fmt_ee (signed_condition (code), SImode, operands[4], const0_rtx);

52513

+ return "b%C0i%?\tr18,%3";

52514

+ }

52515

+ [(set_attr "type" "branch")

52516

+ (set_attr "mode" "none")

52517

+ (set_attr "length" "12")]

52518

+)

52519

+

52520

;;----------------------------------------------------------------

52521

;; Unconditional branches

52522

;;----------------------------------------------------------------

52523

@@ -2201,6 +2233,14 @@

52524

(set_attr "mode" "none")

52525

(set_attr "length" "4")])

52526

52527

+;; Trap instruction pattern for __builtin_trap. Same as the glibc ABORT_INSTRUCTION

52528

+(define_insn "trap"

52529

+ [(trap_if (const_int 1) (const_int 0))]

52530

+ ""

52531

+ "brki\tr0,-1"

52532

+ [(set_attr "type" "trap")]

52533

+)

52534

+

52535

;; The insn to set GOT. The hardcoded number "8" accounts for $pc difference

52536

;; between "mfs" and "addik" instructions.

52537

(define_insn "set_got"

52538

Index: gcc/config/microblaze/microblaze.c

52539

===================================================================

52540

--- a/src/gcc/config/microblaze/microblaze.c (.../tags/gcc_4_8_2_release)

52541

+++ b/src/gcc/config/microblaze/microblaze.c (.../branches/gcc-4_8-branch)

52542

@@ -1609,21 +1609,28 @@

52543

microblaze_version_to_int (const char *version)

52544

{

52545

const char *p, *v;

52546

- const char *tmpl = "vX.YY.Z";

52547

+ const char *tmpl = "vXX.YY.Z";

52548

int iver = 0;

52549

52550

p = version;

52551

v = tmpl;

52552

52553

- while (*v)

52554

+ while (*p)

52555

{

52556

if (*v == 'X')

52557

{ /* Looking for major */

52558

- if (!(*p >= '0' && *p <= '9'))

52559

- return -1;

52560

- iver += (int) (*p - '0');

52561

- iver *= 10;

52562

- }

52563

+ if (*p == '.')

52564

+ {

52565

+ *v++;

52566

+ }

52567

+ else

52568

+ {

52569

+ if (!(*p >= '0' && *p <= '9'))

52570

+ return -1;

52571

+ iver += (int) (*p - '0');

52572

+ iver *= 10;

52573

+ }

52574

+ }

52575

else if (*v == 'Y')

52576

{ /* Looking for minor */

52577

if (!(*p >= '0' && *p <= '9'))

52578

@@ -3064,6 +3071,73 @@

52579

return result;

52580

}

52581

52582

+static void

52583

+microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,

52584

+ HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,

52585

+ tree function)

52586

+{

52587

+ rtx this_rtx, insn, funexp;

52588

+

52589

+ reload_completed = 1;

52590

+ epilogue_completed = 1;

52591

+

52592

+ /* Mark the end of the (empty) prologue. */

52593

+ emit_note (NOTE_INSN_PROLOGUE_END);

52594

+

52595

+ /* Find the "this" pointer. If the function returns a structure,

52596

+ the structure return pointer is in MB_ABI_FIRST_ARG_REGNUM. */

52597

+ if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))

52598

+ this_rtx = gen_rtx_REG (Pmode, (MB_ABI_FIRST_ARG_REGNUM + 1));

52599

+ else

52600

+ this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM);

52601

+

52602

+ /* Apply the constant offset, if required. */

52603

+ if (delta)

52604

+ emit_insn (gen_addsi3 (this_rtx, this_rtx, GEN_INT (delta)));

52605

+

52606

+ /* Apply the offset from the vtable, if required. */

52607

+ if (vcall_offset)

52608

+ {

52609

+ rtx vcall_offset_rtx = GEN_INT (vcall_offset);

52610

+ rtx temp1 = gen_rtx_REG (Pmode, MB_ABI_TEMP1_REGNUM);

52611

+

52612

+ emit_move_insn (temp1, gen_rtx_MEM (Pmode, this_rtx));

52613

+

52614

+ rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx);

52615

+ emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc));

52616

+

52617

+ emit_insn (gen_addsi3 (this_rtx, this_rtx, temp1));

52618

+ }

52619

+

52620

+ /* Generate a tail call to the target function. */

52621

+ if (!TREE_USED (function))

52622

+ {

52623

+ assemble_external (function);

52624

+ TREE_USED (function) = 1;

52625

+ }

52626

+

52627

+ funexp = XEXP (DECL_RTL (function), 0);

52628

+ rtx temp2 = gen_rtx_REG (Pmode, MB_ABI_TEMP2_REGNUM);

52629

+

52630

+ if (flag_pic)

52631

+ emit_move_insn (temp2, expand_pic_symbol_ref (Pmode, funexp));

52632

+ else

52633

+ emit_move_insn (temp2, funexp);

52634

+

52635

+ emit_insn (gen_indirect_jump (temp2));

52636

+

52637

+ /* Run just enough of rest_of_compilation. This sequence was

52638

+ "borrowed" from rs6000.c. */

52639

+ insn = get_insns ();

52640

+ shorten_branches (insn);

52641

+ final_start_function (insn, file, 1);

52642

+ final (insn, file, 1);

52643

+ final_end_function ();

52644

+

52645

+ reload_completed = 0;

52646

+ epilogue_completed = 0;

52647

+}

52648

+

52649

bool

52650

microblaze_expand_move (enum machine_mode mode, rtx operands[])

52651

{

52652

@@ -3234,67 +3308,47 @@

52653

emit_move_insn (mem, fnaddr);

52654

}

52655

52656

-/* Emit instruction to perform compare.

52657

- cmp is (compare_op op0 op1). */

52658

-static rtx

52659

-microblaze_emit_compare (enum machine_mode mode, rtx cmp, enum rtx_code *cmp_code)

52660

+/* Generate conditional branch -- first, generate test condition,

52661

+ second, generate correct branch instruction. */

52662

+

52663

+void

52664

+microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[])

52665

{

52666

- rtx cmp_op0 = XEXP (cmp, 0);

52667

- rtx cmp_op1 = XEXP (cmp, 1);

52668

+ enum rtx_code code = GET_CODE (operands[0]);

52669

+ rtx cmp_op0 = operands[1];

52670

+ rtx cmp_op1 = operands[2];

52671

+ rtx label1 = operands[3];

52672

rtx comp_reg = gen_reg_rtx (SImode);

52673

- enum rtx_code code = *cmp_code;

52674

-

52675

+ rtx condition;

52676

+

52677

gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG));

52678

52679

/* If comparing against zero, just test source reg. */

52680

- if (cmp_op1 == const0_rtx)

52681

- return cmp_op0;

52682

+ if (cmp_op1 == const0_rtx)

52683

+ {

52684

+ comp_reg = cmp_op0;

52685

+ condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx);

52686

+ emit_jump_insn (gen_condjump (condition, label1));

52687

+ }

52688

52689

- if (code == EQ || code == NE)

52690

+ else if (code == EQ || code == NE)

52691

{

52692

/* Use xor for equal/not-equal comparison. */

52693

emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));

52694

+ condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx);

52695

+ emit_jump_insn (gen_condjump (condition, label1));

52696

}

52697

- else if (code == GT || code == GTU || code == LE || code == LEU)

52698

+ else

52699

{

52700

- /* MicroBlaze compare is not symmetrical. */

52701

- /* Swap argument order. */

52702

+ /* Generate compare and branch in single instruction. */

52703

cmp_op1 = force_reg (mode, cmp_op1);

52704

- if (code == GT || code == LE)

52705

- emit_insn (gen_signed_compare (comp_reg, cmp_op0, cmp_op1));

52706

- else

52707

- emit_insn (gen_unsigned_compare (comp_reg, cmp_op0, cmp_op1));

52708

- /* Translate test condition. */

52709

- *cmp_code = swap_condition (code);

52710

+ condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1);

52711

+ emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1));

52712

}

52713

- else /* if (code == GE || code == GEU || code == LT || code == LTU) */

52714

- {

52715

- cmp_op1 = force_reg (mode, cmp_op1);

52716

- if (code == GE || code == LT)

52717

- emit_insn (gen_signed_compare (comp_reg, cmp_op1, cmp_op0));

52718

- else

52719

- emit_insn (gen_unsigned_compare (comp_reg, cmp_op1, cmp_op0));

52720

- }

52721

-

52722

- return comp_reg;

52723

}

52724

52725

-/* Generate conditional branch -- first, generate test condition,

52726

- second, generate correct branch instruction. */

52727

52728

void

52729

-microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[])

52730

-{

52731

- enum rtx_code code = GET_CODE (operands[0]);

52732

- rtx comp;

52733

- rtx condition;

52734

-

52735

- comp = microblaze_emit_compare (mode, operands[0], &code);

52736

- condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp, const0_rtx);

52737

- emit_jump_insn (gen_condjump (condition, operands[3]));

52738

-}

52739

-

52740

-void

52741

microblaze_expand_conditional_branch_sf (rtx operands[])

52742

{

52743

rtx condition;

52744

@@ -3501,6 +3555,12 @@

52745

#undef TARGET_SECONDARY_RELOAD

52746

#define TARGET_SECONDARY_RELOAD microblaze_secondary_reload

52747

52748

+#undef TARGET_ASM_OUTPUT_MI_THUNK

52749

+#define TARGET_ASM_OUTPUT_MI_THUNK microblaze_asm_output_mi_thunk

52750

+

52751

+#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK

52752

+#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true

52753

+

52754

#undef TARGET_SCHED_ADJUST_COST

52755

#define TARGET_SCHED_ADJUST_COST microblaze_adjust_cost

52756

52757

Index: gcc/config/microblaze/microblaze.h

52758

===================================================================

52759

--- a/src/gcc/config/microblaze/microblaze.h (.../tags/gcc_4_8_2_release)

52760

+++ b/src/gcc/config/microblaze/microblaze.h (.../branches/gcc-4_8-branch)

52761

@@ -213,6 +213,12 @@

52762

#define STRICT_ALIGNMENT 1

52763

#define PCC_BITFIELD_TYPE_MATTERS 1

52764

52765

+#undef SIZE_TYPE

52766

+#define SIZE_TYPE "unsigned int"

52767

+

52768

+#undef PTRDIFF_TYPE

52769

+#define PTRDIFF_TYPE "int"

52770

+

52771

#define CONSTANT_ALIGNMENT(EXP, ALIGN) \

52772

((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \

52773

&& (ALIGN) < BITS_PER_WORD \

52774

@@ -407,9 +413,6 @@

52775

|| GET_MODE (X) == VOIDmode) \

52776

? (GR_REGS) : (CLASS))))

52777

52778

-#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \

52779

- (GET_MODE_CLASS (MODE) == MODE_INT)

52780

-

52781

/* Stack layout; function entry, exit and calling. */

52782

52783

#define STACK_GROWS_DOWNWARD

52784

Index: gcc/config/avr/avr.md

52785

===================================================================

52786

--- a/src/gcc/config/avr/avr.md (.../tags/gcc_4_8_2_release)

52787

+++ b/src/gcc/config/avr/avr.md (.../branches/gcc-4_8-branch)

52788

@@ -89,7 +89,7 @@

52789

(include "constraints.md")

52790

52791

;; Condition code settings.

52792

-(define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber,

52793

+(define_attr "cc" "none,set_czn,set_zn,set_vzn,set_n,compare,clobber,

52794

plus,ldi"

52795

(const_string "none"))

52796

52797

@@ -1097,7 +1097,7 @@

52798

inc %0\;inc %0

52799

dec %0\;dec %0"

52800

[(set_attr "length" "1,1,1,1,2,2")

52801

- (set_attr "cc" "set_czn,set_czn,set_zn,set_zn,set_zn,set_zn")])

52802

+ (set_attr "cc" "set_czn,set_czn,set_vzn,set_vzn,set_vzn,set_vzn")])

52803

52804

;; "addhi3"

52805

;; "addhq3" "adduhq3"

52806

@@ -1368,7 +1368,7 @@

52807

dec %0\;dec %0

52808

inc %0\;inc %0"

52809

[(set_attr "length" "1,1,1,1,2,2")

52810

- (set_attr "cc" "set_czn,set_czn,set_zn,set_zn,set_zn,set_zn")])

52811

+ (set_attr "cc" "set_czn,set_czn,set_vzn,set_vzn,set_vzn,set_vzn")])

52812

52813

;; "subhi3"

52814

;; "subhq3" "subuhq3"

52815

@@ -3991,7 +3991,7 @@

52816

""

52817

"neg %0"

52818

[(set_attr "length" "1")

52819

- (set_attr "cc" "set_zn")])

52820

+ (set_attr "cc" "set_vzn")])

52821

52822

(define_insn "*negqihi2"

52823

[(set (match_operand:HI 0 "register_operand" "=r")

52824

Index: gcc/config/avr/avr.c

52825

===================================================================

52826

--- a/src/gcc/config/avr/avr.c (.../tags/gcc_4_8_2_release)

52827

+++ b/src/gcc/config/avr/avr.c (.../branches/gcc-4_8-branch)

52828

@@ -587,10 +587,14 @@

52829

const char *name;

52830

52831

name = DECL_ASSEMBLER_NAME_SET_P (decl)

52832

- /* Remove the leading '*' added in set_user_assembler_name. */

52833

- ? 1 + IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))

52834

+ ? IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))

52835

: IDENTIFIER_POINTER (DECL_NAME (decl));

52836

52837

+ /* Skip a leading '*' that might still prefix the assembler name,

52838

+ e.g. in non-LTO runs. */

52839

+

52840

+ name = default_strip_name_encoding (name);

52841

+

52842

/* Silently ignore 'signal' if 'interrupt' is present. AVR-LibC startet

52843

using this when it switched from SIGNAL and INTERRUPT to ISR. */

52844

52845

@@ -2339,6 +2343,12 @@

52846

}

52847

break;

52848

52849

+ case CC_SET_VZN:

52850

+ /* Insn like INC, DEC, NEG that set Z,N,V. We currently don't make use

52851

+ of this combination, cf. also PR61055. */

52852

+ CC_STATUS_INIT;

52853

+ break;

52854

+

52855

case CC_SET_CZN:

52856

/* Insn sets the Z,N,C flags of CC to recog_operand[0].

52857

The V flag may or may not be known but that's ok because

52858

@@ -3977,7 +3987,7 @@

52859

"std Y+61,%A1" CR_TAB

52860

"std Y+62,%B1" CR_TAB

52861

"std Y+63,%C1" CR_TAB

52862

- "sbiw r28,%o0-60", op, plen, -5);

52863

+ "sbiw r28,%o0-61", op, plen, -5);

52864

52865

return avr_asm_len ("subi r28,lo8(-%o0)" CR_TAB

52866

"sbci r29,hi8(-%o0)" CR_TAB

52867

@@ -6274,7 +6284,7 @@

52868

52869

if (REG_P (xop[2]))

52870

{

52871

- *pcc = MINUS == code ? (int) CC_SET_CZN : (int) CC_SET_N;

52872

+ *pcc = MINUS == code ? (int) CC_SET_CZN : (int) CC_CLOBBER;

52873

52874

for (i = 0; i < n_bytes; i++)

52875

{

52876

@@ -6383,7 +6393,7 @@

52877

op, plen, 1);

52878

52879

if (n_bytes == 2 && PLUS == code)

52880

- *pcc = CC_SET_ZN;

52881

+ *pcc = CC_SET_CZN;

52882

}

52883

52884

i++;

52885

@@ -6406,6 +6416,7 @@

52886

{

52887

avr_asm_len ((code == PLUS) ^ (val8 == 1) ? "dec %0" : "inc %0",

52888

op, plen, 1);

52889

+ *pcc = CC_CLOBBER;

52890

break;

52891

}

52892

52893

@@ -6806,8 +6817,8 @@

52894

52895

/* Work out the shortest sequence. */

52896

52897

- avr_out_plus_1 (op, &len_minus, MINUS, &cc_plus, code_sat, sign, out_label);

52898

- avr_out_plus_1 (op, &len_plus, PLUS, &cc_minus, code_sat, sign, out_label);

52899

+ avr_out_plus_1 (op, &len_minus, MINUS, &cc_minus, code_sat, sign, out_label);

52900

+ avr_out_plus_1 (op, &len_plus, PLUS, &cc_plus, code_sat, sign, out_label);

52901

52902

if (plen)

52903

{

52904

Index: gcc/config/cris/cris.md

52905

===================================================================

52906

--- a/src/gcc/config/cris/cris.md (.../tags/gcc_4_8_2_release)

52907

+++ b/src/gcc/config/cris/cris.md (.../branches/gcc-4_8-branch)

52908

@@ -758,7 +758,7 @@

52909

(match_operand:SI 1 "const_int_operand" ""))

52910

(match_operand:SI 2 "register_operand" ""))])

52911

(match_operand 3 "register_operand" ""))

52912

- (set (match_operand:SI 4 "register_operand" "")

52913

+ (set (match_operand:SI 4 "cris_nonsp_register_operand" "")

52914

(plus:SI (mult:SI (match_dup 0)

52915

(match_dup 1))

52916

(match_dup 2)))])]

52917

@@ -859,7 +859,7 @@

52918

(match_operand:SI 0 "cris_bdap_operand" "")

52919

(match_operand:SI 1 "cris_bdap_operand" ""))])

52920

(match_operand 2 "register_operand" ""))

52921

- (set (match_operand:SI 3 "register_operand" "")

52922

+ (set (match_operand:SI 3 "cris_nonsp_register_operand" "")

52923

(plus:SI (match_dup 0) (match_dup 1)))])]

52924

"reload_completed && reg_overlap_mentioned_p (operands[3], operands[2])"

52925

[(set (match_dup 4) (match_dup 2))

52926

@@ -3960,7 +3960,7 @@

52927

;; up.

52928

52929

(define_split

52930

- [(set (match_operand 0 "register_operand" "")

52931

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52932

(match_operator

52933

4 "cris_operand_extend_operator"

52934

[(match_operand 1 "register_operand" "")

52935

@@ -3990,7 +3990,7 @@

52936

;; Call this op-extend-split-rx=rz

52937

52938

(define_split

52939

- [(set (match_operand 0 "register_operand" "")

52940

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52941

(match_operator

52942

4 "cris_plus_or_bound_operator"

52943

[(match_operand 1 "register_operand" "")

52944

@@ -4018,7 +4018,7 @@

52945

;; Call this op-extend-split-swapped

52946

52947

(define_split

52948

- [(set (match_operand 0 "register_operand" "")

52949

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52950

(match_operator

52951

4 "cris_plus_or_bound_operator"

52952

[(match_operator

52953

@@ -4044,7 +4044,7 @@

52954

;; bound. Call this op-extend-split-swapped-rx=rz.

52955

52956

(define_split

52957

- [(set (match_operand 0 "register_operand" "")

52958

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52959

(match_operator

52960

4 "cris_plus_or_bound_operator"

52961

[(match_operator

52962

@@ -4075,7 +4075,7 @@

52963

;; Call this op-extend.

52964

52965

(define_split

52966

- [(set (match_operand 0 "register_operand" "")

52967

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52968

(match_operator

52969

3 "cris_orthogonal_operator"

52970

[(match_operand 1 "register_operand" "")

52971

@@ -4099,7 +4099,7 @@

52972

;; Call this op-split-rx=rz

52973

52974

(define_split

52975

- [(set (match_operand 0 "register_operand" "")

52976

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52977

(match_operator

52978

3 "cris_commutative_orth_op"

52979

[(match_operand 2 "memory_operand" "")

52980

@@ -4123,7 +4123,7 @@

52981

;; Call this op-split-swapped.

52982

52983

(define_split

52984

- [(set (match_operand 0 "register_operand" "")

52985

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52986

(match_operator

52987

3 "cris_commutative_orth_op"

52988

[(match_operand 1 "register_operand" "")

52989

@@ -4146,7 +4146,7 @@

52990

;; Call this op-split-swapped-rx=rz.

52991

52992

(define_split

52993

- [(set (match_operand 0 "register_operand" "")

52994

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

52995

(match_operator

52996

3 "cris_orthogonal_operator"

52997

[(match_operand 2 "memory_operand" "")

52998

@@ -4555,10 +4555,11 @@

52999

;; We're not allowed to generate copies of registers with different mode

53000

;; until after reload; copying pseudos upsets reload. CVS as of

53001

;; 2001-08-24, unwind-dw2-fde.c, _Unwind_Find_FDE ICE in

53002

-;; cselib_invalidate_regno.

53003

+;; cselib_invalidate_regno. Also, don't do this for the stack-pointer,

53004

+;; as we don't want it set temporarily to an invalid value.

53005

53006

(define_split ; indir_to_reg_split

53007

- [(set (match_operand 0 "register_operand" "")

53008

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

53009

(match_operand 1 "indirect_operand" ""))]

53010

"reload_completed

53011

&& REG_P (operands[0])

53012

@@ -4574,7 +4575,7 @@

53013

;; As the above, but MOVS and MOVU.

53014

53015

(define_split

53016

- [(set (match_operand 0 "register_operand" "")

53017

+ [(set (match_operand 0 "cris_nonsp_register_operand" "")

53018

(match_operator

53019

4 "cris_extend_operator"

53020

[(match_operand 1 "indirect_operand" "")]))]

53021

Index: gcc/config/cris/predicates.md

53022

===================================================================

53023

--- a/src/gcc/config/cris/predicates.md (.../tags/gcc_4_8_2_release)

53024

+++ b/src/gcc/config/cris/predicates.md (.../branches/gcc-4_8-branch)

53025

@@ -76,6 +76,10 @@

53026

(match_test "cris_simple_address_operand (XEXP (op, 0),

53027

Pmode)"))))

53028

53029

+(define_predicate "cris_nonsp_register_operand"

53030

+ (and (match_operand 0 "register_operand")

53031

+ (match_test "op != stack_pointer_rtx")))

53032

+

53033

;; The caller needs to use :SI.

53034

(define_predicate "cris_bdap_sign_extend_operand"

53035

; Disabled until <URL:http://gcc.gnu.org/ml/gcc-patches/2005-10/msg01376.html>

53036

Index: gcc/config/m68k/m68k.c

53037

===================================================================

53038

--- a/src/gcc/config/m68k/m68k.c (.../tags/gcc_4_8_2_release)

53039

+++ b/src/gcc/config/m68k/m68k.c (.../branches/gcc-4_8-branch)

53040

@@ -3325,12 +3325,12 @@

53041

latehalf[1] = adjust_address (operands[1], SImode, 0);

53042

}

53043

53044

- /* If insn is effectively movd N(sp),-(sp) then we will do the

53045

- high word first. We should use the adjusted operand 1 (which is N+4(sp))

53046

- for the low word as well, to compensate for the first decrement of sp. */

53047

+ /* If insn is effectively movd N(REG),-(REG) then we will do the high

53048

+ word first. We should use the adjusted operand 1 (which is N+4(REG))

53049

+ for the low word as well, to compensate for the first decrement of

53050

+ REG. */

53051

if (optype0 == PUSHOP

53052

- && REGNO (XEXP (XEXP (operands[0], 0), 0)) == STACK_POINTER_REGNUM

53053

- && reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))

53054

+ && reg_overlap_mentioned_p (XEXP (XEXP (operands[0], 0), 0), operands[1]))

53055

operands[1] = middlehalf[1] = latehalf[1];

53056

53057

/* For (set (reg:DI N) (mem:DI ... (reg:SI N) ...)),

53058

Index: gcc/config/aarch64/aarch64-simd.md

53059

===================================================================

53060

--- a/src/gcc/config/aarch64/aarch64-simd.md (.../tags/gcc_4_8_2_release)

53061

+++ b/src/gcc/config/aarch64/aarch64-simd.md (.../branches/gcc-4_8-branch)

53062

@@ -21,7 +21,7 @@

53063

53064

; Main data types used by the insntructions

53065

53066

-(define_attr "simd_mode" "unknown,none,V8QI,V16QI,V4HI,V8HI,V2SI,V4SI,V2DI,V2SF,V4SF,V2DF,OI,CI,XI,DI,DF,SI,HI,QI"

53067

+(define_attr "simd_mode" "unknown,none,V8QI,V16QI,V4HI,V8HI,V2SI,V4SI,V2DI,V2SF,V4SF,V2DF,OI,CI,XI,DI,DF,SI,SF,HI,QI"

53068

(const_string "unknown"))

53069

53070

53071

@@ -1548,12 +1548,12 @@

53072

53073

case LTU:

53074

case GEU:

53075

- emit_insn (gen_aarch64_cmhs<mode> (mask, operands[4], operands[5]));

53076

+ emit_insn (gen_aarch64_cmgeu<mode> (mask, operands[4], operands[5]));

53077

break;

53078

53079

case LEU:

53080

case GTU:

53081

- emit_insn (gen_aarch64_cmhi<mode> (mask, operands[4], operands[5]));

53082

+ emit_insn (gen_aarch64_cmgtu<mode> (mask, operands[4], operands[5]));

53083

break;

53084

53085

case NE:

53086

@@ -3034,48 +3034,181 @@

53087

)

53088

53089

53090

-;; cm(eq|ge|le|lt|gt)

53091

+;; cm(eq|ge|gt|lt|le)

53092

+;; Note, we have constraints for Dz and Z as different expanders

53093

+;; have different ideas of what should be passed to this pattern.

53094

53095

-(define_insn "aarch64_cm<cmp><mode>"

53096

+(define_insn "aarch64_cm<optab><mode>"

53097

[(set (match_operand:<V_cmp_result> 0 "register_operand" "=w,w")

53098

- (unspec:<V_cmp_result>

53099

- [(match_operand:VSDQ_I_DI 1 "register_operand" "w,w")

53100

- (match_operand:VSDQ_I_DI 2 "aarch64_simd_reg_or_zero" "w,Z")]

53101

- VCMP_S))]

53102

+ (neg:<V_cmp_result>

53103

+ (COMPARISONS:<V_cmp_result>

53104

+ (match_operand:VDQ 1 "register_operand" "w,w")

53105

+ (match_operand:VDQ 2 "aarch64_simd_reg_or_zero" "w,ZDz")

53106

+ )))]

53107

"TARGET_SIMD"

53108

"@

53109

- cm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>

53110

- cm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, #0"

53111

+ cm<n_optab>\t%<v>0<Vmtype>, %<v><cmp_1><Vmtype>, %<v><cmp_2><Vmtype>

53112

+ cm<optab>\t%<v>0<Vmtype>, %<v>1<Vmtype>, #0"

53113

[(set_attr "simd_type" "simd_cmp")

53114

(set_attr "simd_mode" "<MODE>")]

53115

)

53116

53117

-;; cm(hs|hi|tst)

53118

+(define_insn_and_split "aarch64_cm<optab>di"

53119

+ [(set (match_operand:DI 0 "register_operand" "=w,w,r")

53120

+ (neg:DI

53121

+ (COMPARISONS:DI

53122

+ (match_operand:DI 1 "register_operand" "w,w,r")

53123

+ (match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,ZDz,r")

53124

+ )))]

53125

+ "TARGET_SIMD"

53126

+ "@

53127

+ cm<n_optab>\t%d0, %d<cmp_1>, %d<cmp_2>

53128

+ cm<optab>\t%d0, %d1, #0

53129

+ #"

53130

+ "reload_completed

53131

+ /* We need to prevent the split from

53132

+ happening in the 'w' constraint cases. */

53133

+ && GP_REGNUM_P (REGNO (operands[0]))

53134

+ && GP_REGNUM_P (REGNO (operands[1]))"

53135

+ [(set (reg:CC CC_REGNUM)

53136

+ (compare:CC

53137

+ (match_dup 1)

53138

+ (match_dup 2)))

53139

+ (set (match_dup 0)

53140

+ (neg:DI

53141

+ (COMPARISONS:DI

53142

+ (match_operand 3 "cc_register" "")

53143

+ (const_int 0))))]

53144

+ {

53145

+ enum machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]);

53146

+ rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]);

53147

+ rtx comparison = gen_rtx_<CMP> (mode, operands[1], operands[2]);

53148

+ emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));

53149

+ DONE;

53150

+ }

53151

+ [(set_attr "simd_type" "simd_cmp")

53152

+ (set_attr "simd_mode" "DI")]

53153

+)

53154

53155

-(define_insn "aarch64_cm<cmp><mode>"

53156

+;; cm(hs|hi)

53157

+

53158

+(define_insn "aarch64_cm<optab><mode>"

53159

[(set (match_operand:<V_cmp_result> 0 "register_operand" "=w")

53160

- (unspec:<V_cmp_result>

53161

- [(match_operand:VSDQ_I_DI 1 "register_operand" "w")

53162

- (match_operand:VSDQ_I_DI 2 "register_operand" "w")]

53163

- VCMP_U))]

53164

+ (neg:<V_cmp_result>

53165

+ (UCOMPARISONS:<V_cmp_result>

53166

+ (match_operand:VDQ 1 "register_operand" "w")

53167

+ (match_operand:VDQ 2 "register_operand" "w")

53168

+ )))]

53169

"TARGET_SIMD"

53170

- "cm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"

53171

+ "cm<n_optab>\t%<v>0<Vmtype>, %<v><cmp_1><Vmtype>, %<v><cmp_2><Vmtype>"

53172

[(set_attr "simd_type" "simd_cmp")

53173

(set_attr "simd_mode" "<MODE>")]

53174

)

53175

53176

-;; fcm(eq|ge|le|lt|gt)

53177

+(define_insn_and_split "aarch64_cm<optab>di"

53178

+ [(set (match_operand:DI 0 "register_operand" "=w,r")

53179

+ (neg:DI

53180

+ (UCOMPARISONS:DI

53181

+ (match_operand:DI 1 "register_operand" "w,r")

53182

+ (match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,r")

53183

+ )))]

53184

+ "TARGET_SIMD"

53185

+ "@

53186

+ cm<n_optab>\t%d0, %d<cmp_1>, %d<cmp_2>

53187

+ #"

53188

+ "reload_completed

53189

+ /* We need to prevent the split from

53190

+ happening in the 'w' constraint cases. */

53191

+ && GP_REGNUM_P (REGNO (operands[0]))

53192

+ && GP_REGNUM_P (REGNO (operands[1]))"

53193

+ [(set (reg:CC CC_REGNUM)

53194

+ (compare:CC

53195

+ (match_dup 1)

53196

+ (match_dup 2)))

53197

+ (set (match_dup 0)

53198

+ (neg:DI

53199

+ (UCOMPARISONS:DI

53200

+ (match_operand 3 "cc_register" "")

53201

+ (const_int 0))))]

53202

+ {

53203

+ enum machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]);

53204

+ rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]);

53205

+ rtx comparison = gen_rtx_<CMP> (mode, operands[1], operands[2]);

53206

+ emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));

53207

+ DONE;

53208

+ }

53209

+ [(set_attr "simd_type" "simd_cmp")

53210

+ (set_attr "simd_mode" "DI")]

53211

+)

53212

53213

-(define_insn "aarch64_cm<cmp><mode>"

53214

+;; cmtst

53215

+

53216

+(define_insn "aarch64_cmtst<mode>"

53217

+ [(set (match_operand:<V_cmp_result> 0 "register_operand" "=w")

53218

+ (neg:<V_cmp_result>

53219

+ (ne:<V_cmp_result>

53220

+ (and:VDQ

53221

+ (match_operand:VDQ 1 "register_operand" "w")

53222

+ (match_operand:VDQ 2 "register_operand" "w"))

53223

+ (vec_duplicate:<V_cmp_result> (const_int 0)))))]

53224

+ "TARGET_SIMD"

53225

+ "cmtst\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"

53226

+ [(set_attr "simd_type" "simd_cmp")

53227

+ (set_attr "simd_mode" "<MODE>")]

53228

+)

53229

+

53230

+(define_insn_and_split "aarch64_cmtstdi"

53231

+ [(set (match_operand:DI 0 "register_operand" "=w,r")

53232

+ (neg:DI

53233

+ (ne:DI

53234

+ (and:DI

53235

+ (match_operand:DI 1 "register_operand" "w,r")

53236

+ (match_operand:DI 2 "register_operand" "w,r"))

53237

+ (const_int 0))))]

53238

+ "TARGET_SIMD"

53239

+ "@

53240

+ cmtst\t%d0, %d1, %d2

53241

+ #"

53242

+ "reload_completed

53243

+ /* We need to prevent the split from

53244

+ happening in the 'w' constraint cases. */

53245

+ && GP_REGNUM_P (REGNO (operands[0]))

53246

+ && GP_REGNUM_P (REGNO (operands[1]))"

53247

+ [(set (reg:CC_NZ CC_REGNUM)

53248

+ (compare:CC_NZ

53249

+ (and:DI (match_dup 1)

53250

+ (match_dup 2))

53251

+ (const_int 0)))

53252

+ (set (match_dup 0)

53253

+ (neg:DI

53254

+ (ne:DI

53255

+ (match_operand 3 "cc_register" "")

53256

+ (const_int 0))))]

53257

+ {

53258

+ rtx and_tree = gen_rtx_AND (DImode, operands[1], operands[2]);

53259

+ enum machine_mode mode = SELECT_CC_MODE (NE, and_tree, const0_rtx);

53260

+ rtx cc_reg = aarch64_gen_compare_reg (NE, and_tree, const0_rtx);

53261

+ rtx comparison = gen_rtx_NE (mode, and_tree, const0_rtx);

53262

+ emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));

53263

+ DONE;

53264

+ }

53265

+ [(set_attr "simd_type" "simd_cmp")

53266

+ (set_attr "simd_mode" "DI")]

53267

+)

53268

+

53269

+;; fcm(eq|ge|gt|le|lt)

53270

+

53271

+(define_insn "aarch64_cm<optab><mode>"

53272

[(set (match_operand:<V_cmp_result> 0 "register_operand" "=w,w")

53273

- (unspec:<V_cmp_result>

53274

- [(match_operand:VDQF 1 "register_operand" "w,w")

53275

- (match_operand:VDQF 2 "aarch64_simd_reg_or_zero" "w,Dz")]

53276

- VCMP_S))]

53277

+ (neg:<V_cmp_result>

53278

+ (COMPARISONS:<V_cmp_result>

53279

+ (match_operand:VALLF 1 "register_operand" "w,w")

53280

+ (match_operand:VALLF 2 "aarch64_simd_reg_or_zero" "w,YDz")

53281

+ )))]

53282

"TARGET_SIMD"

53283

"@

53284

- fcm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>

53285

- fcm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, 0"

53286

+ fcm<n_optab>\t%<v>0<Vmtype>, %<v><cmp_1><Vmtype>, %<v><cmp_2><Vmtype>

53287

+ fcm<optab>\t%<v>0<Vmtype>, %<v>1<Vmtype>, 0"

53288

[(set_attr "simd_type" "simd_fcmp")

53289

(set_attr "simd_mode" "<MODE>")]

53290

)

53291

Index: gcc/config/aarch64/predicates.md

53292

===================================================================

53293

--- a/src/gcc/config/aarch64/predicates.md (.../tags/gcc_4_8_2_release)

53294

+++ b/src/gcc/config/aarch64/predicates.md (.../branches/gcc-4_8-branch)

53295

@@ -31,6 +31,11 @@

53296

(ior (match_operand 0 "register_operand")

53297

(match_test "op == const0_rtx"))))

53298

53299

+(define_predicate "aarch64_reg_or_fp_zero"

53300

+ (and (match_code "reg,subreg,const_double")

53301

+ (ior (match_operand 0 "register_operand")

53302

+ (match_test "aarch64_float_const_zero_rtx_p (op)"))))

53303

+

53304

(define_predicate "aarch64_reg_zero_or_m1_or_1"

53305

(and (match_code "reg,subreg,const_int")

53306

(ior (match_operand 0 "register_operand")

53307

Index: gcc/config/aarch64/arm_neon.h

53308

===================================================================

53309

--- a/src/gcc/config/aarch64/arm_neon.h (.../tags/gcc_4_8_2_release)

53310

+++ b/src/gcc/config/aarch64/arm_neon.h (.../branches/gcc-4_8-branch)

53311

@@ -19551,7 +19551,7 @@

53312

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

53313

vcge_u8 (uint8x8_t __a, uint8x8_t __b)

53314

{

53315

- return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __a,

53316

+ return (uint8x8_t) __builtin_aarch64_cmgeuv8qi ((int8x8_t) __a,

53317

(int8x8_t) __b);

53318

}

53319

53320

@@ -19558,7 +19558,7 @@

53321

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

53322

vcge_u16 (uint16x4_t __a, uint16x4_t __b)

53323

{

53324

- return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __a,

53325

+ return (uint16x4_t) __builtin_aarch64_cmgeuv4hi ((int16x4_t) __a,

53326

(int16x4_t) __b);

53327

}

53328

53329

@@ -19565,7 +19565,7 @@

53330

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

53331

vcge_u32 (uint32x2_t __a, uint32x2_t __b)

53332

{

53333

- return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __a,

53334

+ return (uint32x2_t) __builtin_aarch64_cmgeuv2si ((int32x2_t) __a,

53335

(int32x2_t) __b);

53336

}

53337

53338

@@ -19572,7 +19572,7 @@

53339

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

53340

vcge_u64 (uint64x1_t __a, uint64x1_t __b)

53341

{

53342

- return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a,

53343

+ return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __a,

53344

(int64x1_t) __b);

53345

}

53346

53347

@@ -19603,7 +19603,7 @@

53348

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

53349

vcgeq_u8 (uint8x16_t __a, uint8x16_t __b)

53350

{

53351

- return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __a,

53352

+ return (uint8x16_t) __builtin_aarch64_cmgeuv16qi ((int8x16_t) __a,

53353

(int8x16_t) __b);

53354

}

53355

53356

@@ -19610,7 +19610,7 @@

53357

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

53358

vcgeq_u16 (uint16x8_t __a, uint16x8_t __b)

53359

{

53360

- return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __a,

53361

+ return (uint16x8_t) __builtin_aarch64_cmgeuv8hi ((int16x8_t) __a,

53362

(int16x8_t) __b);

53363

}

53364

53365

@@ -19617,7 +19617,7 @@

53366

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

53367

vcgeq_u32 (uint32x4_t __a, uint32x4_t __b)

53368

{

53369

- return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __a,

53370

+ return (uint32x4_t) __builtin_aarch64_cmgeuv4si ((int32x4_t) __a,

53371

(int32x4_t) __b);

53372

}

53373

53374

@@ -19624,7 +19624,7 @@

53375

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

53376

vcgeq_u64 (uint64x2_t __a, uint64x2_t __b)

53377

{

53378

- return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __a,

53379

+ return (uint64x2_t) __builtin_aarch64_cmgeuv2di ((int64x2_t) __a,

53380

(int64x2_t) __b);

53381

}

53382

53383

@@ -19637,7 +19637,7 @@

53384

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

53385

vcged_u64 (uint64x1_t __a, uint64x1_t __b)

53386

{

53387

- return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a,

53388

+ return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __a,

53389

(int64x1_t) __b);

53390

}

53391

53392

@@ -19676,7 +19676,7 @@

53393

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

53394

vcgt_u8 (uint8x8_t __a, uint8x8_t __b)

53395

{

53396

- return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __a,

53397

+ return (uint8x8_t) __builtin_aarch64_cmgtuv8qi ((int8x8_t) __a,

53398

(int8x8_t) __b);

53399

}

53400

53401

@@ -19683,7 +19683,7 @@

53402

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

53403

vcgt_u16 (uint16x4_t __a, uint16x4_t __b)

53404

{

53405

- return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __a,

53406

+ return (uint16x4_t) __builtin_aarch64_cmgtuv4hi ((int16x4_t) __a,

53407

(int16x4_t) __b);

53408

}

53409

53410

@@ -19690,7 +19690,7 @@

53411

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

53412

vcgt_u32 (uint32x2_t __a, uint32x2_t __b)

53413

{

53414

- return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __a,

53415

+ return (uint32x2_t) __builtin_aarch64_cmgtuv2si ((int32x2_t) __a,

53416

(int32x2_t) __b);

53417

}

53418

53419

@@ -19697,7 +19697,7 @@

53420

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

53421

vcgt_u64 (uint64x1_t __a, uint64x1_t __b)

53422

{

53423

- return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a,

53424

+ return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __a,

53425

(int64x1_t) __b);

53426

}

53427

53428

@@ -19728,7 +19728,7 @@

53429

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

53430

vcgtq_u8 (uint8x16_t __a, uint8x16_t __b)

53431

{

53432

- return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __a,

53433

+ return (uint8x16_t) __builtin_aarch64_cmgtuv16qi ((int8x16_t) __a,

53434

(int8x16_t) __b);

53435

}

53436

53437

@@ -19735,7 +19735,7 @@

53438

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

53439

vcgtq_u16 (uint16x8_t __a, uint16x8_t __b)

53440

{

53441

- return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __a,

53442

+ return (uint16x8_t) __builtin_aarch64_cmgtuv8hi ((int16x8_t) __a,

53443

(int16x8_t) __b);

53444

}

53445

53446

@@ -19742,7 +19742,7 @@

53447

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

53448

vcgtq_u32 (uint32x4_t __a, uint32x4_t __b)

53449

{

53450

- return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __a,

53451

+ return (uint32x4_t) __builtin_aarch64_cmgtuv4si ((int32x4_t) __a,

53452

(int32x4_t) __b);

53453

}

53454

53455

@@ -19749,7 +19749,7 @@

53456

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

53457

vcgtq_u64 (uint64x2_t __a, uint64x2_t __b)

53458

{

53459

- return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __a,

53460

+ return (uint64x2_t) __builtin_aarch64_cmgtuv2di ((int64x2_t) __a,

53461

(int64x2_t) __b);

53462

}

53463

53464

@@ -19762,7 +19762,7 @@

53465

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

53466

vcgtd_u64 (uint64x1_t __a, uint64x1_t __b)

53467

{

53468

- return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a,

53469

+ return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __a,

53470

(int64x1_t) __b);

53471

}

53472

53473

@@ -19801,7 +19801,7 @@

53474

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

53475

vcle_u8 (uint8x8_t __a, uint8x8_t __b)

53476

{

53477

- return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __b,

53478

+ return (uint8x8_t) __builtin_aarch64_cmgeuv8qi ((int8x8_t) __b,

53479

(int8x8_t) __a);

53480

}

53481

53482

@@ -19808,7 +19808,7 @@

53483

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

53484

vcle_u16 (uint16x4_t __a, uint16x4_t __b)

53485

{

53486

- return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __b,

53487

+ return (uint16x4_t) __builtin_aarch64_cmgeuv4hi ((int16x4_t) __b,

53488

(int16x4_t) __a);

53489

}

53490

53491

@@ -19815,7 +19815,7 @@

53492

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

53493

vcle_u32 (uint32x2_t __a, uint32x2_t __b)

53494

{

53495

- return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __b,

53496

+ return (uint32x2_t) __builtin_aarch64_cmgeuv2si ((int32x2_t) __b,

53497

(int32x2_t) __a);

53498

}

53499

53500

@@ -19822,7 +19822,7 @@

53501

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

53502

vcle_u64 (uint64x1_t __a, uint64x1_t __b)

53503

{

53504

- return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __b,

53505

+ return (uint64x1_t) __builtin_aarch64_cmgeudi ((int64x1_t) __b,

53506

(int64x1_t) __a);

53507

}

53508

53509

@@ -19853,7 +19853,7 @@

53510

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

53511

vcleq_u8 (uint8x16_t __a, uint8x16_t __b)

53512

{

53513

- return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __b,

53514

+ return (uint8x16_t) __builtin_aarch64_cmgeuv16qi ((int8x16_t) __b,

53515

(int8x16_t) __a);

53516

}

53517

53518

@@ -19860,7 +19860,7 @@

53519

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

53520

vcleq_u16 (uint16x8_t __a, uint16x8_t __b)

53521

{

53522

- return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __b,

53523

+ return (uint16x8_t) __builtin_aarch64_cmgeuv8hi ((int16x8_t) __b,

53524

(int16x8_t) __a);

53525

}

53526

53527

@@ -19867,7 +19867,7 @@

53528

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

53529

vcleq_u32 (uint32x4_t __a, uint32x4_t __b)

53530

{

53531

- return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __b,

53532

+ return (uint32x4_t) __builtin_aarch64_cmgeuv4si ((int32x4_t) __b,

53533

(int32x4_t) __a);

53534

}

53535

53536

@@ -19874,7 +19874,7 @@

53537

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

53538

vcleq_u64 (uint64x2_t __a, uint64x2_t __b)

53539

{

53540

- return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __b,

53541

+ return (uint64x2_t) __builtin_aarch64_cmgeuv2di ((int64x2_t) __b,

53542

(int64x2_t) __a);

53543

}

53544

53545

@@ -19919,7 +19919,7 @@

53546

__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))

53547

vclt_u8 (uint8x8_t __a, uint8x8_t __b)

53548

{

53549

- return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __b,

53550

+ return (uint8x8_t) __builtin_aarch64_cmgtuv8qi ((int8x8_t) __b,

53551

(int8x8_t) __a);

53552

}

53553

53554

@@ -19926,7 +19926,7 @@

53555

__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))

53556

vclt_u16 (uint16x4_t __a, uint16x4_t __b)

53557

{

53558

- return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __b,

53559

+ return (uint16x4_t) __builtin_aarch64_cmgtuv4hi ((int16x4_t) __b,

53560

(int16x4_t) __a);

53561

}

53562

53563

@@ -19933,7 +19933,7 @@

53564

__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))

53565

vclt_u32 (uint32x2_t __a, uint32x2_t __b)

53566

{

53567

- return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __b,

53568

+ return (uint32x2_t) __builtin_aarch64_cmgtuv2si ((int32x2_t) __b,

53569

(int32x2_t) __a);

53570

}

53571

53572

@@ -19940,7 +19940,7 @@

53573

__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))

53574

vclt_u64 (uint64x1_t __a, uint64x1_t __b)

53575

{

53576

- return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __b,

53577

+ return (uint64x1_t) __builtin_aarch64_cmgtudi ((int64x1_t) __b,

53578

(int64x1_t) __a);

53579

}

53580

53581

@@ -19971,7 +19971,7 @@

53582

__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))

53583

vcltq_u8 (uint8x16_t __a, uint8x16_t __b)

53584

{

53585

- return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __b,

53586

+ return (uint8x16_t) __builtin_aarch64_cmgtuv16qi ((int8x16_t) __b,

53587

(int8x16_t) __a);

53588

}

53589

53590

@@ -19978,7 +19978,7 @@

53591

__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))

53592

vcltq_u16 (uint16x8_t __a, uint16x8_t __b)

53593

{

53594

- return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __b,

53595

+ return (uint16x8_t) __builtin_aarch64_cmgtuv8hi ((int16x8_t) __b,

53596

(int16x8_t) __a);

53597

}

53598

53599

@@ -19985,7 +19985,7 @@

53600

__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))

53601

vcltq_u32 (uint32x4_t __a, uint32x4_t __b)

53602

{

53603

- return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __b,

53604

+ return (uint32x4_t) __builtin_aarch64_cmgtuv4si ((int32x4_t) __b,

53605

(int32x4_t) __a);

53606

}

53607

53608

@@ -19992,7 +19992,7 @@

53609

__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))

53610

vcltq_u64 (uint64x2_t __a, uint64x2_t __b)

53611

{

53612

- return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __b,

53613

+ return (uint64x2_t) __builtin_aarch64_cmgtuv2di ((int64x2_t) __b,

53614

(int64x2_t) __a);

53615

}

53616

53617

Index: gcc/config/aarch64/aarch64.md

53618

===================================================================

53619

--- a/src/gcc/config/aarch64/aarch64.md (.../tags/gcc_4_8_2_release)

53620

+++ b/src/gcc/config/aarch64/aarch64.md (.../branches/gcc-4_8-branch)

53621

@@ -2211,7 +2211,7 @@

53622

(set_attr "mode" "SI")]

53623

)

53624

53625

-(define_insn "*cstore<mode>_neg"

53626

+(define_insn "cstore<mode>_neg"

53627

[(set (match_operand:ALLI 0 "register_operand" "=r")

53628

(neg:ALLI (match_operator:ALLI 1 "aarch64_comparison_operator"

53629

[(match_operand 2 "cc_register" "") (const_int 0)])))]

53630

Index: gcc/config/aarch64/aarch64-simd-builtins.def

53631

===================================================================

53632

--- a/src/gcc/config/aarch64/aarch64-simd-builtins.def (.../tags/gcc_4_8_2_release)

53633

+++ b/src/gcc/config/aarch64/aarch64-simd-builtins.def (.../branches/gcc-4_8-branch)

53634

@@ -217,8 +217,8 @@

53635

BUILTIN_VSDQ_I_DI (BINOP, cmle)

53636

BUILTIN_VSDQ_I_DI (BINOP, cmlt)

53637

/* Implemented by aarch64_cm<cmp><mode>. */

53638

- BUILTIN_VSDQ_I_DI (BINOP, cmhs)

53639

- BUILTIN_VSDQ_I_DI (BINOP, cmhi)

53640

+ BUILTIN_VSDQ_I_DI (BINOP, cmgeu)

53641

+ BUILTIN_VSDQ_I_DI (BINOP, cmgtu)

53642

BUILTIN_VSDQ_I_DI (BINOP, cmtst)

53643

53644

/* Implemented by aarch64_<fmaxmin><mode>. */

53645

Index: gcc/config/aarch64/aarch64.c

53646

===================================================================

53647

--- a/src/gcc/config/aarch64/aarch64.c (.../tags/gcc_4_8_2_release)

53648

+++ b/src/gcc/config/aarch64/aarch64.c (.../branches/gcc-4_8-branch)

53649

@@ -2274,7 +2274,7 @@

53650

if (ncount < zcount)

53651

{

53652

emit_move_insn (gen_rtx_REG (Pmode, regnum),

53653

- GEN_INT ((~val) & 0xffff));

53654

+ GEN_INT (val | ~(HOST_WIDE_INT) 0xffff));

53655

tval = 0xffff;

53656

}

53657

else

53658

@@ -4568,9 +4568,11 @@

53659

}

53660

53661

static int

53662

-aarch64_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,

53663

- reg_class_t from, reg_class_t to)

53664

+aarch64_register_move_cost (enum machine_mode mode,

53665

+ reg_class_t from_i, reg_class_t to_i)

53666

{

53667

+ enum reg_class from = (enum reg_class) from_i;

53668

+ enum reg_class to = (enum reg_class) to_i;

53669

const struct cpu_regmove_cost *regmove_cost

53670

= aarch64_tune_params->regmove_cost;

53671

53672

@@ -4586,8 +4588,7 @@

53673

secondary reload. A general register is used as a scratch to move

53674

the upper DI value and the lower DI value is moved directly,

53675

hence the cost is the sum of three moves. */

53676

-

53677

- if (! TARGET_SIMD && GET_MODE_SIZE (from) == 128 && GET_MODE_SIZE (to) == 128)

53678

+ if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 128)

53679

return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP;

53680

53681

return regmove_cost->FP2FP;

53682

Index: gcc/config/aarch64/iterators.md

53683

===================================================================

53684

--- a/src/gcc/config/aarch64/iterators.md (.../tags/gcc_4_8_2_release)

53685

+++ b/src/gcc/config/aarch64/iterators.md (.../branches/gcc-4_8-branch)

53686

@@ -83,6 +83,9 @@

53687

;; Vector Float modes.

53688

(define_mode_iterator VDQF [V2SF V4SF V2DF])

53689

53690

+;; All Float modes.

53691

+(define_mode_iterator VALLF [V2SF V4SF V2DF SF DF])

53692

+

53693

;; Vector Float modes with 2 elements.

53694

(define_mode_iterator V2F [V2SF V2DF])

53695

53696

@@ -213,13 +216,6 @@

53697

UNSPEC_URSHL ; Used in aarch64-simd.md.

53698

UNSPEC_SQRSHL ; Used in aarch64-simd.md.

53699

UNSPEC_UQRSHL ; Used in aarch64-simd.md.

53700

- UNSPEC_CMEQ ; Used in aarch64-simd.md.

53701

- UNSPEC_CMLE ; Used in aarch64-simd.md.

53702

- UNSPEC_CMLT ; Used in aarch64-simd.md.

53703

- UNSPEC_CMGE ; Used in aarch64-simd.md.

53704

- UNSPEC_CMGT ; Used in aarch64-simd.md.

53705

- UNSPEC_CMHS ; Used in aarch64-simd.md.

53706

- UNSPEC_CMHI ; Used in aarch64-simd.md.

53707

UNSPEC_SSLI ; Used in aarch64-simd.md.

53708

UNSPEC_USLI ; Used in aarch64-simd.md.

53709

UNSPEC_SSRI ; Used in aarch64-simd.md.

53710

@@ -227,7 +223,6 @@

53711

UNSPEC_SSHLL ; Used in aarch64-simd.md.

53712

UNSPEC_USHLL ; Used in aarch64-simd.md.

53713

UNSPEC_ADDP ; Used in aarch64-simd.md.

53714

- UNSPEC_CMTST ; Used in aarch64-simd.md.

53715

UNSPEC_FMAX ; Used in aarch64-simd.md.

53716

UNSPEC_FMIN ; Used in aarch64-simd.md.

53717

UNSPEC_BSL ; Used in aarch64-simd.md.

53718

@@ -251,6 +246,7 @@

53719

53720

;; For scalar usage of vector/FP registers

53721

(define_mode_attr v [(QI "b") (HI "h") (SI "s") (DI "d")

53722

+ (SF "s") (DF "d")

53723

(V8QI "") (V16QI "")

53724

(V4HI "") (V8HI "")

53725

(V2SI "") (V4SI "")

53726

@@ -305,7 +301,8 @@

53727

(V4SF ".4s") (V2DF ".2d")

53728

(DI "") (SI "")

53729

(HI "") (QI "")

53730

- (TI "")])

53731

+ (TI "") (SF "")

53732

+ (DF "")])

53733

53734

;; Register suffix narrowed modes for VQN.

53735

(define_mode_attr Vmntype [(V8HI ".8b") (V4SI ".4h")

53736

@@ -444,7 +441,8 @@

53737

(V2SI "V2SI") (V4SI "V4SI")

53738

(DI "DI") (V2DI "V2DI")

53739

(V2SF "V2SI") (V4SF "V4SI")

53740

- (V2DF "V2DI")])

53741

+ (V2DF "V2DI") (DF "DI")

53742

+ (SF "SI")])

53743

53744

;; Lower case mode of results of comparison operations.

53745

(define_mode_attr v_cmp_result [(V8QI "v8qi") (V16QI "v16qi")

53746

@@ -452,7 +450,8 @@

53747

(V2SI "v2si") (V4SI "v4si")

53748

(DI "di") (V2DI "v2di")

53749

(V2SF "v2si") (V4SF "v4si")

53750

- (V2DF "v2di")])

53751

+ (V2DF "v2di") (DF "di")

53752

+ (SF "si")])

53753

53754

;; Vm for lane instructions is restricted to FP_LO_REGS.

53755

(define_mode_attr vwx [(V4HI "x") (V8HI "x") (HI "x")

53756

@@ -543,6 +542,12 @@

53757

;; Code iterator for signed variants of vector saturating binary ops.

53758

(define_code_iterator SBINQOPS [ss_plus ss_minus])

53759

53760

+;; Comparison operators for <F>CM.

53761

+(define_code_iterator COMPARISONS [lt le eq ge gt])

53762

+

53763

+;; Unsigned comparison operators.

53764

+(define_code_iterator UCOMPARISONS [ltu leu geu gtu])

53765

+

53766

;; -------------------------------------------------------------------

53767

;; Code Attributes

53768

;; -------------------------------------------------------------------

53769

@@ -571,8 +576,29 @@

53770

(eq "eq")

53771

(ne "ne")

53772

(lt "lt")

53773

- (ge "ge")])

53774

+ (ge "ge")

53775

+ (le "le")

53776

+ (gt "gt")

53777

+ (ltu "ltu")

53778

+ (leu "leu")

53779

+ (geu "geu")

53780

+ (gtu "gtu")])

53781

53782

+;; For comparison operators we use the FCM* and CM* instructions.

53783

+;; As there are no CMLE or CMLT instructions which act on 3 vector

53784

+;; operands, we must use CMGE or CMGT and swap the order of the

53785

+;; source operands.

53786

+

53787

+(define_code_attr n_optab [(lt "gt") (le "ge") (eq "eq") (ge "ge") (gt "gt")

53788

+ (ltu "hi") (leu "hs") (geu "hs") (gtu "hi")])

53789

+(define_code_attr cmp_1 [(lt "2") (le "2") (eq "1") (ge "1") (gt "1")

53790

+ (ltu "2") (leu "2") (geu "1") (gtu "1")])

53791

+(define_code_attr cmp_2 [(lt "1") (le "1") (eq "2") (ge "2") (gt "2")

53792

+ (ltu "1") (leu "1") (geu "2") (gtu "2")])

53793

+

53794

+(define_code_attr CMP [(lt "LT") (le "LE") (eq "EQ") (ge "GE") (gt "GT")

53795

+ (ltu "LTU") (leu "LEU") (geu "GEU") (gtu "GTU")])

53796

+

53797

;; Optab prefix for sign/zero-extending operations

53798

(define_code_attr su_optab [(sign_extend "") (zero_extend "u")

53799

(div "") (udiv "u")

53800

@@ -680,11 +706,6 @@

53801

UNSPEC_SQSHRN UNSPEC_UQSHRN

53802

UNSPEC_SQRSHRN UNSPEC_UQRSHRN])

53803

53804

-(define_int_iterator VCMP_S [UNSPEC_CMEQ UNSPEC_CMGE UNSPEC_CMGT

53805

- UNSPEC_CMLE UNSPEC_CMLT])

53806

-

53807

-(define_int_iterator VCMP_U [UNSPEC_CMHS UNSPEC_CMHI UNSPEC_CMTST])

53808

-

53809

(define_int_iterator PERMUTE [UNSPEC_ZIP1 UNSPEC_ZIP2

53810

UNSPEC_TRN1 UNSPEC_TRN2

53811

UNSPEC_UZP1 UNSPEC_UZP2])

53812

@@ -768,12 +789,6 @@

53813

(UNSPEC_RADDHN2 "add")

53814

(UNSPEC_RSUBHN2 "sub")])

53815

53816

-(define_int_attr cmp [(UNSPEC_CMGE "ge") (UNSPEC_CMGT "gt")

53817

- (UNSPEC_CMLE "le") (UNSPEC_CMLT "lt")

53818

- (UNSPEC_CMEQ "eq")

53819

- (UNSPEC_CMHS "hs") (UNSPEC_CMHI "hi")

53820

- (UNSPEC_CMTST "tst")])

53821

-

53822

(define_int_attr offsetlr [(UNSPEC_SSLI "1") (UNSPEC_USLI "1")

53823

(UNSPEC_SSRI "0") (UNSPEC_USRI "0")])

53824

53825

Index: gcc/config/aarch64/aarch64.h

53826

===================================================================

53827

--- a/src/gcc/config/aarch64/aarch64.h (.../tags/gcc_4_8_2_release)

53828

+++ b/src/gcc/config/aarch64/aarch64.h (.../branches/gcc-4_8-branch)

53829

@@ -73,9 +73,9 @@

53830

#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)

53831

53832

/* AdvSIMD is supported in the default configuration, unless disabled by

53833

- -mgeneral-regs-only. */

53834

-#define TARGET_SIMD !TARGET_GENERAL_REGS_ONLY

53835

-#define TARGET_FLOAT !TARGET_GENERAL_REGS_ONLY

53836

+ -mgeneral-regs-only or the +nosimd extension. */

53837

+#define TARGET_SIMD (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_SIMD)

53838

+#define TARGET_FLOAT (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_FP)

53839

53840

#define UNITS_PER_WORD 8

53841

53842

Index: gcc/config/rs6000/power8.md

53843

===================================================================

53844

--- a/src/gcc/config/rs6000/power8.md (.../tags/gcc_4_8_2_release)

53845

+++ b/src/gcc/config/rs6000/power8.md (.../branches/gcc-4_8-branch)

53846

@@ -0,0 +1,373 @@

53847

+;; Scheduling description for IBM POWER8 processor.

53848

53849

+;;

53850

+;; Contributed by Pat Haugen (pthaugen@us.ibm.com).

53851

+

53852

+;; This file is part of GCC.

53853

+;;

53854

+;; GCC is free software; you can redistribute it and/or modify it

53855

+;; under the terms of the GNU General Public License as published

53856

+;; by the Free Software Foundation; either version 3, or (at your

53857

+;; option) any later version.

53858

+;;

53859

+;; GCC is distributed in the hope that it will be useful, but WITHOUT

53860

+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

53861

+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public

53862

+;; License for more details.

53863

+;;

53864

+;; You should have received a copy of the GNU General Public License

53865

+;; along with GCC; see the file COPYING3. If not see

53866

+;; <http://www.gnu.org/licenses/>.

53867

+

53868

+(define_automaton "power8fxu,power8lsu,power8vsu,power8misc")

53869

+

53870

+(define_cpu_unit "fxu0_power8,fxu1_power8" "power8fxu")

53871

+(define_cpu_unit "lu0_power8,lu1_power8" "power8lsu")

53872

+(define_cpu_unit "lsu0_power8,lsu1_power8" "power8lsu")

53873

+(define_cpu_unit "vsu0_power8,vsu1_power8" "power8vsu")

53874

+(define_cpu_unit "bpu_power8,cru_power8" "power8misc")

53875

+(define_cpu_unit "du0_power8,du1_power8,du2_power8,du3_power8,du4_power8,\

53876

+ du5_power8,du6_power8" "power8misc")

53877

+

53878

+

53879

+; Dispatch group reservations

53880

+(define_reservation "DU_any_power8"

53881

53882

+ du5_power8")

53883

+

53884

+; 2-way Cracked instructions go in slots 0-1

53885

+; (can also have a second in slots 3-4 if insns are adjacent)

53886

+(define_reservation "DU_cracked_power8"

53887

+ "du0_power8+du1_power8")

53888

+

53889

+; Insns that are first in group

53890

+(define_reservation "DU_first_power8"

53891

+ "du0_power8")

53892

+

53893

+; Insns that are first and last in group

53894

+(define_reservation "DU_both_power8"

53895

+ "du0_power8+du1_power8+du2_power8+du3_power8+du4_power8+\

53896

+ du5_power8+du6_power8")

53897

+

53898

+; Dispatch slots are allocated in order conforming to program order.

53899

+(absence_set "du0_power8" "du1_power8,du2_power8,du3_power8,du4_power8,\

53900

+ du5_power8,du6_power8")

53901

+(absence_set "du1_power8" "du2_power8,du3_power8,du4_power8,du5_power8,\

53902

+ du6_power8")

53903

+(absence_set "du2_power8" "du3_power8,du4_power8,du5_power8,du6_power8")

53904

+(absence_set "du3_power8" "du4_power8,du5_power8,du6_power8")

53905

+(absence_set "du4_power8" "du5_power8,du6_power8")

53906

+(absence_set "du5_power8" "du6_power8")

53907

+

53908

+

53909

+; Execution unit reservations

53910

+(define_reservation "FXU_power8"

53911

+ "fxu0_power8|fxu1_power8")

53912

+

53913

+(define_reservation "LU_power8"

53914

+ "lu0_power8|lu1_power8")

53915

+

53916

+(define_reservation "LSU_power8"

53917

+ "lsu0_power8|lsu1_power8")

53918

+

53919

+(define_reservation "LU_or_LSU_power8"

53920

+ "lu0_power8|lu1_power8|lsu0_power8|lsu1_power8")

53921

+

53922

+(define_reservation "VSU_power8"

53923

+ "vsu0_power8|vsu1_power8")

53924

+

53925

+

53926

+; LS Unit

53927

+(define_insn_reservation "power8-load" 3

53928

+ (and (eq_attr "type" "load")

53929

+ (eq_attr "cpu" "power8"))

53930

+ "DU_any_power8,LU_or_LSU_power8")

53931

+

53932

+(define_insn_reservation "power8-load-update" 3

53933

+ (and (eq_attr "type" "load_u,load_ux")

53934

+ (eq_attr "cpu" "power8"))

53935

+ "DU_cracked_power8,LU_or_LSU_power8+FXU_power8")

53936

+

53937

+(define_insn_reservation "power8-load-ext" 3

53938

+ (and (eq_attr "type" "load_ext")

53939

+ (eq_attr "cpu" "power8"))

53940

+ "DU_cracked_power8,LU_or_LSU_power8,FXU_power8")

53941

+

53942

+(define_insn_reservation "power8-load-ext-update" 3

53943

+ (and (eq_attr "type" "load_ext_u,load_ext_ux")

53944

+ (eq_attr "cpu" "power8"))

53945

+ "DU_both_power8,LU_or_LSU_power8+FXU_power8,FXU_power8")

53946

+

53947

+(define_insn_reservation "power8-fpload" 5

53948

+ (and (eq_attr "type" "fpload,vecload")

53949

+ (eq_attr "cpu" "power8"))

53950

+ "DU_any_power8,LU_power8")

53951

+

53952

+(define_insn_reservation "power8-fpload-update" 5

53953

+ (and (eq_attr "type" "fpload_u,fpload_ux")

53954

+ (eq_attr "cpu" "power8"))

53955

+ "DU_cracked_power8,LU_power8+FXU_power8")

53956

+

53957

+(define_insn_reservation "power8-store" 5 ; store-forwarding latency

53958

+ (and (eq_attr "type" "store,store_u")

53959

+ (eq_attr "cpu" "power8"))

53960

+ "DU_any_power8,LSU_power8+LU_power8")

53961

+

53962

+(define_insn_reservation "power8-store-update-indexed" 5

53963

+ (and (eq_attr "type" "store_ux")

53964

+ (eq_attr "cpu" "power8"))

53965

+ "DU_cracked_power8,LSU_power8+LU_power8")

53966

+

53967

+(define_insn_reservation "power8-fpstore" 5

53968

+ (and (eq_attr "type" "fpstore")

53969

+ (eq_attr "cpu" "power8"))

53970

+ "DU_any_power8,LSU_power8+VSU_power8")

53971

+

53972

+(define_insn_reservation "power8-fpstore-update" 5

53973

+ (and (eq_attr "type" "fpstore_u,fpstore_ux")

53974

+ (eq_attr "cpu" "power8"))

53975

+ "DU_any_power8,LSU_power8+VSU_power8")

53976

+

53977

+(define_insn_reservation "power8-vecstore" 5

53978

+ (and (eq_attr "type" "vecstore")

53979

+ (eq_attr "cpu" "power8"))

53980

+ "DU_cracked_power8,LSU_power8+VSU_power8")

53981

+

53982

+(define_insn_reservation "power8-larx" 3

53983

+ (and (eq_attr "type" "load_l")

53984

+ (eq_attr "cpu" "power8"))

53985

+ "DU_both_power8,LU_or_LSU_power8")

53986

+

53987

+(define_insn_reservation "power8-stcx" 10

53988

+ (and (eq_attr "type" "store_c")

53989

+ (eq_attr "cpu" "power8"))

53990

+ "DU_both_power8,LSU_power8+LU_power8")

53991

+

53992

+(define_insn_reservation "power8-sync" 1

53993

+ (and (eq_attr "type" "sync,isync")

53994

+ (eq_attr "cpu" "power8"))

53995

+ "DU_both_power8,LSU_power8")

53996

+

53997

+

53998

+; FX Unit

53999

+(define_insn_reservation "power8-1cyc" 1

54000

+ (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\

54001

+ var_shift_rotate,exts,isel")

54002

+ (eq_attr "cpu" "power8"))

54003

+ "DU_any_power8,FXU_power8")

54004

+

54005

+; Extra cycle to LU/LSU

54006

+(define_bypass 2 "power8-1cyc"

54007

+ "power8-load*,power8-fpload*,power8-store*,power8-fpstore*,\

54008

+ power8-vecstore,power8-larx,power8-stcx")

54009

+; "power8-load,power8-load-update,power8-load-ext,\

54010

+; power8-load-ext-update,power8-fpload,power8-fpload-update,\

54011

+; power8-store,power8-store-update,power8-store-update-indexed,\

54012

+; power8-fpstore,power8-fpstore-update,power8-vecstore,\

54013

+; power8-larx,power8-stcx")

54014

+

54015

+(define_insn_reservation "power8-2cyc" 2

54016

+ (and (eq_attr "type" "cntlz,popcnt")

54017

+ (eq_attr "cpu" "power8"))

54018

+ "DU_any_power8,FXU_power8")

54019

+

54020

+(define_insn_reservation "power8-two" 2

54021

+ (and (eq_attr "type" "two")

54022

+ (eq_attr "cpu" "power8"))

54023

+ "DU_any_power8+DU_any_power8,FXU_power8,FXU_power8")

54024

+

54025

+(define_insn_reservation "power8-three" 3

54026

+ (and (eq_attr "type" "three")

54027

+ (eq_attr "cpu" "power8"))

54028

+ "DU_any_power8+DU_any_power8+DU_any_power8,FXU_power8,FXU_power8,FXU_power8")

54029

+

54030

+; cmp - Normal compare insns

54031

+(define_insn_reservation "power8-cmp" 2

54032

+ (and (eq_attr "type" "cmp")

54033

+ (eq_attr "cpu" "power8"))

54034

+ "DU_any_power8,FXU_power8")

54035

+

54036

+; fast_compare : add./and./nor./etc

54037

+(define_insn_reservation "power8-fast-compare" 2

54038

+ (and (eq_attr "type" "fast_compare")

54039

+ (eq_attr "cpu" "power8"))

54040

+ "DU_any_power8,FXU_power8")

54041

+

54042

+; compare : rldicl./exts./etc

54043

+; delayed_compare : rlwinm./slwi./etc

54044

+; var_delayed_compare : rlwnm./slw./etc

54045

+(define_insn_reservation "power8-compare" 2

54046

+ (and (eq_attr "type" "compare,delayed_compare,var_delayed_compare")

54047

+ (eq_attr "cpu" "power8"))

54048

+ "DU_cracked_power8,FXU_power8,FXU_power8")

54049

+

54050

+; Extra cycle to LU/LSU

54051

+(define_bypass 3 "power8-fast-compare,power8-compare"

54052

+ "power8-load*,power8-fpload*,power8-store*,power8-fpstore*,\

54053

+ power8-vecstore,power8-larx,power8-stcx")

54054

+

54055

+; 5 cycle CR latency

54056

+(define_bypass 5 "power8-fast-compare,power8-compare"

54057

+ "power8-crlogical,power8-mfcr,power8-mfcrf,power8-branch")

54058

+

54059

+(define_insn_reservation "power8-mul" 4

54060

+ (and (eq_attr "type" "imul,imul2,imul3,lmul")

54061

+ (eq_attr "cpu" "power8"))

54062

+ "DU_any_power8,FXU_power8")

54063

+

54064

+(define_insn_reservation "power8-mul-compare" 4

54065

+ (and (eq_attr "type" "imul_compare,lmul_compare")

54066

+ (eq_attr "cpu" "power8"))

54067

+ "DU_cracked_power8,FXU_power8")

54068

+

54069

+; Extra cycle to LU/LSU

54070

+(define_bypass 5 "power8-mul,power8-mul-compare"

54071

+ "power8-load*,power8-fpload*,power8-store*,power8-fpstore*,\

54072

+ power8-vecstore,power8-larx,power8-stcx")

54073

+

54074

+; 7 cycle CR latency

54075

+(define_bypass 7 "power8-mul,power8-mul-compare"

54076

+ "power8-crlogical,power8-mfcr,power8-mfcrf,power8-branch")

54077

+

54078

+; FXU divides are not pipelined

54079

+(define_insn_reservation "power8-idiv" 37

54080

+ (and (eq_attr "type" "idiv")

54081

+ (eq_attr "cpu" "power8"))

54082

+ "DU_any_power8,fxu0_power8*37|fxu1_power8*37")

54083

+

54084

+(define_insn_reservation "power8-ldiv" 68

54085

+ (and (eq_attr "type" "ldiv")

54086

+ (eq_attr "cpu" "power8"))

54087

+ "DU_any_power8,fxu0_power8*68|fxu1_power8*68")

54088

+

54089

+(define_insn_reservation "power8-mtjmpr" 5

54090

+ (and (eq_attr "type" "mtjmpr")

54091

+ (eq_attr "cpu" "power8"))

54092

+ "DU_first_power8,FXU_power8")

54093

+

54094

+; Should differentiate between 1 cr field and > 1 since mtocrf is not microcode

54095

+(define_insn_reservation "power8-mtcr" 3

54096

+ (and (eq_attr "type" "mtcr")

54097

+ (eq_attr "cpu" "power8"))

54098

+ "DU_both_power8,FXU_power8")

54099

+

54100

+

54101

+; CR Unit

54102

+(define_insn_reservation "power8-mfjmpr" 5

54103

+ (and (eq_attr "type" "mfjmpr")

54104

+ (eq_attr "cpu" "power8"))

54105

+ "DU_first_power8,cru_power8+FXU_power8")

54106

+

54107

+(define_insn_reservation "power8-crlogical" 3

54108

+ (and (eq_attr "type" "cr_logical,delayed_cr")

54109

+ (eq_attr "cpu" "power8"))

54110

+ "DU_first_power8,cru_power8")

54111

+

54112

+(define_insn_reservation "power8-mfcr" 5

54113

+ (and (eq_attr "type" "mfcr")

54114

+ (eq_attr "cpu" "power8"))

54115

+ "DU_both_power8,cru_power8")

54116

+

54117

+(define_insn_reservation "power8-mfcrf" 3

54118

+ (and (eq_attr "type" "mfcrf")

54119

+ (eq_attr "cpu" "power8"))

54120

+ "DU_first_power8,cru_power8")

54121

+

54122

+

54123

+; BR Unit

54124

+; Branches take dispatch slot 7, but reserve any remaining prior slots to

54125

+; prevent other insns from grabbing them once this is assigned.

54126

+(define_insn_reservation "power8-branch" 3

54127

+ (and (eq_attr "type" "jmpreg,branch")

54128

+ (eq_attr "cpu" "power8"))

54129

+ "(du6_power8\

54130

+ |du5_power8+du6_power8\

54131

+ |du4_power8+du5_power8+du6_power8\

54132

+ |du3_power8+du4_power8+du5_power8+du6_power8\

54133

+ |du2_power8+du3_power8+du4_power8+du5_power8+du6_power8\

54134

+ |du1_power8+du2_power8+du3_power8+du4_power8+du5_power8+du6_power8\

54135

+ |du0_power8+du1_power8+du2_power8+du3_power8+du4_power8+du5_power8+\

54136

+ du6_power8),bpu_power8")

54137

+

54138

+; Branch updating LR/CTR feeding mf[lr|ctr]

54139

+(define_bypass 4 "power8-branch" "power8-mfjmpr")

54140

+

54141

+

54142

+; VS Unit (includes FP/VSX/VMX/DFP/Crypto)

54143

+(define_insn_reservation "power8-fp" 6

54144

+ (and (eq_attr "type" "fp,dmul")

54145

+ (eq_attr "cpu" "power8"))

54146

+ "DU_any_power8,VSU_power8")

54147

+

54148

+; Additional 3 cycles for any CR result

54149

+(define_bypass 9 "power8-fp" "power8-crlogical,power8-mfcr*,power8-branch")

54150

+

54151

+(define_insn_reservation "power8-fpcompare" 8

54152

+ (and (eq_attr "type" "fpcompare")

54153

+ (eq_attr "cpu" "power8"))

54154

+ "DU_any_power8,VSU_power8")

54155

+

54156

+(define_insn_reservation "power8-sdiv" 27

54157

+ (and (eq_attr "type" "sdiv")

54158

+ (eq_attr "cpu" "power8"))

54159

+ "DU_any_power8,VSU_power8")

54160

+

54161

+(define_insn_reservation "power8-ddiv" 33

54162

+ (and (eq_attr "type" "ddiv")

54163

+ (eq_attr "cpu" "power8"))

54164

+ "DU_any_power8,VSU_power8")

54165

+

54166

+(define_insn_reservation "power8-sqrt" 32

54167

+ (and (eq_attr "type" "ssqrt")

54168

+ (eq_attr "cpu" "power8"))

54169

+ "DU_any_power8,VSU_power8")

54170

+

54171

+(define_insn_reservation "power8-dsqrt" 44

54172

+ (and (eq_attr "type" "dsqrt")

54173

+ (eq_attr "cpu" "power8"))

54174

+ "DU_any_power8,VSU_power8")

54175

+

54176

+(define_insn_reservation "power8-vecsimple" 2

54177

+ (and (eq_attr "type" "vecperm,vecsimple,veccmp")

54178

+ (eq_attr "cpu" "power8"))

54179

+ "DU_any_power8,VSU_power8")

54180

+

54181

+(define_insn_reservation "power8-vecnormal" 6

54182

+ (and (eq_attr "type" "vecfloat,vecdouble")

54183

+ (eq_attr "cpu" "power8"))

54184

+ "DU_any_power8,VSU_power8")

54185

+

54186

+(define_bypass 7 "power8-vecnormal"

54187

+ "power8-vecsimple,power8-veccomplex,power8-fpstore*,\

54188

+ power8-vecstore")

54189

+

54190

+(define_insn_reservation "power8-veccomplex" 7

54191

+ (and (eq_attr "type" "veccomplex")

54192

+ (eq_attr "cpu" "power8"))

54193

+ "DU_any_power8,VSU_power8")

54194

+

54195

+(define_insn_reservation "power8-vecfdiv" 25

54196

+ (and (eq_attr "type" "vecfdiv")

54197

+ (eq_attr "cpu" "power8"))

54198

+ "DU_any_power8,VSU_power8")

54199

+

54200

+(define_insn_reservation "power8-vecdiv" 31

54201

+ (and (eq_attr "type" "vecdiv")

54202

+ (eq_attr "cpu" "power8"))

54203

+ "DU_any_power8,VSU_power8")

54204

+

54205

+(define_insn_reservation "power8-mffgpr" 5

54206

+ (and (eq_attr "type" "mffgpr")

54207

+ (eq_attr "cpu" "power8"))

54208

+ "DU_any_power8,VSU_power8")

54209

+

54210

+(define_insn_reservation "power8-mftgpr" 6

54211

+ (and (eq_attr "type" "mftgpr")

54212

+ (eq_attr "cpu" "power8"))

54213

+ "DU_any_power8,VSU_power8")

54214

+

54215

+(define_insn_reservation "power8-crypto" 7

54216

+ (and (eq_attr "type" "crypto")

54217

+ (eq_attr "cpu" "power8"))

54218

+ "DU_any_power8,VSU_power8")

54219

+

54220

Index: gcc/config/rs6000/vector.md

54221

===================================================================

54222

--- a/src/gcc/config/rs6000/vector.md (.../tags/gcc_4_8_2_release)

54223

+++ b/src/gcc/config/rs6000/vector.md (.../branches/gcc-4_8-branch)

54224

@@ -24,28 +24,28 @@

54225

54226

54227

;; Vector int modes

54228

-(define_mode_iterator VEC_I [V16QI V8HI V4SI])

54229

+(define_mode_iterator VEC_I [V16QI V8HI V4SI V2DI])

54230

54231

;; Vector float modes

54232

(define_mode_iterator VEC_F [V4SF V2DF])

54233

54234

;; Vector arithmetic modes

54235

-(define_mode_iterator VEC_A [V16QI V8HI V4SI V4SF V2DF])

54236

+(define_mode_iterator VEC_A [V16QI V8HI V4SI V2DI V4SF V2DF])

54237

54238

;; Vector modes that need alginment via permutes

54239

(define_mode_iterator VEC_K [V16QI V8HI V4SI V4SF])

54240

54241

;; Vector logical modes

54242

-(define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF TI])

54243

+(define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI])

54244

54245

;; Vector modes for moves. Don't do TImode here.

54246

-(define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF])

54247

+(define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI])

54248

54249

;; Vector modes for types that don't need a realignment under VSX

54250

-(define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF])

54251

+(define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF V1TI])

54252

54253

;; Vector comparison modes

54254

-(define_mode_iterator VEC_C [V16QI V8HI V4SI V4SF V2DF])

54255

+(define_mode_iterator VEC_C [V16QI V8HI V4SI V2DI V4SF V2DF])

54256

54257

;; Vector init/extract modes

54258

(define_mode_iterator VEC_E [V16QI V8HI V4SI V2DI V4SF V2DF])

54259

@@ -54,7 +54,8 @@

54260

(define_mode_iterator VEC_64 [V2DI V2DF])

54261

54262

;; Vector reload iterator

54263

-(define_mode_iterator VEC_R [V16QI V8HI V4SI V2DI V4SF V2DF DF TI])

54264

+(define_mode_iterator VEC_R [V16QI V8HI V4SI V2DI V4SF V2DF V1TI

54265

+ SF SD SI DF DD DI TI])

54266

54267

;; Base type from vector mode

54268

(define_mode_attr VEC_base [(V16QI "QI")

54269

@@ -63,6 +64,7 @@

54270

(V2DI "DI")

54271

(V4SF "SF")

54272

(V2DF "DF")

54273

+ (V1TI "TI")

54274

(TI "TI")])

54275

54276

;; Same size integer type for floating point data

54277

@@ -88,7 +90,8 @@

54278

(smax "smax")])

54279

54280

54281

-;; Vector move instructions.

54282

+;; Vector move instructions. Little-endian VSX loads and stores require

54283

+;; special handling to circumvent "element endianness."

54284

(define_expand "mov<mode>"

54285

[(set (match_operand:VEC_M 0 "nonimmediate_operand" "")

54286

(match_operand:VEC_M 1 "any_operand" ""))]

54287

@@ -104,6 +107,15 @@

54288

&& !vlogical_operand (operands[1], <MODE>mode))

54289

operands[1] = force_reg (<MODE>mode, operands[1]);

54290

}

54291

+ if (!BYTES_BIG_ENDIAN

54292

+ && VECTOR_MEM_VSX_P (<MODE>mode)

54293

+ && !gpr_or_gpr_p (operands[0], operands[1])

54294

+ && (memory_operand (operands[0], <MODE>mode)

54295

+ ^ memory_operand (operands[1], <MODE>mode)))

54296

+ {

54297

+ rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode);

54298

+ DONE;

54299

+ }

54300

})

54301

54302

;; Generic vector floating point load/store instructions. These will match

54303

@@ -126,7 +138,9 @@

54304

(match_operand:VEC_L 1 "input_operand" ""))]

54305

"VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)

54306

&& reload_completed

54307

- && gpr_or_gpr_p (operands[0], operands[1])"

54308

+ && gpr_or_gpr_p (operands[0], operands[1])

54309

+ && !direct_move_p (operands[0], operands[1])

54310

+ && !quad_load_store_p (operands[0], operands[1])"

54311

[(pc)]

54312

{

54313

rs6000_split_multireg_move (operands[0], operands[1]);

54314

@@ -249,7 +263,7 @@

54315

[(set (match_operand:VEC_F 0 "vfloat_operand" "")

54316

(mult:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")

54317

(match_operand:VEC_F 2 "vfloat_operand" "")))]

54318

- "VECTOR_UNIT_VSX_P (<MODE>mode) || VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

54319

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54320

{

54321

if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))

54322

{

54323

@@ -395,7 +409,7 @@

54324

(match_operand:VEC_I 5 "vint_operand" "")])

54325

(match_operand:VEC_I 1 "vint_operand" "")

54326

(match_operand:VEC_I 2 "vint_operand" "")))]

54327

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

54328

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54329

"

54330

{

54331

if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],

54332

@@ -451,7 +465,7 @@

54333

(match_operand:VEC_I 5 "vint_operand" "")])

54334

(match_operand:VEC_I 1 "vint_operand" "")

54335

(match_operand:VEC_I 2 "vint_operand" "")))]

54336

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

54337

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54338

"

54339

{

54340

if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],

54341

@@ -505,7 +519,7 @@

54342

[(set (match_operand:VEC_I 0 "vint_operand" "")

54343

(gtu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

54344

(match_operand:VEC_I 2 "vint_operand" "")))]

54345

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

54346

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54347

"")

54348

54349

(define_expand "vector_geu<mode>"

54350

@@ -512,7 +526,7 @@

54351

[(set (match_operand:VEC_I 0 "vint_operand" "")

54352

(geu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

54353

(match_operand:VEC_I 2 "vint_operand" "")))]

54354

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

54355

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54356

"")

54357

54358

(define_insn_and_split "*vector_uneq<mode>"

54359

@@ -595,8 +609,8 @@

54360

(ge:VEC_F (match_dup 2)

54361

(match_dup 1)))

54362

(set (match_dup 0)

54363

- (not:VEC_F (ior:VEC_F (match_dup 3)

54364

- (match_dup 4))))]

54365

+ (and:VEC_F (not:VEC_F (match_dup 3))

54366

+ (not:VEC_F (match_dup 4))))]

54367

"

54368

{

54369

operands[3] = gen_reg_rtx (<MODE>mode);

54370

@@ -708,48 +722,19 @@

54371

"")

54372

54373

54374

-;; Vector logical instructions

54375

-(define_expand "xor<mode>3"

54376

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

54377

- (xor:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

54378

- (match_operand:VEC_L 2 "vlogical_operand" "")))]

54379

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

54380

- "")

54381

+;; Vector count leading zeros

54382

+(define_expand "clz<mode>2"

54383

+ [(set (match_operand:VEC_I 0 "register_operand" "")

54384

+ (clz:VEC_I (match_operand:VEC_I 1 "register_operand" "")))]

54385

+ "TARGET_P8_VECTOR")

54386

54387

-(define_expand "ior<mode>3"

54388

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

54389

- (ior:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

54390

- (match_operand:VEC_L 2 "vlogical_operand" "")))]

54391

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

54392

- "")

54393

+;; Vector population count

54394

+(define_expand "popcount<mode>2"

54395

+ [(set (match_operand:VEC_I 0 "register_operand" "")

54396

+ (popcount:VEC_I (match_operand:VEC_I 1 "register_operand" "")))]

54397

+ "TARGET_P8_VECTOR")

54398

54399

-(define_expand "and<mode>3"

54400

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

54401

- (and:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

54402

- (match_operand:VEC_L 2 "vlogical_operand" "")))]

54403

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

54404

- "")

54405

-

54406

-(define_expand "one_cmpl<mode>2"

54407

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

54408

- (not:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")))]

54409

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

54410

- "")

54411

-

54412

-(define_expand "nor<mode>3"

54413

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

54414

- (not:VEC_L (ior:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")

54415

- (match_operand:VEC_L 2 "vlogical_operand" ""))))]

54416

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

54417

- "")

54418

-

54419

-(define_expand "andc<mode>3"

54420

- [(set (match_operand:VEC_L 0 "vlogical_operand" "")

54421

- (and:VEC_L (not:VEC_L (match_operand:VEC_L 2 "vlogical_operand" ""))

54422

- (match_operand:VEC_L 1 "vlogical_operand" "")))]

54423

- "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

54424

- "")

54425

-

54426

+

54427

;; Same size conversions

54428

(define_expand "float<VEC_int><mode>2"

54429

[(set (match_operand:VEC_F 0 "vfloat_operand" "")

54430

@@ -889,7 +874,7 @@

54431

{

54432

rtx reg = gen_reg_rtx (V4SFmode);

54433

54434

- rs6000_expand_interleave (reg, operands[1], operands[1], true);

54435

+ rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);

54436

emit_insn (gen_vsx_xvcvspdp (operands[0], reg));

54437

DONE;

54438

})

54439

@@ -901,7 +886,7 @@

54440

{

54441

rtx reg = gen_reg_rtx (V4SFmode);

54442

54443

- rs6000_expand_interleave (reg, operands[1], operands[1], false);

54444

+ rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);

54445

emit_insn (gen_vsx_xvcvspdp (operands[0], reg));

54446

DONE;

54447

})

54448

@@ -913,7 +898,7 @@

54449

{

54450

rtx reg = gen_reg_rtx (V4SImode);

54451

54452

- rs6000_expand_interleave (reg, operands[1], operands[1], true);

54453

+ rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);

54454

emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));

54455

DONE;

54456

})

54457

@@ -925,7 +910,7 @@

54458

{

54459

rtx reg = gen_reg_rtx (V4SImode);

54460

54461

- rs6000_expand_interleave (reg, operands[1], operands[1], false);

54462

+ rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);

54463

emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));

54464

DONE;

54465

})

54466

@@ -937,7 +922,7 @@

54467

{

54468

rtx reg = gen_reg_rtx (V4SImode);

54469

54470

- rs6000_expand_interleave (reg, operands[1], operands[1], true);

54471

+ rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);

54472

emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));

54473

DONE;

54474

})

54475

@@ -949,7 +934,7 @@

54476

{

54477

rtx reg = gen_reg_rtx (V4SImode);

54478

54479

- rs6000_expand_interleave (reg, operands[1], operands[1], false);

54480

+ rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);

54481

emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));

54482

DONE;

54483

})

54484

@@ -963,8 +948,19 @@

54485

(match_operand:V16QI 3 "vlogical_operand" "")]

54486

"VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"

54487

{

54488

- emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1], operands[2],

54489

- operands[3]));

54490

+ if (BYTES_BIG_ENDIAN)

54491

+ emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],

54492

+ operands[2], operands[3]));

54493

+ else

54494

+ {

54495

+ /* We have changed lvsr to lvsl, so to complete the transformation

54496

+ of vperm for LE, we must swap the inputs. */

54497

+ rtx unspec = gen_rtx_UNSPEC (<MODE>mode,

54498

+ gen_rtvec (3, operands[2],

54499

+ operands[1], operands[3]),

54500

+ UNSPEC_VPERM);

54501

+ emit_move_insn (operands[0], unspec);

54502

+ }

54503

DONE;

54504

})

54505

54506

@@ -1064,7 +1060,7 @@

54507

[(set (match_operand:VEC_I 0 "vint_operand" "")

54508

(rotate:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

54509

(match_operand:VEC_I 2 "vint_operand" "")))]

54510

- "TARGET_ALTIVEC"

54511

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54512

"")

54513

54514

;; Expanders for arithmetic shift left on each vector element

54515

@@ -1072,7 +1068,7 @@

54516

[(set (match_operand:VEC_I 0 "vint_operand" "")

54517

(ashift:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

54518

(match_operand:VEC_I 2 "vint_operand" "")))]

54519

- "TARGET_ALTIVEC"

54520

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54521

"")

54522

54523

;; Expanders for logical shift right on each vector element

54524

@@ -1080,7 +1076,7 @@

54525

[(set (match_operand:VEC_I 0 "vint_operand" "")

54526

(lshiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

54527

(match_operand:VEC_I 2 "vint_operand" "")))]

54528

- "TARGET_ALTIVEC"

54529

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54530

"")

54531

54532

;; Expanders for arithmetic shift right on each vector element

54533

@@ -1088,7 +1084,7 @@

54534

[(set (match_operand:VEC_I 0 "vint_operand" "")

54535

(ashiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")

54536

(match_operand:VEC_I 2 "vint_operand" "")))]

54537

- "TARGET_ALTIVEC"

54538

+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

54539

"")

54540

54541

;; Vector reduction expanders for VSX

54542

Index: gcc/config/rs6000/constraints.md

54543

===================================================================

54544

--- a/src/gcc/config/rs6000/constraints.md (.../tags/gcc_4_8_2_release)

54545

+++ b/src/gcc/config/rs6000/constraints.md (.../branches/gcc-4_8-branch)

54546

@@ -52,22 +52,62 @@

54547

"@internal")

54548

54549

;; Use w as a prefix to add VSX modes

54550

-;; vector double (V2DF)

54551

+;; any VSX register

54552

+(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"

54553

+ "Any VSX register if the -mvsx option was used or NO_REGS.")

54554

+

54555

(define_register_constraint "wd" "rs6000_constraints[RS6000_CONSTRAINT_wd]"

54556

- "@internal")

54557

+ "VSX vector register to hold vector double data or NO_REGS.")

54558

54559

-;; vector float (V4SF)

54560

(define_register_constraint "wf" "rs6000_constraints[RS6000_CONSTRAINT_wf]"

54561

- "@internal")

54562

+ "VSX vector register to hold vector float data or NO_REGS.")

54563

54564

-;; scalar double (DF)

54565

+(define_register_constraint "wg" "rs6000_constraints[RS6000_CONSTRAINT_wg]"

54566

+ "If -mmfpgpr was used, a floating point register or NO_REGS.")

54567

+

54568

+(define_register_constraint "wl" "rs6000_constraints[RS6000_CONSTRAINT_wl]"

54569

+ "Floating point register if the LFIWAX instruction is enabled or NO_REGS.")

54570

+

54571

+(define_register_constraint "wm" "rs6000_constraints[RS6000_CONSTRAINT_wm]"

54572

+ "VSX register if direct move instructions are enabled, or NO_REGS.")

54573

+

54574

+;; NO_REGs register constraint, used to merge mov{sd,sf}, since movsd can use

54575

+;; direct move directly, and movsf can't to move between the register sets.

54576

+;; There is a mode_attr that resolves to wm for SDmode and wn for SFmode

54577

+(define_register_constraint "wn" "NO_REGS" "No register (NO_REGS).")

54578

+

54579

+(define_register_constraint "wr" "rs6000_constraints[RS6000_CONSTRAINT_wr]"

54580

+ "General purpose register if 64-bit instructions are enabled or NO_REGS.")

54581

+

54582

(define_register_constraint "ws" "rs6000_constraints[RS6000_CONSTRAINT_ws]"

54583

- "@internal")

54584

+ "VSX vector register to hold scalar double values or NO_REGS.")

54585

54586

-;; any VSX register

54587

-(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"

54588

- "@internal")

54589

+(define_register_constraint "wt" "rs6000_constraints[RS6000_CONSTRAINT_wt]"

54590

+ "VSX vector register to hold 128 bit integer or NO_REGS.")

54591

54592

+(define_register_constraint "wu" "rs6000_constraints[RS6000_CONSTRAINT_wu]"

54593

+ "Altivec register to use for float/32-bit int loads/stores or NO_REGS.")

54594

+

54595

+(define_register_constraint "wv" "rs6000_constraints[RS6000_CONSTRAINT_wv]"

54596

+ "Altivec register to use for double loads/stores or NO_REGS.")

54597

+

54598

+(define_register_constraint "ww" "rs6000_constraints[RS6000_CONSTRAINT_ww]"

54599

+ "FP or VSX register to perform float operations under -mvsx or NO_REGS.")

54600

+

54601

+(define_register_constraint "wx" "rs6000_constraints[RS6000_CONSTRAINT_wx]"

54602

+ "Floating point register if the STFIWX instruction is enabled or NO_REGS.")

54603

+

54604

+(define_register_constraint "wy" "rs6000_constraints[RS6000_CONSTRAINT_wy]"

54605

+ "VSX vector register to hold scalar float values or NO_REGS.")

54606

+

54607

+(define_register_constraint "wz" "rs6000_constraints[RS6000_CONSTRAINT_wz]"

54608

+ "Floating point register if the LFIWZX instruction is enabled or NO_REGS.")

54609

+

54610

+;; Lq/stq validates the address for load/store quad

54611

+(define_memory_constraint "wQ"

54612

+ "Memory operand suitable for the load/store quad instructions"

54613

+ (match_operand 0 "quad_memory_operand"))

54614

+

54615

;; Altivec style load/store that ignores the bottom bits of the address

54616

(define_memory_constraint "wZ"

54617

"Indexed or indirect memory operand, ignoring the bottom 4 bits"

54618

Index: gcc/config/rs6000/predicates.md

54619

===================================================================

54620

--- a/src/gcc/config/rs6000/predicates.md (.../tags/gcc_4_8_2_release)

54621

+++ b/src/gcc/config/rs6000/predicates.md (.../branches/gcc-4_8-branch)

54622

@@ -124,6 +124,11 @@

54623

(and (match_code "const_int")

54624

(match_test "INTVAL (op) >= -16 && INTVAL (op) <= 15")))

54625

54626

+;; Return 1 if op is a unsigned 3-bit constant integer.

54627

+(define_predicate "u3bit_cint_operand"

54628

+ (and (match_code "const_int")

54629

+ (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))

54630

+

54631

;; Return 1 if op is a unsigned 5-bit constant integer.

54632

(define_predicate "u5bit_cint_operand"

54633

(and (match_code "const_int")

54634

@@ -135,6 +140,11 @@

54635

(and (match_code "const_int")

54636

(match_test "INTVAL (op) >= -128 && INTVAL (op) <= 127")))

54637

54638

+;; Return 1 if op is a unsigned 10-bit constant integer.

54639

+(define_predicate "u10bit_cint_operand"

54640

+ (and (match_code "const_int")

54641

+ (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 1023")))

54642

+

54643

;; Return 1 if op is a constant integer that can fit in a D field.

54644

(define_predicate "short_cint_operand"

54645

(and (match_code "const_int")

54646

@@ -161,11 +171,21 @@

54647

(and (match_code "const_int")

54648

(match_test "IN_RANGE (INTVAL (op), 0, 1)")))

54649

54650

+;; Match op = 0..3.

54651

+(define_predicate "const_0_to_3_operand"

54652

+ (and (match_code "const_int")

54653

+ (match_test "IN_RANGE (INTVAL (op), 0, 3)")))

54654

+

54655

;; Match op = 2 or op = 3.

54656

(define_predicate "const_2_to_3_operand"

54657

(and (match_code "const_int")

54658

(match_test "IN_RANGE (INTVAL (op), 2, 3)")))

54659

54660

+;; Match op = 0..15

54661

+(define_predicate "const_0_to_15_operand"

54662

+ (and (match_code "const_int")

54663

+ (match_test "IN_RANGE (INTVAL (op), 0, 15)")))

54664

+

54665

;; Return 1 if op is a register that is not special.

54666

(define_predicate "gpc_reg_operand"

54667

(match_operand 0 "register_operand")

54668

@@ -182,9 +202,95 @@

54669

if (REGNO (op) >= ARG_POINTER_REGNUM && !CA_REGNO_P (REGNO (op)))

54670

return 1;

54671

54672

+ if (TARGET_VSX && VSX_REGNO_P (REGNO (op)))

54673

+ return 1;

54674

+

54675

return INT_REGNO_P (REGNO (op)) || FP_REGNO_P (REGNO (op));

54676

})

54677

54678

+;; Return 1 if op is a general purpose register. Unlike gpc_reg_operand, don't

54679

+;; allow floating point or vector registers.

54680

+(define_predicate "int_reg_operand"

54681

+ (match_operand 0 "register_operand")

54682

+{

54683

+ if ((TARGET_E500_DOUBLE || TARGET_SPE) && invalid_e500_subreg (op, mode))

54684

+ return 0;

54685

+

54686

+ if (GET_CODE (op) == SUBREG)

54687

+ op = SUBREG_REG (op);

54688

+

54689

+ if (!REG_P (op))

54690

+ return 0;

54691

+

54692

+ if (REGNO (op) >= FIRST_PSEUDO_REGISTER)

54693

+ return 1;

54694

+

54695

+ return INT_REGNO_P (REGNO (op));

54696

+})

54697

+

54698

+;; Like int_reg_operand, but only return true for base registers

54699

+(define_predicate "base_reg_operand"

54700

+ (match_operand 0 "int_reg_operand")

54701

+{

54702

+ if (GET_CODE (op) == SUBREG)

54703

+ op = SUBREG_REG (op);

54704

+

54705

+ if (!REG_P (op))

54706

+ return 0;

54707

+

54708

+ return (REGNO (op) != FIRST_GPR_REGNO);

54709

+})

54710

+

54711

+;; Return 1 if op is a HTM specific SPR register.

54712

+(define_predicate "htm_spr_reg_operand"

54713

+ (match_operand 0 "register_operand")

54714

+{

54715

+ if (!TARGET_HTM)

54716

+ return 0;

54717

+

54718

+ if (GET_CODE (op) == SUBREG)

54719

+ op = SUBREG_REG (op);

54720

+

54721

+ if (!REG_P (op))

54722

+ return 0;

54723

+

54724

+ switch (REGNO (op))

54725

+ {

54726

+ case TFHAR_REGNO:

54727

+ case TFIAR_REGNO:

54728

+ case TEXASR_REGNO:

54729

+ return 1;

54730

+ default:

54731

+ break;

54732

+ }

54733

+

54734

+ /* Unknown SPR. */

54735

+ return 0;

54736

+})

54737

+

54738

+;; Return 1 if op is a general purpose register that is an even register

54739

+;; which suitable for a load/store quad operation

54740

+(define_predicate "quad_int_reg_operand"

54741

+ (match_operand 0 "register_operand")

54742

+{

54743

+ HOST_WIDE_INT r;

54744

+

54745

+ if (!TARGET_QUAD_MEMORY && !TARGET_QUAD_MEMORY_ATOMIC)

54746

+ return 0;

54747

+

54748

+ if (GET_CODE (op) == SUBREG)

54749

+ op = SUBREG_REG (op);

54750

+

54751

+ if (!REG_P (op))

54752

+ return 0;

54753

+

54754

+ r = REGNO (op);

54755

+ if (r >= FIRST_PSEUDO_REGISTER)

54756

+ return 1;

54757

+

54758

+ return (INT_REGNO_P (r) && ((r & 1) == 0));

54759

+})

54760

+

54761

;; Return 1 if op is a register that is a condition register field.

54762

(define_predicate "cc_reg_operand"

54763

(match_operand 0 "register_operand")

54764

@@ -315,6 +421,11 @@

54765

&& CONST_DOUBLE_HIGH (op) == 0")

54766

(match_operand 0 "gpc_reg_operand"))))

54767

54768

+;; Like reg_or_logical_cint_operand, but allow vsx registers

54769

+(define_predicate "vsx_reg_or_cint_operand"

54770

+ (ior (match_operand 0 "vsx_register_operand")

54771

+ (match_operand 0 "reg_or_logical_cint_operand")))

54772

+

54773

;; Return 1 if operand is a CONST_DOUBLE that can be set in a register

54774

;; with no more than one instruction per word.

54775

(define_predicate "easy_fp_constant"

54776

@@ -333,6 +444,11 @@

54777

&& mode != DImode)

54778

return 1;

54779

54780

+ /* The constant 0.0 is easy under VSX. */

54781

+ if ((mode == SFmode || mode == DFmode || mode == SDmode || mode == DDmode)

54782

+ && VECTOR_UNIT_VSX_P (DFmode) && op == CONST0_RTX (mode))

54783

+ return 1;

54784

+

54785

if (DECIMAL_FLOAT_MODE_P (mode))

54786

return 0;

54787

54788

@@ -521,6 +637,55 @@

54789

(and (match_operand 0 "memory_operand")

54790

(match_test "offsettable_nonstrict_memref_p (op)")))

54791

54792

+;; Return 1 if the operand is suitable for load/store quad memory.

54793

+;; This predicate only checks for non-atomic loads/stores (not lqarx/stqcx).

54794

+(define_predicate "quad_memory_operand"

54795

+ (match_code "mem")

54796

+{

54797

+ rtx addr, op0, op1;

54798

+ int ret;

54799

+

54800

+ if (!TARGET_QUAD_MEMORY && !TARGET_SYNC_TI)

54801

+ ret = 0;

54802

+

54803

+ else if (!memory_operand (op, mode))

54804

+ ret = 0;

54805

+

54806

+ else if (GET_MODE_SIZE (GET_MODE (op)) != 16)

54807

+ ret = 0;

54808

+

54809

+ else if (MEM_ALIGN (op) < 128)

54810

+ ret = 0;

54811

+

54812

+ else

54813

+ {

54814

+ addr = XEXP (op, 0);

54815

+ if (int_reg_operand (addr, Pmode))

54816

+ ret = 1;

54817

+

54818

+ else if (GET_CODE (addr) != PLUS)

54819

+ ret = 0;

54820

+

54821

+ else

54822

+ {

54823

+ op0 = XEXP (addr, 0);

54824

+ op1 = XEXP (addr, 1);

54825

+ ret = (int_reg_operand (op0, Pmode)

54826

+ && GET_CODE (op1) == CONST_INT

54827

+ && IN_RANGE (INTVAL (op1), -32768, 32767)

54828

+ && (INTVAL (op1) & 15) == 0);

54829

+ }

54830

+ }

54831

+

54832

+ if (TARGET_DEBUG_ADDR)

54833

+ {

54834

+ fprintf (stderr, "\nquad_memory_operand, ret = %s\n", ret ? "true" : "false");

54835

+ debug_rtx (op);

54836

+ }

54837

+

54838

+ return ret;

54839

+})

54840

+

54841

;; Return 1 if the operand is an indexed or indirect memory operand.

54842

(define_predicate "indexed_or_indirect_operand"

54843

(match_code "mem")

54844

@@ -535,6 +700,19 @@

54845

return indexed_or_indirect_address (op, mode);

54846

})

54847

54848

+;; Like indexed_or_indirect_operand, but also allow a GPR register if direct

54849

+;; moves are supported.

54850

+(define_predicate "reg_or_indexed_operand"

54851

+ (match_code "mem,reg")

54852

+{

54853

+ if (MEM_P (op))

54854

+ return indexed_or_indirect_operand (op, mode);

54855

+ else if (TARGET_DIRECT_MOVE)

54856

+ return register_operand (op, mode);

54857

+ return

54858

+ 0;

54859

+})

54860

+

54861

;; Return 1 if the operand is an indexed or indirect memory operand with an

54862

;; AND -16 in it, used to recognize when we need to switch to Altivec loads

54863

;; to realign loops instead of VSX (altivec silently ignores the bottom bits,

54864

@@ -560,6 +738,28 @@

54865

&& REG_P (XEXP (op, 1)))")

54866

(match_operand 0 "address_operand")))

54867

54868

+;; Return 1 if the operand is an index-form address.

54869

+(define_special_predicate "indexed_address"

54870

+ (match_test "(GET_CODE (op) == PLUS

54871

+ && REG_P (XEXP (op, 0))

54872

+ && REG_P (XEXP (op, 1)))"))

54873

+

54874

+;; Return 1 if the operand is a MEM with an update-form address. This may

54875

+;; also include update-indexed form.

54876

+(define_special_predicate "update_address_mem"

54877

+ (match_test "(MEM_P (op)

54878

+ && (GET_CODE (XEXP (op, 0)) == PRE_INC

54879

+ || GET_CODE (XEXP (op, 0)) == PRE_DEC

54880

+ || GET_CODE (XEXP (op, 0)) == PRE_MODIFY))"))

54881

+

54882

+;; Return 1 if the operand is a MEM with an update-indexed-form address. Note

54883

+;; that PRE_INC/PRE_DEC will always be non-indexed (i.e. non X-form) since the

54884

+;; increment is based on the mode size and will therefor always be a const.

54885

+(define_special_predicate "update_indexed_address_mem"

54886

+ (match_test "(MEM_P (op)

54887

+ && GET_CODE (XEXP (op, 0)) == PRE_MODIFY

54888

+ && indexed_address (XEXP (XEXP (op, 0), 1), mode))"))

54889

+

54890

;; Used for the destination of the fix_truncdfsi2 expander.

54891

;; If stfiwx will be used, the result goes to memory; otherwise,

54892

;; we're going to emit a store and a load of a subreg, so the dest is a

54893

@@ -883,7 +1083,8 @@

54894

(and (match_code "symbol_ref")

54895

(match_test "(DEFAULT_ABI != ABI_AIX || SYMBOL_REF_FUNCTION_P (op))

54896

&& ((SYMBOL_REF_LOCAL_P (op)

54897

- && (DEFAULT_ABI != ABI_AIX

54898

+ && ((DEFAULT_ABI != ABI_AIX

54899

+ && DEFAULT_ABI != ABI_ELFv2)

54900

|| !SYMBOL_REF_EXTERNAL_P (op)))

54901

|| (op == XEXP (DECL_RTL (current_function_decl),

54902

0)))")))

54903

@@ -1364,6 +1565,26 @@

54904

return 1;

54905

})

54906

54907

+;; Return 1 if OP is valid for crsave insn, known to be a PARALLEL.

54908

+(define_predicate "crsave_operation"

54909

+ (match_code "parallel")

54910

+{

54911

+ int count = XVECLEN (op, 0);

54912

+ int i;

54913

+

54914

+ for (i = 1; i < count; i++)

54915

+ {

54916

+ rtx exp = XVECEXP (op, 0, i);

54917

+

54918

+ if (GET_CODE (exp) != USE

54919

+ || GET_CODE (XEXP (exp, 0)) != REG

54920

+ || GET_MODE (XEXP (exp, 0)) != CCmode

54921

+ || ! CR_REGNO_P (REGNO (XEXP (exp, 0))))

54922

+ return 0;

54923

+ }

54924

+ return 1;

54925

+})

54926

+

54927

;; Return 1 if OP is valid for lmw insn, known to be a PARALLEL.

54928

(define_predicate "lmw_operation"

54929

(match_code "parallel")

54930

@@ -1534,3 +1755,99 @@

54931

54932

return GET_CODE (op) == UNSPEC && XINT (op, 1) == UNSPEC_TOCREL;

54933

})

54934

+

54935

+;; Match the first insn (addis) in fusing the combination of addis and loads to

54936

+;; GPR registers on power8.

54937

+(define_predicate "fusion_gpr_addis"

54938

+ (match_code "const_int,high,plus")

54939

+{

54940

+ HOST_WIDE_INT value;

54941

+ rtx int_const;

54942

+

54943

+ if (GET_CODE (op) == HIGH)

54944

+ return 1;

54945

+

54946

+ if (CONST_INT_P (op))

54947

+ int_const = op;

54948

+

54949

+ else if (GET_CODE (op) == PLUS

54950

+ && base_reg_operand (XEXP (op, 0), Pmode)

54951

+ && CONST_INT_P (XEXP (op, 1)))

54952

+ int_const = XEXP (op, 1);

54953

+

54954

+ else

54955

+ return 0;

54956

+

54957

+ /* Power8 currently will only do the fusion if the top 11 bits of the addis

54958

+ value are all 1's or 0's. */

54959

+ value = INTVAL (int_const);

54960

+ if ((value & (HOST_WIDE_INT)0xffff) != 0)

54961

+ return 0;

54962

+

54963

+ if ((value & (HOST_WIDE_INT)0xffff0000) == 0)

54964

+ return 0;

54965

+

54966

+ return (IN_RANGE (value >> 16, -32, 31));

54967

+})

54968

+

54969

+;; Match the second insn (lbz, lhz, lwz, ld) in fusing the combination of addis

54970

+;; and loads to GPR registers on power8.

54971

+(define_predicate "fusion_gpr_mem_load"

54972

+ (match_code "mem,sign_extend,zero_extend")

54973

+{

54974

+ rtx addr;

54975

+

54976

+ /* Handle sign/zero extend. */

54977

+ if (GET_CODE (op) == ZERO_EXTEND

54978

+ || (TARGET_P8_FUSION_SIGN && GET_CODE (op) == SIGN_EXTEND))

54979

+ {

54980

+ op = XEXP (op, 0);

54981

+ mode = GET_MODE (op);

54982

+ }

54983

+

54984

+ if (!MEM_P (op))

54985

+ return 0;

54986

+

54987

+ switch (mode)

54988

+ {

54989

+ case QImode:

54990

+ case HImode:

54991

+ case SImode:

54992

+ break;

54993

+

54994

+ case DImode:

54995

+ if (!TARGET_POWERPC64)

54996

+ return 0;

54997

+ break;

54998

+

54999

+ default:

55000

+ return 0;

55001

+ }

55002

+

55003

+ addr = XEXP (op, 0);

55004

+ if (GET_CODE (addr) == PLUS)

55005

+ {

55006

+ rtx base = XEXP (addr, 0);

55007

+ rtx offset = XEXP (addr, 1);

55008

+

55009

+ return (base_reg_operand (base, GET_MODE (base))

55010

+ && satisfies_constraint_I (offset));

55011

+ }

55012

+

55013

+ else if (GET_CODE (addr) == LO_SUM)

55014

+ {

55015

+ rtx base = XEXP (addr, 0);

55016

+ rtx offset = XEXP (addr, 1);

55017

+

55018

+ if (!base_reg_operand (base, GET_MODE (base)))

55019

+ return 0;

55020

+

55021

+ else if (TARGET_XCOFF || (TARGET_ELF && TARGET_POWERPC64))

55022

+ return small_toc_ref (offset, GET_MODE (offset));

55023

+

55024

+ else if (TARGET_ELF && !TARGET_POWERPC64)

55025

+ return CONSTANT_P (offset);

55026

+ }

55027

+

55028

+ return 0;

55029

+})

55030

Index: gcc/config/rs6000/ppc-asm.h

55031

===================================================================

55032

--- a/src/gcc/config/rs6000/ppc-asm.h (.../tags/gcc_4_8_2_release)

55033

+++ b/src/gcc/config/rs6000/ppc-asm.h (.../branches/gcc-4_8-branch)

55034

@@ -256,7 +256,30 @@

55035

* the real function with one or two leading periods respectively.

55036

*/

55037

55038

-#if defined (__powerpc64__)

55039

+#if defined(__powerpc64__) && _CALL_ELF == 2

55040

+

55041

+/* Defining "toc" above breaks @toc in assembler code. */

55042

+#undef toc

55043

+

55044

+#define FUNC_NAME(name) GLUE(__USER_LABEL_PREFIX__,name)

55045

+#define JUMP_TARGET(name) FUNC_NAME(name)

55046

+#define FUNC_START(name) \

55047

+ .type FUNC_NAME(name),@function; \

55048

+ .globl FUNC_NAME(name); \

55049

+FUNC_NAME(name): \

55050

+0: addis 2,12,(.TOC.-0b)@ha; \

55051

+ addi 2,2,(.TOC.-0b)@l; \

55052

+ .localentry FUNC_NAME(name),.-FUNC_NAME(name)

55053

+

55054

+#define HIDDEN_FUNC(name) \

55055

+ FUNC_START(name) \

55056

+ .hidden FUNC_NAME(name);

55057

+

55058

+#define FUNC_END(name) \

55059

+ .size FUNC_NAME(name),.-FUNC_NAME(name)

55060

+

55061

+#elif defined (__powerpc64__)

55062

+

55063

#define FUNC_NAME(name) GLUE(.,name)

55064

#define JUMP_TARGET(name) FUNC_NAME(name)

55065

#define FUNC_START(name) \

55066

Index: gcc/config/rs6000/htm.md

55067

===================================================================

55068

--- a/src/gcc/config/rs6000/htm.md (.../tags/gcc_4_8_2_release)

55069

+++ b/src/gcc/config/rs6000/htm.md (.../branches/gcc-4_8-branch)

55070

@@ -0,0 +1,366 @@

55071

+;; Hardware Transactional Memory (HTM) patterns.

55072

55073

+;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.

55074

+

55075

+;; This file is part of GCC.

55076

+

55077

+;; GCC is free software; you can redistribute it and/or modify it

55078

+;; under the terms of the GNU General Public License as published

55079

+;; by the Free Software Foundation; either version 3, or (at your

55080

+;; option) any later version.

55081

+

55082

+;; GCC is distributed in the hope that it will be useful, but WITHOUT

55083

+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

55084

+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public

55085

+;; License for more details.

55086

+

55087

+;; You should have received a copy of the GNU General Public License

55088

+;; along with GCC; see the file COPYING3. If not see

55089

+;; <http://www.gnu.org/licenses/>.

55090

+

55091

+(define_constants

55092

+ [(TFHAR_SPR 128)

55093

+ (TFIAR_SPR 129)

55094

+ (TEXASR_SPR 130)

55095

+ (TEXASRU_SPR 131)

55096

+ (MAX_HTM_OPERANDS 4)

55097

+ ])

55098

+

55099

+;;

55100

+;; UNSPEC_VOLATILE usage

55101

+;;

55102

+

55103

+(define_c_enum "unspecv"

55104

+ [UNSPECV_HTM_TABORT

55105

+ UNSPECV_HTM_TABORTDC

55106

+ UNSPECV_HTM_TABORTDCI

55107

+ UNSPECV_HTM_TABORTWC

55108

+ UNSPECV_HTM_TABORTWCI

55109

+ UNSPECV_HTM_TBEGIN

55110

+ UNSPECV_HTM_TCHECK

55111

+ UNSPECV_HTM_TEND

55112

+ UNSPECV_HTM_TRECHKPT

55113

+ UNSPECV_HTM_TRECLAIM

55114

+ UNSPECV_HTM_TSR

55115

+ UNSPECV_HTM_MFSPR

55116

+ UNSPECV_HTM_MTSPR

55117

+ ])

55118

+

55119

+

55120

+(define_expand "tabort"

55121

+ [(set (match_dup 2)

55122

+ (unspec_volatile:CC [(match_operand:SI 1 "int_reg_operand" "")]

55123

+ UNSPECV_HTM_TABORT))

55124

+ (set (match_dup 3)

55125

+ (eq:SI (match_dup 2)

55126

+ (const_int 0)))

55127

+ (set (match_operand:SI 0 "int_reg_operand" "")

55128

+ (minus:SI (const_int 1) (match_dup 3)))]

55129

+ "TARGET_HTM"

55130

+{

55131

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

55132

+ operands[3] = gen_reg_rtx (SImode);

55133

+})

55134

+

55135

+(define_insn "*tabort_internal"

55136

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

55137

+ (unspec_volatile:CC [(match_operand:SI 0 "int_reg_operand" "r")]

55138

+ UNSPECV_HTM_TABORT))]

55139

+ "TARGET_HTM"

55140

+ "tabort. %0"

55141

+ [(set_attr "type" "htm")

55142

+ (set_attr "length" "4")])

55143

+

55144

+(define_expand "tabortdc"

55145

+ [(set (match_dup 4)

55146

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

55147

+ (match_operand:SI 2 "gpc_reg_operand" "r")

55148

+ (match_operand:SI 3 "gpc_reg_operand" "r")]

55149

+ UNSPECV_HTM_TABORTDC))

55150

+ (set (match_dup 5)

55151

+ (eq:SI (match_dup 4)

55152

+ (const_int 0)))

55153

+ (set (match_operand:SI 0 "int_reg_operand" "")

55154

+ (minus:SI (const_int 1) (match_dup 5)))]

55155

+ "TARGET_HTM"

55156

+{

55157

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

55158

+ operands[5] = gen_reg_rtx (SImode);

55159

+})

55160

+

55161

+(define_insn "*tabortdc_internal"

55162

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

55163

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

55164

+ (match_operand:SI 1 "gpc_reg_operand" "r")

55165

+ (match_operand:SI 2 "gpc_reg_operand" "r")]

55166

+ UNSPECV_HTM_TABORTDC))]

55167

+ "TARGET_HTM"

55168

+ "tabortdc. %0,%1,%2"

55169

+ [(set_attr "type" "htm")

55170

+ (set_attr "length" "4")])

55171

+

55172

+(define_expand "tabortdci"

55173

+ [(set (match_dup 4)

55174

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

55175

+ (match_operand:SI 2 "gpc_reg_operand" "r")

55176

+ (match_operand 3 "s5bit_cint_operand" "n")]

55177

+ UNSPECV_HTM_TABORTDCI))

55178

+ (set (match_dup 5)

55179

+ (eq:SI (match_dup 4)

55180

+ (const_int 0)))

55181

+ (set (match_operand:SI 0 "int_reg_operand" "")

55182

+ (minus:SI (const_int 1) (match_dup 5)))]

55183

+ "TARGET_HTM"

55184

+{

55185

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

55186

+ operands[5] = gen_reg_rtx (SImode);

55187

+})

55188

+

55189

+(define_insn "*tabortdci_internal"

55190

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

55191

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

55192

+ (match_operand:SI 1 "gpc_reg_operand" "r")

55193

+ (match_operand 2 "s5bit_cint_operand" "n")]

55194

+ UNSPECV_HTM_TABORTDCI))]

55195

+ "TARGET_HTM"

55196

+ "tabortdci. %0,%1,%2"

55197

+ [(set_attr "type" "htm")

55198

+ (set_attr "length" "4")])

55199

+

55200

+(define_expand "tabortwc"

55201

+ [(set (match_dup 4)

55202

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

55203

+ (match_operand:SI 2 "gpc_reg_operand" "r")

55204

+ (match_operand:SI 3 "gpc_reg_operand" "r")]

55205

+ UNSPECV_HTM_TABORTWC))

55206

+ (set (match_dup 5)

55207

+ (eq:SI (match_dup 4)

55208

+ (const_int 0)))

55209

+ (set (match_operand:SI 0 "int_reg_operand" "")

55210

+ (minus:SI (const_int 1) (match_dup 5)))]

55211

+ "TARGET_HTM"

55212

+{

55213

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

55214

+ operands[5] = gen_reg_rtx (SImode);

55215

+})

55216

+

55217

+(define_insn "*tabortwc_internal"

55218

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

55219

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

55220

+ (match_operand:SI 1 "gpc_reg_operand" "r")

55221

+ (match_operand:SI 2 "gpc_reg_operand" "r")]

55222

+ UNSPECV_HTM_TABORTWC))]

55223

+ "TARGET_HTM"

55224

+ "tabortwc. %0,%1,%2"

55225

+ [(set_attr "type" "htm")

55226

+ (set_attr "length" "4")])

55227

+

55228

+(define_expand "tabortwci"

55229

+ [(set (match_dup 4)

55230

+ (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")

55231

+ (match_operand:SI 2 "gpc_reg_operand" "r")

55232

+ (match_operand 3 "s5bit_cint_operand" "n")]

55233

+ UNSPECV_HTM_TABORTWCI))

55234

+ (set (match_dup 5)

55235

+ (eq:SI (match_dup 4)

55236

+ (const_int 0)))

55237

+ (set (match_operand:SI 0 "int_reg_operand" "")

55238

+ (minus:SI (const_int 1) (match_dup 5)))]

55239

+ "TARGET_HTM"

55240

+{

55241

+ operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);

55242

+ operands[5] = gen_reg_rtx (SImode);

55243

+})

55244

+

55245

+(define_expand "ttest"

55246

+ [(set (match_dup 1)

55247

+ (unspec_volatile:CC [(const_int 0)

55248

+ (reg:SI 0)

55249

+ (const_int 0)]

55250

+ UNSPECV_HTM_TABORTWCI))

55251

+ (set (subreg:CC (match_dup 2) 0) (match_dup 1))

55252

+ (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 24)))

55253

+ (parallel [(set (match_operand:SI 0 "int_reg_operand" "")

55254

+ (and:SI (match_dup 3) (const_int 15)))

55255

+ (clobber (scratch:CC))])]

55256

+ "TARGET_HTM"

55257

+{

55258

+ operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);

55259

+ operands[2] = gen_reg_rtx (SImode);

55260

+ operands[3] = gen_reg_rtx (SImode);

55261

+})

55262

+

55263

+(define_insn "*tabortwci_internal"

55264

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")

55265

+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")

55266

+ (match_operand:SI 1 "gpc_reg_operand" "r")

55267

+ (match_operand 2 "s5bit_cint_operand" "n")]

55268

+ UNSPECV_HTM_TABORTWCI))]

55269

+ "TARGET_HTM"

55270

+ "tabortwci. %0,%1,%2"

55271

+ [(set_attr "type" "htm")

55272

+ (set_attr "length" "4")])

55273

+

55274

+(define_expand "tbegin"

55275

+ [(set (match_dup 2)

55276

+ (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]

55277

+ UNSPECV_HTM_TBEGIN))

55278

+ (set (match_dup 3)

55279

+ (eq:SI (match_dup 2)

55280

+ (const_int 0)))

55281

+ (set (match_operand:SI 0 "int_reg_operand" "")

55282

+ (minus:SI (const_int 1) (match_dup 3)))]

55283

+ "TARGET_HTM"

55284

+{

55285

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

55286

+ operands[3] = gen_reg_rtx (SImode);

55287

+})

55288

+

55289

+(define_insn "*tbegin_internal"

55290

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

55291

+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]

55292

+ UNSPECV_HTM_TBEGIN))]

55293

+ "TARGET_HTM"

55294

+ "tbegin. %0"

55295

+ [(set_attr "type" "htm")

55296

+ (set_attr "length" "4")])

55297

+

55298

+(define_expand "tcheck"

55299

+ [(set (match_dup 2)

55300

+ (unspec_volatile:CC [(match_operand 1 "u3bit_cint_operand" "n")]

55301

+ UNSPECV_HTM_TCHECK))

55302

+ (set (match_dup 3)

55303

+ (eq:SI (match_dup 2)

55304

+ (const_int 0)))

55305

+ (set (match_operand:SI 0 "int_reg_operand" "")

55306

+ (minus:SI (const_int 1) (match_dup 3)))]

55307

+ "TARGET_HTM"

55308

+{

55309

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

55310

+ operands[3] = gen_reg_rtx (SImode);

55311

+})

55312

+

55313

+(define_insn "*tcheck_internal"

55314

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

55315

+ (unspec_volatile:CC [(match_operand 0 "u3bit_cint_operand" "n")]

55316

+ UNSPECV_HTM_TCHECK))]

55317

+ "TARGET_HTM"

55318

+ "tcheck. %0"

55319

+ [(set_attr "type" "htm")

55320

+ (set_attr "length" "4")])

55321

+

55322

+(define_expand "tend"

55323

+ [(set (match_dup 2)

55324

+ (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]

55325

+ UNSPECV_HTM_TEND))

55326

+ (set (match_dup 3)

55327

+ (eq:SI (match_dup 2)

55328

+ (const_int 0)))

55329

+ (set (match_operand:SI 0 "int_reg_operand" "")

55330

+ (minus:SI (const_int 1) (match_dup 3)))]

55331

+ "TARGET_HTM"

55332

+{

55333

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

55334

+ operands[3] = gen_reg_rtx (SImode);

55335

+})

55336

+

55337

+(define_insn "*tend_internal"

55338

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

55339

+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]

55340

+ UNSPECV_HTM_TEND))]

55341

+ "TARGET_HTM"

55342

+ "tend. %0"

55343

+ [(set_attr "type" "htm")

55344

+ (set_attr "length" "4")])

55345

+

55346

+(define_expand "trechkpt"

55347

+ [(set (match_dup 1)

55348

+ (unspec_volatile:CC [(const_int 0)]

55349

+ UNSPECV_HTM_TRECHKPT))

55350

+ (set (match_dup 2)

55351

+ (eq:SI (match_dup 1)

55352

+ (const_int 0)))

55353

+ (set (match_operand:SI 0 "int_reg_operand" "")

55354

+ (minus:SI (const_int 1) (match_dup 2)))]

55355

+ "TARGET_HTM"

55356

+{

55357

+ operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);

55358

+ operands[2] = gen_reg_rtx (SImode);

55359

+})

55360

+

55361

+(define_insn "*trechkpt_internal"

55362

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x")

55363

+ (unspec_volatile:CC [(const_int 0)]

55364

+ UNSPECV_HTM_TRECHKPT))]

55365

+ "TARGET_HTM"

55366

+ "trechkpt."

55367

+ [(set_attr "type" "htm")

55368

+ (set_attr "length" "4")])

55369

+

55370

+(define_expand "treclaim"

55371

+ [(set (match_dup 2)

55372

+ (unspec_volatile:CC [(match_operand:SI 1 "gpc_reg_operand" "r")]

55373

+ UNSPECV_HTM_TRECLAIM))

55374

+ (set (match_dup 3)

55375

+ (eq:SI (match_dup 2)

55376

+ (const_int 0)))

55377

+ (set (match_operand:SI 0 "int_reg_operand" "")

55378

+ (minus:SI (const_int 1) (match_dup 3)))]

55379

+ "TARGET_HTM"

55380

+{

55381

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

55382

+ operands[3] = gen_reg_rtx (SImode);

55383

+})

55384

+

55385

+(define_insn "*treclaim_internal"

55386

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

55387

+ (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]

55388

+ UNSPECV_HTM_TRECLAIM))]

55389

+ "TARGET_HTM"

55390

+ "treclaim. %0"

55391

+ [(set_attr "type" "htm")

55392

+ (set_attr "length" "4")])

55393

+

55394

+(define_expand "tsr"

55395

+ [(set (match_dup 2)

55396

+ (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]

55397

+ UNSPECV_HTM_TSR))

55398

+ (set (match_dup 3)

55399

+ (eq:SI (match_dup 2)

55400

+ (const_int 0)))

55401

+ (set (match_operand:SI 0 "int_reg_operand" "")

55402

+ (minus:SI (const_int 1) (match_dup 3)))]

55403

+ "TARGET_HTM"

55404

+{

55405

+ operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

55406

+ operands[3] = gen_reg_rtx (SImode);

55407

+})

55408

+

55409

+(define_insn "*tsr_internal"

55410

+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")

55411

+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]

55412

+ UNSPECV_HTM_TSR))]

55413

+ "TARGET_HTM"

55414

+ "tsr. %0"

55415

+ [(set_attr "type" "htm")

55416

+ (set_attr "length" "4")])

55417

+

55418

+(define_insn "htm_mfspr_<mode>"

55419

+ [(set (match_operand:P 0 "gpc_reg_operand" "=r")

55420

+ (unspec_volatile:P [(match_operand 1 "u10bit_cint_operand" "n")

55421

+ (match_operand:P 2 "htm_spr_reg_operand" "")]

55422

+ UNSPECV_HTM_MFSPR))]

55423

+ "TARGET_HTM"

55424

+ "mfspr %0,%1";

55425

+ [(set_attr "type" "htm")

55426

+ (set_attr "length" "4")])

55427

+

55428

+(define_insn "htm_mtspr_<mode>"

55429

+ [(set (match_operand:P 2 "htm_spr_reg_operand" "")

55430

+ (unspec_volatile:P [(match_operand:P 0 "gpc_reg_operand" "r")

55431

+ (match_operand 1 "u10bit_cint_operand" "n")]

55432

+ UNSPECV_HTM_MTSPR))]

55433

+ "TARGET_HTM"

55434

+ "mtspr %1,%0";

55435

+ [(set_attr "type" "htm")

55436

+ (set_attr "length" "4")])

55437

Index: gcc/config/rs6000/rs6000-modes.def

55438

===================================================================

55439

--- a/src/gcc/config/rs6000/rs6000-modes.def (.../tags/gcc_4_8_2_release)

55440

+++ b/src/gcc/config/rs6000/rs6000-modes.def (.../branches/gcc-4_8-branch)

55441

@@ -38,6 +38,12 @@

55442

VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */

55443

VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */

55444

VECTOR_MODE (INT, DI, 1);

55445

+VECTOR_MODE (INT, TI, 1);

55446

VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */

55447

VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */

55448

VECTOR_MODES (FLOAT, 32); /* V16HF V8SF V4DF */

55449

+

55450

+/* Replacement for TImode that only is allowed in GPRs. We also use PTImode

55451

+ for quad memory atomic operations to force getting an even/odd register

55452

+ combination. */

55453

+PARTIAL_INT_MODE (TI);

55454

Index: gcc/config/rs6000/rs6000-cpus.def

55455

===================================================================

55456

--- a/src/gcc/config/rs6000/rs6000-cpus.def (.../tags/gcc_4_8_2_release)

55457

+++ b/src/gcc/config/rs6000/rs6000-cpus.def (.../branches/gcc-4_8-branch)

55458

@@ -28,7 +28,7 @@

55459

ALTIVEC, since in general it isn't a win on power6. In ISA 2.04, fsel,

55460

fre, fsqrt, etc. were no longer documented as optional. Group masks by

55461

server and embedded. */

55462

-#define ISA_2_5_MASKS_EMBEDDED (ISA_2_2_MASKS \

55463

+#define ISA_2_5_MASKS_EMBEDDED (ISA_2_4_MASKS \

55464

| OPTION_MASK_CMPB \

55465

| OPTION_MASK_RECIP_PRECISION \

55466

| OPTION_MASK_PPC_GFXOPT \

55467

@@ -38,6 +38,8 @@

55468

55469

/* For ISA 2.06, don't add ISEL, since in general it isn't a win, but

55470

altivec is a win so enable it. */

55471

+ /* OPTION_MASK_VSX_TIMODE should be set, but disable it for now until

55472

+ PR 58587 is fixed. */

55473

#define ISA_2_6_MASKS_EMBEDDED (ISA_2_5_MASKS_EMBEDDED | OPTION_MASK_POPCNTD)

55474

#define ISA_2_6_MASKS_SERVER (ISA_2_5_MASKS_SERVER \

55475

| OPTION_MASK_POPCNTD \

55476

@@ -44,6 +46,16 @@

55477

| OPTION_MASK_ALTIVEC \

55478

| OPTION_MASK_VSX)

55479

55480

+/* For now, don't provide an embedded version of ISA 2.07. */

55481

+#define ISA_2_7_MASKS_SERVER (ISA_2_6_MASKS_SERVER \

55482

+ | OPTION_MASK_P8_FUSION \

55483

+ | OPTION_MASK_P8_VECTOR \

55484

+ | OPTION_MASK_CRYPTO \

55485

+ | OPTION_MASK_DIRECT_MOVE \

55486

+ | OPTION_MASK_HTM \

55487

+ | OPTION_MASK_QUAD_MEMORY \

55488

+ | OPTION_MASK_QUAD_MEMORY_ATOMIC)

55489

+

55490

#define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)

55491

55492

/* Deal with ports that do not have -mstrict-align. */

55493

@@ -60,23 +72,30 @@

55494

/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */

55495

#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \

55496

| OPTION_MASK_CMPB \

55497

+ | OPTION_MASK_CRYPTO \

55498

| OPTION_MASK_DFP \

55499

+ | OPTION_MASK_DIRECT_MOVE \

55500

| OPTION_MASK_DLMZB \

55501

| OPTION_MASK_FPRND \

55502

+ | OPTION_MASK_HTM \

55503

| OPTION_MASK_ISEL \

55504

| OPTION_MASK_MFCRF \

55505

| OPTION_MASK_MFPGPR \

55506

| OPTION_MASK_MULHW \

55507

| OPTION_MASK_NO_UPDATE \

55508

+ | OPTION_MASK_P8_FUSION \

55509

+ | OPTION_MASK_P8_VECTOR \

55510

| OPTION_MASK_POPCNTB \

55511

| OPTION_MASK_POPCNTD \

55512

| OPTION_MASK_POWERPC64 \

55513

| OPTION_MASK_PPC_GFXOPT \

55514

| OPTION_MASK_PPC_GPOPT \

55515

+ | OPTION_MASK_QUAD_MEMORY \

55516

| OPTION_MASK_RECIP_PRECISION \

55517

| OPTION_MASK_SOFT_FLOAT \

55518

| OPTION_MASK_STRICT_ALIGN_OPTIONAL \

55519

- | OPTION_MASK_VSX)

55520

+ | OPTION_MASK_VSX \

55521

+ | OPTION_MASK_VSX_TIMODE)

55522

55523

#endif

55524

55525

@@ -166,10 +185,7 @@

55526

POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF

55527

55528

| MASK_VSX | MASK_RECIP_PRECISION)

55529

-RS6000_CPU ("power8", PROCESSOR_POWER7, /* Don't add MASK_ISEL by default */

55530

- POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF

55531

55532

- | MASK_VSX | MASK_RECIP_PRECISION)

55533

+RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)

55534

RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)

55535

RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)

55536

RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)

55537

Index: gcc/config/rs6000/t-linux64bele

55538

===================================================================

55539

--- a/src/gcc/config/rs6000/t-linux64bele (.../tags/gcc_4_8_2_release)

55540

+++ b/src/gcc/config/rs6000/t-linux64bele (.../branches/gcc-4_8-branch)

55541

@@ -0,0 +1,7 @@

55542

+#rs6000/t-linux64end

55543

+

55544

+MULTILIB_OPTIONS += mlittle

55545

+MULTILIB_DIRNAMES += le

55546

+MULTILIB_OSDIRNAMES += $(subst =,.mlittle=,$(subst lible32,lib32le,$(subst lible64,lib64le,$(subst lib,lible,$(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))))))

55547

+MULTILIB_OSDIRNAMES += $(subst $(if $(findstring 64,$(target)),m64,m32).,,$(filter $(if $(findstring 64,$(target)),m64,m32).mlittle%,$(MULTILIB_OSDIRNAMES)))

55548

+MULTILIB_MATCHES := ${MULTILIB_MATCHES_ENDIAN}

55549

Index: gcc/config/rs6000/htmintrin.h

55550

===================================================================

55551

--- a/src/gcc/config/rs6000/htmintrin.h (.../tags/gcc_4_8_2_release)

55552

+++ b/src/gcc/config/rs6000/htmintrin.h (.../branches/gcc-4_8-branch)

55553

@@ -0,0 +1,131 @@

55554

+/* Hardware Transactional Memory (HTM) intrinsics.

55555

55556

+ Contributed by Peter Bergner <bergner@vnet.ibm.com>.

55557

+

55558

+ This file is free software; you can redistribute it and/or modify it under

55559

+ the terms of the GNU General Public License as published by the Free

55560

+ Software Foundation; either version 3 of the License, or (at your option)

55561

+ any later version.

55562

+

55563

+ This file is distributed in the hope that it will be useful, but WITHOUT

55564

+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

55565

+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License

55566

+ for more details.

55567

+

55568

+ Under Section 7 of GPL version 3, you are granted additional

55569

+ permissions described in the GCC Runtime Library Exception, version

55570

+ 3.1, as published by the Free Software Foundation.

55571

+

55572

+ You should have received a copy of the GNU General Public License and

55573

+ a copy of the GCC Runtime Library Exception along with this program;

55574

+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see

55575

+ <http://www.gnu.org/licenses/>. */

55576

+

55577

+#ifndef __HTM__

55578

+# error "HTM instruction set not enabled"

55579

+#endif /* __HTM__ */

55580

+

55581

+#ifndef _HTMINTRIN_H

55582

+#define _HTMINTRIN_H

55583

+

55584

+#include <stdint.h>

55585

+

55586

+typedef uint64_t texasr_t;

55587

+typedef uint32_t texasru_t;

55588

+typedef uint32_t texasrl_t;

55589

+typedef uintptr_t tfiar_t;

55590

+typedef uintptr_t tfhar_t;

55591

+

55592

+#define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)

55593

+#define _HTM_NONTRANSACTIONAL 0x0

55594

+#define _HTM_SUSPENDED 0x1

55595

+#define _HTM_TRANSACTIONAL 0x2

55596

+

55597

+/* The following macros use the IBM bit numbering for BITNUM

55598

+ as used in the ISA documentation. */

55599

+

55600

+#define _TEXASR_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \

55601

+ (((TEXASR) >> (63-(BITNUM))) & ((1<<(SIZE))-1))

55602

+#define _TEXASRU_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \

55603

+ (((TEXASR) >> (31-(BITNUM))) & ((1<<(SIZE))-1))

55604

+

55605

+#define _TEXASR_FAILURE_CODE(TEXASR) \

55606

+ _TEXASR_EXTRACT_BITS(TEXASR, 7, 8)

55607

+#define _TEXASRU_FAILURE_CODE(TEXASRU) \

55608

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 8)

55609

+

55610

+#define _TEXASR_FAILURE_PERSISTENT(TEXASR) \

55611

+ _TEXASR_EXTRACT_BITS(TEXASR, 7, 1)

55612

+#define _TEXASRU_FAILURE_PERSISTENT(TEXASRU) \

55613

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 1)

55614

+

55615

+#define _TEXASR_DISALLOWED(TEXASR) \

55616

+ _TEXASR_EXTRACT_BITS(TEXASR, 8, 1)

55617

+#define _TEXASRU_DISALLOWED(TEXASRU) \

55618

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 8, 1)

55619

+

55620

+#define _TEXASR_NESTING_OVERFLOW(TEXASR) \

55621

+ _TEXASR_EXTRACT_BITS(TEXASR, 9, 1)

55622

+#define _TEXASRU_NESTING_OVERFLOW(TEXASRU) \

55623

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 9, 1)

55624

+

55625

+#define _TEXASR_FOOTPRINT_OVERFLOW(TEXASR) \

55626

+ _TEXASR_EXTRACT_BITS(TEXASR, 10, 1)

55627

+#define _TEXASRU_FOOTPRINT_OVERFLOW(TEXASRU) \

55628

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 10, 1)

55629

+

55630

+#define _TEXASR_SELF_INDUCED_CONFLICT(TEXASR) \

55631

+ _TEXASR_EXTRACT_BITS(TEXASR, 11, 1)

55632

+#define _TEXASRU_SELF_INDUCED_CONFLICT(TEXASRU) \

55633

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 11, 1)

55634

+

55635

+#define _TEXASR_NON_TRANSACTIONAL_CONFLICT(TEXASR) \

55636

+ _TEXASR_EXTRACT_BITS(TEXASR, 12, 1)

55637

+#define _TEXASRU_NON_TRANSACTIONAL_CONFLICT(TEXASRU) \

55638

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 12, 1)

55639

+

55640

+#define _TEXASR_TRANSACTION_CONFLICT(TEXASR) \

55641

+ _TEXASR_EXTRACT_BITS(TEXASR, 13, 1)

55642

+#define _TEXASRU_TRANSACTION_CONFLICT(TEXASRU) \

55643

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 13, 1)

55644

+

55645

+#define _TEXASR_TRANSLATION_INVALIDATION_CONFLICT(TEXASR) \

55646

+ _TEXASR_EXTRACT_BITS(TEXASR, 14, 1)

55647

+#define _TEXASRU_TRANSLATION_INVALIDATION_CONFLICT(TEXASRU) \

55648

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 14, 1)

55649

+

55650

+#define _TEXASR_IMPLEMENTAION_SPECIFIC(TEXASR) \

55651

+ _TEXASR_EXTRACT_BITS(TEXASR, 15, 1)

55652

+#define _TEXASRU_IMPLEMENTAION_SPECIFIC(TEXASRU) \

55653

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 15, 1)

55654

+

55655

+#define _TEXASR_INSTRUCTION_FETCH_CONFLICT(TEXASR) \

55656

+ _TEXASR_EXTRACT_BITS(TEXASR, 16, 1)

55657

+#define _TEXASRU_INSTRUCTION_FETCH_CONFLICT(TEXASRU) \

55658

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 16, 1)

55659

+

55660

+#define _TEXASR_ABORT(TEXASR) \

55661

+ _TEXASR_EXTRACT_BITS(TEXASR, 31, 1)

55662

+#define _TEXASRU_ABORT(TEXASRU) \

55663

+ _TEXASRU_EXTRACT_BITS(TEXASRU, 31, 1)

55664

+

55665

+

55666

+#define _TEXASR_SUSPENDED(TEXASR) \

55667

+ _TEXASR_EXTRACT_BITS(TEXASR, 32, 1)

55668

+

55669

+#define _TEXASR_PRIVILEGE(TEXASR) \

55670

+ _TEXASR_EXTRACT_BITS(TEXASR, 35, 2)

55671

+

55672

+#define _TEXASR_FAILURE_SUMMARY(TEXASR) \

55673

+ _TEXASR_EXTRACT_BITS(TEXASR, 36, 1)

55674

+

55675

+#define _TEXASR_TFIAR_EXACT(TEXASR) \

55676

+ _TEXASR_EXTRACT_BITS(TEXASR, 37, 1)

55677

+

55678

+#define _TEXASR_ROT(TEXASR) \

55679

+ _TEXASR_EXTRACT_BITS(TEXASR, 38, 1)

55680

+

55681

+#define _TEXASR_TRANSACTION_LEVEL(TEXASR) \

55682

+ _TEXASR_EXTRACT_BITS(TEXASR, 63, 12)

55683

+

55684

+#endif /* _HTMINTRIN_H */

55685

Index: gcc/config/rs6000/rs6000-protos.h

55686

===================================================================

55687

--- a/src/gcc/config/rs6000/rs6000-protos.h (.../tags/gcc_4_8_2_release)

55688

+++ b/src/gcc/config/rs6000/rs6000-protos.h (.../branches/gcc-4_8-branch)

55689

@@ -50,12 +50,19 @@

55690

extern rtx find_addr_reg (rtx);

55691

extern rtx gen_easy_altivec_constant (rtx);

55692

extern const char *output_vec_const_move (rtx *);

55693

+extern const char *rs6000_output_move_128bit (rtx *);

55694

+extern bool rs6000_move_128bit_ok_p (rtx []);

55695

+extern bool rs6000_split_128bit_ok_p (rtx []);

55696

extern void rs6000_expand_vector_init (rtx, rtx);

55697

extern void paired_expand_vector_init (rtx, rtx);

55698

extern void rs6000_expand_vector_set (rtx, rtx, int);

55699

extern void rs6000_expand_vector_extract (rtx, rtx, int);

55700

extern bool altivec_expand_vec_perm_const (rtx op[4]);

55701

+extern void altivec_expand_vec_perm_le (rtx op[4]);

55702

extern bool rs6000_expand_vec_perm_const (rtx op[4]);

55703

+extern void altivec_expand_lvx_be (rtx, rtx, enum machine_mode, unsigned);

55704

+extern void altivec_expand_stvx_be (rtx, rtx, enum machine_mode, unsigned);

55705

+extern void altivec_expand_stvex_be (rtx, rtx, enum machine_mode, unsigned);

55706

extern void rs6000_expand_extract_even (rtx, rtx, rtx);

55707

extern void rs6000_expand_interleave (rtx, rtx, rtx, bool);

55708

extern void build_mask64_2_operands (rtx, rtx *);

55709

@@ -70,6 +77,11 @@

55710

extern int registers_ok_for_quad_peep (rtx, rtx);

55711

extern int mems_ok_for_quad_peep (rtx, rtx);

55712

extern bool gpr_or_gpr_p (rtx, rtx);

55713

+extern bool direct_move_p (rtx, rtx);

55714

+extern bool quad_load_store_p (rtx, rtx);

55715

+extern bool fusion_gpr_load_p (rtx *, bool);

55716

+extern void expand_fusion_gpr_load (rtx *);

55717

+extern const char *emit_fusion_gpr_load (rtx *);

55718

extern enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx,

55719

enum reg_class);

55720

extern enum reg_class (*rs6000_secondary_reload_class_ptr) (enum reg_class,

55721

@@ -116,6 +128,7 @@

55722

extern void rs6000_fatal_bad_address (rtx);

55723

extern rtx create_TOC_reference (rtx, rtx);

55724

extern void rs6000_split_multireg_move (rtx, rtx);

55725

+extern void rs6000_emit_le_vsx_move (rtx, rtx, enum machine_mode);

55726

extern void rs6000_emit_move (rtx, rtx, enum machine_mode);

55727

extern rtx rs6000_secondary_memory_needed_rtx (enum machine_mode);

55728

extern rtx (*rs6000_legitimize_reload_address_ptr) (rtx, enum machine_mode,

55729

@@ -135,9 +148,11 @@

55730

extern rtx rs6000_address_for_altivec (rtx);

55731

extern rtx rs6000_allocate_stack_temp (enum machine_mode, bool, bool);

55732

extern int rs6000_loop_align (rtx);

55733

+extern void rs6000_split_logical (rtx [], enum rtx_code, bool, bool, bool, rtx);

55734

#endif /* RTX_CODE */

55735

55736

#ifdef TREE_CODE

55737

+extern unsigned int rs6000_data_alignment (tree, unsigned int, enum data_align);

55738

extern unsigned int rs6000_special_round_type_align (tree, unsigned int,

55739

unsigned int);

55740

extern unsigned int darwin_rs6000_special_round_type_align (tree, unsigned int,

55741

@@ -146,6 +161,7 @@

55742

extern rtx rs6000_libcall_value (enum machine_mode);

55743

extern rtx rs6000_va_arg (tree, tree);

55744

extern int function_ok_for_sibcall (tree);

55745

+extern int rs6000_reg_parm_stack_space (tree);

55746

extern void rs6000_elf_declare_function_name (FILE *, const char *, tree);

55747

extern bool rs6000_elf_in_small_data_p (const_tree);

55748

#ifdef ARGS_SIZE_RTX

55749

@@ -170,7 +186,8 @@

55750

extern void rs6000_emit_epilogue (int);

55751

extern void rs6000_emit_eh_reg_restore (rtx, rtx);

55752

extern const char * output_isel (rtx *);

55753

-extern void rs6000_call_indirect_aix (rtx, rtx, rtx);

55754

+extern void rs6000_call_aix (rtx, rtx, rtx, rtx);

55755

+extern void rs6000_sibcall_aix (rtx, rtx, rtx, rtx);

55756

extern void rs6000_aix_asm_output_dwarf_table_ref (char *);

55757

extern void get_ppc476_thunk_name (char name[32]);

55758

extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins);

55759

Index: gcc/config/rs6000/t-rs6000

55760

===================================================================

55761

--- a/src/gcc/config/rs6000/t-rs6000 (.../tags/gcc_4_8_2_release)

55762

+++ b/src/gcc/config/rs6000/t-rs6000 (.../branches/gcc-4_8-branch)

55763

@@ -60,6 +60,7 @@

55764

$(srcdir)/config/rs6000/power5.md \

55765

$(srcdir)/config/rs6000/power6.md \

55766

$(srcdir)/config/rs6000/power7.md \

55767

+ $(srcdir)/config/rs6000/power8.md \

55768

$(srcdir)/config/rs6000/cell.md \

55769

$(srcdir)/config/rs6000/xfpu.md \

55770

$(srcdir)/config/rs6000/a2.md \

55771

@@ -70,6 +71,8 @@

55772

$(srcdir)/config/rs6000/vector.md \

55773

$(srcdir)/config/rs6000/vsx.md \

55774

$(srcdir)/config/rs6000/altivec.md \

55775

+ $(srcdir)/config/rs6000/crypto.md \

55776

+ $(srcdir)/config/rs6000/htm.md \

55777

$(srcdir)/config/rs6000/spe.md \

55778

$(srcdir)/config/rs6000/dfp.md \

55779

$(srcdir)/config/rs6000/paired.md

55780

Index: gcc/config/rs6000/htmxlintrin.h

55781

===================================================================

55782

--- a/src/gcc/config/rs6000/htmxlintrin.h (.../tags/gcc_4_8_2_release)

55783

+++ b/src/gcc/config/rs6000/htmxlintrin.h (.../branches/gcc-4_8-branch)

55784

@@ -0,0 +1,208 @@

55785

+/* XL compiler Hardware Transactional Memory (HTM) execution intrinsics.

55786

55787

+ Contributed by Peter Bergner <bergner@vnet.ibm.com>.

55788

+

55789

+ This file is free software; you can redistribute it and/or modify it under

55790

+ the terms of the GNU General Public License as published by the Free

55791

+ Software Foundation; either version 3 of the License, or (at your option)

55792

+ any later version.

55793

+

55794

+ This file is distributed in the hope that it will be useful, but WITHOUT

55795

+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

55796

+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License

55797

+ for more details.

55798

+

55799

+ Under Section 7 of GPL version 3, you are granted additional

55800

+ permissions described in the GCC Runtime Library Exception, version

55801

+ 3.1, as published by the Free Software Foundation.

55802

+

55803

+ You should have received a copy of the GNU General Public License and

55804

+ a copy of the GCC Runtime Library Exception along with this program;

55805

+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see

55806

+ <http://www.gnu.org/licenses/>. */

55807

+

55808

+#ifndef __HTM__

55809

+# error "HTM instruction set not enabled"

55810

+#endif /* __HTM__ */

55811

+

55812

+#ifndef _HTMXLINTRIN_H

55813

+#define _HTMXLINTRIN_H

55814

+

55815

+#include <stdint.h>

55816

+#include <htmintrin.h>

55817

+

55818

+#ifdef __cplusplus

55819

+extern "C" {

55820

+#endif

55821

+

55822

+#define _TEXASR_PTR(TM_BUF) \

55823

+ ((texasr_t *)((TM_BUF)+0))

55824

+#define _TEXASRU_PTR(TM_BUF) \

55825

+ ((texasru_t *)((TM_BUF)+0))

55826

+#define _TEXASRL_PTR(TM_BUF) \

55827

+ ((texasrl_t *)((TM_BUF)+4))

55828

+#define _TFIAR_PTR(TM_BUF) \

55829

+ ((tfiar_t *)((TM_BUF)+8))

55830

+

55831

+typedef char TM_buff_type[16];

55832

+

55833

+extern __inline long

55834

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55835

+__TM_simple_begin (void)

55836

+{

55837

+ if (__builtin_expect (__builtin_tbegin (0), 1))

55838

+ return 1;

55839

+ return 0;

55840

+}

55841

+

55842

+extern __inline long

55843

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55844

+__TM_begin (void* const TM_buff)

55845

+{

55846

+ *_TEXASRL_PTR (TM_buff) = 0;

55847

+ if (__builtin_expect (__builtin_tbegin (0), 1))

55848

+ return 1;

55849

+#ifdef __powerpc64__

55850

+ *_TEXASR_PTR (TM_buff) = __builtin_get_texasr ();

55851

+#else

55852

+ *_TEXASRU_PTR (TM_buff) = __builtin_get_texasru ();

55853

+ *_TEXASRL_PTR (TM_buff) = __builtin_get_texasr ();

55854

+#endif

55855

+ *_TFIAR_PTR (TM_buff) = __builtin_get_tfiar ();

55856

+ return 0;

55857

+}

55858

+

55859

+extern __inline long

55860

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55861

+__TM_end (void)

55862

+{

55863

+ if (__builtin_expect (__builtin_tend (0), 1))

55864

+ return 1;

55865

+ return 0;

55866

+}

55867

+

55868

+extern __inline void

55869

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55870

+__TM_abort (void)

55871

+{

55872

+ __builtin_tabort (0);

55873

+}

55874

+

55875

+extern __inline void

55876

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55877

+__TM_named_abort (unsigned char const code)

55878

+{

55879

+ __builtin_tabort (code);

55880

+}

55881

+

55882

+extern __inline void

55883

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55884

+__TM_resume (void)

55885

+{

55886

+ __builtin_tresume ();

55887

+}

55888

+

55889

+extern __inline void

55890

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55891

+__TM_suspend (void)

55892

+{

55893

+ __builtin_tsuspend ();

55894

+}

55895

+

55896

+extern __inline long

55897

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55898

+__TM_is_user_abort (void* const TM_buff)

55899

+{

55900

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

55901

+ return _TEXASRU_ABORT (texasru);

55902

+}

55903

+

55904

+extern __inline long

55905

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55906

+__TM_is_named_user_abort (void* const TM_buff, unsigned char *code)

55907

+{

55908

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

55909

+

55910

+ *code = _TEXASRU_FAILURE_CODE (texasru);

55911

+ return _TEXASRU_ABORT (texasru);

55912

+}

55913

+

55914

+extern __inline long

55915

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55916

+__TM_is_illegal (void* const TM_buff)

55917

+{

55918

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

55919

+ return _TEXASRU_DISALLOWED (texasru);

55920

+}

55921

+

55922

+extern __inline long

55923

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55924

+__TM_is_footprint_exceeded (void* const TM_buff)

55925

+{

55926

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

55927

+ return _TEXASRU_FOOTPRINT_OVERFLOW (texasru);

55928

+}

55929

+

55930

+extern __inline long

55931

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55932

+__TM_nesting_depth (void* const TM_buff)

55933

+{

55934

+ texasrl_t texasrl;

55935

+

55936

+ if (_HTM_STATE (__builtin_ttest ()) == _HTM_NONTRANSACTIONAL)

55937

+ {

55938

+ texasrl = *_TEXASRL_PTR (TM_buff);

55939

+ if (!_TEXASR_FAILURE_SUMMARY (texasrl))

55940

+ texasrl = 0;

55941

+ }

55942

+ else

55943

+ texasrl = (texasrl_t) __builtin_get_texasr ();

55944

+

55945

+ return _TEXASR_TRANSACTION_LEVEL (texasrl);

55946

+}

55947

+

55948

+extern __inline long

55949

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55950

+__TM_is_nested_too_deep(void* const TM_buff)

55951

+{

55952

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

55953

+ return _TEXASRU_NESTING_OVERFLOW (texasru);

55954

+}

55955

+

55956

+extern __inline long

55957

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55958

+__TM_is_conflict(void* const TM_buff)

55959

+{

55960

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

55961

+ /* Return TEXASR bits 11 (Self-Induced Conflict) through

55962

+ 14 (Translation Invalidation Conflict). */

55963

+ return (_TEXASRU_EXTRACT_BITS (texasru, 14, 4)) ? 1 : 0;

55964

+}

55965

+

55966

+extern __inline long

55967

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55968

+__TM_is_failure_persistent(void* const TM_buff)

55969

+{

55970

+ texasru_t texasru = *_TEXASRU_PTR (TM_buff);

55971

+ return _TEXASRU_FAILURE_PERSISTENT (texasru);

55972

+}

55973

+

55974

+extern __inline long

55975

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55976

+__TM_failure_address(void* const TM_buff)

55977

+{

55978

+ return *_TFIAR_PTR (TM_buff);

55979

+}

55980

+

55981

+extern __inline long long

55982

+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))

55983

+__TM_failure_code(void* const TM_buff)

55984

+{

55985

+ return *_TEXASR_PTR (TM_buff);

55986

+}

55987

+

55988

+#ifdef __cplusplus

55989

+}

55990

+#endif

55991

+

55992

+#endif /* _HTMXLINTRIN_H */

55993

Index: gcc/config/rs6000/rs6000-builtin.def

55994

===================================================================

55995

--- a/src/gcc/config/rs6000/rs6000-builtin.def (.../tags/gcc_4_8_2_release)

55996

+++ b/src/gcc/config/rs6000/rs6000-builtin.def (.../branches/gcc-4_8-branch)

55997

@@ -30,7 +30,8 @@

55998

RS6000_BUILTIN_A -- ABS builtins

55999

RS6000_BUILTIN_D -- DST builtins

56000

RS6000_BUILTIN_E -- SPE EVSEL builtins.

56001

- RS6000_BUILTIN_P -- Altivec and VSX predicate builtins

56002

+ RS6000_BUILTIN_H -- HTM builtins

56003

+ RS6000_BUILTIN_P -- Altivec, VSX, ISA 2.07 vector predicate builtins

56004

RS6000_BUILTIN_Q -- Paired floating point VSX predicate builtins

56005

RS6000_BUILTIN_S -- SPE predicate builtins

56006

RS6000_BUILTIN_X -- special builtins

56007

@@ -66,6 +67,10 @@

56008

#error "RS6000_BUILTIN_E is not defined."

56009

#endif

56010

56011

+#ifndef RS6000_BUILTIN_H

56012

+ #error "RS6000_BUILTIN_H is not defined."

56013

+#endif

56014

+

56015

#ifndef RS6000_BUILTIN_P

56016

#error "RS6000_BUILTIN_P is not defined."

56017

#endif

56018

@@ -301,6 +306,174 @@

56019

| RS6000_BTC_SPECIAL), \

56020

CODE_FOR_nothing) /* ICODE */

56021

56022

+/* ISA 2.07 (power8) vector convenience macros. */

56023

+/* For the instructions that are encoded as altivec instructions use

56024

+ __builtin_altivec_ as the builtin name. */

56025

+#define BU_P8V_AV_1(ENUM, NAME, ATTR, ICODE) \

56026

+ RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

56027

+ "__builtin_altivec_" NAME, /* NAME */ \

56028

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56029

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56030

+ | RS6000_BTC_UNARY), \

56031

+ CODE_FOR_ ## ICODE) /* ICODE */

56032

+

56033

+#define BU_P8V_AV_2(ENUM, NAME, ATTR, ICODE) \

56034

+ RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

56035

+ "__builtin_altivec_" NAME, /* NAME */ \

56036

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56037

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56038

+ | RS6000_BTC_BINARY), \

56039

+ CODE_FOR_ ## ICODE) /* ICODE */

56040

+

56041

+#define BU_P8V_AV_3(ENUM, NAME, ATTR, ICODE) \

56042

+ RS6000_BUILTIN_3 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

56043

+ "__builtin_altivec_" NAME, /* NAME */ \

56044

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56045

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56046

+ | RS6000_BTC_TERNARY), \

56047

+ CODE_FOR_ ## ICODE) /* ICODE */

56048

+

56049

+#define BU_P8V_AV_P(ENUM, NAME, ATTR, ICODE) \

56050

+ RS6000_BUILTIN_P (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

56051

+ "__builtin_altivec_" NAME, /* NAME */ \

56052

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56053

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56054

+ | RS6000_BTC_PREDICATE), \

56055

+ CODE_FOR_ ## ICODE) /* ICODE */

56056

+

56057

+/* For the instructions encoded as VSX instructions use __builtin_vsx as the

56058

+ builtin name. */

56059

+#define BU_P8V_VSX_1(ENUM, NAME, ATTR, ICODE) \

56060

+ RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \

56061

+ "__builtin_vsx_" NAME, /* NAME */ \

56062

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56063

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56064

+ | RS6000_BTC_UNARY), \

56065

+ CODE_FOR_ ## ICODE) /* ICODE */

56066

+

56067

+#define BU_P8V_OVERLOAD_1(ENUM, NAME) \

56068

+ RS6000_BUILTIN_1 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \

56069

+ "__builtin_vec_" NAME, /* NAME */ \

56070

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56071

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

56072

+ | RS6000_BTC_UNARY), \

56073

+ CODE_FOR_nothing) /* ICODE */

56074

+

56075

+#define BU_P8V_OVERLOAD_2(ENUM, NAME) \

56076

+ RS6000_BUILTIN_2 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \

56077

+ "__builtin_vec_" NAME, /* NAME */ \

56078

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56079

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

56080

+ | RS6000_BTC_BINARY), \

56081

+ CODE_FOR_nothing) /* ICODE */

56082

+

56083

+#define BU_P8V_OVERLOAD_3(ENUM, NAME) \

56084

+ RS6000_BUILTIN_3 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \

56085

+ "__builtin_vec_" NAME, /* NAME */ \

56086

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56087

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

56088

+ | RS6000_BTC_TERNARY), \

56089

+ CODE_FOR_nothing) /* ICODE */

56090

+

56091

+/* Crypto convenience macros. */

56092

+#define BU_CRYPTO_1(ENUM, NAME, ATTR, ICODE) \

56093

+ RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

56094

+ "__builtin_crypto_" NAME, /* NAME */ \

56095

+ RS6000_BTM_CRYPTO, /* MASK */ \

56096

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56097

+ | RS6000_BTC_UNARY), \

56098

+ CODE_FOR_ ## ICODE) /* ICODE */

56099

+

56100

+#define BU_CRYPTO_2(ENUM, NAME, ATTR, ICODE) \

56101

+ RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

56102

+ "__builtin_crypto_" NAME, /* NAME */ \

56103

+ RS6000_BTM_CRYPTO, /* MASK */ \

56104

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56105

+ | RS6000_BTC_BINARY), \

56106

+ CODE_FOR_ ## ICODE) /* ICODE */

56107

+

56108

+#define BU_CRYPTO_3(ENUM, NAME, ATTR, ICODE) \

56109

+ RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

56110

+ "__builtin_crypto_" NAME, /* NAME */ \

56111

+ RS6000_BTM_CRYPTO, /* MASK */ \

56112

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56113

+ | RS6000_BTC_TERNARY), \

56114

+ CODE_FOR_ ## ICODE) /* ICODE */

56115

+

56116

+#define BU_CRYPTO_OVERLOAD_1(ENUM, NAME) \

56117

+ RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

56118

+ "__builtin_crypto_" NAME, /* NAME */ \

56119

+ RS6000_BTM_CRYPTO, /* MASK */ \

56120

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

56121

+ | RS6000_BTC_UNARY), \

56122

+ CODE_FOR_nothing) /* ICODE */

56123

+

56124

+#define BU_CRYPTO_OVERLOAD_2(ENUM, NAME) \

56125

+ RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

56126

+ "__builtin_crypto_" NAME, /* NAME */ \

56127

+ RS6000_BTM_CRYPTO, /* MASK */ \

56128

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

56129

+ | RS6000_BTC_BINARY), \

56130

+ CODE_FOR_nothing) /* ICODE */

56131

+

56132

+#define BU_CRYPTO_OVERLOAD_3(ENUM, NAME) \

56133

+ RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \

56134

+ "__builtin_crypto_" NAME, /* NAME */ \

56135

+ RS6000_BTM_CRYPTO, /* MASK */ \

56136

+ (RS6000_BTC_OVERLOADED /* ATTR */ \

56137

+ | RS6000_BTC_TERNARY), \

56138

+ CODE_FOR_nothing) /* ICODE */

56139

+

56140

+/* HTM convenience macros. */

56141

+#define BU_HTM_0(ENUM, NAME, ATTR, ICODE) \

56142

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

56143

+ "__builtin_" NAME, /* NAME */ \

56144

+ RS6000_BTM_HTM, /* MASK */ \

56145

+ RS6000_BTC_ ## ATTR, /* ATTR */ \

56146

+ CODE_FOR_ ## ICODE) /* ICODE */

56147

+

56148

+#define BU_HTM_1(ENUM, NAME, ATTR, ICODE) \

56149

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

56150

+ "__builtin_" NAME, /* NAME */ \

56151

+ RS6000_BTM_HTM, /* MASK */ \

56152

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56153

+ | RS6000_BTC_UNARY), \

56154

+ CODE_FOR_ ## ICODE) /* ICODE */

56155

+

56156

+#define BU_HTM_2(ENUM, NAME, ATTR, ICODE) \

56157

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

56158

+ "__builtin_" NAME, /* NAME */ \

56159

+ RS6000_BTM_HTM, /* MASK */ \

56160

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56161

+ | RS6000_BTC_BINARY), \

56162

+ CODE_FOR_ ## ICODE) /* ICODE */

56163

+

56164

+#define BU_HTM_3(ENUM, NAME, ATTR, ICODE) \

56165

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

56166

+ "__builtin_" NAME, /* NAME */ \

56167

+ RS6000_BTM_HTM, /* MASK */ \

56168

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56169

+ | RS6000_BTC_TERNARY), \

56170

+ CODE_FOR_ ## ICODE) /* ICODE */

56171

+

56172

+#define BU_HTM_SPR0(ENUM, NAME, ATTR, ICODE) \

56173

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

56174

+ "__builtin_" NAME, /* NAME */ \

56175

+ RS6000_BTM_HTM, /* MASK */ \

56176

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56177

+ | RS6000_BTC_SPR), \

56178

+ CODE_FOR_ ## ICODE) /* ICODE */

56179

+

56180

+#define BU_HTM_SPR1(ENUM, NAME, ATTR, ICODE) \

56181

+ RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \

56182

+ "__builtin_" NAME, /* NAME */ \

56183

+ RS6000_BTM_HTM, /* MASK */ \

56184

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56185

+ | RS6000_BTC_UNARY \

56186

+ | RS6000_BTC_SPR \

56187

+ | RS6000_BTC_VOID), \

56188

+ CODE_FOR_ ## ICODE) /* ICODE */

56189

+

56190

/* SPE convenience macros. */

56191

#define BU_SPE_1(ENUM, NAME, ATTR, ICODE) \

56192

RS6000_BUILTIN_1 (SPE_BUILTIN_ ## ENUM, /* ENUM */ \

56193

@@ -397,6 +570,75 @@

56194

MASK, /* MASK */ \

56195

(ATTR | RS6000_BTC_SPECIAL), /* ATTR */ \

56196

CODE_FOR_nothing) /* ICODE */

56197

+

56198

+

56199

+/* Decimal floating point builtins for instructions. */

56200

+#define BU_DFP_MISC_1(ENUM, NAME, ATTR, ICODE) \

56201

+ RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \

56202

+ "__builtin_" NAME, /* NAME */ \

56203

+ RS6000_BTM_DFP, /* MASK */ \

56204

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56205

+ | RS6000_BTC_UNARY), \

56206

+ CODE_FOR_ ## ICODE) /* ICODE */

56207

+

56208

+#define BU_DFP_MISC_2(ENUM, NAME, ATTR, ICODE) \

56209

+ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \

56210

+ "__builtin_" NAME, /* NAME */ \

56211

+ RS6000_BTM_DFP, /* MASK */ \

56212

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56213

+ | RS6000_BTC_BINARY), \

56214

+ CODE_FOR_ ## ICODE) /* ICODE */

56215

+

56216

+

56217

+/* Miscellaneous builtins for instructions added in ISA 2.06. These

56218

+ instructions don't require either the DFP or VSX options, just the basic ISA

56219

+ 2.06 (popcntd) enablement since they operate on general purpose

56220

+ registers. */

56221

+#define BU_P7_MISC_1(ENUM, NAME, ATTR, ICODE) \

56222

+ RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \

56223

+ "__builtin_" NAME, /* NAME */ \

56224

+ RS6000_BTM_POPCNTD, /* MASK */ \

56225

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56226

+ | RS6000_BTC_UNARY), \

56227

+ CODE_FOR_ ## ICODE) /* ICODE */

56228

+

56229

+#define BU_P7_MISC_2(ENUM, NAME, ATTR, ICODE) \

56230

+ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \

56231

+ "__builtin_" NAME, /* NAME */ \

56232

+ RS6000_BTM_POPCNTD, /* MASK */ \

56233

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56234

+ | RS6000_BTC_BINARY), \

56235

+ CODE_FOR_ ## ICODE) /* ICODE */

56236

+

56237

+

56238

+/* Miscellaneous builtins for instructions added in ISA 2.07. These

56239

+ instructions do require the ISA 2.07 vector support, but they aren't vector

56240

+ instructions. */

56241

+#define BU_P8V_MISC_3(ENUM, NAME, ATTR, ICODE) \

56242

+ RS6000_BUILTIN_3 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \

56243

+ "__builtin_" NAME, /* NAME */ \

56244

+ RS6000_BTM_P8_VECTOR, /* MASK */ \

56245

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56246

+ | RS6000_BTC_TERNARY), \

56247

+ CODE_FOR_ ## ICODE) /* ICODE */

56248

+

56249

+/* Miscellaneous builtins. */

56250

+#define BU_MISC_1(ENUM, NAME, ATTR, ICODE) \

56251

+ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \

56252

+ "__builtin_" NAME, /* NAME */ \

56253

+ RS6000_BTM_HARD_FLOAT, /* MASK */ \

56254

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56255

+ | RS6000_BTC_UNARY), \

56256

+ CODE_FOR_ ## ICODE) /* ICODE */

56257

+

56258

+#define BU_MISC_2(ENUM, NAME, ATTR, ICODE) \

56259

+ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \

56260

+ "__builtin_" NAME, /* NAME */ \

56261

+ RS6000_BTM_HARD_FLOAT, /* MASK */ \

56262

+ (RS6000_BTC_ ## ATTR /* ATTR */ \

56263

+ | RS6000_BTC_BINARY), \

56264

+ CODE_FOR_ ## ICODE) /* ICODE */

56265

+

56266

#endif

56267

56268

/* Insure 0 is not a legitimate index. */

56269

@@ -414,6 +656,7 @@

56270

BU_ALTIVEC_3 (VMSUMUHS, "vmsumuhs", SAT, altivec_vmsumuhs)

56271

BU_ALTIVEC_3 (VMSUMSHS, "vmsumshs", SAT, altivec_vmsumshs)

56272

BU_ALTIVEC_3 (VNMSUBFP, "vnmsubfp", FP, nfmsv4sf4)

56273

+BU_ALTIVEC_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti)

56274

BU_ALTIVEC_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df)

56275

BU_ALTIVEC_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di)

56276

BU_ALTIVEC_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf)

56277

@@ -420,6 +663,7 @@

56278

BU_ALTIVEC_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si)

56279

BU_ALTIVEC_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi)

56280

BU_ALTIVEC_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi_uns)

56281

+BU_ALTIVEC_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns)

56282

BU_ALTIVEC_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns)

56283

BU_ALTIVEC_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns)

56284

BU_ALTIVEC_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns)

56285

@@ -430,10 +674,12 @@

56286

BU_ALTIVEC_3 (VSEL_16QI, "vsel_16qi", CONST, vector_select_v16qi)

56287

BU_ALTIVEC_3 (VSEL_2DF, "vsel_2df", CONST, vector_select_v2df)

56288

BU_ALTIVEC_3 (VSEL_2DI, "vsel_2di", CONST, vector_select_v2di)

56289

+BU_ALTIVEC_3 (VSEL_1TI, "vsel_1ti", CONST, vector_select_v1ti)

56290

BU_ALTIVEC_3 (VSEL_4SI_UNS, "vsel_4si_uns", CONST, vector_select_v4si_uns)

56291

BU_ALTIVEC_3 (VSEL_8HI_UNS, "vsel_8hi_uns", CONST, vector_select_v8hi_uns)

56292

BU_ALTIVEC_3 (VSEL_16QI_UNS, "vsel_16qi_uns", CONST, vector_select_v16qi_uns)

56293

BU_ALTIVEC_3 (VSEL_2DI_UNS, "vsel_2di_uns", CONST, vector_select_v2di_uns)

56294

+BU_ALTIVEC_3 (VSEL_1TI_UNS, "vsel_1ti_uns", CONST, vector_select_v1ti_uns)

56295

BU_ALTIVEC_3 (VSLDOI_16QI, "vsldoi_16qi", CONST, altivec_vsldoi_v16qi)

56296

BU_ALTIVEC_3 (VSLDOI_8HI, "vsldoi_8hi", CONST, altivec_vsldoi_v8hi)

56297

BU_ALTIVEC_3 (VSLDOI_4SI, "vsldoi_4si", CONST, altivec_vsldoi_v4si)

56298

@@ -626,6 +872,8 @@

56299

BU_ALTIVEC_X (LD_INTERNAL_2df, "ld_internal_2df", MEM)

56300

BU_ALTIVEC_X (ST_INTERNAL_2di, "st_internal_2di", MEM)

56301

BU_ALTIVEC_X (LD_INTERNAL_2di, "ld_internal_2di", MEM)

56302

+BU_ALTIVEC_X (ST_INTERNAL_1ti, "st_internal_1ti", MEM)

56303

+BU_ALTIVEC_X (LD_INTERNAL_1ti, "ld_internal_1ti", MEM)

56304

BU_ALTIVEC_X (MTVSCR, "mtvscr", MISC)

56305

BU_ALTIVEC_X (MFVSCR, "mfvscr", MISC)

56306

BU_ALTIVEC_X (DSSALL, "dssall", MISC)

56307

@@ -636,8 +884,26 @@

56308

BU_ALTIVEC_X (LVEHX, "lvehx", MEM)

56309

BU_ALTIVEC_X (LVEWX, "lvewx", MEM)

56310

BU_ALTIVEC_X (LVXL, "lvxl", MEM)

56311

+BU_ALTIVEC_X (LVXL_V2DF, "lvxl_v2df", MEM)

56312

+BU_ALTIVEC_X (LVXL_V2DI, "lvxl_v2di", MEM)

56313

+BU_ALTIVEC_X (LVXL_V4SF, "lvxl_v4sf", MEM)

56314

+BU_ALTIVEC_X (LVXL_V4SI, "lvxl_v4si", MEM)

56315

+BU_ALTIVEC_X (LVXL_V8HI, "lvxl_v8hi", MEM)

56316

+BU_ALTIVEC_X (LVXL_V16QI, "lvxl_v16qi", MEM)

56317

BU_ALTIVEC_X (LVX, "lvx", MEM)

56318

+BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", MEM)

56319

+BU_ALTIVEC_X (LVX_V2DI, "lvx_v2di", MEM)

56320

+BU_ALTIVEC_X (LVX_V4SF, "lvx_v4sf", MEM)

56321

+BU_ALTIVEC_X (LVX_V4SI, "lvx_v4si", MEM)

56322

+BU_ALTIVEC_X (LVX_V8HI, "lvx_v8hi", MEM)

56323

+BU_ALTIVEC_X (LVX_V16QI, "lvx_v16qi", MEM)

56324

BU_ALTIVEC_X (STVX, "stvx", MEM)

56325

+BU_ALTIVEC_X (STVX_V2DF, "stvx_v2df", MEM)

56326

+BU_ALTIVEC_X (STVX_V2DI, "stvx_v2di", MEM)

56327

+BU_ALTIVEC_X (STVX_V4SF, "stvx_v4sf", MEM)

56328

+BU_ALTIVEC_X (STVX_V4SI, "stvx_v4si", MEM)

56329

+BU_ALTIVEC_X (STVX_V8HI, "stvx_v8hi", MEM)

56330

+BU_ALTIVEC_X (STVX_V16QI, "stvx_v16qi", MEM)

56331

BU_ALTIVEC_C (LVLX, "lvlx", MEM)

56332

BU_ALTIVEC_C (LVLXL, "lvlxl", MEM)

56333

BU_ALTIVEC_C (LVRX, "lvrx", MEM)

56334

@@ -646,6 +912,12 @@

56335

BU_ALTIVEC_X (STVEHX, "stvehx", MEM)

56336

BU_ALTIVEC_X (STVEWX, "stvewx", MEM)

56337

BU_ALTIVEC_X (STVXL, "stvxl", MEM)

56338

+BU_ALTIVEC_X (STVXL_V2DF, "stvxl_v2df", MEM)

56339

+BU_ALTIVEC_X (STVXL_V2DI, "stvxl_v2di", MEM)

56340

+BU_ALTIVEC_X (STVXL_V4SF, "stvxl_v4sf", MEM)

56341

+BU_ALTIVEC_X (STVXL_V4SI, "stvxl_v4si", MEM)

56342

+BU_ALTIVEC_X (STVXL_V8HI, "stvxl_v8hi", MEM)

56343

+BU_ALTIVEC_X (STVXL_V16QI, "stvxl_v16qi", MEM)

56344

BU_ALTIVEC_C (STVLX, "stvlx", MEM)

56345

BU_ALTIVEC_C (STVLXL, "stvlxl", MEM)

56346

BU_ALTIVEC_C (STVRX, "stvrx", MEM)

56347

@@ -904,6 +1176,7 @@

56348

BU_VSX_3 (XVNMADDDP, "xvnmadddp", CONST, nfmav2df4)

56349

BU_VSX_3 (XVNMSUBDP, "xvnmsubdp", CONST, nfmsv2df4)

56350

56351

+BU_VSX_3 (XXSEL_1TI, "xxsel_1ti", CONST, vector_select_v1ti)

56352

BU_VSX_3 (XXSEL_2DI, "xxsel_2di", CONST, vector_select_v2di)

56353

BU_VSX_3 (XXSEL_2DF, "xxsel_2df", CONST, vector_select_v2df)

56354

BU_VSX_3 (XXSEL_4SF, "xxsel_4sf", CONST, vector_select_v4sf)

56355

@@ -910,11 +1183,13 @@

56356

BU_VSX_3 (XXSEL_4SI, "xxsel_4si", CONST, vector_select_v4si)

56357

BU_VSX_3 (XXSEL_8HI, "xxsel_8hi", CONST, vector_select_v8hi)

56358

BU_VSX_3 (XXSEL_16QI, "xxsel_16qi", CONST, vector_select_v16qi)

56359

+BU_VSX_3 (XXSEL_1TI_UNS, "xxsel_1ti_uns", CONST, vector_select_v1ti_uns)

56360

BU_VSX_3 (XXSEL_2DI_UNS, "xxsel_2di_uns", CONST, vector_select_v2di_uns)

56361

BU_VSX_3 (XXSEL_4SI_UNS, "xxsel_4si_uns", CONST, vector_select_v4si_uns)

56362

BU_VSX_3 (XXSEL_8HI_UNS, "xxsel_8hi_uns", CONST, vector_select_v8hi_uns)

56363

BU_VSX_3 (XXSEL_16QI_UNS, "xxsel_16qi_uns", CONST, vector_select_v16qi_uns)

56364

56365

+BU_VSX_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti)

56366

BU_VSX_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di)

56367

BU_VSX_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df)

56368

BU_VSX_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf)

56369

@@ -921,11 +1196,13 @@

56370

BU_VSX_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si)

56371

BU_VSX_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi)

56372

BU_VSX_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi)

56373

+BU_VSX_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns)

56374

BU_VSX_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns)

56375

BU_VSX_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns)

56376

BU_VSX_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns)

56377

BU_VSX_3 (VPERM_16QI_UNS, "vperm_16qi_uns", CONST, altivec_vperm_v16qi_uns)

56378

56379

+BU_VSX_3 (XXPERMDI_1TI, "xxpermdi_1ti", CONST, vsx_xxpermdi_v1ti)

56380

BU_VSX_3 (XXPERMDI_2DF, "xxpermdi_2df", CONST, vsx_xxpermdi_v2df)

56381

BU_VSX_3 (XXPERMDI_2DI, "xxpermdi_2di", CONST, vsx_xxpermdi_v2di)

56382

BU_VSX_3 (XXPERMDI_4SF, "xxpermdi_4sf", CONST, vsx_xxpermdi_v4sf)

56383

@@ -932,6 +1209,7 @@

56384

BU_VSX_3 (XXPERMDI_4SI, "xxpermdi_4si", CONST, vsx_xxpermdi_v4si)

56385

BU_VSX_3 (XXPERMDI_8HI, "xxpermdi_8hi", CONST, vsx_xxpermdi_v8hi)

56386

BU_VSX_3 (XXPERMDI_16QI, "xxpermdi_16qi", CONST, vsx_xxpermdi_v16qi)

56387

+BU_VSX_3 (SET_1TI, "set_1ti", CONST, vsx_set_v1ti)

56388

BU_VSX_3 (SET_2DF, "set_2df", CONST, vsx_set_v2df)

56389

BU_VSX_3 (SET_2DI, "set_2di", CONST, vsx_set_v2di)

56390

BU_VSX_3 (XXSLDWI_2DI, "xxsldwi_2di", CONST, vsx_xxsldwi_v2di)

56391

@@ -1012,7 +1290,7 @@

56392

BU_VSX_1 (XVRESP, "xvresp", CONST, vsx_frev4sf2)

56393

56394

BU_VSX_1 (XSCVDPSP, "xscvdpsp", CONST, vsx_xscvdpsp)

56395

-BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvdpsp)

56396

+BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvspdp)

56397

BU_VSX_1 (XVCVDPSP, "xvcvdpsp", CONST, vsx_xvcvdpsp)

56398

BU_VSX_1 (XVCVSPDP, "xvcvspdp", CONST, vsx_xvcvspdp)

56399

BU_VSX_1 (XSTSQRTDP_FE, "xstsqrtdp_fe", CONST, vsx_tsqrtdf2_fe)

56400

@@ -1052,9 +1330,9 @@

56401

56402

BU_VSX_1 (XSRDPI, "xsrdpi", CONST, vsx_xsrdpi)

56403

BU_VSX_1 (XSRDPIC, "xsrdpic", CONST, vsx_xsrdpic)

56404

-BU_VSX_1 (XSRDPIM, "xsrdpim", CONST, vsx_floordf2)

56405

-BU_VSX_1 (XSRDPIP, "xsrdpip", CONST, vsx_ceildf2)

56406

-BU_VSX_1 (XSRDPIZ, "xsrdpiz", CONST, vsx_btruncdf2)

56407

+BU_VSX_1 (XSRDPIM, "xsrdpim", CONST, floordf2)

56408

+BU_VSX_1 (XSRDPIP, "xsrdpip", CONST, ceildf2)

56409

+BU_VSX_1 (XSRDPIZ, "xsrdpiz", CONST, btruncdf2)

56410

56411

/* VSX predicate functions. */

56412

BU_VSX_P (XVCMPEQSP_P, "xvcmpeqsp_p", CONST, vector_eq_v4sf_p)

56413

@@ -1066,6 +1344,7 @@

56414

56415

/* VSX builtins that are handled as special cases. */

56416

BU_VSX_X (LXSDX, "lxsdx", MEM)

56417

+BU_VSX_X (LXVD2X_V1TI, "lxvd2x_v1ti", MEM)

56418

BU_VSX_X (LXVD2X_V2DF, "lxvd2x_v2df", MEM)

56419

BU_VSX_X (LXVD2X_V2DI, "lxvd2x_v2di", MEM)

56420

BU_VSX_X (LXVDSX, "lxvdsx", MEM)

56421

@@ -1074,6 +1353,7 @@

56422

BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", MEM)

56423

BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", MEM)

56424

BU_VSX_X (STXSDX, "stxsdx", MEM)

56425

+BU_VSX_X (STXVD2X_V1TI, "stxsdx_v1ti", MEM)

56426

BU_VSX_X (STXVD2X_V2DF, "stxsdx_v2df", MEM)

56427

BU_VSX_X (STXVD2X_V2DI, "stxsdx_v2di", MEM)

56428

BU_VSX_X (STXVW4X_V4SF, "stxsdx_v4sf", MEM)

56429

@@ -1104,10 +1384,13 @@

56430

BU_VSX_X (XSNMSUBADP, "xsnmsubadp", FP)

56431

BU_VSX_X (XSNMSUBMDP, "xsnmsubmdp", FP)

56432

BU_VSX_X (XSSUBDP, "xssubdp", FP)

56433

+BU_VSX_X (VEC_INIT_V1TI, "vec_init_v1ti", CONST)

56434

BU_VSX_X (VEC_INIT_V2DF, "vec_init_v2df", CONST)

56435

BU_VSX_X (VEC_INIT_V2DI, "vec_init_v2di", CONST)

56436

+BU_VSX_X (VEC_SET_V1TI, "vec_set_v1ti", CONST)

56437

BU_VSX_X (VEC_SET_V2DF, "vec_set_v2df", CONST)

56438

BU_VSX_X (VEC_SET_V2DI, "vec_set_v2di", CONST)

56439

+BU_VSX_X (VEC_EXT_V1TI, "vec_ext_v1ti", CONST)

56440

BU_VSX_X (VEC_EXT_V2DF, "vec_ext_v2df", CONST)

56441

BU_VSX_X (VEC_EXT_V2DI, "vec_ext_v2di", CONST)

56442

56443

@@ -1132,6 +1415,249 @@

56444

BU_VSX_OVERLOAD_X (LD, "ld")

56445

BU_VSX_OVERLOAD_X (ST, "st")

56446

56447

+/* 1 argument VSX instructions added in ISA 2.07. */

56448

+BU_P8V_VSX_1 (XSCVSPDPN, "xscvspdpn", CONST, vsx_xscvspdpn)

56449

+BU_P8V_VSX_1 (XSCVDPSPN, "xscvdpspn", CONST, vsx_xscvdpspn)

56450

+

56451

+/* 1 argument altivec instructions added in ISA 2.07. */

56452

+BU_P8V_AV_1 (ABS_V2DI, "abs_v2di", CONST, absv2di2)

56453

+BU_P8V_AV_1 (VUPKHSW, "vupkhsw", CONST, altivec_vupkhsw)

56454

+BU_P8V_AV_1 (VUPKLSW, "vupklsw", CONST, altivec_vupklsw)

56455

+BU_P8V_AV_1 (VCLZB, "vclzb", CONST, clzv16qi2)

56456

+BU_P8V_AV_1 (VCLZH, "vclzh", CONST, clzv8hi2)

56457

+BU_P8V_AV_1 (VCLZW, "vclzw", CONST, clzv4si2)

56458

+BU_P8V_AV_1 (VCLZD, "vclzd", CONST, clzv2di2)

56459

+BU_P8V_AV_1 (VPOPCNTB, "vpopcntb", CONST, popcountv16qi2)

56460

+BU_P8V_AV_1 (VPOPCNTH, "vpopcnth", CONST, popcountv8hi2)

56461

+BU_P8V_AV_1 (VPOPCNTW, "vpopcntw", CONST, popcountv4si2)

56462

+BU_P8V_AV_1 (VPOPCNTD, "vpopcntd", CONST, popcountv2di2)

56463

+BU_P8V_AV_1 (VGBBD, "vgbbd", CONST, p8v_vgbbd)

56464

+

56465

+/* 2 argument altivec instructions added in ISA 2.07. */

56466

+BU_P8V_AV_2 (VADDCUQ, "vaddcuq", CONST, altivec_vaddcuq)

56467

+BU_P8V_AV_2 (VADDUDM, "vaddudm", CONST, addv2di3)

56468

+BU_P8V_AV_2 (VADDUQM, "vadduqm", CONST, altivec_vadduqm)

56469

+BU_P8V_AV_2 (VMINSD, "vminsd", CONST, sminv2di3)

56470

+BU_P8V_AV_2 (VMAXSD, "vmaxsd", CONST, smaxv2di3)

56471

+BU_P8V_AV_2 (VMINUD, "vminud", CONST, uminv2di3)

56472

+BU_P8V_AV_2 (VMAXUD, "vmaxud", CONST, umaxv2di3)

56473

+BU_P8V_AV_2 (VMRGEW, "vmrgew", CONST, p8_vmrgew)

56474

+BU_P8V_AV_2 (VMRGOW, "vmrgow", CONST, p8_vmrgow)

56475

+BU_P8V_AV_2 (VBPERMQ, "vbpermq", CONST, altivec_vbpermq)

56476

+BU_P8V_AV_2 (VPKUDUM, "vpkudum", CONST, altivec_vpkudum)

56477

+BU_P8V_AV_2 (VPKSDSS, "vpksdss", CONST, altivec_vpksdss)

56478

+BU_P8V_AV_2 (VPKUDUS, "vpkudus", CONST, altivec_vpkudus)

56479

+BU_P8V_AV_2 (VPKSDUS, "vpksdus", CONST, altivec_vpksdus)

56480

+BU_P8V_AV_2 (VRLD, "vrld", CONST, vrotlv2di3)

56481

+BU_P8V_AV_2 (VSLD, "vsld", CONST, vashlv2di3)

56482

+BU_P8V_AV_2 (VSRD, "vsrd", CONST, vlshrv2di3)

56483

+BU_P8V_AV_2 (VSRAD, "vsrad", CONST, vashrv2di3)

56484

+BU_P8V_AV_2 (VSUBCUQ, "vsubcuq", CONST, altivec_vsubcuq)

56485

+BU_P8V_AV_2 (VSUBUDM, "vsubudm", CONST, subv2di3)

56486

+BU_P8V_AV_2 (VSUBUQM, "vsubuqm", CONST, altivec_vsubuqm)

56487

+

56488

+BU_P8V_AV_2 (EQV_V16QI, "eqv_v16qi", CONST, eqvv16qi3)

56489

+BU_P8V_AV_2 (EQV_V8HI, "eqv_v8hi", CONST, eqvv8hi3)

56490

+BU_P8V_AV_2 (EQV_V4SI, "eqv_v4si", CONST, eqvv4si3)

56491

+BU_P8V_AV_2 (EQV_V2DI, "eqv_v2di", CONST, eqvv2di3)

56492

+BU_P8V_AV_2 (EQV_V1TI, "eqv_v1ti", CONST, eqvv1ti3)

56493

+BU_P8V_AV_2 (EQV_V4SF, "eqv_v4sf", CONST, eqvv4sf3)

56494

+BU_P8V_AV_2 (EQV_V2DF, "eqv_v2df", CONST, eqvv2df3)

56495

+

56496

+BU_P8V_AV_2 (NAND_V16QI, "nand_v16qi", CONST, nandv16qi3)

56497

+BU_P8V_AV_2 (NAND_V8HI, "nand_v8hi", CONST, nandv8hi3)

56498

+BU_P8V_AV_2 (NAND_V4SI, "nand_v4si", CONST, nandv4si3)

56499

+BU_P8V_AV_2 (NAND_V2DI, "nand_v2di", CONST, nandv2di3)

56500

+BU_P8V_AV_2 (NAND_V1TI, "nand_v1ti", CONST, nandv1ti3)

56501

+BU_P8V_AV_2 (NAND_V4SF, "nand_v4sf", CONST, nandv4sf3)

56502

+BU_P8V_AV_2 (NAND_V2DF, "nand_v2df", CONST, nandv2df3)

56503

+

56504

+BU_P8V_AV_2 (ORC_V16QI, "orc_v16qi", CONST, orcv16qi3)

56505

+BU_P8V_AV_2 (ORC_V8HI, "orc_v8hi", CONST, orcv8hi3)

56506

+BU_P8V_AV_2 (ORC_V4SI, "orc_v4si", CONST, orcv4si3)

56507

+BU_P8V_AV_2 (ORC_V2DI, "orc_v2di", CONST, orcv2di3)

56508

+BU_P8V_AV_2 (ORC_V1TI, "orc_v1ti", CONST, orcv1ti3)

56509

+BU_P8V_AV_2 (ORC_V4SF, "orc_v4sf", CONST, orcv4sf3)

56510

+BU_P8V_AV_2 (ORC_V2DF, "orc_v2df", CONST, orcv2df3)

56511

+

56512

+/* 3 argument altivec instructions added in ISA 2.07. */

56513

+BU_P8V_AV_3 (VADDEUQM, "vaddeuqm", CONST, altivec_vaddeuqm)

56514

+BU_P8V_AV_3 (VADDECUQ, "vaddecuq", CONST, altivec_vaddecuq)

56515

+BU_P8V_AV_3 (VSUBEUQM, "vsubeuqm", CONST, altivec_vsubeuqm)

56516

+BU_P8V_AV_3 (VSUBECUQ, "vsubecuq", CONST, altivec_vsubecuq)

56517

+

56518

+/* Vector comparison instructions added in ISA 2.07. */

56519

+BU_P8V_AV_2 (VCMPEQUD, "vcmpequd", CONST, vector_eqv2di)

56520

+BU_P8V_AV_2 (VCMPGTSD, "vcmpgtsd", CONST, vector_gtv2di)

56521

+BU_P8V_AV_2 (VCMPGTUD, "vcmpgtud", CONST, vector_gtuv2di)

56522

+

56523

+/* Vector comparison predicate instructions added in ISA 2.07. */

56524

+BU_P8V_AV_P (VCMPEQUD_P, "vcmpequd_p", CONST, vector_eq_v2di_p)

56525

+BU_P8V_AV_P (VCMPGTSD_P, "vcmpgtsd_p", CONST, vector_gt_v2di_p)

56526

+BU_P8V_AV_P (VCMPGTUD_P, "vcmpgtud_p", CONST, vector_gtu_v2di_p)

56527

+

56528

+/* ISA 2.07 vector overloaded 1 argument functions. */

56529

+BU_P8V_OVERLOAD_1 (VUPKHSW, "vupkhsw")

56530

+BU_P8V_OVERLOAD_1 (VUPKLSW, "vupklsw")

56531

+BU_P8V_OVERLOAD_1 (VCLZ, "vclz")

56532

+BU_P8V_OVERLOAD_1 (VCLZB, "vclzb")

56533

+BU_P8V_OVERLOAD_1 (VCLZH, "vclzh")

56534

+BU_P8V_OVERLOAD_1 (VCLZW, "vclzw")

56535

+BU_P8V_OVERLOAD_1 (VCLZD, "vclzd")

56536

+BU_P8V_OVERLOAD_1 (VPOPCNT, "vpopcnt")

56537

+BU_P8V_OVERLOAD_1 (VPOPCNTB, "vpopcntb")

56538

+BU_P8V_OVERLOAD_1 (VPOPCNTH, "vpopcnth")

56539

+BU_P8V_OVERLOAD_1 (VPOPCNTW, "vpopcntw")

56540

+BU_P8V_OVERLOAD_1 (VPOPCNTD, "vpopcntd")

56541

+BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd")

56542

+

56543

+/* ISA 2.07 vector overloaded 2 argument functions. */

56544

+BU_P8V_OVERLOAD_2 (EQV, "eqv")

56545

+BU_P8V_OVERLOAD_2 (NAND, "nand")

56546

+BU_P8V_OVERLOAD_2 (ORC, "orc")

56547

+BU_P8V_OVERLOAD_2 (VADDCUQ, "vaddcuq")

56548

+BU_P8V_OVERLOAD_2 (VADDUDM, "vaddudm")

56549

+BU_P8V_OVERLOAD_2 (VADDUQM, "vadduqm")

56550

+BU_P8V_OVERLOAD_2 (VBPERMQ, "vbpermq")

56551

+BU_P8V_OVERLOAD_2 (VMAXSD, "vmaxsd")

56552

+BU_P8V_OVERLOAD_2 (VMAXUD, "vmaxud")

56553

+BU_P8V_OVERLOAD_2 (VMINSD, "vminsd")

56554

+BU_P8V_OVERLOAD_2 (VMINUD, "vminud")

56555

+BU_P8V_OVERLOAD_2 (VMRGEW, "vmrgew")

56556

+BU_P8V_OVERLOAD_2 (VMRGOW, "vmrgow")

56557

+BU_P8V_OVERLOAD_2 (VPKSDSS, "vpksdss")

56558

+BU_P8V_OVERLOAD_2 (VPKSDUS, "vpksdus")

56559

+BU_P8V_OVERLOAD_2 (VPKUDUM, "vpkudum")

56560

+BU_P8V_OVERLOAD_2 (VPKUDUS, "vpkudus")

56561

+BU_P8V_OVERLOAD_2 (VRLD, "vrld")

56562

+BU_P8V_OVERLOAD_2 (VSLD, "vsld")

56563

+BU_P8V_OVERLOAD_2 (VSRAD, "vsrad")

56564

+BU_P8V_OVERLOAD_2 (VSRD, "vsrd")

56565

+BU_P8V_OVERLOAD_2 (VSUBCUQ, "vsubcuq")

56566

+BU_P8V_OVERLOAD_2 (VSUBUDM, "vsubudm")

56567

+BU_P8V_OVERLOAD_2 (VSUBUQM, "vsubuqm")

56568

+

56569

+/* ISA 2.07 vector overloaded 3 argument functions. */

56570

+BU_P8V_OVERLOAD_3 (VADDECUQ, "vaddecuq")

56571

+BU_P8V_OVERLOAD_3 (VADDEUQM, "vaddeuqm")

56572

+BU_P8V_OVERLOAD_3 (VSUBECUQ, "vsubecuq")

56573

+BU_P8V_OVERLOAD_3 (VSUBEUQM, "vsubeuqm")

56574

+

56575

+

56576

+/* 2 argument extended divide functions added in ISA 2.06. */

56577

+BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si)

56578

+BU_P7_MISC_2 (DIVWEO, "divweo", CONST, diveo_si)

56579

+BU_P7_MISC_2 (DIVWEU, "divweu", CONST, diveu_si)

56580

+BU_P7_MISC_2 (DIVWEUO, "divweuo", CONST, diveuo_si)

56581

+BU_P7_MISC_2 (DIVDE, "divde", CONST, dive_di)

56582

+BU_P7_MISC_2 (DIVDEO, "divdeo", CONST, diveo_di)

56583

+BU_P7_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di)

56584

+BU_P7_MISC_2 (DIVDEUO, "divdeuo", CONST, diveuo_di)

56585

+

56586

+/* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */

56587

+BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd)

56588

+BU_DFP_MISC_1 (DXEXQ, "dxexq", CONST, dfp_dxex_td)

56589

+

56590

+/* 2 argument DFP (decimal floating point) functions added in ISA 2.05. */

56591

+BU_DFP_MISC_2 (DDEDPD, "ddedpd", CONST, dfp_ddedpd_dd)

56592

+BU_DFP_MISC_2 (DDEDPDQ, "ddedpdq", CONST, dfp_ddedpd_td)

56593

+BU_DFP_MISC_2 (DENBCD, "denbcd", CONST, dfp_denbcd_dd)

56594

+BU_DFP_MISC_2 (DENBCDQ, "denbcdq", CONST, dfp_denbcd_td)

56595

+BU_DFP_MISC_2 (DIEX, "diex", CONST, dfp_diex_dd)

56596

+BU_DFP_MISC_2 (DIEXQ, "diexq", CONST, dfp_diex_td)

56597

+BU_DFP_MISC_2 (DSCLI, "dscli", CONST, dfp_dscli_dd)

56598

+BU_DFP_MISC_2 (DSCLIQ, "dscliq", CONST, dfp_dscli_td)

56599

+BU_DFP_MISC_2 (DSCRI, "dscri", CONST, dfp_dscri_dd)

56600

+BU_DFP_MISC_2 (DSCRIQ, "dscriq", CONST, dfp_dscri_td)

56601

+

56602

+/* 1 argument BCD functions added in ISA 2.06. */

56603

+BU_P7_MISC_1 (CDTBCD, "cdtbcd", CONST, cdtbcd)

56604

+BU_P7_MISC_1 (CBCDTD, "cbcdtd", CONST, cbcdtd)

56605

+

56606

+/* 2 argument BCD functions added in ISA 2.06. */

56607

+BU_P7_MISC_2 (ADDG6S, "addg6s", CONST, addg6s)

56608

+

56609

+/* 3 argument BCD functions added in ISA 2.07. */

56610

+BU_P8V_MISC_3 (BCDADD, "bcdadd", CONST, bcdadd)

56611

+BU_P8V_MISC_3 (BCDADD_LT, "bcdadd_lt", CONST, bcdadd_lt)

56612

+BU_P8V_MISC_3 (BCDADD_EQ, "bcdadd_eq", CONST, bcdadd_eq)

56613

+BU_P8V_MISC_3 (BCDADD_GT, "bcdadd_gt", CONST, bcdadd_gt)

56614

+BU_P8V_MISC_3 (BCDADD_OV, "bcdadd_ov", CONST, bcdadd_unordered)

56615

+BU_P8V_MISC_3 (BCDSUB, "bcdsub", CONST, bcdsub)

56616

+BU_P8V_MISC_3 (BCDSUB_LT, "bcdsub_lt", CONST, bcdsub_lt)

56617

+BU_P8V_MISC_3 (BCDSUB_EQ, "bcdsub_eq", CONST, bcdsub_eq)

56618

+BU_P8V_MISC_3 (BCDSUB_GT, "bcdsub_gt", CONST, bcdsub_gt)

56619

+BU_P8V_MISC_3 (BCDSUB_OV, "bcdsub_ov", CONST, bcdsub_unordered)

56620

+

56621

+/* 2 argument pack/unpack 128-bit floating point types. */

56622

+BU_DFP_MISC_2 (PACK_TD, "pack_dec128", CONST, packtd)

56623

+BU_DFP_MISC_2 (UNPACK_TD, "unpack_dec128", CONST, unpacktd)

56624

+

56625

+BU_MISC_2 (PACK_TF, "pack_longdouble", CONST, packtf)

56626

+BU_MISC_2 (UNPACK_TF, "unpack_longdouble", CONST, unpacktf)

56627

+BU_MISC_1 (UNPACK_TF_0, "longdouble_dw0", CONST, unpacktf_0)

56628

+BU_MISC_1 (UNPACK_TF_1, "longdouble_dw1", CONST, unpacktf_1)

56629

+

56630

+BU_P7_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti)

56631

+BU_P7_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti)

56632

+

56633

+

56634

+/* 1 argument crypto functions. */

56635

+BU_CRYPTO_1 (VSBOX, "vsbox", CONST, crypto_vsbox)

56636

+

56637

+/* 2 argument crypto functions. */

56638

+BU_CRYPTO_2 (VCIPHER, "vcipher", CONST, crypto_vcipher)

56639

+BU_CRYPTO_2 (VCIPHERLAST, "vcipherlast", CONST, crypto_vcipherlast)

56640

+BU_CRYPTO_2 (VNCIPHER, "vncipher", CONST, crypto_vncipher)

56641

+BU_CRYPTO_2 (VNCIPHERLAST, "vncipherlast", CONST, crypto_vncipherlast)

56642

+BU_CRYPTO_2 (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb)

56643

+BU_CRYPTO_2 (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh)

56644

+BU_CRYPTO_2 (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw)

56645

+BU_CRYPTO_2 (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd)

56646

+

56647

+/* 3 argument crypto functions. */

56648

+BU_CRYPTO_3 (VPERMXOR_V2DI, "vpermxor_v2di", CONST, crypto_vpermxor_v2di)

56649

+BU_CRYPTO_3 (VPERMXOR_V4SI, "vpermxor_v4si", CONST, crypto_vpermxor_v4si)

56650

+BU_CRYPTO_3 (VPERMXOR_V8HI, "vpermxor_v8hi", CONST, crypto_vpermxor_v8hi)

56651

+BU_CRYPTO_3 (VPERMXOR_V16QI, "vpermxor_v16qi", CONST, crypto_vpermxor_v16qi)

56652

+BU_CRYPTO_3 (VSHASIGMAW, "vshasigmaw", CONST, crypto_vshasigmaw)

56653

+BU_CRYPTO_3 (VSHASIGMAD, "vshasigmad", CONST, crypto_vshasigmad)

56654

+

56655

+/* 2 argument crypto overloaded functions. */

56656

+BU_CRYPTO_OVERLOAD_2 (VPMSUM, "vpmsum")

56657

+

56658

+/* 3 argument crypto overloaded functions. */

56659

+BU_CRYPTO_OVERLOAD_3 (VPERMXOR, "vpermxor")

56660

+BU_CRYPTO_OVERLOAD_3 (VSHASIGMA, "vshasigma")

56661

+

56662

+

56663

+/* HTM functions. */

56664

+BU_HTM_1 (TABORT, "tabort", MISC, tabort)

56665

+BU_HTM_3 (TABORTDC, "tabortdc", MISC, tabortdc)

56666

+BU_HTM_3 (TABORTDCI, "tabortdci", MISC, tabortdci)

56667

+BU_HTM_3 (TABORTWC, "tabortwc", MISC, tabortwc)

56668

+BU_HTM_3 (TABORTWCI, "tabortwci", MISC, tabortwci)

56669

+BU_HTM_1 (TBEGIN, "tbegin", MISC, tbegin)

56670

+BU_HTM_1 (TCHECK, "tcheck", MISC, tcheck)

56671

+BU_HTM_1 (TEND, "tend", MISC, tend)

56672

+BU_HTM_0 (TENDALL, "tendall", MISC, tend)

56673

+BU_HTM_0 (TRECHKPT, "trechkpt", MISC, trechkpt)

56674

+BU_HTM_1 (TRECLAIM, "treclaim", MISC, treclaim)

56675

+BU_HTM_0 (TRESUME, "tresume", MISC, tsr)

56676

+BU_HTM_0 (TSUSPEND, "tsuspend", MISC, tsr)

56677

+BU_HTM_1 (TSR, "tsr", MISC, tsr)

56678

+BU_HTM_0 (TTEST, "ttest", MISC, ttest)

56679

+

56680

+BU_HTM_SPR0 (GET_TFHAR, "get_tfhar", MISC, nothing)

56681

+BU_HTM_SPR1 (SET_TFHAR, "set_tfhar", MISC, nothing)

56682

+BU_HTM_SPR0 (GET_TFIAR, "get_tfiar", MISC, nothing)

56683

+BU_HTM_SPR1 (SET_TFIAR, "set_tfiar", MISC, nothing)

56684

+BU_HTM_SPR0 (GET_TEXASR, "get_texasr", MISC, nothing)

56685

+BU_HTM_SPR1 (SET_TEXASR, "set_texasr", MISC, nothing)

56686

+BU_HTM_SPR0 (GET_TEXASRU, "get_texasru", MISC, nothing)

56687

+BU_HTM_SPR1 (SET_TEXASRU, "set_texasru", MISC, nothing)

56688

+

56689

+

56690

/* 3 argument paired floating point builtins. */

56691

BU_PAIRED_3 (MSUB, "msub", FP, fmsv2sf4)

56692

BU_PAIRED_3 (MADD, "madd", FP, fmav2sf4)

56693

@@ -1430,10 +1956,10 @@

56694

RS6000_BTC_FP)

56695

56696

BU_SPECIAL_X (RS6000_BUILTIN_GET_TB, "__builtin_ppc_get_timebase",

56697

- RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

56698

+ RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

56699

56700

BU_SPECIAL_X (RS6000_BUILTIN_MFTB, "__builtin_ppc_mftb",

56701

- RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

56702

+ RS6000_BTM_ALWAYS, RS6000_BTC_MISC)

56703

56704

/* Darwin CfString builtin. */

56705

BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS,

56706

Index: gcc/config/rs6000/rs6000-c.c

56707

===================================================================

56708

--- a/src/gcc/config/rs6000/rs6000-c.c (.../tags/gcc_4_8_2_release)

56709

+++ b/src/gcc/config/rs6000/rs6000-c.c (.../branches/gcc-4_8-branch)

56710

@@ -90,6 +90,8 @@

56711

static GTY(()) tree __bool_keyword;

56712

static GTY(()) tree bool_keyword;

56713

static GTY(()) tree _Bool_keyword;

56714

+static GTY(()) tree __int128_type;

56715

+static GTY(()) tree __uint128_type;

56716

56717

/* Preserved across calls. */

56718

static tree expand_bool_pixel;

56719

@@ -122,9 +124,10 @@

56720

static void

56721

init_vector_keywords (void)

56722

{

56723

- /* Keywords without two leading underscores are context-sensitive,

56724

- and hence implemented as conditional macros, controlled by the

56725

- rs6000_macro_to_expand() function below. */

56726

+ /* Keywords without two leading underscores are context-sensitive, and hence

56727

+ implemented as conditional macros, controlled by the

56728

+ rs6000_macro_to_expand() function below. If we have ISA 2.07 64-bit

56729

+ support, record the __int128_t and __uint128_t types. */

56730

56731

__vector_keyword = get_identifier ("__vector");

56732

C_CPP_HASHNODE (__vector_keyword)->flags |= NODE_CONDITIONAL;

56733

@@ -146,6 +149,12 @@

56734

56735

_Bool_keyword = get_identifier ("_Bool");

56736

C_CPP_HASHNODE (_Bool_keyword)->flags |= NODE_CONDITIONAL;

56737

+

56738

+ if (TARGET_VADDUQM)

56739

+ {

56740

+ __int128_type = get_identifier ("__int128_t");

56741

+ __uint128_type = get_identifier ("__uint128_t");

56742

+ }

56743

}

56744

56745

/* Called to decide whether a conditional macro should be expanded.

56746

@@ -221,7 +230,8 @@

56747

|| rid_code == RID_SHORT || rid_code == RID_SIGNED

56748

|| rid_code == RID_INT || rid_code == RID_CHAR

56749

|| rid_code == RID_FLOAT

56750

- || (rid_code == RID_DOUBLE && TARGET_VSX))

56751

+ || (rid_code == RID_DOUBLE && TARGET_VSX)

56752

+ || (rid_code == RID_INT128 && TARGET_VADDUQM))

56753

{

56754

expand_this = C_CPP_HASHNODE (__vector_keyword);

56755

/* If the next keyword is bool or pixel, it

56756

@@ -248,6 +258,13 @@

56757

expand_bool_pixel = __bool_keyword;

56758

}

56759

}

56760

+

56761

+ /* Support vector __int128_t, but we don't need to worry about bool

56762

+ or pixel on this type. */

56763

+ else if (TARGET_VADDUQM

56764

+ && (ident == C_CPP_HASHNODE (__int128_type)

56765

+ || ident == C_CPP_HASHNODE (__uint128_type)))

56766

+ expand_this = C_CPP_HASHNODE (__vector_keyword);

56767

}

56768

}

56769

else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__pixel_keyword))

56770

@@ -315,6 +332,8 @@

56771

rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6X");

56772

if ((flags & OPTION_MASK_POPCNTD) != 0)

56773

rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");

56774

+ if ((flags & OPTION_MASK_DIRECT_MOVE) != 0)

56775

+ rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");

56776

if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)

56777

rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");

56778

if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)

56779

@@ -331,6 +350,16 @@

56780

}

56781

if ((flags & OPTION_MASK_VSX) != 0)

56782

rs6000_define_or_undefine_macro (define_p, "__VSX__");

56783

+ if ((flags & OPTION_MASK_HTM) != 0)

56784

+ rs6000_define_or_undefine_macro (define_p, "__HTM__");

56785

+ if ((flags & OPTION_MASK_P8_VECTOR) != 0)

56786

+ rs6000_define_or_undefine_macro (define_p, "__POWER8_VECTOR__");

56787

+ if ((flags & OPTION_MASK_QUAD_MEMORY) != 0)

56788

+ rs6000_define_or_undefine_macro (define_p, "__QUAD_MEMORY__");

56789

+ if ((flags & OPTION_MASK_QUAD_MEMORY_ATOMIC) != 0)

56790

+ rs6000_define_or_undefine_macro (define_p, "__QUAD_MEMORY_ATOMIC__");

56791

+ if ((flags & OPTION_MASK_CRYPTO) != 0)

56792

+ rs6000_define_or_undefine_macro (define_p, "__CRYPTO__");

56793

56794

/* options from the builtin masks. */

56795

if ((bu_mask & RS6000_BTM_SPE) != 0)

56796

@@ -453,7 +482,11 @@

56797

case ABI_AIX:

56798

builtin_define ("_CALL_AIXDESC");

56799

builtin_define ("_CALL_AIX");

56800

+ builtin_define ("_CALL_ELF=1");

56801

break;

56802

+ case ABI_ELFv2:

56803

+ builtin_define ("_CALL_ELF=2");

56804

+ break;

56805

case ABI_DARWIN:

56806

builtin_define ("_CALL_DARWIN");

56807

break;

56808

@@ -465,6 +498,13 @@

56809

if (TARGET_SOFT_FLOAT || !TARGET_FPRS)

56810

builtin_define ("__NO_FPRS__");

56811

56812

+ /* Whether aggregates passed by value are aligned to a 16 byte boundary

56813

+ if their alignment is 16 bytes or larger. */

56814

+ if ((TARGET_MACHO && rs6000_darwin64_abi)

56815

+ || DEFAULT_ABI == ABI_ELFv2

56816

+ || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm))

56817

+ builtin_define ("__STRUCT_PARM_ALIGN__=16");

56818

+

56819

/* Generate defines for Xilinx FPU. */

56820

if (rs6000_xilinx_fpu)

56821

{

56822

@@ -505,6 +545,8 @@

56823

RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

56824

{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI,

56825

RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

56826

+ { ALTIVEC_BUILTIN_VEC_ABS, P8V_BUILTIN_ABS_V2DI,

56827

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

56828

{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF,

56829

RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },

56830

{ ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP,

56831

@@ -577,6 +619,10 @@

56832

RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

56833

{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,

56834

RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

56835

+ { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW,

56836

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

56837

+ { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW,

56838

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

56839

{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,

56840

RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },

56841

{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,

56842

@@ -583,6 +629,10 @@

56843

RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

56844

{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,

56845

RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

56846

+ { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW,

56847

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

56848

+ { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW,

56849

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

56850

{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,

56851

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },

56852

{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,

56853

@@ -601,6 +651,10 @@

56854

RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },

56855

{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,

56856

RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },

56857

+ { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW,

56858

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

56859

+ { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW,

56860

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

56861

{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,

56862

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },

56863

{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,

56864

@@ -651,10 +705,27 @@

56865

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },

56866

{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,

56867

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

56868

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

56869

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

56870

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

56871

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

56872

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

56873

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

56874

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

56875

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

56876

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

56877

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

56878

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,

56879

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

56880

{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP,

56881

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

56882

{ ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP,

56883

RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

56884

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM,

56885

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

56886

+ { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM,

56887

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

56888

+ RS6000_BTI_unsigned_V1TI, 0 },

56889

{ ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP,

56890

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

56891

{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,

56892

@@ -937,6 +1008,10 @@

56893

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

56894

{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW,

56895

RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

56896

+ { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD,

56897

+ RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

56898

+ { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD,

56899

+ RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

56900

{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP,

56901

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

56902

{ ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP,

56903

@@ -975,6 +1050,10 @@

56904

RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

56905

{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW,

56906

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

56907

+ { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTUD,

56908

+ RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

56909

+ { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTSD,

56910

+ RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

56911

{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP,

56912

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

56913

{ ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP,

56914

@@ -1021,6 +1100,10 @@

56915

RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

56916

{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW,

56917

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

56918

+ { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTUD,

56919

+ RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

56920

+ { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTSD,

56921

+ RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

56922

{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP,

56923

RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

56924

{ ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP,

56925

@@ -1045,54 +1128,54 @@

56926

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

56927

{ VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP,

56928

RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

56929

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56930

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF,

56931

RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },

56932

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56933

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,

56934

RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },

56935

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56936

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,

56937

RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

56938

~RS6000_BTI_unsigned_V2DI, 0 },

56939

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56940

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,

56941

RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },

56942

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56943

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF,

56944

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },

56945

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56946

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF,

56947

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },

56948

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56949

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

56950

RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },

56951

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56952

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

56953

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },

56954

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56955

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

56956

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },

56957

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56958

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

56959

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },

56960

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56961

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

56962

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },

56963

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56964

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

56965

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },

56966

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56967

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,

56968

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },

56969

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56970

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

56971

RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },

56972

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56973

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

56974

RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },

56975

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56976

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

56977

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },

56978

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56979

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

56980

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },

56981

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56982

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

56983

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },

56984

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56985

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,

56986

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },

56987

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56988

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

56989

RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },

56990

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56991

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

56992

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },

56993

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56994

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

56995

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

56996

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

56997

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

56998

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },

56999

- { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,

57000

+ { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,

57001

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

57002

{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX,

57003

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

57004

@@ -1130,55 +1213,55 @@

57005

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

57006

{ ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX,

57007

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

57008

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57009

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF,

57010

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },

57011

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57012

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF,

57013

RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },

57014

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57015

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

57016

RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },

57017

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57018

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

57019

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },

57020

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57021

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

57022

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },

57023

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57024

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

57025

RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },

57026

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57027

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

57028

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },

57029

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57030

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

57031

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },

57032

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57033

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,

57034

RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },

57035

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57036

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

57037

RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },

57038

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57039

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

57040

RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },

57041

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57042

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

57043

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },

57044

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57045

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

57046

RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },

57047

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57048

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

57049

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },

57050

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57051

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,

57052

RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },

57053

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57054

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

57055

RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },

57056

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57057

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

57058

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },

57059

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57060

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

57061

RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },

57062

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57063

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

57064

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,

57065

~RS6000_BTI_unsigned_V16QI, 0 },

57066

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57067

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,

57068

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

57069

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57070

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF,

57071

RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },

57072

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57073

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,

57074

RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },

57075

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57076

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,

57077

RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

57078

~RS6000_BTI_unsigned_V2DI, 0 },

57079

- { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,

57080

+ { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,

57081

RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },

57082

{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,

57083

RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },

57084

@@ -1418,6 +1501,18 @@

57085

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

57086

{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,

57087

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57088

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,

57089

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57090

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,

57091

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

57092

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,

57093

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57094

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,

57095

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57096

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,

57097

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57098

+ { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,

57099

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57100

{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP,

57101

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

57102

{ ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP,

57103

@@ -1604,6 +1699,18 @@

57104

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

57105

{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,

57106

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57107

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,

57108

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57109

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,

57110

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

57111

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,

57112

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57113

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,

57114

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57115

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,

57116

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57117

+ { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,

57118

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57119

{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP,

57120

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

57121

{ ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP,

57122

@@ -1786,6 +1893,12 @@

57123

RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57124

{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,

57125

RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },

57126

+ { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,

57127

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57128

+ { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,

57129

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57130

+ { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,

57131

+ RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },

57132

{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,

57133

RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57134

{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,

57135

@@ -1812,6 +1925,10 @@

57136

RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57137

{ ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,

57138

RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57139

+ { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS,

57140

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57141

+ { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS,

57142

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57143

{ ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS,

57144

RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

57145

{ ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS,

57146

@@ -1824,6 +1941,8 @@

57147

RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57148

{ ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS,

57149

RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57150

+ { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS,

57151

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57152

{ ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS,

57153

RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57154

{ ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS,

57155

@@ -1844,6 +1963,10 @@

57156

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57157

{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW,

57158

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57159

+ { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD,

57160

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57161

+ { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD,

57162

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57163

{ ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,

57164

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57165

{ ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,

57166

@@ -1868,6 +1991,10 @@

57167

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57168

{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW,

57169

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57170

+ { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD,

57171

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57172

+ { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD,

57173

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57174

{ ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP,

57175

RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },

57176

{ ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP,

57177

@@ -2032,6 +2159,10 @@

57178

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57179

{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW,

57180

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57181

+ { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD,

57182

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57183

+ { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD,

57184

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57185

{ ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,

57186

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57187

{ ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,

57188

@@ -2056,6 +2187,10 @@

57189

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57190

{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW,

57191

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57192

+ { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,

57193

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57194

+ { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRD,

57195

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57196

{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,

57197

RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57198

{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,

57199

@@ -2196,10 +2331,27 @@

57200

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },

57201

{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,

57202

RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },

57203

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

57204

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57205

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

57206

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57207

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

57208

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57209

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

57210

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57211

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

57212

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

57213

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,

57214

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57215

{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP,

57216

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

57217

{ ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP,

57218

RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

57219

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM,

57220

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

57221

+ { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM,

57222

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57223

+ RS6000_BTI_unsigned_V1TI, 0 },

57224

{ ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP,

57225

RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

57226

{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,

57227

@@ -2730,63 +2882,63 @@

57228

RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_NOT_OPAQUE },

57229

{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,

57230

RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_NOT_OPAQUE },

57231

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57232

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF,

57233

RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },

57234

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57235

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,

57236

RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },

57237

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57238

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,

57239

RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

57240

~RS6000_BTI_unsigned_V2DI },

57241

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57242

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,

57243

RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,

57244

~RS6000_BTI_bool_V2DI },

57245

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57246

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF,

57247

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },

57248

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57249

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF,

57250

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },

57251

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57252

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

57253

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },

57254

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57255

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

57256

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

57257

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57258

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

57259

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },

57260

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57261

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

57262

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

57263

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57264

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

57265

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },

57266

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57267

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

57268

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

57269

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57270

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,

57271

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

57272

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57273

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57274

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },

57275

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57276

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57277

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

57278

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57279

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57280

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },

57281

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57282

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57283

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

57284

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57285

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57286

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },

57287

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57288

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57289

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

57290

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57291

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57292

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

57293

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57294

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

57295

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },

57296

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57297

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

57298

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

57299

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57300

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

57301

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },

57302

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57303

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

57304

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

57305

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57306

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

57307

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },

57308

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57309

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

57310

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

57311

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57312

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,

57313

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

57314

- { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,

57315

+ { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,

57316

RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },

57317

{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,

57318

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

57319

@@ -2858,64 +3010,64 @@

57320

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },

57321

{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,

57322

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },

57323

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57324

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF,

57325

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },

57326

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57327

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF,

57328

RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },

57329

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57330

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

57331

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },

57332

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57333

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

57334

RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

57335

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57336

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

57337

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },

57338

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57339

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

57340

RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

57341

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57342

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

57343

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },

57344

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57345

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

57346

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },

57347

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57348

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,

57349

RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },

57350

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57351

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57352

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },

57353

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57354

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57355

RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

57356

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57357

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57358

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },

57359

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57360

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57361

RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

57362

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57363

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57364

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },

57365

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57366

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57367

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },

57368

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57369

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57370

RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },

57371

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57372

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

57373

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },

57374

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57375

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

57376

RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

57377

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57378

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

57379

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },

57380

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57381

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

57382

RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

57383

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57384

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

57385

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },

57386

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57387

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

57388

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },

57389

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57390

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,

57391

RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },

57392

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57393

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,

57394

RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },

57395

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57396

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF,

57397

RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },

57398

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57399

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF,

57400

RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },

57401

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57402

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,

57403

RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },

57404

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57405

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,

57406

RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,

57407

~RS6000_BTI_unsigned_V2DI },

57408

- { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,

57409

+ { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,

57410

RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,

57411

~RS6000_BTI_bool_V2DI },

57412

{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,

57413

@@ -3327,6 +3479,20 @@

57414

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },

57415

{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,

57416

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },

57417

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

57418

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },

57419

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

57420

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },

57421

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

57422

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },

57423

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

57424

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },

57425

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

57426

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },

57427

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

57428

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },

57429

+ { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,

57430

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI },

57431

{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P,

57432

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },

57433

{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P,

57434

@@ -3372,11 +3538,509 @@

57435

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },

57436

{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,

57437

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },

57438

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,

57439

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },

57440

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,

57441

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },

57442

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,

57443

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },

57444

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,

57445

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },

57446

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,

57447

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },

57448

+ { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,

57449

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },

57450

{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P,

57451

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },

57452

{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P,

57453

RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },

57454

57455

+ /* Power8 vector overloaded functions. */

57456

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

57457

+ RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

57458

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

57459

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

57460

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

57461

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

57462

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

57463

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,

57464

+ RS6000_BTI_unsigned_V16QI, 0 },

57465

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

57466

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57467

+ RS6000_BTI_bool_V16QI, 0 },

57468

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,

57469

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57470

+ RS6000_BTI_unsigned_V16QI, 0 },

57471

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

57472

+ RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

57473

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

57474

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

57475

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

57476

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

57477

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

57478

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,

57479

+ RS6000_BTI_unsigned_V8HI, 0 },

57480

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

57481

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57482

+ RS6000_BTI_bool_V8HI, 0 },

57483

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,

57484

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57485

+ RS6000_BTI_unsigned_V8HI, 0 },

57486

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

57487

+ RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

57488

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

57489

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

57490

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

57491

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57492

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

57493

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,

57494

+ RS6000_BTI_unsigned_V4SI, 0 },

57495

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

57496

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57497

+ RS6000_BTI_bool_V4SI, 0 },

57498

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,

57499

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57500

+ RS6000_BTI_unsigned_V4SI, 0 },

57501

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

57502

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57503

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

57504

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57505

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

57506

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57507

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

57508

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

57509

+ RS6000_BTI_unsigned_V2DI, 0 },

57510

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

57511

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57512

+ RS6000_BTI_bool_V2DI, 0 },

57513

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,

57514

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57515

+ RS6000_BTI_unsigned_V2DI, 0 },

57516

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SF,

57517

+ RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

57518

+ { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DF,

57519

+ RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

57520

+

57521

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

57522

+ RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

57523

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

57524

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

57525

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

57526

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

57527

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

57528

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,

57529

+ RS6000_BTI_unsigned_V16QI, 0 },

57530

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

57531

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57532

+ RS6000_BTI_bool_V16QI, 0 },

57533

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,

57534

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57535

+ RS6000_BTI_unsigned_V16QI, 0 },

57536

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

57537

+ RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

57538

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

57539

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

57540

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

57541

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

57542

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

57543

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,

57544

+ RS6000_BTI_unsigned_V8HI, 0 },

57545

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

57546

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57547

+ RS6000_BTI_bool_V8HI, 0 },

57548

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,

57549

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57550

+ RS6000_BTI_unsigned_V8HI, 0 },

57551

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

57552

+ RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

57553

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

57554

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

57555

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

57556

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57557

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

57558

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,

57559

+ RS6000_BTI_unsigned_V4SI, 0 },

57560

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

57561

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57562

+ RS6000_BTI_bool_V4SI, 0 },

57563

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,

57564

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57565

+ RS6000_BTI_unsigned_V4SI, 0 },

57566

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

57567

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57568

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

57569

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57570

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

57571

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57572

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

57573

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

57574

+ RS6000_BTI_unsigned_V2DI, 0 },

57575

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

57576

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57577

+ RS6000_BTI_bool_V2DI, 0 },

57578

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,

57579

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57580

+ RS6000_BTI_unsigned_V2DI, 0 },

57581

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SF,

57582

+ RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

57583

+ { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DF,

57584

+ RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

57585

+

57586

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

57587

+ RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },

57588

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

57589

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },

57590

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

57591

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

57592

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

57593

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,

57594

+ RS6000_BTI_unsigned_V16QI, 0 },

57595

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

57596

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57597

+ RS6000_BTI_bool_V16QI, 0 },

57598

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,

57599

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57600

+ RS6000_BTI_unsigned_V16QI, 0 },

57601

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

57602

+ RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },

57603

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

57604

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },

57605

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

57606

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },

57607

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

57608

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,

57609

+ RS6000_BTI_unsigned_V8HI, 0 },

57610

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

57611

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57612

+ RS6000_BTI_bool_V8HI, 0 },

57613

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,

57614

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57615

+ RS6000_BTI_unsigned_V8HI, 0 },

57616

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

57617

+ RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },

57618

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

57619

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },

57620

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

57621

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57622

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

57623

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,

57624

+ RS6000_BTI_unsigned_V4SI, 0 },

57625

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

57626

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57627

+ RS6000_BTI_bool_V4SI, 0 },

57628

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,

57629

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57630

+ RS6000_BTI_unsigned_V4SI, 0 },

57631

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

57632

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57633

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

57634

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57635

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

57636

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57637

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

57638

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

57639

+ RS6000_BTI_unsigned_V2DI, 0 },

57640

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

57641

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57642

+ RS6000_BTI_bool_V2DI, 0 },

57643

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,

57644

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57645

+ RS6000_BTI_unsigned_V2DI, 0 },

57646

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SF,

57647

+ RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },

57648

+ { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DF,

57649

+ RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },

57650

+

57651

+ { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ,

57652

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

57653

+ { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ,

57654

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57655

+ RS6000_BTI_unsigned_V1TI, 0 },

57656

+

57657

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

57658

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57659

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

57660

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57661

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

57662

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57663

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

57664

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57665

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

57666

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

57667

+ { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,

57668

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57669

+

57670

+ { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM,

57671

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

57672

+ { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM,

57673

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57674

+ RS6000_BTI_unsigned_V1TI, 0 },

57675

+

57676

+ { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,

57677

+ RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },

57678

+ { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,

57679

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI,

57680

+ RS6000_BTI_unsigned_V16QI, 0 },

57681

+

57682

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,

57683

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

57684

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,

57685

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

57686

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH,

57687

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

57688

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH,

57689

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

57690

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW,

57691

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

57692

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW,

57693

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

57694

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD,

57695

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

57696

+ { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD,

57697

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

57698

+

57699

+ { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB,

57700

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

57701

+ { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB,

57702

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

57703

+

57704

+ { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH,

57705

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

57706

+ { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH,

57707

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

57708

+

57709

+ { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW,

57710

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

57711

+ { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW,

57712

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

57713

+

57714

+ { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,

57715

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

57716

+ { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,

57717

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

57718

+

57719

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

57720

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

57721

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

57722

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

57723

+

57724

+ { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ,

57725

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

57726

+ { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ,

57727

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57728

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

57729

+

57730

+ { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM,

57731

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

57732

+ { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM,

57733

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57734

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

57735

+

57736

+ { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ,

57737

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

57738

+ { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ,

57739

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57740

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

57741

+

57742

+ { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM,

57743

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },

57744

+ { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM,

57745

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57746

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },

57747

+

57748

+ { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,

57749

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57750

+ { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,

57751

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57752

+ { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,

57753

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57754

+

57755

+ { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,

57756

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57757

+ { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,

57758

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57759

+ { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,

57760

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57761

+

57762

+ { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,

57763

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

57764

+ RS6000_BTI_unsigned_V2DI, 0 },

57765

+ { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,

57766

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57767

+ RS6000_BTI_bool_V2DI, 0 },

57768

+ { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,

57769

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57770

+ RS6000_BTI_unsigned_V2DI, 0 },

57771

+

57772

+ { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,

57773

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,

57774

+ RS6000_BTI_unsigned_V2DI, 0 },

57775

+ { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,

57776

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57777

+ RS6000_BTI_bool_V2DI, 0 },

57778

+ { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,

57779

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57780

+ RS6000_BTI_unsigned_V2DI, 0 },

57781

+

57782

+ { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW,

57783

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57784

+ { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW,

57785

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57786

+ RS6000_BTI_unsigned_V4SI, 0 },

57787

+

57788

+ { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW,

57789

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },

57790

+ { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW,

57791

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57792

+ RS6000_BTI_unsigned_V4SI, 0 },

57793

+

57794

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,

57795

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

57796

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,

57797

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

57798

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH,

57799

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

57800

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH,

57801

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

57802

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW,

57803

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

57804

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW,

57805

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

57806

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD,

57807

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

57808

+ { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD,

57809

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

57810

+

57811

+ { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB,

57812

+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },

57813

+ { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB,

57814

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },

57815

+

57816

+ { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,

57817

+ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },

57818

+ { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,

57819

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },

57820

+

57821

+ { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW,

57822

+ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },

57823

+ { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW,

57824

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },

57825

+

57826

+ { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD,

57827

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },

57828

+ { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD,

57829

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },

57830

+

57831

+ { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,

57832

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57833

+ { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,

57834

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57835

+ { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,

57836

+ RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },

57837

+

57838

+ { P8V_BUILTIN_VEC_VPKSDSS, P8V_BUILTIN_VPKSDSS,

57839

+ RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57840

+

57841

+ { P8V_BUILTIN_VEC_VPKUDUS, P8V_BUILTIN_VPKUDUS,

57842

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57843

+

57844

+ { P8V_BUILTIN_VEC_VPKSDUS, P8V_BUILTIN_VPKSDUS,

57845

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57846

+

57847

+ { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD,

57848

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57849

+ { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD,

57850

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57851

+

57852

+ { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD,

57853

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57854

+ { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD,

57855

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57856

+

57857

+ { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD,

57858

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57859

+ { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD,

57860

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57861

+

57862

+ { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,

57863

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57864

+ { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRD,

57865

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57866

+

57867

+ { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,

57868

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

57869

+ { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,

57870

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57871

+ RS6000_BTI_unsigned_V1TI, 0 },

57872

+

57873

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

57874

+ RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },

57875

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

57876

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },

57877

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

57878

+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },

57879

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

57880

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57881

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

57882

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },

57883

+ { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,

57884

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },

57885

+

57886

+ { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM,

57887

+ RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },

57888

+ { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM,

57889

+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,

57890

+ RS6000_BTI_unsigned_V1TI, 0 },

57891

+

57892

+ { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW,

57893

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

57894

+ { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW,

57895

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

57896

+

57897

+ { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,

57898

+ RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },

57899

+ { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,

57900

+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },

57901

+

57902

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

57903

+ RS6000_BTI_V16QI, 0, 0, 0 },

57904

+ { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,

57905

+ RS6000_BTI_unsigned_V16QI, 0, 0, 0 },

57906

+

57907

+ /* Crypto builtins. */

57908

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI,

57909

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57910

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },

57911

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI,

57912

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57913

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },

57914

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI,

57915

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57916

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },

57917

+ { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI,

57918

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57919

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },

57920

+

57921

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB,

57922

+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,

57923

+ RS6000_BTI_unsigned_V16QI, 0 },

57924

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH,

57925

+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,

57926

+ RS6000_BTI_unsigned_V8HI, 0 },

57927

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW,

57928

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57929

+ RS6000_BTI_unsigned_V4SI, 0 },

57930

+ { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD,

57931

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57932

+ RS6000_BTI_unsigned_V2DI, 0 },

57933

+

57934

+ { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW,

57935

+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,

57936

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI },

57937

+ { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD,

57938

+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,

57939

+ RS6000_BTI_INTSI, RS6000_BTI_INTSI },

57940

+

57941

{ (enum rs6000_builtins) 0, (enum rs6000_builtins) 0, 0, 0, 0, 0 }

57942

};

57943

57944

@@ -3560,6 +4224,10 @@

57945

unsigned_p = TYPE_UNSIGNED (type);

57946

switch (TYPE_MODE (type))

57947

{

57948

+ case TImode:

57949

+ type = (unsigned_p ? unsigned_V1TI_type_node : V1TI_type_node);

57950

+ size = 1;

57951

+ break;

57952

case DImode:

57953

type = (unsigned_p ? unsigned_V2DI_type_node : V2DI_type_node);

57954

size = 2;

57955

@@ -3591,7 +4259,7 @@

57956

return build_constructor (type, vec);

57957

}

57958

57959

- /* For now use pointer tricks to do the extaction, unless we are on VSX

57960

+ /* For now use pointer tricks to do the extraction, unless we are on VSX

57961

extracting a double from a constant offset. */

57962

if (fcode == ALTIVEC_BUILTIN_VEC_EXTRACT)

57963

{

57964

@@ -3619,6 +4287,17 @@

57965

if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2)))

57966

goto bad;

57967

57968

+ /* If we are targeting little-endian, but -maltivec=be has been

57969

+ specified to override the element order, adjust the element

57970

+ number accordingly. */

57971

+ if (!BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 2)

57972

+ {

57973

+ unsigned int last_elem = TYPE_VECTOR_SUBPARTS (arg1_type) - 1;

57974

+ arg2 = fold_build2_loc (loc, MINUS_EXPR, TREE_TYPE (arg2),

57975

+ build_int_cstu (TREE_TYPE (arg2), last_elem),

57976

+ arg2);

57977

+ }

57978

+

57979

/* If we can use the VSX xxpermdi instruction, use that for extract. */

57980

mode = TYPE_MODE (arg1_type);

57981

if ((mode == V2DFmode || mode == V2DImode) && VECTOR_MEM_VSX_P (mode)

57982

@@ -3636,6 +4315,14 @@

57983

if (call)

57984

return build_call_expr (call, 2, arg1, arg2);

57985

}

57986

+ else if (mode == V1TImode && VECTOR_MEM_VSX_P (mode)

57987

+ && TREE_CODE (arg2) == INTEGER_CST

57988

+ && TREE_INT_CST_HIGH (arg2) == 0

57989

+ && TREE_INT_CST_LOW (arg2) == 0)

57990

+ {

57991

+ tree call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V1TI];

57992

+ return build_call_expr (call, 2, arg1, arg2);

57993

+ }

57994

57995

/* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */

57996

arg1_inner_type = TREE_TYPE (arg1_type);

57997

@@ -3666,7 +4353,7 @@

57998

return stmt;

57999

}

58000

58001

- /* For now use pointer tricks to do the insertation, unless we are on VSX

58002

+ /* For now use pointer tricks to do the insertion, unless we are on VSX

58003

inserting a double to a constant offset.. */

58004

if (fcode == ALTIVEC_BUILTIN_VEC_INSERT)

58005

{

58006

@@ -3696,6 +4383,17 @@

58007

if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2)))

58008

goto bad;

58009

58010

+ /* If we are targeting little-endian, but -maltivec=be has been

58011

+ specified to override the element order, adjust the element

58012

+ number accordingly. */

58013

+ if (!BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 2)

58014

+ {

58015

+ unsigned int last_elem = TYPE_VECTOR_SUBPARTS (arg1_type) - 1;

58016

+ arg2 = fold_build2_loc (loc, MINUS_EXPR, TREE_TYPE (arg2),

58017

+ build_int_cstu (TREE_TYPE (arg2), last_elem),

58018

+ arg2);

58019

+ }

58020

+

58021

/* If we can use the VSX xxpermdi instruction, use that for insert. */

58022

mode = TYPE_MODE (arg1_type);

58023

if ((mode == V2DFmode || mode == V2DImode) && VECTOR_UNIT_VSX_P (mode)

58024

@@ -3715,7 +4413,18 @@

58025

if (call)

58026

return build_call_expr (call, 3, arg1, arg0, arg2);

58027

}

58028

+ else if (mode == V1TImode && VECTOR_UNIT_VSX_P (mode)

58029

+ && TREE_CODE (arg2) == INTEGER_CST

58030

+ && TREE_INT_CST_HIGH (arg2) == 0

58031

+ && TREE_INT_CST_LOW (arg2) == 0)

58032

+ {

58033

+ tree call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V1TI];

58034

58035

+ /* Note, __builtin_vec_insert_<xxx> has vector and scalar types

58036

+ reversed. */

58037

+ return build_call_expr (call, 3, arg1, arg0, arg2);

58038

+ }

58039

+

58040

/* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2) = arg0. */

58041

arg1_inner_type = TREE_TYPE (arg1_type);

58042

arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2,

58043

@@ -3824,7 +4533,8 @@

58044

&& (desc->op2 == RS6000_BTI_NOT_OPAQUE

58045

|| rs6000_builtin_type_compatible (types[1], desc->op2))

58046

&& (desc->op3 == RS6000_BTI_NOT_OPAQUE

58047

- || rs6000_builtin_type_compatible (types[2], desc->op3)))

58048

+ || rs6000_builtin_type_compatible (types[2], desc->op3))

58049

+ && rs6000_builtin_decls[desc->overloaded_code] != NULL_TREE)

58050

return altivec_build_resolved_builtin (args, n, desc);

58051

58052

bad:

58053

Index: gcc/config/rs6000/rs6000.opt

58054

===================================================================

58055

--- a/src/gcc/config/rs6000/rs6000.opt (.../tags/gcc_4_8_2_release)

58056

+++ b/src/gcc/config/rs6000/rs6000.opt (.../branches/gcc-4_8-branch)

58057

@@ -1,6 +1,6 @@

58058

; Options for the rs6000 port of the compiler

58059

;

58060

58061

58062

; Contributed by Aldy Hernandez <aldy@quesejoda.com>.

58063

;

58064

; This file is part of GCC.

58065

@@ -137,6 +137,14 @@

58066

Target Report Mask(ALTIVEC) Var(rs6000_isa_flags)

58067

Use AltiVec instructions

58068

58069

+maltivec=le

58070

+Target Report RejectNegative Var(rs6000_altivec_element_order, 1) Save

58071

+Generate Altivec instructions using little-endian element order

58072

+

58073

+maltivec=be

58074

+Target Report RejectNegative Var(rs6000_altivec_element_order, 2)

58075

+Generate Altivec instructions using big-endian element order

58076

+

58077

mhard-dfp

58078

Target Report Mask(DFP) Var(rs6000_isa_flags)

58079

Use decimal floating point instructions

58080

@@ -181,13 +189,16 @@

58081

Target Report Mask(VSX) Var(rs6000_isa_flags)

58082

Use vector/scalar (VSX) instructions

58083

58084

+mvsx-scalar-float

58085

+Target Undocumented Report Var(TARGET_VSX_SCALAR_FLOAT) Init(1)

58086

+; If -mpower8-vector, use VSX arithmetic instructions for SFmode (on by default)

58087

+

58088

mvsx-scalar-double

58089

-Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(-1)

58090

-; If -mvsx, use VSX arithmetic instructions for scalar double (on by default)

58091

+Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(1)

58092

+; If -mvsx, use VSX arithmetic instructions for DFmode (on by default)

58093

58094

mvsx-scalar-memory

58095

-Target Undocumented Report Var(TARGET_VSX_SCALAR_MEMORY)

58096

-; If -mvsx, use VSX scalar memory reference instructions for scalar double (off by default)

58097

+Target Undocumented Report Alias(mupper-regs-df)

58098

58099

mvsx-align-128

58100

Target Undocumented Report Var(TARGET_VSX_ALIGN_128)

58101

@@ -363,6 +374,14 @@

58102

Target RejectNegative Var(rs6000_spe_abi, 0)

58103

Do not use the SPE ABI extensions

58104

58105

+mabi=elfv1

58106

+Target RejectNegative Var(rs6000_elf_abi, 1) Save

58107

+Use the ELFv1 ABI

58108

+

58109

+mabi=elfv2

58110

+Target RejectNegative Var(rs6000_elf_abi, 2)

58111

+Use the ELFv2 ABI

58112

+

58113

; These are here for testing during development only, do not document

58114

; in the manual please.

58115

58116

@@ -443,6 +462,10 @@

58117

Target RejectNegative Joined UInteger Var(rs6000_long_double_type_size) Save

58118

-mlong-double-<n> Specify size of long double (64 or 128 bits)

58119

58120

+mlra

58121

+Target Report Var(rs6000_lra_flag) Init(0) Save

58122

+Use LRA instead of reload

58123

+

58124

msched-costly-dep=

58125

Target RejectNegative Joined Var(rs6000_sched_costly_dep_str)

58126

Determine which dependences between insns are considered costly

58127

@@ -514,3 +537,51 @@

58128

msave-toc-indirect

58129

Target Report Var(TARGET_SAVE_TOC_INDIRECT) Save

58130

Control whether we save the TOC in the prologue for indirect calls or generate the save inline

58131

+

58132

+mvsx-timode

58133

+Target Undocumented Mask(VSX_TIMODE) Var(rs6000_isa_flags)

58134

+Allow 128-bit integers in VSX registers

58135

+

58136

+mpower8-fusion

58137

+Target Report Mask(P8_FUSION) Var(rs6000_isa_flags)

58138

+Fuse certain integer operations together for better performance on power8

58139

+

58140

+mpower8-fusion-sign

58141

+Target Undocumented Mask(P8_FUSION_SIGN) Var(rs6000_isa_flags)

58142

+Allow sign extension in fusion operations

58143

+

58144

+mpower8-vector

58145

+Target Report Mask(P8_VECTOR) Var(rs6000_isa_flags)

58146

+Use/do not use vector and scalar instructions added in ISA 2.07.

58147

+

58148

+mcrypto

58149

+Target Report Mask(CRYPTO) Var(rs6000_isa_flags)

58150

+Use ISA 2.07 crypto instructions

58151

+

58152

+mdirect-move

58153

+Target Report Mask(DIRECT_MOVE) Var(rs6000_isa_flags)

58154

+Use ISA 2.07 direct move between GPR & VSX register instructions

58155

+

58156

+mhtm

58157

+Target Report Mask(HTM) Var(rs6000_isa_flags)

58158

+Use ISA 2.07 transactional memory (HTM) instructions

58159

+

58160

+mquad-memory

58161

+Target Report Mask(QUAD_MEMORY) Var(rs6000_isa_flags)

58162

+Generate the quad word memory instructions (lq/stq).

58163

+

58164

+mquad-memory-atomic

58165

+Target Report Mask(QUAD_MEMORY_ATOMIC) Var(rs6000_isa_flags)

58166

+Generate the quad word memory atomic instructions (lqarx/stqcx).

58167

+

58168

+mcompat-align-parm

58169

+Target Report Var(rs6000_compat_align_parm) Init(1) Save

58170

+Generate aggregate parameter passing code with at most 64-bit alignment.

58171

+

58172

+mupper-regs-df

58173

+Target Undocumented Mask(UPPER_REGS_DF) Var(rs6000_isa_flags)

58174

+Allow double variables in upper registers with -mcpu=power7 or -mvsx

58175

+

58176

+mupper-regs-sf

58177

+Target Undocumented Mask(UPPER_REGS_SF) Var(rs6000_isa_flags)

58178

+Allow float variables in upper registers with -mcpu=power8 or -mp8-vector

58179

Index: gcc/config/rs6000/linux64.h

58180

===================================================================

58181

--- a/src/gcc/config/rs6000/linux64.h (.../tags/gcc_4_8_2_release)

58182

+++ b/src/gcc/config/rs6000/linux64.h (.../branches/gcc-4_8-branch)

58183

@@ -25,9 +25,6 @@

58184

58185

#ifndef RS6000_BI_ARCH

58186

58187

-#undef DEFAULT_ABI

58188

-#define DEFAULT_ABI ABI_AIX

58189

-

58190

#undef TARGET_64BIT

58191

#define TARGET_64BIT 1

58192

58193

@@ -74,7 +71,11 @@

58194

#undef PROCESSOR_DEFAULT

58195

#define PROCESSOR_DEFAULT PROCESSOR_POWER7

58196

#undef PROCESSOR_DEFAULT64

58197

+#ifdef LINUX64_DEFAULT_ABI_ELFv2

58198

+#define PROCESSOR_DEFAULT64 PROCESSOR_POWER8

58199

+#else

58200

#define PROCESSOR_DEFAULT64 PROCESSOR_POWER7

58201

+#endif

58202

58203

/* We don't need to generate entries in .fixup, except when

58204

-mrelocatable or -mrelocatable-lib is given. */

58205

@@ -88,6 +89,12 @@

58206

#define INVALID_64BIT "-m%s not supported in this configuration"

58207

#define INVALID_32BIT INVALID_64BIT

58208

58209

+#ifdef LINUX64_DEFAULT_ABI_ELFv2

58210

+#define ELFv2_ABI_CHECK (rs6000_elf_abi != 1)

58211

+#else

58212

+#define ELFv2_ABI_CHECK (rs6000_elf_abi == 2)

58213

+#endif

58214

+

58215

#undef SUBSUBTARGET_OVERRIDE_OPTIONS

58216

#define SUBSUBTARGET_OVERRIDE_OPTIONS \

58217

do \

58218

@@ -102,6 +109,12 @@

58219

error (INVALID_64BIT, "call"); \

58220

} \

58221

dot_symbols = !strcmp (rs6000_abi_name, "aixdesc"); \

58222

+ if (ELFv2_ABI_CHECK) \

58223

+ { \

58224

+ rs6000_current_abi = ABI_ELFv2; \

58225

+ if (dot_symbols) \

58226

+ error ("-mcall-aixdesc incompatible with -mabi=elfv2"); \

58227

+ } \

58228

if (rs6000_isa_flags & OPTION_MASK_RELOCATABLE) \

58229

{ \

58230

rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \

58231

@@ -136,8 +149,11 @@

58232

SET_CMODEL (CMODEL_MEDIUM); \

58233

if (rs6000_current_cmodel != CMODEL_SMALL) \

58234

{ \

58235

- TARGET_NO_FP_IN_TOC = 0; \

58236

- TARGET_NO_SUM_IN_TOC = 0; \

58237

+ if (!global_options_set.x_TARGET_NO_FP_IN_TOC) \

58238

+ TARGET_NO_FP_IN_TOC \

58239

+ = rs6000_current_cmodel == CMODEL_MEDIUM; \

58240

+ if (!global_options_set.x_TARGET_NO_SUM_IN_TOC) \

58241

+ TARGET_NO_SUM_IN_TOC = 0; \

58242

} \

58243

} \

58244

} \

58245

@@ -351,7 +367,11 @@

58246

#define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"

58247

58248

#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"

58249

-#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld64.so.1"

58250

+#ifdef LINUX64_DEFAULT_ABI_ELFv2

58251

+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"

58252

+#else

58253

+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"

58254

+#endif

58255

#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"

58256

#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"

58257

#if DEFAULT_LIBC == LIBC_UCLIBC

58258

Index: gcc/config/rs6000/darwin.h

58259

===================================================================

58260

--- a/src/gcc/config/rs6000/darwin.h (.../tags/gcc_4_8_2_release)

58261

+++ b/src/gcc/config/rs6000/darwin.h (.../branches/gcc-4_8-branch)

58262

@@ -205,7 +205,8 @@

58263

"v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \

58264

"vrsave", "vscr", \

58265

"spe_acc", "spefscr", \

58266

- "sfp" \

58267

+ "sfp", \

58268

+ "tfhar", "tfiar", "texasr" \

58269

}

58270

58271

/* This outputs NAME to FILE. */

58272

Index: gcc/config/rs6000/rs6000.c

58273

===================================================================

58274

--- a/src/gcc/config/rs6000/rs6000.c (.../tags/gcc_4_8_2_release)

58275

+++ b/src/gcc/config/rs6000/rs6000.c (.../branches/gcc-4_8-branch)

58276

@@ -1,5 +1,5 @@

58277

/* Subroutines used for code generation on IBM RS/6000.

58278

58279

58280

Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)

58281

58282

This file is part of GCC.

58283

@@ -56,6 +56,7 @@

58284

#include "intl.h"

58285

#include "params.h"

58286

#include "tm-constrs.h"

58287

+#include "ira.h"

58288

#include "opts.h"

58289

#include "tree-vectorizer.h"

58290

#include "dumpfile.h"

58291

@@ -96,6 +97,7 @@

58292

int spe_gp_save_offset; /* offset to save spe 64-bit gprs */

58293

int varargs_save_offset; /* offset to save the varargs registers */

58294

int ehrd_offset; /* offset to EH return data */

58295

+ int ehcr_offset; /* offset to EH CR field data */

58296

int reg_size; /* register size (4 or 8) */

58297

HOST_WIDE_INT vars_size; /* variable save area size */

58298

int parm_size; /* outgoing parameter size */

58299

@@ -139,6 +141,8 @@

58300

64-bits wide and is allocated early enough so that the offset

58301

does not overflow the 16-bit load/store offset field. */

58302

rtx sdmode_stack_slot;

58303

+ /* Flag if r2 setup is needed with ELFv2 ABI. */

58304

+ bool r2_setup_needed;

58305

} machine_function;

58306

58307

/* Support targetm.vectorize.builtin_mask_for_load. */

58308

@@ -189,9 +193,6 @@

58309

/* Map register number to register class. */

58310

enum reg_class rs6000_regno_regclass[FIRST_PSEUDO_REGISTER];

58311

58312

-/* Reload functions based on the type and the vector unit. */

58313

-static enum insn_code rs6000_vector_reload[NUM_MACHINE_MODES][2];

58314

-

58315

static int dbg_cost_ctrl;

58316

58317

/* Built in types. */

58318

@@ -289,6 +290,105 @@

58319

don't link in rs6000-c.c, so we can't call it directly. */

58320

void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, HOST_WIDE_INT);

58321

58322

+/* Simplfy register classes into simpler classifications. We assume

58323

+ GPR_REG_TYPE - FPR_REG_TYPE are ordered so that we can use a simple range

58324

+ check for standard register classes (gpr/floating/altivec/vsx) and

58325

+ floating/vector classes (float/altivec/vsx). */

58326

+

58327

+enum rs6000_reg_type {

58328

+ NO_REG_TYPE,

58329

+ PSEUDO_REG_TYPE,

58330

+ GPR_REG_TYPE,

58331

+ VSX_REG_TYPE,

58332

+ ALTIVEC_REG_TYPE,

58333

+ FPR_REG_TYPE,

58334

+ SPR_REG_TYPE,

58335

+ CR_REG_TYPE,

58336

+ SPE_ACC_TYPE,

58337

+ SPEFSCR_REG_TYPE

58338

+};

58339

+

58340

+/* Map register class to register type. */

58341

+static enum rs6000_reg_type reg_class_to_reg_type[N_REG_CLASSES];

58342

+

58343

+/* First/last register type for the 'normal' register types (i.e. general

58344

+ purpose, floating point, altivec, and VSX registers). */

58345

+#define IS_STD_REG_TYPE(RTYPE) IN_RANGE(RTYPE, GPR_REG_TYPE, FPR_REG_TYPE)

58346

+

58347

+#define IS_FP_VECT_REG_TYPE(RTYPE) IN_RANGE(RTYPE, VSX_REG_TYPE, FPR_REG_TYPE)

58348

+

58349

+

58350

+/* Register classes we care about in secondary reload or go if legitimate

58351

+ address. We only need to worry about GPR, FPR, and Altivec registers here,

58352

+ along an ANY field that is the OR of the 3 register classes. */

58353

+

58354

+enum rs6000_reload_reg_type {

58355

+ RELOAD_REG_GPR, /* General purpose registers. */

58356

+ RELOAD_REG_FPR, /* Traditional floating point regs. */

58357

+ RELOAD_REG_VMX, /* Altivec (VMX) registers. */

58358

+ RELOAD_REG_ANY, /* OR of GPR, FPR, Altivec masks. */

58359

+ N_RELOAD_REG

58360

+};

58361

+

58362

+/* For setting up register classes, loop through the 3 register classes mapping

58363

+ into real registers, and skip the ANY class, which is just an OR of the

58364

+ bits. */

58365

+#define FIRST_RELOAD_REG_CLASS RELOAD_REG_GPR

58366

+#define LAST_RELOAD_REG_CLASS RELOAD_REG_VMX

58367

+

58368

+/* Map reload register type to a register in the register class. */

58369

+struct reload_reg_map_type {

58370

+ const char *name; /* Register class name. */

58371

+ int reg; /* Register in the register class. */

58372

+};

58373

+

58374

+static const struct reload_reg_map_type reload_reg_map[N_RELOAD_REG] = {

58375

+ { "Gpr", FIRST_GPR_REGNO }, /* RELOAD_REG_GPR. */

58376

+ { "Fpr", FIRST_FPR_REGNO }, /* RELOAD_REG_FPR. */

58377

+ { "VMX", FIRST_ALTIVEC_REGNO }, /* RELOAD_REG_VMX. */

58378

+ { "Any", -1 }, /* RELOAD_REG_ANY. */

58379

+};

58380

+

58381

+/* Mask bits for each register class, indexed per mode. Historically the

58382

+ compiler has been more restrictive which types can do PRE_MODIFY instead of

58383

+ PRE_INC and PRE_DEC, so keep track of sepaate bits for these two. */

58384

+typedef unsigned char addr_mask_type;

58385

+

58386

+#define RELOAD_REG_VALID 0x01 /* Mode valid in register.. */

58387

+#define RELOAD_REG_MULTIPLE 0x02 /* Mode takes multiple registers. */

58388

+#define RELOAD_REG_INDEXED 0x04 /* Reg+reg addressing. */

58389

+#define RELOAD_REG_OFFSET 0x08 /* Reg+offset addressing. */

58390

+#define RELOAD_REG_PRE_INCDEC 0x10 /* PRE_INC/PRE_DEC valid. */

58391

+#define RELOAD_REG_PRE_MODIFY 0x20 /* PRE_MODIFY valid. */

58392

+

58393

+/* Register type masks based on the type, of valid addressing modes. */

58394

+struct rs6000_reg_addr {

58395

+ enum insn_code reload_load; /* INSN to reload for loading. */

58396

+ enum insn_code reload_store; /* INSN to reload for storing. */

58397

+ enum insn_code reload_fpr_gpr; /* INSN to move from FPR to GPR. */

58398

+ enum insn_code reload_gpr_vsx; /* INSN to move from GPR to VSX. */

58399

+ enum insn_code reload_vsx_gpr; /* INSN to move from VSX to GPR. */

58400

+ addr_mask_type addr_mask[(int)N_RELOAD_REG]; /* Valid address masks. */

58401

+};

58402

+

58403

+static struct rs6000_reg_addr reg_addr[NUM_MACHINE_MODES];

58404

+

58405

+/* Helper function to say whether a mode supports PRE_INC or PRE_DEC. */

58406

+static inline bool

58407

+mode_supports_pre_incdec_p (enum machine_mode mode)

58408

+{

58409

+ return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] & RELOAD_REG_PRE_INCDEC)

58410

+ != 0);

58411

+}

58412

+

58413

+/* Helper function to say whether a mode supports PRE_MODIFY. */

58414

+static inline bool

58415

+mode_supports_pre_modify_p (enum machine_mode mode)

58416

+{

58417

+ return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] & RELOAD_REG_PRE_MODIFY)

58418

+ != 0);

58419

+}

58420

+

58421

58422

/* Target cpu costs. */

58423

58424

@@ -828,6 +928,25 @@

58425

12, /* prefetch streams */

58426

};

58427

58428

+/* Instruction costs on POWER8 processors. */

58429

+static const

58430

+struct processor_costs power8_cost = {

58431

+ COSTS_N_INSNS (3), /* mulsi */

58432

+ COSTS_N_INSNS (3), /* mulsi_const */

58433

+ COSTS_N_INSNS (3), /* mulsi_const9 */

58434

+ COSTS_N_INSNS (3), /* muldi */

58435

+ COSTS_N_INSNS (19), /* divsi */

58436

+ COSTS_N_INSNS (35), /* divdi */

58437

+ COSTS_N_INSNS (3), /* fp */

58438

+ COSTS_N_INSNS (3), /* dmul */

58439

+ COSTS_N_INSNS (14), /* sdiv */

58440

+ COSTS_N_INSNS (17), /* ddiv */

58441

+ 128, /* cache line size */

58442

+ 32, /* l1 cache */

58443

+ 256, /* l2 cache */

58444

+ 12, /* prefetch streams */

58445

+};

58446

+

58447

/* Instruction costs on POWER A2 processors. */

58448

static const

58449

struct processor_costs ppca2_cost = {

58450

@@ -855,6 +974,7 @@

58451

#undef RS6000_BUILTIN_A

58452

#undef RS6000_BUILTIN_D

58453

#undef RS6000_BUILTIN_E

58454

+#undef RS6000_BUILTIN_H

58455

#undef RS6000_BUILTIN_P

58456

#undef RS6000_BUILTIN_Q

58457

#undef RS6000_BUILTIN_S

58458

@@ -878,6 +998,9 @@

58459

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) \

58460

{ NAME, ICODE, MASK, ATTR },

58461

58462

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \

58463

+ { NAME, ICODE, MASK, ATTR },

58464

+

58465

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \

58466

{ NAME, ICODE, MASK, ATTR },

58467

58468

@@ -908,6 +1031,7 @@

58469

#undef RS6000_BUILTIN_A

58470

#undef RS6000_BUILTIN_D

58471

#undef RS6000_BUILTIN_E

58472

+#undef RS6000_BUILTIN_H

58473

#undef RS6000_BUILTIN_P

58474

#undef RS6000_BUILTIN_Q

58475

#undef RS6000_BUILTIN_S

58476

@@ -948,6 +1072,7 @@

58477

static void paired_init_builtins (void);

58478

static rtx paired_expand_predicate_builtin (enum insn_code, tree, rtx);

58479

static void spe_init_builtins (void);

58480

+static void htm_init_builtins (void);

58481

static rtx spe_expand_predicate_builtin (enum insn_code, tree, rtx);

58482

static rtx spe_expand_evsel_builtin (enum insn_code, tree, rtx);

58483

static int rs6000_emit_int_cmove (rtx, rtx, rtx, rtx);

58484

@@ -1020,6 +1145,13 @@

58485

static void rs6000_print_builtin_options (FILE *, int, const char *,

58486

HOST_WIDE_INT);

58487

58488

+static enum rs6000_reg_type register_to_reg_type (rtx, bool *);

58489

+static bool rs6000_secondary_reload_move (enum rs6000_reg_type,

58490

+ enum rs6000_reg_type,

58491

+ enum machine_mode,

58492

+ secondary_reload_info *,

58493

+ bool);

58494

+

58495

/* Hash table stuff for keeping track of TOC entries. */

58496

58497

struct GTY(()) toc_hash_struct

58498

@@ -1068,7 +1200,9 @@

58499

/* SPE registers. */

58500

"spe_acc", "spefscr",

58501

/* Soft frame pointer. */

58502

- "sfp"

58503

+ "sfp",

58504

+ /* HTM SPR registers. */

58505

+ "tfhar", "tfiar", "texasr"

58506

};

58507

58508

#ifdef TARGET_REGNAMES

58509

@@ -1094,7 +1228,9 @@

58510

/* SPE registers. */

58511

"spe_acc", "spefscr",

58512

/* Soft frame pointer. */

58513

- "sfp"

58514

+ "sfp",

58515

+ /* HTM SPR registers. */

58516

+ "tfhar", "tfiar", "texasr"

58517

};

58518

#endif

58519

58520

@@ -1316,6 +1452,9 @@

58521

#undef TARGET_RETURN_IN_MEMORY

58522

#define TARGET_RETURN_IN_MEMORY rs6000_return_in_memory

58523

58524

+#undef TARGET_RETURN_IN_MSB

58525

+#define TARGET_RETURN_IN_MSB rs6000_return_in_msb

58526

+

58527

#undef TARGET_SETUP_INCOMING_VARARGS

58528

#define TARGET_SETUP_INCOMING_VARARGS setup_incoming_varargs

58529

58530

@@ -1425,6 +1564,9 @@

58531

#undef TARGET_MODE_DEPENDENT_ADDRESS_P

58532

#define TARGET_MODE_DEPENDENT_ADDRESS_P rs6000_mode_dependent_address_p

58533

58534

+#undef TARGET_LRA_P

58535

+#define TARGET_LRA_P rs6000_lra_p

58536

+

58537

#undef TARGET_CAN_ELIMINATE

58538

#define TARGET_CAN_ELIMINATE rs6000_can_eliminate

58539

58540

@@ -1513,8 +1655,9 @@

58541

{

58542

unsigned HOST_WIDE_INT reg_size;

58543

58544

+ /* TF/TD modes are special in that they always take 2 registers. */

58545

if (FP_REGNO_P (regno))

58546

- reg_size = (VECTOR_MEM_VSX_P (mode)

58547

+ reg_size = ((VECTOR_MEM_VSX_P (mode) && mode != TDmode && mode != TFmode)

58548

? UNITS_PER_VSX_WORD

58549

: UNITS_PER_FP_WORD);

58550

58551

@@ -1546,16 +1689,39 @@

58552

{

58553

int last_regno = regno + rs6000_hard_regno_nregs[mode][regno] - 1;

58554

58555

+ /* PTImode can only go in GPRs. Quad word memory operations require even/odd

58556

+ register combinations, and use PTImode where we need to deal with quad

58557

+ word memory operations. Don't allow quad words in the argument or frame

58558

+ pointer registers, just registers 0..31. */

58559

+ if (mode == PTImode)

58560

+ return (IN_RANGE (regno, FIRST_GPR_REGNO, LAST_GPR_REGNO)

58561

+ && IN_RANGE (last_regno, FIRST_GPR_REGNO, LAST_GPR_REGNO)

58562

+ && ((regno & 1) == 0));

58563

+

58564

/* VSX registers that overlap the FPR registers are larger than for non-VSX

58565

implementations. Don't allow an item to be split between a FP register

58566

- and an Altivec register. */

58567

- if (VECTOR_MEM_VSX_P (mode))

58568

+ and an Altivec register. Allow TImode in all VSX registers if the user

58569

+ asked for it. */

58570

+ if (TARGET_VSX && VSX_REGNO_P (regno)

58571

+ && (VECTOR_MEM_VSX_P (mode)

58572

+ || (TARGET_VSX_SCALAR_FLOAT && mode == SFmode)

58573

+ || (TARGET_VSX_SCALAR_DOUBLE && (mode == DFmode || mode == DImode))

58574

+ || (TARGET_VSX_TIMODE && mode == TImode)

58575

+ || (TARGET_VADDUQM && mode == V1TImode)))

58576

{

58577

if (FP_REGNO_P (regno))

58578

return FP_REGNO_P (last_regno);

58579

58580

if (ALTIVEC_REGNO_P (regno))

58581

- return ALTIVEC_REGNO_P (last_regno);

58582

+ {

58583

+ if (mode == SFmode && !TARGET_UPPER_REGS_SF)

58584

+ return 0;

58585

+

58586

+ if ((mode == DFmode || mode == DImode) && !TARGET_UPPER_REGS_DF)

58587

+ return 0;

58588

+

58589

+ return ALTIVEC_REGNO_P (last_regno);

58590

+ }

58591

}

58592

58593

/* The GPRs can hold any mode, but values bigger than one register

58594

@@ -1564,8 +1730,7 @@

58595

return INT_REGNO_P (last_regno);

58596

58597

/* The float registers (except for VSX vector modes) can only hold floating

58598

- modes and DImode. This excludes the 32-bit decimal float mode for

58599

- now. */

58600

+ modes and DImode. */

58601

if (FP_REGNO_P (regno))

58602

{

58603

if (SCALAR_FLOAT_MODE_P (mode)

58604

@@ -1593,15 +1758,15 @@

58605

58606

/* AltiVec only in AldyVec registers. */

58607

if (ALTIVEC_REGNO_P (regno))

58608

- return VECTOR_MEM_ALTIVEC_OR_VSX_P (mode);

58609

+ return (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)

58610

+ || mode == V1TImode);

58611

58612

/* ...but GPRs can hold SIMD data on the SPE in one register. */

58613

if (SPE_SIMD_REGNO_P (regno) && TARGET_SPE && SPE_VECTOR_MODE (mode))

58614

return 1;

58615

58616

- /* We cannot put TImode anywhere except general register and it must be able

58617

- to fit within the register set. In the future, allow TImode in the

58618

- Altivec or VSX registers. */

58619

+ /* We cannot put non-VSX TImode or PTImode anywhere except general register

58620

+ and it must be able to fit within the register set. */

58621

58622

return GET_MODE_SIZE (mode) <= UNITS_PER_WORD;

58623

}

58624

@@ -1674,10 +1839,77 @@

58625

comma = "";

58626

}

58627

58628

+ len += fprintf (stderr, "%sreg-class = %s", comma,

58629

+ reg_class_names[(int)rs6000_regno_regclass[r]]);

58630

+ comma = ", ";

58631

+

58632

+ if (len > 70)

58633

+ {

58634

+ fprintf (stderr, ",\n\t");

58635

+ comma = "";

58636

+ }

58637

+

58638

fprintf (stderr, "%sregno = %d\n", comma, r);

58639

}

58640

}

58641

58642

+static const char *

58643

+rs6000_debug_vector_unit (enum rs6000_vector v)

58644

+{

58645

+ const char *ret;

58646

+

58647

+ switch (v)

58648

+ {

58649

+ case VECTOR_NONE: ret = "none"; break;

58650

+ case VECTOR_ALTIVEC: ret = "altivec"; break;

58651

+ case VECTOR_VSX: ret = "vsx"; break;

58652

+ case VECTOR_P8_VECTOR: ret = "p8_vector"; break;

58653

+ case VECTOR_PAIRED: ret = "paired"; break;

58654

+ case VECTOR_SPE: ret = "spe"; break;

58655

+ case VECTOR_OTHER: ret = "other"; break;

58656

+ default: ret = "unknown"; break;

58657

+ }

58658

+

58659

+ return ret;

58660

+}

58661

+

58662

+/* Print the address masks in a human readble fashion. */

58663

+DEBUG_FUNCTION void

58664

+rs6000_debug_print_mode (ssize_t m)

58665

+{

58666

+ ssize_t rc;

58667

+

58668

+ fprintf (stderr, "Mode: %-5s", GET_MODE_NAME (m));

58669

+ for (rc = 0; rc < N_RELOAD_REG; rc++)

58670

+ {

58671

+ addr_mask_type mask = reg_addr[m].addr_mask[rc];

58672

+ fprintf (stderr,

58673

+ " %s: %c%c%c%c%c%c",

58674

+ reload_reg_map[rc].name,

58675

+ (mask & RELOAD_REG_VALID) != 0 ? 'v' : ' ',

58676

+ (mask & RELOAD_REG_MULTIPLE) != 0 ? 'm' : ' ',

58677

+ (mask & RELOAD_REG_INDEXED) != 0 ? 'i' : ' ',

58678

+ (mask & RELOAD_REG_OFFSET) != 0 ? 'o' : ' ',

58679

+ (mask & RELOAD_REG_PRE_INCDEC) != 0 ? '+' : ' ',

58680

+ (mask & RELOAD_REG_PRE_MODIFY) != 0 ? '+' : ' ');

58681

+ }

58682

+

58683

+ if (rs6000_vector_unit[m] != VECTOR_NONE

58684

+ || rs6000_vector_mem[m] != VECTOR_NONE

58685

+ || (reg_addr[m].reload_store != CODE_FOR_nothing)

58686

+ || (reg_addr[m].reload_load != CODE_FOR_nothing))

58687

+ {

58688

+ fprintf (stderr,

58689

+ " Vector-arith=%-10s Vector-mem=%-10s Reload=%c%c",

58690

+ rs6000_debug_vector_unit (rs6000_vector_unit[m]),

58691

+ rs6000_debug_vector_unit (rs6000_vector_mem[m]),

58692

+ (reg_addr[m].reload_store != CODE_FOR_nothing) ? 's' : '*',

58693

+ (reg_addr[m].reload_load != CODE_FOR_nothing) ? 'l' : '*');

58694

+ }

58695

+

58696

+ fputs ("\n", stderr);

58697

+}

58698

+

58699

#define DEBUG_FMT_ID "%-32s= "

58700

#define DEBUG_FMT_D DEBUG_FMT_ID "%d\n"

58701

#define DEBUG_FMT_WX DEBUG_FMT_ID "%#.12" HOST_WIDE_INT_PRINT "x: "

58702

@@ -1690,6 +1922,7 @@

58703

static const char *const tf[2] = { "false", "true" };

58704

const char *nl = (const char *)0;

58705

int m;

58706

+ size_t m1, m2, v;

58707

char costly_num[20];

58708

char nop_num[20];

58709

char flags_buffer[40];

58710

@@ -1700,20 +1933,69 @@

58711

const char *cmodel_str;

58712

struct cl_target_option cl_opts;

58713

58714

- /* Map enum rs6000_vector to string. */

58715

- static const char *rs6000_debug_vector_unit[] = {

58716

- "none",

58717

- "altivec",

58718

- "vsx",

58719

- "paired",

58720

- "spe",

58721

- "other"

58722

+ /* Modes we want tieable information on. */

58723

+ static const enum machine_mode print_tieable_modes[] = {

58724

+ QImode,

58725

+ HImode,

58726

+ SImode,

58727

+ DImode,

58728

+ TImode,

58729

+ PTImode,

58730

+ SFmode,

58731

+ DFmode,

58732

+ TFmode,

58733

+ SDmode,

58734

+ DDmode,

58735

+ TDmode,

58736

+ V8QImode,

58737

+ V4HImode,

58738

+ V2SImode,

58739

+ V16QImode,

58740

+ V8HImode,

58741

+ V4SImode,

58742

+ V2DImode,

58743

+ V1TImode,

58744

+ V32QImode,

58745

+ V16HImode,

58746

+ V8SImode,

58747

+ V4DImode,

58748

+ V2TImode,

58749

+ V2SFmode,

58750

+ V4SFmode,

58751

+ V2DFmode,

58752

+ V8SFmode,

58753

+ V4DFmode,

58754

+ CCmode,

58755

+ CCUNSmode,

58756

+ CCEQmode,

58757

};

58758

58759

- fprintf (stderr, "Register information: (last virtual reg = %d)\n",

58760

- LAST_VIRTUAL_REGISTER);

58761

- rs6000_debug_reg_print (0, 31, "gr");

58762

- rs6000_debug_reg_print (32, 63, "fp");

58763

+ /* Virtual regs we are interested in. */

58764

+ const static struct {

58765

+ int regno; /* register number. */

58766

+ const char *name; /* register name. */

58767

+ } virtual_regs[] = {

58768

+ { STACK_POINTER_REGNUM, "stack pointer:" },

58769

+ { TOC_REGNUM, "toc: " },

58770

+ { STATIC_CHAIN_REGNUM, "static chain: " },

58771

+ { RS6000_PIC_OFFSET_TABLE_REGNUM, "pic offset: " },

58772

+ { HARD_FRAME_POINTER_REGNUM, "hard frame: " },

58773

+ { ARG_POINTER_REGNUM, "arg pointer: " },

58774

+ { FRAME_POINTER_REGNUM, "frame pointer:" },

58775

+ { FIRST_PSEUDO_REGISTER, "first pseudo: " },

58776

+ { FIRST_VIRTUAL_REGISTER, "first virtual:" },

58777

+ { VIRTUAL_INCOMING_ARGS_REGNUM, "incoming_args:" },

58778

+ { VIRTUAL_STACK_VARS_REGNUM, "stack_vars: " },

58779

+ { VIRTUAL_STACK_DYNAMIC_REGNUM, "stack_dynamic:" },

58780

+ { VIRTUAL_OUTGOING_ARGS_REGNUM, "outgoing_args:" },

58781

+ { VIRTUAL_CFA_REGNUM, "cfa (frame): " },

58782

+ { VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM, "stack boundry:" },

58783

+ { LAST_VIRTUAL_REGISTER, "last virtual: " },

58784

+ };

58785

+

58786

+ fputs ("\nHard register information:\n", stderr);

58787

+ rs6000_debug_reg_print (FIRST_GPR_REGNO, LAST_GPR_REGNO, "gr");

58788

+ rs6000_debug_reg_print (FIRST_FPR_REGNO, LAST_FPR_REGNO, "fp");

58789

rs6000_debug_reg_print (FIRST_ALTIVEC_REGNO,

58790

LAST_ALTIVEC_REGNO,

58791

"vs");

58792

@@ -1726,6 +2008,10 @@

58793

rs6000_debug_reg_print (SPE_ACC_REGNO, SPE_ACC_REGNO, "spe_a");

58794

rs6000_debug_reg_print (SPEFSCR_REGNO, SPEFSCR_REGNO, "spe_f");

58795

58796

+ fputs ("\nVirtual/stack/frame registers:\n", stderr);

58797

+ for (v = 0; v < ARRAY_SIZE (virtual_regs); v++)

58798

+ fprintf (stderr, "%s regno = %3d\n", virtual_regs[v].name, virtual_regs[v].regno);

58799

+

58800

fprintf (stderr,

58801

"\n"

58802

"d reg_class = %s\n"

58803

@@ -1734,7 +2020,19 @@

58804

"wa reg_class = %s\n"

58805

"wd reg_class = %s\n"

58806

"wf reg_class = %s\n"

58807

- "ws reg_class = %s\n\n",

58808

+ "wg reg_class = %s\n"

58809

+ "wl reg_class = %s\n"

58810

+ "wm reg_class = %s\n"

58811

+ "wr reg_class = %s\n"

58812

+ "ws reg_class = %s\n"

58813

+ "wt reg_class = %s\n"

58814

+ "wu reg_class = %s\n"

58815

+ "wv reg_class = %s\n"

58816

+ "ww reg_class = %s\n"

58817

+ "wx reg_class = %s\n"

58818

+ "wy reg_class = %s\n"

58819

+ "wz reg_class = %s\n"

58820

+ "\n",

58821

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_d]],

58822

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_f]],

58823

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_v]],

58824

@@ -1741,18 +2039,51 @@

58825

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wa]],

58826

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wd]],

58827

reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wf]],

58828

- reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_ws]]);

58829

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wg]],

58830

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wl]],

58831

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wm]],

58832

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wr]],

58833

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_ws]],

58834

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wt]],

58835

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wu]],

58836

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wv]],

58837

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_ww]],

58838

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wx]],

58839

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wy]],

58840

+ reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wz]]);

58841

58842

+ nl = "\n";

58843

for (m = 0; m < NUM_MACHINE_MODES; ++m)

58844

- if (rs6000_vector_unit[m] || rs6000_vector_mem[m])

58845

- {

58846

- nl = "\n";

58847

- fprintf (stderr, "Vector mode: %-5s arithmetic: %-8s move: %-8s\n",

58848

- GET_MODE_NAME (m),

58849

- rs6000_debug_vector_unit[ rs6000_vector_unit[m] ],

58850

- rs6000_debug_vector_unit[ rs6000_vector_mem[m] ]);

58851

- }

58852

+ rs6000_debug_print_mode (m);

58853

58854

+ fputs ("\n", stderr);

58855

+

58856

+ for (m1 = 0; m1 < ARRAY_SIZE (print_tieable_modes); m1++)

58857

+ {

58858

+ enum machine_mode mode1 = print_tieable_modes[m1];

58859

+ bool first_time = true;

58860

+

58861

+ nl = (const char *)0;

58862

+ for (m2 = 0; m2 < ARRAY_SIZE (print_tieable_modes); m2++)

58863

+ {

58864

+ enum machine_mode mode2 = print_tieable_modes[m2];

58865

+ if (mode1 != mode2 && MODES_TIEABLE_P (mode1, mode2))

58866

+ {

58867

+ if (first_time)

58868

+ {

58869

+ fprintf (stderr, "Tieable modes %s:", GET_MODE_NAME (mode1));

58870

+ nl = "\n";

58871

+ first_time = false;

58872

+ }

58873

+

58874

+ fprintf (stderr, " %s", GET_MODE_NAME (mode2));

58875

+ }

58876

+ }

58877

+

58878

+ if (!first_time)

58879

+ fputs ("\n", stderr);

58880

+ }

58881

+

58882

if (nl)

58883

fputs (nl, stderr);

58884

58885

@@ -1913,6 +2244,7 @@

58886

{

58887

case ABI_NONE: abi_str = "none"; break;

58888

case ABI_AIX: abi_str = "aix"; break;

58889

+ case ABI_ELFv2: abi_str = "ELFv2"; break;

58890

case ABI_V4: abi_str = "V4"; break;

58891

case ABI_DARWIN: abi_str = "darwin"; break;

58892

default: abi_str = "unknown"; break;

58893

@@ -1932,9 +2264,34 @@

58894

if (rs6000_float_gprs)

58895

fprintf (stderr, DEBUG_FMT_S, "float_gprs", "true");

58896

58897

+ fprintf (stderr, DEBUG_FMT_S, "fprs",

58898

+ (TARGET_FPRS ? "true" : "false"));

58899

+

58900

+ fprintf (stderr, DEBUG_FMT_S, "single_float",

58901

+ (TARGET_SINGLE_FLOAT ? "true" : "false"));

58902

+

58903

+ fprintf (stderr, DEBUG_FMT_S, "double_float",

58904

+ (TARGET_DOUBLE_FLOAT ? "true" : "false"));

58905

+

58906

+ fprintf (stderr, DEBUG_FMT_S, "soft_float",

58907

+ (TARGET_SOFT_FLOAT ? "true" : "false"));

58908

+

58909

+ fprintf (stderr, DEBUG_FMT_S, "e500_single",

58910

+ (TARGET_E500_SINGLE ? "true" : "false"));

58911

+

58912

+ fprintf (stderr, DEBUG_FMT_S, "e500_double",

58913

+ (TARGET_E500_DOUBLE ? "true" : "false"));

58914

+

58915

if (TARGET_LINK_STACK)

58916

fprintf (stderr, DEBUG_FMT_S, "link_stack", "true");

58917

58918

+ if (targetm.lra_p ())

58919

+ fprintf (stderr, DEBUG_FMT_S, "lra", "true");

58920

+

58921

+ if (TARGET_P8_FUSION)

58922

+ fprintf (stderr, DEBUG_FMT_S, "p8 fusion",

58923

+ (TARGET_P8_FUSION_SIGN) ? "zero+sign" : "zero");

58924

+

58925

fprintf (stderr, DEBUG_FMT_S, "plt-format",

58926

TARGET_SECURE_PLT ? "secure" : "bss");

58927

fprintf (stderr, DEBUG_FMT_S, "struct-return",

58928

@@ -1954,11 +2311,106 @@

58929

(int)RS6000_BUILTIN_COUNT);

58930

}

58931

58932

+

58933

+/* Update the addr mask bits in reg_addr to help secondary reload and go if

58934

+ legitimate address support to figure out the appropriate addressing to

58935

+ use. */

58936

+

58937

+static void

58938

+rs6000_setup_reg_addr_masks (void)

58939

+{

58940

+ ssize_t rc, reg, m, nregs;

58941

+ addr_mask_type any_addr_mask, addr_mask;

58942

+

58943

+ for (m = 0; m < NUM_MACHINE_MODES; ++m)

58944

+ {

58945

+ /* SDmode is special in that we want to access it only via REG+REG

58946

+ addressing on power7 and above, since we want to use the LFIWZX and

58947

+ STFIWZX instructions to load it. */

58948

+ bool indexed_only_p = (m == SDmode && TARGET_NO_SDMODE_STACK);

58949

+

58950

+ any_addr_mask = 0;

58951

+ for (rc = FIRST_RELOAD_REG_CLASS; rc <= LAST_RELOAD_REG_CLASS; rc++)

58952

+ {

58953

+ addr_mask = 0;

58954

+ reg = reload_reg_map[rc].reg;

58955

+

58956

+ /* Can mode values go in the GPR/FPR/Altivec registers? */

58957

+ if (reg >= 0 && rs6000_hard_regno_mode_ok_p[m][reg])

58958

+ {

58959

+ nregs = rs6000_hard_regno_nregs[m][reg];

58960

+ addr_mask |= RELOAD_REG_VALID;

58961

+

58962

+ /* Indicate if the mode takes more than 1 physical register. If

58963

+ it takes a single register, indicate it can do REG+REG

58964

+ addressing. */

58965

+ if (nregs > 1 || m == BLKmode)

58966

+ addr_mask |= RELOAD_REG_MULTIPLE;

58967

+ else

58968

+ addr_mask |= RELOAD_REG_INDEXED;

58969

+

58970

+ /* Figure out if we can do PRE_INC, PRE_DEC, or PRE_MODIFY

58971

+ addressing. Restrict addressing on SPE for 64-bit types

58972

+ because of the SUBREG hackery used to address 64-bit floats in

58973

+ '32-bit' GPRs. To simplify secondary reload, don't allow

58974

+ update forms on scalar floating point types that can go in the

58975

+ upper registers. */

58976

+

58977

+ if (TARGET_UPDATE

58978

+ && (rc == RELOAD_REG_GPR || rc == RELOAD_REG_FPR)

58979

+ && GET_MODE_SIZE (m) <= 8

58980

+ && !VECTOR_MODE_P (m)

58981

+ && !COMPLEX_MODE_P (m)

58982

+ && !indexed_only_p

58983

+ && !(TARGET_E500_DOUBLE && GET_MODE_SIZE (m) == 8)

58984

+ && !(m == DFmode && TARGET_UPPER_REGS_DF)

58985

+ && !(m == SFmode && TARGET_UPPER_REGS_SF))

58986

+ {

58987

+ addr_mask |= RELOAD_REG_PRE_INCDEC;

58988

+

58989

+ /* PRE_MODIFY is more restricted than PRE_INC/PRE_DEC in that

58990

+ we don't allow PRE_MODIFY for some multi-register

58991

+ operations. */

58992

+ switch (m)

58993

+ {

58994

+ default:

58995

+ addr_mask |= RELOAD_REG_PRE_MODIFY;

58996

+ break;

58997

+

58998

+ case DImode:

58999

+ if (TARGET_POWERPC64)

59000

+ addr_mask |= RELOAD_REG_PRE_MODIFY;

59001

+ break;

59002

+

59003

+ case DFmode:

59004

+ case DDmode:

59005

+ if (TARGET_DF_INSN)

59006

+ addr_mask |= RELOAD_REG_PRE_MODIFY;

59007

+ break;

59008

+ }

59009

+ }

59010

+ }

59011

+

59012

+ /* GPR and FPR registers can do REG+OFFSET addressing, except

59013

+ possibly for SDmode. */

59014

+ if ((addr_mask != 0) && !indexed_only_p

59015

+ && (rc == RELOAD_REG_GPR || rc == RELOAD_REG_FPR))

59016

+ addr_mask |= RELOAD_REG_OFFSET;

59017

+

59018

+ reg_addr[m].addr_mask[rc] = addr_mask;

59019

+ any_addr_mask |= addr_mask;

59020

+ }

59021

+

59022

+ reg_addr[m].addr_mask[RELOAD_REG_ANY] = any_addr_mask;

59023

+ }

59024

+}

59025

+

59026

+

59027

/* Initialize the various global tables that are based on register size. */

59028

static void

59029

rs6000_init_hard_regno_mode_ok (bool global_init_p)

59030

{

59031

- int r, m, c;

59032

+ ssize_t r, m, c;

59033

int align64;

59034

int align32;

59035

59036

@@ -1987,21 +2439,55 @@

59037

rs6000_regno_regclass[VSCR_REGNO] = VRSAVE_REGS;

59038

rs6000_regno_regclass[SPE_ACC_REGNO] = SPE_ACC_REGS;

59039

rs6000_regno_regclass[SPEFSCR_REGNO] = SPEFSCR_REGS;

59040

+ rs6000_regno_regclass[TFHAR_REGNO] = SPR_REGS;

59041

+ rs6000_regno_regclass[TFIAR_REGNO] = SPR_REGS;

59042

+ rs6000_regno_regclass[TEXASR_REGNO] = SPR_REGS;

59043

rs6000_regno_regclass[ARG_POINTER_REGNUM] = BASE_REGS;

59044

rs6000_regno_regclass[FRAME_POINTER_REGNUM] = BASE_REGS;

59045

59046

- /* Precalculate vector information, this must be set up before the

59047

- rs6000_hard_regno_nregs_internal below. */

59048

- for (m = 0; m < NUM_MACHINE_MODES; ++m)

59049

+ /* Precalculate register class to simpler reload register class. We don't

59050

+ need all of the register classes that are combinations of different

59051

+ classes, just the simple ones that have constraint letters. */

59052

+ for (c = 0; c < N_REG_CLASSES; c++)

59053

+ reg_class_to_reg_type[c] = NO_REG_TYPE;

59054

+

59055

+ reg_class_to_reg_type[(int)GENERAL_REGS] = GPR_REG_TYPE;

59056

+ reg_class_to_reg_type[(int)BASE_REGS] = GPR_REG_TYPE;

59057

+ reg_class_to_reg_type[(int)VSX_REGS] = VSX_REG_TYPE;

59058

+ reg_class_to_reg_type[(int)VRSAVE_REGS] = SPR_REG_TYPE;

59059

+ reg_class_to_reg_type[(int)VSCR_REGS] = SPR_REG_TYPE;

59060

+ reg_class_to_reg_type[(int)LINK_REGS] = SPR_REG_TYPE;

59061

+ reg_class_to_reg_type[(int)CTR_REGS] = SPR_REG_TYPE;

59062

+ reg_class_to_reg_type[(int)LINK_OR_CTR_REGS] = SPR_REG_TYPE;

59063

+ reg_class_to_reg_type[(int)CR_REGS] = CR_REG_TYPE;

59064

+ reg_class_to_reg_type[(int)CR0_REGS] = CR_REG_TYPE;

59065

+ reg_class_to_reg_type[(int)SPE_ACC_REGS] = SPE_ACC_TYPE;

59066

+ reg_class_to_reg_type[(int)SPEFSCR_REGS] = SPEFSCR_REG_TYPE;

59067

+

59068

+ if (TARGET_VSX)

59069

{

59070

- rs6000_vector_unit[m] = rs6000_vector_mem[m] = VECTOR_NONE;

59071

- rs6000_vector_reload[m][0] = CODE_FOR_nothing;

59072

- rs6000_vector_reload[m][1] = CODE_FOR_nothing;

59073

+ reg_class_to_reg_type[(int)FLOAT_REGS] = VSX_REG_TYPE;

59074

+ reg_class_to_reg_type[(int)ALTIVEC_REGS] = VSX_REG_TYPE;

59075

}

59076

+ else

59077

+ {

59078

+ reg_class_to_reg_type[(int)FLOAT_REGS] = FPR_REG_TYPE;

59079

+ reg_class_to_reg_type[(int)ALTIVEC_REGS] = ALTIVEC_REG_TYPE;

59080

+ }

59081

59082

- for (c = 0; c < (int)(int)RS6000_CONSTRAINT_MAX; c++)

59083

- rs6000_constraints[c] = NO_REGS;

59084

+ /* Precalculate the valid memory formats as well as the vector information,

59085

+ this must be set up before the rs6000_hard_regno_nregs_internal calls

59086

+ below. */

59087

+ gcc_assert ((int)VECTOR_NONE == 0);

59088

+ memset ((void *) &rs6000_vector_unit[0], '\0', sizeof (rs6000_vector_unit));

59089

+ memset ((void *) &rs6000_vector_mem[0], '\0', sizeof (rs6000_vector_unit));

59090

59091

+ gcc_assert ((int)CODE_FOR_nothing == 0);

59092

+ memset ((void *) &reg_addr[0], '\0', sizeof (reg_addr));

59093

+

59094

+ gcc_assert ((int)NO_REGS == 0);

59095

+ memset ((void *) &rs6000_constraints[0], '\0', sizeof (rs6000_constraints));

59096

+

59097

/* The VSX hardware allows native alignment for vectors, but control whether the compiler

59098

believes it can use native alignment or still uses 128-bit alignment. */

59099

if (TARGET_VSX && !TARGET_VSX_ALIGN_128)

59100

@@ -2062,13 +2548,19 @@

59101

}

59102

}

59103

59104

- /* V2DImode, only allow under VSX, which can do V2DI insert/splat/extract.

59105

- Altivec doesn't have 64-bit support. */

59106

+ /* V2DImode, full mode depends on ISA 2.07 vector mode. Allow under VSX to

59107

+ do insert/splat/extract. Altivec doesn't have 64-bit integer support. */

59108

if (TARGET_VSX)

59109

{

59110

rs6000_vector_mem[V2DImode] = VECTOR_VSX;

59111

- rs6000_vector_unit[V2DImode] = VECTOR_NONE;

59112

+ rs6000_vector_unit[V2DImode]

59113

+ = (TARGET_P8_VECTOR) ? VECTOR_P8_VECTOR : VECTOR_NONE;

59114

rs6000_vector_align[V2DImode] = align64;

59115

+

59116

+ rs6000_vector_mem[V1TImode] = VECTOR_VSX;

59117

+ rs6000_vector_unit[V1TImode]

59118

+ = (TARGET_P8_VECTOR) ? VECTOR_P8_VECTOR : VECTOR_NONE;

59119

+ rs6000_vector_align[V1TImode] = 128;

59120

}

59121

59122

/* DFmode, see if we want to use the VSX unit. */

59123

@@ -2076,14 +2568,48 @@

59124

{

59125

rs6000_vector_unit[DFmode] = VECTOR_VSX;

59126

rs6000_vector_mem[DFmode]

59127

- = (TARGET_VSX_SCALAR_MEMORY ? VECTOR_VSX : VECTOR_NONE);

59128

+ = (TARGET_UPPER_REGS_DF ? VECTOR_VSX : VECTOR_NONE);

59129

rs6000_vector_align[DFmode] = align64;

59130

}

59131

59132

+ /* Allow TImode in VSX register and set the VSX memory macros. */

59133

+ if (TARGET_VSX && TARGET_VSX_TIMODE)

59134

+ {

59135

+ rs6000_vector_mem[TImode] = VECTOR_VSX;

59136

+ rs6000_vector_align[TImode] = align64;

59137

+ }

59138

+

59139

/* TODO add SPE and paired floating point vector support. */

59140

59141

/* Register class constraints for the constraints that depend on compile

59142

- switches. */

59143

+ switches. When the VSX code was added, different constraints were added

59144

+ based on the type (DFmode, V2DFmode, V4SFmode). For the vector types, all

59145

+ of the VSX registers are used. The register classes for scalar floating

59146

+ point types is set, based on whether we allow that type into the upper

59147

+ (Altivec) registers. GCC has register classes to target the Altivec

59148

+ registers for load/store operations, to select using a VSX memory

59149

+ operation instead of the traditional floating point operation. The

59150

+ constraints are:

59151

+

59152

+ d - Register class to use with traditional DFmode instructions.

59153

+ f - Register class to use with traditional SFmode instructions.

59154

+ v - Altivec register.

59155

+ wa - Any VSX register.

59156

+ wd - Preferred register class for V2DFmode.

59157

+ wf - Preferred register class for V4SFmode.

59158

+ wg - Float register for power6x move insns.

59159

+ wl - Float register if we can do 32-bit signed int loads.

59160

+ wm - VSX register for ISA 2.07 direct move operations.

59161

+ wr - GPR if 64-bit mode is permitted.

59162

+ ws - Register class to do ISA 2.06 DF operations.

59163

+ wu - Altivec register for ISA 2.07 VSX SF/SI load/stores.

59164

+ wv - Altivec register for ISA 2.06 VSX DF/DI load/stores.

59165

+ wt - VSX register for TImode in VSX registers.

59166

+ ww - Register class to do SF conversions in with VSX operations.

59167

+ wx - Float register if we can do 32-bit int stores.

59168

+ wy - Register class to do ISA 2.07 SF operations.

59169

+ wz - Float register if we can do 32-bit unsigned int loads. */

59170

+

59171

if (TARGET_HARD_FLOAT && TARGET_FPRS)

59172

rs6000_constraints[RS6000_CONSTRAINT_f] = FLOAT_REGS;

59173

59174

@@ -2092,64 +2618,164 @@

59175

59176

if (TARGET_VSX)

59177

{

59178

- /* At present, we just use VSX_REGS, but we have different constraints

59179

- based on the use, in case we want to fine tune the default register

59180

- class used. wa = any VSX register, wf = register class to use for

59181

- V4SF, wd = register class to use for V2DF, and ws = register classs to

59182

- use for DF scalars. */

59183

rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;

59184

+ rs6000_constraints[RS6000_CONSTRAINT_wd] = VSX_REGS;

59185

rs6000_constraints[RS6000_CONSTRAINT_wf] = VSX_REGS;

59186

- rs6000_constraints[RS6000_CONSTRAINT_wd] = VSX_REGS;

59187

- rs6000_constraints[RS6000_CONSTRAINT_ws] = (TARGET_VSX_SCALAR_MEMORY

59188

- ? VSX_REGS

59189

- : FLOAT_REGS);

59190

+

59191

+ if (TARGET_VSX_TIMODE)

59192

+ rs6000_constraints[RS6000_CONSTRAINT_wt] = VSX_REGS;

59193

+

59194

+ if (TARGET_UPPER_REGS_DF)

59195

+ {

59196

+ rs6000_constraints[RS6000_CONSTRAINT_ws] = VSX_REGS;

59197

+ rs6000_constraints[RS6000_CONSTRAINT_wv] = ALTIVEC_REGS;

59198

+ }

59199

+ else

59200

+ rs6000_constraints[RS6000_CONSTRAINT_ws] = FLOAT_REGS;

59201

}

59202

59203

+ /* Add conditional constraints based on various options, to allow us to

59204

+ collapse multiple insn patterns. */

59205

if (TARGET_ALTIVEC)

59206

rs6000_constraints[RS6000_CONSTRAINT_v] = ALTIVEC_REGS;

59207

59208

- /* Set up the reload helper functions. */

59209

+ if (TARGET_MFPGPR)

59210

+ rs6000_constraints[RS6000_CONSTRAINT_wg] = FLOAT_REGS;

59211

+

59212

+ if (TARGET_LFIWAX)

59213

+ rs6000_constraints[RS6000_CONSTRAINT_wl] = FLOAT_REGS;

59214

+

59215

+ if (TARGET_DIRECT_MOVE)

59216

+ rs6000_constraints[RS6000_CONSTRAINT_wm] = VSX_REGS;

59217

+

59218

+ if (TARGET_POWERPC64)

59219

+ rs6000_constraints[RS6000_CONSTRAINT_wr] = GENERAL_REGS;

59220

+

59221

+ if (TARGET_P8_VECTOR && TARGET_UPPER_REGS_SF)

59222

+ {

59223

+ rs6000_constraints[RS6000_CONSTRAINT_wu] = ALTIVEC_REGS;

59224

+ rs6000_constraints[RS6000_CONSTRAINT_wy] = VSX_REGS;

59225

+ rs6000_constraints[RS6000_CONSTRAINT_ww] = VSX_REGS;

59226

+ }

59227

+ else if (TARGET_P8_VECTOR)

59228

+ {

59229

+ rs6000_constraints[RS6000_CONSTRAINT_wy] = FLOAT_REGS;

59230

+ rs6000_constraints[RS6000_CONSTRAINT_ww] = FLOAT_REGS;

59231

+ }

59232

+ else if (TARGET_VSX)

59233

+ rs6000_constraints[RS6000_CONSTRAINT_ww] = FLOAT_REGS;

59234

+

59235

+ if (TARGET_STFIWX)

59236

+ rs6000_constraints[RS6000_CONSTRAINT_wx] = FLOAT_REGS;

59237

+

59238

+ if (TARGET_LFIWZX)

59239

+ rs6000_constraints[RS6000_CONSTRAINT_wz] = FLOAT_REGS;

59240

+

59241

+ /* Set up the reload helper and direct move functions. */

59242

if (TARGET_VSX || TARGET_ALTIVEC)

59243

{

59244

if (TARGET_64BIT)

59245

{

59246

- rs6000_vector_reload[V16QImode][0] = CODE_FOR_reload_v16qi_di_store;

59247

- rs6000_vector_reload[V16QImode][1] = CODE_FOR_reload_v16qi_di_load;

59248

- rs6000_vector_reload[V8HImode][0] = CODE_FOR_reload_v8hi_di_store;

59249

- rs6000_vector_reload[V8HImode][1] = CODE_FOR_reload_v8hi_di_load;

59250

- rs6000_vector_reload[V4SImode][0] = CODE_FOR_reload_v4si_di_store;

59251

- rs6000_vector_reload[V4SImode][1] = CODE_FOR_reload_v4si_di_load;

59252

- rs6000_vector_reload[V2DImode][0] = CODE_FOR_reload_v2di_di_store;

59253

- rs6000_vector_reload[V2DImode][1] = CODE_FOR_reload_v2di_di_load;

59254

- rs6000_vector_reload[V4SFmode][0] = CODE_FOR_reload_v4sf_di_store;

59255

- rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_di_load;

59256

- rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_di_store;

59257

- rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_di_load;

59258

- if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)

59259

+ reg_addr[V16QImode].reload_store = CODE_FOR_reload_v16qi_di_store;

59260

+ reg_addr[V16QImode].reload_load = CODE_FOR_reload_v16qi_di_load;

59261

+ reg_addr[V8HImode].reload_store = CODE_FOR_reload_v8hi_di_store;

59262

+ reg_addr[V8HImode].reload_load = CODE_FOR_reload_v8hi_di_load;

59263

+ reg_addr[V4SImode].reload_store = CODE_FOR_reload_v4si_di_store;

59264

+ reg_addr[V4SImode].reload_load = CODE_FOR_reload_v4si_di_load;

59265

+ reg_addr[V2DImode].reload_store = CODE_FOR_reload_v2di_di_store;

59266

+ reg_addr[V2DImode].reload_load = CODE_FOR_reload_v2di_di_load;

59267

+ reg_addr[V1TImode].reload_store = CODE_FOR_reload_v1ti_di_store;

59268

+ reg_addr[V1TImode].reload_load = CODE_FOR_reload_v1ti_di_load;

59269

+ reg_addr[V4SFmode].reload_store = CODE_FOR_reload_v4sf_di_store;

59270

+ reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_di_load;

59271

+ reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_di_store;

59272

+ reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_di_load;

59273

+ if (TARGET_VSX && TARGET_UPPER_REGS_DF)

59274

{

59275

- rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_di_store;

59276

- rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_di_load;

59277

+ reg_addr[DFmode].reload_store = CODE_FOR_reload_df_di_store;

59278

+ reg_addr[DFmode].reload_load = CODE_FOR_reload_df_di_load;

59279

+ reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_di_store;

59280

+ reg_addr[DDmode].reload_load = CODE_FOR_reload_dd_di_load;

59281

}

59282

+ if (TARGET_P8_VECTOR)

59283

+ {

59284

+ reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_di_store;

59285

+ reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_di_load;

59286

+ reg_addr[SDmode].reload_store = CODE_FOR_reload_sd_di_store;

59287

+ reg_addr[SDmode].reload_load = CODE_FOR_reload_sd_di_load;

59288

+ }

59289

+ if (TARGET_VSX_TIMODE)

59290

+ {

59291

+ reg_addr[TImode].reload_store = CODE_FOR_reload_ti_di_store;

59292

+ reg_addr[TImode].reload_load = CODE_FOR_reload_ti_di_load;

59293

+ }

59294

+ if (TARGET_DIRECT_MOVE)

59295

+ {

59296

+ if (TARGET_POWERPC64)

59297

+ {

59298

+ reg_addr[TImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxti;

59299

+ reg_addr[V1TImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv1ti;

59300

+ reg_addr[V2DFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv2df;

59301

+ reg_addr[V2DImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv2di;

59302

+ reg_addr[V4SFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv4sf;

59303

+ reg_addr[V4SImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv4si;

59304

+ reg_addr[V8HImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv8hi;

59305

+ reg_addr[V16QImode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxv16qi;

59306

+ reg_addr[SFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxsf;

59307

+

59308

+ reg_addr[TImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprti;

59309

+ reg_addr[V1TImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv1ti;

59310

+ reg_addr[V2DFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv2df;

59311

+ reg_addr[V2DImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv2di;

59312

+ reg_addr[V4SFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv4sf;

59313

+ reg_addr[V4SImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv4si;

59314

+ reg_addr[V8HImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv8hi;

59315

+ reg_addr[V16QImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv16qi;

59316

+ reg_addr[SFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprsf;

59317

+ }

59318

+ else

59319

+ {

59320

+ reg_addr[DImode].reload_fpr_gpr = CODE_FOR_reload_fpr_from_gprdi;

59321

+ reg_addr[DDmode].reload_fpr_gpr = CODE_FOR_reload_fpr_from_gprdd;

59322

+ reg_addr[DFmode].reload_fpr_gpr = CODE_FOR_reload_fpr_from_gprdf;

59323

+ }

59324

+ }

59325

}

59326

else

59327

{

59328

- rs6000_vector_reload[V16QImode][0] = CODE_FOR_reload_v16qi_si_store;

59329

- rs6000_vector_reload[V16QImode][1] = CODE_FOR_reload_v16qi_si_load;

59330

- rs6000_vector_reload[V8HImode][0] = CODE_FOR_reload_v8hi_si_store;

59331

- rs6000_vector_reload[V8HImode][1] = CODE_FOR_reload_v8hi_si_load;

59332

- rs6000_vector_reload[V4SImode][0] = CODE_FOR_reload_v4si_si_store;

59333

- rs6000_vector_reload[V4SImode][1] = CODE_FOR_reload_v4si_si_load;

59334

- rs6000_vector_reload[V2DImode][0] = CODE_FOR_reload_v2di_si_store;

59335

- rs6000_vector_reload[V2DImode][1] = CODE_FOR_reload_v2di_si_load;

59336

- rs6000_vector_reload[V4SFmode][0] = CODE_FOR_reload_v4sf_si_store;

59337

- rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_si_load;

59338

- rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_si_store;

59339

- rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_si_load;

59340

- if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)

59341

+ reg_addr[V16QImode].reload_store = CODE_FOR_reload_v16qi_si_store;

59342

+ reg_addr[V16QImode].reload_load = CODE_FOR_reload_v16qi_si_load;

59343

+ reg_addr[V8HImode].reload_store = CODE_FOR_reload_v8hi_si_store;

59344

+ reg_addr[V8HImode].reload_load = CODE_FOR_reload_v8hi_si_load;

59345

+ reg_addr[V4SImode].reload_store = CODE_FOR_reload_v4si_si_store;

59346

+ reg_addr[V4SImode].reload_load = CODE_FOR_reload_v4si_si_load;

59347

+ reg_addr[V2DImode].reload_store = CODE_FOR_reload_v2di_si_store;

59348

+ reg_addr[V2DImode].reload_load = CODE_FOR_reload_v2di_si_load;

59349

+ reg_addr[V1TImode].reload_store = CODE_FOR_reload_v1ti_si_store;

59350

+ reg_addr[V1TImode].reload_load = CODE_FOR_reload_v1ti_si_load;

59351

+ reg_addr[V4SFmode].reload_store = CODE_FOR_reload_v4sf_si_store;

59352

+ reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_si_load;

59353

+ reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_si_store;

59354

+ reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_si_load;

59355

+ if (TARGET_VSX && TARGET_UPPER_REGS_DF)

59356

{

59357

- rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_si_store;

59358

- rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_si_load;

59359

+ reg_addr[DFmode].reload_store = CODE_FOR_reload_df_si_store;

59360

+ reg_addr[DFmode].reload_load = CODE_FOR_reload_df_si_load;

59361

+ reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_si_store;

59362

+ reg_addr[DDmode].reload_load = CODE_FOR_reload_dd_si_load;

59363

}

59364

+ if (TARGET_P8_VECTOR)

59365

+ {

59366

+ reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_si_store;

59367

+ reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_si_load;

59368

+ reg_addr[SDmode].reload_store = CODE_FOR_reload_sd_si_store;

59369

+ reg_addr[SDmode].reload_load = CODE_FOR_reload_sd_si_load;

59370

+ }

59371

+ if (TARGET_VSX_TIMODE)

59372

+ {

59373

+ reg_addr[TImode].reload_store = CODE_FOR_reload_ti_si_store;

59374

+ reg_addr[TImode].reload_load = CODE_FOR_reload_ti_si_load;

59375

+ }

59376

}

59377

}

59378

59379

@@ -2267,6 +2893,11 @@

59380

}

59381

}

59382

59383

+ /* Update the addr mask bits in reg_addr to help secondary reload and go if

59384

+ legitimate address support to figure out the appropriate addressing to

59385

+ use. */

59386

+ rs6000_setup_reg_addr_masks ();

59387

+

59388

if (global_init_p || TARGET_DEBUG_TARGET)

59389

{

59390

if (TARGET_DEBUG_REG)

59391

@@ -2369,16 +3000,21 @@

59392

HOST_WIDE_INT

59393

rs6000_builtin_mask_calculate (void)

59394

{

59395

- return (((TARGET_ALTIVEC) ? RS6000_BTM_ALTIVEC : 0)

59396

- | ((TARGET_VSX) ? RS6000_BTM_VSX : 0)

59397

- | ((TARGET_SPE) ? RS6000_BTM_SPE : 0)

59398

- | ((TARGET_PAIRED_FLOAT) ? RS6000_BTM_PAIRED : 0)

59399

- | ((TARGET_FRE) ? RS6000_BTM_FRE : 0)

59400

- | ((TARGET_FRES) ? RS6000_BTM_FRES : 0)

59401

- | ((TARGET_FRSQRTE) ? RS6000_BTM_FRSQRTE : 0)

59402

- | ((TARGET_FRSQRTES) ? RS6000_BTM_FRSQRTES : 0)

59403

- | ((TARGET_POPCNTD) ? RS6000_BTM_POPCNTD : 0)

59404

- | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0));

59405

+ return (((TARGET_ALTIVEC) ? RS6000_BTM_ALTIVEC : 0)

59406

+ | ((TARGET_VSX) ? RS6000_BTM_VSX : 0)

59407

+ | ((TARGET_SPE) ? RS6000_BTM_SPE : 0)

59408

+ | ((TARGET_PAIRED_FLOAT) ? RS6000_BTM_PAIRED : 0)

59409

+ | ((TARGET_FRE) ? RS6000_BTM_FRE : 0)

59410

+ | ((TARGET_FRES) ? RS6000_BTM_FRES : 0)

59411

+ | ((TARGET_FRSQRTE) ? RS6000_BTM_FRSQRTE : 0)

59412

+ | ((TARGET_FRSQRTES) ? RS6000_BTM_FRSQRTES : 0)

59413

+ | ((TARGET_POPCNTD) ? RS6000_BTM_POPCNTD : 0)

59414

+ | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0)

59415

+ | ((TARGET_P8_VECTOR) ? RS6000_BTM_P8_VECTOR : 0)

59416

+ | ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0)

59417

+ | ((TARGET_HTM) ? RS6000_BTM_HTM : 0)

59418

+ | ((TARGET_DFP) ? RS6000_BTM_DFP : 0)

59419

+ | ((TARGET_HARD_FLOAT) ? RS6000_BTM_HARD_FLOAT : 0));

59420

}

59421

59422

/* Override command line options. Mostly we process the processor type and

59423

@@ -2415,7 +3051,8 @@

59424

calculation works better for RTL loop invariant motion on targets

59425

with enough (>= 32) registers. It is an expensive optimization.

59426

So it is on only for peak performance. */

59427

- if (optimize >= 3 && global_init_p)

59428

+ if (optimize >= 3 && global_init_p

59429

+ && !global_options_set.x_flag_ira_loop_pressure)

59430

flag_ira_loop_pressure = 1;

59431

59432

/* Set the pointer size. */

59433

@@ -2609,6 +3246,24 @@

59434

}

59435

}

59436

59437

+ /* If little-endian, default to -mstrict-align on older processors.

59438

+ Testing for htm matches power8 and later. */

59439

+ if (!BYTES_BIG_ENDIAN

59440

+ && !(processor_target_table[tune_index].target_enable & OPTION_MASK_HTM))

59441

+ rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;

59442

+

59443

+ /* -maltivec={le,be} implies -maltivec. */

59444

+ if (rs6000_altivec_element_order != 0)

59445

+ rs6000_isa_flags |= OPTION_MASK_ALTIVEC;

59446

+

59447

+ /* Disallow -maltivec=le in big endian mode for now. This is not

59448

+ known to be useful for anyone. */

59449

+ if (BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 1)

59450

+ {

59451

+ warning (0, N_("-maltivec=le not allowed for big-endian targets"));

59452

+ rs6000_altivec_element_order = 0;

59453

+ }

59454

+

59455

/* Add some warnings for VSX. */

59456

if (TARGET_VSX)

59457

{

59458

@@ -2619,15 +3274,13 @@

59459

if (rs6000_isa_flags_explicit & OPTION_MASK_VSX)

59460

msg = N_("-mvsx requires hardware floating point");

59461

else

59462

- rs6000_isa_flags &= ~ OPTION_MASK_VSX;

59463

+ {

59464

+ rs6000_isa_flags &= ~ OPTION_MASK_VSX;

59465

+ rs6000_isa_flags_explicit |= OPTION_MASK_VSX;

59466

+ }

59467

}

59468

else if (TARGET_PAIRED_FLOAT)

59469

msg = N_("-mvsx and -mpaired are incompatible");

59470

- /* The hardware will allow VSX and little endian, but until we make sure

59471

- things like vector select, etc. work don't allow VSX on little endian

59472

- systems at this point. */

59473

- else if (!BYTES_BIG_ENDIAN)

59474

- msg = N_("-mvsx used with little endian code");

59475

else if (TARGET_AVOID_XFORM > 0)

59476

msg = N_("-mvsx needs indexed addressing");

59477

else if (!TARGET_ALTIVEC && (rs6000_isa_flags_explicit

59478

@@ -2647,9 +3300,24 @@

59479

}

59480

}

59481

59482

+ /* If hard-float/altivec/vsx were explicitly turned off then don't allow

59483

+ the -mcpu setting to enable options that conflict. */

59484

+ if ((!TARGET_HARD_FLOAT || !TARGET_ALTIVEC || !TARGET_VSX)

59485

+ && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT

59486

+ | OPTION_MASK_ALTIVEC

59487

+ | OPTION_MASK_VSX)) != 0)

59488

+ rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO

59489

+ | OPTION_MASK_DIRECT_MOVE)

59490

+ & ~rs6000_isa_flags_explicit);

59491

+

59492

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

59493

+ rs6000_print_isa_options (stderr, 0, "before defaults", rs6000_isa_flags);

59494

+

59495

/* For the newer switches (vsx, dfp, etc.) set some of the older options,

59496

unless the user explicitly used the -mno-<option> to disable the code. */

59497

- if (TARGET_VSX)

59498

+ if (TARGET_P8_VECTOR || TARGET_DIRECT_MOVE || TARGET_CRYPTO)

59499

+ rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~rs6000_isa_flags_explicit);

59500

+ else if (TARGET_VSX)

59501

rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~rs6000_isa_flags_explicit);

59502

else if (TARGET_POPCNTD)

59503

rs6000_isa_flags |= (ISA_2_6_MASKS_EMBEDDED & ~rs6000_isa_flags_explicit);

59504

@@ -2664,6 +3332,99 @@

59505

else if (TARGET_ALTIVEC)

59506

rs6000_isa_flags |= (OPTION_MASK_PPC_GFXOPT & ~rs6000_isa_flags_explicit);

59507

59508

+ if (TARGET_CRYPTO && !TARGET_ALTIVEC)

59509

+ {

59510

+ if (rs6000_isa_flags_explicit & OPTION_MASK_CRYPTO)

59511

+ error ("-mcrypto requires -maltivec");

59512

+ rs6000_isa_flags &= ~OPTION_MASK_CRYPTO;

59513

+ }

59514

+

59515

+ if (TARGET_DIRECT_MOVE && !TARGET_VSX)

59516

+ {

59517

+ if (rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE)

59518

+ error ("-mdirect-move requires -mvsx");

59519

+ rs6000_isa_flags &= ~OPTION_MASK_DIRECT_MOVE;

59520

+ }

59521

+

59522

+ if (TARGET_P8_VECTOR && !TARGET_ALTIVEC)

59523

+ {

59524

+ if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)

59525

+ error ("-mpower8-vector requires -maltivec");

59526

+ rs6000_isa_flags &= ~OPTION_MASK_P8_VECTOR;

59527

+ }

59528

+

59529

+ if (TARGET_P8_VECTOR && !TARGET_VSX)

59530

+ {

59531

+ if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)

59532

+ error ("-mpower8-vector requires -mvsx");

59533

+ rs6000_isa_flags &= ~OPTION_MASK_P8_VECTOR;

59534

+ }

59535

+

59536

+ if (TARGET_VSX_TIMODE && !TARGET_VSX)

59537

+ {

59538

+ if (rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE)

59539

+ error ("-mvsx-timode requires -mvsx");

59540

+ rs6000_isa_flags &= ~OPTION_MASK_VSX_TIMODE;

59541

+ }

59542

+

59543

+ if (TARGET_DFP && !TARGET_HARD_FLOAT)

59544

+ {

59545

+ if (rs6000_isa_flags_explicit & OPTION_MASK_DFP)

59546

+ error ("-mhard-dfp requires -mhard-float");

59547

+ rs6000_isa_flags &= ~OPTION_MASK_DFP;

59548

+ }

59549

+

59550

+ /* The quad memory instructions only works in 64-bit mode. In 32-bit mode,

59551

+ silently turn off quad memory mode. */

59552

+ if ((TARGET_QUAD_MEMORY || TARGET_QUAD_MEMORY_ATOMIC) && !TARGET_POWERPC64)

59553

+ {

59554

+ if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY) != 0)

59555

+ warning (0, N_("-mquad-memory requires 64-bit mode"));

59556

+

59557

+ if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY_ATOMIC) != 0)

59558

+ warning (0, N_("-mquad-memory-atomic requires 64-bit mode"));

59559

+

59560

+ rs6000_isa_flags &= ~(OPTION_MASK_QUAD_MEMORY

59561

+ | OPTION_MASK_QUAD_MEMORY_ATOMIC);

59562

+ }

59563

+

59564

+ /* Non-atomic quad memory load/store are disabled for little endian, since

59565

+ the words are reversed, but atomic operations can still be done by

59566

+ swapping the words. */

59567

+ if (TARGET_QUAD_MEMORY && !WORDS_BIG_ENDIAN)

59568

+ {

59569

+ if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY) != 0)

59570

+ warning (0, N_("-mquad-memory is not available in little endian mode"));

59571

+

59572

+ rs6000_isa_flags &= ~OPTION_MASK_QUAD_MEMORY;

59573

+ }

59574

+

59575

+ /* Assume if the user asked for normal quad memory instructions, they want

59576

+ the atomic versions as well, unless they explicity told us not to use quad

59577

+ word atomic instructions. */

59578

+ if (TARGET_QUAD_MEMORY

59579

+ && !TARGET_QUAD_MEMORY_ATOMIC

59580

+ && ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY_ATOMIC) == 0))

59581

+ rs6000_isa_flags |= OPTION_MASK_QUAD_MEMORY_ATOMIC;

59582

+

59583

+ /* Enable power8 fusion if we are tuning for power8, even if we aren't

59584

+ generating power8 instructions. */

59585

+ if (!(rs6000_isa_flags_explicit & OPTION_MASK_P8_FUSION))

59586

+ rs6000_isa_flags |= (processor_target_table[tune_index].target_enable

59587

+ & OPTION_MASK_P8_FUSION);

59588

+

59589

+ /* Power8 does not fuse sign extended loads with the addis. If we are

59590

+ optimizing at high levels for speed, convert a sign extended load into a

59591

+ zero extending load, and an explicit sign extension. */

59592

+ if (TARGET_P8_FUSION

59593

+ && !(rs6000_isa_flags_explicit & OPTION_MASK_P8_FUSION_SIGN)

59594

+ && optimize_function_for_speed_p (cfun)

59595

+ && optimize >= 3)

59596

+ rs6000_isa_flags |= OPTION_MASK_P8_FUSION_SIGN;

59597

+

59598

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

59599

+ rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags);

59600

+

59601

/* E500mc does "better" if we inline more aggressively. Respect the

59602

user's opinion, though. */

59603

if (rs6000_block_move_inline_limit == 0

59604

@@ -2787,9 +3548,13 @@

59605

59606

/* Place FP constants in the constant pool instead of TOC

59607

if section anchors enabled. */

59608

- if (flag_section_anchors)

59609

+ if (flag_section_anchors

59610

+ && !global_options_set.x_TARGET_NO_FP_IN_TOC)

59611

TARGET_NO_FP_IN_TOC = 1;

59612

59613

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

59614

+ rs6000_print_isa_options (stderr, 0, "before subtarget", rs6000_isa_flags);

59615

+

59616

#ifdef SUBTARGET_OVERRIDE_OPTIONS

59617

SUBTARGET_OVERRIDE_OPTIONS;

59618

#endif

59619

@@ -2800,6 +3565,9 @@

59620

SUB3TARGET_OVERRIDE_OPTIONS;

59621

#endif

59622

59623

+ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)

59624

+ rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags);

59625

+

59626

/* For the E500 family of cores, reset the single/double FP flags to let us

59627

check that they remain constant across attributes or pragmas. Also,

59628

clear a possible request for string instructions, not supported and which

59629

@@ -2849,16 +3617,19 @@

59630

&& rs6000_cpu != PROCESSOR_POWER5

59631

&& rs6000_cpu != PROCESSOR_POWER6

59632

&& rs6000_cpu != PROCESSOR_POWER7

59633

+ && rs6000_cpu != PROCESSOR_POWER8

59634

&& rs6000_cpu != PROCESSOR_PPCA2

59635

&& rs6000_cpu != PROCESSOR_CELL

59636

&& rs6000_cpu != PROCESSOR_PPC476);

59637

rs6000_sched_groups = (rs6000_cpu == PROCESSOR_POWER4

59638

|| rs6000_cpu == PROCESSOR_POWER5

59639

- || rs6000_cpu == PROCESSOR_POWER7);

59640

+ || rs6000_cpu == PROCESSOR_POWER7

59641

+ || rs6000_cpu == PROCESSOR_POWER8);

59642

rs6000_align_branch_targets = (rs6000_cpu == PROCESSOR_POWER4

59643

|| rs6000_cpu == PROCESSOR_POWER5

59644

|| rs6000_cpu == PROCESSOR_POWER6

59645

|| rs6000_cpu == PROCESSOR_POWER7

59646

+ || rs6000_cpu == PROCESSOR_POWER8

59647

|| rs6000_cpu == PROCESSOR_PPCE500MC

59648

|| rs6000_cpu == PROCESSOR_PPCE500MC64

59649

|| rs6000_cpu == PROCESSOR_PPCE5500

59650

@@ -2988,7 +3759,7 @@

59651

59652

/* We should always be splitting complex arguments, but we can't break

59653

Linux and Darwin ABIs at the moment. For now, only AIX is fixed. */

59654

- if (DEFAULT_ABI != ABI_AIX)

59655

+ if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN)

59656

targetm.calls.split_complex_arg = NULL;

59657

}

59658

59659

@@ -3102,6 +3873,10 @@

59660

rs6000_cost = &power7_cost;

59661

break;

59662

59663

+ case PROCESSOR_POWER8:

59664

+ rs6000_cost = &power8_cost;

59665

+ break;

59666

+

59667

case PROCESSOR_PPCA2:

59668

rs6000_cost = &ppca2_cost;

59669

break;

59670

@@ -3274,7 +4049,8 @@

59671

&& (rs6000_cpu == PROCESSOR_POWER4

59672

|| rs6000_cpu == PROCESSOR_POWER5

59673

|| rs6000_cpu == PROCESSOR_POWER6

59674

- || rs6000_cpu == PROCESSOR_POWER7))

59675

+ || rs6000_cpu == PROCESSOR_POWER7

59676

+ || rs6000_cpu == PROCESSOR_POWER8))

59677

return 5;

59678

else

59679

return align_loops_log;

59680

@@ -3493,6 +4269,8 @@

59681

{

59682

case SFmode:

59683

return V4SFmode;

59684

+ case TImode:

59685

+ return V1TImode;

59686

case DImode:

59687

return V2DImode;

59688

case SImode:

59689

@@ -3813,6 +4591,22 @@

59690

enum built_in_function fn = DECL_FUNCTION_CODE (fndecl);

59691

switch (fn)

59692

{

59693

+ case BUILT_IN_CLZIMAX:

59694

+ case BUILT_IN_CLZLL:

59695

+ case BUILT_IN_CLZL:

59696

+ case BUILT_IN_CLZ:

59697

+ if (TARGET_P8_VECTOR && in_mode == out_mode && out_n == in_n)

59698

+ {

59699

+ if (out_mode == QImode && out_n == 16)

59700

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZB];

59701

+ else if (out_mode == HImode && out_n == 8)

59702

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZH];

59703

+ else if (out_mode == SImode && out_n == 4)

59704

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZW];

59705

+ else if (out_mode == DImode && out_n == 2)

59706

+ return rs6000_builtin_decls[P8V_BUILTIN_VCLZD];

59707

+ }

59708

+ break;

59709

case BUILT_IN_COPYSIGN:

59710

if (VECTOR_UNIT_VSX_P (V2DFmode)

59711

&& out_mode == DFmode && out_n == 2

59712

@@ -3828,6 +4622,22 @@

59713

if (VECTOR_UNIT_ALTIVEC_P (V4SFmode))

59714

return rs6000_builtin_decls[ALTIVEC_BUILTIN_COPYSIGN_V4SF];

59715

break;

59716

+ case BUILT_IN_POPCOUNTIMAX:

59717

+ case BUILT_IN_POPCOUNTLL:

59718

+ case BUILT_IN_POPCOUNTL:

59719

+ case BUILT_IN_POPCOUNT:

59720

+ if (TARGET_P8_VECTOR && in_mode == out_mode && out_n == in_n)

59721

+ {

59722

+ if (out_mode == QImode && out_n == 16)

59723

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTB];

59724

+ else if (out_mode == HImode && out_n == 8)

59725

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTH];

59726

+ else if (out_mode == SImode && out_n == 4)

59727

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTW];

59728

+ else if (out_mode == DImode && out_n == 2)

59729

+ return rs6000_builtin_decls[P8V_BUILTIN_VPOPCNTD];

59730

+ }

59731

+ break;

59732

case BUILT_IN_SQRT:

59733

if (VECTOR_UNIT_VSX_P (V2DFmode)

59734

&& out_mode == DFmode && out_n == 2

59735

@@ -4043,7 +4853,11 @@

59736

putc ('\n', file);

59737

}

59738

59739

- if (DEFAULT_ABI == ABI_AIX || (TARGET_ELF && flag_pic == 2))

59740

+ if (DEFAULT_ABI == ABI_ELFv2)

59741

+ fprintf (file, "\t.abiversion 2\n");

59742

+

59743

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2

59744

+ || (TARGET_ELF && flag_pic == 2))

59745

{

59746

switch_to_section (toc_section);

59747

switch_to_section (text_section);

59748

@@ -4230,7 +5044,7 @@

59749

HOST_WIDE_INT splat_val;

59750

HOST_WIDE_INT msb_val;

59751

59752

- if (mode == V2DImode || mode == V2DFmode)

59753

+ if (mode == V2DImode || mode == V2DFmode || mode == V1TImode)

59754

return false;

59755

59756

nunits = GET_MODE_NUNITS (mode);

59757

@@ -4239,7 +5053,7 @@

59758

59759

val = const_vector_elt_as_int (op, BYTES_BIG_ENDIAN ? nunits - 1 : 0);

59760

splat_val = val;

59761

- msb_val = val > 0 ? 0 : -1;

59762

+ msb_val = val >= 0 ? 0 : -1;

59763

59764

/* Construct the value to be splatted, if possible. If not, return 0. */

59765

for (i = 2; i <= copies; i *= 2)

59766

@@ -4274,15 +5088,16 @@

59767

59768

/* Check if VAL is present in every STEP-th element, and the

59769

other elements are filled with its most significant bit. */

59770

- for (i = 0; i < nunits - 1; ++i)

59771

+ for (i = 1; i < nunits; ++i)

59772

{

59773

HOST_WIDE_INT desired_val;

59774

- if (((BYTES_BIG_ENDIAN ? i + 1 : i) & (step - 1)) == 0)

59775

+ unsigned elt = BYTES_BIG_ENDIAN ? nunits - 1 - i : i;

59776

+ if ((i & (step - 1)) == 0)

59777

desired_val = val;

59778

else

59779

desired_val = msb_val;

59780

59781

- if (desired_val != const_vector_elt_as_int (op, i))

59782

+ if (desired_val != const_vector_elt_as_int (op, elt))

59783

return false;

59784

}

59785

59786

@@ -4308,7 +5123,7 @@

59787

if (mode == V2DFmode)

59788

return zero_constant (op, mode);

59789

59790

- if (mode == V2DImode)

59791

+ else if (mode == V2DImode)

59792

{

59793

/* In case the compiler is built 32-bit, CONST_DOUBLE constants are not

59794

easy. */

59795

@@ -4326,6 +5141,10 @@

59796

return false;

59797

}

59798

59799

+ /* V1TImode is a special container for TImode. Ignore for now. */

59800

+ else if (mode == V1TImode)

59801

+ return false;

59802

+

59803

/* Start with a vspltisw. */

59804

step = GET_MODE_NUNITS (mode) / 4;

59805

copies = 1;

59806

@@ -4407,7 +5226,7 @@

59807

if (zero_constant (vec, mode))

59808

return "xxlxor %x0,%x0,%x0";

59809

59810

- if (mode == V2DImode

59811

+ if ((mode == V2DImode || mode == V1TImode)

59812

&& INTVAL (CONST_VECTOR_ELT (vec, 0)) == -1

59813

&& INTVAL (CONST_VECTOR_ELT (vec, 1)) == -1)

59814

return "vspltisw %0,-1";

59815

@@ -4698,9 +5517,12 @@

59816

{

59817

rtx freg = gen_reg_rtx (V4SFmode);

59818

rtx sreg = force_reg (SFmode, XVECEXP (vals, 0, 0));

59819

+ rtx cvt = ((TARGET_XSCVDPSPN)

59820

+ ? gen_vsx_xscvdpspn_scalar (freg, sreg)

59821

+ : gen_vsx_xscvdpsp_scalar (freg, sreg));

59822

59823

- emit_insn (gen_vsx_xscvdpsp_scalar (freg, sreg));

59824

- emit_insn (gen_vsx_xxspltw_v4sf (target, freg, const0_rtx));

59825

+ emit_insn (cvt);

59826

+ emit_insn (gen_vsx_xxspltw_v4sf_direct (target, freg, const0_rtx));

59827

}

59828

else

59829

{

59830

@@ -4790,6 +5612,13 @@

59831

return;

59832

}

59833

59834

+ /* Simplify setting single element vectors like V1TImode. */

59835

+ if (GET_MODE_SIZE (mode) == GET_MODE_SIZE (inner_mode) && elt == 0)

59836

+ {

59837

+ emit_move_insn (target, gen_lowpart (mode, val));

59838

+ return;

59839

+ }

59840

+

59841

/* Load single variable value. */

59842

mem = assign_stack_temp (mode, GET_MODE_SIZE (inner_mode));

59843

emit_move_insn (adjust_address_nv (mem, inner_mode, 0), val);

59844

@@ -4811,10 +5640,29 @@

59845

XVECEXP (mask, 0, elt*width + i)

59846

= GEN_INT (i + 0x10);

59847

x = gen_rtx_CONST_VECTOR (V16QImode, XVEC (mask, 0));

59848

- x = gen_rtx_UNSPEC (mode,

59849

- gen_rtvec (3, target, reg,

59850

- force_reg (V16QImode, x)),

59851

- UNSPEC_VPERM);

59852

+

59853

+ if (BYTES_BIG_ENDIAN)

59854

+ x = gen_rtx_UNSPEC (mode,

59855

+ gen_rtvec (3, target, reg,

59856

+ force_reg (V16QImode, x)),

59857

+ UNSPEC_VPERM);

59858

+ else

59859

+ {

59860

+ /* Invert selector. We prefer to generate VNAND on P8 so

59861

+ that future fusion opportunities can kick in, but must

59862

+ generate VNOR elsewhere. */

59863

+ rtx notx = gen_rtx_NOT (V16QImode, force_reg (V16QImode, x));

59864

+ rtx iorx = (TARGET_P8_VECTOR

59865

+ ? gen_rtx_IOR (V16QImode, notx, notx)

59866

+ : gen_rtx_AND (V16QImode, notx, notx));

59867

+ rtx tmp = gen_reg_rtx (V16QImode);

59868

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, iorx));

59869

+

59870

+ /* Permute with operands reversed and adjusted selector. */

59871

+ x = gen_rtx_UNSPEC (mode, gen_rtvec (3, reg, target, tmp),

59872

+ UNSPEC_VPERM);

59873

+ }

59874

+

59875

emit_insn (gen_rtx_SET (VOIDmode, target, x));

59876

}

59877

59878

@@ -4833,6 +5681,10 @@

59879

{

59880

default:

59881

break;

59882

+ case V1TImode:

59883

+ gcc_assert (elt == 0 && inner_mode == TImode);

59884

+ emit_move_insn (target, gen_lowpart (TImode, vec));

59885

+ break;

59886

case V2DFmode:

59887

emit_insn (gen_vsx_extract_v2df (target, vec, GEN_INT (elt)));

59888

return;

59889

@@ -4938,7 +5790,7 @@

59890

purpose. */

59891

if (GET_CODE (op) == SUBREG

59892

&& (mode == SImode || mode == DImode || mode == TImode

59893

- || mode == DDmode || mode == TDmode)

59894

+ || mode == DDmode || mode == TDmode || mode == PTImode)

59895

&& REG_P (SUBREG_REG (op))

59896

&& (GET_MODE (SUBREG_REG (op)) == DFmode

59897

|| GET_MODE (SUBREG_REG (op)) == TFmode))

59898

@@ -4951,6 +5803,7 @@

59899

&& REG_P (SUBREG_REG (op))

59900

&& (GET_MODE (SUBREG_REG (op)) == DImode

59901

|| GET_MODE (SUBREG_REG (op)) == TImode

59902

+ || GET_MODE (SUBREG_REG (op)) == PTImode

59903

|| GET_MODE (SUBREG_REG (op)) == DDmode

59904

|| GET_MODE (SUBREG_REG (op)) == TDmode))

59905

return true;

59906

@@ -4966,6 +5819,48 @@

59907

return false;

59908

}

59909

59910

+/* Return alignment of TYPE. Existing alignment is ALIGN. HOW

59911

+ selects whether the alignment is abi mandated, optional, or

59912

+ both abi and optional alignment. */

59913

+

59914

+unsigned int

59915

+rs6000_data_alignment (tree type, unsigned int align, enum data_align how)

59916

+{

59917

+ if (how != align_opt)

59918

+ {

59919

+ if (TREE_CODE (type) == VECTOR_TYPE)

59920

+ {

59921

+ if ((TARGET_SPE && SPE_VECTOR_MODE (TYPE_MODE (type)))

59922

+ || (TARGET_PAIRED_FLOAT && PAIRED_VECTOR_MODE (TYPE_MODE (type))))

59923

+ {

59924

+ if (align < 64)

59925

+ align = 64;

59926

+ }

59927

+ else if (align < 128)

59928

+ align = 128;

59929

+ }

59930

+ else if (TARGET_E500_DOUBLE

59931

+ && TREE_CODE (type) == REAL_TYPE

59932

+ && TYPE_MODE (type) == DFmode)

59933

+ {

59934

+ if (align < 64)

59935

+ align = 64;

59936

+ }

59937

+ }

59938

+

59939

+ if (how != align_abi)

59940

+ {

59941

+ if (TREE_CODE (type) == ARRAY_TYPE

59942

+ && TYPE_MODE (TREE_TYPE (type)) == QImode)

59943

+ {

59944

+ if (align < BITS_PER_WORD)

59945

+ align = BITS_PER_WORD;

59946

+ }

59947

+ }

59948

+

59949

+ return align;

59950

+}

59951

+

59952

/* AIX increases natural record alignment to doubleword if the first

59953

field is an FP double while the FP fields remain word aligned. */

59954

59955

@@ -5087,6 +5982,73 @@

59956

|| (REG_P (op1) && INT_REGNO_P (REGNO (op1))));

59957

}

59958

59959

+/* Return true if this is a move direct operation between GPR registers and

59960

+ floating point/VSX registers. */

59961

+

59962

+bool

59963

+direct_move_p (rtx op0, rtx op1)

59964

+{

59965

+ int regno0, regno1;

59966

+

59967

+ if (!REG_P (op0) || !REG_P (op1))

59968

+ return false;

59969

+

59970

+ if (!TARGET_DIRECT_MOVE && !TARGET_MFPGPR)

59971

+ return false;

59972

+

59973

+ regno0 = REGNO (op0);

59974

+ regno1 = REGNO (op1);

59975

+ if (regno0 >= FIRST_PSEUDO_REGISTER || regno1 >= FIRST_PSEUDO_REGISTER)

59976

+ return false;

59977

+

59978

+ if (INT_REGNO_P (regno0))

59979

+ return (TARGET_DIRECT_MOVE) ? VSX_REGNO_P (regno1) : FP_REGNO_P (regno1);

59980

+

59981

+ else if (INT_REGNO_P (regno1))

59982

+ {

59983

+ if (TARGET_MFPGPR && FP_REGNO_P (regno0))

59984

+ return true;

59985

+

59986

+ else if (TARGET_DIRECT_MOVE && VSX_REGNO_P (regno0))

59987

+ return true;

59988

+ }

59989

+

59990

+ return false;

59991

+}

59992

+

59993

+/* Return true if this is a load or store quad operation. This function does

59994

+ not handle the atomic quad memory instructions. */

59995

+

59996

+bool

59997

+quad_load_store_p (rtx op0, rtx op1)

59998

+{

59999

+ bool ret;

60000

+

60001

+ if (!TARGET_QUAD_MEMORY)

60002

+ ret = false;

60003

+

60004

+ else if (REG_P (op0) && MEM_P (op1))

60005

+ ret = (quad_int_reg_operand (op0, GET_MODE (op0))

60006

+ && quad_memory_operand (op1, GET_MODE (op1))

60007

+ && !reg_overlap_mentioned_p (op0, op1));

60008

+

60009

+ else if (MEM_P (op0) && REG_P (op1))

60010

+ ret = (quad_memory_operand (op0, GET_MODE (op0))

60011

+ && quad_int_reg_operand (op1, GET_MODE (op1)));

60012

+

60013

+ else

60014

+ ret = false;

60015

+

60016

+ if (TARGET_DEBUG_ADDR)

60017

+ {

60018

+ fprintf (stderr, "\n========== quad_load_store, return %s\n",

60019

+ ret ? "true" : "false");

60020

+ debug_rtx (gen_rtx_SET (VOIDmode, op0, op1));

60021

+ }

60022

+

60023

+ return ret;

60024

+}

60025

+

60026

/* Given an address, return a constant offset term if one exists. */

60027

60028

static rtx

60029

@@ -5170,7 +6132,12 @@

60030

case V4SImode:

60031

case V2DFmode:

60032

case V2DImode:

60033

- /* AltiVec/VSX vector modes. Only reg+reg addressing is valid. */

60034

+ case V1TImode:

60035

+ case TImode:

60036

+ /* AltiVec/VSX vector modes. Only reg+reg addressing is valid. While

60037

+ TImode is not a vector mode, if we want to use the VSX registers to

60038

+ move it around, we need to restrict ourselves to reg+reg

60039

+ addressing. */

60040

if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode))

60041

return false;

60042

break;

60043

@@ -5184,6 +6151,13 @@

60044

return false;

60045

break;

60046

60047

+ case SDmode:

60048

+ /* If we can do direct load/stores of SDmode, restrict it to reg+reg

60049

+ addressing for the LFIWZX and STFIWX instructions. */

60050

+ if (TARGET_NO_SDMODE_STACK)

60051

+ return false;

60052

+ break;

60053

+

60054

default:

60055

break;

60056

}

60057

@@ -5211,8 +6185,8 @@

60058

&& regnum <= LAST_VIRTUAL_POINTER_REGISTER);

60059

}

60060

60061

-/* Return true if memory accesses to OP are known to never straddle

60062

- a 32k boundary. */

60063

+/* Return true if a MODE sized memory accesses to OP plus OFFSET

60064

+ is known to not straddle a 32k boundary. */

60065

60066

static bool

60067

offsettable_ok_by_alignment (rtx op, HOST_WIDE_INT offset,

60068

@@ -5219,15 +6193,16 @@

60069

enum machine_mode mode)

60070

{

60071

tree decl, type;

60072

- unsigned HOST_WIDE_INT dsize, dalign;

60073

+ unsigned HOST_WIDE_INT dsize, dalign, lsb, mask;

60074

60075

if (GET_CODE (op) != SYMBOL_REF)

60076

return false;

60077

60078

+ dsize = GET_MODE_SIZE (mode);

60079

decl = SYMBOL_REF_DECL (op);

60080

if (!decl)

60081

{

60082

- if (GET_MODE_SIZE (mode) == 0)

60083

+ if (dsize == 0)

60084

return false;

60085

60086

/* -fsection-anchors loses the original SYMBOL_REF_DECL when

60087

@@ -5234,68 +6209,78 @@

60088

replacing memory addresses with an anchor plus offset. We

60089

could find the decl by rummaging around in the block->objects

60090

VEC for the given offset but that seems like too much work. */

60091

- dalign = 1;

60092

+ dalign = BITS_PER_UNIT;

60093

if (SYMBOL_REF_HAS_BLOCK_INFO_P (op)

60094

&& SYMBOL_REF_ANCHOR_P (op)

60095

&& SYMBOL_REF_BLOCK (op) != NULL)

60096

{

60097

struct object_block *block = SYMBOL_REF_BLOCK (op);

60098

- HOST_WIDE_INT lsb, mask;

60099

60100

- /* Given the alignment of the block.. */

60101

dalign = block->alignment;

60102

- mask = dalign / BITS_PER_UNIT - 1;

60103

-

60104

- /* ..and the combined offset of the anchor and any offset

60105

- to this block object.. */

60106

offset += SYMBOL_REF_BLOCK_OFFSET (op);

60107

- lsb = offset & -offset;

60108

+ }

60109

+ else if (CONSTANT_POOL_ADDRESS_P (op))

60110

+ {

60111

+ /* It would be nice to have get_pool_align().. */

60112

+ enum machine_mode cmode = get_pool_mode (op);

60113

60114

- /* ..find how many bits of the alignment we know for the

60115

- object. */

60116

- mask &= lsb - 1;

60117

- dalign = mask + 1;

60118

+ dalign = GET_MODE_ALIGNMENT (cmode);

60119

}

60120

- return dalign >= GET_MODE_SIZE (mode);

60121

}

60122

-

60123

- if (DECL_P (decl))

60124

+ else if (DECL_P (decl))

60125

{

60126

- if (TREE_CODE (decl) == FUNCTION_DECL)

60127

- return true;

60128

+ dalign = DECL_ALIGN (decl);

60129

60130

- if (!DECL_SIZE_UNIT (decl))

60131

- return false;

60132

+ if (dsize == 0)

60133

+ {

60134

+ /* Allow BLKmode when the entire object is known to not

60135

+ cross a 32k boundary. */

60136

+ if (!DECL_SIZE_UNIT (decl))

60137

+ return false;

60138

60139

- if (!host_integerp (DECL_SIZE_UNIT (decl), 1))

60140

- return false;

60141

+ if (!host_integerp (DECL_SIZE_UNIT (decl), 1))

60142

+ return false;

60143

60144

- dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);

60145

- if (dsize > 32768)

60146

- return false;

60147

+ dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);

60148

+ if (dsize > 32768)

60149

+ return false;

60150

60151

- dalign = DECL_ALIGN_UNIT (decl);

60152

- return dalign >= dsize;

60153

+ return dalign / BITS_PER_UNIT >= dsize;

60154

+ }

60155

}

60156

+ else

60157

+ {

60158

+ type = TREE_TYPE (decl);

60159

60160

- type = TREE_TYPE (decl);

60161

+ dalign = TYPE_ALIGN (type);

60162

+ if (CONSTANT_CLASS_P (decl))

60163

+ dalign = CONSTANT_ALIGNMENT (decl, dalign);

60164

+ else

60165

+ dalign = DATA_ALIGNMENT (decl, dalign);

60166

60167

- if (TREE_CODE (decl) == STRING_CST)

60168

- dsize = TREE_STRING_LENGTH (decl);

60169

- else if (TYPE_SIZE_UNIT (type)

60170

- && host_integerp (TYPE_SIZE_UNIT (type), 1))

60171

- dsize = tree_low_cst (TYPE_SIZE_UNIT (type), 1);

60172

- else

60173

- return false;

60174

- if (dsize > 32768)

60175

- return false;

60176

+ if (dsize == 0)

60177

+ {

60178

+ /* BLKmode, check the entire object. */

60179

+ if (TREE_CODE (decl) == STRING_CST)

60180

+ dsize = TREE_STRING_LENGTH (decl);

60181

+ else if (TYPE_SIZE_UNIT (type)

60182

+ && host_integerp (TYPE_SIZE_UNIT (type), 1))

60183

+ dsize = tree_low_cst (TYPE_SIZE_UNIT (type), 1);

60184

+ else

60185

+ return false;

60186

+ if (dsize > 32768)

60187

+ return false;

60188

60189

- dalign = TYPE_ALIGN (type);

60190

- if (CONSTANT_CLASS_P (decl))

60191

- dalign = CONSTANT_ALIGNMENT (decl, dalign);

60192

- else

60193

- dalign = DATA_ALIGNMENT (decl, dalign);

60194

- dalign /= BITS_PER_UNIT;

60195

+ return dalign / BITS_PER_UNIT >= dsize;

60196

+ }

60197

+ }

60198

+

60199

+ /* Find how many bits of the alignment we know for this access. */

60200

+ mask = dalign / BITS_PER_UNIT - 1;

60201

+ lsb = offset & -offset;

60202

+ mask &= lsb - 1;

60203

+ dalign = mask + 1;

60204

+

60205

return dalign >= dsize;

60206

}

60207

60208

@@ -5387,7 +6372,7 @@

60209

return false;

60210

if (!reg_offset_addressing_ok_p (mode))

60211

return virtual_stack_registers_memory_p (x);

60212

- if (legitimate_constant_pool_address_p (x, mode, strict))

60213

+ if (legitimate_constant_pool_address_p (x, mode, strict || lra_in_progress))

60214

return true;

60215

if (GET_CODE (XEXP (x, 1)) != CONST_INT)

60216

return false;

60217

@@ -5416,7 +6401,7 @@

60218

60219

/* If we are using VSX scalar loads, restrict ourselves to reg+reg

60220

addressing. */

60221

- if (mode == DFmode && VECTOR_MEM_VSX_P (DFmode))

60222

+ if (VECTOR_MEM_VSX_P (mode))

60223

return false;

60224

60225

if (!worst_case)

60226

@@ -5428,12 +6413,14 @@

60227

break;

60228

60229

case TFmode:

60230

- case TDmode:

60231

- case TImode:

60232

if (TARGET_E500_DOUBLE)

60233

return (SPE_CONST_OFFSET_OK (offset)

60234

&& SPE_CONST_OFFSET_OK (offset + 8));

60235

+ /* fall through */

60236

60237

+ case TDmode:

60238

+ case TImode:

60239

+ case PTImode:

60240

extra = 8;

60241

if (!worst_case)

60242

break;

60243

@@ -5526,9 +6513,21 @@

60244

60245

if (TARGET_ELF || TARGET_MACHO)

60246

{

60247

- if (DEFAULT_ABI != ABI_AIX && DEFAULT_ABI != ABI_DARWIN && flag_pic)

60248

+ bool large_toc_ok;

60249

+

60250

+ if (DEFAULT_ABI == ABI_V4 && flag_pic)

60251

return false;

60252

- if (TARGET_TOC)

60253

+ /* LRA don't use LEGITIMIZE_RELOAD_ADDRESS as it usually calls

60254

+ push_reload from reload pass code. LEGITIMIZE_RELOAD_ADDRESS

60255

+ recognizes some LO_SUM addresses as valid although this

60256

+ function says opposite. In most cases, LRA through different

60257

+ transformations can generate correct code for address reloads.

60258

+ It can not manage only some LO_SUM cases. So we need to add

60259

+ code analogous to one in rs6000_legitimize_reload_address for

60260

+ LOW_SUM here saying that some addresses are still valid. */

60261

+ large_toc_ok = (lra_in_progress && TARGET_CMODEL != CMODEL_SMALL

60262

+ && small_toc_ref (x, VOIDmode));

60263

+ if (TARGET_TOC && ! large_toc_ok)

60264

return false;

60265

if (GET_MODE_NUNITS (mode) != 1)

60266

return false;

60267

@@ -5538,7 +6537,7 @@

60268

&& (mode == DFmode || mode == DDmode)))

60269

return false;

60270

60271

- return CONSTANT_P (x);

60272

+ return CONSTANT_P (x) || large_toc_ok;

60273

}

60274

60275

return false;

60276

@@ -5582,8 +6581,11 @@

60277

if (GET_CODE (x) == PLUS && XEXP (x, 1) == const0_rtx)

60278

return force_reg (Pmode, XEXP (x, 0));

60279

60280

+ /* For TImode with load/store quad, restrict addresses to just a single

60281

+ pointer, so it works with both GPRs and VSX registers. */

60282

/* Make sure both operands are registers. */

60283

- else if (GET_CODE (x) == PLUS)

60284

+ else if (GET_CODE (x) == PLUS

60285

+ && (mode != TImode || !TARGET_QUAD_MEMORY))

60286

return gen_rtx_PLUS (Pmode,

60287

force_reg (Pmode, XEXP (x, 0)),

60288

force_reg (Pmode, XEXP (x, 1)));

60289

@@ -5603,11 +6605,12 @@

60290

case TFmode:

60291

case TDmode:

60292

case TImode:

60293

+ case PTImode:

60294

/* As in legitimate_offset_address_p we do not assume

60295

worst-case. The mode here is just a hint as to the registers

60296

used. A TImode is usually in gprs, but may actually be in

60297

fprs. Leave worst-case scenario for reload to handle via

60298

- insn constraints. */

60299

+ insn constraints. PTImode is only GPRs. */

60300

extra = 8;

60301

break;

60302

default:

60303

@@ -6099,10 +7102,13 @@

60304

1, const0_rtx, Pmode);

60305

60306

r3 = gen_rtx_REG (Pmode, 3);

60307

- if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

60308

- insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx);

60309

- else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)

60310

- insn = gen_tls_gd_aix32 (r3, got, addr, tga, const0_rtx);

60311

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

60312

+ {

60313

+ if (TARGET_64BIT)

60314

+ insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx);

60315

+ else

60316

+ insn = gen_tls_gd_aix32 (r3, got, addr, tga, const0_rtx);

60317

+ }

60318

else if (DEFAULT_ABI == ABI_V4)

60319

insn = gen_tls_gd_sysvsi (r3, got, addr, tga, const0_rtx);

60320

else

60321

@@ -6121,10 +7127,13 @@

60322

1, const0_rtx, Pmode);

60323

60324

r3 = gen_rtx_REG (Pmode, 3);

60325

- if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

60326

- insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx);

60327

- else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)

60328

- insn = gen_tls_ld_aix32 (r3, got, tga, const0_rtx);

60329

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

60330

+ {

60331

+ if (TARGET_64BIT)

60332

+ insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx);

60333

+ else

60334

+ insn = gen_tls_ld_aix32 (r3, got, tga, const0_rtx);

60335

+ }

60336

else if (DEFAULT_ABI == ABI_V4)

60337

insn = gen_tls_ld_sysvsi (r3, got, tga, const0_rtx);

60338

else

60339

@@ -6239,7 +7248,6 @@

60340

&& ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (sym),

60341

get_pool_mode (sym)))

60342

|| (TARGET_CMODEL == CMODEL_MEDIUM

60343

- && !CONSTANT_POOL_ADDRESS_P (sym)

60344

&& SYMBOL_REF_LOCAL_P (sym)));

60345

}

60346

60347

@@ -6338,7 +7346,7 @@

60348

&& !(TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode

60349

|| mode == DDmode || mode == TDmode

60350

|| mode == DImode))

60351

- && VECTOR_MEM_NONE_P (mode))

60352

+ && (!VECTOR_MODE_P (mode) || VECTOR_MEM_NONE_P (mode)))

60353

{

60354

HOST_WIDE_INT val = INTVAL (XEXP (x, 1));

60355

HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;

60356

@@ -6369,7 +7377,7 @@

60357

60358

if (GET_CODE (x) == SYMBOL_REF

60359

&& reg_offset_p

60360

- && VECTOR_MEM_NONE_P (mode)

60361

+ && (!VECTOR_MODE_P (mode) || VECTOR_MEM_NONE_P (mode))

60362

&& !SPE_VECTOR_MODE (mode)

60363

#if TARGET_MACHO

60364

&& DEFAULT_ABI == ABI_DARWIN

60365

@@ -6395,6 +7403,8 @@

60366

mem is sufficiently aligned. */

60367

&& mode != TFmode

60368

&& mode != TDmode

60369

+ && (mode != TImode || !TARGET_VSX_TIMODE)

60370

+ && mode != PTImode

60371

&& (mode != DImode || TARGET_POWERPC64)

60372

&& ((mode != DFmode && mode != DDmode) || TARGET_POWERPC64

60373

|| (TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)))

60374

@@ -6515,15 +7525,9 @@

60375

return 0;

60376

if (legitimate_indirect_address_p (x, reg_ok_strict))

60377

return 1;

60378

- if ((GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC)

60379

- && !VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)

60380

- && !SPE_VECTOR_MODE (mode)

60381

- && mode != TFmode

60382

- && mode != TDmode

60383

- /* Restrict addressing for DI because of our SUBREG hackery. */

60384

- && !(TARGET_E500_DOUBLE

60385

- && (mode == DFmode || mode == DDmode || mode == DImode))

60386

- && TARGET_UPDATE

60387

+ if (TARGET_UPDATE

60388

+ && (GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC)

60389

+ && mode_supports_pre_incdec_p (mode)

60390

&& legitimate_indirect_address_p (XEXP (x, 0), reg_ok_strict))

60391

return 1;

60392

if (virtual_stack_registers_memory_p (x))

60393

@@ -6531,8 +7535,16 @@

60394

if (reg_offset_p && legitimate_small_data_p (mode, x))

60395

return 1;

60396

if (reg_offset_p

60397

- && legitimate_constant_pool_address_p (x, mode, reg_ok_strict))

60398

+ && legitimate_constant_pool_address_p (x, mode,

60399

+ reg_ok_strict || lra_in_progress))

60400

return 1;

60401

+ /* For TImode, if we have load/store quad and TImode in VSX registers, only

60402

+ allow register indirect addresses. This will allow the values to go in

60403

+ either GPRs or VSX registers without reloading. The vector types would

60404

+ tend to go into VSX registers, so we allow REG+REG, while TImode seems

60405

+ somewhat split, in that some uses are GPR based, and some VSX based. */

60406

+ if (mode == TImode && TARGET_QUAD_MEMORY && TARGET_VSX_TIMODE)

60407

+ return 0;

60408

/* If not REG_OK_STRICT (before reload) let pass any stack offset. */

60409

if (! reg_ok_strict

60410

&& reg_offset_p

60411

@@ -6544,8 +7556,7 @@

60412

return 1;

60413

if (rs6000_legitimate_offset_address_p (mode, x, reg_ok_strict, false))

60414

return 1;

60415

- if (mode != TImode

60416

- && mode != TFmode

60417

+ if (mode != TFmode

60418

&& mode != TDmode

60419

&& ((TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)

60420

|| TARGET_POWERPC64

60421

@@ -6552,23 +7563,13 @@

60422

|| (mode != DFmode && mode != DDmode)

60423

|| (TARGET_E500_DOUBLE && mode != DDmode))

60424

&& (TARGET_POWERPC64 || mode != DImode)

60425

+ && (mode != TImode || VECTOR_MEM_VSX_P (TImode))

60426

+ && mode != PTImode

60427

&& !avoiding_indexed_address_p (mode)

60428

&& legitimate_indexed_address_p (x, reg_ok_strict))

60429

return 1;

60430

- if (GET_CODE (x) == PRE_MODIFY

60431

- && mode != TImode

60432

- && mode != TFmode

60433

- && mode != TDmode

60434

- && ((TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)

60435

- || TARGET_POWERPC64

60436

- || ((mode != DFmode && mode != DDmode) || TARGET_E500_DOUBLE))

60437

- && (TARGET_POWERPC64 || mode != DImode)

60438

- && !VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)

60439

- && !SPE_VECTOR_MODE (mode)

60440

- /* Restrict addressing for DI because of our SUBREG hackery. */

60441

- && !(TARGET_E500_DOUBLE

60442

- && (mode == DFmode || mode == DDmode || mode == DImode))

60443

- && TARGET_UPDATE

60444

+ if (TARGET_UPDATE && GET_CODE (x) == PRE_MODIFY

60445

+ && mode_supports_pre_modify_p (mode)

60446

&& legitimate_indirect_address_p (XEXP (x, 0), reg_ok_strict)

60447

&& (rs6000_legitimate_offset_address_p (mode, XEXP (x, 1),

60448

reg_ok_strict, false)

60449

@@ -6589,10 +7590,13 @@

60450

bool ret = rs6000_legitimate_address_p (mode, x, reg_ok_strict);

60451

fprintf (stderr,

60452

"\nrs6000_legitimate_address_p: return = %s, mode = %s, "

60453

- "strict = %d, code = %s\n",

60454

+ "strict = %d, reload = %s, code = %s\n",

60455

ret ? "true" : "false",

60456

GET_MODE_NAME (mode),

60457

reg_ok_strict,

60458

+ (reload_completed

60459

+ ? "after"

60460

+ : (reload_in_progress ? "progress" : "before")),

60461

GET_RTX_NAME (GET_CODE (x)));

60462

debug_rtx (x);

60463

60464

@@ -6758,7 +7762,7 @@

60465

60466

/* The TOC register is not killed across calls in a way that is

60467

visible to the compiler. */

60468

- if (DEFAULT_ABI == ABI_AIX)

60469

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

60470

call_really_used_regs[2] = 0;

60471

60472

if (DEFAULT_ABI == ABI_V4

60473

@@ -6818,6 +7822,7 @@

60474

fixed_regs[i] = call_used_regs[i] = call_really_used_regs[i] = 1;

60475

}

60476

}

60477

+

60478

60479

/* Try to output insns to set TARGET equal to the constant C if it can

60480

be done in less than N insns. Do all computations in MODE.

60481

@@ -7006,7 +8011,7 @@

60482

}

60483

60484

/* Helper for the following. Get rid of [r+r] memory refs

60485

- in cases where it won't work (TImode, TFmode, TDmode). */

60486

+ in cases where it won't work (TImode, TFmode, TDmode, PTImode). */

60487

60488

static void

60489

rs6000_eliminate_indexed_memrefs (rtx operands[2])

60490

@@ -7031,6 +8036,131 @@

60491

copy_addr_to_reg (XEXP (operands[1], 0)));

60492

}

60493

60494

+/* Generate a vector of constants to permute MODE for a little-endian

60495

+ storage operation by swapping the two halves of a vector. */

60496

+static rtvec

60497

+rs6000_const_vec (enum machine_mode mode)

60498

+{

60499

+ int i, subparts;

60500

+ rtvec v;

60501

+

60502

+ switch (mode)

60503

+ {

60504

+ case V1TImode:

60505

+ subparts = 1;

60506

+ break;

60507

+ case V2DFmode:

60508

+ case V2DImode:

60509

+ subparts = 2;

60510

+ break;

60511

+ case V4SFmode:

60512

+ case V4SImode:

60513

+ subparts = 4;

60514

+ break;

60515

+ case V8HImode:

60516

+ subparts = 8;

60517

+ break;

60518

+ case V16QImode:

60519

+ subparts = 16;

60520

+ break;

60521

+ default:

60522

+ gcc_unreachable();

60523

+ }

60524

+

60525

+ v = rtvec_alloc (subparts);

60526

+

60527

+ for (i = 0; i < subparts / 2; ++i)

60528

+ RTVEC_ELT (v, i) = gen_rtx_CONST_INT (DImode, i + subparts / 2);

60529

+ for (i = subparts / 2; i < subparts; ++i)

60530

+ RTVEC_ELT (v, i) = gen_rtx_CONST_INT (DImode, i - subparts / 2);

60531

+

60532

+ return v;

60533

+}

60534

+

60535

+/* Generate a permute rtx that represents an lxvd2x, stxvd2x, or xxpermdi

60536

+ for a VSX load or store operation. */

60537

+rtx

60538

+rs6000_gen_le_vsx_permute (rtx source, enum machine_mode mode)

60539

+{

60540

+ rtx par = gen_rtx_PARALLEL (VOIDmode, rs6000_const_vec (mode));

60541

+ return gen_rtx_VEC_SELECT (mode, source, par);

60542

+}

60543

+

60544

+/* Emit a little-endian load from vector memory location SOURCE to VSX

60545

+ register DEST in mode MODE. The load is done with two permuting

60546

+ insn's that represent an lxvd2x and xxpermdi. */

60547

+void

60548

+rs6000_emit_le_vsx_load (rtx dest, rtx source, enum machine_mode mode)

60549

+{

60550

+ rtx tmp, permute_mem, permute_reg;

60551

+

60552

+ /* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,

60553

+ V1TImode). */

60554

+ if (mode == TImode || mode == V1TImode)

60555

+ {

60556

+ mode = V2DImode;

60557

+ dest = gen_lowpart (V2DImode, dest);

60558

+ source = adjust_address (source, V2DImode, 0);

60559

+ }

60560

+

60561

+ tmp = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (dest) : dest;

60562

+ permute_mem = rs6000_gen_le_vsx_permute (source, mode);

60563

+ permute_reg = rs6000_gen_le_vsx_permute (tmp, mode);

60564

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, permute_mem));

60565

+ emit_insn (gen_rtx_SET (VOIDmode, dest, permute_reg));

60566

+}

60567

+

60568

+/* Emit a little-endian store to vector memory location DEST from VSX

60569

+ register SOURCE in mode MODE. The store is done with two permuting

60570

+ insn's that represent an xxpermdi and an stxvd2x. */

60571

+void

60572

+rs6000_emit_le_vsx_store (rtx dest, rtx source, enum machine_mode mode)

60573

+{

60574

+ rtx tmp, permute_src, permute_tmp;

60575

+

60576

+ /* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,

60577

+ V1TImode). */

60578

+ if (mode == TImode || mode == V1TImode)

60579

+ {

60580

+ mode = V2DImode;

60581

+ dest = adjust_address (dest, V2DImode, 0);

60582

+ source = gen_lowpart (V2DImode, source);

60583

+ }

60584

+

60585

+ tmp = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (source) : source;

60586

+ permute_src = rs6000_gen_le_vsx_permute (source, mode);

60587

+ permute_tmp = rs6000_gen_le_vsx_permute (tmp, mode);

60588

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, permute_src));

60589

+ emit_insn (gen_rtx_SET (VOIDmode, dest, permute_tmp));

60590

+}

60591

+

60592

+/* Emit a sequence representing a little-endian VSX load or store,

60593

+ moving data from SOURCE to DEST in mode MODE. This is done

60594

+ separately from rs6000_emit_move to ensure it is called only

60595

+ during expand. LE VSX loads and stores introduced later are

60596

+ handled with a split. The expand-time RTL generation allows

60597

+ us to optimize away redundant pairs of register-permutes. */

60598

+void

60599

+rs6000_emit_le_vsx_move (rtx dest, rtx source, enum machine_mode mode)

60600

+{

60601

+ gcc_assert (!BYTES_BIG_ENDIAN

60602

+ && VECTOR_MEM_VSX_P (mode)

60603

+ && !gpr_or_gpr_p (dest, source)

60604

+ && (MEM_P (source) ^ MEM_P (dest)));

60605

+

60606

+ if (MEM_P (source))

60607

+ {

60608

+ gcc_assert (REG_P (dest) || GET_CODE (dest) == SUBREG);

60609

+ rs6000_emit_le_vsx_load (dest, source, mode);

60610

+ }

60611

+ else

60612

+ {

60613

+ if (!REG_P (source))

60614

+ source = force_reg (mode, source);

60615

+ rs6000_emit_le_vsx_store (dest, source, mode);

60616

+ }

60617

+}

60618

+

60619

/* Emit a move from SOURCE to DEST in mode MODE. */

60620

void

60621

rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)

60622

@@ -7149,8 +8279,71 @@

60623

cfun->machine->sdmode_stack_slot =

60624

eliminate_regs (cfun->machine->sdmode_stack_slot, VOIDmode, NULL_RTX);

60625

60626

+

60627

+ if (lra_in_progress

60628

+ && mode == SDmode

60629

+ && REG_P (operands[0]) && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER

60630

+ && reg_preferred_class (REGNO (operands[0])) == NO_REGS

60631

+ && (REG_P (operands[1])

60632

+ || (GET_CODE (operands[1]) == SUBREG

60633

+ && REG_P (SUBREG_REG (operands[1])))))

60634

+ {

60635

+ int regno = REGNO (GET_CODE (operands[1]) == SUBREG

60636

+ ? SUBREG_REG (operands[1]) : operands[1]);

60637

+ enum reg_class cl;

60638

+

60639

+ if (regno >= FIRST_PSEUDO_REGISTER)

60640

+ {

60641

+ cl = reg_preferred_class (regno);

60642

+ gcc_assert (cl != NO_REGS);

60643

+ regno = ira_class_hard_regs[cl][0];

60644

+ }

60645

+ if (FP_REGNO_P (regno))

60646

+ {

60647

+ if (GET_MODE (operands[0]) != DDmode)

60648

+ operands[0] = gen_rtx_SUBREG (DDmode, operands[0], 0);

60649

+ emit_insn (gen_movsd_store (operands[0], operands[1]));

60650

+ }

60651

+ else if (INT_REGNO_P (regno))

60652

+ emit_insn (gen_movsd_hardfloat (operands[0], operands[1]));

60653

+ else

60654

+ gcc_unreachable();

60655

+ return;

60656

+ }

60657

+ if (lra_in_progress

60658

+ && mode == SDmode

60659

+ && (REG_P (operands[0])

60660

+ || (GET_CODE (operands[0]) == SUBREG

60661

+ && REG_P (SUBREG_REG (operands[0]))))

60662

+ && REG_P (operands[1]) && REGNO (operands[1]) >= FIRST_PSEUDO_REGISTER

60663

+ && reg_preferred_class (REGNO (operands[1])) == NO_REGS)

60664

+ {

60665

+ int regno = REGNO (GET_CODE (operands[0]) == SUBREG

60666

+ ? SUBREG_REG (operands[0]) : operands[0]);

60667

+ enum reg_class cl;

60668

+

60669

+ if (regno >= FIRST_PSEUDO_REGISTER)

60670

+ {

60671

+ cl = reg_preferred_class (regno);

60672

+ gcc_assert (cl != NO_REGS);

60673

+ regno = ira_class_hard_regs[cl][0];

60674

+ }

60675

+ if (FP_REGNO_P (regno))

60676

+ {

60677

+ if (GET_MODE (operands[1]) != DDmode)

60678

+ operands[1] = gen_rtx_SUBREG (DDmode, operands[1], 0);

60679

+ emit_insn (gen_movsd_load (operands[0], operands[1]));

60680

+ }

60681

+ else if (INT_REGNO_P (regno))

60682

+ emit_insn (gen_movsd_hardfloat (operands[0], operands[1]));

60683

+ else

60684

+ gcc_unreachable();

60685

+ return;

60686

+ }

60687

+

60688

if (reload_in_progress

60689

&& mode == SDmode

60690

+ && cfun->machine->sdmode_stack_slot != NULL_RTX

60691

&& MEM_P (operands[0])

60692

&& rtx_equal_p (operands[0], cfun->machine->sdmode_stack_slot)

60693

&& REG_P (operands[1]))

60694

@@ -7163,7 +8356,9 @@

60695

}

60696

else if (INT_REGNO_P (REGNO (operands[1])))

60697

{

60698

- rtx mem = adjust_address_nv (operands[0], mode, 4);

60699

+ rtx mem = operands[0];

60700

+ if (BYTES_BIG_ENDIAN)

60701

+ mem = adjust_address_nv (mem, mode, 4);

60702

mem = eliminate_regs (mem, VOIDmode, NULL_RTX);

60703

emit_insn (gen_movsd_hardfloat (mem, operands[1]));

60704

}

60705

@@ -7175,6 +8370,7 @@

60706

&& mode == SDmode

60707

&& REG_P (operands[0])

60708

&& MEM_P (operands[1])

60709

+ && cfun->machine->sdmode_stack_slot != NULL_RTX

60710

&& rtx_equal_p (operands[1], cfun->machine->sdmode_stack_slot))

60711

{

60712

if (FP_REGNO_P (REGNO (operands[0])))

60713

@@ -7185,7 +8381,9 @@

60714

}

60715

else if (INT_REGNO_P (REGNO (operands[0])))

60716

{

60717

- rtx mem = adjust_address_nv (operands[1], mode, 4);

60718

+ rtx mem = operands[1];

60719

+ if (BYTES_BIG_ENDIAN)

60720

+ mem = adjust_address_nv (mem, mode, 4);

60721

mem = eliminate_regs (mem, VOIDmode, NULL_RTX);

60722

emit_insn (gen_movsd_hardfloat (operands[0], mem));

60723

}

60724

@@ -7230,6 +8428,7 @@

60725

case V1DImode:

60726

case V2DFmode:

60727

case V2DImode:

60728

+ case V1TImode:

60729

if (CONSTANT_P (operands[1])

60730

&& !easy_vector_constant (operands[1], mode))

60731

operands[1] = force_const_mem (mode, operands[1]);

60732

@@ -7388,6 +8587,11 @@

60733

break;

60734

60735

case TImode:

60736

+ if (!VECTOR_MEM_VSX_P (TImode))

60737

+ rs6000_eliminate_indexed_memrefs (operands);

60738

+ break;

60739

+

60740

+ case PTImode:

60741

rs6000_eliminate_indexed_memrefs (operands);

60742

break;

60743

60744

@@ -7426,18 +8630,231 @@

60745

}

60746

60747

/* Nonzero if we can use a floating-point register to pass this arg. */

60748

-#define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \

60749

+#define USE_FP_FOR_ARG_P(CUM,MODE) \

60750

(SCALAR_FLOAT_MODE_P (MODE) \

60751

&& (CUM)->fregno <= FP_ARG_MAX_REG \

60752

&& TARGET_HARD_FLOAT && TARGET_FPRS)

60753

60754

/* Nonzero if we can use an AltiVec register to pass this arg. */

60755

-#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \

60756

+#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,NAMED) \

60757

(ALTIVEC_OR_VSX_VECTOR_MODE (MODE) \

60758

&& (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \

60759

&& TARGET_ALTIVEC_ABI \

60760

&& (NAMED))

60761

60762

+/* Walk down the type tree of TYPE counting consecutive base elements.

60763

+ If *MODEP is VOIDmode, then set it to the first valid floating point

60764

+ or vector type. If a non-floating point or vector type is found, or

60765

+ if a floating point or vector type that doesn't match a non-VOIDmode

60766

+ *MODEP is found, then return -1, otherwise return the count in the

60767

+ sub-tree. */

60768

+

60769

+static int

60770

+rs6000_aggregate_candidate (const_tree type, enum machine_mode *modep)

60771

+{

60772

+ enum machine_mode mode;

60773

+ HOST_WIDE_INT size;

60774

+

60775

+ switch (TREE_CODE (type))

60776

+ {

60777

+ case REAL_TYPE:

60778

+ mode = TYPE_MODE (type);

60779

+ if (!SCALAR_FLOAT_MODE_P (mode))

60780

+ return -1;

60781

+

60782

+ if (*modep == VOIDmode)

60783

+ *modep = mode;

60784

+

60785

+ if (*modep == mode)

60786

+ return 1;

60787

+

60788

+ break;

60789

+

60790

+ case COMPLEX_TYPE:

60791

+ mode = TYPE_MODE (TREE_TYPE (type));

60792

+ if (!SCALAR_FLOAT_MODE_P (mode))

60793

+ return -1;

60794

+

60795

+ if (*modep == VOIDmode)

60796

+ *modep = mode;

60797

+

60798

+ if (*modep == mode)

60799

+ return 2;

60800

+

60801

+ break;

60802

+

60803

+ case VECTOR_TYPE:

60804

+ if (!TARGET_ALTIVEC_ABI || !TARGET_ALTIVEC)

60805

+ return -1;

60806

+

60807

+ /* Use V4SImode as representative of all 128-bit vector types. */

60808

+ size = int_size_in_bytes (type);

60809

+ switch (size)

60810

+ {

60811

+ case 16:

60812

+ mode = V4SImode;

60813

+ break;

60814

+ default:

60815

+ return -1;

60816

+ }

60817

+

60818

+ if (*modep == VOIDmode)

60819

+ *modep = mode;

60820

+

60821

+ /* Vector modes are considered to be opaque: two vectors are

60822

+ equivalent for the purposes of being homogeneous aggregates

60823

+ if they are the same size. */

60824

+ if (*modep == mode)

60825

+ return 1;

60826

+

60827

+ break;

60828

+

60829

+ case ARRAY_TYPE:

60830

+ {

60831

+ int count;

60832

+ tree index = TYPE_DOMAIN (type);

60833

+

60834

+ /* Can't handle incomplete types. */

60835

+ if (!COMPLETE_TYPE_P (type))

60836

+ return -1;

60837

+

60838

+ count = rs6000_aggregate_candidate (TREE_TYPE (type), modep);

60839

+ if (count == -1

60840

+ || !index

60841

+ || !TYPE_MAX_VALUE (index)

60842

+ || !host_integerp (TYPE_MAX_VALUE (index), 1)

60843

+ || !TYPE_MIN_VALUE (index)

60844

+ || !host_integerp (TYPE_MIN_VALUE (index), 1)

60845

+ || count < 0)

60846

+ return -1;

60847

+

60848

+ count *= (1 + tree_low_cst (TYPE_MAX_VALUE (index), 1)

60849

+ - tree_low_cst (TYPE_MIN_VALUE (index), 1));

60850

+

60851

+ /* There must be no padding. */

60852

+ if (!host_integerp (TYPE_SIZE (type), 1)

60853

+ || (tree_low_cst (TYPE_SIZE (type), 1)

60854

+ != count * GET_MODE_BITSIZE (*modep)))

60855

+ return -1;

60856

+

60857

+ return count;

60858

+ }

60859

+

60860

+ case RECORD_TYPE:

60861

+ {

60862

+ int count = 0;

60863

+ int sub_count;

60864

+ tree field;

60865

+

60866

+ /* Can't handle incomplete types. */

60867

+ if (!COMPLETE_TYPE_P (type))

60868

+ return -1;

60869

+

60870

+ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))

60871

+ {

60872

+ if (TREE_CODE (field) != FIELD_DECL)

60873

+ continue;

60874

+

60875

+ sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep);

60876

+ if (sub_count < 0)

60877

+ return -1;

60878

+ count += sub_count;

60879

+ }

60880

+

60881

+ /* There must be no padding. */

60882

+ if (!host_integerp (TYPE_SIZE (type), 1)

60883

+ || (tree_low_cst (TYPE_SIZE (type), 1)

60884

+ != count * GET_MODE_BITSIZE (*modep)))

60885

+ return -1;

60886

+

60887

+ return count;

60888

+ }

60889

+

60890

+ case UNION_TYPE:

60891

+ case QUAL_UNION_TYPE:

60892

+ {

60893

+ /* These aren't very interesting except in a degenerate case. */

60894

+ int count = 0;

60895

+ int sub_count;

60896

+ tree field;

60897

+

60898

+ /* Can't handle incomplete types. */

60899

+ if (!COMPLETE_TYPE_P (type))

60900

+ return -1;

60901

+

60902

+ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))

60903

+ {

60904

+ if (TREE_CODE (field) != FIELD_DECL)

60905

+ continue;

60906

+

60907

+ sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep);

60908

+ if (sub_count < 0)

60909

+ return -1;

60910

+ count = count > sub_count ? count : sub_count;

60911

+ }

60912

+

60913

+ /* There must be no padding. */

60914

+ if (!host_integerp (TYPE_SIZE (type), 1)

60915

+ || (tree_low_cst (TYPE_SIZE (type), 1)

60916

+ != count * GET_MODE_BITSIZE (*modep)))

60917

+ return -1;

60918

+

60919

+ return count;

60920

+ }

60921

+

60922

+ default:

60923

+ break;

60924

+ }

60925

+

60926

+ return -1;

60927

+}

60928

+

60929

+/* If an argument, whose type is described by TYPE and MODE, is a homogeneous

60930

+ float or vector aggregate that shall be passed in FP/vector registers

60931

+ according to the ELFv2 ABI, return the homogeneous element mode in

60932

+ *ELT_MODE and the number of elements in *N_ELTS, and return TRUE.

60933

+

60934

+ Otherwise, set *ELT_MODE to MODE and *N_ELTS to 1, and return FALSE. */

60935

+

60936

+static bool

60937

+rs6000_discover_homogeneous_aggregate (enum machine_mode mode, const_tree type,

60938

+ enum machine_mode *elt_mode,

60939

+ int *n_elts)

60940

+{

60941

+ /* Note that we do not accept complex types at the top level as

60942

+ homogeneous aggregates; these types are handled via the

60943

+ targetm.calls.split_complex_arg mechanism. Complex types

60944

+ can be elements of homogeneous aggregates, however. */

60945

+ if (DEFAULT_ABI == ABI_ELFv2 && type && AGGREGATE_TYPE_P (type))

60946

+ {

60947

+ enum machine_mode field_mode = VOIDmode;

60948

+ int field_count = rs6000_aggregate_candidate (type, &field_mode);

60949

+

60950

+ if (field_count > 0)

60951

+ {

60952

+ int n_regs = (SCALAR_FLOAT_MODE_P (field_mode)?

60953

+ (GET_MODE_SIZE (field_mode) + 7) >> 3 : 1);

60954

+

60955

+ /* The ELFv2 ABI allows homogeneous aggregates to occupy

60956

+ up to AGGR_ARG_NUM_REG registers. */

60957

+ if (field_count * n_regs <= AGGR_ARG_NUM_REG)

60958

+ {

60959

+ if (elt_mode)

60960

+ *elt_mode = field_mode;

60961

+ if (n_elts)

60962

+ *n_elts = field_count;

60963

+ return true;

60964

+ }

60965

+ }

60966

+ }

60967

+

60968

+ if (elt_mode)

60969

+ *elt_mode = mode;

60970

+ if (n_elts)

60971

+ *n_elts = 1;

60972

+ return false;

60973

+}

60974

+

60975

/* Return a nonzero value to say to return the function value in

60976

memory, just as large structures are always returned. TYPE will be

60977

the data type of the value, and FNTYPE will be the type of the

60978

@@ -7490,6 +8907,16 @@

60979

/* Otherwise fall through to more conventional ABI rules. */

60980

}

60981

60982

+ /* The ELFv2 ABI returns homogeneous VFP aggregates in registers */

60983

+ if (rs6000_discover_homogeneous_aggregate (TYPE_MODE (type), type,

60984

+ NULL, NULL))

60985

+ return false;

60986

+

60987

+ /* The ELFv2 ABI returns aggregates up to 16B in registers */

60988

+ if (DEFAULT_ABI == ABI_ELFv2 && AGGREGATE_TYPE_P (type)

60989

+ && (unsigned HOST_WIDE_INT) int_size_in_bytes (type) <= 16)

60990

+ return false;

60991

+

60992

if (AGGREGATE_TYPE_P (type)

60993

&& (aix_struct_return

60994

|| (unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 8))

60995

@@ -7521,6 +8948,19 @@

60996

return false;

60997

}

60998

60999

+/* Specify whether values returned in registers should be at the most

61000

+ significant end of a register. We want aggregates returned by

61001

+ value to match the way aggregates are passed to functions. */

61002

+

61003

+static bool

61004

+rs6000_return_in_msb (const_tree valtype)

61005

+{

61006

+ return (DEFAULT_ABI == ABI_ELFv2

61007

+ && BYTES_BIG_ENDIAN

61008

+ && AGGREGATE_TYPE_P (valtype)

61009

+ && FUNCTION_ARG_PADDING (TYPE_MODE (valtype), valtype) == upward);

61010

+}

61011

+

61012

#ifdef HAVE_AS_GNU_ATTRIBUTE

61013

/* Return TRUE if a call to function FNDECL may be one that

61014

potentially affects the function calling ABI of the object file. */

61015

@@ -7657,7 +9097,7 @@

61016

static bool

61017

rs6000_must_pass_in_stack (enum machine_mode mode, const_tree type)

61018

{

61019

- if (DEFAULT_ABI == ABI_AIX || TARGET_64BIT)

61020

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2 || TARGET_64BIT)

61021

return must_pass_in_stack_var_size (mode, type);

61022

else

61023

return must_pass_in_stack_var_size_or_pad (mode, type);

61024

@@ -7738,6 +9178,11 @@

61025

static unsigned int

61026

rs6000_function_arg_boundary (enum machine_mode mode, const_tree type)

61027

{

61028

+ enum machine_mode elt_mode;

61029

+ int n_elts;

61030

+

61031

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

61032

+

61033

if (DEFAULT_ABI == ABI_V4

61034

&& (GET_MODE_SIZE (mode) == 8

61035

|| (TARGET_HARD_FLOAT

61036

@@ -7749,12 +9194,13 @@

61037

&& int_size_in_bytes (type) >= 8

61038

&& int_size_in_bytes (type) < 16))

61039

return 64;

61040

- else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

61041

+ else if (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode)

61042

|| (type && TREE_CODE (type) == VECTOR_TYPE

61043

&& int_size_in_bytes (type) >= 16))

61044

return 128;

61045

- else if (TARGET_MACHO

61046

- && rs6000_darwin64_abi

61047

+ else if (((TARGET_MACHO && rs6000_darwin64_abi)

61048

+ || DEFAULT_ABI == ABI_ELFv2

61049

+ || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm))

61050

&& mode == BLKmode

61051

&& type && TYPE_ALIGN (type) > 64)

61052

return 128;

61053

@@ -7762,6 +9208,16 @@

61054

return PARM_BOUNDARY;

61055

}

61056

61057

+/* The offset in words to the start of the parameter save area. */

61058

+

61059

+static unsigned int

61060

+rs6000_parm_offset (void)

61061

+{

61062

+ return (DEFAULT_ABI == ABI_V4 ? 2

61063

+ : DEFAULT_ABI == ABI_ELFv2 ? 4

61064

+ : 6);

61065

+}

61066

+

61067

/* For a function parm of MODE and TYPE, return the starting word in

61068

the parameter area. NWORDS of the parameter area are already used. */

61069

61070

@@ -7770,11 +9226,9 @@

61071

unsigned int nwords)

61072

{

61073

unsigned int align;

61074

- unsigned int parm_offset;

61075

61076

align = rs6000_function_arg_boundary (mode, type) / PARM_BOUNDARY - 1;

61077

- parm_offset = DEFAULT_ABI == ABI_V4 ? 2 : 6;

61078

- return nwords + (-(parm_offset + nwords) & align);

61079

+ return nwords + (-(rs6000_parm_offset () + nwords) & align);

61080

}

61081

61082

/* Compute the size (in words) of a function argument. */

61083

@@ -7881,7 +9335,7 @@

61084

61085

if (TREE_CODE (ftype) == RECORD_TYPE)

61086

rs6000_darwin64_record_arg_advance_recurse (cum, ftype, bitpos);

61087

- else if (USE_FP_FOR_ARG_P (cum, mode, ftype))

61088

+ else if (USE_FP_FOR_ARG_P (cum, mode))

61089

{

61090

unsigned n_fpregs = (GET_MODE_SIZE (mode) + 7) >> 3;

61091

rs6000_darwin64_record_arg_advance_flush (cum, bitpos, 0);

61092

@@ -7922,7 +9376,7 @@

61093

else

61094

cum->words += n_fpregs;

61095

}

61096

- else if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, 1))

61097

+ else if (USE_ALTIVEC_FOR_ARG_P (cum, mode, 1))

61098

{

61099

rs6000_darwin64_record_arg_advance_flush (cum, bitpos, 0);

61100

cum->vregno++;

61101

@@ -7959,6 +9413,11 @@

61102

rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode,

61103

const_tree type, bool named, int depth)

61104

{

61105

+ enum machine_mode elt_mode;

61106

+ int n_elts;

61107

+

61108

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

61109

+

61110

/* Only tick off an argument if we're not recursing. */

61111

if (depth == 0)

61112

cum->nargs_prototype--;

61113

@@ -7979,15 +9438,16 @@

61114

#endif

61115

61116

if (TARGET_ALTIVEC_ABI

61117

- && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

61118

+ && (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode)

61119

|| (type && TREE_CODE (type) == VECTOR_TYPE

61120

&& int_size_in_bytes (type) == 16)))

61121

{

61122

bool stack = false;

61123

61124

- if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))

61125

+ if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named))

61126

{

61127

- cum->vregno++;

61128

+ cum->vregno += n_elts;

61129

+

61130

if (!TARGET_ALTIVEC)

61131

error ("cannot pass argument in vector register because"

61132

" altivec instructions are disabled, use -maltivec"

61133

@@ -7996,7 +9456,8 @@

61134

/* PowerPC64 Linux and AIX allocate GPRs for a vector argument

61135

even if it is going to be passed in a vector register.

61136

Darwin does the same for variable-argument functions. */

61137

- if ((DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

61138

+ if (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61139

+ && TARGET_64BIT)

61140

|| (cum->stdarg && DEFAULT_ABI != ABI_V4))

61141

stack = true;

61142

}

61143

@@ -8007,15 +9468,13 @@

61144

{

61145

int align;

61146

61147

- /* Vector parameters must be 16-byte aligned. This places

61148

- them at 2 mod 4 in terms of words in 32-bit mode, since

61149

- the parameter save area starts at offset 24 from the

61150

- stack. In 64-bit mode, they just have to start on an

61151

- even word, since the parameter save area is 16-byte

61152

- aligned. Space for GPRs is reserved even if the argument

61153

- will be passed in memory. */

61154

+ /* Vector parameters must be 16-byte aligned. In 32-bit

61155

+ mode this means we need to take into account the offset

61156

+ to the parameter save area. In 64-bit mode, they just

61157

+ have to start on an even word, since the parameter save

61158

+ area is 16-byte aligned. */

61159

if (TARGET_32BIT)

61160

- align = (2 - cum->words) & 3;

61161

+ align = -(rs6000_parm_offset () + cum->words) & 3;

61162

else

61163

align = cum->words & 1;

61164

cum->words += align + rs6000_arg_size (mode, type);

61165

@@ -8140,15 +9599,15 @@

61166

61167

cum->words = align_words + n_words;

61168

61169

- if (SCALAR_FLOAT_MODE_P (mode)

61170

+ if (SCALAR_FLOAT_MODE_P (elt_mode)

61171

&& TARGET_HARD_FLOAT && TARGET_FPRS)

61172

{

61173

/* _Decimal128 must be passed in an even/odd float register pair.

61174

This assumes that the register number is odd when fregno is

61175

odd. */

61176

- if (mode == TDmode && (cum->fregno % 2) == 1)

61177

+ if (elt_mode == TDmode && (cum->fregno % 2) == 1)

61178

cum->fregno++;

61179

- cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3;

61180

+ cum->fregno += n_elts * ((GET_MODE_SIZE (elt_mode) + 7) >> 3);

61181

}

61182

61183

if (TARGET_DEBUG_ARG)

61184

@@ -8358,7 +9817,7 @@

61185

61186

if (TREE_CODE (ftype) == RECORD_TYPE)

61187

rs6000_darwin64_record_arg_recurse (cum, ftype, bitpos, rvec, k);

61188

- else if (cum->named && USE_FP_FOR_ARG_P (cum, mode, ftype))

61189

+ else if (cum->named && USE_FP_FOR_ARG_P (cum, mode))

61190

{

61191

unsigned n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3;

61192

#if 0

61193

@@ -8386,7 +9845,7 @@

61194

if (mode == TFmode || mode == TDmode)

61195

cum->fregno++;

61196

}

61197

- else if (cum->named && USE_ALTIVEC_FOR_ARG_P (cum, mode, ftype, 1))

61198

+ else if (cum->named && USE_ALTIVEC_FOR_ARG_P (cum, mode, 1))

61199

{

61200

rs6000_darwin64_record_arg_flush (cum, bitpos, rvec, k);

61201

rvec[(*k)++]

61202

@@ -8503,6 +9962,84 @@

61203

return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec));

61204

}

61205

61206

+/* We have an argument of MODE and TYPE that goes into FPRs or VRs,

61207

+ but must also be copied into the parameter save area starting at

61208

+ offset ALIGN_WORDS. Fill in RVEC with the elements corresponding

61209

+ to the GPRs and/or memory. Return the number of elements used. */

61210

+

61211

+static int

61212

+rs6000_psave_function_arg (enum machine_mode mode, const_tree type,

61213

+ int align_words, rtx *rvec)

61214

+{

61215

+ int k = 0;

61216

+

61217

+ if (align_words < GP_ARG_NUM_REG)

61218

+ {

61219

+ int n_words = rs6000_arg_size (mode, type);

61220

+

61221

+ if (align_words + n_words > GP_ARG_NUM_REG

61222

+ || mode == BLKmode

61223

+ || (TARGET_32BIT && TARGET_POWERPC64))

61224

+ {

61225

+ /* If this is partially on the stack, then we only

61226

+ include the portion actually in registers here. */

61227

+ enum machine_mode rmode = TARGET_32BIT ? SImode : DImode;

61228

+ int i = 0;

61229

+

61230

+ if (align_words + n_words > GP_ARG_NUM_REG)

61231

+ {

61232

+ /* Not all of the arg fits in gprs. Say that it goes in memory

61233

+ too, using a magic NULL_RTX component. Also see comment in

61234

+ rs6000_mixed_function_arg for why the normal

61235

+ function_arg_partial_nregs scheme doesn't work in this case. */

61236

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx);

61237

+ }

61238

+

61239

+ do

61240

+ {

61241

+ rtx r = gen_rtx_REG (rmode, GP_ARG_MIN_REG + align_words);

61242

+ rtx off = GEN_INT (i++ * GET_MODE_SIZE (rmode));

61243

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

61244

+ }

61245

+ while (++align_words < GP_ARG_NUM_REG && --n_words != 0);

61246

+ }

61247

+ else

61248

+ {

61249

+ /* The whole arg fits in gprs. */

61250

+ rtx r = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

61251

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx);

61252

+ }

61253

+ }

61254

+ else

61255

+ {

61256

+ /* It's entirely in memory. */

61257

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx);

61258

+ }

61259

+

61260

+ return k;

61261

+}

61262

+

61263

+/* RVEC is a vector of K components of an argument of mode MODE.

61264

+ Construct the final function_arg return value from it. */

61265

+

61266

+static rtx

61267

+rs6000_finish_function_arg (enum machine_mode mode, rtx *rvec, int k)

61268

+{

61269

+ gcc_assert (k >= 1);

61270

+

61271

+ /* Avoid returning a PARALLEL in the trivial cases. */

61272

+ if (k == 1)

61273

+ {

61274

+ if (XEXP (rvec[0], 0) == NULL_RTX)

61275

+ return NULL_RTX;

61276

+

61277

+ if (GET_MODE (XEXP (rvec[0], 0)) == mode)

61278

+ return XEXP (rvec[0], 0);

61279

+ }

61280

+

61281

+ return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec));

61282

+}

61283

+

61284

/* Determine where to put an argument to a function.

61285

Value is zero to push the argument on the stack,

61286

or a hard register in which to store the argument.

61287

@@ -8537,6 +10074,8 @@

61288

{

61289

CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);

61290

enum rs6000_abi abi = DEFAULT_ABI;

61291

+ enum machine_mode elt_mode;

61292

+ int n_elts;

61293

61294

/* Return a marker to indicate whether CR1 needs to set or clear the

61295

bit that V.4 uses to say fp args were passed in registers.

61296

@@ -8563,6 +10102,8 @@

61297

return GEN_INT (cum->call_cookie & ~CALL_LIBCALL);

61298

}

61299

61300

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

61301

+

61302

if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type))

61303

{

61304

rtx rslt = rs6000_darwin64_record_arg (cum, type, named, /*retval= */false);

61305

@@ -8571,33 +10112,30 @@

61306

/* Else fall through to usual handling. */

61307

}

61308

61309

- if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))

61310

- if (TARGET_64BIT && ! cum->prototype)

61311

- {

61312

- /* Vector parameters get passed in vector register

61313

- and also in GPRs or memory, in absence of prototype. */

61314

- int align_words;

61315

- rtx slot;

61316

- align_words = (cum->words + 1) & ~1;

61317

+ if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named))

61318

+ {

61319

+ rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1];

61320

+ rtx r, off;

61321

+ int i, k = 0;

61322

61323

- if (align_words >= GP_ARG_NUM_REG)

61324

- {

61325

- slot = NULL_RTX;

61326

- }

61327

- else

61328

- {

61329

- slot = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

61330

- }

61331

- return gen_rtx_PARALLEL (mode,

61332

- gen_rtvec (2,

61333

- gen_rtx_EXPR_LIST (VOIDmode,

61334

- slot, const0_rtx),

61335

- gen_rtx_EXPR_LIST (VOIDmode,

61336

- gen_rtx_REG (mode, cum->vregno),

61337

- const0_rtx)));

61338

- }

61339

- else

61340

- return gen_rtx_REG (mode, cum->vregno);

61341

+ /* Do we also need to pass this argument in the parameter

61342

+ save area? */

61343

+ if (TARGET_64BIT && ! cum->prototype)

61344

+ {

61345

+ int align_words = (cum->words + 1) & ~1;

61346

+ k = rs6000_psave_function_arg (mode, type, align_words, rvec);

61347

+ }

61348

+

61349

+ /* Describe where this argument goes in the vector registers. */

61350

+ for (i = 0; i < n_elts && cum->vregno + i <= ALTIVEC_ARG_MAX_REG; i++)

61351

+ {

61352

+ r = gen_rtx_REG (elt_mode, cum->vregno + i);

61353

+ off = GEN_INT (i * GET_MODE_SIZE (elt_mode));

61354

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

61355

+ }

61356

+

61357

+ return rs6000_finish_function_arg (mode, rvec, k);

61358

+ }

61359

else if (TARGET_ALTIVEC_ABI

61360

&& (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

61361

|| (type && TREE_CODE (type) == VECTOR_TYPE

61362

@@ -8612,13 +10150,13 @@

61363

int align, align_words, n_words;

61364

enum machine_mode part_mode;

61365

61366

- /* Vector parameters must be 16-byte aligned. This places them at

61367

- 2 mod 4 in terms of words in 32-bit mode, since the parameter

61368

- save area starts at offset 24 from the stack. In 64-bit mode,

61369

- they just have to start on an even word, since the parameter

61370

- save area is 16-byte aligned. */

61371

+ /* Vector parameters must be 16-byte aligned. In 32-bit

61372

+ mode this means we need to take into account the offset

61373

+ to the parameter save area. In 64-bit mode, they just

61374

+ have to start on an even word, since the parameter save

61375

+ area is 16-byte aligned. */

61376

if (TARGET_32BIT)

61377

- align = (2 - cum->words) & 3;

61378

+ align = -(rs6000_parm_offset () + cum->words) & 3;

61379

else

61380

align = cum->words & 1;

61381

align_words = cum->words + align;

61382

@@ -8696,92 +10234,44 @@

61383

61384

/* _Decimal128 must be passed in an even/odd float register pair.

61385

This assumes that the register number is odd when fregno is odd. */

61386

- if (mode == TDmode && (cum->fregno % 2) == 1)

61387

+ if (elt_mode == TDmode && (cum->fregno % 2) == 1)

61388

cum->fregno++;

61389

61390

- if (USE_FP_FOR_ARG_P (cum, mode, type))

61391

+ if (USE_FP_FOR_ARG_P (cum, elt_mode))

61392

{

61393

- rtx rvec[GP_ARG_NUM_REG + 1];

61394

- rtx r;

61395

- int k;

61396

- bool needs_psave;

61397

- enum machine_mode fmode = mode;

61398

- unsigned long n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3;

61399

+ rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1];

61400

+ rtx r, off;

61401

+ int i, k = 0;

61402

+ unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3;

61403

61404

- if (cum->fregno + n_fpreg > FP_ARG_MAX_REG + 1)

61405

- {

61406

- /* Currently, we only ever need one reg here because complex

61407

- doubles are split. */

61408

- gcc_assert (cum->fregno == FP_ARG_MAX_REG

61409

- && (fmode == TFmode || fmode == TDmode));

61410

+ /* Do we also need to pass this argument in the parameter

61411

+ save area? */

61412

+ if (type && (cum->nargs_prototype <= 0

61413

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61414

+ && TARGET_XL_COMPAT

61415

+ && align_words >= GP_ARG_NUM_REG)))

61416

+ k = rs6000_psave_function_arg (mode, type, align_words, rvec);

61417

61418

- /* Long double or _Decimal128 split over regs and memory. */

61419

- fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode;

61420

- }

61421

-

61422

- /* Do we also need to pass this arg in the parameter save

61423

- area? */

61424

- needs_psave = (type

61425

- && (cum->nargs_prototype <= 0

61426

- || (DEFAULT_ABI == ABI_AIX

61427

- && TARGET_XL_COMPAT

61428

- && align_words >= GP_ARG_NUM_REG)));

61429

-

61430

- if (!needs_psave && mode == fmode)

61431

- return gen_rtx_REG (fmode, cum->fregno);

61432

-

61433

- k = 0;

61434

- if (needs_psave)

61435

+ /* Describe where this argument goes in the fprs. */

61436

+ for (i = 0; i < n_elts

61437

+ && cum->fregno + i * n_fpreg <= FP_ARG_MAX_REG; i++)

61438

{

61439

- /* Describe the part that goes in gprs or the stack.

61440

- This piece must come first, before the fprs. */

61441

- if (align_words < GP_ARG_NUM_REG)

61442

+ /* Check if the argument is split over registers and memory.

61443

+ This can only ever happen for long double or _Decimal128;

61444

+ complex types are handled via split_complex_arg. */

61445

+ enum machine_mode fmode = elt_mode;

61446

+ if (cum->fregno + (i + 1) * n_fpreg > FP_ARG_MAX_REG + 1)

61447

{

61448

- unsigned long n_words = rs6000_arg_size (mode, type);

61449

+ gcc_assert (fmode == TFmode || fmode == TDmode);

61450

+ fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode;

61451

+ }

61452

61453

- if (align_words + n_words > GP_ARG_NUM_REG

61454

- || (TARGET_32BIT && TARGET_POWERPC64))

61455

- {

61456

- /* If this is partially on the stack, then we only

61457

- include the portion actually in registers here. */

61458

- enum machine_mode rmode = TARGET_32BIT ? SImode : DImode;

61459

- rtx off;

61460

- int i = 0;

61461

- if (align_words + n_words > GP_ARG_NUM_REG)

61462

- /* Not all of the arg fits in gprs. Say that it

61463

- goes in memory too, using a magic NULL_RTX

61464

- component. Also see comment in

61465

- rs6000_mixed_function_arg for why the normal

61466

- function_arg_partial_nregs scheme doesn't work

61467

- in this case. */

61468

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX,

61469

- const0_rtx);

61470

- do

61471

- {

61472

- r = gen_rtx_REG (rmode,

61473

- GP_ARG_MIN_REG + align_words);

61474

- off = GEN_INT (i++ * GET_MODE_SIZE (rmode));

61475

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

61476

- }

61477

- while (++align_words < GP_ARG_NUM_REG && --n_words != 0);

61478

- }

61479

- else

61480

- {

61481

- /* The whole arg fits in gprs. */

61482

- r = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

61483

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx);

61484

- }

61485

- }

61486

- else

61487

- /* It's entirely in memory. */

61488

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx);

61489

+ r = gen_rtx_REG (fmode, cum->fregno + i * n_fpreg);

61490

+ off = GEN_INT (i * GET_MODE_SIZE (elt_mode));

61491

+ rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off);

61492

}

61493

61494

- /* Describe where this piece goes in the fprs. */

61495

- r = gen_rtx_REG (fmode, cum->fregno);

61496

- rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx);

61497

-

61498

- return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec));

61499

+ return rs6000_finish_function_arg (mode, rvec, k);

61500

}

61501

else if (align_words < GP_ARG_NUM_REG)

61502

{

61503

@@ -8788,9 +10278,6 @@

61504

if (TARGET_32BIT && TARGET_POWERPC64)

61505

return rs6000_mixed_function_arg (mode, type, align_words);

61506

61507

- if (mode == BLKmode)

61508

- mode = Pmode;

61509

-

61510

return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);

61511

}

61512

else

61513

@@ -8809,16 +10296,32 @@

61514

tree type, bool named)

61515

{

61516

CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);

61517

+ bool passed_in_gprs = true;

61518

int ret = 0;

61519

int align_words;

61520

+ enum machine_mode elt_mode;

61521

+ int n_elts;

61522

61523

+ rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts);

61524

+

61525

if (DEFAULT_ABI == ABI_V4)

61526

return 0;

61527

61528

- if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named)

61529

- && cum->nargs_prototype >= 0)

61530

- return 0;

61531

+ if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named))

61532

+ {

61533

+ /* If we are passing this arg in the fixed parameter save area

61534

+ (gprs or memory) as well as VRs, we do not use the partial

61535

+ bytes mechanism; instead, rs6000_function_arg will return a

61536

+ PARALLEL including a memory element as necessary. */

61537

+ if (TARGET_64BIT && ! cum->prototype)

61538

+ return 0;

61539

61540

+ /* Otherwise, we pass in VRs only. Check for partial copies. */

61541

+ passed_in_gprs = false;

61542

+ if (cum->vregno + n_elts > ALTIVEC_ARG_MAX_REG + 1)

61543

+ ret = (ALTIVEC_ARG_MAX_REG + 1 - cum->vregno) * 16;

61544

+ }

61545

+

61546

/* In this complicated case we just disable the partial_nregs code. */

61547

if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type))

61548

return 0;

61549

@@ -8825,26 +10328,30 @@

61550

61551

align_words = rs6000_parm_start (mode, type, cum->words);

61552

61553

- if (USE_FP_FOR_ARG_P (cum, mode, type))

61554

+ if (USE_FP_FOR_ARG_P (cum, elt_mode))

61555

{

61556

+ unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3;

61557

+

61558

/* If we are passing this arg in the fixed parameter save area

61559

- (gprs or memory) as well as fprs, then this function should

61560

- return the number of partial bytes passed in the parameter

61561

- save area rather than partial bytes passed in fprs. */

61562

+ (gprs or memory) as well as FPRs, we do not use the partial

61563

+ bytes mechanism; instead, rs6000_function_arg will return a

61564

+ PARALLEL including a memory element as necessary. */

61565

if (type

61566

&& (cum->nargs_prototype <= 0

61567

- || (DEFAULT_ABI == ABI_AIX

61568

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

61569

&& TARGET_XL_COMPAT

61570

&& align_words >= GP_ARG_NUM_REG)))

61571

return 0;

61572

- else if (cum->fregno + ((GET_MODE_SIZE (mode) + 7) >> 3)

61573

- > FP_ARG_MAX_REG + 1)

61574

- ret = (FP_ARG_MAX_REG + 1 - cum->fregno) * 8;

61575

- else if (cum->nargs_prototype >= 0)

61576

- return 0;

61577

+

61578

+ /* Otherwise, we pass in FPRs only. Check for partial copies. */

61579

+ passed_in_gprs = false;

61580

+ if (cum->fregno + n_elts * n_fpreg > FP_ARG_MAX_REG + 1)

61581

+ ret = ((FP_ARG_MAX_REG + 1 - cum->fregno)

61582

+ * MIN (8, GET_MODE_SIZE (elt_mode)));

61583

}

61584

61585

- if (align_words < GP_ARG_NUM_REG

61586

+ if (passed_in_gprs

61587

+ && align_words < GP_ARG_NUM_REG

61588

&& GP_ARG_NUM_REG < align_words + rs6000_arg_size (mode, type))

61589

ret = (GP_ARG_NUM_REG - align_words) * (TARGET_32BIT ? 4 : 8);

61590

61591

@@ -8925,6 +10432,139 @@

61592

return 0;

61593

}

61594

61595

+/* Process parameter of type TYPE after ARGS_SO_FAR parameters were

61596

+ already processes. Return true if the parameter must be passed

61597

+ (fully or partially) on the stack. */

61598

+

61599

+static bool

61600

+rs6000_parm_needs_stack (cumulative_args_t args_so_far, tree type)

61601

+{

61602

+ enum machine_mode mode;

61603

+ int unsignedp;

61604

+ rtx entry_parm;

61605

+

61606

+ /* Catch errors. */

61607

+ if (type == NULL || type == error_mark_node)

61608

+ return true;

61609

+

61610

+ /* Handle types with no storage requirement. */

61611

+ if (TYPE_MODE (type) == VOIDmode)

61612

+ return false;

61613

+

61614

+ /* Handle complex types. */

61615

+ if (TREE_CODE (type) == COMPLEX_TYPE)

61616

+ return (rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type))

61617

+ || rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type)));

61618

+

61619

+ /* Handle transparent aggregates. */

61620

+ if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE)

61621

+ && TYPE_TRANSPARENT_AGGR (type))

61622

+ type = TREE_TYPE (first_field (type));

61623

+

61624

+ /* See if this arg was passed by invisible reference. */

61625

+ if (pass_by_reference (get_cumulative_args (args_so_far),

61626

+ TYPE_MODE (type), type, true))

61627

+ type = build_pointer_type (type);

61628

+

61629

+ /* Find mode as it is passed by the ABI. */

61630

+ unsignedp = TYPE_UNSIGNED (type);

61631

+ mode = promote_mode (type, TYPE_MODE (type), &unsignedp);

61632

+

61633

+ /* If we must pass in stack, we need a stack. */

61634

+ if (rs6000_must_pass_in_stack (mode, type))

61635

+ return true;

61636

+

61637

+ /* If there is no incoming register, we need a stack. */

61638

+ entry_parm = rs6000_function_arg (args_so_far, mode, type, true);

61639

+ if (entry_parm == NULL)

61640

+ return true;

61641

+

61642

+ /* Likewise if we need to pass both in registers and on the stack. */

61643

+ if (GET_CODE (entry_parm) == PARALLEL

61644

+ && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX)

61645

+ return true;

61646

+

61647

+ /* Also true if we're partially in registers and partially not. */

61648

+ if (rs6000_arg_partial_bytes (args_so_far, mode, type, true) != 0)

61649

+ return true;

61650

+

61651

+ /* Update info on where next arg arrives in registers. */

61652

+ rs6000_function_arg_advance (args_so_far, mode, type, true);

61653

+ return false;

61654

+}

61655

+

61656

+/* Return true if FUN has no prototype, has a variable argument

61657

+ list, or passes any parameter in memory. */

61658

+

61659

+static bool

61660

+rs6000_function_parms_need_stack (tree fun)

61661

+{

61662

+ function_args_iterator args_iter;

61663

+ tree arg_type;

61664

+ CUMULATIVE_ARGS args_so_far_v;

61665

+ cumulative_args_t args_so_far;

61666

+

61667

+ if (!fun)

61668

+ /* Must be a libcall, all of which only use reg parms. */

61669

+ return false;

61670

+ if (!TYPE_P (fun))

61671

+ fun = TREE_TYPE (fun);

61672

+

61673

+ /* Varargs functions need the parameter save area. */

61674

+ if (!prototype_p (fun) || stdarg_p (fun))

61675

+ return true;

61676

+

61677

+ INIT_CUMULATIVE_INCOMING_ARGS (args_so_far_v, fun, NULL_RTX);

61678

+ args_so_far = pack_cumulative_args (&args_so_far_v);

61679

+

61680

+ if (aggregate_value_p (TREE_TYPE (fun), fun))

61681

+ {

61682

+ tree type = build_pointer_type (TREE_TYPE (fun));

61683

+ rs6000_parm_needs_stack (args_so_far, type);

61684

+ }

61685

+

61686

+ FOREACH_FUNCTION_ARGS (fun, arg_type, args_iter)

61687

+ if (rs6000_parm_needs_stack (args_so_far, arg_type))

61688

+ return true;

61689

+

61690

+ return false;

61691

+}

61692

+

61693

+/* Return the size of the REG_PARM_STACK_SPACE are for FUN. This is

61694

+ usually a constant depending on the ABI. However, in the ELFv2 ABI

61695

+ the register parameter area is optional when calling a function that

61696

+ has a prototype is scope, has no variable argument list, and passes

61697

+ all parameters in registers. */

61698

+

61699

+int

61700

+rs6000_reg_parm_stack_space (tree fun)

61701

+{

61702

+ int reg_parm_stack_space;

61703

+

61704

+ switch (DEFAULT_ABI)

61705

+ {

61706

+ default:

61707

+ reg_parm_stack_space = 0;

61708

+ break;

61709

+

61710

+ case ABI_AIX:

61711

+ case ABI_DARWIN:

61712

+ reg_parm_stack_space = TARGET_64BIT ? 64 : 32;

61713

+ break;

61714

+

61715

+ case ABI_ELFv2:

61716

+ /* ??? Recomputing this every time is a bit expensive. Is there

61717

+ a place to cache this information? */

61718

+ if (rs6000_function_parms_need_stack (fun))

61719

+ reg_parm_stack_space = TARGET_64BIT ? 64 : 32;

61720

+ else

61721

+ reg_parm_stack_space = 0;

61722

+ break;

61723

+ }

61724

+

61725

+ return reg_parm_stack_space;

61726

+}

61727

+

61728

static void

61729

rs6000_move_block_from_reg (int regno, rtx x, int nregs)

61730

{

61731

@@ -9306,8 +10946,10 @@

61732

We don't need to check for pass-by-reference because of the test above.

61733

We can return a simplifed answer, since we know there's no offset to add. */

61734

61735

- if (TARGET_MACHO

61736

- && rs6000_darwin64_abi

61737

+ if (((TARGET_MACHO

61738

+ && rs6000_darwin64_abi)

61739

+ || DEFAULT_ABI == ABI_ELFv2

61740

+ || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm))

61741

&& integer_zerop (TYPE_SIZE (type)))

61742

{

61743

unsigned HOST_WIDE_INT align, boundary;

61744

@@ -9602,6 +11244,7 @@

61745

#undef RS6000_BUILTIN_A

61746

#undef RS6000_BUILTIN_D

61747

#undef RS6000_BUILTIN_E

61748

+#undef RS6000_BUILTIN_H

61749

#undef RS6000_BUILTIN_P

61750

#undef RS6000_BUILTIN_Q

61751

#undef RS6000_BUILTIN_S

61752

@@ -9615,6 +11258,7 @@

61753

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

61754

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61755

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61756

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61757

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61758

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61759

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

61760

@@ -9633,6 +11277,7 @@

61761

#undef RS6000_BUILTIN_A

61762

#undef RS6000_BUILTIN_D

61763

#undef RS6000_BUILTIN_E

61764

+#undef RS6000_BUILTIN_H

61765

#undef RS6000_BUILTIN_P

61766

#undef RS6000_BUILTIN_Q

61767

#undef RS6000_BUILTIN_S

61768

@@ -9646,6 +11291,7 @@

61769

{ MASK, ICODE, NAME, ENUM },

61770

61771

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61772

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61773

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61774

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61775

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

61776

@@ -9664,6 +11310,7 @@

61777

#undef RS6000_BUILTIN_A

61778

#undef RS6000_BUILTIN_D

61779

#undef RS6000_BUILTIN_E

61780

+#undef RS6000_BUILTIN_H

61781

#undef RS6000_BUILTIN_P

61782

#undef RS6000_BUILTIN_Q

61783

#undef RS6000_BUILTIN_S

61784

@@ -9677,6 +11324,7 @@

61785

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

61786

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61787

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61788

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61789

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61790

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61791

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

61792

@@ -9693,6 +11341,7 @@

61793

#undef RS6000_BUILTIN_A

61794

#undef RS6000_BUILTIN_D

61795

#undef RS6000_BUILTIN_E

61796

+#undef RS6000_BUILTIN_H

61797

#undef RS6000_BUILTIN_P

61798

#undef RS6000_BUILTIN_Q

61799

#undef RS6000_BUILTIN_S

61800

@@ -9704,6 +11353,7 @@

61801

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

61802

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61803

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61804

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61805

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \

61806

{ MASK, ICODE, NAME, ENUM },

61807

61808

@@ -9725,6 +11375,7 @@

61809

#undef RS6000_BUILTIN_A

61810

#undef RS6000_BUILTIN_D

61811

#undef RS6000_BUILTIN_E

61812

+#undef RS6000_BUILTIN_H

61813

#undef RS6000_BUILTIN_P

61814

#undef RS6000_BUILTIN_Q

61815

#undef RS6000_BUILTIN_S

61816

@@ -9736,6 +11387,7 @@

61817

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

61818

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61819

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61820

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61821

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61822

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61823

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE) \

61824

@@ -9755,6 +11407,7 @@

61825

#undef RS6000_BUILTIN_A

61826

#undef RS6000_BUILTIN_D

61827

#undef RS6000_BUILTIN_E

61828

+#undef RS6000_BUILTIN_H

61829

#undef RS6000_BUILTIN_P

61830

#undef RS6000_BUILTIN_Q

61831

#undef RS6000_BUILTIN_S

61832

@@ -9768,6 +11421,7 @@

61833

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) \

61834

{ MASK, ICODE, NAME, ENUM },

61835

61836

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61837

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61838

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61839

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

61840

@@ -9785,6 +11439,7 @@

61841

#undef RS6000_BUILTIN_A

61842

#undef RS6000_BUILTIN_D

61843

#undef RS6000_BUILTIN_E

61844

+#undef RS6000_BUILTIN_H

61845

#undef RS6000_BUILTIN_P

61846

#undef RS6000_BUILTIN_Q

61847

#undef RS6000_BUILTIN_S

61848

@@ -9796,6 +11451,7 @@

61849

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

61850

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61851

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61852

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61853

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61854

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE) \

61855

{ MASK, ICODE, NAME, ENUM },

61856

@@ -9816,6 +11472,7 @@

61857

#undef RS6000_BUILTIN_A

61858

#undef RS6000_BUILTIN_D

61859

#undef RS6000_BUILTIN_E

61860

+#undef RS6000_BUILTIN_H

61861

#undef RS6000_BUILTIN_P

61862

#undef RS6000_BUILTIN_Q

61863

#undef RS6000_BUILTIN_S

61864

@@ -9829,6 +11486,7 @@

61865

61866

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61867

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61868

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61869

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61870

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61871

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

61872

@@ -9846,8 +11504,9 @@

61873

#undef RS6000_BUILTIN_2

61874

#undef RS6000_BUILTIN_3

61875

#undef RS6000_BUILTIN_A

61876

+#undef RS6000_BUILTIN_D

61877

#undef RS6000_BUILTIN_E

61878

-#undef RS6000_BUILTIN_D

61879

+#undef RS6000_BUILTIN_H

61880

#undef RS6000_BUILTIN_P

61881

#undef RS6000_BUILTIN_Q

61882

#undef RS6000_BUILTIN_S

61883

@@ -9861,6 +11520,7 @@

61884

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

61885

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61886

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61887

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)

61888

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61889

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61890

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

61891

@@ -9871,6 +11531,7 @@

61892

#include "rs6000-builtin.def"

61893

};

61894

61895

+/* HTM builtins. */

61896

#undef RS6000_BUILTIN_1

61897

#undef RS6000_BUILTIN_2

61898

#undef RS6000_BUILTIN_3

61899

@@ -9877,11 +11538,42 @@

61900

#undef RS6000_BUILTIN_A

61901

#undef RS6000_BUILTIN_D

61902

#undef RS6000_BUILTIN_E

61903

+#undef RS6000_BUILTIN_H

61904

#undef RS6000_BUILTIN_P

61905

#undef RS6000_BUILTIN_Q

61906

#undef RS6000_BUILTIN_S

61907

#undef RS6000_BUILTIN_X

61908

61909

+#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)

61910

+#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)

61911

+#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)

61912

+#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)

61913

+#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)

61914

+#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)

61915

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \

61916

+ { MASK, ICODE, NAME, ENUM },

61917

+

61918

+#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)

61919

+#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)

61920

+#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)

61921

+#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)

61922

+

61923

+static const struct builtin_description bdesc_htm[] =

61924

+{

61925

+#include "rs6000-builtin.def"

61926

+};

61927

+

61928

+#undef RS6000_BUILTIN_1

61929

+#undef RS6000_BUILTIN_2

61930

+#undef RS6000_BUILTIN_3

61931

+#undef RS6000_BUILTIN_A

61932

+#undef RS6000_BUILTIN_D

61933

+#undef RS6000_BUILTIN_E

61934

+#undef RS6000_BUILTIN_H

61935

+#undef RS6000_BUILTIN_P

61936

+#undef RS6000_BUILTIN_Q

61937

+#undef RS6000_BUILTIN_S

61938

+

61939

/* Return true if a builtin function is overloaded. */

61940

bool

61941

rs6000_overloaded_builtin_p (enum rs6000_builtins fncode)

61942

@@ -10189,7 +11881,101 @@

61943

return target;

61944

}

61945

61946

+/* Return a constant vector for use as a little-endian permute control vector

61947

+ to reverse the order of elements of the given vector mode. */

61948

static rtx

61949

+swap_selector_for_mode (enum machine_mode mode)

61950

+{

61951

+ /* These are little endian vectors, so their elements are reversed

61952

+ from what you would normally expect for a permute control vector. */

61953

+ unsigned int swap2[16] = {7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8};

61954

+ unsigned int swap4[16] = {3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12};

61955

+ unsigned int swap8[16] = {1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14};

61956

+ unsigned int swap16[16] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};

61957

+ unsigned int *swaparray, i;

61958

+ rtx perm[16];

61959

+

61960

+ switch (mode)

61961

+ {

61962

+ case V2DFmode:

61963

+ case V2DImode:

61964

+ swaparray = swap2;

61965

+ break;

61966

+ case V4SFmode:

61967

+ case V4SImode:

61968

+ swaparray = swap4;

61969

+ break;

61970

+ case V8HImode:

61971

+ swaparray = swap8;

61972

+ break;

61973

+ case V16QImode:

61974

+ swaparray = swap16;

61975

+ break;

61976

+ default:

61977

+ gcc_unreachable ();

61978

+ }

61979

+

61980

+ for (i = 0; i < 16; ++i)

61981

+ perm[i] = GEN_INT (swaparray[i]);

61982

+

61983

+ return force_reg (V16QImode, gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm)));

61984

+}

61985

+

61986

+/* Generate code for an "lvx", "lvxl", or "lve*x" built-in for a little endian target

61987

+ with -maltivec=be specified. Issue the load followed by an element-reversing

61988

+ permute. */

61989

+void

61990

+altivec_expand_lvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec)

61991

+{

61992

+ rtx tmp = gen_reg_rtx (mode);

61993

+ rtx load = gen_rtx_SET (VOIDmode, tmp, op1);

61994

+ rtx lvx = gen_rtx_UNSPEC (mode, gen_rtvec (1, const0_rtx), unspec);

61995

+ rtx par = gen_rtx_PARALLEL (mode, gen_rtvec (2, load, lvx));

61996

+ rtx sel = swap_selector_for_mode (mode);

61997

+ rtx vperm = gen_rtx_UNSPEC (mode, gen_rtvec (3, tmp, tmp, sel), UNSPEC_VPERM);

61998

+

61999

+ gcc_assert (REG_P (op0));

62000

+ emit_insn (par);

62001

+ emit_insn (gen_rtx_SET (VOIDmode, op0, vperm));

62002

+}

62003

+

62004

+/* Generate code for a "stvx" or "stvxl" built-in for a little endian target

62005

+ with -maltivec=be specified. Issue the store preceded by an element-reversing

62006

+ permute. */

62007

+void

62008

+altivec_expand_stvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec)

62009

+{

62010

+ rtx tmp = gen_reg_rtx (mode);

62011

+ rtx store = gen_rtx_SET (VOIDmode, op0, tmp);

62012

+ rtx stvx = gen_rtx_UNSPEC (mode, gen_rtvec (1, const0_rtx), unspec);

62013

+ rtx par = gen_rtx_PARALLEL (mode, gen_rtvec (2, store, stvx));

62014

+ rtx sel = swap_selector_for_mode (mode);

62015

+ rtx vperm;

62016

+

62017

+ gcc_assert (REG_P (op1));

62018

+ vperm = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op1, sel), UNSPEC_VPERM);

62019

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, vperm));

62020

+ emit_insn (par);

62021

+}

62022

+

62023

+/* Generate code for a "stve*x" built-in for a little endian target with -maltivec=be

62024

+ specified. Issue the store preceded by an element-reversing permute. */

62025

+void

62026

+altivec_expand_stvex_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec)

62027

+{

62028

+ enum machine_mode inner_mode = GET_MODE_INNER (mode);

62029

+ rtx tmp = gen_reg_rtx (mode);

62030

+ rtx stvx = gen_rtx_UNSPEC (inner_mode, gen_rtvec (1, tmp), unspec);

62031

+ rtx sel = swap_selector_for_mode (mode);

62032

+ rtx vperm;

62033

+

62034

+ gcc_assert (REG_P (op1));

62035

+ vperm = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op1, sel), UNSPEC_VPERM);

62036

+ emit_insn (gen_rtx_SET (VOIDmode, tmp, vperm));

62037

+ emit_insn (gen_rtx_SET (VOIDmode, op0, stvx));

62038

+}

62039

+

62040

+static rtx

62041

altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk)

62042

{

62043

rtx pat, addr;

62044

@@ -10351,7 +12137,198 @@

62045

return NULL_RTX;

62046

}

62047

62048

+/* Return the appropriate SPR number associated with the given builtin. */

62049

+static inline HOST_WIDE_INT

62050

+htm_spr_num (enum rs6000_builtins code)

62051

+{

62052

+ if (code == HTM_BUILTIN_GET_TFHAR

62053

+ || code == HTM_BUILTIN_SET_TFHAR)

62054

+ return TFHAR_SPR;

62055

+ else if (code == HTM_BUILTIN_GET_TFIAR

62056

+ || code == HTM_BUILTIN_SET_TFIAR)

62057

+ return TFIAR_SPR;

62058

+ else if (code == HTM_BUILTIN_GET_TEXASR

62059

+ || code == HTM_BUILTIN_SET_TEXASR)

62060

+ return TEXASR_SPR;

62061

+ gcc_assert (code == HTM_BUILTIN_GET_TEXASRU

62062

+ || code == HTM_BUILTIN_SET_TEXASRU);

62063

+ return TEXASRU_SPR;

62064

+}

62065

+

62066

+/* Return the appropriate SPR regno associated with the given builtin. */

62067

+static inline HOST_WIDE_INT

62068

+htm_spr_regno (enum rs6000_builtins code)

62069

+{

62070

+ if (code == HTM_BUILTIN_GET_TFHAR

62071

+ || code == HTM_BUILTIN_SET_TFHAR)

62072

+ return TFHAR_REGNO;

62073

+ else if (code == HTM_BUILTIN_GET_TFIAR

62074

+ || code == HTM_BUILTIN_SET_TFIAR)

62075

+ return TFIAR_REGNO;

62076

+ gcc_assert (code == HTM_BUILTIN_GET_TEXASR

62077

+ || code == HTM_BUILTIN_SET_TEXASR

62078

+ || code == HTM_BUILTIN_GET_TEXASRU

62079

+ || code == HTM_BUILTIN_SET_TEXASRU);

62080

+ return TEXASR_REGNO;

62081

+}

62082

+

62083

+/* Return the correct ICODE value depending on whether we are

62084

+ setting or reading the HTM SPRs. */

62085

+static inline enum insn_code

62086

+rs6000_htm_spr_icode (bool nonvoid)

62087

+{

62088

+ if (nonvoid)

62089

+ return (TARGET_64BIT) ? CODE_FOR_htm_mfspr_di : CODE_FOR_htm_mfspr_si;

62090

+ else

62091

+ return (TARGET_64BIT) ? CODE_FOR_htm_mtspr_di : CODE_FOR_htm_mtspr_si;

62092

+}

62093

+

62094

+/* Expand the HTM builtin in EXP and store the result in TARGET.

62095

+ Store true in *EXPANDEDP if we found a builtin to expand. */

62096

static rtx

62097

+htm_expand_builtin (tree exp, rtx target, bool * expandedp)

62098

+{

62099

+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);

62100

+ bool nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;

62101

+ enum rs6000_builtins fcode = (enum rs6000_builtins) DECL_FUNCTION_CODE (fndecl);

62102

+ const struct builtin_description *d;

62103

+ size_t i;

62104

+

62105

+ *expandedp = false;

62106

+

62107

+ /* Expand the HTM builtins. */

62108

+ d = bdesc_htm;

62109

+ for (i = 0; i < ARRAY_SIZE (bdesc_htm); i++, d++)

62110

+ if (d->code == fcode)

62111

+ {

62112

+ rtx op[MAX_HTM_OPERANDS], pat;

62113

+ int nopnds = 0;

62114

+ tree arg;

62115

+ call_expr_arg_iterator iter;

62116

+ unsigned attr = rs6000_builtin_info[fcode].attr;

62117

+ enum insn_code icode = d->icode;

62118

+

62119

+ if (attr & RS6000_BTC_SPR)

62120

+ icode = rs6000_htm_spr_icode (nonvoid);

62121

+

62122

+ if (nonvoid)

62123

+ {

62124

+ enum machine_mode tmode = insn_data[icode].operand[0].mode;

62125

+ if (!target

62126

+ || GET_MODE (target) != tmode

62127

+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))

62128

+ target = gen_reg_rtx (tmode);

62129

+ op[nopnds++] = target;

62130

+ }

62131

+

62132

+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)

62133

+ {

62134

+ const struct insn_operand_data *insn_op;

62135

+

62136

+ if (arg == error_mark_node || nopnds >= MAX_HTM_OPERANDS)

62137

+ return NULL_RTX;

62138

+

62139

+ insn_op = &insn_data[icode].operand[nopnds];

62140

+

62141

+ op[nopnds] = expand_normal (arg);

62142

+

62143

+ if (!(*insn_op->predicate) (op[nopnds], insn_op->mode))

62144

+ {

62145

+ if (!strcmp (insn_op->constraint, "n"))

62146

+ {

62147

+ int arg_num = (nonvoid) ? nopnds : nopnds + 1;

62148

+ if (!CONST_INT_P (op[nopnds]))

62149

+ error ("argument %d must be an unsigned literal", arg_num);

62150

+ else

62151

+ error ("argument %d is an unsigned literal that is "

62152

+ "out of range", arg_num);

62153

+ return const0_rtx;

62154

+ }

62155

+ op[nopnds] = copy_to_mode_reg (insn_op->mode, op[nopnds]);

62156

+ }

62157

+

62158

+ nopnds++;

62159

+ }

62160

+

62161

+ /* Handle the builtins for extended mnemonics. These accept

62162

+ no arguments, but map to builtins that take arguments. */

62163

+ switch (fcode)

62164

+ {

62165

+ case HTM_BUILTIN_TENDALL: /* Alias for: tend. 1 */

62166

+ case HTM_BUILTIN_TRESUME: /* Alias for: tsr. 1 */

62167

+ op[nopnds++] = GEN_INT (1);

62168

+#ifdef ENABLE_CHECKING

62169

+ attr |= RS6000_BTC_UNARY;

62170

+#endif

62171

+ break;

62172

+ case HTM_BUILTIN_TSUSPEND: /* Alias for: tsr. 0 */

62173

+ op[nopnds++] = GEN_INT (0);

62174

+#ifdef ENABLE_CHECKING

62175

+ attr |= RS6000_BTC_UNARY;

62176

+#endif

62177

+ break;

62178

+ default:

62179

+ break;

62180

+ }

62181

+

62182

+ /* If this builtin accesses SPRs, then pass in the appropriate

62183

+ SPR number and SPR regno as the last two operands. */

62184

+ if (attr & RS6000_BTC_SPR)

62185

+ {

62186

+ op[nopnds++] = gen_rtx_CONST_INT (Pmode, htm_spr_num (fcode));

62187

+ op[nopnds++] = gen_rtx_REG (Pmode, htm_spr_regno (fcode));

62188

+ }

62189

+

62190

+#ifdef ENABLE_CHECKING

62191

+ int expected_nopnds = 0;

62192

+ if ((attr & RS6000_BTC_TYPE_MASK) == RS6000_BTC_UNARY)

62193

+ expected_nopnds = 1;

62194

+ else if ((attr & RS6000_BTC_TYPE_MASK) == RS6000_BTC_BINARY)

62195

+ expected_nopnds = 2;

62196

+ else if ((attr & RS6000_BTC_TYPE_MASK) == RS6000_BTC_TERNARY)

62197

+ expected_nopnds = 3;

62198

+ if (!(attr & RS6000_BTC_VOID))

62199

+ expected_nopnds += 1;

62200

+ if (attr & RS6000_BTC_SPR)

62201

+ expected_nopnds += 2;

62202

+

62203

+ gcc_assert (nopnds == expected_nopnds && nopnds <= MAX_HTM_OPERANDS);

62204

+#endif

62205

+

62206

+ switch (nopnds)

62207

+ {

62208

+ case 0:

62209

+ pat = GEN_FCN (icode) (NULL_RTX);

62210

+ break;

62211

+ case 1:

62212

+ pat = GEN_FCN (icode) (op[0]);

62213

+ break;

62214

+ case 2:

62215

+ pat = GEN_FCN (icode) (op[0], op[1]);

62216

+ break;

62217

+ case 3:

62218

+ pat = GEN_FCN (icode) (op[0], op[1], op[2]);

62219

+ break;

62220

+ case 4:

62221

+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);

62222

+ break;

62223

+ default:

62224

+ gcc_unreachable ();

62225

+ }

62226

+ if (!pat)

62227

+ return NULL_RTX;

62228

+ emit_insn (pat);

62229

+

62230

+ *expandedp = true;

62231

+ if (nonvoid)

62232

+ return target;

62233

+ return const0_rtx;

62234

+ }

62235

+

62236

+ return NULL_RTX;

62237

+}

62238

+

62239

+static rtx

62240

rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)

62241

{

62242

rtx pat;

62243

@@ -10416,7 +12393,15 @@

62244

}

62245

}

62246

else if (icode == CODE_FOR_vsx_set_v2df

62247

- || icode == CODE_FOR_vsx_set_v2di)

62248

+ || icode == CODE_FOR_vsx_set_v2di

62249

+ || icode == CODE_FOR_bcdadd

62250

+ || icode == CODE_FOR_bcdadd_lt

62251

+ || icode == CODE_FOR_bcdadd_eq

62252

+ || icode == CODE_FOR_bcdadd_gt

62253

+ || icode == CODE_FOR_bcdsub

62254

+ || icode == CODE_FOR_bcdsub_lt

62255

+ || icode == CODE_FOR_bcdsub_eq

62256

+ || icode == CODE_FOR_bcdsub_gt)

62257

{

62258

/* Only allow 1-bit unsigned literals. */

62259

STRIP_NOPS (arg2);

62260

@@ -10427,7 +12412,66 @@

62261

return const0_rtx;

62262

}

62263

}

62264

+ else if (icode == CODE_FOR_dfp_ddedpd_dd

62265

+ || icode == CODE_FOR_dfp_ddedpd_td)

62266

+ {

62267

+ /* Only allow 2-bit unsigned literals where the value is 0 or 2. */

62268

+ STRIP_NOPS (arg0);

62269

+ if (TREE_CODE (arg0) != INTEGER_CST

62270

+ || TREE_INT_CST_LOW (arg2) & ~0x3)

62271

+ {

62272

+ error ("argument 1 must be 0 or 2");

62273

+ return const0_rtx;

62274

+ }

62275

+ }

62276

+ else if (icode == CODE_FOR_dfp_denbcd_dd

62277

+ || icode == CODE_FOR_dfp_denbcd_td)

62278

+ {

62279

+ /* Only allow 1-bit unsigned literals. */

62280

+ STRIP_NOPS (arg0);

62281

+ if (TREE_CODE (arg0) != INTEGER_CST

62282

+ || TREE_INT_CST_LOW (arg0) & ~0x1)

62283

+ {

62284

+ error ("argument 1 must be a 1-bit unsigned literal");

62285

+ return const0_rtx;

62286

+ }

62287

+ }

62288

+ else if (icode == CODE_FOR_dfp_dscli_dd

62289

+ || icode == CODE_FOR_dfp_dscli_td

62290

+ || icode == CODE_FOR_dfp_dscri_dd

62291

+ || icode == CODE_FOR_dfp_dscri_td)

62292

+ {

62293

+ /* Only allow 6-bit unsigned literals. */

62294

+ STRIP_NOPS (arg1);

62295

+ if (TREE_CODE (arg1) != INTEGER_CST

62296

+ || TREE_INT_CST_LOW (arg1) & ~0x3f)

62297

+ {

62298

+ error ("argument 2 must be a 6-bit unsigned literal");

62299

+ return const0_rtx;

62300

+ }

62301

+ }

62302

+ else if (icode == CODE_FOR_crypto_vshasigmaw

62303

+ || icode == CODE_FOR_crypto_vshasigmad)

62304

+ {

62305

+ /* Check whether the 2nd and 3rd arguments are integer constants and in

62306

+ range and prepare arguments. */

62307

+ STRIP_NOPS (arg1);

62308

+ if (TREE_CODE (arg1) != INTEGER_CST

62309

+ || !IN_RANGE (TREE_INT_CST_LOW (arg1), 0, 1))

62310

+ {

62311

+ error ("argument 2 must be 0 or 1");

62312

+ return const0_rtx;

62313

+ }

62314

62315

+ STRIP_NOPS (arg2);

62316

+ if (TREE_CODE (arg2) != INTEGER_CST

62317

+ || !IN_RANGE (TREE_INT_CST_LOW (arg2), 0, 15))

62318

+ {

62319

+ error ("argument 3 must be in the range 0..15");

62320

+ return const0_rtx;

62321

+ }

62322

+ }

62323

+

62324

if (target == 0

62325

|| GET_MODE (target) != tmode

62326

|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))

62327

@@ -10481,6 +12525,8 @@

62328

break;

62329

case ALTIVEC_BUILTIN_LD_INTERNAL_2di:

62330

icode = CODE_FOR_vector_altivec_load_v2di;

62331

+ case ALTIVEC_BUILTIN_LD_INTERNAL_1ti:

62332

+ icode = CODE_FOR_vector_altivec_load_v1ti;

62333

break;

62334

default:

62335

*expandedp = false;

62336

@@ -10540,6 +12586,8 @@

62337

break;

62338

case ALTIVEC_BUILTIN_ST_INTERNAL_2di:

62339

icode = CODE_FOR_vector_altivec_store_v2di;

62340

+ case ALTIVEC_BUILTIN_ST_INTERNAL_1ti:

62341

+ icode = CODE_FOR_vector_altivec_store_v1ti;

62342

break;

62343

default:

62344

*expandedp = false;

62345

@@ -10632,21 +12680,33 @@

62346

enum machine_mode tmode = TYPE_MODE (type);

62347

enum machine_mode inner_mode = GET_MODE_INNER (tmode);

62348

int i, n_elt = GET_MODE_NUNITS (tmode);

62349

- rtvec v = rtvec_alloc (n_elt);

62350

62351

gcc_assert (VECTOR_MODE_P (tmode));

62352

gcc_assert (n_elt == call_expr_nargs (exp));

62353

62354

- for (i = 0; i < n_elt; ++i)

62355

+ if (!target || !register_operand (target, tmode))

62356

+ target = gen_reg_rtx (tmode);

62357

+

62358

+ /* If we have a vector compromised of a single element, such as V1TImode, do

62359

+ the initialization directly. */

62360

+ if (n_elt == 1 && GET_MODE_SIZE (tmode) == GET_MODE_SIZE (inner_mode))

62361

{

62362

- rtx x = expand_normal (CALL_EXPR_ARG (exp, i));

62363

- RTVEC_ELT (v, i) = gen_lowpart (inner_mode, x);

62364

+ rtx x = expand_normal (CALL_EXPR_ARG (exp, 0));

62365

+ emit_move_insn (target, gen_lowpart (tmode, x));

62366

}

62367

+ else

62368

+ {

62369

+ rtvec v = rtvec_alloc (n_elt);

62370

62371

- if (!target || !register_operand (target, tmode))

62372

- target = gen_reg_rtx (tmode);

62373

+ for (i = 0; i < n_elt; ++i)

62374

+ {

62375

+ rtx x = expand_normal (CALL_EXPR_ARG (exp, i));

62376

+ RTVEC_ELT (v, i) = gen_lowpart (inner_mode, x);

62377

+ }

62378

62379

- rs6000_expand_vector_init (target, gen_rtx_PARALLEL (tmode, v));

62380

+ rs6000_expand_vector_init (target, gen_rtx_PARALLEL (tmode, v));

62381

+ }

62382

+

62383

return target;

62384

}

62385

62386

@@ -10769,8 +12829,19 @@

62387

62388

switch (fcode)

62389

{

62390

+ case ALTIVEC_BUILTIN_STVX_V2DF:

62391

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v2df, exp);

62392

+ case ALTIVEC_BUILTIN_STVX_V2DI:

62393

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v2di, exp);

62394

+ case ALTIVEC_BUILTIN_STVX_V4SF:

62395

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v4sf, exp);

62396

case ALTIVEC_BUILTIN_STVX:

62397

+ case ALTIVEC_BUILTIN_STVX_V4SI:

62398

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v4si, exp);

62399

+ case ALTIVEC_BUILTIN_STVX_V8HI:

62400

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v8hi, exp);

62401

+ case ALTIVEC_BUILTIN_STVX_V16QI:

62402

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v16qi, exp);

62403

case ALTIVEC_BUILTIN_STVEBX:

62404

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvebx, exp);

62405

case ALTIVEC_BUILTIN_STVEHX:

62406

@@ -10777,8 +12848,19 @@

62407

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvehx, exp);

62408

case ALTIVEC_BUILTIN_STVEWX:

62409

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvewx, exp);

62410

+ case ALTIVEC_BUILTIN_STVXL_V2DF:

62411

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v2df, exp);

62412

+ case ALTIVEC_BUILTIN_STVXL_V2DI:

62413

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v2di, exp);

62414

+ case ALTIVEC_BUILTIN_STVXL_V4SF:

62415

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v4sf, exp);

62416

case ALTIVEC_BUILTIN_STVXL:

62417

- return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl, exp);

62418

+ case ALTIVEC_BUILTIN_STVXL_V4SI:

62419

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v4si, exp);

62420

+ case ALTIVEC_BUILTIN_STVXL_V8HI:

62421

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v8hi, exp);

62422

+ case ALTIVEC_BUILTIN_STVXL_V16QI:

62423

+ return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v16qi, exp);

62424

62425

case ALTIVEC_BUILTIN_STVLX:

62426

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvlx, exp);

62427

@@ -10789,6 +12871,8 @@

62428

case ALTIVEC_BUILTIN_STVRXL:

62429

return altivec_expand_stv_builtin (CODE_FOR_altivec_stvrxl, exp);

62430

62431

+ case VSX_BUILTIN_STXVD2X_V1TI:

62432

+ return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v1ti, exp);

62433

case VSX_BUILTIN_STXVD2X_V2DF:

62434

return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v2df, exp);

62435

case VSX_BUILTIN_STXVD2X_V2DI:

62436

@@ -10869,6 +12953,7 @@

62437

case ALTIVEC_BUILTIN_VEC_INIT_V4SF:

62438

case VSX_BUILTIN_VEC_INIT_V2DF:

62439

case VSX_BUILTIN_VEC_INIT_V2DI:

62440

+ case VSX_BUILTIN_VEC_INIT_V1TI:

62441

return altivec_expand_vec_init_builtin (TREE_TYPE (exp), exp, target);

62442

62443

case ALTIVEC_BUILTIN_VEC_SET_V4SI:

62444

@@ -10877,6 +12962,7 @@

62445

case ALTIVEC_BUILTIN_VEC_SET_V4SF:

62446

case VSX_BUILTIN_VEC_SET_V2DF:

62447

case VSX_BUILTIN_VEC_SET_V2DI:

62448

+ case VSX_BUILTIN_VEC_SET_V1TI:

62449

return altivec_expand_vec_set_builtin (exp);

62450

62451

case ALTIVEC_BUILTIN_VEC_EXT_V4SI:

62452

@@ -10885,6 +12971,7 @@

62453

case ALTIVEC_BUILTIN_VEC_EXT_V4SF:

62454

case VSX_BUILTIN_VEC_EXT_V2DF:

62455

case VSX_BUILTIN_VEC_EXT_V2DI:

62456

+ case VSX_BUILTIN_VEC_EXT_V1TI:

62457

return altivec_expand_vec_ext_builtin (exp, target);

62458

62459

default:

62460

@@ -10922,12 +13009,44 @@

62461

case ALTIVEC_BUILTIN_LVEWX:

62462

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvewx,

62463

exp, target, false);

62464

+ case ALTIVEC_BUILTIN_LVXL_V2DF:

62465

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v2df,

62466

+ exp, target, false);

62467

+ case ALTIVEC_BUILTIN_LVXL_V2DI:

62468

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v2di,

62469

+ exp, target, false);

62470

+ case ALTIVEC_BUILTIN_LVXL_V4SF:

62471

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v4sf,

62472

+ exp, target, false);

62473

case ALTIVEC_BUILTIN_LVXL:

62474

- return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl,

62475

+ case ALTIVEC_BUILTIN_LVXL_V4SI:

62476

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v4si,

62477

exp, target, false);

62478

+ case ALTIVEC_BUILTIN_LVXL_V8HI:

62479

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v8hi,

62480

+ exp, target, false);

62481

+ case ALTIVEC_BUILTIN_LVXL_V16QI:

62482

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v16qi,

62483

+ exp, target, false);

62484

+ case ALTIVEC_BUILTIN_LVX_V2DF:

62485

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v2df,

62486

+ exp, target, false);

62487

+ case ALTIVEC_BUILTIN_LVX_V2DI:

62488

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v2di,

62489

+ exp, target, false);

62490

+ case ALTIVEC_BUILTIN_LVX_V4SF:

62491

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v4sf,

62492

+ exp, target, false);

62493

case ALTIVEC_BUILTIN_LVX:

62494

+ case ALTIVEC_BUILTIN_LVX_V4SI:

62495

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v4si,

62496

exp, target, false);

62497

+ case ALTIVEC_BUILTIN_LVX_V8HI:

62498

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v8hi,

62499

+ exp, target, false);

62500

+ case ALTIVEC_BUILTIN_LVX_V16QI:

62501

+ return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v16qi,

62502

+ exp, target, false);

62503

case ALTIVEC_BUILTIN_LVLX:

62504

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvlx,

62505

exp, target, true);

62506

@@ -10940,6 +13059,9 @@

62507

case ALTIVEC_BUILTIN_LVRXL:

62508

return altivec_expand_lv_builtin (CODE_FOR_altivec_lvrxl,

62509

exp, target, true);

62510

+ case VSX_BUILTIN_LXVD2X_V1TI:

62511

+ return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v1ti,

62512

+ exp, target, false);

62513

case VSX_BUILTIN_LXVD2X_V2DF:

62514

return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v2df,

62515

exp, target, false);

62516

@@ -11411,6 +13533,8 @@

62517

error ("Builtin function %s is only valid for the cell processor", name);

62518

else if ((fnmask & RS6000_BTM_VSX) != 0)

62519

error ("Builtin function %s requires the -mvsx option", name);

62520

+ else if ((fnmask & RS6000_BTM_HTM) != 0)

62521

+ error ("Builtin function %s requires the -mhtm option", name);

62522

else if ((fnmask & RS6000_BTM_ALTIVEC) != 0)

62523

error ("Builtin function %s requires the -maltivec option", name);

62524

else if ((fnmask & RS6000_BTM_PAIRED) != 0)

62525

@@ -11417,6 +13541,16 @@

62526

error ("Builtin function %s requires the -mpaired option", name);

62527

else if ((fnmask & RS6000_BTM_SPE) != 0)

62528

error ("Builtin function %s requires the -mspe option", name);

62529

+ else if ((fnmask & (RS6000_BTM_DFP | RS6000_BTM_P8_VECTOR))

62530

+ == (RS6000_BTM_DFP | RS6000_BTM_P8_VECTOR))

62531

+ error ("Builtin function %s requires the -mhard-dfp and"

62532

+ "-mpower8-vector options", name);

62533

+ else if ((fnmask & RS6000_BTM_DFP) != 0)

62534

+ error ("Builtin function %s requires the -mhard-dfp option", name);

62535

+ else if ((fnmask & RS6000_BTM_P8_VECTOR) != 0)

62536

+ error ("Builtin function %s requires the -mpower8-vector option", name);

62537

+ else if ((fnmask & RS6000_BTM_HARD_FLOAT) != 0)

62538

+ error ("Builtin function %s requires the -mhard-float option", name);

62539

else

62540

error ("Builtin function %s is not supported with the current options",

62541

name);

62542

@@ -11515,7 +13649,8 @@

62543

case ALTIVEC_BUILTIN_MASK_FOR_LOAD:

62544

case ALTIVEC_BUILTIN_MASK_FOR_STORE:

62545

{

62546

- int icode = (int) CODE_FOR_altivec_lvsr;

62547

+ int icode = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr

62548

+ : (int) CODE_FOR_altivec_lvsl);

62549

enum machine_mode tmode = insn_data[icode].operand[0].mode;

62550

enum machine_mode mode = insn_data[icode].operand[1].mode;

62551

tree arg;

62552

@@ -11590,9 +13725,19 @@

62553

if (success)

62554

return ret;

62555

}

62556

+ if (TARGET_HTM)

62557

+ {

62558

+ ret = htm_expand_builtin (exp, target, &success);

62559

62560

- gcc_assert (TARGET_ALTIVEC || TARGET_VSX || TARGET_SPE || TARGET_PAIRED_FLOAT);

62561

+ if (success)

62562

+ return ret;

62563

+ }

62564

62565

+ unsigned attr = rs6000_builtin_info[uns_fcode].attr & RS6000_BTC_TYPE_MASK;

62566

+ gcc_assert (attr == RS6000_BTC_UNARY

62567

+ || attr == RS6000_BTC_BINARY

62568

+ || attr == RS6000_BTC_TERNARY);

62569

+

62570

/* Handle simple unary operations. */

62571

d = bdesc_1arg;

62572

for (i = 0; i < ARRAY_SIZE (bdesc_1arg); i++, d++)

62573

@@ -11648,6 +13793,14 @@

62574

opaque_p_V2SI_type_node = build_pointer_type (opaque_V2SI_type_node);

62575

opaque_V4SI_type_node = build_opaque_vector_type (intSI_type_node, 4);

62576

62577

+ /* We use V1TI mode as a special container to hold __int128_t items that

62578

+ must live in VSX registers. */

62579

+ if (intTI_type_node)

62580

+ {

62581

+ V1TI_type_node = build_vector_type (intTI_type_node, 1);

62582

+ unsigned_V1TI_type_node = build_vector_type (unsigned_intTI_type_node, 1);

62583

+ }

62584

+

62585

/* The 'vector bool ...' types must be kept distinct from 'vector unsigned ...'

62586

types, especially in C++ land. Similarly, 'vector pixel' is distinct from

62587

'vector unsigned short'. */

62588

@@ -11670,8 +13823,13 @@

62589

uintSI_type_internal_node = unsigned_intSI_type_node;

62590

intDI_type_internal_node = intDI_type_node;

62591

uintDI_type_internal_node = unsigned_intDI_type_node;

62592

+ intTI_type_internal_node = intTI_type_node;

62593

+ uintTI_type_internal_node = unsigned_intTI_type_node;

62594

float_type_internal_node = float_type_node;

62595

double_type_internal_node = double_type_node;

62596

+ long_double_type_internal_node = long_double_type_node;

62597

+ dfloat64_type_internal_node = dfloat64_type_node;

62598

+ dfloat128_type_internal_node = dfloat128_type_node;

62599

void_type_internal_node = void_type_node;

62600

62601

/* Initialize the modes for builtin_function_type, mapping a machine mode to

62602

@@ -11682,8 +13840,15 @@

62603

builtin_mode_to_type[SImode][1] = unsigned_intSI_type_node;

62604

builtin_mode_to_type[DImode][0] = intDI_type_node;

62605

builtin_mode_to_type[DImode][1] = unsigned_intDI_type_node;

62606

+ builtin_mode_to_type[TImode][0] = intTI_type_node;

62607

+ builtin_mode_to_type[TImode][1] = unsigned_intTI_type_node;

62608

builtin_mode_to_type[SFmode][0] = float_type_node;

62609

builtin_mode_to_type[DFmode][0] = double_type_node;

62610

+ builtin_mode_to_type[TFmode][0] = long_double_type_node;

62611

+ builtin_mode_to_type[DDmode][0] = dfloat64_type_node;

62612

+ builtin_mode_to_type[TDmode][0] = dfloat128_type_node;

62613

+ builtin_mode_to_type[V1TImode][0] = V1TI_type_node;

62614

+ builtin_mode_to_type[V1TImode][1] = unsigned_V1TI_type_node;

62615

builtin_mode_to_type[V2SImode][0] = V2SI_type_node;

62616

builtin_mode_to_type[V2SFmode][0] = V2SF_type_node;

62617

builtin_mode_to_type[V2DImode][0] = V2DI_type_node;

62618

@@ -11752,15 +13917,42 @@

62619

tdecl = add_builtin_type ("__vector double", V2DF_type_node);

62620

TYPE_NAME (V2DF_type_node) = tdecl;

62621

62622

- tdecl = add_builtin_type ("__vector long", V2DI_type_node);

62623

- TYPE_NAME (V2DI_type_node) = tdecl;

62624

+ if (TARGET_POWERPC64)

62625

+ {

62626

+ tdecl = add_builtin_type ("__vector long", V2DI_type_node);

62627

+ TYPE_NAME (V2DI_type_node) = tdecl;

62628

62629

- tdecl = add_builtin_type ("__vector unsigned long", unsigned_V2DI_type_node);

62630

- TYPE_NAME (unsigned_V2DI_type_node) = tdecl;

62631

+ tdecl = add_builtin_type ("__vector unsigned long",

62632

+ unsigned_V2DI_type_node);

62633

+ TYPE_NAME (unsigned_V2DI_type_node) = tdecl;

62634

62635

- tdecl = add_builtin_type ("__vector __bool long", bool_V2DI_type_node);

62636

- TYPE_NAME (bool_V2DI_type_node) = tdecl;

62637

+ tdecl = add_builtin_type ("__vector __bool long", bool_V2DI_type_node);

62638

+ TYPE_NAME (bool_V2DI_type_node) = tdecl;

62639

+ }

62640

+ else

62641

+ {

62642

+ tdecl = add_builtin_type ("__vector long long", V2DI_type_node);

62643

+ TYPE_NAME (V2DI_type_node) = tdecl;

62644

62645

+ tdecl = add_builtin_type ("__vector unsigned long long",

62646

+ unsigned_V2DI_type_node);

62647

+ TYPE_NAME (unsigned_V2DI_type_node) = tdecl;

62648

+

62649

+ tdecl = add_builtin_type ("__vector __bool long long",

62650

+ bool_V2DI_type_node);

62651

+ TYPE_NAME (bool_V2DI_type_node) = tdecl;

62652

+ }

62653

+

62654

+ if (V1TI_type_node)

62655

+ {

62656

+ tdecl = add_builtin_type ("__vector __int128", V1TI_type_node);

62657

+ TYPE_NAME (V1TI_type_node) = tdecl;

62658

+

62659

+ tdecl = add_builtin_type ("__vector unsigned __int128",

62660

+ unsigned_V1TI_type_node);

62661

+ TYPE_NAME (unsigned_V1TI_type_node) = tdecl;

62662

+ }

62663

+

62664

/* Paired and SPE builtins are only available if you build a compiler with

62665

the appropriate options, so only create those builtins with the

62666

appropriate compiler option. Create Altivec and VSX builtins on machines

62667

@@ -11772,6 +13964,9 @@

62668

spe_init_builtins ();

62669

if (TARGET_EXTRA_BUILTINS)

62670

altivec_init_builtins ();

62671

+ if (TARGET_HTM)

62672

+ htm_init_builtins ();

62673

+

62674

if (TARGET_EXTRA_BUILTINS || TARGET_SPE || TARGET_PAIRED_FLOAT)

62675

rs6000_common_init_builtins ();

62676

62677

@@ -12117,6 +14312,10 @@

62678

= build_function_type_list (integer_type_node,

62679

integer_type_node, V4SI_type_node,

62680

V4SI_type_node, NULL_TREE);

62681

+ tree int_ftype_int_v2di_v2di

62682

+ = build_function_type_list (integer_type_node,

62683

+ integer_type_node, V2DI_type_node,

62684

+ V2DI_type_node, NULL_TREE);

62685

tree void_ftype_v4si

62686

= build_function_type_list (void_type_node, V4SI_type_node, NULL_TREE);

62687

tree v8hi_ftype_void

62688

@@ -12199,6 +14398,8 @@

62689

= build_function_type_list (integer_type_node,

62690

integer_type_node, V2DF_type_node,

62691

V2DF_type_node, NULL_TREE);

62692

+ tree v2di_ftype_v2di

62693

+ = build_function_type_list (V2DI_type_node, V2DI_type_node, NULL_TREE);

62694

tree v4si_ftype_v4si

62695

= build_function_type_list (V4SI_type_node, V4SI_type_node, NULL_TREE);

62696

tree v8hi_ftype_v8hi

62697

@@ -12224,10 +14425,58 @@

62698

def_builtin ("__builtin_altivec_lvehx", v8hi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVEHX);

62699

def_builtin ("__builtin_altivec_lvewx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVEWX);

62700

def_builtin ("__builtin_altivec_lvxl", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVXL);

62701

+ def_builtin ("__builtin_altivec_lvxl_v2df", v2df_ftype_long_pcvoid,

62702

+ ALTIVEC_BUILTIN_LVXL_V2DF);

62703

+ def_builtin ("__builtin_altivec_lvxl_v2di", v2di_ftype_long_pcvoid,

62704

+ ALTIVEC_BUILTIN_LVXL_V2DI);

62705

+ def_builtin ("__builtin_altivec_lvxl_v4sf", v4sf_ftype_long_pcvoid,

62706

+ ALTIVEC_BUILTIN_LVXL_V4SF);

62707

+ def_builtin ("__builtin_altivec_lvxl_v4si", v4si_ftype_long_pcvoid,

62708

+ ALTIVEC_BUILTIN_LVXL_V4SI);

62709

+ def_builtin ("__builtin_altivec_lvxl_v8hi", v8hi_ftype_long_pcvoid,

62710

+ ALTIVEC_BUILTIN_LVXL_V8HI);

62711

+ def_builtin ("__builtin_altivec_lvxl_v16qi", v16qi_ftype_long_pcvoid,

62712

+ ALTIVEC_BUILTIN_LVXL_V16QI);

62713

def_builtin ("__builtin_altivec_lvx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVX);

62714

+ def_builtin ("__builtin_altivec_lvx_v2df", v2df_ftype_long_pcvoid,

62715

+ ALTIVEC_BUILTIN_LVX_V2DF);

62716

+ def_builtin ("__builtin_altivec_lvx_v2di", v2di_ftype_long_pcvoid,

62717

+ ALTIVEC_BUILTIN_LVX_V2DI);

62718

+ def_builtin ("__builtin_altivec_lvx_v4sf", v4sf_ftype_long_pcvoid,

62719

+ ALTIVEC_BUILTIN_LVX_V4SF);

62720

+ def_builtin ("__builtin_altivec_lvx_v4si", v4si_ftype_long_pcvoid,

62721

+ ALTIVEC_BUILTIN_LVX_V4SI);

62722

+ def_builtin ("__builtin_altivec_lvx_v8hi", v8hi_ftype_long_pcvoid,

62723

+ ALTIVEC_BUILTIN_LVX_V8HI);

62724

+ def_builtin ("__builtin_altivec_lvx_v16qi", v16qi_ftype_long_pcvoid,

62725

+ ALTIVEC_BUILTIN_LVX_V16QI);

62726

def_builtin ("__builtin_altivec_stvx", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVX);

62727

+ def_builtin ("__builtin_altivec_stvx_v2df", void_ftype_v2df_long_pvoid,

62728

+ ALTIVEC_BUILTIN_STVX_V2DF);

62729

+ def_builtin ("__builtin_altivec_stvx_v2di", void_ftype_v2di_long_pvoid,

62730

+ ALTIVEC_BUILTIN_STVX_V2DI);

62731

+ def_builtin ("__builtin_altivec_stvx_v4sf", void_ftype_v4sf_long_pvoid,

62732

+ ALTIVEC_BUILTIN_STVX_V4SF);

62733

+ def_builtin ("__builtin_altivec_stvx_v4si", void_ftype_v4si_long_pvoid,

62734

+ ALTIVEC_BUILTIN_STVX_V4SI);

62735

+ def_builtin ("__builtin_altivec_stvx_v8hi", void_ftype_v8hi_long_pvoid,

62736

+ ALTIVEC_BUILTIN_STVX_V8HI);

62737

+ def_builtin ("__builtin_altivec_stvx_v16qi", void_ftype_v16qi_long_pvoid,

62738

+ ALTIVEC_BUILTIN_STVX_V16QI);

62739

def_builtin ("__builtin_altivec_stvewx", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVEWX);

62740

def_builtin ("__builtin_altivec_stvxl", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVXL);

62741

+ def_builtin ("__builtin_altivec_stvxl_v2df", void_ftype_v2df_long_pvoid,

62742

+ ALTIVEC_BUILTIN_STVXL_V2DF);

62743

+ def_builtin ("__builtin_altivec_stvxl_v2di", void_ftype_v2di_long_pvoid,

62744

+ ALTIVEC_BUILTIN_STVXL_V2DI);

62745

+ def_builtin ("__builtin_altivec_stvxl_v4sf", void_ftype_v4sf_long_pvoid,

62746

+ ALTIVEC_BUILTIN_STVXL_V4SF);

62747

+ def_builtin ("__builtin_altivec_stvxl_v4si", void_ftype_v4si_long_pvoid,

62748

+ ALTIVEC_BUILTIN_STVXL_V4SI);

62749

+ def_builtin ("__builtin_altivec_stvxl_v8hi", void_ftype_v8hi_long_pvoid,

62750

+ ALTIVEC_BUILTIN_STVXL_V8HI);

62751

+ def_builtin ("__builtin_altivec_stvxl_v16qi", void_ftype_v16qi_long_pvoid,

62752

+ ALTIVEC_BUILTIN_STVXL_V16QI);

62753

def_builtin ("__builtin_altivec_stvebx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVEBX);

62754

def_builtin ("__builtin_altivec_stvehx", void_ftype_v8hi_long_pvoid, ALTIVEC_BUILTIN_STVEHX);

62755

def_builtin ("__builtin_vec_ld", opaque_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LD);

62756

@@ -12334,6 +14583,9 @@

62757

case VOIDmode:

62758

type = int_ftype_int_opaque_opaque;

62759

break;

62760

+ case V2DImode:

62761

+ type = int_ftype_int_v2di_v2di;

62762

+ break;

62763

case V4SImode:

62764

type = int_ftype_int_v4si_v4si;

62765

break;

62766

@@ -12367,6 +14619,9 @@

62767

62768

switch (mode0)

62769

{

62770

+ case V2DImode:

62771

+ type = v2di_ftype_v2di;

62772

+ break;

62773

case V4SImode:

62774

type = v4si_ftype_v4si;

62775

break;

62776

@@ -12497,8 +14752,109 @@

62777

ftype = build_function_type_list (intDI_type_node, V2DI_type_node,

62778

integer_type_node, NULL_TREE);

62779

def_builtin ("__builtin_vec_ext_v2di", ftype, VSX_BUILTIN_VEC_EXT_V2DI);

62780

+

62781

+

62782

+ if (V1TI_type_node)

62783

+ {

62784

+ tree v1ti_ftype_long_pcvoid

62785

+ = build_function_type_list (V1TI_type_node,

62786

+ long_integer_type_node, pcvoid_type_node,

62787

+ NULL_TREE);

62788

+ tree void_ftype_v1ti_long_pvoid

62789

+ = build_function_type_list (void_type_node,

62790

+ V1TI_type_node, long_integer_type_node,

62791

+ pvoid_type_node, NULL_TREE);

62792

+ def_builtin ("__builtin_vsx_lxvd2x_v1ti", v1ti_ftype_long_pcvoid,

62793

+ VSX_BUILTIN_LXVD2X_V1TI);

62794

+ def_builtin ("__builtin_vsx_stxvd2x_v1ti", void_ftype_v1ti_long_pvoid,

62795

+ VSX_BUILTIN_STXVD2X_V1TI);

62796

+ ftype = build_function_type_list (V1TI_type_node, intTI_type_node,

62797

+ NULL_TREE, NULL_TREE);

62798

+ def_builtin ("__builtin_vec_init_v1ti", ftype, VSX_BUILTIN_VEC_INIT_V1TI);

62799

+ ftype = build_function_type_list (V1TI_type_node, V1TI_type_node,

62800

+ intTI_type_node,

62801

+ integer_type_node, NULL_TREE);

62802

+ def_builtin ("__builtin_vec_set_v1ti", ftype, VSX_BUILTIN_VEC_SET_V1TI);

62803

+ ftype = build_function_type_list (intTI_type_node, V1TI_type_node,

62804

+ integer_type_node, NULL_TREE);

62805

+ def_builtin ("__builtin_vec_ext_v1ti", ftype, VSX_BUILTIN_VEC_EXT_V1TI);

62806

+ }

62807

+

62808

}

62809

62810

+static void

62811

+htm_init_builtins (void)

62812

+{

62813

+ HOST_WIDE_INT builtin_mask = rs6000_builtin_mask;

62814

+ const struct builtin_description *d;

62815

+ size_t i;

62816

+

62817

+ d = bdesc_htm;

62818

+ for (i = 0; i < ARRAY_SIZE (bdesc_htm); i++, d++)

62819

+ {

62820

+ tree op[MAX_HTM_OPERANDS], type;

62821

+ HOST_WIDE_INT mask = d->mask;

62822

+ unsigned attr = rs6000_builtin_info[d->code].attr;

62823

+ bool void_func = (attr & RS6000_BTC_VOID);

62824

+ int attr_args = (attr & RS6000_BTC_TYPE_MASK);

62825

+ int nopnds = 0;

62826

+ tree argtype = (attr & RS6000_BTC_SPR) ? long_unsigned_type_node

62827

+ : unsigned_type_node;

62828

+

62829

+ if ((mask & builtin_mask) != mask)

62830

+ {

62831

+ if (TARGET_DEBUG_BUILTIN)

62832

+ fprintf (stderr, "htm_builtin, skip binary %s\n", d->name);

62833

+ continue;

62834

+ }

62835

+

62836

+ if (d->name == 0)

62837

+ {

62838

+ if (TARGET_DEBUG_BUILTIN)

62839

+ fprintf (stderr, "htm_builtin, bdesc_htm[%ld] no name\n",

62840

+ (long unsigned) i);

62841

+ continue;

62842

+ }

62843

+

62844

+ op[nopnds++] = (void_func) ? void_type_node : argtype;

62845

+

62846

+ if (attr_args == RS6000_BTC_UNARY)

62847

+ op[nopnds++] = argtype;

62848

+ else if (attr_args == RS6000_BTC_BINARY)

62849

+ {

62850

+ op[nopnds++] = argtype;

62851

+ op[nopnds++] = argtype;

62852

+ }

62853

+ else if (attr_args == RS6000_BTC_TERNARY)

62854

+ {

62855

+ op[nopnds++] = argtype;

62856

+ op[nopnds++] = argtype;

62857

+ op[nopnds++] = argtype;

62858

+ }

62859

+

62860

+ switch (nopnds)

62861

+ {

62862

+ case 1:

62863

+ type = build_function_type_list (op[0], NULL_TREE);

62864

+ break;

62865

+ case 2:

62866

+ type = build_function_type_list (op[0], op[1], NULL_TREE);

62867

+ break;

62868

+ case 3:

62869

+ type = build_function_type_list (op[0], op[1], op[2], NULL_TREE);

62870

+ break;

62871

+ case 4:

62872

+ type = build_function_type_list (op[0], op[1], op[2], op[3],

62873

+ NULL_TREE);

62874

+ break;

62875

+ default:

62876

+ gcc_unreachable ();

62877

+ }

62878

+

62879

+ def_builtin (d->name, type, d->code);

62880

+ }

62881

+}

62882

+

62883

/* Hash function for builtin functions with up to 3 arguments and a return

62884

type. */

62885

static unsigned

62886

@@ -12572,11 +14928,34 @@

62887

are type correct. */

62888

switch (builtin)

62889

{

62890

+ /* unsigned 1 argument functions. */

62891

+ case CRYPTO_BUILTIN_VSBOX:

62892

+ case P8V_BUILTIN_VGBBD:

62893

+ case MISC_BUILTIN_CDTBCD:

62894

+ case MISC_BUILTIN_CBCDTD:

62895

+ h.uns_p[0] = 1;

62896

+ h.uns_p[1] = 1;

62897

+ break;

62898

+

62899

/* unsigned 2 argument functions. */

62900

case ALTIVEC_BUILTIN_VMULEUB_UNS:

62901

case ALTIVEC_BUILTIN_VMULEUH_UNS:

62902

case ALTIVEC_BUILTIN_VMULOUB_UNS:

62903

case ALTIVEC_BUILTIN_VMULOUH_UNS:

62904

+ case CRYPTO_BUILTIN_VCIPHER:

62905

+ case CRYPTO_BUILTIN_VCIPHERLAST:

62906

+ case CRYPTO_BUILTIN_VNCIPHER:

62907

+ case CRYPTO_BUILTIN_VNCIPHERLAST:

62908

+ case CRYPTO_BUILTIN_VPMSUMB:

62909

+ case CRYPTO_BUILTIN_VPMSUMH:

62910

+ case CRYPTO_BUILTIN_VPMSUMW:

62911

+ case CRYPTO_BUILTIN_VPMSUMD:

62912

+ case CRYPTO_BUILTIN_VPMSUM:

62913

+ case MISC_BUILTIN_ADDG6S:

62914

+ case MISC_BUILTIN_DIVWEU:

62915

+ case MISC_BUILTIN_DIVWEUO:

62916

+ case MISC_BUILTIN_DIVDEU:

62917

+ case MISC_BUILTIN_DIVDEUO:

62918

h.uns_p[0] = 1;

62919

h.uns_p[1] = 1;

62920

h.uns_p[2] = 1;

62921

@@ -12599,6 +14978,14 @@

62922

case VSX_BUILTIN_XXSEL_8HI_UNS:

62923

case VSX_BUILTIN_XXSEL_4SI_UNS:

62924

case VSX_BUILTIN_XXSEL_2DI_UNS:

62925

+ case CRYPTO_BUILTIN_VPERMXOR:

62926

+ case CRYPTO_BUILTIN_VPERMXOR_V2DI:

62927

+ case CRYPTO_BUILTIN_VPERMXOR_V4SI:

62928

+ case CRYPTO_BUILTIN_VPERMXOR_V8HI:

62929

+ case CRYPTO_BUILTIN_VPERMXOR_V16QI:

62930

+ case CRYPTO_BUILTIN_VSHASIGMAW:

62931

+ case CRYPTO_BUILTIN_VSHASIGMAD:

62932

+ case CRYPTO_BUILTIN_VSHASIGMA:

62933

h.uns_p[0] = 1;

62934

h.uns_p[1] = 1;

62935

h.uns_p[2] = 1;

62936

@@ -12630,9 +15017,18 @@

62937

/* signed args, unsigned return. */

62938

case VSX_BUILTIN_XVCVDPUXDS_UNS:

62939

case ALTIVEC_BUILTIN_FIXUNS_V4SF_V4SI:

62940

+ case MISC_BUILTIN_UNPACK_TD:

62941

+ case MISC_BUILTIN_UNPACK_V1TI:

62942

h.uns_p[0] = 1;

62943

break;

62944

62945

+ /* unsigned arguments for 128-bit pack instructions. */

62946

+ case MISC_BUILTIN_PACK_TD:

62947

+ case MISC_BUILTIN_PACK_V1TI:

62948

+ h.uns_p[1] = 1;

62949

+ h.uns_p[2] = 1;

62950

+ break;

62951

+

62952

default:

62953

break;

62954

}

62955

@@ -12740,9 +15136,24 @@

62956

else

62957

{

62958

enum insn_code icode = d->icode;

62959

- if (d->name == 0 || icode == CODE_FOR_nothing)

62960

- continue;

62961

+ if (d->name == 0)

62962

+ {

62963

+ if (TARGET_DEBUG_BUILTIN)

62964

+ fprintf (stderr, "rs6000_builtin, bdesc_3arg[%ld] no name\n",

62965

+ (long unsigned)i);

62966

62967

+ continue;

62968

+ }

62969

+

62970

+ if (icode == CODE_FOR_nothing)

62971

+ {

62972

+ if (TARGET_DEBUG_BUILTIN)

62973

+ fprintf (stderr, "rs6000_builtin, skip ternary %s (no code)\n",

62974

+ d->name);

62975

+

62976

+ continue;

62977

+ }

62978

+

62979

type = builtin_function_type (insn_data[icode].operand[0].mode,

62980

insn_data[icode].operand[1].mode,

62981

insn_data[icode].operand[2].mode,

62982

@@ -12780,9 +15191,24 @@

62983

else

62984

{

62985

enum insn_code icode = d->icode;

62986

- if (d->name == 0 || icode == CODE_FOR_nothing)

62987

- continue;

62988

+ if (d->name == 0)

62989

+ {

62990

+ if (TARGET_DEBUG_BUILTIN)

62991

+ fprintf (stderr, "rs6000_builtin, bdesc_2arg[%ld] no name\n",

62992

+ (long unsigned)i);

62993

62994

+ continue;

62995

+ }

62996

+

62997

+ if (icode == CODE_FOR_nothing)

62998

+ {

62999

+ if (TARGET_DEBUG_BUILTIN)

63000

+ fprintf (stderr, "rs6000_builtin, skip binary %s (no code)\n",

63001

+ d->name);

63002

+

63003

+ continue;

63004

+ }

63005

+

63006

mode0 = insn_data[icode].operand[0].mode;

63007

mode1 = insn_data[icode].operand[1].mode;

63008

mode2 = insn_data[icode].operand[2].mode;

63009

@@ -12842,9 +15268,24 @@

63010

else

63011

{

63012

enum insn_code icode = d->icode;

63013

- if (d->name == 0 || icode == CODE_FOR_nothing)

63014

- continue;

63015

+ if (d->name == 0)

63016

+ {

63017

+ if (TARGET_DEBUG_BUILTIN)

63018

+ fprintf (stderr, "rs6000_builtin, bdesc_1arg[%ld] no name\n",

63019

+ (long unsigned)i);

63020

63021

+ continue;

63022

+ }

63023

+

63024

+ if (icode == CODE_FOR_nothing)

63025

+ {

63026

+ if (TARGET_DEBUG_BUILTIN)

63027

+ fprintf (stderr, "rs6000_builtin, skip unary %s (no code)\n",

63028

+ d->name);

63029

+

63030

+ continue;

63031

+ }

63032

+

63033

mode0 = insn_data[icode].operand[0].mode;

63034

mode1 = insn_data[icode].operand[1].mode;

63035

63036

@@ -13631,7 +16072,7 @@

63037

static bool eliminated = false;

63038

rtx ret;

63039

63040

- if (mode != SDmode)

63041

+ if (mode != SDmode || TARGET_NO_SDMODE_STACK)

63042

ret = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);

63043

else

63044

{

63045

@@ -13660,6 +16101,17 @@

63046

return ret;

63047

}

63048

63049

+/* Return the mode to be used for memory when a secondary memory

63050

+ location is needed. For SDmode values we need to use DDmode, in

63051

+ all other cases we can use the same mode. */

63052

+enum machine_mode

63053

+rs6000_secondary_memory_needed_mode (enum machine_mode mode)

63054

+{

63055

+ if (mode == SDmode)

63056

+ return DDmode;

63057

+ return mode;

63058

+}

63059

+

63060

static tree

63061

rs6000_check_sdmode (tree *tp, int *walk_subtrees, void *data ATTRIBUTE_UNUSED)

63062

{

63063

@@ -13690,31 +16142,228 @@

63064

return NULL_TREE;

63065

}

63066

63067

-enum reload_reg_type {

63068

- GPR_REGISTER_TYPE,

63069

- VECTOR_REGISTER_TYPE,

63070

- OTHER_REGISTER_TYPE

63071

-};

63072

+/* Classify a register type. Because the FMRGOW/FMRGEW instructions only work

63073

+ on traditional floating point registers, and the VMRGOW/VMRGEW instructions

63074

+ only work on the traditional altivec registers, note if an altivec register

63075

+ was chosen. */

63076

63077

-static enum reload_reg_type

63078

-rs6000_reload_register_type (enum reg_class rclass)

63079

+static enum rs6000_reg_type

63080

+register_to_reg_type (rtx reg, bool *is_altivec)

63081

{

63082

- switch (rclass)

63083

+ HOST_WIDE_INT regno;

63084

+ enum reg_class rclass;

63085

+

63086

+ if (GET_CODE (reg) == SUBREG)

63087

+ reg = SUBREG_REG (reg);

63088

+

63089

+ if (!REG_P (reg))

63090

+ return NO_REG_TYPE;

63091

+

63092

+ regno = REGNO (reg);

63093

+ if (regno >= FIRST_PSEUDO_REGISTER)

63094

{

63095

- case GENERAL_REGS:

63096

- case BASE_REGS:

63097

- return GPR_REGISTER_TYPE;

63098

+ if (!lra_in_progress && !reload_in_progress && !reload_completed)

63099

+ return PSEUDO_REG_TYPE;

63100

63101

- case FLOAT_REGS:

63102

- case ALTIVEC_REGS:

63103

- case VSX_REGS:

63104

- return VECTOR_REGISTER_TYPE;

63105

+ regno = true_regnum (reg);

63106

+ if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)

63107

+ return PSEUDO_REG_TYPE;

63108

+ }

63109

63110

- default:

63111

- return OTHER_REGISTER_TYPE;

63112

+ gcc_assert (regno >= 0);

63113

+

63114

+ if (is_altivec && ALTIVEC_REGNO_P (regno))

63115

+ *is_altivec = true;

63116

+

63117

+ rclass = rs6000_regno_regclass[regno];

63118

+ return reg_class_to_reg_type[(int)rclass];

63119

+}

63120

+

63121

+/* Helper function for rs6000_secondary_reload to return true if a move to a

63122

+ different register classe is really a simple move. */

63123

+

63124

+static bool

63125

+rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type,

63126

+ enum rs6000_reg_type from_type,

63127

+ enum machine_mode mode)

63128

+{

63129

+ int size;

63130

+

63131

+ /* Add support for various direct moves available. In this function, we only

63132

+ look at cases where we don't need any extra registers, and one or more

63133

+ simple move insns are issued. At present, 32-bit integers are not allowed

63134

+ in FPR/VSX registers. Single precision binary floating is not a simple

63135

+ move because we need to convert to the single precision memory layout.

63136

+ The 4-byte SDmode can be moved. */

63137

+ size = GET_MODE_SIZE (mode);

63138

+ if (TARGET_DIRECT_MOVE

63139

+ && ((mode == SDmode) || (TARGET_POWERPC64 && size == 8))

63140

+ && ((to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

63141

+ || (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)))

63142

+ return true;

63143

+

63144

+ else if (TARGET_MFPGPR && TARGET_POWERPC64 && size == 8

63145

+ && ((to_type == GPR_REG_TYPE && from_type == FPR_REG_TYPE)

63146

+ || (to_type == FPR_REG_TYPE && from_type == GPR_REG_TYPE)))

63147

+ return true;

63148

+

63149

+ else if ((size == 4 || (TARGET_POWERPC64 && size == 8))

63150

+ && ((to_type == GPR_REG_TYPE && from_type == SPR_REG_TYPE)

63151

+ || (to_type == SPR_REG_TYPE && from_type == GPR_REG_TYPE)))

63152

+ return true;

63153

+

63154

+ return false;

63155

+}

63156

+

63157

+/* Power8 helper function for rs6000_secondary_reload, handle all of the

63158

+ special direct moves that involve allocating an extra register, return the

63159

+ insn code of the helper function if there is such a function or

63160

+ CODE_FOR_nothing if not. */

63161

+

63162

+static bool

63163

+rs6000_secondary_reload_direct_move (enum rs6000_reg_type to_type,

63164

+ enum rs6000_reg_type from_type,

63165

+ enum machine_mode mode,

63166

+ secondary_reload_info *sri,

63167

+ bool altivec_p)

63168

+{

63169

+ bool ret = false;

63170

+ enum insn_code icode = CODE_FOR_nothing;

63171

+ int cost = 0;

63172

+ int size = GET_MODE_SIZE (mode);

63173

+

63174

+ if (TARGET_POWERPC64)

63175

+ {

63176

+ if (size == 16)

63177

+ {

63178

+ /* Handle moving 128-bit values from GPRs to VSX point registers on

63179

+ power8 when running in 64-bit mode using XXPERMDI to glue the two

63180

+ 64-bit values back together. */

63181

+ if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)

63182

+ {

63183

+ cost = 3; /* 2 mtvsrd's, 1 xxpermdi. */

63184

+ icode = reg_addr[mode].reload_vsx_gpr;

63185

+ }

63186

+

63187

+ /* Handle moving 128-bit values from VSX point registers to GPRs on

63188

+ power8 when running in 64-bit mode using XXPERMDI to get access to the

63189

+ bottom 64-bit value. */

63190

+ else if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

63191

+ {

63192

+ cost = 3; /* 2 mfvsrd's, 1 xxpermdi. */

63193

+ icode = reg_addr[mode].reload_gpr_vsx;

63194

+ }

63195

+ }

63196

+

63197

+ else if (mode == SFmode)

63198

+ {

63199

+ if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

63200

+ {

63201

+ cost = 3; /* xscvdpspn, mfvsrd, and. */

63202

+ icode = reg_addr[mode].reload_gpr_vsx;

63203

+ }

63204

+

63205

+ else if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)

63206

+ {

63207

+ cost = 2; /* mtvsrz, xscvspdpn. */

63208

+ icode = reg_addr[mode].reload_vsx_gpr;

63209

+ }

63210

+ }

63211

}

63212

+

63213

+ if (TARGET_POWERPC64 && size == 16)

63214

+ {

63215

+ /* Handle moving 128-bit values from GPRs to VSX point registers on

63216

+ power8 when running in 64-bit mode using XXPERMDI to glue the two

63217

+ 64-bit values back together. */

63218

+ if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)

63219

+ {

63220

+ cost = 3; /* 2 mtvsrd's, 1 xxpermdi. */

63221

+ icode = reg_addr[mode].reload_vsx_gpr;

63222

+ }

63223

+

63224

+ /* Handle moving 128-bit values from VSX point registers to GPRs on

63225

+ power8 when running in 64-bit mode using XXPERMDI to get access to the

63226

+ bottom 64-bit value. */

63227

+ else if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)

63228

+ {

63229

+ cost = 3; /* 2 mfvsrd's, 1 xxpermdi. */

63230

+ icode = reg_addr[mode].reload_gpr_vsx;

63231

+ }

63232

+ }

63233

+

63234

+ else if (!TARGET_POWERPC64 && size == 8)

63235

+ {

63236

+ /* Handle moving 64-bit values from GPRs to floating point registers on

63237

+ power8 when running in 32-bit mode using FMRGOW to glue the two 32-bit

63238

+ values back together. Altivec register classes must be handled

63239

+ specially since a different instruction is used, and the secondary

63240

+ reload support requires a single instruction class in the scratch

63241

+ register constraint. However, right now TFmode is not allowed in

63242

+ Altivec registers, so the pattern will never match. */

63243

+ if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE && !altivec_p)

63244

+ {

63245

+ cost = 3; /* 2 mtvsrwz's, 1 fmrgow. */

63246

+ icode = reg_addr[mode].reload_fpr_gpr;

63247

+ }

63248

+ }

63249

+

63250

+ if (icode != CODE_FOR_nothing)

63251

+ {

63252

+ ret = true;

63253

+ if (sri)

63254

+ {

63255

+ sri->icode = icode;

63256

+ sri->extra_cost = cost;

63257

+ }

63258

+ }

63259

+

63260

+ return ret;

63261

}

63262

63263

+/* Return whether a move between two register classes can be done either

63264

+ directly (simple move) or via a pattern that uses a single extra temporary

63265

+ (using power8's direct move in this case. */

63266

+

63267

+static bool

63268

+rs6000_secondary_reload_move (enum rs6000_reg_type to_type,

63269

+ enum rs6000_reg_type from_type,

63270

+ enum machine_mode mode,

63271

+ secondary_reload_info *sri,

63272

+ bool altivec_p)

63273

+{

63274

+ /* Fall back to load/store reloads if either type is not a register. */

63275

+ if (to_type == NO_REG_TYPE || from_type == NO_REG_TYPE)

63276

+ return false;

63277

+

63278

+ /* If we haven't allocated registers yet, assume the move can be done for the

63279

+ standard register types. */

63280

+ if ((to_type == PSEUDO_REG_TYPE && from_type == PSEUDO_REG_TYPE)

63281

+ || (to_type == PSEUDO_REG_TYPE && IS_STD_REG_TYPE (from_type))

63282

+ || (from_type == PSEUDO_REG_TYPE && IS_STD_REG_TYPE (to_type)))

63283

+ return true;

63284

+

63285

+ /* Moves to the same set of registers is a simple move for non-specialized

63286

+ registers. */

63287

+ if (to_type == from_type && IS_STD_REG_TYPE (to_type))

63288

+ return true;

63289

+

63290

+ /* Check whether a simple move can be done directly. */

63291

+ if (rs6000_secondary_reload_simple_move (to_type, from_type, mode))

63292

+ {

63293

+ if (sri)

63294

+ {

63295

+ sri->icode = CODE_FOR_nothing;

63296

+ sri->extra_cost = 0;

63297

+ }

63298

+ return true;

63299

+ }

63300

+

63301

+ /* Now check if we can do it in a few steps. */

63302

+ return rs6000_secondary_reload_direct_move (to_type, from_type, mode, sri,

63303

+ altivec_p);

63304

+}

63305

+

63306

/* Inform reload about cases where moving X with a mode MODE to a register in

63307

RCLASS requires an extra scratch or immediate register. Return the class

63308

needed for the immediate register.

63309

@@ -13738,12 +16387,36 @@

63310

bool default_p = false;

63311

63312

sri->icode = CODE_FOR_nothing;

63313

+ icode = ((in_p)

63314

+ ? reg_addr[mode].reload_load

63315

+ : reg_addr[mode].reload_store);

63316

63317

- /* Convert vector loads and stores into gprs to use an additional base

63318

- register. */

63319

- icode = rs6000_vector_reload[mode][in_p != false];

63320

- if (icode != CODE_FOR_nothing)

63321

+ if (REG_P (x) || register_operand (x, mode))

63322

{

63323

+ enum rs6000_reg_type to_type = reg_class_to_reg_type[(int)rclass];

63324

+ bool altivec_p = (rclass == ALTIVEC_REGS);

63325

+ enum rs6000_reg_type from_type = register_to_reg_type (x, &altivec_p);

63326

+

63327

+ if (!in_p)

63328

+ {

63329

+ enum rs6000_reg_type exchange = to_type;

63330

+ to_type = from_type;

63331

+ from_type = exchange;

63332

+ }

63333

+

63334

+ /* Can we do a direct move of some sort? */

63335

+ if (rs6000_secondary_reload_move (to_type, from_type, mode, sri,

63336

+ altivec_p))

63337

+ {

63338

+ icode = (enum insn_code)sri->icode;

63339

+ default_p = false;

63340

+ ret = NO_REGS;

63341

+ }

63342

+ }

63343

+

63344

+ /* Handle vector moves with reload helper functions. */

63345

+ if (ret == ALL_REGS && icode != CODE_FOR_nothing)

63346

+ {

63347

ret = NO_REGS;

63348

sri->icode = CODE_FOR_nothing;

63349

sri->extra_cost = 0;

63350

@@ -13754,14 +16427,23 @@

63351

63352

/* Loads to and stores from gprs can do reg+offset, and wouldn't need

63353

an extra register in that case, but it would need an extra

63354

- register if the addressing is reg+reg or (reg+reg)&(-16). */

63355

+ register if the addressing is reg+reg or (reg+reg)&(-16). Special

63356

+ case load/store quad. */

63357

if (rclass == GENERAL_REGS || rclass == BASE_REGS)

63358

{

63359

- if (!legitimate_indirect_address_p (addr, false)

63360

- && !rs6000_legitimate_offset_address_p (TImode, addr,

63361

- false, true))

63362

+ if (TARGET_POWERPC64 && TARGET_QUAD_MEMORY

63363

+ && GET_MODE_SIZE (mode) == 16

63364

+ && quad_memory_operand (x, mode))

63365

{

63366

sri->icode = icode;

63367

+ sri->extra_cost = 2;

63368

+ }

63369

+

63370

+ else if (!legitimate_indirect_address_p (addr, false)

63371

+ && !rs6000_legitimate_offset_address_p (PTImode, addr,

63372

+ false, true))

63373

+ {

63374

+ sri->icode = icode;

63375

/* account for splitting the loads, and converting the

63376

address from reg+reg to reg. */

63377

sri->extra_cost = (((TARGET_64BIT) ? 3 : 5)

63378

@@ -13768,8 +16450,20 @@

63379

+ ((GET_CODE (addr) == AND) ? 1 : 0));

63380

}

63381

}

63382

- /* Loads to and stores from vector registers can only do reg+reg

63383

- addressing. Altivec registers can also do (reg+reg)&(-16). */

63384

+ /* Allow scalar loads to/from the traditional floating point

63385

+ registers, even if VSX memory is set. */

63386

+ else if ((rclass == FLOAT_REGS || rclass == NO_REGS)

63387

+ && (GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8)

63388

+ && (legitimate_indirect_address_p (addr, false)

63389

+ || legitimate_indirect_address_p (addr, false)

63390

+ || rs6000_legitimate_offset_address_p (mode, addr,

63391

+ false, true)))

63392

+

63393

+ ;

63394

+ /* Loads to and stores from vector registers can only do reg+reg

63395

+ addressing. Altivec registers can also do (reg+reg)&(-16). Allow

63396

+ scalar modes loading up the traditional floating point registers

63397

+ to use offset addresses. */

63398

else if (rclass == VSX_REGS || rclass == ALTIVEC_REGS

63399

|| rclass == FLOAT_REGS || rclass == NO_REGS)

63400

{

63401

@@ -13813,12 +16507,12 @@

63402

else

63403

{

63404

enum reg_class xclass = REGNO_REG_CLASS (regno);

63405

- enum reload_reg_type rtype1 = rs6000_reload_register_type (rclass);

63406

- enum reload_reg_type rtype2 = rs6000_reload_register_type (xclass);

63407

+ enum rs6000_reg_type rtype1 = reg_class_to_reg_type[(int)rclass];

63408

+ enum rs6000_reg_type rtype2 = reg_class_to_reg_type[(int)xclass];

63409

63410

/* If memory is needed, use default_secondary_reload to create the

63411

stack slot. */

63412

- if (rtype1 != rtype2 || rtype1 == OTHER_REGISTER_TYPE)

63413

+ if (rtype1 != rtype2 || !IS_STD_REG_TYPE (rtype1))

63414

default_p = true;

63415

else

63416

ret = NO_REGS;

63417

@@ -13828,7 +16522,7 @@

63418

default_p = true;

63419

}

63420

else if (TARGET_POWERPC64

63421

- && rs6000_reload_register_type (rclass) == GPR_REGISTER_TYPE

63422

+ && reg_class_to_reg_type[(int)rclass] == GPR_REG_TYPE

63423

&& MEM_P (x)

63424

&& GET_MODE_SIZE (GET_MODE (x)) >= UNITS_PER_WORD)

63425

{

63426

@@ -13867,7 +16561,7 @@

63427

default_p = true;

63428

}

63429

else if (!TARGET_POWERPC64

63430

- && rs6000_reload_register_type (rclass) == GPR_REGISTER_TYPE

63431

+ && reg_class_to_reg_type[(int)rclass] == GPR_REG_TYPE

63432

&& MEM_P (x)

63433

&& GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)

63434

{

63435

@@ -13945,6 +16639,36 @@

63436

return ret;

63437

}

63438

63439

+/* Better tracing for rs6000_secondary_reload_inner. */

63440

+

63441

+static void

63442

+rs6000_secondary_reload_trace (int line, rtx reg, rtx mem, rtx scratch,

63443

+ bool store_p)

63444

+{

63445

+ rtx set, clobber;

63446

+

63447

+ gcc_assert (reg != NULL_RTX && mem != NULL_RTX && scratch != NULL_RTX);

63448

+

63449

+ fprintf (stderr, "rs6000_secondary_reload_inner:%d, type = %s\n", line,

63450

+ store_p ? "store" : "load");

63451

+

63452

+ if (store_p)

63453

+ set = gen_rtx_SET (VOIDmode, mem, reg);

63454

+ else

63455

+ set = gen_rtx_SET (VOIDmode, reg, mem);

63456

+

63457

+ clobber = gen_rtx_CLOBBER (VOIDmode, scratch);

63458

+ debug_rtx (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber)));

63459

+}

63460

+

63461

+static void

63462

+rs6000_secondary_reload_fail (int line, rtx reg, rtx mem, rtx scratch,

63463

+ bool store_p)

63464

+{

63465

+ rs6000_secondary_reload_trace (line, reg, mem, scratch, store_p);

63466

+ gcc_unreachable ();

63467

+}

63468

+

63469

/* Fixup reload addresses for Altivec or VSX loads/stores to change SP+offset

63470

to SP+reg addressing. */

63471

63472

@@ -13963,21 +16687,16 @@

63473

rtx cc_clobber;

63474

63475

if (TARGET_DEBUG_ADDR)

63476

- {

63477

- fprintf (stderr, "\nrs6000_secondary_reload_inner, type = %s\n",

63478

- store_p ? "store" : "load");

63479

- fprintf (stderr, "reg:\n");

63480

- debug_rtx (reg);

63481

- fprintf (stderr, "mem:\n");

63482

- debug_rtx (mem);

63483

- fprintf (stderr, "scratch:\n");

63484

- debug_rtx (scratch);

63485

- }

63486

+ rs6000_secondary_reload_trace (__LINE__, reg, mem, scratch, store_p);

63487

63488

- gcc_assert (regno >= 0 && regno < FIRST_PSEUDO_REGISTER);

63489

- gcc_assert (GET_CODE (mem) == MEM);

63490

+ if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)

63491

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63492

+

63493

+ if (GET_CODE (mem) != MEM)

63494

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63495

+

63496

rclass = REGNO_REG_CLASS (regno);

63497

- addr = XEXP (mem, 0);

63498

+ addr = find_replacement (&XEXP (mem, 0));

63499

63500

switch (rclass)

63501

{

63502

@@ -13988,25 +16707,31 @@

63503

if (GET_CODE (addr) == AND)

63504

{

63505

and_op2 = XEXP (addr, 1);

63506

- addr = XEXP (addr, 0);

63507

+ addr = find_replacement (&XEXP (addr, 0));

63508

}

63509

63510

if (GET_CODE (addr) == PRE_MODIFY)

63511

{

63512

- scratch_or_premodify = XEXP (addr, 0);

63513

- gcc_assert (REG_P (scratch_or_premodify));

63514

- gcc_assert (GET_CODE (XEXP (addr, 1)) == PLUS);

63515

- addr = XEXP (addr, 1);

63516

+ scratch_or_premodify = find_replacement (&XEXP (addr, 0));

63517

+ if (!REG_P (scratch_or_premodify))

63518

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63519

+

63520

+ addr = find_replacement (&XEXP (addr, 1));

63521

+ if (GET_CODE (addr) != PLUS)

63522

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63523

}

63524

63525

if (GET_CODE (addr) == PLUS

63526

&& (and_op2 != NULL_RTX

63527

- || !rs6000_legitimate_offset_address_p (TImode, addr,

63528

+ || !rs6000_legitimate_offset_address_p (PTImode, addr,

63529

false, true)))

63530

{

63531

+ /* find_replacement already recurses into both operands of

63532

+ PLUS so we don't need to call it here. */

63533

addr_op1 = XEXP (addr, 0);

63534

addr_op2 = XEXP (addr, 1);

63535

- gcc_assert (legitimate_indirect_address_p (addr_op1, false));

63536

+ if (!legitimate_indirect_address_p (addr_op1, false))

63537

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63538

63539

if (!REG_P (addr_op2)

63540

&& (GET_CODE (addr_op2) != CONST_INT

63541

@@ -14034,7 +16759,7 @@

63542

scratch_or_premodify = scratch;

63543

}

63544

else if (!legitimate_indirect_address_p (addr, false)

63545

- && !rs6000_legitimate_offset_address_p (TImode, addr,

63546

+ && !rs6000_legitimate_offset_address_p (PTImode, addr,

63547

false, true))

63548

{

63549

if (TARGET_DEBUG_ADDR)

63550

@@ -14050,9 +16775,21 @@

63551

}

63552

break;

63553

63554

- /* Float/Altivec registers can only handle reg+reg addressing. Move

63555

- other addresses into a scratch register. */

63556

+ /* Float registers can do offset+reg addressing for scalar types. */

63557

case FLOAT_REGS:

63558

+ if (legitimate_indirect_address_p (addr, false) /* reg */

63559

+ || legitimate_indexed_address_p (addr, false) /* reg+reg */

63560

+ || ((GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8)

63561

+ && and_op2 == NULL_RTX

63562

+ && scratch_or_premodify == scratch

63563

+ && rs6000_legitimate_offset_address_p (mode, addr, false, false)))

63564

+ break;

63565

+

63566

+ /* If this isn't a legacy floating point load/store, fall through to the

63567

+ VSX defaults. */

63568

+

63569

+ /* VSX/Altivec registers can only handle reg+reg addressing. Move other

63570

+ addresses into a scratch register. */

63571

case VSX_REGS:

63572

case ALTIVEC_REGS:

63573

63574

@@ -14066,35 +16803,35 @@

63575

|| !VECTOR_MEM_ALTIVEC_P (mode)))

63576

{

63577

and_op2 = XEXP (addr, 1);

63578

- addr = XEXP (addr, 0);

63579

+ addr = find_replacement (&XEXP (addr, 0));

63580

}

63581

63582

/* If we aren't using a VSX load, save the PRE_MODIFY register and use it

63583

as the address later. */

63584

if (GET_CODE (addr) == PRE_MODIFY

63585

- && (!VECTOR_MEM_VSX_P (mode)

63586

+ && ((ALTIVEC_OR_VSX_VECTOR_MODE (mode)

63587

+ && (rclass != FLOAT_REGS

63588

+ || (GET_MODE_SIZE (mode) != 4 && GET_MODE_SIZE (mode) != 8)))

63589

|| and_op2 != NULL_RTX

63590

|| !legitimate_indexed_address_p (XEXP (addr, 1), false)))

63591

{

63592

- scratch_or_premodify = XEXP (addr, 0);

63593

- gcc_assert (legitimate_indirect_address_p (scratch_or_premodify,

63594

- false));

63595

- gcc_assert (GET_CODE (XEXP (addr, 1)) == PLUS);

63596

- addr = XEXP (addr, 1);

63597

+ scratch_or_premodify = find_replacement (&XEXP (addr, 0));

63598

+ if (!legitimate_indirect_address_p (scratch_or_premodify, false))

63599

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63600

+

63601

+ addr = find_replacement (&XEXP (addr, 1));

63602

+ if (GET_CODE (addr) != PLUS)

63603

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63604

}

63605

63606

if (legitimate_indirect_address_p (addr, false) /* reg */

63607

|| legitimate_indexed_address_p (addr, false) /* reg+reg */

63608

- || GET_CODE (addr) == PRE_MODIFY /* VSX pre-modify */

63609

|| (GET_CODE (addr) == AND /* Altivec memory */

63610

+ && rclass == ALTIVEC_REGS

63611

&& GET_CODE (XEXP (addr, 1)) == CONST_INT

63612

&& INTVAL (XEXP (addr, 1)) == -16

63613

- && VECTOR_MEM_ALTIVEC_P (mode))

63614

- || (rclass == FLOAT_REGS /* legacy float mem */

63615

- && GET_MODE_SIZE (mode) == 8

63616

- && and_op2 == NULL_RTX

63617

- && scratch_or_premodify == scratch

63618

- && rs6000_legitimate_offset_address_p (mode, addr, false, false)))

63619

+ && (legitimate_indirect_address_p (XEXP (addr, 0), false)

63620

+ || legitimate_indexed_address_p (XEXP (addr, 0), false))))

63621

;

63622

63623

else if (GET_CODE (addr) == PLUS)

63624

@@ -14101,7 +16838,8 @@

63625

{

63626

addr_op1 = XEXP (addr, 0);

63627

addr_op2 = XEXP (addr, 1);

63628

- gcc_assert (REG_P (addr_op1));

63629

+ if (!REG_P (addr_op1))

63630

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63631

63632

if (TARGET_DEBUG_ADDR)

63633

{

63634

@@ -14120,7 +16858,8 @@

63635

}

63636

63637

else if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == CONST

63638

- || GET_CODE (addr) == CONST_INT || REG_P (addr))

63639

+ || GET_CODE (addr) == CONST_INT || GET_CODE (addr) == LO_SUM

63640

+ || REG_P (addr))

63641

{

63642

if (TARGET_DEBUG_ADDR)

63643

{

63644

@@ -14136,12 +16875,12 @@

63645

}

63646

63647

else

63648

- gcc_unreachable ();

63649

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63650

63651

break;

63652

63653

default:

63654

- gcc_unreachable ();

63655

+ rs6000_secondary_reload_fail (__LINE__, reg, mem, scratch, store_p);

63656

}

63657

63658

/* If the original address involved a pre-modify that we couldn't use the VSX

63659

@@ -14188,7 +16927,7 @@

63660

/* Adjust the address if it changed. */

63661

if (addr != XEXP (mem, 0))

63662

{

63663

- mem = change_address (mem, mode, addr);

63664

+ mem = replace_equiv_address_nv (mem, addr);

63665

if (TARGET_DEBUG_ADDR)

63666

fprintf (stderr, "\nrs6000_secondary_reload_inner, mem adjusted.\n");

63667

}

63668

@@ -14253,8 +16992,10 @@

63669

return;

63670

}

63671

63672

-/* Allocate a 64-bit stack slot to be used for copying SDmode

63673

- values through if this function has any SDmode references. */

63674

+/* Allocate a 64-bit stack slot to be used for copying SDmode values through if

63675

+ this function has any SDmode references. If we are on a power7 or later, we

63676

+ don't need the 64-bit stack slot since the LFIWZX and STIFWX instructions

63677

+ can load/store the value. */

63678

63679

static void

63680

rs6000_alloc_sdmode_stack_slot (void)

63681

@@ -14264,7 +17005,14 @@

63682

gimple_stmt_iterator gsi;

63683

63684

gcc_assert (cfun->machine->sdmode_stack_slot == NULL_RTX);

63685

+ /* We use a different approach for dealing with the secondary

63686

+ memory in LRA. */

63687

+ if (ira_use_lra_p)

63688

+ return;

63689

63690

+ if (TARGET_NO_SDMODE_STACK)

63691

+ return;

63692

+

63693

FOR_EACH_BB (bb)

63694

for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))

63695

{

63696

@@ -14325,8 +17073,7 @@

63697

{

63698

enum machine_mode mode = GET_MODE (x);

63699

63700

- if (VECTOR_UNIT_VSX_P (mode)

63701

- && x == CONST0_RTX (mode) && VSX_REG_CLASS_P (rclass))

63702

+ if (TARGET_VSX && x == CONST0_RTX (mode) && VSX_REG_CLASS_P (rclass))

63703

return rclass;

63704

63705

if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)

63706

@@ -14334,8 +17081,14 @@

63707

&& easy_vector_constant (x, mode))

63708

return ALTIVEC_REGS;

63709

63710

- if (CONSTANT_P (x) && reg_classes_intersect_p (rclass, FLOAT_REGS))

63711

- return NO_REGS;

63712

+ if ((CONSTANT_P (x) || GET_CODE (x) == PLUS))

63713

+ {

63714

+ if (reg_class_subset_p (GENERAL_REGS, rclass))

63715

+ return GENERAL_REGS;

63716

+ if (reg_class_subset_p (BASE_REGS, rclass))

63717

+ return BASE_REGS;

63718

+ return NO_REGS;

63719

+ }

63720

63721

if (GET_MODE_CLASS (mode) == MODE_INT && rclass == NON_SPECIAL_REGS)

63722

return GENERAL_REGS;

63723

@@ -14349,7 +17102,8 @@

63724

if (GET_MODE_SIZE (mode) <= 8)

63725

return FLOAT_REGS;

63726

63727

- if (VECTOR_UNIT_ALTIVEC_P (mode) || VECTOR_MEM_ALTIVEC_P (mode))

63728

+ if (VECTOR_UNIT_ALTIVEC_P (mode) || VECTOR_MEM_ALTIVEC_P (mode)

63729

+ || mode == V1TImode)

63730

return ALTIVEC_REGS;

63731

63732

return rclass;

63733

@@ -14381,60 +17135,45 @@

63734

set and vice versa. */

63735

63736

static bool

63737

-rs6000_secondary_memory_needed (enum reg_class class1,

63738

- enum reg_class class2,

63739

+rs6000_secondary_memory_needed (enum reg_class from_class,

63740

+ enum reg_class to_class,

63741

enum machine_mode mode)

63742

{

63743

- if (class1 == class2)

63744

- return false;

63745

+ enum rs6000_reg_type from_type, to_type;

63746

+ bool altivec_p = ((from_class == ALTIVEC_REGS)

63747

+ || (to_class == ALTIVEC_REGS));

63748

63749

- /* Under VSX, there are 3 register classes that values could be in (VSX_REGS,

63750

- ALTIVEC_REGS, and FLOAT_REGS). We don't need to use memory to copy

63751

- between these classes. But we need memory for other things that can go in

63752

- FLOAT_REGS like SFmode. */

63753

- if (TARGET_VSX

63754

- && (VECTOR_MEM_VSX_P (mode) || VECTOR_UNIT_VSX_P (mode))

63755

- && (class1 == VSX_REGS || class1 == ALTIVEC_REGS

63756

- || class1 == FLOAT_REGS))

63757

- return (class2 != VSX_REGS && class2 != ALTIVEC_REGS

63758

- && class2 != FLOAT_REGS);

63759

+ /* If a simple/direct move is available, we don't need secondary memory */

63760

+ from_type = reg_class_to_reg_type[(int)from_class];

63761

+ to_type = reg_class_to_reg_type[(int)to_class];

63762

63763

- if (class1 == VSX_REGS || class2 == VSX_REGS)

63764

- return true;

63765

+ if (rs6000_secondary_reload_move (to_type, from_type, mode,

63766

+ (secondary_reload_info *)0, altivec_p))

63767

+ return false;

63768

63769

- if (class1 == FLOAT_REGS

63770

- && (!TARGET_MFPGPR || !TARGET_POWERPC64

63771

- || ((mode != DFmode)

63772

- && (mode != DDmode)

63773

- && (mode != DImode))))

63774

+ /* If we have a floating point or vector register class, we need to use

63775

+ memory to transfer the data. */

63776

+ if (IS_FP_VECT_REG_TYPE (from_type) || IS_FP_VECT_REG_TYPE (to_type))

63777

return true;

63778

63779

- if (class2 == FLOAT_REGS

63780

- && (!TARGET_MFPGPR || !TARGET_POWERPC64

63781

- || ((mode != DFmode)

63782

- && (mode != DDmode)

63783

- && (mode != DImode))))

63784

- return true;

63785

-

63786

- if (class1 == ALTIVEC_REGS || class2 == ALTIVEC_REGS)

63787

- return true;

63788

-

63789

return false;

63790

}

63791

63792

/* Debug version of rs6000_secondary_memory_needed. */

63793

static bool

63794

-rs6000_debug_secondary_memory_needed (enum reg_class class1,

63795

- enum reg_class class2,

63796

+rs6000_debug_secondary_memory_needed (enum reg_class from_class,

63797

+ enum reg_class to_class,

63798

enum machine_mode mode)

63799

{

63800

- bool ret = rs6000_secondary_memory_needed (class1, class2, mode);

63801

+ bool ret = rs6000_secondary_memory_needed (from_class, to_class, mode);

63802

63803

fprintf (stderr,

63804

- "rs6000_secondary_memory_needed, return: %s, class1 = %s, "

63805

- "class2 = %s, mode = %s\n",

63806

- ret ? "true" : "false", reg_class_names[class1],

63807

- reg_class_names[class2], GET_MODE_NAME (mode));

63808

+ "rs6000_secondary_memory_needed, return: %s, from_class = %s, "

63809

+ "to_class = %s, mode = %s\n",

63810

+ ret ? "true" : "false",

63811

+ reg_class_names[from_class],

63812

+ reg_class_names[to_class],

63813

+ GET_MODE_NAME (mode));

63814

63815

return ret;

63816

}

63817

@@ -14498,15 +17237,21 @@

63818

/* Constants, memory, and FP registers can go into FP registers. */

63819

if ((regno == -1 || FP_REGNO_P (regno))

63820

&& (rclass == FLOAT_REGS || rclass == NON_SPECIAL_REGS))

63821

- return (mode != SDmode) ? NO_REGS : GENERAL_REGS;

63822

+ return (mode != SDmode || lra_in_progress) ? NO_REGS : GENERAL_REGS;

63823

63824

/* Memory, and FP/altivec registers can go into fp/altivec registers under

63825

- VSX. */

63826

+ VSX. However, for scalar variables, use the traditional floating point

63827

+ registers so that we can use offset+register addressing. */

63828

if (TARGET_VSX

63829

&& (regno == -1 || VSX_REGNO_P (regno))

63830

&& VSX_REG_CLASS_P (rclass))

63831

- return NO_REGS;

63832

+ {

63833

+ if (GET_MODE_SIZE (mode) < 16)

63834

+ return FLOAT_REGS;

63835

63836

+ return NO_REGS;

63837

+ }

63838

+

63839

/* Memory, and AltiVec registers can go into AltiVec registers. */

63840

if ((regno == -1 || ALTIVEC_REGNO_P (regno))

63841

&& rclass == ALTIVEC_REGS)

63842

@@ -14550,8 +17295,42 @@

63843

if (from_size != to_size)

63844

{

63845

enum reg_class xclass = (TARGET_VSX) ? VSX_REGS : FLOAT_REGS;

63846

- return ((from_size < 8 || to_size < 8 || TARGET_IEEEQUAD)

63847

- && reg_classes_intersect_p (xclass, rclass));

63848

+

63849

+ if (reg_classes_intersect_p (xclass, rclass))

63850

+ {

63851

+ unsigned to_nregs = hard_regno_nregs[FIRST_FPR_REGNO][to];

63852

+ unsigned from_nregs = hard_regno_nregs[FIRST_FPR_REGNO][from];

63853

+

63854

+ /* Don't allow 64-bit types to overlap with 128-bit types that take a

63855

+ single register under VSX because the scalar part of the register

63856

+ is in the upper 64-bits, and not the lower 64-bits. Types like

63857

+ TFmode/TDmode that take 2 scalar register can overlap. 128-bit

63858

+ IEEE floating point can't overlap, and neither can small

63859

+ values. */

63860

+

63861

+ if (TARGET_IEEEQUAD && (to == TFmode || from == TFmode))

63862

+ return true;

63863

+

63864

+ /* TDmode in floating-mode registers must always go into a register

63865

+ pair with the most significant word in the even-numbered register

63866

+ to match ISA requirements. In little-endian mode, this does not

63867

+ match subreg numbering, so we cannot allow subregs. */

63868

+ if (!BYTES_BIG_ENDIAN && (to == TDmode || from == TDmode))

63869

+ return true;

63870

+

63871

+ if (from_size < 8 || to_size < 8)

63872

+ return true;

63873

+

63874

+ if (from_size == 8 && (8 * to_nregs) != to_size)

63875

+ return true;

63876

+

63877

+ if (to_size == 8 && (8 * from_nregs) != from_size)

63878

+ return true;

63879

+

63880

+ return false;

63881

+ }

63882

+ else

63883

+ return false;

63884

}

63885

63886

if (TARGET_E500_DOUBLE

63887

@@ -14565,10 +17344,19 @@

63888

/* Since the VSX register set includes traditional floating point registers

63889

and altivec registers, just check for the size being different instead of

63890

trying to check whether the modes are vector modes. Otherwise it won't

63891

- allow say DF and DI to change classes. */

63892

+ allow say DF and DI to change classes. For types like TFmode and TDmode

63893

+ that take 2 64-bit registers, rather than a single 128-bit register, don't

63894

+ allow subregs of those types to other 128 bit types. */

63895

if (TARGET_VSX && VSX_REG_CLASS_P (rclass))

63896

- return (from_size != 8 && from_size != 16);

63897

+ {

63898

+ unsigned num_regs = (from_size + 15) / 16;

63899

+ if (hard_regno_nregs[FIRST_FPR_REGNO][to] > num_regs

63900

+ || hard_regno_nregs[FIRST_FPR_REGNO][from] > num_regs)

63901

+ return true;

63902

63903

+ return (from_size != 8 && from_size != 16);

63904

+ }

63905

+

63906

if (TARGET_ALTIVEC && rclass == ALTIVEC_REGS

63907

&& (ALTIVEC_VECTOR_MODE (from) + ALTIVEC_VECTOR_MODE (to)) == 1)

63908

return true;

63909

@@ -14598,6 +17386,186 @@

63910

return ret;

63911

}

63912

63913

+/* Return a string to do a move operation of 128 bits of data. */

63914

+

63915

+const char *

63916

+rs6000_output_move_128bit (rtx operands[])

63917

+{

63918

+ rtx dest = operands[0];

63919

+ rtx src = operands[1];

63920

+ enum machine_mode mode = GET_MODE (dest);

63921

+ int dest_regno;

63922

+ int src_regno;

63923

+ bool dest_gpr_p, dest_fp_p, dest_vmx_p, dest_vsx_p;

63924

+ bool src_gpr_p, src_fp_p, src_vmx_p, src_vsx_p;

63925

+

63926

+ if (REG_P (dest))

63927

+ {

63928

+ dest_regno = REGNO (dest);

63929

+ dest_gpr_p = INT_REGNO_P (dest_regno);

63930

+ dest_fp_p = FP_REGNO_P (dest_regno);

63931

+ dest_vmx_p = ALTIVEC_REGNO_P (dest_regno);

63932

+ dest_vsx_p = dest_fp_p | dest_vmx_p;

63933

+ }

63934

+ else

63935

+ {

63936

+ dest_regno = -1;

63937

+ dest_gpr_p = dest_fp_p = dest_vmx_p = dest_vsx_p = false;

63938

+ }

63939

+

63940

+ if (REG_P (src))

63941

+ {

63942

+ src_regno = REGNO (src);

63943

+ src_gpr_p = INT_REGNO_P (src_regno);

63944

+ src_fp_p = FP_REGNO_P (src_regno);

63945

+ src_vmx_p = ALTIVEC_REGNO_P (src_regno);

63946

+ src_vsx_p = src_fp_p | src_vmx_p;

63947

+ }

63948

+ else

63949

+ {

63950

+ src_regno = -1;

63951

+ src_gpr_p = src_fp_p = src_vmx_p = src_vsx_p = false;

63952

+ }

63953

+

63954

+ /* Register moves. */

63955

+ if (dest_regno >= 0 && src_regno >= 0)

63956

+ {

63957

+ if (dest_gpr_p)

63958

+ {

63959

+ if (src_gpr_p)

63960

+ return "#";

63961

+

63962

+ else if (TARGET_VSX && TARGET_DIRECT_MOVE && src_vsx_p)

63963

+ return "#";

63964

+ }

63965

+

63966

+ else if (TARGET_VSX && dest_vsx_p)

63967

+ {

63968

+ if (src_vsx_p)

63969

+ return "xxlor %x0,%x1,%x1";

63970

+

63971

+ else if (TARGET_DIRECT_MOVE && src_gpr_p)

63972

+ return "#";

63973

+ }

63974

+

63975

+ else if (TARGET_ALTIVEC && dest_vmx_p && src_vmx_p)

63976

+ return "vor %0,%1,%1";

63977

+

63978

+ else if (dest_fp_p && src_fp_p)

63979

+ return "#";

63980

+ }

63981

+

63982

+ /* Loads. */

63983

+ else if (dest_regno >= 0 && MEM_P (src))

63984

+ {

63985

+ if (dest_gpr_p)

63986

+ {

63987

+ if (TARGET_QUAD_MEMORY && quad_load_store_p (dest, src))

63988

+ return "lq %0,%1";

63989

+ else

63990

+ return "#";

63991

+ }

63992

+

63993

+ else if (TARGET_ALTIVEC && dest_vmx_p

63994

+ && altivec_indexed_or_indirect_operand (src, mode))

63995

+ return "lvx %0,%y1";

63996

+

63997

+ else if (TARGET_VSX && dest_vsx_p)

63998

+ {

63999

+ if (mode == V16QImode || mode == V8HImode || mode == V4SImode)

64000

+ return "lxvw4x %x0,%y1";

64001

+ else

64002

+ return "lxvd2x %x0,%y1";

64003

+ }

64004

+

64005

+ else if (TARGET_ALTIVEC && dest_vmx_p)

64006

+ return "lvx %0,%y1";

64007

+

64008

+ else if (dest_fp_p)

64009

+ return "#";

64010

+ }

64011

+

64012

+ /* Stores. */

64013

+ else if (src_regno >= 0 && MEM_P (dest))

64014

+ {

64015

+ if (src_gpr_p)

64016

+ {

64017

+ if (TARGET_QUAD_MEMORY && quad_load_store_p (dest, src))

64018

+ return "stq %1,%0";

64019

+ else

64020

+ return "#";

64021

+ }

64022

+

64023

+ else if (TARGET_ALTIVEC && src_vmx_p

64024

+ && altivec_indexed_or_indirect_operand (src, mode))

64025

+ return "stvx %1,%y0";

64026

+

64027

+ else if (TARGET_VSX && src_vsx_p)

64028

+ {

64029

+ if (mode == V16QImode || mode == V8HImode || mode == V4SImode)

64030

+ return "stxvw4x %x1,%y0";

64031

+ else

64032

+ return "stxvd2x %x1,%y0";

64033

+ }

64034

+

64035

+ else if (TARGET_ALTIVEC && src_vmx_p)

64036

+ return "stvx %1,%y0";

64037

+

64038

+ else if (src_fp_p)

64039

+ return "#";

64040

+ }

64041

+

64042

+ /* Constants. */

64043

+ else if (dest_regno >= 0

64044

+ && (GET_CODE (src) == CONST_INT

64045

+ || GET_CODE (src) == CONST_DOUBLE

64046

+ || GET_CODE (src) == CONST_VECTOR))

64047

+ {

64048

+ if (dest_gpr_p)

64049

+ return "#";

64050

+

64051

+ else if (TARGET_VSX && dest_vsx_p && zero_constant (src, mode))

64052

+ return "xxlxor %x0,%x0,%x0";

64053

+

64054

+ else if (TARGET_ALTIVEC && dest_vmx_p)

64055

+ return output_vec_const_move (operands);

64056

+ }

64057

+

64058

+ if (TARGET_DEBUG_ADDR)

64059

+ {

64060

+ fprintf (stderr, "\n===== Bad 128 bit move:\n");

64061

+ debug_rtx (gen_rtx_SET (VOIDmode, dest, src));

64062

+ }

64063

+

64064

+ gcc_unreachable ();

64065

+}

64066

+

64067

+/* Validate a 128-bit move. */

64068

+bool

64069

+rs6000_move_128bit_ok_p (rtx operands[])

64070

+{

64071

+ enum machine_mode mode = GET_MODE (operands[0]);

64072

+ return (gpc_reg_operand (operands[0], mode)

64073

+ || gpc_reg_operand (operands[1], mode));

64074

+}

64075

+

64076

+/* Return true if a 128-bit move needs to be split. */

64077

+bool

64078

+rs6000_split_128bit_ok_p (rtx operands[])

64079

+{

64080

+ if (!reload_completed)

64081

+ return false;

64082

+

64083

+ if (!gpr_or_gpr_p (operands[0], operands[1]))

64084

+ return false;

64085

+

64086

+ if (quad_load_store_p (operands[0], operands[1]))

64087

+ return false;

64088

+

64089

+ return true;

64090

+}

64091

+

64092

+

64093

/* Given a comparison operation, return the bit number in CCR to test. We

64094

know this is a valid comparison.

64095

64096

@@ -14823,6 +17791,7 @@

64097

ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "L.");

64098

break;

64099

64100

+ case ABI_ELFv2:

64101

case ABI_V4:

64102

case ABI_DARWIN:

64103

break;

64104

@@ -15302,7 +18271,7 @@

64105

return;

64106

64107

case 'Y':

64108

- /* Like 'L', for third word of TImode */

64109

+ /* Like 'L', for third word of TImode/PTImode */

64110

if (REG_P (x))

64111

fputs (reg_names[REGNO (x) + 2], file);

64112

else if (MEM_P (x))

64113

@@ -15352,7 +18321,7 @@

64114

return;

64115

64116

case 'Z':

64117

- /* Like 'L', for last word of TImode. */

64118

+ /* Like 'L', for last word of TImode/PTImode. */

64119

if (REG_P (x))

64120

fputs (reg_names[REGNO (x) + 3], file);

64121

else if (MEM_P (x))

64122

@@ -15383,7 +18352,8 @@

64123

if ((TARGET_SPE || TARGET_E500_DOUBLE)

64124

&& (GET_MODE_SIZE (GET_MODE (x)) == 8

64125

|| GET_MODE (x) == TFmode

64126

- || GET_MODE (x) == TImode))

64127

+ || GET_MODE (x) == TImode

64128

+ || GET_MODE (x) == PTImode))

64129

{

64130

/* Handle [reg]. */

64131

if (REG_P (tmp))

64132

@@ -16766,7 +19736,8 @@

64133

}

64134

64135

/* A subroutine of the atomic operation splitters. Emit a load-locked

64136

- instruction in MODE. */

64137

+ instruction in MODE. For QI/HImode, possibly use a pattern than includes

64138

+ the zero_extend operation. */

64139

64140

static void

64141

emit_load_locked (enum machine_mode mode, rtx reg, rtx mem)

64142

@@ -16775,12 +19746,26 @@

64143

64144

switch (mode)

64145

{

64146

+ case QImode:

64147

+ fn = gen_load_lockedqi;

64148

+ break;

64149

+ case HImode:

64150

+ fn = gen_load_lockedhi;

64151

+ break;

64152

case SImode:

64153

- fn = gen_load_lockedsi;

64154

+ if (GET_MODE (mem) == QImode)

64155

+ fn = gen_load_lockedqi_si;

64156

+ else if (GET_MODE (mem) == HImode)

64157

+ fn = gen_load_lockedhi_si;

64158

+ else

64159

+ fn = gen_load_lockedsi;

64160

break;

64161

case DImode:

64162

fn = gen_load_lockeddi;

64163

break;

64164

+ case TImode:

64165

+ fn = gen_load_lockedti;

64166

+ break;

64167

default:

64168

gcc_unreachable ();

64169

}

64170

@@ -16797,6 +19782,12 @@

64171

64172

switch (mode)

64173

{

64174

+ case QImode:

64175

+ fn = gen_store_conditionalqi;

64176

+ break;

64177

+ case HImode:

64178

+ fn = gen_store_conditionalhi;

64179

+ break;

64180

case SImode:

64181

fn = gen_store_conditionalsi;

64182

break;

64183

@@ -16803,6 +19794,9 @@

64184

case DImode:

64185

fn = gen_store_conditionaldi;

64186

break;

64187

+ case TImode:

64188

+ fn = gen_store_conditionalti;

64189

+ break;

64190

default:

64191

gcc_unreachable ();

64192

}

64193

@@ -16949,7 +19943,7 @@

64194

{

64195

rtx boolval, retval, mem, oldval, newval, cond;

64196

rtx label1, label2, x, mask, shift;

64197

- enum machine_mode mode;

64198

+ enum machine_mode mode, orig_mode;

64199

enum memmodel mod_s, mod_f;

64200

bool is_weak;

64201

64202

@@ -16961,23 +19955,30 @@

64203

is_weak = (INTVAL (operands[5]) != 0);

64204

mod_s = (enum memmodel) INTVAL (operands[6]);

64205

mod_f = (enum memmodel) INTVAL (operands[7]);

64206

- mode = GET_MODE (mem);

64207

+ orig_mode = mode = GET_MODE (mem);

64208

64209

mask = shift = NULL_RTX;

64210

if (mode == QImode || mode == HImode)

64211

{

64212

- mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

64213

-

64214

- /* Shift and mask OLDVAL into position with the word. */

64215

+ /* Before power8, we didn't have access to lbarx/lharx, so generate a

64216

+ lwarx and shift/mask operations. With power8, we need to do the

64217

+ comparison in SImode, but the store is still done in QI/HImode. */

64218

oldval = convert_modes (SImode, mode, oldval, 1);

64219

- oldval = expand_simple_binop (SImode, ASHIFT, oldval, shift,

64220

- NULL_RTX, 1, OPTAB_LIB_WIDEN);

64221

64222

- /* Shift and mask NEWVAL into position within the word. */

64223

- newval = convert_modes (SImode, mode, newval, 1);

64224

- newval = expand_simple_binop (SImode, ASHIFT, newval, shift,

64225

- NULL_RTX, 1, OPTAB_LIB_WIDEN);

64226

+ if (!TARGET_SYNC_HI_QI)

64227

+ {

64228

+ mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

64229

64230

+ /* Shift and mask OLDVAL into position with the word. */

64231

+ oldval = expand_simple_binop (SImode, ASHIFT, oldval, shift,

64232

+ NULL_RTX, 1, OPTAB_LIB_WIDEN);

64233

+

64234

+ /* Shift and mask NEWVAL into position within the word. */

64235

+ newval = convert_modes (SImode, mode, newval, 1);

64236

+ newval = expand_simple_binop (SImode, ASHIFT, newval, shift,

64237

+ NULL_RTX, 1, OPTAB_LIB_WIDEN);

64238

+ }

64239

+

64240

/* Prepare to adjust the return value. */

64241

retval = gen_reg_rtx (SImode);

64242

mode = SImode;

64243

@@ -17005,7 +20006,25 @@

64244

}

64245

64246

cond = gen_reg_rtx (CCmode);

64247

- x = gen_rtx_COMPARE (CCmode, x, oldval);

64248

+ /* If we have TImode, synthesize a comparison. */

64249

+ if (mode != TImode)

64250

+ x = gen_rtx_COMPARE (CCmode, x, oldval);

64251

+ else

64252

+ {

64253

+ rtx xor1_result = gen_reg_rtx (DImode);

64254

+ rtx xor2_result = gen_reg_rtx (DImode);

64255

+ rtx or_result = gen_reg_rtx (DImode);

64256

+ rtx new_word0 = simplify_gen_subreg (DImode, x, TImode, 0);

64257

+ rtx new_word1 = simplify_gen_subreg (DImode, x, TImode, 8);

64258

+ rtx old_word0 = simplify_gen_subreg (DImode, oldval, TImode, 0);

64259

+ rtx old_word1 = simplify_gen_subreg (DImode, oldval, TImode, 8);

64260

+

64261

+ emit_insn (gen_xordi3 (xor1_result, new_word0, old_word0));

64262

+ emit_insn (gen_xordi3 (xor2_result, new_word1, old_word1));

64263

+ emit_insn (gen_iordi3 (or_result, xor1_result, xor2_result));

64264

+ x = gen_rtx_COMPARE (CCmode, or_result, const0_rtx);

64265

+ }

64266

+

64267

emit_insn (gen_rtx_SET (VOIDmode, cond, x));

64268

64269

x = gen_rtx_NE (VOIDmode, cond, const0_rtx);

64270

@@ -17015,7 +20034,7 @@

64271

if (mask)

64272

x = rs6000_mask_atomic_subword (retval, newval, mask);

64273

64274

- emit_store_conditional (mode, cond, mem, x);

64275

+ emit_store_conditional (orig_mode, cond, mem, x);

64276

64277

if (!is_weak)

64278

{

64279

@@ -17033,6 +20052,8 @@

64280

64281

if (shift)

64282

rs6000_finish_atomic_subword (operands[1], retval, shift);

64283

+ else if (mode != GET_MODE (operands[1]))

64284

+ convert_move (operands[1], retval, 1);

64285

64286

/* In all cases, CR0 contains EQ on success, and NE on failure. */

64287

x = gen_rtx_EQ (SImode, cond, const0_rtx);

64288

@@ -17056,7 +20077,7 @@

64289

mode = GET_MODE (mem);

64290

64291

mask = shift = NULL_RTX;

64292

- if (mode == QImode || mode == HImode)

64293

+ if (!TARGET_SYNC_HI_QI && (mode == QImode || mode == HImode))

64294

{

64295

mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

64296

64297

@@ -17105,53 +20126,70 @@

64298

{

64299

enum memmodel model = (enum memmodel) INTVAL (model_rtx);

64300

enum machine_mode mode = GET_MODE (mem);

64301

+ enum machine_mode store_mode = mode;

64302

rtx label, x, cond, mask, shift;

64303

rtx before = orig_before, after = orig_after;

64304

64305

mask = shift = NULL_RTX;

64306

+ /* On power8, we want to use SImode for the operation. On previous systems,

64307

+ use the operation in a subword and shift/mask to get the proper byte or

64308

+ halfword. */

64309

if (mode == QImode || mode == HImode)

64310

{

64311

- mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

64312

+ if (TARGET_SYNC_HI_QI)

64313

+ {

64314

+ val = convert_modes (SImode, mode, val, 1);

64315

64316

- /* Shift and mask VAL into position with the word. */

64317

- val = convert_modes (SImode, mode, val, 1);

64318

- val = expand_simple_binop (SImode, ASHIFT, val, shift,

64319

- NULL_RTX, 1, OPTAB_LIB_WIDEN);

64320

-

64321

- switch (code)

64322

+ /* Prepare to adjust the return value. */

64323

+ before = gen_reg_rtx (SImode);

64324

+ if (after)

64325

+ after = gen_reg_rtx (SImode);

64326

+ mode = SImode;

64327

+ }

64328

+ else

64329

{

64330

- case IOR:

64331

- case XOR:

64332

- /* We've already zero-extended VAL. That is sufficient to

64333

- make certain that it does not affect other bits. */

64334

- mask = NULL;

64335

- break;

64336

+ mem = rs6000_adjust_atomic_subword (mem, &shift, &mask);

64337

64338

- case AND:

64339

- /* If we make certain that all of the other bits in VAL are

64340

- set, that will be sufficient to not affect other bits. */

64341

- x = gen_rtx_NOT (SImode, mask);

64342

- x = gen_rtx_IOR (SImode, x, val);

64343

- emit_insn (gen_rtx_SET (VOIDmode, val, x));

64344

- mask = NULL;

64345

- break;

64346

+ /* Shift and mask VAL into position with the word. */

64347

+ val = convert_modes (SImode, mode, val, 1);

64348

+ val = expand_simple_binop (SImode, ASHIFT, val, shift,

64349

+ NULL_RTX, 1, OPTAB_LIB_WIDEN);

64350

64351

- case NOT:

64352

- case PLUS:

64353

- case MINUS:

64354

- /* These will all affect bits outside the field and need

64355

- adjustment via MASK within the loop. */

64356

- break;

64357

+ switch (code)

64358

+ {

64359

+ case IOR:

64360

+ case XOR:

64361

+ /* We've already zero-extended VAL. That is sufficient to

64362

+ make certain that it does not affect other bits. */

64363

+ mask = NULL;

64364

+ break;

64365

64366

- default:

64367

- gcc_unreachable ();

64368

+ case AND:

64369

+ /* If we make certain that all of the other bits in VAL are

64370

+ set, that will be sufficient to not affect other bits. */

64371

+ x = gen_rtx_NOT (SImode, mask);

64372

+ x = gen_rtx_IOR (SImode, x, val);

64373

+ emit_insn (gen_rtx_SET (VOIDmode, val, x));

64374

+ mask = NULL;

64375

+ break;

64376

+

64377

+ case NOT:

64378

+ case PLUS:

64379

+ case MINUS:

64380

+ /* These will all affect bits outside the field and need

64381

+ adjustment via MASK within the loop. */

64382

+ break;

64383

+

64384

+ default:

64385

+ gcc_unreachable ();

64386

+ }

64387

+

64388

+ /* Prepare to adjust the return value. */

64389

+ before = gen_reg_rtx (SImode);

64390

+ if (after)

64391

+ after = gen_reg_rtx (SImode);

64392

+ store_mode = mode = SImode;

64393

}

64394

-

64395

- /* Prepare to adjust the return value. */

64396

- before = gen_reg_rtx (SImode);

64397

- if (after)

64398

- after = gen_reg_rtx (SImode);

64399

- mode = SImode;

64400

}

64401

64402

mem = rs6000_pre_atomic_barrier (mem, model);

64403

@@ -17184,9 +20222,11 @@

64404

NULL_RTX, 1, OPTAB_LIB_WIDEN);

64405

x = rs6000_mask_atomic_subword (before, x, mask);

64406

}

64407

+ else if (store_mode != mode)

64408

+ x = convert_modes (store_mode, mode, x, 1);

64409

64410

cond = gen_reg_rtx (CCmode);

64411

- emit_store_conditional (mode, cond, mem, x);

64412

+ emit_store_conditional (store_mode, cond, mem, x);

64413

64414

x = gen_rtx_NE (VOIDmode, cond, const0_rtx);

64415

emit_unlikely_jump (x, label);

64416

@@ -17195,11 +20235,22 @@

64417

64418

if (shift)

64419

{

64420

+ /* QImode/HImode on machines without lbarx/lharx where we do a lwarx and

64421

+ then do the calcuations in a SImode register. */

64422

if (orig_before)

64423

rs6000_finish_atomic_subword (orig_before, before, shift);

64424

if (orig_after)

64425

rs6000_finish_atomic_subword (orig_after, after, shift);

64426

}

64427

+ else if (store_mode != mode)

64428

+ {

64429

+ /* QImode/HImode on machines with lbarx/lharx where we do the native

64430

+ operation and then do the calcuations in a SImode register. */

64431

+ if (orig_before)

64432

+ convert_move (orig_before, before, 1);

64433

+ if (orig_after)

64434

+ convert_move (orig_after, after, 1);

64435

+ }

64436

else if (orig_after && after != orig_after)

64437

emit_move_insn (orig_after, after);

64438

}

64439

@@ -17239,6 +20290,39 @@

64440

64441

gcc_assert (reg_mode_size * nregs == GET_MODE_SIZE (mode));

64442

64443

+ /* TDmode residing in FP registers is special, since the ISA requires that

64444

+ the lower-numbered word of a register pair is always the most significant

64445

+ word, even in little-endian mode. This does not match the usual subreg

64446

+ semantics, so we cannnot use simplify_gen_subreg in those cases. Access

64447

+ the appropriate constituent registers "by hand" in little-endian mode.

64448

+

64449

+ Note we do not need to check for destructive overlap here since TDmode

64450

+ can only reside in even/odd register pairs. */

64451

+ if (FP_REGNO_P (reg) && DECIMAL_FLOAT_MODE_P (mode) && !BYTES_BIG_ENDIAN)

64452

+ {

64453

+ rtx p_src, p_dst;

64454

+ int i;

64455

+

64456

+ for (i = 0; i < nregs; i++)

64457

+ {

64458

+ if (REG_P (src) && FP_REGNO_P (REGNO (src)))

64459

+ p_src = gen_rtx_REG (reg_mode, REGNO (src) + nregs - 1 - i);

64460

+ else

64461

+ p_src = simplify_gen_subreg (reg_mode, src, mode,

64462

+ i * reg_mode_size);

64463

+

64464

+ if (REG_P (dst) && FP_REGNO_P (REGNO (dst)))

64465

+ p_dst = gen_rtx_REG (reg_mode, REGNO (dst) + nregs - 1 - i);

64466

+ else

64467

+ p_dst = simplify_gen_subreg (reg_mode, dst, mode,

64468

+ i * reg_mode_size);

64469

+

64470

+ emit_insn (gen_rtx_SET (VOIDmode, p_dst, p_src));

64471

+ }

64472

+

64473

+ return;

64474

+ }

64475

+

64476

if (REG_P (src) && REG_P (dst) && (REGNO (src) < REGNO (dst)))

64477

{

64478

/* Move register range backwards, if we might have destructive

64479

@@ -17693,7 +20777,7 @@

64480

}

64481

else

64482

{

64483

- gcc_checking_assert (DEFAULT_ABI == ABI_AIX);

64484

+ gcc_checking_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2);

64485

if (info->first_fp_reg_save > 61)

64486

strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS;

64487

strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS;

64488

@@ -17704,7 +20788,8 @@

64489

by the static chain. It would require too much fiddling and the

64490

static chain is rarely used anyway. FPRs are saved w.r.t the stack

64491

pointer on Darwin, and AIX uses r1 or r12. */

64492

- if (using_static_chain_p && DEFAULT_ABI != ABI_AIX)

64493

+ if (using_static_chain_p

64494

+ && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN))

64495

strategy |= ((DEFAULT_ABI == ABI_DARWIN ? 0 : SAVE_INLINE_FPRS)

64496

| SAVE_INLINE_GPRS

64497

| SAVE_INLINE_VRS | REST_INLINE_VRS);

64498

@@ -17837,7 +20922,35 @@

64499

The required alignment for AIX configurations is two words (i.e., 8

64500

or 16 bytes).

64501

64502

+ The ELFv2 ABI is a variant of the AIX ABI. Stack frames look like:

64503

64504

+ SP----> +---------------------------------------+

64505

+ | Back chain to caller | 0

64506

+ +---------------------------------------+

64507

+ | Save area for CR | 8

64508

+ +---------------------------------------+

64509

+ | Saved LR | 16

64510

+ +---------------------------------------+

64511

+ | Saved TOC pointer | 24

64512

+ +---------------------------------------+

64513

+ | Parameter save area (P) | 32

64514

+ +---------------------------------------+

64515

+ | Alloca space (A) | 32+P

64516

+ +---------------------------------------+

64517

+ | Local variable space (L) | 32+P+A

64518

+ +---------------------------------------+

64519

+ | Save area for AltiVec registers (W) | 32+P+A+L

64520

+ +---------------------------------------+

64521

+ | AltiVec alignment padding (Y) | 32+P+A+L+W

64522

+ +---------------------------------------+

64523

+ | Save area for GP registers (G) | 32+P+A+L+W+Y

64524

+ +---------------------------------------+

64525

+ | Save area for FP registers (F) | 32+P+A+L+W+Y+G

64526

+ +---------------------------------------+

64527

+ old SP->| back chain to caller's caller | 32+P+A+L+W+Y+G+F

64528

+ +---------------------------------------+

64529

+

64530

+

64531

V.4 stack frames look like:

64532

64533

SP----> +---------------------------------------+

64534

@@ -17897,6 +21010,7 @@

64535

rs6000_stack_t *info_ptr = &stack_info;

64536

int reg_size = TARGET_32BIT ? 4 : 8;

64537

int ehrd_size;

64538

+ int ehcr_size;

64539

int save_align;

64540

int first_gp;

64541

HOST_WIDE_INT non_fixed_size;

64542

@@ -17990,6 +21104,18 @@

64543

else

64544

ehrd_size = 0;

64545

64546

+ /* In the ELFv2 ABI, we also need to allocate space for separate

64547

+ CR field save areas if the function calls __builtin_eh_return. */

64548

+ if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return)

64549

+ {

64550

+ /* This hard-codes that we have three call-saved CR fields. */

64551

+ ehcr_size = 3 * reg_size;

64552

+ /* We do *not* use the regular CR save mechanism. */

64553

+ info_ptr->cr_save_p = 0;

64554

+ }

64555

+ else

64556

+ ehcr_size = 0;

64557

+

64558

/* Determine various sizes. */

64559

info_ptr->reg_size = reg_size;

64560

info_ptr->fixed_size = RS6000_SAVE_AREA;

64561

@@ -18029,6 +21155,7 @@

64562

gcc_unreachable ();

64563

64564

case ABI_AIX:

64565

+ case ABI_ELFv2:

64566

case ABI_DARWIN:

64567

info_ptr->fp_save_offset = - info_ptr->fp_size;

64568

info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;

64569

@@ -18058,6 +21185,8 @@

64570

}

64571

else

64572

info_ptr->ehrd_offset = info_ptr->gp_save_offset - ehrd_size;

64573

+

64574

+ info_ptr->ehcr_offset = info_ptr->ehrd_offset - ehcr_size;

64575

info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */

64576

info_ptr->lr_save_offset = 2*reg_size;

64577

break;

64578

@@ -18120,6 +21249,7 @@

64579

+ info_ptr->spe_gp_size

64580

+ info_ptr->spe_padding_size

64581

+ ehrd_size

64582

+ + ehcr_size

64583

+ info_ptr->cr_size

64584

+ info_ptr->vrsave_size,

64585

save_align);

64586

@@ -18133,7 +21263,7 @@

64587

64588

/* Determine if we need to save the link register. */

64589

if (info_ptr->calls_p

64590

- || (DEFAULT_ABI == ABI_AIX

64591

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

64592

&& crtl->profile

64593

&& !TARGET_PROFILE_KERNEL)

64594

|| (DEFAULT_ABI == ABI_V4 && cfun->calls_alloca)

64595

@@ -18279,6 +21409,7 @@

64596

default: abi_string = "Unknown"; break;

64597

case ABI_NONE: abi_string = "NONE"; break;

64598

case ABI_AIX: abi_string = "AIX"; break;

64599

+ case ABI_ELFv2: abi_string = "ELFv2"; break;

64600

case ABI_DARWIN: abi_string = "Darwin"; break;

64601

case ABI_V4: abi_string = "V.4"; break;

64602

}

64603

@@ -18400,7 +21531,8 @@

64604

/* Currently we don't optimize very well between prolog and body

64605

code and for PIC code the code can be actually quite bad, so

64606

don't try to be too clever here. */

64607

- if (count != 0 || (DEFAULT_ABI != ABI_AIX && flag_pic))

64608

+ if (count != 0

64609

+ || ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN) && flag_pic))

64610

{

64611

cfun->machine->ra_needs_full_frame = 1;

64612

64613

@@ -18459,13 +21591,13 @@

64614

return false;

64615

}

64616

64617

- /* Under the AIX ABI we can't allow calls to non-local functions,

64618

- because the callee may have a different TOC pointer to the

64619

- caller and there's no way to ensure we restore the TOC when we

64620

- return. With the secure-plt SYSV ABI we can't make non-local

64621

+ /* Under the AIX or ELFv2 ABIs we can't allow calls to non-local

64622

+ functions, because the callee may have a different TOC pointer to

64623

+ the caller and there's no way to ensure we restore the TOC when

64624

+ we return. With the secure-plt SYSV ABI we can't make non-local

64625

calls when -fpic/PIC because the plt call stubs use r30. */

64626

if (DEFAULT_ABI == ABI_DARWIN

64627

- || (DEFAULT_ABI == ABI_AIX

64628

+ || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

64629

&& decl

64630

&& !DECL_EXTERNAL (decl)

64631

&& (*targetm.binds_local_p) (decl))

64632

@@ -18566,7 +21698,7 @@

64633

rtx dest;

64634

dest = gen_rtx_REG (Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);

64635

64636

- if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic)

64637

+ if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI == ABI_V4 && flag_pic)

64638

{

64639

char buf[30];

64640

rtx lab, tmp1, tmp2, got;

64641

@@ -18594,7 +21726,7 @@

64642

emit_insn (gen_load_toc_v4_pic_si ());

64643

emit_move_insn (dest, gen_rtx_REG (Pmode, LR_REGNO));

64644

}

64645

- else if (TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2)

64646

+ else if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2)

64647

{

64648

char buf[30];

64649

rtx temp0 = (fromprolog

64650

@@ -18642,7 +21774,7 @@

64651

}

64652

else

64653

{

64654

- gcc_assert (DEFAULT_ABI == ABI_AIX);

64655

+ gcc_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2);

64656

64657

if (TARGET_32BIT)

64658

emit_insn (gen_load_toc_aix_si (dest));

64659

@@ -19047,7 +22179,7 @@

64660

64661

static rtx

64662

rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,

64663

- rtx reg2, rtx rreg)

64664

+ rtx reg2, rtx rreg, rtx split_reg)

64665

{

64666

rtx real, temp;

64667

64668

@@ -19138,6 +22270,11 @@

64669

}

64670

}

64671

64672

+ /* If a store insn has been split into multiple insns, the

64673

+ true source register is given by split_reg. */

64674

+ if (split_reg != NULL_RTX)

64675

+ real = gen_rtx_SET (VOIDmode, SET_DEST (real), split_reg);

64676

+

64677

RTX_FRAME_RELATED_P (insn) = 1;

64678

add_reg_note (insn, REG_FRAME_RELATED_EXPR, real);

64679

64680

@@ -19245,7 +22382,7 @@

64681

reg = gen_rtx_REG (mode, regno);

64682

insn = emit_insn (gen_frame_store (reg, frame_reg, offset));

64683

return rs6000_frame_related (insn, frame_reg, frame_reg_to_sp,

64684

- NULL_RTX, NULL_RTX);

64685

+ NULL_RTX, NULL_RTX, NULL_RTX);

64686

}

64687

64688

/* Emit an offset memory reference suitable for a frame store, while

64689

@@ -19361,7 +22498,7 @@

64690

if ((sel & SAVRES_LR))

64691

suffix = "_x";

64692

}

64693

- else if (DEFAULT_ABI == ABI_AIX)

64694

+ else if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

64695

{

64696

#if !defined (POWERPC_LINUX) && !defined (POWERPC_FREEBSD)

64697

/* No out-of-line save/restore routines for GPRs on AIX. */

64698

@@ -19502,7 +22639,7 @@

64699

static inline unsigned

64700

ptr_regno_for_savres (int sel)

64701

{

64702

- if (DEFAULT_ABI == ABI_AIX)

64703

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

64704

return (sel & SAVRES_REG) == SAVRES_FPR || (sel & SAVRES_LR) ? 1 : 12;

64705

return DEFAULT_ABI == ABI_DARWIN && (sel & SAVRES_REG) == SAVRES_FPR ? 1 : 11;

64706

}

64707

@@ -19587,6 +22724,43 @@

64708

return insn;

64709

}

64710

64711

+/* Emit code to store CR fields that need to be saved into REG. */

64712

+

64713

+static void

64714

+rs6000_emit_move_from_cr (rtx reg)

64715

+{

64716

+ /* Only the ELFv2 ABI allows storing only selected fields. */

64717

+ if (DEFAULT_ABI == ABI_ELFv2 && TARGET_MFCRF)

64718

+ {

64719

+ int i, cr_reg[8], count = 0;

64720

+

64721

+ /* Collect CR fields that must be saved. */

64722

+ for (i = 0; i < 8; i++)

64723

+ if (save_reg_p (CR0_REGNO + i))

64724

+ cr_reg[count++] = i;

64725

+

64726

+ /* If it's just a single one, use mfcrf. */

64727

+ if (count == 1)

64728

+ {

64729

+ rtvec p = rtvec_alloc (1);

64730

+ rtvec r = rtvec_alloc (2);

64731

+ RTVEC_ELT (r, 0) = gen_rtx_REG (CCmode, CR0_REGNO + cr_reg[0]);

64732

+ RTVEC_ELT (r, 1) = GEN_INT (1 << (7 - cr_reg[0]));

64733

+ RTVEC_ELT (p, 0)

64734

+ = gen_rtx_SET (VOIDmode, reg,

64735

+ gen_rtx_UNSPEC (SImode, r, UNSPEC_MOVESI_FROM_CR));

64736

+

64737

+ emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

64738

+ return;

64739

+ }

64740

+

64741

+ /* ??? It might be better to handle count == 2 / 3 cases here

64742

+ as well, using logical operations to combine the values. */

64743

+ }

64744

+

64745

+ emit_insn (gen_movesi_from_cr (reg));

64746

+}

64747

+

64748

/* Determine whether the gp REG is really used. */

64749

64750

static bool

64751

@@ -19652,6 +22826,17 @@

64752

#define NOT_INUSE(R) do {} while (0)

64753

#endif

64754

64755

+ if (DEFAULT_ABI == ABI_ELFv2)

64756

+ {

64757

+ cfun->machine->r2_setup_needed = df_regs_ever_live_p (TOC_REGNUM);

64758

+

64759

+ /* With -mminimal-toc we may generate an extra use of r2 below. */

64760

+ if (!TARGET_SINGLE_PIC_BASE

64761

+ && TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)

64762

+ cfun->machine->r2_setup_needed = true;

64763

+ }

64764

+

64765

+

64766

if (flag_stack_usage_info)

64767

current_function_static_stack_size = info->total_size;

64768

64769

@@ -19766,7 +22951,7 @@

64770

64771

insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

64772

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

64773

- treg, GEN_INT (-info->total_size));

64774

+ treg, GEN_INT (-info->total_size), NULL_RTX);

64775

sp_off = frame_off = info->total_size;

64776

}

64777

64778

@@ -19851,7 +23036,7 @@

64779

64780

insn = emit_move_insn (mem, reg);

64781

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

64782

- NULL_RTX, NULL_RTX);

64783

+ NULL_RTX, NULL_RTX, NULL_RTX);

64784

END_USE (0);

64785

}

64786

}

64787

@@ -19858,7 +23043,7 @@

64788

64789

/* If we need to save CR, put it into r12 or r11. Choose r12 except when

64790

r12 will be needed by out-of-line gpr restore. */

64791

- cr_save_regno = (DEFAULT_ABI == ABI_AIX

64792

+ cr_save_regno = ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

64793

&& !(strategy & (SAVE_INLINE_GPRS

64794

| SAVE_NOINLINE_GPRS_SAVES_LR))

64795

? 11 : 12);

64796

@@ -19867,21 +23052,9 @@

64797

&& REGNO (frame_reg_rtx) != cr_save_regno

64798

&& !(using_static_chain_p && cr_save_regno == 11))

64799

{

64800

- rtx set;

64801

-

64802

cr_save_rtx = gen_rtx_REG (SImode, cr_save_regno);

64803

START_USE (cr_save_regno);

64804

- insn = emit_insn (gen_movesi_from_cr (cr_save_rtx));

64805

- RTX_FRAME_RELATED_P (insn) = 1;

64806

- /* Now, there's no way that dwarf2out_frame_debug_expr is going

64807

- to understand '(unspec:SI [(reg:CC 68) ...] UNSPEC_MOVESI_FROM_CR)'.

64808

- But that's OK. All we have to do is specify that _one_ condition

64809

- code register is saved in this stack slot. The thrower's epilogue

64810

- will then restore all the call-saved registers.

64811

- We use CR2_REGNO (70) to be compatible with gcc-2.95 on Linux. */

64812

- set = gen_rtx_SET (VOIDmode, cr_save_rtx,

64813

- gen_rtx_REG (SImode, CR2_REGNO));

64814

- add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);

64815

+ rs6000_emit_move_from_cr (cr_save_rtx);

64816

}

64817

64818

/* Do any required saving of fpr's. If only one or two to save, do

64819

@@ -19919,7 +23092,7 @@

64820

info->lr_save_offset,

64821

DFmode, sel);

64822

rs6000_frame_related (insn, ptr_reg, sp_off,

64823

- NULL_RTX, NULL_RTX);

64824

+ NULL_RTX, NULL_RTX, NULL_RTX);

64825

if (lr)

64826

END_USE (0);

64827

}

64828

@@ -19998,7 +23171,7 @@

64829

SAVRES_SAVE | SAVRES_GPR);

64830

64831

rs6000_frame_related (insn, spe_save_area_ptr, sp_off - save_off,

64832

- NULL_RTX, NULL_RTX);

64833

+ NULL_RTX, NULL_RTX, NULL_RTX);

64834

}

64835

64836

/* Move the static chain pointer back. */

64837

@@ -20048,7 +23221,7 @@

64838

info->lr_save_offset + ptr_off,

64839

reg_mode, sel);

64840

rs6000_frame_related (insn, ptr_reg, sp_off - ptr_off,

64841

- NULL_RTX, NULL_RTX);

64842

+ NULL_RTX, NULL_RTX, NULL_RTX);

64843

if (lr)

64844

END_USE (0);

64845

}

64846

@@ -20064,7 +23237,7 @@

64847

info->gp_save_offset + frame_off + reg_size * i);

64848

insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

64849

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

64850

- NULL_RTX, NULL_RTX);

64851

+ NULL_RTX, NULL_RTX, NULL_RTX);

64852

}

64853

else if (!WORLD_SAVE_P (info))

64854

{

64855

@@ -20133,7 +23306,8 @@

64856

be updated if we arrived at this function via a plt call or

64857

toc adjusting stub. */

64858

emit_move_insn (tmp_reg_si, gen_rtx_MEM (SImode, tmp_reg));

64859

- toc_restore_insn = TARGET_32BIT ? 0x80410014 : 0xE8410028;

64860

+ toc_restore_insn = ((TARGET_32BIT ? 0x80410000 : 0xE8410000)

64861

+ + RS6000_TOC_SAVE_SLOT);

64862

hi = gen_int_mode (toc_restore_insn & ~0xffff, SImode);

64863

emit_insn (gen_xorsi3 (tmp_reg_si, tmp_reg_si, hi));

64864

compare_result = gen_rtx_REG (CCUNSmode, CR0_REGNO);

64865

@@ -20152,7 +23326,7 @@

64866

LABEL_NUSES (toc_save_done) += 1;

64867

64868

save_insn = emit_frame_save (frame_reg_rtx, reg_mode,

64869

- TOC_REGNUM, frame_off + 5 * reg_size,

64870

+ TOC_REGNUM, frame_off + RS6000_TOC_SAVE_SLOT,

64871

sp_off - frame_off);

64872

64873

emit_label (toc_save_done);

64874

@@ -20192,28 +23366,123 @@

64875

rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,

64876

GEN_INT (info->cr_save_offset + frame_off));

64877

rtx mem = gen_frame_mem (SImode, addr);

64878

- /* See the large comment above about why CR2_REGNO is used. */

64879

- rtx magic_eh_cr_reg = gen_rtx_REG (SImode, CR2_REGNO);

64880

64881

/* If we didn't copy cr before, do so now using r0. */

64882

if (cr_save_rtx == NULL_RTX)

64883

{

64884

- rtx set;

64885

-

64886

START_USE (0);

64887

cr_save_rtx = gen_rtx_REG (SImode, 0);

64888

- insn = emit_insn (gen_movesi_from_cr (cr_save_rtx));

64889

- RTX_FRAME_RELATED_P (insn) = 1;

64890

- set = gen_rtx_SET (VOIDmode, cr_save_rtx, magic_eh_cr_reg);

64891

- add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);

64892

+ rs6000_emit_move_from_cr (cr_save_rtx);

64893

}

64894

- insn = emit_move_insn (mem, cr_save_rtx);

64895

+

64896

+ /* Saving CR requires a two-instruction sequence: one instruction

64897

+ to move the CR to a general-purpose register, and a second

64898

+ instruction that stores the GPR to memory.

64899

+

64900

+ We do not emit any DWARF CFI records for the first of these,

64901

+ because we cannot properly represent the fact that CR is saved in

64902

+ a register. One reason is that we cannot express that multiple

64903

+ CR fields are saved; another reason is that on 64-bit, the size

64904

+ of the CR register in DWARF (4 bytes) differs from the size of

64905

+ a general-purpose register.

64906

+

64907

+ This means if any intervening instruction were to clobber one of

64908

+ the call-saved CR fields, we'd have incorrect CFI. To prevent

64909

+ this from happening, we mark the store to memory as a use of

64910

+ those CR fields, which prevents any such instruction from being

64911

+ scheduled in between the two instructions. */

64912

+ rtx crsave_v[9];

64913

+ int n_crsave = 0;

64914

+ int i;

64915

+

64916

+ crsave_v[n_crsave++] = gen_rtx_SET (VOIDmode, mem, cr_save_rtx);

64917

+ for (i = 0; i < 8; i++)

64918

+ if (save_reg_p (CR0_REGNO + i))

64919

+ crsave_v[n_crsave++]

64920

+ = gen_rtx_USE (VOIDmode, gen_rtx_REG (CCmode, CR0_REGNO + i));

64921

+

64922

+ insn = emit_insn (gen_rtx_PARALLEL (VOIDmode,

64923

+ gen_rtvec_v (n_crsave, crsave_v)));

64924

END_USE (REGNO (cr_save_rtx));

64925

64926

- rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

64927

- NULL_RTX, NULL_RTX);

64928

+ /* Now, there's no way that dwarf2out_frame_debug_expr is going to

64929

+ understand '(unspec:SI [(reg:CC 68) ...] UNSPEC_MOVESI_FROM_CR)',

64930

+ so we need to construct a frame expression manually. */

64931

+ RTX_FRAME_RELATED_P (insn) = 1;

64932

+

64933

+ /* Update address to be stack-pointer relative, like

64934

+ rs6000_frame_related would do. */

64935

+ addr = gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM),

64936

+ GEN_INT (info->cr_save_offset + sp_off));

64937

+ mem = gen_frame_mem (SImode, addr);

64938

+

64939

+ if (DEFAULT_ABI == ABI_ELFv2)

64940

+ {

64941

+ /* In the ELFv2 ABI we generate separate CFI records for each

64942

+ CR field that was actually saved. They all point to the

64943

+ same 32-bit stack slot. */

64944

+ rtx crframe[8];

64945

+ int n_crframe = 0;

64946

+

64947

+ for (i = 0; i < 8; i++)

64948

+ if (save_reg_p (CR0_REGNO + i))

64949

+ {

64950

+ crframe[n_crframe]

64951

+ = gen_rtx_SET (VOIDmode, mem,

64952

+ gen_rtx_REG (SImode, CR0_REGNO + i));

64953

+

64954

+ RTX_FRAME_RELATED_P (crframe[n_crframe]) = 1;

64955

+ n_crframe++;

64956

+ }

64957

+

64958

+ add_reg_note (insn, REG_FRAME_RELATED_EXPR,

64959

+ gen_rtx_PARALLEL (VOIDmode,

64960

+ gen_rtvec_v (n_crframe, crframe)));

64961

+ }

64962

+ else

64963

+ {

64964

+ /* In other ABIs, by convention, we use a single CR regnum to

64965

+ represent the fact that all call-saved CR fields are saved.

64966

+ We use CR2_REGNO to be compatible with gcc-2.95 on Linux. */

64967

+ rtx set = gen_rtx_SET (VOIDmode, mem,

64968

+ gen_rtx_REG (SImode, CR2_REGNO));

64969

+ add_reg_note (insn, REG_FRAME_RELATED_EXPR, set);

64970

+ }

64971

}

64972

64973

+ /* In the ELFv2 ABI we need to save all call-saved CR fields into

64974

+ *separate* slots if the routine calls __builtin_eh_return, so

64975

+ that they can be independently restored by the unwinder. */

64976

+ if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return)

64977

+ {

64978

+ int i, cr_off = info->ehcr_offset;

64979

+ rtx crsave;

64980

+

64981

+ /* ??? We might get better performance by using multiple mfocrf

64982

+ instructions. */

64983

+ crsave = gen_rtx_REG (SImode, 0);

64984

+ emit_insn (gen_movesi_from_cr (crsave));

64985

+

64986

+ for (i = 0; i < 8; i++)

64987

+ if (!call_used_regs[CR0_REGNO + i])

64988

+ {

64989

+ rtvec p = rtvec_alloc (2);

64990

+ RTVEC_ELT (p, 0)

64991

+ = gen_frame_store (crsave, frame_reg_rtx, cr_off + frame_off);

64992

+ RTVEC_ELT (p, 1)

64993

+ = gen_rtx_USE (VOIDmode, gen_rtx_REG (CCmode, CR0_REGNO + i));

64994

+

64995

+ insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

64996

+

64997

+ RTX_FRAME_RELATED_P (insn) = 1;

64998

+ add_reg_note (insn, REG_FRAME_RELATED_EXPR,

64999

+ gen_frame_store (gen_rtx_REG (SImode, CR0_REGNO + i),

65000

+ sp_reg_rtx, cr_off + sp_off));

65001

+

65002

+ cr_off += reg_size;

65003

+ }

65004

+ }

65005

+

65006

/* Update stack and set back pointer unless this is V.4,

65007

for which it was done previously. */

65008

if (!WORLD_SAVE_P (info) && info->push_p

65009

@@ -20291,7 +23560,7 @@

65010

info->altivec_save_offset + ptr_off,

65011

0, V4SImode, SAVRES_SAVE | SAVRES_VR);

65012

rs6000_frame_related (insn, scratch_reg, sp_off - ptr_off,

65013

- NULL_RTX, NULL_RTX);

65014

+ NULL_RTX, NULL_RTX, NULL_RTX);

65015

if (REGNO (frame_reg_rtx) == REGNO (scratch_reg))

65016

{

65017

/* The oddity mentioned above clobbered our frame reg. */

65018

@@ -20307,7 +23576,7 @@

65019

for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)

65020

if (info->vrsave_mask & ALTIVEC_REG_BIT (i))

65021

{

65022

- rtx areg, savereg, mem;

65023

+ rtx areg, savereg, mem, split_reg;

65024

int offset;

65025

65026

offset = (info->altivec_save_offset + frame_off

65027

@@ -20325,8 +23594,18 @@

65028

65029

insn = emit_move_insn (mem, savereg);

65030

65031

+ /* When we split a VSX store into two insns, we need to make

65032

+ sure the DWARF info knows which register we are storing.

65033

+ Pass it in to be used on the appropriate note. */

65034

+ if (!BYTES_BIG_ENDIAN

65035

+ && GET_CODE (PATTERN (insn)) == SET

65036

+ && GET_CODE (SET_SRC (PATTERN (insn))) == VEC_SELECT)

65037

+ split_reg = savereg;

65038

+ else

65039

+ split_reg = NULL_RTX;

65040

+

65041

rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,

65042

- areg, GEN_INT (offset));

65043

+ areg, GEN_INT (offset), split_reg);

65044

}

65045

}

65046

65047

@@ -20350,7 +23629,8 @@

65048

be using r12 as frame_reg_rtx and r11 as the static chain

65049

pointer for nested functions. */

65050

save_regno = 12;

65051

- if (DEFAULT_ABI == ABI_AIX && !using_static_chain_p)

65052

+ if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

65053

+ && !using_static_chain_p)

65054

save_regno = 11;

65055

else if (REGNO (frame_reg_rtx) == 12)

65056

{

65057

@@ -20389,7 +23669,7 @@

65058

can use register 0. This allows us to use a plain 'blr' to return

65059

from the procedure more often. */

65060

int save_LR_around_toc_setup = (TARGET_ELF

65061

- && DEFAULT_ABI != ABI_AIX

65062

+ && DEFAULT_ABI == ABI_V4

65063

&& flag_pic

65064

&& ! info->lr_save_p

65065

&& EDGE_COUNT (EXIT_BLOCK_PTR->preds) > 0);

65066

@@ -20451,7 +23731,7 @@

65067

if (rs6000_save_toc_in_prologue_p ())

65068

{

65069

rtx reg = gen_rtx_REG (reg_mode, TOC_REGNUM);

65070

- emit_insn (gen_frame_store (reg, sp_reg_rtx, 5 * reg_size));

65071

+ emit_insn (gen_frame_store (reg, sp_reg_rtx, RS6000_TOC_SAVE_SLOT));

65072

}

65073

}

65074

65075

@@ -20492,6 +23772,49 @@

65076

}

65077

}

65078

65079

+ /* ELFv2 ABI r2 setup code and local entry point. This must follow

65080

+ immediately after the global entry point label. */

65081

+ if (DEFAULT_ABI == ABI_ELFv2 && cfun->machine->r2_setup_needed)

65082

+ {

65083

+ const char *name = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);

65084

+

65085

+ fprintf (file, "0:\taddis 2,12,.TOC.-0b@ha\n");

65086

+ fprintf (file, "\taddi 2,2,.TOC.-0b@l\n");

65087

+

65088

+ fputs ("\t.localentry\t", file);

65089

+ assemble_name (file, name);

65090

+ fputs (",.-", file);

65091

+ assemble_name (file, name);

65092

+ fputs ("\n", file);

65093

+ }

65094

+

65095

+ /* Output -mprofile-kernel code. This needs to be done here instead of

65096

+ in output_function_profile since it must go after the ELFv2 ABI

65097

+ local entry point. */

65098

+ if (TARGET_PROFILE_KERNEL)

65099

+ {

65100

+ gcc_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2);

65101

+ gcc_assert (!TARGET_32BIT);

65102

+

65103

+ asm_fprintf (file, "\tmflr %s\n", reg_names[0]);

65104

+ asm_fprintf (file, "\tstd %s,16(%s)\n", reg_names[0], reg_names[1]);

65105

+

65106

+ /* In the ELFv2 ABI we have no compiler stack word. It must be

65107

+ the resposibility of _mcount to preserve the static chain

65108

+ register if required. */

65109

+ if (DEFAULT_ABI != ABI_ELFv2

65110

+ && cfun->static_chain_decl != NULL)

65111

+ {

65112

+ asm_fprintf (file, "\tstd %s,24(%s)\n",

65113

+ reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

65114

+ fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

65115

+ asm_fprintf (file, "\tld %s,24(%s)\n",

65116

+ reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

65117

+ }

65118

+ else

65119

+ fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

65120

+ }

65121

+

65122

rs6000_pic_labelno++;

65123

}

65124

65125

@@ -20544,6 +23867,7 @@

65126

65127

if (using_mfcr_multiple && count > 1)

65128

{

65129

+ rtx insn;

65130

rtvec p;

65131

int ndx;

65132

65133

@@ -20561,16 +23885,43 @@

65134

gen_rtx_UNSPEC (CCmode, r, UNSPEC_MOVESI_TO_CR));

65135

ndx++;

65136

}

65137

- emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

65138

+ insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));

65139

gcc_assert (ndx == count);

65140

+

65141

+ /* For the ELFv2 ABI we generate a CFA_RESTORE for each

65142

+ CR field separately. */

65143

+ if (!exit_func && DEFAULT_ABI == ABI_ELFv2 && flag_shrink_wrap)

65144

+ {

65145

+ for (i = 0; i < 8; i++)

65146

+ if (save_reg_p (CR0_REGNO + i))

65147

+ add_reg_note (insn, REG_CFA_RESTORE,

65148

+ gen_rtx_REG (SImode, CR0_REGNO + i));

65149

+

65150

+ RTX_FRAME_RELATED_P (insn) = 1;

65151

+ }

65152

}

65153

else

65154

for (i = 0; i < 8; i++)

65155

if (save_reg_p (CR0_REGNO + i))

65156

- emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode, CR0_REGNO + i),

65157

- reg));

65158

+ {

65159

+ rtx insn = emit_insn (gen_movsi_to_cr_one

65160

+ (gen_rtx_REG (CCmode, CR0_REGNO + i), reg));

65161

65162

- if (!exit_func && (DEFAULT_ABI == ABI_V4 || flag_shrink_wrap))

65163

+ /* For the ELFv2 ABI we generate a CFA_RESTORE for each

65164

+ CR field separately, attached to the insn that in fact

65165

+ restores this particular CR field. */

65166

+ if (!exit_func && DEFAULT_ABI == ABI_ELFv2 && flag_shrink_wrap)

65167

+ {

65168

+ add_reg_note (insn, REG_CFA_RESTORE,

65169

+ gen_rtx_REG (SImode, CR0_REGNO + i));

65170

+

65171

+ RTX_FRAME_RELATED_P (insn) = 1;

65172

+ }

65173

+ }

65174

+

65175

+ /* For other ABIs, we just generate a single CFA_RESTORE for CR2. */

65176

+ if (!exit_func && DEFAULT_ABI != ABI_ELFv2

65177

+ && (DEFAULT_ABI == ABI_V4 || flag_shrink_wrap))

65178

{

65179

rtx insn = get_last_insn ();

65180

rtx cr = gen_rtx_REG (SImode, CR2_REGNO);

65181

@@ -20611,10 +23962,22 @@

65182

static rtx

65183

add_crlr_cfa_restore (const rs6000_stack_t *info, rtx cfa_restores)

65184

{

65185

- if (info->cr_save_p)

65186

+ if (DEFAULT_ABI == ABI_ELFv2)

65187

+ {

65188

+ int i;

65189

+ for (i = 0; i < 8; i++)

65190

+ if (save_reg_p (CR0_REGNO + i))

65191

+ {

65192

+ rtx cr = gen_rtx_REG (SImode, CR0_REGNO + i);

65193

+ cfa_restores = alloc_reg_note (REG_CFA_RESTORE, cr,

65194

+ cfa_restores);

65195

+ }

65196

+ }

65197

+ else if (info->cr_save_p)

65198

cfa_restores = alloc_reg_note (REG_CFA_RESTORE,

65199

gen_rtx_REG (SImode, CR2_REGNO),

65200

cfa_restores);

65201

+

65202

if (info->lr_save_p)

65203

cfa_restores = alloc_reg_note (REG_CFA_RESTORE,

65204

gen_rtx_REG (Pmode, LR_REGNO),

65205

@@ -21112,6 +24475,35 @@

65206

|| (!restoring_GPRs_inline

65207

&& info->first_fp_reg_save == 64));

65208

65209

+ /* In the ELFv2 ABI we need to restore all call-saved CR fields from

65210

+ *separate* slots if the routine calls __builtin_eh_return, so

65211

+ that they can be independently restored by the unwinder. */

65212

+ if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return)

65213

+ {

65214

+ int i, cr_off = info->ehcr_offset;

65215

+

65216

+ for (i = 0; i < 8; i++)

65217

+ if (!call_used_regs[CR0_REGNO + i])

65218

+ {

65219

+ rtx reg = gen_rtx_REG (SImode, 0);

65220

+ emit_insn (gen_frame_load (reg, frame_reg_rtx,

65221

+ cr_off + frame_off));

65222

+

65223

+ insn = emit_insn (gen_movsi_to_cr_one

65224

+ (gen_rtx_REG (CCmode, CR0_REGNO + i), reg));

65225

+

65226

+ if (!exit_func && flag_shrink_wrap)

65227

+ {

65228

+ add_reg_note (insn, REG_CFA_RESTORE,

65229

+ gen_rtx_REG (SImode, CR0_REGNO + i));

65230

+

65231

+ RTX_FRAME_RELATED_P (insn) = 1;

65232

+ }

65233

+

65234

+ cr_off += reg_size;

65235

+ }

65236

+ }

65237

+

65238

/* Get the old lr if we saved it. If we are restoring registers

65239

out-of-line, then the out-of-line routines can do this for us. */

65240

if (restore_lr && restoring_GPRs_inline)

65241

@@ -21155,7 +24547,7 @@

65242

{

65243

rtx reg = gen_rtx_REG (reg_mode, 2);

65244

emit_insn (gen_frame_load (reg, frame_reg_rtx,

65245

- frame_off + 5 * reg_size));

65246

+ frame_off + RS6000_TOC_SAVE_SLOT));

65247

}

65248

65249

for (i = 0; ; ++i)

65250

@@ -21441,6 +24833,7 @@

65251

if (! restoring_FPRs_inline)

65252

{

65253

int i;

65254

+ int reg;

65255

rtx sym;

65256

65257

if (flag_shrink_wrap)

65258

@@ -21449,10 +24842,9 @@

65259

sym = rs6000_savres_routine_sym (info,

65260

SAVRES_FPR | (lr ? SAVRES_LR : 0));

65261

RTVEC_ELT (p, 2) = gen_rtx_USE (VOIDmode, sym);

65262

- RTVEC_ELT (p, 3) = gen_rtx_USE (VOIDmode,

65263

- gen_rtx_REG (Pmode,

65264

- DEFAULT_ABI == ABI_AIX

65265

- ? 1 : 11));

65266

+ reg = (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)? 1 : 11;

65267

+ RTVEC_ELT (p, 3) = gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, reg));

65268

+

65269

for (i = 0; i < 64 - info->first_fp_reg_save; i++)

65270

{

65271

rtx reg = gen_rtx_REG (DFmode, info->first_fp_reg_save + i);

65272

@@ -21530,7 +24922,8 @@

65273

65274

System V.4 Powerpc's (and the embedded ABI derived from it) use a

65275

different traceback table. */

65276

- if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive

65277

+ if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

65278

+ && ! flag_inhibit_size_directive

65279

&& rs6000_traceback != traceback_none && !cfun->is_thunk)

65280

{

65281

const char *fname = NULL;

65282

@@ -21858,6 +25251,12 @@

65283

SIBLING_CALL_P (insn) = 1;

65284

emit_barrier ();

65285

65286

+ /* Ensure we have a global entry point for the thunk. ??? We could

65287

+ avoid that if the target routine doesn't need a global entry point,

65288

+ but we do not know whether this is the case at this point. */

65289

+ if (DEFAULT_ABI == ABI_ELFv2)

65290

+ cfun->machine->r2_setup_needed = true;

65291

+

65292

/* Run just enough of rest_of_compilation to get the insns emitted.

65293

There's not really enough bulk here to make other passes such as

65294

instruction scheduling worth while. Note that use_thunk calls

65295

@@ -22554,7 +25953,7 @@

65296

if (TARGET_PROFILE_KERNEL)

65297

return;

65298

65299

- if (DEFAULT_ABI == ABI_AIX)

65300

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

65301

{

65302

#ifndef NO_PROFILE_COUNTERS

65303

# define NO_PROFILE_COUNTERS 0

65304

@@ -22698,29 +26097,9 @@

65305

break;

65306

65307

case ABI_AIX:

65308

+ case ABI_ELFv2:

65309

case ABI_DARWIN:

65310

- if (!TARGET_PROFILE_KERNEL)

65311

- {

65312

- /* Don't do anything, done in output_profile_hook (). */

65313

- }

65314

- else

65315

- {

65316

- gcc_assert (!TARGET_32BIT);

65317

-

65318

- asm_fprintf (file, "\tmflr %s\n", reg_names[0]);

65319

- asm_fprintf (file, "\tstd %s,16(%s)\n", reg_names[0], reg_names[1]);

65320

-

65321

- if (cfun->static_chain_decl != NULL)

65322

- {

65323

- asm_fprintf (file, "\tstd %s,24(%s)\n",

65324

- reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

65325

- fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

65326

- asm_fprintf (file, "\tld %s,24(%s)\n",

65327

- reg_names[STATIC_CHAIN_REGNUM], reg_names[1]);

65328

- }

65329

- else

65330

- fprintf (file, "\tbl %s\n", RS6000_MCOUNT);

65331

- }

65332

+ /* Don't do anything, done in output_profile_hook (). */

65333

break;

65334

}

65335

}

65336

@@ -22846,6 +26225,7 @@

65337

|| rs6000_cpu_attr == CPU_POWER4

65338

|| rs6000_cpu_attr == CPU_POWER5

65339

|| rs6000_cpu_attr == CPU_POWER7

65340

+ || rs6000_cpu_attr == CPU_POWER8

65341

|| rs6000_cpu_attr == CPU_CELL)

65342

&& recog_memoized (dep_insn)

65343

&& (INSN_CODE (dep_insn) >= 0))

65344

@@ -23128,7 +26508,8 @@

65345

if (rs6000_cpu_attr == CPU_CELL)

65346

return get_attr_cell_micro (insn) == CELL_MICRO_ALWAYS;

65347

65348

- if (rs6000_sched_groups)

65349

+ if (rs6000_sched_groups

65350

+ && (rs6000_cpu == PROCESSOR_POWER4 || rs6000_cpu == PROCESSOR_POWER5))

65351

{

65352

enum attr_type type = get_attr_type (insn);

65353

if (type == TYPE_LOAD_EXT_U

65354

@@ -23153,7 +26534,8 @@

65355

|| GET_CODE (PATTERN (insn)) == CLOBBER)

65356

return false;

65357

65358

- if (rs6000_sched_groups)

65359

+ if (rs6000_sched_groups

65360

+ && (rs6000_cpu == PROCESSOR_POWER4 || rs6000_cpu == PROCESSOR_POWER5))

65361

{

65362

enum attr_type type = get_attr_type (insn);

65363

if (type == TYPE_LOAD_U || type == TYPE_STORE_U

65364

@@ -23432,6 +26814,8 @@

65365

case CPU_POWER6:

65366

case CPU_POWER7:

65367

return 5;

65368

+ case CPU_POWER8:

65369

+ return 7;

65370

default:

65371

return 1;

65372

}

65373

@@ -24059,6 +27443,39 @@

65374

break;

65375

}

65376

break;

65377

+ case PROCESSOR_POWER8:

65378

+ type = get_attr_type (insn);

65379

+

65380

+ switch (type)

65381

+ {

65382

+ case TYPE_CR_LOGICAL:

65383

+ case TYPE_DELAYED_CR:

65384

+ case TYPE_MFCR:

65385

+ case TYPE_MFCRF:

65386

+ case TYPE_MTCR:

65387

+ case TYPE_COMPARE:

65388

+ case TYPE_DELAYED_COMPARE:

65389

+ case TYPE_VAR_DELAYED_COMPARE:

65390

+ case TYPE_IMUL_COMPARE:

65391

+ case TYPE_LMUL_COMPARE:

65392

+ case TYPE_SYNC:

65393

+ case TYPE_ISYNC:

65394

+ case TYPE_LOAD_L:

65395

+ case TYPE_STORE_C:

65396

+ case TYPE_LOAD_U:

65397

+ case TYPE_LOAD_UX:

65398

+ case TYPE_LOAD_EXT:

65399

+ case TYPE_LOAD_EXT_U:

65400

+ case TYPE_LOAD_EXT_UX:

65401

+ case TYPE_STORE_UX:

65402

+ case TYPE_VECSTORE:

65403

+ case TYPE_MFJMPR:

65404

+ case TYPE_MTJMPR:

65405

+ return true;

65406

+ default:

65407

+ break;

65408

+ }

65409

+ break;

65410

default:

65411

break;

65412

}

65413

@@ -24137,6 +27554,25 @@

65414

break;

65415

}

65416

break;

65417

+ case PROCESSOR_POWER8:

65418

+ type = get_attr_type (insn);

65419

+

65420

+ switch (type)

65421

+ {

65422

+ case TYPE_MFCR:

65423

+ case TYPE_MTCR:

65424

+ case TYPE_ISYNC:

65425

+ case TYPE_SYNC:

65426

+ case TYPE_LOAD_L:

65427

+ case TYPE_STORE_C:

65428

+ case TYPE_LOAD_EXT_U:

65429

+ case TYPE_LOAD_EXT_UX:

65430

+ case TYPE_STORE_UX:

65431

+ return true;

65432

+ default:

65433

+ break;

65434

+ }

65435

+ break;

65436

default:

65437

break;

65438

}

65439

@@ -24226,8 +27662,9 @@

65440

if (can_issue_more && !is_branch_slot_insn (next_insn))

65441

can_issue_more--;

65442

65443

- /* Power6 and Power7 have special group ending nop. */

65444

- if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7)

65445

+ /* Do we have a special group ending nop? */

65446

+ if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7

65447

+ || rs6000_cpu_attr == CPU_POWER8)

65448

{

65449

nop = gen_group_ending_nop ();

65450

emit_insn_before (nop, next_insn);

65451

@@ -24598,6 +28035,11 @@

65452

ret = (TARGET_32BIT) ? 12 : 24;

65453

break;

65454

65455

+ case ABI_ELFv2:

65456

+ gcc_assert (!TARGET_32BIT);

65457

+ ret = 32;

65458

+ break;

65459

+

65460

case ABI_DARWIN:

65461

case ABI_V4:

65462

ret = (TARGET_32BIT) ? 40 : 48;

65463

@@ -24653,6 +28095,7 @@

65464

break;

65465

65466

/* Under V.4/eabi/darwin, __trampoline_setup does the real work. */

65467

+ case ABI_ELFv2:

65468

case ABI_DARWIN:

65469

case ABI_V4:

65470

emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__trampoline_setup"),

65471

@@ -24743,6 +28186,9 @@

65472

unsigned_p = TYPE_UNSIGNED (type);

65473

switch (mode)

65474

{

65475

+ case TImode:

65476

+ result = (unsigned_p ? unsigned_V1TI_type_node : V1TI_type_node);

65477

+ break;

65478

case DImode:

65479

result = (unsigned_p ? unsigned_V2DI_type_node : V2DI_type_node);

65480

break;

65481

@@ -24947,7 +28393,7 @@

65482

static void

65483

rs6000_elf_output_toc_section_asm_op (const void *data ATTRIBUTE_UNUSED)

65484

{

65485

- if (DEFAULT_ABI == ABI_AIX

65486

+ if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

65487

&& TARGET_MINIMAL_TOC

65488

&& !TARGET_RELOCATABLE)

65489

{

65490

@@ -24968,7 +28414,8 @@

65491

else

65492

fprintf (asm_out_file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP);

65493

}

65494

- else if (DEFAULT_ABI == ABI_AIX && !TARGET_RELOCATABLE)

65495

+ else if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

65496

+ && !TARGET_RELOCATABLE)

65497

fprintf (asm_out_file, "%s\n", TOC_SECTION_ASM_OP);

65498

else

65499

{

65500

@@ -25518,7 +28965,7 @@

65501

{

65502

if (flag_pic)

65503

return 3;

65504

- else if (DEFAULT_ABI == ABI_AIX)

65505

+ else if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

65506

return 2;

65507

else

65508

return 0;

65509

@@ -25594,7 +29041,7 @@

65510

void

65511

rs6000_elf_declare_function_name (FILE *file, const char *name, tree decl)

65512

{

65513

- if (TARGET_64BIT)

65514

+ if (TARGET_64BIT && DEFAULT_ABI != ABI_ELFv2)

65515

{

65516

fputs ("\t.section\t\".opd\",\"aw\"\n\t.align 3\n", file);

65517

ASM_OUTPUT_LABEL (file, name);

65518

@@ -25660,8 +29107,7 @@

65519

fprintf (file, "%s:\n", desc_name);

65520

fprintf (file, "\t.long %s\n", orig_name);

65521

fputs ("\t.long _GLOBAL_OFFSET_TABLE_\n", file);

65522

- if (DEFAULT_ABI == ABI_AIX)

65523

- fputs ("\t.long 0\n", file);

65524

+ fputs ("\t.long 0\n", file);

65525

fprintf (file, "\t.previous\n");

65526

}

65527

ASM_OUTPUT_LABEL (file, name);

65528

@@ -25690,7 +29136,7 @@

65529

}

65530

#endif

65531

#if defined (POWERPC_LINUX) || defined (POWERPC_FREEBSD)

65532

- if (TARGET_32BIT)

65533

+ if (TARGET_32BIT || DEFAULT_ABI == ABI_ELFv2)

65534

file_end_indicate_exec_stack ();

65535

#endif

65536

}

65537

@@ -25829,10 +29275,23 @@

65538

name, suffix[smclass], flags & SECTION_ENTSIZE);

65539

}

65540

65541

+#define IN_NAMED_SECTION(DECL) \

65542

+ ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \

65543

+ && DECL_SECTION_NAME (DECL) != NULL_TREE)

65544

+

65545

static section *

65546

rs6000_xcoff_select_section (tree decl, int reloc,

65547

- unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)

65548

+ unsigned HOST_WIDE_INT align)

65549

{

65550

+ /* Place variables with alignment stricter than BIGGEST_ALIGNMENT into

65551

+ named section. */

65552

+ if (align > BIGGEST_ALIGNMENT)

65553

+ {

65554

+ resolve_unique_section (decl, reloc, true);

65555

+ if (IN_NAMED_SECTION (decl))

65556

+ return get_named_section (decl, NULL, reloc);

65557

+ }

65558

+

65559

if (decl_readonly_section (decl, reloc))

65560

{

65561

if (TREE_PUBLIC (decl))

65562

@@ -25870,10 +29329,12 @@

65563

{

65564

const char *name;

65565

65566

- /* Use select_section for private and uninitialized data. */

65567

+ /* Use select_section for private data and uninitialized data with

65568

+ alignment <= BIGGEST_ALIGNMENT. */

65569

if (!TREE_PUBLIC (decl)

65570

|| DECL_COMMON (decl)

65571

- || DECL_INITIAL (decl) == NULL_TREE

65572

+ || (DECL_INITIAL (decl) == NULL_TREE

65573

+ && DECL_ALIGN (decl) <= BIGGEST_ALIGNMENT)

65574

|| DECL_INITIAL (decl) == error_mark_node

65575

|| (flag_zero_initialized_in_bss

65576

&& initializer_zerop (DECL_INITIAL (decl))))

65577

@@ -26430,7 +29891,8 @@

65578

/* For those processors that have slow LR/CTR moves, make them more

65579

expensive than memory in order to bias spills to memory .*/

65580

else if ((rs6000_cpu == PROCESSOR_POWER6

65581

- || rs6000_cpu == PROCESSOR_POWER7)

65582

+ || rs6000_cpu == PROCESSOR_POWER7

65583

+ || rs6000_cpu == PROCESSOR_POWER8)

65584

&& reg_classes_intersect_p (rclass, LINK_OR_CTR_REGS))

65585

ret = 6 * hard_regno_nregs[0][mode];

65586

65587

@@ -26440,7 +29902,7 @@

65588

}

65589

65590

/* If we have VSX, we can easily move between FPR or Altivec registers. */

65591

- else if (VECTOR_UNIT_VSX_P (mode)

65592

+ else if (VECTOR_MEM_VSX_P (mode)

65593

&& reg_classes_intersect_p (to, VSX_REGS)

65594

&& reg_classes_intersect_p (from, VSX_REGS))

65595

ret = 2 * hard_regno_nregs[32][mode];

65596

@@ -26481,7 +29943,8 @@

65597

65598

if (reg_classes_intersect_p (rclass, GENERAL_REGS))

65599

ret = 4 * hard_regno_nregs[0][mode];

65600

- else if (reg_classes_intersect_p (rclass, FLOAT_REGS))

65601

+ else if ((reg_classes_intersect_p (rclass, FLOAT_REGS)

65602

+ || reg_classes_intersect_p (rclass, VSX_REGS)))

65603

ret = 4 * hard_regno_nregs[32][mode];

65604

else if (reg_classes_intersect_p (rclass, ALTIVEC_REGS))

65605

ret = 4 * hard_regno_nregs[FIRST_ALTIVEC_REGNO][mode];

65606

@@ -26643,54 +30106,26 @@

65607

emit_insn (gen_rtx_SET (VOIDmode, dst, r));

65608

}

65609

65610

-/* Newton-Raphson approximation of floating point divide with just 2 passes

65611

- (either single precision floating point, or newer machines with higher

65612

- accuracy estimates). Support both scalar and vector divide. Assumes no

65613

- trapping math and finite arguments. */

65614

+/* Newton-Raphson approximation of floating point divide DST = N/D. If NOTE_P,

65615

+ add a reg_note saying that this was a division. Support both scalar and

65616

+ vector divide. Assumes no trapping math and finite arguments. */

65617

65618

-static void

65619

-rs6000_emit_swdiv_high_precision (rtx dst, rtx n, rtx d)

65620

+void

65621

+rs6000_emit_swdiv (rtx dst, rtx n, rtx d, bool note_p)

65622

{

65623

enum machine_mode mode = GET_MODE (dst);

65624

- rtx x0, e0, e1, y1, u0, v0;

65625

- enum insn_code code = optab_handler (smul_optab, mode);

65626

- insn_gen_fn gen_mul = GEN_FCN (code);

65627

- rtx one = rs6000_load_constant_and_splat (mode, dconst1);

65628

+ rtx one, x0, e0, x1, xprev, eprev, xnext, enext, u, v;

65629

+ int i;

65630

65631

- gcc_assert (code != CODE_FOR_nothing);

65632

+ /* Low precision estimates guarantee 5 bits of accuracy. High

65633

+ precision estimates guarantee 14 bits of accuracy. SFmode

65634

+ requires 23 bits of accuracy. DFmode requires 52 bits of

65635

+ accuracy. Each pass at least doubles the accuracy, leading

65636

+ to the following. */

65637

+ int passes = (TARGET_RECIP_PRECISION) ? 1 : 3;

65638

+ if (mode == DFmode || mode == V2DFmode)

65639

+ passes++;

65640

65641

- /* x0 = 1./d estimate */

65642

- x0 = gen_reg_rtx (mode);

65643

- emit_insn (gen_rtx_SET (VOIDmode, x0,

65644

- gen_rtx_UNSPEC (mode, gen_rtvec (1, d),

65645

- UNSPEC_FRES)));

65646

-

65647

- e0 = gen_reg_rtx (mode);

65648

- rs6000_emit_nmsub (e0, d, x0, one); /* e0 = 1. - (d * x0) */

65649

-

65650

- e1 = gen_reg_rtx (mode);

65651

- rs6000_emit_madd (e1, e0, e0, e0); /* e1 = (e0 * e0) + e0 */

65652

-

65653

- y1 = gen_reg_rtx (mode);

65654

- rs6000_emit_madd (y1, e1, x0, x0); /* y1 = (e1 * x0) + x0 */

65655

-

65656

- u0 = gen_reg_rtx (mode);

65657

- emit_insn (gen_mul (u0, n, y1)); /* u0 = n * y1 */

65658

-

65659

- v0 = gen_reg_rtx (mode);

65660

- rs6000_emit_nmsub (v0, d, u0, n); /* v0 = n - (d * u0) */

65661

-

65662

- rs6000_emit_madd (dst, v0, y1, u0); /* dst = (v0 * y1) + u0 */

65663

-}

65664

-

65665

-/* Newton-Raphson approximation of floating point divide that has a low

65666

- precision estimate. Assumes no trapping math and finite arguments. */

65667

-

65668

-static void

65669

-rs6000_emit_swdiv_low_precision (rtx dst, rtx n, rtx d)

65670

-{

65671

- enum machine_mode mode = GET_MODE (dst);

65672

- rtx x0, e0, e1, e2, y1, y2, y3, u0, v0, one;

65673

enum insn_code code = optab_handler (smul_optab, mode);

65674

insn_gen_fn gen_mul = GEN_FCN (code);

65675

65676

@@ -26704,47 +30139,45 @@

65677

gen_rtx_UNSPEC (mode, gen_rtvec (1, d),

65678

UNSPEC_FRES)));

65679

65680

- e0 = gen_reg_rtx (mode);

65681

- rs6000_emit_nmsub (e0, d, x0, one); /* e0 = 1. - d * x0 */

65682

+ /* Each iteration but the last calculates x_(i+1) = x_i * (2 - d * x_i). */

65683

+ if (passes > 1) {

65684

65685

- y1 = gen_reg_rtx (mode);

65686

- rs6000_emit_madd (y1, e0, x0, x0); /* y1 = x0 + e0 * x0 */

65687

+ /* e0 = 1. - d * x0 */

65688

+ e0 = gen_reg_rtx (mode);

65689

+ rs6000_emit_nmsub (e0, d, x0, one);

65690

65691

- e1 = gen_reg_rtx (mode);

65692

- emit_insn (gen_mul (e1, e0, e0)); /* e1 = e0 * e0 */

65693

+ /* x1 = x0 + e0 * x0 */

65694

+ x1 = gen_reg_rtx (mode);

65695

+ rs6000_emit_madd (x1, e0, x0, x0);

65696

65697

- y2 = gen_reg_rtx (mode);

65698

- rs6000_emit_madd (y2, e1, y1, y1); /* y2 = y1 + e1 * y1 */

65699

+ for (i = 0, xprev = x1, eprev = e0; i < passes - 2;

65700

+ ++i, xprev = xnext, eprev = enext) {

65701

+

65702

+ /* enext = eprev * eprev */

65703

+ enext = gen_reg_rtx (mode);

65704

+ emit_insn (gen_mul (enext, eprev, eprev));

65705

65706

- e2 = gen_reg_rtx (mode);

65707

- emit_insn (gen_mul (e2, e1, e1)); /* e2 = e1 * e1 */

65708

+ /* xnext = xprev + enext * xprev */

65709

+ xnext = gen_reg_rtx (mode);

65710

+ rs6000_emit_madd (xnext, enext, xprev, xprev);

65711

+ }

65712

65713

- y3 = gen_reg_rtx (mode);

65714

- rs6000_emit_madd (y3, e2, y2, y2); /* y3 = y2 + e2 * y2 */

65715

+ } else

65716

+ xprev = x0;

65717

65718

- u0 = gen_reg_rtx (mode);

65719

- emit_insn (gen_mul (u0, n, y3)); /* u0 = n * y3 */

65720

+ /* The last iteration calculates x_(i+1) = n * x_i * (2 - d * x_i). */

65721

65722

- v0 = gen_reg_rtx (mode);

65723

- rs6000_emit_nmsub (v0, d, u0, n); /* v0 = n - d * u0 */

65724

+ /* u = n * xprev */

65725

+ u = gen_reg_rtx (mode);

65726

+ emit_insn (gen_mul (u, n, xprev));

65727

65728

- rs6000_emit_madd (dst, v0, y3, u0); /* dst = u0 + v0 * y3 */

65729

-}

65730

+ /* v = n - (d * u) */

65731

+ v = gen_reg_rtx (mode);

65732

+ rs6000_emit_nmsub (v, d, u, n);

65733

65734

-/* Newton-Raphson approximation of floating point divide DST = N/D. If NOTE_P,

65735

- add a reg_note saying that this was a division. Support both scalar and

65736

- vector divide. Assumes no trapping math and finite arguments. */

65737

+ /* dst = (v * xprev) + u */

65738

+ rs6000_emit_madd (dst, v, xprev, u);

65739

65740

-void

65741

-rs6000_emit_swdiv (rtx dst, rtx n, rtx d, bool note_p)

65742

-{

65743

- enum machine_mode mode = GET_MODE (dst);

65744

-

65745

- if (RS6000_RECIP_HIGH_PRECISION_P (mode))

65746

- rs6000_emit_swdiv_high_precision (dst, n, d);

65747

- else

65748

- rs6000_emit_swdiv_low_precision (dst, n, d);

65749

-

65750

if (note_p)

65751

add_reg_note (get_last_insn (), REG_EQUAL, gen_rtx_DIV (mode, n, d));

65752

}

65753

@@ -26758,7 +30191,16 @@

65754

enum machine_mode mode = GET_MODE (src);

65755

rtx x0 = gen_reg_rtx (mode);

65756

rtx y = gen_reg_rtx (mode);

65757

- int passes = (TARGET_RECIP_PRECISION) ? 2 : 3;

65758

+

65759

+ /* Low precision estimates guarantee 5 bits of accuracy. High

65760

+ precision estimates guarantee 14 bits of accuracy. SFmode

65761

+ requires 23 bits of accuracy. DFmode requires 52 bits of

65762

+ accuracy. Each pass at least doubles the accuracy, leading

65763

+ to the following. */

65764

+ int passes = (TARGET_RECIP_PRECISION) ? 1 : 3;

65765

+ if (mode == DFmode || mode == V2DFmode)

65766

+ passes++;

65767

+

65768

REAL_VALUE_TYPE dconst3_2;

65769

int i;

65770

rtx halfthree;

65771

@@ -26920,6 +30362,136 @@

65772

}

65773

}

65774

65775

+/* Expand an Altivec constant permutation for little endian mode.

65776

+ There are two issues: First, the two input operands must be

65777

+ swapped so that together they form a double-wide array in LE

65778

+ order. Second, the vperm instruction has surprising behavior

65779

+ in LE mode: it interprets the elements of the source vectors

65780

+ in BE mode ("left to right") and interprets the elements of

65781

+ the destination vector in LE mode ("right to left"). To

65782

+ correct for this, we must subtract each element of the permute

65783

+ control vector from 31.

65784

+

65785

+ For example, suppose we want to concatenate vr10 = {0, 1, 2, 3}

65786

+ with vr11 = {4, 5, 6, 7} and extract {0, 2, 4, 6} using a vperm.

65787

+ We place {0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27} in vr12 to

65788

+ serve as the permute control vector. Then, in BE mode,

65789

+

65790

+ vperm 9,10,11,12

65791

+

65792

+ places the desired result in vr9. However, in LE mode the

65793

+ vector contents will be

65794

+

65795

+ vr10 = 00000003 00000002 00000001 00000000

65796

+ vr11 = 00000007 00000006 00000005 00000004

65797

+

65798

+ The result of the vperm using the same permute control vector is

65799

+

65800

+ vr9 = 05000000 07000000 01000000 03000000

65801

+

65802

+ That is, the leftmost 4 bytes of vr10 are interpreted as the

65803

+ source for the rightmost 4 bytes of vr9, and so on.

65804

+

65805

+ If we change the permute control vector to

65806

+

65807

+ vr12 = {31,20,29,28,23,22,21,20,15,14,13,12,7,6,5,4}

65808

+

65809

+ and issue

65810

+

65811

+ vperm 9,11,10,12

65812

+

65813

+ we get the desired

65814

+

65815

+ vr9 = 00000006 00000004 00000002 00000000. */

65816

+

65817

+void

65818

+altivec_expand_vec_perm_const_le (rtx operands[4])

65819

+{

65820

+ unsigned int i;

65821

+ rtx perm[16];

65822

+ rtx constv, unspec;

65823

+ rtx target = operands[0];

65824

+ rtx op0 = operands[1];

65825

+ rtx op1 = operands[2];

65826

+ rtx sel = operands[3];

65827

+

65828

+ /* Unpack and adjust the constant selector. */

65829

+ for (i = 0; i < 16; ++i)

65830

+ {

65831

+ rtx e = XVECEXP (sel, 0, i);

65832

+ unsigned int elt = 31 - (INTVAL (e) & 31);

65833

+ perm[i] = GEN_INT (elt);

65834

+ }

65835

+

65836

+ /* Expand to a permute, swapping the inputs and using the

65837

+ adjusted selector. */

65838

+ if (!REG_P (op0))

65839

+ op0 = force_reg (V16QImode, op0);

65840

+ if (!REG_P (op1))

65841

+ op1 = force_reg (V16QImode, op1);

65842

+

65843

+ constv = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm));

65844

+ constv = force_reg (V16QImode, constv);

65845

+ unspec = gen_rtx_UNSPEC (V16QImode, gen_rtvec (3, op1, op0, constv),

65846

+ UNSPEC_VPERM);

65847

+ if (!REG_P (target))

65848

+ {

65849

+ rtx tmp = gen_reg_rtx (V16QImode);

65850

+ emit_move_insn (tmp, unspec);

65851

+ unspec = tmp;

65852

+ }

65853

+

65854

+ emit_move_insn (target, unspec);

65855

+}

65856

+

65857

+/* Similarly to altivec_expand_vec_perm_const_le, we must adjust the

65858

+ permute control vector. But here it's not a constant, so we must

65859

+ generate a vector NAND or NOR to do the adjustment. */

65860

+

65861

+void

65862

+altivec_expand_vec_perm_le (rtx operands[4])

65863

+{

65864

+ rtx notx, iorx, unspec;

65865

+ rtx target = operands[0];

65866

+ rtx op0 = operands[1];

65867

+ rtx op1 = operands[2];

65868

+ rtx sel = operands[3];

65869

+ rtx tmp = target;

65870

+ rtx norreg = gen_reg_rtx (V16QImode);

65871

+ enum machine_mode mode = GET_MODE (target);

65872

+

65873

+ /* Get everything in regs so the pattern matches. */

65874

+ if (!REG_P (op0))

65875

+ op0 = force_reg (mode, op0);

65876

+ if (!REG_P (op1))

65877

+ op1 = force_reg (mode, op1);

65878

+ if (!REG_P (sel))

65879

+ sel = force_reg (V16QImode, sel);

65880

+ if (!REG_P (target))

65881

+ tmp = gen_reg_rtx (mode);

65882

+

65883

+ /* Invert the selector with a VNAND if available, else a VNOR.

65884

+ The VNAND is preferred for future fusion opportunities. */

65885

+ notx = gen_rtx_NOT (V16QImode, sel);

65886

+ iorx = (TARGET_P8_VECTOR

65887

+ ? gen_rtx_IOR (V16QImode, notx, notx)

65888

+ : gen_rtx_AND (V16QImode, notx, notx));

65889

+ emit_insn (gen_rtx_SET (VOIDmode, norreg, iorx));

65890

+

65891

+ /* Permute with operands reversed and adjusted selector. */

65892

+ unspec = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op0, norreg),

65893

+ UNSPEC_VPERM);

65894

+

65895

+ /* Copy into target, possibly by way of a register. */

65896

+ if (!REG_P (target))

65897

+ {

65898

+ emit_move_insn (tmp, unspec);

65899

+ unspec = tmp;

65900

+ }

65901

+

65902

+ emit_move_insn (target, unspec);

65903

+}

65904

+

65905

/* Expand an Altivec constant permutation. Return true if we match

65906

an efficient implementation; false to fall back to VPERM. */

65907

65908

@@ -26927,26 +30499,43 @@

65909

altivec_expand_vec_perm_const (rtx operands[4])

65910

{

65911

struct altivec_perm_insn {

65912

+ HOST_WIDE_INT mask;

65913

enum insn_code impl;

65914

unsigned char perm[16];

65915

};

65916

static const struct altivec_perm_insn patterns[] = {

65917

- { CODE_FOR_altivec_vpkuhum,

65918

+ { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuhum_direct,

65919

{ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 } },

65920

- { CODE_FOR_altivec_vpkuwum,

65921

+ { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuwum_direct,

65922

{ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 } },

65923

- { CODE_FOR_altivec_vmrghb,

65924

+ { OPTION_MASK_ALTIVEC,

65925

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghb_direct

65926

+ : CODE_FOR_altivec_vmrglb_direct),

65927

{ 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23 } },

65928

- { CODE_FOR_altivec_vmrghh,

65929

+ { OPTION_MASK_ALTIVEC,

65930

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghh_direct

65931

+ : CODE_FOR_altivec_vmrglh_direct),

65932

{ 0, 1, 16, 17, 2, 3, 18, 19, 4, 5, 20, 21, 6, 7, 22, 23 } },

65933

- { CODE_FOR_altivec_vmrghw,

65934

+ { OPTION_MASK_ALTIVEC,

65935

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghw_direct

65936

+ : CODE_FOR_altivec_vmrglw_direct),

65937

{ 0, 1, 2, 3, 16, 17, 18, 19, 4, 5, 6, 7, 20, 21, 22, 23 } },

65938

- { CODE_FOR_altivec_vmrglb,

65939

+ { OPTION_MASK_ALTIVEC,

65940

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglb_direct

65941

+ : CODE_FOR_altivec_vmrghb_direct),

65942

{ 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31 } },

65943

- { CODE_FOR_altivec_vmrglh,

65944

+ { OPTION_MASK_ALTIVEC,

65945

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglh_direct

65946

+ : CODE_FOR_altivec_vmrghh_direct),

65947

{ 8, 9, 24, 25, 10, 11, 26, 27, 12, 13, 28, 29, 14, 15, 30, 31 } },

65948

- { CODE_FOR_altivec_vmrglw,

65949

- { 8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31 } }

65950

+ { OPTION_MASK_ALTIVEC,

65951

+ (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglw_direct

65952

+ : CODE_FOR_altivec_vmrghw_direct),

65953

+ { 8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31 } },

65954

+ { OPTION_MASK_P8_VECTOR, CODE_FOR_p8_vmrgew,

65955

+ { 0, 1, 2, 3, 16, 17, 18, 19, 8, 9, 10, 11, 24, 25, 26, 27 } },

65956

+ { OPTION_MASK_P8_VECTOR, CODE_FOR_p8_vmrgow,

65957

+ { 4, 5, 6, 7, 20, 21, 22, 23, 12, 13, 14, 15, 28, 29, 30, 31 } }

65958

};

65959

65960

unsigned int i, j, elt, which;

65961

@@ -27003,7 +30592,9 @@

65962

break;

65963

if (i == 16)

65964

{

65965

- emit_insn (gen_altivec_vspltb (target, op0, GEN_INT (elt)));

65966

+ if (!BYTES_BIG_ENDIAN)

65967

+ elt = 15 - elt;

65968

+ emit_insn (gen_altivec_vspltb_direct (target, op0, GEN_INT (elt)));

65969

return true;

65970

}

65971

65972

@@ -27014,9 +30605,10 @@

65973

break;

65974

if (i == 16)

65975

{

65976

+ int field = BYTES_BIG_ENDIAN ? elt / 2 : 7 - elt / 2;

65977

x = gen_reg_rtx (V8HImode);

65978

- emit_insn (gen_altivec_vsplth (x, gen_lowpart (V8HImode, op0),

65979

- GEN_INT (elt / 2)));

65980

+ emit_insn (gen_altivec_vsplth_direct (x, gen_lowpart (V8HImode, op0),

65981

+ GEN_INT (field)));

65982

emit_move_insn (target, gen_lowpart (V16QImode, x));

65983

return true;

65984

}

65985

@@ -27032,9 +30624,10 @@

65986

break;

65987

if (i == 16)

65988

{

65989

+ int field = BYTES_BIG_ENDIAN ? elt / 4 : 3 - elt / 4;

65990

x = gen_reg_rtx (V4SImode);

65991

- emit_insn (gen_altivec_vspltw (x, gen_lowpart (V4SImode, op0),

65992

- GEN_INT (elt / 4)));

65993

+ emit_insn (gen_altivec_vspltw_direct (x, gen_lowpart (V4SImode, op0),

65994

+ GEN_INT (field)));

65995

emit_move_insn (target, gen_lowpart (V16QImode, x));

65996

return true;

65997

}

65998

@@ -27046,6 +30639,9 @@

65999

{

66000

bool swapped;

66001

66002

+ if ((patterns[j].mask & rs6000_isa_flags) == 0)

66003

+ continue;

66004

+

66005

elt = patterns[j].perm[0];

66006

if (perm[0] == elt)

66007

swapped = false;

66008

@@ -27069,7 +30665,30 @@

66009

enum machine_mode omode = insn_data[icode].operand[0].mode;

66010

enum machine_mode imode = insn_data[icode].operand[1].mode;

66011

66012

- if (swapped)

66013

+ /* For little-endian, don't use vpkuwum and vpkuhum if the

66014

+ underlying vector type is not V4SI and V8HI, respectively.

66015

+ For example, using vpkuwum with a V8HI picks up the even

66016

+ halfwords (BE numbering) when the even halfwords (LE

66017

+ numbering) are what we need. */

66018

+ if (!BYTES_BIG_ENDIAN

66019

+ && icode == CODE_FOR_altivec_vpkuwum_direct

66020

+ && ((GET_CODE (op0) == REG

66021

+ && GET_MODE (op0) != V4SImode)

66022

+ || (GET_CODE (op0) == SUBREG

66023

+ && GET_MODE (XEXP (op0, 0)) != V4SImode)))

66024

+ continue;

66025

+ if (!BYTES_BIG_ENDIAN

66026

+ && icode == CODE_FOR_altivec_vpkuhum_direct

66027

+ && ((GET_CODE (op0) == REG

66028

+ && GET_MODE (op0) != V8HImode)

66029

+ || (GET_CODE (op0) == SUBREG

66030

+ && GET_MODE (XEXP (op0, 0)) != V8HImode)))

66031

+ continue;

66032

+

66033

+ /* For little-endian, the two input operands must be swapped

66034

+ (or swapped back) to ensure proper right-to-left numbering

66035

+ from 0 to 2N-1. */

66036

+ if (swapped ^ !BYTES_BIG_ENDIAN)

66037

x = op0, op0 = op1, op1 = x;

66038

if (imode != V16QImode)

66039

{

66040

@@ -27087,6 +30706,12 @@

66041

}

66042

}

66043

66044

+ if (!BYTES_BIG_ENDIAN)

66045

+ {

66046

+ altivec_expand_vec_perm_const_le (operands);

66047

+ return true;

66048

+ }

66049

+

66050

return false;

66051

}

66052

66053

@@ -27135,7 +30760,6 @@

66054

vmode = GET_MODE (target);

66055

gcc_assert (GET_MODE_NUNITS (vmode) == 2);

66056

dmode = mode_for_vector (GET_MODE_INNER (vmode), 4);

66057

-

66058

x = gen_rtx_VEC_CONCAT (dmode, op0, op1);

66059

v = gen_rtvec (2, GEN_INT (perm0), GEN_INT (perm1));

66060

x = gen_rtx_VEC_SELECT (vmode, x, gen_rtx_PARALLEL (VOIDmode, v));

66061

@@ -27231,7 +30855,7 @@

66062

unsigned i, high, nelt = GET_MODE_NUNITS (vmode);

66063

rtx perm[16];

66064

66065

- high = (highp == BYTES_BIG_ENDIAN ? 0 : nelt / 2);

66066

+ high = (highp ? 0 : nelt / 2);

66067

for (i = 0; i < nelt / 2; i++)

66068

{

66069

perm[i * 2] = GEN_INT (i + high);

66070

@@ -27286,6 +30910,8 @@

66071

{

66072

enum machine_mode mode;

66073

unsigned int regno;

66074

+ enum machine_mode elt_mode;

66075

+ int n_elts;

66076

66077

/* Special handling for structs in darwin64. */

66078

if (TARGET_MACHO

66079

@@ -27305,6 +30931,36 @@

66080

/* Otherwise fall through to standard ABI rules. */

66081

}

66082

66083

+ /* The ELFv2 ABI returns homogeneous VFP aggregates in registers. */

66084

+ if (rs6000_discover_homogeneous_aggregate (TYPE_MODE (valtype), valtype,

66085

+ &elt_mode, &n_elts))

66086

+ {

66087

+ int first_reg, n_regs, i;

66088

+ rtx par;

66089

+

66090

+ if (SCALAR_FLOAT_MODE_P (elt_mode))

66091

+ {

66092

+ /* _Decimal128 must use even/odd register pairs. */

66093

+ first_reg = (elt_mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN;

66094

+ n_regs = (GET_MODE_SIZE (elt_mode) + 7) >> 3;

66095

+ }

66096

+ else

66097

+ {

66098

+ first_reg = ALTIVEC_ARG_RETURN;

66099

+ n_regs = 1;

66100

+ }

66101

+

66102

+ par = gen_rtx_PARALLEL (TYPE_MODE (valtype), rtvec_alloc (n_elts));

66103

+ for (i = 0; i < n_elts; i++)

66104

+ {

66105

+ rtx r = gen_rtx_REG (elt_mode, first_reg + i * n_regs);

66106

+ rtx off = GEN_INT (i * GET_MODE_SIZE (elt_mode));

66107

+ XVECEXP (par, 0, i) = gen_rtx_EXPR_LIST (VOIDmode, r, off);

66108

+ }

66109

+

66110

+ return par;

66111

+ }

66112

+

66113

if (TARGET_32BIT && TARGET_POWERPC64 && TYPE_MODE (valtype) == DImode)

66114

{

66115

/* Long long return value need be split in -mpowerpc64, 32bit ABI. */

66116

@@ -27417,6 +31073,13 @@

66117

}

66118

66119

66120

+/* Return true if we use LRA instead of reload pass. */

66121

+static bool

66122

+rs6000_lra_p (void)

66123

+{

66124

+ return rs6000_lra_flag;

66125

+}

66126

+

66127

/* Given FROM and TO register numbers, say whether this elimination is allowed.

66128

Frame pointer elimination is automatically handled.

66129

66130

@@ -27679,22 +31342,33 @@

66131

{

66132

{ "altivec", OPTION_MASK_ALTIVEC, false, true },

66133

{ "cmpb", OPTION_MASK_CMPB, false, true },

66134

+ { "crypto", OPTION_MASK_CRYPTO, false, true },

66135

+ { "direct-move", OPTION_MASK_DIRECT_MOVE, false, true },

66136

{ "dlmzb", OPTION_MASK_DLMZB, false, true },

66137

{ "fprnd", OPTION_MASK_FPRND, false, true },

66138

{ "hard-dfp", OPTION_MASK_DFP, false, true },

66139

+ { "htm", OPTION_MASK_HTM, false, true },

66140

{ "isel", OPTION_MASK_ISEL, false, true },

66141

{ "mfcrf", OPTION_MASK_MFCRF, false, true },

66142

{ "mfpgpr", OPTION_MASK_MFPGPR, false, true },

66143

{ "mulhw", OPTION_MASK_MULHW, false, true },

66144

{ "multiple", OPTION_MASK_MULTIPLE, false, true },

66145

- { "update", OPTION_MASK_NO_UPDATE, true , true },

66146

{ "popcntb", OPTION_MASK_POPCNTB, false, true },

66147

{ "popcntd", OPTION_MASK_POPCNTD, false, true },

66148

+ { "power8-fusion", OPTION_MASK_P8_FUSION, false, true },

66149

+ { "power8-fusion-sign", OPTION_MASK_P8_FUSION_SIGN, false, true },

66150

+ { "power8-vector", OPTION_MASK_P8_VECTOR, false, true },

66151

{ "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true },

66152

{ "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true },

66153

+ { "quad-memory", OPTION_MASK_QUAD_MEMORY, false, true },

66154

+ { "quad-memory-atomic", OPTION_MASK_QUAD_MEMORY_ATOMIC, false, true },

66155

{ "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true },

66156

{ "string", OPTION_MASK_STRING, false, true },

66157

+ { "update", OPTION_MASK_NO_UPDATE, true , true },

66158

+ { "upper-regs-df", OPTION_MASK_UPPER_REGS_DF, false, false },

66159

+ { "upper-regs-sf", OPTION_MASK_UPPER_REGS_SF, false, false },

66160

{ "vsx", OPTION_MASK_VSX, false, true },

66161

+ { "vsx-timode", OPTION_MASK_VSX_TIMODE, false, true },

66162

#ifdef OPTION_MASK_64BIT

66163

#if TARGET_AIX_OS

66164

{ "aix64", OPTION_MASK_64BIT, false, false },

66165

@@ -27734,6 +31408,11 @@

66166

{ "frsqrtes", RS6000_BTM_FRSQRTES, false, false },

66167

{ "popcntd", RS6000_BTM_POPCNTD, false, false },

66168

{ "cell", RS6000_BTM_CELL, false, false },

66169

+ { "power8-vector", RS6000_BTM_P8_VECTOR, false, false },

66170

+ { "crypto", RS6000_BTM_CRYPTO, false, false },

66171

+ { "htm", RS6000_BTM_HTM, false, false },

66172

+ { "hard-dfp", RS6000_BTM_DFP, false, false },

66173

+ { "hard-float", RS6000_BTM_HARD_FLOAT, false, false },

66174

};

66175

66176

/* Option variables that we want to support inside attribute((target)) and

66177

@@ -28250,7 +31929,6 @@

66178

size_t cur_column;

66179

size_t max_column = 76;

66180

const char *comma = "";

66181

- const char *nl = "\n";

66182

66183

if (indent)

66184

start_column += fprintf (file, "%*s", indent, "");

66185

@@ -28281,7 +31959,6 @@

66186

fprintf (stderr, ", \\\n%*s", (int)start_column, "");

66187

cur_column = start_column + len;

66188

comma = "";

66189

- nl = "\n\n";

66190

}

66191

66192

fprintf (file, "%s%s%s%s", comma, prefix, no_str,

66193

@@ -28291,7 +31968,7 @@

66194

}

66195

}

66196

66197

- fputs (nl, file);

66198

+ fputs ("\n", file);

66199

}

66200

66201

/* Helper function to print the current isa options on a line. */

66202

@@ -28467,118 +32144,149 @@

66203

}

66204

66205

66206

-/* A function pointer under AIX is a pointer to a data area whose first word

66207

- contains the actual address of the function, whose second word contains a

66208

- pointer to its TOC, and whose third word contains a value to place in the

66209

- static chain register (r11). Note that if we load the static chain, our

66210

- "trampoline" need not have any executable code. */

66211

66212

+/* Expand code to perform a call under the AIX or ELFv2 ABI. */

66213

+

66214

void

66215

-rs6000_call_indirect_aix (rtx value, rtx func_desc, rtx flag)

66216

+rs6000_call_aix (rtx value, rtx func_desc, rtx flag, rtx cookie)

66217

{

66218

+ rtx toc_reg = gen_rtx_REG (Pmode, TOC_REGNUM);

66219

+ rtx toc_load = NULL_RTX;

66220

+ rtx toc_restore = NULL_RTX;

66221

rtx func_addr;

66222

- rtx toc_reg;

66223

- rtx sc_reg;

66224

- rtx stack_ptr;

66225

- rtx stack_toc_offset;

66226

- rtx stack_toc_mem;

66227

- rtx func_toc_offset;

66228

- rtx func_toc_mem;

66229

- rtx func_sc_offset;

66230

- rtx func_sc_mem;

66231

+ rtx abi_reg = NULL_RTX;

66232

+ rtx call[4];

66233

+ int n_call;

66234

rtx insn;

66235

- rtx (*call_func) (rtx, rtx, rtx, rtx);

66236

- rtx (*call_value_func) (rtx, rtx, rtx, rtx, rtx);

66237

66238

- stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);

66239

- toc_reg = gen_rtx_REG (Pmode, TOC_REGNUM);

66240

+ /* Handle longcall attributes. */

66241

+ if (INTVAL (cookie) & CALL_LONG)

66242

+ func_desc = rs6000_longcall_ref (func_desc);

66243

66244

- /* Load up address of the actual function. */

66245

- func_desc = force_reg (Pmode, func_desc);

66246

- func_addr = gen_reg_rtx (Pmode);

66247

- emit_move_insn (func_addr, gen_rtx_MEM (Pmode, func_desc));

66248

-

66249

- if (TARGET_32BIT)

66250

+ /* Handle indirect calls. */

66251

+ if (GET_CODE (func_desc) != SYMBOL_REF

66252

+ || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (func_desc)))

66253

{

66254

+ /* Save the TOC into its reserved slot before the call,

66255

+ and prepare to restore it after the call. */

66256

+ rtx stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);

66257

+ rtx stack_toc_offset = GEN_INT (RS6000_TOC_SAVE_SLOT);

66258

+ rtx stack_toc_mem = gen_frame_mem (Pmode,

66259

+ gen_rtx_PLUS (Pmode, stack_ptr,

66260

+ stack_toc_offset));

66261

+ toc_restore = gen_rtx_SET (VOIDmode, toc_reg, stack_toc_mem);

66262

66263

- stack_toc_offset = GEN_INT (TOC_SAVE_OFFSET_32BIT);

66264

- func_toc_offset = GEN_INT (AIX_FUNC_DESC_TOC_32BIT);

66265

- func_sc_offset = GEN_INT (AIX_FUNC_DESC_SC_32BIT);

66266

- if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

66267

- {

66268

- call_func = gen_call_indirect_aix32bit;

66269

- call_value_func = gen_call_value_indirect_aix32bit;

66270

- }

66271

+ /* Can we optimize saving the TOC in the prologue or

66272

+ do we need to do it at every call? */

66273

+ if (TARGET_SAVE_TOC_INDIRECT && !cfun->calls_alloca)

66274

+ cfun->machine->save_toc_in_prologue = true;

66275

else

66276

{

66277

- call_func = gen_call_indirect_aix32bit_nor11;

66278

- call_value_func = gen_call_value_indirect_aix32bit_nor11;

66279

+ MEM_VOLATILE_P (stack_toc_mem) = 1;

66280

+ emit_move_insn (stack_toc_mem, toc_reg);

66281

}

66282

- }

66283

- else

66284

- {

66285

- stack_toc_offset = GEN_INT (TOC_SAVE_OFFSET_64BIT);

66286

- func_toc_offset = GEN_INT (AIX_FUNC_DESC_TOC_64BIT);

66287

- func_sc_offset = GEN_INT (AIX_FUNC_DESC_SC_64BIT);

66288

- if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

66289

+

66290

+ if (DEFAULT_ABI == ABI_ELFv2)

66291

{

66292

- call_func = gen_call_indirect_aix64bit;

66293

- call_value_func = gen_call_value_indirect_aix64bit;

66294

+ /* A function pointer in the ELFv2 ABI is just a plain address, but

66295

+ the ABI requires it to be loaded into r12 before the call. */

66296

+ func_addr = gen_rtx_REG (Pmode, 12);

66297

+ emit_move_insn (func_addr, func_desc);

66298

+ abi_reg = func_addr;

66299

}

66300

else

66301

{

66302

- call_func = gen_call_indirect_aix64bit_nor11;

66303

- call_value_func = gen_call_value_indirect_aix64bit_nor11;

66304

- }

66305

- }

66306

+ /* A function pointer under AIX is a pointer to a data area whose

66307

+ first word contains the actual address of the function, whose

66308

+ second word contains a pointer to its TOC, and whose third word

66309

+ contains a value to place in the static chain register (r11).

66310

+ Note that if we load the static chain, our "trampoline" need

66311

+ not have any executable code. */

66312

66313

- /* Reserved spot to store the TOC. */

66314

- stack_toc_mem = gen_frame_mem (Pmode,

66315

- gen_rtx_PLUS (Pmode,

66316

- stack_ptr,

66317

- stack_toc_offset));

66318

+ /* Load up address of the actual function. */

66319

+ func_desc = force_reg (Pmode, func_desc);

66320

+ func_addr = gen_reg_rtx (Pmode);

66321

+ emit_move_insn (func_addr, gen_rtx_MEM (Pmode, func_desc));

66322

66323

- gcc_assert (cfun);

66324

- gcc_assert (cfun->machine);

66325

+ /* Prepare to load the TOC of the called function. Note that the

66326

+ TOC load must happen immediately before the actual call so

66327

+ that unwinding the TOC registers works correctly. See the

66328

+ comment in frob_update_context. */

66329

+ rtx func_toc_offset = GEN_INT (GET_MODE_SIZE (Pmode));

66330

+ rtx func_toc_mem = gen_rtx_MEM (Pmode,

66331

+ gen_rtx_PLUS (Pmode, func_desc,

66332

+ func_toc_offset));

66333

+ toc_load = gen_rtx_USE (VOIDmode, func_toc_mem);

66334

66335

- /* Can we optimize saving the TOC in the prologue or do we need to do it at

66336

- every call? */

66337

- if (TARGET_SAVE_TOC_INDIRECT && !cfun->calls_alloca)

66338

- cfun->machine->save_toc_in_prologue = true;

66339

-

66340

+ /* If we have a static chain, load it up. */

66341

+ if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

66342

+ {

66343

+ rtx sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);

66344

+ rtx func_sc_offset = GEN_INT (2 * GET_MODE_SIZE (Pmode));

66345

+ rtx func_sc_mem = gen_rtx_MEM (Pmode,

66346

+ gen_rtx_PLUS (Pmode, func_desc,

66347

+ func_sc_offset));

66348

+ emit_move_insn (sc_reg, func_sc_mem);

66349

+ abi_reg = sc_reg;

66350

+ }

66351

+ }

66352

+ }

66353

else

66354

{

66355

- MEM_VOLATILE_P (stack_toc_mem) = 1;

66356

- emit_move_insn (stack_toc_mem, toc_reg);

66357

+ /* Direct calls use the TOC: for local calls, the callee will

66358

+ assume the TOC register is set; for non-local calls, the

66359

+ PLT stub needs the TOC register. */

66360

+ abi_reg = toc_reg;

66361

+ func_addr = func_desc;

66362

}

66363

66364

- /* Calculate the address to load the TOC of the called function. We don't

66365

- actually load this until the split after reload. */

66366

- func_toc_mem = gen_rtx_MEM (Pmode,

66367

- gen_rtx_PLUS (Pmode,

66368

- func_desc,

66369

- func_toc_offset));

66370

+ /* Create the call. */

66371

+ call[0] = gen_rtx_CALL (VOIDmode, gen_rtx_MEM (SImode, func_addr), flag);

66372

+ if (value != NULL_RTX)

66373

+ call[0] = gen_rtx_SET (VOIDmode, value, call[0]);

66374

+ n_call = 1;

66375

66376

- /* If we have a static chain, load it up. */

66377

- if (TARGET_POINTERS_TO_NESTED_FUNCTIONS)

66378

- {

66379

- func_sc_mem = gen_rtx_MEM (Pmode,

66380

- gen_rtx_PLUS (Pmode,

66381

- func_desc,

66382

- func_sc_offset));

66383

+ if (toc_load)

66384

+ call[n_call++] = toc_load;

66385

+ if (toc_restore)

66386

+ call[n_call++] = toc_restore;

66387

66388

- sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);

66389

- emit_move_insn (sc_reg, func_sc_mem);

66390

- }

66391

+ call[n_call++] = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, LR_REGNO));

66392

66393

+ insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (n_call, call));

66394

+ insn = emit_call_insn (insn);

66395

+

66396

+ /* Mention all registers defined by the ABI to hold information

66397

+ as uses in CALL_INSN_FUNCTION_USAGE. */

66398

+ if (abi_reg)

66399

+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), abi_reg);

66400

+}

66401

+

66402

+/* Expand code to perform a sibling call under the AIX or ELFv2 ABI. */

66403

+

66404

+void

66405

+rs6000_sibcall_aix (rtx value, rtx func_desc, rtx flag, rtx cookie)

66406

+{

66407

+ rtx call[2];

66408

+ rtx insn;

66409

+

66410

+ gcc_assert (INTVAL (cookie) == 0);

66411

+

66412

/* Create the call. */

66413

- if (value)

66414

- insn = call_value_func (value, func_addr, flag, func_toc_mem,

66415

- stack_toc_mem);

66416

- else

66417

- insn = call_func (func_addr, flag, func_toc_mem, stack_toc_mem);

66418

+ call[0] = gen_rtx_CALL (VOIDmode, gen_rtx_MEM (SImode, func_desc), flag);

66419

+ if (value != NULL_RTX)

66420

+ call[0] = gen_rtx_SET (VOIDmode, value, call[0]);

66421

66422

- emit_call_insn (insn);

66423

+ call[1] = simple_return_rtx;

66424

+

66425

+ insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (2, call));

66426

+ insn = emit_call_insn (insn);

66427

+

66428

+ /* Note use of the TOC register. */

66429

+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), gen_rtx_REG (Pmode, TOC_REGNUM));

66430

+ /* We need to also mark a use of the link register since the function we

66431

+ sibling-call to will use it to return to our caller. */

66432

+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), gen_rtx_REG (Pmode, LR_REGNO));

66433

}

66434

66435

/* Return whether we need to always update the saved TOC pointer when we update

66436

@@ -28679,6 +32387,661 @@

66437

add_to_hard_reg_set (&set->set, Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);

66438

}

66439

66440

+

66441

+/* Helper function for rs6000_split_logical to emit a logical instruction after

66442

+ spliting the operation to single GPR registers.

66443

+

66444

+ DEST is the destination register.

66445

+ OP1 and OP2 are the input source registers.

66446

+ CODE is the base operation (AND, IOR, XOR, NOT).

66447

+ MODE is the machine mode.

66448

+ If COMPLEMENT_FINAL_P is true, wrap the whole operation with NOT.

66449

+ If COMPLEMENT_OP1_P is true, wrap operand1 with NOT.

66450

+ If COMPLEMENT_OP2_P is true, wrap operand2 with NOT.

66451

+ CLOBBER_REG is either NULL or a scratch register of type CC to allow

66452

+ formation of the AND instructions. */

66453

+

66454

+static void

66455

+rs6000_split_logical_inner (rtx dest,

66456

+ rtx op1,

66457

+ rtx op2,

66458

+ enum rtx_code code,

66459

+ enum machine_mode mode,

66460

+ bool complement_final_p,

66461

+ bool complement_op1_p,

66462

+ bool complement_op2_p,

66463

+ rtx clobber_reg)

66464

+{

66465

+ rtx bool_rtx;

66466

+ rtx set_rtx;

66467

+

66468

+ /* Optimize AND of 0/0xffffffff and IOR/XOR of 0. */

66469

+ if (op2 && GET_CODE (op2) == CONST_INT

66470

+ && (mode == SImode || (mode == DImode && TARGET_POWERPC64))

66471

+ && !complement_final_p && !complement_op1_p && !complement_op2_p)

66472

+ {

66473

+ HOST_WIDE_INT mask = GET_MODE_MASK (mode);

66474

+ HOST_WIDE_INT value = INTVAL (op2) & mask;

66475

+

66476

+ /* Optimize AND of 0 to just set 0. Optimize AND of -1 to be a move. */

66477

+ if (code == AND)

66478

+ {

66479

+ if (value == 0)

66480

+ {

66481

+ emit_insn (gen_rtx_SET (VOIDmode, dest, const0_rtx));

66482

+ return;

66483

+ }

66484

+

66485

+ else if (value == mask)

66486

+ {

66487

+ if (!rtx_equal_p (dest, op1))

66488

+ emit_insn (gen_rtx_SET (VOIDmode, dest, op1));

66489

+ return;

66490

+ }

66491

+ }

66492

+

66493

+ /* Optimize IOR/XOR of 0 to be a simple move. Split large operations

66494

+ into separate ORI/ORIS or XORI/XORIS instrucitons. */

66495

+ else if (code == IOR || code == XOR)

66496

+ {

66497

+ if (value == 0)

66498

+ {

66499

+ if (!rtx_equal_p (dest, op1))

66500

+ emit_insn (gen_rtx_SET (VOIDmode, dest, op1));

66501

+ return;

66502

+ }

66503

+ }

66504

+ }

66505

+

66506

+ if (complement_op1_p)

66507

+ op1 = gen_rtx_NOT (mode, op1);

66508

+

66509

+ if (complement_op2_p)

66510

+ op2 = gen_rtx_NOT (mode, op2);

66511

+

66512

+ bool_rtx = ((code == NOT)

66513

+ ? gen_rtx_NOT (mode, op1)

66514

+ : gen_rtx_fmt_ee (code, mode, op1, op2));

66515

+

66516

+ if (complement_final_p)

66517

+ bool_rtx = gen_rtx_NOT (mode, bool_rtx);

66518

+

66519

+ set_rtx = gen_rtx_SET (VOIDmode, dest, bool_rtx);

66520

+

66521

+ /* Is this AND with an explicit clobber? */

66522

+ if (clobber_reg)

66523

+ {

66524

+ rtx clobber = gen_rtx_CLOBBER (VOIDmode, clobber_reg);

66525

+ set_rtx = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set_rtx, clobber));

66526

+ }

66527

+

66528

+ emit_insn (set_rtx);

66529

+ return;

66530

+}

66531

+

66532

+/* Split a DImode AND/IOR/XOR with a constant on a 32-bit system. These

66533

+ operations are split immediately during RTL generation to allow for more

66534

+ optimizations of the AND/IOR/XOR.

66535

+

66536

+ OPERANDS is an array containing the destination and two input operands.

66537

+ CODE is the base operation (AND, IOR, XOR, NOT).

66538

+ MODE is the machine mode.

66539

+ If COMPLEMENT_FINAL_P is true, wrap the whole operation with NOT.

66540

+ If COMPLEMENT_OP1_P is true, wrap operand1 with NOT.

66541

+ If COMPLEMENT_OP2_P is true, wrap operand2 with NOT.

66542

+ CLOBBER_REG is either NULL or a scratch register of type CC to allow

66543

+ formation of the AND instructions. */

66544

+

66545

+static void

66546

+rs6000_split_logical_di (rtx operands[3],

66547

+ enum rtx_code code,

66548

+ bool complement_final_p,

66549

+ bool complement_op1_p,

66550

+ bool complement_op2_p,

66551

+ rtx clobber_reg)

66552

+{

66553

+ const HOST_WIDE_INT lower_32bits = HOST_WIDE_INT_C(0xffffffff);

66554

+ const HOST_WIDE_INT upper_32bits = ~ lower_32bits;

66555

+ const HOST_WIDE_INT sign_bit = HOST_WIDE_INT_C(0x80000000);

66556

+ enum hi_lo { hi = 0, lo = 1 };

66557

+ rtx op0_hi_lo[2], op1_hi_lo[2], op2_hi_lo[2];

66558

+ size_t i;

66559

+

66560

+ op0_hi_lo[hi] = gen_highpart (SImode, operands[0]);

66561

+ op1_hi_lo[hi] = gen_highpart (SImode, operands[1]);

66562

+ op0_hi_lo[lo] = gen_lowpart (SImode, operands[0]);

66563

+ op1_hi_lo[lo] = gen_lowpart (SImode, operands[1]);

66564

+

66565

+ if (code == NOT)

66566

+ op2_hi_lo[hi] = op2_hi_lo[lo] = NULL_RTX;

66567

+ else

66568

+ {

66569

+ if (GET_CODE (operands[2]) != CONST_INT)

66570

+ {

66571

+ op2_hi_lo[hi] = gen_highpart_mode (SImode, DImode, operands[2]);

66572

+ op2_hi_lo[lo] = gen_lowpart (SImode, operands[2]);

66573

+ }

66574

+ else

66575

+ {

66576

+ HOST_WIDE_INT value = INTVAL (operands[2]);

66577

+ HOST_WIDE_INT value_hi_lo[2];

66578

+

66579

+ gcc_assert (!complement_final_p);

66580

+ gcc_assert (!complement_op1_p);

66581

+ gcc_assert (!complement_op2_p);

66582

+

66583

+ value_hi_lo[hi] = value >> 32;

66584

+ value_hi_lo[lo] = value & lower_32bits;

66585

+

66586

+ for (i = 0; i < 2; i++)

66587

+ {

66588

+ HOST_WIDE_INT sub_value = value_hi_lo[i];

66589

+

66590

+ if (sub_value & sign_bit)

66591

+ sub_value |= upper_32bits;

66592

+

66593

+ op2_hi_lo[i] = GEN_INT (sub_value);

66594

+

66595

+ /* If this is an AND instruction, check to see if we need to load

66596

+ the value in a register. */

66597

+ if (code == AND && sub_value != -1 && sub_value != 0

66598

+ && !and_operand (op2_hi_lo[i], SImode))

66599

+ op2_hi_lo[i] = force_reg (SImode, op2_hi_lo[i]);

66600

+ }

66601

+ }

66602

+ }

66603

+

66604

+ for (i = 0; i < 2; i++)

66605

+ {

66606

+ /* Split large IOR/XOR operations. */

66607

+ if ((code == IOR || code == XOR)

66608

+ && GET_CODE (op2_hi_lo[i]) == CONST_INT

66609

+ && !complement_final_p

66610

+ && !complement_op1_p

66611

+ && !complement_op2_p

66612

+ && clobber_reg == NULL_RTX

66613

+ && !logical_const_operand (op2_hi_lo[i], SImode))

66614

+ {

66615

+ HOST_WIDE_INT value = INTVAL (op2_hi_lo[i]);

66616

+ HOST_WIDE_INT hi_16bits = value & HOST_WIDE_INT_C(0xffff0000);

66617

+ HOST_WIDE_INT lo_16bits = value & HOST_WIDE_INT_C(0x0000ffff);

66618

+ rtx tmp = gen_reg_rtx (SImode);

66619

+

66620

+ /* Make sure the constant is sign extended. */

66621

+ if ((hi_16bits & sign_bit) != 0)

66622

+ hi_16bits |= upper_32bits;

66623

+

66624

+ rs6000_split_logical_inner (tmp, op1_hi_lo[i], GEN_INT (hi_16bits),

66625

+ code, SImode, false, false, false,

66626

+ NULL_RTX);

66627

+

66628

+ rs6000_split_logical_inner (op0_hi_lo[i], tmp, GEN_INT (lo_16bits),

66629

+ code, SImode, false, false, false,

66630

+ NULL_RTX);

66631

+ }

66632

+ else

66633

+ rs6000_split_logical_inner (op0_hi_lo[i], op1_hi_lo[i], op2_hi_lo[i],

66634

+ code, SImode, complement_final_p,

66635

+ complement_op1_p, complement_op2_p,

66636

+ clobber_reg);

66637

+ }

66638

+

66639

+ return;

66640

+}

66641

+

66642

+/* Split the insns that make up boolean operations operating on multiple GPR

66643

+ registers. The boolean MD patterns ensure that the inputs either are

66644

+ exactly the same as the output registers, or there is no overlap.

66645

+

66646

+ OPERANDS is an array containing the destination and two input operands.

66647

+ CODE is the base operation (AND, IOR, XOR, NOT).

66648

+ MODE is the machine mode.

66649

+ If COMPLEMENT_FINAL_P is true, wrap the whole operation with NOT.

66650

+ If COMPLEMENT_OP1_P is true, wrap operand1 with NOT.

66651

+ If COMPLEMENT_OP2_P is true, wrap operand2 with NOT.

66652

+ CLOBBER_REG is either NULL or a scratch register of type CC to allow

66653

+ formation of the AND instructions. */

66654

+

66655

+void

66656

+rs6000_split_logical (rtx operands[3],

66657

+ enum rtx_code code,

66658

+ bool complement_final_p,

66659

+ bool complement_op1_p,

66660

+ bool complement_op2_p,

66661

+ rtx clobber_reg)

66662

+{

66663

+ enum machine_mode mode = GET_MODE (operands[0]);

66664

+ enum machine_mode sub_mode;

66665

+ rtx op0, op1, op2;

66666

+ int sub_size, regno0, regno1, nregs, i;

66667

+

66668

+ /* If this is DImode, use the specialized version that can run before

66669

+ register allocation. */

66670

+ if (mode == DImode && !TARGET_POWERPC64)

66671

+ {

66672

+ rs6000_split_logical_di (operands, code, complement_final_p,

66673

+ complement_op1_p, complement_op2_p,

66674

+ clobber_reg);

66675

+ return;

66676

+ }

66677

+

66678

+ op0 = operands[0];

66679

+ op1 = operands[1];

66680

+ op2 = (code == NOT) ? NULL_RTX : operands[2];

66681

+ sub_mode = (TARGET_POWERPC64) ? DImode : SImode;

66682

+ sub_size = GET_MODE_SIZE (sub_mode);

66683

+ regno0 = REGNO (op0);

66684

+ regno1 = REGNO (op1);

66685

+

66686

+ gcc_assert (reload_completed);

66687

+ gcc_assert (IN_RANGE (regno0, FIRST_GPR_REGNO, LAST_GPR_REGNO));

66688

+ gcc_assert (IN_RANGE (regno1, FIRST_GPR_REGNO, LAST_GPR_REGNO));

66689

+

66690

+ nregs = rs6000_hard_regno_nregs[(int)mode][regno0];

66691

+ gcc_assert (nregs > 1);

66692

+

66693

+ if (op2 && REG_P (op2))

66694

+ gcc_assert (IN_RANGE (REGNO (op2), FIRST_GPR_REGNO, LAST_GPR_REGNO));

66695

+

66696

+ for (i = 0; i < nregs; i++)

66697

+ {

66698

+ int offset = i * sub_size;

66699

+ rtx sub_op0 = simplify_subreg (sub_mode, op0, mode, offset);

66700

+ rtx sub_op1 = simplify_subreg (sub_mode, op1, mode, offset);

66701

+ rtx sub_op2 = ((code == NOT)

66702

+ ? NULL_RTX

66703

+ : simplify_subreg (sub_mode, op2, mode, offset));

66704

+

66705

+ rs6000_split_logical_inner (sub_op0, sub_op1, sub_op2, code, sub_mode,

66706

+ complement_final_p, complement_op1_p,

66707

+ complement_op2_p, clobber_reg);

66708

+ }

66709

+

66710

+ return;

66711

+}

66712

+

66713

+

66714

+/* Return true if the peephole2 can combine a load involving a combination of

66715

+ an addis instruction and a load with an offset that can be fused together on

66716

+ a power8.

66717

+

66718

+ The operands are:

66719

+ operands[0] register set with addis

66720

+ operands[1] value set via addis

66721

+ operands[2] target register being loaded

66722

+ operands[3] D-form memory reference using operands[0].

66723

+

66724

+ In addition, we are passed a boolean that is true if this is a peephole2,

66725

+ and we can use see if the addis_reg is dead after the insn and can be

66726

+ replaced by the target register. */

66727

+

66728

+bool

66729

+fusion_gpr_load_p (rtx *operands, bool peep2_p)

66730

+{

66731

+ rtx addis_reg = operands[0];

66732

+ rtx addis_value = operands[1];

66733

+ rtx target = operands[2];

66734

+ rtx mem = operands[3];

66735

+ rtx addr;

66736

+ rtx base_reg;

66737

+

66738

+ /* Validate arguments. */

66739

+ if (!base_reg_operand (addis_reg, GET_MODE (addis_reg)))

66740

+ return false;

66741

+

66742

+ if (!base_reg_operand (target, GET_MODE (target)))

66743

+ return false;

66744

+

66745

+ if (!fusion_gpr_addis (addis_value, GET_MODE (addis_value)))

66746

+ return false;

66747

+

66748

+ if (!fusion_gpr_mem_load (mem, GET_MODE (mem)))

66749

+ return false;

66750

+

66751

+ /* Allow sign/zero extension. */

66752

+ if (GET_CODE (mem) == ZERO_EXTEND

66753

+ || (GET_CODE (mem) == SIGN_EXTEND && TARGET_P8_FUSION_SIGN))

66754

+ mem = XEXP (mem, 0);

66755

+

66756

+ if (!MEM_P (mem))

66757

+ return false;

66758

+

66759

+ addr = XEXP (mem, 0); /* either PLUS or LO_SUM. */

66760

+ if (GET_CODE (addr) != PLUS && GET_CODE (addr) != LO_SUM)

66761

+ return false;

66762

+

66763

+ /* Validate that the register used to load the high value is either the

66764

+ register being loaded, or we can safely replace its use in a peephole2.

66765

+

66766

+ If this is a peephole2, we assume that there are 2 instructions in the

66767

+ peephole (addis and load), so we want to check if the target register was

66768

+ not used in the memory address and the register to hold the addis result

66769

+ is dead after the peephole. */

66770

+ if (REGNO (addis_reg) != REGNO (target))

66771

+ {

66772

+ if (!peep2_p)

66773

+ return false;

66774

+

66775

+ if (reg_mentioned_p (target, mem))

66776

+ return false;

66777

+

66778

+ if (!peep2_reg_dead_p (2, addis_reg))

66779

+ return false;

66780

+

66781

+ /* If the target register being loaded is the stack pointer, we must

66782

+ avoid loading any other value into it, even temporarily. */

66783

+ if (REG_P (target) && REGNO (target) == STACK_POINTER_REGNUM)

66784

+ return false;

66785

+ }

66786

+

66787

+ base_reg = XEXP (addr, 0);

66788

+ return REGNO (addis_reg) == REGNO (base_reg);

66789

+}

66790

+

66791

+/* During the peephole2 pass, adjust and expand the insns for a load fusion

66792

+ sequence. We adjust the addis register to use the target register. If the

66793

+ load sign extends, we adjust the code to do the zero extending load, and an

66794

+ explicit sign extension later since the fusion only covers zero extending

66795

+ loads.

66796

+

66797

+ The operands are:

66798

+ operands[0] register set with addis (to be replaced with target)

66799

+ operands[1] value set via addis

66800

+ operands[2] target register being loaded

66801

+ operands[3] D-form memory reference using operands[0]. */

66802

+

66803

+void

66804

+expand_fusion_gpr_load (rtx *operands)

66805

+{

66806

+ rtx addis_value = operands[1];

66807

+ rtx target = operands[2];

66808

+ rtx orig_mem = operands[3];

66809

+ rtx new_addr, new_mem, orig_addr, offset;

66810

+ enum rtx_code plus_or_lo_sum;

66811

+ enum machine_mode target_mode = GET_MODE (target);

66812

+ enum machine_mode extend_mode = target_mode;

66813

+ enum machine_mode ptr_mode = Pmode;

66814

+ enum rtx_code extend = UNKNOWN;

66815

+ rtx addis_reg = ((ptr_mode == target_mode)

66816

+ ? target

66817

+ : simplify_subreg (ptr_mode, target, target_mode, 0));

66818

+

66819

+ if (GET_CODE (orig_mem) == ZERO_EXTEND

66820

+ || (TARGET_P8_FUSION_SIGN && GET_CODE (orig_mem) == SIGN_EXTEND))

66821

+ {

66822

+ extend = GET_CODE (orig_mem);

66823

+ orig_mem = XEXP (orig_mem, 0);

66824

+ target_mode = GET_MODE (orig_mem);

66825

+ }

66826

+

66827

+ gcc_assert (MEM_P (orig_mem));

66828

+

66829

+ orig_addr = XEXP (orig_mem, 0);

66830

+ plus_or_lo_sum = GET_CODE (orig_addr);

66831

+ gcc_assert (plus_or_lo_sum == PLUS || plus_or_lo_sum == LO_SUM);

66832

+

66833

+ offset = XEXP (orig_addr, 1);

66834

+ new_addr = gen_rtx_fmt_ee (plus_or_lo_sum, ptr_mode, addis_reg, offset);

66835

+ new_mem = change_address (orig_mem, target_mode, new_addr);

66836

+

66837

+ if (extend != UNKNOWN)

66838

+ new_mem = gen_rtx_fmt_e (ZERO_EXTEND, extend_mode, new_mem);

66839

+

66840

+ emit_insn (gen_rtx_SET (VOIDmode, addis_reg, addis_value));

66841

+ emit_insn (gen_rtx_SET (VOIDmode, target, new_mem));

66842

+

66843

+ if (extend == SIGN_EXTEND)

66844

+ {

66845

+ int sub_off = ((BYTES_BIG_ENDIAN)

66846

+ ? GET_MODE_SIZE (extend_mode) - GET_MODE_SIZE (target_mode)

66847

+ : 0);

66848

+ rtx sign_reg

66849

+ = simplify_subreg (target_mode, target, extend_mode, sub_off);

66850

+

66851

+ emit_insn (gen_rtx_SET (VOIDmode, target,

66852

+ gen_rtx_SIGN_EXTEND (extend_mode, sign_reg)));

66853

+ }

66854

+

66855

+ return;

66856

+}

66857

+

66858

+/* Return a string to fuse an addis instruction with a gpr load to the same

66859

+ register that we loaded up the addis instruction. The code is complicated,

66860

+ so we call output_asm_insn directly, and just return "".

66861

+

66862

+ The operands are:

66863

+ operands[0] register set with addis (must be same reg as target).

66864

+ operands[1] value set via addis

66865

+ operands[2] target register being loaded

66866

+ operands[3] D-form memory reference using operands[0]. */

66867

+

66868

+const char *

66869

+emit_fusion_gpr_load (rtx *operands)

66870

+{

66871

+ rtx addis_reg = operands[0];

66872

+ rtx addis_value = operands[1];

66873

+ rtx target = operands[2];

66874

+ rtx mem = operands[3];

66875

+ rtx fuse_ops[10];

66876

+ rtx addr;

66877

+ rtx load_offset;

66878

+ const char *addis_str = NULL;

66879

+ const char *load_str = NULL;

66880

+ const char *extend_insn = NULL;

66881

+ const char *mode_name = NULL;

66882

+ char insn_template[80];

66883

+ enum machine_mode mode;

66884

+ const char *comment_str = ASM_COMMENT_START;

66885

+ bool sign_p = false;

66886

+

66887

+ gcc_assert (REG_P (addis_reg) && REG_P (target));

66888

+ gcc_assert (REGNO (addis_reg) == REGNO (target));

66889

+

66890

+ if (*comment_str == ' ')

66891

+ comment_str++;

66892

+

66893

+ /* Allow sign/zero extension. */

66894

+ if (GET_CODE (mem) == ZERO_EXTEND)

66895

+ mem = XEXP (mem, 0);

66896

+

66897

+ else if (GET_CODE (mem) == SIGN_EXTEND && TARGET_P8_FUSION_SIGN)

66898

+ {

66899

+ sign_p = true;

66900

+ mem = XEXP (mem, 0);

66901

+ }

66902

+

66903

+ gcc_assert (MEM_P (mem));

66904

+ addr = XEXP (mem, 0);

66905

+ if (GET_CODE (addr) != PLUS && GET_CODE (addr) != LO_SUM)

66906

+ gcc_unreachable ();

66907

+

66908

+ load_offset = XEXP (addr, 1);

66909

+

66910

+ /* Now emit the load instruction to the same register. */

66911

+ mode = GET_MODE (mem);

66912

+ switch (mode)

66913

+ {

66914

+ case QImode:

66915

+ mode_name = "char";

66916

+ load_str = "lbz";

66917

+ extend_insn = "extsb %0,%0";

66918

+ break;

66919

+

66920

+ case HImode:

66921

+ mode_name = "short";

66922

+ load_str = "lhz";

66923

+ extend_insn = "extsh %0,%0";

66924

+ break;

66925

+

66926

+ case SImode:

66927

+ mode_name = "int";

66928

+ load_str = "lwz";

66929

+ extend_insn = "extsw %0,%0";

66930

+ break;

66931

+

66932

+ case DImode:

66933

+ if (TARGET_POWERPC64)

66934

+ {

66935

+ mode_name = "long";

66936

+ load_str = "ld";

66937

+ }

66938

+ else

66939

+ gcc_unreachable ();

66940

+ break;

66941

+

66942

+ default:

66943

+ gcc_unreachable ();

66944

+ }

66945

+

66946

+ /* Emit the addis instruction. */

66947

+ fuse_ops[0] = target;

66948

+ if (satisfies_constraint_L (addis_value))

66949

+ {

66950

+ fuse_ops[1] = addis_value;

66951

+ addis_str = "lis %0,%v1";

66952

+ }

66953

+

66954

+ else if (GET_CODE (addis_value) == PLUS)

66955

+ {

66956

+ rtx op0 = XEXP (addis_value, 0);

66957

+ rtx op1 = XEXP (addis_value, 1);

66958

+

66959

+ if (REG_P (op0) && CONST_INT_P (op1)

66960

+ && satisfies_constraint_L (op1))

66961

+ {

66962

+ fuse_ops[1] = op0;

66963

+ fuse_ops[2] = op1;

66964

+ addis_str = "addis %0,%1,%v2";

66965

+ }

66966

+ }

66967

+

66968

+ else if (GET_CODE (addis_value) == HIGH)

66969

+ {

66970

+ rtx value = XEXP (addis_value, 0);

66971

+ if (GET_CODE (value) == UNSPEC && XINT (value, 1) == UNSPEC_TOCREL)

66972

+ {

66973

+ fuse_ops[1] = XVECEXP (value, 0, 0); /* symbol ref. */

66974

+ fuse_ops[2] = XVECEXP (value, 0, 1); /* TOC register. */

66975

+ if (TARGET_ELF)

66976

+ addis_str = "addis %0,%2,%1@toc@ha";

66977

+

66978

+ else if (TARGET_XCOFF)

66979

+ addis_str = "addis %0,%1@u(%2)";

66980

+

66981

+ else

66982

+ gcc_unreachable ();

66983

+ }

66984

+

66985

+ else if (GET_CODE (value) == PLUS)

66986

+ {

66987

+ rtx op0 = XEXP (value, 0);

66988

+ rtx op1 = XEXP (value, 1);

66989

+

66990

+ if (GET_CODE (op0) == UNSPEC

66991

+ && XINT (op0, 1) == UNSPEC_TOCREL

66992

+ && CONST_INT_P (op1))

66993

+ {

66994

+ fuse_ops[1] = XVECEXP (op0, 0, 0); /* symbol ref. */

66995

+ fuse_ops[2] = XVECEXP (op0, 0, 1); /* TOC register. */

66996

+ fuse_ops[3] = op1;

66997

+ if (TARGET_ELF)

66998

+ addis_str = "addis %0,%2,%1+%3@toc@ha";

66999

+

67000

+ else if (TARGET_XCOFF)

67001

+ addis_str = "addis %0,%1+%3@u(%2)";

67002

+

67003

+ else

67004

+ gcc_unreachable ();

67005

+ }

67006

+ }

67007

+

67008

+ else if (satisfies_constraint_L (value))

67009

+ {

67010

+ fuse_ops[1] = value;

67011

+ addis_str = "lis %0,%v1";

67012

+ }

67013

+

67014

+ else if (TARGET_ELF && !TARGET_POWERPC64 && CONSTANT_P (value))

67015

+ {

67016

+ fuse_ops[1] = value;

67017

+ addis_str = "lis %0,%1@ha";

67018

+ }

67019

+ }

67020

+

67021

+ if (!addis_str)

67022

+ fatal_insn ("Could not generate addis value for fusion", addis_value);

67023

+

67024

+ sprintf (insn_template, "%s\t\t%s gpr load fusion, type %s", addis_str,

67025

+ comment_str, mode_name);

67026

+ output_asm_insn (insn_template, fuse_ops);

67027

+

67028

+ /* Emit the D-form load instruction. */

67029

+ if (CONST_INT_P (load_offset) && satisfies_constraint_I (load_offset))

67030

+ {

67031

+ sprintf (insn_template, "%s %%0,%%1(%%0)", load_str);

67032

+ fuse_ops[1] = load_offset;

67033

+ output_asm_insn (insn_template, fuse_ops);

67034

+ }

67035

+

67036

+ else if (GET_CODE (load_offset) == UNSPEC

67037

+ && XINT (load_offset, 1) == UNSPEC_TOCREL)

67038

+ {

67039

+ if (TARGET_ELF)

67040

+ sprintf (insn_template, "%s %%0,%%1@toc@l(%%0)", load_str);

67041

+

67042

+ else if (TARGET_XCOFF)

67043

+ sprintf (insn_template, "%s %%0,%%1@l(%%0)", load_str);

67044

+

67045

+ else

67046

+ gcc_unreachable ();

67047

+

67048

+ fuse_ops[1] = XVECEXP (load_offset, 0, 0);

67049

+ output_asm_insn (insn_template, fuse_ops);

67050

+ }

67051

+

67052

+ else if (GET_CODE (load_offset) == PLUS

67053

+ && GET_CODE (XEXP (load_offset, 0)) == UNSPEC

67054

+ && XINT (XEXP (load_offset, 0), 1) == UNSPEC_TOCREL

67055

+ && CONST_INT_P (XEXP (load_offset, 1)))

67056

+ {

67057

+ rtx tocrel_unspec = XEXP (load_offset, 0);

67058

+ if (TARGET_ELF)

67059

+ sprintf (insn_template, "%s %%0,%%1+%%2@toc@l(%%0)", load_str);

67060

+

67061

+ else if (TARGET_XCOFF)

67062

+ sprintf (insn_template, "%s %%0,%%1+%%2@l(%%0)", load_str);

67063

+

67064

+ else

67065

+ gcc_unreachable ();

67066

+

67067

+ fuse_ops[1] = XVECEXP (tocrel_unspec, 0, 0);

67068

+ fuse_ops[2] = XEXP (load_offset, 1);

67069

+ output_asm_insn (insn_template, fuse_ops);

67070

+ }

67071

+

67072

+ else if (TARGET_ELF && !TARGET_POWERPC64 && CONSTANT_P (load_offset))

67073

+ {

67074

+ sprintf (insn_template, "%s %%0,%%1@l(%%0)", load_str);

67075

+

67076

+ fuse_ops[1] = load_offset;

67077

+ output_asm_insn (insn_template, fuse_ops);

67078

+ }

67079

+

67080

+ else

67081

+ fatal_insn ("Unable to generate load offset for fusion", load_offset);

67082

+

67083

+ /* Handle sign extension. The peephole2 pass generates this as a separate

67084

+ insn, but we handle it just in case it got reattached. */

67085

+ if (sign_p)

67086

+ {

67087

+ gcc_assert (extend_insn != NULL);

67088

+ output_asm_insn (extend_insn, fuse_ops);

67089

+ }

67090

+

67091

+ return "";

67092

+}

67093

+

67094

+

67095

struct gcc_target targetm = TARGET_INITIALIZER;

67096

67097

#include "gt-rs6000.h"

67098

Index: gcc/config/rs6000/vsx.md

67099

===================================================================

67100

--- a/src/gcc/config/rs6000/vsx.md (.../tags/gcc_4_8_2_release)

67101

+++ b/src/gcc/config/rs6000/vsx.md (.../branches/gcc-4_8-branch)

67102

@@ -34,12 +34,21 @@

67103

(define_mode_iterator VSX_F [V4SF V2DF])

67104

67105

;; Iterator for logical types supported by VSX

67106

-(define_mode_iterator VSX_L [V16QI V8HI V4SI V2DI V4SF V2DF TI])

67107

+(define_mode_iterator VSX_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI])

67108

67109

;; Iterator for memory move. Handle TImode specially to allow

67110

;; it to use gprs as well as vsx registers.

67111

-(define_mode_iterator VSX_M [V16QI V8HI V4SI V2DI V4SF V2DF])

67112

+(define_mode_iterator VSX_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI])

67113

67114

+(define_mode_iterator VSX_M2 [V16QI

67115

+ V8HI

67116

+ V4SI

67117

+ V2DI

67118

+ V4SF

67119

+ V2DF

67120

+ V1TI

67121

+ (TI "TARGET_VSX_TIMODE")])

67122

+

67123

;; Map into the appropriate load/store name based on the type

67124

(define_mode_attr VSm [(V16QI "vw4")

67125

(V8HI "vw4")

67126

@@ -48,7 +57,8 @@

67127

(V2DF "vd2")

67128

(V2DI "vd2")

67129

(DF "d")

67130

- (TI "vw4")])

67131

+ (V1TI "vd2")

67132

+ (TI "vd2")])

67133

67134

;; Map into the appropriate suffix based on the type

67135

(define_mode_attr VSs [(V16QI "sp")

67136

@@ -59,7 +69,8 @@

67137

(V2DI "dp")

67138

(DF "dp")

67139

(SF "sp")

67140

- (TI "sp")])

67141

+ (V1TI "dp")

67142

+ (TI "dp")])

67143

67144

;; Map the register class used

67145

(define_mode_attr VSr [(V16QI "v")

67146

@@ -70,7 +81,8 @@

67147

(V2DF "wd")

67148

(DF "ws")

67149

(SF "d")

67150

- (TI "wd")])

67151

+ (V1TI "v")

67152

+ (TI "wt")])

67153

67154

;; Map the register class used for float<->int conversions

67155

(define_mode_attr VSr2 [(V2DF "wd")

67156

@@ -115,7 +127,7 @@

67157

(V4SF "v")

67158

(V2DI "v")

67159

(V2DF "v")

67160

- (TI "v")

67161

+ (V1TI "v")

67162

(DF "s")])

67163

67164

;; Appropriate type for add ops (and other simple FP ops)

67165

@@ -173,7 +185,8 @@

67166

(V2DF "vecdouble")])

67167

67168

;; Map the scalar mode for a vector type

67169

-(define_mode_attr VS_scalar [(V2DF "DF")

67170

+(define_mode_attr VS_scalar [(V1TI "TI")

67171

+ (V2DF "DF")

67172

(V2DI "DI")

67173

(V4SF "SF")

67174

(V4SI "SI")

67175

@@ -184,7 +197,8 @@

67176

(define_mode_attr VS_double [(V4SI "V8SI")

67177

(V4SF "V8SF")

67178

(V2DI "V4DI")

67179

- (V2DF "V4DF")])

67180

+ (V2DF "V4DF")

67181

+ (V1TI "V2TI")])

67182

67183

;; Constants for creating unspecs

67184

(define_c_enum "unspec"

67185

@@ -192,6 +206,8 @@

67186

UNSPEC_VSX_CVDPSXWS

67187

UNSPEC_VSX_CVDPUXWS

67188

UNSPEC_VSX_CVSPDP

67189

+ UNSPEC_VSX_CVSPDPN

67190

+ UNSPEC_VSX_CVDPSPN

67191

UNSPEC_VSX_CVSXWDP

67192

UNSPEC_VSX_CVUXWDP

67193

UNSPEC_VSX_CVSXDSP

67194

@@ -204,80 +220,397 @@

67195

UNSPEC_VSX_ROUND_I

67196

UNSPEC_VSX_ROUND_IC

67197

UNSPEC_VSX_SLDWI

67198

+ UNSPEC_VSX_XXSPLTW

67199

])

67200

67201

;; VSX moves

67202

-(define_insn "*vsx_mov<mode>"

67203

- [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,*Y,*r,*r,<VSr>,?wa,*r,v,wZ,v")

67204

- (match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,wa,Z,wa,r,Y,r,j,j,j,W,v,wZ"))]

67205

- "VECTOR_MEM_VSX_P (<MODE>mode)

67206

- && (register_operand (operands[0], <MODE>mode)

67207

- || register_operand (operands[1], <MODE>mode))"

67208

+

67209

+;; The patterns for LE permuted loads and stores come before the general

67210

+;; VSX moves so they match first.

67211

+(define_insn_and_split "*vsx_le_perm_load_<mode>"

67212

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")

67213

+ (match_operand:VSX_D 1 "memory_operand" "Z"))]

67214

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67215

+ "#"

67216

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67217

+ [(set (match_dup 2)

67218

+ (vec_select:<MODE>

67219

+ (match_dup 1)

67220

+ (parallel [(const_int 1) (const_int 0)])))

67221

+ (set (match_dup 0)

67222

+ (vec_select:<MODE>

67223

+ (match_dup 2)

67224

+ (parallel [(const_int 1) (const_int 0)])))]

67225

+ "

67226

{

67227

- switch (which_alternative)

67228

- {

67229

- case 0:

67230

- case 3:

67231

- gcc_assert (MEM_P (operands[0])

67232

- && GET_CODE (XEXP (operands[0], 0)) != PRE_INC

67233

- && GET_CODE (XEXP (operands[0], 0)) != PRE_DEC

67234

- && GET_CODE (XEXP (operands[0], 0)) != PRE_MODIFY);

67235

- return "stx<VSm>x %x1,%y0";

67236

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

67237

+ : operands[0];

67238

+}

67239

+ "

67240

+ [(set_attr "type" "vecload")

67241

+ (set_attr "length" "8")])

67242

67243

- case 1:

67244

- case 4:

67245

- gcc_assert (MEM_P (operands[1])

67246

- && GET_CODE (XEXP (operands[1], 0)) != PRE_INC

67247

- && GET_CODE (XEXP (operands[1], 0)) != PRE_DEC

67248

- && GET_CODE (XEXP (operands[1], 0)) != PRE_MODIFY);

67249

- return "lx<VSm>x %x0,%y1";

67250

+(define_insn_and_split "*vsx_le_perm_load_<mode>"

67251

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa")

67252

+ (match_operand:VSX_W 1 "memory_operand" "Z"))]

67253

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67254

+ "#"

67255

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67256

+ [(set (match_dup 2)

67257

+ (vec_select:<MODE>

67258

+ (match_dup 1)

67259

+ (parallel [(const_int 2) (const_int 3)

67260

+ (const_int 0) (const_int 1)])))

67261

+ (set (match_dup 0)

67262

+ (vec_select:<MODE>

67263

+ (match_dup 2)

67264

+ (parallel [(const_int 2) (const_int 3)

67265

+ (const_int 0) (const_int 1)])))]

67266

+ "

67267

+{

67268

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

67269

+ : operands[0];

67270

+}

67271

+ "

67272

+ [(set_attr "type" "vecload")

67273

+ (set_attr "length" "8")])

67274

67275

- case 2:

67276

- case 5:

67277

- return "xxlor %x0,%x1,%x1";

67278

+(define_insn_and_split "*vsx_le_perm_load_v8hi"

67279

+ [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")

67280

+ (match_operand:V8HI 1 "memory_operand" "Z"))]

67281

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67282

+ "#"

67283

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67284

+ [(set (match_dup 2)

67285

+ (vec_select:V8HI

67286

+ (match_dup 1)

67287

+ (parallel [(const_int 4) (const_int 5)

67288

+ (const_int 6) (const_int 7)

67289

+ (const_int 0) (const_int 1)

67290

+ (const_int 2) (const_int 3)])))

67291

+ (set (match_dup 0)

67292

+ (vec_select:V8HI

67293

+ (match_dup 2)

67294

+ (parallel [(const_int 4) (const_int 5)

67295

+ (const_int 6) (const_int 7)

67296

+ (const_int 0) (const_int 1)

67297

+ (const_int 2) (const_int 3)])))]

67298

+ "

67299

+{

67300

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

67301

+ : operands[0];

67302

+}

67303

+ "

67304

+ [(set_attr "type" "vecload")

67305

+ (set_attr "length" "8")])

67306

67307

- case 6:

67308

- case 7:

67309

- case 8:

67310

- case 11:

67311

- return "#";

67312

+(define_insn_and_split "*vsx_le_perm_load_v16qi"

67313

+ [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")

67314

+ (match_operand:V16QI 1 "memory_operand" "Z"))]

67315

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67316

+ "#"

67317

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67318

+ [(set (match_dup 2)

67319

+ (vec_select:V16QI

67320

+ (match_dup 1)

67321

+ (parallel [(const_int 8) (const_int 9)

67322

+ (const_int 10) (const_int 11)

67323

+ (const_int 12) (const_int 13)

67324

+ (const_int 14) (const_int 15)

67325

+ (const_int 0) (const_int 1)

67326

+ (const_int 2) (const_int 3)

67327

+ (const_int 4) (const_int 5)

67328

+ (const_int 6) (const_int 7)])))

67329

+ (set (match_dup 0)

67330

+ (vec_select:V16QI

67331

+ (match_dup 2)

67332

+ (parallel [(const_int 8) (const_int 9)

67333

+ (const_int 10) (const_int 11)

67334

+ (const_int 12) (const_int 13)

67335

+ (const_int 14) (const_int 15)

67336

+ (const_int 0) (const_int 1)

67337

+ (const_int 2) (const_int 3)

67338

+ (const_int 4) (const_int 5)

67339

+ (const_int 6) (const_int 7)])))]

67340

+ "

67341

+{

67342

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])

67343

+ : operands[0];

67344

+}

67345

+ "

67346

+ [(set_attr "type" "vecload")

67347

+ (set_attr "length" "8")])

67348

67349

- case 9:

67350

- case 10:

67351

- return "xxlxor %x0,%x0,%x0";

67352

+(define_insn "*vsx_le_perm_store_<mode>"

67353

+ [(set (match_operand:VSX_D 0 "memory_operand" "=Z")

67354

+ (match_operand:VSX_D 1 "vsx_register_operand" "+wa"))]

67355

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67356

+ "#"

67357

+ [(set_attr "type" "vecstore")

67358

+ (set_attr "length" "12")])

67359

67360

- case 12:

67361

- return output_vec_const_move (operands);

67362

+(define_split

67363

+ [(set (match_operand:VSX_D 0 "memory_operand" "")

67364

+ (match_operand:VSX_D 1 "vsx_register_operand" ""))]

67365

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

67366

+ [(set (match_dup 2)

67367

+ (vec_select:<MODE>

67368

+ (match_dup 1)

67369

+ (parallel [(const_int 1) (const_int 0)])))

67370

+ (set (match_dup 0)

67371

+ (vec_select:<MODE>

67372

+ (match_dup 2)

67373

+ (parallel [(const_int 1) (const_int 0)])))]

67374

+{

67375

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

67376

+ : operands[1];

67377

+})

67378

67379

- case 13:

67380

- gcc_assert (MEM_P (operands[0])

67381

- && GET_CODE (XEXP (operands[0], 0)) != PRE_INC

67382

- && GET_CODE (XEXP (operands[0], 0)) != PRE_DEC

67383

- && GET_CODE (XEXP (operands[0], 0)) != PRE_MODIFY);

67384

- return "stvx %1,%y0";

67385

+;; The post-reload split requires that we re-permute the source

67386

+;; register in case it is still live.

67387

+(define_split

67388

+ [(set (match_operand:VSX_D 0 "memory_operand" "")

67389

+ (match_operand:VSX_D 1 "vsx_register_operand" ""))]

67390

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

67391

+ [(set (match_dup 1)

67392

+ (vec_select:<MODE>

67393

+ (match_dup 1)

67394

+ (parallel [(const_int 1) (const_int 0)])))

67395

+ (set (match_dup 0)

67396

+ (vec_select:<MODE>

67397

+ (match_dup 1)

67398

+ (parallel [(const_int 1) (const_int 0)])))

67399

+ (set (match_dup 1)

67400

+ (vec_select:<MODE>

67401

+ (match_dup 1)

67402

+ (parallel [(const_int 1) (const_int 0)])))]

67403

+ "")

67404

67405

- case 14:

67406

- gcc_assert (MEM_P (operands[0])

67407

- && GET_CODE (XEXP (operands[0], 0)) != PRE_INC

67408

- && GET_CODE (XEXP (operands[0], 0)) != PRE_DEC

67409

- && GET_CODE (XEXP (operands[0], 0)) != PRE_MODIFY);

67410

- return "lvx %0,%y1";

67411

+(define_insn "*vsx_le_perm_store_<mode>"

67412

+ [(set (match_operand:VSX_W 0 "memory_operand" "=Z")

67413

+ (match_operand:VSX_W 1 "vsx_register_operand" "+wa"))]

67414

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67415

+ "#"

67416

+ [(set_attr "type" "vecstore")

67417

+ (set_attr "length" "12")])

67418

67419

- default:

67420

- gcc_unreachable ();

67421

- }

67422

+(define_split

67423

+ [(set (match_operand:VSX_W 0 "memory_operand" "")

67424

+ (match_operand:VSX_W 1 "vsx_register_operand" ""))]

67425

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

67426

+ [(set (match_dup 2)

67427

+ (vec_select:<MODE>

67428

+ (match_dup 1)

67429

+ (parallel [(const_int 2) (const_int 3)

67430

+ (const_int 0) (const_int 1)])))

67431

+ (set (match_dup 0)

67432

+ (vec_select:<MODE>

67433

+ (match_dup 2)

67434

+ (parallel [(const_int 2) (const_int 3)

67435

+ (const_int 0) (const_int 1)])))]

67436

+{

67437

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

67438

+ : operands[1];

67439

+})

67440

+

67441

+;; The post-reload split requires that we re-permute the source

67442

+;; register in case it is still live.

67443

+(define_split

67444

+ [(set (match_operand:VSX_W 0 "memory_operand" "")

67445

+ (match_operand:VSX_W 1 "vsx_register_operand" ""))]

67446

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

67447

+ [(set (match_dup 1)

67448

+ (vec_select:<MODE>

67449

+ (match_dup 1)

67450

+ (parallel [(const_int 2) (const_int 3)

67451

+ (const_int 0) (const_int 1)])))

67452

+ (set (match_dup 0)

67453

+ (vec_select:<MODE>

67454

+ (match_dup 1)

67455

+ (parallel [(const_int 2) (const_int 3)

67456

+ (const_int 0) (const_int 1)])))

67457

+ (set (match_dup 1)

67458

+ (vec_select:<MODE>

67459

+ (match_dup 1)

67460

+ (parallel [(const_int 2) (const_int 3)

67461

+ (const_int 0) (const_int 1)])))]

67462

+ "")

67463

+

67464

+(define_insn "*vsx_le_perm_store_v8hi"

67465

+ [(set (match_operand:V8HI 0 "memory_operand" "=Z")

67466

+ (match_operand:V8HI 1 "vsx_register_operand" "+wa"))]

67467

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67468

+ "#"

67469

+ [(set_attr "type" "vecstore")

67470

+ (set_attr "length" "12")])

67471

+

67472

+(define_split

67473

+ [(set (match_operand:V8HI 0 "memory_operand" "")

67474

+ (match_operand:V8HI 1 "vsx_register_operand" ""))]

67475

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

67476

+ [(set (match_dup 2)

67477

+ (vec_select:V8HI

67478

+ (match_dup 1)

67479

+ (parallel [(const_int 4) (const_int 5)

67480

+ (const_int 6) (const_int 7)

67481

+ (const_int 0) (const_int 1)

67482

+ (const_int 2) (const_int 3)])))

67483

+ (set (match_dup 0)

67484

+ (vec_select:V8HI

67485

+ (match_dup 2)

67486

+ (parallel [(const_int 4) (const_int 5)

67487

+ (const_int 6) (const_int 7)

67488

+ (const_int 0) (const_int 1)

67489

+ (const_int 2) (const_int 3)])))]

67490

+{

67491

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

67492

+ : operands[1];

67493

+})

67494

+

67495

+;; The post-reload split requires that we re-permute the source

67496

+;; register in case it is still live.

67497

+(define_split

67498

+ [(set (match_operand:V8HI 0 "memory_operand" "")

67499

+ (match_operand:V8HI 1 "vsx_register_operand" ""))]

67500

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

67501

+ [(set (match_dup 1)

67502

+ (vec_select:V8HI

67503

+ (match_dup 1)

67504

+ (parallel [(const_int 4) (const_int 5)

67505

+ (const_int 6) (const_int 7)

67506

+ (const_int 0) (const_int 1)

67507

+ (const_int 2) (const_int 3)])))

67508

+ (set (match_dup 0)

67509

+ (vec_select:V8HI

67510

+ (match_dup 1)

67511

+ (parallel [(const_int 4) (const_int 5)

67512

+ (const_int 6) (const_int 7)

67513

+ (const_int 0) (const_int 1)

67514

+ (const_int 2) (const_int 3)])))

67515

+ (set (match_dup 1)

67516

+ (vec_select:V8HI

67517

+ (match_dup 1)

67518

+ (parallel [(const_int 4) (const_int 5)

67519

+ (const_int 6) (const_int 7)

67520

+ (const_int 0) (const_int 1)

67521

+ (const_int 2) (const_int 3)])))]

67522

+ "")

67523

+

67524

+(define_insn "*vsx_le_perm_store_v16qi"

67525

+ [(set (match_operand:V16QI 0 "memory_operand" "=Z")

67526

+ (match_operand:V16QI 1 "vsx_register_operand" "+wa"))]

67527

+ "!BYTES_BIG_ENDIAN && TARGET_VSX"

67528

+ "#"

67529

+ [(set_attr "type" "vecstore")

67530

+ (set_attr "length" "12")])

67531

+

67532

+(define_split

67533

+ [(set (match_operand:V16QI 0 "memory_operand" "")

67534

+ (match_operand:V16QI 1 "vsx_register_operand" ""))]

67535

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"

67536

+ [(set (match_dup 2)

67537

+ (vec_select:V16QI

67538

+ (match_dup 1)

67539

+ (parallel [(const_int 8) (const_int 9)

67540

+ (const_int 10) (const_int 11)

67541

+ (const_int 12) (const_int 13)

67542

+ (const_int 14) (const_int 15)

67543

+ (const_int 0) (const_int 1)

67544

+ (const_int 2) (const_int 3)

67545

+ (const_int 4) (const_int 5)

67546

+ (const_int 6) (const_int 7)])))

67547

+ (set (match_dup 0)

67548

+ (vec_select:V16QI

67549

+ (match_dup 2)

67550

+ (parallel [(const_int 8) (const_int 9)

67551

+ (const_int 10) (const_int 11)

67552

+ (const_int 12) (const_int 13)

67553

+ (const_int 14) (const_int 15)

67554

+ (const_int 0) (const_int 1)

67555

+ (const_int 2) (const_int 3)

67556

+ (const_int 4) (const_int 5)

67557

+ (const_int 6) (const_int 7)])))]

67558

+{

67559

+ operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[1])

67560

+ : operands[1];

67561

+})

67562

+

67563

+;; The post-reload split requires that we re-permute the source

67564

+;; register in case it is still live.

67565

+(define_split

67566

+ [(set (match_operand:V16QI 0 "memory_operand" "")

67567

+ (match_operand:V16QI 1 "vsx_register_operand" ""))]

67568

+ "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"

67569

+ [(set (match_dup 1)

67570

+ (vec_select:V16QI

67571

+ (match_dup 1)

67572

+ (parallel [(const_int 8) (const_int 9)

67573

+ (const_int 10) (const_int 11)

67574

+ (const_int 12) (const_int 13)

67575

+ (const_int 14) (const_int 15)

67576

+ (const_int 0) (const_int 1)

67577

+ (const_int 2) (const_int 3)

67578

+ (const_int 4) (const_int 5)

67579

+ (const_int 6) (const_int 7)])))

67580

+ (set (match_dup 0)

67581

+ (vec_select:V16QI

67582

+ (match_dup 1)

67583

+ (parallel [(const_int 8) (const_int 9)

67584

+ (const_int 10) (const_int 11)

67585

+ (const_int 12) (const_int 13)

67586

+ (const_int 14) (const_int 15)

67587

+ (const_int 0) (const_int 1)

67588

+ (const_int 2) (const_int 3)

67589

+ (const_int 4) (const_int 5)

67590

+ (const_int 6) (const_int 7)])))

67591

+ (set (match_dup 1)

67592

+ (vec_select:V16QI

67593

+ (match_dup 1)

67594

+ (parallel [(const_int 8) (const_int 9)

67595

+ (const_int 10) (const_int 11)

67596

+ (const_int 12) (const_int 13)

67597

+ (const_int 14) (const_int 15)

67598

+ (const_int 0) (const_int 1)

67599

+ (const_int 2) (const_int 3)

67600

+ (const_int 4) (const_int 5)

67601

+ (const_int 6) (const_int 7)])))]

67602

+ "")

67603

+

67604

+

67605

+(define_insn "*vsx_mov<mode>"

67606

+ [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,wQ,?&r,??Y,??r,??r,<VSr>,?wa,*r,v,wZ, v")

67607

+ (match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,wa,Z,wa,r,wQ,r,Y,r,j,j,j,W,v,wZ"))]

67608

+ "VECTOR_MEM_VSX_P (<MODE>mode)

67609

+ && (register_operand (operands[0], <MODE>mode)

67610

+ || register_operand (operands[1], <MODE>mode))"

67611

+{

67612

+ return rs6000_output_move_128bit (operands);

67613

}

67614

- [(set_attr "type" "vecstore,vecload,vecsimple,vecstore,vecload,vecsimple,*,*,*,vecsimple,vecsimple,*,*,vecstore,vecload")])

67615

+ [(set_attr "type" "vecstore,vecload,vecsimple,vecstore,vecload,vecsimple,load,store,store,load, *,vecsimple,vecsimple,*, *,vecstore,vecload")

67616

+ (set_attr "length" "4,4,4,4,4,4,12,12,12,12,16,4,4,*,16,4,4")])

67617

67618

-;; Unlike other VSX moves, allow the GPRs, since a normal use of TImode is for

67619

-;; unions. However for plain data movement, slightly favor the vector loads

67620

-(define_insn "*vsx_movti"

67621

- [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,?Y,?r,?r,wa,v,v,wZ")

67622

- (match_operand:TI 1 "input_operand" "wa,Z,wa,r,Y,r,j,W,wZ,v"))]

67623

- "VECTOR_MEM_VSX_P (TImode)

67624

+;; Unlike other VSX moves, allow the GPRs even for reloading, since a normal

67625

+;; use of TImode is for unions. However for plain data movement, slightly

67626

+;; favor the vector loads

67627

+(define_insn "*vsx_movti_64bit"

67628

+ [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,v,v,wZ,wQ,&r,Y,r,r,?r")

67629

+ (match_operand:TI 1 "input_operand" "wa,Z,wa,O,W,wZ,v,r,wQ,r,Y,r,n"))]

67630

+ "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)

67631

&& (register_operand (operands[0], TImode)

67632

|| register_operand (operands[1], TImode))"

67633

{

67634

+ return rs6000_output_move_128bit (operands);

67635

+}

67636

+ [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,vecsimple,vecstore,vecload,store,load,store,load,*,*")

67637

+ (set_attr "length" "4,4,4,4,16,4,4,8,8,8,8,8,8")])

67638

+

67639

+(define_insn "*vsx_movti_32bit"

67640

+ [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,v, v,wZ,Q,Y,????r,????r,????r,r")

67641

+ (match_operand:TI 1 "input_operand" "wa, Z,wa, O,W,wZ, v,r,r, Q, Y, r,n"))]

67642

+ "! TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)

67643

+ && (register_operand (operands[0], TImode)

67644

+ || register_operand (operands[1], TImode))"

67645

+{

67646

switch (which_alternative)

67647

{

67648

case 0:

67649

@@ -290,27 +623,45 @@

67650

return "xxlor %x0,%x1,%x1";

67651

67652

case 3:

67653

+ return "xxlxor %x0,%x0,%x0";

67654

+

67655

case 4:

67656

+ return output_vec_const_move (operands);

67657

+

67658

case 5:

67659

- return "#";

67660

+ return "stvx %1,%y0";

67661

67662

case 6:

67663

- return "xxlxor %x0,%x0,%x0";

67664

+ return "lvx %0,%y1";

67665

67666

case 7:

67667

- return output_vec_const_move (operands);

67668

+ if (TARGET_STRING)

67669

+ return \"stswi %1,%P0,16\";

67670

67671

case 8:

67672

- return "stvx %1,%y0";

67673

+ return \"#\";

67674

67675

case 9:

67676

- return "lvx %0,%y1";

67677

+ /* If the address is not used in the output, we can use lsi. Otherwise,

67678

+ fall through to generating four loads. */

67679

+ if (TARGET_STRING

67680

+ && ! reg_overlap_mentioned_p (operands[0], operands[1]))

67681

+ return \"lswi %0,%P1,16\";

67682

+ /* ... fall through ... */

67683

67684

+ case 10:

67685

+ case 11:

67686

+ case 12:

67687

+ return \"#\";

67688

default:

67689

gcc_unreachable ();

67690

}

67691

}

67692

- [(set_attr "type" "vecstore,vecload,vecsimple,*,*,*,vecsimple,*,vecstore,vecload")])

67693

+ [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,vecsimple,vecstore,vecload,store_ux,store_ux,load_ux,load_ux, *, *")

67694

+ (set_attr "length" " 4, 4, 4, 4, 8, 4, 4, 16, 16, 16, 16,16,16")

67695

+ (set (attr "cell_micro") (if_then_else (match_test "TARGET_STRING")

67696

+ (const_string "always")

67697

+ (const_string "conditional")))])

67698

67699

;; Explicit load/store expanders for the builtin functions

67700

(define_expand "vsx_load_<mode>"

67701

@@ -320,46 +671,48 @@

67702

"")

67703

67704

(define_expand "vsx_store_<mode>"

67705

- [(set (match_operand:VEC_M 0 "memory_operand" "")

67706

- (match_operand:VEC_M 1 "vsx_register_operand" ""))]

67707

+ [(set (match_operand:VSX_M 0 "memory_operand" "")

67708

+ (match_operand:VSX_M 1 "vsx_register_operand" ""))]

67709

"VECTOR_MEM_VSX_P (<MODE>mode)"

67710

"")

67711

67712

67713

-;; VSX scalar and vector floating point arithmetic instructions

67714

+;; VSX vector floating point arithmetic instructions. The VSX scalar

67715

+;; instructions are now combined with the insn for the traditional floating

67716

+;; point unit.

67717

(define_insn "*vsx_add<mode>3"

67718

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67719

- (plus:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

67720

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

67721

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67722

+ (plus:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

67723

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

67724

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67725

- "x<VSv>add<VSs> %x0,%x1,%x2"

67726

+ "xvadd<VSs> %x0,%x1,%x2"

67727

[(set_attr "type" "<VStype_simple>")

67728

(set_attr "fp_type" "<VSfptype_simple>")])

67729

67730

(define_insn "*vsx_sub<mode>3"

67731

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67732

- (minus:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

67733

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

67734

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67735

+ (minus:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

67736

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

67737

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67738

- "x<VSv>sub<VSs> %x0,%x1,%x2"

67739

+ "xvsub<VSs> %x0,%x1,%x2"

67740

[(set_attr "type" "<VStype_simple>")

67741

(set_attr "fp_type" "<VSfptype_simple>")])

67742

67743

(define_insn "*vsx_mul<mode>3"

67744

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67745

- (mult:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

67746

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

67747

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67748

+ (mult:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

67749

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

67750

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67751

- "x<VSv>mul<VSs> %x0,%x1,%x2"

67752

- [(set_attr "type" "<VStype_mul>")

67753

+ "xvmul<VSs> %x0,%x1,%x2"

67754

+ [(set_attr "type" "<VStype_simple>")

67755

(set_attr "fp_type" "<VSfptype_mul>")])

67756

67757

(define_insn "*vsx_div<mode>3"

67758

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67759

- (div:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

67760

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

67761

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67762

+ (div:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

67763

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

67764

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67765

- "x<VSv>div<VSs> %x0,%x1,%x2"

67766

+ "xvdiv<VSs> %x0,%x1,%x2"

67767

[(set_attr "type" "<VStype_div>")

67768

(set_attr "fp_type" "<VSfptype_div>")])

67769

67770

@@ -402,94 +755,72 @@

67771

(set_attr "fp_type" "<VSfptype_simple>")])

67772

67773

(define_insn "vsx_fre<mode>2"

67774

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67775

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

67776

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67777

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

67778

UNSPEC_FRES))]

67779

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67780

- "x<VSv>re<VSs> %x0,%x1"

67781

+ "xvre<VSs> %x0,%x1"

67782

[(set_attr "type" "<VStype_simple>")

67783

(set_attr "fp_type" "<VSfptype_simple>")])

67784

67785

(define_insn "*vsx_neg<mode>2"

67786

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67787

- (neg:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

67788

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67789

+ (neg:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

67790

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67791

- "x<VSv>neg<VSs> %x0,%x1"

67792

+ "xvneg<VSs> %x0,%x1"

67793

[(set_attr "type" "<VStype_simple>")

67794

(set_attr "fp_type" "<VSfptype_simple>")])

67795

67796

(define_insn "*vsx_abs<mode>2"

67797

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67798

- (abs:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

67799

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67800

+ (abs:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

67801

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67802

- "x<VSv>abs<VSs> %x0,%x1"

67803

+ "xvabs<VSs> %x0,%x1"

67804

[(set_attr "type" "<VStype_simple>")

67805

(set_attr "fp_type" "<VSfptype_simple>")])

67806

67807

(define_insn "vsx_nabs<mode>2"

67808

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67809

- (neg:VSX_B

67810

- (abs:VSX_B

67811

- (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa"))))]

67812

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67813

+ (neg:VSX_F

67814

+ (abs:VSX_F

67815

+ (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa"))))]

67816

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67817

- "x<VSv>nabs<VSs> %x0,%x1"

67818

+ "xvnabs<VSs> %x0,%x1"

67819

[(set_attr "type" "<VStype_simple>")

67820

(set_attr "fp_type" "<VSfptype_simple>")])

67821

67822

(define_insn "vsx_smax<mode>3"

67823

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67824

- (smax:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

67825

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

67826

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67827

+ (smax:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

67828

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

67829

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67830

- "x<VSv>max<VSs> %x0,%x1,%x2"

67831

+ "xvmax<VSs> %x0,%x1,%x2"

67832

[(set_attr "type" "<VStype_simple>")

67833

(set_attr "fp_type" "<VSfptype_simple>")])

67834

67835

(define_insn "*vsx_smin<mode>3"

67836

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67837

- (smin:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

67838

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")))]

67839

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67840

+ (smin:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

67841

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")))]

67842

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67843

- "x<VSv>min<VSs> %x0,%x1,%x2"

67844

+ "xvmin<VSs> %x0,%x1,%x2"

67845

[(set_attr "type" "<VStype_simple>")

67846

(set_attr "fp_type" "<VSfptype_simple>")])

67847

67848

-;; Special VSX version of smin/smax for single precision floating point. Since

67849

-;; both numbers are rounded to single precision, we can just use the DP version

67850

-;; of the instruction.

67851

-

67852

-(define_insn "*vsx_smaxsf3"

67853

- [(set (match_operand:SF 0 "vsx_register_operand" "=f")

67854

- (smax:SF (match_operand:SF 1 "vsx_register_operand" "f")

67855

- (match_operand:SF 2 "vsx_register_operand" "f")))]

67856

- "VECTOR_UNIT_VSX_P (DFmode)"

67857

- "xsmaxdp %x0,%x1,%x2"

67858

- [(set_attr "type" "fp")

67859

- (set_attr "fp_type" "fp_addsub_d")])

67860

-

67861

-(define_insn "*vsx_sminsf3"

67862

- [(set (match_operand:SF 0 "vsx_register_operand" "=f")

67863

- (smin:SF (match_operand:SF 1 "vsx_register_operand" "f")

67864

- (match_operand:SF 2 "vsx_register_operand" "f")))]

67865

- "VECTOR_UNIT_VSX_P (DFmode)"

67866

- "xsmindp %x0,%x1,%x2"

67867

- [(set_attr "type" "fp")

67868

- (set_attr "fp_type" "fp_addsub_d")])

67869

-

67870

(define_insn "*vsx_sqrt<mode>2"

67871

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67872

- (sqrt:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

67873

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67874

+ (sqrt:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

67875

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67876

- "x<VSv>sqrt<VSs> %x0,%x1"

67877

+ "xvsqrt<VSs> %x0,%x1"

67878

[(set_attr "type" "<VStype_sqrt>")

67879

(set_attr "fp_type" "<VSfptype_sqrt>")])

67880

67881

(define_insn "*vsx_rsqrte<mode>2"

67882

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

67883

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

67884

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

67885

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

67886

UNSPEC_RSQRT))]

67887

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67888

- "x<VSv>rsqrte<VSs> %x0,%x1"

67889

+ "xvrsqrte<VSs> %x0,%x1"

67890

[(set_attr "type" "<VStype_simple>")

67891

(set_attr "fp_type" "<VSfptype_simple>")])

67892

67893

@@ -528,27 +859,11 @@

67894

[(set_attr "type" "<VStype_simple>")

67895

(set_attr "fp_type" "<VSfptype_simple>")])

67896

67897

-;; Fused vector multiply/add instructions Support the classical DF versions of

67898

-;; fma, which allows the target to be a separate register from the 3 inputs.

67899

-;; Under VSX, the target must be either the addend or the first multiply.

67900

-;; Where we can, also do the same for the Altivec V4SF fmas.

67901

+;; Fused vector multiply/add instructions. Support the classical Altivec

67902

+;; versions of fma, which allows the target to be a separate register from the

67903

+;; 3 inputs. Under VSX, the target must be either the addend or the first

67904

+;; multiply.

67905

67906

-(define_insn "*vsx_fmadf4"

67907

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

67908

- (fma:DF

67909

- (match_operand:DF 1 "vsx_register_operand" "%ws,ws,wa,wa,d")

67910

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

67911

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d")))]

67912

- "VECTOR_UNIT_VSX_P (DFmode)"

67913

- "@

67914

- xsmaddadp %x0,%x1,%x2

67915

- xsmaddmdp %x0,%x1,%x3

67916

- xsmaddadp %x0,%x1,%x2

67917

- xsmaddmdp %x0,%x1,%x3

67918

- fmadd %0,%1,%2,%3"

67919

- [(set_attr "type" "fp")

67920

- (set_attr "fp_type" "fp_maddsub_d")])

67921

-

67922

(define_insn "*vsx_fmav4sf4"

67923

[(set (match_operand:V4SF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,v")

67924

(fma:V4SF

67925

@@ -578,23 +893,6 @@

67926

xvmaddmdp %x0,%x1,%x3"

67927

[(set_attr "type" "vecdouble")])

67928

67929

-(define_insn "*vsx_fmsdf4"

67930

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

67931

- (fma:DF

67932

- (match_operand:DF 1 "vsx_register_operand" "%ws,ws,wa,wa,d")

67933

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

67934

- (neg:DF

67935

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d"))))]

67936

- "VECTOR_UNIT_VSX_P (DFmode)"

67937

- "@

67938

- xsmsubadp %x0,%x1,%x2

67939

- xsmsubmdp %x0,%x1,%x3

67940

- xsmsubadp %x0,%x1,%x2

67941

- xsmsubmdp %x0,%x1,%x3

67942

- fmsub %0,%1,%2,%3"

67943

- [(set_attr "type" "fp")

67944

- (set_attr "fp_type" "fp_maddsub_d")])

67945

-

67946

(define_insn "*vsx_fms<mode>4"

67947

[(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,<VSr>,?wa,?wa")

67948

(fma:VSX_F

67949

@@ -604,29 +902,12 @@

67950

(match_operand:VSX_F 3 "vsx_register_operand" "0,<VSr>,0,wa"))))]

67951

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67952

"@

67953

- x<VSv>msuba<VSs> %x0,%x1,%x2

67954

- x<VSv>msubm<VSs> %x0,%x1,%x3

67955

- x<VSv>msuba<VSs> %x0,%x1,%x2

67956

- x<VSv>msubm<VSs> %x0,%x1,%x3"

67957

+ xvmsuba<VSs> %x0,%x1,%x2

67958

+ xvmsubm<VSs> %x0,%x1,%x3

67959

+ xvmsuba<VSs> %x0,%x1,%x2

67960

+ xvmsubm<VSs> %x0,%x1,%x3"

67961

[(set_attr "type" "<VStype_mul>")])

67962

67963

-(define_insn "*vsx_nfmadf4"

67964

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

67965

- (neg:DF

67966

- (fma:DF

67967

- (match_operand:DF 1 "vsx_register_operand" "ws,ws,wa,wa,d")

67968

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

67969

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d"))))]

67970

- "VECTOR_UNIT_VSX_P (DFmode)"

67971

- "@

67972

- xsnmaddadp %x0,%x1,%x2

67973

- xsnmaddmdp %x0,%x1,%x3

67974

- xsnmaddadp %x0,%x1,%x2

67975

- xsnmaddmdp %x0,%x1,%x3

67976

- fnmadd %0,%1,%2,%3"

67977

- [(set_attr "type" "fp")

67978

- (set_attr "fp_type" "fp_maddsub_d")])

67979

-

67980

(define_insn "*vsx_nfma<mode>4"

67981

[(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,<VSr>,?wa,?wa")

67982

(neg:VSX_F

67983

@@ -636,31 +917,13 @@

67984

(match_operand:VSX_F 3 "vsx_register_operand" "0,<VSr>,0,wa"))))]

67985

"VECTOR_UNIT_VSX_P (<MODE>mode)"

67986

"@

67987

- x<VSv>nmadda<VSs> %x0,%x1,%x2

67988

- x<VSv>nmaddm<VSs> %x0,%x1,%x3

67989

- x<VSv>nmadda<VSs> %x0,%x1,%x2

67990

- x<VSv>nmaddm<VSs> %x0,%x1,%x3"

67991

+ xvnmadda<VSs> %x0,%x1,%x2

67992

+ xvnmaddm<VSs> %x0,%x1,%x3

67993

+ xvnmadda<VSs> %x0,%x1,%x2

67994

+ xvnmaddm<VSs> %x0,%x1,%x3"

67995

[(set_attr "type" "<VStype_mul>")

67996

(set_attr "fp_type" "<VSfptype_mul>")])

67997

67998

-(define_insn "*vsx_nfmsdf4"

67999

- [(set (match_operand:DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,d")

68000

- (neg:DF

68001

- (fma:DF

68002

- (match_operand:DF 1 "vsx_register_operand" "%ws,ws,wa,wa,d")

68003

- (match_operand:DF 2 "vsx_register_operand" "ws,0,wa,0,d")

68004

- (neg:DF

68005

- (match_operand:DF 3 "vsx_register_operand" "0,ws,0,wa,d")))))]

68006

- "VECTOR_UNIT_VSX_P (DFmode)"

68007

- "@

68008

- xsnmsubadp %x0,%x1,%x2

68009

- xsnmsubmdp %x0,%x1,%x3

68010

- xsnmsubadp %x0,%x1,%x2

68011

- xsnmsubmdp %x0,%x1,%x3

68012

- fnmsub %0,%1,%2,%3"

68013

- [(set_attr "type" "fp")

68014

- (set_attr "fp_type" "fp_maddsub_d")])

68015

-

68016

(define_insn "*vsx_nfmsv4sf4"

68017

[(set (match_operand:V4SF 0 "vsx_register_operand" "=wf,wf,?wa,?wa,v")

68018

(neg:V4SF

68019

@@ -722,16 +985,6 @@

68020

[(set_attr "type" "<VStype_simple>")

68021

(set_attr "fp_type" "<VSfptype_simple>")])

68022

68023

-;; Floating point scalar compare

68024

-(define_insn "*vsx_cmpdf_internal1"

68025

- [(set (match_operand:CCFP 0 "cc_reg_operand" "=y,?y")

68026

- (compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "ws,wa")

68027

- (match_operand:DF 2 "gpc_reg_operand" "ws,wa")))]

68028

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

68029

- && VECTOR_UNIT_VSX_P (DFmode)"

68030

- "xscmpudp %0,%x1,%x2"

68031

- [(set_attr "type" "fpcompare")])

68032

-

68033

;; Compare vectors producing a vector result and a predicate, setting CR6 to

68034

;; indicate a combined status

68035

(define_insn "*vsx_eq_<mode>_p"

68036

@@ -798,13 +1051,13 @@

68037

68038

;; Copy sign

68039

(define_insn "vsx_copysign<mode>3"

68040

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

68041

- (unspec:VSX_B

68042

- [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")

68043

- (match_operand:VSX_B 2 "vsx_register_operand" "<VSr>,wa")]

68044

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

68045

+ (unspec:VSX_F

68046

+ [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")

68047

+ (match_operand:VSX_F 2 "vsx_register_operand" "<VSr>,wa")]

68048

UNSPEC_COPYSIGN))]

68049

"VECTOR_UNIT_VSX_P (<MODE>mode)"

68050

- "x<VSv>cpsgn<VSs> %x0,%x2,%x1"

68051

+ "xvcpsgn<VSs> %x0,%x2,%x1"

68052

[(set_attr "type" "<VStype_simple>")

68053

(set_attr "fp_type" "<VSfptype_simple>")])

68054

68055

@@ -865,10 +1118,10 @@

68056

(set_attr "fp_type" "<VSfptype_simple>")])

68057

68058

(define_insn "vsx_btrunc<mode>2"

68059

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

68060

- (fix:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

68061

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

68062

+ (fix:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")))]

68063

"VECTOR_UNIT_VSX_P (<MODE>mode)"

68064

- "x<VSv>r<VSs>iz %x0,%x1"

68065

+ "xvr<VSs>iz %x0,%x1"

68066

[(set_attr "type" "<VStype_simple>")

68067

(set_attr "fp_type" "<VSfptype_simple>")])

68068

68069

@@ -882,20 +1135,20 @@

68070

(set_attr "fp_type" "<VSfptype_simple>")])

68071

68072

(define_insn "vsx_floor<mode>2"

68073

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

68074

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

68075

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

68076

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

68077

UNSPEC_FRIM))]

68078

"VECTOR_UNIT_VSX_P (<MODE>mode)"

68079

- "x<VSv>r<VSs>im %x0,%x1"

68080

+ "xvr<VSs>im %x0,%x1"

68081

[(set_attr "type" "<VStype_simple>")

68082

(set_attr "fp_type" "<VSfptype_simple>")])

68083

68084

(define_insn "vsx_ceil<mode>2"

68085

- [(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")

68086

- (unspec:VSX_B [(match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")]

68087

+ [(set (match_operand:VSX_F 0 "vsx_register_operand" "=<VSr>,?wa")

68088

+ (unspec:VSX_F [(match_operand:VSX_F 1 "vsx_register_operand" "<VSr>,wa")]

68089

UNSPEC_FRIP))]

68090

"VECTOR_UNIT_VSX_P (<MODE>mode)"

68091

- "x<VSv>r<VSs>ip %x0,%x1"

68092

+ "xvr<VSs>ip %x0,%x1"

68093

[(set_attr "type" "<VStype_simple>")

68094

(set_attr "fp_type" "<VSfptype_simple>")])

68095

68096

@@ -942,6 +1195,40 @@

68097

"xscvspdp %x0,%x1"

68098

[(set_attr "type" "fp")])

68099

68100

+;; ISA 2.07 xscvdpspn/xscvspdpn that does not raise an error on signalling NaNs

68101

+(define_insn "vsx_xscvdpspn"

68102

+ [(set (match_operand:V4SF 0 "vsx_register_operand" "=ws,?wa")

68103

+ (unspec:V4SF [(match_operand:DF 1 "vsx_register_operand" "wd,wa")]

68104

+ UNSPEC_VSX_CVDPSPN))]

68105

+ "TARGET_XSCVDPSPN"

68106

+ "xscvdpspn %x0,%x1"

68107

+ [(set_attr "type" "fp")])

68108

+

68109

+(define_insn "vsx_xscvspdpn"

68110

+ [(set (match_operand:DF 0 "vsx_register_operand" "=ws,?wa")

68111

+ (unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wa,wa")]

68112

+ UNSPEC_VSX_CVSPDPN))]

68113

+ "TARGET_XSCVSPDPN"

68114

+ "xscvspdpn %x0,%x1"

68115

+ [(set_attr "type" "fp")])

68116

+

68117

+(define_insn "vsx_xscvdpspn_scalar"

68118

+ [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa")

68119

+ (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "f")]

68120

+ UNSPEC_VSX_CVDPSPN))]

68121

+ "TARGET_XSCVDPSPN"

68122

+ "xscvdpspn %x0,%x1"

68123

+ [(set_attr "type" "fp")])

68124

+

68125

+;; Used by direct move to move a SFmode value from GPR to VSX register

68126

+(define_insn "vsx_xscvspdpn_directmove"

68127

+ [(set (match_operand:SF 0 "vsx_register_operand" "=wa")

68128

+ (unspec:SF [(match_operand:SF 1 "vsx_register_operand" "wa")]

68129

+ UNSPEC_VSX_CVSPDPN))]

68130

+ "TARGET_XSCVSPDPN"

68131

+ "xscvspdpn %x0,%x1"

68132

+ [(set_attr "type" "fp")])

68133

+

68134

;; Convert from 64-bit to 32-bit types

68135

;; Note, favor the Altivec registers since the usual use of these instructions

68136

;; is in vector converts and we need to use the Altivec vperm instruction.

68137

@@ -1027,73 +1314,21 @@

68138

(set_attr "fp_type" "<VSfptype_simple>")])

68139

68140

68141

-;; Logical and permute operations

68142

-(define_insn "*vsx_and<mode>3"

68143

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

68144

- (and:VSX_L

68145

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

68146

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa")))]

68147

- "VECTOR_MEM_VSX_P (<MODE>mode)"

68148

- "xxland %x0,%x1,%x2"

68149

- [(set_attr "type" "vecsimple")])

68150

-

68151

-(define_insn "*vsx_ior<mode>3"

68152

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

68153

- (ior:VSX_L (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

68154

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa")))]

68155

- "VECTOR_MEM_VSX_P (<MODE>mode)"

68156

- "xxlor %x0,%x1,%x2"

68157

- [(set_attr "type" "vecsimple")])

68158

-

68159

-(define_insn "*vsx_xor<mode>3"

68160

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

68161

- (xor:VSX_L

68162

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

68163

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa")))]

68164

- "VECTOR_MEM_VSX_P (<MODE>mode)"

68165

- "xxlxor %x0,%x1,%x2"

68166

- [(set_attr "type" "vecsimple")])

68167

-

68168

-(define_insn "*vsx_one_cmpl<mode>2"

68169

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

68170

- (not:VSX_L

68171

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")))]

68172

- "VECTOR_MEM_VSX_P (<MODE>mode)"

68173

- "xxlnor %x0,%x1,%x1"

68174

- [(set_attr "type" "vecsimple")])

68175

-

68176

-(define_insn "*vsx_nor<mode>3"

68177

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

68178

- (not:VSX_L

68179

- (ior:VSX_L

68180

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")

68181

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa"))))]

68182

- "VECTOR_MEM_VSX_P (<MODE>mode)"

68183

- "xxlnor %x0,%x1,%x2"

68184

- [(set_attr "type" "vecsimple")])

68185

-

68186

-(define_insn "*vsx_andc<mode>3"

68187

- [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa")

68188

- (and:VSX_L

68189

- (not:VSX_L

68190

- (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,?wa"))

68191

- (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,?wa")))]

68192

- "VECTOR_MEM_VSX_P (<MODE>mode)"

68193

- "xxlandc %x0,%x1,%x2"

68194

- [(set_attr "type" "vecsimple")])

68195

-

68196

-

68197

;; Permute operations

68198

68199

;; Build a V2DF/V2DI vector from two scalars

68200

(define_insn "vsx_concat_<mode>"

68201

- [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,?wa")

68202

- (unspec:VSX_D

68203

- [(match_operand:<VS_scalar> 1 "vsx_register_operand" "ws,wa")

68204

- (match_operand:<VS_scalar> 2 "vsx_register_operand" "ws,wa")]

68205

- UNSPEC_VSX_CONCAT))]

68206

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=<VSr>,?wa")

68207

+ (vec_concat:VSX_D

68208

+ (match_operand:<VS_scalar> 1 "vsx_register_operand" "ws,wa")

68209

+ (match_operand:<VS_scalar> 2 "vsx_register_operand" "ws,wa")))]

68210

"VECTOR_MEM_VSX_P (<MODE>mode)"

68211

- "xxpermdi %x0,%x1,%x2,0"

68212

+{

68213

+ if (BYTES_BIG_ENDIAN)

68214

+ return "xxpermdi %x0,%x1,%x2,0";

68215

+ else

68216

+ return "xxpermdi %x0,%x2,%x1,0";

68217

+}

68218

[(set_attr "type" "vecperm")])

68219

68220

;; Special purpose concat using xxpermdi to glue two single precision values

68221

@@ -1106,9 +1341,176 @@

68222

(match_operand:SF 2 "vsx_register_operand" "f,f")]

68223

UNSPEC_VSX_CONCAT))]

68224

"VECTOR_MEM_VSX_P (V2DFmode)"

68225

- "xxpermdi %x0,%x1,%x2,0"

68226

+{

68227

+ if (BYTES_BIG_ENDIAN)

68228

+ return "xxpermdi %x0,%x1,%x2,0";

68229

+ else

68230

+ return "xxpermdi %x0,%x2,%x1,0";

68231

+}

68232

[(set_attr "type" "vecperm")])

68233

68234

+;; xxpermdi for little endian loads and stores. We need several of

68235

+;; these since the form of the PARALLEL differs by mode.

68236

+(define_insn "*vsx_xxpermdi2_le_<mode>"

68237

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")

68238

+ (vec_select:VSX_D

68239

+ (match_operand:VSX_D 1 "vsx_register_operand" "wa")

68240

+ (parallel [(const_int 1) (const_int 0)])))]

68241

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

68242

+ "xxpermdi %x0,%x1,%x1,2"

68243

+ [(set_attr "type" "vecperm")])

68244

+

68245

+(define_insn "*vsx_xxpermdi4_le_<mode>"

68246

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa")

68247

+ (vec_select:VSX_W

68248

+ (match_operand:VSX_W 1 "vsx_register_operand" "wa")

68249

+ (parallel [(const_int 2) (const_int 3)

68250

+ (const_int 0) (const_int 1)])))]

68251

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

68252

+ "xxpermdi %x0,%x1,%x1,2"

68253

+ [(set_attr "type" "vecperm")])

68254

+

68255

+(define_insn "*vsx_xxpermdi8_le_V8HI"

68256

+ [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")

68257

+ (vec_select:V8HI

68258

+ (match_operand:V8HI 1 "vsx_register_operand" "wa")

68259

+ (parallel [(const_int 4) (const_int 5)

68260

+ (const_int 6) (const_int 7)

68261

+ (const_int 0) (const_int 1)

68262

+ (const_int 2) (const_int 3)])))]

68263

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"

68264

+ "xxpermdi %x0,%x1,%x1,2"

68265

+ [(set_attr "type" "vecperm")])

68266

+

68267

+(define_insn "*vsx_xxpermdi16_le_V16QI"

68268

+ [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")

68269

+ (vec_select:V16QI

68270

+ (match_operand:V16QI 1 "vsx_register_operand" "wa")

68271

+ (parallel [(const_int 8) (const_int 9)

68272

+ (const_int 10) (const_int 11)

68273

+ (const_int 12) (const_int 13)

68274

+ (const_int 14) (const_int 15)

68275

+ (const_int 0) (const_int 1)

68276

+ (const_int 2) (const_int 3)

68277

+ (const_int 4) (const_int 5)

68278

+ (const_int 6) (const_int 7)])))]

68279

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"

68280

+ "xxpermdi %x0,%x1,%x1,2"

68281

+ [(set_attr "type" "vecperm")])

68282

+

68283

+;; lxvd2x for little endian loads. We need several of

68284

+;; these since the form of the PARALLEL differs by mode.

68285

+(define_insn "*vsx_lxvd2x2_le_<mode>"

68286

+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")

68287

+ (vec_select:VSX_D

68288

+ (match_operand:VSX_D 1 "memory_operand" "Z")

68289

+ (parallel [(const_int 1) (const_int 0)])))]

68290

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

68291

+ "lxvd2x %x0,%y1"

68292

+ [(set_attr "type" "vecload")])

68293

+

68294

+(define_insn "*vsx_lxvd2x4_le_<mode>"

68295

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wa")

68296

+ (vec_select:VSX_W

68297

+ (match_operand:VSX_W 1 "memory_operand" "Z")

68298

+ (parallel [(const_int 2) (const_int 3)

68299

+ (const_int 0) (const_int 1)])))]

68300

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

68301

+ "lxvd2x %x0,%y1"

68302

+ [(set_attr "type" "vecload")])

68303

+

68304

+(define_insn "*vsx_lxvd2x8_le_V8HI"

68305

+ [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")

68306

+ (vec_select:V8HI

68307

+ (match_operand:V8HI 1 "memory_operand" "Z")

68308

+ (parallel [(const_int 4) (const_int 5)

68309

+ (const_int 6) (const_int 7)

68310

+ (const_int 0) (const_int 1)

68311

+ (const_int 2) (const_int 3)])))]

68312

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"

68313

+ "lxvd2x %x0,%y1"

68314

+ [(set_attr "type" "vecload")])

68315

+

68316

+(define_insn "*vsx_lxvd2x16_le_V16QI"

68317

+ [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")

68318

+ (vec_select:V16QI

68319

+ (match_operand:V16QI 1 "memory_operand" "Z")

68320

+ (parallel [(const_int 8) (const_int 9)

68321

+ (const_int 10) (const_int 11)

68322

+ (const_int 12) (const_int 13)

68323

+ (const_int 14) (const_int 15)

68324

+ (const_int 0) (const_int 1)

68325

+ (const_int 2) (const_int 3)

68326

+ (const_int 4) (const_int 5)

68327

+ (const_int 6) (const_int 7)])))]

68328

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"

68329

+ "lxvd2x %x0,%y1"

68330

+ [(set_attr "type" "vecload")])

68331

+

68332

+;; stxvd2x for little endian stores. We need several of

68333

+;; these since the form of the PARALLEL differs by mode.

68334

+(define_insn "*vsx_stxvd2x2_le_<mode>"

68335

+ [(set (match_operand:VSX_D 0 "memory_operand" "=Z")

68336

+ (vec_select:VSX_D

68337

+ (match_operand:VSX_D 1 "vsx_register_operand" "wa")

68338

+ (parallel [(const_int 1) (const_int 0)])))]

68339

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

68340

+ "stxvd2x %x1,%y0"

68341

+ [(set_attr "type" "vecstore")])

68342

+

68343

+(define_insn "*vsx_stxvd2x4_le_<mode>"

68344

+ [(set (match_operand:VSX_W 0 "memory_operand" "=Z")

68345

+ (vec_select:VSX_W

68346

+ (match_operand:VSX_W 1 "vsx_register_operand" "wa")

68347

+ (parallel [(const_int 2) (const_int 3)

68348

+ (const_int 0) (const_int 1)])))]

68349

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"

68350

+ "stxvd2x %x1,%y0"

68351

+ [(set_attr "type" "vecstore")])

68352

+

68353

+(define_insn "*vsx_stxvd2x8_le_V8HI"

68354

+ [(set (match_operand:V8HI 0 "memory_operand" "=Z")

68355

+ (vec_select:V8HI

68356

+ (match_operand:V8HI 1 "vsx_register_operand" "wa")

68357

+ (parallel [(const_int 4) (const_int 5)

68358

+ (const_int 6) (const_int 7)

68359

+ (const_int 0) (const_int 1)

68360

+ (const_int 2) (const_int 3)])))]

68361

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"

68362

+ "stxvd2x %x1,%y0"

68363

+ [(set_attr "type" "vecstore")])

68364

+

68365

+(define_insn "*vsx_stxvd2x16_le_V16QI"

68366

+ [(set (match_operand:V16QI 0 "memory_operand" "=Z")

68367

+ (vec_select:V16QI

68368

+ (match_operand:V16QI 1 "vsx_register_operand" "wa")

68369

+ (parallel [(const_int 8) (const_int 9)

68370

+ (const_int 10) (const_int 11)

68371

+ (const_int 12) (const_int 13)

68372

+ (const_int 14) (const_int 15)

68373

+ (const_int 0) (const_int 1)

68374

+ (const_int 2) (const_int 3)

68375

+ (const_int 4) (const_int 5)

68376

+ (const_int 6) (const_int 7)])))]

68377

+ "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"

68378

+ "stxvd2x %x1,%y0"

68379

+ [(set_attr "type" "vecstore")])

68380

+

68381

+;; Convert a TImode value into V1TImode

68382

+(define_expand "vsx_set_v1ti"

68383

+ [(match_operand:V1TI 0 "nonimmediate_operand" "")

68384

+ (match_operand:V1TI 1 "nonimmediate_operand" "")

68385

+ (match_operand:TI 2 "input_operand" "")

68386

+ (match_operand:QI 3 "u5bit_cint_operand" "")]

68387

+ "VECTOR_MEM_VSX_P (V1TImode)"

68388

+{

68389

+ if (operands[3] != const0_rtx)

68390

+ gcc_unreachable ();

68391

+

68392

+ emit_move_insn (operands[0], gen_lowpart (V1TImode, operands[1]));

68393

+ DONE;

68394

+})

68395

+

68396

;; Set the element of a V2DI/VD2F mode

68397

(define_insn "vsx_set_<mode>"

68398

[(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,?wa")

68399

@@ -1118,9 +1520,10 @@

68400

UNSPEC_VSX_SET))]

68401

"VECTOR_MEM_VSX_P (<MODE>mode)"

68402

{

68403

- if (INTVAL (operands[3]) == 0)

68404

+ int idx_first = BYTES_BIG_ENDIAN ? 0 : 1;

68405

+ if (INTVAL (operands[3]) == idx_first)

68406

return \"xxpermdi %x0,%x2,%x1,1\";

68407

- else if (INTVAL (operands[3]) == 1)

68408

+ else if (INTVAL (operands[3]) == 1 - idx_first)

68409

return \"xxpermdi %x0,%x1,%x2,0\";

68410

else

68411

gcc_unreachable ();

68412

@@ -1135,8 +1538,12 @@

68413

[(match_operand:QI 2 "u5bit_cint_operand" "i,i,i")])))]

68414

"VECTOR_MEM_VSX_P (<MODE>mode)"

68415

{

68416

+ int fldDM;

68417

gcc_assert (UINTVAL (operands[2]) <= 1);

68418

- operands[3] = GEN_INT (INTVAL (operands[2]) << 1);

68419

+ fldDM = INTVAL (operands[2]) << 1;

68420

+ if (!BYTES_BIG_ENDIAN)

68421

+ fldDM = 3 - fldDM;

68422

+ operands[3] = GEN_INT (fldDM);

68423

return \"xxpermdi %x0,%x1,%x1,%3\";

68424

}

68425

[(set_attr "type" "vecperm")])

68426

@@ -1149,9 +1556,28 @@

68427

(parallel [(const_int 0)])))]

68428

"VECTOR_MEM_VSX_P (<MODE>mode) && WORDS_BIG_ENDIAN"

68429

"lxsd%U1x %x0,%y1"

68430

- [(set_attr "type" "fpload")

68431

+ [(set (attr "type")

68432

+ (if_then_else

68433

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

68434

+ (const_string "fpload_ux")

68435

+ (const_string "fpload")))

68436

(set_attr "length" "4")])

68437

68438

+;; Optimize extracting element 1 from memory for little endian

68439

+(define_insn "*vsx_extract_<mode>_one_le"

68440

+ [(set (match_operand:<VS_scalar> 0 "vsx_register_operand" "=ws,d,?wa")

68441

+ (vec_select:<VS_scalar>

68442

+ (match_operand:VSX_D 1 "indexed_or_indirect_operand" "Z,Z,Z")

68443

+ (parallel [(const_int 1)])))]

68444

+ "VECTOR_MEM_VSX_P (<MODE>mode) && !WORDS_BIG_ENDIAN"

68445

+ "lxsd%U1x %x0,%y1"

68446

+ [(set (attr "type")

68447

+ (if_then_else

68448

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

68449

+ (const_string "fpload_ux")

68450

+ (const_string "fpload")))

68451

+ (set_attr "length" "4")])

68452

+

68453

;; Extract a SF element from V4SF

68454

(define_insn_and_split "vsx_extract_v4sf"

68455

[(set (match_operand:SF 0 "vsx_register_operand" "=f,f")

68456

@@ -1172,7 +1598,7 @@

68457

rtx op2 = operands[2];

68458

rtx op3 = operands[3];

68459

rtx tmp;

68460

- HOST_WIDE_INT ele = INTVAL (op2);

68461

+ HOST_WIDE_INT ele = BYTES_BIG_ENDIAN ? INTVAL (op2) : 3 - INTVAL (op2);

68462

68463

if (ele == 0)

68464

tmp = op1;

68465

@@ -1213,11 +1639,22 @@

68466

if (<MODE>mode != V2DImode)

68467

{

68468

target = gen_lowpart (V2DImode, target);

68469

- op0 = gen_lowpart (V2DImode, target);

68470

- op1 = gen_lowpart (V2DImode, target);

68471

+ op0 = gen_lowpart (V2DImode, op0);

68472

+ op1 = gen_lowpart (V2DImode, op1);

68473

}

68474

}

68475

- emit_insn (gen (target, op0, op1, perm0, perm1));

68476

+ /* In little endian mode, vsx_xxpermdi2_<mode>_1 will perform a

68477

+ transformation we don't want; it is necessary for

68478

+ rs6000_expand_vec_perm_const_1 but not for this use. So we

68479

+ prepare for that by reversing the transformation here. */

68480

+ if (BYTES_BIG_ENDIAN)

68481

+ emit_insn (gen (target, op0, op1, perm0, perm1));

68482

+ else

68483

+ {

68484

+ rtx p0 = GEN_INT (3 - INTVAL (perm1));

68485

+ rtx p1 = GEN_INT (3 - INTVAL (perm0));

68486

+ emit_insn (gen (target, op1, op0, p0, p1));

68487

+ }

68488

DONE;

68489

})

68490

68491

@@ -1231,9 +1668,32 @@

68492

(match_operand 4 "const_2_to_3_operand" "")])))]

68493

"VECTOR_MEM_VSX_P (<MODE>mode)"

68494

{

68495

- int mask = (INTVAL (operands[3]) << 1) | (INTVAL (operands[4]) - 2);

68496

+ int op3, op4, mask;

68497

+

68498

+ /* For little endian, swap operands and invert/swap selectors

68499

+ to get the correct xxpermdi. The operand swap sets up the

68500

+ inputs as a little endian array. The selectors are swapped

68501

+ because they are defined to use big endian ordering. The

68502

+ selectors are inverted to get the correct doublewords for

68503

+ little endian ordering. */

68504

+ if (BYTES_BIG_ENDIAN)

68505

+ {

68506

+ op3 = INTVAL (operands[3]);

68507

+ op4 = INTVAL (operands[4]);

68508

+ }

68509

+ else

68510

+ {

68511

+ op3 = 3 - INTVAL (operands[4]);

68512

+ op4 = 3 - INTVAL (operands[3]);

68513

+ }

68514

+

68515

+ mask = (op3 << 1) | (op4 - 2);

68516

operands[3] = GEN_INT (mask);

68517

- return "xxpermdi %x0,%x1,%x2,%3";

68518

+

68519

+ if (BYTES_BIG_ENDIAN)

68520

+ return "xxpermdi %x0,%x1,%x2,%3";

68521

+ else

68522

+ return "xxpermdi %x0,%x2,%x1,%3";

68523

}

68524

[(set_attr "type" "vecperm")])

68525

68526

@@ -1252,25 +1712,57 @@

68527

68528

;; Expanders for builtins

68529

(define_expand "vsx_mergel_<mode>"

68530

- [(set (match_operand:VSX_D 0 "vsx_register_operand" "")

68531

- (vec_select:VSX_D

68532

- (vec_concat:<VS_double>

68533

- (match_operand:VSX_D 1 "vsx_register_operand" "")

68534

- (match_operand:VSX_D 2 "vsx_register_operand" ""))

68535

- (parallel [(const_int 1) (const_int 3)])))]

68536

+ [(use (match_operand:VSX_D 0 "vsx_register_operand" ""))

68537

+ (use (match_operand:VSX_D 1 "vsx_register_operand" ""))

68538

+ (use (match_operand:VSX_D 2 "vsx_register_operand" ""))]

68539

"VECTOR_MEM_VSX_P (<MODE>mode)"

68540

- "")

68541

+{

68542

+ rtvec v;

68543

+ rtx x;

68544

68545

+ /* Special handling for LE with -maltivec=be. */

68546

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

68547

+ {

68548

+ v = gen_rtvec (2, GEN_INT (0), GEN_INT (2));

68549

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[2], operands[1]);

68550

+ }

68551

+ else

68552

+ {

68553

+ v = gen_rtvec (2, GEN_INT (1), GEN_INT (3));

68554

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[1], operands[2]);

68555

+ }

68556

+

68557

+ x = gen_rtx_VEC_SELECT (<MODE>mode, x, gen_rtx_PARALLEL (VOIDmode, v));

68558

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

68559

+ DONE;

68560

+})

68561

+

68562

(define_expand "vsx_mergeh_<mode>"

68563

- [(set (match_operand:VSX_D 0 "vsx_register_operand" "")

68564

- (vec_select:VSX_D

68565

- (vec_concat:<VS_double>

68566

- (match_operand:VSX_D 1 "vsx_register_operand" "")

68567

- (match_operand:VSX_D 2 "vsx_register_operand" ""))

68568

- (parallel [(const_int 0) (const_int 2)])))]

68569

+ [(use (match_operand:VSX_D 0 "vsx_register_operand" ""))

68570

+ (use (match_operand:VSX_D 1 "vsx_register_operand" ""))

68571

+ (use (match_operand:VSX_D 2 "vsx_register_operand" ""))]

68572

"VECTOR_MEM_VSX_P (<MODE>mode)"

68573

- "")

68574

+{

68575

+ rtvec v;

68576

+ rtx x;

68577

68578

+ /* Special handling for LE with -maltivec=be. */

68579

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

68580

+ {

68581

+ v = gen_rtvec (2, GEN_INT (1), GEN_INT (3));

68582

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[2], operands[1]);

68583

+ }

68584

+ else

68585

+ {

68586

+ v = gen_rtvec (2, GEN_INT (0), GEN_INT (2));

68587

+ x = gen_rtx_VEC_CONCAT (<VS_double>mode, operands[1], operands[2]);

68588

+ }

68589

+

68590

+ x = gen_rtx_VEC_SELECT (<MODE>mode, x, gen_rtx_PARALLEL (VOIDmode, v));

68591

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

68592

+ DONE;

68593

+})

68594

+

68595

;; V2DF/V2DI splat

68596

(define_insn "vsx_splat_<mode>"

68597

[(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,wd,wd,?wa,?wa,?wa")

68598

@@ -1295,6 +1787,20 @@

68599

(parallel

68600

[(match_operand:QI 2 "u5bit_cint_operand" "i,i")]))))]

68601

"VECTOR_MEM_VSX_P (<MODE>mode)"

68602

+{

68603

+ if (!BYTES_BIG_ENDIAN)

68604

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

68605

+

68606

+ return "xxspltw %x0,%x1,%2";

68607

+}

68608

+ [(set_attr "type" "vecperm")])

68609

+

68610

+(define_insn "vsx_xxspltw_<mode>_direct"

68611

+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wf,?wa")

68612

+ (unspec:VSX_W [(match_operand:VSX_W 1 "vsx_register_operand" "wf,wa")

68613

+ (match_operand:QI 2 "u5bit_cint_operand" "i,i")]

68614

+ UNSPEC_VSX_XXSPLTW))]

68615

+ "VECTOR_MEM_VSX_P (<MODE>mode)"

68616

"xxspltw %x0,%x1,%2"

68617

[(set_attr "type" "vecperm")])

68618

68619

@@ -1308,7 +1814,12 @@

68620

(parallel [(const_int 0) (const_int 4)

68621

(const_int 1) (const_int 5)])))]

68622

"VECTOR_MEM_VSX_P (<MODE>mode)"

68623

- "xxmrghw %x0,%x1,%x2"

68624

+{

68625

+ if (BYTES_BIG_ENDIAN)

68626

+ return "xxmrghw %x0,%x1,%x2";

68627

+ else

68628

+ return "xxmrglw %x0,%x2,%x1";

68629

+}

68630

[(set_attr "type" "vecperm")])

68631

68632

(define_insn "vsx_xxmrglw_<mode>"

68633

@@ -1320,7 +1831,12 @@

68634

(parallel [(const_int 2) (const_int 6)

68635

(const_int 3) (const_int 7)])))]

68636

"VECTOR_MEM_VSX_P (<MODE>mode)"

68637

- "xxmrglw %x0,%x1,%x2"

68638

+{

68639

+ if (BYTES_BIG_ENDIAN)

68640

+ return "xxmrglw %x0,%x1,%x2";

68641

+ else

68642

+ return "xxmrghw %x0,%x2,%x1";

68643

+}

68644

[(set_attr "type" "vecperm")])

68645

68646

;; Shift left double by word immediate

68647

@@ -1483,3 +1999,27 @@

68648

}"

68649

[(set_attr "length" "20")

68650

(set_attr "type" "veccomplex")])

68651

+

68652

+

68653

+;; Power8 Vector fusion. The fused ops must be physically adjacent.

68654

+(define_peephole

68655

+ [(set (match_operand:P 0 "base_reg_operand" "")

68656

+ (match_operand:P 1 "short_cint_operand" ""))

68657

+ (set (match_operand:VSX_M2 2 "vsx_register_operand" "")

68658

+ (mem:VSX_M2 (plus:P (match_dup 0)

68659

+ (match_operand:P 3 "int_reg_operand" ""))))]

68660

+ "TARGET_VSX && TARGET_P8_FUSION"

68661

+ "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"

68662

+ [(set_attr "length" "8")

68663

+ (set_attr "type" "vecload")])

68664

+

68665

+(define_peephole

68666

+ [(set (match_operand:P 0 "base_reg_operand" "")

68667

+ (match_operand:P 1 "short_cint_operand" ""))

68668

+ (set (match_operand:VSX_M2 2 "vsx_register_operand" "")

68669

+ (mem:VSX_M2 (plus:P (match_operand:P 3 "int_reg_operand" "")

68670

+ (match_dup 0))))]

68671

+ "TARGET_VSX && TARGET_P8_FUSION"

68672

+ "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"

68673

+ [(set_attr "length" "8")

68674

+ (set_attr "type" "vecload")])

68675

Index: gcc/config/rs6000/rs6000.h

68676

===================================================================

68677

--- a/src/gcc/config/rs6000/rs6000.h (.../tags/gcc_4_8_2_release)

68678

+++ b/src/gcc/config/rs6000/rs6000.h (.../branches/gcc-4_8-branch)

68679

@@ -92,7 +92,7 @@

68680

#ifdef HAVE_AS_POWER8

68681

#define ASM_CPU_POWER8_SPEC "-mpower8"

68682

#else

68683

-#define ASM_CPU_POWER8_SPEC "-mpower4 -maltivec"

68684

+#define ASM_CPU_POWER8_SPEC ASM_CPU_POWER7_SPEC

68685

#endif

68686

68687

#ifdef HAVE_AS_DCI

68688

@@ -164,6 +164,7 @@

68689

%{mcpu=e6500: -me6500} \

68690

%{maltivec: -maltivec} \

68691

%{mvsx: -mvsx %{!maltivec: -maltivec} %{!mcpu*: %(asm_cpu_power7)}} \

68692

+%{mpower8-vector|mcrypto|mdirect-move|mhtm: %{!mcpu*: %(asm_cpu_power8)}} \

68693

-many"

68694

68695

#define CPP_DEFAULT_SPEC ""

68696

@@ -277,6 +278,21 @@

68697

#define TARGET_POPCNTD 0

68698

#endif

68699

68700

+/* Define the ISA 2.07 flags as 0 if the target assembler does not support the

68701

+ waitasecond instruction. Allow -mpower8-fusion, since it does not add new

68702

+ instructions. */

68703

+

68704

+#ifndef HAVE_AS_POWER8

68705

+#undef TARGET_DIRECT_MOVE

68706

+#undef TARGET_CRYPTO

68707

+#undef TARGET_HTM

68708

+#undef TARGET_P8_VECTOR

68709

+#define TARGET_DIRECT_MOVE 0

68710

+#define TARGET_CRYPTO 0

68711

+#define TARGET_HTM 0

68712

+#define TARGET_P8_VECTOR 0

68713

+#endif

68714

+

68715

/* Define TARGET_LWSYNC_INSTRUCTION if the assembler knows about lwsync. If

68716

not, generate the lwsync code as an integer constant. */

68717

#ifdef HAVE_AS_LWSYNC

68718

@@ -386,6 +402,7 @@

68719

#define TARGET_DEBUG_TARGET (rs6000_debug & MASK_DEBUG_TARGET)

68720

#define TARGET_DEBUG_BUILTIN (rs6000_debug & MASK_DEBUG_BUILTIN)

68721

68722

+/* Describe the vector unit used for arithmetic operations. */

68723

extern enum rs6000_vector rs6000_vector_unit[];

68724

68725

#define VECTOR_UNIT_NONE_P(MODE) \

68726

@@ -394,12 +411,25 @@

68727

#define VECTOR_UNIT_VSX_P(MODE) \

68728

(rs6000_vector_unit[(MODE)] == VECTOR_VSX)

68729

68730

+#define VECTOR_UNIT_P8_VECTOR_P(MODE) \

68731

+ (rs6000_vector_unit[(MODE)] == VECTOR_P8_VECTOR)

68732

+

68733

#define VECTOR_UNIT_ALTIVEC_P(MODE) \

68734

(rs6000_vector_unit[(MODE)] == VECTOR_ALTIVEC)

68735

68736

+#define VECTOR_UNIT_VSX_OR_P8_VECTOR_P(MODE) \

68737

+ (IN_RANGE ((int)rs6000_vector_unit[(MODE)], \

68738

+ (int)VECTOR_VSX, \

68739

+ (int)VECTOR_P8_VECTOR))

68740

+

68741

+/* VECTOR_UNIT_ALTIVEC_OR_VSX_P is used in places where we are using either

68742

+ altivec (VMX) or VSX vector instructions. P8 vector support is upwards

68743

+ compatible, so allow it as well, rather than changing all of the uses of the

68744

+ macro. */

68745

#define VECTOR_UNIT_ALTIVEC_OR_VSX_P(MODE) \

68746

- (rs6000_vector_unit[(MODE)] == VECTOR_ALTIVEC \

68747

- || rs6000_vector_unit[(MODE)] == VECTOR_VSX)

68748

+ (IN_RANGE ((int)rs6000_vector_unit[(MODE)], \

68749

+ (int)VECTOR_ALTIVEC, \

68750

+ (int)VECTOR_P8_VECTOR))

68751

68752

/* Describe whether to use VSX loads or Altivec loads. For now, just use the

68753

same unit as the vector unit we are using, but we may want to migrate to

68754

@@ -412,12 +442,21 @@

68755

#define VECTOR_MEM_VSX_P(MODE) \

68756

(rs6000_vector_mem[(MODE)] == VECTOR_VSX)

68757

68758

+#define VECTOR_MEM_P8_VECTOR_P(MODE) \

68759

+ (rs6000_vector_mem[(MODE)] == VECTOR_VSX)

68760

+

68761

#define VECTOR_MEM_ALTIVEC_P(MODE) \

68762

(rs6000_vector_mem[(MODE)] == VECTOR_ALTIVEC)

68763

68764

+#define VECTOR_MEM_VSX_OR_P8_VECTOR_P(MODE) \

68765

+ (IN_RANGE ((int)rs6000_vector_mem[(MODE)], \

68766

+ (int)VECTOR_VSX, \

68767

+ (int)VECTOR_P8_VECTOR))

68768

+

68769

#define VECTOR_MEM_ALTIVEC_OR_VSX_P(MODE) \

68770

- (rs6000_vector_mem[(MODE)] == VECTOR_ALTIVEC \

68771

- || rs6000_vector_mem[(MODE)] == VECTOR_VSX)

68772

+ (IN_RANGE ((int)rs6000_vector_mem[(MODE)], \

68773

+ (int)VECTOR_ALTIVEC, \

68774

+ (int)VECTOR_P8_VECTOR))

68775

68776

/* Return the alignment of a given vector type, which is set based on the

68777

vector unit use. VSX for instance can load 32 or 64 bit aligned words

68778

@@ -429,6 +468,15 @@

68779

? rs6000_vector_align[(MODE)] \

68780

: (int)GET_MODE_BITSIZE ((MODE)))

68781

68782

+/* Determine the element order to use for vector instructions. By

68783

+ default we use big-endian element order when targeting big-endian,

68784

+ and little-endian element order when targeting little-endian. For

68785

+ programs being ported from BE Power to LE Power, it can sometimes

68786

+ be useful to use big-endian element order when targeting little-endian.

68787

+ This is set via -maltivec=be, for example. */

68788

+#define VECTOR_ELT_ORDER_BIG \

68789

+ (BYTES_BIG_ENDIAN || (rs6000_altivec_element_order == 2))

68790

+

68791

/* Alignment options for fields in structures for sub-targets following

68792

AIX-like ABI.

68793

ALIGN_POWER word-aligns FP doubles (default AIX ABI).

68794

@@ -479,16 +527,38 @@

68795

#define TARGET_FCTIDUZ TARGET_POPCNTD

68796

#define TARGET_FCTIWUZ TARGET_POPCNTD

68797

68798

+#define TARGET_XSCVDPSPN (TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)

68799

+#define TARGET_XSCVSPDPN (TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)

68800

+#define TARGET_VADDUQM (TARGET_P8_VECTOR && TARGET_POWERPC64)

68801

+

68802

+/* Byte/char syncs were added as phased in for ISA 2.06B, but are not present

68803

+ in power7, so conditionalize them on p8 features. TImode syncs need quad

68804

+ memory support. */

68805

+#define TARGET_SYNC_HI_QI (TARGET_QUAD_MEMORY \

68806

+ || TARGET_QUAD_MEMORY_ATOMIC \

68807

+ || TARGET_DIRECT_MOVE)

68808

+

68809

+#define TARGET_SYNC_TI TARGET_QUAD_MEMORY_ATOMIC

68810

+

68811

+/* Power7 has both 32-bit load and store integer for the FPRs, so we don't need

68812

+ to allocate the SDmode stack slot to get the value into the proper location

68813

+ in the register. */

68814

+#define TARGET_NO_SDMODE_STACK (TARGET_LFIWZX && TARGET_STFIWX && TARGET_DFP)

68815

+

68816

/* In switching from using target_flags to using rs6000_isa_flags, the options

68817

machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. For now map

68818

OPTION_MASK_<xxx> back into MASK_<xxx>. */

68819

#define MASK_ALTIVEC OPTION_MASK_ALTIVEC

68820

#define MASK_CMPB OPTION_MASK_CMPB

68821

+#define MASK_CRYPTO OPTION_MASK_CRYPTO

68822

#define MASK_DFP OPTION_MASK_DFP

68823

+#define MASK_DIRECT_MOVE OPTION_MASK_DIRECT_MOVE

68824

#define MASK_DLMZB OPTION_MASK_DLMZB

68825

#define MASK_EABI OPTION_MASK_EABI

68826

#define MASK_FPRND OPTION_MASK_FPRND

68827

+#define MASK_P8_FUSION OPTION_MASK_P8_FUSION

68828

#define MASK_HARD_FLOAT OPTION_MASK_HARD_FLOAT

68829

+#define MASK_HTM OPTION_MASK_HTM

68830

#define MASK_ISEL OPTION_MASK_ISEL

68831

#define MASK_MFCRF OPTION_MASK_MFCRF

68832

#define MASK_MFPGPR OPTION_MASK_MFPGPR

68833

@@ -495,6 +565,7 @@

68834

#define MASK_MULHW OPTION_MASK_MULHW

68835

#define MASK_MULTIPLE OPTION_MASK_MULTIPLE

68836

#define MASK_NO_UPDATE OPTION_MASK_NO_UPDATE

68837

+#define MASK_P8_VECTOR OPTION_MASK_P8_VECTOR

68838

#define MASK_POPCNTB OPTION_MASK_POPCNTB

68839

#define MASK_POPCNTD OPTION_MASK_POPCNTD

68840

#define MASK_PPC_GFXOPT OPTION_MASK_PPC_GFXOPT

68841

@@ -505,6 +576,7 @@

68842

#define MASK_STRING OPTION_MASK_STRING

68843

#define MASK_UPDATE OPTION_MASK_UPDATE

68844

#define MASK_VSX OPTION_MASK_VSX

68845

+#define MASK_VSX_TIMODE OPTION_MASK_VSX_TIMODE

68846

68847

#ifndef IN_LIBGCC2

68848

#define MASK_POWERPC64 OPTION_MASK_POWERPC64

68849

@@ -551,7 +623,8 @@

68850

|| TARGET_CMPB /* ISA 2.05 */ \

68851

|| TARGET_POPCNTD /* ISA 2.06 */ \

68852

|| TARGET_ALTIVEC \

68853

- || TARGET_VSX)))

68854

+ || TARGET_VSX \

68855

+ || TARGET_HARD_FLOAT)))

68856

68857

/* E500 cores only support plain "sync", not lwsync. */

68858

#define TARGET_NO_LWSYNC (rs6000_cpu == PROCESSOR_PPC8540 \

68859

@@ -558,6 +631,25 @@

68860

|| rs6000_cpu == PROCESSOR_PPC8548)

68861

68862

68863

+/* Whether SF/DF operations are supported on the E500. */

68864

+#define TARGET_SF_SPE (TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT \

68865

+ && !TARGET_FPRS)

68866

+

68867

+#define TARGET_DF_SPE (TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT \

68868

+ && !TARGET_FPRS && TARGET_E500_DOUBLE)

68869

+

68870

+/* Whether SF/DF operations are supported by by the normal floating point unit

68871

+ (or the vector/scalar unit). */

68872

+#define TARGET_SF_FPR (TARGET_HARD_FLOAT && TARGET_FPRS \

68873

+ && TARGET_SINGLE_FLOAT)

68874

+

68875

+#define TARGET_DF_FPR (TARGET_HARD_FLOAT && TARGET_FPRS \

68876

+ && TARGET_DOUBLE_FLOAT)

68877

+

68878

+/* Whether SF/DF operations are supported by any hardware. */

68879

+#define TARGET_SF_INSN (TARGET_SF_FPR || TARGET_SF_SPE)

68880

+#define TARGET_DF_INSN (TARGET_DF_FPR || TARGET_DF_SPE)

68881

+

68882

/* Which machine supports the various reciprocal estimate instructions. */

68883

#define TARGET_FRES (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT \

68884

&& TARGET_FPRS && TARGET_SINGLE_FLOAT)

68885

@@ -595,9 +687,6 @@

68886

#define RS6000_RECIP_AUTO_RSQRTE_P(MODE) \

68887

(rs6000_recip_bits[(int)(MODE)] & RS6000_RECIP_MASK_AUTO_RSQRTE)

68888

68889

-#define RS6000_RECIP_HIGH_PRECISION_P(MODE) \

68890

- ((MODE) == SFmode || (MODE) == V4SFmode || TARGET_RECIP_PRECISION)

68891

-

68892

/* The default CPU for TARGET_OPTION_OVERRIDE. */

68893

#define OPTION_TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT

68894

68895

@@ -760,12 +849,6 @@

68896

/* No data type wants to be aligned rounder than this. */

68897

#define BIGGEST_ALIGNMENT 128

68898

68899

-/* A C expression to compute the alignment for a variables in the

68900

- local store. TYPE is the data type, and ALIGN is the alignment

68901

- that the object would ordinarily have. */

68902

-#define LOCAL_ALIGNMENT(TYPE, ALIGN) \

68903

- DATA_ALIGNMENT (TYPE, ALIGN)

68904

-

68905

/* Alignment of field after `int : 0' in a structure. */

68906

#define EMPTY_FIELD_BOUNDARY 32

68907

68908

@@ -775,8 +858,15 @@

68909

/* A bit-field declared as `int' forces `int' alignment for the struct. */

68910

#define PCC_BITFIELD_TYPE_MATTERS 1

68911

68912

-/* Make strings word-aligned so strcpy from constants will be faster.

68913

- Make vector constants quadword aligned. */

68914

+enum data_align { align_abi, align_opt, align_both };

68915

+

68916

+/* A C expression to compute the alignment for a variables in the

68917

+ local store. TYPE is the data type, and ALIGN is the alignment

68918

+ that the object would ordinarily have. */

68919

+#define LOCAL_ALIGNMENT(TYPE, ALIGN) \

68920

+ rs6000_data_alignment (TYPE, ALIGN, align_both)

68921

+

68922

+/* Make strings word-aligned so strcpy from constants will be faster. */

68923

#define CONSTANT_ALIGNMENT(EXP, ALIGN) \

68924

(TREE_CODE (EXP) == STRING_CST \

68925

&& (STRICT_ALIGNMENT || !optimize_size) \

68926

@@ -784,21 +874,14 @@

68927

? BITS_PER_WORD \

68928

: (ALIGN))

68929

68930

-/* Make arrays of chars word-aligned for the same reasons.

68931

- Align vectors to 128 bits. Align SPE vectors and E500 v2 doubles to

68932

+/* Make arrays of chars word-aligned for the same reasons. */

68933

+#define DATA_ALIGNMENT(TYPE, ALIGN) \

68934

+ rs6000_data_alignment (TYPE, ALIGN, align_opt)

68935

+

68936

+/* Align vectors to 128 bits. Align SPE vectors and E500 v2 doubles to

68937

64 bits. */

68938

-#define DATA_ALIGNMENT(TYPE, ALIGN) \

68939

- (TREE_CODE (TYPE) == VECTOR_TYPE \

68940

- ? (((TARGET_SPE && SPE_VECTOR_MODE (TYPE_MODE (TYPE))) \

68941

- || (TARGET_PAIRED_FLOAT && PAIRED_VECTOR_MODE (TYPE_MODE (TYPE)))) \

68942

- ? 64 : 128) \

68943

- : ((TARGET_E500_DOUBLE \

68944

- && TREE_CODE (TYPE) == REAL_TYPE \

68945

- && TYPE_MODE (TYPE) == DFmode) \

68946

- ? 64 \

68947

- : (TREE_CODE (TYPE) == ARRAY_TYPE \

68948

- && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \

68949

- && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN)))

68950

+#define DATA_ABI_ALIGNMENT(TYPE, ALIGN) \

68951

+ rs6000_data_alignment (TYPE, ALIGN, align_abi)

68952

68953

/* Nonzero if move instructions will actually fail to work

68954

when given unaligned data. */

68955

@@ -842,15 +925,17 @@

68956

in inline functions.

68957

68958

Another pseudo (not included in DWARF_FRAME_REGISTERS) is soft frame

68959

- pointer, which is eventually eliminated in favor of SP or FP. */

68960

+ pointer, which is eventually eliminated in favor of SP or FP.

68961

68962

-#define FIRST_PSEUDO_REGISTER 114

68963

+ The 3 HTM registers aren't also included in DWARF_FRAME_REGISTERS. */

68964

68965

+#define FIRST_PSEUDO_REGISTER 117

68966

+

68967

/* This must be included for pre gcc 3.0 glibc compatibility. */

68968

#define PRE_GCC3_DWARF_FRAME_REGISTERS 77

68969

68970

/* Add 32 dwarf columns for synthetic SPE registers. */

68971

-#define DWARF_FRAME_REGISTERS ((FIRST_PSEUDO_REGISTER - 1) + 32)

68972

+#define DWARF_FRAME_REGISTERS ((FIRST_PSEUDO_REGISTER - 4) + 32)

68973

68974

/* The SPE has an additional 32 synthetic registers, with DWARF debug

68975

info numbering for these registers starting at 1200. While eh_frame

68976

@@ -866,7 +951,7 @@

68977

We must map them here to avoid huge unwinder tables mostly consisting

68978

of unused space. */

68979

#define DWARF_REG_TO_UNWIND_COLUMN(r) \

68980

- ((r) > 1200 ? ((r) - 1200 + FIRST_PSEUDO_REGISTER - 1) : (r))

68981

+ ((r) > 1200 ? ((r) - 1200 + (DWARF_FRAME_REGISTERS - 32)) : (r))

68982

68983

/* Use standard DWARF numbering for DWARF debugging information. */

68984

#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO)

68985

@@ -906,7 +991,7 @@

68986

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

68987

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

68988

1, 1 \

68989

- , 1, 1, 1 \

68990

+ , 1, 1, 1, 1, 1, 1 \

68991

}

68992

68993

/* 1 for registers not available across function calls.

68994

@@ -926,7 +1011,7 @@

68995

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

68996

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

68997

1, 1 \

68998

- , 1, 1, 1 \

68999

+ , 1, 1, 1, 1, 1, 1 \

69000

}

69001

69002

/* Like `CALL_USED_REGISTERS' except this macro doesn't require that

69003

@@ -945,7 +1030,7 @@

69004

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

69005

0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \

69006

0, 0 \

69007

- , 0, 0, 0 \

69008

+ , 0, 0, 0, 0, 0, 0 \

69009

}

69010

69011

#define TOTAL_ALTIVEC_REGS (LAST_ALTIVEC_REGNO - FIRST_ALTIVEC_REGNO + 1)

69012

@@ -984,6 +1069,9 @@

69013

vrsave, vscr (fixed)

69014

spe_acc, spefscr (fixed)

69015

sfp (fixed)

69016

+ tfhar (fixed)

69017

+ tfiar (fixed)

69018

+ texasr (fixed)

69019

*/

69020

69021

#if FIXED_R2 == 1

69022

@@ -1004,7 +1092,9 @@

69023

69024

#define REG_ALLOC_ORDER \

69025

{32, \

69026

- 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \

69027

+ /* move fr13 (ie 45) later, so if we need TFmode, it does */ \

69028

+ /* not use fr14 which is a saved register. */ \

69029

+ 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 45, \

69030

33, \

69031

63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \

69032

50, 49, 48, 47, 46, \

69033

@@ -1023,7 +1113,7 @@

69034

96, 95, 94, 93, 92, 91, \

69035

108, 107, 106, 105, 104, 103, 102, 101, 100, 99, 98, 97, \

69036

109, 110, \

69037

- 111, 112, 113 \

69038

+ 111, 112, 113, 114, 115, 116 \

69039

}

69040

69041

/* True if register is floating-point. */

69042

@@ -1064,8 +1154,11 @@

69043

#define VINT_REGNO_P(N) ALTIVEC_REGNO_P (N)

69044

69045

/* Alternate name for any vector register supporting logical operations, no

69046

- matter which instruction set(s) are available. */

69047

-#define VLOGICAL_REGNO_P(N) VFLOAT_REGNO_P (N)

69048

+ matter which instruction set(s) are available. Allow GPRs as well as the

69049

+ vector registers. */

69050

+#define VLOGICAL_REGNO_P(N) \

69051

+ (INT_REGNO_P (N) || ALTIVEC_REGNO_P (N) \

69052

+ || (TARGET_VSX && FP_REGNO_P (N))) \

69053

69054

/* Return number of consecutive hard regs needed starting at reg REGNO

69055

to hold something of mode MODE. */

69056

@@ -1106,7 +1199,7 @@

69057

69058

#define ALTIVEC_OR_VSX_VECTOR_MODE(MODE) \

69059

(ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE) \

69060

- || (MODE) == V2DImode)

69061

+ || (MODE) == V2DImode || (MODE) == V1TImode)

69062

69063

#define SPE_VECTOR_MODE(MODE) \

69064

((MODE) == V4HImode \

69065

@@ -1125,28 +1218,32 @@

69066

/* Value is 1 if it is a good idea to tie two pseudo registers

69067

when one has mode MODE1 and one has mode MODE2.

69068

If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,

69069

- for any hard reg, then this must be 0 for correct output. */

69070

-#define MODES_TIEABLE_P(MODE1, MODE2) \

69071

- (SCALAR_FLOAT_MODE_P (MODE1) \

69072

+ for any hard reg, then this must be 0 for correct output.

69073

+

69074

+ PTImode cannot tie with other modes because PTImode is restricted to even

69075

+ GPR registers, and TImode can go in any GPR as well as VSX registers (PR

69076

+ 57744). */

69077

+#define MODES_TIEABLE_P(MODE1, MODE2) \

69078

+ ((MODE1) == PTImode \

69079

+ ? (MODE2) == PTImode \

69080

+ : (MODE2) == PTImode \

69081

+ ? 0 \

69082

+ : SCALAR_FLOAT_MODE_P (MODE1) \

69083

? SCALAR_FLOAT_MODE_P (MODE2) \

69084

: SCALAR_FLOAT_MODE_P (MODE2) \

69085

- ? SCALAR_FLOAT_MODE_P (MODE1) \

69086

+ ? 0 \

69087

: GET_MODE_CLASS (MODE1) == MODE_CC \

69088

? GET_MODE_CLASS (MODE2) == MODE_CC \

69089

: GET_MODE_CLASS (MODE2) == MODE_CC \

69090

- ? GET_MODE_CLASS (MODE1) == MODE_CC \

69091

+ ? 0 \

69092

: SPE_VECTOR_MODE (MODE1) \

69093

? SPE_VECTOR_MODE (MODE2) \

69094

: SPE_VECTOR_MODE (MODE2) \

69095

- ? SPE_VECTOR_MODE (MODE1) \

69096

- : ALTIVEC_VECTOR_MODE (MODE1) \

69097

- ? ALTIVEC_VECTOR_MODE (MODE2) \

69098

- : ALTIVEC_VECTOR_MODE (MODE2) \

69099

- ? ALTIVEC_VECTOR_MODE (MODE1) \

69100

+ ? 0 \

69101

: ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \

69102

? ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \

69103

: ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \

69104

- ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \

69105

+ ? 0 \

69106

: 1)

69107

69108

/* Post-reload, we can't use any new AltiVec registers, as we already

69109

@@ -1240,6 +1337,7 @@

69110

VSCR_REGS,

69111

SPE_ACC_REGS,

69112

SPEFSCR_REGS,

69113

+ SPR_REGS,

69114

NON_SPECIAL_REGS,

69115

LINK_REGS,

69116

CTR_REGS,

69117

@@ -1270,6 +1368,7 @@

69118

"VSCR_REGS", \

69119

"SPE_ACC_REGS", \

69120

"SPEFSCR_REGS", \

69121

+ "SPR_REGS", \

69122

"NON_SPECIAL_REGS", \

69123

"LINK_REGS", \

69124

"CTR_REGS", \

69125

@@ -1299,6 +1398,7 @@

69126

{ 0x00000000, 0x00000000, 0x00000000, 0x00004000 }, /* VSCR_REGS */ \

69127

{ 0x00000000, 0x00000000, 0x00000000, 0x00008000 }, /* SPE_ACC_REGS */ \

69128

{ 0x00000000, 0x00000000, 0x00000000, 0x00010000 }, /* SPEFSCR_REGS */ \

69129

+ { 0x00000000, 0x00000000, 0x00000000, 0x00040000 }, /* SPR_REGS */ \

69130

{ 0xffffffff, 0xffffffff, 0x00000008, 0x00020000 }, /* NON_SPECIAL_REGS */ \

69131

{ 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, /* LINK_REGS */ \

69132

{ 0x00000000, 0x00000000, 0x00000004, 0x00000000 }, /* CTR_REGS */ \

69133

@@ -1309,7 +1409,7 @@

69134

{ 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, /* CR_REGS */ \

69135

{ 0xffffffff, 0x00000000, 0x00000ffe, 0x00020000 }, /* NON_FLOAT_REGS */ \

69136

{ 0x00000000, 0x00000000, 0x00001000, 0x00000000 }, /* CA_REGS */ \

69137

- { 0xffffffff, 0xffffffff, 0xfffffffe, 0x0003ffff } /* ALL_REGS */ \

69138

+ { 0xffffffff, 0xffffffff, 0xfffffffe, 0x0007ffff } /* ALL_REGS */ \

69139

}

69140

69141

/* The same information, inverted:

69142

@@ -1337,7 +1437,18 @@

69143

RS6000_CONSTRAINT_wa, /* Any VSX register */

69144

RS6000_CONSTRAINT_wd, /* VSX register for V2DF */

69145

RS6000_CONSTRAINT_wf, /* VSX register for V4SF */

69146

+ RS6000_CONSTRAINT_wg, /* FPR register for -mmfpgpr */

69147

+ RS6000_CONSTRAINT_wl, /* FPR register for LFIWAX */

69148

+ RS6000_CONSTRAINT_wm, /* VSX register for direct move */

69149

+ RS6000_CONSTRAINT_wr, /* GPR register if 64-bit */

69150

RS6000_CONSTRAINT_ws, /* VSX register for DF */

69151

+ RS6000_CONSTRAINT_wt, /* VSX register for TImode */

69152

+ RS6000_CONSTRAINT_wu, /* Altivec register for float load/stores. */

69153

+ RS6000_CONSTRAINT_wv, /* Altivec register for double load/stores. */

69154

+ RS6000_CONSTRAINT_ww, /* FP or VSX register for vsx float ops. */

69155

+ RS6000_CONSTRAINT_wx, /* FPR register for STFIWX */

69156

+ RS6000_CONSTRAINT_wy, /* VSX register for SF */

69157

+ RS6000_CONSTRAINT_wz, /* FPR register for LFIWZX */

69158

RS6000_CONSTRAINT_MAX

69159

};

69160

69161

@@ -1425,21 +1536,14 @@

69162

arguments. */

69163

#define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0 || flag_asan != 0)

69164

69165

-/* Size of the outgoing register save area */

69166

-#define RS6000_REG_SAVE ((DEFAULT_ABI == ABI_AIX \

69167

- || DEFAULT_ABI == ABI_DARWIN) \

69168

- ? (TARGET_64BIT ? 64 : 32) \

69169

- : 0)

69170

-

69171

/* Size of the fixed area on the stack */

69172

#define RS6000_SAVE_AREA \

69173

- (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) ? 24 : 8) \

69174

+ ((DEFAULT_ABI == ABI_V4 ? 8 : DEFAULT_ABI == ABI_ELFv2 ? 16 : 24) \

69175

<< (TARGET_64BIT ? 1 : 0))

69176

69177

-/* MEM representing address to save the TOC register */

69178

-#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \

69179

- plus_constant (Pmode, stack_pointer_rtx, \

69180

- (TARGET_32BIT ? 20 : 40)))

69181

+/* Stack offset for toc save slot. */

69182

+#define RS6000_TOC_SAVE_SLOT \

69183

+ ((DEFAULT_ABI == ABI_ELFv2 ? 12 : 20) << (TARGET_64BIT ? 1 : 0))

69184

69185

/* Align an address */

69186

#define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1))

69187

@@ -1489,7 +1593,7 @@

69188

/* Define this if stack space is still allocated for a parameter passed

69189

in a register. The value is the number of bytes allocated to this

69190

area. */

69191

-#define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE

69192

+#define REG_PARM_STACK_SPACE(FNDECL) rs6000_reg_parm_stack_space((FNDECL))

69193

69194

/* Define this if the above stack space is to be considered part of the

69195

space allocated by the caller. */

69196

@@ -1522,7 +1626,7 @@

69197

NONLOCAL needs twice Pmode to maintain both backchain and SP. */

69198

#define STACK_SAVEAREA_MODE(LEVEL) \

69199

(LEVEL == SAVE_FUNCTION ? VOIDmode \

69200

- : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode)

69201

+ : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : PTImode) : Pmode)

69202

69203

/* Minimum and maximum general purpose registers used to hold arguments. */

69204

#define GP_ARG_MIN_REG 3

69205

@@ -1533,9 +1637,8 @@

69206

#define FP_ARG_MIN_REG 33

69207

#define FP_ARG_AIX_MAX_REG 45

69208

#define FP_ARG_V4_MAX_REG 40

69209

-#define FP_ARG_MAX_REG ((DEFAULT_ABI == ABI_AIX \

69210

- || DEFAULT_ABI == ABI_DARWIN) \

69211

- ? FP_ARG_AIX_MAX_REG : FP_ARG_V4_MAX_REG)

69212

+#define FP_ARG_MAX_REG (DEFAULT_ABI == ABI_V4 \

69213

+ ? FP_ARG_V4_MAX_REG : FP_ARG_AIX_MAX_REG)

69214

#define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1)

69215

69216

/* Minimum and maximum AltiVec registers used to hold arguments. */

69217

@@ -1543,10 +1646,17 @@

69218

#define ALTIVEC_ARG_MAX_REG (ALTIVEC_ARG_MIN_REG + 11)

69219

#define ALTIVEC_ARG_NUM_REG (ALTIVEC_ARG_MAX_REG - ALTIVEC_ARG_MIN_REG + 1)

69220

69221

+/* Maximum number of registers per ELFv2 homogeneous aggregate argument. */

69222

+#define AGGR_ARG_NUM_REG 8

69223

+

69224

/* Return registers */

69225

#define GP_ARG_RETURN GP_ARG_MIN_REG

69226

#define FP_ARG_RETURN FP_ARG_MIN_REG

69227

#define ALTIVEC_ARG_RETURN (FIRST_ALTIVEC_REGNO + 2)

69228

+#define FP_ARG_MAX_RETURN (DEFAULT_ABI != ABI_ELFv2 ? FP_ARG_RETURN \

69229

+ : (FP_ARG_RETURN + AGGR_ARG_NUM_REG - 1))

69230

+#define ALTIVEC_ARG_MAX_RETURN (DEFAULT_ABI != ABI_ELFv2 ? ALTIVEC_ARG_RETURN \

69231

+ : (ALTIVEC_ARG_RETURN + AGGR_ARG_NUM_REG - 1))

69232

69233

/* Flags for the call/call_value rtl operations set up by function_arg */

69234

#define CALL_NORMAL 0x00000000 /* no special processing */

69235

@@ -1566,8 +1676,10 @@

69236

On RS/6000, this is r3, fp1, and v2 (for AltiVec). */

69237

#define FUNCTION_VALUE_REGNO_P(N) \

69238

((N) == GP_ARG_RETURN \

69239

- || ((N) == FP_ARG_RETURN && TARGET_HARD_FLOAT && TARGET_FPRS) \

69240

- || ((N) == ALTIVEC_ARG_RETURN && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI))

69241

+ || ((N) >= FP_ARG_RETURN && (N) <= FP_ARG_MAX_RETURN \

69242

+ && TARGET_HARD_FLOAT && TARGET_FPRS) \

69243

+ || ((N) >= ALTIVEC_ARG_RETURN && (N) <= ALTIVEC_ARG_MAX_RETURN \

69244

+ && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI))

69245

69246

/* 1 if N is a possible register number for function argument passing.

69247

On RS/6000, these are r3-r10 and fp1-fp13.

69248

@@ -1691,11 +1803,8 @@

69249

/* Number of bytes into the frame return addresses can be found. See

69250

rs6000_stack_info in rs6000.c for more information on how the different

69251

abi's store the return address. */

69252

-#define RETURN_ADDRESS_OFFSET \

69253

- ((DEFAULT_ABI == ABI_AIX \

69254

- || DEFAULT_ABI == ABI_DARWIN) ? (TARGET_32BIT ? 8 : 16) : \

69255

- (DEFAULT_ABI == ABI_V4) ? 4 : \

69256

- (internal_error ("RETURN_ADDRESS_OFFSET not supported"), 0))

69257

+#define RETURN_ADDRESS_OFFSET \

69258

+ ((DEFAULT_ABI == ABI_V4 ? 4 : 8) << (TARGET_64BIT ? 1 : 0))

69259

69260

/* The current return address is in link register (65). The return address

69261

of anything farther back is accessed normally at an offset of 8 from the

69262

@@ -2215,6 +2324,9 @@

69263

&rs6000_reg_names[111][0], /* spe_acc */ \

69264

&rs6000_reg_names[112][0], /* spefscr */ \

69265

&rs6000_reg_names[113][0], /* sfp */ \

69266

+ &rs6000_reg_names[114][0], /* tfhar */ \

69267

+ &rs6000_reg_names[115][0], /* tfiar */ \

69268

+ &rs6000_reg_names[116][0], /* texasr */ \

69269

}

69270

69271

/* Table of additional register names to use in user input. */

69272

@@ -2268,7 +2380,9 @@

69273

{"vs48", 93}, {"vs49", 94}, {"vs50", 95}, {"vs51", 96}, \

69274

{"vs52", 97}, {"vs53", 98}, {"vs54", 99}, {"vs55", 100}, \

69275

{"vs56", 101},{"vs57", 102},{"vs58", 103},{"vs59", 104}, \

69276

- {"vs60", 105},{"vs61", 106},{"vs62", 107},{"vs63", 108} }

69277

+ {"vs60", 105},{"vs61", 106},{"vs62", 107},{"vs63", 108}, \

69278

+ /* Transactional Memory Facility (HTM) Registers. */ \

69279

+ {"tfhar", 114}, {"tfiar", 115}, {"texasr", 116} }

69280

69281

/* This is how to output an element of a case-vector that is relative. */

69282

69283

@@ -2357,7 +2471,12 @@

69284

#define RS6000_BTC_ATTR_MASK 0x00000700 /* Mask of the attributes. */

69285

69286

/* Miscellaneous information. */

69287

-#define RS6000_BTC_OVERLOADED 0x4000000 /* function is overloaded. */

69288

+#define RS6000_BTC_SPR 0x01000000 /* function references SPRs. */

69289

+#define RS6000_BTC_VOID 0x02000000 /* function has no return value. */

69290

+#define RS6000_BTC_OVERLOADED 0x04000000 /* function is overloaded. */

69291

+#define RS6000_BTC_32BIT 0x08000000 /* function references SPRs. */

69292

+#define RS6000_BTC_64BIT 0x10000000 /* function references SPRs. */

69293

+#define RS6000_BTC_MISC_MASK 0x1f000000 /* Mask of the misc info. */

69294

69295

/* Convenience macros to document the instruction type. */

69296

#define RS6000_BTC_MEM RS6000_BTC_MISC /* load/store touches mem. */

69297

@@ -2369,6 +2488,9 @@

69298

#define RS6000_BTM_ALWAYS 0 /* Always enabled. */

69299

#define RS6000_BTM_ALTIVEC MASK_ALTIVEC /* VMX/altivec vectors. */

69300

#define RS6000_BTM_VSX MASK_VSX /* VSX (vector/scalar). */

69301

+#define RS6000_BTM_P8_VECTOR MASK_P8_VECTOR /* ISA 2.07 vector. */

69302

+#define RS6000_BTM_CRYPTO MASK_CRYPTO /* crypto funcs. */

69303

+#define RS6000_BTM_HTM MASK_HTM /* hardware TM funcs. */

69304

#define RS6000_BTM_SPE MASK_STRING /* E500 */

69305

#define RS6000_BTM_PAIRED MASK_MULHW /* 750CL paired insns. */

69306

#define RS6000_BTM_FRE MASK_POPCNTB /* FRE instruction. */

69307

@@ -2377,15 +2499,22 @@

69308

#define RS6000_BTM_FRSQRTES MASK_POPCNTB /* FRSQRTES instruction. */

69309

#define RS6000_BTM_POPCNTD MASK_POPCNTD /* Target supports ISA 2.06. */

69310

#define RS6000_BTM_CELL MASK_FPRND /* Target is cell powerpc. */

69311

+#define RS6000_BTM_DFP MASK_DFP /* Decimal floating point. */

69312

+#define RS6000_BTM_HARD_FLOAT MASK_SOFT_FLOAT /* Hardware floating point. */

69313

69314

#define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \

69315

| RS6000_BTM_VSX \

69316

+ | RS6000_BTM_P8_VECTOR \

69317

+ | RS6000_BTM_CRYPTO \

69318

| RS6000_BTM_FRE \

69319

| RS6000_BTM_FRES \

69320

| RS6000_BTM_FRSQRTE \

69321

| RS6000_BTM_FRSQRTES \

69322

+ | RS6000_BTM_HTM \

69323

| RS6000_BTM_POPCNTD \

69324

- | RS6000_BTM_CELL)

69325

+ | RS6000_BTM_CELL \

69326

+ | RS6000_BTM_DFP \

69327

+ | RS6000_BTM_HARD_FLOAT)

69328

69329

/* Define builtin enum index. */

69330

69331

@@ -2395,6 +2524,7 @@

69332

#undef RS6000_BUILTIN_A

69333

#undef RS6000_BUILTIN_D

69334

#undef RS6000_BUILTIN_E

69335

+#undef RS6000_BUILTIN_H

69336

#undef RS6000_BUILTIN_P

69337

#undef RS6000_BUILTIN_Q

69338

#undef RS6000_BUILTIN_S

69339

@@ -2406,6 +2536,7 @@

69340

#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

69341

#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

69342

#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

69343

+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

69344

#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

69345

#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

69346

#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE) ENUM,

69347

@@ -2424,6 +2555,7 @@

69348

#undef RS6000_BUILTIN_A

69349

#undef RS6000_BUILTIN_D

69350

#undef RS6000_BUILTIN_E

69351

+#undef RS6000_BUILTIN_H

69352

#undef RS6000_BUILTIN_P

69353

#undef RS6000_BUILTIN_Q

69354

#undef RS6000_BUILTIN_S

69355

@@ -2437,6 +2569,7 @@

69356

RS6000_BTI_opaque_p_V2SI,

69357

RS6000_BTI_opaque_V4SI,

69358

RS6000_BTI_V16QI,

69359

+ RS6000_BTI_V1TI,

69360

RS6000_BTI_V2SI,

69361

RS6000_BTI_V2SF,

69362

RS6000_BTI_V2DI,

69363

@@ -2446,6 +2579,7 @@

69364

RS6000_BTI_V4SF,

69365

RS6000_BTI_V8HI,

69366

RS6000_BTI_unsigned_V16QI,

69367

+ RS6000_BTI_unsigned_V1TI,

69368

RS6000_BTI_unsigned_V8HI,

69369

RS6000_BTI_unsigned_V4SI,

69370

RS6000_BTI_unsigned_V2DI,

69371

@@ -2471,8 +2605,13 @@

69372

RS6000_BTI_UINTSI, /* unsigned_intSI_type_node */

69373

RS6000_BTI_INTDI, /* intDI_type_node */

69374

RS6000_BTI_UINTDI, /* unsigned_intDI_type_node */

69375

+ RS6000_BTI_INTTI, /* intTI_type_node */

69376

+ RS6000_BTI_UINTTI, /* unsigned_intTI_type_node */

69377

RS6000_BTI_float, /* float_type_node */

69378

RS6000_BTI_double, /* double_type_node */

69379

+ RS6000_BTI_long_double, /* long_double_type_node */

69380

+ RS6000_BTI_dfloat64, /* dfloat64_type_node */

69381

+ RS6000_BTI_dfloat128, /* dfloat128_type_node */

69382

RS6000_BTI_void, /* void_type_node */

69383

RS6000_BTI_MAX

69384

};

69385

@@ -2483,6 +2622,7 @@

69386

#define opaque_p_V2SI_type_node (rs6000_builtin_types[RS6000_BTI_opaque_p_V2SI])

69387

#define opaque_V4SI_type_node (rs6000_builtin_types[RS6000_BTI_opaque_V4SI])

69388

#define V16QI_type_node (rs6000_builtin_types[RS6000_BTI_V16QI])

69389

+#define V1TI_type_node (rs6000_builtin_types[RS6000_BTI_V1TI])

69390

#define V2DI_type_node (rs6000_builtin_types[RS6000_BTI_V2DI])

69391

#define V2DF_type_node (rs6000_builtin_types[RS6000_BTI_V2DF])

69392

#define V2SI_type_node (rs6000_builtin_types[RS6000_BTI_V2SI])

69393

@@ -2492,6 +2632,7 @@

69394

#define V4SF_type_node (rs6000_builtin_types[RS6000_BTI_V4SF])

69395

#define V8HI_type_node (rs6000_builtin_types[RS6000_BTI_V8HI])

69396

#define unsigned_V16QI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V16QI])

69397

+#define unsigned_V1TI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V1TI])

69398

#define unsigned_V8HI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V8HI])

69399

#define unsigned_V4SI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V4SI])

69400

#define unsigned_V2DI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V2DI])

69401

@@ -2518,8 +2659,13 @@

69402

#define uintSI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTSI])

69403

#define intDI_type_internal_node (rs6000_builtin_types[RS6000_BTI_INTDI])

69404

#define uintDI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTDI])

69405

+#define intTI_type_internal_node (rs6000_builtin_types[RS6000_BTI_INTTI])

69406

+#define uintTI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTTI])

69407

#define float_type_internal_node (rs6000_builtin_types[RS6000_BTI_float])

69408

#define double_type_internal_node (rs6000_builtin_types[RS6000_BTI_double])

69409

+#define long_double_type_internal_node (rs6000_builtin_types[RS6000_BTI_long_double])

69410

+#define dfloat64_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat64])

69411

+#define dfloat128_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat128])

69412

#define void_type_internal_node (rs6000_builtin_types[RS6000_BTI_void])

69413

69414

extern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX];

69415

Index: gcc/config/rs6000/altivec.md

69416

===================================================================

69417

--- a/src/gcc/config/rs6000/altivec.md (.../tags/gcc_4_8_2_release)

69418

+++ b/src/gcc/config/rs6000/altivec.md (.../branches/gcc-4_8-branch)

69419

@@ -41,15 +41,12 @@

69420

UNSPEC_VMULOSB

69421

UNSPEC_VMULOUH

69422

UNSPEC_VMULOSH

69423

- UNSPEC_VPKUHUM

69424

- UNSPEC_VPKUWUM

69425

UNSPEC_VPKPX

69426

- UNSPEC_VPKSHSS

69427

- UNSPEC_VPKSWSS

69428

- UNSPEC_VPKUHUS

69429

- UNSPEC_VPKSHUS

69430

- UNSPEC_VPKUWUS

69431

- UNSPEC_VPKSWUS

69432

+ UNSPEC_VPACK_SIGN_SIGN_SAT

69433

+ UNSPEC_VPACK_SIGN_UNS_SAT

69434

+ UNSPEC_VPACK_UNS_UNS_SAT

69435

+ UNSPEC_VPACK_UNS_UNS_MOD

69436

+ UNSPEC_VPACK_UNS_UNS_MOD_DIRECT

69437

UNSPEC_VSLV4SI

69438

UNSPEC_VSLO

69439

UNSPEC_VSR

69440

@@ -71,12 +68,12 @@

69441

UNSPEC_VLOGEFP

69442

UNSPEC_VEXPTEFP

69443

UNSPEC_VLSDOI

69444

- UNSPEC_VUPKHSB

69445

+ UNSPEC_VUNPACK_HI_SIGN

69446

+ UNSPEC_VUNPACK_LO_SIGN

69447

+ UNSPEC_VUNPACK_HI_SIGN_DIRECT

69448

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT

69449

UNSPEC_VUPKHPX

69450

- UNSPEC_VUPKHSH

69451

- UNSPEC_VUPKLSB

69452

UNSPEC_VUPKLPX

69453

- UNSPEC_VUPKLSH

69454

UNSPEC_DST

69455

UNSPEC_DSTT

69456

UNSPEC_DSTST

69457

@@ -134,6 +131,21 @@

69458

UNSPEC_VUPKLS_V4SF

69459

UNSPEC_VUPKHU_V4SF

69460

UNSPEC_VUPKLU_V4SF

69461

+ UNSPEC_VGBBD

69462

+ UNSPEC_VMRGH_DIRECT

69463

+ UNSPEC_VMRGL_DIRECT

69464

+ UNSPEC_VSPLT_DIRECT

69465

+ UNSPEC_VSUMSWS_DIRECT

69466

+ UNSPEC_VADDCUQ

69467

+ UNSPEC_VADDEUQM

69468

+ UNSPEC_VADDECUQ

69469

+ UNSPEC_VSUBCUQ

69470

+ UNSPEC_VSUBEUQM

69471

+ UNSPEC_VSUBECUQ

69472

+ UNSPEC_VBPERMQ

69473

+ UNSPEC_BCDADD

69474

+ UNSPEC_BCDSUB

69475

+ UNSPEC_BCD_OVERFLOW

69476

])

69477

69478

(define_c_enum "unspecv"

69479

@@ -146,6 +158,8 @@

69480

69481

;; Vec int modes

69482

(define_mode_iterator VI [V4SI V8HI V16QI])

69483

+;; Like VI, but add ISA 2.07 integer vector ops

69484

+(define_mode_iterator VI2 [V4SI V8HI V16QI V2DI])

69485

;; Short vec in modes

69486

(define_mode_iterator VIshort [V8HI V16QI])

69487

;; Vec float modes

69488

@@ -154,14 +168,25 @@

69489

(define_mode_iterator V [V4SI V8HI V16QI V4SF])

69490

;; Vec modes for move/logical/permute ops, include vector types for move not

69491

;; otherwise handled by altivec (v2df, v2di, ti)

69492

-(define_mode_iterator VM [V4SI V8HI V16QI V4SF V2DF V2DI TI])

69493

+(define_mode_iterator VM [V4SI V8HI V16QI V4SF V2DF V2DI V1TI TI])

69494

69495

;; Like VM, except don't do TImode

69496

-(define_mode_iterator VM2 [V4SI V8HI V16QI V4SF V2DF V2DI])

69497

+(define_mode_iterator VM2 [V4SI V8HI V16QI V4SF V2DF V2DI V1TI])

69498

69499

-(define_mode_attr VI_char [(V4SI "w") (V8HI "h") (V16QI "b")])

69500

-(define_mode_attr VI_scalar [(V4SI "SI") (V8HI "HI") (V16QI "QI")])

69501

+(define_mode_attr VI_char [(V2DI "d") (V4SI "w") (V8HI "h") (V16QI "b")])

69502

+(define_mode_attr VI_scalar [(V2DI "DI") (V4SI "SI") (V8HI "HI") (V16QI "QI")])

69503

+(define_mode_attr VI_unit [(V16QI "VECTOR_UNIT_ALTIVEC_P (V16QImode)")

69504

+ (V8HI "VECTOR_UNIT_ALTIVEC_P (V8HImode)")

69505

+ (V4SI "VECTOR_UNIT_ALTIVEC_P (V4SImode)")

69506

+ (V2DI "VECTOR_UNIT_P8_VECTOR_P (V2DImode)")

69507

+ (V1TI "VECTOR_UNIT_ALTIVEC_P (V1TImode)")])

69508

69509

+;; Vector pack/unpack

69510

+(define_mode_iterator VP [V2DI V4SI V8HI])

69511

+(define_mode_attr VP_small [(V2DI "V4SI") (V4SI "V8HI") (V8HI "V16QI")])

69512

+(define_mode_attr VP_small_lc [(V2DI "v4si") (V4SI "v8hi") (V8HI "v16qi")])

69513

+(define_mode_attr VU_char [(V2DI "w") (V4SI "h") (V8HI "b")])

69514

+

69515

;; Vector move instructions.

69516

(define_insn "*altivec_mov<mode>"

69517

[(set (match_operand:VM2 0 "nonimmediate_operand" "=Z,v,v,*Y,*r,*r,v,v")

69518

@@ -378,10 +403,10 @@

69519

69520

;; add

69521

(define_insn "add<mode>3"

69522

- [(set (match_operand:VI 0 "register_operand" "=v")

69523

- (plus:VI (match_operand:VI 1 "register_operand" "v")

69524

- (match_operand:VI 2 "register_operand" "v")))]

69525

- "TARGET_ALTIVEC"

69526

+ [(set (match_operand:VI2 0 "register_operand" "=v")

69527

+ (plus:VI2 (match_operand:VI2 1 "register_operand" "v")

69528

+ (match_operand:VI2 2 "register_operand" "v")))]

69529

+ "<VI_unit>"

69530

"vaddu<VI_char>m %0,%1,%2"

69531

[(set_attr "type" "vecsimple")])

69532

69533

@@ -398,7 +423,7 @@

69534

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

69535

(match_operand:V4SI 2 "register_operand" "v")]

69536

UNSPEC_VADDCUW))]

69537

- "TARGET_ALTIVEC"

69538

+ "VECTOR_UNIT_ALTIVEC_P (V4SImode)"

69539

"vaddcuw %0,%1,%2"

69540

[(set_attr "type" "vecsimple")])

69541

69542

@@ -405,10 +430,10 @@

69543

(define_insn "altivec_vaddu<VI_char>s"

69544

[(set (match_operand:VI 0 "register_operand" "=v")

69545

(unspec:VI [(match_operand:VI 1 "register_operand" "v")

69546

- (match_operand:VI 2 "register_operand" "v")]

69547

+ (match_operand:VI 2 "register_operand" "v")]

69548

UNSPEC_VADDU))

69549

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

69550

- "TARGET_ALTIVEC"

69551

+ "<VI_unit>"

69552

"vaddu<VI_char>s %0,%1,%2"

69553

[(set_attr "type" "vecsimple")])

69554

69555

@@ -418,16 +443,16 @@

69556

(match_operand:VI 2 "register_operand" "v")]

69557

UNSPEC_VADDS))

69558

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

69559

- "TARGET_ALTIVEC"

69560

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

69561

"vadds<VI_char>s %0,%1,%2"

69562

[(set_attr "type" "vecsimple")])

69563

69564

;; sub

69565

(define_insn "sub<mode>3"

69566

- [(set (match_operand:VI 0 "register_operand" "=v")

69567

- (minus:VI (match_operand:VI 1 "register_operand" "v")

69568

- (match_operand:VI 2 "register_operand" "v")))]

69569

- "TARGET_ALTIVEC"

69570

+ [(set (match_operand:VI2 0 "register_operand" "=v")

69571

+ (minus:VI2 (match_operand:VI2 1 "register_operand" "v")

69572

+ (match_operand:VI2 2 "register_operand" "v")))]

69573

+ "<VI_unit>"

69574

"vsubu<VI_char>m %0,%1,%2"

69575

[(set_attr "type" "vecsimple")])

69576

69577

@@ -444,7 +469,7 @@

69578

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

69579

(match_operand:V4SI 2 "register_operand" "v")]

69580

UNSPEC_VSUBCUW))]

69581

- "TARGET_ALTIVEC"

69582

+ "VECTOR_UNIT_ALTIVEC_P (V4SImode)"

69583

"vsubcuw %0,%1,%2"

69584

[(set_attr "type" "vecsimple")])

69585

69586

@@ -454,7 +479,7 @@

69587

(match_operand:VI 2 "register_operand" "v")]

69588

UNSPEC_VSUBU))

69589

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

69590

- "TARGET_ALTIVEC"

69591

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

69592

"vsubu<VI_char>s %0,%1,%2"

69593

[(set_attr "type" "vecsimple")])

69594

69595

@@ -464,7 +489,7 @@

69596

(match_operand:VI 2 "register_operand" "v")]

69597

UNSPEC_VSUBS))

69598

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

69599

- "TARGET_ALTIVEC"

69600

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

69601

"vsubs<VI_char>s %0,%1,%2"

69602

[(set_attr "type" "vecsimple")])

69603

69604

@@ -483,7 +508,7 @@

69605

(unspec:VI [(match_operand:VI 1 "register_operand" "v")

69606

(match_operand:VI 2 "register_operand" "v")]

69607

UNSPEC_VAVGS))]

69608

- "TARGET_ALTIVEC"

69609

+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

69610

"vavgs<VI_char> %0,%1,%2"

69611

[(set_attr "type" "vecsimple")])

69612

69613

@@ -492,31 +517,31 @@

69614

(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")

69615

(match_operand:V4SF 2 "register_operand" "v")]

69616

UNSPEC_VCMPBFP))]

69617

- "TARGET_ALTIVEC"

69618

+ "VECTOR_UNIT_ALTIVEC_P (V4SImode)"

69619

"vcmpbfp %0,%1,%2"

69620

[(set_attr "type" "veccmp")])

69621

69622

(define_insn "*altivec_eq<mode>"

69623

- [(set (match_operand:VI 0 "altivec_register_operand" "=v")

69624

- (eq:VI (match_operand:VI 1 "altivec_register_operand" "v")

69625

- (match_operand:VI 2 "altivec_register_operand" "v")))]

69626

- "TARGET_ALTIVEC"

69627

+ [(set (match_operand:VI2 0 "altivec_register_operand" "=v")

69628

+ (eq:VI2 (match_operand:VI2 1 "altivec_register_operand" "v")

69629

+ (match_operand:VI2 2 "altivec_register_operand" "v")))]

69630

+ "<VI_unit>"

69631

"vcmpequ<VI_char> %0,%1,%2"

69632

[(set_attr "type" "veccmp")])

69633

69634

(define_insn "*altivec_gt<mode>"

69635

- [(set (match_operand:VI 0 "altivec_register_operand" "=v")

69636

- (gt:VI (match_operand:VI 1 "altivec_register_operand" "v")

69637

- (match_operand:VI 2 "altivec_register_operand" "v")))]

69638

- "TARGET_ALTIVEC"

69639

+ [(set (match_operand:VI2 0 "altivec_register_operand" "=v")

69640

+ (gt:VI2 (match_operand:VI2 1 "altivec_register_operand" "v")

69641

+ (match_operand:VI2 2 "altivec_register_operand" "v")))]

69642

+ "<VI_unit>"

69643

"vcmpgts<VI_char> %0,%1,%2"

69644

[(set_attr "type" "veccmp")])

69645

69646

(define_insn "*altivec_gtu<mode>"

69647

- [(set (match_operand:VI 0 "altivec_register_operand" "=v")

69648

- (gtu:VI (match_operand:VI 1 "altivec_register_operand" "v")

69649

- (match_operand:VI 2 "altivec_register_operand" "v")))]

69650

- "TARGET_ALTIVEC"

69651

+ [(set (match_operand:VI2 0 "altivec_register_operand" "=v")

69652

+ (gtu:VI2 (match_operand:VI2 1 "altivec_register_operand" "v")

69653

+ (match_operand:VI2 2 "altivec_register_operand" "v")))]

69654

+ "<VI_unit>"

69655

"vcmpgtu<VI_char> %0,%1,%2"

69656

[(set_attr "type" "veccmp")])

69657

69658

@@ -642,7 +667,7 @@

69659

convert_move (small_swap, swap, 0);

69660

69661

low_product = gen_reg_rtx (V4SImode);

69662

- emit_insn (gen_vec_widen_umult_odd_v8hi (low_product, one, two));

69663

+ emit_insn (gen_altivec_vmulouh (low_product, one, two));

69664

69665

high_product = gen_reg_rtx (V4SImode);

69666

emit_insn (gen_altivec_vmsumuhm (high_product, one, small_swap, zero));

69667

@@ -666,14 +691,23 @@

69668

rtx high = gen_reg_rtx (V4SImode);

69669

rtx low = gen_reg_rtx (V4SImode);

69670

69671

- emit_insn (gen_vec_widen_smult_even_v8hi (even, operands[1], operands[2]));

69672

- emit_insn (gen_vec_widen_smult_odd_v8hi (odd, operands[1], operands[2]));

69673

+ if (BYTES_BIG_ENDIAN)

69674

+ {

69675

+ emit_insn (gen_altivec_vmulesh (even, operands[1], operands[2]));

69676

+ emit_insn (gen_altivec_vmulosh (odd, operands[1], operands[2]));

69677

+ emit_insn (gen_altivec_vmrghw_direct (high, even, odd));

69678

+ emit_insn (gen_altivec_vmrglw_direct (low, even, odd));

69679

+ emit_insn (gen_altivec_vpkuwum_direct (operands[0], high, low));

69680

+ }

69681

+ else

69682

+ {

69683

+ emit_insn (gen_altivec_vmulosh (even, operands[1], operands[2]));

69684

+ emit_insn (gen_altivec_vmulesh (odd, operands[1], operands[2]));

69685

+ emit_insn (gen_altivec_vmrghw_direct (high, odd, even));

69686

+ emit_insn (gen_altivec_vmrglw_direct (low, odd, even));

69687

+ emit_insn (gen_altivec_vpkuwum_direct (operands[0], low, high));

69688

+ }

69689

69690

- emit_insn (gen_altivec_vmrghw (high, even, odd));

69691

- emit_insn (gen_altivec_vmrglw (low, even, odd));

69692

-

69693

- emit_insn (gen_altivec_vpkuwum (operands[0], high, low));

69694

-

69695

DONE;

69696

}")

69697

69698

@@ -744,18 +778,18 @@

69699

;; max

69700

69701

(define_insn "umax<mode>3"

69702

- [(set (match_operand:VI 0 "register_operand" "=v")

69703

- (umax:VI (match_operand:VI 1 "register_operand" "v")

69704

- (match_operand:VI 2 "register_operand" "v")))]

69705

- "TARGET_ALTIVEC"

69706

+ [(set (match_operand:VI2 0 "register_operand" "=v")

69707

+ (umax:VI2 (match_operand:VI2 1 "register_operand" "v")

69708

+ (match_operand:VI2 2 "register_operand" "v")))]

69709

+ "<VI_unit>"

69710

"vmaxu<VI_char> %0,%1,%2"

69711

[(set_attr "type" "vecsimple")])

69712

69713

(define_insn "smax<mode>3"

69714

- [(set (match_operand:VI 0 "register_operand" "=v")

69715

- (smax:VI (match_operand:VI 1 "register_operand" "v")

69716

- (match_operand:VI 2 "register_operand" "v")))]

69717

- "TARGET_ALTIVEC"

69718

+ [(set (match_operand:VI2 0 "register_operand" "=v")

69719

+ (smax:VI2 (match_operand:VI2 1 "register_operand" "v")

69720

+ (match_operand:VI2 2 "register_operand" "v")))]

69721

+ "<VI_unit>"

69722

"vmaxs<VI_char> %0,%1,%2"

69723

[(set_attr "type" "vecsimple")])

69724

69725

@@ -768,18 +802,18 @@

69726

[(set_attr "type" "veccmp")])

69727

69728

(define_insn "umin<mode>3"

69729

- [(set (match_operand:VI 0 "register_operand" "=v")

69730

- (umin:VI (match_operand:VI 1 "register_operand" "v")

69731

- (match_operand:VI 2 "register_operand" "v")))]

69732

- "TARGET_ALTIVEC"

69733

+ [(set (match_operand:VI2 0 "register_operand" "=v")

69734

+ (umin:VI2 (match_operand:VI2 1 "register_operand" "v")

69735

+ (match_operand:VI2 2 "register_operand" "v")))]

69736

+ "<VI_unit>"

69737

"vminu<VI_char> %0,%1,%2"

69738

[(set_attr "type" "vecsimple")])

69739

69740

(define_insn "smin<mode>3"

69741

- [(set (match_operand:VI 0 "register_operand" "=v")

69742

- (smin:VI (match_operand:VI 1 "register_operand" "v")

69743

- (match_operand:VI 2 "register_operand" "v")))]

69744

- "TARGET_ALTIVEC"

69745

+ [(set (match_operand:VI2 0 "register_operand" "=v")

69746

+ (smin:VI2 (match_operand:VI2 1 "register_operand" "v")

69747

+ (match_operand:VI2 2 "register_operand" "v")))]

69748

+ "<VI_unit>"

69749

"vmins<VI_char> %0,%1,%2"

69750

[(set_attr "type" "vecsimple")])

69751

69752

@@ -823,9 +857,41 @@

69753

"vmladduhm %0,%1,%2,%3"

69754

[(set_attr "type" "veccomplex")])

69755

69756

-(define_insn "altivec_vmrghb"

69757

+(define_expand "altivec_vmrghb"

69758

+ [(use (match_operand:V16QI 0 "register_operand" ""))

69759

+ (use (match_operand:V16QI 1 "register_operand" ""))

69760

+ (use (match_operand:V16QI 2 "register_operand" ""))]

69761

+ "TARGET_ALTIVEC"

69762

+{

69763

+ rtvec v;

69764

+ rtx x;

69765

+

69766

+ /* Special handling for LE with -maltivec=be. */

69767

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

69768

+ {

69769

+ v = gen_rtvec (16, GEN_INT (8), GEN_INT (24), GEN_INT (9), GEN_INT (25),

69770

+ GEN_INT (10), GEN_INT (26), GEN_INT (11), GEN_INT (27),

69771

+ GEN_INT (12), GEN_INT (28), GEN_INT (13), GEN_INT (29),

69772

+ GEN_INT (14), GEN_INT (30), GEN_INT (15), GEN_INT (31));

69773

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[2], operands[1]);

69774

+ }

69775

+ else

69776

+ {

69777

+ v = gen_rtvec (16, GEN_INT (0), GEN_INT (16), GEN_INT (1), GEN_INT (17),

69778

+ GEN_INT (2), GEN_INT (18), GEN_INT (3), GEN_INT (19),

69779

+ GEN_INT (4), GEN_INT (20), GEN_INT (5), GEN_INT (21),

69780

+ GEN_INT (6), GEN_INT (22), GEN_INT (7), GEN_INT (23));

69781

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[1], operands[2]);

69782

+ }

69783

+

69784

+ x = gen_rtx_VEC_SELECT (V16QImode, x, gen_rtx_PARALLEL (VOIDmode, v));

69785

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

69786

+ DONE;

69787

+})

69788

+

69789

+(define_insn "*altivec_vmrghb_internal"

69790

[(set (match_operand:V16QI 0 "register_operand" "=v")

69791

- (vec_select:V16QI

69792

+ (vec_select:V16QI

69793

(vec_concat:V32QI

69794

(match_operand:V16QI 1 "register_operand" "v")

69795

(match_operand:V16QI 2 "register_operand" "v"))

69796

@@ -838,12 +904,54 @@

69797

(const_int 6) (const_int 22)

69798

(const_int 7) (const_int 23)])))]

69799

"TARGET_ALTIVEC"

69800

+{

69801

+ if (BYTES_BIG_ENDIAN)

69802

+ return "vmrghb %0,%1,%2";

69803

+ else

69804

+ return "vmrglb %0,%2,%1";

69805

+}

69806

+ [(set_attr "type" "vecperm")])

69807

+

69808

+(define_insn "altivec_vmrghb_direct"

69809

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

69810

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")

69811

+ (match_operand:V16QI 2 "register_operand" "v")]

69812

+ UNSPEC_VMRGH_DIRECT))]

69813

+ "TARGET_ALTIVEC"

69814

"vmrghb %0,%1,%2"

69815

[(set_attr "type" "vecperm")])

69816

69817

-(define_insn "altivec_vmrghh"

69818

+(define_expand "altivec_vmrghh"

69819

+ [(use (match_operand:V8HI 0 "register_operand" ""))

69820

+ (use (match_operand:V8HI 1 "register_operand" ""))

69821

+ (use (match_operand:V8HI 2 "register_operand" ""))]

69822

+ "TARGET_ALTIVEC"

69823

+{

69824

+ rtvec v;

69825

+ rtx x;

69826

+

69827

+ /* Special handling for LE with -maltivec=be. */

69828

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

69829

+ {

69830

+ v = gen_rtvec (8, GEN_INT (4), GEN_INT (12), GEN_INT (5), GEN_INT (13),

69831

+ GEN_INT (6), GEN_INT (14), GEN_INT (7), GEN_INT (15));

69832

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[2], operands[1]);

69833

+ }

69834

+ else

69835

+ {

69836

+ v = gen_rtvec (8, GEN_INT (0), GEN_INT (8), GEN_INT (1), GEN_INT (9),

69837

+ GEN_INT (2), GEN_INT (10), GEN_INT (3), GEN_INT (11));

69838

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[1], operands[2]);

69839

+ }

69840

+

69841

+ x = gen_rtx_VEC_SELECT (V8HImode, x, gen_rtx_PARALLEL (VOIDmode, v));

69842

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

69843

+ DONE;

69844

+})

69845

+

69846

+(define_insn "*altivec_vmrghh_internal"

69847

[(set (match_operand:V8HI 0 "register_operand" "=v")

69848

- (vec_select:V8HI

69849

+ (vec_select:V8HI

69850

(vec_concat:V16HI

69851

(match_operand:V8HI 1 "register_operand" "v")

69852

(match_operand:V8HI 2 "register_operand" "v"))

69853

@@ -852,10 +960,50 @@

69854

(const_int 2) (const_int 10)

69855

(const_int 3) (const_int 11)])))]

69856

"TARGET_ALTIVEC"

69857

+{

69858

+ if (BYTES_BIG_ENDIAN)

69859

+ return "vmrghh %0,%1,%2";

69860

+ else

69861

+ return "vmrglh %0,%2,%1";

69862

+}

69863

+ [(set_attr "type" "vecperm")])

69864

+

69865

+(define_insn "altivec_vmrghh_direct"

69866

+ [(set (match_operand:V8HI 0 "register_operand" "=v")

69867

+ (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "v")

69868

+ (match_operand:V8HI 2 "register_operand" "v")]

69869

+ UNSPEC_VMRGH_DIRECT))]

69870

+ "TARGET_ALTIVEC"

69871

"vmrghh %0,%1,%2"

69872

[(set_attr "type" "vecperm")])

69873

69874

-(define_insn "altivec_vmrghw"

69875

+(define_expand "altivec_vmrghw"

69876

+ [(use (match_operand:V4SI 0 "register_operand" ""))

69877

+ (use (match_operand:V4SI 1 "register_operand" ""))

69878

+ (use (match_operand:V4SI 2 "register_operand" ""))]

69879

+ "VECTOR_MEM_ALTIVEC_P (V4SImode)"

69880

+{

69881

+ rtvec v;

69882

+ rtx x;

69883

+

69884

+ /* Special handling for LE with -maltivec=be. */

69885

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

69886

+ {

69887

+ v = gen_rtvec (4, GEN_INT (2), GEN_INT (6), GEN_INT (3), GEN_INT (7));

69888

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[2], operands[1]);

69889

+ }

69890

+ else

69891

+ {

69892

+ v = gen_rtvec (4, GEN_INT (0), GEN_INT (4), GEN_INT (1), GEN_INT (5));

69893

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[1], operands[2]);

69894

+ }

69895

+

69896

+ x = gen_rtx_VEC_SELECT (V4SImode, x, gen_rtx_PARALLEL (VOIDmode, v));

69897

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

69898

+ DONE;

69899

+})

69900

+

69901

+(define_insn "*altivec_vmrghw_internal"

69902

[(set (match_operand:V4SI 0 "register_operand" "=v")

69903

(vec_select:V4SI

69904

(vec_concat:V8SI

69905

@@ -864,6 +1012,20 @@

69906

(parallel [(const_int 0) (const_int 4)

69907

(const_int 1) (const_int 5)])))]

69908

"VECTOR_MEM_ALTIVEC_P (V4SImode)"

69909

+{

69910

+ if (BYTES_BIG_ENDIAN)

69911

+ return "vmrghw %0,%1,%2";

69912

+ else

69913

+ return "vmrglw %0,%2,%1";

69914

+}

69915

+ [(set_attr "type" "vecperm")])

69916

+

69917

+(define_insn "altivec_vmrghw_direct"

69918

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

69919

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

69920

+ (match_operand:V4SI 2 "register_operand" "v")]

69921

+ UNSPEC_VMRGH_DIRECT))]

69922

+ "TARGET_ALTIVEC"

69923

"vmrghw %0,%1,%2"

69924

[(set_attr "type" "vecperm")])

69925

69926

@@ -876,10 +1038,47 @@

69927

(parallel [(const_int 0) (const_int 4)

69928

(const_int 1) (const_int 5)])))]

69929

"VECTOR_MEM_ALTIVEC_P (V4SFmode)"

69930

- "vmrghw %0,%1,%2"

69931

+{

69932

+ if (BYTES_BIG_ENDIAN)

69933

+ return "vmrghw %0,%1,%2";

69934

+ else

69935

+ return "vmrglw %0,%2,%1";

69936

+}

69937

[(set_attr "type" "vecperm")])

69938

69939

-(define_insn "altivec_vmrglb"

69940

+(define_expand "altivec_vmrglb"

69941

+ [(use (match_operand:V16QI 0 "register_operand" ""))

69942

+ (use (match_operand:V16QI 1 "register_operand" ""))

69943

+ (use (match_operand:V16QI 2 "register_operand" ""))]

69944

+ "TARGET_ALTIVEC"

69945

+{

69946

+ rtvec v;

69947

+ rtx x;

69948

+

69949

+ /* Special handling for LE with -maltivec=be. */

69950

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

69951

+ {

69952

+ v = gen_rtvec (16, GEN_INT (0), GEN_INT (16), GEN_INT (1), GEN_INT (17),

69953

+ GEN_INT (2), GEN_INT (18), GEN_INT (3), GEN_INT (19),

69954

+ GEN_INT (4), GEN_INT (20), GEN_INT (5), GEN_INT (21),

69955

+ GEN_INT (6), GEN_INT (22), GEN_INT (7), GEN_INT (23));

69956

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[2], operands[1]);

69957

+ }

69958

+ else

69959

+ {

69960

+ v = gen_rtvec (16, GEN_INT (8), GEN_INT (24), GEN_INT (9), GEN_INT (25),

69961

+ GEN_INT (10), GEN_INT (26), GEN_INT (11), GEN_INT (27),

69962

+ GEN_INT (12), GEN_INT (28), GEN_INT (13), GEN_INT (29),

69963

+ GEN_INT (14), GEN_INT (30), GEN_INT (15), GEN_INT (31));

69964

+ x = gen_rtx_VEC_CONCAT (V32QImode, operands[1], operands[2]);

69965

+ }

69966

+

69967

+ x = gen_rtx_VEC_SELECT (V16QImode, x, gen_rtx_PARALLEL (VOIDmode, v));

69968

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

69969

+ DONE;

69970

+})

69971

+

69972

+(define_insn "*altivec_vmrglb_internal"

69973

[(set (match_operand:V16QI 0 "register_operand" "=v")

69974

(vec_select:V16QI

69975

(vec_concat:V32QI

69976

@@ -894,10 +1093,52 @@

69977

(const_int 14) (const_int 30)

69978

(const_int 15) (const_int 31)])))]

69979

"TARGET_ALTIVEC"

69980

+{

69981

+ if (BYTES_BIG_ENDIAN)

69982

+ return "vmrglb %0,%1,%2";

69983

+ else

69984

+ return "vmrghb %0,%2,%1";

69985

+}

69986

+ [(set_attr "type" "vecperm")])

69987

+

69988

+(define_insn "altivec_vmrglb_direct"

69989

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

69990

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")

69991

+ (match_operand:V16QI 2 "register_operand" "v")]

69992

+ UNSPEC_VMRGL_DIRECT))]

69993

+ "TARGET_ALTIVEC"

69994

"vmrglb %0,%1,%2"

69995

[(set_attr "type" "vecperm")])

69996

69997

-(define_insn "altivec_vmrglh"

69998

+(define_expand "altivec_vmrglh"

69999

+ [(use (match_operand:V8HI 0 "register_operand" ""))

70000

+ (use (match_operand:V8HI 1 "register_operand" ""))

70001

+ (use (match_operand:V8HI 2 "register_operand" ""))]

70002

+ "TARGET_ALTIVEC"

70003

+{

70004

+ rtvec v;

70005

+ rtx x;

70006

+

70007

+ /* Special handling for LE with -maltivec=be. */

70008

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

70009

+ {

70010

+ v = gen_rtvec (8, GEN_INT (0), GEN_INT (8), GEN_INT (1), GEN_INT (9),

70011

+ GEN_INT (2), GEN_INT (10), GEN_INT (3), GEN_INT (11));

70012

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[2], operands[1]);

70013

+ }

70014

+ else

70015

+ {

70016

+ v = gen_rtvec (8, GEN_INT (4), GEN_INT (12), GEN_INT (5), GEN_INT (13),

70017

+ GEN_INT (6), GEN_INT (14), GEN_INT (7), GEN_INT (15));

70018

+ x = gen_rtx_VEC_CONCAT (V16HImode, operands[1], operands[2]);

70019

+ }

70020

+

70021

+ x = gen_rtx_VEC_SELECT (V8HImode, x, gen_rtx_PARALLEL (VOIDmode, v));

70022

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

70023

+ DONE;

70024

+})

70025

+

70026

+(define_insn "*altivec_vmrglh_internal"

70027

[(set (match_operand:V8HI 0 "register_operand" "=v")

70028

(vec_select:V8HI

70029

(vec_concat:V16HI

70030

@@ -908,10 +1149,50 @@

70031

(const_int 6) (const_int 14)

70032

(const_int 7) (const_int 15)])))]

70033

"TARGET_ALTIVEC"

70034

+{

70035

+ if (BYTES_BIG_ENDIAN)

70036

+ return "vmrglh %0,%1,%2";

70037

+ else

70038

+ return "vmrghh %0,%2,%1";

70039

+}

70040

+ [(set_attr "type" "vecperm")])

70041

+

70042

+(define_insn "altivec_vmrglh_direct"

70043

+ [(set (match_operand:V8HI 0 "register_operand" "=v")

70044

+ (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "v")

70045

+ (match_operand:V8HI 2 "register_operand" "v")]

70046

+ UNSPEC_VMRGL_DIRECT))]

70047

+ "TARGET_ALTIVEC"

70048

"vmrglh %0,%1,%2"

70049

[(set_attr "type" "vecperm")])

70050

70051

-(define_insn "altivec_vmrglw"

70052

+(define_expand "altivec_vmrglw"

70053

+ [(use (match_operand:V4SI 0 "register_operand" ""))

70054

+ (use (match_operand:V4SI 1 "register_operand" ""))

70055

+ (use (match_operand:V4SI 2 "register_operand" ""))]

70056

+ "VECTOR_MEM_ALTIVEC_P (V4SImode)"

70057

+{

70058

+ rtvec v;

70059

+ rtx x;

70060

+

70061

+ /* Special handling for LE with -maltivec=be. */

70062

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

70063

+ {

70064

+ v = gen_rtvec (4, GEN_INT (0), GEN_INT (4), GEN_INT (1), GEN_INT (5));

70065

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[2], operands[1]);

70066

+ }

70067

+ else

70068

+ {

70069

+ v = gen_rtvec (4, GEN_INT (2), GEN_INT (6), GEN_INT (3), GEN_INT (7));

70070

+ x = gen_rtx_VEC_CONCAT (V8SImode, operands[1], operands[2]);

70071

+ }

70072

+

70073

+ x = gen_rtx_VEC_SELECT (V4SImode, x, gen_rtx_PARALLEL (VOIDmode, v));

70074

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

70075

+ DONE;

70076

+})

70077

+

70078

+(define_insn "*altivec_vmrglw_internal"

70079

[(set (match_operand:V4SI 0 "register_operand" "=v")

70080

(vec_select:V4SI

70081

(vec_concat:V8SI

70082

@@ -920,6 +1201,20 @@

70083

(parallel [(const_int 2) (const_int 6)

70084

(const_int 3) (const_int 7)])))]

70085

"VECTOR_MEM_ALTIVEC_P (V4SImode)"

70086

+{

70087

+ if (BYTES_BIG_ENDIAN)

70088

+ return "vmrglw %0,%1,%2";

70089

+ else

70090

+ return "vmrghw %0,%2,%1";

70091

+}

70092

+ [(set_attr "type" "vecperm")])

70093

+

70094

+(define_insn "altivec_vmrglw_direct"

70095

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

70096

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

70097

+ (match_operand:V4SI 2 "register_operand" "v")]

70098

+ UNSPEC_VMRGL_DIRECT))]

70099

+ "TARGET_ALTIVEC"

70100

"vmrglw %0,%1,%2"

70101

[(set_attr "type" "vecperm")])

70102

70103

@@ -932,10 +1227,154 @@

70104

(parallel [(const_int 2) (const_int 6)

70105

(const_int 3) (const_int 7)])))]

70106

"VECTOR_MEM_ALTIVEC_P (V4SFmode)"

70107

- "vmrglw %0,%1,%2"

70108

+{

70109

+ if (BYTES_BIG_ENDIAN)

70110

+ return "vmrglw %0,%1,%2";

70111

+ else

70112

+ return "vmrghw %0,%2,%1";

70113

+}

70114

[(set_attr "type" "vecperm")])

70115

70116

-(define_insn "vec_widen_umult_even_v16qi"

70117

+;; Power8 vector merge even/odd

70118

+(define_insn "p8_vmrgew"

70119

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

70120

+ (vec_select:V4SI

70121

+ (vec_concat:V8SI

70122

+ (match_operand:V4SI 1 "register_operand" "v")

70123

+ (match_operand:V4SI 2 "register_operand" "v"))

70124

+ (parallel [(const_int 0) (const_int 4)

70125

+ (const_int 2) (const_int 6)])))]

70126

+ "TARGET_P8_VECTOR"

70127

+{

70128

+ if (BYTES_BIG_ENDIAN)

70129

+ return "vmrgew %0,%1,%2";

70130

+ else

70131

+ return "vmrgow %0,%2,%1";

70132

+}

70133

+ [(set_attr "type" "vecperm")])

70134

+

70135

+(define_insn "p8_vmrgow"

70136

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

70137

+ (vec_select:V4SI

70138

+ (vec_concat:V8SI

70139

+ (match_operand:V4SI 1 "register_operand" "v")

70140

+ (match_operand:V4SI 2 "register_operand" "v"))

70141

+ (parallel [(const_int 1) (const_int 5)

70142

+ (const_int 3) (const_int 7)])))]

70143

+ "TARGET_P8_VECTOR"

70144

+{

70145

+ if (BYTES_BIG_ENDIAN)

70146

+ return "vmrgow %0,%1,%2";

70147

+ else

70148

+ return "vmrgew %0,%2,%1";

70149

+}

70150

+ [(set_attr "type" "vecperm")])

70151

+

70152

+(define_expand "vec_widen_umult_even_v16qi"

70153

+ [(use (match_operand:V8HI 0 "register_operand" ""))

70154

+ (use (match_operand:V16QI 1 "register_operand" ""))

70155

+ (use (match_operand:V16QI 2 "register_operand" ""))]

70156

+ "TARGET_ALTIVEC"

70157

+{

70158

+ if (VECTOR_ELT_ORDER_BIG)

70159

+ emit_insn (gen_altivec_vmuleub (operands[0], operands[1], operands[2]));

70160

+ else

70161

+ emit_insn (gen_altivec_vmuloub (operands[0], operands[1], operands[2]));

70162

+ DONE;

70163

+})

70164

+

70165

+(define_expand "vec_widen_smult_even_v16qi"

70166

+ [(use (match_operand:V8HI 0 "register_operand" ""))

70167

+ (use (match_operand:V16QI 1 "register_operand" ""))

70168

+ (use (match_operand:V16QI 2 "register_operand" ""))]

70169

+ "TARGET_ALTIVEC"

70170

+{

70171

+ if (VECTOR_ELT_ORDER_BIG)

70172

+ emit_insn (gen_altivec_vmulesb (operands[0], operands[1], operands[2]));

70173

+ else

70174

+ emit_insn (gen_altivec_vmulosb (operands[0], operands[1], operands[2]));

70175

+ DONE;

70176

+})

70177

+

70178

+(define_expand "vec_widen_umult_even_v8hi"

70179

+ [(use (match_operand:V4SI 0 "register_operand" ""))

70180

+ (use (match_operand:V8HI 1 "register_operand" ""))

70181

+ (use (match_operand:V8HI 2 "register_operand" ""))]

70182

+ "TARGET_ALTIVEC"

70183

+{

70184

+ if (VECTOR_ELT_ORDER_BIG)

70185

+ emit_insn (gen_altivec_vmuleuh (operands[0], operands[1], operands[2]));

70186

+ else

70187

+ emit_insn (gen_altivec_vmulouh (operands[0], operands[1], operands[2]));

70188

+ DONE;

70189

+})

70190

+

70191

+(define_expand "vec_widen_smult_even_v8hi"

70192

+ [(use (match_operand:V4SI 0 "register_operand" ""))

70193

+ (use (match_operand:V8HI 1 "register_operand" ""))

70194

+ (use (match_operand:V8HI 2 "register_operand" ""))]

70195

+ "TARGET_ALTIVEC"

70196

+{

70197

+ if (VECTOR_ELT_ORDER_BIG)

70198

+ emit_insn (gen_altivec_vmulesh (operands[0], operands[1], operands[2]));

70199

+ else

70200

+ emit_insn (gen_altivec_vmulosh (operands[0], operands[1], operands[2]));

70201

+ DONE;

70202

+})

70203

+

70204

+(define_expand "vec_widen_umult_odd_v16qi"

70205

+ [(use (match_operand:V8HI 0 "register_operand" ""))

70206

+ (use (match_operand:V16QI 1 "register_operand" ""))

70207

+ (use (match_operand:V16QI 2 "register_operand" ""))]

70208

+ "TARGET_ALTIVEC"

70209

+{

70210

+ if (VECTOR_ELT_ORDER_BIG)

70211

+ emit_insn (gen_altivec_vmuloub (operands[0], operands[1], operands[2]));

70212

+ else

70213

+ emit_insn (gen_altivec_vmuleub (operands[0], operands[1], operands[2]));

70214

+ DONE;

70215

+})

70216

+

70217

+(define_expand "vec_widen_smult_odd_v16qi"

70218

+ [(use (match_operand:V8HI 0 "register_operand" ""))

70219

+ (use (match_operand:V16QI 1 "register_operand" ""))

70220

+ (use (match_operand:V16QI 2 "register_operand" ""))]

70221

+ "TARGET_ALTIVEC"

70222

+{

70223

+ if (VECTOR_ELT_ORDER_BIG)

70224

+ emit_insn (gen_altivec_vmulosb (operands[0], operands[1], operands[2]));

70225

+ else

70226

+ emit_insn (gen_altivec_vmulesb (operands[0], operands[1], operands[2]));

70227

+ DONE;

70228

+})

70229

+

70230

+(define_expand "vec_widen_umult_odd_v8hi"

70231

+ [(use (match_operand:V4SI 0 "register_operand" ""))

70232

+ (use (match_operand:V8HI 1 "register_operand" ""))

70233

+ (use (match_operand:V8HI 2 "register_operand" ""))]

70234

+ "TARGET_ALTIVEC"

70235

+{

70236

+ if (VECTOR_ELT_ORDER_BIG)

70237

+ emit_insn (gen_altivec_vmulouh (operands[0], operands[1], operands[2]));

70238

+ else

70239

+ emit_insn (gen_altivec_vmuleuh (operands[0], operands[1], operands[2]));

70240

+ DONE;

70241

+})

70242

+

70243

+(define_expand "vec_widen_smult_odd_v8hi"

70244

+ [(use (match_operand:V4SI 0 "register_operand" ""))

70245

+ (use (match_operand:V8HI 1 "register_operand" ""))

70246

+ (use (match_operand:V8HI 2 "register_operand" ""))]

70247

+ "TARGET_ALTIVEC"

70248

+{

70249

+ if (VECTOR_ELT_ORDER_BIG)

70250

+ emit_insn (gen_altivec_vmulosh (operands[0], operands[1], operands[2]));

70251

+ else

70252

+ emit_insn (gen_altivec_vmulesh (operands[0], operands[1], operands[2]));

70253

+ DONE;

70254

+})

70255

+

70256

+(define_insn "altivec_vmuleub"

70257

[(set (match_operand:V8HI 0 "register_operand" "=v")

70258

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

70259

(match_operand:V16QI 2 "register_operand" "v")]

70260

@@ -944,43 +1383,25 @@

70261

"vmuleub %0,%1,%2"

70262

[(set_attr "type" "veccomplex")])

70263

70264

-(define_insn "vec_widen_smult_even_v16qi"

70265

+(define_insn "altivec_vmuloub"

70266

[(set (match_operand:V8HI 0 "register_operand" "=v")

70267

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

70268

(match_operand:V16QI 2 "register_operand" "v")]

70269

- UNSPEC_VMULESB))]

70270

+ UNSPEC_VMULOUB))]

70271

"TARGET_ALTIVEC"

70272

- "vmulesb %0,%1,%2"

70273

+ "vmuloub %0,%1,%2"

70274

[(set_attr "type" "veccomplex")])

70275

70276

-(define_insn "vec_widen_umult_even_v8hi"

70277

- [(set (match_operand:V4SI 0 "register_operand" "=v")

70278

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

70279

- (match_operand:V8HI 2 "register_operand" "v")]

70280

- UNSPEC_VMULEUH))]

70281

- "TARGET_ALTIVEC"

70282

- "vmuleuh %0,%1,%2"

70283

- [(set_attr "type" "veccomplex")])

70284

-

70285

-(define_insn "vec_widen_smult_even_v8hi"

70286

- [(set (match_operand:V4SI 0 "register_operand" "=v")

70287

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

70288

- (match_operand:V8HI 2 "register_operand" "v")]

70289

- UNSPEC_VMULESH))]

70290

- "TARGET_ALTIVEC"

70291

- "vmulesh %0,%1,%2"

70292

- [(set_attr "type" "veccomplex")])

70293

-

70294

-(define_insn "vec_widen_umult_odd_v16qi"

70295

+(define_insn "altivec_vmulesb"

70296

[(set (match_operand:V8HI 0 "register_operand" "=v")

70297

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

70298

(match_operand:V16QI 2 "register_operand" "v")]

70299

- UNSPEC_VMULOUB))]

70300

+ UNSPEC_VMULESB))]

70301

"TARGET_ALTIVEC"

70302

- "vmuloub %0,%1,%2"

70303

+ "vmulesb %0,%1,%2"

70304

[(set_attr "type" "veccomplex")])

70305

70306

-(define_insn "vec_widen_smult_odd_v16qi"

70307

+(define_insn "altivec_vmulosb"

70308

[(set (match_operand:V8HI 0 "register_operand" "=v")

70309

(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")

70310

(match_operand:V16QI 2 "register_operand" "v")]

70311

@@ -989,19 +1410,37 @@

70312

"vmulosb %0,%1,%2"

70313

[(set_attr "type" "veccomplex")])

70314

70315

-(define_insn "vec_widen_umult_odd_v8hi"

70316

+(define_insn "altivec_vmuleuh"

70317

[(set (match_operand:V4SI 0 "register_operand" "=v")

70318

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

70319

(match_operand:V8HI 2 "register_operand" "v")]

70320

+ UNSPEC_VMULEUH))]

70321

+ "TARGET_ALTIVEC"

70322

+ "vmuleuh %0,%1,%2"

70323

+ [(set_attr "type" "veccomplex")])

70324

+

70325

+(define_insn "altivec_vmulouh"

70326

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

70327

+ (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

70328

+ (match_operand:V8HI 2 "register_operand" "v")]

70329

UNSPEC_VMULOUH))]

70330

"TARGET_ALTIVEC"

70331

"vmulouh %0,%1,%2"

70332

[(set_attr "type" "veccomplex")])

70333

70334

-(define_insn "vec_widen_smult_odd_v8hi"

70335

+(define_insn "altivec_vmulesh"

70336

[(set (match_operand:V4SI 0 "register_operand" "=v")

70337

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

70338

(match_operand:V8HI 2 "register_operand" "v")]

70339

+ UNSPEC_VMULESH))]

70340

+ "TARGET_ALTIVEC"

70341

+ "vmulesh %0,%1,%2"

70342

+ [(set_attr "type" "veccomplex")])

70343

+

70344

+(define_insn "altivec_vmulosh"

70345

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

70346

+ (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

70347

+ (match_operand:V8HI 2 "register_operand" "v")]

70348

UNSPEC_VMULOSH))]

70349

"TARGET_ALTIVEC"

70350

"vmulosh %0,%1,%2"

70351

@@ -1008,74 +1447,7 @@

70352

[(set_attr "type" "veccomplex")])

70353

70354

70355

-;; logical ops. Have the logical ops follow the memory ops in

70356

-;; terms of whether to prefer VSX or Altivec

70357

-

70358

-(define_insn "*altivec_and<mode>3"

70359

- [(set (match_operand:VM 0 "register_operand" "=v")

70360

- (and:VM (match_operand:VM 1 "register_operand" "v")

70361

- (match_operand:VM 2 "register_operand" "v")))]

70362

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

70363

- "vand %0,%1,%2"

70364

- [(set_attr "type" "vecsimple")])

70365

-

70366

-(define_insn "*altivec_ior<mode>3"

70367

- [(set (match_operand:VM 0 "register_operand" "=v")

70368

- (ior:VM (match_operand:VM 1 "register_operand" "v")

70369

- (match_operand:VM 2 "register_operand" "v")))]

70370

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

70371

- "vor %0,%1,%2"

70372

- [(set_attr "type" "vecsimple")])

70373

-

70374

-(define_insn "*altivec_xor<mode>3"

70375

- [(set (match_operand:VM 0 "register_operand" "=v")

70376

- (xor:VM (match_operand:VM 1 "register_operand" "v")

70377

- (match_operand:VM 2 "register_operand" "v")))]

70378

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

70379

- "vxor %0,%1,%2"

70380

- [(set_attr "type" "vecsimple")])

70381

-

70382

-(define_insn "*altivec_one_cmpl<mode>2"

70383

- [(set (match_operand:VM 0 "register_operand" "=v")

70384

- (not:VM (match_operand:VM 1 "register_operand" "v")))]

70385

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

70386

- "vnor %0,%1,%1"

70387

- [(set_attr "type" "vecsimple")])

70388

-

70389

-(define_insn "*altivec_nor<mode>3"

70390

- [(set (match_operand:VM 0 "register_operand" "=v")

70391

- (not:VM (ior:VM (match_operand:VM 1 "register_operand" "v")

70392

- (match_operand:VM 2 "register_operand" "v"))))]

70393

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

70394

- "vnor %0,%1,%2"

70395

- [(set_attr "type" "vecsimple")])

70396

-

70397

-(define_insn "*altivec_andc<mode>3"

70398

- [(set (match_operand:VM 0 "register_operand" "=v")

70399

- (and:VM (not:VM (match_operand:VM 2 "register_operand" "v"))

70400

- (match_operand:VM 1 "register_operand" "v")))]

70401

- "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"

70402

- "vandc %0,%1,%2"

70403

- [(set_attr "type" "vecsimple")])

70404

-

70405

-(define_insn "altivec_vpkuhum"

70406

- [(set (match_operand:V16QI 0 "register_operand" "=v")

70407

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

70408

- (match_operand:V8HI 2 "register_operand" "v")]

70409

- UNSPEC_VPKUHUM))]

70410

- "TARGET_ALTIVEC"

70411

- "vpkuhum %0,%1,%2"

70412

- [(set_attr "type" "vecperm")])

70413

-

70414

-(define_insn "altivec_vpkuwum"

70415

- [(set (match_operand:V8HI 0 "register_operand" "=v")

70416

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

70417

- (match_operand:V4SI 2 "register_operand" "v")]

70418

- UNSPEC_VPKUWUM))]

70419

- "TARGET_ALTIVEC"

70420

- "vpkuwum %0,%1,%2"

70421

- [(set_attr "type" "vecperm")])

70422

-

70423

+;; Vector pack/unpack

70424

(define_insn "altivec_vpkpx"

70425

[(set (match_operand:V8HI 0 "register_operand" "=v")

70426

(unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

70427

@@ -1082,74 +1454,95 @@

70428

(match_operand:V4SI 2 "register_operand" "v")]

70429

UNSPEC_VPKPX))]

70430

"TARGET_ALTIVEC"

70431

- "vpkpx %0,%1,%2"

70432

+ "*

70433

+ {

70434

+ if (VECTOR_ELT_ORDER_BIG)

70435

+ return \"vpkpx %0,%1,%2\";

70436

+ else

70437

+ return \"vpkpx %0,%2,%1\";

70438

+ }"

70439

[(set_attr "type" "vecperm")])

70440

70441

-(define_insn "altivec_vpkshss"

70442

- [(set (match_operand:V16QI 0 "register_operand" "=v")

70443

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

70444

- (match_operand:V8HI 2 "register_operand" "v")]

70445

- UNSPEC_VPKSHSS))

70446

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70447

- "TARGET_ALTIVEC"

70448

- "vpkshss %0,%1,%2"

70449

+(define_insn "altivec_vpks<VI_char>ss"

70450

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

70451

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

70452

+ (match_operand:VP 2 "register_operand" "v")]

70453

+ UNSPEC_VPACK_SIGN_SIGN_SAT))]

70454

+ "<VI_unit>"

70455

+ "*

70456

+ {

70457

+ if (VECTOR_ELT_ORDER_BIG)

70458

+ return \"vpks<VI_char>ss %0,%1,%2\";

70459

+ else

70460

+ return \"vpks<VI_char>ss %0,%2,%1\";

70461

+ }"

70462

[(set_attr "type" "vecperm")])

70463

70464

-(define_insn "altivec_vpkswss"

70465

- [(set (match_operand:V8HI 0 "register_operand" "=v")

70466

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

70467

- (match_operand:V4SI 2 "register_operand" "v")]

70468

- UNSPEC_VPKSWSS))

70469

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70470

- "TARGET_ALTIVEC"

70471

- "vpkswss %0,%1,%2"

70472

+(define_insn "altivec_vpks<VI_char>us"

70473

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

70474

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

70475

+ (match_operand:VP 2 "register_operand" "v")]

70476

+ UNSPEC_VPACK_SIGN_UNS_SAT))]

70477

+ "<VI_unit>"

70478

+ "*

70479

+ {

70480

+ if (VECTOR_ELT_ORDER_BIG)

70481

+ return \"vpks<VI_char>us %0,%1,%2\";

70482

+ else

70483

+ return \"vpks<VI_char>us %0,%2,%1\";

70484

+ }"

70485

[(set_attr "type" "vecperm")])

70486

70487

-(define_insn "altivec_vpkuhus"

70488

- [(set (match_operand:V16QI 0 "register_operand" "=v")

70489

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

70490

- (match_operand:V8HI 2 "register_operand" "v")]

70491

- UNSPEC_VPKUHUS))

70492

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70493

- "TARGET_ALTIVEC"

70494

- "vpkuhus %0,%1,%2"

70495

+(define_insn "altivec_vpku<VI_char>us"

70496

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

70497

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

70498

+ (match_operand:VP 2 "register_operand" "v")]

70499

+ UNSPEC_VPACK_UNS_UNS_SAT))]

70500

+ "<VI_unit>"

70501

+ "*

70502

+ {

70503

+ if (VECTOR_ELT_ORDER_BIG)

70504

+ return \"vpku<VI_char>us %0,%1,%2\";

70505

+ else

70506

+ return \"vpku<VI_char>us %0,%2,%1\";

70507

+ }"

70508

[(set_attr "type" "vecperm")])

70509

70510

-(define_insn "altivec_vpkshus"

70511

- [(set (match_operand:V16QI 0 "register_operand" "=v")

70512

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

70513

- (match_operand:V8HI 2 "register_operand" "v")]

70514

- UNSPEC_VPKSHUS))

70515

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70516

- "TARGET_ALTIVEC"

70517

- "vpkshus %0,%1,%2"

70518

+(define_insn "altivec_vpku<VI_char>um"

70519

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

70520

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

70521

+ (match_operand:VP 2 "register_operand" "v")]

70522

+ UNSPEC_VPACK_UNS_UNS_MOD))]

70523

+ "<VI_unit>"

70524

+ "*

70525

+ {

70526

+ if (VECTOR_ELT_ORDER_BIG)

70527

+ return \"vpku<VI_char>um %0,%1,%2\";

70528

+ else

70529

+ return \"vpku<VI_char>um %0,%2,%1\";

70530

+ }"

70531

[(set_attr "type" "vecperm")])

70532

70533

-(define_insn "altivec_vpkuwus"

70534

- [(set (match_operand:V8HI 0 "register_operand" "=v")

70535

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

70536

- (match_operand:V4SI 2 "register_operand" "v")]

70537

- UNSPEC_VPKUWUS))

70538

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70539

- "TARGET_ALTIVEC"

70540

- "vpkuwus %0,%1,%2"

70541

+(define_insn "altivec_vpku<VI_char>um_direct"

70542

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

70543

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

70544

+ (match_operand:VP 2 "register_operand" "v")]

70545

+ UNSPEC_VPACK_UNS_UNS_MOD_DIRECT))]

70546

+ "<VI_unit>"

70547

+ "*

70548

+ {

70549

+ if (BYTES_BIG_ENDIAN)

70550

+ return \"vpku<VI_char>um %0,%1,%2\";

70551

+ else

70552

+ return \"vpku<VI_char>um %0,%2,%1\";

70553

+ }"

70554

[(set_attr "type" "vecperm")])

70555

70556

-(define_insn "altivec_vpkswus"

70557

- [(set (match_operand:V8HI 0 "register_operand" "=v")

70558

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

70559

- (match_operand:V4SI 2 "register_operand" "v")]

70560

- UNSPEC_VPKSWUS))

70561

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70562

- "TARGET_ALTIVEC"

70563

- "vpkswus %0,%1,%2"

70564

- [(set_attr "type" "vecperm")])

70565

-

70566

(define_insn "*altivec_vrl<VI_char>"

70567

- [(set (match_operand:VI 0 "register_operand" "=v")

70568

- (rotate:VI (match_operand:VI 1 "register_operand" "v")

70569

- (match_operand:VI 2 "register_operand" "v")))]

70570

- "TARGET_ALTIVEC"

70571

+ [(set (match_operand:VI2 0 "register_operand" "=v")

70572

+ (rotate:VI2 (match_operand:VI2 1 "register_operand" "v")

70573

+ (match_operand:VI2 2 "register_operand" "v")))]

70574

+ "<VI_unit>"

70575

"vrl<VI_char> %0,%1,%2"

70576

[(set_attr "type" "vecsimple")])

70577

70578

@@ -1172,26 +1565,26 @@

70579

[(set_attr "type" "vecperm")])

70580

70581

(define_insn "*altivec_vsl<VI_char>"

70582

- [(set (match_operand:VI 0 "register_operand" "=v")

70583

- (ashift:VI (match_operand:VI 1 "register_operand" "v")

70584

- (match_operand:VI 2 "register_operand" "v")))]

70585

- "TARGET_ALTIVEC"

70586

+ [(set (match_operand:VI2 0 "register_operand" "=v")

70587

+ (ashift:VI2 (match_operand:VI2 1 "register_operand" "v")

70588

+ (match_operand:VI2 2 "register_operand" "v")))]

70589

+ "<VI_unit>"

70590

"vsl<VI_char> %0,%1,%2"

70591

[(set_attr "type" "vecsimple")])

70592

70593

(define_insn "*altivec_vsr<VI_char>"

70594

- [(set (match_operand:VI 0 "register_operand" "=v")

70595

- (lshiftrt:VI (match_operand:VI 1 "register_operand" "v")

70596

- (match_operand:VI 2 "register_operand" "v")))]

70597

- "TARGET_ALTIVEC"

70598

+ [(set (match_operand:VI2 0 "register_operand" "=v")

70599

+ (lshiftrt:VI2 (match_operand:VI2 1 "register_operand" "v")

70600

+ (match_operand:VI2 2 "register_operand" "v")))]

70601

+ "<VI_unit>"

70602

"vsr<VI_char> %0,%1,%2"

70603

[(set_attr "type" "vecsimple")])

70604

70605

(define_insn "*altivec_vsra<VI_char>"

70606

- [(set (match_operand:VI 0 "register_operand" "=v")

70607

- (ashiftrt:VI (match_operand:VI 1 "register_operand" "v")

70608

- (match_operand:VI 2 "register_operand" "v")))]

70609

- "TARGET_ALTIVEC"

70610

+ [(set (match_operand:VI2 0 "register_operand" "=v")

70611

+ (ashiftrt:VI2 (match_operand:VI2 1 "register_operand" "v")

70612

+ (match_operand:VI2 2 "register_operand" "v")))]

70613

+ "<VI_unit>"

70614

"vsra<VI_char> %0,%1,%2"

70615

[(set_attr "type" "vecsimple")])

70616

70617

@@ -1233,15 +1626,29 @@

70618

"vsum4s<VI_char>s %0,%1,%2"

70619

[(set_attr "type" "veccomplex")])

70620

70621

+;; FIXME: For the following two patterns, the scratch should only be

70622

+;; allocated for !VECTOR_ELT_ORDER_BIG, and the instructions should

70623

+;; be emitted separately.

70624

(define_insn "altivec_vsum2sws"

70625

[(set (match_operand:V4SI 0 "register_operand" "=v")

70626

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

70627

(match_operand:V4SI 2 "register_operand" "v")]

70628

UNSPEC_VSUM2SWS))

70629

- (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70630

+ (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))

70631

+ (clobber (match_scratch:V4SI 3 "=v"))]

70632

"TARGET_ALTIVEC"

70633

- "vsum2sws %0,%1,%2"

70634

- [(set_attr "type" "veccomplex")])

70635

+{

70636

+ if (VECTOR_ELT_ORDER_BIG)

70637

+ return "vsum2sws %0,%1,%2";

70638

+ else

70639

+ return "vsldoi %3,%2,%2,12\n\tvsum2sws %3,%1,%3\n\tvsldoi %0,%3,%3,4";

70640

+}

70641

+ [(set_attr "type" "veccomplex")

70642

+ (set (attr "length")

70643

+ (if_then_else

70644

+ (match_test "VECTOR_ELT_ORDER_BIG")

70645

+ (const_string "4")

70646

+ (const_string "12")))])

70647

70648

(define_insn "altivec_vsumsws"

70649

[(set (match_operand:V4SI 0 "register_operand" "=v")

70650

@@ -1248,12 +1655,54 @@

70651

(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

70652

(match_operand:V4SI 2 "register_operand" "v")]

70653

UNSPEC_VSUMSWS))

70654

+ (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))

70655

+ (clobber (match_scratch:V4SI 3 "=v"))]

70656

+ "TARGET_ALTIVEC"

70657

+{

70658

+ if (VECTOR_ELT_ORDER_BIG)

70659

+ return "vsumsws %0,%1,%2";

70660

+ else

70661

+ return "vspltw %3,%2,0\n\tvsumsws %3,%1,%3\n\tvsldoi %0,%3,%3,12";

70662

+}

70663

+ [(set_attr "type" "veccomplex")

70664

+ (set (attr "length")

70665

+ (if_then_else

70666

+ (match_test "(VECTOR_ELT_ORDER_BIG)")

70667

+ (const_string "4")

70668

+ (const_string "12")))])

70669

+

70670

+(define_insn "altivec_vsumsws_direct"

70671

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

70672

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

70673

+ (match_operand:V4SI 2 "register_operand" "v")]

70674

+ UNSPEC_VSUMSWS_DIRECT))

70675

(set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]

70676

"TARGET_ALTIVEC"

70677

"vsumsws %0,%1,%2"

70678

[(set_attr "type" "veccomplex")])

70679

70680

-(define_insn "altivec_vspltb"

70681

+(define_expand "altivec_vspltb"

70682

+ [(use (match_operand:V16QI 0 "register_operand" ""))

70683

+ (use (match_operand:V16QI 1 "register_operand" ""))

70684

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

70685

+ "TARGET_ALTIVEC"

70686

+{

70687

+ rtvec v;

70688

+ rtx x;

70689

+

70690

+ /* Special handling for LE with -maltivec=be. We have to reflect

70691

+ the actual selected index for the splat in the RTL. */

70692

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

70693

+ operands[2] = GEN_INT (15 - INTVAL (operands[2]));

70694

+

70695

+ v = gen_rtvec (1, operands[2]);

70696

+ x = gen_rtx_VEC_SELECT (QImode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

70697

+ x = gen_rtx_VEC_DUPLICATE (V16QImode, x);

70698

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

70699

+ DONE;

70700

+})

70701

+

70702

+(define_insn "*altivec_vspltb_internal"

70703

[(set (match_operand:V16QI 0 "register_operand" "=v")

70704

(vec_duplicate:V16QI

70705

(vec_select:QI (match_operand:V16QI 1 "register_operand" "v")

70706

@@ -1260,10 +1709,48 @@

70707

(parallel

70708

[(match_operand:QI 2 "u5bit_cint_operand" "")]))))]

70709

"TARGET_ALTIVEC"

70710

+{

70711

+ /* For true LE, this adjusts the selected index. For LE with

70712

+ -maltivec=be, this reverses what was done in the define_expand

70713

+ because the instruction already has big-endian bias. */

70714

+ if (!BYTES_BIG_ENDIAN)

70715

+ operands[2] = GEN_INT (15 - INTVAL (operands[2]));

70716

+

70717

+ return "vspltb %0,%1,%2";

70718

+}

70719

+ [(set_attr "type" "vecperm")])

70720

+

70721

+(define_insn "altivec_vspltb_direct"

70722

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

70723

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")

70724

+ (match_operand:QI 2 "u5bit_cint_operand" "i")]

70725

+ UNSPEC_VSPLT_DIRECT))]

70726

+ "TARGET_ALTIVEC"

70727

"vspltb %0,%1,%2"

70728

[(set_attr "type" "vecperm")])

70729

70730

-(define_insn "altivec_vsplth"

70731

+(define_expand "altivec_vsplth"

70732

+ [(use (match_operand:V8HI 0 "register_operand" ""))

70733

+ (use (match_operand:V8HI 1 "register_operand" ""))

70734

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

70735

+ "TARGET_ALTIVEC"

70736

+{

70737

+ rtvec v;

70738

+ rtx x;

70739

+

70740

+ /* Special handling for LE with -maltivec=be. We have to reflect

70741

+ the actual selected index for the splat in the RTL. */

70742

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

70743

+ operands[2] = GEN_INT (7 - INTVAL (operands[2]));

70744

+

70745

+ v = gen_rtvec (1, operands[2]);

70746

+ x = gen_rtx_VEC_SELECT (HImode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

70747

+ x = gen_rtx_VEC_DUPLICATE (V8HImode, x);

70748

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

70749

+ DONE;

70750

+})

70751

+

70752

+(define_insn "*altivec_vsplth_internal"

70753

[(set (match_operand:V8HI 0 "register_operand" "=v")

70754

(vec_duplicate:V8HI

70755

(vec_select:HI (match_operand:V8HI 1 "register_operand" "v")

70756

@@ -1270,10 +1757,48 @@

70757

(parallel

70758

[(match_operand:QI 2 "u5bit_cint_operand" "")]))))]

70759

"TARGET_ALTIVEC"

70760

+{

70761

+ /* For true LE, this adjusts the selected index. For LE with

70762

+ -maltivec=be, this reverses what was done in the define_expand

70763

+ because the instruction already has big-endian bias. */

70764

+ if (!BYTES_BIG_ENDIAN)

70765

+ operands[2] = GEN_INT (7 - INTVAL (operands[2]));

70766

+

70767

+ return "vsplth %0,%1,%2";

70768

+}

70769

+ [(set_attr "type" "vecperm")])

70770

+

70771

+(define_insn "altivec_vsplth_direct"

70772

+ [(set (match_operand:V8HI 0 "register_operand" "=v")

70773

+ (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "v")

70774

+ (match_operand:QI 2 "u5bit_cint_operand" "i")]

70775

+ UNSPEC_VSPLT_DIRECT))]

70776

+ "TARGET_ALTIVEC"

70777

"vsplth %0,%1,%2"

70778

[(set_attr "type" "vecperm")])

70779

70780

-(define_insn "altivec_vspltw"

70781

+(define_expand "altivec_vspltw"

70782

+ [(use (match_operand:V4SI 0 "register_operand" ""))

70783

+ (use (match_operand:V4SI 1 "register_operand" ""))

70784

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

70785

+ "TARGET_ALTIVEC"

70786

+{

70787

+ rtvec v;

70788

+ rtx x;

70789

+

70790

+ /* Special handling for LE with -maltivec=be. We have to reflect

70791

+ the actual selected index for the splat in the RTL. */

70792

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

70793

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

70794

+

70795

+ v = gen_rtvec (1, operands[2]);

70796

+ x = gen_rtx_VEC_SELECT (SImode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

70797

+ x = gen_rtx_VEC_DUPLICATE (V4SImode, x);

70798

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

70799

+ DONE;

70800

+})

70801

+

70802

+(define_insn "*altivec_vspltw_internal"

70803

[(set (match_operand:V4SI 0 "register_operand" "=v")

70804

(vec_duplicate:V4SI

70805

(vec_select:SI (match_operand:V4SI 1 "register_operand" "v")

70806

@@ -1280,10 +1805,48 @@

70807

(parallel

70808

[(match_operand:QI 2 "u5bit_cint_operand" "i")]))))]

70809

"TARGET_ALTIVEC"

70810

+{

70811

+ /* For true LE, this adjusts the selected index. For LE with

70812

+ -maltivec=be, this reverses what was done in the define_expand

70813

+ because the instruction already has big-endian bias. */

70814

+ if (!BYTES_BIG_ENDIAN)

70815

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

70816

+

70817

+ return "vspltw %0,%1,%2";

70818

+}

70819

+ [(set_attr "type" "vecperm")])

70820

+

70821

+(define_insn "altivec_vspltw_direct"

70822

+ [(set (match_operand:V4SI 0 "register_operand" "=v")

70823

+ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")

70824

+ (match_operand:QI 2 "u5bit_cint_operand" "i")]

70825

+ UNSPEC_VSPLT_DIRECT))]

70826

+ "TARGET_ALTIVEC"

70827

"vspltw %0,%1,%2"

70828

[(set_attr "type" "vecperm")])

70829

70830

-(define_insn "altivec_vspltsf"

70831

+(define_expand "altivec_vspltsf"

70832

+ [(use (match_operand:V4SF 0 "register_operand" ""))

70833

+ (use (match_operand:V4SF 1 "register_operand" ""))

70834

+ (use (match_operand:QI 2 "u5bit_cint_operand" ""))]

70835

+ "TARGET_ALTIVEC"

70836

+{

70837

+ rtvec v;

70838

+ rtx x;

70839

+

70840

+ /* Special handling for LE with -maltivec=be. We have to reflect

70841

+ the actual selected index for the splat in the RTL. */

70842

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

70843

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

70844

+

70845

+ v = gen_rtvec (1, operands[2]);

70846

+ x = gen_rtx_VEC_SELECT (SFmode, operands[1], gen_rtx_PARALLEL (VOIDmode, v));

70847

+ x = gen_rtx_VEC_DUPLICATE (V4SFmode, x);

70848

+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], x));

70849

+ DONE;

70850

+})

70851

+

70852

+(define_insn "*altivec_vspltsf_internal"

70853

[(set (match_operand:V4SF 0 "register_operand" "=v")

70854

(vec_duplicate:V4SF

70855

(vec_select:SF (match_operand:V4SF 1 "register_operand" "v")

70856

@@ -1290,7 +1853,15 @@

70857

(parallel

70858

[(match_operand:QI 2 "u5bit_cint_operand" "i")]))))]

70859

"VECTOR_UNIT_ALTIVEC_P (V4SFmode)"

70860

- "vspltw %0,%1,%2"

70861

+{

70862

+ /* For true LE, this adjusts the selected index. For LE with

70863

+ -maltivec=be, this reverses what was done in the define_expand

70864

+ because the instruction already has big-endian bias. */

70865

+ if (!BYTES_BIG_ENDIAN)

70866

+ operands[2] = GEN_INT (3 - INTVAL (operands[2]));

70867

+

70868

+ return "vspltw %0,%1,%2";

70869

+}

70870

[(set_attr "type" "vecperm")])

70871

70872

(define_insn "altivec_vspltis<VI_char>"

70873

@@ -1308,7 +1879,7 @@

70874

"vrfiz %0,%1"

70875

[(set_attr "type" "vecfloat")])

70876

70877

-(define_insn "altivec_vperm_<mode>"

70878

+(define_expand "altivec_vperm_<mode>"

70879

[(set (match_operand:VM 0 "register_operand" "=v")

70880

(unspec:VM [(match_operand:VM 1 "register_operand" "v")

70881

(match_operand:VM 2 "register_operand" "v")

70882

@@ -1315,10 +1886,25 @@

70883

(match_operand:V16QI 3 "register_operand" "v")]

70884

UNSPEC_VPERM))]

70885

"TARGET_ALTIVEC"

70886

+{

70887

+ if (!VECTOR_ELT_ORDER_BIG)

70888

+ {

70889

+ altivec_expand_vec_perm_le (operands);

70890

+ DONE;

70891

+ }

70892

+})

70893

+

70894

+(define_insn "*altivec_vperm_<mode>_internal"

70895

+ [(set (match_operand:VM 0 "register_operand" "=v")

70896

+ (unspec:VM [(match_operand:VM 1 "register_operand" "v")

70897

+ (match_operand:VM 2 "register_operand" "v")

70898

+ (match_operand:V16QI 3 "register_operand" "v")]

70899

+ UNSPEC_VPERM))]

70900

+ "TARGET_ALTIVEC"

70901

"vperm %0,%1,%2,%3"

70902

[(set_attr "type" "vecperm")])

70903

70904

-(define_insn "altivec_vperm_<mode>_uns"

70905

+(define_expand "altivec_vperm_<mode>_uns"

70906

[(set (match_operand:VM 0 "register_operand" "=v")

70907

(unspec:VM [(match_operand:VM 1 "register_operand" "v")

70908

(match_operand:VM 2 "register_operand" "v")

70909

@@ -1325,6 +1911,21 @@

70910

(match_operand:V16QI 3 "register_operand" "v")]

70911

UNSPEC_VPERM_UNS))]

70912

"TARGET_ALTIVEC"

70913

+{

70914

+ if (!VECTOR_ELT_ORDER_BIG)

70915

+ {

70916

+ altivec_expand_vec_perm_le (operands);

70917

+ DONE;

70918

+ }

70919

+})

70920

+

70921

+(define_insn "*altivec_vperm_<mode>_uns_internal"

70922

+ [(set (match_operand:VM 0 "register_operand" "=v")

70923

+ (unspec:VM [(match_operand:VM 1 "register_operand" "v")

70924

+ (match_operand:VM 2 "register_operand" "v")

70925

+ (match_operand:V16QI 3 "register_operand" "v")]

70926

+ UNSPEC_VPERM_UNS))]

70927

+ "TARGET_ALTIVEC"

70928

"vperm %0,%1,%2,%3"

70929

[(set_attr "type" "vecperm")])

70930

70931

@@ -1335,7 +1936,12 @@

70932

(match_operand:V16QI 3 "register_operand" "")]

70933

UNSPEC_VPERM))]

70934

"TARGET_ALTIVEC"

70935

- "")

70936

+{

70937

+ if (!BYTES_BIG_ENDIAN) {

70938

+ altivec_expand_vec_perm_le (operands);

70939

+ DONE;

70940

+ }

70941

+})

70942

70943

(define_expand "vec_perm_constv16qi"

70944

[(match_operand:V16QI 0 "register_operand" "")

70945

@@ -1476,52 +2082,72 @@

70946

"vsldoi %0,%1,%2,%3"

70947

[(set_attr "type" "vecperm")])

70948

70949

-(define_insn "altivec_vupkhsb"

70950

- [(set (match_operand:V8HI 0 "register_operand" "=v")

70951

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

70952

- UNSPEC_VUPKHSB))]

70953

- "TARGET_ALTIVEC"

70954

- "vupkhsb %0,%1"

70955

+(define_insn "altivec_vupkhs<VU_char>"

70956

+ [(set (match_operand:VP 0 "register_operand" "=v")

70957

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

70958

+ UNSPEC_VUNPACK_HI_SIGN))]

70959

+ "<VI_unit>"

70960

+{

70961

+ if (VECTOR_ELT_ORDER_BIG)

70962

+ return "vupkhs<VU_char> %0,%1";

70963

+ else

70964

+ return "vupkls<VU_char> %0,%1";

70965

+}

70966

[(set_attr "type" "vecperm")])

70967

70968

-(define_insn "altivec_vupkhpx"

70969

- [(set (match_operand:V4SI 0 "register_operand" "=v")

70970

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

70971

- UNSPEC_VUPKHPX))]

70972

- "TARGET_ALTIVEC"

70973

- "vupkhpx %0,%1"

70974

+(define_insn "*altivec_vupkhs<VU_char>_direct"

70975

+ [(set (match_operand:VP 0 "register_operand" "=v")

70976

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

70977

+ UNSPEC_VUNPACK_HI_SIGN_DIRECT))]

70978

+ "<VI_unit>"

70979

+ "vupkhs<VU_char> %0,%1"

70980

[(set_attr "type" "vecperm")])

70981

70982

-(define_insn "altivec_vupkhsh"

70983

- [(set (match_operand:V4SI 0 "register_operand" "=v")

70984

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

70985

- UNSPEC_VUPKHSH))]

70986

- "TARGET_ALTIVEC"

70987

- "vupkhsh %0,%1"

70988

+(define_insn "altivec_vupkls<VU_char>"

70989

+ [(set (match_operand:VP 0 "register_operand" "=v")

70990

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

70991

+ UNSPEC_VUNPACK_LO_SIGN))]

70992

+ "<VI_unit>"

70993

+{

70994

+ if (VECTOR_ELT_ORDER_BIG)

70995

+ return "vupkls<VU_char> %0,%1";

70996

+ else

70997

+ return "vupkhs<VU_char> %0,%1";

70998

+}

70999

[(set_attr "type" "vecperm")])

71000

71001

-(define_insn "altivec_vupklsb"

71002

- [(set (match_operand:V8HI 0 "register_operand" "=v")

71003

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

71004

- UNSPEC_VUPKLSB))]

71005

- "TARGET_ALTIVEC"

71006

- "vupklsb %0,%1"

71007

+(define_insn "*altivec_vupkls<VU_char>_direct"

71008

+ [(set (match_operand:VP 0 "register_operand" "=v")

71009

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

71010

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT))]

71011

+ "<VI_unit>"

71012

+ "vupkls<VU_char> %0,%1"

71013

[(set_attr "type" "vecperm")])

71014

71015

-(define_insn "altivec_vupklpx"

71016

+(define_insn "altivec_vupkhpx"

71017

[(set (match_operand:V4SI 0 "register_operand" "=v")

71018

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

71019

- UNSPEC_VUPKLPX))]

71020

+ UNSPEC_VUPKHPX))]

71021

"TARGET_ALTIVEC"

71022

- "vupklpx %0,%1"

71023

+{

71024

+ if (VECTOR_ELT_ORDER_BIG)

71025

+ return "vupkhpx %0,%1";

71026

+ else

71027

+ return "vupklpx %0,%1";

71028

+}

71029

[(set_attr "type" "vecperm")])

71030

71031

-(define_insn "altivec_vupklsh"

71032

+(define_insn "altivec_vupklpx"

71033

[(set (match_operand:V4SI 0 "register_operand" "=v")

71034

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

71035

- UNSPEC_VUPKLSH))]

71036

+ UNSPEC_VUPKLPX))]

71037

"TARGET_ALTIVEC"

71038

- "vupklsh %0,%1"

71039

+{

71040

+ if (VECTOR_ELT_ORDER_BIG)

71041

+ return "vupklpx %0,%1";

71042

+ else

71043

+ return "vupkhpx %0,%1";

71044

+}

71045

[(set_attr "type" "vecperm")])

71046

71047

;; Compare vectors producing a vector result and a predicate, setting CR6 to

71048

@@ -1528,37 +2154,37 @@

71049

;; indicate a combined status

71050

(define_insn "*altivec_vcmpequ<VI_char>_p"

71051

[(set (reg:CC 74)

71052

- (unspec:CC [(eq:CC (match_operand:VI 1 "register_operand" "v")

71053

- (match_operand:VI 2 "register_operand" "v"))]

71054

+ (unspec:CC [(eq:CC (match_operand:VI2 1 "register_operand" "v")

71055

+ (match_operand:VI2 2 "register_operand" "v"))]

71056

UNSPEC_PREDICATE))

71057

- (set (match_operand:VI 0 "register_operand" "=v")

71058

- (eq:VI (match_dup 1)

71059

- (match_dup 2)))]

71060

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

71061

+ (set (match_operand:VI2 0 "register_operand" "=v")

71062

+ (eq:VI2 (match_dup 1)

71063

+ (match_dup 2)))]

71064

+ "<VI_unit>"

71065

"vcmpequ<VI_char>. %0,%1,%2"

71066

[(set_attr "type" "veccmp")])

71067

71068

(define_insn "*altivec_vcmpgts<VI_char>_p"

71069

[(set (reg:CC 74)

71070

- (unspec:CC [(gt:CC (match_operand:VI 1 "register_operand" "v")

71071

- (match_operand:VI 2 "register_operand" "v"))]

71072

+ (unspec:CC [(gt:CC (match_operand:VI2 1 "register_operand" "v")

71073

+ (match_operand:VI2 2 "register_operand" "v"))]

71074

UNSPEC_PREDICATE))

71075

- (set (match_operand:VI 0 "register_operand" "=v")

71076

- (gt:VI (match_dup 1)

71077

- (match_dup 2)))]

71078

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

71079

+ (set (match_operand:VI2 0 "register_operand" "=v")

71080

+ (gt:VI2 (match_dup 1)

71081

+ (match_dup 2)))]

71082

+ "<VI_unit>"

71083

"vcmpgts<VI_char>. %0,%1,%2"

71084

[(set_attr "type" "veccmp")])

71085

71086

(define_insn "*altivec_vcmpgtu<VI_char>_p"

71087

[(set (reg:CC 74)

71088

- (unspec:CC [(gtu:CC (match_operand:VI 1 "register_operand" "v")

71089

- (match_operand:VI 2 "register_operand" "v"))]

71090

+ (unspec:CC [(gtu:CC (match_operand:VI2 1 "register_operand" "v")

71091

+ (match_operand:VI2 2 "register_operand" "v"))]

71092

UNSPEC_PREDICATE))

71093

- (set (match_operand:VI 0 "register_operand" "=v")

71094

- (gtu:VI (match_dup 1)

71095

- (match_dup 2)))]

71096

- "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

71097

+ (set (match_operand:VI2 0 "register_operand" "=v")

71098

+ (gtu:VI2 (match_dup 1)

71099

+ (match_dup 2)))]

71100

+ "<VI_unit>"

71101

"vcmpgtu<VI_char>. %0,%1,%2"

71102

[(set_attr "type" "veccmp")])

71103

71104

@@ -1710,12 +2336,26 @@

71105

;; Parallel some of the LVE* and STV*'s with unspecs because some have

71106

;; identical rtl but different instructions-- and gcc gets confused.

71107

71108

-(define_insn "altivec_lve<VI_char>x"

71109

+(define_expand "altivec_lve<VI_char>x"

71110

[(parallel

71111

[(set (match_operand:VI 0 "register_operand" "=v")

71112

(match_operand:VI 1 "memory_operand" "Z"))

71113

(unspec [(const_int 0)] UNSPEC_LVE)])]

71114

"TARGET_ALTIVEC"

71115

+{

71116

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

71117

+ {

71118

+ altivec_expand_lvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_LVE);

71119

+ DONE;

71120

+ }

71121

+})

71122

+

71123

+(define_insn "*altivec_lve<VI_char>x_internal"

71124

+ [(parallel

71125

+ [(set (match_operand:VI 0 "register_operand" "=v")

71126

+ (match_operand:VI 1 "memory_operand" "Z"))

71127

+ (unspec [(const_int 0)] UNSPEC_LVE)])]

71128

+ "TARGET_ALTIVEC"

71129

"lve<VI_char>x %0,%y1"

71130

[(set_attr "type" "vecload")])

71131

71132

@@ -1728,46 +2368,114 @@

71133

"lvewx %0,%y1"

71134

[(set_attr "type" "vecload")])

71135

71136

-(define_insn "altivec_lvxl"

71137

+(define_expand "altivec_lvxl_<mode>"

71138

[(parallel

71139

- [(set (match_operand:V4SI 0 "register_operand" "=v")

71140

- (match_operand:V4SI 1 "memory_operand" "Z"))

71141

+ [(set (match_operand:VM2 0 "register_operand" "=v")

71142

+ (match_operand:VM2 1 "memory_operand" "Z"))

71143

(unspec [(const_int 0)] UNSPEC_SET_VSCR)])]

71144

"TARGET_ALTIVEC"

71145

- "lvxl %0,%y1"

71146

+{

71147

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

71148

+ {

71149

+ altivec_expand_lvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_SET_VSCR);

71150

+ DONE;

71151

+ }

71152

+})

71153

+

71154

+(define_insn "*altivec_lvxl_<mode>_internal"

71155

+ [(parallel

71156

+ [(set (match_operand:VM2 0 "register_operand" "=v")

71157

+ (match_operand:VM2 1 "memory_operand" "Z"))

71158

+ (unspec [(const_int 0)] UNSPEC_SET_VSCR)])]

71159

+ "TARGET_ALTIVEC"

71160

+ "lvx %0,%y1"

71161

[(set_attr "type" "vecload")])

71162

71163

-(define_insn "altivec_lvx_<mode>"

71164

+(define_expand "altivec_lvx_<mode>"

71165

[(parallel

71166

[(set (match_operand:VM2 0 "register_operand" "=v")

71167

(match_operand:VM2 1 "memory_operand" "Z"))

71168

(unspec [(const_int 0)] UNSPEC_LVX)])]

71169

"TARGET_ALTIVEC"

71170

+{

71171

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

71172

+ {

71173

+ altivec_expand_lvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_LVX);

71174

+ DONE;

71175

+ }

71176

+})

71177

+

71178

+(define_insn "*altivec_lvx_<mode>_internal"

71179

+ [(parallel

71180

+ [(set (match_operand:VM2 0 "register_operand" "=v")

71181

+ (match_operand:VM2 1 "memory_operand" "Z"))

71182

+ (unspec [(const_int 0)] UNSPEC_LVX)])]

71183

+ "TARGET_ALTIVEC"

71184

"lvx %0,%y1"

71185

[(set_attr "type" "vecload")])

71186

71187

-(define_insn "altivec_stvx_<mode>"

71188

+(define_expand "altivec_stvx_<mode>"

71189

[(parallel

71190

[(set (match_operand:VM2 0 "memory_operand" "=Z")

71191

(match_operand:VM2 1 "register_operand" "v"))

71192

(unspec [(const_int 0)] UNSPEC_STVX)])]

71193

"TARGET_ALTIVEC"

71194

+{

71195

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

71196

+ {

71197

+ altivec_expand_stvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_STVX);

71198

+ DONE;

71199

+ }

71200

+})

71201

+

71202

+(define_insn "*altivec_stvx_<mode>_internal"

71203

+ [(parallel

71204

+ [(set (match_operand:VM2 0 "memory_operand" "=Z")

71205

+ (match_operand:VM2 1 "register_operand" "v"))

71206

+ (unspec [(const_int 0)] UNSPEC_STVX)])]

71207

+ "TARGET_ALTIVEC"

71208

"stvx %1,%y0"

71209

[(set_attr "type" "vecstore")])

71210

71211

-(define_insn "altivec_stvxl"

71212

+(define_expand "altivec_stvxl_<mode>"

71213

[(parallel

71214

- [(set (match_operand:V4SI 0 "memory_operand" "=Z")

71215

- (match_operand:V4SI 1 "register_operand" "v"))

71216

+ [(set (match_operand:VM2 0 "memory_operand" "=Z")

71217

+ (match_operand:VM2 1 "register_operand" "v"))

71218

(unspec [(const_int 0)] UNSPEC_STVXL)])]

71219

"TARGET_ALTIVEC"

71220

+{

71221

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

71222

+ {

71223

+ altivec_expand_stvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_STVXL);

71224

+ DONE;

71225

+ }

71226

+})

71227

+

71228

+(define_insn "*altivec_stvxl_<mode>_internal"

71229

+ [(parallel

71230

+ [(set (match_operand:VM2 0 "memory_operand" "=Z")

71231

+ (match_operand:VM2 1 "register_operand" "v"))

71232

+ (unspec [(const_int 0)] UNSPEC_STVXL)])]

71233

+ "TARGET_ALTIVEC"

71234

"stvxl %1,%y0"

71235

[(set_attr "type" "vecstore")])

71236

71237

-(define_insn "altivec_stve<VI_char>x"

71238

+(define_expand "altivec_stve<VI_char>x"

71239

[(set (match_operand:<VI_scalar> 0 "memory_operand" "=Z")

71240

(unspec:<VI_scalar> [(match_operand:VI 1 "register_operand" "v")] UNSPEC_STVE))]

71241

"TARGET_ALTIVEC"

71242

+{

71243

+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)

71244

+ {

71245

+ altivec_expand_stvex_be (operands[0], operands[1], <MODE>mode, UNSPEC_STVE);

71246

+ DONE;

71247

+ }

71248

+})

71249

+

71250

+(define_insn "*altivec_stve<VI_char>x_internal"

71251

+ [(set (match_operand:<VI_scalar> 0 "memory_operand" "=Z")

71252

+ (unspec:<VI_scalar> [(match_operand:VI 1 "register_operand" "v")] UNSPEC_STVE))]

71253

+ "TARGET_ALTIVEC"

71254

"stve<VI_char>x %1,%y0"

71255

[(set_attr "type" "vecstore")])

71256

71257

@@ -1779,20 +2487,28 @@

71258

[(set_attr "type" "vecstore")])

71259

71260

;; Generate

71261

-;; vspltis? SCRATCH0,0

71262

+;; xxlxor/vxor SCRATCH0,SCRATCH0,SCRATCH0

71263

;; vsubu?m SCRATCH2,SCRATCH1,%1

71264

;; vmaxs? %0,%1,SCRATCH2"

71265

(define_expand "abs<mode>2"

71266

- [(set (match_dup 2) (vec_duplicate:VI (const_int 0)))

71267

- (set (match_dup 3)

71268

- (minus:VI (match_dup 2)

71269

- (match_operand:VI 1 "register_operand" "v")))

71270

- (set (match_operand:VI 0 "register_operand" "=v")

71271

- (smax:VI (match_dup 1) (match_dup 3)))]

71272

- "TARGET_ALTIVEC"

71273

+ [(set (match_dup 2) (match_dup 3))

71274

+ (set (match_dup 4)

71275

+ (minus:VI2 (match_dup 2)

71276

+ (match_operand:VI2 1 "register_operand" "v")))

71277

+ (set (match_operand:VI2 0 "register_operand" "=v")

71278

+ (smax:VI2 (match_dup 1) (match_dup 4)))]

71279

+ "<VI_unit>"

71280

{

71281

- operands[2] = gen_reg_rtx (GET_MODE (operands[0]));

71282

- operands[3] = gen_reg_rtx (GET_MODE (operands[0]));

71283

+ int i, n_elt = GET_MODE_NUNITS (<MODE>mode);

71284

+ rtvec v = rtvec_alloc (n_elt);

71285

+

71286

+ /* Create an all 0 constant. */

71287

+ for (i = 0; i < n_elt; ++i)

71288

+ RTVEC_ELT (v, i) = const0_rtx;

71289

+

71290

+ operands[2] = gen_reg_rtx (<MODE>mode);

71291

+ operands[3] = gen_rtx_CONST_VECTOR (<MODE>mode, v);

71292

+ operands[4] = gen_reg_rtx (<MODE>mode);

71293

})

71294

71295

;; Generate

71296

@@ -1844,7 +2560,7 @@

71297

71298

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

71299

emit_insn (gen_altivec_vsum4s<VI_char>s (vtmp1, operands[1], vzero));

71300

- emit_insn (gen_altivec_vsumsws (dest, vtmp1, vzero));

71301

+ emit_insn (gen_altivec_vsumsws_direct (dest, vtmp1, vzero));

71302

DONE;

71303

})

71304

71305

@@ -1860,7 +2576,7 @@

71306

71307

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

71308

emit_insn (gen_altivec_vsum4ubs (vtmp1, operands[1], vzero));

71309

- emit_insn (gen_altivec_vsumsws (dest, vtmp1, vzero));

71310

+ emit_insn (gen_altivec_vsumsws_direct (dest, vtmp1, vzero));

71311

DONE;

71312

})

71313

71314

@@ -1950,50 +2666,20 @@

71315

DONE;

71316

}")

71317

71318

-(define_expand "vec_unpacks_hi_v16qi"

71319

- [(set (match_operand:V8HI 0 "register_operand" "=v")

71320

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

71321

- UNSPEC_VUPKHSB))]

71322

- "TARGET_ALTIVEC"

71323

- "

71324

-{

71325

- emit_insn (gen_altivec_vupkhsb (operands[0], operands[1]));

71326

- DONE;

71327

-}")

71328

+(define_expand "vec_unpacks_hi_<VP_small_lc>"

71329

+ [(set (match_operand:VP 0 "register_operand" "=v")

71330

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

71331

+ UNSPEC_VUNPACK_HI_SIGN_DIRECT))]

71332

+ "<VI_unit>"

71333

+ "")

71334

71335

-(define_expand "vec_unpacks_hi_v8hi"

71336

- [(set (match_operand:V4SI 0 "register_operand" "=v")

71337

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

71338

- UNSPEC_VUPKHSH))]

71339

- "TARGET_ALTIVEC"

71340

- "

71341

-{

71342

- emit_insn (gen_altivec_vupkhsh (operands[0], operands[1]));

71343

- DONE;

71344

-}")

71345

+(define_expand "vec_unpacks_lo_<VP_small_lc>"

71346

+ [(set (match_operand:VP 0 "register_operand" "=v")

71347

+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]

71348

+ UNSPEC_VUNPACK_LO_SIGN_DIRECT))]

71349

+ "<VI_unit>"

71350

+ "")

71351

71352

-(define_expand "vec_unpacks_lo_v16qi"

71353

- [(set (match_operand:V8HI 0 "register_operand" "=v")

71354

- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")]

71355

- UNSPEC_VUPKLSB))]

71356

- "TARGET_ALTIVEC"

71357

- "

71358

-{

71359

- emit_insn (gen_altivec_vupklsb (operands[0], operands[1]));

71360

- DONE;

71361

-}")

71362

-

71363

-(define_expand "vec_unpacks_lo_v8hi"

71364

- [(set (match_operand:V4SI 0 "register_operand" "=v")

71365

- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]

71366

- UNSPEC_VUPKLSH))]

71367

- "TARGET_ALTIVEC"

71368

- "

71369

-{

71370

- emit_insn (gen_altivec_vupklsh (operands[0], operands[1]));

71371

- DONE;

71372

-}")

71373

-

71374

(define_insn "vperm_v8hiv4si"

71375

[(set (match_operand:V4SI 0 "register_operand" "=v")

71376

(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")

71377

@@ -2025,25 +2711,26 @@

71378

rtx vzero = gen_reg_rtx (V8HImode);

71379

rtx mask = gen_reg_rtx (V16QImode);

71380

rtvec v = rtvec_alloc (16);

71381

+ bool be = BYTES_BIG_ENDIAN;

71382

71383

emit_insn (gen_altivec_vspltish (vzero, const0_rtx));

71384

71385

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

71386

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 0);

71387

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 16);

71388

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 1);

71389

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

71390

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 2);

71391

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 16);

71392

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 3);

71393

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

71394

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 4);

71395

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 16);

71396

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 5);

71397

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

71398

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 6);

71399

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 16);

71400

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 7);

71401

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 7);

71402

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 0 : 16);

71403

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 16 : 6);

71404

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 1 : 16);

71405

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 5);

71406

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 2 : 16);

71407

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 16 : 4);

71408

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 3 : 16);

71409

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 3);

71410

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 4 : 16);

71411

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 16 : 2);

71412

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 5 : 16);

71413

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 1);

71414

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 6 : 16);

71415

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 16 : 0);

71416

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 7 : 16);

71417

71418

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

71419

emit_insn (gen_vperm_v16qiv8hi (operands[0], operands[1], vzero, mask));

71420

@@ -2060,25 +2747,26 @@

71421

rtx vzero = gen_reg_rtx (V4SImode);

71422

rtx mask = gen_reg_rtx (V16QImode);

71423

rtvec v = rtvec_alloc (16);

71424

+ bool be = BYTES_BIG_ENDIAN;

71425

71426

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

71427

71428

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

71429

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 17);

71430

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 0);

71431

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 1);

71432

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

71433

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 17);

71434

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 2);

71435

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 3);

71436

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

71437

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 17);

71438

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 4);

71439

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 5);

71440

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

71441

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 17);

71442

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 6);

71443

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 7);

71444

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 7);

71445

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 17 : 6);

71446

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 0 : 17);

71447

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 1 : 16);

71448

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 5);

71449

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 17 : 4);

71450

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 2 : 17);

71451

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 3 : 16);

71452

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 3);

71453

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 17 : 2);

71454

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 4 : 17);

71455

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 5 : 16);

71456

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 1);

71457

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 17 : 0);

71458

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 6 : 17);

71459

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 7 : 16);

71460

71461

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

71462

emit_insn (gen_vperm_v8hiv4si (operands[0], operands[1], vzero, mask));

71463

@@ -2095,25 +2783,26 @@

71464

rtx vzero = gen_reg_rtx (V8HImode);

71465

rtx mask = gen_reg_rtx (V16QImode);

71466

rtvec v = rtvec_alloc (16);

71467

+ bool be = BYTES_BIG_ENDIAN;

71468

71469

emit_insn (gen_altivec_vspltish (vzero, const0_rtx));

71470

71471

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

71472

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 8);

71473

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 16);

71474

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 9);

71475

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

71476

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 10);

71477

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 16);

71478

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 11);

71479

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

71480

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 12);

71481

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 16);

71482

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 13);

71483

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

71484

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 14);

71485

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 16);

71486

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 15);

71487

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 15);

71488

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 8 : 16);

71489

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 16 : 14);

71490

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 9 : 16);

71491

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 13);

71492

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 10 : 16);

71493

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 16 : 12);

71494

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 11 : 16);

71495

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 11);

71496

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 12 : 16);

71497

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 16 : 10);

71498

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 13 : 16);

71499

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 9);

71500

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 14 : 16);

71501

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 16 : 8);

71502

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 15 : 16);

71503

71504

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

71505

emit_insn (gen_vperm_v16qiv8hi (operands[0], operands[1], vzero, mask));

71506

@@ -2130,25 +2819,26 @@

71507

rtx vzero = gen_reg_rtx (V4SImode);

71508

rtx mask = gen_reg_rtx (V16QImode);

71509

rtvec v = rtvec_alloc (16);

71510

+ bool be = BYTES_BIG_ENDIAN;

71511

71512

emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));

71513

71514

- RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, 16);

71515

- RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, 17);

71516

- RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, 8);

71517

- RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, 9);

71518

- RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, 16);

71519

- RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, 17);

71520

- RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, 10);

71521

- RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, 11);

71522

- RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, 16);

71523

- RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, 17);

71524

- RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, 12);

71525

- RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, 13);

71526

- RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, 16);

71527

- RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, 17);

71528

- RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, 14);

71529

- RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, 15);

71530

+ RTVEC_ELT (v, 0) = gen_rtx_CONST_INT (QImode, be ? 16 : 15);

71531

+ RTVEC_ELT (v, 1) = gen_rtx_CONST_INT (QImode, be ? 17 : 14);

71532

+ RTVEC_ELT (v, 2) = gen_rtx_CONST_INT (QImode, be ? 8 : 17);

71533

+ RTVEC_ELT (v, 3) = gen_rtx_CONST_INT (QImode, be ? 9 : 16);

71534

+ RTVEC_ELT (v, 4) = gen_rtx_CONST_INT (QImode, be ? 16 : 13);

71535

+ RTVEC_ELT (v, 5) = gen_rtx_CONST_INT (QImode, be ? 17 : 12);

71536

+ RTVEC_ELT (v, 6) = gen_rtx_CONST_INT (QImode, be ? 10 : 17);

71537

+ RTVEC_ELT (v, 7) = gen_rtx_CONST_INT (QImode, be ? 11 : 16);

71538

+ RTVEC_ELT (v, 8) = gen_rtx_CONST_INT (QImode, be ? 16 : 11);

71539

+ RTVEC_ELT (v, 9) = gen_rtx_CONST_INT (QImode, be ? 17 : 10);

71540

+ RTVEC_ELT (v, 10) = gen_rtx_CONST_INT (QImode, be ? 12 : 17);

71541

+ RTVEC_ELT (v, 11) = gen_rtx_CONST_INT (QImode, be ? 13 : 16);

71542

+ RTVEC_ELT (v, 12) = gen_rtx_CONST_INT (QImode, be ? 16 : 9);

71543

+ RTVEC_ELT (v, 13) = gen_rtx_CONST_INT (QImode, be ? 17 : 8);

71544

+ RTVEC_ELT (v, 14) = gen_rtx_CONST_INT (QImode, be ? 14 : 17);

71545

+ RTVEC_ELT (v, 15) = gen_rtx_CONST_INT (QImode, be ? 15 : 16);

71546

71547

emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));

71548

emit_insn (gen_vperm_v8hiv4si (operands[0], operands[1], vzero, mask));

71549

@@ -2166,9 +2856,18 @@

71550

rtx ve = gen_reg_rtx (V8HImode);

71551

rtx vo = gen_reg_rtx (V8HImode);

71552

71553

- emit_insn (gen_vec_widen_umult_even_v16qi (ve, operands[1], operands[2]));

71554

- emit_insn (gen_vec_widen_umult_odd_v16qi (vo, operands[1], operands[2]));

71555

- emit_insn (gen_altivec_vmrghh (operands[0], ve, vo));

71556

+ if (BYTES_BIG_ENDIAN)

71557

+ {

71558

+ emit_insn (gen_altivec_vmuleub (ve, operands[1], operands[2]));

71559

+ emit_insn (gen_altivec_vmuloub (vo, operands[1], operands[2]));

71560

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], ve, vo));

71561

+ }

71562

+ else

71563

+ {

71564

+ emit_insn (gen_altivec_vmuloub (ve, operands[1], operands[2]));

71565

+ emit_insn (gen_altivec_vmuleub (vo, operands[1], operands[2]));

71566

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], vo, ve));

71567

+ }

71568

DONE;

71569

}")

71570

71571

@@ -2183,9 +2882,18 @@

71572

rtx ve = gen_reg_rtx (V8HImode);

71573

rtx vo = gen_reg_rtx (V8HImode);

71574

71575

- emit_insn (gen_vec_widen_umult_even_v16qi (ve, operands[1], operands[2]));

71576

- emit_insn (gen_vec_widen_umult_odd_v16qi (vo, operands[1], operands[2]));

71577

- emit_insn (gen_altivec_vmrglh (operands[0], ve, vo));

71578

+ if (BYTES_BIG_ENDIAN)

71579

+ {

71580

+ emit_insn (gen_altivec_vmuleub (ve, operands[1], operands[2]));

71581

+ emit_insn (gen_altivec_vmuloub (vo, operands[1], operands[2]));

71582

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], ve, vo));

71583

+ }

71584

+ else

71585

+ {

71586

+ emit_insn (gen_altivec_vmuloub (ve, operands[1], operands[2]));

71587

+ emit_insn (gen_altivec_vmuleub (vo, operands[1], operands[2]));

71588

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], vo, ve));

71589

+ }

71590

DONE;

71591

}")

71592

71593

@@ -2200,9 +2908,18 @@

71594

rtx ve = gen_reg_rtx (V8HImode);

71595

rtx vo = gen_reg_rtx (V8HImode);

71596

71597

- emit_insn (gen_vec_widen_smult_even_v16qi (ve, operands[1], operands[2]));

71598

- emit_insn (gen_vec_widen_smult_odd_v16qi (vo, operands[1], operands[2]));

71599

- emit_insn (gen_altivec_vmrghh (operands[0], ve, vo));

71600

+ if (BYTES_BIG_ENDIAN)

71601

+ {

71602

+ emit_insn (gen_altivec_vmulesb (ve, operands[1], operands[2]));

71603

+ emit_insn (gen_altivec_vmulosb (vo, operands[1], operands[2]));

71604

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], ve, vo));

71605

+ }

71606

+ else

71607

+ {

71608

+ emit_insn (gen_altivec_vmulosb (ve, operands[1], operands[2]));

71609

+ emit_insn (gen_altivec_vmulesb (vo, operands[1], operands[2]));

71610

+ emit_insn (gen_altivec_vmrghh_direct (operands[0], vo, ve));

71611

+ }

71612

DONE;

71613

}")

71614

71615

@@ -2217,9 +2934,18 @@

71616

rtx ve = gen_reg_rtx (V8HImode);

71617

rtx vo = gen_reg_rtx (V8HImode);

71618

71619

- emit_insn (gen_vec_widen_smult_even_v16qi (ve, operands[1], operands[2]));

71620

- emit_insn (gen_vec_widen_smult_odd_v16qi (vo, operands[1], operands[2]));

71621

- emit_insn (gen_altivec_vmrglh (operands[0], ve, vo));

71622

+ if (BYTES_BIG_ENDIAN)

71623

+ {

71624

+ emit_insn (gen_altivec_vmulesb (ve, operands[1], operands[2]));

71625

+ emit_insn (gen_altivec_vmulosb (vo, operands[1], operands[2]));

71626

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], ve, vo));

71627

+ }

71628

+ else

71629

+ {

71630

+ emit_insn (gen_altivec_vmulosb (ve, operands[1], operands[2]));

71631

+ emit_insn (gen_altivec_vmulesb (vo, operands[1], operands[2]));

71632

+ emit_insn (gen_altivec_vmrglh_direct (operands[0], vo, ve));

71633

+ }

71634

DONE;

71635

}")

71636

71637

@@ -2234,9 +2960,18 @@

71638

rtx ve = gen_reg_rtx (V4SImode);

71639

rtx vo = gen_reg_rtx (V4SImode);

71640

71641

- emit_insn (gen_vec_widen_umult_even_v8hi (ve, operands[1], operands[2]));

71642

- emit_insn (gen_vec_widen_umult_odd_v8hi (vo, operands[1], operands[2]));

71643

- emit_insn (gen_altivec_vmrghw (operands[0], ve, vo));

71644

+ if (BYTES_BIG_ENDIAN)

71645

+ {

71646

+ emit_insn (gen_altivec_vmuleuh (ve, operands[1], operands[2]));

71647

+ emit_insn (gen_altivec_vmulouh (vo, operands[1], operands[2]));

71648

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], ve, vo));

71649

+ }

71650

+ else

71651

+ {

71652

+ emit_insn (gen_altivec_vmulouh (ve, operands[1], operands[2]));

71653

+ emit_insn (gen_altivec_vmuleuh (vo, operands[1], operands[2]));

71654

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], vo, ve));

71655

+ }

71656

DONE;

71657

}")

71658

71659

@@ -2251,9 +2986,18 @@

71660

rtx ve = gen_reg_rtx (V4SImode);

71661

rtx vo = gen_reg_rtx (V4SImode);

71662

71663

- emit_insn (gen_vec_widen_umult_even_v8hi (ve, operands[1], operands[2]));

71664

- emit_insn (gen_vec_widen_umult_odd_v8hi (vo, operands[1], operands[2]));

71665

- emit_insn (gen_altivec_vmrglw (operands[0], ve, vo));

71666

+ if (BYTES_BIG_ENDIAN)

71667

+ {

71668

+ emit_insn (gen_altivec_vmuleuh (ve, operands[1], operands[2]));

71669

+ emit_insn (gen_altivec_vmulouh (vo, operands[1], operands[2]));

71670

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], ve, vo));

71671

+ }

71672

+ else

71673

+ {

71674

+ emit_insn (gen_altivec_vmulouh (ve, operands[1], operands[2]));

71675

+ emit_insn (gen_altivec_vmuleuh (vo, operands[1], operands[2]));

71676

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], vo, ve));

71677

+ }

71678

DONE;

71679

}")

71680

71681

@@ -2268,9 +3012,18 @@

71682

rtx ve = gen_reg_rtx (V4SImode);

71683

rtx vo = gen_reg_rtx (V4SImode);

71684

71685

- emit_insn (gen_vec_widen_smult_even_v8hi (ve, operands[1], operands[2]));

71686

- emit_insn (gen_vec_widen_smult_odd_v8hi (vo, operands[1], operands[2]));

71687

- emit_insn (gen_altivec_vmrghw (operands[0], ve, vo));

71688

+ if (BYTES_BIG_ENDIAN)

71689

+ {

71690

+ emit_insn (gen_altivec_vmulesh (ve, operands[1], operands[2]));

71691

+ emit_insn (gen_altivec_vmulosh (vo, operands[1], operands[2]));

71692

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], ve, vo));

71693

+ }

71694

+ else

71695

+ {

71696

+ emit_insn (gen_altivec_vmulosh (ve, operands[1], operands[2]));

71697

+ emit_insn (gen_altivec_vmulesh (vo, operands[1], operands[2]));

71698

+ emit_insn (gen_altivec_vmrghw_direct (operands[0], vo, ve));

71699

+ }

71700

DONE;

71701

}")

71702

71703

@@ -2285,35 +3038,28 @@

71704

rtx ve = gen_reg_rtx (V4SImode);

71705

rtx vo = gen_reg_rtx (V4SImode);

71706

71707

- emit_insn (gen_vec_widen_smult_even_v8hi (ve, operands[1], operands[2]));

71708

- emit_insn (gen_vec_widen_smult_odd_v8hi (vo, operands[1], operands[2]));

71709

- emit_insn (gen_altivec_vmrglw (operands[0], ve, vo));

71710

+ if (BYTES_BIG_ENDIAN)

71711

+ {

71712

+ emit_insn (gen_altivec_vmulesh (ve, operands[1], operands[2]));

71713

+ emit_insn (gen_altivec_vmulosh (vo, operands[1], operands[2]));

71714

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], ve, vo));

71715

+ }

71716

+ else

71717

+ {

71718

+ emit_insn (gen_altivec_vmulosh (ve, operands[1], operands[2]));

71719

+ emit_insn (gen_altivec_vmulesh (vo, operands[1], operands[2]));

71720

+ emit_insn (gen_altivec_vmrglw_direct (operands[0], vo, ve));

71721

+ }

71722

DONE;

71723

}")

71724

71725

-(define_expand "vec_pack_trunc_v8hi"

71726

- [(set (match_operand:V16QI 0 "register_operand" "=v")

71727

- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")

71728

- (match_operand:V8HI 2 "register_operand" "v")]

71729

- UNSPEC_VPKUHUM))]

71730

- "TARGET_ALTIVEC"

71731

- "

71732

-{

71733

- emit_insn (gen_altivec_vpkuhum (operands[0], operands[1], operands[2]));

71734

- DONE;

71735

-}")

71736

-

71737

-(define_expand "vec_pack_trunc_v4si"

71738

- [(set (match_operand:V8HI 0 "register_operand" "=v")

71739

- (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")

71740

- (match_operand:V4SI 2 "register_operand" "v")]

71741

- UNSPEC_VPKUWUM))]

71742

- "TARGET_ALTIVEC"

71743

- "

71744

-{

71745

- emit_insn (gen_altivec_vpkuwum (operands[0], operands[1], operands[2]));

71746

- DONE;

71747

-}")

71748

+(define_expand "vec_pack_trunc_<mode>"

71749

+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")

71750

+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")

71751

+ (match_operand:VP 2 "register_operand" "v")]

71752

+ UNSPEC_VPACK_UNS_UNS_MOD))]

71753

+ "<VI_unit>"

71754

+ "")

71755

71756

(define_expand "altivec_negv4sf2"

71757

[(use (match_operand:V4SF 0 "register_operand" ""))

71758

@@ -2460,3 +3206,243 @@

71759

emit_insn (gen_altivec_vcfux (operands[0], tmp, const0_rtx));

71760

DONE;

71761

}")

71762

+

71763

+

71764

+;; Power8 vector instructions encoded as Altivec instructions

71765

+

71766

+;; Vector count leading zeros

71767

+(define_insn "*p8v_clz<mode>2"

71768

+ [(set (match_operand:VI2 0 "register_operand" "=v")

71769

+ (clz:VI2 (match_operand:VI2 1 "register_operand" "v")))]

71770

+ "TARGET_P8_VECTOR"

71771

+ "vclz<wd> %0,%1"

71772

+ [(set_attr "length" "4")

71773

+ (set_attr "type" "vecsimple")])

71774

+

71775

+;; Vector population count

71776

+(define_insn "*p8v_popcount<mode>2"

71777

+ [(set (match_operand:VI2 0 "register_operand" "=v")

71778

+ (popcount:VI2 (match_operand:VI2 1 "register_operand" "v")))]

71779

+ "TARGET_P8_VECTOR"

71780

+ "vpopcnt<wd> %0,%1"

71781

+ [(set_attr "length" "4")

71782

+ (set_attr "type" "vecsimple")])

71783

+

71784

+;; Vector Gather Bits by Bytes by Doubleword

71785

+(define_insn "p8v_vgbbd"

71786

+ [(set (match_operand:V16QI 0 "register_operand" "=v")

71787

+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")]

71788

+ UNSPEC_VGBBD))]

71789

+ "TARGET_P8_VECTOR"

71790

+ "vgbbd %0,%1"

71791

+ [(set_attr "length" "4")

71792

+ (set_attr "type" "vecsimple")])

71793

+

71794

+

71795

+;; 128-bit binary integer arithmetic

71796

+;; We have a special container type (V1TImode) to allow operations using the

71797

+;; ISA 2.07 128-bit binary support to target the VMX/altivec registers without

71798

+;; having to worry about the register allocator deciding GPRs are better.

71799

+

71800

+(define_insn "altivec_vadduqm"

71801

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71802

+ (plus:V1TI (match_operand:V1TI 1 "register_operand" "v")

71803

+ (match_operand:V1TI 2 "register_operand" "v")))]

71804

+ "TARGET_VADDUQM"

71805

+ "vadduqm %0,%1,%2"

71806

+ [(set_attr "length" "4")

71807

+ (set_attr "type" "vecsimple")])

71808

+

71809

+(define_insn "altivec_vaddcuq"

71810

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71811

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

71812

+ (match_operand:V1TI 2 "register_operand" "v")]

71813

+ UNSPEC_VADDCUQ))]

71814

+ "TARGET_VADDUQM"

71815

+ "vaddcuq %0,%1,%2"

71816

+ [(set_attr "length" "4")

71817

+ (set_attr "type" "vecsimple")])

71818

+

71819

+(define_insn "altivec_vsubuqm"

71820

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71821

+ (minus:V1TI (match_operand:V1TI 1 "register_operand" "v")

71822

+ (match_operand:V1TI 2 "register_operand" "v")))]

71823

+ "TARGET_VADDUQM"

71824

+ "vsubuqm %0,%1,%2"

71825

+ [(set_attr "length" "4")

71826

+ (set_attr "type" "vecsimple")])

71827

+

71828

+(define_insn "altivec_vsubcuq"

71829

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71830

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

71831

+ (match_operand:V1TI 2 "register_operand" "v")]

71832

+ UNSPEC_VSUBCUQ))]

71833

+ "TARGET_VADDUQM"

71834

+ "vsubcuq %0,%1,%2"

71835

+ [(set_attr "length" "4")

71836

+ (set_attr "type" "vecsimple")])

71837

+

71838

+(define_insn "altivec_vaddeuqm"

71839

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71840

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

71841

+ (match_operand:V1TI 2 "register_operand" "v")

71842

+ (match_operand:V1TI 3 "register_operand" "v")]

71843

+ UNSPEC_VADDEUQM))]

71844

+ "TARGET_VADDUQM"

71845

+ "vaddeuqm %0,%1,%2,%3"

71846

+ [(set_attr "length" "4")

71847

+ (set_attr "type" "vecsimple")])

71848

+

71849

+(define_insn "altivec_vaddecuq"

71850

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71851

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

71852

+ (match_operand:V1TI 2 "register_operand" "v")

71853

+ (match_operand:V1TI 3 "register_operand" "v")]

71854

+ UNSPEC_VADDECUQ))]

71855

+ "TARGET_VADDUQM"

71856

+ "vaddecuq %0,%1,%2,%3"

71857

+ [(set_attr "length" "4")

71858

+ (set_attr "type" "vecsimple")])

71859

+

71860

+(define_insn "altivec_vsubeuqm"

71861

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71862

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

71863

+ (match_operand:V1TI 2 "register_operand" "v")

71864

+ (match_operand:V1TI 3 "register_operand" "v")]

71865

+ UNSPEC_VSUBEUQM))]

71866

+ "TARGET_VADDUQM"

71867

+ "vsubeuqm %0,%1,%2,%3"

71868

+ [(set_attr "length" "4")

71869

+ (set_attr "type" "vecsimple")])

71870

+

71871

+(define_insn "altivec_vsubecuq"

71872

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71873

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

71874

+ (match_operand:V1TI 2 "register_operand" "v")

71875

+ (match_operand:V1TI 3 "register_operand" "v")]

71876

+ UNSPEC_VSUBECUQ))]

71877

+ "TARGET_VADDUQM"

71878

+ "vsubecuq %0,%1,%2,%3"

71879

+ [(set_attr "length" "4")

71880

+ (set_attr "type" "vecsimple")])

71881

+

71882

+;; We use V2DI as the output type to simplify converting the permute

71883

+;; bits into an integer

71884

+(define_insn "altivec_vbpermq"

71885

+ [(set (match_operand:V2DI 0 "register_operand" "=v")

71886

+ (unspec:V2DI [(match_operand:V16QI 1 "register_operand" "v")

71887

+ (match_operand:V16QI 2 "register_operand" "v")]

71888

+ UNSPEC_VBPERMQ))]

71889

+ "TARGET_P8_VECTOR"

71890

+ "vbpermq %0,%1,%2"

71891

+ [(set_attr "length" "4")

71892

+ (set_attr "type" "vecsimple")])

71893

+

71894

+;; Decimal Integer operations

71895

+(define_int_iterator UNSPEC_BCD_ADD_SUB [UNSPEC_BCDADD UNSPEC_BCDSUB])

71896

+

71897

+(define_int_attr bcd_add_sub [(UNSPEC_BCDADD "add")

71898

+ (UNSPEC_BCDSUB "sub")])

71899

+

71900

+(define_code_iterator BCD_TEST [eq lt gt unordered])

71901

+

71902

+(define_insn "bcd<bcd_add_sub>"

71903

+ [(set (match_operand:V1TI 0 "register_operand" "")

71904

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "")

71905

+ (match_operand:V1TI 2 "register_operand" "")

71906

+ (match_operand:QI 3 "const_0_to_1_operand" "")]

71907

+ UNSPEC_BCD_ADD_SUB))

71908

+ (clobber (reg:CCFP 74))]

71909

+ "TARGET_P8_VECTOR"

71910

+ "bcd<bcd_add_sub>. %0,%1,%2,%3"

71911

+ [(set_attr "length" "4")

71912

+ (set_attr "type" "vecsimple")])

71913

+

71914

+;; Use a floating point type (V2DFmode) for the compare to set CR6 so that we

71915

+;; can use the unordered test for BCD nans and add/subtracts that overflow. An

71916

+;; UNORDERED test on an integer type (like V1TImode) is not defined. The type

71917

+;; probably should be one that can go in the VMX (Altivec) registers, so we

71918

+;; can't use DDmode or DFmode.

71919

+(define_insn "*bcd<bcd_add_sub>_test"

71920

+ [(set (reg:CCFP 74)

71921

+ (compare:CCFP

71922

+ (unspec:V2DF [(match_operand:V1TI 1 "register_operand" "v")

71923

+ (match_operand:V1TI 2 "register_operand" "v")

71924

+ (match_operand:QI 3 "const_0_to_1_operand" "i")]

71925

+ UNSPEC_BCD_ADD_SUB)

71926

+ (match_operand:V2DF 4 "zero_constant" "j")))

71927

+ (clobber (match_scratch:V1TI 0 "=v"))]

71928

+ "TARGET_P8_VECTOR"

71929

+ "bcd<bcd_add_sub>. %0,%1,%2,%3"

71930

+ [(set_attr "length" "4")

71931

+ (set_attr "type" "vecsimple")])

71932

+

71933

+(define_insn "*bcd<bcd_add_sub>_test2"

71934

+ [(set (match_operand:V1TI 0 "register_operand" "=v")

71935

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v")

71936

+ (match_operand:V1TI 2 "register_operand" "v")

71937

+ (match_operand:QI 3 "const_0_to_1_operand" "i")]

71938

+ UNSPEC_BCD_ADD_SUB))

71939

+ (set (reg:CCFP 74)

71940

+ (compare:CCFP

71941

+ (unspec:V2DF [(match_dup 1)

71942

+ (match_dup 2)

71943

+ (match_dup 3)]

71944

+ UNSPEC_BCD_ADD_SUB)

71945

+ (match_operand:V2DF 4 "zero_constant" "j")))]

71946

+ "TARGET_P8_VECTOR"

71947

+ "bcd<bcd_add_sub>. %0,%1,%2,%3"

71948

+ [(set_attr "length" "4")

71949

+ (set_attr "type" "vecsimple")])

71950

+

71951

+(define_expand "bcd<bcd_add_sub>_<code>"

71952

+ [(parallel [(set (reg:CCFP 74)

71953

+ (compare:CCFP

71954

+ (unspec:V2DF [(match_operand:V1TI 1 "register_operand" "")

71955

+ (match_operand:V1TI 2 "register_operand" "")

71956

+ (match_operand:QI 3 "const_0_to_1_operand" "")]

71957

+ UNSPEC_BCD_ADD_SUB)

71958

+ (match_dup 4)))

71959

+ (clobber (match_scratch:V1TI 5 ""))])

71960

+ (set (match_operand:SI 0 "register_operand" "")

71961

+ (BCD_TEST:SI (reg:CCFP 74)

71962

+ (const_int 0)))]

71963

+ "TARGET_P8_VECTOR"

71964

+{

71965

+ operands[4] = CONST0_RTX (V2DFmode);

71966

+})

71967

+

71968

+;; Peephole2 pattern to combine a bcdadd/bcdsub that calculates the value and

71969

+;; the bcdadd/bcdsub that tests the value. The combiner won't work since

71970

+;; CR6 is a hard coded register. Unfortunately, all of the Altivec predicate

71971

+;; support is hard coded to use the fixed register CR6 instead of creating

71972

+;; a register class for CR6.

71973

+

71974

+(define_peephole2

71975

+ [(parallel [(set (match_operand:V1TI 0 "register_operand" "")

71976

+ (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "")

71977

+ (match_operand:V1TI 2 "register_operand" "")

71978

+ (match_operand:QI 3 "const_0_to_1_operand" "")]

71979

+ UNSPEC_BCD_ADD_SUB))

71980

+ (clobber (reg:CCFP 74))])

71981

+ (parallel [(set (reg:CCFP 74)

71982

+ (compare:CCFP

71983

+ (unspec:V2DF [(match_dup 1)

71984

+ (match_dup 2)

71985

+ (match_dup 3)]

71986

+ UNSPEC_BCD_ADD_SUB)

71987

+ (match_operand:V2DF 4 "zero_constant" "")))

71988

+ (clobber (match_operand:V1TI 5 "register_operand" ""))])]

71989

+ "TARGET_P8_VECTOR"

71990

+ [(parallel [(set (match_dup 0)

71991

+ (unspec:V1TI [(match_dup 1)

71992

+ (match_dup 2)

71993

+ (match_dup 3)]

71994

+ UNSPEC_BCD_ADD_SUB))

71995

+ (set (reg:CCFP 74)

71996

+ (compare:CCFP

71997

+ (unspec:V2DF [(match_dup 1)

71998

+ (match_dup 2)

71999

+ (match_dup 3)]

72000

+ UNSPEC_BCD_ADD_SUB)

72001

+ (match_dup 4)))])])

72002

Index: gcc/config/rs6000/sysv4le.h

72003

===================================================================

72004

--- a/src/gcc/config/rs6000/sysv4le.h (.../tags/gcc_4_8_2_release)

72005

+++ b/src/gcc/config/rs6000/sysv4le.h (.../branches/gcc-4_8-branch)

72006

@@ -22,9 +22,6 @@

72007

#undef TARGET_DEFAULT

72008

#define TARGET_DEFAULT MASK_LITTLE_ENDIAN

72009

72010

-#undef CC1_ENDIAN_DEFAULT_SPEC

72011

-#define CC1_ENDIAN_DEFAULT_SPEC "%(cc1_endian_little)"

72012

-

72013

#undef DEFAULT_ASM_ENDIAN

72014

#define DEFAULT_ASM_ENDIAN " -mlittle"

72015

72016

@@ -34,3 +31,7 @@

72017

72018

#undef MULTILIB_DEFAULTS

72019

#define MULTILIB_DEFAULTS { "mlittle", "mcall-sysv" }

72020

+

72021

+/* Little-endian PowerPC64 Linux uses the ELF v2 ABI by default. */

72022

+#define LINUX64_DEFAULT_ABI_ELFv2

72023

+

72024

Index: gcc/config/rs6000/dfp.md

72025

===================================================================

72026

--- a/src/gcc/config/rs6000/dfp.md (.../tags/gcc_4_8_2_release)

72027

+++ b/src/gcc/config/rs6000/dfp.md (.../branches/gcc-4_8-branch)

72028

@@ -29,77 +29,6 @@

72029

])

72030

72031

72032

-(define_expand "movsd"

72033

- [(set (match_operand:SD 0 "nonimmediate_operand" "")

72034

- (match_operand:SD 1 "any_operand" ""))]

72035

- "TARGET_HARD_FLOAT && TARGET_FPRS"

72036

- "{ rs6000_emit_move (operands[0], operands[1], SDmode); DONE; }")

72037

-

72038

-(define_split

72039

- [(set (match_operand:SD 0 "gpc_reg_operand" "")

72040

- (match_operand:SD 1 "const_double_operand" ""))]

72041

- "reload_completed

72042

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72043

- || (GET_CODE (operands[0]) == SUBREG

72044

- && GET_CODE (SUBREG_REG (operands[0])) == REG

72045

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

72046

- [(set (match_dup 2) (match_dup 3))]

72047

- "

72048

-{

72049

- long l;

72050

- REAL_VALUE_TYPE rv;

72051

-

72052

- REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

72053

- REAL_VALUE_TO_TARGET_DECIMAL32 (rv, l);

72054

-

72055

- if (! TARGET_POWERPC64)

72056

- operands[2] = operand_subword (operands[0], 0, 0, SDmode);

72057

- else

72058

- operands[2] = gen_lowpart (SImode, operands[0]);

72059

-

72060

- operands[3] = gen_int_mode (l, SImode);

72061

-}")

72062

-

72063

-(define_insn "movsd_hardfloat"

72064

- [(set (match_operand:SD 0 "nonimmediate_operand" "=r,r,m,f,*c*l,!r,*h,!r,!r")

72065

- (match_operand:SD 1 "input_operand" "r,m,r,f,r,h,0,G,Fn"))]

72066

- "(gpc_reg_operand (operands[0], SDmode)

72067

- || gpc_reg_operand (operands[1], SDmode))

72068

- && (TARGET_HARD_FLOAT && TARGET_FPRS)"

72069

- "@

72070

- mr %0,%1

72071

- lwz%U1%X1 %0,%1

72072

- stw%U0%X0 %1,%0

72073

- fmr %0,%1

72074

- mt%0 %1

72075

- mf%1 %0

72076

- nop

72077

- #

72078

- #"

72079

- [(set_attr "type" "*,load,store,fp,mtjmpr,mfjmpr,*,*,*")

72080

- (set_attr "length" "4,4,4,4,4,4,4,4,8")])

72081

-

72082

-(define_insn "movsd_softfloat"

72083

- [(set (match_operand:SD 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,r,r,*h")

72084

- (match_operand:SD 1 "input_operand" "r,r,h,m,r,I,L,R,G,Fn,0"))]

72085

- "(gpc_reg_operand (operands[0], SDmode)

72086

- || gpc_reg_operand (operands[1], SDmode))

72087

- && (TARGET_SOFT_FLOAT || !TARGET_FPRS)"

72088

- "@

72089

- mr %0,%1

72090

- mt%0 %1

72091

- mf%1 %0

72092

- lwz%U1%X1 %0,%1

72093

- stw%U0%X0 %1,%0

72094

- li %0,%1

72095

- lis %0,%v1

72096

- la %0,%a1

72097

- #

72098

- #

72099

- nop"

72100

- [(set_attr "type" "*,mtjmpr,mfjmpr,load,store,*,*,*,*,*,*")

72101

- (set_attr "length" "4,4,4,4,4,4,4,4,4,8,4")])

72102

-

72103

(define_insn "movsd_store"

72104

[(set (match_operand:DD 0 "nonimmediate_operand" "=m")

72105

(unspec:DD [(match_operand:SD 1 "input_operand" "d")]

72106

@@ -108,7 +37,14 @@

72107

|| gpc_reg_operand (operands[1], SDmode))

72108

&& TARGET_HARD_FLOAT && TARGET_FPRS"

72109

"stfd%U0%X0 %1,%0"

72110

- [(set_attr "type" "fpstore")

72111

+ [(set (attr "type")

72112

+ (if_then_else

72113

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

72114

+ (const_string "fpstore_ux")

72115

+ (if_then_else

72116

+ (match_test "update_address_mem (operands[0], VOIDmode)")

72117

+ (const_string "fpstore_u")

72118

+ (const_string "fpstore"))))

72119

(set_attr "length" "4")])

72120

72121

(define_insn "movsd_load"

72122

@@ -119,7 +55,14 @@

72123

|| gpc_reg_operand (operands[1], DDmode))

72124

&& TARGET_HARD_FLOAT && TARGET_FPRS"

72125

"lfd%U1%X1 %0,%1"

72126

- [(set_attr "type" "fpload")

72127

+ [(set (attr "type")

72128

+ (if_then_else

72129

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

72130

+ (const_string "fpload_ux")

72131

+ (if_then_else

72132

+ (match_test "update_address_mem (operands[1], VOIDmode)")

72133

+ (const_string "fpload_u")

72134

+ (const_string "fpload"))))

72135

(set_attr "length" "4")])

72136

72137

;; Hardware support for decimal floating point operations.

72138

@@ -182,211 +125,6 @@

72139

"fnabs %0,%1"

72140

[(set_attr "type" "fp")])

72141

72142

-(define_expand "movdd"

72143

- [(set (match_operand:DD 0 "nonimmediate_operand" "")

72144

- (match_operand:DD 1 "any_operand" ""))]

72145

- ""

72146

- "{ rs6000_emit_move (operands[0], operands[1], DDmode); DONE; }")

72147

-

72148

-(define_split

72149

- [(set (match_operand:DD 0 "gpc_reg_operand" "")

72150

- (match_operand:DD 1 "const_int_operand" ""))]

72151

- "! TARGET_POWERPC64 && reload_completed

72152

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72153

- || (GET_CODE (operands[0]) == SUBREG

72154

- && GET_CODE (SUBREG_REG (operands[0])) == REG

72155

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

72156

- [(set (match_dup 2) (match_dup 4))

72157

- (set (match_dup 3) (match_dup 1))]

72158

- "

72159

-{

72160

- int endian = (WORDS_BIG_ENDIAN == 0);

72161

- HOST_WIDE_INT value = INTVAL (operands[1]);

72162

-

72163

- operands[2] = operand_subword (operands[0], endian, 0, DDmode);

72164

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DDmode);

72165

-#if HOST_BITS_PER_WIDE_INT == 32

72166

- operands[4] = (value & 0x80000000) ? constm1_rtx : const0_rtx;

72167

-#else

72168

- operands[4] = GEN_INT (value >> 32);

72169

- operands[1] = GEN_INT (((value & 0xffffffff) ^ 0x80000000) - 0x80000000);

72170

-#endif

72171

-}")

72172

-

72173

-(define_split

72174

- [(set (match_operand:DD 0 "gpc_reg_operand" "")

72175

- (match_operand:DD 1 "const_double_operand" ""))]

72176

- "! TARGET_POWERPC64 && reload_completed

72177

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72178

- || (GET_CODE (operands[0]) == SUBREG

72179

- && GET_CODE (SUBREG_REG (operands[0])) == REG

72180

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

72181

- [(set (match_dup 2) (match_dup 4))

72182

- (set (match_dup 3) (match_dup 5))]

72183

- "

72184

-{

72185

- int endian = (WORDS_BIG_ENDIAN == 0);

72186

- long l[2];

72187

- REAL_VALUE_TYPE rv;

72188

-

72189

- REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

72190

- REAL_VALUE_TO_TARGET_DECIMAL64 (rv, l);

72191

-

72192

- operands[2] = operand_subword (operands[0], endian, 0, DDmode);

72193

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DDmode);

72194

- operands[4] = gen_int_mode (l[endian], SImode);

72195

- operands[5] = gen_int_mode (l[1 - endian], SImode);

72196

-}")

72197

-

72198

-(define_split

72199

- [(set (match_operand:DD 0 "gpc_reg_operand" "")

72200

- (match_operand:DD 1 "const_double_operand" ""))]

72201

- "TARGET_POWERPC64 && reload_completed

72202

- && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

72203

- || (GET_CODE (operands[0]) == SUBREG

72204

- && GET_CODE (SUBREG_REG (operands[0])) == REG

72205

- && REGNO (SUBREG_REG (operands[0])) <= 31))"

72206

- [(set (match_dup 2) (match_dup 3))]

72207

- "

72208

-{

72209

- int endian = (WORDS_BIG_ENDIAN == 0);

72210

- long l[2];

72211

- REAL_VALUE_TYPE rv;

72212

-#if HOST_BITS_PER_WIDE_INT >= 64

72213

- HOST_WIDE_INT val;

72214

-#endif

72215

-

72216

- REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

72217

- REAL_VALUE_TO_TARGET_DECIMAL64 (rv, l);

72218

-

72219

- operands[2] = gen_lowpart (DImode, operands[0]);

72220

- /* HIGHPART is lower memory address when WORDS_BIG_ENDIAN. */

72221

-#if HOST_BITS_PER_WIDE_INT >= 64

72222

- val = ((HOST_WIDE_INT)(unsigned long)l[endian] << 32

72223

- | ((HOST_WIDE_INT)(unsigned long)l[1 - endian]));

72224

-

72225

- operands[3] = gen_int_mode (val, DImode);

72226

-#else

72227

- operands[3] = immed_double_const (l[1 - endian], l[endian], DImode);

72228

-#endif

72229

-}")

72230

-

72231

-;; Don't have reload use general registers to load a constant. First,

72232

-;; it might not work if the output operand is the equivalent of

72233

-;; a non-offsettable memref, but also it is less efficient than loading

72234

-;; the constant into an FP register, since it will probably be used there.

72235

-;; The "??" is a kludge until we can figure out a more reasonable way

72236

-;; of handling these non-offsettable values.

72237

-(define_insn "*movdd_hardfloat32"

72238

- [(set (match_operand:DD 0 "nonimmediate_operand" "=!r,??r,m,d,d,m,!r,!r,!r")

72239

- (match_operand:DD 1 "input_operand" "r,m,r,d,m,d,G,H,F"))]

72240

- "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS

72241

- && (gpc_reg_operand (operands[0], DDmode)

72242

- || gpc_reg_operand (operands[1], DDmode))"

72243

- "*

72244

-{

72245

- switch (which_alternative)

72246

- {

72247

- default:

72248

- gcc_unreachable ();

72249

- case 0:

72250

- case 1:

72251

- case 2:

72252

- return \"#\";

72253

- case 3:

72254

- return \"fmr %0,%1\";

72255

- case 4:

72256

- return \"lfd%U1%X1 %0,%1\";

72257

- case 5:

72258

- return \"stfd%U0%X0 %1,%0\";

72259

- case 6:

72260

- case 7:

72261

- case 8:

72262

- return \"#\";

72263

- }

72264

-}"

72265

- [(set_attr "type" "two,load,store,fp,fpload,fpstore,*,*,*")

72266

- (set_attr "length" "8,16,16,4,4,4,8,12,16")])

72267

-

72268

-(define_insn "*movdd_softfloat32"

72269

- [(set (match_operand:DD 0 "nonimmediate_operand" "=r,r,m,r,r,r")

72270

- (match_operand:DD 1 "input_operand" "r,m,r,G,H,F"))]

72271

- "! TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS)

72272

- && (gpc_reg_operand (operands[0], DDmode)

72273

- || gpc_reg_operand (operands[1], DDmode))"

72274

- "#"

72275

- [(set_attr "type" "two,load,store,*,*,*")

72276

- (set_attr "length" "8,8,8,8,12,16")])

72277

-

72278

-; ld/std require word-aligned displacements -> 'Y' constraint.

72279

-; List Y->r and r->Y before r->r for reload.

72280

-(define_insn "*movdd_hardfloat64_mfpgpr"

72281

- [(set (match_operand:DD 0 "nonimmediate_operand" "=Y,r,!r,d,d,m,*c*l,!r,*h,!r,!r,!r,r,d")

72282

- (match_operand:DD 1 "input_operand" "r,Y,r,d,m,d,r,h,0,G,H,F,d,r"))]

72283

- "TARGET_POWERPC64 && TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

72284

- && (gpc_reg_operand (operands[0], DDmode)

72285

- || gpc_reg_operand (operands[1], DDmode))"

72286

- "@

72287

- std%U0%X0 %1,%0

72288

- ld%U1%X1 %0,%1

72289

- mr %0,%1

72290

- fmr %0,%1

72291

- lfd%U1%X1 %0,%1

72292

- stfd%U0%X0 %1,%0

72293

- mt%0 %1

72294

- mf%1 %0

72295

- nop

72296

- #

72297

- #

72298

- #

72299

- mftgpr %0,%1

72300

- mffgpr %0,%1"

72301

- [(set_attr "type" "store,load,*,fp,fpload,fpstore,mtjmpr,mfjmpr,*,*,*,*,mftgpr,mffgpr")

72302

- (set_attr "length" "4,4,4,4,4,4,4,4,4,8,12,16,4,4")])

72303

-

72304

-; ld/std require word-aligned displacements -> 'Y' constraint.

72305

-; List Y->r and r->Y before r->r for reload.

72306

-(define_insn "*movdd_hardfloat64"

72307

- [(set (match_operand:DD 0 "nonimmediate_operand" "=Y,r,!r,d,d,m,*c*l,!r,*h,!r,!r,!r")

72308

- (match_operand:DD 1 "input_operand" "r,Y,r,d,m,d,r,h,0,G,H,F"))]

72309

- "TARGET_POWERPC64 && !TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

72310

- && (gpc_reg_operand (operands[0], DDmode)

72311

- || gpc_reg_operand (operands[1], DDmode))"

72312

- "@

72313

- std%U0%X0 %1,%0

72314

- ld%U1%X1 %0,%1

72315

- mr %0,%1

72316

- fmr %0,%1

72317

- lfd%U1%X1 %0,%1

72318

- stfd%U0%X0 %1,%0

72319

- mt%0 %1

72320

- mf%1 %0

72321

- nop

72322

- #

72323

- #

72324

- #"

72325

- [(set_attr "type" "store,load,*,fp,fpload,fpstore,mtjmpr,mfjmpr,*,*,*,*")

72326

- (set_attr "length" "4,4,4,4,4,4,4,4,4,8,12,16")])

72327

-

72328

-(define_insn "*movdd_softfloat64"

72329

- [(set (match_operand:DD 0 "nonimmediate_operand" "=r,Y,r,cl,r,r,r,r,*h")

72330

- (match_operand:DD 1 "input_operand" "Y,r,r,r,h,G,H,F,0"))]

72331

- "TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS)

72332

- && (gpc_reg_operand (operands[0], DDmode)

72333

- || gpc_reg_operand (operands[1], DDmode))"

72334

- "@

72335

- ld%U1%X1 %0,%1

72336

- std%U0%X0 %1,%0

72337

- mr %0,%1

72338

- mt%0 %1

72339

- mf%1 %0

72340

- #

72341

- #

72342

- #

72343

- nop"

72344

- [(set_attr "type" "load,store,*,mtjmpr,mfjmpr,*,*,*,*")

72345

- (set_attr "length" "4,4,4,4,4,8,12,16,4")])

72346

-

72347

(define_expand "negtd2"

72348

[(set (match_operand:TD 0 "gpc_reg_operand" "")

72349

(neg:TD (match_operand:TD 1 "gpc_reg_operand" "")))]

72350

@@ -410,40 +148,25 @@

72351

"")

72352

72353

(define_insn "*abstd2_fpr"

72354

- [(set (match_operand:TD 0 "gpc_reg_operand" "=d")

72355

- (abs:TD (match_operand:TD 1 "gpc_reg_operand" "d")))]

72356

+ [(set (match_operand:TD 0 "gpc_reg_operand" "=d,d")

72357

+ (abs:TD (match_operand:TD 1 "gpc_reg_operand" "0,d")))]

72358

"TARGET_HARD_FLOAT && TARGET_FPRS"

72359

- "fabs %0,%1"

72360

- [(set_attr "type" "fp")])

72361

+ "@

72362

+ fabs %0,%1

72363

+ fabs %0,%1\;fmr %L0,%L1"

72364

+ [(set_attr "type" "fp")

72365

+ (set_attr "length" "4,8")])

72366

72367

(define_insn "*nabstd2_fpr"

72368

- [(set (match_operand:TD 0 "gpc_reg_operand" "=d")

72369

- (neg:TD (abs:TD (match_operand:TD 1 "gpc_reg_operand" "d"))))]

72370

+ [(set (match_operand:TD 0 "gpc_reg_operand" "=d,d")

72371

+ (neg:TD (abs:TD (match_operand:TD 1 "gpc_reg_operand" "0,d"))))]

72372

"TARGET_HARD_FLOAT && TARGET_FPRS"

72373

- "fnabs %0,%1"

72374

- [(set_attr "type" "fp")])

72375

+ "@

72376

+ fnabs %0,%1

72377

+ fnabs %0,%1\;fmr %L0,%L1"

72378

+ [(set_attr "type" "fp")

72379

+ (set_attr "length" "4,8")])

72380

72381

-(define_expand "movtd"

72382

- [(set (match_operand:TD 0 "general_operand" "")

72383

- (match_operand:TD 1 "any_operand" ""))]

72384

- "TARGET_HARD_FLOAT && TARGET_FPRS"

72385

- "{ rs6000_emit_move (operands[0], operands[1], TDmode); DONE; }")

72386

-

72387

-; It's important to list the Y->r and r->Y moves before r->r because

72388

-; otherwise reload, given m->r, will try to pick r->r and reload it,

72389

-; which doesn't make progress.

72390

-(define_insn_and_split "*movtd_internal"

72391

- [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

72392

- (match_operand:TD 1 "input_operand" "d,m,d,r,YGHF,r"))]

72393

- "TARGET_HARD_FLOAT && TARGET_FPRS

72394

- && (gpc_reg_operand (operands[0], TDmode)

72395

- || gpc_reg_operand (operands[1], TDmode))"

72396

- "#"

72397

- "&& reload_completed"

72398

- [(pc)]

72399

-{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

72400

- [(set_attr "length" "8,8,8,20,20,16")])

72401

-

72402

;; Hardware support for decimal floating point operations.

72403

72404

(define_insn "extendddtd2"

72405

@@ -599,3 +322,72 @@

72406

"TARGET_DFP"

72407

"dctfixq %0,%1"

72408

[(set_attr "type" "fp")])

72409

+

72410

+

72411

+;; Decimal builtin support

72412

+

72413

+(define_c_enum "unspec"

72414

+ [UNSPEC_DDEDPD

72415

+ UNSPEC_DENBCD

72416

+ UNSPEC_DXEX

72417

+ UNSPEC_DIEX

72418

+ UNSPEC_DSCLI

72419

+ UNSPEC_DSCRI])

72420

+

72421

+(define_mode_iterator D64_D128 [DD TD])

72422

+

72423

+(define_mode_attr dfp_suffix [(DD "")

72424

+ (TD "q")])

72425

+

72426

+(define_insn "dfp_ddedpd_<mode>"

72427

+ [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")

72428

+ (unspec:D64_D128 [(match_operand:QI 1 "const_0_to_3_operand" "i")

72429

+ (match_operand:D64_D128 2 "gpc_reg_operand" "d")]

72430

+ UNSPEC_DDEDPD))]

72431

+ "TARGET_DFP"

72432

+ "ddedpd<dfp_suffix> %1,%0,%2"

72433

+ [(set_attr "type" "fp")])

72434

+

72435

+(define_insn "dfp_denbcd_<mode>"

72436

+ [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")

72437

+ (unspec:D64_D128 [(match_operand:QI 1 "const_0_to_1_operand" "i")

72438

+ (match_operand:D64_D128 2 "gpc_reg_operand" "d")]

72439

+ UNSPEC_DENBCD))]

72440

+ "TARGET_DFP"

72441

+ "denbcd<dfp_suffix> %1,%0,%2"

72442

+ [(set_attr "type" "fp")])

72443

+

72444

+(define_insn "dfp_dxex_<mode>"

72445

+ [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")

72446

+ (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d")]

72447

+ UNSPEC_DXEX))]

72448

+ "TARGET_DFP"

72449

+ "dxex<dfp_suffix> %0,%1"

72450

+ [(set_attr "type" "fp")])

72451

+

72452

+(define_insn "dfp_diex_<mode>"

72453

+ [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")

72454

+ (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d")

72455

+ (match_operand:D64_D128 2 "gpc_reg_operand" "d")]

72456

+ UNSPEC_DXEX))]

72457

+ "TARGET_DFP"

72458

+ "diex<dfp_suffix> %0,%1,%2"

72459

+ [(set_attr "type" "fp")])

72460

+

72461

+(define_insn "dfp_dscli_<mode>"

72462

+ [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")

72463

+ (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d")

72464

+ (match_operand:QI 2 "immediate_operand" "i")]

72465

+ UNSPEC_DSCLI))]

72466

+ "TARGET_DFP"

72467

+ "dscli<dfp_suffix> %0,%1,%2"

72468

+ [(set_attr "type" "fp")])

72469

+

72470

+(define_insn "dfp_dscri_<mode>"

72471

+ [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")

72472

+ (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d")

72473

+ (match_operand:QI 2 "immediate_operand" "i")]

72474

+ UNSPEC_DSCRI))]

72475

+ "TARGET_DFP"

72476

+ "dscri<dfp_suffix> %0,%1,%2"

72477

+ [(set_attr "type" "fp")])

72478

Index: gcc/config/rs6000/t-linux64

72479

===================================================================

72480

--- a/src/gcc/config/rs6000/t-linux64 (.../tags/gcc_4_8_2_release)

72481

+++ b/src/gcc/config/rs6000/t-linux64 (.../branches/gcc-4_8-branch)

72482

@@ -25,8 +25,8 @@

72483

# it doesn't tell anything about the 32bit libraries on those systems. Set

72484

# MULTILIB_OSDIRNAMES according to what is found on the target.

72485

72486

-MULTILIB_OPTIONS = m64/m32

72487

-MULTILIB_DIRNAMES = 64 32

72488

-MULTILIB_EXTRA_OPTS = fPIC

72489

-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu)

72490

-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu)

72491

+MULTILIB_OPTIONS := m64/m32

72492

+MULTILIB_DIRNAMES := 64 32

72493

+MULTILIB_EXTRA_OPTS :=

72494

+MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu)

72495

+MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu)

72496

Index: gcc/config/rs6000/sync.md

72497

===================================================================

72498

--- a/src/gcc/config/rs6000/sync.md (.../tags/gcc_4_8_2_release)

72499

+++ b/src/gcc/config/rs6000/sync.md (.../branches/gcc-4_8-branch)

72500

@@ -1,5 +1,5 @@

72501

;; Machine description for PowerPC synchronization instructions.

72502

72503

72504

;; Contributed by Geoffrey Keating.

72505

72506

;; This file is part of GCC.

72507

@@ -18,14 +18,23 @@

72508

;; along with GCC; see the file COPYING3. If not see

72509

;; <http://www.gnu.org/licenses/>.

72510

72511

-(define_mode_attr larx [(SI "lwarx") (DI "ldarx")])

72512

-(define_mode_attr stcx [(SI "stwcx.") (DI "stdcx.")])

72513

+(define_mode_attr larx [(QI "lbarx")

72514

+ (HI "lharx")

72515

+ (SI "lwarx")

72516

+ (DI "ldarx")

72517

+ (TI "lqarx")])

72518

72519

+(define_mode_attr stcx [(QI "stbcx.")

72520

+ (HI "sthcx.")

72521

+ (SI "stwcx.")

72522

+ (DI "stdcx.")

72523

+ (TI "stqcx.")])

72524

+

72525

(define_code_iterator FETCHOP [plus minus ior xor and])

72526

(define_code_attr fetchop_name

72527

[(plus "add") (minus "sub") (ior "or") (xor "xor") (and "and")])

72528

(define_code_attr fetchop_pred

72529

- [(plus "add_operand") (minus "gpc_reg_operand")

72530

+ [(plus "add_operand") (minus "int_reg_operand")

72531

(ior "logical_operand") (xor "logical_operand") (and "and_operand")])

72532

72533

(define_expand "mem_thread_fence"

72534

@@ -98,10 +107,17 @@

72535

"isync"

72536

[(set_attr "type" "isync")])

72537

72538

+;; Types that we should provide atomic instructions for.

72539

+(define_mode_iterator AINT [QI

72540

+ HI

72541

+ SI

72542

+ (DI "TARGET_POWERPC64")

72543

+ (TI "TARGET_SYNC_TI")])

72544

+

72545

;; The control dependency used for load dependency described

72546

;; in B.2.3 of the Power ISA 2.06B.

72547

(define_insn "loadsync_<mode>"

72548

- [(unspec_volatile:BLK [(match_operand:INT1 0 "register_operand" "r")]

72549

+ [(unspec_volatile:BLK [(match_operand:AINT 0 "register_operand" "r")]

72550

UNSPECV_ISYNC)

72551

(clobber (match_scratch:CC 1 "=y"))]

72552

""

72553

@@ -109,19 +125,74 @@

72554

[(set_attr "type" "isync")

72555

(set_attr "length" "12")])

72556

72557

+(define_insn "load_quadpti"

72558

+ [(set (match_operand:PTI 0 "quad_int_reg_operand" "=&r")

72559

+ (unspec:PTI

72560

+ [(match_operand:TI 1 "quad_memory_operand" "wQ")] UNSPEC_LSQ))]

72561

+ "TARGET_SYNC_TI

72562

+ && !reg_mentioned_p (operands[0], operands[1])"

72563

+ "lq %0,%1"

72564

+ [(set_attr "type" "load")

72565

+ (set_attr "length" "4")])

72566

+

72567

(define_expand "atomic_load<mode>"

72568

- [(set (match_operand:INT1 0 "register_operand" "") ;; output

72569

- (match_operand:INT1 1 "memory_operand" "")) ;; memory

72570

+ [(set (match_operand:AINT 0 "register_operand" "") ;; output

72571

+ (match_operand:AINT 1 "memory_operand" "")) ;; memory

72572

(use (match_operand:SI 2 "const_int_operand" ""))] ;; model

72573

""

72574

{

72575

+ if (<MODE>mode == TImode && !TARGET_SYNC_TI)

72576

+ FAIL;

72577

+

72578

enum memmodel model = (enum memmodel) INTVAL (operands[2]);

72579

72580

if (model == MEMMODEL_SEQ_CST)

72581

emit_insn (gen_hwsync ());

72582

72583

- emit_move_insn (operands[0], operands[1]);

72584

+ if (<MODE>mode != TImode)

72585

+ emit_move_insn (operands[0], operands[1]);

72586

+ else

72587

+ {

72588

+ rtx op0 = operands[0];

72589

+ rtx op1 = operands[1];

72590

+ rtx pti_reg = gen_reg_rtx (PTImode);

72591

72592

+ // Can't have indexed address for 'lq'

72593

+ if (indexed_address (XEXP (op1, 0), TImode))

72594

+ {

72595

+ rtx old_addr = XEXP (op1, 0);

72596

+ rtx new_addr = force_reg (Pmode, old_addr);

72597

+ operands[1] = op1 = replace_equiv_address (op1, new_addr);

72598

+ }

72599

+

72600

+ emit_insn (gen_load_quadpti (pti_reg, op1));

72601

+

72602

+ /* For 4.8 we need to do explicit dword copies, even in big endian mode,

72603

+ unless we are using the LRA register allocator. The 4.9 register

72604

+ allocator is smart enough to assign an even/odd pair. */

72605

+ if (WORDS_BIG_ENDIAN && rs6000_lra_flag)

72606

+ emit_move_insn (op0, gen_lowpart (TImode, pti_reg));

72607

+ else

72608

+ {

72609

+ rtx op0_lo = gen_lowpart (DImode, op0);

72610

+ rtx op0_hi = gen_highpart (DImode, op0);

72611

+ rtx pti_lo = gen_lowpart (DImode, pti_reg);

72612

+ rtx pti_hi = gen_highpart (DImode, pti_reg);

72613

+

72614

+ emit_insn (gen_rtx_CLOBBER (VOIDmode, op0));

72615

+ if (WORDS_BIG_ENDIAN)

72616

+ {

72617

+ emit_move_insn (op0_hi, pti_hi);

72618

+ emit_move_insn (op0_lo, pti_lo);

72619

+ }

72620

+ else

72621

+ {

72622

+ emit_move_insn (op0_hi, pti_lo);

72623

+ emit_move_insn (op0_lo, pti_hi);

72624

+ }

72625

+ }

72626

+ }

72627

+

72628

switch (model)

72629

{

72630

case MEMMODEL_RELAXED:

72631

@@ -129,16 +200,7 @@

72632

case MEMMODEL_CONSUME:

72633

case MEMMODEL_ACQUIRE:

72634

case MEMMODEL_SEQ_CST:

72635

- if (GET_MODE (operands[0]) == QImode)

72636

- emit_insn (gen_loadsync_qi (operands[0]));

72637

- else if (GET_MODE (operands[0]) == HImode)

72638

- emit_insn (gen_loadsync_hi (operands[0]));

72639

- else if (GET_MODE (operands[0]) == SImode)

72640

- emit_insn (gen_loadsync_si (operands[0]));

72641

- else if (GET_MODE (operands[0]) == DImode)

72642

- emit_insn (gen_loadsync_di (operands[0]));

72643

- else

72644

- gcc_unreachable ();

72645

+ emit_insn (gen_loadsync_<mode> (operands[0]));

72646

break;

72647

default:

72648

gcc_unreachable ();

72649

@@ -146,12 +208,24 @@

72650

DONE;

72651

})

72652

72653

+(define_insn "store_quadpti"

72654

+ [(set (match_operand:PTI 0 "quad_memory_operand" "=wQ")

72655

+ (unspec:PTI

72656

+ [(match_operand:PTI 1 "quad_int_reg_operand" "r")] UNSPEC_LSQ))]

72657

+ "TARGET_SYNC_TI"

72658

+ "stq %1,%0"

72659

+ [(set_attr "type" "store")

72660

+ (set_attr "length" "4")])

72661

+

72662

(define_expand "atomic_store<mode>"

72663

- [(set (match_operand:INT1 0 "memory_operand" "") ;; memory

72664

- (match_operand:INT1 1 "register_operand" "")) ;; input

72665

+ [(set (match_operand:AINT 0 "memory_operand" "") ;; memory

72666

+ (match_operand:AINT 1 "register_operand" "")) ;; input

72667

(use (match_operand:SI 2 "const_int_operand" ""))] ;; model

72668

""

72669

{

72670

+ if (<MODE>mode == TImode && !TARGET_SYNC_TI)

72671

+ FAIL;

72672

+

72673

enum memmodel model = (enum memmodel) INTVAL (operands[2]);

72674

switch (model)

72675

{

72676

@@ -166,18 +240,65 @@

72677

default:

72678

gcc_unreachable ();

72679

}

72680

- emit_move_insn (operands[0], operands[1]);

72681

+ if (<MODE>mode != TImode)

72682

+ emit_move_insn (operands[0], operands[1]);

72683

+ else

72684

+ {

72685

+ rtx op0 = operands[0];

72686

+ rtx op1 = operands[1];

72687

+ rtx pti_reg = gen_reg_rtx (PTImode);

72688

+

72689

+ // Can't have indexed address for 'stq'

72690

+ if (indexed_address (XEXP (op0, 0), TImode))

72691

+ {

72692

+ rtx old_addr = XEXP (op0, 0);

72693

+ rtx new_addr = force_reg (Pmode, old_addr);

72694

+ operands[0] = op0 = replace_equiv_address (op0, new_addr);

72695

+ }

72696

+

72697

+ /* For 4.8 we need to do explicit dword copies, even in big endian mode,

72698

+ unless we are using the LRA register allocator. The 4.9 register

72699

+ allocator is smart enough to assign an even/odd pair. */

72700

+ if (WORDS_BIG_ENDIAN && rs6000_lra_flag)

72701

+ emit_move_insn (pti_reg, gen_lowpart (PTImode, op1));

72702

+ else

72703

+ {

72704

+ rtx op1_lo = gen_lowpart (DImode, op1);

72705

+ rtx op1_hi = gen_highpart (DImode, op1);

72706

+ rtx pti_lo = gen_lowpart (DImode, pti_reg);

72707

+ rtx pti_hi = gen_highpart (DImode, pti_reg);

72708

+

72709

+ emit_insn (gen_rtx_CLOBBER (VOIDmode, pti_reg));

72710

+ if (WORDS_BIG_ENDIAN)

72711

+ {

72712

+ emit_move_insn (pti_hi, op1_hi);

72713

+ emit_move_insn (pti_lo, op1_lo);

72714

+ }

72715

+ else

72716

+ {

72717

+ emit_move_insn (pti_hi, op1_lo);

72718

+ emit_move_insn (pti_lo, op1_hi);

72719

+ }

72720

+ }

72721

+

72722

+ emit_insn (gen_store_quadpti (gen_lowpart (PTImode, op0), pti_reg));

72723

+ }

72724

+

72725

DONE;

72726

})

72727

72728

-;; ??? Power ISA 2.06B says that there *is* a load-{byte,half}-and-reserve

72729

-;; opcode that is "phased-in". Not implemented as of Power7, so not yet used,

72730

-;; but let's prepare the macros anyway.

72731

+;; Any supported integer mode that has atomic l<x>arx/st<x>cx. instrucitons

72732

+;; other than the quad memory operations, which have special restrictions.

72733

+;; Byte/halfword atomic instructions were added in ISA 2.06B, but were phased

72734

+;; in and did not show up until power8. TImode atomic lqarx/stqcx. require

72735

+;; special handling due to even/odd register requirements.

72736

+(define_mode_iterator ATOMIC [(QI "TARGET_SYNC_HI_QI")

72737

+ (HI "TARGET_SYNC_HI_QI")

72738

+ SI

72739

+ (DI "TARGET_POWERPC64")])

72740

72741

-(define_mode_iterator ATOMIC [SI (DI "TARGET_POWERPC64")])

72742

-

72743

(define_insn "load_locked<mode>"

72744

- [(set (match_operand:ATOMIC 0 "gpc_reg_operand" "=r")

72745

+ [(set (match_operand:ATOMIC 0 "int_reg_operand" "=r")

72746

(unspec_volatile:ATOMIC

72747

[(match_operand:ATOMIC 1 "memory_operand" "Z")] UNSPECV_LL))]

72748

""

72749

@@ -184,21 +305,159 @@

72750

"<larx> %0,%y1"

72751

[(set_attr "type" "load_l")])

72752

72753

+(define_insn "load_locked<QHI:mode>_si"

72754

+ [(set (match_operand:SI 0 "int_reg_operand" "=r")

72755

+ (unspec_volatile:SI

72756

+ [(match_operand:QHI 1 "memory_operand" "Z")] UNSPECV_LL))]

72757

+ "TARGET_SYNC_HI_QI"

72758

+ "<QHI:larx> %0,%y1"

72759

+ [(set_attr "type" "load_l")])

72760

+

72761

+;; Use PTImode to get even/odd register pairs.

72762

+

72763

+;; Use a temporary register to force getting an even register for the

72764

+;; lqarx/stqcrx. instructions. Under AT 7.0, we need use an explicit copy,

72765

+;; even in big endian mode, unless we are using the LRA register allocator. In

72766

+;; GCC 4.9, the register allocator is smart enough to assign a even/odd

72767

+;; register pair.

72768

+

72769

+;; On little endian systems where non-atomic quad word load/store instructions

72770

+;; are not used, the address can be register+offset, so make sure the address

72771

+;; is indexed or indirect before register allocation.

72772

+

72773

+(define_expand "load_lockedti"

72774

+ [(use (match_operand:TI 0 "quad_int_reg_operand" ""))

72775

+ (use (match_operand:TI 1 "memory_operand" ""))]

72776

+ "TARGET_SYNC_TI"

72777

+{

72778

+ rtx op0 = operands[0];

72779

+ rtx op1 = operands[1];

72780

+ rtx pti = gen_reg_rtx (PTImode);

72781

+

72782

+ if (!indexed_or_indirect_operand (op1, TImode))

72783

+ {

72784

+ rtx old_addr = XEXP (op1, 0);

72785

+ rtx new_addr = force_reg (Pmode, old_addr);

72786

+ operands[1] = op1 = change_address (op1, TImode, new_addr);

72787

+ }

72788

+

72789

+ emit_insn (gen_load_lockedpti (pti, op1));

72790

+ if (WORDS_BIG_ENDIAN && rs6000_lra_flag)

72791

+ emit_move_insn (op0, gen_lowpart (TImode, pti));

72792

+ else

72793

+ {

72794

+ rtx op0_lo = gen_lowpart (DImode, op0);

72795

+ rtx op0_hi = gen_highpart (DImode, op0);

72796

+ rtx pti_lo = gen_lowpart (DImode, pti);

72797

+ rtx pti_hi = gen_highpart (DImode, pti);

72798

+

72799

+ emit_insn (gen_rtx_CLOBBER (VOIDmode, op0));

72800

+ if (WORDS_BIG_ENDIAN)

72801

+ {

72802

+ emit_move_insn (op0_hi, pti_hi);

72803

+ emit_move_insn (op0_lo, pti_lo);

72804

+ }

72805

+ else

72806

+ {

72807

+ emit_move_insn (op0_hi, pti_lo);

72808

+ emit_move_insn (op0_lo, pti_hi);

72809

+ }

72810

+ }

72811

+ DONE;

72812

+})

72813

+

72814

+(define_insn "load_lockedpti"

72815

+ [(set (match_operand:PTI 0 "quad_int_reg_operand" "=&r")

72816

+ (unspec_volatile:PTI

72817

+ [(match_operand:TI 1 "indexed_or_indirect_operand" "Z")] UNSPECV_LL))]

72818

+ "TARGET_SYNC_TI

72819

+ && !reg_mentioned_p (operands[0], operands[1])

72820

+ && quad_int_reg_operand (operands[0], PTImode)"

72821

+ "lqarx %0,%y1"

72822

+ [(set_attr "type" "load_l")])

72823

+

72824

(define_insn "store_conditional<mode>"

72825

[(set (match_operand:CC 0 "cc_reg_operand" "=x")

72826

(unspec_volatile:CC [(const_int 0)] UNSPECV_SC))

72827

(set (match_operand:ATOMIC 1 "memory_operand" "=Z")

72828

- (match_operand:ATOMIC 2 "gpc_reg_operand" "r"))]

72829

+ (match_operand:ATOMIC 2 "int_reg_operand" "r"))]

72830

""

72831

"<stcx> %2,%y1"

72832

[(set_attr "type" "store_c")])

72833

72834

+;; Use a temporary register to force getting an even register for the

72835

+;; lqarx/stqcrx. instructions. Under AT 7.0, we need use an explicit copy,

72836

+;; even in big endian mode. In GCC 4.9, the register allocator is smart enough

72837

+;; to assign a even/odd register pair.

72838

+

72839

+;; On little endian systems where non-atomic quad word load/store instructions

72840

+;; are not used, the address can be register+offset, so make sure the address

72841

+;; is indexed or indirect before register allocation.

72842

+

72843

+(define_expand "store_conditionalti"

72844

+ [(use (match_operand:CC 0 "cc_reg_operand" ""))

72845

+ (use (match_operand:TI 1 "memory_operand" ""))

72846

+ (use (match_operand:TI 2 "quad_int_reg_operand" ""))]

72847

+ "TARGET_SYNC_TI"

72848

+{

72849

+ rtx op0 = operands[0];

72850

+ rtx op1 = operands[1];

72851

+ rtx op2 = operands[2];

72852

+ rtx addr = XEXP (op1, 0);

72853

+ rtx pti_mem;

72854

+ rtx pti_reg;

72855

+

72856

+ if (!indexed_or_indirect_operand (op1, TImode))

72857

+ {

72858

+ rtx new_addr = force_reg (Pmode, addr);

72859

+ operands[1] = op1 = change_address (op1, TImode, new_addr);

72860

+ addr = new_addr;

72861

+ }

72862

+

72863

+ pti_mem = change_address (op1, PTImode, addr);

72864

+ pti_reg = gen_reg_rtx (PTImode);

72865

+

72866

+ if (WORDS_BIG_ENDIAN && rs6000_lra_flag)

72867

+ emit_move_insn (pti_reg, gen_lowpart (PTImode, op2));

72868

+ else

72869

+ {

72870

+ rtx op2_lo = gen_lowpart (DImode, op2);

72871

+ rtx op2_hi = gen_highpart (DImode, op2);

72872

+ rtx pti_lo = gen_lowpart (DImode, pti_reg);

72873

+ rtx pti_hi = gen_highpart (DImode, pti_reg);

72874

+

72875

+ emit_insn (gen_rtx_CLOBBER (VOIDmode, op0));

72876

+ if (WORDS_BIG_ENDIAN)

72877

+ {

72878

+ emit_move_insn (pti_hi, op2_hi);

72879

+ emit_move_insn (pti_lo, op2_lo);

72880

+ }

72881

+ else

72882

+ {

72883

+ emit_move_insn (pti_hi, op2_lo);

72884

+ emit_move_insn (pti_lo, op2_hi);

72885

+ }

72886

+ }

72887

+

72888

+ emit_insn (gen_store_conditionalpti (op0, pti_mem, pti_reg));

72889

+ DONE;

72890

+})

72891

+

72892

+(define_insn "store_conditionalpti"

72893

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x")

72894

+ (unspec_volatile:CC [(const_int 0)] UNSPECV_SC))

72895

+ (set (match_operand:PTI 1 "indexed_or_indirect_operand" "=Z")

72896

+ (match_operand:PTI 2 "quad_int_reg_operand" "r"))]

72897

+ "TARGET_SYNC_TI && quad_int_reg_operand (operands[2], PTImode)"

72898

+ "stqcx. %2,%y1"

72899

+ [(set_attr "type" "store_c")])

72900

+

72901

(define_expand "atomic_compare_and_swap<mode>"

72902

- [(match_operand:SI 0 "gpc_reg_operand" "") ;; bool out

72903

- (match_operand:INT1 1 "gpc_reg_operand" "") ;; val out

72904

- (match_operand:INT1 2 "memory_operand" "") ;; memory

72905

- (match_operand:INT1 3 "reg_or_short_operand" "") ;; expected

72906

- (match_operand:INT1 4 "gpc_reg_operand" "") ;; desired

72907

+ [(match_operand:SI 0 "int_reg_operand" "") ;; bool out

72908

+ (match_operand:AINT 1 "int_reg_operand" "") ;; val out

72909

+ (match_operand:AINT 2 "memory_operand" "") ;; memory

72910

+ (match_operand:AINT 3 "reg_or_short_operand" "") ;; expected

72911

+ (match_operand:AINT 4 "int_reg_operand" "") ;; desired

72912

(match_operand:SI 5 "const_int_operand" "") ;; is_weak

72913

(match_operand:SI 6 "const_int_operand" "") ;; model succ

72914

(match_operand:SI 7 "const_int_operand" "")] ;; model fail

72915

@@ -209,9 +468,9 @@

72916

})

72917

72918

(define_expand "atomic_exchange<mode>"

72919

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

72920

- (match_operand:INT1 1 "memory_operand" "") ;; memory

72921

- (match_operand:INT1 2 "gpc_reg_operand" "") ;; input

72922

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

72923

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

72924

+ (match_operand:AINT 2 "int_reg_operand" "") ;; input

72925

(match_operand:SI 3 "const_int_operand" "")] ;; model

72926

""

72927

{

72928

@@ -220,9 +479,9 @@

72929

})

72930

72931

(define_expand "atomic_<fetchop_name><mode>"

72932

- [(match_operand:INT1 0 "memory_operand" "") ;; memory

72933

- (FETCHOP:INT1 (match_dup 0)

72934

- (match_operand:INT1 1 "<fetchop_pred>" "")) ;; operand

72935

+ [(match_operand:AINT 0 "memory_operand" "") ;; memory

72936

+ (FETCHOP:AINT (match_dup 0)

72937

+ (match_operand:AINT 1 "<fetchop_pred>" "")) ;; operand

72938

(match_operand:SI 2 "const_int_operand" "")] ;; model

72939

""

72940

{

72941

@@ -232,8 +491,8 @@

72942

})

72943

72944

(define_expand "atomic_nand<mode>"

72945

- [(match_operand:INT1 0 "memory_operand" "") ;; memory

72946

- (match_operand:INT1 1 "gpc_reg_operand" "") ;; operand

72947

+ [(match_operand:AINT 0 "memory_operand" "") ;; memory

72948

+ (match_operand:AINT 1 "int_reg_operand" "") ;; operand

72949

(match_operand:SI 2 "const_int_operand" "")] ;; model

72950

""

72951

{

72952

@@ -243,10 +502,10 @@

72953

})

72954

72955

(define_expand "atomic_fetch_<fetchop_name><mode>"

72956

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

72957

- (match_operand:INT1 1 "memory_operand" "") ;; memory

72958

- (FETCHOP:INT1 (match_dup 1)

72959

- (match_operand:INT1 2 "<fetchop_pred>" "")) ;; operand

72960

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

72961

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

72962

+ (FETCHOP:AINT (match_dup 1)

72963

+ (match_operand:AINT 2 "<fetchop_pred>" "")) ;; operand

72964

(match_operand:SI 3 "const_int_operand" "")] ;; model

72965

""

72966

{

72967

@@ -256,9 +515,9 @@

72968

})

72969

72970

(define_expand "atomic_fetch_nand<mode>"

72971

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

72972

- (match_operand:INT1 1 "memory_operand" "") ;; memory

72973

- (match_operand:INT1 2 "gpc_reg_operand" "") ;; operand

72974

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

72975

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

72976

+ (match_operand:AINT 2 "int_reg_operand" "") ;; operand

72977

(match_operand:SI 3 "const_int_operand" "")] ;; model

72978

""

72979

{

72980

@@ -268,10 +527,10 @@

72981

})

72982

72983

(define_expand "atomic_<fetchop_name>_fetch<mode>"

72984

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

72985

- (match_operand:INT1 1 "memory_operand" "") ;; memory

72986

- (FETCHOP:INT1 (match_dup 1)

72987

- (match_operand:INT1 2 "<fetchop_pred>" "")) ;; operand

72988

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

72989

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

72990

+ (FETCHOP:AINT (match_dup 1)

72991

+ (match_operand:AINT 2 "<fetchop_pred>" "")) ;; operand

72992

(match_operand:SI 3 "const_int_operand" "")] ;; model

72993

""

72994

{

72995

@@ -281,9 +540,9 @@

72996

})

72997

72998

(define_expand "atomic_nand_fetch<mode>"

72999

- [(match_operand:INT1 0 "gpc_reg_operand" "") ;; output

73000

- (match_operand:INT1 1 "memory_operand" "") ;; memory

73001

- (match_operand:INT1 2 "gpc_reg_operand" "") ;; operand

73002

+ [(match_operand:AINT 0 "int_reg_operand" "") ;; output

73003

+ (match_operand:AINT 1 "memory_operand" "") ;; memory

73004

+ (match_operand:AINT 2 "int_reg_operand" "") ;; operand

73005

(match_operand:SI 3 "const_int_operand" "")] ;; model

73006

""

73007

{

73008

Index: gcc/config/rs6000/crypto.md

73009

===================================================================

73010

--- a/src/gcc/config/rs6000/crypto.md (.../tags/gcc_4_8_2_release)

73011

+++ b/src/gcc/config/rs6000/crypto.md (.../branches/gcc-4_8-branch)

73012

@@ -0,0 +1,101 @@

73013

+;; Cryptographic instructions added in ISA 2.07

73014

73015

+;; Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)

73016

+

73017

+;; This file is part of GCC.

73018

+

73019

+;; GCC is free software; you can redistribute it and/or modify it

73020

+;; under the terms of the GNU General Public License as published

73021

+;; by the Free Software Foundation; either version 3, or (at your

73022

+;; option) any later version.

73023

+

73024

+;; GCC is distributed in the hope that it will be useful, but WITHOUT

73025

+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

73026

+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public

73027

+;; License for more details.

73028

+

73029

+;; You should have received a copy of the GNU General Public License

73030

+;; along with GCC; see the file COPYING3. If not see

73031

+;; <http://www.gnu.org/licenses/>.

73032

+

73033

+(define_c_enum "unspec"

73034

+ [UNSPEC_VCIPHER

73035

+ UNSPEC_VNCIPHER

73036

+ UNSPEC_VCIPHERLAST

73037

+ UNSPEC_VNCIPHERLAST

73038

+ UNSPEC_VSBOX

73039

+ UNSPEC_VSHASIGMA

73040

+ UNSPEC_VPERMXOR

73041

+ UNSPEC_VPMSUM])

73042

+

73043

+;; Iterator for VPMSUM/VPERMXOR

73044

+(define_mode_iterator CR_mode [V16QI V8HI V4SI V2DI])

73045

+

73046

+(define_mode_attr CR_char [(V16QI "b")

73047

+ (V8HI "h")

73048

+ (V4SI "w")

73049

+ (V2DI "d")])

73050

+

73051

+;; Iterator for VSHASIGMAD/VSHASIGMAW

73052

+(define_mode_iterator CR_hash [V4SI V2DI])

73053

+

73054

+;; Iterator for the other crypto functions

73055

+(define_int_iterator CR_code [UNSPEC_VCIPHER

73056

+ UNSPEC_VNCIPHER

73057

+ UNSPEC_VCIPHERLAST

73058

+ UNSPEC_VNCIPHERLAST])

73059

+

73060

+(define_int_attr CR_insn [(UNSPEC_VCIPHER "vcipher")

73061

+ (UNSPEC_VNCIPHER "vncipher")

73062

+ (UNSPEC_VCIPHERLAST "vcipherlast")

73063

+ (UNSPEC_VNCIPHERLAST "vncipherlast")])

73064

+

73065

+;; 2 operand crypto instructions

73066

+(define_insn "crypto_<CR_insn>"

73067

+ [(set (match_operand:V2DI 0 "register_operand" "=v")

73068

+ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "v")

73069

+ (match_operand:V2DI 2 "register_operand" "v")]

73070

+ CR_code))]

73071

+ "TARGET_CRYPTO"

73072

+ "<CR_insn> %0,%1,%2"

73073

+ [(set_attr "type" "crypto")])

73074

+

73075

+(define_insn "crypto_vpmsum<CR_char>"

73076

+ [(set (match_operand:CR_mode 0 "register_operand" "=v")

73077

+ (unspec:CR_mode [(match_operand:CR_mode 1 "register_operand" "v")

73078

+ (match_operand:CR_mode 2 "register_operand" "v")]

73079

+ UNSPEC_VPMSUM))]

73080

+ "TARGET_CRYPTO"

73081

+ "vpmsum<CR_char> %0,%1,%2"

73082

+ [(set_attr "type" "crypto")])

73083

+

73084

+;; 3 operand crypto instructions

73085

+(define_insn "crypto_vpermxor_<mode>"

73086

+ [(set (match_operand:CR_mode 0 "register_operand" "=v")

73087

+ (unspec:CR_mode [(match_operand:CR_mode 1 "register_operand" "v")

73088

+ (match_operand:CR_mode 2 "register_operand" "v")

73089

+ (match_operand:CR_mode 3 "register_operand" "v")]

73090

+ UNSPEC_VPERMXOR))]

73091

+ "TARGET_CRYPTO"

73092

+ "vpermxor %0,%1,%2,%3"

73093

+ [(set_attr "type" "crypto")])

73094

+

73095

+;; 1 operand crypto instruction

73096

+(define_insn "crypto_vsbox"

73097

+ [(set (match_operand:V2DI 0 "register_operand" "=v")

73098

+ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "v")]

73099

+ UNSPEC_VSBOX))]

73100

+ "TARGET_CRYPTO"

73101

+ "vsbox %0,%1"

73102

+ [(set_attr "type" "crypto")])

73103

+

73104

+;; Hash crypto instructions

73105

+(define_insn "crypto_vshasigma<CR_char>"

73106

+ [(set (match_operand:CR_hash 0 "register_operand" "=v")

73107

+ (unspec:CR_hash [(match_operand:CR_hash 1 "register_operand" "v")

73108

+ (match_operand:SI 2 "const_0_to_1_operand" "n")

73109

+ (match_operand:SI 3 "const_0_to_15_operand" "n")]

73110

+ UNSPEC_VSHASIGMA))]

73111

+ "TARGET_CRYPTO"

73112

+ "vshasigma<CR_char> %0,%1,%2,%3"

73113

+ [(set_attr "type" "crypto")])

73114

Index: gcc/config/rs6000/rs6000.md

73115

===================================================================

73116

--- a/src/gcc/config/rs6000/rs6000.md (.../tags/gcc_4_8_2_release)

73117

+++ b/src/gcc/config/rs6000/rs6000.md (.../branches/gcc-4_8-branch)

73118

@@ -25,10 +25,14 @@

73119

;;

73120

73121

(define_constants

73122

- [(STACK_POINTER_REGNUM 1)

73123

+ [(FIRST_GPR_REGNO 0)

73124

+ (STACK_POINTER_REGNUM 1)

73125

(TOC_REGNUM 2)

73126

(STATIC_CHAIN_REGNUM 11)

73127

(HARD_FRAME_POINTER_REGNUM 31)

73128

+ (LAST_GPR_REGNO 31)

73129

+ (FIRST_FPR_REGNO 32)

73130

+ (LAST_FPR_REGNO 63)

73131

(LR_REGNO 65)

73132

(CTR_REGNO 66)

73133

(ARG_POINTER_REGNUM 67)

73134

@@ -49,18 +53,9 @@

73135

(SPE_ACC_REGNO 111)

73136

(SPEFSCR_REGNO 112)

73137

(FRAME_POINTER_REGNUM 113)

73138

-

73139

- ; ABI defined stack offsets for storing the TOC pointer with AIX calls.

73140

- (TOC_SAVE_OFFSET_32BIT 20)

73141

- (TOC_SAVE_OFFSET_64BIT 40)

73142

-

73143

- ; Function TOC offset in the AIX function descriptor.

73144

- (AIX_FUNC_DESC_TOC_32BIT 4)

73145

- (AIX_FUNC_DESC_TOC_64BIT 8)

73146

-

73147

- ; Static chain offset in the AIX function descriptor.

73148

- (AIX_FUNC_DESC_SC_32BIT 8)

73149

- (AIX_FUNC_DESC_SC_64BIT 16)

73150

+ (TFHAR_REGNO 114)

73151

+ (TFIAR_REGNO 115)

73152

+ (TEXASR_REGNO 116)

73153

])

73154

73155

;;

73156

@@ -123,6 +118,22 @@

73157

UNSPEC_LFIWZX

73158

UNSPEC_FCTIWUZ

73159

UNSPEC_GRP_END_NOP

73160

+ UNSPEC_P8V_FMRGOW

73161

+ UNSPEC_P8V_MTVSRWZ

73162

+ UNSPEC_P8V_RELOAD_FROM_GPR

73163

+ UNSPEC_P8V_MTVSRD

73164

+ UNSPEC_P8V_XXPERMDI

73165

+ UNSPEC_P8V_RELOAD_FROM_VSX

73166

+ UNSPEC_ADDG6S

73167

+ UNSPEC_CDTBCD

73168

+ UNSPEC_CBCDTD

73169

+ UNSPEC_DIVE

73170

+ UNSPEC_DIVEO

73171

+ UNSPEC_DIVEU

73172

+ UNSPEC_DIVEUO

73173

+ UNSPEC_UNPACK_128BIT

73174

+ UNSPEC_PACK_128BIT

73175

+ UNSPEC_LSQ

73176

])

73177

73178

;;

73179

@@ -142,7 +153,7 @@

73180

73181

;; Define an insn type attribute. This is used in function unit delay

73182

;; computations.

73183

-(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt"

73184

+(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt,crypto,htm"

73185

(const_string "integer"))

73186

73187

;; Define floating point instruction sub-types for use with Xfpu.md

73188

@@ -164,7 +175,7 @@

73189

;; Processor type -- this attribute must exactly match the processor_type

73190

;; enumeration in rs6000.h.

73191

73192

-(define_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,power4,power5,power6,power7,cell,ppca2,titan"

73193

+(define_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,power4,power5,power6,power7,cell,ppca2,titan,power8"

73194

(const (symbol_ref "rs6000_cpu_attr")))

73195

73196

73197

@@ -197,6 +208,7 @@

73198

(include "power5.md")

73199

(include "power6.md")

73200

(include "power7.md")

73201

+(include "power8.md")

73202

(include "cell.md")

73203

(include "xfpu.md")

73204

(include "a2.md")

73205

@@ -215,7 +227,7 @@

73206

(define_mode_iterator GPR [SI (DI "TARGET_POWERPC64")])

73207

73208

; Any supported integer mode.

73209

-(define_mode_iterator INT [QI HI SI DI TI])

73210

+(define_mode_iterator INT [QI HI SI DI TI PTI])

73211

73212

; Any supported integer mode that fits in one register.

73213

(define_mode_iterator INT1 [QI HI SI (DI "TARGET_POWERPC64")])

73214

@@ -223,6 +235,12 @@

73215

; extend modes for DImode

73216

(define_mode_iterator QHSI [QI HI SI])

73217

73218

+; QImode or HImode for small atomic ops

73219

+(define_mode_iterator QHI [QI HI])

73220

+

73221

+; HImode or SImode for sign extended fusion ops

73222

+(define_mode_iterator HSI [HI SI])

73223

+

73224

; SImode or DImode, even if DImode doesn't fit in GPRs.

73225

(define_mode_iterator SDI [SI DI])

73226

73227

@@ -230,6 +248,10 @@

73228

; (one with a '.') will compare; and the size used for arithmetic carries.

73229

(define_mode_iterator P [(SI "TARGET_32BIT") (DI "TARGET_64BIT")])

73230

73231

+; Iterator to add PTImode along with TImode (TImode can go in VSX registers,

73232

+; PTImode is GPR only)

73233

+(define_mode_iterator TI2 [TI PTI])

73234

+

73235

; Any hardware-supported floating-point mode

73236

(define_mode_iterator FP [

73237

(SF "TARGET_HARD_FLOAT

73238

@@ -253,6 +275,50 @@

73239

(V2DF "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DFmode)")

73240

])

73241

73242

+; Floating point move iterators to combine binary and decimal moves

73243

+(define_mode_iterator FMOVE32 [SF SD])

73244

+(define_mode_iterator FMOVE64 [DF DD])

73245

+(define_mode_iterator FMOVE64X [DI DF DD])

73246

+(define_mode_iterator FMOVE128 [(TF "!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128")

73247

+ (TD "TARGET_HARD_FLOAT && TARGET_FPRS")])

73248

+

73249

+; Iterators for 128 bit types for direct move

73250

+(define_mode_iterator FMOVE128_GPR [(TI "TARGET_VSX_TIMODE")

73251

+ (V16QI "")

73252

+ (V8HI "")

73253

+ (V4SI "")

73254

+ (V4SF "")

73255

+ (V2DI "")

73256

+ (V2DF "")

73257

+ (V1TI "")])

73258

+

73259

+; Whether a floating point move is ok, don't allow SD without hardware FP

73260

+(define_mode_attr fmove_ok [(SF "")

73261

+ (DF "")

73262

+ (SD "TARGET_HARD_FLOAT && TARGET_FPRS")

73263

+ (DD "")])

73264

+

73265

+; Convert REAL_VALUE to the appropriate bits

73266

+(define_mode_attr real_value_to_target [(SF "REAL_VALUE_TO_TARGET_SINGLE")

73267

+ (DF "REAL_VALUE_TO_TARGET_DOUBLE")

73268

+ (SD "REAL_VALUE_TO_TARGET_DECIMAL32")

73269

+ (DD "REAL_VALUE_TO_TARGET_DECIMAL64")])

73270

+

73271

+; Definitions for load to 32-bit fpr register

73272

+(define_mode_attr f32_lr [(SF "f") (SD "wz")])

73273

+(define_mode_attr f32_lm [(SF "m") (SD "Z")])

73274

+(define_mode_attr f32_li [(SF "lfs%U1%X1 %0,%1") (SD "lfiwzx %0,%y1")])

73275

+(define_mode_attr f32_lv [(SF "lxsspx %x0,%y1") (SD "lxsiwzx %x0,%y1")])

73276

+

73277

+; Definitions for store from 32-bit fpr register

73278

+(define_mode_attr f32_sr [(SF "f") (SD "wx")])

73279

+(define_mode_attr f32_sm [(SF "m") (SD "Z")])

73280

+(define_mode_attr f32_si [(SF "stfs%U0%X0 %1,%0") (SD "stfiwx %1,%y0")])

73281

+(define_mode_attr f32_sv [(SF "stxsspx %x1,%y0") (SD "stxsiwzx %x1,%y0")])

73282

+

73283

+; Definitions for 32-bit fpr direct move

73284

+(define_mode_attr f32_dm [(SF "wn") (SD "wm")])

73285

+

73286

; These modes do not fit in integer registers in 32-bit mode.

73287

; but on e500v2, the gpr are 64 bit registers

73288

(define_mode_iterator DIFD [DI (DF "!TARGET_E500_DOUBLE") DD])

73289

@@ -263,6 +329,25 @@

73290

; Iterator for just SF/DF

73291

(define_mode_iterator SFDF [SF DF])

73292

73293

+; SF/DF suffix for traditional floating instructions

73294

+(define_mode_attr Ftrad [(SF "s") (DF "")])

73295

+

73296

+; SF/DF suffix for VSX instructions

73297

+(define_mode_attr Fvsx [(SF "sp") (DF "dp")])

73298

+

73299

+; SF/DF constraint for arithmetic on traditional floating point registers

73300

+(define_mode_attr Ff [(SF "f") (DF "d")])

73301

+

73302

+; SF/DF constraint for arithmetic on VSX registers

73303

+(define_mode_attr Fv [(SF "wy") (DF "ws")])

73304

+

73305

+; s/d suffix for things like fp_addsub_s/fp_addsub_d

73306

+(define_mode_attr Fs [(SF "s") (DF "d")])

73307

+

73308

+; FRE/FRES support

73309

+(define_mode_attr Ffre [(SF "fres") (DF "fre")])

73310

+(define_mode_attr FFRE [(SF "FRES") (DF "FRE")])

73311

+

73312

; Conditional returns.

73313

(define_code_iterator any_return [return simple_return])

73314

(define_code_attr return_pred [(return "direct_return ()")

73315

@@ -271,7 +356,14 @@

73316

73317

; Various instructions that come in SI and DI forms.

73318

; A generic w/d attribute, for things like cmpw/cmpd.

73319

-(define_mode_attr wd [(QI "b") (HI "h") (SI "w") (DI "d")])

73320

+(define_mode_attr wd [(QI "b")

73321

+ (HI "h")

73322

+ (SI "w")

73323

+ (DI "d")

73324

+ (V16QI "b")

73325

+ (V8HI "h")

73326

+ (V4SI "w")

73327

+ (V2DI "d")])

73328

73329

; DImode bits

73330

(define_mode_attr dbits [(QI "56") (HI "48") (SI "32")])

73331

@@ -297,6 +389,8 @@

73332

73333

(define_mode_attr rreg [(SF "f")

73334

(DF "ws")

73335

+ (TF "f")

73336

+ (TD "f")

73337

(V4SF "wf")

73338

(V2DF "wd")])

73339

73340

@@ -311,6 +405,87 @@

73341

73342

(define_mode_attr TARGET_FLOAT [(SF "TARGET_SINGLE_FLOAT")

73343

(DF "TARGET_DOUBLE_FLOAT")])

73344

+

73345

+;; Mode iterator for logical operations on 128-bit types

73346

+(define_mode_iterator BOOL_128 [TI

73347

+ PTI

73348

+ (V16QI "TARGET_ALTIVEC")

73349

+ (V8HI "TARGET_ALTIVEC")

73350

+ (V4SI "TARGET_ALTIVEC")

73351

+ (V4SF "TARGET_ALTIVEC")

73352

+ (V2DI "TARGET_ALTIVEC")

73353

+ (V2DF "TARGET_ALTIVEC")

73354

+ (V1TI "TARGET_ALTIVEC")])

73355

+

73356

+;; For the GPRs we use 3 constraints for register outputs, two that are the

73357

+;; same as the output register, and a third where the output register is an

73358

+;; early clobber, so we don't have to deal with register overlaps. For the

73359

+;; vector types, we prefer to use the vector registers. For TI mode, allow

73360

+;; either.

73361

+

73362

+;; Mode attribute for boolean operation register constraints for output

73363

+(define_mode_attr BOOL_REGS_OUTPUT [(TI "&r,r,r,wa,v")

73364

+ (PTI "&r,r,r")

73365

+ (V16QI "wa,v,&?r,?r,?r")

73366

+ (V8HI "wa,v,&?r,?r,?r")

73367

+ (V4SI "wa,v,&?r,?r,?r")

73368

+ (V4SF "wa,v,&?r,?r,?r")

73369

+ (V2DI "wa,v,&?r,?r,?r")

73370

+ (V2DF "wa,v,&?r,?r,?r")

73371

+ (V1TI "wa,v,&?r,?r,?r")])

73372

+

73373

+;; Mode attribute for boolean operation register constraints for operand1

73374

+(define_mode_attr BOOL_REGS_OP1 [(TI "r,0,r,wa,v")

73375

+ (PTI "r,0,r")

73376

+ (V16QI "wa,v,r,0,r")

73377

+ (V8HI "wa,v,r,0,r")

73378

+ (V4SI "wa,v,r,0,r")

73379

+ (V4SF "wa,v,r,0,r")

73380

+ (V2DI "wa,v,r,0,r")

73381

+ (V2DF "wa,v,r,0,r")

73382

+ (V1TI "wa,v,r,0,r")])

73383

+

73384

+;; Mode attribute for boolean operation register constraints for operand2

73385

+(define_mode_attr BOOL_REGS_OP2 [(TI "r,r,0,wa,v")

73386

+ (PTI "r,r,0")

73387

+ (V16QI "wa,v,r,r,0")

73388

+ (V8HI "wa,v,r,r,0")

73389

+ (V4SI "wa,v,r,r,0")

73390

+ (V4SF "wa,v,r,r,0")

73391

+ (V2DI "wa,v,r,r,0")

73392

+ (V2DF "wa,v,r,r,0")

73393

+ (V1TI "wa,v,r,r,0")])

73394

+

73395

+;; Mode attribute for boolean operation register constraints for operand1

73396

+;; for one_cmpl. To simplify things, we repeat the constraint where 0

73397

+;; is used for operand1 or operand2

73398

+(define_mode_attr BOOL_REGS_UNARY [(TI "r,0,0,wa,v")

73399

+ (PTI "r,0,0")

73400

+ (V16QI "wa,v,r,0,0")

73401

+ (V8HI "wa,v,r,0,0")

73402

+ (V4SI "wa,v,r,0,0")

73403

+ (V4SF "wa,v,r,0,0")

73404

+ (V2DI "wa,v,r,0,0")

73405

+ (V2DF "wa,v,r,0,0")

73406

+ (V1TI "wa,v,r,0,0")])

73407

+

73408

+;; Mode attribute for the clobber of CC0 for AND expansion.

73409

+;; For the 128-bit types, we never do AND immediate, but we need to

73410

+;; get the correct number of X's for the number of operands.

73411

+(define_mode_attr BOOL_REGS_AND_CR0 [(TI "X,X,X,X,X")

73412

+ (PTI "X,X,X")

73413

+ (V16QI "X,X,X,X,X")

73414

+ (V8HI "X,X,X,X,X")

73415

+ (V4SI "X,X,X,X,X")

73416

+ (V4SF "X,X,X,X,X")

73417

+ (V2DI "X,X,X,X,X")

73418

+ (V2DF "X,X,X,X,X")

73419

+ (V1TI "X,X,X,X,X")])

73420

+

73421

+;; Mode attribute to give the correct type for integer divides

73422

+(define_mode_attr idiv_ldiv [(SI "idiv")

73423

+ (DI "ldiv")])

73424

+

73425

73426

;; Start with fixed-point load and store insns. Here we put only the more

73427

;; complex forms. Basic data transfer is done later.

73428

@@ -324,11 +499,19 @@

73429

(define_insn "*zero_extend<mode>di2_internal1"

73430

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

73431

(zero_extend:DI (match_operand:QHSI 1 "reg_or_mem_operand" "m,r")))]

73432

- "TARGET_POWERPC64"

73433

+ "TARGET_POWERPC64 && (<MODE>mode != SImode || !TARGET_LFIWZX)"

73434

"@

73435

l<wd>z%U1%X1 %0,%1

73436

rldicl %0,%1,0,<dbits>"

73437

- [(set_attr "type" "load,*")])

73438

+ [(set_attr_alternative "type"

73439

+ [(if_then_else

73440

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73441

+ (const_string "load_ux")

73442

+ (if_then_else

73443

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73444

+ (const_string "load_u")

73445

+ (const_string "load")))

73446

+ (const_string "*")])])

73447

73448

(define_insn "*zero_extend<mode>di2_internal2"

73449

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

73450

@@ -382,6 +565,29 @@

73451

(const_int 0)))]

73452

"")

73453

73454

+(define_insn "*zero_extendsidi2_lfiwzx"

73455

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,??wm,!wz,!wu")

73456

+ (zero_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "m,r,r,Z,Z")))]

73457

+ "TARGET_POWERPC64 && TARGET_LFIWZX"

73458

+ "@

73459

+ lwz%U1%X1 %0,%1

73460

+ rldicl %0,%1,0,32

73461

+ mtvsrwz %x0,%1

73462

+ lfiwzx %0,%y1

73463

+ lxsiwzx %x0,%y1"

73464

+ [(set_attr_alternative "type"

73465

+ [(if_then_else

73466

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73467

+ (const_string "load_ux")

73468

+ (if_then_else

73469

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73470

+ (const_string "load_u")

73471

+ (const_string "load")))

73472

+ (const_string "*")

73473

+ (const_string "mffgpr")

73474

+ (const_string "fpload")

73475

+ (const_string "fpload")])])

73476

+

73477

(define_insn "extendqidi2"

73478

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

73479

(sign_extend:DI (match_operand:QI 1 "gpc_reg_operand" "r")))]

73480

@@ -454,7 +660,15 @@

73481

"@

73482

lha%U1%X1 %0,%1

73483

extsh %0,%1"

73484

- [(set_attr "type" "load_ext,exts")])

73485

+ [(set_attr_alternative "type"

73486

+ [(if_then_else

73487

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73488

+ (const_string "load_ext_ux")

73489

+ (if_then_else

73490

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73491

+ (const_string "load_ext_u")

73492

+ (const_string "load_ext")))

73493

+ (const_string "exts")])])

73494

73495

(define_insn ""

73496

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

73497

@@ -521,16 +735,47 @@

73498

"TARGET_POWERPC64"

73499

"")

73500

73501

-(define_insn ""

73502

+(define_insn "*extendsidi2_lfiwax"

73503

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,??wm,!wl,!wu")

73504

+ (sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r,r,Z,Z")))]

73505

+ "TARGET_POWERPC64 && TARGET_LFIWAX"

73506

+ "@

73507

+ lwa%U1%X1 %0,%1

73508

+ extsw %0,%1

73509

+ mtvsrwa %x0,%1

73510

+ lfiwax %0,%y1

73511

+ lxsiwax %x0,%y1"

73512

+ [(set_attr_alternative "type"

73513

+ [(if_then_else

73514

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73515

+ (const_string "load_ext_ux")

73516

+ (if_then_else

73517

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73518

+ (const_string "load_ext_u")

73519

+ (const_string "load_ext")))

73520

+ (const_string "exts")

73521

+ (const_string "mffgpr")

73522

+ (const_string "fpload")

73523

+ (const_string "fpload")])])

73524

+

73525

+(define_insn "*extendsidi2_nocell"

73526

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

73527

(sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r")))]

73528

- "TARGET_POWERPC64 && rs6000_gen_cell_microcode"

73529

+ "TARGET_POWERPC64 && rs6000_gen_cell_microcode && !TARGET_LFIWAX"

73530

"@

73531

lwa%U1%X1 %0,%1

73532

extsw %0,%1"

73533

- [(set_attr "type" "load_ext,exts")])

73534

+ [(set_attr_alternative "type"

73535

+ [(if_then_else

73536

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73537

+ (const_string "load_ext_ux")

73538

+ (if_then_else

73539

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73540

+ (const_string "load_ext_u")

73541

+ (const_string "load_ext")))

73542

+ (const_string "exts")])])

73543

73544

-(define_insn ""

73545

+(define_insn "*extendsidi2_nocell"

73546

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

73547

(sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" "r")))]

73548

"TARGET_POWERPC64 && !rs6000_gen_cell_microcode"

73549

@@ -602,7 +847,15 @@

73550

"@

73551

lbz%U1%X1 %0,%1

73552

rlwinm %0,%1,0,0xff"

73553

- [(set_attr "type" "load,*")])

73554

+ [(set_attr_alternative "type"

73555

+ [(if_then_else

73556

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73557

+ (const_string "load_ux")

73558

+ (if_then_else

73559

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73560

+ (const_string "load_u")

73561

+ (const_string "load")))

73562

+ (const_string "*")])])

73563

73564

(define_insn ""

73565

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

73566

@@ -722,7 +975,15 @@

73567

"@

73568

lbz%U1%X1 %0,%1

73569

rlwinm %0,%1,0,0xff"

73570

- [(set_attr "type" "load,*")])

73571

+ [(set_attr_alternative "type"

73572

+ [(if_then_else

73573

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73574

+ (const_string "load_ux")

73575

+ (if_then_else

73576

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73577

+ (const_string "load_u")

73578

+ (const_string "load")))

73579

+ (const_string "*")])])

73580

73581

(define_insn ""

73582

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

73583

@@ -848,7 +1109,15 @@

73584

"@

73585

lhz%U1%X1 %0,%1

73586

rlwinm %0,%1,0,0xffff"

73587

- [(set_attr "type" "load,*")])

73588

+ [(set_attr_alternative "type"

73589

+ [(if_then_else

73590

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73591

+ (const_string "load_ux")

73592

+ (if_then_else

73593

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73594

+ (const_string "load_u")

73595

+ (const_string "load")))

73596

+ (const_string "*")])])

73597

73598

(define_insn ""

73599

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

73600

@@ -915,7 +1184,15 @@

73601

"@

73602

lha%U1%X1 %0,%1

73603

extsh %0,%1"

73604

- [(set_attr "type" "load_ext,exts")])

73605

+ [(set_attr_alternative "type"

73606

+ [(if_then_else

73607

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

73608

+ (const_string "load_ext_ux")

73609

+ (if_then_else

73610

+ (match_test "update_address_mem (operands[1], VOIDmode)")

73611

+ (const_string "load_ext_u")

73612

+ (const_string "load_ext")))

73613

+ (const_string "exts")])])

73614

73615

(define_insn ""

73616

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

73617

@@ -1658,7 +1935,19 @@

73618

FAIL;

73619

})

73620

73621

-(define_insn "one_cmpl<mode>2"

73622

+(define_expand "one_cmpl<mode>2"

73623

+ [(set (match_operand:SDI 0 "gpc_reg_operand" "")

73624

+ (not:SDI (match_operand:SDI 1 "gpc_reg_operand" "")))]

73625

+ ""

73626

+{

73627

+ if (<MODE>mode == DImode && !TARGET_POWERPC64)

73628

+ {

73629

+ rs6000_split_logical (operands, NOT, false, false, false, NULL_RTX);

73630

+ DONE;

73631

+ }

73632

+})

73633

+

73634

+(define_insn "*one_cmpl<mode>2"

73635

[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")

73636

(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")))]

73637

""

73638

@@ -1935,7 +2224,9 @@

73639

[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")

73640

(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")] UNSPEC_PARITY))]

73641

"TARGET_CMPB && TARGET_POPCNTB"

73642

- "prty<wd> %0,%1")

73643

+ "prty<wd> %0,%1"

73644

+ [(set_attr "length" "4")

73645

+ (set_attr "type" "popcnt")])

73646

73647

(define_expand "parity<mode>2"

73648

[(set (match_operand:GPR 0 "gpc_reg_operand" "")

73649

@@ -2412,7 +2703,7 @@

73650

(match_operand:SI 2 "gpc_reg_operand" "r,r"))

73651

(const_int 0)))

73652

(clobber (match_scratch:SI 3 "=r,r"))]

73653

- ""

73654

+ "TARGET_32BIT"

73655

"@

73656

mullw. %3,%1,%2

73657

#"

73658

@@ -2425,7 +2716,7 @@

73659

(match_operand:SI 2 "gpc_reg_operand" ""))

73660

(const_int 0)))

73661

(clobber (match_scratch:SI 3 ""))]

73662

- "reload_completed"

73663

+ "TARGET_32BIT && reload_completed"

73664

[(set (match_dup 3)

73665

(mult:SI (match_dup 1) (match_dup 2)))

73666

(set (match_dup 0)

73667

@@ -2440,7 +2731,7 @@

73668

(const_int 0)))

73669

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

73670

(mult:SI (match_dup 1) (match_dup 2)))]

73671

- ""

73672

+ "TARGET_32BIT"

73673

"@

73674

mullw. %0,%1,%2

73675

#"

73676

@@ -2454,7 +2745,7 @@

73677

(const_int 0)))

73678

(set (match_operand:SI 0 "gpc_reg_operand" "")

73679

(mult:SI (match_dup 1) (match_dup 2)))]

73680

- "reload_completed"

73681

+ "TARGET_32BIT && reload_completed"

73682

[(set (match_dup 0)

73683

(mult:SI (match_dup 1) (match_dup 2)))

73684

(set (match_dup 3)

73685

@@ -2469,10 +2760,7 @@

73686

(match_operand:GPR 2 "gpc_reg_operand" "r")))]

73687

""

73688

"div<wd>u %0,%1,%2"

73689

- [(set (attr "type")

73690

- (cond [(match_operand:SI 0 "" "")

73691

- (const_string "idiv")]

73692

- (const_string "ldiv")))])

73693

+ [(set_attr "type" "<idiv_ldiv>")])

73694

73695

73696

;; For powers of two we can do srai/aze for divide and then adjust for

73697

@@ -2496,10 +2784,7 @@

73698

(match_operand:GPR 2 "gpc_reg_operand" "r")))]

73699

""

73700

"div<wd> %0,%1,%2"

73701

- [(set (attr "type")

73702

- (cond [(match_operand:SI 0 "" "")

73703

- (const_string "idiv")]

73704

- (const_string "ldiv")))])

73705

+ [(set_attr "type" "<idiv_ldiv>")])

73706

73707

(define_expand "mod<mode>3"

73708

[(use (match_operand:GPR 0 "gpc_reg_operand" ""))

73709

@@ -3698,13 +3983,13 @@

73710

(const_int 0)))]

73711

"")

73712

73713

-(define_insn "*rotlsi3_internal7"

73714

+(define_insn "*rotlsi3_internal7le"

73715

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

73716

(zero_extend:SI

73717

(subreg:QI

73718

(rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r")

73719

(match_operand:SI 2 "reg_or_cint_operand" "ri")) 0)))]

73720

- ""

73721

+ "!BYTES_BIG_ENDIAN"

73722

"rlw%I2nm %0,%1,%h2,0xff"

73723

[(set (attr "cell_micro")

73724

(if_then_else (match_operand:SI 2 "const_int_operand" "")

73725

@@ -3711,7 +3996,20 @@

73726

(const_string "not")

73727

(const_string "always")))])

73728

73729

-(define_insn "*rotlsi3_internal8"

73730

+(define_insn "*rotlsi3_internal7be"

73731

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

73732

+ (zero_extend:SI

73733

+ (subreg:QI

73734

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r")

73735

+ (match_operand:SI 2 "reg_or_cint_operand" "ri")) 3)))]

73736

+ "BYTES_BIG_ENDIAN"

73737

+ "rlw%I2nm %0,%1,%h2,0xff"

73738

+ [(set (attr "cell_micro")

73739

+ (if_then_else (match_operand:SI 2 "const_int_operand" "")

73740

+ (const_string "not")

73741

+ (const_string "always")))])

73742

+

73743

+(define_insn "*rotlsi3_internal8le"

73744

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

73745

(compare:CC (zero_extend:SI

73746

(subreg:QI

73747

@@ -3719,7 +4017,7 @@

73748

(match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

73749

(const_int 0)))

73750

(clobber (match_scratch:SI 3 "=r,r,r,r"))]

73751

- ""

73752

+ "!BYTES_BIG_ENDIAN"

73753

"@

73754

rlwnm. %3,%1,%2,0xff

73755

rlwinm. %3,%1,%h2,0xff

73756

@@ -3728,6 +4026,23 @@

73757

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

73758

(set_attr "length" "4,4,8,8")])

73759

73760

+(define_insn "*rotlsi3_internal8be"

73761

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

73762

+ (compare:CC (zero_extend:SI

73763

+ (subreg:QI

73764

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

73765

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 3))

73766

+ (const_int 0)))

73767

+ (clobber (match_scratch:SI 3 "=r,r,r,r"))]

73768

+ "BYTES_BIG_ENDIAN"

73769

+ "@

73770

+ rlwnm. %3,%1,%2,0xff

73771

+ rlwinm. %3,%1,%h2,0xff

73772

+ #

73773

+ #"

73774

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

73775

+ (set_attr "length" "4,4,8,8")])

73776

+

73777

(define_split

73778

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

73779

(compare:CC (zero_extend:SI

73780

@@ -3736,7 +4051,7 @@

73781

(match_operand:SI 2 "reg_or_cint_operand" "")) 0))

73782

(const_int 0)))

73783

(clobber (match_scratch:SI 3 ""))]

73784

- "reload_completed"

73785

+ "!BYTES_BIG_ENDIAN && reload_completed"

73786

[(set (match_dup 3)

73787

(zero_extend:SI (subreg:QI

73788

(rotate:SI (match_dup 1)

73789

@@ -3746,7 +4061,25 @@

73790

(const_int 0)))]

73791

"")

73792

73793

-(define_insn "*rotlsi3_internal9"

73794

+(define_split

73795

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

73796

+ (compare:CC (zero_extend:SI

73797

+ (subreg:QI

73798

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

73799

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 3))

73800

+ (const_int 0)))

73801

+ (clobber (match_scratch:SI 3 ""))]

73802

+ "BYTES_BIG_ENDIAN && reload_completed"

73803

+ [(set (match_dup 3)

73804

+ (zero_extend:SI (subreg:QI

73805

+ (rotate:SI (match_dup 1)

73806

+ (match_dup 2)) 3)))

73807

+ (set (match_dup 0)

73808

+ (compare:CC (match_dup 3)

73809

+ (const_int 0)))]

73810

+ "")

73811

+

73812

+(define_insn "*rotlsi3_internal9le"

73813

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

73814

(compare:CC (zero_extend:SI

73815

(subreg:QI

73816

@@ -3755,7 +4088,7 @@

73817

(const_int 0)))

73818

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

73819

(zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

73820

- ""

73821

+ "!BYTES_BIG_ENDIAN"

73822

"@

73823

rlwnm. %0,%1,%2,0xff

73824

rlwinm. %0,%1,%h2,0xff

73825

@@ -3764,6 +4097,24 @@

73826

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

73827

(set_attr "length" "4,4,8,8")])

73828

73829

+(define_insn "*rotlsi3_internal9be"

73830

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

73831

+ (compare:CC (zero_extend:SI

73832

+ (subreg:QI

73833

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

73834

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 3))

73835

+ (const_int 0)))

73836

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

73837

+ (zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 3)))]

73838

+ "BYTES_BIG_ENDIAN"

73839

+ "@

73840

+ rlwnm. %0,%1,%2,0xff

73841

+ rlwinm. %0,%1,%h2,0xff

73842

+ #

73843

+ #"

73844

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

73845

+ (set_attr "length" "4,4,8,8")])

73846

+

73847

(define_split

73848

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

73849

(compare:CC (zero_extend:SI

73850

@@ -3773,7 +4124,7 @@

73851

(const_int 0)))

73852

(set (match_operand:SI 0 "gpc_reg_operand" "")

73853

(zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

73854

- "reload_completed"

73855

+ "!BYTES_BIG_ENDIAN && reload_completed"

73856

[(set (match_dup 0)

73857

(zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 0)))

73858

(set (match_dup 3)

73859

@@ -3781,20 +4132,48 @@

73860

(const_int 0)))]

73861

"")

73862

73863

-(define_insn "*rotlsi3_internal10"

73864

+(define_split

73865

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

73866

+ (compare:CC (zero_extend:SI

73867

+ (subreg:QI

73868

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

73869

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 3))

73870

+ (const_int 0)))

73871

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

73872

+ (zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 3)))]

73873

+ "BYTES_BIG_ENDIAN && reload_completed"

73874

+ [(set (match_dup 0)

73875

+ (zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 3)))

73876

+ (set (match_dup 3)

73877

+ (compare:CC (match_dup 0)

73878

+ (const_int 0)))]

73879

+ "")

73880

+

73881

+(define_insn "*rotlsi3_internal10le"

73882

[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

73883

(zero_extend:SI

73884

(subreg:HI

73885

(rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

73886

(match_operand:SI 2 "reg_or_cint_operand" "r,i")) 0)))]

73887

- ""

73888

+ "!BYTES_BIG_ENDIAN"

73889

"@

73890

rlwnm %0,%1,%2,0xffff

73891

rlwinm %0,%1,%h2,0xffff"

73892

[(set_attr "type" "var_shift_rotate,integer")])

73893

73894

+(define_insn "*rotlsi3_internal10be"

73895

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

73896

+ (zero_extend:SI

73897

+ (subreg:HI

73898

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

73899

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i")) 2)))]

73900

+ "BYTES_BIG_ENDIAN"

73901

+ "@

73902

+ rlwnm %0,%1,%2,0xffff

73903

+ rlwinm %0,%1,%h2,0xffff"

73904

+ [(set_attr "type" "var_shift_rotate,integer")])

73905

73906

-(define_insn "*rotlsi3_internal11"

73907

+(define_insn "*rotlsi3_internal11le"

73908

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

73909

(compare:CC (zero_extend:SI

73910

(subreg:HI

73911

@@ -3802,7 +4181,7 @@

73912

(match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

73913

(const_int 0)))

73914

(clobber (match_scratch:SI 3 "=r,r,r,r"))]

73915

- ""

73916

+ "!BYTES_BIG_ENDIAN"

73917

"@

73918

rlwnm. %3,%1,%2,0xffff

73919

rlwinm. %3,%1,%h2,0xffff

73920

@@ -3811,6 +4190,23 @@

73921

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

73922

(set_attr "length" "4,4,8,8")])

73923

73924

+(define_insn "*rotlsi3_internal11be"

73925

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

73926

+ (compare:CC (zero_extend:SI

73927

+ (subreg:HI

73928

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

73929

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 2))

73930

+ (const_int 0)))

73931

+ (clobber (match_scratch:SI 3 "=r,r,r,r"))]

73932

+ "BYTES_BIG_ENDIAN"

73933

+ "@

73934

+ rlwnm. %3,%1,%2,0xffff

73935

+ rlwinm. %3,%1,%h2,0xffff

73936

+ #

73937

+ #"

73938

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

73939

+ (set_attr "length" "4,4,8,8")])

73940

+

73941

(define_split

73942

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

73943

(compare:CC (zero_extend:SI

73944

@@ -3819,7 +4215,7 @@

73945

(match_operand:SI 2 "reg_or_cint_operand" "")) 0))

73946

(const_int 0)))

73947

(clobber (match_scratch:SI 3 ""))]

73948

- "reload_completed"

73949

+ "!BYTES_BIG_ENDIAN && reload_completed"

73950

[(set (match_dup 3)

73951

(zero_extend:SI (subreg:HI

73952

(rotate:SI (match_dup 1)

73953

@@ -3829,7 +4225,25 @@

73954

(const_int 0)))]

73955

"")

73956

73957

-(define_insn "*rotlsi3_internal12"

73958

+(define_split

73959

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

73960

+ (compare:CC (zero_extend:SI

73961

+ (subreg:HI

73962

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

73963

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 2))

73964

+ (const_int 0)))

73965

+ (clobber (match_scratch:SI 3 ""))]

73966

+ "BYTES_BIG_ENDIAN && reload_completed"

73967

+ [(set (match_dup 3)

73968

+ (zero_extend:SI (subreg:HI

73969

+ (rotate:SI (match_dup 1)

73970

+ (match_dup 2)) 2)))

73971

+ (set (match_dup 0)

73972

+ (compare:CC (match_dup 3)

73973

+ (const_int 0)))]

73974

+ "")

73975

+

73976

+(define_insn "*rotlsi3_internal12le"

73977

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

73978

(compare:CC (zero_extend:SI

73979

(subreg:HI

73980

@@ -3838,7 +4252,7 @@

73981

(const_int 0)))

73982

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

73983

(zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

73984

- ""

73985

+ "!BYTES_BIG_ENDIAN"

73986

"@

73987

rlwnm. %0,%1,%2,0xffff

73988

rlwinm. %0,%1,%h2,0xffff

73989

@@ -3847,6 +4261,24 @@

73990

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

73991

(set_attr "length" "4,4,8,8")])

73992

73993

+(define_insn "*rotlsi3_internal12be"

73994

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

73995

+ (compare:CC (zero_extend:SI

73996

+ (subreg:HI

73997

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")

73998

+ (match_operand:SI 2 "reg_or_cint_operand" "r,i,r,i")) 2))

73999

+ (const_int 0)))

74000

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")

74001

+ (zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 2)))]

74002

+ "BYTES_BIG_ENDIAN"

74003

+ "@

74004

+ rlwnm. %0,%1,%2,0xffff

74005

+ rlwinm. %0,%1,%h2,0xffff

74006

+ #

74007

+ #"

74008

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

74009

+ (set_attr "length" "4,4,8,8")])

74010

+

74011

(define_split

74012

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

74013

(compare:CC (zero_extend:SI

74014

@@ -3856,7 +4288,7 @@

74015

(const_int 0)))

74016

(set (match_operand:SI 0 "gpc_reg_operand" "")

74017

(zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 0)))]

74018

- "reload_completed"

74019

+ "!BYTES_BIG_ENDIAN && reload_completed"

74020

[(set (match_dup 0)

74021

(zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 0)))

74022

(set (match_dup 3)

74023

@@ -3864,6 +4296,23 @@

74024

(const_int 0)))]

74025

"")

74026

74027

+(define_split

74028

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

74029

+ (compare:CC (zero_extend:SI

74030

+ (subreg:HI

74031

+ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "")

74032

+ (match_operand:SI 2 "reg_or_cint_operand" "")) 2))

74033

+ (const_int 0)))

74034

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

74035

+ (zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 2)))]

74036

+ "BYTES_BIG_ENDIAN && reload_completed"

74037

+ [(set (match_dup 0)

74038

+ (zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 2)))

74039

+ (set (match_dup 3)

74040

+ (compare:CC (match_dup 0)

74041

+ (const_int 0)))]

74042

+ "")

74043

+

74044

(define_insn "ashlsi3"

74045

[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

74046

(ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

74047

@@ -4054,7 +4503,7 @@

74048

#

74049

#

74050

#"

74051

- [(set_attr "type" "delayed_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

74052

+ [(set_attr "type" "fast_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

74053

(set_attr "length" "4,4,4,8,8,8")])

74054

74055

(define_split

74056

@@ -4086,7 +4535,7 @@

74057

#

74058

#

74059

#"

74060

- [(set_attr "type" "delayed_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

74061

+ [(set_attr "type" "fast_compare,var_delayed_compare,delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

74062

(set_attr "length" "4,4,4,8,8,8")])

74063

74064

(define_split

74065

@@ -4177,16 +4626,25 @@

74066

(const_int 0)))]

74067

"")

74068

74069

-(define_insn ""

74070

+(define_insn "*lshiftrt_internal1le"

74071

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

74072

(zero_extend:SI

74073

(subreg:QI

74074

(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

74075

(match_operand:SI 2 "const_int_operand" "i")) 0)))]

74076

- "includes_rshift_p (operands[2], GEN_INT (255))"

74077

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

74078

"rlwinm %0,%1,%s2,0xff")

74079

74080

-(define_insn ""

74081

+(define_insn "*lshiftrt_internal1be"

74082

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

74083

+ (zero_extend:SI

74084

+ (subreg:QI

74085

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

74086

+ (match_operand:SI 2 "const_int_operand" "i")) 3)))]

74087

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

74088

+ "rlwinm %0,%1,%s2,0xff")

74089

+

74090

+(define_insn "*lshiftrt_internal2le"

74091

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

74092

(compare:CC

74093

(zero_extend:SI

74094

@@ -4195,7 +4653,7 @@

74095

(match_operand:SI 2 "const_int_operand" "i,i")) 0))

74096

(const_int 0)))

74097

(clobber (match_scratch:SI 3 "=r,r"))]

74098

- "includes_rshift_p (operands[2], GEN_INT (255))"

74099

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

74100

"@

74101

rlwinm. %3,%1,%s2,0xff

74102

#"

74103

@@ -4202,6 +4660,22 @@

74104

[(set_attr "type" "delayed_compare")

74105

(set_attr "length" "4,8")])

74106

74107

+(define_insn "*lshiftrt_internal2be"

74108

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

74109

+ (compare:CC

74110

+ (zero_extend:SI

74111

+ (subreg:QI

74112

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

74113

+ (match_operand:SI 2 "const_int_operand" "i,i")) 3))

74114

+ (const_int 0)))

74115

+ (clobber (match_scratch:SI 3 "=r,r"))]

74116

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

74117

+ "@

74118

+ rlwinm. %3,%1,%s2,0xff

74119

+ #"

74120

+ [(set_attr "type" "delayed_compare")

74121

+ (set_attr "length" "4,8")])

74122

+

74123

(define_split

74124

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

74125

(compare:CC

74126

@@ -4211,7 +4685,7 @@

74127

(match_operand:SI 2 "const_int_operand" "")) 0))

74128

(const_int 0)))

74129

(clobber (match_scratch:SI 3 ""))]

74130

- "includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

74131

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

74132

[(set (match_dup 3)

74133

(zero_extend:SI (subreg:QI

74134

(lshiftrt:SI (match_dup 1)

74135

@@ -4221,7 +4695,26 @@

74136

(const_int 0)))]

74137

"")

74138

74139

-(define_insn ""

74140

+(define_split

74141

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

74142

+ (compare:CC

74143

+ (zero_extend:SI

74144

+ (subreg:QI

74145

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

74146

+ (match_operand:SI 2 "const_int_operand" "")) 3))

74147

+ (const_int 0)))

74148

+ (clobber (match_scratch:SI 3 ""))]

74149

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

74150

+ [(set (match_dup 3)

74151

+ (zero_extend:SI (subreg:QI

74152

+ (lshiftrt:SI (match_dup 1)

74153

+ (match_dup 2)) 3)))

74154

+ (set (match_dup 0)

74155

+ (compare:CC (match_dup 3)

74156

+ (const_int 0)))]

74157

+ "")

74158

+

74159

+(define_insn "*lshiftrt_internal3le"

74160

[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

74161

(compare:CC

74162

(zero_extend:SI

74163

@@ -4231,7 +4724,7 @@

74164

(const_int 0)))

74165

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

74166

(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

74167

- "includes_rshift_p (operands[2], GEN_INT (255))"

74168

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

74169

"@

74170

rlwinm. %0,%1,%s2,0xff

74171

#"

74172

@@ -4238,6 +4731,23 @@

74173

[(set_attr "type" "delayed_compare")

74174

(set_attr "length" "4,8")])

74175

74176

+(define_insn "*lshiftrt_internal3be"

74177

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

74178

+ (compare:CC

74179

+ (zero_extend:SI

74180

+ (subreg:QI

74181

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

74182

+ (match_operand:SI 2 "const_int_operand" "i,i")) 3))

74183

+ (const_int 0)))

74184

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

74185

+ (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 3)))]

74186

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255))"

74187

+ "@

74188

+ rlwinm. %0,%1,%s2,0xff

74189

+ #"

74190

+ [(set_attr "type" "delayed_compare")

74191

+ (set_attr "length" "4,8")])

74192

+

74193

(define_split

74194

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

74195

(compare:CC

74196

@@ -4248,7 +4758,7 @@

74197

(const_int 0)))

74198

(set (match_operand:SI 0 "gpc_reg_operand" "")

74199

(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

74200

- "includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

74201

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

74202

[(set (match_dup 0)

74203

(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))

74204

(set (match_dup 3)

74205

@@ -4256,16 +4766,43 @@

74206

(const_int 0)))]

74207

"")

74208

74209

-(define_insn ""

74210

+(define_split

74211

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

74212

+ (compare:CC

74213

+ (zero_extend:SI

74214

+ (subreg:QI

74215

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

74216

+ (match_operand:SI 2 "const_int_operand" "")) 3))

74217

+ (const_int 0)))

74218

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

74219

+ (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 3)))]

74220

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (255)) && reload_completed"

74221

+ [(set (match_dup 0)

74222

+ (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 3)))

74223

+ (set (match_dup 3)

74224

+ (compare:CC (match_dup 0)

74225

+ (const_int 0)))]

74226

+ "")

74227

+

74228

+(define_insn "*lshiftrt_internal4le"

74229

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

74230

(zero_extend:SI

74231

(subreg:HI

74232

(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

74233

(match_operand:SI 2 "const_int_operand" "i")) 0)))]

74234

- "includes_rshift_p (operands[2], GEN_INT (65535))"

74235

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

74236

"rlwinm %0,%1,%s2,0xffff")

74237

74238

-(define_insn ""

74239

+(define_insn "*lshiftrt_internal4be"

74240

+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

74241

+ (zero_extend:SI

74242

+ (subreg:HI

74243

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")

74244

+ (match_operand:SI 2 "const_int_operand" "i")) 2)))]

74245

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

74246

+ "rlwinm %0,%1,%s2,0xffff")

74247

+

74248

+(define_insn "*lshiftrt_internal5le"

74249

[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

74250

(compare:CC

74251

(zero_extend:SI

74252

@@ -4274,7 +4811,7 @@

74253

(match_operand:SI 2 "const_int_operand" "i,i")) 0))

74254

(const_int 0)))

74255

(clobber (match_scratch:SI 3 "=r,r"))]

74256

- "includes_rshift_p (operands[2], GEN_INT (65535))"

74257

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

74258

"@

74259

rlwinm. %3,%1,%s2,0xffff

74260

#"

74261

@@ -4281,6 +4818,22 @@

74262

[(set_attr "type" "delayed_compare")

74263

(set_attr "length" "4,8")])

74264

74265

+(define_insn "*lshiftrt_internal5be"

74266

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")

74267

+ (compare:CC

74268

+ (zero_extend:SI

74269

+ (subreg:HI

74270

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

74271

+ (match_operand:SI 2 "const_int_operand" "i,i")) 2))

74272

+ (const_int 0)))

74273

+ (clobber (match_scratch:SI 3 "=r,r"))]

74274

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

74275

+ "@

74276

+ rlwinm. %3,%1,%s2,0xffff

74277

+ #"

74278

+ [(set_attr "type" "delayed_compare")

74279

+ (set_attr "length" "4,8")])

74280

+

74281

(define_split

74282

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

74283

(compare:CC

74284

@@ -4290,7 +4843,7 @@

74285

(match_operand:SI 2 "const_int_operand" "")) 0))

74286

(const_int 0)))

74287

(clobber (match_scratch:SI 3 ""))]

74288

- "includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

74289

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

74290

[(set (match_dup 3)

74291

(zero_extend:SI (subreg:HI

74292

(lshiftrt:SI (match_dup 1)

74293

@@ -4300,7 +4853,26 @@

74294

(const_int 0)))]

74295

"")

74296

74297

-(define_insn ""

74298

+(define_split

74299

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

74300

+ (compare:CC

74301

+ (zero_extend:SI

74302

+ (subreg:HI

74303

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

74304

+ (match_operand:SI 2 "const_int_operand" "")) 2))

74305

+ (const_int 0)))

74306

+ (clobber (match_scratch:SI 3 ""))]

74307

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

74308

+ [(set (match_dup 3)

74309

+ (zero_extend:SI (subreg:HI

74310

+ (lshiftrt:SI (match_dup 1)

74311

+ (match_dup 2)) 2)))

74312

+ (set (match_dup 0)

74313

+ (compare:CC (match_dup 3)

74314

+ (const_int 0)))]

74315

+ "")

74316

+

74317

+(define_insn "*lshiftrt_internal5le"

74318

[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

74319

(compare:CC

74320

(zero_extend:SI

74321

@@ -4310,7 +4882,7 @@

74322

(const_int 0)))

74323

(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

74324

(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

74325

- "includes_rshift_p (operands[2], GEN_INT (65535))"

74326

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

74327

"@

74328

rlwinm. %0,%1,%s2,0xffff

74329

#"

74330

@@ -4317,6 +4889,23 @@

74331

[(set_attr "type" "delayed_compare")

74332

(set_attr "length" "4,8")])

74333

74334

+(define_insn "*lshiftrt_internal5be"

74335

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")

74336

+ (compare:CC

74337

+ (zero_extend:SI

74338

+ (subreg:HI

74339

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

74340

+ (match_operand:SI 2 "const_int_operand" "i,i")) 2))

74341

+ (const_int 0)))

74342

+ (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

74343

+ (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 2)))]

74344

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535))"

74345

+ "@

74346

+ rlwinm. %0,%1,%s2,0xffff

74347

+ #"

74348

+ [(set_attr "type" "delayed_compare")

74349

+ (set_attr "length" "4,8")])

74350

+

74351

(define_split

74352

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

74353

(compare:CC

74354

@@ -4327,7 +4916,7 @@

74355

(const_int 0)))

74356

(set (match_operand:SI 0 "gpc_reg_operand" "")

74357

(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]

74358

- "includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

74359

+ "!BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

74360

[(set (match_dup 0)

74361

(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))

74362

(set (match_dup 3)

74363

@@ -4335,6 +4924,24 @@

74364

(const_int 0)))]

74365

"")

74366

74367

+(define_split

74368

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

74369

+ (compare:CC

74370

+ (zero_extend:SI

74371

+ (subreg:HI

74372

+ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "")

74373

+ (match_operand:SI 2 "const_int_operand" "")) 2))

74374

+ (const_int 0)))

74375

+ (set (match_operand:SI 0 "gpc_reg_operand" "")

74376

+ (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 2)))]

74377

+ "BYTES_BIG_ENDIAN && includes_rshift_p (operands[2], GEN_INT (65535)) && reload_completed"

74378

+ [(set (match_dup 0)

74379

+ (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 2)))

74380

+ (set (match_dup 3)

74381

+ (compare:CC (match_dup 0)

74382

+ (const_int 0)))]

74383

+ "")

74384

+

74385

(define_insn "ashrsi3"

74386

[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")

74387

(ashiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")

74388

@@ -4455,224 +5062,226 @@

74389

(const_int 0)))]

74390

"")

74391

74392

-;; Floating-point insns, excluding normal data motion.

74393

-;;

74394

-;; PowerPC has a full set of single-precision floating point instructions.

74395

-;;

74396

-;; For the POWER architecture, we pretend that we have both SFmode and

74397

-;; DFmode insns, while, in fact, all fp insns are actually done in double.

74398

-;; The only conversions we will do will be when storing to memory. In that

74399

-;; case, we will use the "frsp" instruction before storing.

74400

-;;

74401

-;; Note that when we store into a single-precision memory location, we need to

74402

-;; use the frsp insn first. If the register being stored isn't dead, we

74403

-;; need a scratch register for the frsp. But this is difficult when the store

74404

-;; is done by reload. It is not incorrect to do the frsp on the register in

74405

-;; this case, we just lose precision that we would have otherwise gotten but

74406

-;; is not guaranteed. Perhaps this should be tightened up at some point.

74407

+

74408

+;; Floating-point insns, excluding normal data motion. We combine the SF/DF

74409

+;; modes here, and also add in conditional vsx/power8-vector support to access

74410

+;; values in the traditional Altivec registers if the appropriate

74411

+;; -mupper-regs-{df,sf} option is enabled.

74412

74413

-(define_expand "extendsfdf2"

74414

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

74415

- (float_extend:DF (match_operand:SF 1 "reg_or_none500mem_operand" "")))]

74416

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74417

+(define_expand "abs<mode>2"

74418

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74419

+ (abs:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")))]

74420

+ "TARGET_<MODE>_INSN"

74421

"")

74422

74423

-(define_insn_and_split "*extendsfdf2_fpr"

74424

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d,d")

74425

- (float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m")))]

74426

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

74427

+(define_insn "*abs<mode>2_fpr"

74428

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74429

+ (abs:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")))]

74430

+ "TARGET_<MODE>_FPR"

74431

"@

74432

- #

74433

- fmr %0,%1

74434

- lfs%U1%X1 %0,%1"

74435

- "&& reload_completed && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1])"

74436

- [(const_int 0)]

74437

-{

74438

- emit_note (NOTE_INSN_DELETED);

74439

- DONE;

74440

-}

74441

- [(set_attr "type" "fp,fp,fpload")])

74442

+ fabs %0,%1

74443

+ xsabsdp %x0,%x1"

74444

+ [(set_attr "type" "fp")

74445

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

74446

74447

-(define_expand "truncdfsf2"

74448

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74449

- (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "")))]

74450

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74451

- "")

74452

+(define_insn "*nabs<mode>2_fpr"

74453

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74454

+ (neg:SFDF

74455

+ (abs:SFDF

74456

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>"))))]

74457

+ "TARGET_<MODE>_FPR"

74458

+ "@

74459

+ fnabs %0,%1

74460

+ xsnabsdp %x0,%x1"

74461

+ [(set_attr "type" "fp")

74462

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

74463

74464

-(define_insn "*truncdfsf2_fpr"

74465

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74466

- (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "d")))]

74467

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

74468

- "frsp %0,%1"

74469

- [(set_attr "type" "fp")])

74470

-

74471

-(define_expand "negsf2"

74472

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74473

- (neg:SF (match_operand:SF 1 "gpc_reg_operand" "")))]

74474

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

74475

+(define_expand "neg<mode>2"

74476

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74477

+ (neg:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")))]

74478

+ "TARGET_<MODE>_INSN"

74479

"")

74480

74481

-(define_insn "*negsf2"

74482

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74483

- (neg:SF (match_operand:SF 1 "gpc_reg_operand" "f")))]

74484

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74485

- "fneg %0,%1"

74486

- [(set_attr "type" "fp")])

74487

+(define_insn "*neg<mode>2_fpr"

74488

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74489

+ (neg:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")))]

74490

+ "TARGET_<MODE>_FPR"

74491

+ "@

74492

+ fneg %0,%1

74493

+ xsnegdp %x0,%x1"

74494

+ [(set_attr "type" "fp")

74495

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

74496

74497

-(define_expand "abssf2"

74498

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74499

- (abs:SF (match_operand:SF 1 "gpc_reg_operand" "")))]

74500

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

74501

+(define_expand "add<mode>3"

74502

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74503

+ (plus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

74504

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

74505

+ "TARGET_<MODE>_INSN"

74506

"")

74507

74508

-(define_insn "*abssf2"

74509

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74510

- (abs:SF (match_operand:SF 1 "gpc_reg_operand" "f")))]

74511

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74512

- "fabs %0,%1"

74513

- [(set_attr "type" "fp")])

74514

+(define_insn "*add<mode>3_fpr"

74515

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74516

+ (plus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

74517

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

74518

+ "TARGET_<MODE>_FPR"

74519

+ "@

74520

+ fadd<Ftrad> %0,%1,%2

74521

+ xsadd<Fvsx> %x0,%x1,%x2"

74522

+ [(set_attr "type" "fp")

74523

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

74524

74525

-(define_insn ""

74526

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74527

- (neg:SF (abs:SF (match_operand:SF 1 "gpc_reg_operand" "f"))))]

74528

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74529

- "fnabs %0,%1"

74530

- [(set_attr "type" "fp")])

74531

-

74532

-(define_expand "addsf3"

74533

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74534

- (plus:SF (match_operand:SF 1 "gpc_reg_operand" "")

74535

- (match_operand:SF 2 "gpc_reg_operand" "")))]

74536

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

74537

+(define_expand "sub<mode>3"

74538

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74539

+ (minus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

74540

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

74541

+ "TARGET_<MODE>_INSN"

74542

"")

74543

74544

-(define_insn ""

74545

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74546

- (plus:SF (match_operand:SF 1 "gpc_reg_operand" "%f")

74547

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

74548

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74549

- "fadds %0,%1,%2"

74550

+(define_insn "*sub<mode>3_fpr"

74551

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74552

+ (minus:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

74553

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

74554

+ "TARGET_<MODE>_FPR"

74555

+ "@

74556

+ fsub<Ftrad> %0,%1,%2

74557

+ xssub<Fvsx> %x0,%x1,%x2"

74558

[(set_attr "type" "fp")

74559

- (set_attr "fp_type" "fp_addsub_s")])

74560

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

74561

74562

-(define_expand "subsf3"

74563

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74564

- (minus:SF (match_operand:SF 1 "gpc_reg_operand" "")

74565

- (match_operand:SF 2 "gpc_reg_operand" "")))]

74566

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

74567

+(define_expand "mul<mode>3"

74568

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74569

+ (mult:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

74570

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

74571

+ "TARGET_<MODE>_INSN"

74572

"")

74573

74574

-(define_insn ""

74575

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74576

- (minus:SF (match_operand:SF 1 "gpc_reg_operand" "f")

74577

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

74578

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74579

- "fsubs %0,%1,%2"

74580

- [(set_attr "type" "fp")

74581

- (set_attr "fp_type" "fp_addsub_s")])

74582

+(define_insn "*mul<mode>3_fpr"

74583

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74584

+ (mult:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

74585

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

74586

+ "TARGET_<MODE>_FPR"

74587

+ "@

74588

+ fmul<Ftrad> %0,%1,%2

74589

+ xsmul<Fvsx> %x0,%x1,%x2"

74590

+ [(set_attr "type" "dmul")

74591

+ (set_attr "fp_type" "fp_mul_<Fs>")])

74592

74593

-(define_expand "mulsf3"

74594

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74595

- (mult:SF (match_operand:SF 1 "gpc_reg_operand" "")

74596

- (match_operand:SF 2 "gpc_reg_operand" "")))]

74597

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT"

74598

+(define_expand "div<mode>3"

74599

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74600

+ (div:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "")

74601

+ (match_operand:SFDF 2 "gpc_reg_operand" "")))]

74602

+ "TARGET_<MODE>_INSN && !TARGET_SIMPLE_FPU"

74603

"")

74604

74605

-(define_insn ""

74606

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74607

- (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")

74608

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

74609

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74610

- "fmuls %0,%1,%2"

74611

- [(set_attr "type" "fp")

74612

- (set_attr "fp_type" "fp_mul_s")])

74613

+(define_insn "*div<mode>3_fpr"

74614

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74615

+ (div:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

74616

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

74617

+ "TARGET_<MODE>_FPR && !TARGET_SIMPLE_FPU"

74618

+ "@

74619

+ fdiv<Ftrad> %0,%1,%2

74620

+ xsdiv<Fvsx> %x0,%x1,%x2"

74621

+ [(set_attr "type" "<Fs>div")

74622

+ (set_attr "fp_type" "fp_div_<Fs>")])

74623

74624

-(define_expand "divsf3"

74625

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74626

- (div:SF (match_operand:SF 1 "gpc_reg_operand" "")

74627

- (match_operand:SF 2 "gpc_reg_operand" "")))]

74628

- "TARGET_HARD_FLOAT && TARGET_SINGLE_FLOAT && !TARGET_SIMPLE_FPU"

74629

- "")

74630

+(define_insn "sqrt<mode>2"

74631

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74632

+ (sqrt:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")))]

74633

+ "TARGET_<MODE>_FPR && !TARGET_SIMPLE_FPU

74634

+ && (TARGET_PPC_GPOPT || (<MODE>mode == SFmode && TARGET_XILINX_FPU))"

74635

+ "@

74636

+ fsqrt<Ftrad> %0,%1

74637

+ xssqrt<Fvsx> %x0,%x1"

74638

+ [(set_attr "type" "<Fs>sqrt")

74639

+ (set_attr "fp_type" "fp_sqrt_<Fs>")])

74640

74641

-(define_insn ""

74642

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74643

- (div:SF (match_operand:SF 1 "gpc_reg_operand" "f")

74644

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

74645

- "TARGET_HARD_FLOAT && TARGET_FPRS

74646

- && TARGET_SINGLE_FLOAT && !TARGET_SIMPLE_FPU"

74647

- "fdivs %0,%1,%2"

74648

- [(set_attr "type" "sdiv")])

74649

+;; Floating point reciprocal approximation

74650

+(define_insn "fre<Fs>"

74651

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74652

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

74653

+ UNSPEC_FRES))]

74654

+ "TARGET_<FFRE>"

74655

+ "@

74656

+ fre<Ftrad> %0,%1

74657

+ xsre<Fvsx> %x0,%x1"

74658

+ [(set_attr "type" "fp")])

74659

74660

-(define_insn "fres"

74661

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74662

- (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRES))]

74663

- "TARGET_FRES"

74664

- "fres %0,%1"

74665

+(define_insn "*rsqrt<mode>2"

74666

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74667

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

74668

+ UNSPEC_RSQRT))]

74669

+ "RS6000_RECIP_HAVE_RSQRTE_P (<MODE>mode)"

74670

+ "@

74671

+ frsqrte<Ftrad> %0,%1

74672

+ xsrsqrte<Fvsx> %x0,%x1"

74673

[(set_attr "type" "fp")])

74674

74675

-; builtin fmaf support

74676

-(define_insn "*fmasf4_fpr"

74677

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74678

- (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

74679

- (match_operand:SF 2 "gpc_reg_operand" "f")

74680

- (match_operand:SF 3 "gpc_reg_operand" "f")))]

74681

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74682

- "fmadds %0,%1,%2,%3"

74683

- [(set_attr "type" "fp")

74684

- (set_attr "fp_type" "fp_maddsub_s")])

74685

+;; Floating point comparisons

74686

+(define_insn "*cmp<mode>_fpr"

74687

+ [(set (match_operand:CCFP 0 "cc_reg_operand" "=y,y")

74688

+ (compare:CCFP (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

74689

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

74690

+ "TARGET_<MODE>_FPR"

74691

+ "@

74692

+ fcmpu %0,%1,%2

74693

+ xscmpudp %0,%x1,%x2"

74694

+ [(set_attr "type" "fpcompare")])

74695

74696

-(define_insn "*fmssf4_fpr"

74697

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74698

- (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

74699

- (match_operand:SF 2 "gpc_reg_operand" "f")

74700

- (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f"))))]

74701

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74702

- "fmsubs %0,%1,%2,%3"

74703

- [(set_attr "type" "fp")

74704

- (set_attr "fp_type" "fp_maddsub_s")])

74705

+;; Floating point conversions

74706

+(define_expand "extendsfdf2"

74707

+ [(set (match_operand:DF 0 "gpc_reg_operand" "")

74708

+ (float_extend:DF (match_operand:SF 1 "reg_or_none500mem_operand" "")))]

74709

+ "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74710

+ "")

74711

74712

-(define_insn "*nfmasf4_fpr"

74713

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74714

- (neg:SF (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

74715

- (match_operand:SF 2 "gpc_reg_operand" "f")

74716

- (match_operand:SF 3 "gpc_reg_operand" "f"))))]

74717

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74718

- "fnmadds %0,%1,%2,%3"

74719

- [(set_attr "type" "fp")

74720

- (set_attr "fp_type" "fp_maddsub_s")])

74721

+(define_insn_and_split "*extendsfdf2_fpr"

74722

+ [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d,d,ws,?ws,wv")

74723

+ (float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m,0,wy,Z")))]

74724

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

74725

+ "@

74726

+ #

74727

+ fmr %0,%1

74728

+ lfs%U1%X1 %0,%1

74729

+ #

74730

+ xxlor %x0,%x1,%x1

74731

+ lxsspx %x0,%y1"

74732

+ "&& reload_completed && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1])"

74733

+ [(const_int 0)]

74734

+{

74735

+ emit_note (NOTE_INSN_DELETED);

74736

+ DONE;

74737

+}

74738

+ [(set_attr_alternative "type"

74739

+ [(const_string "fp")

74740

+ (const_string "fp")

74741

+ (if_then_else

74742

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

74743

+ (const_string "fpload_ux")

74744

+ (if_then_else

74745

+ (match_test "update_address_mem (operands[1], VOIDmode)")

74746

+ (const_string "fpload_u")

74747

+ (const_string "fpload")))

74748

+ (const_string "fp")

74749

+ (const_string "vecsimple")

74750

+ (if_then_else

74751

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

74752

+ (const_string "fpload_ux")

74753

+ (if_then_else

74754

+ (match_test "update_address_mem (operands[1], VOIDmode)")

74755

+ (const_string "fpload_u")

74756

+ (const_string "fpload")))])])

74757

74758

-(define_insn "*nfmssf4_fpr"

74759

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74760

- (neg:SF (fma:SF (match_operand:SF 1 "gpc_reg_operand" "f")

74761

- (match_operand:SF 2 "gpc_reg_operand" "f")

74762

- (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f")))))]

74763

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

74764

- "fnmsubs %0,%1,%2,%3"

74765

- [(set_attr "type" "fp")

74766

- (set_attr "fp_type" "fp_maddsub_s")])

74767

-

74768

-(define_expand "sqrtsf2"

74769

+(define_expand "truncdfsf2"

74770

[(set (match_operand:SF 0 "gpc_reg_operand" "")

74771

- (sqrt:SF (match_operand:SF 1 "gpc_reg_operand" "")))]

74772

- "(TARGET_PPC_GPOPT || TARGET_XILINX_FPU)

74773

- && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT

74774

- && !TARGET_SIMPLE_FPU"

74775

+ (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "")))]

74776

+ "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74777

"")

74778

74779

-(define_insn ""

74780

+(define_insn "*truncdfsf2_fpr"

74781

[(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74782

- (sqrt:SF (match_operand:SF 1 "gpc_reg_operand" "f")))]

74783

- "(TARGET_PPC_GPOPT || TARGET_XILINX_FPU) && TARGET_HARD_FLOAT

74784

- && TARGET_FPRS && TARGET_SINGLE_FLOAT && !TARGET_SIMPLE_FPU"

74785

- "fsqrts %0,%1"

74786

- [(set_attr "type" "ssqrt")])

74787

-

74788

-(define_insn "*rsqrtsf_internal1"

74789

- [(set (match_operand:SF 0 "gpc_reg_operand" "=f")

74790

- (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")]

74791

- UNSPEC_RSQRT))]

74792

- "TARGET_FRSQRTES"

74793

- "frsqrtes %0,%1"

74794

+ (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "d")))]

74795

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

74796

+ "frsp %0,%1"

74797

[(set_attr "type" "fp")])

74798

74799

;; This expander is here to avoid FLOAT_WORDS_BIGENDIAN tests in

74800

@@ -4742,12 +5351,14 @@

74801

;; Use an unspec rather providing an if-then-else in RTL, to prevent the

74802

;; compiler from optimizing -0.0

74803

(define_insn "copysign<mode>3_fcpsgn"

74804

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

74805

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")

74806

- (match_operand:SFDF 2 "gpc_reg_operand" "<rreg2>")]

74807

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74808

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")

74809

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")]

74810

UNSPEC_COPYSIGN))]

74811

- "TARGET_CMPB && !VECTOR_UNIT_VSX_P (<MODE>mode)"

74812

- "fcpsgn %0,%2,%1"

74813

+ "TARGET_<MODE>_FPR && TARGET_CMPB"

74814

+ "@

74815

+ fcpsgn %0,%2,%1

74816

+ xscpsgn<Fvsx> %x0,%x2,%x1"

74817

[(set_attr "type" "fp")])

74818

74819

;; For MIN, MAX, and conditional move, we use DEFINE_EXPAND's that involve a

74820

@@ -4754,27 +5365,70 @@

74821

;; fsel instruction and some auxiliary computations. Then we just have a

74822

;; single DEFINE_INSN for fsel and the define_splits to make them if made by

74823

;; combine.

74824

-(define_expand "smaxsf3"

74825

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74826

- (if_then_else:SF (ge (match_operand:SF 1 "gpc_reg_operand" "")

74827

- (match_operand:SF 2 "gpc_reg_operand" ""))

74828

- (match_dup 1)

74829

- (match_dup 2)))]

74830

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS

74831

- && TARGET_SINGLE_FLOAT && !flag_trapping_math"

74832

- "{ rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]); DONE;}")

74833

+;; For MIN, MAX on non-VSX machines, and conditional move all of the time, we

74834

+;; use DEFINE_EXPAND's that involve a fsel instruction and some auxiliary

74835

+;; computations. Then we just have a single DEFINE_INSN for fsel and the

74836

+;; define_splits to make them if made by combine. On VSX machines we have the

74837

+;; min/max instructions.

74838

+;;

74839

+;; On VSX, we only check for TARGET_VSX instead of checking for a vsx/p8 vector

74840

+;; to allow either DF/SF to use only traditional registers.

74841

74842

-(define_expand "sminsf3"

74843

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

74844

- (if_then_else:SF (ge (match_operand:SF 1 "gpc_reg_operand" "")

74845

- (match_operand:SF 2 "gpc_reg_operand" ""))

74846

- (match_dup 2)

74847

- (match_dup 1)))]

74848

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS

74849

- && TARGET_SINGLE_FLOAT && !flag_trapping_math"

74850

- "{ rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]); DONE;}")

74851

+(define_expand "smax<mode>3"

74852

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74853

+ (if_then_else:SFDF (ge (match_operand:SFDF 1 "gpc_reg_operand" "")

74854

+ (match_operand:SFDF 2 "gpc_reg_operand" ""))

74855

+ (match_dup 1)

74856

+ (match_dup 2)))]

74857

+ "TARGET_<MODE>_FPR && TARGET_PPC_GFXOPT && !flag_trapping_math"

74858

+{

74859

+ rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]);

74860

+ DONE;

74861

+})

74862

74863

+(define_insn "*smax<mode>3_vsx"

74864

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74865

+ (smax:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

74866

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

74867

+ "TARGET_<MODE>_FPR && TARGET_VSX"

74868

+ "xsmaxdp %x0,%x1,%x2"

74869

+ [(set_attr "type" "fp")])

74870

+

74871

+(define_expand "smin<mode>3"

74872

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74873

+ (if_then_else:SFDF (ge (match_operand:SFDF 1 "gpc_reg_operand" "")

74874

+ (match_operand:SFDF 2 "gpc_reg_operand" ""))

74875

+ (match_dup 2)

74876

+ (match_dup 1)))]

74877

+ "TARGET_<MODE>_FPR && TARGET_PPC_GFXOPT && !flag_trapping_math"

74878

+{

74879

+ rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]);

74880

+ DONE;

74881

+})

74882

+

74883

+(define_insn "*smin<mode>3_vsx"

74884

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

74885

+ (smin:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>")

74886

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>")))]

74887

+ "TARGET_<MODE>_FPR && TARGET_VSX"

74888

+ "xsmindp %x0,%x1,%x2"

74889

+ [(set_attr "type" "fp")])

74890

+

74891

(define_split

74892

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

74893

+ (match_operator:SFDF 3 "min_max_operator"

74894

+ [(match_operand:SFDF 1 "gpc_reg_operand" "")

74895

+ (match_operand:SFDF 2 "gpc_reg_operand" "")]))]

74896

+ "TARGET_<MODE>_FPR && TARGET_PPC_GFXOPT && !flag_trapping_math

74897

+ && !TARGET_VSX"

74898

+ [(const_int 0)]

74899

+{

74900

+ rs6000_emit_minmax (operands[0], GET_CODE (operands[3]), operands[1],

74901

+ operands[2]);

74902

+ DONE;

74903

+})

74904

+

74905

+(define_split

74906

[(set (match_operand:SF 0 "gpc_reg_operand" "")

74907

(match_operator:SF 3 "min_max_operator"

74908

[(match_operand:SF 1 "gpc_reg_operand" "")

74909

@@ -4904,208 +5558,9 @@

74910

"fsel %0,%1,%2,%3"

74911

[(set_attr "type" "fp")])

74912

74913

-(define_expand "negdf2"

74914

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

74915

- (neg:DF (match_operand:DF 1 "gpc_reg_operand" "")))]

74916

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74917

- "")

74918

-

74919

-(define_insn "*negdf2_fpr"

74920

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

74921

- (neg:DF (match_operand:DF 1 "gpc_reg_operand" "d")))]

74922

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

74923

- && !VECTOR_UNIT_VSX_P (DFmode)"

74924

- "fneg %0,%1"

74925

- [(set_attr "type" "fp")])

74926

-

74927

-(define_expand "absdf2"

74928

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

74929

- (abs:DF (match_operand:DF 1 "gpc_reg_operand" "")))]

74930

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74931

- "")

74932

-

74933

-(define_insn "*absdf2_fpr"

74934

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

74935

- (abs:DF (match_operand:DF 1 "gpc_reg_operand" "d")))]

74936

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

74937

- && !VECTOR_UNIT_VSX_P (DFmode)"

74938

- "fabs %0,%1"

74939

- [(set_attr "type" "fp")])

74940

-

74941

-(define_insn "*nabsdf2_fpr"

74942

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

74943

- (neg:DF (abs:DF (match_operand:DF 1 "gpc_reg_operand" "d"))))]

74944

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

74945

- && !VECTOR_UNIT_VSX_P (DFmode)"

74946

- "fnabs %0,%1"

74947

- [(set_attr "type" "fp")])

74948

-

74949

-(define_expand "adddf3"

74950

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

74951

- (plus:DF (match_operand:DF 1 "gpc_reg_operand" "")

74952

- (match_operand:DF 2 "gpc_reg_operand" "")))]

74953

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74954

- "")

74955

-

74956

-(define_insn "*adddf3_fpr"

74957

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

74958

- (plus:DF (match_operand:DF 1 "gpc_reg_operand" "%d")

74959

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

74960

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

74961

- && !VECTOR_UNIT_VSX_P (DFmode)"

74962

- "fadd %0,%1,%2"

74963

- [(set_attr "type" "fp")

74964

- (set_attr "fp_type" "fp_addsub_d")])

74965

-

74966

-(define_expand "subdf3"

74967

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

74968

- (minus:DF (match_operand:DF 1 "gpc_reg_operand" "")

74969

- (match_operand:DF 2 "gpc_reg_operand" "")))]

74970

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74971

- "")

74972

-

74973

-(define_insn "*subdf3_fpr"

74974

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

74975

- (minus:DF (match_operand:DF 1 "gpc_reg_operand" "d")

74976

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

74977

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

74978

- && !VECTOR_UNIT_VSX_P (DFmode)"

74979

- "fsub %0,%1,%2"

74980

- [(set_attr "type" "fp")

74981

- (set_attr "fp_type" "fp_addsub_d")])

74982

-

74983

-(define_expand "muldf3"

74984

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

74985

- (mult:DF (match_operand:DF 1 "gpc_reg_operand" "")

74986

- (match_operand:DF 2 "gpc_reg_operand" "")))]

74987

- "TARGET_HARD_FLOAT && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)"

74988

- "")

74989

-

74990

-(define_insn "*muldf3_fpr"

74991

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

74992

- (mult:DF (match_operand:DF 1 "gpc_reg_operand" "%d")

74993

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

74994

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

74995

- && !VECTOR_UNIT_VSX_P (DFmode)"

74996

- "fmul %0,%1,%2"

74997

- [(set_attr "type" "dmul")

74998

- (set_attr "fp_type" "fp_mul_d")])

74999

-

75000

-(define_expand "divdf3"

75001

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

75002

- (div:DF (match_operand:DF 1 "gpc_reg_operand" "")

75003

- (match_operand:DF 2 "gpc_reg_operand" "")))]

75004

- "TARGET_HARD_FLOAT

75005

- && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)

75006

- && !TARGET_SIMPLE_FPU"

75007

- "")

75008

-

75009

-(define_insn "*divdf3_fpr"

75010

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

75011

- (div:DF (match_operand:DF 1 "gpc_reg_operand" "d")

75012

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

75013

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && !TARGET_SIMPLE_FPU

75014

- && !VECTOR_UNIT_VSX_P (DFmode)"

75015

- "fdiv %0,%1,%2"

75016

- [(set_attr "type" "ddiv")])

75017

-

75018

-(define_insn "*fred_fpr"

75019

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

75020

- (unspec:DF [(match_operand:DF 1 "gpc_reg_operand" "f")] UNSPEC_FRES))]

75021

- "TARGET_FRE && !VECTOR_UNIT_VSX_P (DFmode)"

75022

- "fre %0,%1"

75023

- [(set_attr "type" "fp")])

75024

-

75025

-(define_insn "*rsqrtdf_internal1"

75026

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

75027

- (unspec:DF [(match_operand:DF 1 "gpc_reg_operand" "d")]

75028

- UNSPEC_RSQRT))]

75029

- "TARGET_FRSQRTE && !VECTOR_UNIT_VSX_P (DFmode)"

75030

- "frsqrte %0,%1"

75031

- [(set_attr "type" "fp")])

75032

-

75033

-; builtin fma support

75034

-(define_insn "*fmadf4_fpr"

75035

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

75036

- (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

75037

- (match_operand:DF 2 "gpc_reg_operand" "f")

75038

- (match_operand:DF 3 "gpc_reg_operand" "f")))]

75039

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

75040

- && VECTOR_UNIT_NONE_P (DFmode)"

75041

- "fmadd %0,%1,%2,%3"

75042

- [(set_attr "type" "fp")

75043

- (set_attr "fp_type" "fp_maddsub_d")])

75044

-

75045

-(define_insn "*fmsdf4_fpr"

75046

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

75047

- (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

75048

- (match_operand:DF 2 "gpc_reg_operand" "f")

75049

- (neg:DF (match_operand:DF 3 "gpc_reg_operand" "f"))))]

75050

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

75051

- && VECTOR_UNIT_NONE_P (DFmode)"

75052

- "fmsub %0,%1,%2,%3"

75053

- [(set_attr "type" "fp")

75054

- (set_attr "fp_type" "fp_maddsub_d")])

75055

-

75056

-(define_insn "*nfmadf4_fpr"

75057

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

75058

- (neg:DF (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

75059

- (match_operand:DF 2 "gpc_reg_operand" "f")

75060

- (match_operand:DF 3 "gpc_reg_operand" "f"))))]

75061

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

75062

- && VECTOR_UNIT_NONE_P (DFmode)"

75063

- "fnmadd %0,%1,%2,%3"

75064

- [(set_attr "type" "fp")

75065

- (set_attr "fp_type" "fp_maddsub_d")])

75066

-

75067

-(define_insn "*nfmsdf4_fpr"

75068

- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")

75069

- (neg:DF (fma:DF (match_operand:DF 1 "gpc_reg_operand" "f")

75070

- (match_operand:DF 2 "gpc_reg_operand" "f")

75071

- (neg:DF (match_operand:DF 3 "gpc_reg_operand" "f")))))]

75072

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

75073

- && VECTOR_UNIT_NONE_P (DFmode)"

75074

- "fnmsub %0,%1,%2,%3"

75075

- [(set_attr "type" "fp")

75076

- (set_attr "fp_type" "fp_maddsub_d")])

75077

-

75078

-(define_expand "sqrtdf2"

75079

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

75080

- (sqrt:DF (match_operand:DF 1 "gpc_reg_operand" "")))]

75081

- "TARGET_PPC_GPOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"

75082

- "")

75083

-

75084

-(define_insn "*sqrtdf2_fpr"

75085

- [(set (match_operand:DF 0 "gpc_reg_operand" "=d")

75086

- (sqrt:DF (match_operand:DF 1 "gpc_reg_operand" "d")))]

75087

- "TARGET_PPC_GPOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

75088

- && !VECTOR_UNIT_VSX_P (DFmode)"

75089

- "fsqrt %0,%1"

75090

- [(set_attr "type" "dsqrt")])

75091

-

75092

;; The conditional move instructions allow us to perform max and min

75093

;; operations even when

75094

75095

-(define_expand "smaxdf3"

75096

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

75097

- (if_then_else:DF (ge (match_operand:DF 1 "gpc_reg_operand" "")

75098

- (match_operand:DF 2 "gpc_reg_operand" ""))

75099

- (match_dup 1)

75100

- (match_dup 2)))]

75101

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

75102

- && !flag_trapping_math"

75103

- "{ rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]); DONE;}")

75104

-

75105

-(define_expand "smindf3"

75106

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

75107

- (if_then_else:DF (ge (match_operand:DF 1 "gpc_reg_operand" "")

75108

- (match_operand:DF 2 "gpc_reg_operand" ""))

75109

- (match_dup 2)

75110

- (match_dup 1)))]

75111

- "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

75112

- && !flag_trapping_math"

75113

- "{ rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]); DONE;}")

75114

-

75115

(define_split

75116

[(set (match_operand:DF 0 "gpc_reg_operand" "")

75117

(match_operator:DF 3 "min_max_operator"

75118

@@ -5159,12 +5614,15 @@

75119

; We don't define lfiwax/lfiwzx with the normal definition, because we

75120

; don't want to support putting SImode in FPR registers.

75121

(define_insn "lfiwax"

75122

- [(set (match_operand:DI 0 "gpc_reg_operand" "=d")

75123

- (unspec:DI [(match_operand:SI 1 "indexed_or_indirect_operand" "Z")]

75124

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=d,wm,!wm")

75125

+ (unspec:DI [(match_operand:SI 1 "reg_or_indexed_operand" "Z,Z,r")]

75126

UNSPEC_LFIWAX))]

75127

"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LFIWAX"

75128

- "lfiwax %0,%y1"

75129

- [(set_attr "type" "fpload")])

75130

+ "@

75131

+ lfiwax %0,%y1

75132

+ lxsiwax %x0,%y1

75133

+ mtvsrwa %x0,%1"

75134

+ [(set_attr "type" "fpload,fpload,mffgpr")])

75135

75136

; This split must be run before register allocation because it allocates the

75137

; memory slot that is needed to move values to/from the FPR. We don't allocate

75138

@@ -5186,7 +5644,8 @@

75139

rtx src = operands[1];

75140

rtx tmp;

75141

75142

- if (!MEM_P (src) && TARGET_MFPGPR && TARGET_POWERPC64)

75143

+ if (!MEM_P (src) && TARGET_POWERPC64

75144

+ && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

75145

tmp = convert_to_mode (DImode, src, false);

75146

else

75147

{

75148

@@ -5235,12 +5694,15 @@

75149

(set_attr "type" "fpload")])

75150

75151

(define_insn "lfiwzx"

75152

- [(set (match_operand:DI 0 "gpc_reg_operand" "=d")

75153

- (unspec:DI [(match_operand:SI 1 "indexed_or_indirect_operand" "Z")]

75154

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=d,wm,!wm")

75155

+ (unspec:DI [(match_operand:SI 1 "reg_or_indexed_operand" "Z,Z,r")]

75156

UNSPEC_LFIWZX))]

75157

"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LFIWZX"

75158

- "lfiwzx %0,%y1"

75159

- [(set_attr "type" "fpload")])

75160

+ "@

75161

+ lfiwzx %0,%y1

75162

+ lxsiwzx %x0,%y1

75163

+ mtvsrwz %x0,%1"

75164

+ [(set_attr "type" "fpload,fpload,mftgpr")])

75165

75166

(define_insn_and_split "floatunssi<mode>2_lfiwzx"

75167

[(set (match_operand:SFDF 0 "gpc_reg_operand" "=d")

75168

@@ -5257,7 +5719,8 @@

75169

rtx src = operands[1];

75170

rtx tmp;

75171

75172

- if (!MEM_P (src) && TARGET_MFPGPR && TARGET_POWERPC64)

75173

+ if (!MEM_P (src) && TARGET_POWERPC64

75174

+ && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

75175

tmp = convert_to_mode (DImode, src, true);

75176

else

75177

{

75178

@@ -5548,7 +6011,7 @@

75179

emit_insn (gen_stfiwx (dest, tmp));

75180

DONE;

75181

}

75182

- else if (TARGET_MFPGPR && TARGET_POWERPC64)

75183

+ else if (TARGET_POWERPC64 && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

75184

{

75185

dest = gen_lowpart (DImode, dest);

75186

emit_move_insn (dest, tmp);

75187

@@ -5642,7 +6105,7 @@

75188

emit_insn (gen_stfiwx (dest, tmp));

75189

DONE;

75190

}

75191

- else if (TARGET_MFPGPR && TARGET_POWERPC64)

75192

+ else if (TARGET_POWERPC64 && (TARGET_MFPGPR || TARGET_DIRECT_MOVE))

75193

{

75194

dest = gen_lowpart (DImode, dest);

75195

emit_move_insn (dest, tmp);

75196

@@ -5781,66 +6244,52 @@

75197

[(set (match_operand:DI 0 "gpc_reg_operand" "=d")

75198

(unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

75199

UNSPEC_FCTID))]

75200

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

75201

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

75202

"fctid %0,%1"

75203

[(set_attr "type" "fp")])

75204

75205

-(define_expand "btrunc<mode>2"

75206

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

75207

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "")]

75208

+(define_insn "btrunc<mode>2"

75209

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

75210

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

75211

UNSPEC_FRIZ))]

75212

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

75213

- "")

75214

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

75215

+ "@

75216

+ friz %0,%1

75217

+ xsrdpiz %x0,%x1"

75218

+ [(set_attr "type" "fp")

75219

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

75220

75221

-(define_insn "*btrunc<mode>2_fpr"

75222

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

75223

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

75224

- UNSPEC_FRIZ))]

75225

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>

75226

- && !VECTOR_UNIT_VSX_P (<MODE>mode)"

75227

- "friz %0,%1"

75228

- [(set_attr "type" "fp")])

75229

-

75230

-(define_expand "ceil<mode>2"

75231

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

75232

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "")]

75233

+(define_insn "ceil<mode>2"

75234

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

75235

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

75236

UNSPEC_FRIP))]

75237

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

75238

- "")

75239

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

75240

+ "@

75241

+ frip %0,%1

75242

+ xsrdpip %x0,%x1"

75243

+ [(set_attr "type" "fp")

75244

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

75245

75246

-(define_insn "*ceil<mode>2_fpr"

75247

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

75248

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

75249

- UNSPEC_FRIP))]

75250

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>

75251

- && !VECTOR_UNIT_VSX_P (<MODE>mode)"

75252

- "frip %0,%1"

75253

- [(set_attr "type" "fp")])

75254

-

75255

-(define_expand "floor<mode>2"

75256

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "")

75257

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "")]

75258

+(define_insn "floor<mode>2"

75259

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>")

75260

+ (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>")]

75261

UNSPEC_FRIM))]

75262

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

75263

- "")

75264

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

75265

+ "@

75266

+ frim %0,%1

75267

+ xsrdpim %x0,%x1"

75268

+ [(set_attr "type" "fp")

75269

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

75270

75271

-(define_insn "*floor<mode>2_fpr"

75272

- [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

75273

- (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

75274

- UNSPEC_FRIM))]

75275

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>

75276

- && !VECTOR_UNIT_VSX_P (<MODE>mode)"

75277

- "frim %0,%1"

75278

- [(set_attr "type" "fp")])

75279

-

75280

;; No VSX equivalent to frin

75281

(define_insn "round<mode>2"

75282

[(set (match_operand:SFDF 0 "gpc_reg_operand" "=<rreg2>")

75283

(unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]

75284

UNSPEC_FRIN))]

75285

- "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS && <TARGET_FLOAT>"

75286

+ "TARGET_<MODE>_FPR && TARGET_FPRND"

75287

"frin %0,%1"

75288

- [(set_attr "type" "fp")])

75289

+ [(set_attr "type" "fp")

75290

+ (set_attr "fp_type" "fp_addsub_<Fs>")])

75291

75292

; An UNSPEC is used so we don't have to support SImode in FP registers.

75293

(define_insn "stfiwx"

75294

@@ -6084,6 +6533,49 @@

75295

[(set_attr "length" "8")

75296

(set_attr "type" "fpload")])

75297

75298

+;; Define the TImode operations that can be done in a small number

75299

+;; of instructions. The & constraints are to prevent the register

75300

+;; allocator from allocating registers that overlap with the inputs

75301

+;; (for example, having an input in 7,8 and an output in 6,7). We

75302

+;; also allow for the output being the same as one of the inputs.

75303

+

75304

+(define_insn "addti3"

75305

+ [(set (match_operand:TI 0 "gpc_reg_operand" "=&r,&r,r,r")

75306

+ (plus:TI (match_operand:TI 1 "gpc_reg_operand" "%r,r,0,0")

75307

+ (match_operand:TI 2 "reg_or_short_operand" "r,I,r,I")))]

75308

+ "TARGET_64BIT"

75309

+{

75310

+ if (WORDS_BIG_ENDIAN)

75311

+ return (GET_CODE (operands[2])) != CONST_INT

75312

+ ? \"addc %L0,%L1,%L2\;adde %0,%1,%2\"

75313

+ : \"addic %L0,%L1,%2\;add%G2e %0,%1\";

75314

+ else

75315

+ return (GET_CODE (operands[2])) != CONST_INT

75316

+ ? \"addc %0,%1,%2\;adde %L0,%L1,%L2\"

75317

+ : \"addic %0,%1,%2\;add%G2e %L0,%L1\";

75318

+}

75319

+ [(set_attr "type" "two")

75320

+ (set_attr "length" "8")])

75321

+

75322

+(define_insn "subti3"

75323

+ [(set (match_operand:TI 0 "gpc_reg_operand" "=&r,&r,r,r,r")

75324

+ (minus:TI (match_operand:TI 1 "reg_or_short_operand" "r,I,0,r,I")

75325

+ (match_operand:TI 2 "gpc_reg_operand" "r,r,r,0,0")))]

75326

+ "TARGET_64BIT"

75327

+{

75328

+ if (WORDS_BIG_ENDIAN)

75329

+ return (GET_CODE (operands[1]) != CONST_INT)

75330

+ ? \"subfc %L0,%L2,%L1\;subfe %0,%2,%1\"

75331

+ : \"subfic %L0,%L2,%1\;subf%G1e %0,%2\";

75332

+ else

75333

+ return (GET_CODE (operands[1]) != CONST_INT)

75334

+ ? \"subfc %0,%2,%1\;subfe %L0,%L2,%L1\"

75335

+ : \"subfic %0,%2,%1\;subf%G1e %L0,%L2\";

75336

+}

75337

+ [(set_attr "type" "two")

75338

+ (set_attr "length" "8")])

75339

+

75340

+

75341

;; Define the DImode operations that can be done in a small number

75342

;; of instructions. The & constraints are to prevent the register

75343

;; allocator from allocating registers that overlap with the inputs

75344

@@ -6260,11 +6752,11 @@

75345

[(set_attr "type" "two,three")

75346

(set_attr "length" "8,12")])

75347

75348

-(define_insn "*ashrdisi3_noppc64"

75349

+(define_insn "*ashrdisi3_noppc64be"

75350

[(set (match_operand:SI 0 "gpc_reg_operand" "=r")

75351

(subreg:SI (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "r")

75352

(const_int 32)) 4))]

75353

- "TARGET_32BIT && !TARGET_POWERPC64"

75354

+ "TARGET_32BIT && !TARGET_POWERPC64 && WORDS_BIG_ENDIAN"

75355

"*

75356

{

75357

if (REGNO (operands[0]) == REGNO (operands[1]))

75358

@@ -6551,19 +7043,31 @@

75359

(const_int 0)))]

75360

"")

75361

75362

-(define_insn "*rotldi3_internal7"

75363

+(define_insn "*rotldi3_internal7le"

75364

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

75365

(zero_extend:DI

75366

(subreg:QI

75367

(rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

75368

(match_operand:DI 2 "reg_or_cint_operand" "r,i")) 0)))]

75369

- "TARGET_POWERPC64"

75370

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN"

75371

"@

75372

rldcl %0,%1,%2,56

75373

rldicl %0,%1,%H2,56"

75374

[(set_attr "type" "var_shift_rotate,integer")])

75375

75376

-(define_insn "*rotldi3_internal8"

75377

+(define_insn "*rotldi3_internal7be"

75378

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

75379

+ (zero_extend:DI

75380

+ (subreg:QI

75381

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

75382

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i")) 7)))]

75383

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN"

75384

+ "@

75385

+ rldcl %0,%1,%2,56

75386

+ rldicl %0,%1,%H2,56"

75387

+ [(set_attr "type" "var_shift_rotate,integer")])

75388

+

75389

+(define_insn "*rotldi3_internal8le"

75390

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

75391

(compare:CC (zero_extend:DI

75392

(subreg:QI

75393

@@ -6571,7 +7075,7 @@

75394

(match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

75395

(const_int 0)))

75396

(clobber (match_scratch:DI 3 "=r,r,r,r"))]

75397

- "TARGET_64BIT"

75398

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

75399

"@

75400

rldcl. %3,%1,%2,56

75401

rldicl. %3,%1,%H2,56

75402

@@ -6580,6 +7084,23 @@

75403

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75404

(set_attr "length" "4,4,8,8")])

75405

75406

+(define_insn "*rotldi3_internal8be"

75407

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

75408

+ (compare:CC (zero_extend:DI

75409

+ (subreg:QI

75410

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

75411

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 7))

75412

+ (const_int 0)))

75413

+ (clobber (match_scratch:DI 3 "=r,r,r,r"))]

75414

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

75415

+ "@

75416

+ rldcl. %3,%1,%2,56

75417

+ rldicl. %3,%1,%H2,56

75418

+ #

75419

+ #"

75420

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75421

+ (set_attr "length" "4,4,8,8")])

75422

+

75423

(define_split

75424

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

75425

(compare:CC (zero_extend:DI

75426

@@ -6588,7 +7109,7 @@

75427

(match_operand:DI 2 "reg_or_cint_operand" "")) 0))

75428

(const_int 0)))

75429

(clobber (match_scratch:DI 3 ""))]

75430

- "TARGET_POWERPC64 && reload_completed"

75431

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

75432

[(set (match_dup 3)

75433

(zero_extend:DI (subreg:QI

75434

(rotate:DI (match_dup 1)

75435

@@ -6598,7 +7119,25 @@

75436

(const_int 0)))]

75437

"")

75438

75439

-(define_insn "*rotldi3_internal9"

75440

+(define_split

75441

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

75442

+ (compare:CC (zero_extend:DI

75443

+ (subreg:QI

75444

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

75445

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 7))

75446

+ (const_int 0)))

75447

+ (clobber (match_scratch:DI 3 ""))]

75448

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

75449

+ [(set (match_dup 3)

75450

+ (zero_extend:DI (subreg:QI

75451

+ (rotate:DI (match_dup 1)

75452

+ (match_dup 2)) 7)))

75453

+ (set (match_dup 0)

75454

+ (compare:CC (match_dup 3)

75455

+ (const_int 0)))]

75456

+ "")

75457

+

75458

+(define_insn "*rotldi3_internal9le"

75459

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

75460

(compare:CC (zero_extend:DI

75461

(subreg:QI

75462

@@ -6607,7 +7146,7 @@

75463

(const_int 0)))

75464

(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

75465

(zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

75466

- "TARGET_64BIT"

75467

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

75468

"@

75469

rldcl. %0,%1,%2,56

75470

rldicl. %0,%1,%H2,56

75471

@@ -6616,6 +7155,24 @@

75472

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75473

(set_attr "length" "4,4,8,8")])

75474

75475

+(define_insn "*rotldi3_internal9be"

75476

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

75477

+ (compare:CC (zero_extend:DI

75478

+ (subreg:QI

75479

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

75480

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 7))

75481

+ (const_int 0)))

75482

+ (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

75483

+ (zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 7)))]

75484

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

75485

+ "@

75486

+ rldcl. %0,%1,%2,56

75487

+ rldicl. %0,%1,%H2,56

75488

+ #

75489

+ #"

75490

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75491

+ (set_attr "length" "4,4,8,8")])

75492

+

75493

(define_split

75494

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

75495

(compare:CC (zero_extend:DI

75496

@@ -6625,7 +7182,7 @@

75497

(const_int 0)))

75498

(set (match_operand:DI 0 "gpc_reg_operand" "")

75499

(zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

75500

- "TARGET_POWERPC64 && reload_completed"

75501

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

75502

[(set (match_dup 0)

75503

(zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 0)))

75504

(set (match_dup 3)

75505

@@ -6633,19 +7190,48 @@

75506

(const_int 0)))]

75507

"")

75508

75509

-(define_insn "*rotldi3_internal10"

75510

+(define_split

75511

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

75512

+ (compare:CC (zero_extend:DI

75513

+ (subreg:QI

75514

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

75515

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 7))

75516

+ (const_int 0)))

75517

+ (set (match_operand:DI 0 "gpc_reg_operand" "")

75518

+ (zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 7)))]

75519

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

75520

+ [(set (match_dup 0)

75521

+ (zero_extend:DI (subreg:QI (rotate:DI (match_dup 1) (match_dup 2)) 7)))

75522

+ (set (match_dup 3)

75523

+ (compare:CC (match_dup 0)

75524

+ (const_int 0)))]

75525

+ "")

75526

+

75527

+(define_insn "*rotldi3_internal10le"

75528

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

75529

(zero_extend:DI

75530

(subreg:HI

75531

(rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

75532

(match_operand:DI 2 "reg_or_cint_operand" "r,i")) 0)))]

75533

- "TARGET_POWERPC64"

75534

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN"

75535

"@

75536

rldcl %0,%1,%2,48

75537

rldicl %0,%1,%H2,48"

75538

[(set_attr "type" "var_shift_rotate,integer")])

75539

75540

-(define_insn "*rotldi3_internal11"

75541

+(define_insn "*rotldi3_internal10be"

75542

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

75543

+ (zero_extend:DI

75544

+ (subreg:HI

75545

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

75546

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i")) 6)))]

75547

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN"

75548

+ "@

75549

+ rldcl %0,%1,%2,48

75550

+ rldicl %0,%1,%H2,48"

75551

+ [(set_attr "type" "var_shift_rotate,integer")])

75552

+

75553

+(define_insn "*rotldi3_internal11le"

75554

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

75555

(compare:CC (zero_extend:DI

75556

(subreg:HI

75557

@@ -6653,7 +7239,7 @@

75558

(match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

75559

(const_int 0)))

75560

(clobber (match_scratch:DI 3 "=r,r,r,r"))]

75561

- "TARGET_64BIT"

75562

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

75563

"@

75564

rldcl. %3,%1,%2,48

75565

rldicl. %3,%1,%H2,48

75566

@@ -6662,6 +7248,23 @@

75567

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75568

(set_attr "length" "4,4,8,8")])

75569

75570

+(define_insn "*rotldi3_internal11be"

75571

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

75572

+ (compare:CC (zero_extend:DI

75573

+ (subreg:HI

75574

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

75575

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 6))

75576

+ (const_int 0)))

75577

+ (clobber (match_scratch:DI 3 "=r,r,r,r"))]

75578

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

75579

+ "@

75580

+ rldcl. %3,%1,%2,48

75581

+ rldicl. %3,%1,%H2,48

75582

+ #

75583

+ #"

75584

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75585

+ (set_attr "length" "4,4,8,8")])

75586

+

75587

(define_split

75588

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

75589

(compare:CC (zero_extend:DI

75590

@@ -6670,7 +7273,7 @@

75591

(match_operand:DI 2 "reg_or_cint_operand" "")) 0))

75592

(const_int 0)))

75593

(clobber (match_scratch:DI 3 ""))]

75594

- "TARGET_POWERPC64 && reload_completed"

75595

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

75596

[(set (match_dup 3)

75597

(zero_extend:DI (subreg:HI

75598

(rotate:DI (match_dup 1)

75599

@@ -6680,7 +7283,25 @@

75600

(const_int 0)))]

75601

"")

75602

75603

-(define_insn "*rotldi3_internal12"

75604

+(define_split

75605

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

75606

+ (compare:CC (zero_extend:DI

75607

+ (subreg:HI

75608

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

75609

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 6))

75610

+ (const_int 0)))

75611

+ (clobber (match_scratch:DI 3 ""))]

75612

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

75613

+ [(set (match_dup 3)

75614

+ (zero_extend:DI (subreg:HI

75615

+ (rotate:DI (match_dup 1)

75616

+ (match_dup 2)) 6)))

75617

+ (set (match_dup 0)

75618

+ (compare:CC (match_dup 3)

75619

+ (const_int 0)))]

75620

+ "")

75621

+

75622

+(define_insn "*rotldi3_internal12le"

75623

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

75624

(compare:CC (zero_extend:DI

75625

(subreg:HI

75626

@@ -6689,7 +7310,7 @@

75627

(const_int 0)))

75628

(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

75629

(zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

75630

- "TARGET_64BIT"

75631

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

75632

"@

75633

rldcl. %0,%1,%2,48

75634

rldicl. %0,%1,%H2,48

75635

@@ -6698,6 +7319,24 @@

75636

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75637

(set_attr "length" "4,4,8,8")])

75638

75639

+(define_insn "*rotldi3_internal12be"

75640

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

75641

+ (compare:CC (zero_extend:DI

75642

+ (subreg:HI

75643

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

75644

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 6))

75645

+ (const_int 0)))

75646

+ (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

75647

+ (zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 6)))]

75648

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

75649

+ "@

75650

+ rldcl. %0,%1,%2,48

75651

+ rldicl. %0,%1,%H2,48

75652

+ #

75653

+ #"

75654

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75655

+ (set_attr "length" "4,4,8,8")])

75656

+

75657

(define_split

75658

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

75659

(compare:CC (zero_extend:DI

75660

@@ -6707,7 +7346,7 @@

75661

(const_int 0)))

75662

(set (match_operand:DI 0 "gpc_reg_operand" "")

75663

(zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

75664

- "TARGET_POWERPC64 && reload_completed"

75665

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

75666

[(set (match_dup 0)

75667

(zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 0)))

75668

(set (match_dup 3)

75669

@@ -6715,19 +7354,48 @@

75670

(const_int 0)))]

75671

"")

75672

75673

-(define_insn "*rotldi3_internal13"

75674

+(define_split

75675

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

75676

+ (compare:CC (zero_extend:DI

75677

+ (subreg:HI

75678

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

75679

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 6))

75680

+ (const_int 0)))

75681

+ (set (match_operand:DI 0 "gpc_reg_operand" "")

75682

+ (zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 6)))]

75683

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

75684

+ [(set (match_dup 0)

75685

+ (zero_extend:DI (subreg:HI (rotate:DI (match_dup 1) (match_dup 2)) 6)))

75686

+ (set (match_dup 3)

75687

+ (compare:CC (match_dup 0)

75688

+ (const_int 0)))]

75689

+ "")

75690

+

75691

+(define_insn "*rotldi3_internal13le"

75692

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

75693

(zero_extend:DI

75694

(subreg:SI

75695

(rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

75696

(match_operand:DI 2 "reg_or_cint_operand" "r,i")) 0)))]

75697

- "TARGET_POWERPC64"

75698

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN"

75699

"@

75700

rldcl %0,%1,%2,32

75701

rldicl %0,%1,%H2,32"

75702

[(set_attr "type" "var_shift_rotate,integer")])

75703

75704

-(define_insn "*rotldi3_internal14"

75705

+(define_insn "*rotldi3_internal13be"

75706

+ [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")

75707

+ (zero_extend:DI

75708

+ (subreg:SI

75709

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")

75710

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i")) 4)))]

75711

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN"

75712

+ "@

75713

+ rldcl %0,%1,%2,32

75714

+ rldicl %0,%1,%H2,32"

75715

+ [(set_attr "type" "var_shift_rotate,integer")])

75716

+

75717

+(define_insn "*rotldi3_internal14le"

75718

[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

75719

(compare:CC (zero_extend:DI

75720

(subreg:SI

75721

@@ -6735,7 +7403,7 @@

75722

(match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 0))

75723

(const_int 0)))

75724

(clobber (match_scratch:DI 3 "=r,r,r,r"))]

75725

- "TARGET_64BIT"

75726

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

75727

"@

75728

rldcl. %3,%1,%2,32

75729

rldicl. %3,%1,%H2,32

75730

@@ -6744,6 +7412,23 @@

75731

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75732

(set_attr "length" "4,4,8,8")])

75733

75734

+(define_insn "*rotldi3_internal14be"

75735

+ [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")

75736

+ (compare:CC (zero_extend:DI

75737

+ (subreg:SI

75738

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

75739

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 4))

75740

+ (const_int 0)))

75741

+ (clobber (match_scratch:DI 3 "=r,r,r,r"))]

75742

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

75743

+ "@

75744

+ rldcl. %3,%1,%2,32

75745

+ rldicl. %3,%1,%H2,32

75746

+ #

75747

+ #"

75748

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75749

+ (set_attr "length" "4,4,8,8")])

75750

+

75751

(define_split

75752

[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

75753

(compare:CC (zero_extend:DI

75754

@@ -6752,7 +7437,7 @@

75755

(match_operand:DI 2 "reg_or_cint_operand" "")) 0))

75756

(const_int 0)))

75757

(clobber (match_scratch:DI 3 ""))]

75758

- "TARGET_POWERPC64 && reload_completed"

75759

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

75760

[(set (match_dup 3)

75761

(zero_extend:DI (subreg:SI

75762

(rotate:DI (match_dup 1)

75763

@@ -6762,7 +7447,25 @@

75764

(const_int 0)))]

75765

"")

75766

75767

-(define_insn "*rotldi3_internal15"

75768

+(define_split

75769

+ [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")

75770

+ (compare:CC (zero_extend:DI

75771

+ (subreg:SI

75772

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

75773

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 4))

75774

+ (const_int 0)))

75775

+ (clobber (match_scratch:DI 3 ""))]

75776

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

75777

+ [(set (match_dup 3)

75778

+ (zero_extend:DI (subreg:SI

75779

+ (rotate:DI (match_dup 1)

75780

+ (match_dup 2)) 4)))

75781

+ (set (match_dup 0)

75782

+ (compare:CC (match_dup 3)

75783

+ (const_int 0)))]

75784

+ "")

75785

+

75786

+(define_insn "*rotldi3_internal15le"

75787

[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

75788

(compare:CC (zero_extend:DI

75789

(subreg:SI

75790

@@ -6771,7 +7474,7 @@

75791

(const_int 0)))

75792

(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

75793

(zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

75794

- "TARGET_64BIT"

75795

+ "TARGET_64BIT && !BYTES_BIG_ENDIAN"

75796

"@

75797

rldcl. %0,%1,%2,32

75798

rldicl. %0,%1,%H2,32

75799

@@ -6780,6 +7483,24 @@

75800

[(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75801

(set_attr "length" "4,4,8,8")])

75802

75803

+(define_insn "*rotldi3_internal15be"

75804

+ [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,?y,?y")

75805

+ (compare:CC (zero_extend:DI

75806

+ (subreg:SI

75807

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r,r,r")

75808

+ (match_operand:DI 2 "reg_or_cint_operand" "r,i,r,i")) 4))

75809

+ (const_int 0)))

75810

+ (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")

75811

+ (zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 4)))]

75812

+ "TARGET_64BIT && BYTES_BIG_ENDIAN"

75813

+ "@

75814

+ rldcl. %0,%1,%2,32

75815

+ rldicl. %0,%1,%H2,32

75816

+ #

75817

+ #"

75818

+ [(set_attr "type" "var_delayed_compare,delayed_compare,var_delayed_compare,delayed_compare")

75819

+ (set_attr "length" "4,4,8,8")])

75820

+

75821

(define_split

75822

[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

75823

(compare:CC (zero_extend:DI

75824

@@ -6789,7 +7510,7 @@

75825

(const_int 0)))

75826

(set (match_operand:DI 0 "gpc_reg_operand" "")

75827

(zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 0)))]

75828

- "TARGET_POWERPC64 && reload_completed"

75829

+ "TARGET_POWERPC64 && !BYTES_BIG_ENDIAN && reload_completed"

75830

[(set (match_dup 0)

75831

(zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 0)))

75832

(set (match_dup 3)

75833

@@ -6797,6 +7518,23 @@

75834

(const_int 0)))]

75835

"")

75836

75837

+(define_split

75838

+ [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")

75839

+ (compare:CC (zero_extend:DI

75840

+ (subreg:SI

75841

+ (rotate:DI (match_operand:DI 1 "gpc_reg_operand" "")

75842

+ (match_operand:DI 2 "reg_or_cint_operand" "")) 4))

75843

+ (const_int 0)))

75844

+ (set (match_operand:DI 0 "gpc_reg_operand" "")

75845

+ (zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 4)))]

75846

+ "TARGET_POWERPC64 && BYTES_BIG_ENDIAN && reload_completed"

75847

+ [(set (match_dup 0)

75848

+ (zero_extend:DI (subreg:SI (rotate:DI (match_dup 1) (match_dup 2)) 4)))

75849

+ (set (match_dup 3)

75850

+ (compare:CC (match_dup 0)

75851

+ (const_int 0)))]

75852

+ "")

75853

+

75854

(define_expand "ashldi3"

75855

[(set (match_operand:DI 0 "gpc_reg_operand" "")

75856

(ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")

75857

@@ -7195,10 +7933,19 @@

75858

[(parallel

75859

[(set (match_operand:DI 0 "gpc_reg_operand" "")

75860

(and:DI (match_operand:DI 1 "gpc_reg_operand" "")

75861

- (match_operand:DI 2 "and64_2_operand" "")))

75862

+ (match_operand:DI 2 "reg_or_cint_operand" "")))

75863

(clobber (match_scratch:CC 3 ""))])]

75864

- "TARGET_POWERPC64"

75865

- "")

75866

+ ""

75867

+{

75868

+ if (!TARGET_POWERPC64)

75869

+ {

75870

+ rtx cc = gen_rtx_SCRATCH (CCmode);

75871

+ rs6000_split_logical (operands, AND, false, false, false, cc);

75872

+ DONE;

75873

+ }

75874

+ else if (!and64_2_operand (operands[2], DImode))

75875

+ operands[2] = force_reg (DImode, operands[2]);

75876

+})

75877

75878

(define_insn "anddi3_mc"

75879

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r,r")

75880

@@ -7379,12 +8126,18 @@

75881

(define_expand "iordi3"

75882

[(set (match_operand:DI 0 "gpc_reg_operand" "")

75883

(ior:DI (match_operand:DI 1 "gpc_reg_operand" "")

75884

- (match_operand:DI 2 "reg_or_logical_cint_operand" "")))]

75885

- "TARGET_POWERPC64"

75886

- "

75887

+ (match_operand:DI 2 "reg_or_cint_operand" "")))]

75888

+ ""

75889

{

75890

- if (non_logical_cint_operand (operands[2], DImode))

75891

+ if (!TARGET_POWERPC64)

75892

{

75893

+ rs6000_split_logical (operands, IOR, false, false, false, NULL_RTX);

75894

+ DONE;

75895

+ }

75896

+ else if (!reg_or_logical_cint_operand (operands[2], DImode))

75897

+ operands[2] = force_reg (DImode, operands[2]);

75898

+ else if (non_logical_cint_operand (operands[2], DImode))

75899

+ {

75900

HOST_WIDE_INT value;

75901

rtx tmp = ((!can_create_pseudo_p ()

75902

|| rtx_equal_p (operands[0], operands[1]))

75903

@@ -7408,15 +8161,21 @@

75904

emit_insn (gen_iordi3 (operands[0], tmp, GEN_INT (value & 0xffff)));

75905

DONE;

75906

}

75907

-}")

75908

+})

75909

75910

(define_expand "xordi3"

75911

[(set (match_operand:DI 0 "gpc_reg_operand" "")

75912

(xor:DI (match_operand:DI 1 "gpc_reg_operand" "")

75913

- (match_operand:DI 2 "reg_or_logical_cint_operand" "")))]

75914

- "TARGET_POWERPC64"

75915

- "

75916

+ (match_operand:DI 2 "reg_or_cint_operand" "")))]

75917

+ ""

75918

{

75919

+ if (!TARGET_POWERPC64)

75920

+ {

75921

+ rs6000_split_logical (operands, XOR, false, false, false, NULL_RTX);

75922

+ DONE;

75923

+ }

75924

+ else if (!reg_or_logical_cint_operand (operands[2], DImode))

75925

+ operands[2] = force_reg (DImode, operands[2]);

75926

if (non_logical_cint_operand (operands[2], DImode))

75927

{

75928

HOST_WIDE_INT value;

75929

@@ -7442,7 +8201,7 @@

75930

emit_insn (gen_xordi3 (operands[0], tmp, GEN_INT (value & 0xffff)));

75931

DONE;

75932

}

75933

-}")

75934

+})

75935

75936

(define_insn "*booldi3_internal1"

75937

[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r")

75938

@@ -7678,7 +8437,385 @@

75939

(compare:CC (match_dup 0)

75940

(const_int 0)))]

75941

"")

75942

+

75943

+;; Eqv operation.

75944

+(define_insn "*eqv<mode>3"

75945

+ [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")

75946

+ (not:GPR

75947

+ (xor:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")

75948

+ (match_operand:GPR 2 "gpc_reg_operand" "r"))))]

75949

+ ""

75950

+ "eqv %0,%1,%2"

75951

+ [(set_attr "type" "integer")

75952

+ (set_attr "length" "4")])

75953

+

75954

75955

+;; 128-bit logical operations expanders

75956

+

75957

+(define_expand "and<mode>3"

75958

+ [(parallel [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

75959

+ (and:BOOL_128

75960

+ (match_operand:BOOL_128 1 "vlogical_operand" "")

75961

+ (match_operand:BOOL_128 2 "vlogical_operand" "")))

75962

+ (clobber (match_scratch:CC 3 ""))])]

75963

+ ""

75964

+ "")

75965

+

75966

+(define_expand "ior<mode>3"

75967

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

75968

+ (ior:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")

75969

+ (match_operand:BOOL_128 2 "vlogical_operand" "")))]

75970

+ ""

75971

+ "")

75972

+

75973

+(define_expand "xor<mode>3"

75974

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

75975

+ (xor:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")

75976

+ (match_operand:BOOL_128 2 "vlogical_operand" "")))]

75977

+ ""

75978

+ "")

75979

+

75980

+(define_expand "one_cmpl<mode>2"

75981

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

75982

+ (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")))]

75983

+ ""

75984

+ "")

75985

+

75986

+(define_expand "nor<mode>3"

75987

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

75988

+ (and:BOOL_128

75989

+ (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" ""))

75990

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))))]

75991

+ ""

75992

+ "")

75993

+

75994

+(define_expand "andc<mode>3"

75995

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

75996

+ (and:BOOL_128

75997

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))

75998

+ (match_operand:BOOL_128 1 "vlogical_operand" "")))]

75999

+ ""

76000

+ "")

76001

+

76002

+;; Power8 vector logical instructions.

76003

+(define_expand "eqv<mode>3"

76004

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

76005

+ (not:BOOL_128

76006

+ (xor:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")

76007

+ (match_operand:BOOL_128 2 "vlogical_operand" ""))))]

76008

+ "<MODE>mode == TImode || <MODE>mode == PTImode || TARGET_P8_VECTOR"

76009

+ "")

76010

+

76011

+;; Rewrite nand into canonical form

76012

+(define_expand "nand<mode>3"

76013

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

76014

+ (ior:BOOL_128

76015

+ (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" ""))

76016

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))))]

76017

+ "<MODE>mode == TImode || <MODE>mode == PTImode || TARGET_P8_VECTOR"

76018

+ "")

76019

+

76020

+;; The canonical form is to have the negated element first, so we need to

76021

+;; reverse arguments.

76022

+(define_expand "orc<mode>3"

76023

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "")

76024

+ (ior:BOOL_128

76025

+ (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand" ""))

76026

+ (match_operand:BOOL_128 1 "vlogical_operand" "")))]

76027

+ "<MODE>mode == TImode || <MODE>mode == PTImode || TARGET_P8_VECTOR"

76028

+ "")

76029

+

76030

+;; 128-bit logical operations insns and split operations

76031

+(define_insn_and_split "*and<mode>3_internal"

76032

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

76033

+ (and:BOOL_128

76034

+ (match_operand:BOOL_128 1 "vlogical_operand" "%<BOOL_REGS_OP1>")

76035

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>")))

76036

+ (clobber (match_scratch:CC 3 "<BOOL_REGS_AND_CR0>"))]

76037

+ ""

76038

+{

76039

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

76040

+ return "xxland %x0,%x1,%x2";

76041

+

76042

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

76043

+ return "vand %0,%1,%2";

76044

+

76045

+ return "#";

76046

+}

76047

+ "reload_completed && int_reg_operand (operands[0], <MODE>mode)"

76048

+ [(const_int 0)]

76049

+{

76050

+ rs6000_split_logical (operands, AND, false, false, false, operands[3]);

76051

+ DONE;

76052

+}

76053

+ [(set (attr "type")

76054

+ (if_then_else

76055

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76056

+ (const_string "vecsimple")

76057

+ (const_string "integer")))

76058

+ (set (attr "length")

76059

+ (if_then_else

76060

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76061

+ (const_string "4")

76062

+ (if_then_else

76063

+ (match_test "TARGET_POWERPC64")

76064

+ (const_string "8")

76065

+ (const_string "16"))))])

76066

+

76067

+;; 128-bit IOR/XOR

76068

+(define_insn_and_split "*bool<mode>3_internal"

76069

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

76070

+ (match_operator:BOOL_128 3 "boolean_or_operator"

76071

+ [(match_operand:BOOL_128 1 "vlogical_operand" "%<BOOL_REGS_OP1>")

76072

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>")]))]

76073

+ ""

76074

+{

76075

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

76076

+ return "xxl%q3 %x0,%x1,%x2";

76077

+

76078

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

76079

+ return "v%q3 %0,%1,%2";

76080

+

76081

+ return "#";

76082

+}

76083

+ "reload_completed && int_reg_operand (operands[0], <MODE>mode)"

76084

+ [(const_int 0)]

76085

+{

76086

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, false, false,

76087

+ NULL_RTX);

76088

+ DONE;

76089

+}

76090

+ [(set (attr "type")

76091

+ (if_then_else

76092

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76093

+ (const_string "vecsimple")

76094

+ (const_string "integer")))

76095

+ (set (attr "length")

76096

+ (if_then_else

76097

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76098

+ (const_string "4")

76099

+ (if_then_else

76100

+ (match_test "TARGET_POWERPC64")

76101

+ (const_string "8")

76102

+ (const_string "16"))))])

76103

+

76104

+;; 128-bit ANDC/ORC

76105

+(define_insn_and_split "*boolc<mode>3_internal1"

76106

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

76107

+ (match_operator:BOOL_128 3 "boolean_operator"

76108

+ [(not:BOOL_128

76109

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP1>"))

76110

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP2>")]))]

76111

+ "TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND)"

76112

+{

76113

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

76114

+ return "xxl%q3 %x0,%x1,%x2";

76115

+

76116

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

76117

+ return "v%q3 %0,%1,%2";

76118

+

76119

+ return "#";

76120

+}

76121

+ "(TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND))

76122

+ && reload_completed && int_reg_operand (operands[0], <MODE>mode)"

76123

+ [(const_int 0)]

76124

+{

76125

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, false,

76126

+ NULL_RTX);

76127

+ DONE;

76128

+}

76129

+ [(set (attr "type")

76130

+ (if_then_else

76131

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76132

+ (const_string "vecsimple")

76133

+ (const_string "integer")))

76134

+ (set (attr "length")

76135

+ (if_then_else

76136

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76137

+ (const_string "4")

76138

+ (if_then_else

76139

+ (match_test "TARGET_POWERPC64")

76140

+ (const_string "8")

76141

+ (const_string "16"))))])

76142

+

76143

+(define_insn_and_split "*boolc<mode>3_internal2"

76144

+ [(set (match_operand:TI2 0 "int_reg_operand" "=&r,r,r")

76145

+ (match_operator:TI2 3 "boolean_operator"

76146

+ [(not:TI2

76147

+ (match_operand:TI2 1 "int_reg_operand" "r,0,r"))

76148

+ (match_operand:TI2 2 "int_reg_operand" "r,r,0")]))]

76149

+ "!TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

76150

+ "#"

76151

+ "reload_completed && !TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

76152

+ [(const_int 0)]

76153

+{

76154

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, false,

76155

+ NULL_RTX);

76156

+ DONE;

76157

+}

76158

+ [(set_attr "type" "integer")

76159

+ (set (attr "length")

76160

+ (if_then_else

76161

+ (match_test "TARGET_POWERPC64")

76162

+ (const_string "8")

76163

+ (const_string "16")))])

76164

+

76165

+;; 128-bit NAND/NOR

76166

+(define_insn_and_split "*boolcc<mode>3_internal1"

76167

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

76168

+ (match_operator:BOOL_128 3 "boolean_operator"

76169

+ [(not:BOOL_128

76170

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP1>"))

76171

+ (not:BOOL_128

76172

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>"))]))]

76173

+ "TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND)"

76174

+{

76175

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

76176

+ return "xxl%q3 %x0,%x1,%x2";

76177

+

76178

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

76179

+ return "v%q3 %0,%1,%2";

76180

+

76181

+ return "#";

76182

+}

76183

+ "(TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND))

76184

+ && reload_completed && int_reg_operand (operands[0], <MODE>mode)"

76185

+ [(const_int 0)]

76186

+{

76187

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, true,

76188

+ NULL_RTX);

76189

+ DONE;

76190

+}

76191

+ [(set (attr "type")

76192

+ (if_then_else

76193

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76194

+ (const_string "vecsimple")

76195

+ (const_string "integer")))

76196

+ (set (attr "length")

76197

+ (if_then_else

76198

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76199

+ (const_string "4")

76200

+ (if_then_else

76201

+ (match_test "TARGET_POWERPC64")

76202

+ (const_string "8")

76203

+ (const_string "16"))))])

76204

+

76205

+(define_insn_and_split "*boolcc<mode>3_internal2"

76206

+ [(set (match_operand:TI2 0 "int_reg_operand" "=&r,r,r")

76207

+ (match_operator:TI2 3 "boolean_operator"

76208

+ [(not:TI2

76209

+ (match_operand:TI2 1 "int_reg_operand" "r,0,r"))

76210

+ (not:TI2

76211

+ (match_operand:TI2 2 "int_reg_operand" "r,r,0"))]))]

76212

+ "!TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

76213

+ "#"

76214

+ "reload_completed && !TARGET_P8_VECTOR && (GET_CODE (operands[3]) != AND)"

76215

+ [(const_int 0)]

76216

+{

76217

+ rs6000_split_logical (operands, GET_CODE (operands[3]), false, true, true,

76218

+ NULL_RTX);

76219

+ DONE;

76220

+}

76221

+ [(set_attr "type" "integer")

76222

+ (set (attr "length")

76223

+ (if_then_else

76224

+ (match_test "TARGET_POWERPC64")

76225

+ (const_string "8")

76226

+ (const_string "16")))])

76227

+

76228

+

76229

+;; 128-bit EQV

76230

+(define_insn_and_split "*eqv<mode>3_internal1"

76231

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

76232

+ (not:BOOL_128

76233

+ (xor:BOOL_128

76234

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP1>")

76235

+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>"))))]

76236

+ "TARGET_P8_VECTOR"

76237

+{

76238

+ if (vsx_register_operand (operands[0], <MODE>mode))

76239

+ return "xxleqv %x0,%x1,%x2";

76240

+

76241

+ return "#";

76242

+}

76243

+ "TARGET_P8_VECTOR && reload_completed

76244

+ && int_reg_operand (operands[0], <MODE>mode)"

76245

+ [(const_int 0)]

76246

+{

76247

+ rs6000_split_logical (operands, XOR, true, false, false, NULL_RTX);

76248

+ DONE;

76249

+}

76250

+ [(set (attr "type")

76251

+ (if_then_else

76252

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76253

+ (const_string "vecsimple")

76254

+ (const_string "integer")))

76255

+ (set (attr "length")

76256

+ (if_then_else

76257

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76258

+ (const_string "4")

76259

+ (if_then_else

76260

+ (match_test "TARGET_POWERPC64")

76261

+ (const_string "8")

76262

+ (const_string "16"))))])

76263

+

76264

+(define_insn_and_split "*eqv<mode>3_internal2"

76265

+ [(set (match_operand:TI2 0 "int_reg_operand" "=&r,r,r")

76266

+ (not:TI2

76267

+ (xor:TI2

76268

+ (match_operand:TI2 1 "int_reg_operand" "r,0,r")

76269

+ (match_operand:TI2 2 "int_reg_operand" "r,r,0"))))]

76270

+ "!TARGET_P8_VECTOR"

76271

+ "#"

76272

+ "reload_completed && !TARGET_P8_VECTOR"

76273

+ [(const_int 0)]

76274

+{

76275

+ rs6000_split_logical (operands, XOR, true, false, false, NULL_RTX);

76276

+ DONE;

76277

+}

76278

+ [(set_attr "type" "integer")

76279

+ (set (attr "length")

76280

+ (if_then_else

76281

+ (match_test "TARGET_POWERPC64")

76282

+ (const_string "8")

76283

+ (const_string "16")))])

76284

+

76285

+;; 128-bit one's complement

76286

+(define_insn_and_split "*one_cmpl<mode>3_internal"

76287

+ [(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")

76288

+ (not:BOOL_128

76289

+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_UNARY>")))]

76290

+ ""

76291

+{

76292

+ if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))

76293

+ return "xxlnor %x0,%x1,%x1";

76294

+

76295

+ if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))

76296

+ return "vnor %0,%1,%1";

76297

+

76298

+ return "#";

76299

+}

76300

+ "reload_completed && int_reg_operand (operands[0], <MODE>mode)"

76301

+ [(const_int 0)]

76302

+{

76303

+ rs6000_split_logical (operands, NOT, false, false, false, NULL_RTX);

76304

+ DONE;

76305

+}

76306

+ [(set (attr "type")

76307

+ (if_then_else

76308

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76309

+ (const_string "vecsimple")

76310

+ (const_string "integer")))

76311

+ (set (attr "length")

76312

+ (if_then_else

76313

+ (match_test "vsx_register_operand (operands[0], <MODE>mode)")

76314

+ (const_string "4")

76315

+ (if_then_else

76316

+ (match_test "TARGET_POWERPC64")

76317

+ (const_string "8")

76318

+ (const_string "16"))))])

76319

+

76320

+

76321

;; Now define ways of moving data around.

76322

76323

;; Set up a register with a value from the GOT table

76324

@@ -7765,7 +8902,31 @@

76325

mt%0 %1

76326

mt%0 %1

76327

nop"

76328

- [(set_attr "type" "*,*,load,store,*,*,*,mfjmpr,mtjmpr,*,*")

76329

+ [(set_attr_alternative "type"

76330

+ [(const_string "*")

76331

+ (const_string "*")

76332

+ (if_then_else

76333

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76334

+ (const_string "load_ux")

76335

+ (if_then_else

76336

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76337

+ (const_string "load_u")

76338

+ (const_string "load")))

76339

+ (if_then_else

76340

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76341

+ (const_string "store_ux")

76342

+ (if_then_else

76343

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76344

+ (const_string "store_u")

76345

+ (const_string "store")))

76346

+ (const_string "*")

76347

+ (const_string "*")

76348

+ (const_string "*")

76349

+ (const_string "mfjmpr")

76350

+ (const_string "mtjmpr")

76351

+ (const_string "*")

76352

+ (const_string "*")])

76353

+

76354

(set_attr "length" "4,4,4,4,4,4,8,4,4,4,4")])

76355

76356

(define_insn "*movsi_internal1_single"

76357

@@ -7787,7 +8948,44 @@

76358

nop

76359

stfs%U0%X0 %1,%0

76360

lfs%U1%X1 %0,%1"

76361

- [(set_attr "type" "*,*,load,store,*,*,*,mfjmpr,mtjmpr,*,*,*,*")

76362

+ [(set_attr_alternative "type"

76363

+ [(const_string "*")

76364

+ (const_string "*")

76365

+ (if_then_else

76366

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76367

+ (const_string "load_ux")

76368

+ (if_then_else

76369

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76370

+ (const_string "load_u")

76371

+ (const_string "load")))

76372

+ (if_then_else

76373

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76374

+ (const_string "store_ux")

76375

+ (if_then_else

76376

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76377

+ (const_string "store_u")

76378

+ (const_string "store")))

76379

+ (const_string "*")

76380

+ (const_string "*")

76381

+ (const_string "*")

76382

+ (const_string "mfjmpr")

76383

+ (const_string "mtjmpr")

76384

+ (const_string "*")

76385

+ (const_string "*")

76386

+ (if_then_else

76387

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76388

+ (const_string "fpstore_ux")

76389

+ (if_then_else

76390

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76391

+ (const_string "fpstore_u")

76392

+ (const_string "fpstore")))

76393

+ (if_then_else

76394

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76395

+ (const_string "fpload_ux")

76396

+ (if_then_else

76397

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76398

+ (const_string "fpload_u")

76399

+ (const_string "fpload")))])

76400

(set_attr "length" "4,4,4,4,4,4,8,4,4,4,4,4,4")])

76401

76402

;; Split a load of a large constant into the appropriate two-insn

76403

@@ -7822,7 +9020,7 @@

76404

cmp<wd>i %2,%0,0

76405

mr. %0,%1

76406

#"

76407

- [(set_attr "type" "cmp,compare,cmp")

76408

+ [(set_attr "type" "cmp,fast_compare,cmp")

76409

(set_attr "length" "4,4,8")])

76410

76411

(define_split

76412

@@ -7850,7 +9048,26 @@

76413

mf%1 %0

76414

mt%0 %1

76415

nop"

76416

- [(set_attr "type" "*,load,store,*,mfjmpr,mtjmpr,*")])

76417

+ [(set_attr_alternative "type"

76418

+ [(const_string "*")

76419

+ (if_then_else

76420

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76421

+ (const_string "load_ux")

76422

+ (if_then_else

76423

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76424

+ (const_string "load_u")

76425

+ (const_string "load")))

76426

+ (if_then_else

76427

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76428

+ (const_string "store_ux")

76429

+ (if_then_else

76430

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76431

+ (const_string "store_u")

76432

+ (const_string "store")))

76433

+ (const_string "*")

76434

+ (const_string "mfjmpr")

76435

+ (const_string "mtjmpr")

76436

+ (const_string "*")])])

76437

76438

(define_expand "mov<mode>"

76439

[(set (match_operand:INT 0 "general_operand" "")

76440

@@ -7871,7 +9088,26 @@

76441

mf%1 %0

76442

mt%0 %1

76443

nop"

76444

- [(set_attr "type" "*,load,store,*,mfjmpr,mtjmpr,*")])

76445

+ [(set_attr_alternative "type"

76446

+ [(const_string "*")

76447

+ (if_then_else

76448

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76449

+ (const_string "load_ux")

76450

+ (if_then_else

76451

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76452

+ (const_string "load_u")

76453

+ (const_string "load")))

76454

+ (if_then_else

76455

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76456

+ (const_string "store_ux")

76457

+ (if_then_else

76458

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76459

+ (const_string "store_u")

76460

+ (const_string "store")))

76461

+ (const_string "*")

76462

+ (const_string "mfjmpr")

76463

+ (const_string "mtjmpr")

76464

+ (const_string "*")])])

76465

76466

;; Here is how to move condition codes around. When we store CC data in

76467

;; an integer register or memory, we store just the high-order 4 bits.

76468

@@ -7899,7 +9135,7 @@

76469

mf%1 %0

76470

mt%0 %1

76471

lwz%U1%X1 %0,%1

76472

- stw%U0%U1 %1,%0"

76473

+ stw%U0%X0 %1,%0"

76474

[(set (attr "type")

76475

(cond [(eq_attr "alternative" "0,3")

76476

(const_string "cr_logical")

76477

@@ -7912,9 +9148,23 @@

76478

(eq_attr "alternative" "9")

76479

(const_string "mtjmpr")

76480

(eq_attr "alternative" "10")

76481

- (const_string "load")

76482

+ (if_then_else

76483

+ (match_test "update_indexed_address_mem (operands[1],

76484

+ VOIDmode)")

76485

+ (const_string "load_ux")

76486

+ (if_then_else

76487

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76488

+ (const_string "load_u")

76489

+ (const_string "load")))

76490

(eq_attr "alternative" "11")

76491

- (const_string "store")

76492

+ (if_then_else

76493

+ (match_test "update_indexed_address_mem (operands[0],

76494

+ VOIDmode)")

76495

+ (const_string "store_ux")

76496

+ (if_then_else

76497

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76498

+ (const_string "store_u")

76499

+ (const_string "store")))

76500

(match_test "TARGET_MFCRF")

76501

(const_string "mfcrf")

76502

]

76503

@@ -7926,15 +9176,17 @@

76504

;; can produce floating-point values in fixed-point registers. Unless the

76505

;; value is a simple constant or already in memory, we deal with this by

76506

;; allocating memory and copying the value explicitly via that memory location.

76507

-(define_expand "movsf"

76508

- [(set (match_operand:SF 0 "nonimmediate_operand" "")

76509

- (match_operand:SF 1 "any_operand" ""))]

76510

- ""

76511

- "{ rs6000_emit_move (operands[0], operands[1], SFmode); DONE; }")

76512

76513

+;; Move 32-bit binary/decimal floating point

76514

+(define_expand "mov<mode>"

76515

+ [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "")

76516

+ (match_operand:FMOVE32 1 "any_operand" ""))]

76517

+ "<fmove_ok>"

76518

+ "{ rs6000_emit_move (operands[0], operands[1], <MODE>mode); DONE; }")

76519

+

76520

(define_split

76521

- [(set (match_operand:SF 0 "gpc_reg_operand" "")

76522

- (match_operand:SF 1 "const_double_operand" ""))]

76523

+ [(set (match_operand:FMOVE32 0 "gpc_reg_operand" "")

76524

+ (match_operand:FMOVE32 1 "const_double_operand" ""))]

76525

"reload_completed

76526

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

76527

|| (GET_CODE (operands[0]) == SUBREG

76528

@@ -7947,10 +9199,10 @@

76529

REAL_VALUE_TYPE rv;

76530

76531

REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

76532

- REAL_VALUE_TO_TARGET_SINGLE (rv, l);

76533

+ <real_value_to_target> (rv, l);

76534

76535

if (! TARGET_POWERPC64)

76536

- operands[2] = operand_subword (operands[0], 0, 0, SFmode);

76537

+ operands[2] = operand_subword (operands[0], 0, 0, <MODE>mode);

76538

else

76539

operands[2] = gen_lowpart (SImode, operands[0]);

76540

76541

@@ -7957,11 +9209,11 @@

76542

operands[3] = gen_int_mode (l, SImode);

76543

}")

76544

76545

-(define_insn "*movsf_hardfloat"

76546

- [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,*c*l,!r,*h,!r,!r")

76547

- (match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,h,0,G,Fn"))]

76548

- "(gpc_reg_operand (operands[0], SFmode)

76549

- || gpc_reg_operand (operands[1], SFmode))

76550

+(define_insn "mov<mode>_hardfloat"

76551

+ [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=!r,!r,m,f,wa,wa,<f32_lr>,<f32_sm>,wu,Z,?<f32_dm>,?r,*c*l,!r,*h,!r,!r")

76552

+ (match_operand:FMOVE32 1 "input_operand" "r,m,r,f,wa,j,<f32_lm>,<f32_sr>,Z,wu,r,<f32_dm>,r,h,0,G,Fn"))]

76553

+ "(gpc_reg_operand (operands[0], <MODE>mode)

76554

+ || gpc_reg_operand (operands[1], <MODE>mode))

76555

&& (TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT)"

76556

"@

76557

mr %0,%1

76558

@@ -7968,21 +9220,68 @@

76559

lwz%U1%X1 %0,%1

76560

stw%U0%X0 %1,%0

76561

fmr %0,%1

76562

- lfs%U1%X1 %0,%1

76563

- stfs%U0%X0 %1,%0

76564

+ xxlor %x0,%x1,%x1

76565

+ xxlxor %x0,%x0,%x0

76566

+ <f32_li>

76567

+ <f32_si>

76568

+ <f32_lv>

76569

+ <f32_sv>

76570

+ mtvsrwz %x0,%1

76571

+ mfvsrwz %0,%x1

76572

mt%0 %1

76573

mf%1 %0

76574

nop

76575

#

76576

#"

76577

- [(set_attr "type" "*,load,store,fp,fpload,fpstore,mtjmpr,mfjmpr,*,*,*")

76578

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8")])

76579

+ [(set_attr_alternative "type"

76580

+ [(const_string "*")

76581

+ (if_then_else

76582

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76583

+ (const_string "load_ux")

76584

+ (if_then_else

76585

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76586

+ (const_string "load_u")

76587

+ (const_string "load")))

76588

+ (if_then_else

76589

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76590

+ (const_string "store_ux")

76591

+ (if_then_else

76592

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76593

+ (const_string "store_u")

76594

+ (const_string "store")))

76595

+ (const_string "fp")

76596

+ (const_string "vecsimple")

76597

+ (const_string "vecsimple")

76598

+ (if_then_else

76599

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76600

+ (const_string "fpload_ux")

76601

+ (if_then_else

76602

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76603

+ (const_string "fpload_u")

76604

+ (const_string "fpload")))

76605

+ (if_then_else

76606

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76607

+ (const_string "fpstore_ux")

76608

+ (if_then_else

76609

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76610

+ (const_string "fpstore_u")

76611

+ (const_string "fpstore")))

76612

+ (const_string "fpload")

76613

+ (const_string "fpstore")

76614

+ (const_string "mftgpr")

76615

+ (const_string "mffgpr")

76616

+ (const_string "mtjmpr")

76617

+ (const_string "mfjmpr")

76618

+ (const_string "*")

76619

+ (const_string "*")

76620

+ (const_string "*")])

76621

+ (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,8")])

76622

76623

-(define_insn "*movsf_softfloat"

76624

- [(set (match_operand:SF 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,r,*h")

76625

- (match_operand:SF 1 "input_operand" "r,r,h,m,r,I,L,G,Fn,0"))]

76626

- "(gpc_reg_operand (operands[0], SFmode)

76627

- || gpc_reg_operand (operands[1], SFmode))

76628

+(define_insn "*mov<mode>_softfloat"

76629

+ [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,r,*h")

76630

+ (match_operand:FMOVE32 1 "input_operand" "r,r,h,m,r,I,L,G,Fn,0"))]

76631

+ "(gpc_reg_operand (operands[0], <MODE>mode)

76632

+ || gpc_reg_operand (operands[1], <MODE>mode))

76633

&& (TARGET_SOFT_FLOAT || !TARGET_FPRS)"

76634

"@

76635

mr %0,%1

76636

@@ -7995,19 +9294,42 @@

76637

#

76638

#

76639

nop"

76640

- [(set_attr "type" "*,mtjmpr,mfjmpr,load,store,*,*,*,*,*")

76641

+ [(set_attr_alternative "type"

76642

+ [(const_string "*")

76643

+ (const_string "mtjmpr")

76644

+ (const_string "mfjmpr")

76645

+ (if_then_else

76646

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76647

+ (const_string "load_ux")

76648

+ (if_then_else

76649

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76650

+ (const_string "load_u")

76651

+ (const_string "load")))

76652

+ (if_then_else

76653

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76654

+ (const_string "store_ux")

76655

+ (if_then_else

76656

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76657

+ (const_string "store_u")

76658

+ (const_string "store")))

76659

+ (const_string "*")

76660

+ (const_string "*")

76661

+ (const_string "*")

76662

+ (const_string "*")

76663

+ (const_string "*")])

76664

(set_attr "length" "4,4,4,4,4,4,4,4,8,4")])

76665

76666

76667

-(define_expand "movdf"

76668

- [(set (match_operand:DF 0 "nonimmediate_operand" "")

76669

- (match_operand:DF 1 "any_operand" ""))]

76670

+;; Move 64-bit binary/decimal floating point

76671

+(define_expand "mov<mode>"

76672

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "")

76673

+ (match_operand:FMOVE64 1 "any_operand" ""))]

76674

""

76675

- "{ rs6000_emit_move (operands[0], operands[1], DFmode); DONE; }")

76676

+ "{ rs6000_emit_move (operands[0], operands[1], <MODE>mode); DONE; }")

76677

76678

(define_split

76679

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

76680

- (match_operand:DF 1 "const_int_operand" ""))]

76681

+ [(set (match_operand:FMOVE64 0 "gpc_reg_operand" "")

76682

+ (match_operand:FMOVE64 1 "const_int_operand" ""))]

76683

"! TARGET_POWERPC64 && reload_completed

76684

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

76685

|| (GET_CODE (operands[0]) == SUBREG

76686

@@ -8020,8 +9342,8 @@

76687

int endian = (WORDS_BIG_ENDIAN == 0);

76688

HOST_WIDE_INT value = INTVAL (operands[1]);

76689

76690

- operands[2] = operand_subword (operands[0], endian, 0, DFmode);

76691

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DFmode);

76692

+ operands[2] = operand_subword (operands[0], endian, 0, <MODE>mode);

76693

+ operands[3] = operand_subword (operands[0], 1 - endian, 0, <MODE>mode);

76694

#if HOST_BITS_PER_WIDE_INT == 32

76695

operands[4] = (value & 0x80000000) ? constm1_rtx : const0_rtx;

76696

#else

76697

@@ -8031,8 +9353,8 @@

76698

}")

76699

76700

(define_split

76701

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

76702

- (match_operand:DF 1 "const_double_operand" ""))]

76703

+ [(set (match_operand:FMOVE64 0 "gpc_reg_operand" "")

76704

+ (match_operand:FMOVE64 1 "const_double_operand" ""))]

76705

"! TARGET_POWERPC64 && reload_completed

76706

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

76707

|| (GET_CODE (operands[0]) == SUBREG

76708

@@ -8047,17 +9369,17 @@

76709

REAL_VALUE_TYPE rv;

76710

76711

REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

76712

- REAL_VALUE_TO_TARGET_DOUBLE (rv, l);

76713

+ <real_value_to_target> (rv, l);

76714

76715

- operands[2] = operand_subword (operands[0], endian, 0, DFmode);

76716

- operands[3] = operand_subword (operands[0], 1 - endian, 0, DFmode);

76717

+ operands[2] = operand_subword (operands[0], endian, 0, <MODE>mode);

76718

+ operands[3] = operand_subword (operands[0], 1 - endian, 0, <MODE>mode);

76719

operands[4] = gen_int_mode (l[endian], SImode);

76720

operands[5] = gen_int_mode (l[1 - endian], SImode);

76721

}")

76722

76723

(define_split

76724

- [(set (match_operand:DF 0 "gpc_reg_operand" "")

76725

- (match_operand:DF 1 "const_double_operand" ""))]

76726

+ [(set (match_operand:FMOVE64 0 "gpc_reg_operand" "")

76727

+ (match_operand:FMOVE64 1 "const_double_operand" ""))]

76728

"TARGET_POWERPC64 && reload_completed

76729

&& ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)

76730

|| (GET_CODE (operands[0]) == SUBREG

76731

@@ -8074,7 +9396,7 @@

76732

#endif

76733

76734

REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);

76735

- REAL_VALUE_TO_TARGET_DOUBLE (rv, l);

76736

+ <real_value_to_target> (rv, l);

76737

76738

operands[2] = gen_lowpart (DImode, operands[0]);

76739

/* HIGHPART is lower memory address when WORDS_BIG_ENDIAN. */

76740

@@ -8099,22 +9421,19 @@

76741

;; since the D-form version of the memory instructions does not need a GPR for

76742

;; reloading.

76743

76744

-(define_insn "*movdf_hardfloat32"

76745

- [(set (match_operand:DF 0 "nonimmediate_operand" "=m,d,d,ws,?wa,Z,?Z,ws,?wa,wa,Y,r,!r,!r,!r,!r")

76746

- (match_operand:DF 1 "input_operand" "d,m,d,Z,Z,ws,wa,ws,wa,j,r,Y,r,G,H,F"))]

76747

+(define_insn "*mov<mode>_hardfloat32"

76748

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,wv,Z,wa,wa,Y,r,!r,!r,!r,!r")

76749

+ (match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,wv,wa,j,r,Y,r,G,H,F"))]

76750

"! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

76751

- && (gpc_reg_operand (operands[0], DFmode)

76752

- || gpc_reg_operand (operands[1], DFmode))"

76753

+ && (gpc_reg_operand (operands[0], <MODE>mode)

76754

+ || gpc_reg_operand (operands[1], <MODE>mode))"

76755

"@

76756

stfd%U0%X0 %1,%0

76757

lfd%U1%X1 %0,%1

76758

fmr %0,%1

76759

lxsd%U1x %x0,%y1

76760

- lxsd%U1x %x0,%y1

76761

stxsd%U0x %x1,%y0

76762

- stxsd%U0x %x1,%y0

76763

xxlor %x0,%x1,%x1

76764

- xxlor %x0,%x1,%x1

76765

xxlxor %x0,%x0,%x0

76766

#

76767

#

76768

@@ -8122,115 +9441,141 @@

76769

#

76770

#

76771

#"

76772

- [(set_attr "type" "fpstore,fpload,fp,fpload,fpload,fpstore,fpstore,vecsimple,vecsimple,vecsimple,store,load,two,fp,fp,*")

76773

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8,8,8,8,12,16")])

76774

+ [(set_attr_alternative "type"

76775

+ [(if_then_else

76776

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76777

+ (const_string "fpstore_ux")

76778

+ (if_then_else

76779

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76780

+ (const_string "fpstore_u")

76781

+ (const_string "fpstore")))

76782

+ (if_then_else

76783

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76784

+ (const_string "fpload_ux")

76785

+ (if_then_else

76786

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76787

+ (const_string "fpload_u")

76788

+ (const_string "fpload")))

76789

+ (const_string "fp")

76790

+ (if_then_else

76791

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76792

+ (const_string "fpload_ux")

76793

+ (const_string "fpload"))

76794

+ (if_then_else

76795

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76796

+ (const_string "fpstore_ux")

76797

+ (const_string "fpstore"))

76798

+ (const_string "vecsimple")

76799

+ (const_string "vecsimple")

76800

+ (const_string "store")

76801

+ (const_string "load")

76802

+ (const_string "two")

76803

+ (const_string "fp")

76804

+ (const_string "fp")

76805

+ (const_string "*")])

76806

+ (set_attr "length" "4,4,4,4,4,4,4,8,8,8,8,12,16")])

76807

76808

-(define_insn "*movdf_softfloat32"

76809

- [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,r,r,r,r")

76810

- (match_operand:DF 1 "input_operand" "r,Y,r,G,H,F"))]

76811

+(define_insn "*mov<mode>_softfloat32"

76812

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=Y,r,r,r,r,r")

76813

+ (match_operand:FMOVE64 1 "input_operand" "r,Y,r,G,H,F"))]

76814

"! TARGET_POWERPC64

76815

&& ((TARGET_FPRS && TARGET_SINGLE_FLOAT)

76816

- || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE)

76817

- && (gpc_reg_operand (operands[0], DFmode)

76818

- || gpc_reg_operand (operands[1], DFmode))"

76819

+ || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE

76820

+ || (<MODE>mode == DDmode && TARGET_E500_DOUBLE))

76821

+ && (gpc_reg_operand (operands[0], <MODE>mode)

76822

+ || gpc_reg_operand (operands[1], <MODE>mode))"

76823

"#"

76824

[(set_attr "type" "store,load,two,*,*,*")

76825

(set_attr "length" "8,8,8,8,12,16")])

76826

76827

-;; Reload patterns to support gpr load/store with misaligned mem.

76828

-;; and multiple gpr load/store at offset >= 0xfffc

76829

-(define_expand "reload_<mode>_store"

76830

- [(parallel [(match_operand 0 "memory_operand" "=m")

76831

- (match_operand 1 "gpc_reg_operand" "r")

76832

- (match_operand:GPR 2 "register_operand" "=&b")])]

76833

- ""

76834

-{

76835

- rs6000_secondary_reload_gpr (operands[1], operands[0], operands[2], true);

76836

- DONE;

76837

-})

76838

-

76839

-(define_expand "reload_<mode>_load"

76840

- [(parallel [(match_operand 0 "gpc_reg_operand" "=r")

76841

- (match_operand 1 "memory_operand" "m")

76842

- (match_operand:GPR 2 "register_operand" "=b")])]

76843

- ""

76844

-{

76845

- rs6000_secondary_reload_gpr (operands[0], operands[1], operands[2], false);

76846

- DONE;

76847

-})

76848

-

76849

; ld/std require word-aligned displacements -> 'Y' constraint.

76850

; List Y->r and r->Y before r->r for reload.

76851

-(define_insn "*movdf_hardfloat64_mfpgpr"

76852

- [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,ws,?wa,ws,?wa,Z,?Z,m,d,d,wa,*c*l,!r,*h,!r,!r,!r,r,d")

76853

- (match_operand:DF 1 "input_operand" "r,Y,r,ws,?wa,Z,Z,ws,wa,d,m,d,j,r,h,0,G,H,F,d,r"))]

76854

- "TARGET_POWERPC64 && TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

76855

- && TARGET_DOUBLE_FLOAT

76856

- && (gpc_reg_operand (operands[0], DFmode)

76857

- || gpc_reg_operand (operands[1], DFmode))"

76858

+(define_insn "*mov<mode>_hardfloat64"

76859

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,wv,Z,wa,wa,Y,r,!r,*c*l,!r,*h,!r,!r,!r,r,wg,r,wm")

76860

+ (match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,wv,wa,j,r,Y,r,r,h,0,G,H,F,wg,r,wm,r"))]

76861

+ "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

76862

+ && (gpc_reg_operand (operands[0], <MODE>mode)

76863

+ || gpc_reg_operand (operands[1], <MODE>mode))"

76864

"@

76865

- std%U0%X0 %1,%0

76866

- ld%U1%X1 %0,%1

76867

- mr %0,%1

76868

- xxlor %x0,%x1,%x1

76869

- xxlor %x0,%x1,%x1

76870

- lxsd%U1x %x0,%y1

76871

- lxsd%U1x %x0,%y1

76872

- stxsd%U0x %x1,%y0

76873

- stxsd%U0x %x1,%y0

76874

stfd%U0%X0 %1,%0

76875

lfd%U1%X1 %0,%1

76876

fmr %0,%1

76877

+ lxsd%U1x %x0,%y1

76878

+ stxsd%U0x %x1,%y0

76879

+ xxlor %x0,%x1,%x1

76880

xxlxor %x0,%x0,%x0

76881

- mt%0 %1

76882

- mf%1 %0

76883

- nop

76884

- #

76885

- #

76886

- #

76887

- mftgpr %0,%1

76888

- mffgpr %0,%1"

76889

- [(set_attr "type" "store,load,*,fp,fp,fpload,fpload,fpstore,fpstore,fpstore,fpload,fp,vecsimple,mtjmpr,mfjmpr,*,*,*,*,mftgpr,mffgpr")

76890

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,8,12,16,4,4")])

76891

-

76892

-; ld/std require word-aligned displacements -> 'Y' constraint.

76893

-; List Y->r and r->Y before r->r for reload.

76894

-(define_insn "*movdf_hardfloat64"

76895

- [(set (match_operand:DF 0 "nonimmediate_operand" "=m,d,d,Y,r,!r,ws,?wa,Z,?Z,ws,?wa,wa,*c*l,!r,*h,!r,!r,!r")

76896

- (match_operand:DF 1 "input_operand" "d,m,d,r,Y,r,Z,Z,ws,wa,ws,wa,j,r,h,0,G,H,F"))]

76897

- "TARGET_POWERPC64 && !TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

76898

- && TARGET_DOUBLE_FLOAT

76899

- && (gpc_reg_operand (operands[0], DFmode)

76900

- || gpc_reg_operand (operands[1], DFmode))"

76901

- "@

76902

- stfd%U0%X0 %1,%0

76903

- lfd%U1%X1 %0,%1

76904

- fmr %0,%1

76905

std%U0%X0 %1,%0

76906

ld%U1%X1 %0,%1

76907

mr %0,%1

76908

- lxsd%U1x %x0,%y1

76909

- lxsd%U1x %x0,%y1

76910

- stxsd%U0x %x1,%y0

76911

- stxsd%U0x %x1,%y0

76912

- xxlor %x0,%x1,%x1

76913

- xxlor %x0,%x1,%x1

76914

- xxlxor %x0,%x0,%x0

76915

mt%0 %1

76916

mf%1 %0

76917

nop

76918

#

76919

#

76920

- #"

76921

- [(set_attr "type" "fpstore,fpload,fp,store,load,*,fpload,fpload,fpstore,fpstore,vecsimple,vecsimple,vecsimple,mtjmpr,mfjmpr,*,*,*,*")

76922

- (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,8,12,16")])

76923

+ #

76924

+ mftgpr %0,%1

76925

+ mffgpr %0,%1

76926

+ mfvsrd %0,%x1

76927

+ mtvsrd %x0,%1"

76928

+ [(set_attr_alternative "type"

76929

+ [(if_then_else

76930

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76931

+ (const_string "fpstore_ux")

76932

+ (if_then_else

76933

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76934

+ (const_string "fpstore_u")

76935

+ (const_string "fpstore")))

76936

+ (if_then_else

76937

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76938

+ (const_string "fpload_ux")

76939

+ (if_then_else

76940

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76941

+ (const_string "fpload_u")

76942

+ (const_string "fpload")))

76943

+ (const_string "fp")

76944

+ (if_then_else

76945

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76946

+ (const_string "fpload_ux")

76947

+ (const_string "fpload"))

76948

+ (if_then_else

76949

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76950

+ (const_string "fpstore_ux")

76951

+ (const_string "fpstore"))

76952

+ (const_string "vecsimple")

76953

+ (const_string "vecsimple")

76954

+ (if_then_else

76955

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

76956

+ (const_string "store_ux")

76957

+ (if_then_else

76958

+ (match_test "update_address_mem (operands[0], VOIDmode)")

76959

+ (const_string "store_u")

76960

+ (const_string "store")))

76961

+ (if_then_else

76962

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

76963

+ (const_string "load_ux")

76964

+ (if_then_else

76965

+ (match_test "update_address_mem (operands[1], VOIDmode)")

76966

+ (const_string "load_u")

76967

+ (const_string "load")))

76968

+ (const_string "*")

76969

+ (const_string "mtjmpr")

76970

+ (const_string "mfjmpr")

76971

+ (const_string "*")

76972

+ (const_string "*")

76973

+ (const_string "*")

76974

+ (const_string "*")

76975

+ (const_string "mftgpr")

76976

+ (const_string "mffgpr")

76977

+ (const_string "mftgpr")

76978

+ (const_string "mffgpr")])

76979

+ (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4,4,8,12,16,4,4,4,4")])

76980

76981

-(define_insn "*movdf_softfloat64"

76982

- [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,r,cl,r,r,r,r,*h")

76983

- (match_operand:DF 1 "input_operand" "r,Y,r,r,h,G,H,F,0"))]

76984

+(define_insn "*mov<mode>_softfloat64"

76985

+ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=Y,r,r,cl,r,r,r,r,*h")

76986

+ (match_operand:FMOVE64 1 "input_operand" "r,Y,r,r,h,G,H,F,0"))]

76987

"TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS)

76988

- && (gpc_reg_operand (operands[0], DFmode)

76989

- || gpc_reg_operand (operands[1], DFmode))"

76990

+ && (gpc_reg_operand (operands[0], <MODE>mode)

76991

+ || gpc_reg_operand (operands[1], <MODE>mode))"

76992

"@

76993

std%U0%X0 %1,%0

76994

ld%U1%X1 %0,%1

76995

@@ -8241,38 +9586,87 @@

76996

#

76997

#

76998

nop"

76999

- [(set_attr "type" "store,load,*,mtjmpr,mfjmpr,*,*,*,*")

77000

+ [(set_attr_alternative "type"

77001

+ [(if_then_else

77002

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

77003

+ (const_string "store_ux")

77004

+ (if_then_else

77005

+ (match_test "update_address_mem (operands[0], VOIDmode)")

77006

+ (const_string "store_u")

77007

+ (const_string "store")))

77008

+ (if_then_else

77009

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

77010

+ (const_string "load_ux")

77011

+ (if_then_else

77012

+ (match_test "update_address_mem (operands[1], VOIDmode)")

77013

+ (const_string "load_u")

77014

+ (const_string "load")))

77015

+ (const_string "*")

77016

+ (const_string "mtjmpr")

77017

+ (const_string "mfjmpr")

77018

+ (const_string "*")

77019

+ (const_string "*")

77020

+ (const_string "*")

77021

+ (const_string "*")])

77022

(set_attr "length" "4,4,4,4,4,8,12,16,4")])

77023

77024

-(define_expand "movtf"

77025

- [(set (match_operand:TF 0 "general_operand" "")

77026

- (match_operand:TF 1 "any_operand" ""))]

77027

- "!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128"

77028

- "{ rs6000_emit_move (operands[0], operands[1], TFmode); DONE; }")

77029

+(define_expand "mov<mode>"

77030

+ [(set (match_operand:FMOVE128 0 "general_operand" "")

77031

+ (match_operand:FMOVE128 1 "any_operand" ""))]

77032

+ ""

77033

+ "{ rs6000_emit_move (operands[0], operands[1], <MODE>mode); DONE; }")

77034

77035

;; It's important to list Y->r and r->Y before r->r because otherwise

77036

;; reload, given m->r, will try to pick r->r and reload it, which

77037

;; doesn't make progress.

77038

-(define_insn_and_split "*movtf_internal"

77039

- [(set (match_operand:TF 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

77040

- (match_operand:TF 1 "input_operand" "d,m,d,r,YGHF,r"))]

77041

- "!TARGET_IEEEQUAD

77042

- && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128

77043

- && (gpc_reg_operand (operands[0], TFmode)

77044

- || gpc_reg_operand (operands[1], TFmode))"

77045

+

77046

+;; We can't split little endian direct moves of TDmode, because the words are

77047

+;; not swapped like they are for TImode or TFmode. Subregs therefore are

77048

+;; problematical. Don't allow direct move for this case.

77049

+

77050

+(define_insn_and_split "*mov<mode>_64bit_dm"

77051

+ [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r,r,wm")

77052

+ (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r,wm,r"))]

77053

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64

77054

+ && (<MODE>mode != TDmode || WORDS_BIG_ENDIAN)

77055

+ && (gpc_reg_operand (operands[0], <MODE>mode)

77056

+ || gpc_reg_operand (operands[1], <MODE>mode))"

77057

"#"

77058

"&& reload_completed"

77059

[(pc)]

77060

{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

77061

+ [(set_attr "length" "8,8,8,12,12,8,8,8")])

77062

+

77063

+(define_insn_and_split "*movtd_64bit_nodm"

77064

+ [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

77065

+ (match_operand:TD 1 "input_operand" "d,m,d,r,YGHF,r"))]

77066

+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64 && !WORDS_BIG_ENDIAN

77067

+ && (gpc_reg_operand (operands[0], TDmode)

77068

+ || gpc_reg_operand (operands[1], TDmode))"

77069

+ "#"

77070

+ "&& reload_completed"

77071

+ [(pc)]

77072

+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

77073

+ [(set_attr "length" "8,8,8,12,12,8")])

77074

+

77075

+(define_insn_and_split "*mov<mode>_32bit"

77076

+ [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r")

77077

+ (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r"))]

77078

+ "TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_POWERPC64

77079

+ && (gpc_reg_operand (operands[0], <MODE>mode)

77080

+ || gpc_reg_operand (operands[1], <MODE>mode))"

77081

+ "#"

77082

+ "&& reload_completed"

77083

+ [(pc)]

77084

+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }

77085

[(set_attr "length" "8,8,8,20,20,16")])

77086

77087

-(define_insn_and_split "*movtf_softfloat"

77088

- [(set (match_operand:TF 0 "rs6000_nonimmediate_operand" "=Y,r,r")

77089

- (match_operand:TF 1 "input_operand" "r,YGHF,r"))]

77090

- "!TARGET_IEEEQUAD

77091

- && (TARGET_SOFT_FLOAT || !TARGET_FPRS) && TARGET_LONG_DOUBLE_128

77092

- && (gpc_reg_operand (operands[0], TFmode)

77093

- || gpc_reg_operand (operands[1], TFmode))"

77094

+(define_insn_and_split "*mov<mode>_softfloat"

77095

+ [(set (match_operand:FMOVE128 0 "rs6000_nonimmediate_operand" "=Y,r,r")

77096

+ (match_operand:FMOVE128 1 "input_operand" "r,YGHF,r"))]

77097

+ "(TARGET_SOFT_FLOAT || !TARGET_FPRS)

77098

+ && (gpc_reg_operand (operands[0], <MODE>mode)

77099

+ || gpc_reg_operand (operands[1], <MODE>mode))"

77100

"#"

77101

"&& reload_completed"

77102

[(pc)]

77103

@@ -8557,6 +9951,252 @@

77104

operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);

77105

}")

77106

77107

+;; Reload helper functions used by rs6000_secondary_reload. The patterns all

77108

+;; must have 3 arguments, and scratch register constraint must be a single

77109

+;; constraint.

77110

+

77111

+;; Reload patterns to support gpr load/store with misaligned mem.

77112

+;; and multiple gpr load/store at offset >= 0xfffc

77113

+(define_expand "reload_<mode>_store"

77114

+ [(parallel [(match_operand 0 "memory_operand" "=m")

77115

+ (match_operand 1 "gpc_reg_operand" "r")

77116

+ (match_operand:GPR 2 "register_operand" "=&b")])]

77117

+ ""

77118

+{

77119

+ rs6000_secondary_reload_gpr (operands[1], operands[0], operands[2], true);

77120

+ DONE;

77121

+})

77122

+

77123

+(define_expand "reload_<mode>_load"

77124

+ [(parallel [(match_operand 0 "gpc_reg_operand" "=r")

77125

+ (match_operand 1 "memory_operand" "m")

77126

+ (match_operand:GPR 2 "register_operand" "=b")])]

77127

+ ""

77128

+{

77129

+ rs6000_secondary_reload_gpr (operands[0], operands[1], operands[2], false);

77130

+ DONE;

77131

+})

77132

+

77133

+

77134

+;; Power8 merge instructions to allow direct move to/from floating point

77135

+;; registers in 32-bit mode. We use TF mode to get two registers to move the

77136

+;; individual 32-bit parts across. Subreg doesn't work too well on the TF

77137

+;; value, since it is allocated in reload and not all of the flow information

77138

+;; is setup for it. We have two patterns to do the two moves between gprs and

77139

+;; fprs. There isn't a dependancy between the two, but we could potentially

77140

+;; schedule other instructions between the two instructions. TFmode is

77141

+;; currently limited to traditional FPR registers. If/when this is changed, we

77142

+;; will need to revist %L to make sure it works with VSX registers, or add an

77143

+;; %x version of %L.

77144

+

77145

+(define_insn "p8_fmrgow_<mode>"

77146

+ [(set (match_operand:FMOVE64X 0 "register_operand" "=d")

77147

+ (unspec:FMOVE64X [(match_operand:TF 1 "register_operand" "d")]

77148

+ UNSPEC_P8V_FMRGOW))]

77149

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77150

+ "fmrgow %0,%1,%L1"

77151

+ [(set_attr "type" "vecperm")])

77152

+

77153

+(define_insn "p8_mtvsrwz_1"

77154

+ [(set (match_operand:TF 0 "register_operand" "=d")

77155

+ (unspec:TF [(match_operand:SI 1 "register_operand" "r")]

77156

+ UNSPEC_P8V_MTVSRWZ))]

77157

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77158

+ "mtvsrwz %x0,%1"

77159

+ [(set_attr "type" "mftgpr")])

77160

+

77161

+(define_insn "p8_mtvsrwz_2"

77162

+ [(set (match_operand:TF 0 "register_operand" "+d")

77163

+ (unspec:TF [(match_dup 0)

77164

+ (match_operand:SI 1 "register_operand" "r")]

77165

+ UNSPEC_P8V_MTVSRWZ))]

77166

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77167

+ "mtvsrwz %L0,%1"

77168

+ [(set_attr "type" "mftgpr")])

77169

+

77170

+(define_insn_and_split "reload_fpr_from_gpr<mode>"

77171

+ [(set (match_operand:FMOVE64X 0 "register_operand" "=ws")

77172

+ (unspec:FMOVE64X [(match_operand:FMOVE64X 1 "register_operand" "r")]

77173

+ UNSPEC_P8V_RELOAD_FROM_GPR))

77174

+ (clobber (match_operand:TF 2 "register_operand" "=d"))]

77175

+ "!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77176

+ "#"

77177

+ "&& reload_completed"

77178

+ [(const_int 0)]

77179

+{

77180

+ rtx dest = operands[0];

77181

+ rtx src = operands[1];

77182

+ rtx tmp = operands[2];

77183

+ rtx gpr_hi_reg = gen_highpart (SImode, src);

77184

+ rtx gpr_lo_reg = gen_lowpart (SImode, src);

77185

+

77186

+ emit_insn (gen_p8_mtvsrwz_1 (tmp, gpr_hi_reg));

77187

+ emit_insn (gen_p8_mtvsrwz_2 (tmp, gpr_lo_reg));

77188

+ emit_insn (gen_p8_fmrgow_<mode> (dest, tmp));

77189

+ DONE;

77190

+}

77191

+ [(set_attr "length" "12")

77192

+ (set_attr "type" "three")])

77193

+

77194

+;; Move 128 bit values from GPRs to VSX registers in 64-bit mode

77195

+(define_insn "p8_mtvsrd_1"

77196

+ [(set (match_operand:TF 0 "register_operand" "=ws")

77197

+ (unspec:TF [(match_operand:DI 1 "register_operand" "r")]

77198

+ UNSPEC_P8V_MTVSRD))]

77199

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77200

+ "mtvsrd %0,%1"

77201

+ [(set_attr "type" "mftgpr")])

77202

+

77203

+(define_insn "p8_mtvsrd_2"

77204

+ [(set (match_operand:TF 0 "register_operand" "+ws")

77205

+ (unspec:TF [(match_dup 0)

77206

+ (match_operand:DI 1 "register_operand" "r")]

77207

+ UNSPEC_P8V_MTVSRD))]

77208

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77209

+ "mtvsrd %L0,%1"

77210

+ [(set_attr "type" "mftgpr")])

77211

+

77212

+(define_insn "p8_xxpermdi_<mode>"

77213

+ [(set (match_operand:FMOVE128_GPR 0 "register_operand" "=wa")

77214

+ (unspec:FMOVE128_GPR [(match_operand:TF 1 "register_operand" "ws")]

77215

+ UNSPEC_P8V_XXPERMDI))]

77216

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77217

+ "xxpermdi %x0,%1,%L1,0"

77218

+ [(set_attr "type" "vecperm")])

77219

+

77220

+(define_insn_and_split "reload_vsx_from_gpr<mode>"

77221

+ [(set (match_operand:FMOVE128_GPR 0 "register_operand" "=wa")

77222

+ (unspec:FMOVE128_GPR

77223

+ [(match_operand:FMOVE128_GPR 1 "register_operand" "r")]

77224

+ UNSPEC_P8V_RELOAD_FROM_GPR))

77225

+ (clobber (match_operand:TF 2 "register_operand" "=ws"))]

77226

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77227

+ "#"

77228

+ "&& reload_completed"

77229

+ [(const_int 0)]

77230

+{

77231

+ rtx dest = operands[0];

77232

+ rtx src = operands[1];

77233

+ rtx tmp = operands[2];

77234

+ rtx gpr_hi_reg = gen_highpart (DImode, src);

77235

+ rtx gpr_lo_reg = gen_lowpart (DImode, src);

77236

+

77237

+ emit_insn (gen_p8_mtvsrd_1 (tmp, gpr_hi_reg));

77238

+ emit_insn (gen_p8_mtvsrd_2 (tmp, gpr_lo_reg));

77239

+ emit_insn (gen_p8_xxpermdi_<mode> (dest, tmp));

77240

+}

77241

+ [(set_attr "length" "12")

77242

+ (set_attr "type" "three")])

77243

+

77244

+(define_split

77245

+ [(set (match_operand:FMOVE128_GPR 0 "nonimmediate_operand" "")

77246

+ (match_operand:FMOVE128_GPR 1 "input_operand" ""))]

77247

+ "reload_completed

77248

+ && (int_reg_operand (operands[0], <MODE>mode)

77249

+ || int_reg_operand (operands[1], <MODE>mode))"

77250

+ [(pc)]

77251

+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; })

77252

+

77253

+;; Move SFmode to a VSX from a GPR register. Because scalar floating point

77254

+;; type is stored internally as double precision in the VSX registers, we have

77255

+;; to convert it from the vector format.

77256

+

77257

+(define_insn_and_split "reload_vsx_from_gprsf"

77258

+ [(set (match_operand:SF 0 "register_operand" "=wa")

77259

+ (unspec:SF [(match_operand:SF 1 "register_operand" "r")]

77260

+ UNSPEC_P8V_RELOAD_FROM_GPR))

77261

+ (clobber (match_operand:DI 2 "register_operand" "=r"))]

77262

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77263

+ "#"

77264

+ "&& reload_completed"

77265

+ [(const_int 0)]

77266

+{

77267

+ rtx op0 = operands[0];

77268

+ rtx op1 = operands[1];

77269

+ rtx op2 = operands[2];

77270

+ rtx op0_di = simplify_gen_subreg (DImode, op0, SFmode, 0);

77271

+ rtx op1_di = simplify_gen_subreg (DImode, op1, SFmode, 0);

77272

+

77273

+ /* Move SF value to upper 32-bits for xscvspdpn. */

77274

+ emit_insn (gen_ashldi3 (op2, op1_di, GEN_INT (32)));

77275

+ emit_move_insn (op0_di, op2);

77276

+ emit_insn (gen_vsx_xscvspdpn_directmove (op0, op0));

77277

+ DONE;

77278

+}

77279

+ [(set_attr "length" "8")

77280

+ (set_attr "type" "two")])

77281

+

77282

+;; Move 128 bit values from VSX registers to GPRs in 64-bit mode by doing a

77283

+;; normal 64-bit move, followed by an xxpermdi to get the bottom 64-bit value,

77284

+;; and then doing a move of that.

77285

+(define_insn "p8_mfvsrd_3_<mode>"

77286

+ [(set (match_operand:DF 0 "register_operand" "=r")

77287

+ (unspec:DF [(match_operand:FMOVE128_GPR 1 "register_operand" "wa")]

77288

+ UNSPEC_P8V_RELOAD_FROM_VSX))]

77289

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77290

+ "mfvsrd %0,%x1"

77291

+ [(set_attr "type" "mftgpr")])

77292

+

77293

+(define_insn_and_split "reload_gpr_from_vsx<mode>"

77294

+ [(set (match_operand:FMOVE128_GPR 0 "register_operand" "=r")

77295

+ (unspec:FMOVE128_GPR

77296

+ [(match_operand:FMOVE128_GPR 1 "register_operand" "wa")]

77297

+ UNSPEC_P8V_RELOAD_FROM_VSX))

77298

+ (clobber (match_operand:FMOVE128_GPR 2 "register_operand" "=wa"))]

77299

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77300

+ "#"

77301

+ "&& reload_completed"

77302

+ [(const_int 0)]

77303

+{

77304

+ rtx dest = operands[0];

77305

+ rtx src = operands[1];

77306

+ rtx tmp = operands[2];

77307

+ rtx gpr_hi_reg = gen_highpart (DFmode, dest);

77308

+ rtx gpr_lo_reg = gen_lowpart (DFmode, dest);

77309

+

77310

+ emit_insn (gen_p8_mfvsrd_3_<mode> (gpr_hi_reg, src));

77311

+ emit_insn (gen_vsx_xxpermdi_<mode> (tmp, src, src, GEN_INT (3)));

77312

+ emit_insn (gen_p8_mfvsrd_3_<mode> (gpr_lo_reg, tmp));

77313

+}

77314

+ [(set_attr "length" "12")

77315

+ (set_attr "type" "three")])

77316

+

77317

+;; Move SFmode to a GPR from a VSX register. Because scalar floating point

77318

+;; type is stored internally as double precision, we have to convert it to the

77319

+;; vector format.

77320

+

77321

+(define_insn_and_split "reload_gpr_from_vsxsf"

77322

+ [(set (match_operand:SF 0 "register_operand" "=r")

77323

+ (unspec:SF [(match_operand:SF 1 "register_operand" "wa")]

77324

+ UNSPEC_P8V_RELOAD_FROM_VSX))

77325

+ (clobber (match_operand:V4SF 2 "register_operand" "=wa"))]

77326

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77327

+ "#"

77328

+ "&& reload_completed"

77329

+ [(const_int 0)]

77330

+{

77331

+ rtx op0 = operands[0];

77332

+ rtx op1 = operands[1];

77333

+ rtx op2 = operands[2];

77334

+ rtx diop0 = simplify_gen_subreg (DImode, op0, SFmode, 0);

77335

+

77336

+ emit_insn (gen_vsx_xscvdpspn_scalar (op2, op1));

77337

+ emit_insn (gen_p8_mfvsrd_4_disf (diop0, op2));

77338

+ emit_insn (gen_lshrdi3 (diop0, diop0, GEN_INT (32)));

77339

+ DONE;

77340

+}

77341

+ [(set_attr "length" "12")

77342

+ (set_attr "type" "three")])

77343

+

77344

+(define_insn "p8_mfvsrd_4_disf"

77345

+ [(set (match_operand:DI 0 "register_operand" "=r")

77346

+ (unspec:DI [(match_operand:V4SF 1 "register_operand" "wa")]

77347

+ UNSPEC_P8V_RELOAD_FROM_VSX))]

77348

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

77349

+ "mfvsrd %0,%x1"

77350

+ [(set_attr "type" "mftgpr")])

77351

+

77352

+

77353

;; Next come the multi-word integer load and store and the load and store

77354

;; multiple insns.

77355

77356

@@ -8565,8 +10205,8 @@

77357

;; Use of fprs is disparaged slightly otherwise reload prefers to reload

77358

;; a gpr into a fpr instead of reloading an invalid 'Y' address

77359

(define_insn "*movdi_internal32"

77360

- [(set (match_operand:DI 0 "rs6000_nonimmediate_operand" "=Y,r,r,?m,?*d,?*d,r,?wa")

77361

- (match_operand:DI 1 "input_operand" "r,Y,r,d,m,d,IJKnGHF,O"))]

77362

+ [(set (match_operand:DI 0 "rs6000_nonimmediate_operand" "=Y,r,r,?m,?*d,?*d,r")

77363

+ (match_operand:DI 1 "input_operand" "r,Y,r,d,m,d,IJKnGHF"))]

77364

"! TARGET_POWERPC64

77365

&& (gpc_reg_operand (operands[0], DImode)

77366

|| gpc_reg_operand (operands[1], DImode))"

77367

@@ -8577,15 +10217,34 @@

77368

stfd%U0%X0 %1,%0

77369

lfd%U1%X1 %0,%1

77370

fmr %0,%1

77371

- #

77372

- xxlxor %x0,%x0,%x0"

77373

- [(set_attr "type" "store,load,*,fpstore,fpload,fp,*,vecsimple")])

77374

+ #"

77375

+ [(set_attr_alternative "type"

77376

+ [(const_string "store")

77377

+ (const_string "load")

77378

+ (const_string "*")

77379

+ (if_then_else

77380

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

77381

+ (const_string "fpstore_ux")

77382

+ (if_then_else

77383

+ (match_test "update_address_mem (operands[0], VOIDmode)")

77384

+ (const_string "fpstore_u")

77385

+ (const_string "fpstore")))

77386

+ (if_then_else

77387

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

77388

+ (const_string "fpload_ux")

77389

+ (if_then_else

77390

+ (match_test "update_address_mem (operands[1], VOIDmode)")

77391

+ (const_string "fpload_u")

77392

+ (const_string "fpload")))

77393

+ (const_string "fp")

77394

+ (const_string "*")])])

77395

77396

(define_split

77397

[(set (match_operand:DI 0 "gpc_reg_operand" "")

77398

(match_operand:DI 1 "const_int_operand" ""))]

77399

"! TARGET_POWERPC64 && reload_completed

77400

- && gpr_or_gpr_p (operands[0], operands[1])"

77401

+ && gpr_or_gpr_p (operands[0], operands[1])

77402

+ && !direct_move_p (operands[0], operands[1])"

77403

[(set (match_dup 2) (match_dup 4))

77404

(set (match_dup 3) (match_dup 1))]

77405

"

77406

@@ -8607,14 +10266,15 @@

77407

[(set (match_operand:DIFD 0 "rs6000_nonimmediate_operand" "")

77408

(match_operand:DIFD 1 "input_operand" ""))]

77409

"reload_completed && !TARGET_POWERPC64

77410

- && gpr_or_gpr_p (operands[0], operands[1])"

77411

+ && gpr_or_gpr_p (operands[0], operands[1])

77412

+ && !direct_move_p (operands[0], operands[1])"

77413

[(pc)]

77414

{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; })

77415

77416

-(define_insn "*movdi_mfpgpr"

77417

- [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,r,?*d")

77418

- (match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,*d,r"))]

77419

- "TARGET_POWERPC64 && TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS

77420

+(define_insn "*movdi_internal64"

77421

+ [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,r,?*wg,r,?*wm")

77422

+ (match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,*wg,r,*wm,r"))]

77423

+ "TARGET_POWERPC64

77424

&& (gpc_reg_operand (operands[0], DImode)

77425

|| gpc_reg_operand (operands[1], DImode))"

77426

"@

77427

@@ -8631,33 +10291,52 @@

77428

mt%0 %1

77429

nop

77430

mftgpr %0,%1

77431

- mffgpr %0,%1"

77432

- [(set_attr "type" "store,load,*,*,*,*,fpstore,fpload,fp,mfjmpr,mtjmpr,*,mftgpr,mffgpr")

77433

- (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4,4")])

77434

+ mffgpr %0,%1

77435

+ mfvsrd %0,%x1

77436

+ mtvsrd %x0,%1"

77437

+ [(set_attr_alternative "type"

77438

+ [(if_then_else

77439

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

77440

+ (const_string "store_ux")

77441

+ (if_then_else

77442

+ (match_test "update_address_mem (operands[0], VOIDmode)")

77443

+ (const_string "store_u")

77444

+ (const_string "store")))

77445

+ (if_then_else

77446

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

77447

+ (const_string "load_ux")

77448

+ (if_then_else

77449

+ (match_test "update_address_mem (operands[1], VOIDmode)")

77450

+ (const_string "load_u")

77451

+ (const_string "load")))

77452

+ (const_string "*")

77453

+ (const_string "*")

77454

+ (const_string "*")

77455

+ (const_string "*")

77456

+ (if_then_else

77457

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

77458

+ (const_string "fpstore_ux")

77459

+ (if_then_else

77460

+ (match_test "update_address_mem (operands[0], VOIDmode)")

77461

+ (const_string "fpstore_u")

77462

+ (const_string "fpstore")))

77463

+ (if_then_else

77464

+ (match_test "update_indexed_address_mem (operands[1], VOIDmode)")

77465

+ (const_string "fpload_ux")

77466

+ (if_then_else

77467

+ (match_test "update_address_mem (operands[1], VOIDmode)")

77468

+ (const_string "fpload_u")

77469

+ (const_string "fpload")))

77470

+ (const_string "fp")

77471

+ (const_string "mfjmpr")

77472

+ (const_string "mtjmpr")

77473

+ (const_string "*")

77474

+ (const_string "mftgpr")

77475

+ (const_string "mffgpr")

77476

+ (const_string "mftgpr")

77477

+ (const_string "mffgpr")])

77478

+ (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4,4,4,4")])

77479

77480

-(define_insn "*movdi_internal64"

77481

- [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,?wa")

77482

- (match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,O"))]

77483

- "TARGET_POWERPC64 && (!TARGET_MFPGPR || !TARGET_HARD_FLOAT || !TARGET_FPRS)

77484

- && (gpc_reg_operand (operands[0], DImode)

77485

- || gpc_reg_operand (operands[1], DImode))"

77486

- "@

77487

- std%U0%X0 %1,%0

77488

- ld%U1%X1 %0,%1

77489

- mr %0,%1

77490

- li %0,%1

77491

- lis %0,%v1

77492

- #

77493

- stfd%U0%X0 %1,%0

77494

- lfd%U1%X1 %0,%1

77495

- fmr %0,%1

77496

- mf%1 %0

77497

- mt%0 %1

77498

- nop

77499

- xxlxor %x0,%x0,%x0"

77500

- [(set_attr "type" "store,load,*,*,*,*,fpstore,fpload,fp,mfjmpr,mtjmpr,*,vecsimple")

77501

- (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4")])

77502

-

77503

;; immediate value valid for a single instruction hiding in a const_double

77504

(define_insn ""

77505

[(set (match_operand:DI 0 "gpc_reg_operand" "=r")

77506

@@ -8719,14 +10398,16 @@

77507

FAIL;

77508

}")

77509

77510

-;; TImode is similar, except that we usually want to compute the address into

77511

-;; a register and use lsi/stsi (the exception is during reload).

77512

+;; TImode/PTImode is similar, except that we usually want to compute the

77513

+;; address into a register and use lsi/stsi (the exception is during reload).

77514

77515

-(define_insn "*movti_string"

77516

- [(set (match_operand:TI 0 "reg_or_mem_operand" "=Q,Y,????r,????r,????r,r")

77517

- (match_operand:TI 1 "input_operand" "r,r,Q,Y,r,n"))]

77518

+(define_insn "*mov<mode>_string"

77519

+ [(set (match_operand:TI2 0 "reg_or_mem_operand" "=Q,Y,????r,????r,????r,r")

77520

+ (match_operand:TI2 1 "input_operand" "r,r,Q,Y,r,n"))]

77521

"! TARGET_POWERPC64

77522

- && (gpc_reg_operand (operands[0], TImode) || gpc_reg_operand (operands[1], TImode))"

77523

+ && (<MODE>mode != TImode || VECTOR_MEM_NONE_P (TImode))

77524

+ && (gpc_reg_operand (operands[0], <MODE>mode)

77525

+ || gpc_reg_operand (operands[1], <MODE>mode))"

77526

"*

77527

{

77528

switch (which_alternative)

77529

@@ -8756,27 +10437,32 @@

77530

(const_string "always")

77531

(const_string "conditional")))])

77532

77533

-(define_insn "*movti_ppc64"

77534

- [(set (match_operand:TI 0 "nonimmediate_operand" "=Y,r,r")

77535

- (match_operand:TI 1 "input_operand" "r,Y,r"))]

77536

- "(TARGET_POWERPC64 && (gpc_reg_operand (operands[0], TImode)

77537

- || gpc_reg_operand (operands[1], TImode)))

77538

- && VECTOR_MEM_NONE_P (TImode)"

77539

- "#"

77540

- [(set_attr "type" "store,load,*")])

77541

+(define_insn "*mov<mode>_ppc64"

77542

+ [(set (match_operand:TI2 0 "nonimmediate_operand" "=wQ,Y,r,r,r,r")

77543

+ (match_operand:TI2 1 "input_operand" "r,r,wQ,Y,r,n"))]

77544

+ "(TARGET_POWERPC64 && VECTOR_MEM_NONE_P (<MODE>mode)

77545

+ && (gpc_reg_operand (operands[0], <MODE>mode)

77546

+ || gpc_reg_operand (operands[1], <MODE>mode)))"

77547

+{

77548

+ return rs6000_output_move_128bit (operands);

77549

+}

77550

+ [(set_attr "type" "store,store,load,load,*,*")

77551

+ (set_attr "length" "8")])

77552

77553

(define_split

77554

- [(set (match_operand:TI 0 "gpc_reg_operand" "")

77555

- (match_operand:TI 1 "const_double_operand" ""))]

77556

- "TARGET_POWERPC64 && VECTOR_MEM_NONE_P (TImode)"

77557

+ [(set (match_operand:TI2 0 "int_reg_operand" "")

77558

+ (match_operand:TI2 1 "const_double_operand" ""))]

77559

+ "TARGET_POWERPC64

77560

+ && (VECTOR_MEM_NONE_P (<MODE>mode)

77561

+ || (reload_completed && INT_REGNO_P (REGNO (operands[0]))))"

77562

[(set (match_dup 2) (match_dup 4))

77563

(set (match_dup 3) (match_dup 5))]

77564

"

77565

{

77566

operands[2] = operand_subword_force (operands[0], WORDS_BIG_ENDIAN == 0,

77567

- TImode);

77568

+ <MODE>mode);

77569

operands[3] = operand_subword_force (operands[0], WORDS_BIG_ENDIAN != 0,

77570

- TImode);

77571

+ <MODE>mode);

77572

if (GET_CODE (operands[1]) == CONST_DOUBLE)

77573

{

77574

operands[4] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));

77575

@@ -8792,10 +10478,12 @@

77576

}")

77577

77578

(define_split

77579

- [(set (match_operand:TI 0 "nonimmediate_operand" "")

77580

- (match_operand:TI 1 "input_operand" ""))]

77581

- "reload_completed && VECTOR_MEM_NONE_P (TImode)

77582

- && gpr_or_gpr_p (operands[0], operands[1])"

77583

+ [(set (match_operand:TI2 0 "nonimmediate_operand" "")

77584

+ (match_operand:TI2 1 "input_operand" ""))]

77585

+ "reload_completed

77586

+ && gpr_or_gpr_p (operands[0], operands[1])

77587

+ && !direct_move_p (operands[0], operands[1])

77588

+ && !quad_load_store_p (operands[0], operands[1])"

77589

[(pc)]

77590

{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; })

77591

77592

@@ -9651,7 +11339,7 @@

77593

(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

77594

UNSPEC_TLSGD)

77595

(clobber (reg:SI LR_REGNO))]

77596

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX"

77597

+ "HAVE_AS_TLS && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

77598

{

77599

if (TARGET_CMODEL != CMODEL_SMALL)

77600

return "addis %0,%1,%2@got@tlsgd@ha\;addi %0,%0,%2@got@tlsgd@l\;"

77601

@@ -9723,7 +11411,7 @@

77602

(unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGD)))

77603

(set (match_dup 0)

77604

(lo_sum:TLSmode (match_dup 3)

77605

- (unspec:TLSmode [(match_dup 2)] UNSPEC_TLSGD)))]

77606

+ (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGD)))]

77607

"

77608

{

77609

operands[3] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

77610

@@ -9746,7 +11434,8 @@

77611

(define_insn "*tls_gd_low<TLSmode:tls_abi_suffix>"

77612

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=b")

77613

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

77614

- (unspec:TLSmode [(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

77615

+ (unspec:TLSmode [(match_operand:TLSmode 3 "gpc_reg_operand" "b")

77616

+ (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

77617

UNSPEC_TLSGD)))]

77618

"HAVE_AS_TLS && TARGET_TLS_MARKERS && TARGET_CMODEL != CMODEL_SMALL"

77619

"addi %0,%1,%2@got@tlsgd@l"

77620

@@ -9759,7 +11448,8 @@

77621

(unspec:TLSmode [(match_operand:TLSmode 3 "rs6000_tls_symbol_ref" "")]

77622

UNSPEC_TLSGD)

77623

(clobber (reg:SI LR_REGNO))]

77624

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX && TARGET_TLS_MARKERS"

77625

+ "HAVE_AS_TLS && TARGET_TLS_MARKERS

77626

+ && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

77627

"bl %z1(%3@tlsgd)\;nop"

77628

[(set_attr "type" "branch")

77629

(set_attr "length" "8")])

77630

@@ -9791,7 +11481,7 @@

77631

(unspec:TLSmode [(match_operand:TLSmode 1 "gpc_reg_operand" "b")]

77632

UNSPEC_TLSLD)

77633

(clobber (reg:SI LR_REGNO))]

77634

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX"

77635

+ "HAVE_AS_TLS && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

77636

{

77637

if (TARGET_CMODEL != CMODEL_SMALL)

77638

return "addis %0,%1,%&@got@tlsld@ha\;addi %0,%0,%&@got@tlsld@l\;"

77639

@@ -9858,7 +11548,7 @@

77640

(unspec:TLSmode [(const_int 0) (match_dup 1)] UNSPEC_TLSLD)))

77641

(set (match_dup 0)

77642

(lo_sum:TLSmode (match_dup 2)

77643

- (unspec:TLSmode [(const_int 0)] UNSPEC_TLSLD)))]

77644

+ (unspec:TLSmode [(const_int 0) (match_dup 1)] UNSPEC_TLSLD)))]

77645

"

77646

{

77647

operands[2] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

77648

@@ -9881,7 +11571,9 @@

77649

(define_insn "*tls_ld_low<TLSmode:tls_abi_suffix>"

77650

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=b")

77651

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

77652

- (unspec:TLSmode [(const_int 0)] UNSPEC_TLSLD)))]

77653

+ (unspec:TLSmode [(const_int 0)

77654

+ (match_operand:TLSmode 2 "gpc_reg_operand" "b")]

77655

+ UNSPEC_TLSLD)))]

77656

"HAVE_AS_TLS && TARGET_TLS_MARKERS && TARGET_CMODEL != CMODEL_SMALL"

77657

"addi %0,%1,%&@got@tlsld@l"

77658

[(set_attr "length" "4")])

77659

@@ -9892,7 +11584,8 @@

77660

(match_operand 2 "" "g")))

77661

(unspec:TLSmode [(const_int 0)] UNSPEC_TLSLD)

77662

(clobber (reg:SI LR_REGNO))]

77663

- "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX && TARGET_TLS_MARKERS"

77664

+ "HAVE_AS_TLS && TARGET_TLS_MARKERS

77665

+ && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)"

77666

"bl %z1(%&@tlsld)\;nop"

77667

[(set_attr "type" "branch")

77668

(set_attr "length" "8")])

77669

@@ -9953,7 +11646,7 @@

77670

(unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTDTPREL)))

77671

(set (match_dup 0)

77672

(lo_sum:TLSmode (match_dup 3)

77673

- (unspec:TLSmode [(match_dup 2)] UNSPEC_TLSGOTDTPREL)))]

77674

+ (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTDTPREL)))]

77675

"

77676

{

77677

operands[3] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

77678

@@ -9976,7 +11669,8 @@

77679

(define_insn "*tls_got_dtprel_low<TLSmode:tls_abi_suffix>"

77680

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=r")

77681

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

77682

- (unspec:TLSmode [(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

77683

+ (unspec:TLSmode [(match_operand:TLSmode 3 "gpc_reg_operand" "b")

77684

+ (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

77685

UNSPEC_TLSGOTDTPREL)))]

77686

"HAVE_AS_TLS && TARGET_CMODEL != CMODEL_SMALL"

77687

"l<TLSmode:tls_insn_suffix> %0,%2@got@dtprel@l(%1)"

77688

@@ -10022,7 +11716,7 @@

77689

(unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))

77690

(set (match_dup 0)

77691

(lo_sum:TLSmode (match_dup 3)

77692

- (unspec:TLSmode [(match_dup 2)] UNSPEC_TLSGOTTPREL)))]

77693

+ (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))]

77694

"

77695

{

77696

operands[3] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);

77697

@@ -10045,7 +11739,8 @@

77698

(define_insn "*tls_got_tprel_low<TLSmode:tls_abi_suffix>"

77699

[(set (match_operand:TLSmode 0 "gpc_reg_operand" "=r")

77700

(lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")

77701

- (unspec:TLSmode [(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

77702

+ (unspec:TLSmode [(match_operand:TLSmode 3 "gpc_reg_operand" "b")

77703

+ (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]

77704

UNSPEC_TLSGOTTPREL)))]

77705

"HAVE_AS_TLS && TARGET_CMODEL != CMODEL_SMALL"

77706

"l<TLSmode:tls_insn_suffix> %0,%2@got@tprel@l(%1)"

77707

@@ -10261,7 +11956,7 @@

77708

[(parallel [(set (match_operand:SI 0 "gpc_reg_operand" "=r")

77709

(unspec:SI [(const_int 0)] UNSPEC_TOC))

77710

(use (reg:SI 2))])]

77711

- "DEFAULT_ABI == ABI_AIX && TARGET_32BIT"

77712

+ "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_32BIT"

77713

"*

77714

{

77715

char buf[30];

77716

@@ -10276,7 +11971,7 @@

77717

[(parallel [(set (match_operand:DI 0 "gpc_reg_operand" "=r")

77718

(unspec:DI [(const_int 0)] UNSPEC_TOC))

77719

(use (reg:DI 2))])]

77720

- "DEFAULT_ABI == ABI_AIX && TARGET_64BIT"

77721

+ "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_64BIT"

77722

"*

77723

{

77724

char buf[30];

77725

@@ -10306,7 +12001,7 @@

77726

[(parallel [(set (reg:SI LR_REGNO)

77727

(match_operand:SI 0 "immediate_operand" "s"))

77728

(use (unspec [(match_dup 0)] UNSPEC_TOC))])]

77729

- "TARGET_ELF && DEFAULT_ABI != ABI_AIX

77730

+ "TARGET_ELF && DEFAULT_ABI == ABI_V4

77731

&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"

77732

"")

77733

77734

@@ -10314,7 +12009,7 @@

77735

[(set (reg:SI LR_REGNO)

77736

(match_operand:SI 0 "immediate_operand" "s"))

77737

(use (unspec [(match_dup 0)] UNSPEC_TOC))]

77738

- "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX

77739

+ "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4

77740

&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"

77741

"bcl 20,31,%0\\n%0:"

77742

[(set_attr "type" "branch")

77743

@@ -10324,7 +12019,7 @@

77744

[(set (reg:SI LR_REGNO)

77745

(match_operand:SI 0 "immediate_operand" "s"))

77746

(use (unspec [(match_dup 0)] UNSPEC_TOC))]

77747

- "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX

77748

+ "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4

77749

&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"

77750

"*

77751

{

77752

@@ -10344,7 +12039,7 @@

77753

(label_ref (match_operand 1 "" ""))]

77754

UNSPEC_TOCPTR))

77755

(match_dup 1)])]

77756

- "TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

77757

+ "TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

77758

"")

77759

77760

(define_insn "load_toc_v4_PIC_1b_normal"

77761

@@ -10353,7 +12048,7 @@

77762

(label_ref (match_operand 1 "" ""))]

77763

UNSPEC_TOCPTR))

77764

(match_dup 1)]

77765

- "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

77766

+ "!TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

77767

"bcl 20,31,$+8\;.long %0-$"

77768

[(set_attr "type" "branch")

77769

(set_attr "length" "8")])

77770

@@ -10364,7 +12059,7 @@

77771

(label_ref (match_operand 1 "" ""))]

77772

UNSPEC_TOCPTR))

77773

(match_dup 1)]

77774

- "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

77775

+ "TARGET_LINK_STACK && TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

77776

"*

77777

{

77778

char name[32];

77779

@@ -10382,7 +12077,7 @@

77780

(mem:SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")

77781

(minus:SI (match_operand:SI 2 "immediate_operand" "s")

77782

(match_operand:SI 3 "immediate_operand" "s")))))]

77783

- "TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"

77784

+ "TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 2"

77785

"lwz %0,%2-%3(%1)"

77786

[(set_attr "type" "load")])

77787

77788

@@ -10392,7 +12087,7 @@

77789

(high:SI

77790

(minus:SI (match_operand:SI 2 "symbol_ref_operand" "s")

77791

(match_operand:SI 3 "symbol_ref_operand" "s")))))]

77792

- "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic"

77793

+ "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI == ABI_V4 && flag_pic"

77794

"addis %0,%1,%2-%3@ha")

77795

77796

(define_insn "load_toc_v4_PIC_3c"

77797

@@ -10400,7 +12095,7 @@

77798

(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")

77799

(minus:SI (match_operand:SI 2 "symbol_ref_operand" "s")

77800

(match_operand:SI 3 "symbol_ref_operand" "s"))))]

77801

- "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic"

77802

+ "TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI == ABI_V4 && flag_pic"

77803

"addi %0,%1,%2-%3@l")

77804

77805

;; If the TOC is shared over a translation unit, as happens with all

77806

@@ -10542,8 +12237,13 @@

77807

77808

operands[0] = XEXP (operands[0], 0);

77809

77810

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

77811

+ {

77812

+ rs6000_call_aix (NULL_RTX, operands[0], operands[1], operands[2]);

77813

+ DONE;

77814

+ }

77815

+

77816

if (GET_CODE (operands[0]) != SYMBOL_REF

77817

- || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[0]))

77818

|| (DEFAULT_ABI != ABI_DARWIN && (INTVAL (operands[2]) & CALL_LONG) != 0))

77819

{

77820

if (INTVAL (operands[2]) & CALL_LONG)

77821

@@ -10556,12 +12256,6 @@

77822

operands[0] = force_reg (Pmode, operands[0]);

77823

break;

77824

77825

- case ABI_AIX:

77826

- /* AIX function pointers are really pointers to a three word

77827

- area. */

77828

- rs6000_call_indirect_aix (NULL_RTX, operands[0], operands[1]);

77829

- DONE;

77830

-

77831

default:

77832

gcc_unreachable ();

77833

}

77834

@@ -10587,8 +12281,13 @@

77835

77836

operands[1] = XEXP (operands[1], 0);

77837

77838

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

77839

+ {

77840

+ rs6000_call_aix (operands[0], operands[1], operands[2], operands[3]);

77841

+ DONE;

77842

+ }

77843

+

77844

if (GET_CODE (operands[1]) != SYMBOL_REF

77845

- || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[1]))

77846

|| (DEFAULT_ABI != ABI_DARWIN && (INTVAL (operands[3]) & CALL_LONG) != 0))

77847

{

77848

if (INTVAL (operands[3]) & CALL_LONG)

77849

@@ -10601,12 +12300,6 @@

77850

operands[1] = force_reg (Pmode, operands[1]);

77851

break;

77852

77853

- case ABI_AIX:

77854

- /* AIX function pointers are really pointers to a three word

77855

- area. */

77856

- rs6000_call_indirect_aix (operands[0], operands[1], operands[2]);

77857

- DONE;

77858

-

77859

default:

77860

gcc_unreachable ();

77861

}

77862

@@ -10698,136 +12391,7 @@

77863

[(set_attr "type" "branch")

77864

(set_attr "length" "4,8")])

77865

77866

-;; Call to indirect functions with the AIX abi using a 3 word descriptor.

77867

-;; Operand0 is the addresss of the function to call

77868

-;; Operand1 is the flag for System V.4 for unprototyped or FP registers

77869

-;; Operand2 is the location in the function descriptor to load r2 from

77870

-;; Operand3 is the stack location to hold the current TOC pointer

77871

77872

-(define_insn "call_indirect_aix<ptrsize>"

77873

- [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

77874

- (match_operand 1 "" "g,g"))

77875

- (use (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

77876

- (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

77877

- (use (reg:P STATIC_CHAIN_REGNUM))

77878

- (clobber (reg:P LR_REGNO))]

77879

- "DEFAULT_ABI == ABI_AIX && TARGET_POINTERS_TO_NESTED_FUNCTIONS"

77880

- "<ptrload> 2,%2\;b%T0l\;<ptrload> 2,%3"

77881

- [(set_attr "type" "jmpreg")

77882

- (set_attr "length" "12")])

77883

-

77884

-;; Like call_indirect_aix<ptrsize>, but no use of the static chain

77885

-;; Operand0 is the addresss of the function to call

77886

-;; Operand1 is the flag for System V.4 for unprototyped or FP registers

77887

-;; Operand2 is the location in the function descriptor to load r2 from

77888

-;; Operand3 is the stack location to hold the current TOC pointer

77889

-

77890

-(define_insn "call_indirect_aix<ptrsize>_nor11"

77891

- [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

77892

- (match_operand 1 "" "g,g"))

77893

- (use (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

77894

- (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

77895

- (clobber (reg:P LR_REGNO))]

77896

- "DEFAULT_ABI == ABI_AIX && !TARGET_POINTERS_TO_NESTED_FUNCTIONS"

77897

- "<ptrload> 2,%2\;b%T0l\;<ptrload> 2,%3"

77898

- [(set_attr "type" "jmpreg")

77899

- (set_attr "length" "12")])

77900

-

77901

-;; Operand0 is the return result of the function

77902

-;; Operand1 is the addresss of the function to call

77903

-;; Operand2 is the flag for System V.4 for unprototyped or FP registers

77904

-;; Operand3 is the location in the function descriptor to load r2 from

77905

-;; Operand4 is the stack location to hold the current TOC pointer

77906

-

77907

-(define_insn "call_value_indirect_aix<ptrsize>"

77908

- [(set (match_operand 0 "" "")

77909

- (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

77910

- (match_operand 2 "" "g,g")))

77911

- (use (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

77912

- (set (reg:P TOC_REGNUM) (match_operand:P 4 "memory_operand" "<ptrm>,<ptrm>"))

77913

- (use (reg:P STATIC_CHAIN_REGNUM))

77914

- (clobber (reg:P LR_REGNO))]

77915

- "DEFAULT_ABI == ABI_AIX && TARGET_POINTERS_TO_NESTED_FUNCTIONS"

77916

- "<ptrload> 2,%3\;b%T1l\;<ptrload> 2,%4"

77917

- [(set_attr "type" "jmpreg")

77918

- (set_attr "length" "12")])

77919

-

77920

-;; Like call_value_indirect_aix<ptrsize>, but no use of the static chain

77921

-;; Operand0 is the return result of the function

77922

-;; Operand1 is the addresss of the function to call

77923

-;; Operand2 is the flag for System V.4 for unprototyped or FP registers

77924

-;; Operand3 is the location in the function descriptor to load r2 from

77925

-;; Operand4 is the stack location to hold the current TOC pointer

77926

-

77927

-(define_insn "call_value_indirect_aix<ptrsize>_nor11"

77928

- [(set (match_operand 0 "" "")

77929

- (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

77930

- (match_operand 2 "" "g,g")))

77931

- (use (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

77932

- (set (reg:P TOC_REGNUM) (match_operand:P 4 "memory_operand" "<ptrm>,<ptrm>"))

77933

- (clobber (reg:P LR_REGNO))]

77934

- "DEFAULT_ABI == ABI_AIX && !TARGET_POINTERS_TO_NESTED_FUNCTIONS"

77935

- "<ptrload> 2,%3\;b%T1l\;<ptrload> 2,%4"

77936

- [(set_attr "type" "jmpreg")

77937

- (set_attr "length" "12")])

77938

-

77939

-;; Call to function which may be in another module. Restore the TOC

77940

-;; pointer (r2) after the call unless this is System V.

77941

-;; Operand2 is nonzero if we are using the V.4 calling sequence and

77942

-;; either the function was not prototyped, or it was prototyped as a

77943

-;; variable argument function. It is > 0 if FP registers were passed

77944

-;; and < 0 if they were not.

77945

-

77946

-(define_insn "*call_nonlocal_aix32"

77947

- [(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))

77948

- (match_operand 1 "" "g"))

77949

- (use (match_operand:SI 2 "immediate_operand" "O"))

77950

- (clobber (reg:SI LR_REGNO))]

77951

- "TARGET_32BIT

77952

- && DEFAULT_ABI == ABI_AIX

77953

- && (INTVAL (operands[2]) & CALL_LONG) == 0"

77954

- "bl %z0\;nop"

77955

- [(set_attr "type" "branch")

77956

- (set_attr "length" "8")])

77957

-

77958

-(define_insn "*call_nonlocal_aix64"

77959

- [(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))

77960

- (match_operand 1 "" "g"))

77961

- (use (match_operand:SI 2 "immediate_operand" "O"))

77962

- (clobber (reg:SI LR_REGNO))]

77963

- "TARGET_64BIT

77964

- && DEFAULT_ABI == ABI_AIX

77965

- && (INTVAL (operands[2]) & CALL_LONG) == 0"

77966

- "bl %z0\;nop"

77967

- [(set_attr "type" "branch")

77968

- (set_attr "length" "8")])

77969

-

77970

-(define_insn "*call_value_nonlocal_aix32"

77971

- [(set (match_operand 0 "" "")

77972

- (call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))

77973

- (match_operand 2 "" "g")))

77974

- (use (match_operand:SI 3 "immediate_operand" "O"))

77975

- (clobber (reg:SI LR_REGNO))]

77976

- "TARGET_32BIT

77977

- && DEFAULT_ABI == ABI_AIX

77978

- && (INTVAL (operands[3]) & CALL_LONG) == 0"

77979

- "bl %z1\;nop"

77980

- [(set_attr "type" "branch")

77981

- (set_attr "length" "8")])

77982

-

77983

-(define_insn "*call_value_nonlocal_aix64"

77984

- [(set (match_operand 0 "" "")

77985

- (call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))

77986

- (match_operand 2 "" "g")))

77987

- (use (match_operand:SI 3 "immediate_operand" "O"))

77988

- (clobber (reg:SI LR_REGNO))]

77989

- "TARGET_64BIT

77990

- && DEFAULT_ABI == ABI_AIX

77991

- && (INTVAL (operands[3]) & CALL_LONG) == 0"

77992

- "bl %z1\;nop"

77993

- [(set_attr "type" "branch")

77994

- (set_attr "length" "8")])

77995

-

77996

;; A function pointer under System V is just a normal pointer

77997

;; operands[0] is the function pointer

77998

;; operands[1] is the stack size to clean up

77999

@@ -11009,6 +12573,104 @@

78000

[(set_attr "type" "branch,branch")

78001

(set_attr "length" "4,8")])

78002

78003

+

78004

+;; Call to AIX abi function in the same module.

78005

+

78006

+(define_insn "*call_local_aix<mode>"

78007

+ [(call (mem:SI (match_operand:P 0 "current_file_function_operand" "s"))

78008

+ (match_operand 1 "" "g"))

78009

+ (clobber (reg:P LR_REGNO))]

78010

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

78011

+ "bl %z0"

78012

+ [(set_attr "type" "branch")

78013

+ (set_attr "length" "4")])

78014

+

78015

+(define_insn "*call_value_local_aix<mode>"

78016

+ [(set (match_operand 0 "" "")

78017

+ (call (mem:SI (match_operand:P 1 "current_file_function_operand" "s"))

78018

+ (match_operand 2 "" "g")))

78019

+ (clobber (reg:P LR_REGNO))]

78020

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

78021

+ "bl %z1"

78022

+ [(set_attr "type" "branch")

78023

+ (set_attr "length" "4")])

78024

+

78025

+;; Call to AIX abi function which may be in another module.

78026

+;; Restore the TOC pointer (r2) after the call.

78027

+

78028

+(define_insn "*call_nonlocal_aix<mode>"

78029

+ [(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s"))

78030

+ (match_operand 1 "" "g"))

78031

+ (clobber (reg:P LR_REGNO))]

78032

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

78033

+ "bl %z0\;nop"

78034

+ [(set_attr "type" "branch")

78035

+ (set_attr "length" "8")])

78036

+

78037

+(define_insn "*call_value_nonlocal_aix<mode>"

78038

+ [(set (match_operand 0 "" "")

78039

+ (call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s"))

78040

+ (match_operand 2 "" "g")))

78041

+ (clobber (reg:P LR_REGNO))]

78042

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

78043

+ "bl %z1\;nop"

78044

+ [(set_attr "type" "branch")

78045

+ (set_attr "length" "8")])

78046

+

78047

+;; Call to indirect functions with the AIX abi using a 3 word descriptor.

78048

+;; Operand0 is the addresss of the function to call

78049

+;; Operand2 is the location in the function descriptor to load r2 from

78050

+;; Operand3 is the stack location to hold the current TOC pointer

78051

+

78052

+(define_insn "*call_indirect_aix<mode>"

78053

+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

78054

+ (match_operand 1 "" "g,g"))

78055

+ (use (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

78056

+ (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

78057

+ (clobber (reg:P LR_REGNO))]

78058

+ "DEFAULT_ABI == ABI_AIX"

78059

+ "<ptrload> 2,%2\;b%T0l\;<ptrload> 2,%3"

78060

+ [(set_attr "type" "jmpreg")

78061

+ (set_attr "length" "12")])

78062

+

78063

+(define_insn "*call_value_indirect_aix<mode>"

78064

+ [(set (match_operand 0 "" "")

78065

+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

78066

+ (match_operand 2 "" "g,g")))

78067

+ (use (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

78068

+ (set (reg:P TOC_REGNUM) (match_operand:P 4 "memory_operand" "<ptrm>,<ptrm>"))

78069

+ (clobber (reg:P LR_REGNO))]

78070

+ "DEFAULT_ABI == ABI_AIX"

78071

+ "<ptrload> 2,%3\;b%T1l\;<ptrload> 2,%4"

78072

+ [(set_attr "type" "jmpreg")

78073

+ (set_attr "length" "12")])

78074

+

78075

+;; Call to indirect functions with the ELFv2 ABI.

78076

+;; Operand0 is the addresss of the function to call

78077

+;; Operand2 is the stack location to hold the current TOC pointer

78078

+

78079

+(define_insn "*call_indirect_elfv2<mode>"

78080

+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))

78081

+ (match_operand 1 "" "g,g"))

78082

+ (set (reg:P TOC_REGNUM) (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>"))

78083

+ (clobber (reg:P LR_REGNO))]

78084

+ "DEFAULT_ABI == ABI_ELFv2"

78085

+ "b%T0l\;<ptrload> 2,%2"

78086

+ [(set_attr "type" "jmpreg")

78087

+ (set_attr "length" "8")])

78088

+

78089

+(define_insn "*call_value_indirect_elfv2<mode>"

78090

+ [(set (match_operand 0 "" "")

78091

+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))

78092

+ (match_operand 2 "" "g,g")))

78093

+ (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>"))

78094

+ (clobber (reg:P LR_REGNO))]

78095

+ "DEFAULT_ABI == ABI_ELFv2"

78096

+ "b%T1l\;<ptrload> 2,%3"

78097

+ [(set_attr "type" "jmpreg")

78098

+ (set_attr "length" "8")])

78099

+

78100

+

78101

;; Call subroutine returning any type.

78102

(define_expand "untyped_call"

78103

[(parallel [(call (match_operand 0 "" "")

78104

@@ -11056,8 +12718,41 @@

78105

gcc_assert (GET_CODE (operands[1]) == CONST_INT);

78106

78107

operands[0] = XEXP (operands[0], 0);

78108

+

78109

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

78110

+ {

78111

+ rs6000_sibcall_aix (NULL_RTX, operands[0], operands[1], operands[2]);

78112

+ DONE;

78113

+ }

78114

}")

78115

78116

+(define_expand "sibcall_value"

78117

+ [(parallel [(set (match_operand 0 "register_operand" "")

78118

+ (call (mem:SI (match_operand 1 "address_operand" ""))

78119

+ (match_operand 2 "" "")))

78120

+ (use (match_operand 3 "" ""))

78121

+ (use (reg:SI LR_REGNO))

78122

+ (simple_return)])]

78123

+ ""

78124

+ "

78125

+{

78126

+#if TARGET_MACHO

78127

+ if (MACHOPIC_INDIRECT)

78128

+ operands[1] = machopic_indirect_call_target (operands[1]);

78129

+#endif

78130

+

78131

+ gcc_assert (GET_CODE (operands[1]) == MEM);

78132

+ gcc_assert (GET_CODE (operands[2]) == CONST_INT);

78133

+

78134

+ operands[1] = XEXP (operands[1], 0);

78135

+

78136

+ if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

78137

+ {

78138

+ rs6000_sibcall_aix (operands[0], operands[1], operands[2], operands[3]);

78139

+ DONE;

78140

+ }

78141

+}")

78142

+

78143

;; this and similar patterns must be marked as using LR, otherwise

78144

;; dataflow will try to delete the store into it. This is true

78145

;; even when the actual reg to jump to is in CTR, when LR was

78146

@@ -11123,7 +12818,6 @@

78147

[(set_attr "type" "branch")

78148

(set_attr "length" "4,8")])

78149

78150

-

78151

(define_insn "*sibcall_value_local64"

78152

[(set (match_operand 0 "" "")

78153

(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))

78154

@@ -11145,35 +12839,6 @@

78155

[(set_attr "type" "branch")

78156

(set_attr "length" "4,8")])

78157

78158

-(define_insn "*sibcall_nonlocal_aix<mode>"

78159

- [(call (mem:SI (match_operand:P 0 "call_operand" "s,c"))

78160

- (match_operand 1 "" "g,g"))

78161

- (use (match_operand:SI 2 "immediate_operand" "O,O"))

78162

- (use (reg:SI LR_REGNO))

78163

- (simple_return)]

78164

- "DEFAULT_ABI == ABI_AIX

78165

- && (INTVAL (operands[2]) & CALL_LONG) == 0"

78166

- "@

78167

- b %z0

78168

- b%T0"

78169

- [(set_attr "type" "branch")

78170

- (set_attr "length" "4")])

78171

-

78172

-(define_insn "*sibcall_value_nonlocal_aix<mode>"

78173

- [(set (match_operand 0 "" "")

78174

- (call (mem:SI (match_operand:P 1 "call_operand" "s,c"))

78175

- (match_operand 2 "" "g,g")))

78176

- (use (match_operand:SI 3 "immediate_operand" "O,O"))

78177

- (use (reg:SI LR_REGNO))

78178

- (simple_return)]

78179

- "DEFAULT_ABI == ABI_AIX

78180

- && (INTVAL (operands[3]) & CALL_LONG) == 0"

78181

- "@

78182

- b %z1

78183

- b%T1"

78184

- [(set_attr "type" "branch")

78185

- (set_attr "length" "4")])

78186

-

78187

(define_insn "*sibcall_nonlocal_sysv<mode>"

78188

[(call (mem:SI (match_operand:P 0 "call_operand" "s,s,c,c"))

78189

(match_operand 1 "" ""))

78190

@@ -11204,27 +12869,6 @@

78191

[(set_attr "type" "branch")

78192

(set_attr "length" "4,8,4,8")])

78193

78194

-(define_expand "sibcall_value"

78195

- [(parallel [(set (match_operand 0 "register_operand" "")

78196

- (call (mem:SI (match_operand 1 "address_operand" ""))

78197

- (match_operand 2 "" "")))

78198

- (use (match_operand 3 "" ""))

78199

- (use (reg:SI LR_REGNO))

78200

- (simple_return)])]

78201

- ""

78202

- "

78203

-{

78204

-#if TARGET_MACHO

78205

- if (MACHOPIC_INDIRECT)

78206

- operands[1] = machopic_indirect_call_target (operands[1]);

78207

-#endif

78208

-

78209

- gcc_assert (GET_CODE (operands[1]) == MEM);

78210

- gcc_assert (GET_CODE (operands[2]) == CONST_INT);

78211

-

78212

- operands[1] = XEXP (operands[1], 0);

78213

-}")

78214

-

78215

(define_insn "*sibcall_value_nonlocal_sysv<mode>"

78216

[(set (match_operand 0 "" "")

78217

(call (mem:SI (match_operand:P 1 "call_operand" "s,s,c,c"))

78218

@@ -11256,6 +12900,31 @@

78219

[(set_attr "type" "branch")

78220

(set_attr "length" "4,8,4,8")])

78221

78222

+;; AIX ABI sibling call patterns.

78223

+

78224

+(define_insn "*sibcall_aix<mode>"

78225

+ [(call (mem:SI (match_operand:P 0 "call_operand" "s,c"))

78226

+ (match_operand 1 "" "g,g"))

78227

+ (simple_return)]

78228

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

78229

+ "@

78230

+ b %z0

78231

+ b%T0"

78232

+ [(set_attr "type" "branch")

78233

+ (set_attr "length" "4")])

78234

+

78235

+(define_insn "*sibcall_value_aix<mode>"

78236

+ [(set (match_operand 0 "" "")

78237

+ (call (mem:SI (match_operand:P 1 "call_operand" "s,c"))

78238

+ (match_operand 2 "" "g,g")))

78239

+ (simple_return)]

78240

+ "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"

78241

+ "@

78242

+ b %z1

78243

+ b%T1"

78244

+ [(set_attr "type" "branch")

78245

+ (set_attr "length" "4")])

78246

+

78247

(define_expand "sibcall_epilogue"

78248

[(use (const_int 0))]

78249

""

78250

@@ -11294,7 +12963,14 @@

78251

operands[1] = gen_rtx_REG (Pmode, 0);

78252

return "st<wd>%U0%X0 %1,%0";

78253

}

78254

- [(set_attr "type" "store")

78255

+ [(set (attr "type")

78256

+ (if_then_else

78257

+ (match_test "update_indexed_address_mem (operands[0], VOIDmode)")

78258

+ (const_string "store_ux")

78259

+ (if_then_else

78260

+ (match_test "update_address_mem (operands[0], VOIDmode)")

78261

+ (const_string "store_u")

78262

+ (const_string "store"))))

78263

(set_attr "length" "4")])

78264

78265

(define_insn "probe_stack_range<P:mode>"

78266

@@ -11589,23 +13265,6 @@

78267

[(set (match_dup 3) (compare:CCUNS (match_dup 1) (match_dup 2)))

78268

(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 4)))])

78269

78270

-(define_insn "*cmpsf_internal1"

78271

- [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")

78272

- (compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "f")

78273

- (match_operand:SF 2 "gpc_reg_operand" "f")))]

78274

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT"

78275

- "fcmpu %0,%1,%2"

78276

- [(set_attr "type" "fpcompare")])

78277

-

78278

-(define_insn "*cmpdf_internal1"

78279

- [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")

78280

- (compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "d")

78281

- (match_operand:DF 2 "gpc_reg_operand" "d")))]

78282

- "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT

78283

- && !VECTOR_UNIT_VSX_P (DFmode)"

78284

- "fcmpu %0,%1,%2"

78285

- [(set_attr "type" "fpcompare")])

78286

-

78287

;; Only need to compare second words if first words equal

78288

(define_insn "*cmptf_internal1"

78289

[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")

78290

@@ -13501,6 +15160,14 @@

78291

"mfcr %0"

78292

[(set_attr "type" "mfcr")])

78293

78294

+(define_insn "*crsave"

78295

+ [(match_parallel 0 "crsave_operation"

78296

+ [(set (match_operand:SI 1 "memory_operand" "=m")

78297

+ (match_operand:SI 2 "gpc_reg_operand" "r"))])]

78298

+ ""

78299

+ "stw %2,%1"

78300

+ [(set_attr "type" "store")])

78301

+

78302

(define_insn "*stmw"

78303

[(match_parallel 0 "stmw_operation"

78304

[(set (match_operand:SI 1 "memory_operand" "=m")

78305

@@ -13885,7 +15552,7 @@

78306

(match_operand:P 2 "gpc_reg_operand" "r")] UNSPEC_BPERM))]

78307

"TARGET_POPCNTD"

78308

"bpermd %0,%1,%2"

78309

- [(set_attr "type" "integer")])

78310

+ [(set_attr "type" "popcnt")])

78311

78312

78313

;; Builtin fma support. Handle

78314

@@ -13900,6 +15567,20 @@

78315

""

78316

"")

78317

78318

+(define_insn "*fma<mode>4_fpr"

78319

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

78320

+ (fma:SFDF

78321

+ (match_operand:SFDF 1 "gpc_reg_operand" "%<Ff>,<Fv>,<Fv>")

78322

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

78323

+ (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>")))]

78324

+ "TARGET_<MODE>_FPR"

78325

+ "@

78326

+ fmadd<Ftrad> %0,%1,%2,%3

78327

+ xsmadda<Fvsx> %x0,%x1,%x2

78328

+ xsmaddm<Fvsx> %x0,%x1,%x3"

78329

+ [(set_attr "type" "fp")

78330

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

78331

+

78332

; Altivec only has fma and nfms.

78333

(define_expand "fms<mode>4"

78334

[(set (match_operand:FMA_F 0 "register_operand" "")

78335

@@ -13910,6 +15591,20 @@

78336

"!VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

78337

"")

78338

78339

+(define_insn "*fms<mode>4_fpr"

78340

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

78341

+ (fma:SFDF

78342

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>,<Fv>")

78343

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

78344

+ (neg:SFDF (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>"))))]

78345

+ "TARGET_<MODE>_FPR"

78346

+ "@

78347

+ fmsub<Ftrad> %0,%1,%2,%3

78348

+ xsmsuba<Fvsx> %x0,%x1,%x2

78349

+ xsmsubm<Fvsx> %x0,%x1,%x3"

78350

+ [(set_attr "type" "fp")

78351

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

78352

+

78353

;; If signed zeros are ignored, -(a * b - c) = -a * b + c.

78354

(define_expand "fnma<mode>4"

78355

[(set (match_operand:FMA_F 0 "register_operand" "")

78356

@@ -13943,6 +15638,21 @@

78357

"!VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"

78358

"")

78359

78360

+(define_insn "*nfma<mode>4_fpr"

78361

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

78362

+ (neg:SFDF

78363

+ (fma:SFDF

78364

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>,<Fv>")

78365

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

78366

+ (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>"))))]

78367

+ "TARGET_<MODE>_FPR"

78368

+ "@

78369

+ fnmadd<Ftrad> %0,%1,%2,%3

78370

+ xsnmadda<Fvsx> %x0,%x1,%x2

78371

+ xsnmaddm<Fvsx> %x0,%x1,%x3"

78372

+ [(set_attr "type" "fp")

78373

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

78374

+

78375

; Not an official optab name, but used from builtins.

78376

(define_expand "nfms<mode>4"

78377

[(set (match_operand:FMA_F 0 "register_operand" "")

78378

@@ -13954,6 +15664,23 @@

78379

""

78380

"")

78381

78382

+(define_insn "*nfmssf4_fpr"

78383

+ [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,<Fv>,<Fv>")

78384

+ (neg:SFDF

78385

+ (fma:SFDF

78386

+ (match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,<Fv>,<Fv>")

78387

+ (match_operand:SFDF 2 "gpc_reg_operand" "<Ff>,<Fv>,0")

78388

+ (neg:SFDF

78389

+ (match_operand:SFDF 3 "gpc_reg_operand" "<Ff>,0,<Fv>")))))]

78390

+ "TARGET_<MODE>_FPR"

78391

+ "@

78392

+ fnmsub<Ftrad> %0,%1,%2,%3

78393

+ xsnmsuba<Fvsx> %x0,%x1,%x2

78394

+ xsnmsubm<Fvsx> %x0,%x1,%x3"

78395

+ [(set_attr "type" "fp")

78396

+ (set_attr "fp_type" "fp_maddsub_<Fs>")])

78397

+

78398

+

78399

(define_expand "rs6000_get_timebase"

78400

[(use (match_operand:DI 0 "gpc_reg_operand" ""))]

78401

""

78402

@@ -14020,7 +15747,229 @@

78403

})

78404

78405

78406

+;; Power8 fusion support for fusing an addis instruction with a D-form load of

78407

+;; a GPR. The addis instruction must be adjacent to the load, and use the same

78408

+;; register that is being loaded. The fused ops must be physically adjacent.

78409

78410

+;; We use define_peephole for the actual addis/load, and the register used to

78411

+;; hold the addis value must be the same as the register being loaded. We use

78412

+;; define_peephole2 to change the register used for addis to be the register

78413

+;; being loaded, since we can look at whether it is dead after the load insn.

78414

+

78415

+(define_peephole

78416

+ [(set (match_operand:P 0 "base_reg_operand" "")

78417

+ (match_operand:P 1 "fusion_gpr_addis" ""))

78418

+ (set (match_operand:INT1 2 "base_reg_operand" "")

78419

+ (match_operand:INT1 3 "fusion_gpr_mem_load" ""))]

78420

+ "TARGET_P8_FUSION && fusion_gpr_load_p (operands, false)"

78421

+{

78422

+ return emit_fusion_gpr_load (operands);

78423

+}

78424

+ [(set_attr "type" "load")

78425

+ (set_attr "length" "8")])

78426

+

78427

+(define_peephole2

78428

+ [(set (match_operand:P 0 "base_reg_operand" "")

78429

+ (match_operand:P 1 "fusion_gpr_addis" ""))

78430

+ (set (match_operand:INT1 2 "base_reg_operand" "")

78431

+ (match_operand:INT1 3 "fusion_gpr_mem_load" ""))]

78432

+ "TARGET_P8_FUSION

78433

+ && (REGNO (operands[0]) != REGNO (operands[2])

78434

+ || GET_CODE (operands[3]) == SIGN_EXTEND)

78435

+ && fusion_gpr_load_p (operands, true)"

78436

+ [(const_int 0)]

78437

+{

78438

+ expand_fusion_gpr_load (operands);

78439

+ DONE;

78440

+})

78441

+

78442

+

78443

+;; Miscellaneous ISA 2.06 (power7) instructions

78444

+(define_insn "addg6s"

78445

+ [(set (match_operand:SI 0 "register_operand" "=r")

78446

+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")

78447

+ (match_operand:SI 2 "register_operand" "r")]

78448

+ UNSPEC_ADDG6S))]

78449

+ "TARGET_POPCNTD"

78450

+ "addg6s %0,%1,%2"

78451

+ [(set_attr "type" "integer")

78452

+ (set_attr "length" "4")])

78453

+

78454

+(define_insn "cdtbcd"

78455

+ [(set (match_operand:SI 0 "register_operand" "=r")

78456

+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")]

78457

+ UNSPEC_CDTBCD))]

78458

+ "TARGET_POPCNTD"

78459

+ "cdtbcd %0,%1"

78460

+ [(set_attr "type" "integer")

78461

+ (set_attr "length" "4")])

78462

+

78463

+(define_insn "cbcdtd"

78464

+ [(set (match_operand:SI 0 "register_operand" "=r")

78465

+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")]

78466

+ UNSPEC_CBCDTD))]

78467

+ "TARGET_POPCNTD"

78468

+ "cbcdtd %0,%1"

78469

+ [(set_attr "type" "integer")

78470

+ (set_attr "length" "4")])

78471

+

78472

+(define_int_iterator UNSPEC_DIV_EXTEND [UNSPEC_DIVE

78473

+ UNSPEC_DIVEO

78474

+ UNSPEC_DIVEU

78475

+ UNSPEC_DIVEUO])

78476

+

78477

+(define_int_attr div_extend [(UNSPEC_DIVE "e")

78478

+ (UNSPEC_DIVEO "eo")

78479

+ (UNSPEC_DIVEU "eu")

78480

+ (UNSPEC_DIVEUO "euo")])

78481

+

78482

+(define_insn "div<div_extend>_<mode>"

78483

+ [(set (match_operand:GPR 0 "register_operand" "=r")

78484

+ (unspec:GPR [(match_operand:GPR 1 "register_operand" "r")

78485

+ (match_operand:GPR 2 "register_operand" "r")]

78486

+ UNSPEC_DIV_EXTEND))]

78487

+ "TARGET_POPCNTD"

78488

+ "div<wd><div_extend> %0,%1,%2"

78489

+ [(set_attr "type" "<idiv_ldiv>")])

78490

+

78491

+

78492

+;; Pack/unpack 128-bit floating point types that take 2 scalar registers

78493

+

78494

+; Type of the 64-bit part when packing/unpacking 128-bit floating point types

78495

+(define_mode_attr FP128_64 [(TF "DF") (TD "DI")])

78496

+

78497

+(define_expand "unpack<mode>"

78498

+ [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "")

78499

+ (unspec:<FP128_64>

78500

+ [(match_operand:FMOVE128 1 "register_operand" "")

78501

+ (match_operand:QI 2 "const_0_to_1_operand" "")]

78502

+ UNSPEC_UNPACK_128BIT))]

78503

+ ""

78504

+ "")

78505

+

78506

+;; The Advance Toolchain 7.0-3 added private builtins: __builtin_longdouble_dw0

78507

+;; and __builtin_longdouble_dw1 to optimize glibc. Add support for these

78508

+;; builtins here.

78509

+

78510

+(define_expand "unpacktf_0"

78511

+ [(set (match_operand:DF 0 "nonimmediate_operand" "")

78512

+ (unspec:DF [(match_operand:TF 1 "register_operand" "")

78513

+ (const_int 0)]

78514

+ UNSPEC_UNPACK_128BIT))]

78515

+ ""

78516

+ "")

78517

+

78518

+(define_expand "unpacktf_1"

78519

+ [(set (match_operand:DF 0 "nonimmediate_operand" "")

78520

+ (unspec:DF [(match_operand:TF 1 "register_operand" "")

78521

+ (const_int 1)]

78522

+ UNSPEC_UNPACK_128BIT))]

78523

+ ""

78524

+ "")

78525

+

78526

+(define_insn_and_split "unpack<mode>_dm"

78527

+ [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m,d,r,m")

78528

+ (unspec:<FP128_64>

78529

+ [(match_operand:FMOVE128 1 "register_operand" "d,d,r,d,r")

78530

+ (match_operand:QI 2 "const_0_to_1_operand" "i,i,i,i,i")]

78531

+ UNSPEC_UNPACK_128BIT))]

78532

+ "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"

78533

+ "#"

78534

+ "&& reload_completed"

78535

+ [(set (match_dup 0) (match_dup 3))]

78536

+{

78537

+ unsigned fp_regno = REGNO (operands[1]) + UINTVAL (operands[2]);

78538

+

78539

+ if (REG_P (operands[0]) && REGNO (operands[0]) == fp_regno)

78540

+ {

78541

+ emit_note (NOTE_INSN_DELETED);

78542

+ DONE;

78543

+ }

78544

+

78545

+ operands[3] = gen_rtx_REG (<FP128_64>mode, fp_regno);

78546

+}

78547

+ [(set_attr "type" "fp,fpstore,mffgpr,mftgpr,store")

78548

+ (set_attr "length" "4")])

78549

+

78550

+(define_insn_and_split "unpack<mode>_nodm"

78551

+ [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m")

78552

+ (unspec:<FP128_64>

78553

+ [(match_operand:FMOVE128 1 "register_operand" "d,d")

78554

+ (match_operand:QI 2 "const_0_to_1_operand" "i,i")]

78555

+ UNSPEC_UNPACK_128BIT))]

78556

+ "!TARGET_POWERPC64 || !TARGET_DIRECT_MOVE"

78557

+ "#"

78558

+ "&& reload_completed"

78559

+ [(set (match_dup 0) (match_dup 3))]

78560

+{

78561

+ unsigned fp_regno = REGNO (operands[1]) + UINTVAL (operands[2]);

78562

+

78563

+ if (REG_P (operands[0]) && REGNO (operands[0]) == fp_regno)

78564

+ {

78565

+ emit_note (NOTE_INSN_DELETED);

78566

+ DONE;

78567

+ }

78568

+

78569

+ operands[3] = gen_rtx_REG (<FP128_64>mode, fp_regno);

78570

+}

78571

+ [(set_attr "type" "fp,fpstore")

78572

+ (set_attr "length" "4")])

78573

+

78574

+(define_insn_and_split "pack<mode>"

78575

+ [(set (match_operand:FMOVE128 0 "register_operand" "=d,&d")

78576

+ (unspec:FMOVE128

78577

+ [(match_operand:<FP128_64> 1 "register_operand" "0,d")

78578

+ (match_operand:<FP128_64> 2 "register_operand" "d,d")]

78579

+ UNSPEC_PACK_128BIT))]

78580

+ ""

78581

+ "@

78582

+ fmr %L0,%2

78583

+ #"

78584

+ "&& reload_completed && REGNO (operands[0]) != REGNO (operands[1])"

78585

+ [(set (match_dup 3) (match_dup 1))

78586

+ (set (match_dup 4) (match_dup 2))]

78587

+{

78588

+ unsigned dest_hi = REGNO (operands[0]);

78589

+ unsigned dest_lo = dest_hi + 1;

78590

+

78591

+ gcc_assert (!IN_RANGE (REGNO (operands[1]), dest_hi, dest_lo));

78592

+ gcc_assert (!IN_RANGE (REGNO (operands[2]), dest_hi, dest_lo));

78593

+

78594

+ operands[3] = gen_rtx_REG (<FP128_64>mode, dest_hi);

78595

+ operands[4] = gen_rtx_REG (<FP128_64>mode, dest_lo);

78596

+}

78597

+ [(set_attr "type" "fp,fp")

78598

+ (set_attr "length" "4,8")])

78599

+

78600

+(define_insn "unpackv1ti"

78601

+ [(set (match_operand:DI 0 "register_operand" "=d,d")

78602

+ (unspec:DI [(match_operand:V1TI 1 "register_operand" "0,wa")

78603

+ (match_operand:QI 2 "const_0_to_1_operand" "O,i")]

78604

+ UNSPEC_UNPACK_128BIT))]

78605

+ "TARGET_VSX"

78606

+{

78607

+ if (REGNO (operands[0]) == REGNO (operands[1]) && INTVAL (operands[2]) == 0)

78608

+ return ASM_COMMENT_START " xxpermdi to same register";

78609

+

78610

+ operands[3] = GEN_INT (INTVAL (operands[2]) == 0 ? 0 : 3);

78611

+ return "xxpermdi %x0,%x1,%x1,%3";

78612

+}

78613

+ [(set_attr "type" "vecperm")

78614

+ (set_attr "length" "4")])

78615

+

78616

+(define_insn "packv1ti"

78617

+ [(set (match_operand:V1TI 0 "register_operand" "=wa")

78618

+ (unspec:V1TI

78619

+ [(match_operand:DI 1 "register_operand" "d")

78620

+ (match_operand:DI 2 "register_operand" "d")]

78621

+ UNSPEC_PACK_128BIT))]

78622

+ "TARGET_VSX"

78623

+ "xxpermdi %x0,%x1,%x2,0"

78624

+ [(set_attr "type" "vecperm")

78625

+ (set_attr "length" "4")])

78626

+

78627

+

78628

+

78629

(include "sync.md")

78630

(include "vector.md")

78631

(include "vsx.md")

78632

@@ -14028,3 +15977,5 @@

78633

(include "spe.md")

78634

(include "dfp.md")

78635

(include "paired.md")

78636

+(include "crypto.md")

78637

+(include "htm.md")

78638

Index: gcc/config/rs6000/t-linux64le

78639

===================================================================

78640

--- a/src/gcc/config/rs6000/t-linux64le (.../tags/gcc_4_8_2_release)

78641

+++ b/src/gcc/config/rs6000/t-linux64le (.../branches/gcc-4_8-branch)

78642

@@ -0,0 +1,3 @@

78643

+#rs6000/t-linux64le

78644

+

78645

+MULTILIB_OSDIRNAMES := $(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))

78646

Index: gcc/config/rs6000/t-linux64lebe

78647

===================================================================

78648

--- a/src/gcc/config/rs6000/t-linux64lebe (.../tags/gcc_4_8_2_release)

78649

+++ b/src/gcc/config/rs6000/t-linux64lebe (.../branches/gcc-4_8-branch)

78650

@@ -0,0 +1,7 @@

78651

+#rs6000/t-linux64leend

78652

+

78653

+MULTILIB_OPTIONS += mbig

78654

+MULTILIB_DIRNAMES += be

78655

+MULTILIB_OSDIRNAMES += $(subst =,.mbig=,$(subst libbe32,lib32be,$(subst libbe64,lib64be,$(subst lib,libbe,$(subst le-linux,-linux,$(MULTILIB_OSDIRNAMES))))))

78656

+MULTILIB_OSDIRNAMES += $(subst $(if $(findstring 64,$(target)),m64,m32).,,$(filter $(if $(findstring 64,$(target)),m64,m32).mbig%,$(MULTILIB_OSDIRNAMES)))

78657

+MULTILIB_MATCHES := ${MULTILIB_MATCHES_ENDIAN}

78658

Index: gcc/config/rs6000/rs6000-opts.h

78659

===================================================================

78660

--- a/src/gcc/config/rs6000/rs6000-opts.h (.../tags/gcc_4_8_2_release)

78661

+++ b/src/gcc/config/rs6000/rs6000-opts.h (.../branches/gcc-4_8-branch)

78662

@@ -59,7 +59,8 @@

78663

PROCESSOR_POWER7,

78664

PROCESSOR_CELL,

78665

PROCESSOR_PPCA2,

78666

- PROCESSOR_TITAN

78667

+ PROCESSOR_TITAN,

78668

+ PROCESSOR_POWER8

78669

};

78670

78671

/* FP processor type. */

78672

@@ -100,7 +101,8 @@

78673

/* Enumeration to give which calling sequence to use. */

78674

enum rs6000_abi {

78675

ABI_NONE,

78676

- ABI_AIX, /* IBM's AIX */

78677

+ ABI_AIX, /* IBM's AIX, or Linux ELFv1 */

78678

+ ABI_ELFv2, /* Linux ELFv2 ABI */

78679

ABI_V4, /* System V.4/eabi */

78680

ABI_DARWIN /* Apple's Darwin (OS X kernel) */

78681

};

78682

@@ -131,11 +133,14 @@

78683

CMODEL_LARGE

78684

};

78685

78686

-/* Describe which vector unit to use for a given machine mode. */

78687

+/* Describe which vector unit to use for a given machine mode. The

78688

+ VECTOR_MEM_* and VECTOR_UNIT_* macros assume that Altivec, VSX, and

78689

+ P8_VECTOR are contiguous. */

78690

enum rs6000_vector {

78691

VECTOR_NONE, /* Type is not a vector or not supported */

78692

VECTOR_ALTIVEC, /* Use altivec for vector processing */

78693

VECTOR_VSX, /* Use VSX for vector processing */

78694

+ VECTOR_P8_VECTOR, /* Use ISA 2.07 VSX for vector processing */

78695

VECTOR_PAIRED, /* Use paired floating point for vectors */

78696

VECTOR_SPE, /* Use SPE for vector processing */

78697

VECTOR_OTHER /* Some other vector unit */

78698

Index: gcc/config/rs6000/option-defaults.h

78699

===================================================================

78700

--- a/src/gcc/config/rs6000/option-defaults.h (.../tags/gcc_4_8_2_release)

78701

+++ b/src/gcc/config/rs6000/option-defaults.h (.../branches/gcc-4_8-branch)

78702

@@ -54,6 +54,7 @@

78703

--with-float is ignored if -mhard-float or -msoft-float are

78704

specified. */

78705

#define OPTION_DEFAULT_SPECS \

78706

+ {"abi", "%{!mabi=elfv*:-mabi=%(VALUE)}" }, \

78707

{"tune", "%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}" }, \

78708

{"tune_32", "%{" OPT_ARCH32 ":%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}}" }, \

78709

{"tune_64", "%{" OPT_ARCH64 ":%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}}" }, \

78710

Index: gcc/config/rs6000/altivec.h

78711

===================================================================

78712

--- a/src/gcc/config/rs6000/altivec.h (.../tags/gcc_4_8_2_release)

78713

+++ b/src/gcc/config/rs6000/altivec.h (.../branches/gcc-4_8-branch)

78714

@@ -319,8 +319,58 @@

78715

#define vec_sqrt __builtin_vec_sqrt

78716

#define vec_vsx_ld __builtin_vec_vsx_ld

78717

#define vec_vsx_st __builtin_vec_vsx_st

78718

+

78719

+/* Note, xxsldi and xxpermdi were added as __builtin_vsx_<xxx> functions

78720

+ instead of __builtin_vec_<xxx> */

78721

+#define vec_xxsldwi __builtin_vsx_xxsldwi

78722

+#define vec_xxpermdi __builtin_vsx_xxpermdi

78723

#endif

78724

78725

+#ifdef _ARCH_PWR8

78726

+/* Vector additions added in ISA 2.07. */

78727

+#define vec_eqv __builtin_vec_eqv

78728

+#define vec_nand __builtin_vec_nand

78729

+#define vec_orc __builtin_vec_orc

78730

+#define vec_vaddcuq __builtin_vec_vaddcuq

78731

+#define vec_vaddudm __builtin_vec_vaddudm

78732

+#define vec_vadduqm __builtin_vec_vadduqm

78733

+#define vec_vbpermq __builtin_vec_vbpermq

78734

+#define vec_vclz __builtin_vec_vclz

78735

+#define vec_vclzb __builtin_vec_vclzb

78736

+#define vec_vclzd __builtin_vec_vclzd

78737

+#define vec_vclzh __builtin_vec_vclzh

78738

+#define vec_vclzw __builtin_vec_vclzw

78739

+#define vec_vaddecuq __builtin_vec_vaddecuq

78740

+#define vec_vaddeuqm __builtin_vec_vaddeuqm

78741

+#define vec_vsubecuq __builtin_vec_vsubecuq

78742

+#define vec_vsubeuqm __builtin_vec_vsubeuqm

78743

+#define vec_vgbbd __builtin_vec_vgbbd

78744

+#define vec_vmaxsd __builtin_vec_vmaxsd

78745

+#define vec_vmaxud __builtin_vec_vmaxud

78746

+#define vec_vminsd __builtin_vec_vminsd

78747

+#define vec_vminud __builtin_vec_vminud

78748

+#define vec_vmrgew __builtin_vec_vmrgew

78749

+#define vec_vmrgow __builtin_vec_vmrgow

78750

+#define vec_vpksdss __builtin_vec_vpksdss

78751

+#define vec_vpksdus __builtin_vec_vpksdus

78752

+#define vec_vpkudum __builtin_vec_vpkudum

78753

+#define vec_vpkudus __builtin_vec_vpkudus

78754

+#define vec_vpopcnt __builtin_vec_vpopcnt

78755

+#define vec_vpopcntb __builtin_vec_vpopcntb

78756

+#define vec_vpopcntd __builtin_vec_vpopcntd

78757

+#define vec_vpopcnth __builtin_vec_vpopcnth

78758

+#define vec_vpopcntw __builtin_vec_vpopcntw

78759

+#define vec_vrld __builtin_vec_vrld

78760

+#define vec_vsld __builtin_vec_vsld

78761

+#define vec_vsrad __builtin_vec_vsrad

78762

+#define vec_vsrd __builtin_vec_vsrd

78763

+#define vec_vsubcuq __builtin_vec_vsubcuq

78764

+#define vec_vsubudm __builtin_vec_vsubudm

78765

+#define vec_vsubuqm __builtin_vec_vsubuqm

78766

+#define vec_vupkhsw __builtin_vec_vupkhsw

78767

+#define vec_vupklsw __builtin_vec_vupklsw

78768

+#endif

78769

+

78770

/* Predicates.

78771

For C++, we use templates in order to allow non-parenthesized arguments.

78772

For C, instead, we use macros since non-parenthesized arguments were

78773

Index: gcc/config/rs6000/sysv4.h

78774

===================================================================

78775

--- a/src/gcc/config/rs6000/sysv4.h (.../tags/gcc_4_8_2_release)

78776

+++ b/src/gcc/config/rs6000/sysv4.h (.../branches/gcc-4_8-branch)

78777

@@ -45,7 +45,7 @@

78778

& (OPTION_MASK_RELOCATABLE \

78779

| OPTION_MASK_MINIMAL_TOC)) \

78780

&& flag_pic > 1) \

78781

- || DEFAULT_ABI == ABI_AIX)

78782

+ || DEFAULT_ABI != ABI_V4)

78783

78784

#define TARGET_BITFIELD_TYPE (! TARGET_NO_BITFIELD_TYPE)

78785

#define TARGET_BIG_ENDIAN (! TARGET_LITTLE_ENDIAN)

78786

@@ -147,7 +147,7 @@

78787

rs6000_sdata_name); \

78788

} \

78789

\

78790

- else if (flag_pic && DEFAULT_ABI != ABI_AIX \

78791

+ else if (flag_pic && DEFAULT_ABI == ABI_V4 \

78792

&& (rs6000_sdata == SDATA_EABI \

78793

|| rs6000_sdata == SDATA_SYSV)) \

78794

{ \

78795

@@ -173,7 +173,7 @@

78796

error ("-mrelocatable and -mno-minimal-toc are incompatible"); \

78797

} \

78798

\

78799

- if (TARGET_RELOCATABLE && rs6000_current_abi == ABI_AIX) \

78800

+ if (TARGET_RELOCATABLE && rs6000_current_abi != ABI_V4) \

78801

{ \

78802

rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \

78803

error ("-mrelocatable and -mcall-%s are incompatible", \

78804

@@ -180,7 +180,7 @@

78805

rs6000_abi_name); \

78806

} \

78807

\

78808

- if (!TARGET_64BIT && flag_pic > 1 && rs6000_current_abi == ABI_AIX) \

78809

+ if (!TARGET_64BIT && flag_pic > 1 && rs6000_current_abi != ABI_V4) \

78810

{ \

78811

flag_pic = 0; \

78812

error ("-fPIC and -mcall-%s are incompatible", \

78813

@@ -193,7 +193,7 @@

78814

} \

78815

\

78816

/* Treat -fPIC the same as -mrelocatable. */ \

78817

- if (flag_pic > 1 && DEFAULT_ABI != ABI_AIX) \

78818

+ if (flag_pic > 1 && DEFAULT_ABI == ABI_V4) \

78819

{ \

78820

rs6000_isa_flags |= OPTION_MASK_RELOCATABLE | OPTION_MASK_MINIMAL_TOC; \

78821

TARGET_NO_FP_IN_TOC = 1; \

78822

@@ -317,7 +317,7 @@

78823

78824

/* Put PC relative got entries in .got2. */

78825

#define MINIMAL_TOC_SECTION_ASM_OP \

78826

- (TARGET_RELOCATABLE || (flag_pic && DEFAULT_ABI != ABI_AIX) \

78827

+ (TARGET_RELOCATABLE || (flag_pic && DEFAULT_ABI == ABI_V4) \

78828

? "\t.section\t\".got2\",\"aw\"" : "\t.section\t\".got1\",\"aw\"")

78829

78830

#define SDATA_SECTION_ASM_OP "\t.section\t\".sdata\",\"aw\""

78831

@@ -522,8 +522,6 @@

78832

#define ENDIAN_SELECT(BIG_OPT, LITTLE_OPT, DEFAULT_OPT) \

78833

"%{mlittle|mlittle-endian:" LITTLE_OPT ";" \

78834

"mbig|mbig-endian:" BIG_OPT ";" \

78835

- "mcall-aixdesc|mcall-freebsd|mcall-netbsd|" \

78836

- "mcall-openbsd|mcall-linux:" BIG_OPT ";" \

78837

"mcall-i960-old:" LITTLE_OPT ";" \

78838

":" DEFAULT_OPT "}"

78839

78840

@@ -536,25 +534,12 @@

78841

%{memb|msdata=eabi: -memb}" \

78842

ENDIAN_SELECT(" -mbig", " -mlittle", DEFAULT_ASM_ENDIAN)

78843

78844

-#define CC1_ENDIAN_BIG_SPEC ""

78845

-

78846

-#define CC1_ENDIAN_LITTLE_SPEC "\

78847

-%{!mstrict-align: %{!mno-strict-align: \

78848

- %{!mcall-i960-old: \

78849

- -mstrict-align \

78850

- } \

78851

-}}"

78852

-

78853

-#define CC1_ENDIAN_DEFAULT_SPEC "%(cc1_endian_big)"

78854

-

78855

#ifndef CC1_SECURE_PLT_DEFAULT_SPEC

78856

#define CC1_SECURE_PLT_DEFAULT_SPEC ""

78857

#endif

78858

78859

-/* Pass -G xxx to the compiler and set correct endian mode. */

78860

+/* Pass -G xxx to the compiler. */

78861

#define CC1_SPEC "%{G*} %(cc1_cpu)" \

78862

- ENDIAN_SELECT(" %(cc1_endian_big)", " %(cc1_endian_little)", \

78863

- " %(cc1_endian_default)") \

78864

"%{meabi: %{!mcall-*: -mcall-sysv }} \

78865

%{!meabi: %{!mno-eabi: \

78866

%{mrelocatable: -meabi } \

78867

@@ -908,9 +893,6 @@

78868

{ "link_os_netbsd", LINK_OS_NETBSD_SPEC }, \

78869

{ "link_os_openbsd", LINK_OS_OPENBSD_SPEC }, \

78870

{ "link_os_default", LINK_OS_DEFAULT_SPEC }, \

78871

- { "cc1_endian_big", CC1_ENDIAN_BIG_SPEC }, \

78872

- { "cc1_endian_little", CC1_ENDIAN_LITTLE_SPEC }, \

78873

- { "cc1_endian_default", CC1_ENDIAN_DEFAULT_SPEC }, \

78874

{ "cc1_secure_plt_default", CC1_SECURE_PLT_DEFAULT_SPEC }, \

78875

{ "cpp_os_ads", CPP_OS_ADS_SPEC }, \

78876

{ "cpp_os_yellowknife", CPP_OS_YELLOWKNIFE_SPEC }, \

78877

Index: gcc/config/darwin.c

78878

===================================================================

78879

--- a/src/gcc/config/darwin.c (.../tags/gcc_4_8_2_release)

78880

+++ b/src/gcc/config/darwin.c (.../branches/gcc-4_8-branch)

78881

@@ -1329,6 +1329,9 @@

78882

return NULL_TREE;

78883

}

78884

78885

+static int classes_seen;

78886

+static int objc_metadata_seen;

78887

+

78888

/* Return the section required for Objective C ABI 2 metadata. */

78889

static section *

78890

darwin_objc2_section (tree decl ATTRIBUTE_UNUSED, tree meta, section * base)

78891

@@ -1338,12 +1341,9 @@

78892

gcc_assert (TREE_CODE (ident) == IDENTIFIER_NODE);

78893

p = IDENTIFIER_POINTER (ident);

78894

78895

- /* If we are in LTO, then we don't know the state of flag_next_runtime

78896

- or flag_objc_abi when the code was generated. We set these from the

78897

- meta-data - which is needed to deal with const string constructors. */

78898

+ gcc_checking_assert (flag_next_runtime == 1 && flag_objc_abi == 2);

78899

78900

- flag_next_runtime = 1;

78901

- flag_objc_abi = 2;

78902

+ objc_metadata_seen = 1;

78903

78904

if (base == data_section)

78905

base = darwin_sections[objc2_metadata_section];

78906

@@ -1366,7 +1366,10 @@

78907

else if (!strncmp (p, "V2_NLCL", 7))

78908

return darwin_sections[objc2_nonlazy_class_section];

78909

else if (!strncmp (p, "V2_CLAB", 7))

78910

- return darwin_sections[objc2_classlist_section];

78911

+ {

78912

+ classes_seen = 1;

78913

+ return darwin_sections[objc2_classlist_section];

78914

+ }

78915

else if (!strncmp (p, "V2_SRFS", 7))

78916

return darwin_sections[objc2_selector_refs_section];

78917

else if (!strncmp (p, "V2_NLCA", 7))

78918

@@ -1401,13 +1404,10 @@

78919

gcc_assert (TREE_CODE (ident) == IDENTIFIER_NODE);

78920

p = IDENTIFIER_POINTER (ident);

78921

78922

- /* If we are in LTO, then we don't know the state of flag_next_runtime

78923

- or flag_objc_abi when the code was generated. We set these from the

78924

- meta-data - which is needed to deal with const string constructors. */

78925

- flag_next_runtime = 1;

78926

- if (!global_options_set.x_flag_objc_abi)

78927

- flag_objc_abi = 1;

78928

+ gcc_checking_assert (flag_next_runtime == 1 && flag_objc_abi < 2);

78929

78930

+ objc_metadata_seen = 1;

78931

+

78932

/* String sections first, cos there are lots of strings. */

78933

if (!strncmp (p, "V1_STRG", 7))

78934

return darwin_sections[cstring_section];

78935

@@ -1419,7 +1419,10 @@

78936

return darwin_sections[objc_meth_var_types_section];

78937

78938

else if (!strncmp (p, "V1_CLAS", 7))

78939

- return darwin_sections[objc_class_section];

78940

+ {

78941

+ classes_seen = 1;

78942

+ return darwin_sections[objc_class_section];

78943

+ }

78944

else if (!strncmp (p, "V1_META", 7))

78945

return darwin_sections[objc_meta_class_section];

78946

else if (!strncmp (p, "V1_CATG", 7))

78947

@@ -1603,8 +1606,6 @@

78948

if (TREE_CODE (name) == TYPE_DECL)

78949

name = DECL_NAME (name);

78950

78951

- /* FIXME: This is unsatisfactory for LTO, since it relies on other

78952

- metadata determining the source FE. */

78953

if (!strcmp (IDENTIFIER_POINTER (name), "__builtin_ObjCString"))

78954

{

78955

if (flag_next_runtime)

78956

@@ -2845,6 +2846,33 @@

78957

finalize_ctors ();

78958

if (!vec_safe_is_empty (dtors))

78959

finalize_dtors ();

78960

+

78961

+ /* If we are expecting to output NeXT ObjC meta-data, (and we actually see

78962

+ some) then we output the fix-and-continue marker (Image Info).

78963

+ This applies to Objective C, Objective C++ and LTO with either language

78964

+ as part of the input. */

78965

+ if (flag_next_runtime && objc_metadata_seen)

78966

+ {

78967

+ unsigned int flags = 0;

78968

+ if (flag_objc_abi >= 2)

78969

+ {

78970

+ flags = 16;

78971

+ output_section_asm_op

78972

+ (darwin_sections[objc2_image_info_section]->unnamed.data);

78973

+ }

78974

+ else

78975

+ output_section_asm_op

78976

+ (darwin_sections[objc_image_info_section]->unnamed.data);

78977

+

78978

+ ASM_OUTPUT_ALIGN (asm_out_file, 2);

78979

+ fputs ("L_OBJC_ImageInfo:\n", asm_out_file);

78980

+

78981

+ flags |= (flag_replace_objc_classes && classes_seen) ? 1 : 0;

78982

+ flags |= flag_objc_gc ? 2 : 0;

78983

+

78984

+ fprintf (asm_out_file, "\t.long\t0\n\t.long\t%u\n", flags);

78985

+ }

78986

+

78987

machopic_finish (asm_out_file);

78988

if (strcmp (lang_hooks.name, "GNU C++") == 0)

78989

{

78990

Index: gcc/config/tilepro/tilepro-c.c

78991

===================================================================

78992

--- a/src/gcc/config/tilepro/tilepro-c.c (.../tags/gcc_4_8_2_release)

78993

+++ b/src/gcc/config/tilepro/tilepro-c.c (.../branches/gcc-4_8-branch)

78994

@@ -44,6 +44,11 @@

78995

builtin_define ("__tile_chip__=1");

78996

builtin_define ("__tile_chip_rev__=0");

78997

78998

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");

78999

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");

79000

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");

79001

+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");

79002

+

79003

TILEPRO_CPU_CPP_ENDIAN_BUILTINS ();

79004

GNU_USER_TARGET_OS_CPP_BUILTINS ();

79005

}

79006

Index: gcc/config/tilepro/tilepro.c

79007

===================================================================

79008

--- a/src/gcc/config/tilepro/tilepro.c (.../tags/gcc_4_8_2_release)

79009

+++ b/src/gcc/config/tilepro/tilepro.c (.../branches/gcc-4_8-branch)

79010

@@ -3167,6 +3167,12 @@

79011

}

79012

if (!pat)

79013

return NULL_RTX;

79014

+

79015

+ /* If we are generating a prefetch, tell the scheduler not to move

79016

+ it around. */

79017

+ if (GET_CODE (pat) == PREFETCH)

79018

+ PREFETCH_SCHEDULE_BARRIER_P (pat) = true;

79019

+

79020

emit_insn (pat);

79021

79022

if (nonvoid)

79023

Index: gcc/config/tilepro/tilepro.md

79024

===================================================================

79025

--- a/src/gcc/config/tilepro/tilepro.md (.../tags/gcc_4_8_2_release)

79026

+++ b/src/gcc/config/tilepro/tilepro.md (.../branches/gcc-4_8-branch)

79027

@@ -795,7 +795,7 @@

79028

79029

(define_expand "ctzdi2"

79030

[(set (match_operand:DI 0 "register_operand" "")

79031

- (ctz:DI (match_operand:DI 1 "reg_or_0_operand" "")))]

79032

+ (ctz:DI (match_operand:DI 1 "register_operand" "")))]

79033

""

79034

{

79035

rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, result;

79036

@@ -823,7 +823,7 @@

79037

79038

(define_expand "clzdi2"

79039

[(set (match_operand:DI 0 "register_operand" "")

79040

- (clz:DI (match_operand:DI 1 "reg_or_0_operand" "")))]

79041

+ (clz:DI (match_operand:DI 1 "register_operand" "")))]

79042

""

79043

{

79044

rtx lo, hi, clz_lo, clz_hi, clz_lo_plus_32, result;

79045

@@ -851,7 +851,7 @@

79046

79047

(define_expand "ffsdi2"

79048

[(set (match_operand:DI 0 "register_operand" "")

79049

- (ffs:DI (match_operand:DI 1 "reg_or_0_operand" "")))]

79050

+ (ffs:DI (match_operand:DI 1 "register_operand" "")))]

79051

""

79052

{

79053

rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, ctz, ctz_plus_1,ctz_cond;

79054

Index: gcc/config/arm/arm.c

79055

===================================================================

79056

--- a/src/gcc/config/arm/arm.c (.../tags/gcc_4_8_2_release)

79057

+++ b/src/gcc/config/arm/arm.c (.../branches/gcc-4_8-branch)

79058

@@ -230,7 +230,6 @@

79059

static void arm_option_override (void);

79060

static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode);

79061

static bool arm_cannot_copy_insn_p (rtx);

79062

-static bool arm_tls_symbol_p (rtx x);

79063

static int arm_issue_rate (void);

79064

static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;

79065

static bool arm_output_addr_const_extra (FILE *, rtx);

79066

@@ -5425,7 +5424,8 @@

79067

if (!crtl->uses_pic_offset_table)

79068

{

79069

gcc_assert (can_create_pseudo_p ());

79070

- if (arm_pic_register != INVALID_REGNUM)

79071

+ if (arm_pic_register != INVALID_REGNUM

79072

+ && !(TARGET_THUMB1 && arm_pic_register > LAST_LO_REGNUM))

79073

{

79074

if (!cfun->machine->pic_reg)

79075

cfun->machine->pic_reg = gen_rtx_REG (Pmode, arm_pic_register);

79076

@@ -5451,7 +5451,12 @@

79077

crtl->uses_pic_offset_table = 1;

79078

start_sequence ();

79079

79080

- arm_load_pic_register (0UL);

79081

+ if (TARGET_THUMB1 && arm_pic_register != INVALID_REGNUM

79082

+ && arm_pic_register > LAST_LO_REGNUM)

79083

+ emit_move_insn (cfun->machine->pic_reg,

79084

+ gen_rtx_REG (Pmode, arm_pic_register));

79085

+ else

79086

+ arm_load_pic_register (0UL);

79087

79088

seq = get_insns ();

79089

end_sequence ();

79090

@@ -5709,6 +5714,14 @@

79091

emit_insn (gen_movsi (pic_offset_table_rtx, pic_tmp));

79092

emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno));

79093

}

79094

+ else if (arm_pic_register != INVALID_REGNUM

79095

+ && arm_pic_register > LAST_LO_REGNUM

79096

+ && REGNO (pic_reg) <= LAST_LO_REGNUM)

79097

+ {

79098

+ emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));

79099

+ emit_move_insn (gen_rtx_REG (Pmode, arm_pic_register), pic_reg);

79100

+ emit_use (gen_rtx_REG (Pmode, arm_pic_register));

79101

+ }

79102

else

79103

emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));

79104

}

79105

@@ -6573,6 +6586,32 @@

79106

rtx

79107

arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)

79108

{

79109

+ if (arm_tls_referenced_p (x))

79110

+ {

79111

+ rtx addend = NULL;

79112

+

79113

+ if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS)

79114

+ {

79115

+ addend = XEXP (XEXP (x, 0), 1);

79116

+ x = XEXP (XEXP (x, 0), 0);

79117

+ }

79118

+

79119

+ if (GET_CODE (x) != SYMBOL_REF)

79120

+ return x;

79121

+

79122

+ gcc_assert (SYMBOL_REF_TLS_MODEL (x) != 0);

79123

+

79124

+ x = legitimize_tls_address (x, NULL_RTX);

79125

+

79126

+ if (addend)

79127

+ {

79128

+ x = gen_rtx_PLUS (SImode, x, addend);

79129

+ orig_x = x;

79130

+ }

79131

+ else

79132

+ return x;

79133

+ }

79134

+

79135

if (!TARGET_ARM)

79136

{

79137

/* TODO: legitimize_address for Thumb2. */

79138

@@ -6581,9 +6620,6 @@

79139

return thumb_legitimize_address (x, orig_x, mode);

79140

}

79141

79142

- if (arm_tls_symbol_p (x))

79143

- return legitimize_tls_address (x, NULL_RTX);

79144

-

79145

if (GET_CODE (x) == PLUS)

79146

{

79147

rtx xop0 = XEXP (x, 0);

79148

@@ -6695,9 +6731,6 @@

79149

rtx

79150

thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)

79151

{

79152

- if (arm_tls_symbol_p (x))

79153

- return legitimize_tls_address (x, NULL_RTX);

79154

-

79155

if (GET_CODE (x) == PLUS

79156

&& CONST_INT_P (XEXP (x, 1))

79157

&& (INTVAL (XEXP (x, 1)) >= 32 * GET_MODE_SIZE (mode)

79158

@@ -6988,20 +7021,6 @@

79159

79160

/* Test for various thread-local symbols. */

79161

79162

-/* Return TRUE if X is a thread-local symbol. */

79163

-

79164

-static bool

79165

-arm_tls_symbol_p (rtx x)

79166

-{

79167

- if (! TARGET_HAVE_TLS)

79168

- return false;

79169

-

79170

- if (GET_CODE (x) != SYMBOL_REF)

79171

- return false;

79172

-

79173

- return SYMBOL_REF_TLS_MODEL (x) != 0;

79174

-}

79175

-

79176

/* Helper for arm_tls_referenced_p. */

79177

79178

static int

79179

@@ -21279,7 +21298,11 @@

79180

type_mode);

79181

}

79182

79183

- op[argc] = expand_normal (arg[argc]);

79184

+ /* Use EXPAND_MEMORY for NEON_ARG_MEMORY to ensure a MEM_P

79185

+ be returned. */

79186

+ op[argc] = expand_expr (arg[argc], NULL_RTX, VOIDmode,

79187

+ (thisarg == NEON_ARG_MEMORY

79188

+ ? EXPAND_MEMORY : EXPAND_NORMAL));

79189

79190

switch (thisarg)

79191

{

79192

@@ -21298,6 +21321,9 @@

79193

break;

79194

79195

case NEON_ARG_MEMORY:

79196

+ /* Check if expand failed. */

79197

+ if (op[argc] == const0_rtx)

79198

+ return 0;

79199

gcc_assert (MEM_P (op[argc]));

79200

PUT_MODE (op[argc], mode[argc]);

79201

/* ??? arm_neon.h uses the same built-in functions for signed

79202

@@ -23555,6 +23581,7 @@

79203

num_regs = bit_count (saved_regs_mask);

79204

if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca)

79205

{

79206

+ emit_insn (gen_blockage ());

79207

/* Unwind the stack to just below the saved registers. */

79208

emit_insn (gen_addsi3 (stack_pointer_rtx,

79209

hard_frame_pointer_rtx,

79210

@@ -23583,8 +23610,8 @@

79211

79212

if (crtl->calls_eh_return)

79213

emit_insn (gen_addsi3 (stack_pointer_rtx,

79214

- stack_pointer_rtx,

79215

- GEN_INT (ARM_EH_STACKADJ_REGNUM)));

79216

+ stack_pointer_rtx,

79217

+ gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)));

79218

79219

if (IS_STACKALIGN (func_type))

79220

/* Restore the original stack pointer. Before prologue, the stack was

79221

Index: gcc/config/arm/arm.h

79222

===================================================================

79223

--- a/src/gcc/config/arm/arm.h (.../tags/gcc_4_8_2_release)

79224

+++ b/src/gcc/config/arm/arm.h (.../branches/gcc-4_8-branch)

79225

@@ -1213,11 +1213,15 @@

79226

VFPv2.

79227

In big-endian mode, modes greater than word size (i.e. DFmode) are stored in

79228

VFP registers in little-endian order. We can't describe that accurately to

79229

- GCC, so avoid taking subregs of such values. */

79230

-#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \

79231

- (TARGET_VFP && TARGET_BIG_END \

79232

- && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD \

79233

- || GET_MODE_SIZE (TO) > UNITS_PER_WORD) \

79234

+ GCC, so avoid taking subregs of such values.

79235

+ The only exception is going from a 128-bit to a 64-bit type. In that case

79236

+ the data layout happens to be consistent for big-endian, so we explicitly allow

79237

+ that case. */

79238

+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \

79239

+ (TARGET_VFP && TARGET_BIG_END \

79240

+ && !(GET_MODE_SIZE (FROM) == 16 && GET_MODE_SIZE (TO) == 8) \

79241

+ && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD \

79242

+ || GET_MODE_SIZE (TO) > UNITS_PER_WORD) \

79243

&& reg_classes_intersect_p (VFP_REGS, (CLASS)))

79244

79245

/* The class value for index registers, and the one for base regs. */

79246

@@ -2139,14 +2143,9 @@

79247

#undef ASM_OUTPUT_BEFORE_CASE_LABEL

79248

#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE, PREFIX, NUM, TABLE) /* Empty. */

79249

79250

-/* Make sure subsequent insns are aligned after a TBB. */

79251

-#define ASM_OUTPUT_CASE_END(FILE, NUM, JUMPTABLE) \

79252

- do \

79253

- { \

79254

- if (GET_MODE (PATTERN (JUMPTABLE)) == QImode) \

79255

- ASM_OUTPUT_ALIGN (FILE, 1); \

79256

- } \

79257

- while (0)

79258

+#define LABEL_ALIGN_AFTER_BARRIER(LABEL) \

79259

+ (GET_CODE (PATTERN (prev_active_insn (LABEL))) == ADDR_DIFF_VEC \

79260

+ ? 1 : 0)

79261

79262

#define ARM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \

79263

do \

79264

Index: gcc/config/arm/vfp.md

79265

===================================================================

79266

--- a/src/gcc/config/arm/vfp.md (.../tags/gcc_4_8_2_release)

79267

+++ b/src/gcc/config/arm/vfp.md (.../branches/gcc-4_8-branch)

79268

@@ -1264,6 +1264,7 @@

79269

"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"

79270

"vrint<vrint_variant>%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1"

79271

[(set_attr "predicable" "<vrint_predicable>")

79272

+ (set_attr "conds" "<vrint_conds>")

79273

(set_attr "type" "f_rint<vfp_type>")]

79274

)

79275

79276

@@ -1280,7 +1281,8 @@

79277

(match_operand:SDF 2 "register_operand" "<F_constraint>")))]

79278

"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"

79279

"vmaxnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"

79280

- [(set_attr "type" "f_minmax<vfp_type>")]

79281

+ [(set_attr "type" "f_minmax<vfp_type>")

79282

+ (set_attr "conds" "unconditional")]

79283

)

79284

79285

(define_insn "smin<mode>3"

79286

@@ -1289,7 +1291,8 @@

79287

(match_operand:SDF 2 "register_operand" "<F_constraint>")))]

79288

"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"

79289

"vminnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"

79290

- [(set_attr "type" "f_minmax<vfp_type>")]

79291

+ [(set_attr "type" "f_minmax<vfp_type>")

79292

+ (set_attr "conds" "unconditional")]

79293

)

79294

79295

;; Unimplemented insns:

79296

Index: gcc/config/arm/ldmstm.md

79297

===================================================================

79298

--- a/src/gcc/config/arm/ldmstm.md (.../tags/gcc_4_8_2_release)

79299

+++ b/src/gcc/config/arm/ldmstm.md (.../branches/gcc-4_8-branch)

79300

@@ -23,15 +23,15 @@

79301

79302

(define_insn "*ldm4_ia"

79303

[(match_parallel 0 "load_multiple_operation"

79304

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79305

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79306

(mem:SI (match_operand:SI 5 "s_register_operand" "rk")))

79307

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79308

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79309

(mem:SI (plus:SI (match_dup 5)

79310

(const_int 4))))

79311

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79312

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79313

(mem:SI (plus:SI (match_dup 5)

79314

(const_int 8))))

79315

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79316

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79317

(mem:SI (plus:SI (match_dup 5)

79318

(const_int 12))))])]

79319

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79320

@@ -41,15 +41,15 @@

79321

79322

(define_insn "*thumb_ldm4_ia"

79323

[(match_parallel 0 "load_multiple_operation"

79324

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79325

+ [(set (match_operand:SI 1 "low_register_operand" "")

79326

(mem:SI (match_operand:SI 5 "s_register_operand" "l")))

79327

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79328

+ (set (match_operand:SI 2 "low_register_operand" "")

79329

(mem:SI (plus:SI (match_dup 5)

79330

(const_int 4))))

79331

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79332

+ (set (match_operand:SI 3 "low_register_operand" "")

79333

(mem:SI (plus:SI (match_dup 5)

79334

(const_int 8))))

79335

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79336

+ (set (match_operand:SI 4 "low_register_operand" "")

79337

(mem:SI (plus:SI (match_dup 5)

79338

(const_int 12))))])]

79339

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"

79340

@@ -60,15 +60,15 @@

79341

[(match_parallel 0 "load_multiple_operation"

79342

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79343

(plus:SI (match_dup 5) (const_int 16)))

79344

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79345

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79346

(mem:SI (match_dup 5)))

79347

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79348

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79349

(mem:SI (plus:SI (match_dup 5)

79350

(const_int 4))))

79351

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79352

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79353

(mem:SI (plus:SI (match_dup 5)

79354

(const_int 8))))

79355

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79356

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79357

(mem:SI (plus:SI (match_dup 5)

79358

(const_int 12))))])]

79359

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

79360

@@ -80,15 +80,15 @@

79361

[(match_parallel 0 "load_multiple_operation"

79362

[(set (match_operand:SI 5 "s_register_operand" "+&l")

79363

(plus:SI (match_dup 5) (const_int 16)))

79364

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79365

+ (set (match_operand:SI 1 "low_register_operand" "")

79366

(mem:SI (match_dup 5)))

79367

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79368

+ (set (match_operand:SI 2 "low_register_operand" "")

79369

(mem:SI (plus:SI (match_dup 5)

79370

(const_int 4))))

79371

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79372

+ (set (match_operand:SI 3 "low_register_operand" "")

79373

(mem:SI (plus:SI (match_dup 5)

79374

(const_int 8))))

79375

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79376

+ (set (match_operand:SI 4 "low_register_operand" "")

79377

(mem:SI (plus:SI (match_dup 5)

79378

(const_int 12))))])]

79379

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"

79380

@@ -98,13 +98,13 @@

79381

(define_insn "*stm4_ia"

79382

[(match_parallel 0 "store_multiple_operation"

79383

[(set (mem:SI (match_operand:SI 5 "s_register_operand" "rk"))

79384

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79385

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79386

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

79387

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79388

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79389

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

79390

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79391

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79392

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

79393

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79394

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79395

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79396

"stm%(ia%)\t%5, {%1, %2, %3, %4}"

79397

[(set_attr "type" "store4")

79398

@@ -115,13 +115,13 @@

79399

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79400

(plus:SI (match_dup 5) (const_int 16)))

79401

(set (mem:SI (match_dup 5))

79402

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79403

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79404

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

79405

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79406

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79407

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

79408

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79409

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79410

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

79411

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79412

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79413

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

79414

"stm%(ia%)\t%5!, {%1, %2, %3, %4}"

79415

[(set_attr "type" "store4")

79416

@@ -132,13 +132,13 @@

79417

[(set (match_operand:SI 5 "s_register_operand" "+&l")

79418

(plus:SI (match_dup 5) (const_int 16)))

79419

(set (mem:SI (match_dup 5))

79420

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79421

+ (match_operand:SI 1 "low_register_operand" ""))

79422

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

79423

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79424

+ (match_operand:SI 2 "low_register_operand" ""))

79425

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

79426

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79427

+ (match_operand:SI 3 "low_register_operand" ""))

79428

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

79429

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79430

+ (match_operand:SI 4 "low_register_operand" ""))])]

79431

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"

79432

"stm%(ia%)\t%5!, {%1, %2, %3, %4}"

79433

[(set_attr "type" "store4")])

79434

@@ -145,16 +145,16 @@

79435

79436

(define_insn "*ldm4_ib"

79437

[(match_parallel 0 "load_multiple_operation"

79438

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79439

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79440

(mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk")

79441

(const_int 4))))

79442

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79443

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79444

(mem:SI (plus:SI (match_dup 5)

79445

(const_int 8))))

79446

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79447

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79448

(mem:SI (plus:SI (match_dup 5)

79449

(const_int 12))))

79450

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79451

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79452

(mem:SI (plus:SI (match_dup 5)

79453

(const_int 16))))])]

79454

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79455

@@ -166,16 +166,16 @@

79456

[(match_parallel 0 "load_multiple_operation"

79457

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79458

(plus:SI (match_dup 5) (const_int 16)))

79459

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79460

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79461

(mem:SI (plus:SI (match_dup 5)

79462

(const_int 4))))

79463

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79464

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79465

(mem:SI (plus:SI (match_dup 5)

79466

(const_int 8))))

79467

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79468

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79469

(mem:SI (plus:SI (match_dup 5)

79470

(const_int 12))))

79471

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79472

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79473

(mem:SI (plus:SI (match_dup 5)

79474

(const_int 16))))])]

79475

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

79476

@@ -186,13 +186,13 @@

79477

(define_insn "*stm4_ib"

79478

[(match_parallel 0 "store_multiple_operation"

79479

[(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int 4)))

79480

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79481

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79482

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

79483

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79484

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79485

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

79486

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79487

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79488

(set (mem:SI (plus:SI (match_dup 5) (const_int 16)))

79489

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79490

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79491

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79492

"stm%(ib%)\t%5, {%1, %2, %3, %4}"

79493

[(set_attr "type" "store4")

79494

@@ -203,13 +203,13 @@

79495

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79496

(plus:SI (match_dup 5) (const_int 16)))

79497

(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))

79498

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79499

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79500

(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))

79501

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79502

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79503

(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))

79504

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79505

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79506

(set (mem:SI (plus:SI (match_dup 5) (const_int 16)))

79507

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79508

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79509

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

79510

"stm%(ib%)\t%5!, {%1, %2, %3, %4}"

79511

[(set_attr "type" "store4")

79512

@@ -217,16 +217,16 @@

79513

79514

(define_insn "*ldm4_da"

79515

[(match_parallel 0 "load_multiple_operation"

79516

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79517

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79518

(mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk")

79519

(const_int -12))))

79520

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79521

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79522

(mem:SI (plus:SI (match_dup 5)

79523

(const_int -8))))

79524

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79525

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79526

(mem:SI (plus:SI (match_dup 5)

79527

(const_int -4))))

79528

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79529

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79530

(mem:SI (match_dup 5)))])]

79531

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79532

"ldm%(da%)\t%5, {%1, %2, %3, %4}"

79533

@@ -237,16 +237,16 @@

79534

[(match_parallel 0 "load_multiple_operation"

79535

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79536

(plus:SI (match_dup 5) (const_int -16)))

79537

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79538

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79539

(mem:SI (plus:SI (match_dup 5)

79540

(const_int -12))))

79541

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79542

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79543

(mem:SI (plus:SI (match_dup 5)

79544

(const_int -8))))

79545

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79546

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79547

(mem:SI (plus:SI (match_dup 5)

79548

(const_int -4))))

79549

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79550

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79551

(mem:SI (match_dup 5)))])]

79552

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

79553

"ldm%(da%)\t%5!, {%1, %2, %3, %4}"

79554

@@ -256,13 +256,13 @@

79555

(define_insn "*stm4_da"

79556

[(match_parallel 0 "store_multiple_operation"

79557

[(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int -12)))

79558

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79559

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79560

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

79561

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79562

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79563

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

79564

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79565

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79566

(set (mem:SI (match_dup 5))

79567

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79568

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79569

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79570

"stm%(da%)\t%5, {%1, %2, %3, %4}"

79571

[(set_attr "type" "store4")

79572

@@ -273,13 +273,13 @@

79573

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79574

(plus:SI (match_dup 5) (const_int -16)))

79575

(set (mem:SI (plus:SI (match_dup 5) (const_int -12)))

79576

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79577

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79578

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

79579

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79580

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79581

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

79582

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79583

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79584

(set (mem:SI (match_dup 5))

79585

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79586

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79587

"TARGET_ARM && XVECLEN (operands[0], 0) == 5"

79588

"stm%(da%)\t%5!, {%1, %2, %3, %4}"

79589

[(set_attr "type" "store4")

79590

@@ -287,16 +287,16 @@

79591

79592

(define_insn "*ldm4_db"

79593

[(match_parallel 0 "load_multiple_operation"

79594

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79595

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79596

(mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk")

79597

(const_int -16))))

79598

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79599

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79600

(mem:SI (plus:SI (match_dup 5)

79601

(const_int -12))))

79602

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79603

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79604

(mem:SI (plus:SI (match_dup 5)

79605

(const_int -8))))

79606

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79607

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79608

(mem:SI (plus:SI (match_dup 5)

79609

(const_int -4))))])]

79610

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79611

@@ -308,16 +308,16 @@

79612

[(match_parallel 0 "load_multiple_operation"

79613

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79614

(plus:SI (match_dup 5) (const_int -16)))

79615

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79616

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79617

(mem:SI (plus:SI (match_dup 5)

79618

(const_int -16))))

79619

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79620

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79621

(mem:SI (plus:SI (match_dup 5)

79622

(const_int -12))))

79623

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79624

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79625

(mem:SI (plus:SI (match_dup 5)

79626

(const_int -8))))

79627

- (set (match_operand:SI 4 "arm_hard_register_operand" "")

79628

+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")

79629

(mem:SI (plus:SI (match_dup 5)

79630

(const_int -4))))])]

79631

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

79632

@@ -328,13 +328,13 @@

79633

(define_insn "*stm4_db"

79634

[(match_parallel 0 "store_multiple_operation"

79635

[(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int -16)))

79636

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79637

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79638

(set (mem:SI (plus:SI (match_dup 5) (const_int -12)))

79639

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79640

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79641

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

79642

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79643

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79644

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

79645

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79646

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79647

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79648

"stm%(db%)\t%5, {%1, %2, %3, %4}"

79649

[(set_attr "type" "store4")

79650

@@ -345,13 +345,13 @@

79651

[(set (match_operand:SI 5 "s_register_operand" "+&rk")

79652

(plus:SI (match_dup 5) (const_int -16)))

79653

(set (mem:SI (plus:SI (match_dup 5) (const_int -16)))

79654

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79655

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79656

(set (mem:SI (plus:SI (match_dup 5) (const_int -12)))

79657

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79658

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79659

(set (mem:SI (plus:SI (match_dup 5) (const_int -8)))

79660

- (match_operand:SI 3 "arm_hard_register_operand" ""))

79661

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))

79662

(set (mem:SI (plus:SI (match_dup 5) (const_int -4)))

79663

- (match_operand:SI 4 "arm_hard_register_operand" ""))])]

79664

+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]

79665

"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"

79666

"stm%(db%)\t%5!, {%1, %2, %3, %4}"

79667

[(set_attr "type" "store4")

79668

@@ -466,12 +466,12 @@

79669

79670

(define_insn "*ldm3_ia"

79671

[(match_parallel 0 "load_multiple_operation"

79672

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79673

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79674

(mem:SI (match_operand:SI 4 "s_register_operand" "rk")))

79675

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79676

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79677

(mem:SI (plus:SI (match_dup 4)

79678

(const_int 4))))

79679

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79680

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79681

(mem:SI (plus:SI (match_dup 4)

79682

(const_int 8))))])]

79683

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

79684

@@ -481,12 +481,12 @@

79685

79686

(define_insn "*thumb_ldm3_ia"

79687

[(match_parallel 0 "load_multiple_operation"

79688

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79689

+ [(set (match_operand:SI 1 "low_register_operand" "")

79690

(mem:SI (match_operand:SI 4 "s_register_operand" "l")))

79691

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79692

+ (set (match_operand:SI 2 "low_register_operand" "")

79693

(mem:SI (plus:SI (match_dup 4)

79694

(const_int 4))))

79695

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79696

+ (set (match_operand:SI 3 "low_register_operand" "")

79697

(mem:SI (plus:SI (match_dup 4)

79698

(const_int 8))))])]

79699

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"

79700

@@ -497,12 +497,12 @@

79701

[(match_parallel 0 "load_multiple_operation"

79702

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79703

(plus:SI (match_dup 4) (const_int 12)))

79704

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79705

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79706

(mem:SI (match_dup 4)))

79707

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79708

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79709

(mem:SI (plus:SI (match_dup 4)

79710

(const_int 4))))

79711

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79712

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79713

(mem:SI (plus:SI (match_dup 4)

79714

(const_int 8))))])]

79715

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79716

@@ -514,12 +514,12 @@

79717

[(match_parallel 0 "load_multiple_operation"

79718

[(set (match_operand:SI 4 "s_register_operand" "+&l")

79719

(plus:SI (match_dup 4) (const_int 12)))

79720

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79721

+ (set (match_operand:SI 1 "low_register_operand" "")

79722

(mem:SI (match_dup 4)))

79723

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79724

+ (set (match_operand:SI 2 "low_register_operand" "")

79725

(mem:SI (plus:SI (match_dup 4)

79726

(const_int 4))))

79727

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79728

+ (set (match_operand:SI 3 "low_register_operand" "")

79729

(mem:SI (plus:SI (match_dup 4)

79730

(const_int 8))))])]

79731

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"

79732

@@ -529,11 +529,11 @@

79733

(define_insn "*stm3_ia"

79734

[(match_parallel 0 "store_multiple_operation"

79735

[(set (mem:SI (match_operand:SI 4 "s_register_operand" "rk"))

79736

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79737

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79738

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

79739

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79740

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79741

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

79742

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79743

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79744

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

79745

"stm%(ia%)\t%4, {%1, %2, %3}"

79746

[(set_attr "type" "store3")

79747

@@ -544,11 +544,11 @@

79748

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79749

(plus:SI (match_dup 4) (const_int 12)))

79750

(set (mem:SI (match_dup 4))

79751

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79752

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79753

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

79754

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79755

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79756

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

79757

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79758

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79759

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79760

"stm%(ia%)\t%4!, {%1, %2, %3}"

79761

[(set_attr "type" "store3")

79762

@@ -559,11 +559,11 @@

79763

[(set (match_operand:SI 4 "s_register_operand" "+&l")

79764

(plus:SI (match_dup 4) (const_int 12)))

79765

(set (mem:SI (match_dup 4))

79766

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79767

+ (match_operand:SI 1 "low_register_operand" ""))

79768

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

79769

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79770

+ (match_operand:SI 2 "low_register_operand" ""))

79771

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

79772

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79773

+ (match_operand:SI 3 "low_register_operand" ""))])]

79774

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"

79775

"stm%(ia%)\t%4!, {%1, %2, %3}"

79776

[(set_attr "type" "store3")])

79777

@@ -570,13 +570,13 @@

79778

79779

(define_insn "*ldm3_ib"

79780

[(match_parallel 0 "load_multiple_operation"

79781

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79782

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79783

(mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk")

79784

(const_int 4))))

79785

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79786

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79787

(mem:SI (plus:SI (match_dup 4)

79788

(const_int 8))))

79789

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79790

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79791

(mem:SI (plus:SI (match_dup 4)

79792

(const_int 12))))])]

79793

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

79794

@@ -588,13 +588,13 @@

79795

[(match_parallel 0 "load_multiple_operation"

79796

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79797

(plus:SI (match_dup 4) (const_int 12)))

79798

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79799

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79800

(mem:SI (plus:SI (match_dup 4)

79801

(const_int 4))))

79802

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79803

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79804

(mem:SI (plus:SI (match_dup 4)

79805

(const_int 8))))

79806

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79807

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79808

(mem:SI (plus:SI (match_dup 4)

79809

(const_int 12))))])]

79810

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79811

@@ -605,11 +605,11 @@

79812

(define_insn "*stm3_ib"

79813

[(match_parallel 0 "store_multiple_operation"

79814

[(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int 4)))

79815

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79816

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79817

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

79818

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79819

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79820

(set (mem:SI (plus:SI (match_dup 4) (const_int 12)))

79821

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79822

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79823

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

79824

"stm%(ib%)\t%4, {%1, %2, %3}"

79825

[(set_attr "type" "store3")

79826

@@ -620,11 +620,11 @@

79827

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79828

(plus:SI (match_dup 4) (const_int 12)))

79829

(set (mem:SI (plus:SI (match_dup 4) (const_int 4)))

79830

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79831

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79832

(set (mem:SI (plus:SI (match_dup 4) (const_int 8)))

79833

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79834

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79835

(set (mem:SI (plus:SI (match_dup 4) (const_int 12)))

79836

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79837

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79838

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79839

"stm%(ib%)\t%4!, {%1, %2, %3}"

79840

[(set_attr "type" "store3")

79841

@@ -632,13 +632,13 @@

79842

79843

(define_insn "*ldm3_da"

79844

[(match_parallel 0 "load_multiple_operation"

79845

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79846

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79847

(mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk")

79848

(const_int -8))))

79849

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79850

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79851

(mem:SI (plus:SI (match_dup 4)

79852

(const_int -4))))

79853

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79854

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79855

(mem:SI (match_dup 4)))])]

79856

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

79857

"ldm%(da%)\t%4, {%1, %2, %3}"

79858

@@ -649,13 +649,13 @@

79859

[(match_parallel 0 "load_multiple_operation"

79860

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79861

(plus:SI (match_dup 4) (const_int -12)))

79862

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79863

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79864

(mem:SI (plus:SI (match_dup 4)

79865

(const_int -8))))

79866

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79867

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79868

(mem:SI (plus:SI (match_dup 4)

79869

(const_int -4))))

79870

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79871

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79872

(mem:SI (match_dup 4)))])]

79873

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79874

"ldm%(da%)\t%4!, {%1, %2, %3}"

79875

@@ -665,11 +665,11 @@

79876

(define_insn "*stm3_da"

79877

[(match_parallel 0 "store_multiple_operation"

79878

[(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int -8)))

79879

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79880

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79881

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

79882

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79883

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79884

(set (mem:SI (match_dup 4))

79885

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79886

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79887

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

79888

"stm%(da%)\t%4, {%1, %2, %3}"

79889

[(set_attr "type" "store3")

79890

@@ -680,11 +680,11 @@

79891

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79892

(plus:SI (match_dup 4) (const_int -12)))

79893

(set (mem:SI (plus:SI (match_dup 4) (const_int -8)))

79894

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79895

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79896

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

79897

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79898

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79899

(set (mem:SI (match_dup 4))

79900

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79901

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79902

"TARGET_ARM && XVECLEN (operands[0], 0) == 4"

79903

"stm%(da%)\t%4!, {%1, %2, %3}"

79904

[(set_attr "type" "store3")

79905

@@ -692,13 +692,13 @@

79906

79907

(define_insn "*ldm3_db"

79908

[(match_parallel 0 "load_multiple_operation"

79909

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79910

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79911

(mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk")

79912

(const_int -12))))

79913

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79914

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79915

(mem:SI (plus:SI (match_dup 4)

79916

(const_int -8))))

79917

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79918

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79919

(mem:SI (plus:SI (match_dup 4)

79920

(const_int -4))))])]

79921

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

79922

@@ -710,13 +710,13 @@

79923

[(match_parallel 0 "load_multiple_operation"

79924

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79925

(plus:SI (match_dup 4) (const_int -12)))

79926

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79927

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79928

(mem:SI (plus:SI (match_dup 4)

79929

(const_int -12))))

79930

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79931

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79932

(mem:SI (plus:SI (match_dup 4)

79933

(const_int -8))))

79934

- (set (match_operand:SI 3 "arm_hard_register_operand" "")

79935

+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")

79936

(mem:SI (plus:SI (match_dup 4)

79937

(const_int -4))))])]

79938

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79939

@@ -727,11 +727,11 @@

79940

(define_insn "*stm3_db"

79941

[(match_parallel 0 "store_multiple_operation"

79942

[(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int -12)))

79943

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79944

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79945

(set (mem:SI (plus:SI (match_dup 4) (const_int -8)))

79946

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79947

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79948

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

79949

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79950

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79951

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

79952

"stm%(db%)\t%4, {%1, %2, %3}"

79953

[(set_attr "type" "store3")

79954

@@ -742,11 +742,11 @@

79955

[(set (match_operand:SI 4 "s_register_operand" "+&rk")

79956

(plus:SI (match_dup 4) (const_int -12)))

79957

(set (mem:SI (plus:SI (match_dup 4) (const_int -12)))

79958

- (match_operand:SI 1 "arm_hard_register_operand" ""))

79959

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

79960

(set (mem:SI (plus:SI (match_dup 4) (const_int -8)))

79961

- (match_operand:SI 2 "arm_hard_register_operand" ""))

79962

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))

79963

(set (mem:SI (plus:SI (match_dup 4) (const_int -4)))

79964

- (match_operand:SI 3 "arm_hard_register_operand" ""))])]

79965

+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]

79966

"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"

79967

"stm%(db%)\t%4!, {%1, %2, %3}"

79968

[(set_attr "type" "store3")

79969

@@ -847,9 +847,9 @@

79970

79971

(define_insn "*ldm2_ia"

79972

[(match_parallel 0 "load_multiple_operation"

79973

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79974

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79975

(mem:SI (match_operand:SI 3 "s_register_operand" "rk")))

79976

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79977

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

79978

(mem:SI (plus:SI (match_dup 3)

79979

(const_int 4))))])]

79980

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

79981

@@ -859,9 +859,9 @@

79982

79983

(define_insn "*thumb_ldm2_ia"

79984

[(match_parallel 0 "load_multiple_operation"

79985

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

79986

+ [(set (match_operand:SI 1 "low_register_operand" "")

79987

(mem:SI (match_operand:SI 3 "s_register_operand" "l")))

79988

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

79989

+ (set (match_operand:SI 2 "low_register_operand" "")

79990

(mem:SI (plus:SI (match_dup 3)

79991

(const_int 4))))])]

79992

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 2"

79993

@@ -872,9 +872,9 @@

79994

[(match_parallel 0 "load_multiple_operation"

79995

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

79996

(plus:SI (match_dup 3) (const_int 8)))

79997

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

79998

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

79999

(mem:SI (match_dup 3)))

80000

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80001

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

80002

(mem:SI (plus:SI (match_dup 3)

80003

(const_int 4))))])]

80004

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

80005

@@ -886,9 +886,9 @@

80006

[(match_parallel 0 "load_multiple_operation"

80007

[(set (match_operand:SI 3 "s_register_operand" "+&l")

80008

(plus:SI (match_dup 3) (const_int 8)))

80009

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

80010

+ (set (match_operand:SI 1 "low_register_operand" "")

80011

(mem:SI (match_dup 3)))

80012

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80013

+ (set (match_operand:SI 2 "low_register_operand" "")

80014

(mem:SI (plus:SI (match_dup 3)

80015

(const_int 4))))])]

80016

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"

80017

@@ -898,9 +898,9 @@

80018

(define_insn "*stm2_ia"

80019

[(match_parallel 0 "store_multiple_operation"

80020

[(set (mem:SI (match_operand:SI 3 "s_register_operand" "rk"))

80021

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80022

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80023

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

80024

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80025

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80026

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

80027

"stm%(ia%)\t%3, {%1, %2}"

80028

[(set_attr "type" "store2")

80029

@@ -911,9 +911,9 @@

80030

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

80031

(plus:SI (match_dup 3) (const_int 8)))

80032

(set (mem:SI (match_dup 3))

80033

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80034

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80035

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

80036

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80037

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80038

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

80039

"stm%(ia%)\t%3!, {%1, %2}"

80040

[(set_attr "type" "store2")

80041

@@ -924,9 +924,9 @@

80042

[(set (match_operand:SI 3 "s_register_operand" "+&l")

80043

(plus:SI (match_dup 3) (const_int 8)))

80044

(set (mem:SI (match_dup 3))

80045

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80046

+ (match_operand:SI 1 "low_register_operand" ""))

80047

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

80048

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80049

+ (match_operand:SI 2 "low_register_operand" ""))])]

80050

"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"

80051

"stm%(ia%)\t%3!, {%1, %2}"

80052

[(set_attr "type" "store2")])

80053

@@ -933,10 +933,10 @@

80054

80055

(define_insn "*ldm2_ib"

80056

[(match_parallel 0 "load_multiple_operation"

80057

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

80058

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

80059

(mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk")

80060

(const_int 4))))

80061

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80062

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

80063

(mem:SI (plus:SI (match_dup 3)

80064

(const_int 8))))])]

80065

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

80066

@@ -948,10 +948,10 @@

80067

[(match_parallel 0 "load_multiple_operation"

80068

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

80069

(plus:SI (match_dup 3) (const_int 8)))

80070

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

80071

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

80072

(mem:SI (plus:SI (match_dup 3)

80073

(const_int 4))))

80074

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80075

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

80076

(mem:SI (plus:SI (match_dup 3)

80077

(const_int 8))))])]

80078

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

80079

@@ -962,9 +962,9 @@

80080

(define_insn "*stm2_ib"

80081

[(match_parallel 0 "store_multiple_operation"

80082

[(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int 4)))

80083

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80084

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80085

(set (mem:SI (plus:SI (match_dup 3) (const_int 8)))

80086

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80087

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80088

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

80089

"stm%(ib%)\t%3, {%1, %2}"

80090

[(set_attr "type" "store2")

80091

@@ -975,9 +975,9 @@

80092

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

80093

(plus:SI (match_dup 3) (const_int 8)))

80094

(set (mem:SI (plus:SI (match_dup 3) (const_int 4)))

80095

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80096

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80097

(set (mem:SI (plus:SI (match_dup 3) (const_int 8)))

80098

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80099

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80100

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

80101

"stm%(ib%)\t%3!, {%1, %2}"

80102

[(set_attr "type" "store2")

80103

@@ -985,10 +985,10 @@

80104

80105

(define_insn "*ldm2_da"

80106

[(match_parallel 0 "load_multiple_operation"

80107

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

80108

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

80109

(mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk")

80110

(const_int -4))))

80111

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80112

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

80113

(mem:SI (match_dup 3)))])]

80114

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

80115

"ldm%(da%)\t%3, {%1, %2}"

80116

@@ -999,10 +999,10 @@

80117

[(match_parallel 0 "load_multiple_operation"

80118

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

80119

(plus:SI (match_dup 3) (const_int -8)))

80120

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

80121

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

80122

(mem:SI (plus:SI (match_dup 3)

80123

(const_int -4))))

80124

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80125

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

80126

(mem:SI (match_dup 3)))])]

80127

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

80128

"ldm%(da%)\t%3!, {%1, %2}"

80129

@@ -1012,9 +1012,9 @@

80130

(define_insn "*stm2_da"

80131

[(match_parallel 0 "store_multiple_operation"

80132

[(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int -4)))

80133

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80134

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80135

(set (mem:SI (match_dup 3))

80136

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80137

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80138

"TARGET_ARM && XVECLEN (operands[0], 0) == 2"

80139

"stm%(da%)\t%3, {%1, %2}"

80140

[(set_attr "type" "store2")

80141

@@ -1025,9 +1025,9 @@

80142

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

80143

(plus:SI (match_dup 3) (const_int -8)))

80144

(set (mem:SI (plus:SI (match_dup 3) (const_int -4)))

80145

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80146

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80147

(set (mem:SI (match_dup 3))

80148

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80149

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80150

"TARGET_ARM && XVECLEN (operands[0], 0) == 3"

80151

"stm%(da%)\t%3!, {%1, %2}"

80152

[(set_attr "type" "store2")

80153

@@ -1035,10 +1035,10 @@

80154

80155

(define_insn "*ldm2_db"

80156

[(match_parallel 0 "load_multiple_operation"

80157

- [(set (match_operand:SI 1 "arm_hard_register_operand" "")

80158

+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")

80159

(mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk")

80160

(const_int -8))))

80161

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80162

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

80163

(mem:SI (plus:SI (match_dup 3)

80164

(const_int -4))))])]

80165

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

80166

@@ -1050,10 +1050,10 @@

80167

[(match_parallel 0 "load_multiple_operation"

80168

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

80169

(plus:SI (match_dup 3) (const_int -8)))

80170

- (set (match_operand:SI 1 "arm_hard_register_operand" "")

80171

+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")

80172

(mem:SI (plus:SI (match_dup 3)

80173

(const_int -8))))

80174

- (set (match_operand:SI 2 "arm_hard_register_operand" "")

80175

+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")

80176

(mem:SI (plus:SI (match_dup 3)

80177

(const_int -4))))])]

80178

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

80179

@@ -1064,9 +1064,9 @@

80180

(define_insn "*stm2_db"

80181

[(match_parallel 0 "store_multiple_operation"

80182

[(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int -8)))

80183

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80184

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80185

(set (mem:SI (plus:SI (match_dup 3) (const_int -4)))

80186

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80187

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80188

"TARGET_32BIT && XVECLEN (operands[0], 0) == 2"

80189

"stm%(db%)\t%3, {%1, %2}"

80190

[(set_attr "type" "store2")

80191

@@ -1077,9 +1077,9 @@

80192

[(set (match_operand:SI 3 "s_register_operand" "+&rk")

80193

(plus:SI (match_dup 3) (const_int -8)))

80194

(set (mem:SI (plus:SI (match_dup 3) (const_int -8)))

80195

- (match_operand:SI 1 "arm_hard_register_operand" ""))

80196

+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))

80197

(set (mem:SI (plus:SI (match_dup 3) (const_int -4)))

80198

- (match_operand:SI 2 "arm_hard_register_operand" ""))])]

80199

+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]

80200

"TARGET_32BIT && XVECLEN (operands[0], 0) == 3"

80201

"stm%(db%)\t%3!, {%1, %2}"

80202

[(set_attr "type" "store2")

80203

Index: gcc/config/arm/predicates.md

80204

===================================================================

80205

--- a/src/gcc/config/arm/predicates.md (.../tags/gcc_4_8_2_release)

80206

+++ b/src/gcc/config/arm/predicates.md (.../branches/gcc-4_8-branch)

80207

@@ -31,11 +31,11 @@

80208

|| REGNO_REG_CLASS (REGNO (op)) != NO_REGS));

80209

})

80210

80211

-;; Any hard register.

80212

-(define_predicate "arm_hard_register_operand"

80213

+;; Any general register.

80214

+(define_predicate "arm_hard_general_register_operand"

80215

(match_code "reg")

80216

{

80217

- return REGNO (op) < FIRST_PSEUDO_REGISTER;

80218

+ return REGNO (op) <= LAST_ARM_REGNUM;

80219

})

80220

80221

;; A low register.

80222

@@ -76,6 +76,12 @@

80223

&& REGNO_REG_CLASS (REGNO (op)) == VFP_REGS)));

80224

})

80225

80226

+(define_predicate "vfp_hard_register_operand"

80227

+ (match_code "reg")

80228

+{

80229

+ return (IS_VFP_REGNUM (REGNO (op)));

80230

+})

80231

+

80232

(define_predicate "zero_operand"

80233

(and (match_code "const_int,const_double,const_vector")

80234

(match_test "op == CONST0_RTX (mode)")))

80235

Index: gcc/config/arm/arm-ldmstm.ml

80236

===================================================================

80237

--- a/src/gcc/config/arm/arm-ldmstm.ml (.../tags/gcc_4_8_2_release)

80238

+++ b/src/gcc/config/arm/arm-ldmstm.ml (.../branches/gcc-4_8-branch)

80239

@@ -67,10 +67,13 @@

80240

Printf.sprintf ("(match_operand:SI %d \"s_register_operand\" \"%s%s\")")

80241

(nregs + 1) (inout_constr op_type) (constr thumb)

80242

80243

+let reg_predicate thumb =

80244

+ if thumb then "low_register_operand" else "arm_hard_general_register_operand"

80245

+

80246

let write_ldm_set thumb nregs offset opnr first =

80247

let indent = " " in

80248

Printf.printf "%s" (if first then " [" else indent);

80249

- Printf.printf "(set (match_operand:SI %d \"arm_hard_register_operand\" \"\")\n" opnr;

80250

+ Printf.printf "(set (match_operand:SI %d \"%s\" \"\")\n" opnr (reg_predicate thumb);

80251

Printf.printf "%s (mem:SI " indent;

80252

begin if offset != 0 then Printf.printf "(plus:SI " end;

80253

Printf.printf "%s" (destreg nregs first IN thumb);

80254

@@ -84,7 +87,7 @@

80255

begin if offset != 0 then Printf.printf "(plus:SI " end;

80256

Printf.printf "%s" (destreg nregs first IN thumb);

80257

begin if offset != 0 then Printf.printf " (const_int %d))" offset end;

80258

- Printf.printf ")\n%s (match_operand:SI %d \"arm_hard_register_operand\" \"\"))" indent opnr

80259

+ Printf.printf ")\n%s (match_operand:SI %d \"%s\" \"\"))" indent opnr (reg_predicate thumb)

80260

80261

let write_ldm_peep_set extra_indent nregs opnr first =

80262

let indent = " " ^ extra_indent in

80263

Index: gcc/config/arm/iterators.md

80264

===================================================================

80265

--- a/src/gcc/config/arm/iterators.md (.../tags/gcc_4_8_2_release)

80266

+++ b/src/gcc/config/arm/iterators.md (.../branches/gcc-4_8-branch)

80267

@@ -493,6 +493,10 @@

80268

(UNSPEC_VRINTA "no") (UNSPEC_VRINTM "no")

80269

(UNSPEC_VRINTR "yes") (UNSPEC_VRINTX "yes")])

80270

80271

+(define_int_attr vrint_conds [(UNSPEC_VRINTZ "nocond") (UNSPEC_VRINTP "unconditional")

80272

+ (UNSPEC_VRINTA "unconditional") (UNSPEC_VRINTM "unconditional")

80273

+ (UNSPEC_VRINTR "nocond") (UNSPEC_VRINTX "nocond")])

80274

+

80275

(define_int_attr nvrint_variant [(UNSPEC_NVRINTZ "z") (UNSPEC_NVRINTP "p")

80276

(UNSPEC_NVRINTA "a") (UNSPEC_NVRINTM "m")

80277

(UNSPEC_NVRINTX "x") (UNSPEC_NVRINTN "n")])

80278

Index: gcc/config/arm/arm.md

80279

===================================================================

80280

--- a/src/gcc/config/arm/arm.md (.../tags/gcc_4_8_2_release)

80281

+++ b/src/gcc/config/arm/arm.md (.../branches/gcc-4_8-branch)

80282

@@ -11036,7 +11036,7 @@

80283

[(set (match_operand:SI 1 "s_register_operand" "+rk")

80284

(plus:SI (match_dup 1)

80285

(match_operand:SI 2 "const_int_operand" "I")))

80286

- (set (match_operand:DF 3 "arm_hard_register_operand" "")

80287

+ (set (match_operand:DF 3 "vfp_hard_register_operand" "")

80288

(mem:DF (match_dup 1)))])]

80289

"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"

80290

"*

80291

@@ -11270,7 +11270,9 @@

80292

(match_operand:SI 1 "" "")

80293

(match_operand:SI 2 "" ""))]

80294

"TARGET_32BIT && arm_arch5e"

80295

- "pld\\t%a0")

80296

+ "pld\\t%a0"

80297

+ [(set_attr "type" "load1")]

80298

+)

80299

80300

;; General predication pattern

80301

80302

Index: gcc/config/pa/pa.c

80303

===================================================================

80304

--- a/src/gcc/config/pa/pa.c (.../tags/gcc_4_8_2_release)

80305

+++ b/src/gcc/config/pa/pa.c (.../branches/gcc-4_8-branch)

80306

@@ -912,9 +912,12 @@

80307

legitimize_tls_address (rtx addr)

80308

{

80309

rtx ret, insn, tmp, t1, t2, tp;

80310

- enum tls_model model = SYMBOL_REF_TLS_MODEL (addr);

80311

80312

- switch (model)

80313

+ /* Currently, we can't handle anything but a SYMBOL_REF. */

80314

+ if (GET_CODE (addr) != SYMBOL_REF)

80315

+ return addr;

80316

+

80317

+ switch (SYMBOL_REF_TLS_MODEL (addr))

80318

{

80319

case TLS_MODEL_GLOBAL_DYNAMIC:

80320

tmp = gen_reg_rtx (Pmode);

80321

@@ -1035,7 +1038,7 @@

80322

&& !REG_POINTER (XEXP (x, 1)))

80323

return gen_rtx_PLUS (Pmode, XEXP (x, 1), XEXP (x, 0));

80324

80325

- if (PA_SYMBOL_REF_TLS_P (x))

80326

+ if (pa_tls_referenced_p (x))

80327

return legitimize_tls_address (x);

80328

else if (flag_pic)

80329

return legitimize_pic_address (x, mode, gen_reg_rtx (Pmode));

80330

@@ -1916,9 +1919,10 @@

80331

not consider them legitimate constants. Loop optimizations can

80332

call the emit_move_xxx with one as a source. */

80333

if ((GET_CODE (operand1) != HIGH && immediate_operand (operand1, mode))

80334

+ || (GET_CODE (operand1) == HIGH

80335

+ && symbolic_operand (XEXP (operand1, 0), mode))

80336

|| function_label_operand (operand1, VOIDmode)

80337

- || (GET_CODE (operand1) == HIGH

80338

- && symbolic_operand (XEXP (operand1, 0), mode)))

80339

+ || pa_tls_referenced_p (operand1))

80340

{

80341

int ishighonly = 0;

80342

80343

@@ -2625,7 +2629,7 @@

80344

if (optype0 == REGOP)

80345

latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);

80346

else if (optype0 == OFFSOP)

80347

- latehalf[0] = adjust_address (operands[0], SImode, 4);

80348

+ latehalf[0] = adjust_address_nv (operands[0], SImode, 4);

80349

else

80350

latehalf[0] = operands[0];

80351

80352

@@ -2632,7 +2636,7 @@

80353

if (optype1 == REGOP)

80354

latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);

80355

else if (optype1 == OFFSOP)

80356

- latehalf[1] = adjust_address (operands[1], SImode, 4);

80357

+ latehalf[1] = adjust_address_nv (operands[1], SImode, 4);

80358

else if (optype1 == CNSTOP)

80359

split_double (operands[1], &operands[1], &latehalf[1]);

80360

else

80361

@@ -7539,7 +7543,7 @@

80362

if (!TARGET_LONG_CALLS && distance < MAX_PCREL17F_OFFSET)

80363

return 8;

80364

80365

- if (TARGET_LONG_ABS_CALL && !flag_pic)

80366

+ if (!flag_pic)

80367

return 12;

80368

80369

return 24;

80370

@@ -8104,7 +8108,8 @@

80371

return 12;

80372

80373

if (TARGET_FAST_INDIRECT_CALLS

80374

- || (!TARGET_PORTABLE_RUNTIME

80375

+ || (!TARGET_LONG_CALLS

80376

+ && !TARGET_PORTABLE_RUNTIME

80377

&& ((TARGET_PA_20 && !TARGET_SOM && distance < 7600000)

80378

|| distance < MAX_PCREL17F_OFFSET)))

80379

return 8;

80380

@@ -10397,7 +10402,7 @@

80381

/* TLS_MODEL_GLOBAL_DYNAMIC and TLS_MODEL_LOCAL_DYNAMIC are not

80382

legitimate constants. The other variants can't be handled by

80383

the move patterns after reload starts. */

80384

- if (PA_SYMBOL_REF_TLS_P (x))

80385

+ if (pa_tls_referenced_p (x))

80386

return false;

80387

80388

if (TARGET_64BIT && GET_CODE (x) == CONST_DOUBLE)

80389

@@ -10522,13 +10527,13 @@

80390

80391

/* When INT14_OK_STRICT is false, a secondary reload is needed

80392

to adjust the displacement of SImode and DImode floating point

80393

- instructions. So, we return false when STRICT is true. We

80394

+ instructions but this may fail when the register also needs

80395

+ reloading. So, we return false when STRICT is true. We

80396

also reject long displacements for float mode addresses since

80397

the majority of accesses will use floating point instructions

80398

that don't support 14-bit offsets. */

80399

if (!INT14_OK_STRICT

80400

- && reload_in_progress

80401

- && strict

80402

+ && (strict || !(reload_in_progress || reload_completed))

80403

&& mode != QImode

80404

&& mode != HImode)

80405

return false;

80406

@@ -10588,8 +10593,7 @@

80407

return true;

80408

80409

if (!INT14_OK_STRICT

80410

- && reload_in_progress

80411

- && strict

80412

+ && (strict || !(reload_in_progress || reload_completed))

80413

&& mode != QImode

80414

&& mode != HImode)

80415

return false;

80416

Index: gcc/config/pa/pa.h

80417

===================================================================

80418

--- a/src/gcc/config/pa/pa.h (.../tags/gcc_4_8_2_release)

80419

+++ b/src/gcc/config/pa/pa.h (.../branches/gcc-4_8-branch)

80420

@@ -784,9 +784,9 @@

80421

80422

#define MAX_REGS_PER_ADDRESS 2

80423

80424

-/* Non-TLS symbolic references. */

80425

-#define PA_SYMBOL_REF_TLS_P(RTX) \

80426

- (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)

80427

+/* TLS symbolic reference. */

80428

+#define PA_SYMBOL_REF_TLS_P(X) \

80429

+ (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (X) != 0)

80430

80431

/* Recognize any constant value that is a valid address except

80432

for symbolic addresses. We get better CSE by rejecting them

80433

@@ -796,7 +796,8 @@

80434

#define CONSTANT_ADDRESS_P(X) \

80435

((GET_CODE (X) == LABEL_REF \

80436

|| (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \

80437

- || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \

80438

+ || GET_CODE (X) == CONST_INT \

80439

+ || (GET_CODE (X) == CONST && !pa_tls_referenced_p (X)) \

80440

|| GET_CODE (X) == HIGH) \

80441

&& (reload_in_progress || reload_completed \

80442

|| ! pa_symbolic_expression_p (X)))

80443

Index: gcc/config/mips/driver-native.c

80444

===================================================================

80445

--- a/src/gcc/config/mips/driver-native.c (.../tags/gcc_4_8_2_release)

80446

+++ b/src/gcc/config/mips/driver-native.c (.../branches/gcc-4_8-branch)

80447

@@ -58,11 +58,17 @@

80448

if (strncmp (buf, "cpu model", sizeof ("cpu model") - 1) == 0)

80449

{

80450

if (strstr (buf, "Godson2 V0.2") != NULL

80451

- || strstr (buf, "Loongson-2 V0.2") != NULL)

80452

+ || strstr (buf, "Loongson-2 V0.2") != NULL

80453

+ || strstr (buf, "Loongson-2E") != NULL)

80454

cpu = "loongson2e";

80455

else if (strstr (buf, "Godson2 V0.3") != NULL

80456

- || strstr (buf, "Loongson-2 V0.3") != NULL)

80457

+ || strstr (buf, "Loongson-2 V0.3") != NULL

80458

+ || strstr (buf, "Loongson-2F") != NULL)

80459

cpu = "loongson2f";

80460

+ else if (strstr (buf, "Godson3 V0.5") != NULL

80461

+ || strstr (buf, "Loongson-3 V0.5") != NULL

80462

+ || strstr (buf, "Loongson-3A") != NULL)

80463

+ cpu = "loongson3a";

80464

else if (strstr (buf, "SiByte SB1") != NULL)

80465

cpu = "sb1";

80466

else if (strstr (buf, "R5000") != NULL)

80467

Index: gcc/config/mips/mips.md

80468

===================================================================

80469

--- a/src/gcc/config/mips/mips.md (.../tags/gcc_4_8_2_release)

80470

+++ b/src/gcc/config/mips/mips.md (.../branches/gcc-4_8-branch)

80471

@@ -73,6 +73,11 @@

80472

UNSPEC_STORE_LEFT

80473

UNSPEC_STORE_RIGHT

80474

80475

+ ;; Integer operations that are too cumbersome to describe directly.

80476

+ UNSPEC_WSBH

80477

+ UNSPEC_DSBH

80478

+ UNSPEC_DSHD

80479

+

80480

;; Floating-point moves.

80481

UNSPEC_LOAD_LOW

80482

UNSPEC_LOAD_HIGH

80483

@@ -1294,20 +1299,32 @@

80484

80485

;; Combiner patterns for unsigned byte-add.

80486

80487

-(define_insn "*baddu_si"

80488

+(define_insn "*baddu_si_eb"

80489

[(set (match_operand:SI 0 "register_operand" "=d")

80490

(zero_extend:SI

80491

- (plus:QI (match_operand:QI 1 "register_operand" "d")

80492

- (match_operand:QI 2 "register_operand" "d"))))]

80493

- "ISA_HAS_BADDU"

80494

+ (subreg:QI

80495

+ (plus:SI (match_operand:SI 1 "register_operand" "d")

80496

+ (match_operand:SI 2 "register_operand" "d")) 3)))]

80497

+ "ISA_HAS_BADDU && BYTES_BIG_ENDIAN"

80498

"baddu\\t%0,%1,%2"

80499

[(set_attr "alu_type" "add")])

80500

80501

+(define_insn "*baddu_si_el"

80502

+ [(set (match_operand:SI 0 "register_operand" "=d")

80503

+ (zero_extend:SI

80504

+ (subreg:QI

80505

+ (plus:SI (match_operand:SI 1 "register_operand" "d")

80506

+ (match_operand:SI 2 "register_operand" "d")) 0)))]

80507

+ "ISA_HAS_BADDU && !BYTES_BIG_ENDIAN"

80508

+ "baddu\\t%0,%1,%2"

80509

+ [(set_attr "alu_type" "add")])

80510

+

80511

(define_insn "*baddu_di<mode>"

80512

[(set (match_operand:GPR 0 "register_operand" "=d")

80513

(zero_extend:GPR

80514

- (plus:QI (truncate:QI (match_operand:DI 1 "register_operand" "d"))

80515

- (truncate:QI (match_operand:DI 2 "register_operand" "d")))))]

80516

+ (truncate:QI

80517

+ (plus:DI (match_operand:DI 1 "register_operand" "d")

80518

+ (match_operand:DI 2 "register_operand" "d")))))]

80519

"ISA_HAS_BADDU && TARGET_64BIT"

80520

"baddu\\t%0,%1,%2"

80521

[(set_attr "alu_type" "add")])

80522

@@ -5367,6 +5384,56 @@

80523

}

80524

[(set_attr "type" "shift")

80525

(set_attr "mode" "<MODE>")])

80526

+

80527

+(define_insn "bswaphi2"

80528

+ [(set (match_operand:HI 0 "register_operand" "=d")

80529

+ (bswap:HI (match_operand:HI 1 "register_operand" "d")))]

80530

+ "ISA_HAS_WSBH"

80531

+ "wsbh\t%0,%1"

80532

+ [(set_attr "type" "shift")])

80533

+

80534

+(define_insn_and_split "bswapsi2"

80535

+ [(set (match_operand:SI 0 "register_operand" "=d")

80536

+ (bswap:SI (match_operand:SI 1 "register_operand" "d")))]

80537

+ "ISA_HAS_WSBH && ISA_HAS_ROR"

80538

+ "#"

80539

+ ""

80540

+ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_WSBH))

80541

+ (set (match_dup 0) (rotatert:SI (match_dup 0) (const_int 16)))]

80542

+ ""

80543

+ [(set_attr "length" "8")])

80544

+

80545

+(define_insn_and_split "bswapdi2"

80546

+ [(set (match_operand:DI 0 "register_operand" "=d")

80547

+ (bswap:DI (match_operand:DI 1 "register_operand" "d")))]

80548

+ "TARGET_64BIT && ISA_HAS_WSBH"

80549

+ "#"

80550

+ ""

80551

+ [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_DSBH))

80552

+ (set (match_dup 0) (unspec:DI [(match_dup 0)] UNSPEC_DSHD))]

80553

+ ""

80554

+ [(set_attr "length" "8")])

80555

+

80556

+(define_insn "wsbh"

80557

+ [(set (match_operand:SI 0 "register_operand" "=d")

80558

+ (unspec:SI [(match_operand:SI 1 "register_operand" "d")] UNSPEC_WSBH))]

80559

+ "ISA_HAS_WSBH"

80560

+ "wsbh\t%0,%1"

80561

+ [(set_attr "type" "shift")])

80562

+

80563

+(define_insn "dsbh"

80564

+ [(set (match_operand:DI 0 "register_operand" "=d")

80565

+ (unspec:DI [(match_operand:DI 1 "register_operand" "d")] UNSPEC_DSBH))]

80566

+ "TARGET_64BIT && ISA_HAS_WSBH"

80567

+ "dsbh\t%0,%1"

80568

+ [(set_attr "type" "shift")])

80569

+

80570

+(define_insn "dshd"

80571

+ [(set (match_operand:DI 0 "register_operand" "=d")

80572

+ (unspec:DI [(match_operand:DI 1 "register_operand" "d")] UNSPEC_DSHD))]

80573

+ "TARGET_64BIT && ISA_HAS_WSBH"

80574

+ "dshd\t%0,%1"

80575

+ [(set_attr "type" "shift")])

80576

80577

;;

80578

;; ....................

80579

Index: gcc/config/mips/mips.c

80580

===================================================================

80581

--- a/src/gcc/config/mips/mips.c (.../tags/gcc_4_8_2_release)

80582

+++ b/src/gcc/config/mips/mips.c (.../branches/gcc-4_8-branch)

80583

@@ -3560,17 +3560,6 @@

80584

}

80585

}

80586

80587

-/* Return the cost of an operand X that can be trucated for free.

80588

- SPEED says whether we're optimizing for size or speed. */

80589

-

80590

-static int

80591

-mips_truncated_op_cost (rtx x, bool speed)

80592

-{

80593

- if (GET_CODE (x) == TRUNCATE)

80594

- x = XEXP (x, 0);

80595

- return set_src_cost (x, speed);

80596

-}

80597

-

80598

/* Implement TARGET_RTX_COSTS. */

80599

80600

static bool

80601

@@ -3951,13 +3940,12 @@

80602

case ZERO_EXTEND:

80603

if (outer_code == SET

80604

&& ISA_HAS_BADDU

80605

+ && (GET_CODE (XEXP (x, 0)) == TRUNCATE

80606

+ || GET_CODE (XEXP (x, 0)) == SUBREG)

80607

&& GET_MODE (XEXP (x, 0)) == QImode

80608

- && GET_CODE (XEXP (x, 0)) == PLUS)

80609

+ && GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS)

80610

{

80611

- rtx plus = XEXP (x, 0);

80612

- *total = (COSTS_N_INSNS (1)

80613

- + mips_truncated_op_cost (XEXP (plus, 0), speed)

80614

- + mips_truncated_op_cost (XEXP (plus, 1), speed));

80615

+ *total = set_src_cost (XEXP (XEXP (x, 0), 0), speed);

80616

return true;

80617

}

80618

*total = mips_zero_extend_cost (mode, XEXP (x, 0));

80619

@@ -8057,7 +8045,7 @@

80620

case 't':

80621

{

80622

int truth = (code == NE) == (letter == 'T');

80623

- fputc ("zfnt"[truth * 2 + (GET_MODE (op) == CCmode)], file);

80624

+ fputc ("zfnt"[truth * 2 + ST_REG_P (REGNO (XEXP (op, 0)))], file);

80625

}

80626

break;

80627

80628

Index: gcc/config/mips/mips.h

80629

===================================================================

80630

--- a/src/gcc/config/mips/mips.h (.../tags/gcc_4_8_2_release)

80631

+++ b/src/gcc/config/mips/mips.h (.../branches/gcc-4_8-branch)

80632

@@ -949,6 +949,11 @@

80633

|| TARGET_SMARTMIPS) \

80634

&& !TARGET_MIPS16)

80635

80636

+/* ISA has the WSBH (word swap bytes within halfwords) instruction.

80637

+ 64-bit targets also provide DSBH and DSHD. */

80638

+#define ISA_HAS_WSBH ((ISA_MIPS32R2 || ISA_MIPS64R2) \

80639

+ && !TARGET_MIPS16)

80640

+

80641

/* ISA has data prefetch instructions. This controls use of 'pref'. */

80642

#define ISA_HAS_PREFETCH ((ISA_MIPS4 \

80643

|| TARGET_LOONGSON_2EF \

80644

Index: gcc/stmt.c

80645

===================================================================

80646

--- a/src/gcc/stmt.c (.../tags/gcc_4_8_2_release)

80647

+++ b/src/gcc/stmt.c (.../branches/gcc-4_8-branch)

80648

@@ -1602,19 +1602,28 @@

80649

#ifdef HAVE_nonlocal_goto

80650

if (! HAVE_nonlocal_goto)

80651

#endif

80652

- /* First adjust our frame pointer to its actual value. It was

80653

- previously set to the start of the virtual area corresponding to

80654

- the stacked variables when we branched here and now needs to be

80655

- adjusted to the actual hardware fp value.

80656

+ {

80657

+ /* First adjust our frame pointer to its actual value. It was

80658

+ previously set to the start of the virtual area corresponding to

80659

+ the stacked variables when we branched here and now needs to be

80660

+ adjusted to the actual hardware fp value.

80661

80662

- Assignments are to virtual registers are converted by

80663

- instantiate_virtual_regs into the corresponding assignment

80664

- to the underlying register (fp in this case) that makes

80665

- the original assignment true.

80666

- So the following insn will actually be

80667

- decrementing fp by STARTING_FRAME_OFFSET. */

80668

- emit_move_insn (virtual_stack_vars_rtx, hard_frame_pointer_rtx);

80669

+ Assignments to virtual registers are converted by

80670

+ instantiate_virtual_regs into the corresponding assignment

80671

+ to the underlying register (fp in this case) that makes

80672

+ the original assignment true.

80673

+ So the following insn will actually be decrementing fp by

80674

+ STARTING_FRAME_OFFSET. */

80675

+ emit_move_insn (virtual_stack_vars_rtx, hard_frame_pointer_rtx);

80676

80677

+ /* Restoring the frame pointer also modifies the hard frame pointer.

80678

+ Mark it used (so that the previous assignment remains live once

80679

+ the frame pointer is eliminated) and clobbered (to represent the

80680

+ implicit update from the assignment). */

80681

+ emit_use (hard_frame_pointer_rtx);

80682

+ emit_clobber (hard_frame_pointer_rtx);

80683

+ }

80684

+

80685

#if !HARD_FRAME_POINTER_IS_ARG_POINTER

80686

if (fixed_regs[ARG_POINTER_REGNUM])

80687

{

80688

Index: gcc/params.def

80689

===================================================================

80690

--- a/src/gcc/params.def (.../tags/gcc_4_8_2_release)

80691

+++ b/src/gcc/params.def (.../branches/gcc-4_8-branch)

80692

@@ -1014,6 +1014,12 @@

80693

"strength reduction",

80694

50, 1, 999999)

80695

80696

+DEFPARAM (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS,

80697

+ "uninit-control-dep-attempts",

80698

+ "Maximum number of nested calls to search for control dependencies "

80699

+ "during uninitialized variable analysis",

80700

+ 1000, 1, 0)

80701

+

80702

/*

80703

Local variables:

80704

mode:c

80705

Index: gcc/tree-ssanames.c

80706

===================================================================

80707

--- a/src/gcc/tree-ssanames.c (.../tags/gcc_4_8_2_release)

80708

+++ b/src/gcc/tree-ssanames.c (.../branches/gcc-4_8-branch)

80709

@@ -128,7 +128,7 @@

80710

80711

/* The node was cleared out when we put it on the free list, so

80712

there is no need to do so again here. */

80713

- gcc_assert (ssa_name (SSA_NAME_VERSION (t)) == NULL);

80714

+ gcc_assert ((*SSANAMES (fn))[SSA_NAME_VERSION (t)] == NULL);

80715

(*SSANAMES (fn))[SSA_NAME_VERSION (t)] = t;

80716

}

80717

else

80718

Index: gcc/regcprop.c

80719

===================================================================

80720

--- a/src/gcc/regcprop.c (.../tags/gcc_4_8_2_release)

80721

+++ b/src/gcc/regcprop.c (.../branches/gcc-4_8-branch)

80722

@@ -747,6 +747,7 @@

80723

int n_ops, i, alt, predicated;

80724

bool is_asm, any_replacements;

80725

rtx set;

80726

+ rtx link;

80727

bool replaced[MAX_RECOG_OPERANDS];

80728

bool changed = false;

80729

struct kill_set_value_data ksvd;

80730

@@ -815,6 +816,23 @@

80731

if (recog_op_alt[i][alt].earlyclobber)

80732

kill_value (recog_data.operand[i], vd);

80733

80734

+ /* If we have dead sets in the insn, then we need to note these as we

80735

+ would clobbers. */

80736

+ for (link = REG_NOTES (insn); link; link = XEXP (link, 1))

80737

+ {

80738

+ if (REG_NOTE_KIND (link) == REG_UNUSED)

80739

+ {

80740

+ kill_value (XEXP (link, 0), vd);

80741

+ /* Furthermore, if the insn looked like a single-set,

80742

+ but the dead store kills the source value of that

80743

+ set, then we can no-longer use the plain move

80744

+ special case below. */

80745

+ if (set

80746

+ && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))

80747

+ set = NULL;

80748

+ }

80749

+ }

80750

+

80751

/* Special-case plain move instructions, since we may well

80752

be able to do the move from a different register class. */

80753

if (set && REG_P (SET_SRC (set)))

80754

Index: gcc/tree-ssa-operands.c

80755

===================================================================

80756

--- a/src/gcc/tree-ssa-operands.c (.../tags/gcc_4_8_2_release)

80757

+++ b/src/gcc/tree-ssa-operands.c (.../branches/gcc-4_8-branch)

80758

@@ -626,10 +626,8 @@

80759

call-clobbered. */

80760

if (!(call_flags & ECF_NOVOPS))

80761

{

80762

- /* A 'pure' or a 'const' function never call-clobbers anything.

80763

- A 'noreturn' function might, but since we don't return anyway

80764

- there is no point in recording that. */

80765

- if (!(call_flags & (ECF_PURE | ECF_CONST | ECF_NORETURN)))

80766

+ /* A 'pure' or a 'const' function never call-clobbers anything. */

80767

+ if (!(call_flags & (ECF_PURE | ECF_CONST)))

80768

add_virtual_operand (stmt, opf_def);

80769

else if (!(call_flags & ECF_CONST))

80770

add_virtual_operand (stmt, opf_use);

80771

Index: libgo/configure

80772

===================================================================

80773

--- a/src/libgo/configure (.../tags/gcc_4_8_2_release)

80774

+++ b/src/libgo/configure (.../branches/gcc-4_8-branch)

80775

@@ -6501,7 +6501,7 @@

80776

rm -rf conftest*

80777

;;

80778

80779

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

80780

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

80781

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

80782

# Find out which ABI we are using.

80783

echo 'int i;' > conftest.$ac_ext

80784

@@ -6519,7 +6519,10 @@

80785

x86_64-*linux*)

80786

LD="${LD-ld} -m elf_i386"

80787

;;

80788

- ppc64-*linux*|powerpc64-*linux*)

80789

+ powerpc64le-*linux*)

80790

+ LD="${LD-ld} -m elf32lppclinux"

80791

+ ;;

80792

+ powerpc64-*linux*)

80793

LD="${LD-ld} -m elf32ppclinux"

80794

;;

80795

s390x-*linux*)

80796

@@ -6538,7 +6541,10 @@

80797

x86_64-*linux*)

80798

LD="${LD-ld} -m elf_x86_64"

80799

;;

80800

- ppc*-*linux*|powerpc*-*linux*)

80801

+ powerpcle-*linux*)

80802

+ LD="${LD-ld} -m elf64lppc"

80803

+ ;;

80804

+ powerpc-*linux*)

80805

LD="${LD-ld} -m elf64ppc"

80806

;;

80807

s390*-*linux*|s390*-*tpf*)

80808

@@ -11105,7 +11111,7 @@

80809

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

80810

lt_status=$lt_dlunknown

80811

cat > conftest.$ac_ext <<_LT_EOF

80812

-#line 11108 "configure"

80813

+#line 11114 "configure"

80814

#include "confdefs.h"

80815

80816

#if HAVE_DLFCN_H

80817

@@ -11211,7 +11217,7 @@

80818

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

80819

lt_status=$lt_dlunknown

80820

cat > conftest.$ac_ext <<_LT_EOF

80821

-#line 11214 "configure"

80822

+#line 11220 "configure"

80823

#include "confdefs.h"

80824

80825

#if HAVE_DLFCN_H

80826

@@ -14700,7 +14706,7 @@

80827

fi

80828

80829

80830

-for ac_func in accept4 epoll_create1 faccessat fallocate fchmodat fchownat futimesat inotify_add_watch inotify_init inotify_init1 inotify_rm_watch mkdirat mknodat openat pipe2 renameat sync_file_range splice tee unlinkat unshare utimensat

80831

+for ac_func in accept4 dup3 epoll_create1 faccessat fallocate fchmodat fchownat futimesat getxattr inotify_add_watch inotify_init inotify_init1 inotify_rm_watch listxattr mkdirat mknodat openat pipe2 removexattr renameat setxattr sync_file_range splice tee unlinkat unshare utimensat

80832

do :

80833

as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`

80834

ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"

80835

Index: libgo/Makefile.in

80836

===================================================================

80837

--- a/src/libgo/Makefile.in (.../tags/gcc_4_8_2_release)

80838

+++ b/src/libgo/Makefile.in (.../branches/gcc-4_8-branch)

80839

@@ -195,7 +195,7 @@

80840

@LIBGO_IS_LINUX_TRUE@am__objects_5 = getncpu-linux.lo

80841

am__objects_6 = go-append.lo go-assert.lo go-assert-interface.lo \

80842

go-byte-array-to-string.lo go-breakpoint.lo go-caller.lo \

80843

- go-callers.lo go-can-convert-interface.lo go-cgo.lo \

80844

+ go-callers.lo go-can-convert-interface.lo go-cdiv.lo go-cgo.lo \

80845

go-check-interface.lo go-construct-map.lo \

80846

go-convert-interface.lo go-copy.lo go-defer.lo \

80847

go-deferred-recover.lo go-eface-compare.lo \

80848

@@ -757,6 +757,7 @@

80849

runtime/go-caller.c \

80850

runtime/go-callers.c \

80851

runtime/go-can-convert-interface.c \

80852

+ runtime/go-cdiv.c \

80853

runtime/go-cgo.c \

80854

runtime/go-check-interface.c \

80855

runtime/go-construct-map.c \

80856

@@ -1446,7 +1447,7 @@

80857

go/go/build/build.go \

80858

go/go/build/doc.go \

80859

go/go/build/read.go \

80860

- syslist.go

80861

+ go/go/build/syslist.go

80862

80863

go_go_doc_files = \

80864

go/go/doc/comment.go \

80865

@@ -2368,6 +2369,7 @@

80866

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-caller.Plo@am__quote@

80867

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-callers.Plo@am__quote@

80868

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-can-convert-interface.Plo@am__quote@

80869

+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-cdiv.Plo@am__quote@

80870

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-cgo.Plo@am__quote@

80871

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-check-interface.Plo@am__quote@

80872

@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/go-construct-map.Plo@am__quote@

80873

@@ -2554,6 +2556,13 @@

80874

@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@

80875

@am__fastdepCC_FALSE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o go-can-convert-interface.lo `test -f 'runtime/go-can-convert-interface.c' || echo '$(srcdir)/'`runtime/go-can-convert-interface.c

80876

80877

+go-cdiv.lo: runtime/go-cdiv.c

80878

+@am__fastdepCC_TRUE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT go-cdiv.lo -MD -MP -MF $(DEPDIR)/go-cdiv.Tpo -c -o go-cdiv.lo `test -f 'runtime/go-cdiv.c' || echo '$(srcdir)/'`runtime/go-cdiv.c

80879

+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/go-cdiv.Tpo $(DEPDIR)/go-cdiv.Plo

80880

+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='runtime/go-cdiv.c' object='go-cdiv.lo' libtool=yes @AMDEPBACKSLASH@

80881

+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@

80882

+@am__fastdepCC_FALSE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o go-cdiv.lo `test -f 'runtime/go-cdiv.c' || echo '$(srcdir)/'`runtime/go-cdiv.c

80883

+

80884

go-cgo.lo: runtime/go-cgo.c

80885

@am__fastdepCC_TRUE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT go-cgo.lo -MD -MP -MF $(DEPDIR)/go-cgo.Tpo -c -o go-cgo.lo `test -f 'runtime/go-cgo.c' || echo '$(srcdir)/'`runtime/go-cgo.c

80886

@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/go-cgo.Tpo $(DEPDIR)/go-cgo.Plo

80887

@@ -5062,15 +5071,6 @@

80888

@$(CHECK)

80889

.PHONY: go/build/check

80890

80891

-syslist.go: s-syslist; @true

80892

-s-syslist: Makefile

80893

- echo '// Generated automatically by make.' >syslist.go.tmp

80894

- echo 'package build' >>syslist.go.tmp

80895

- echo 'const goosList = "$(GOOS)"' >>syslist.go.tmp

80896

- echo 'const goarchList = "$(GOARCH)"' >>syslist.go.tmp

80897

- $(SHELL) $(srcdir)/../move-if-change syslist.go.tmp syslist.go

80898

- $(STAMP) $@

80899

-

80900

@go_include@ go/doc.lo.dep

80901

go/doc.lo.dep: $(go_go_doc_files)

80902

$(BUILDDEPS)

80903

Index: libgo/runtime/go-defer.c

80904

===================================================================

80905

--- a/src/libgo/runtime/go-defer.c (.../tags/gcc_4_8_2_release)

80906

+++ b/src/libgo/runtime/go-defer.c (.../branches/gcc-4_8-branch)

80907

@@ -27,6 +27,7 @@

80908

n->__pfn = pfn;

80909

n->__arg = arg;

80910

n->__retaddr = NULL;

80911

+ n->__makefunc_can_recover = 0;

80912

g->defer = n;

80913

}

80914

80915

Index: libgo/runtime/go-defer.h

80916

===================================================================

80917

--- a/src/libgo/runtime/go-defer.h (.../tags/gcc_4_8_2_release)

80918

+++ b/src/libgo/runtime/go-defer.h (.../branches/gcc-4_8-branch)

80919

@@ -34,4 +34,10 @@

80920

set by __go_set_defer_retaddr which is called by the thunks

80921

created by defer statements. */

80922

const void *__retaddr;

80923

+

80924

+ /* Set to true if a function created by reflect.MakeFunc is

80925

+ permitted to recover. The return address of such a function

80926

+ function will be somewhere in libffi, so __retaddr is not

80927

+ useful. */

80928

+ _Bool __makefunc_can_recover;

80929

};

80930

Index: libgo/runtime/go-int-array-to-string.c

80931

===================================================================

80932

--- a/src/libgo/runtime/go-int-array-to-string.c (.../tags/gcc_4_8_2_release)

80933

+++ b/src/libgo/runtime/go-int-array-to-string.c (.../branches/gcc-4_8-branch)

80934

@@ -30,6 +30,8 @@

80935

80936

if (v < 0 || v > 0x10ffff)

80937

v = 0xfffd;

80938

+ else if (0xd800 <= v && v <= 0xdfff)

80939

+ v = 0xfffd;

80940

80941

if (v <= 0x7f)

80942

slen += 1;

80943

@@ -56,6 +58,8 @@

80944

character. */

80945

if (v < 0 || v > 0x10ffff)

80946

v = 0xfffd;

80947

+ else if (0xd800 <= v && v <= 0xdfff)

80948

+ v = 0xfffd;

80949

80950

if (v <= 0x7f)

80951

*s++ = v;

80952

Index: libgo/runtime/go-nosys.c

80953

===================================================================

80954

--- a/src/libgo/runtime/go-nosys.c (.../tags/gcc_4_8_2_release)

80955

+++ b/src/libgo/runtime/go-nosys.c (.../branches/gcc-4_8-branch)

80956

@@ -43,6 +43,17 @@

80957

}

80958

#endif

80959

80960

+#ifndef HAVE_DUP3

80961

+int

80962

+dup3 (int oldfd __attribute__ ((unused)),

80963

+ int newfd __attribute__ ((unused)),

80964

+ int flags __attribute__ ((unused)))

80965

+{

80966

+ errno = ENOSYS;

80967

+ return -1;

80968

+}

80969

+#endif

80970

+

80971

#ifndef HAVE_EPOLL_CREATE1

80972

int

80973

epoll_create1 (int flags __attribute__ ((unused)))

80974

@@ -112,6 +123,18 @@

80975

}

80976

#endif

80977

80978

+#ifndef HAVE_GETXATTR

80979

+ssize_t

80980

+getxattr (const char *path __attribute__ ((unused)),

80981

+ const char *name __attribute__ ((unused)),

80982

+ void *value __attribute__ ((unused)),

80983

+ size_t size __attribute__ ((unused)))

80984

+{

80985

+ errno = ENOSYS;

80986

+ return -1;

80987

+}

80988

+#endif

80989

+

80990

#ifndef HAVE_INOTIFY_ADD_WATCH

80991

int

80992

inotify_add_watch (int fd __attribute__ ((unused)),

80993

@@ -151,6 +174,17 @@

80994

}

80995

#endif

80996

80997

+#ifndef HAVE_LISTXATTR

80998

+ssize_t

80999

+listxattr (const char *path __attribute__ ((unused)),

81000

+ char *list __attribute__ ((unused)),

81001

+ size_t size __attribute__ ((unused)))

81002

+{

81003

+ errno = ENOSYS;

81004

+ return -1;

81005

+}

81006

+#endif

81007

+

81008

#ifndef HAVE_MKDIRAT

81009

int

81010

mkdirat (int dirfd __attribute__ ((unused)),

81011

@@ -196,6 +230,16 @@

81012

}

81013

#endif

81014

81015

+#ifndef HAVE_REMOVEXATTR

81016

+int

81017

+removexattr (const char *path __attribute__ ((unused)),

81018

+ const char *name __attribute__ ((unused)))

81019

+{

81020

+ errno = ENOSYS;

81021

+ return -1;

81022

+}

81023

+#endif

81024

+

81025

#ifndef HAVE_RENAMEAT

81026

int

81027

renameat (int olddirfd __attribute__ ((unused)),

81028

@@ -208,6 +252,19 @@

81029

}

81030

#endif

81031

81032

+#ifndef HAVE_SETXATTR

81033

+int

81034

+setxattr (const char *path __attribute__ ((unused)),

81035

+ const char *name __attribute__ ((unused)),

81036

+ const void *value __attribute__ ((unused)),

81037

+ size_t size __attribute__ ((unused)),

81038

+ int flags __attribute__ ((unused)))

81039

+{

81040

+ errno = ENOSYS;

81041

+ return -1;

81042

+}

81043

+#endif

81044

+

81045

#ifndef HAVE_SPLICE

81046

int

81047

splice (int fd __attribute__ ((unused)),

81048

Index: libgo/runtime/runtime.h

81049

===================================================================

81050

--- a/src/libgo/runtime/runtime.h (.../tags/gcc_4_8_2_release)

81051

+++ b/src/libgo/runtime/runtime.h (.../branches/gcc-4_8-branch)

81052

@@ -440,7 +440,7 @@

81053

};

81054

void runtime_hashinit(void);

81055

81056

-void runtime_traceback();

81057

+void runtime_traceback(void);

81058

void runtime_tracebackothers(G*);

81059

81060

/*

81061

@@ -756,6 +756,7 @@

81062

extern _Bool __go_file_line(uintptr, String*, String*, intgo *);

81063

extern byte* runtime_progname();

81064

extern void runtime_main(void*);

81065

+extern uint32 runtime_in_callers;

81066

81067

int32 getproccount(void);

81068

81069

Index: libgo/runtime/proc.c

81070

===================================================================

81071

--- a/src/libgo/runtime/proc.c (.../tags/gcc_4_8_2_release)

81072

+++ b/src/libgo/runtime/proc.c (.../branches/gcc-4_8-branch)

81073

@@ -1716,10 +1716,30 @@

81074

// entersyscall is going to return immediately after.

81075

81076

void runtime_entersyscall(void) __attribute__ ((no_split_stack));

81077

+static void doentersyscall(void) __attribute__ ((no_split_stack, noinline));

81078

81079

void

81080

runtime_entersyscall()

81081

{

81082

+ // Save the registers in the g structure so that any pointers

81083

+ // held in registers will be seen by the garbage collector.

81084

+ getcontext(&g->gcregs);

81085

+

81086

+ // Do the work in a separate function, so that this function

81087

+ // doesn't save any registers on its own stack. If this

81088

+ // function does save any registers, we might store the wrong

81089

+ // value in the call to getcontext.

81090

+ //

81091

+ // FIXME: This assumes that we do not need to save any

81092

+ // callee-saved registers to access the TLS variable g. We

81093

+ // don't want to put the ucontext_t on the stack because it is

81094

+ // large and we can not split the stack here.

81095

+ doentersyscall();

81096

+}

81097

+

81098

+static void

81099

+doentersyscall()

81100

+{

81101

if(m->profilehz > 0)

81102

runtime_setprof(false);

81103

81104

@@ -1736,10 +1756,6 @@

81105

}

81106

#endif

81107

81108

- // Save the registers in the g structure so that any pointers

81109

- // held in registers will be seen by the garbage collector.

81110

- getcontext(&g->gcregs);

81111

-

81112

g->status = Gsyscall;

81113

81114

if(runtime_atomicload(&runtime_sched.sysmonwait)) { // TODO: fast atomic

81115

@@ -2239,6 +2255,14 @@

81116

if(prof.fn == nil || prof.hz == 0)

81117

return;

81118

81119

+ if(runtime_atomicload(&runtime_in_callers) > 0) {

81120

+ // If SIGPROF arrived while already fetching runtime

81121

+ // callers we can have trouble on older systems

81122

+ // because the unwind library calls dl_iterate_phdr

81123

+ // which was not recursive in the past.

81124

+ return;

81125

+ }

81126

+

81127

runtime_lock(&prof);

81128

if(prof.fn == nil) {

81129

runtime_unlock(&prof);

81130

Index: libgo/runtime/mgc0.c

81131

===================================================================

81132

--- a/src/libgo/runtime/mgc0.c (.../tags/gcc_4_8_2_release)

81133

+++ b/src/libgo/runtime/mgc0.c (.../branches/gcc-4_8-branch)

81134

@@ -174,7 +174,7 @@

81135

Obj *roots;

81136

uint32 nroot;

81137

uint32 rootcap;

81138

-} work;

81139

+} work __attribute__((aligned(8)));

81140

81141

enum {

81142

GC_DEFAULT_PTR = GC_NUM_INSTR,

81143

@@ -239,8 +239,7 @@

81144

// (Manually inlined copy of MHeap_LookupMaybe.)

81145

k = (uintptr)obj>>PageShift;

81146

x = k;

81147

- if(sizeof(void*) == 8)

81148

- x -= (uintptr)runtime_mheap->arena_start>>PageShift;

81149

+ x -= (uintptr)runtime_mheap->arena_start>>PageShift;

81150

s = runtime_mheap->map[x];

81151

if(s == nil || k < s->start || k - s->start >= s->npages || s->state != MSpanInUse)

81152

return false;

81153

@@ -418,8 +417,7 @@

81154

// (Manually inlined copy of MHeap_LookupMaybe.)

81155

k = (uintptr)obj>>PageShift;

81156

x = k;

81157

- if(sizeof(void*) == 8)

81158

- x -= (uintptr)arena_start>>PageShift;

81159

+ x -= (uintptr)arena_start>>PageShift;

81160

s = runtime_mheap->map[x];

81161

if(s == nil || k < s->start || k - s->start >= s->npages || s->state != MSpanInUse)

81162

continue;

81163

@@ -466,8 +464,7 @@

81164

// Ask span about size class.

81165

// (Manually inlined copy of MHeap_Lookup.)

81166

x = (uintptr)obj >> PageShift;

81167

- if(sizeof(void*) == 8)

81168

- x -= (uintptr)arena_start>>PageShift;

81169

+ x -= (uintptr)arena_start>>PageShift;

81170

s = runtime_mheap->map[x];

81171

81172

PREFETCH(obj);

81173

@@ -585,8 +582,7 @@

81174

if(t == nil)

81175

return;

81176

x = (uintptr)obj >> PageShift;

81177

- if(sizeof(void*) == 8)

81178

- x -= (uintptr)(runtime_mheap->arena_start)>>PageShift;

81179

+ x -= (uintptr)(runtime_mheap->arena_start)>>PageShift;

81180

s = runtime_mheap->map[x];

81181

objstart = (byte*)((uintptr)s->start<<PageShift);

81182

if(s->sizeclass != 0) {

81183

Index: libgo/runtime/go-signal.c

81184

===================================================================

81185

--- a/src/libgo/runtime/go-signal.c (.../tags/gcc_4_8_2_release)

81186

+++ b/src/libgo/runtime/go-signal.c (.../branches/gcc-4_8-branch)

81187

@@ -234,7 +234,7 @@

81188

G *g;

81189

81190

g = runtime_g ();

81191

- runtime_traceback (g);

81192

+ runtime_traceback ();

81193

runtime_tracebackothers (g);

81194

81195

/* The gc library calls runtime_dumpregs here, and provides

81196

@@ -399,6 +399,9 @@

81197

{

81198

G *gp;

81199

M *mp;

81200

+#ifdef USING_SPLIT_STACK

81201

+ void *stack_context[10];

81202

+#endif

81203

81204

/* We are now running on the stack registered via sigaltstack.

81205

(Actually there is a small span of time between runtime_siginit

81206

@@ -409,7 +412,7 @@

81207

if (gp != NULL)

81208

{

81209

#ifdef USING_SPLIT_STACK

81210

- __splitstack_getcontext (&gp->stack_context[0]);

81211

+ __splitstack_getcontext (&stack_context[0]);

81212

#endif

81213

}

81214

81215

@@ -432,7 +435,7 @@

81216

if (gp != NULL)

81217

{

81218

#ifdef USING_SPLIT_STACK

81219

- __splitstack_setcontext (&gp->stack_context[0]);

81220

+ __splitstack_setcontext (&stack_context[0]);

81221

#endif

81222

}

81223

}

81224

Index: libgo/runtime/go-callers.c

81225

===================================================================

81226

--- a/src/libgo/runtime/go-callers.c (.../tags/gcc_4_8_2_release)

81227

+++ b/src/libgo/runtime/go-callers.c (.../branches/gcc-4_8-branch)

81228

@@ -11,6 +11,13 @@

81229

#include "runtime.h"

81230

#include "array.h"

81231

81232

+/* This is set to non-zero when calling backtrace_full. This is used

81233

+ to avoid getting hanging on a recursive lock in dl_iterate_phdr on

81234

+ older versions of glibc when a SIGPROF signal arrives while

81235

+ collecting a backtrace. */

81236

+

81237

+uint32 runtime_in_callers;

81238

+

81239

/* Argument passed to callback function. */

81240

81241

struct callers_data

81242

@@ -111,8 +118,10 @@

81243

data.skip = skip + 1;

81244

data.index = 0;

81245

data.max = m;

81246

+ runtime_xadd (&runtime_in_callers, 1);

81247

backtrace_full (__go_get_backtrace_state (), 0, callback, error_callback,

81248

&data);

81249

+ runtime_xadd (&runtime_in_callers, -1);

81250

return data.index;

81251

}

81252

81253

Index: libgo/runtime/go-cdiv.c

81254

===================================================================

81255

--- a/src/libgo/runtime/go-cdiv.c (.../tags/gcc_4_8_2_release)

81256

+++ b/src/libgo/runtime/go-cdiv.c (.../branches/gcc-4_8-branch)

81257

@@ -0,0 +1,46 @@

81258

+/* go-cdiv.c -- complex division routines

81259

+

81260

81261

+ Use of this source code is governed by a BSD-style

81262

+ license that can be found in the LICENSE file. */

81263

+

81264

+/* Calls to these functions are generated by the Go frontend for

81265

+ division of complex64 or complex128. We use these because Go's

81266

+ complex division expects slightly different results from the GCC

81267

+ default. When dividing NaN+1.0i / 0+0i, Go expects NaN+NaNi but

81268

+ GCC generates NaN+Infi. NaN+Infi seems wrong seems the rules of

81269

+ C99 Annex G specify that if either side of a complex number is Inf,

81270

+ the the whole number is Inf, but an operation involving NaN ought

81271

+ to result in NaN, not Inf. */

81272

+

81273

+__complex float

81274

+__go_complex64_div (__complex float a, __complex float b)

81275

+{

81276

+ if (__builtin_expect (b == 0+0i, 0))

81277

+ {

81278

+ if (!__builtin_isinff (__real__ a)

81279

+ && !__builtin_isinff (__imag__ a)

81280

+ && (__builtin_isnanf (__real__ a) || __builtin_isnanf (__imag__ a)))

81281

+ {

81282

+ /* Pass "1" to nanf to match math/bits.go. */

81283

+ return __builtin_nanf("1") + __builtin_nanf("1")*1i;

81284

+ }

81285

+ }

81286

+ return a / b;

81287

+}

81288

+

81289

+__complex double

81290

+__go_complex128_div (__complex double a, __complex double b)

81291

+{

81292

+ if (__builtin_expect (b == 0+0i, 0))

81293

+ {

81294

+ if (!__builtin_isinf (__real__ a)

81295

+ && !__builtin_isinf (__imag__ a)

81296

+ && (__builtin_isnan (__real__ a) || __builtin_isnan (__imag__ a)))

81297

+ {

81298

+ /* Pass "1" to nan to match math/bits.go. */

81299

+ return __builtin_nan("1") + __builtin_nan("1")*1i;

81300

+ }

81301

+ }

81302

+ return a / b;

81303

+}

81304

Index: libgo/runtime/go-reflect-call.c

81305

===================================================================

81306

--- a/src/libgo/runtime/go-reflect-call.c (.../tags/gcc_4_8_2_release)

81307

+++ b/src/libgo/runtime/go-reflect-call.c (.../branches/gcc-4_8-branch)

81308

@@ -98,9 +98,12 @@

81309

const struct __go_struct_field *fields;

81310

int i;

81311

81312

+ field_count = descriptor->__fields.__count;

81313

+ if (field_count == 0) {

81314

+ return &ffi_type_void;

81315

+ }

81316

ret = (ffi_type *) __go_alloc (sizeof (ffi_type));

81317

ret->type = FFI_TYPE_STRUCT;

81318

- field_count = descriptor->__fields.__count;

81319

fields = (const struct __go_struct_field *) descriptor->__fields.__values;

81320

ret->elements = (ffi_type **) __go_alloc ((field_count + 1)

81321

* sizeof (ffi_type *));

81322

Index: libgo/runtime/go-recover.c

81323

===================================================================

81324

--- a/src/libgo/runtime/go-recover.c (.../tags/gcc_4_8_2_release)

81325

+++ b/src/libgo/runtime/go-recover.c (.../branches/gcc-4_8-branch)

81326

@@ -16,12 +16,14 @@

81327

__go_can_recover--this is, the thunk. */

81328

81329

_Bool

81330

-__go_can_recover (const void* retaddr)

81331

+__go_can_recover (const void *retaddr)

81332

{

81333

G *g;

81334

struct __go_defer_stack *d;

81335

const char* ret;

81336

const char* dret;

81337

+ Location loc;

81338

+ const byte *name;

81339

81340

g = runtime_g ();

81341

81342

@@ -52,9 +54,80 @@

81343

#endif

81344

81345

dret = (const char *) d->__retaddr;

81346

- return ret <= dret && ret + 16 >= dret;

81347

+ if (ret <= dret && ret + 16 >= dret)

81348

+ return 1;

81349

+

81350

+ /* If the function calling recover was created by reflect.MakeFunc,

81351

+ then RETADDR will be somewhere in libffi. Our caller is

81352

+ permitted to recover if it was called from libffi. */

81353

+ if (!d->__makefunc_can_recover)

81354

+ return 0;

81355

+

81356

+ if (runtime_callers (2, &loc, 1) < 1)

81357

+ return 0;

81358

+

81359

+ /* If we have no function name, then we weren't called by Go code.

81360

+ Guess that we were called by libffi. */

81361

+ if (loc.function.len == 0)

81362

+ return 1;

81363

+

81364

+ if (loc.function.len < 4)

81365

+ return 0;

81366

+ name = loc.function.str;

81367

+ if (*name == '_')

81368

+ {

81369

+ if (loc.function.len < 5)

81370

+ return 0;

81371

+ ++name;

81372

+ }

81373

+

81374

+ if (name[0] == 'f' && name[1] == 'f' && name[2] == 'i' && name[3] == '_')

81375

+ return 1;

81376

+

81377

+ /* We may also be called by reflect.makeFuncImpl.call, for a

81378

+ function created by reflect.MakeFunc. */

81379

+ if (__builtin_strstr ((const char *) name, "makeFuncImpl") != NULL)

81380

+ return 1;

81381

+

81382

+ return 0;

81383

}

81384

81385

+/* This function is called when code is about to enter a function

81386

+ created by reflect.MakeFunc. It is called by the function stub

81387

+ used by MakeFunc. If the stub is permitted to call recover, then a

81388

+ real MakeFunc function is permitted to call recover. */

81389

+

81390

+void

81391

+__go_makefunc_can_recover (const void *retaddr)

81392

+{

81393

+ struct __go_defer_stack *d;

81394

+

81395

+ d = runtime_g ()->defer;

81396

+ if (d != NULL

81397

+ && !d->__makefunc_can_recover

81398

+ && __go_can_recover (retaddr))

81399

+ d->__makefunc_can_recover = 1;

81400

+}

81401

+

81402

+/* This function is called when code is about to exit a function

81403

+ created by reflect.MakeFunc. It is called by the function stub

81404

+ used by MakeFunc. It clears the __makefunc_can_recover field.

81405

+ It's OK to always clear this field, because __go_can_recover will

81406

+ only be called by a stub created for a function that calls recover.

81407

+ That stub will not call a function created by reflect.MakeFunc, so

81408

+ by the time we get here any caller higher up on the call stack no

81409

+ longer needs the information. */

81410

+

81411

+void

81412

+__go_makefunc_returning (void)

81413

+{

81414

+ struct __go_defer_stack *d;

81415

+

81416

+ d = runtime_g ()->defer;

81417

+ if (d != NULL)

81418

+ d->__makefunc_can_recover = 0;

81419

+}

81420

+

81421

/* This is only called when it is valid for the caller to recover the

81422

value on top of the panic stack, if there is one. */

81423

81424

Index: libgo/runtime/malloc.goc

81425

===================================================================

81426

--- a/src/libgo/runtime/malloc.goc (.../tags/gcc_4_8_2_release)

81427

+++ b/src/libgo/runtime/malloc.goc (.../branches/gcc-4_8-branch)

81428

@@ -541,8 +541,7 @@

81429

81430

// (Manually inlined copy of runtime_MHeap_Lookup)

81431

p = (uintptr)v>>PageShift;

81432

- if(sizeof(void*) == 8)

81433

- p -= (uintptr)runtime_mheap->arena_start >> PageShift;

81434

+ p -= (uintptr)runtime_mheap->arena_start >> PageShift;

81435

s = runtime_mheap->map[p];

81436

81437

if(s->sizeclass == 0) {

81438

Index: libgo/runtime/go-make-slice.c

81439

===================================================================

81440

--- a/src/libgo/runtime/go-make-slice.c (.../tags/gcc_4_8_2_release)

81441

+++ b/src/libgo/runtime/go-make-slice.c (.../branches/gcc-4_8-branch)

81442

@@ -34,7 +34,10 @@

81443

std = (const struct __go_slice_type *) td;

81444

81445

ilen = (intgo) len;

81446

- if (ilen < 0 || (uintptr_t) ilen != len)

81447

+ if (ilen < 0

81448

+ || (uintptr_t) ilen != len

81449

+ || (std->__element_type->__size > 0

81450

+ && len > MaxMem / std->__element_type->__size))

81451

runtime_panicstring ("makeslice: len out of range");

81452

81453

icap = (intgo) cap;

81454

Index: libgo/runtime/mheap.c

81455

===================================================================

81456

--- a/src/libgo/runtime/mheap.c (.../tags/gcc_4_8_2_release)

81457

+++ b/src/libgo/runtime/mheap.c (.../branches/gcc-4_8-branch)

81458

@@ -150,8 +150,7 @@

81459

runtime_MSpan_Init(t, s->start + npage, s->npages - npage);

81460

s->npages = npage;

81461

p = t->start;

81462

- if(sizeof(void*) == 8)

81463

- p -= ((uintptr)h->arena_start>>PageShift);

81464

+ p -= ((uintptr)h->arena_start>>PageShift);

81465

if(p > 0)

81466

h->map[p-1] = s;

81467

h->map[p] = t;

81468

@@ -169,8 +168,7 @@

81469

s->elemsize = (sizeclass==0 ? s->npages<<PageShift : (uintptr)runtime_class_to_size[sizeclass]);

81470

s->types.compression = MTypes_Empty;

81471

p = s->start;

81472

- if(sizeof(void*) == 8)

81473

- p -= ((uintptr)h->arena_start>>PageShift);

81474

+ p -= ((uintptr)h->arena_start>>PageShift);

81475

for(n=0; n<npage; n++)

81476

h->map[p+n] = s;

81477

return s;

81478

@@ -241,8 +239,7 @@

81479

mstats.mspan_sys = h->spanalloc.sys;

81480

runtime_MSpan_Init(s, (uintptr)v>>PageShift, ask>>PageShift);

81481

p = s->start;

81482

- if(sizeof(void*) == 8)

81483

- p -= ((uintptr)h->arena_start>>PageShift);

81484

+ p -= ((uintptr)h->arena_start>>PageShift);

81485

h->map[p] = s;

81486

h->map[p + s->npages - 1] = s;

81487

s->state = MSpanInUse;

81488

@@ -259,8 +256,7 @@

81489

uintptr p;

81490

81491

p = (uintptr)v;

81492

- if(sizeof(void*) == 8)

81493

- p -= (uintptr)h->arena_start;

81494

+ p -= (uintptr)h->arena_start;

81495

return h->map[p >> PageShift];

81496

}

81497

81498

@@ -281,8 +277,7 @@

81499

return nil;

81500

p = (uintptr)v>>PageShift;

81501

q = p;

81502

- if(sizeof(void*) == 8)

81503

- q -= (uintptr)h->arena_start >> PageShift;

81504

+ q -= (uintptr)h->arena_start >> PageShift;

81505

s = h->map[q];

81506

if(s == nil || p < s->start || p - s->start >= s->npages)

81507

return nil;

81508

@@ -332,8 +327,7 @@

81509

81510

// Coalesce with earlier, later spans.

81511

p = s->start;

81512

- if(sizeof(void*) == 8)

81513

- p -= (uintptr)h->arena_start >> PageShift;

81514

+ p -= (uintptr)h->arena_start >> PageShift;

81515

if(p > 0 && (t = h->map[p-1]) != nil && t->state != MSpanInUse) {

81516

tp = (uintptr*)(t->start<<PageShift);

81517

*tp |= *sp; // propagate "needs zeroing" mark

81518

Index: libgo/testsuite/gotest

81519

===================================================================

81520

--- a/src/libgo/testsuite/gotest (.../tags/gcc_4_8_2_release)

81521

+++ b/src/libgo/testsuite/gotest (.../branches/gcc-4_8-branch)

81522

@@ -369,7 +369,7 @@

81523

{

81524

text="T"

81525

case "$GOARCH" in

81526

- ppc64) text="D" ;;

81527

+ ppc64) text="[TD]" ;;

81528

esac

81529

81530

symtogo='sed -e s/_test/XXXtest/ -e s/.*_$[^_]*\.$/\1/ -e s/XXXtest/_test/'

81531

Index: libgo/mksysinfo.sh

81532

===================================================================

81533

--- a/src/libgo/mksysinfo.sh (.../tags/gcc_4_8_2_release)

81534

+++ b/src/libgo/mksysinfo.sh (.../branches/gcc-4_8-branch)

81535

@@ -1035,6 +1035,10 @@

81536

grep '^const _LOCK_' gen-sysinfo.go |

81537

sed -e 's/^$const $_$LOCK_[^= ]*$$.*$$/\1\2 = _\2/' >> ${OUT}

81538

81539

+# The PRIO constants.

81540

+grep '^const _PRIO_' gen-sysinfo.go | \

81541

+ sed -e 's/^$const $_$PRIO_[^= ]*$$.*$$/\1\2 = _\2/' >> ${OUT}

81542

+

81543

# The GNU/Linux LINUX_REBOOT flags.

81544

grep '^const _LINUX_REBOOT_' gen-sysinfo.go |

81545

sed -e 's/^$const $_$LINUX_REBOOT_[^= ]*$$.*$$/\1\2 = _\2/' >> ${OUT}

81546

Index: libgo/config.h.in

81547

===================================================================

81548

--- a/src/libgo/config.h.in (.../tags/gcc_4_8_2_release)

81549

+++ b/src/libgo/config.h.in (.../branches/gcc-4_8-branch)

81550

@@ -39,6 +39,9 @@

81551

/* Define to 1 if you have the `dl_iterate_phdr' function. */

81552

#undef HAVE_DL_ITERATE_PHDR

81553

81554

+/* Define to 1 if you have the `dup3' function. */

81555

+#undef HAVE_DUP3

81556

+

81557

/* Define to 1 if you have the `epoll_create1' function. */

81558

#undef HAVE_EPOLL_CREATE1

81559

81560

@@ -66,6 +69,9 @@

81561

/* Define if _Unwind_GetIPInfo is available. */

81562

#undef HAVE_GETIPINFO

81563

81564

+/* Define to 1 if you have the `getxattr' function. */

81565

+#undef HAVE_GETXATTR

81566

+

81567

/* Define to 1 if you have the `inotify_add_watch' function. */

81568

#undef HAVE_INOTIFY_ADD_WATCH

81569

81570

@@ -111,6 +117,9 @@

81571

/* Define to 1 if you have the <linux/rtnetlink.h> header file. */

81572

#undef HAVE_LINUX_RTNETLINK_H

81573

81574

+/* Define to 1 if you have the `listxattr' function. */

81575

+#undef HAVE_LISTXATTR

81576

+

81577

/* Define to 1 if the system has the type `loff_t'. */

81578

#undef HAVE_LOFF_T

81579

81580

@@ -171,6 +180,9 @@

81581

/* Define to 1 if you have the `pipe2' function. */

81582

#undef HAVE_PIPE2

81583

81584

+/* Define to 1 if you have the `removexattr' function. */

81585

+#undef HAVE_REMOVEXATTR

81586

+

81587

/* Define to 1 if you have the `renameat' function. */

81588

#undef HAVE_RENAMEAT

81589

81590

@@ -180,6 +192,9 @@

81591

/* Define to 1 if you have the `setenv' function. */

81592

#undef HAVE_SETENV

81593

81594

+/* Define to 1 if you have the `setxattr' function. */

81595

+#undef HAVE_SETXATTR

81596

+

81597

/* Define to 1 if you have the `sinl' function. */

81598

#undef HAVE_SINL

81599

81600

Index: libgo/configure.ac

81601

===================================================================

81602

--- a/src/libgo/configure.ac (.../tags/gcc_4_8_2_release)

81603

+++ b/src/libgo/configure.ac (.../branches/gcc-4_8-branch)

81604

@@ -503,7 +503,7 @@

81605

AM_CONDITIONAL(HAVE_STRERROR_R, test "$ac_cv_func_strerror_r" = yes)

81606

AM_CONDITIONAL(HAVE_WAIT4, test "$ac_cv_func_wait4" = yes)

81607

81608

-AC_CHECK_FUNCS(accept4 epoll_create1 faccessat fallocate fchmodat fchownat futimesat inotify_add_watch inotify_init inotify_init1 inotify_rm_watch mkdirat mknodat openat pipe2 renameat sync_file_range splice tee unlinkat unshare utimensat)

81609

+AC_CHECK_FUNCS(accept4 dup3 epoll_create1 faccessat fallocate fchmodat fchownat futimesat getxattr inotify_add_watch inotify_init inotify_init1 inotify_rm_watch listxattr mkdirat mknodat openat pipe2 removexattr renameat setxattr sync_file_range splice tee unlinkat unshare utimensat)

81610

AC_TYPE_OFF_T

81611

AC_CHECK_TYPES([loff_t])

81612

81613

Index: libgo/config/libtool.m4

81614

===================================================================

81615

--- a/src/libgo/config/libtool.m4 (.../tags/gcc_4_8_2_release)

81616

+++ b/src/libgo/config/libtool.m4 (.../branches/gcc-4_8-branch)

81617

@@ -1225,7 +1225,7 @@

81618

rm -rf conftest*

81619

;;

81620

81621

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

81622

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

81623

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

81624

# Find out which ABI we are using.

81625

echo 'int i;' > conftest.$ac_ext

81626

@@ -1239,7 +1239,10 @@

81627

x86_64-*linux*)

81628

LD="${LD-ld} -m elf_i386"

81629

;;

81630

- ppc64-*linux*|powerpc64-*linux*)

81631

+ powerpc64le-*linux*)

81632

+ LD="${LD-ld} -m elf32lppclinux"

81633

+ ;;

81634

+ powerpc64-*linux*)

81635

LD="${LD-ld} -m elf32ppclinux"

81636

;;

81637

s390x-*linux*)

81638

@@ -1258,7 +1261,10 @@

81639

x86_64-*linux*)

81640

LD="${LD-ld} -m elf_x86_64"

81641

;;

81642

- ppc*-*linux*|powerpc*-*linux*)

81643

+ powerpcle-*linux*)

81644

+ LD="${LD-ld} -m elf64lppc"

81645

+ ;;

81646

+ powerpc-*linux*)

81647

LD="${LD-ld} -m elf64ppc"

81648

;;

81649

s390*-*linux*|s390*-*tpf*)

81650

Index: libgo/go/reflect/value.go

81651

===================================================================

81652

--- a/src/libgo/go/reflect/value.go (.../tags/gcc_4_8_2_release)

81653

+++ b/src/libgo/go/reflect/value.go (.../branches/gcc-4_8-branch)

81654

@@ -98,6 +98,7 @@

81655

flagIndir

81656

flagAddr

81657

flagMethod

81658

+ flagMethodFn // gccgo: first fn parameter is always pointer

81659

flagKindShift = iota

81660

flagKindWidth = 5 // there are 27 kinds

81661

flagKindMask flag = 1<<flagKindWidth - 1

81662

@@ -433,7 +434,7 @@

81663

if v.flag&flagMethod != 0 {

81664

nin++

81665

}

81666

- firstPointer := len(in) > 0 && t.In(0).Kind() != Ptr && v.flag&flagMethod == 0 && isMethod(v.typ)

81667

+ firstPointer := len(in) > 0 && t.In(0).Kind() != Ptr && v.flag&flagMethodFn != 0

81668

params := make([]unsafe.Pointer, nin)

81669

off := 0

81670

if v.flag&flagMethod != 0 {

81671

@@ -484,33 +485,6 @@

81672

return ret

81673

}

81674

81675

-// gccgo specific test to see if typ is a method. We can tell by

81676

-// looking at the string to see if there is a receiver. We need this

81677

-// because for gccgo all methods take pointer receivers.

81678

-func isMethod(t *rtype) bool {

81679

- if Kind(t.kind) != Func {

81680

- return false

81681

- }

81682

- s := *t.string

81683

- parens := 0

81684

- params := 0

81685

- sawRet := false

81686

- for i, c := range s {

81687

- if c == '(' {

81688

- if parens == 0 {

81689

- params++

81690

- }

81691

- parens++

81692

- } else if c == ')' {

81693

- parens--

81694

- } else if parens == 0 && c == ' ' && s[i+1] != '(' && !sawRet {

81695

- params++

81696

- sawRet = true

81697

- }

81698

- }

81699

- return params > 2

81700

-}

81701

-

81702

// methodReceiver returns information about the receiver

81703

// described by v. The Value v may or may not have the

81704

// flagMethod bit set, so the kind cached in v.flag should

81705

@@ -917,6 +891,16 @@

81706

v = makeMethodValue("Interface", v)

81707

}

81708

81709

+ if v.flag&flagMethodFn != 0 {

81710

+ if v.typ.Kind() != Func {

81711

+ panic("reflect: MethodFn of non-Func")

81712

+ }

81713

+ ft := (*funcType)(unsafe.Pointer(v.typ))

81714

+ if ft.in[0].Kind() != Ptr {

81715

+ v = makeValueMethod(v)

81716

+ }

81717

+ }

81718

+

81719

k := v.kind()

81720

if k == Interface {

81721

// Special case: return the element inside the interface.

81722

@@ -1230,8 +1214,7 @@

81723

// created via reflect have the same underlying code pointer,

81724

// so their Pointers are equal. The function used here must

81725

// match the one used in makeMethodValue.

81726

- // This is not properly implemented for gccgo.

81727

- f := Zero

81728

+ f := makeFuncStub

81729

return **(**uintptr)(unsafe.Pointer(&f))

81730

}

81731

p := v.val

81732

Index: libgo/go/reflect/makefuncgo_386.go

81733

===================================================================

81734

--- a/src/libgo/go/reflect/makefuncgo_386.go (.../tags/gcc_4_8_2_release)

81735

+++ b/src/libgo/go/reflect/makefuncgo_386.go (.../branches/gcc-4_8-branch)

81736

@@ -14,8 +14,10 @@

81737

// registers that might hold result values.

81738

type i386Regs struct {

81739

esp uint32

81740

- eax uint32 // Value to return in %eax.

81741

- st0 uint64 // Value to return in %st(0).

81742

+ eax uint32 // Value to return in %eax.

81743

+ st0 float64 // Value to return in %st(0).

81744

+ sr bool // Set to true if hidden struct pointer.

81745

+ sf bool // Set to true if returning float

81746

}

81747

81748

// MakeFuncStubGo implements the 386 calling convention for MakeFunc.

81749

@@ -56,10 +58,13 @@

81750

in := make([]Value, 0, len(ftyp.in))

81751

ap := uintptr(regs.esp)

81752

81753

+ regs.sr = false

81754

+ regs.sf = false

81755

var retPtr unsafe.Pointer

81756

if retStruct {

81757

retPtr = *(*unsafe.Pointer)(unsafe.Pointer(ap))

81758

ap += ptrSize

81759

+ regs.sr = true

81760

}

81761

81762

for _, rt := range ftyp.in {

81763

@@ -77,7 +82,7 @@

81764

81765

// Call the real function.

81766

81767

- out := c.fn(in)

81768

+ out := c.call(in)

81769

81770

if len(out) != len(ftyp.out) {

81771

panic("reflect: wrong return count from function created by MakeFunc")

81772

@@ -123,13 +128,16 @@

81773

81774

v := out[0]

81775

w := v.iword()

81776

- if v.Kind() != Ptr && v.Kind() != UnsafePointer {

81777

- w = loadIword(unsafe.Pointer(w), v.typ.size)

81778

- }

81779

switch v.Kind() {

81780

- case Float32, Float64:

81781

- regs.st0 = uint64(uintptr(w))

81782

+ case Ptr, UnsafePointer:

81783

+ regs.eax = uint32(uintptr(w))

81784

+ case Float32:

81785

+ regs.st0 = float64(*(*float32)(unsafe.Pointer(w)))

81786

+ regs.sf = true

81787

+ case Float64:

81788

+ regs.st0 = *(*float64)(unsafe.Pointer(w))

81789

+ regs.sf = true

81790

default:

81791

- regs.eax = uint32(uintptr(w))

81792

+ regs.eax = uint32(uintptr(loadIword(unsafe.Pointer(w), v.typ.size)))

81793

}

81794

}

81795

Index: libgo/go/reflect/makefunc_amd64.S

81796

===================================================================

81797

--- a/src/libgo/go/reflect/makefunc_amd64.S (.../tags/gcc_4_8_2_release)

81798

+++ b/src/libgo/go/reflect/makefunc_amd64.S (.../branches/gcc-4_8-branch)

81799

@@ -61,6 +61,14 @@

81800

movdqa %xmm6, 0xa0(%rsp)

81801

movdqa %xmm7, 0xb0(%rsp)

81802

81803

+ /* For MakeFunc functions that call recover. */

81804

+ movq 8(%rbp), %rdi

81805

+#ifdef __PIC__

81806

+ call __go_makefunc_can_recover@PLT

81807

+#else

81808

+ call __go_makefunc_can_recover

81809

+#endif

81810

+

81811

# Get function type.

81812

#ifdef __PIC__

81813

call __go_get_closure@PLT

81814

@@ -77,6 +85,13 @@

81815

call reflect.MakeFuncStubGo

81816

#endif

81817

81818

+ /* MakeFunc functions can no longer call recover. */

81819

+#ifdef __PIC__

81820

+ call __go_makefunc_returning@PLT

81821

+#else

81822

+ call __go_makefunc_returning

81823

+#endif

81824

+

81825

# The structure will be updated with any return values. Load

81826

# all possible return registers before returning to the caller.

81827

81828

Index: libgo/go/reflect/type.go

81829

===================================================================

81830

--- a/src/libgo/go/reflect/type.go (.../tags/gcc_4_8_2_release)

81831

+++ b/src/libgo/go/reflect/type.go (.../branches/gcc-4_8-branch)

81832

@@ -508,7 +508,7 @@

81833

m.Type = toType(mt)

81834

x := new(unsafe.Pointer)

81835

*x = unsafe.Pointer(&p.tfn)

81836

- m.Func = Value{mt, unsafe.Pointer(x), fl | flagIndir}

81837

+ m.Func = Value{mt, unsafe.Pointer(x), fl | flagIndir | flagMethodFn}

81838

m.Index = i

81839

return

81840

}

81841

Index: libgo/go/reflect/makefunc_386.S

81842

===================================================================

81843

--- a/src/libgo/go/reflect/makefunc_386.S (.../tags/gcc_4_8_2_release)

81844

+++ b/src/libgo/go/reflect/makefunc_386.S (.../branches/gcc-4_8-branch)

81845

@@ -25,9 +25,13 @@

81846

struct {

81847

esp uint32 // 0x0

81848

eax uint32 // 0x4

81849

- st0 uint64 // 0x8

81850

+ st0 float64 // 0x8

81851

+ sr bool // 0x10

81852

+ sf bool // 0x11

81853

}

81854

- */

81855

+ The sr field is set by the function to a non-zero value if

81856

+ the function takes a struct hidden pointer that must be

81857

+ popped off the stack. */

81858

81859

pushl %ebp

81860

.LCFI0:

81861

@@ -45,7 +49,16 @@

81862

leal 8(%ebp), %eax /* Set esp field in struct. */

81863

movl %eax, -24(%ebp)

81864

81865

+ /* For MakeFunc functions that call recover. */

81866

+ movl 4(%ebp), %eax

81867

+ movl %eax, (%esp)

81868

#ifdef __PIC__

81869

+ call __go_makefunc_can_recover@PLT

81870

+#else

81871

+ call __go_makefunc_can_recover

81872

+#endif

81873

+

81874

+#ifdef __PIC__

81875

call __go_get_closure@PLT

81876

#else

81877

call __go_get_closure

81878

@@ -62,9 +75,20 @@

81879

call reflect.MakeFuncStubGo

81880

#endif

81881

81882

+ /* MakeFunc functions can no longer call recover. */

81883

+#ifdef __PIC__

81884

+ call __go_makefunc_returning@PLT

81885

+#else

81886

+ call __go_makefunc_returning

81887

+#endif

81888

+

81889

/* Set return registers. */

81890

81891

movl -20(%ebp), %eax

81892

+

81893

+ cmpb $0, -7(%ebp)

81894

+ je 2f

81895

+

81896

fldl -16(%ebp)

81897

81898

#ifdef __SSE2__

81899

@@ -73,12 +97,20 @@

81900

movsd -16(%ebp), %xmm0

81901

#endif

81902

81903

+2:

81904

+ movb -8(%ebp), %dl

81905

+

81906

addl $36, %esp

81907

popl %ebx

81908

.LCFI3:

81909

popl %ebp

81910

.LCFI4:

81911

+

81912

+ testb %dl,%dl

81913

+ jne 1f

81914

ret

81915

+1:

81916

+ ret $4

81917

.LFE1:

81918

#ifdef __ELF__

81919

.size reflect.makeFuncStub, . - reflect.makeFuncStub

81920

Index: libgo/go/reflect/all_test.go

81921

===================================================================

81922

--- a/src/libgo/go/reflect/all_test.go (.../tags/gcc_4_8_2_release)

81923

+++ b/src/libgo/go/reflect/all_test.go (.../branches/gcc-4_8-branch)

81924

@@ -1430,6 +1430,46 @@

81925

}

81926

}

81927

81928

+type emptyStruct struct{}

81929

+

81930

+type nonEmptyStruct struct {

81931

+ member int

81932

+}

81933

+

81934

+func returnEmpty() emptyStruct {

81935

+ return emptyStruct{}

81936

+}

81937

+

81938

+func takesEmpty(e emptyStruct) {

81939

+}

81940

+

81941

+func returnNonEmpty(i int) nonEmptyStruct {

81942

+ return nonEmptyStruct{member: i}

81943

+}

81944

+

81945

+func takesNonEmpty(n nonEmptyStruct) int {

81946

+ return n.member

81947

+}

81948

+

81949

+func TestCallWithStruct(t *testing.T) {

81950

+ r := ValueOf(returnEmpty).Call([]Value{})

81951

+ if len(r) != 1 || r[0].Type() != TypeOf(emptyStruct{}) {

81952

+ t.Errorf("returning empty struct returned %s instead", r)

81953

+ }

81954

+ r = ValueOf(takesEmpty).Call([]Value{ValueOf(emptyStruct{})})

81955

+ if len(r) != 0 {

81956

+ t.Errorf("takesEmpty returned values: %s", r)

81957

+ }

81958

+ r = ValueOf(returnNonEmpty).Call([]Value{ValueOf(42)})

81959

+ if len(r) != 1 || r[0].Type() != TypeOf(nonEmptyStruct{}) || r[0].Field(0).Int() != 42 {

81960

+ t.Errorf("returnNonEmpty returned %s", r)

81961

+ }

81962

+ r = ValueOf(takesNonEmpty).Call([]Value{ValueOf(nonEmptyStruct{member: 42})})

81963

+ if len(r) != 1 || r[0].Type() != TypeOf(1) || r[0].Int() != 42 {

81964

+ t.Errorf("takesNonEmpty returned %s", r)

81965

+ }

81966

+}

81967

+

81968

func TestMakeFunc(t *testing.T) {

81969

switch runtime.GOARCH {

81970

case "amd64", "386":

81971

@@ -1587,9 +1627,13 @@

81972

}

81973

}

81974

81975

-/* Not yet implemented for gccgo

81976

+func TestMethodValue(t *testing.T) {

81977

+ switch runtime.GOARCH {

81978

+ case "amd64", "386":

81979

+ default:

81980

+ t.Skip("reflect method values not implemented for " + runtime.GOARCH)

81981

+ }

81982

81983

-func TestMethodValue(t *testing.T) {

81984

p := Point{3, 4}

81985

var i int64

81986

81987

@@ -1658,8 +1702,6 @@

81988

}

81989

}

81990

81991

-*/

81992

-

81993

// Reflect version of $GOROOT/test/method5.go

81994

81995

// Concrete types implementing M method.

81996

@@ -1744,7 +1786,12 @@

81997

func (t4 Tm4) M(x int, b byte) (byte, int) { return b, x + 40 }

81998

81999

func TestMethod5(t *testing.T) {

82000

- /* Not yet used for gccgo

82001

+ switch runtime.GOARCH {

82002

+ case "amd64", "386":

82003

+ default:

82004

+ t.Skip("reflect method values not implemented for " + runtime.GOARCH)

82005

+ }

82006

+

82007

CheckF := func(name string, f func(int, byte) (byte, int), inc int) {

82008

b, x := f(1000, 99)

82009

if b != 99 || x != 1000+inc {

82010

@@ -1751,7 +1798,6 @@

82011

t.Errorf("%s(1000, 99) = %v, %v, want 99, %v", name, b, x, 1000+inc)

82012

}

82013

}

82014

- */

82015

82016

CheckV := func(name string, i Value, inc int) {

82017

bx := i.Method(0).Call([]Value{ValueOf(1000), ValueOf(byte(99))})

82018

@@ -1761,9 +1807,7 @@

82019

t.Errorf("direct %s.M(1000, 99) = %v, %v, want 99, %v", name, b, x, 1000+inc)

82020

}

82021

82022

- /* Not yet implemented for gccgo

82023

CheckF(name+".M", i.Method(0).Interface().(func(int, byte) (byte, int)), inc)

82024

- */

82025

}

82026

82027

var TinterType = TypeOf(new(Tinter)).Elem()

82028

Index: libgo/go/reflect/makefunc.go

82029

===================================================================

82030

--- a/src/libgo/go/reflect/makefunc.go (.../tags/gcc_4_8_2_release)

82031

+++ b/src/libgo/go/reflect/makefunc.go (.../branches/gcc-4_8-branch)

82032

@@ -17,6 +17,11 @@

82033

code uintptr

82034

typ *funcType

82035

fn func([]Value) []Value

82036

+

82037

+ // For gccgo we use the same entry point for functions and for

82038

+ // method values.

82039

+ method int

82040

+ rcvr Value

82041

}

82042

82043

// MakeFunc returns a new function of the given Type

82044

@@ -61,7 +66,7 @@

82045

dummy := makeFuncStub

82046

code := **(**uintptr)(unsafe.Pointer(&dummy))

82047

82048

- impl := &makeFuncImpl{code: code, typ: ftyp, fn: fn}

82049

+ impl := &makeFuncImpl{code: code, typ: ftyp, fn: fn, method: -1}

82050

82051

return Value{t, unsafe.Pointer(&impl), flag(Func<<flagKindShift) | flagIndir}

82052

}

82053

@@ -85,15 +90,94 @@

82054

panic("reflect: internal error: invalid use of makePartialFunc")

82055

}

82056

82057

+ switch runtime.GOARCH {

82058

+ case "amd64", "386":

82059

+ default:

82060

+ panic("reflect.makeMethodValue not implemented for " + runtime.GOARCH)

82061

+ }

82062

+

82063

// Ignoring the flagMethod bit, v describes the receiver, not the method type.

82064

fl := v.flag & (flagRO | flagAddr | flagIndir)

82065

fl |= flag(v.typ.Kind()) << flagKindShift

82066

rcvr := Value{v.typ, v.val, fl}

82067

82068

+ // v.Type returns the actual type of the method value.

82069

+ ft := v.Type().(*rtype)

82070

+

82071

+ // Indirect Go func value (dummy) to obtain

82072

+ // actual code address. (A Go func value is a pointer

82073

+ // to a C function pointer. http://golang.org/s/go11func.)

82074

+ dummy := makeFuncStub

82075

+ code := **(**uintptr)(unsafe.Pointer(&dummy))

82076

+

82077

// Cause panic if method is not appropriate.

82078

// The panic would still happen during the call if we omit this,

82079

// but we want Interface() and other operations to fail early.

82080

- methodReceiver(op, rcvr, int(v.flag)>>flagMethodShift)

82081

+ t, _, _ := methodReceiver(op, rcvr, int(v.flag)>>flagMethodShift)

82082

82083

- panic("reflect makeMethodValue not implemented")

82084

+ fv := &makeFuncImpl{

82085

+ code: code,

82086

+ typ: (*funcType)(unsafe.Pointer(t)),

82087

+ method: int(v.flag) >> flagMethodShift,

82088

+ rcvr: rcvr,

82089

+ }

82090

+

82091

+ return Value{ft, unsafe.Pointer(&fv), v.flag&flagRO | flag(Func)<<flagKindShift | flagIndir}

82092

}

82093

+

82094

+// makeValueMethod takes a method function and returns a function that

82095

+// takes a value receiver and calls the real method with a pointer to

82096

+// it.

82097

+func makeValueMethod(v Value) Value {

82098

+ typ := v.typ

82099

+ if typ.Kind() != Func {

82100

+ panic("reflect: call of makeValueMethod with non-Func type")

82101

+ }

82102

+ if v.flag&flagMethodFn == 0 {

82103

+ panic("reflect: call of makeValueMethod with non-MethodFn")

82104

+ }

82105

+

82106

+ switch runtime.GOARCH {

82107

+ case "amd64", "386":

82108

+ default:

82109

+ panic("reflect.makeValueMethod not implemented for " + runtime.GOARCH)

82110

+ }

82111

+

82112

+ t := typ.common()

82113

+ ftyp := (*funcType)(unsafe.Pointer(t))

82114

+

82115

+ // Indirect Go func value (dummy) to obtain

82116

+ // actual code address. (A Go func value is a pointer

82117

+ // to a C function pointer. http://golang.org/s/go11func.)

82118

+ dummy := makeFuncStub

82119

+ code := **(**uintptr)(unsafe.Pointer(&dummy))

82120

+

82121

+ impl := &makeFuncImpl{

82122

+ code: code,

82123

+ typ: ftyp,

82124

+ method: -2,

82125

+ rcvr: v,

82126

+ }

82127

+

82128

+ return Value{t, unsafe.Pointer(&impl), flag(Func<<flagKindShift) | flagIndir}

82129

+}

82130

+

82131

+// Call the function represented by a makeFuncImpl.

82132

+func (c *makeFuncImpl) call(in []Value) []Value {

82133

+ if c.method == -1 {

82134

+ return c.fn(in)

82135

+ } else if c.method == -2 {

82136

+ if c.typ.IsVariadic() {

82137

+ return c.rcvr.CallSlice(in)

82138

+ } else {

82139

+ return c.rcvr.Call(in)

82140

+ }

82141

+ } else {

82142

+ m := c.rcvr.Method(c.method)

82143

+ if c.typ.IsVariadic() {

82144

+ return m.CallSlice(in)

82145

+ } else {

82146

+ return m.Call(in)

82147

+ }

82148

+ }

82149

+}

82150

Index: libgo/go/reflect/makefuncgo_amd64.go

82151

===================================================================

82152

--- a/src/libgo/go/reflect/makefuncgo_amd64.go (.../tags/gcc_4_8_2_release)

82153

+++ b/src/libgo/go/reflect/makefuncgo_amd64.go (.../branches/gcc-4_8-branch)

82154

@@ -319,7 +319,7 @@

82155

// All the real arguments have been found and turned into

82156

// Value's. Call the real function.

82157

82158

- out := c.fn(in)

82159

+ out := c.call(in)

82160

82161

if len(out) != len(ftyp.out) {

82162

panic("reflect: wrong return count from function created by MakeFunc")

82163

Index: libgo/go/net/fd_unix.go

82164

===================================================================

82165

--- a/src/libgo/go/net/fd_unix.go (.../tags/gcc_4_8_2_release)

82166

+++ b/src/libgo/go/net/fd_unix.go (.../branches/gcc-4_8-branch)

82167

@@ -9,6 +9,7 @@

82168

import (

82169

"io"

82170

"os"

82171

+ "runtime"

82172

"sync"

82173

"syscall"

82174

"time"

82175

@@ -90,6 +91,16 @@

82176

if err == nil || err == syscall.EISCONN {

82177

break

82178

}

82179

+

82180

+ // On Solaris we can see EINVAL if the socket has

82181

+ // already been accepted and closed by the server.

82182

+ // Treat this as a successful connection--writes to

82183

+ // the socket will see EOF. For details and a test

82184

+ // case in C see http://golang.org/issue/6828.

82185

+ if runtime.GOOS == "solaris" && err == syscall.EINVAL {

82186

+ break

82187

+ }

82188

+

82189

if err != syscall.EINPROGRESS && err != syscall.EALREADY && err != syscall.EINTR {

82190

return err

82191

}

82192

Index: libgo/go/go/build/build.go

82193

===================================================================

82194

--- a/src/libgo/go/go/build/build.go (.../tags/gcc_4_8_2_release)

82195

+++ b/src/libgo/go/go/build/build.go (.../branches/gcc-4_8-branch)

82196

@@ -429,7 +429,7 @@

82197

switch ctxt.Compiler {

82198

case "gccgo":

82199

dir, elem := pathpkg.Split(p.ImportPath)

82200

- pkga = "pkg/gccgo/" + dir + "lib" + elem + ".a"

82201

+ pkga = "pkg/gccgo_" + ctxt.GOOS + "_" + ctxt.GOARCH + "/" + dir + "lib" + elem + ".a"

82202

case "gc":

82203

suffix := ""

82204

if ctxt.InstallSuffix != "" {

82205

Index: libgo/go/go/build/syslist.go

82206

===================================================================

82207

--- a/src/libgo/go/go/build/syslist.go (.../tags/gcc_4_8_2_release)

82208

+++ b/src/libgo/go/go/build/syslist.go (.../branches/gcc-4_8-branch)

82209

@@ -0,0 +1,8 @@

82210

82211

+// Use of this source code is governed by a BSD-style

82212

+// license that can be found in the LICENSE file.

82213

+

82214

+package build

82215

+

82216

+const goosList = "darwin dragonfly freebsd linux netbsd openbsd plan9 windows solaris "

82217

+const goarchList = "386 amd64 arm alpha m68k mipso32 mipsn32 mipsn64 mipso64 ppc ppc64 sparc sparc64 "

82218

Index: libgo/go/syscall/libcall_linux.go

82219

===================================================================

82220

--- a/src/libgo/go/syscall/libcall_linux.go (.../tags/gcc_4_8_2_release)

82221

+++ b/src/libgo/go/syscall/libcall_linux.go (.../branches/gcc-4_8-branch)

82222

@@ -190,6 +190,9 @@

82223

//sys Adjtimex(buf *Timex) (state int, err error)

82224

//adjtimex(buf *Timex) _C_int

82225

82226

+//sysnb Dup3(oldfd int, newfd int, flags int) (err error)

82227

+//dup3(oldfd _C_int, newfd _C_int, flags _C_int) _C_int

82228

+

82229

//sys Faccessat(dirfd int, path string, mode uint32, flags int) (err error)

82230

//faccessat(dirfd _C_int, pathname *byte, mode _C_int, flags _C_int) _C_int

82231

82232

@@ -268,6 +271,9 @@

82233

return origlen - len(buf), count, names

82234

}

82235

82236

+//sys Getxattr(path string, attr string, dest []byte) (sz int, err error)

82237

+//getxattr(path *byte, attr *byte, buf *byte, count Size_t) Ssize_t

82238

+

82239

//sys InotifyAddWatch(fd int, pathname string, mask uint32) (watchdesc int, err error)

82240

//inotify_add_watch(fd _C_int, pathname *byte, mask uint32) _C_int

82241

82242

@@ -283,6 +289,9 @@

82243

//sys Klogctl(typ int, buf []byte) (n int, err error)

82244

//klogctl(typ _C_int, bufp *byte, len _C_int) _C_int

82245

82246

+//sys Listxattr(path string, dest []byte) (sz int, err error)

82247

+//listxattr(path *byte, list *byte, size Size_t) Ssize_t

82248

+

82249

//sys Mkdirat(dirfd int, path string, mode uint32) (err error)

82250

//mkdirat(dirfd _C_int, path *byte, mode Mode_t) _C_int

82251

82252

@@ -305,6 +314,9 @@

82253

//sys PivotRoot(newroot string, putold string) (err error)

82254

//pivot_root(newroot *byte, putold *byte) _C_int

82255

82256

+//sys Removexattr(path string, attr string) (err error)

82257

+//removexattr(path *byte, name *byte) _C_int

82258

+

82259

//sys Renameat(olddirfd int, oldpath string, newdirfd int, newpath string) (err error)

82260

//renameat(olddirfd _C_int, oldpath *byte, newdirfd _C_int, newpath *byte) _C_int

82261

82262

@@ -338,6 +350,9 @@

82263

//sysnb Setresuid(ruid int, eguid int, suid int) (err error)

82264

//setresuid(ruid Uid_t, euid Uid_t, suid Uid_t) _C_int

82265

82266

+//sys Setxattr(path string, attr string, data []byte, flags int) (err error)

82267

+//setxattr(path *byte, name *byte, value *byte, size Size_t, flags _C_int) _C_int

82268

+

82269

//sys splice(rfd int, roff *_loff_t, wfd int, woff *_loff_t, len int, flags int) (n int64, err error)

82270

//splice(rfd _C_int, roff *_loff_t, wfd _C_int, woff *_loff_t, len Size_t, flags _C_uint) Ssize_t

82271

func Splice(rfd int, roff *int64, wfd int, woff *int64, len int, flags int) (n int64, err error) {

82272

Index: libgo/go/syscall/socket.go

82273

===================================================================

82274

--- a/src/libgo/go/syscall/socket.go (.../tags/gcc_4_8_2_release)

82275

+++ b/src/libgo/go/syscall/socket.go (.../branches/gcc-4_8-branch)

82276

@@ -25,7 +25,7 @@

82277

Pad [96]int8

82278

}

82279

82280

-const SizeofSockaddrAny = 0x1c

82281

+const SizeofSockaddrAny = 0x6c

82282

82283

type SockaddrInet4 struct {

82284

Port int

82285

Index: libgo/go/syscall/libcall_posix.go

82286

===================================================================

82287

--- a/src/libgo/go/syscall/libcall_posix.go (.../tags/gcc_4_8_2_release)

82288

+++ b/src/libgo/go/syscall/libcall_posix.go (.../branches/gcc-4_8-branch)

82289

@@ -238,6 +238,9 @@

82290

//sysnb Getppid() (ppid int)

82291

//getppid() Pid_t

82292

82293

+//sys Getpriority(which int, who int) (prio int, err error)

82294

+//getpriority(which _C_int, who _C_int) _C_int

82295

+

82296

//sysnb Getrlimit(resource int, rlim *Rlimit) (err error)

82297

//getrlimit(resource _C_int, rlim *Rlimit) _C_int

82298

82299

@@ -307,6 +310,9 @@

82300

//sysnb Setpgid(pid int, pgid int) (err error)

82301

//setpgid(pid Pid_t, pgid Pid_t) _C_int

82302

82303

+//sys Setpriority(which int, who int, prio int) (err error)

82304

+//setpriority(which _C_int, who _C_int, prio _C_int) _C_int

82305

+

82306

//sysnb Setreuid(ruid int, euid int) (err error)

82307

//setreuid(ruid Uid_t, euid Uid_t) _C_int

82308

82309

Index: libgo/Makefile.am

82310

===================================================================

82311

--- a/src/libgo/Makefile.am (.../tags/gcc_4_8_2_release)

82312

+++ b/src/libgo/Makefile.am (.../branches/gcc-4_8-branch)

82313

@@ -424,6 +424,7 @@

82314

runtime/go-caller.c \

82315

runtime/go-callers.c \

82316

runtime/go-can-convert-interface.c \

82317

+ runtime/go-cdiv.c \

82318

runtime/go-cgo.c \

82319

runtime/go-check-interface.c \

82320

runtime/go-construct-map.c \

82321

@@ -1254,7 +1255,7 @@

82322

go/go/build/build.go \

82323

go/go/build/doc.go \

82324

go/go/build/read.go \

82325

- syslist.go

82326

+ go/go/build/syslist.go

82327

go_go_doc_files = \

82328

go/go/doc/comment.go \

82329

go/go/doc/doc.go \

82330

@@ -2712,15 +2713,6 @@

82331

@$(CHECK)

82332

.PHONY: go/build/check

82333

82334

-syslist.go: s-syslist; @true

82335

-s-syslist: Makefile

82336

- echo '// Generated automatically by make.' >syslist.go.tmp

82337

- echo 'package build' >>syslist.go.tmp

82338

- echo 'const goosList = "$(GOOS)"' >>syslist.go.tmp

82339

- echo 'const goarchList = "$(GOARCH)"' >>syslist.go.tmp

82340

- $(SHELL) $(srcdir)/../move-if-change syslist.go.tmp syslist.go

82341

- $(STAMP) $@

82342

-

82343

@go_include@ go/doc.lo.dep

82344

go/doc.lo.dep: $(go_go_doc_files)

82345

$(BUILDDEPS)

82346

Index: config.sub

82347

===================================================================

82348

--- a/src/config.sub (.../tags/gcc_4_8_2_release)

82349

+++ b/src/config.sub (.../branches/gcc-4_8-branch)

82350

@@ -1,10 +1,8 @@

82351

#! /bin/sh

82352

# Configuration validation subroutine script.

82353

82354

-# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,

82355

-# 2011, 2012, 2013 Free Software Foundation, Inc.

82356

82357

82358

-timestamp='2013-01-11'

82359

+timestamp='2013-10-01'

82360

82361

# This file is free software; you can redistribute it and/or modify it

82362

# under the terms of the GNU General Public License as published by

82363

@@ -70,9 +68,7 @@

82364

version="\

82365

GNU config.sub ($timestamp)

82366

82367

82368

-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,

82369

-2012, 2013 Free Software Foundation, Inc.

82370

82371

82372

This is free software; see the source for copying conditions. There is NO

82373

warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."

82374

@@ -256,12 +252,12 @@

82375

82376

82377

| am33_2.0 \

82378

- | arc \

82379

+ | arc | arceb \

82380

82381

| avr | avr32 \

82382

| be32 | be64 \

82383

| bfin \

82384

- | c4x | clipper \

82385

+ | c4x | c8051 | clipper \

82386

| d10v | d30v | dlx | dsp16xx \

82387

| epiphany \

82388

| fido | fr30 | frv \

82389

@@ -269,6 +265,7 @@

82390

| hexagon \

82391

| i370 | i860 | i960 | ia64 \

82392

| ip2k | iq2000 \

82393

+ | k1om \

82394

| le32 | le64 \

82395

| lm32 \

82396

| m32c | m32r | m32rle | m68000 | m68k | m88k \

82397

@@ -297,10 +294,10 @@

82398

| mt \

82399

| msp430 \

82400

| nds32 | nds32le | nds32be \

82401

- | nios | nios2 \

82402

+ | nios | nios2 | nios2eb | nios2el \

82403

| ns16k | ns32k \

82404

| open8 \

82405

- | or32 \

82406

+ | or1k | or32 \

82407

| pdp10 | pdp11 | pj | pjl \

82408

| powerpc | powerpc64 | powerpc64le | powerpcle \

82409

| pyramid \

82410

@@ -328,7 +325,7 @@

82411

c6x)

82412

basic_machine=tic6x-unknown

82413

;;

82414

- m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | picochip)

82415

+ m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | nvptx | picochip)

82416

basic_machine=$basic_machine-unknown

82417

os=-none

82418

;;

82419

@@ -370,13 +367,13 @@

82420

| aarch64-* | aarch64_be-* \

82421

| alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \

82422

| alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \

82423

- | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \

82424

+ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* | arceb-* \

82425

82426

| avr-* | avr32-* \

82427

| be32-* | be64-* \

82428

| bfin-* | bs2000-* \

82429

| c[123]* | c30-* | [cjt]90-* | c4x-* \

82430

- | clipper-* | craynv-* | cydra-* \

82431

+ | c8051-* | clipper-* | craynv-* | cydra-* \

82432

| d10v-* | d30v-* | dlx-* \

82433

| elxsi-* \

82434

| f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \

82435

@@ -385,6 +382,7 @@

82436

| hexagon-* \

82437

| i*86-* | i860-* | i960-* | ia64-* \

82438

| ip2k-* | iq2000-* \

82439

+ | k1om-* \

82440

| le32-* | le64-* \

82441

| lm32-* \

82442

| m32c-* | m32r-* | m32rle-* \

82443

@@ -414,7 +412,7 @@

82444

| mt-* \

82445

| msp430-* \

82446

| nds32-* | nds32le-* | nds32be-* \

82447

- | nios-* | nios2-* \

82448

+ | nios-* | nios2-* | nios2eb-* | nios2el-* \

82449

| none-* | np1-* | ns16k-* | ns32k-* \

82450

| open8-* \

82451

| orion-* \

82452

@@ -798,7 +796,7 @@

82453

os=-mingw64

82454

;;

82455

mingw32)

82456

- basic_machine=i386-pc

82457

+ basic_machine=i686-pc

82458

os=-mingw32

82459

;;

82460

mingw32ce)

82461

@@ -834,7 +832,7 @@

82462

basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'`

82463

;;

82464

msys)

82465

- basic_machine=i386-pc

82466

+ basic_machine=i686-pc

82467

os=-msys

82468

;;

82469

mvs)

82470

@@ -1550,6 +1548,9 @@

82471

c4x-* | tic4x-*)

82472

os=-coff

82473

;;

82474

+ c8051-*)

82475

+ os=-elf

82476

+ ;;

82477

hexagon-*)

82478

os=-elf

82479

;;

82480

@@ -1593,6 +1594,9 @@

82481

mips*-*)

82482

os=-elf

82483

;;

82484

+ or1k-*)

82485

+ os=-elf

82486

+ ;;

82487

or32-*)

82488

os=-coff

82489

;;

82490

Index: libobjc/configure

82491

===================================================================

82492

--- a/src/libobjc/configure (.../tags/gcc_4_8_2_release)

82493

+++ b/src/libobjc/configure (.../branches/gcc-4_8-branch)

82494

@@ -6056,7 +6056,7 @@

82495

rm -rf conftest*

82496

;;

82497

82498

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

82499

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

82500

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

82501

# Find out which ABI we are using.

82502

echo 'int i;' > conftest.$ac_ext

82503

@@ -6081,7 +6081,10 @@

82504

;;

82505

esac

82506

;;

82507

- ppc64-*linux*|powerpc64-*linux*)

82508

+ powerpc64le-*linux*)

82509

+ LD="${LD-ld} -m elf32lppclinux"

82510

+ ;;

82511

+ powerpc64-*linux*)

82512

LD="${LD-ld} -m elf32ppclinux"

82513

;;

82514

s390x-*linux*)

82515

@@ -6100,7 +6103,10 @@

82516

x86_64-*linux*)

82517

LD="${LD-ld} -m elf_x86_64"

82518

;;

82519

- ppc*-*linux*|powerpc*-*linux*)

82520

+ powerpcle-*linux*)

82521

+ LD="${LD-ld} -m elf64lppc"

82522

+ ;;

82523

+ powerpc-*linux*)

82524

LD="${LD-ld} -m elf64ppc"

82525

;;

82526

s390*-*linux*|s390*-*tpf*)

82527

@@ -10595,7 +10601,7 @@

82528

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

82529

lt_status=$lt_dlunknown

82530

cat > conftest.$ac_ext <<_LT_EOF

82531

-#line 10598 "configure"

82532

+#line 10604 "configure"

82533

#include "confdefs.h"

82534

82535

#if HAVE_DLFCN_H

82536

@@ -10701,7 +10707,7 @@

82537

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

82538

lt_status=$lt_dlunknown

82539

cat > conftest.$ac_ext <<_LT_EOF

82540

-#line 10704 "configure"

82541

+#line 10710 "configure"

82542

#include "confdefs.h"

82543

82544

#if HAVE_DLFCN_H

82545

@@ -11472,7 +11478,7 @@

82546

enableval=$enable_sjlj_exceptions; :

82547

else

82548

cat > conftest.$ac_ext << EOF

82549

-#line 11475 "configure"

82550

+#line 11481 "configure"

82551

@interface Frob

82552

@end

82553

@implementation Frob

82554

Index: libobjc/ChangeLog

82555

===================================================================

82556

--- a/src/libobjc/ChangeLog (.../tags/gcc_4_8_2_release)

82557

+++ b/src/libobjc/ChangeLog (.../branches/gcc-4_8-branch)

82558

@@ -1,3 +1,10 @@

82559

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

82560

+

82561

+ Backport from mainline

82562

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

82563

+

82564

+ * configure: Regenerate.

82565

+

82566

2013-10-16 Release Manager

82567

82568

* GCC 4.8.2 released.

82569

Index: libgfortran/configure

82570

===================================================================

82571

--- a/src/libgfortran/configure (.../tags/gcc_4_8_2_release)

82572

+++ b/src/libgfortran/configure (.../branches/gcc-4_8-branch)

82573

@@ -8062,7 +8062,7 @@

82574

rm -rf conftest*

82575

;;

82576

82577

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

82578

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

82579

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

82580

# Find out which ABI we are using.

82581

echo 'int i;' > conftest.$ac_ext

82582

@@ -8087,7 +8087,10 @@

82583

;;

82584

esac

82585

;;

82586

- ppc64-*linux*|powerpc64-*linux*)

82587

+ powerpc64le-*linux*)

82588

+ LD="${LD-ld} -m elf32lppclinux"

82589

+ ;;

82590

+ powerpc64-*linux*)

82591

LD="${LD-ld} -m elf32ppclinux"

82592

;;

82593

s390x-*linux*)

82594

@@ -8106,7 +8109,10 @@

82595

x86_64-*linux*)

82596

LD="${LD-ld} -m elf_x86_64"

82597

;;

82598

- ppc*-*linux*|powerpc*-*linux*)

82599

+ powerpcle-*linux*)

82600

+ LD="${LD-ld} -m elf64lppc"

82601

+ ;;

82602

+ powerpc-*linux*)

82603

LD="${LD-ld} -m elf64ppc"

82604

;;

82605

s390*-*linux*|s390*-*tpf*)

82606

@@ -12333,7 +12339,7 @@

82607

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

82608

lt_status=$lt_dlunknown

82609

cat > conftest.$ac_ext <<_LT_EOF

82610

-#line 12336 "configure"

82611

+#line 12342 "configure"

82612

#include "confdefs.h"

82613

82614

#if HAVE_DLFCN_H

82615

@@ -12439,7 +12445,7 @@

82616

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

82617

lt_status=$lt_dlunknown

82618

cat > conftest.$ac_ext <<_LT_EOF

82619

-#line 12442 "configure"

82620

+#line 12448 "configure"

82621

#include "confdefs.h"

82622

82623

#if HAVE_DLFCN_H

82624

Index: libgfortran/intrinsics/system_clock.c

82625

===================================================================

82626

--- a/src/libgfortran/intrinsics/system_clock.c (.../tags/gcc_4_8_2_release)

82627

+++ b/src/libgfortran/intrinsics/system_clock.c (.../branches/gcc-4_8-branch)

82628

@@ -32,7 +32,8 @@

82629

/* POSIX states that CLOCK_REALTIME must be present if clock_gettime

82630

is available, others are optional. */

82631

#if defined(HAVE_CLOCK_GETTIME) || defined(HAVE_CLOCK_GETTIME_LIBRT)

82632

-#ifdef CLOCK_MONOTONIC

82633

+#if defined(CLOCK_MONOTONIC) && defined(_POSIX_MONOTONIC_CLOCK) \

82634

+ && _POSIX_MONOTONIC_CLOCK >= 0

82635

#define GF_CLOCK_MONOTONIC CLOCK_MONOTONIC

82636

#else

82637

#define GF_CLOCK_MONOTONIC CLOCK_REALTIME

82638

Index: libgfortran/ChangeLog

82639

===================================================================

82640

--- a/src/libgfortran/ChangeLog (.../tags/gcc_4_8_2_release)

82641

+++ b/src/libgfortran/ChangeLog (.../branches/gcc-4_8-branch)

82642

@@ -1,3 +1,75 @@

82643

+2014-05-03 Janne Blomqvist <jb@gcc.gnu.org>

82644

+

82645

+ Backport from 4.9

82646

+ PR libfortran/56919

82647

+ * intrinsics/system_clock.c (GF_CLOCK_MONOTONIC): Check

82648

+ _POSIX_MONOTONIC_CLOCK as well.

82649

+

82650

+2014-04-12 Jerry DeLisle <jvdelisle@gcc.gnu>

82651

+

82652

+ Backport from mainline

82653

+ PR libfortran/60810

82654

+ * io/unit.c (is_trim_ok): If internal unit is array, do not trim.

82655

+

82656

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

82657

+

82658

+ Backport from mainline

82659

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

82660

+ * configure: Regenerate.

82661

+

82662

+2014-03-15 Dominique d'Humieres <dominiq@lps.ens.fr>

82663

+

82664

+ Backport from mainline

82665

+ PR libgfortran/60128

82666

+ * io/write_float.def (output_float): Remove unused variable

82667

+ nzero_real. Replace a double space with a single one.

82668

+ (determine_en_precision): Fix wrong handling of the EN format.

82669

+

82670

+2014-03-15 Jerry DeLisle <jvdelisle@gcc.gnu>

82671

+

82672

+ Backport from mainline

82673

+ PR libfortran/58324

82674

+ PR libfortran/38199

82675

+ * io/list_read.c (finish_list_read): Read one character to check

82676

+ for the end of the file. If it is the end, then issue the file

82677

+ end error message. If not, use eat_line to reach the end

82678

+ without giving error. The next attempt to read will then

82679

+ issue the error as described above.

82680

+ * io/read.c (read_decimal): Quickly skip spaces to avoid calls

82681

+ to next_char.

82682

+ * io/unit.c (is_trim_ok): New helper function to check various

82683

+ conditions to see if its OK to trim the internal unit string.

82684

+ (get_internal_unit): Use LEN_TRIM to shorten selected internal

82685

+ unit strings for optimizing READ. Enable this optimization for

82686

+ formatted READ.

82687

+

82688

+2014-02-21 Jerry DeLisle <jvdelisle@gcc.gnu>

82689

+ Dominique d'Humieres <dominiq@lps.ens.fr>

82690

+ Steven G. Kargl <kargl@gcc.gnu.org>

82691

+

82692

+ Backport from mainline

82693

+ PR libfortran/59700

82694

+ PR libfortran/59764

82695

+ * io/io.h (struct st_parameter_dt): Assign expanded_read flag to

82696

+ unused bit. Define new variable line_buffer_pos.

82697

+ * io/list_read.c (free_saved, next_char, l_push_char,

82698

+ read_logical, read_real): Replace use of item_count with

82699

+ line_buffer_pos for line_buffer look ahead.

82700

+ (read_logical, read_integer, parse_real, read_real, check_type):

82701

+ Adjust location of free_line to after generating error messages

82702

+ to retain the correct item count for the message.

82703

+

82704

+2014-02-15 Jerry DeLisle <jvdelisle@gcc.gnu>

82705

+ Dominique d'Humieres <dominiq@lps.ens.fr>

82706

+

82707

+ Backport from mainline

82708

+ PR libfortran/59771

82709

+ PR libfortran/59774

82710

+ PR libfortran/59836

82711

+ * io/write_float.def (output_float): Fix wrong handling of the

82712

+ Fw.0 format.

82713

+ (output_float_FMT_G_): Fixes rounding issues with -m32.

82714

+

82715

2013-10-16 Release Manager

82716

82717

* GCC 4.8.2 released.

82718

Index: libgfortran/io/list_read.c

82719

===================================================================

82720

--- a/src/libgfortran/io/list_read.c (.../tags/gcc_4_8_2_release)

82721

+++ b/src/libgfortran/io/list_read.c (.../branches/gcc-4_8-branch)

82722

@@ -118,7 +118,7 @@

82723

static void

82724

free_line (st_parameter_dt *dtp)

82725

{

82726

- dtp->u.p.item_count = 0;

82727

+ dtp->u.p.line_buffer_pos = 0;

82728

dtp->u.p.line_buffer_enabled = 0;

82729

82730

if (dtp->u.p.line_buffer == NULL)

82731

@@ -150,15 +150,15 @@

82732

{

82733

dtp->u.p.at_eol = 0;

82734

82735

- c = dtp->u.p.line_buffer[dtp->u.p.item_count];

82736

- if (c != '\0' && dtp->u.p.item_count < 64)

82737

+ c = dtp->u.p.line_buffer[dtp->u.p.line_buffer_pos];

82738

+ if (c != '\0' && dtp->u.p.line_buffer_pos < 64)

82739

{

82740

- dtp->u.p.line_buffer[dtp->u.p.item_count] = '\0';

82741

- dtp->u.p.item_count++;

82742

+ dtp->u.p.line_buffer[dtp->u.p.line_buffer_pos] = '\0';

82743

+ dtp->u.p.line_buffer_pos++;

82744

goto done;

82745

}

82746

82747

- dtp->u.p.item_count = 0;

82748

+ dtp->u.p.line_buffer_pos = 0;

82749

dtp->u.p.line_buffer_enabled = 0;

82750

}

82751

82752

@@ -640,7 +640,7 @@

82753

if (dtp->u.p.line_buffer == NULL)

82754

dtp->u.p.line_buffer = xcalloc (SCRATCH_SIZE, 1);

82755

82756

- dtp->u.p.line_buffer[dtp->u.p.item_count++] = c;

82757

+ dtp->u.p.line_buffer[dtp->u.p.line_buffer_pos++] = c;

82758

}

82759

82760

82761

@@ -750,7 +750,7 @@

82762

{

82763

dtp->u.p.nml_read_error = 1;

82764

dtp->u.p.line_buffer_enabled = 1;

82765

- dtp->u.p.item_count = 0;

82766

+ dtp->u.p.line_buffer_pos = 0;

82767

return;

82768

}

82769

82770

@@ -758,14 +758,17 @@

82771

82772

bad_logical:

82773

82774

- free_line (dtp);

82775

-

82776

if (nml_bad_return (dtp, c))

82777

- return;

82778

+ {

82779

+ free_line (dtp);

82780

+ return;

82781

+ }

82782

82783

+

82784

free_saved (dtp);

82785

if (c == EOF)

82786

{

82787

+ free_line (dtp);

82788

hit_eof (dtp);

82789

return;

82790

}

82791

@@ -773,6 +776,7 @@

82792

eat_line (dtp);

82793

snprintf (message, MSGLEN, "Bad logical value while reading item %d",

82794

dtp->u.p.item_count);

82795

+ free_line (dtp);

82796

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

82797

return;

82798

82799

@@ -913,9 +917,9 @@

82800

else if (c != '\n')

82801

eat_line (dtp);

82802

82803

- free_line (dtp);

82804

snprintf (message, MSGLEN, "Bad integer for item %d in list input",

82805

dtp->u.p.item_count);

82806

+ free_line (dtp);

82807

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

82808

82809

return;

82810

@@ -1298,9 +1302,9 @@

82811

else if (c != '\n')

82812

eat_line (dtp);

82813

82814

- free_line (dtp);

82815

snprintf (message, MSGLEN, "Bad floating point number for item %d",

82816

dtp->u.p.item_count);

82817

+ free_line (dtp);

82818

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

82819

82820

return 1;

82821

@@ -1406,9 +1410,9 @@

82822

else if (c != '\n')

82823

eat_line (dtp);

82824

82825

- free_line (dtp);

82826

snprintf (message, MSGLEN, "Bad complex value in item %d of list input",

82827

dtp->u.p.item_count);

82828

+ free_line (dtp);

82829

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

82830

}

82831

82832

@@ -1770,7 +1774,7 @@

82833

{

82834

dtp->u.p.nml_read_error = 1;

82835

dtp->u.p.line_buffer_enabled = 1;

82836

- dtp->u.p.item_count = 0;

82837

+ dtp->u.p.line_buffer_pos = 0;

82838

return;

82839

}

82840

82841

@@ -1789,9 +1793,9 @@

82842

else if (c != '\n')

82843

eat_line (dtp);

82844

82845

- free_line (dtp);

82846

snprintf (message, MSGLEN, "Bad real number in item %d of list input",

82847

dtp->u.p.item_count);

82848

+ free_line (dtp);

82849

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

82850

}

82851

82852

@@ -1806,11 +1810,10 @@

82853

82854

if (dtp->u.p.saved_type != BT_UNKNOWN && dtp->u.p.saved_type != type)

82855

{

82856

- free_line (dtp);

82857

snprintf (message, MSGLEN, "Read type %s where %s was expected for item %d",

82858

type_name (dtp->u.p.saved_type), type_name (type),

82859

dtp->u.p.item_count);

82860

-

82861

+ free_line (dtp);

82862

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

82863

return 1;

82864

}

82865

@@ -1820,12 +1823,12 @@

82866

82867

if (dtp->u.p.saved_length != len)

82868

{

82869

- free_line (dtp);

82870

snprintf (message, MSGLEN,

82871

"Read kind %d %s where kind %d is required for item %d",

82872

dtp->u.p.saved_length, type_name (dtp->u.p.saved_type), len,

82873

dtp->u.p.item_count);

82874

generate_error (&dtp->common, LIBERROR_READ_VALUE, message);

82875

+ free_line (dtp);

82876

return 1;

82877

}

82878

82879

@@ -2031,8 +2034,6 @@

82880

void

82881

finish_list_read (st_parameter_dt *dtp)

82882

{

82883

- int err;

82884

-

82885

free_saved (dtp);

82886

82887

fbuf_flush (dtp->u.p.current_unit, dtp->u.p.mode);

82888

@@ -2043,12 +2044,22 @@

82889

return;

82890

}

82891

82892

- err = eat_line (dtp);

82893

- if (err == LIBERROR_END)

82894

+ if (!is_internal_unit (dtp))

82895

{

82896

- free_line (dtp);

82897

- hit_eof (dtp);

82898

+ int c;

82899

+ c = next_char (dtp);

82900

+ if (c == EOF)

82901

+ {

82902

+ free_line (dtp);

82903

+ hit_eof (dtp);

82904

+ return;

82905

+ }

82906

+ if (c != '\n')

82907

+ eat_line (dtp);

82908

}

82909

+

82910

+ free_line (dtp);

82911

+

82912

}

82913

82914

/* NAMELIST INPUT

82915

Index: libgfortran/io/read.c

82916

===================================================================

82917

--- a/src/libgfortran/io/read.c (.../tags/gcc_4_8_2_release)

82918

+++ b/src/libgfortran/io/read.c (.../branches/gcc-4_8-branch)

82919

@@ -655,7 +655,13 @@

82920

82921

if (c == ' ')

82922

{

82923

- if (dtp->u.p.blank_status == BLANK_NULL) continue;

82924

+ if (dtp->u.p.blank_status == BLANK_NULL)

82925

+ {

82926

+ /* Skip spaces. */

82927

+ for ( ; w > 0; p++, w--)

82928

+ if (*p != ' ') break;

82929

+ continue;

82930

+ }

82931

if (dtp->u.p.blank_status == BLANK_ZERO) c = '0';

82932

}

82933

82934

Index: libgfortran/io/io.h

82935

===================================================================

82936

--- a/src/libgfortran/io/io.h (.../tags/gcc_4_8_2_release)

82937

+++ b/src/libgfortran/io/io.h (.../branches/gcc-4_8-branch)

82938

@@ -424,7 +424,10 @@

82939

unsigned g0_no_blanks : 1;

82940

/* Used to signal use of free_format_data. */

82941

unsigned format_not_saved : 1;

82942

- /* 14 unused bits. */

82943

+ /* A flag used to identify when a non-standard expanded namelist read

82944

+ has occurred. */

82945

+ unsigned expanded_read : 1;

82946

+ /* 13 unused bits. */

82947

82948

/* Used for ungetc() style functionality. Possible values

82949

are an unsigned char, EOF, or EOF - 1 used to mark the

82950

@@ -441,9 +444,8 @@

82951

char *line_buffer;

82952

struct format_data *fmt;

82953

namelist_info *ionml;

82954

- /* A flag used to identify when a non-standard expanded namelist read

82955

- has occurred. */

82956

- int expanded_read;

82957

+ /* Current position within the look-ahead line buffer. */

82958

+ int line_buffer_pos;

82959

/* Storage area for values except for strings. Must be

82960

large enough to hold a complex value (two reals) of the

82961

largest kind. */

82962

Index: libgfortran/io/unit.c

82963

===================================================================

82964

--- a/src/libgfortran/io/unit.c (.../tags/gcc_4_8_2_release)

82965

+++ b/src/libgfortran/io/unit.c (.../branches/gcc-4_8-branch)

82966

@@ -29,6 +29,7 @@

82967

#include "unix.h"

82968

#include <stdlib.h>

82969

#include <string.h>

82970

+#include <stdbool.h>

82971

82972

82973

/* IO locking rules:

82974

@@ -375,6 +376,36 @@

82975

}

82976

82977

82978

+/* Helper function to check rank, stride, format string, and namelist.

82979

+ This is used for optimization. You can't trim out blanks or shorten

82980

+ the string if trailing spaces are significant. */

82981

+static bool

82982

+is_trim_ok (st_parameter_dt *dtp)

82983

+{

82984

+ /* Check rank and stride. */

82985

+ if (dtp->internal_unit_desc)

82986

+ return false;

82987

+ /* Format strings can not have 'BZ' or '/'. */

82988

+ if (dtp->common.flags & IOPARM_DT_HAS_FORMAT)

82989

+ {

82990

+ char *p = dtp->format;

82991

+ off_t i;

82992

+ if (dtp->common.flags & IOPARM_DT_HAS_BLANK)

82993

+ return false;

82994

+ for (i = 0; i < dtp->format_len; i++)

82995

+ {

82996

+ if (p[i] == '/') return false;

82997

+ if (p[i] == 'b' || p[i] == 'B')

82998

+ if (p[i+1] == 'z' || p[i+1] == 'Z')

82999

+ return false;

83000

+ }

83001

+ }

83002

+ if (dtp->u.p.ionml) /* A namelist. */

83003

+ return false;

83004

+ return true;

83005

+}

83006

+

83007

+

83008

gfc_unit *

83009

get_internal_unit (st_parameter_dt *dtp)

83010

{

83011

@@ -402,6 +433,22 @@

83012

some other file I/O unit. */

83013

iunit->unit_number = -1;

83014

83015

+ /* As an optimization, adjust the unit record length to not

83016

+ include trailing blanks. This will not work under certain conditions

83017

+ where trailing blanks have significance. */

83018

+ if (dtp->u.p.mode == READING && is_trim_ok (dtp))

83019

+ {

83020

+ int len;

83021

+ if (dtp->common.unit == 0)

83022

+ len = string_len_trim (dtp->internal_unit_len,

83023

+ dtp->internal_unit);

83024

+ else

83025

+ len = string_len_trim_char4 (dtp->internal_unit_len,

83026

+ (const gfc_char4_t*) dtp->internal_unit);

83027

+ dtp->internal_unit_len = len;

83028

+ iunit->recl = dtp->internal_unit_len;

83029

+ }

83030

+

83031

/* Set up the looping specification from the array descriptor, if any. */

83032

83033

if (is_array_io (dtp))

83034

@@ -414,27 +461,6 @@

83035

83036

start_record *= iunit->recl;

83037

}

83038

- else

83039

- {

83040

- /* If we are not processing an array, adjust the unit record length not

83041

- to include trailing blanks for list-formatted reads. */

83042

- if (dtp->u.p.mode == READING && !(dtp->common.flags & IOPARM_DT_HAS_FORMAT))

83043

- {

83044

- if (dtp->common.unit == 0)

83045

- {

83046

- dtp->internal_unit_len =

83047

- string_len_trim (dtp->internal_unit_len, dtp->internal_unit);

83048

- iunit->recl = dtp->internal_unit_len;

83049

- }

83050

- else

83051

- {

83052

- dtp->internal_unit_len =

83053

- string_len_trim_char4 (dtp->internal_unit_len,

83054

- (const gfc_char4_t*) dtp->internal_unit);

83055

- iunit->recl = dtp->internal_unit_len;

83056

- }

83057

- }

83058

- }

83059

83060

/* Set initial values for unit parameters. */

83061

if (dtp->common.unit)

83062

Index: libgfortran/io/write_float.def

83063

===================================================================

83064

--- a/src/libgfortran/io/write_float.def (.../tags/gcc_4_8_2_release)

83065

+++ b/src/libgfortran/io/write_float.def (.../branches/gcc-4_8-branch)

83066

@@ -125,8 +125,6 @@

83067

int nzero;

83068

/* Number of digits after the decimal point. */

83069

int nafter;

83070

- /* Number of zeros after the decimal point, whatever the precision. */

83071

- int nzero_real;

83072

int leadzero;

83073

int nblanks;

83074

int ndigits, edigits;

83075

@@ -138,7 +136,6 @@

83076

p = dtp->u.p.scale_factor;

83077

83078

rchar = '5';

83079

- nzero_real = -1;

83080

83081

/* We should always know the field width and precision. */

83082

if (d < 0)

83083

@@ -191,7 +188,7 @@

83084

if (nafter < 0)

83085

nafter = 0;

83086

nafter = d;

83087

- nzero = nzero_real = 0;

83088

+ nzero = 0;

83089

}

83090

else /* p < 0 */

83091

{

83092

@@ -211,7 +208,6 @@

83093

nafter = d + nbefore;

83094

nbefore = 0;

83095

}

83096

- nzero_real = nzero;

83097

if (nzero > d)

83098

nzero = d;

83099

}

83100

@@ -218,7 +214,7 @@

83101

}

83102

else

83103

{

83104

- nzero = nzero_real = 0;

83105

+ nzero = 0;

83106

nafter = d;

83107

}

83108

83109

@@ -373,7 +369,7 @@

83110

updown:

83111

83112

rchar = '0';

83113

- if (w > 0 && d == 0 && p == 0)

83114

+ if (ft != FMT_F && w > 0 && d == 0 && p == 0)

83115

nbefore = 1;

83116

/* Scan for trailing zeros to see if we really need to round it. */

83117

for(i = nbefore + nafter; i < ndigits; i++)

83118

@@ -386,13 +382,14 @@

83119

do_rnd:

83120

83121

if (nbefore + nafter == 0)

83122

+ /* Handle the case Fw.0 and value < 1.0 */

83123

{

83124

ndigits = 0;

83125

- if (nzero_real == d && digits[0] >= rchar)

83126

+ if (digits[0] >= rchar)

83127

{

83128

/* We rounded to zero but shouldn't have */

83129

- nzero--;

83130

- nafter = 1;

83131

+ nbefore = 1;

83132

+ digits--;

83133

digits[0] = '1';

83134

ndigits = 1;

83135

}

83136

@@ -990,7 +987,7 @@

83137

int d = f->u.real.d;\

83138

int w = f->u.real.w;\

83139

fnode newf;\

83140

- GFC_REAL_ ## x rexp_d, r = 0.5;\

83141

+ GFC_REAL_ ## x exp_d, r = 0.5, r_sc;\

83142

int low, high, mid;\

83143

int ubound, lbound;\

83144

char *p, pad = ' ';\

83145

@@ -997,6 +994,7 @@

83146

int save_scale_factor, nb = 0;\

83147

try result;\

83148

int nprinted, precision;\

83149

+ volatile GFC_REAL_ ## x temp;\

83150

\

83151

save_scale_factor = dtp->u.p.scale_factor;\

83152

\

83153

@@ -1015,10 +1013,13 @@

83154

break;\

83155

}\

83156

\

83157

- rexp_d = calculate_exp_ ## x (-d);\

83158

- if ((m > 0.0 && ((m < 0.1 - 0.1 * r * rexp_d) || (rexp_d * (m + r) >= 1.0)))\

83159

+ exp_d = calculate_exp_ ## x (d);\

83160

+ r_sc = (1 - r / exp_d);\

83161

+ temp = 0.1 * r_sc;\

83162

+ if ((m > 0.0 && ((m < temp) || (r >= (exp_d - m))))\

83163

|| ((m == 0.0) && !(compile_options.allow_std\

83164

- & (GFC_STD_F2003 | GFC_STD_F2008))))\

83165

+ & (GFC_STD_F2003 | GFC_STD_F2008)))\

83166

+ || d == 0)\

83167

{ \

83168

newf.format = FMT_E;\

83169

newf.u.real.w = w;\

83170

@@ -1038,10 +1039,9 @@

83171

\

83172

while (low <= high)\

83173

{ \

83174

- volatile GFC_REAL_ ## x temp;\

83175

mid = (low + high) / 2;\

83176

\

83177

- temp = (calculate_exp_ ## x (mid - 1) * (1 - r * rexp_d));\

83178

+ temp = (calculate_exp_ ## x (mid - 1) * r_sc);\

83179

\

83180

if (m < temp)\

83181

{ \

83182

@@ -1121,14 +1121,36 @@

83183

/* EN format is tricky since the number of significant digits depends

83184

on the magnitude. Solve it by first printing a temporary value and

83185

figure out the number of significant digits from the printed

83186

- exponent. */

83187

+ exponent. Values y, 0.95*10.0**e <= y <10.0**e, are rounded to

83188

+ 10.0**e even when the final result will not be rounded to 10.0**e.

83189

+ For these values the exponent returned by atoi has to be decremented

83190

+ by one. The values y in the ranges

83191

+ (1000.0-0.5*10.0**(-d))*10.0**(3*n) <= y < 10.0*(3*(n+1))

83192

+ (100.0-0.5*10.0**(-d))*10.0**(3*n) <= y < 10.0*(3*n+2)

83193

+ (10.0-0.5*10.0**(-d))*10.0**(3*n) <= y < 10.0*(3*n+1)

83194

+ are correctly rounded respectively to 1.0...0*10.0*(3*(n+1)),

83195

+ 100.0...0*10.0*(3*n), and 10.0...0*10.0*(3*n), where 0...0

83196

+ represents d zeroes, by the lines 279 to 297. */

83197

83198

#define EN_PREC(x,y)\

83199

{\

83200

- GFC_REAL_ ## x tmp; \

83201

- tmp = * (GFC_REAL_ ## x *)source; \

83202

+ volatile GFC_REAL_ ## x tmp, one = 1.0;\

83203

+ tmp = * (GFC_REAL_ ## x *)source;\

83204

if (isfinite (tmp)) \

83205

- nprinted = DTOA(y,0,tmp); \

83206

+ {\

83207

+ nprinted = DTOA(y,0,tmp);\

83208

+ int e = atoi (&buffer[4]);\

83209

+ if (buffer[1] == '1')\

83210

+ {\

83211

+ tmp = (calculate_exp_ ## x (-e)) * tmp;\

83212

+ tmp = one - (tmp < 0 ? -tmp : tmp); \

83213

+ if (tmp > 0)\

83214

+ e = e - 1;\

83215

+ }\

83216

+ nbefore = e%3;\

83217

+ if (nbefore < 0)\

83218

+ nbefore = 3 + nbefore;\

83219

+ }\

83220

else\

83221

nprinted = -1;\

83222

}\

83223

@@ -1140,6 +1162,7 @@

83224

int nprinted;

83225

char buffer[10];

83226

const size_t size = 10;

83227

+ int nbefore; /* digits before decimal point - 1. */

83228

83229

switch (len)

83230

{

83231

@@ -1172,16 +1195,6 @@

83232

if (nprinted == -1)

83233

return -1;

83234

83235

- int e = atoi (&buffer[5]);

83236

- int nbefore; /* digits before decimal point - 1. */

83237

- if (e >= 0)

83238

- nbefore = e % 3;

83239

- else

83240

- {

83241

- nbefore = (-e) % 3;

83242

- if (nbefore != 0)

83243

- nbefore = 3 - nbefore;

83244

- }

83245

int prec = f->u.real.d + nbefore;

83246

if (dtp->u.p.current_unit->round_status != ROUND_UNSPECIFIED

83247

&& dtp->u.p.current_unit->round_status != ROUND_PROCDEFINED)

83248

Index: libffi/configure

83249

===================================================================

83250

--- a/src/libffi/configure (.../tags/gcc_4_8_2_release)

83251

+++ b/src/libffi/configure (.../branches/gcc-4_8-branch)

83252

@@ -613,6 +613,7 @@

83253

FFI_EXEC_TRAMPOLINE_TABLE

83254

FFI_EXEC_TRAMPOLINE_TABLE_FALSE

83255

FFI_EXEC_TRAMPOLINE_TABLE_TRUE

83256

+HAVE_LONG_DOUBLE_VARIANT

83257

HAVE_LONG_DOUBLE

83258

ALLOCA

83259

TILE_FALSE

83260

@@ -6392,7 +6393,7 @@

83261

rm -rf conftest*

83262

;;

83263

83264

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

83265

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

83266

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

83267

# Find out which ABI we are using.

83268

echo 'int i;' > conftest.$ac_ext

83269

@@ -6417,7 +6418,10 @@

83270

;;

83271

esac

83272

;;

83273

- ppc64-*linux*|powerpc64-*linux*)

83274

+ powerpc64le-*linux*)

83275

+ LD="${LD-ld} -m elf32lppclinux"

83276

+ ;;

83277

+ powerpc64-*linux*)

83278

LD="${LD-ld} -m elf32ppclinux"

83279

;;

83280

s390x-*linux*)

83281

@@ -6436,7 +6440,10 @@

83282

x86_64-*linux*)

83283

LD="${LD-ld} -m elf_x86_64"

83284

;;

83285

- ppc*-*linux*|powerpc*-*linux*)

83286

+ powerpcle-*linux*)

83287

+ LD="${LD-ld} -m elf64lppc"

83288

+ ;;

83289

+ powerpc-*linux*)

83290

LD="${LD-ld} -m elf64ppc"

83291

;;

83292

s390*-*linux*|s390*-*tpf*)

83293

@@ -10900,7 +10907,7 @@

83294

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

83295

lt_status=$lt_dlunknown

83296

cat > conftest.$ac_ext <<_LT_EOF

83297

-#line 10903 "configure"

83298

+#line 10910 "configure"

83299

#include "confdefs.h"

83300

83301

#if HAVE_DLFCN_H

83302

@@ -11006,7 +11013,7 @@

83303

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

83304

lt_status=$lt_dlunknown

83305

cat > conftest.$ac_ext <<_LT_EOF

83306

-#line 11009 "configure"

83307

+#line 11016 "configure"

83308

#include "confdefs.h"

83309

83310

#if HAVE_DLFCN_H

83311

@@ -11443,6 +11450,7 @@

83312

83313

83314

TARGETDIR="unknown"

83315

+HAVE_LONG_DOUBLE_VARIANT=0

83316

case "$host" in

83317

aarch64*-*-*)

83318

TARGET=AARCH64; TARGETDIR=aarch64

83319

@@ -11540,6 +11548,7 @@

83320

83321

powerpc*-*-linux* | powerpc-*-sysv*)

83322

TARGET=POWERPC; TARGETDIR=powerpc

83323

+ HAVE_LONG_DOUBLE_VARIANT=1

83324

;;

83325

powerpc-*-amigaos*)

83326

TARGET=POWERPC; TARGETDIR=powerpc

83327

@@ -11555,6 +11564,7 @@

83328

;;

83329

powerpc-*-freebsd* | powerpc-*-openbsd*)

83330

TARGET=POWERPC_FREEBSD; TARGETDIR=powerpc

83331

+ HAVE_LONG_DOUBLE_VARIANT=1

83332

;;

83333

powerpc64-*-freebsd*)

83334

TARGET=POWERPC; TARGETDIR=powerpc

83335

@@ -12230,17 +12240,25 @@

83336

# Also AC_SUBST this variable for ffi.h.

83337

if test -z "$HAVE_LONG_DOUBLE"; then

83338

HAVE_LONG_DOUBLE=0

83339

- if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

83340

- if test $ac_cv_sizeof_long_double != 0; then

83341

+ if test $ac_cv_sizeof_long_double != 0; then

83342

+ if test $HAVE_LONG_DOUBLE_VARIANT != 0; then

83343

+

83344

+$as_echo "#define HAVE_LONG_DOUBLE_VARIANT 1" >>confdefs.h

83345

+

83346

HAVE_LONG_DOUBLE=1

83347

+ else

83348

+ if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

83349

+ HAVE_LONG_DOUBLE=1

83350

83351

$as_echo "#define HAVE_LONG_DOUBLE 1" >>confdefs.h

83352

83353

+ fi

83354

fi

83355

fi

83356

fi

83357

83358

83359

+

83360

{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5

83361

$as_echo_n "checking whether byte ordering is bigendian... " >&6; }

83362

if test "${ac_cv_c_bigendian+set}" = set; then :

83363

Index: libffi/Makefile.in

83364

===================================================================

83365

--- a/src/libffi/Makefile.in (.../tags/gcc_4_8_2_release)

83366

+++ b/src/libffi/Makefile.in (.../branches/gcc-4_8-branch)

83367

@@ -48,10 +48,10 @@

83368

@IA64_TRUE@am__append_11 = src/ia64/ffi.c src/ia64/unix.S

83369

@M32R_TRUE@am__append_12 = src/m32r/sysv.S src/m32r/ffi.c

83370

@M68K_TRUE@am__append_13 = src/m68k/ffi.c src/m68k/sysv.S

83371

-@POWERPC_TRUE@am__append_14 = src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

83372

+@POWERPC_TRUE@am__append_14 = src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

83373

@POWERPC_AIX_TRUE@am__append_15 = src/powerpc/ffi_darwin.c src/powerpc/aix.S src/powerpc/aix_closure.S

83374

@POWERPC_DARWIN_TRUE@am__append_16 = src/powerpc/ffi_darwin.c src/powerpc/darwin.S src/powerpc/darwin_closure.S

83375

-@POWERPC_FREEBSD_TRUE@am__append_17 = src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

83376

+@POWERPC_FREEBSD_TRUE@am__append_17 = src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

83377

@AARCH64_TRUE@am__append_18 = src/aarch64/sysv.S src/aarch64/ffi.c

83378

@ARM_TRUE@am__append_19 = src/arm/sysv.S src/arm/ffi.c

83379

@ARM_TRUE@@FFI_EXEC_TRAMPOLINE_TABLE_TRUE@am__append_20 = src/arm/trampoline.S

83380

@@ -133,7 +133,9 @@

83381

@IA64_TRUE@am__objects_11 = src/ia64/ffi.lo src/ia64/unix.lo

83382

@M32R_TRUE@am__objects_12 = src/m32r/sysv.lo src/m32r/ffi.lo

83383

@M68K_TRUE@am__objects_13 = src/m68k/ffi.lo src/m68k/sysv.lo

83384

-@POWERPC_TRUE@am__objects_14 = src/powerpc/ffi.lo src/powerpc/sysv.lo \

83385

+@POWERPC_TRUE@am__objects_14 = src/powerpc/ffi.lo \

83386

+@POWERPC_TRUE@ src/powerpc/ffi_sysv.lo \

83387

+@POWERPC_TRUE@ src/powerpc/ffi_linux64.lo src/powerpc/sysv.lo \

83388

@POWERPC_TRUE@ src/powerpc/ppc_closure.lo \

83389

@POWERPC_TRUE@ src/powerpc/linux64.lo \

83390

@POWERPC_TRUE@ src/powerpc/linux64_closure.lo

83391

@@ -144,6 +146,7 @@

83392

@POWERPC_DARWIN_TRUE@ src/powerpc/darwin.lo \

83393

@POWERPC_DARWIN_TRUE@ src/powerpc/darwin_closure.lo

83394

@POWERPC_FREEBSD_TRUE@am__objects_17 = src/powerpc/ffi.lo \

83395

+@POWERPC_FREEBSD_TRUE@ src/powerpc/ffi_sysv.lo \

83396

@POWERPC_FREEBSD_TRUE@ src/powerpc/sysv.lo \

83397

@POWERPC_FREEBSD_TRUE@ src/powerpc/ppc_closure.lo

83398

@AARCH64_TRUE@am__objects_18 = src/aarch64/sysv.lo src/aarch64/ffi.lo

83399

@@ -278,6 +281,7 @@

83400

FGREP = @FGREP@

83401

GREP = @GREP@

83402

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

83403

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

83404

INSTALL = @INSTALL@

83405

INSTALL_DATA = @INSTALL_DATA@

83406

INSTALL_PROGRAM = @INSTALL_PROGRAM@

83407

@@ -387,10 +391,12 @@

83408

src/ia64/unix.S src/mips/ffi.c src/mips/n32.S src/mips/o32.S \

83409

src/mips/ffitarget.h src/m32r/ffi.c src/m32r/sysv.S \

83410

src/m32r/ffitarget.h src/m68k/ffi.c src/m68k/sysv.S \

83411

- src/m68k/ffitarget.h src/powerpc/ffi.c src/powerpc/sysv.S \

83412

- src/powerpc/linux64.S src/powerpc/linux64_closure.S \

83413

- src/powerpc/ppc_closure.S src/powerpc/asm.h \

83414

- src/powerpc/aix.S src/powerpc/darwin.S \

83415

+ src/m68k/ffitarget.h \

83416

+ src/powerpc/ffi.c src/powerpc/ffi_powerpc.h \

83417

+ src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c \

83418

+ src/powerpc/sysv.S src/powerpc/linux64.S \

83419

+ src/powerpc/linux64_closure.S src/powerpc/ppc_closure.S \

83420

+ src/powerpc/asm.h src/powerpc/aix.S src/powerpc/darwin.S \

83421

src/powerpc/aix_closure.S src/powerpc/darwin_closure.S \

83422

src/powerpc/ffi_darwin.c src/powerpc/ffitarget.h \

83423

src/s390/ffi.c src/s390/sysv.S src/s390/ffitarget.h \

83424

@@ -711,6 +717,10 @@

83425

@: > src/powerpc/$(DEPDIR)/$(am__dirstamp)

83426

src/powerpc/ffi.lo: src/powerpc/$(am__dirstamp) \

83427

src/powerpc/$(DEPDIR)/$(am__dirstamp)

83428

+src/powerpc/ffi_sysv.lo: src/powerpc/$(am__dirstamp) \

83429

+ src/powerpc/$(DEPDIR)/$(am__dirstamp)

83430

+src/powerpc/ffi_linux64.lo: src/powerpc/$(am__dirstamp) \

83431

+ src/powerpc/$(DEPDIR)/$(am__dirstamp)

83432

src/powerpc/sysv.lo: src/powerpc/$(am__dirstamp) \

83433

src/powerpc/$(DEPDIR)/$(am__dirstamp)

83434

src/powerpc/ppc_closure.lo: src/powerpc/$(am__dirstamp) \

83435

@@ -912,6 +922,10 @@

83436

-rm -f src/powerpc/ffi.lo

83437

-rm -f src/powerpc/ffi_darwin.$(OBJEXT)

83438

-rm -f src/powerpc/ffi_darwin.lo

83439

+ -rm -f src/powerpc/ffi_linux64.$(OBJEXT)

83440

+ -rm -f src/powerpc/ffi_linux64.lo

83441

+ -rm -f src/powerpc/ffi_sysv.$(OBJEXT)

83442

+ -rm -f src/powerpc/ffi_sysv.lo

83443

-rm -f src/powerpc/linux64.$(OBJEXT)

83444

-rm -f src/powerpc/linux64.lo

83445

-rm -f src/powerpc/linux64_closure.$(OBJEXT)

83446

@@ -1009,6 +1023,8 @@

83447

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/darwin_closure.Plo@am__quote@

83448

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi.Plo@am__quote@

83449

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi_darwin.Plo@am__quote@

83450

+@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi_linux64.Plo@am__quote@

83451

+@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ffi_sysv.Plo@am__quote@

83452

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/linux64.Plo@am__quote@

83453

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/linux64_closure.Plo@am__quote@

83454

@AMDEP_TRUE@@am__include@ @am__quote@src/powerpc/$(DEPDIR)/ppc_closure.Plo@am__quote@

83455

Index: libffi/include/ffi.h.in

83456

===================================================================

83457

--- a/src/libffi/include/ffi.h.in (.../tags/gcc_4_8_2_release)

83458

+++ b/src/libffi/include/ffi.h.in (.../branches/gcc-4_8-branch)

83459

@@ -207,6 +207,11 @@

83460

#endif

83461

} ffi_cif;

83462

83463

+#if HAVE_LONG_DOUBLE_VARIANT

83464

+/* Used to adjust size/alignment of ffi types. */

83465

+void ffi_prep_types (ffi_abi abi);

83466

+# endif

83467

+

83468

/* Used internally, but overridden by some architectures */

83469

ffi_status ffi_prep_cif_core(ffi_cif *cif,

83470

ffi_abi abi,

83471

Index: libffi/include/Makefile.in

83472

===================================================================

83473

--- a/src/libffi/include/Makefile.in (.../tags/gcc_4_8_2_release)

83474

+++ b/src/libffi/include/Makefile.in (.../branches/gcc-4_8-branch)

83475

@@ -113,6 +113,7 @@

83476

FGREP = @FGREP@

83477

GREP = @GREP@

83478

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

83479

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

83480

INSTALL = @INSTALL@

83481

INSTALL_DATA = @INSTALL_DATA@

83482

INSTALL_PROGRAM = @INSTALL_PROGRAM@

83483

Index: libffi/fficonfig.h.in

83484

===================================================================

83485

--- a/src/libffi/fficonfig.h.in (.../tags/gcc_4_8_2_release)

83486

+++ b/src/libffi/fficonfig.h.in (.../branches/gcc-4_8-branch)

83487

@@ -73,6 +73,9 @@

83488

/* Define if you have the long double type and it is bigger than a double */

83489

#undef HAVE_LONG_DOUBLE

83490

83491

+/* Define if you support more than one size of the long double type */

83492

+#undef HAVE_LONG_DOUBLE_VARIANT

83493

+

83494

/* Define to 1 if you have the `memcpy' function. */

83495

#undef HAVE_MEMCPY

83496

83497

Index: libffi/src/powerpc/ppc_closure.S

83498

===================================================================

83499

--- a/src/libffi/src/powerpc/ppc_closure.S (.../tags/gcc_4_8_2_release)

83500

+++ b/src/libffi/src/powerpc/ppc_closure.S (.../branches/gcc-4_8-branch)

83501

@@ -31,7 +31,7 @@

83502

83503

.file "ppc_closure.S"

83504

83505

-#ifndef __powerpc64__

83506

+#ifndef POWERPC64

83507

83508

ENTRY(ffi_closure_SYSV)

83509

.LFB1:

83510

@@ -238,7 +238,7 @@

83511

lwz %r3,112+0(%r1)

83512

lwz %r4,112+4(%r1)

83513

lwz %r5,112+8(%r1)

83514

- bl .Luint128

83515

+ b .Luint128

83516

83517

# The return types below are only used when the ABI type is FFI_SYSV.

83518

# case FFI_SYSV_TYPE_SMALL_STRUCT + 1. One byte struct.

83519

@@ -378,8 +378,7 @@

83520

.align 2

83521

.LEFDE1:

83522

83523

-#endif

83524

-

83525

#if defined __ELF__ && defined __linux__

83526

.section .note.GNU-stack,"",@progbits

83527

#endif

83528

+#endif

83529

Index: libffi/src/powerpc/ffitarget.h

83530

===================================================================

83531

--- a/src/libffi/src/powerpc/ffitarget.h (.../tags/gcc_4_8_2_release)

83532

+++ b/src/libffi/src/powerpc/ffitarget.h (.../branches/gcc-4_8-branch)

83533

@@ -60,45 +60,76 @@

83534

typedef enum ffi_abi {

83535

FFI_FIRST_ABI = 0,

83536

83537

-#ifdef POWERPC

83538

- FFI_SYSV,

83539

- FFI_GCC_SYSV,

83540

- FFI_LINUX64,

83541

- FFI_LINUX,

83542

- FFI_LINUX_SOFT_FLOAT,

83543

-# if defined(POWERPC64)

83544

- FFI_DEFAULT_ABI = FFI_LINUX64,

83545

-# elif defined(__NO_FPRS__)

83546

- FFI_DEFAULT_ABI = FFI_LINUX_SOFT_FLOAT,

83547

-# elif (__LDBL_MANT_DIG__ == 106)

83548

- FFI_DEFAULT_ABI = FFI_LINUX,

83549

-# else

83550

- FFI_DEFAULT_ABI = FFI_GCC_SYSV,

83551

-# endif

83552

-#endif

83553

-

83554

-#ifdef POWERPC_AIX

83555

+#if defined (POWERPC_AIX)

83556

FFI_AIX,

83557

FFI_DARWIN,

83558

FFI_DEFAULT_ABI = FFI_AIX,

83559

-#endif

83560

+ FFI_LAST_ABI

83561

83562

-#ifdef POWERPC_DARWIN

83563

+#elif defined (POWERPC_DARWIN)

83564

FFI_AIX,

83565

FFI_DARWIN,

83566

FFI_DEFAULT_ABI = FFI_DARWIN,

83567

-#endif

83568

+ FFI_LAST_ABI

83569

83570

-#ifdef POWERPC_FREEBSD

83571

- FFI_SYSV,

83572

- FFI_GCC_SYSV,

83573

- FFI_LINUX64,

83574

- FFI_LINUX,

83575

- FFI_LINUX_SOFT_FLOAT,

83576

- FFI_DEFAULT_ABI = FFI_SYSV,

83577

+#else

83578

+ /* The FFI_COMPAT values are used by old code. Since libffi may be

83579

+ a shared library we have to support old values for backwards

83580

+ compatibility. */

83581

+ FFI_COMPAT_SYSV,

83582

+ FFI_COMPAT_GCC_SYSV,

83583

+ FFI_COMPAT_LINUX64,

83584

+ FFI_COMPAT_LINUX,

83585

+ FFI_COMPAT_LINUX_SOFT_FLOAT,

83586

+

83587

+# if defined (POWERPC64)

83588

+ /* This bit, always set in new code, must not be set in any of the

83589

+ old FFI_COMPAT values that might be used for 64-bit linux. We

83590

+ only need worry about FFI_COMPAT_LINUX64, but to be safe avoid

83591

+ all old values. */

83592

+ FFI_LINUX = 8,

83593

+ /* This and following bits can reuse FFI_COMPAT values. */

83594

+ FFI_LINUX_STRUCT_ALIGN = 1,

83595

+ FFI_LINUX_LONG_DOUBLE_128 = 2,

83596

+ FFI_DEFAULT_ABI = (FFI_LINUX

83597

+# ifdef __STRUCT_PARM_ALIGN__

83598

+ | FFI_LINUX_STRUCT_ALIGN

83599

+# endif

83600

+# ifdef __LONG_DOUBLE_128__

83601

+ | FFI_LINUX_LONG_DOUBLE_128

83602

+# endif

83603

+ ),

83604

+ FFI_LAST_ABI = 12

83605

+

83606

+# else

83607

+ /* This bit, always set in new code, must not be set in any of the

83608

+ old FFI_COMPAT values that might be used for 32-bit linux/sysv/bsd. */

83609

+ FFI_SYSV = 8,

83610

+ /* This and following bits can reuse FFI_COMPAT values. */

83611

+ FFI_SYSV_SOFT_FLOAT = 1,

83612

+ FFI_SYSV_STRUCT_RET = 2,

83613

+ FFI_SYSV_IBM_LONG_DOUBLE = 4,

83614

+ FFI_SYSV_LONG_DOUBLE_128 = 16,

83615

+

83616

+ FFI_DEFAULT_ABI = (FFI_SYSV

83617

+# ifdef __NO_FPRS__

83618

+ | FFI_SYSV_SOFT_FLOAT

83619

+# endif

83620

+# if (defined (__SVR4_STRUCT_RETURN) \

83621

+ || defined (POWERPC_FREEBSD) && !defined (__AIX_STRUCT_RETURN))

83622

+ | FFI_SYSV_STRUCT_RET

83623

+# endif

83624

+# if __LDBL_MANT_DIG__ == 106

83625

+ | FFI_SYSV_IBM_LONG_DOUBLE

83626

+# endif

83627

+# ifdef __LONG_DOUBLE_128__

83628

+ | FFI_SYSV_LONG_DOUBLE_128

83629

+# endif

83630

+ ),

83631

+ FFI_LAST_ABI = 32

83632

+# endif

83633

#endif

83634

83635

- FFI_LAST_ABI

83636

} ffi_abi;

83637

#endif

83638

83639

@@ -106,6 +137,10 @@

83640

83641

#define FFI_CLOSURES 1

83642

#define FFI_NATIVE_RAW_API 0

83643

+#if defined (POWERPC) || defined (POWERPC_FREEBSD)

83644

+# define FFI_TARGET_SPECIFIC_VARIADIC 1

83645

+# define FFI_EXTRA_CIF_FIELDS unsigned nfixedargs

83646

+#endif

83647

83648

/* For additional types like the below, take care about the order in

83649

ppc_closures.S. They must follow after the FFI_TYPE_LAST. */

83650

@@ -113,19 +148,26 @@

83651

/* Needed for soft-float long-double-128 support. */

83652

#define FFI_TYPE_UINT128 (FFI_TYPE_LAST + 1)

83653

83654

-/* Needed for FFI_SYSV small structure returns.

83655

- We use two flag bits, (FLAG_SYSV_SMST_R3, FLAG_SYSV_SMST_R4) which are

83656

- defined in ffi.c, to determine the exact return type and its size. */

83657

+/* Needed for FFI_SYSV small structure returns. */

83658

#define FFI_SYSV_TYPE_SMALL_STRUCT (FFI_TYPE_LAST + 2)

83659

83660

-#if defined(POWERPC64) || defined(POWERPC_AIX)

83661

+/* Used by ELFv2 for homogenous structure returns. */

83662

+#define FFI_V2_TYPE_FLOAT_HOMOG (FFI_TYPE_LAST + 1)

83663

+#define FFI_V2_TYPE_DOUBLE_HOMOG (FFI_TYPE_LAST + 2)

83664

+#define FFI_V2_TYPE_SMALL_STRUCT (FFI_TYPE_LAST + 3)

83665

+

83666

+#if _CALL_ELF == 2

83667

+# define FFI_TRAMPOLINE_SIZE 32

83668

+#else

83669

+# if defined(POWERPC64) || defined(POWERPC_AIX)

83670

# if defined(POWERPC_DARWIN64)

83671

# define FFI_TRAMPOLINE_SIZE 48

83672

# else

83673

# define FFI_TRAMPOLINE_SIZE 24

83674

# endif

83675

-#else /* POWERPC || POWERPC_AIX */

83676

+# else /* POWERPC || POWERPC_AIX */

83677

# define FFI_TRAMPOLINE_SIZE 40

83678

+# endif

83679

#endif

83680

83681

#ifndef LIBFFI_ASM

83682

Index: libffi/src/powerpc/ffi.c

83683

===================================================================

83684

--- a/src/libffi/src/powerpc/ffi.c (.../tags/gcc_4_8_2_release)

83685

+++ b/src/libffi/src/powerpc/ffi.c (.../branches/gcc-4_8-branch)

83686

@@ -1,5 +1,6 @@

83687

/* -----------------------------------------------------------------------

83688

83689

83690

83691

83692

83693

83694

@@ -27,966 +28,104 @@

83695

OTHER DEALINGS IN THE SOFTWARE.

83696

----------------------------------------------------------------------- */

83697

83698

-#include <ffi.h>

83699

-#include <ffi_common.h>

83700

+#include "ffi.h"

83701

+#include "ffi_common.h"

83702

+#include "ffi_powerpc.h"

83703

83704

-#include <stdlib.h>

83705

-#include <stdio.h>

83706

-

83707

-

83708

-extern void ffi_closure_SYSV (void);

83709

-extern void FFI_HIDDEN ffi_closure_LINUX64 (void);

83710

-

83711

-enum {

83712

- /* The assembly depends on these exact flags. */

83713

- FLAG_RETURNS_SMST = 1 << (31-31), /* Used for FFI_SYSV small structs. */

83714

- FLAG_RETURNS_NOTHING = 1 << (31-30), /* These go in cr7 */

83715

-#ifndef __NO_FPRS__

83716

- FLAG_RETURNS_FP = 1 << (31-29),

83717

-#endif

83718

- FLAG_RETURNS_64BITS = 1 << (31-28),

83719

-

83720

- FLAG_RETURNS_128BITS = 1 << (31-27), /* cr6 */

83721

-

83722

- FLAG_ARG_NEEDS_COPY = 1 << (31- 7),

83723

-#ifndef __NO_FPRS__

83724

- FLAG_FP_ARGUMENTS = 1 << (31- 6), /* cr1.eq; specified by ABI */

83725

-#endif

83726

- FLAG_4_GPR_ARGUMENTS = 1 << (31- 5),

83727

- FLAG_RETVAL_REFERENCE = 1 << (31- 4)

83728

-};

83729

-

83730

-/* About the SYSV ABI. */

83731

-#define ASM_NEEDS_REGISTERS 4

83732

-#define NUM_GPR_ARG_REGISTERS 8

83733

-#ifndef __NO_FPRS__

83734

-# define NUM_FPR_ARG_REGISTERS 8

83735

-#endif

83736

-

83737

-/* ffi_prep_args_SYSV is called by the assembly routine once stack space

83738

- has been allocated for the function's arguments.

83739

-

83740

- The stack layout we want looks like this:

83741

-

83742

- | Return address from ffi_call_SYSV 4bytes | higher addresses

83743

- |--------------------------------------------|

83744

- | Previous backchain pointer 4 | stack pointer here

83745

- |--------------------------------------------|<+ <<< on entry to

83746

- | Saved r28-r31 4*4 | | ffi_call_SYSV

83747

- |--------------------------------------------| |

83748

- | GPR registers r3-r10 8*4 | | ffi_call_SYSV

83749

- |--------------------------------------------| |

83750

- | FPR registers f1-f8 (optional) 8*8 | |

83751

- |--------------------------------------------| | stack |

83752

- | Space for copied structures | | grows |

83753

- |--------------------------------------------| | down V

83754

- | Parameters that didn't fit in registers | |

83755

- |--------------------------------------------| | lower addresses

83756

- | Space for callee's LR 4 | |

83757

- |--------------------------------------------| | stack pointer here

83758

- | Current backchain pointer 4 |-/ during

83759

- |--------------------------------------------| <<< ffi_call_SYSV

83760

-

83761

-*/

83762

-

83763

-void

83764

-ffi_prep_args_SYSV (extended_cif *ecif, unsigned *const stack)

83765

+#if HAVE_LONG_DOUBLE_VARIANT

83766

+/* Adjust ffi_type_longdouble. */

83767

+void FFI_HIDDEN

83768

+ffi_prep_types (ffi_abi abi)

83769

{

83770

- const unsigned bytes = ecif->cif->bytes;

83771

- const unsigned flags = ecif->cif->flags;

83772

-

83773

- typedef union {

83774

- char *c;

83775

- unsigned *u;

83776

- long long *ll;

83777

- float *f;

83778

- double *d;

83779

- } valp;

83780

-

83781

- /* 'stacktop' points at the previous backchain pointer. */

83782

- valp stacktop;

83783

-

83784

- /* 'gpr_base' points at the space for gpr3, and grows upwards as

83785

- we use GPR registers. */

83786

- valp gpr_base;

83787

- int intarg_count;

83788

-

83789

-#ifndef __NO_FPRS__

83790

- /* 'fpr_base' points at the space for fpr1, and grows upwards as

83791

- we use FPR registers. */

83792

- valp fpr_base;

83793

- int fparg_count;

83794

-#endif

83795

-

83796

- /* 'copy_space' grows down as we put structures in it. It should

83797

- stay 16-byte aligned. */

83798

- valp copy_space;

83799

-

83800

- /* 'next_arg' grows up as we put parameters in it. */

83801

- valp next_arg;

83802

-

83803

- int i;

83804

- ffi_type **ptr;

83805

-#ifndef __NO_FPRS__

83806

- double double_tmp;

83807

-#endif

83808

- union {

83809

- void **v;

83810

- char **c;

83811

- signed char **sc;

83812

- unsigned char **uc;

83813

- signed short **ss;

83814

- unsigned short **us;

83815

- unsigned int **ui;

83816

- long long **ll;

83817

- float **f;

83818

- double **d;

83819

- } p_argv;

83820

- size_t struct_copy_size;

83821

- unsigned gprvalue;

83822

-

83823

- stacktop.c = (char *) stack + bytes;

83824

- gpr_base.u = stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS;

83825

- intarg_count = 0;

83826

-#ifndef __NO_FPRS__

83827

- fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS;

83828

- fparg_count = 0;

83829

- copy_space.c = ((flags & FLAG_FP_ARGUMENTS) ? fpr_base.c : gpr_base.c);

83830

-#else

83831

- copy_space.c = gpr_base.c;

83832

-#endif

83833

- next_arg.u = stack + 2;

83834

-

83835

- /* Check that everything starts aligned properly. */

83836

- FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

83837

- FFI_ASSERT (((unsigned long) copy_space.c & 0xF) == 0);

83838

- FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

83839

- FFI_ASSERT ((bytes & 0xF) == 0);

83840

- FFI_ASSERT (copy_space.c >= next_arg.c);

83841

-

83842

- /* Deal with return values that are actually pass-by-reference. */

83843

- if (flags & FLAG_RETVAL_REFERENCE)

83844

- {

83845

- *gpr_base.u++ = (unsigned long) (char *) ecif->rvalue;

83846

- intarg_count++;

83847

- }

83848

-

83849

- /* Now for the arguments. */

83850

- p_argv.v = ecif->avalue;

83851

- for (ptr = ecif->cif->arg_types, i = ecif->cif->nargs;

83852

- i > 0;

83853

- i--, ptr++, p_argv.v++)

83854

- {

83855

- unsigned short typenum = (*ptr)->type;

83856

-

83857

- /* We may need to handle some values depending on ABI */

83858

- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) {

83859

- if (typenum == FFI_TYPE_FLOAT)

83860

- typenum = FFI_TYPE_UINT32;

83861

- if (typenum == FFI_TYPE_DOUBLE)

83862

- typenum = FFI_TYPE_UINT64;

83863

- if (typenum == FFI_TYPE_LONGDOUBLE)

83864

- typenum = FFI_TYPE_UINT128;

83865

- } else if (ecif->cif->abi != FFI_LINUX) {

83866

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

83867

- if (typenum == FFI_TYPE_LONGDOUBLE)

83868

- typenum = FFI_TYPE_STRUCT;

83869

-#endif

83870

- }

83871

-

83872

- /* Now test the translated value */

83873

- switch (typenum) {

83874

-#ifndef __NO_FPRS__

83875

- case FFI_TYPE_FLOAT:

83876

- /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */

83877

- double_tmp = **p_argv.f;

83878

- if (fparg_count >= NUM_FPR_ARG_REGISTERS)

83879

- {

83880

- *next_arg.f = (float) double_tmp;

83881

- next_arg.u += 1;

83882

- intarg_count++;

83883

- }

83884

- else

83885

- *fpr_base.d++ = double_tmp;

83886

- fparg_count++;

83887

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

83888

- break;

83889

-

83890

- case FFI_TYPE_DOUBLE:

83891

- /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */

83892

- double_tmp = **p_argv.d;

83893

-

83894

- if (fparg_count >= NUM_FPR_ARG_REGISTERS)

83895

- {

83896

- if (intarg_count >= NUM_GPR_ARG_REGISTERS

83897

- && intarg_count % 2 != 0)

83898

- {

83899

- intarg_count++;

83900

- next_arg.u++;

83901

- }

83902

- *next_arg.d = double_tmp;

83903

- next_arg.u += 2;

83904

- }

83905

- else

83906

- *fpr_base.d++ = double_tmp;

83907

- fparg_count++;

83908

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

83909

- break;

83910

-

83911

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

83912

- case FFI_TYPE_LONGDOUBLE:

83913

- double_tmp = (*p_argv.d)[0];

83914

-

83915

- if (fparg_count >= NUM_FPR_ARG_REGISTERS - 1)

83916

- {

83917

- if (intarg_count >= NUM_GPR_ARG_REGISTERS

83918

- && intarg_count % 2 != 0)

83919

- {

83920

- intarg_count++;

83921

- next_arg.u++;

83922

- }

83923

- *next_arg.d = double_tmp;

83924

- next_arg.u += 2;

83925

- double_tmp = (*p_argv.d)[1];

83926

- *next_arg.d = double_tmp;

83927

- next_arg.u += 2;

83928

- }

83929

- else

83930

- {

83931

- *fpr_base.d++ = double_tmp;

83932

- double_tmp = (*p_argv.d)[1];

83933

- *fpr_base.d++ = double_tmp;

83934

- }

83935

-

83936

- fparg_count += 2;

83937

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

83938

- break;

83939

-#endif

83940

-#endif /* have FPRs */

83941

-

83942

- /*

83943

- * The soft float ABI for long doubles works like this, a long double

83944

- * is passed in four consecutive GPRs if available. A maximum of 2

83945

- * long doubles can be passed in gprs. If we do not have 4 GPRs

83946

- * left, the long double is passed on the stack, 4-byte aligned.

83947

- */

83948

- case FFI_TYPE_UINT128: {

83949

- unsigned int int_tmp = (*p_argv.ui)[0];

83950

- unsigned int ii;

83951

- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3) {

83952

- if (intarg_count < NUM_GPR_ARG_REGISTERS)

83953

- intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count;

83954

- *(next_arg.u++) = int_tmp;

83955

- for (ii = 1; ii < 4; ii++) {

83956

- int_tmp = (*p_argv.ui)[ii];

83957

- *(next_arg.u++) = int_tmp;

83958

- }

83959

- } else {

83960

- *(gpr_base.u++) = int_tmp;

83961

- for (ii = 1; ii < 4; ii++) {

83962

- int_tmp = (*p_argv.ui)[ii];

83963

- *(gpr_base.u++) = int_tmp;

83964

- }

83965

- }

83966

- intarg_count += 4;

83967

- break;

83968

- }

83969

-

83970

- case FFI_TYPE_UINT64:

83971

- case FFI_TYPE_SINT64:

83972

- if (intarg_count == NUM_GPR_ARG_REGISTERS-1)

83973

- intarg_count++;

83974

- if (intarg_count >= NUM_GPR_ARG_REGISTERS)

83975

- {

83976

- if (intarg_count % 2 != 0)

83977

- {

83978

- intarg_count++;

83979

- next_arg.u++;

83980

- }

83981

- *next_arg.ll = **p_argv.ll;

83982

- next_arg.u += 2;

83983

- }

83984

- else

83985

- {

83986

- /* whoops: abi states only certain register pairs

83987

- * can be used for passing long long int

83988

- * specifically (r3,r4), (r5,r6), (r7,r8),

83989

- * (r9,r10) and if next arg is long long but

83990

- * not correct starting register of pair then skip

83991

- * until the proper starting register

83992

- */

83993

- if (intarg_count % 2 != 0)

83994

- {

83995

- intarg_count ++;

83996

- gpr_base.u++;

83997

- }

83998

- *gpr_base.ll++ = **p_argv.ll;

83999

- }

84000

- intarg_count += 2;

84001

- break;

84002

-

84003

- case FFI_TYPE_STRUCT:

84004

- struct_copy_size = ((*ptr)->size + 15) & ~0xF;

84005

- copy_space.c -= struct_copy_size;

84006

- memcpy (copy_space.c, *p_argv.c, (*ptr)->size);

84007

-

84008

- gprvalue = (unsigned long) copy_space.c;

84009

-

84010

- FFI_ASSERT (copy_space.c > next_arg.c);

84011

- FFI_ASSERT (flags & FLAG_ARG_NEEDS_COPY);

84012

- goto putgpr;

84013

-

84014

- case FFI_TYPE_UINT8:

84015

- gprvalue = **p_argv.uc;

84016

- goto putgpr;

84017

- case FFI_TYPE_SINT8:

84018

- gprvalue = **p_argv.sc;

84019

- goto putgpr;

84020

- case FFI_TYPE_UINT16:

84021

- gprvalue = **p_argv.us;

84022

- goto putgpr;

84023

- case FFI_TYPE_SINT16:

84024

- gprvalue = **p_argv.ss;

84025

- goto putgpr;

84026

-

84027

- case FFI_TYPE_INT:

84028

- case FFI_TYPE_UINT32:

84029

- case FFI_TYPE_SINT32:

84030

- case FFI_TYPE_POINTER:

84031

-

84032

- gprvalue = **p_argv.ui;

84033

-

84034

- putgpr:

84035

- if (intarg_count >= NUM_GPR_ARG_REGISTERS)

84036

- *next_arg.u++ = gprvalue;

84037

- else

84038

- *gpr_base.u++ = gprvalue;

84039

- intarg_count++;

84040

- break;

84041

- }

84042

- }

84043

-

84044

- /* Check that we didn't overrun the stack... */

84045

- FFI_ASSERT (copy_space.c >= next_arg.c);

84046

- FFI_ASSERT (gpr_base.u <= stacktop.u - ASM_NEEDS_REGISTERS);

84047

-#ifndef __NO_FPRS__

84048

- FFI_ASSERT (fpr_base.u

84049

- <= stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS);

84050

-#endif

84051

- FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS || intarg_count <= 4);

84052

+# if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84053

+# ifdef POWERPC64

84054

+ ffi_prep_types_linux64 (abi);

84055

+# else

84056

+ ffi_prep_types_sysv (abi);

84057

+# endif

84058

+# endif

84059

}

84060

-

84061

-/* About the LINUX64 ABI. */

84062

-enum {

84063

- NUM_GPR_ARG_REGISTERS64 = 8,

84064

- NUM_FPR_ARG_REGISTERS64 = 13

84065

-};

84066

-enum { ASM_NEEDS_REGISTERS64 = 4 };

84067

-

84068

-/* ffi_prep_args64 is called by the assembly routine once stack space

84069

- has been allocated for the function's arguments.

84070

-

84071

- The stack layout we want looks like this:

84072

-

84073

- | Ret addr from ffi_call_LINUX64 8bytes | higher addresses

84074

- |--------------------------------------------|

84075

- | CR save area 8bytes |

84076

- |--------------------------------------------|

84077

- | Previous backchain pointer 8 | stack pointer here

84078

- |--------------------------------------------|<+ <<< on entry to

84079

- | Saved r28-r31 4*8 | | ffi_call_LINUX64

84080

- |--------------------------------------------| |

84081

- | GPR registers r3-r10 8*8 | |

84082

- |--------------------------------------------| |

84083

- | FPR registers f1-f13 (optional) 13*8 | |

84084

- |--------------------------------------------| |

84085

- | Parameter save area | |

84086

- |--------------------------------------------| |

84087

- | TOC save area 8 | |

84088

- |--------------------------------------------| | stack |

84089

- | Linker doubleword 8 | | grows |

84090

- |--------------------------------------------| | down V

84091

- | Compiler doubleword 8 | |

84092

- |--------------------------------------------| | lower addresses

84093

- | Space for callee's LR 8 | |

84094

- |--------------------------------------------| |

84095

- | CR save area 8 | |

84096

- |--------------------------------------------| | stack pointer here

84097

- | Current backchain pointer 8 |-/ during

84098

- |--------------------------------------------| <<< ffi_call_LINUX64

84099

-

84100

-*/

84101

-

84102

-void FFI_HIDDEN

84103

-ffi_prep_args64 (extended_cif *ecif, unsigned long *const stack)

84104

-{

84105

- const unsigned long bytes = ecif->cif->bytes;

84106

- const unsigned long flags = ecif->cif->flags;

84107

-

84108

- typedef union {

84109

- char *c;

84110

- unsigned long *ul;

84111

- float *f;

84112

- double *d;

84113

- } valp;

84114

-

84115

- /* 'stacktop' points at the previous backchain pointer. */

84116

- valp stacktop;

84117

-

84118

- /* 'next_arg' points at the space for gpr3, and grows upwards as

84119

- we use GPR registers, then continues at rest. */

84120

- valp gpr_base;

84121

- valp gpr_end;

84122

- valp rest;

84123

- valp next_arg;

84124

-

84125

- /* 'fpr_base' points at the space for fpr3, and grows upwards as

84126

- we use FPR registers. */

84127

- valp fpr_base;

84128

- int fparg_count;

84129

-

84130

- int i, words;

84131

- ffi_type **ptr;

84132

- double double_tmp;

84133

- union {

84134

- void **v;

84135

- char **c;

84136

- signed char **sc;

84137

- unsigned char **uc;

84138

- signed short **ss;

84139

- unsigned short **us;

84140

- signed int **si;

84141

- unsigned int **ui;

84142

- unsigned long **ul;

84143

- float **f;

84144

- double **d;

84145

- } p_argv;

84146

- unsigned long gprvalue;

84147

-

84148

- stacktop.c = (char *) stack + bytes;

84149

- gpr_base.ul = stacktop.ul - ASM_NEEDS_REGISTERS64 - NUM_GPR_ARG_REGISTERS64;

84150

- gpr_end.ul = gpr_base.ul + NUM_GPR_ARG_REGISTERS64;

84151

- rest.ul = stack + 6 + NUM_GPR_ARG_REGISTERS64;

84152

- fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS64;

84153

- fparg_count = 0;

84154

- next_arg.ul = gpr_base.ul;

84155

-

84156

- /* Check that everything starts aligned properly. */

84157

- FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

84158

- FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

84159

- FFI_ASSERT ((bytes & 0xF) == 0);

84160

-

84161

- /* Deal with return values that are actually pass-by-reference. */

84162

- if (flags & FLAG_RETVAL_REFERENCE)

84163

- *next_arg.ul++ = (unsigned long) (char *) ecif->rvalue;

84164

-

84165

- /* Now for the arguments. */

84166

- p_argv.v = ecif->avalue;

84167

- for (ptr = ecif->cif->arg_types, i = ecif->cif->nargs;

84168

- i > 0;

84169

- i--, ptr++, p_argv.v++)

84170

- {

84171

- switch ((*ptr)->type)

84172

- {

84173

- case FFI_TYPE_FLOAT:

84174

- double_tmp = **p_argv.f;

84175

- *next_arg.f = (float) double_tmp;

84176

- if (++next_arg.ul == gpr_end.ul)

84177

- next_arg.ul = rest.ul;

84178

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

84179

- *fpr_base.d++ = double_tmp;

84180

- fparg_count++;

84181

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

84182

- break;

84183

-

84184

- case FFI_TYPE_DOUBLE:

84185

- double_tmp = **p_argv.d;

84186

- *next_arg.d = double_tmp;

84187

- if (++next_arg.ul == gpr_end.ul)

84188

- next_arg.ul = rest.ul;

84189

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

84190

- *fpr_base.d++ = double_tmp;

84191

- fparg_count++;

84192

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

84193

- break;

84194

-

84195

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84196

- case FFI_TYPE_LONGDOUBLE:

84197

- double_tmp = (*p_argv.d)[0];

84198

- *next_arg.d = double_tmp;

84199

- if (++next_arg.ul == gpr_end.ul)

84200

- next_arg.ul = rest.ul;

84201

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

84202

- *fpr_base.d++ = double_tmp;

84203

- fparg_count++;

84204

- double_tmp = (*p_argv.d)[1];

84205

- *next_arg.d = double_tmp;

84206

- if (++next_arg.ul == gpr_end.ul)

84207

- next_arg.ul = rest.ul;

84208

- if (fparg_count < NUM_FPR_ARG_REGISTERS64)

84209

- *fpr_base.d++ = double_tmp;

84210

- fparg_count++;

84211

- FFI_ASSERT (__LDBL_MANT_DIG__ == 106);

84212

- FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

84213

- break;

84214

#endif

84215

84216

- case FFI_TYPE_STRUCT:

84217

- words = ((*ptr)->size + 7) / 8;

84218

- if (next_arg.ul >= gpr_base.ul && next_arg.ul + words > gpr_end.ul)

84219

- {

84220

- size_t first = gpr_end.c - next_arg.c;

84221

- memcpy (next_arg.c, *p_argv.c, first);

84222

- memcpy (rest.c, *p_argv.c + first, (*ptr)->size - first);

84223

- next_arg.c = rest.c + words * 8 - first;

84224

- }

84225

- else

84226

- {

84227

- char *where = next_arg.c;

84228

-

84229

-#ifndef __LITTLE_ENDIAN__

84230

- /* Structures with size less than eight bytes are passed

84231

- left-padded. */

84232

- if ((*ptr)->size < 8)

84233

- where += 8 - (*ptr)->size;

84234

-#endif

84235

- memcpy (where, *p_argv.c, (*ptr)->size);

84236

- next_arg.ul += words;

84237

- if (next_arg.ul == gpr_end.ul)

84238

- next_arg.ul = rest.ul;

84239

- }

84240

- break;

84241

-

84242

- case FFI_TYPE_UINT8:

84243

- gprvalue = **p_argv.uc;

84244

- goto putgpr;

84245

- case FFI_TYPE_SINT8:

84246

- gprvalue = **p_argv.sc;

84247

- goto putgpr;

84248

- case FFI_TYPE_UINT16:

84249

- gprvalue = **p_argv.us;

84250

- goto putgpr;

84251

- case FFI_TYPE_SINT16:

84252

- gprvalue = **p_argv.ss;

84253

- goto putgpr;

84254

- case FFI_TYPE_UINT32:

84255

- gprvalue = **p_argv.ui;

84256

- goto putgpr;

84257

- case FFI_TYPE_INT:

84258

- case FFI_TYPE_SINT32:

84259

- gprvalue = **p_argv.si;

84260

- goto putgpr;

84261

-

84262

- case FFI_TYPE_UINT64:

84263

- case FFI_TYPE_SINT64:

84264

- case FFI_TYPE_POINTER:

84265

- gprvalue = **p_argv.ul;

84266

- putgpr:

84267

- *next_arg.ul++ = gprvalue;

84268

- if (next_arg.ul == gpr_end.ul)

84269

- next_arg.ul = rest.ul;

84270

- break;

84271

- }

84272

- }

84273

-

84274

- FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS

84275

- || (next_arg.ul >= gpr_base.ul

84276

- && next_arg.ul <= gpr_base.ul + 4));

84277

-}

84278

-

84279

-

84280

-

84281

/* Perform machine dependent cif processing */

84282

-ffi_status

84283

+ffi_status FFI_HIDDEN

84284

ffi_prep_cif_machdep (ffi_cif *cif)

84285

{

84286

- /* All this is for the SYSV and LINUX64 ABI. */

84287

- int i;

84288

- ffi_type **ptr;

84289

- unsigned bytes;

84290

- int fparg_count = 0, intarg_count = 0;

84291

- unsigned flags = 0;

84292

- unsigned struct_copy_size = 0;

84293

- unsigned type = cif->rtype->type;

84294

- unsigned size = cif->rtype->size;

84295

-

84296

- if (cif->abi != FFI_LINUX64)

84297

- {

84298

- /* All the machine-independent calculation of cif->bytes will be wrong.

84299

- Redo the calculation for SYSV. */

84300

-

84301

- /* Space for the frame pointer, callee's LR, and the asm's temp regs. */

84302

- bytes = (2 + ASM_NEEDS_REGISTERS) * sizeof (int);

84303

-

84304

- /* Space for the GPR registers. */

84305

- bytes += NUM_GPR_ARG_REGISTERS * sizeof (int);

84306

- }

84307

- else

84308

- {

84309

- /* 64-bit ABI. */

84310

-

84311

- /* Space for backchain, CR, LR, cc/ld doubleword, TOC and the asm's temp

84312

- regs. */

84313

- bytes = (6 + ASM_NEEDS_REGISTERS64) * sizeof (long);

84314

-

84315

- /* Space for the mandatory parm save area and general registers. */

84316

- bytes += 2 * NUM_GPR_ARG_REGISTERS64 * sizeof (long);

84317

- }

84318

-

84319

- /* Return value handling. The rules for SYSV are as follows:

84320

- - 32-bit (or less) integer values are returned in gpr3;

84321

- - Structures of size <= 4 bytes also returned in gpr3;

84322

- - 64-bit integer values and structures between 5 and 8 bytes are returned

84323

- in gpr3 and gpr4;

84324

- - Single/double FP values are returned in fpr1;

84325

- - Larger structures are allocated space and a pointer is passed as

84326

- the first argument.

84327

- - long doubles (if not equivalent to double) are returned in

84328

- fpr1,fpr2 for Linux and as for large structs for SysV.

84329

- For LINUX64:

84330

- - integer values in gpr3;

84331

- - Structures/Unions by reference;

84332

- - Single/double FP values in fpr1, long double in fpr1,fpr2.

84333

- - soft-float float/doubles are treated as UINT32/UINT64 respectivley.

84334

- - soft-float long doubles are returned in gpr3-gpr6. */

84335

- /* First translate for softfloat/nonlinux */

84336

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

84337

- if (type == FFI_TYPE_FLOAT)

84338

- type = FFI_TYPE_UINT32;

84339

- if (type == FFI_TYPE_DOUBLE)

84340

- type = FFI_TYPE_UINT64;

84341

- if (type == FFI_TYPE_LONGDOUBLE)

84342

- type = FFI_TYPE_UINT128;

84343

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

84344

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84345

- if (type == FFI_TYPE_LONGDOUBLE)

84346

- type = FFI_TYPE_STRUCT;

84347

+#ifdef POWERPC64

84348

+ return ffi_prep_cif_linux64 (cif);

84349

+#else

84350

+ return ffi_prep_cif_sysv (cif);

84351

#endif

84352

- }

84353

+}

84354

84355

- switch (type)

84356

- {

84357

-#ifndef __NO_FPRS__

84358

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84359

- case FFI_TYPE_LONGDOUBLE:

84360

- flags |= FLAG_RETURNS_128BITS;

84361

- /* Fall through. */

84362

+ffi_status FFI_HIDDEN

84363

+ffi_prep_cif_machdep_var (ffi_cif *cif,

84364

+ unsigned int nfixedargs MAYBE_UNUSED,

84365

+ unsigned int ntotalargs MAYBE_UNUSED)

84366

+{

84367

+#ifdef POWERPC64

84368

+ return ffi_prep_cif_linux64_var (cif, nfixedargs, ntotalargs);

84369

+#else

84370

+ return ffi_prep_cif_sysv (cif);

84371

#endif

84372

- case FFI_TYPE_DOUBLE:

84373

- flags |= FLAG_RETURNS_64BITS;

84374

- /* Fall through. */

84375

- case FFI_TYPE_FLOAT:

84376

- flags |= FLAG_RETURNS_FP;

84377

- break;

84378

-#endif

84379

-

84380

- case FFI_TYPE_UINT128:

84381

- flags |= FLAG_RETURNS_128BITS;

84382

- /* Fall through. */

84383

- case FFI_TYPE_UINT64:

84384

- case FFI_TYPE_SINT64:

84385

- flags |= FLAG_RETURNS_64BITS;

84386

- break;

84387

-

84388

- case FFI_TYPE_STRUCT:

84389

- /*

84390

- * The final SYSV ABI says that structures smaller or equal 8 bytes

84391

- * are returned in r3/r4. The FFI_GCC_SYSV ABI instead returns them

84392

- * in memory.

84393

- *

84394

- * NOTE: The assembly code can safely assume that it just needs to

84395

- * store both r3 and r4 into a 8-byte word-aligned buffer, as

84396

- * we allocate a temporary buffer in ffi_call() if this flag is

84397

- * set.

84398

- */

84399

- if (cif->abi == FFI_SYSV && size <= 8)

84400

- flags |= FLAG_RETURNS_SMST;

84401

- intarg_count++;

84402

- flags |= FLAG_RETVAL_REFERENCE;

84403

- /* Fall through. */

84404

- case FFI_TYPE_VOID:

84405

- flags |= FLAG_RETURNS_NOTHING;

84406

- break;

84407

-

84408

- default:

84409

- /* Returns 32-bit integer, or similar. Nothing to do here. */

84410

- break;

84411

- }

84412

-

84413

- if (cif->abi != FFI_LINUX64)

84414

- /* The first NUM_GPR_ARG_REGISTERS words of integer arguments, and the

84415

- first NUM_FPR_ARG_REGISTERS fp arguments, go in registers; the rest

84416

- goes on the stack. Structures and long doubles (if not equivalent

84417

- to double) are passed as a pointer to a copy of the structure.

84418

- Stuff on the stack needs to keep proper alignment. */

84419

- for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

84420

- {

84421

- unsigned short typenum = (*ptr)->type;

84422

-

84423

- /* We may need to handle some values depending on ABI */

84424

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

84425

- if (typenum == FFI_TYPE_FLOAT)

84426

- typenum = FFI_TYPE_UINT32;

84427

- if (typenum == FFI_TYPE_DOUBLE)

84428

- typenum = FFI_TYPE_UINT64;

84429

- if (typenum == FFI_TYPE_LONGDOUBLE)

84430

- typenum = FFI_TYPE_UINT128;

84431

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

84432

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84433

- if (typenum == FFI_TYPE_LONGDOUBLE)

84434

- typenum = FFI_TYPE_STRUCT;

84435

-#endif

84436

- }

84437

-

84438

- switch (typenum) {

84439

-#ifndef __NO_FPRS__

84440

- case FFI_TYPE_FLOAT:

84441

- fparg_count++;

84442

- /* floating singles are not 8-aligned on stack */

84443

- break;

84444

-

84445

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84446

- case FFI_TYPE_LONGDOUBLE:

84447

- fparg_count++;

84448

- /* Fall thru */

84449

-#endif

84450

- case FFI_TYPE_DOUBLE:

84451

- fparg_count++;

84452

- /* If this FP arg is going on the stack, it must be

84453

- 8-byte-aligned. */

84454

- if (fparg_count > NUM_FPR_ARG_REGISTERS

84455

- && intarg_count >= NUM_GPR_ARG_REGISTERS

84456

- && intarg_count % 2 != 0)

84457

- intarg_count++;

84458

- break;

84459

-#endif

84460

- case FFI_TYPE_UINT128:

84461

- /*

84462

- * A long double in FFI_LINUX_SOFT_FLOAT can use only a set

84463

- * of four consecutive gprs. If we do not have enough, we

84464

- * have to adjust the intarg_count value.

84465

- */

84466

- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3

84467

- && intarg_count < NUM_GPR_ARG_REGISTERS)

84468

- intarg_count = NUM_GPR_ARG_REGISTERS;

84469

- intarg_count += 4;

84470

- break;

84471

-

84472

- case FFI_TYPE_UINT64:

84473

- case FFI_TYPE_SINT64:

84474

- /* 'long long' arguments are passed as two words, but

84475

- either both words must fit in registers or both go

84476

- on the stack. If they go on the stack, they must

84477

- be 8-byte-aligned.

84478

-

84479

- Also, only certain register pairs can be used for

84480

- passing long long int -- specifically (r3,r4), (r5,r6),

84481

- (r7,r8), (r9,r10).

84482

- */

84483

- if (intarg_count == NUM_GPR_ARG_REGISTERS-1

84484

- || intarg_count % 2 != 0)

84485

- intarg_count++;

84486

- intarg_count += 2;

84487

- break;

84488

-

84489

- case FFI_TYPE_STRUCT:

84490

- /* We must allocate space for a copy of these to enforce

84491

- pass-by-value. Pad the space up to a multiple of 16

84492

- bytes (the maximum alignment required for anything under

84493

- the SYSV ABI). */

84494

- struct_copy_size += ((*ptr)->size + 15) & ~0xF;

84495

- /* Fall through (allocate space for the pointer). */

84496

-

84497

- case FFI_TYPE_POINTER:

84498

- case FFI_TYPE_INT:

84499

- case FFI_TYPE_UINT32:

84500

- case FFI_TYPE_SINT32:

84501

- case FFI_TYPE_UINT16:

84502

- case FFI_TYPE_SINT16:

84503

- case FFI_TYPE_UINT8:

84504

- case FFI_TYPE_SINT8:

84505

- /* Everything else is passed as a 4-byte word in a GPR, either

84506

- the object itself or a pointer to it. */

84507

- intarg_count++;

84508

- break;

84509

- default:

84510

- FFI_ASSERT (0);

84511

- }

84512

- }

84513

- else

84514

- for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

84515

- {

84516

- switch ((*ptr)->type)

84517

- {

84518

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84519

- case FFI_TYPE_LONGDOUBLE:

84520

- if (cif->abi == FFI_LINUX_SOFT_FLOAT)

84521

- intarg_count += 4;

84522

- else

84523

- {

84524

- fparg_count += 2;

84525

- intarg_count += 2;

84526

- }

84527

- break;

84528

-#endif

84529

- case FFI_TYPE_FLOAT:

84530

- case FFI_TYPE_DOUBLE:

84531

- fparg_count++;

84532

- intarg_count++;

84533

- break;

84534

-

84535

- case FFI_TYPE_STRUCT:

84536

- intarg_count += ((*ptr)->size + 7) / 8;

84537

- break;

84538

-

84539

- case FFI_TYPE_POINTER:

84540

- case FFI_TYPE_UINT64:

84541

- case FFI_TYPE_SINT64:

84542

- case FFI_TYPE_INT:

84543

- case FFI_TYPE_UINT32:

84544

- case FFI_TYPE_SINT32:

84545

- case FFI_TYPE_UINT16:

84546

- case FFI_TYPE_SINT16:

84547

- case FFI_TYPE_UINT8:

84548

- case FFI_TYPE_SINT8:

84549

- /* Everything else is passed as a 8-byte word in a GPR, either

84550

- the object itself or a pointer to it. */

84551

- intarg_count++;

84552

- break;

84553

- default:

84554

- FFI_ASSERT (0);

84555

- }

84556

- }

84557

-

84558

-#ifndef __NO_FPRS__

84559

- if (fparg_count != 0)

84560

- flags |= FLAG_FP_ARGUMENTS;

84561

-#endif

84562

- if (intarg_count > 4)

84563

- flags |= FLAG_4_GPR_ARGUMENTS;

84564

- if (struct_copy_size != 0)

84565

- flags |= FLAG_ARG_NEEDS_COPY;

84566

-

84567

- if (cif->abi != FFI_LINUX64)

84568

- {

84569

-#ifndef __NO_FPRS__

84570

- /* Space for the FPR registers, if needed. */

84571

- if (fparg_count != 0)

84572

- bytes += NUM_FPR_ARG_REGISTERS * sizeof (double);

84573

-#endif

84574

-

84575

- /* Stack space. */

84576

- if (intarg_count > NUM_GPR_ARG_REGISTERS)

84577

- bytes += (intarg_count - NUM_GPR_ARG_REGISTERS) * sizeof (int);

84578

-#ifndef __NO_FPRS__

84579

- if (fparg_count > NUM_FPR_ARG_REGISTERS)

84580

- bytes += (fparg_count - NUM_FPR_ARG_REGISTERS) * sizeof (double);

84581

-#endif

84582

- }

84583

- else

84584

- {

84585

-#ifndef __NO_FPRS__

84586

- /* Space for the FPR registers, if needed. */

84587

- if (fparg_count != 0)

84588

- bytes += NUM_FPR_ARG_REGISTERS64 * sizeof (double);

84589

-#endif

84590

-

84591

- /* Stack space. */

84592

- if (intarg_count > NUM_GPR_ARG_REGISTERS64)

84593

- bytes += (intarg_count - NUM_GPR_ARG_REGISTERS64) * sizeof (long);

84594

- }

84595

-

84596

- /* The stack space allocated needs to be a multiple of 16 bytes. */

84597

- bytes = (bytes + 15) & ~0xF;

84598

-

84599

- /* Add in the space for the copied structures. */

84600

- bytes += struct_copy_size;

84601

-

84602

- cif->flags = flags;

84603

- cif->bytes = bytes;

84604

-

84605

- return FFI_OK;

84606

}

84607

84608

-extern void ffi_call_SYSV(extended_cif *, unsigned, unsigned, unsigned *,

84609

- void (*fn)(void));

84610

-extern void FFI_HIDDEN ffi_call_LINUX64(extended_cif *, unsigned long,

84611

- unsigned long, unsigned long *,

84612

- void (*fn)(void));

84613

-

84614

void

84615

ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue)

84616

{

84617

- /*

84618

- * The final SYSV ABI says that structures smaller or equal 8 bytes

84619

- * are returned in r3/r4. The FFI_GCC_SYSV ABI instead returns them

84620

- * in memory.

84621

- *

84622

- * Just to keep things simple for the assembly code, we will always

84623

- * bounce-buffer struct return values less than or equal to 8 bytes.

84624

- * This allows the ASM to handle SYSV small structures by directly

84625

- * writing r3 and r4 to memory without worrying about struct size.

84626

- */

84627

- unsigned int smst_buffer[2];

84628

+ /* The final SYSV ABI says that structures smaller or equal 8 bytes

84629

+ are returned in r3/r4. A draft ABI used by linux instead returns

84630

+ them in memory.

84631

+

84632

+ We bounce-buffer SYSV small struct return values so that sysv.S

84633

+ can write r3 and r4 to memory without worrying about struct size.

84634

+

84635

+ For ELFv2 ABI, use a bounce buffer for homogeneous structs too,

84636

+ for similar reasons. */

84637

+ unsigned long smst_buffer[8];

84638

extended_cif ecif;

84639

- unsigned int rsize = 0;

84640

84641

ecif.cif = cif;

84642

ecif.avalue = avalue;

84643

84644

- /* Ensure that we have a valid struct return value */

84645

ecif.rvalue = rvalue;

84646

- if (cif->rtype->type == FFI_TYPE_STRUCT) {

84647

- rsize = cif->rtype->size;

84648

- if (rsize <= 8)

84649

- ecif.rvalue = smst_buffer;

84650

- else if (!rvalue)

84651

- ecif.rvalue = alloca(rsize);

84652

- }

84653

+ if ((cif->flags & FLAG_RETURNS_SMST) != 0)

84654

+ ecif.rvalue = smst_buffer;

84655

+ /* Ensure that we have a valid struct return value.

84656

+ FIXME: Isn't this just papering over a user problem? */

84657

+ else if (!rvalue && cif->rtype->type == FFI_TYPE_STRUCT)

84658

+ ecif.rvalue = alloca (cif->rtype->size);

84659

84660

- switch (cif->abi)

84661

- {

84662

-#ifndef POWERPC64

84663

-# ifndef __NO_FPRS__

84664

- case FFI_SYSV:

84665

- case FFI_GCC_SYSV:

84666

- case FFI_LINUX:

84667

-# endif

84668

- case FFI_LINUX_SOFT_FLOAT:

84669

- ffi_call_SYSV (&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn);

84670

- break;

84671

+#ifdef POWERPC64

84672

+ ffi_call_LINUX64 (&ecif, -(long) cif->bytes, cif->flags, ecif.rvalue, fn);

84673

#else

84674

- case FFI_LINUX64:

84675

- ffi_call_LINUX64 (&ecif, -(long) cif->bytes, cif->flags, ecif.rvalue, fn);

84676

- break;

84677

+ ffi_call_SYSV (&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn);

84678

#endif

84679

- default:

84680

- FFI_ASSERT (0);

84681

- break;

84682

- }

84683

84684

/* Check for a bounce-buffered return value */

84685

if (rvalue && ecif.rvalue == smst_buffer)

84686

- memcpy(rvalue, smst_buffer, rsize);

84687

+ {

84688

+ unsigned int rsize = cif->rtype->size;

84689

+#ifndef __LITTLE_ENDIAN__

84690

+ /* The SYSV ABI returns a structure of up to 4 bytes in size

84691

+ left-padded in r3. */

84692

+# ifndef POWERPC64

84693

+ if (rsize <= 4)

84694

+ memcpy (rvalue, (char *) smst_buffer + 4 - rsize, rsize);

84695

+ else

84696

+# endif

84697

+ /* The SYSV ABI returns a structure of up to 8 bytes in size

84698

+ left-padded in r3/r4, and the ELFv2 ABI similarly returns a

84699

+ structure of up to 8 bytes in size left-padded in r3. */

84700

+ if (rsize <= 8)

84701

+ memcpy (rvalue, (char *) smst_buffer + 8 - rsize, rsize);

84702

+ else

84703

+#endif

84704

+ memcpy (rvalue, smst_buffer, rsize);

84705

+ }

84706

}

84707

84708

84709

-#ifndef POWERPC64

84710

-#define MIN_CACHE_LINE_SIZE 8

84711

-

84712

-static void

84713

-flush_icache (char *wraddr, char *xaddr, int size)

84714

-{

84715

- int i;

84716

- for (i = 0; i < size; i += MIN_CACHE_LINE_SIZE)

84717

- __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;"

84718

- : : "r" (xaddr + i), "r" (wraddr + i) : "memory");

84719

- __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;" "sync;" "isync;"

84720

- : : "r"(xaddr + size - 1), "r"(wraddr + size - 1)

84721

- : "memory");

84722

-}

84723

-#endif

84724

-

84725

ffi_status

84726

ffi_prep_closure_loc (ffi_closure *closure,

84727

ffi_cif *cif,

84728

@@ -995,487 +134,8 @@

84729

void *codeloc)

84730

{

84731

#ifdef POWERPC64

84732

- void **tramp = (void **) &closure->tramp[0];

84733

-

84734

- if (cif->abi != FFI_LINUX64)

84735

- return FFI_BAD_ABI;

84736

- /* Copy function address and TOC from ffi_closure_LINUX64. */

84737

- memcpy (tramp, (char *) ffi_closure_LINUX64, 16);

84738

- tramp[2] = codeloc;

84739

+ return ffi_prep_closure_loc_linux64 (closure, cif, fun, user_data, codeloc);

84740

#else

84741

- unsigned int *tramp;

84742

-

84743

- if (! (cif->abi == FFI_GCC_SYSV

84744

- || cif->abi == FFI_SYSV

84745

- || cif->abi == FFI_LINUX

84746

- || cif->abi == FFI_LINUX_SOFT_FLOAT))

84747

- return FFI_BAD_ABI;

84748

-

84749

- tramp = (unsigned int *) &closure->tramp[0];

84750

- tramp[0] = 0x7c0802a6; /* mflr r0 */

84751

- tramp[1] = 0x4800000d; /* bl 10 <trampoline_initial+0x10> */

84752

- tramp[4] = 0x7d6802a6; /* mflr r11 */

84753

- tramp[5] = 0x7c0803a6; /* mtlr r0 */

84754

- tramp[6] = 0x800b0000; /* lwz r0,0(r11) */

84755

- tramp[7] = 0x816b0004; /* lwz r11,4(r11) */

84756

- tramp[8] = 0x7c0903a6; /* mtctr r0 */

84757

- tramp[9] = 0x4e800420; /* bctr */

84758

- *(void **) &tramp[2] = (void *) ffi_closure_SYSV; /* function */

84759

- *(void **) &tramp[3] = codeloc; /* context */

84760

-

84761

- /* Flush the icache. */

84762

- flush_icache ((char *)tramp, (char *)codeloc, FFI_TRAMPOLINE_SIZE);

84763

+ return ffi_prep_closure_loc_sysv (closure, cif, fun, user_data, codeloc);

84764

#endif

84765

-

84766

- closure->cif = cif;

84767

- closure->fun = fun;

84768

- closure->user_data = user_data;

84769

-

84770

- return FFI_OK;

84771

}

84772

-

84773

-typedef union

84774

-{

84775

- float f;

84776

- double d;

84777

-} ffi_dblfl;

84778

-

84779

-int ffi_closure_helper_SYSV (ffi_closure *, void *, unsigned long *,

84780

- ffi_dblfl *, unsigned long *);

84781

-

84782

-/* Basically the trampoline invokes ffi_closure_SYSV, and on

84783

- * entry, r11 holds the address of the closure.

84784

- * After storing the registers that could possibly contain

84785

- * parameters to be passed into the stack frame and setting

84786

- * up space for a return value, ffi_closure_SYSV invokes the

84787

- * following helper function to do most of the work

84788

- */

84789

-

84790

-int

84791

-ffi_closure_helper_SYSV (ffi_closure *closure, void *rvalue,

84792

- unsigned long *pgr, ffi_dblfl *pfr,

84793

- unsigned long *pst)

84794

-{

84795

- /* rvalue is the pointer to space for return value in closure assembly */

84796

- /* pgr is the pointer to where r3-r10 are stored in ffi_closure_SYSV */

84797

- /* pfr is the pointer to where f1-f8 are stored in ffi_closure_SYSV */

84798

- /* pst is the pointer to outgoing parameter stack in original caller */

84799

-

84800

- void ** avalue;

84801

- ffi_type ** arg_types;

84802

- long i, avn;

84803

-#ifndef __NO_FPRS__

84804

- long nf = 0; /* number of floating registers already used */

84805

-#endif

84806

- long ng = 0; /* number of general registers already used */

84807

-

84808

- ffi_cif *cif = closure->cif;

84809

- unsigned size = cif->rtype->size;

84810

- unsigned short rtypenum = cif->rtype->type;

84811

-

84812

- avalue = alloca (cif->nargs * sizeof (void *));

84813

-

84814

- /* First translate for softfloat/nonlinux */

84815

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

84816

- if (rtypenum == FFI_TYPE_FLOAT)

84817

- rtypenum = FFI_TYPE_UINT32;

84818

- if (rtypenum == FFI_TYPE_DOUBLE)

84819

- rtypenum = FFI_TYPE_UINT64;

84820

- if (rtypenum == FFI_TYPE_LONGDOUBLE)

84821

- rtypenum = FFI_TYPE_UINT128;

84822

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

84823

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84824

- if (rtypenum == FFI_TYPE_LONGDOUBLE)

84825

- rtypenum = FFI_TYPE_STRUCT;

84826

-#endif

84827

- }

84828

-

84829

-

84830

- /* Copy the caller's structure return value address so that the closure

84831

- returns the data directly to the caller.

84832

- For FFI_SYSV the result is passed in r3/r4 if the struct size is less

84833

- or equal 8 bytes. */

84834

- if (rtypenum == FFI_TYPE_STRUCT && ((cif->abi != FFI_SYSV) || (size > 8))) {

84835

- rvalue = (void *) *pgr;

84836

- ng++;

84837

- pgr++;

84838

- }

84839

-

84840

- i = 0;

84841

- avn = cif->nargs;

84842

- arg_types = cif->arg_types;

84843

-

84844

- /* Grab the addresses of the arguments from the stack frame. */

84845

- while (i < avn) {

84846

- unsigned short typenum = arg_types[i]->type;

84847

-

84848

- /* We may need to handle some values depending on ABI */

84849

- if (cif->abi == FFI_LINUX_SOFT_FLOAT) {

84850

- if (typenum == FFI_TYPE_FLOAT)

84851

- typenum = FFI_TYPE_UINT32;

84852

- if (typenum == FFI_TYPE_DOUBLE)

84853

- typenum = FFI_TYPE_UINT64;

84854

- if (typenum == FFI_TYPE_LONGDOUBLE)

84855

- typenum = FFI_TYPE_UINT128;

84856

- } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) {

84857

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84858

- if (typenum == FFI_TYPE_LONGDOUBLE)

84859

- typenum = FFI_TYPE_STRUCT;

84860

-#endif

84861

- }

84862

-

84863

- switch (typenum) {

84864

-#ifndef __NO_FPRS__

84865

- case FFI_TYPE_FLOAT:

84866

- /* unfortunately float values are stored as doubles

84867

- * in the ffi_closure_SYSV code (since we don't check

84868

- * the type in that routine).

84869

- */

84870

-

84871

- /* there are 8 64bit floating point registers */

84872

-

84873

- if (nf < 8)

84874

- {

84875

- double temp = pfr->d;

84876

- pfr->f = (float) temp;

84877

- avalue[i] = pfr;

84878

- nf++;

84879

- pfr++;

84880

- }

84881

- else

84882

- {

84883

- /* FIXME? here we are really changing the values

84884

- * stored in the original calling routines outgoing

84885

- * parameter stack. This is probably a really

84886

- * naughty thing to do but...

84887

- */

84888

- avalue[i] = pst;

84889

- pst += 1;

84890

- }

84891

- break;

84892

-

84893

- case FFI_TYPE_DOUBLE:

84894

- /* On the outgoing stack all values are aligned to 8 */

84895

- /* there are 8 64bit floating point registers */

84896

-

84897

- if (nf < 8)

84898

- {

84899

- avalue[i] = pfr;

84900

- nf++;

84901

- pfr++;

84902

- }

84903

- else

84904

- {

84905

- if (((long) pst) & 4)

84906

- pst++;

84907

- avalue[i] = pst;

84908

- pst += 2;

84909

- }

84910

- break;

84911

-

84912

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

84913

- case FFI_TYPE_LONGDOUBLE:

84914

- if (nf < 7)

84915

- {

84916

- avalue[i] = pfr;

84917

- pfr += 2;

84918

- nf += 2;

84919

- }

84920

- else

84921

- {

84922

- if (((long) pst) & 4)

84923

- pst++;

84924

- avalue[i] = pst;

84925

- pst += 4;

84926

- nf = 8;

84927

- }

84928

- break;

84929

-#endif

84930

-#endif /* have FPRS */

84931

-

84932

- case FFI_TYPE_UINT128:

84933

- /*

84934

- * Test if for the whole long double, 4 gprs are available.

84935

- * otherwise the stuff ends up on the stack.

84936

- */

84937

- if (ng < 5) {

84938

- avalue[i] = pgr;

84939

- pgr += 4;

84940

- ng += 4;

84941

- } else {

84942

- avalue[i] = pst;

84943

- pst += 4;

84944

- ng = 8+4;

84945

- }

84946

- break;

84947

-

84948

- case FFI_TYPE_SINT8:

84949

- case FFI_TYPE_UINT8:

84950

-#ifndef __LITTLE_ENDIAN__

84951

- /* there are 8 gpr registers used to pass values */

84952

- if (ng < 8)

84953

- {

84954

- avalue[i] = (char *) pgr + 3;

84955

- ng++;

84956

- pgr++;

84957

- }

84958

- else

84959

- {

84960

- avalue[i] = (char *) pst + 3;

84961

- pst++;

84962

- }

84963

- break;

84964

-#endif

84965

- case FFI_TYPE_SINT16:

84966

- case FFI_TYPE_UINT16:

84967

-#ifndef __LITTLE_ENDIAN__

84968

- /* there are 8 gpr registers used to pass values */

84969

- if (ng < 8)

84970

- {

84971

- avalue[i] = (char *) pgr + 2;

84972

- ng++;

84973

- pgr++;

84974

- }

84975

- else

84976

- {

84977

- avalue[i] = (char *) pst + 2;

84978

- pst++;

84979

- }

84980

- break;

84981

-#endif

84982

- case FFI_TYPE_SINT32:

84983

- case FFI_TYPE_UINT32:

84984

- case FFI_TYPE_POINTER:

84985

- /* there are 8 gpr registers used to pass values */

84986

- if (ng < 8)

84987

- {

84988

- avalue[i] = pgr;

84989

- ng++;

84990

- pgr++;

84991

- }

84992

- else

84993

- {

84994

- avalue[i] = pst;

84995

- pst++;

84996

- }

84997

- break;

84998

-

84999

- case FFI_TYPE_STRUCT:

85000

- /* Structs are passed by reference. The address will appear in a

85001

- gpr if it is one of the first 8 arguments. */

85002

- if (ng < 8)

85003

- {

85004

- avalue[i] = (void *) *pgr;

85005

- ng++;

85006

- pgr++;

85007

- }

85008

- else

85009

- {

85010

- avalue[i] = (void *) *pst;

85011

- pst++;

85012

- }

85013

- break;

85014

-

85015

- case FFI_TYPE_SINT64:

85016

- case FFI_TYPE_UINT64:

85017

- /* passing long long ints are complex, they must

85018

- * be passed in suitable register pairs such as

85019

- * (r3,r4) or (r5,r6) or (r6,r7), or (r7,r8) or (r9,r10)

85020

- * and if the entire pair aren't available then the outgoing

85021

- * parameter stack is used for both but an alignment of 8

85022

- * must will be kept. So we must either look in pgr

85023

- * or pst to find the correct address for this type

85024

- * of parameter.

85025

- */

85026

- if (ng < 7)

85027

- {

85028

- if (ng & 0x01)

85029

- {

85030

- /* skip r4, r6, r8 as starting points */

85031

- ng++;

85032

- pgr++;

85033

- }

85034

- avalue[i] = pgr;

85035

- ng += 2;

85036

- pgr += 2;

85037

- }

85038

- else

85039

- {

85040

- if (((long) pst) & 4)

85041

- pst++;

85042

- avalue[i] = pst;

85043

- pst += 2;

85044

- ng = 8;

85045

- }

85046

- break;

85047

-

85048

- default:

85049

- FFI_ASSERT (0);

85050

- }

85051

-

85052

- i++;

85053

- }

85054

-

85055

-

85056

- (closure->fun) (cif, rvalue, avalue, closure->user_data);

85057

-

85058

- /* Tell ffi_closure_SYSV how to perform return type promotions.

85059

- Because the FFI_SYSV ABI returns the structures <= 8 bytes in r3/r4

85060

- we have to tell ffi_closure_SYSV how to treat them. We combine the base

85061

- type FFI_SYSV_TYPE_SMALL_STRUCT - 1 with the size of the struct.

85062

- So a one byte struct gets the return type 16. Return type 1 to 15 are

85063

- already used and we never have a struct with size zero. That is the reason

85064

- for the subtraction of 1. See the comment in ffitarget.h about ordering.

85065

- */

85066

- if (cif->abi == FFI_SYSV && rtypenum == FFI_TYPE_STRUCT && size <= 8)

85067

- return (FFI_SYSV_TYPE_SMALL_STRUCT - 1) + size;

85068

- return rtypenum;

85069

-}

85070

-

85071

-int FFI_HIDDEN ffi_closure_helper_LINUX64 (ffi_closure *, void *,

85072

- unsigned long *, ffi_dblfl *);

85073

-

85074

-int FFI_HIDDEN

85075

-ffi_closure_helper_LINUX64 (ffi_closure *closure, void *rvalue,

85076

- unsigned long *pst, ffi_dblfl *pfr)

85077

-{

85078

- /* rvalue is the pointer to space for return value in closure assembly */

85079

- /* pst is the pointer to parameter save area

85080

- (r3-r10 are stored into its first 8 slots by ffi_closure_LINUX64) */

85081

- /* pfr is the pointer to where f1-f13 are stored in ffi_closure_LINUX64 */

85082

-

85083

- void **avalue;

85084

- ffi_type **arg_types;

85085

- long i, avn;

85086

- ffi_cif *cif;

85087

- ffi_dblfl *end_pfr = pfr + NUM_FPR_ARG_REGISTERS64;

85088

-

85089

- cif = closure->cif;

85090

- avalue = alloca (cif->nargs * sizeof (void *));

85091

-

85092

- /* Copy the caller's structure return value address so that the closure

85093

- returns the data directly to the caller. */

85094

- if (cif->rtype->type == FFI_TYPE_STRUCT)

85095

- {

85096

- rvalue = (void *) *pst;

85097

- pst++;

85098

- }

85099

-

85100

- i = 0;

85101

- avn = cif->nargs;

85102

- arg_types = cif->arg_types;

85103

-

85104

- /* Grab the addresses of the arguments from the stack frame. */

85105

- while (i < avn)

85106

- {

85107

- switch (arg_types[i]->type)

85108

- {

85109

- case FFI_TYPE_SINT8:

85110

- case FFI_TYPE_UINT8:

85111

-#ifndef __LITTLE_ENDIAN__

85112

- avalue[i] = (char *) pst + 7;

85113

- pst++;

85114

- break;

85115

-#endif

85116

- case FFI_TYPE_SINT16:

85117

- case FFI_TYPE_UINT16:

85118

-#ifndef __LITTLE_ENDIAN__

85119

- avalue[i] = (char *) pst + 6;

85120

- pst++;

85121

- break;

85122

-#endif

85123

- case FFI_TYPE_SINT32:

85124

- case FFI_TYPE_UINT32:

85125

-#ifndef __LITTLE_ENDIAN__

85126

- avalue[i] = (char *) pst + 4;

85127

- pst++;

85128

- break;

85129

-#endif

85130

- case FFI_TYPE_SINT64:

85131

- case FFI_TYPE_UINT64:

85132

- case FFI_TYPE_POINTER:

85133

- avalue[i] = pst;

85134

- pst++;

85135

- break;

85136

-

85137

- case FFI_TYPE_STRUCT:

85138

-#ifndef __LITTLE_ENDIAN__

85139

- /* Structures with size less than eight bytes are passed

85140

- left-padded. */

85141

- if (arg_types[i]->size < 8)

85142

- avalue[i] = (char *) pst + 8 - arg_types[i]->size;

85143

- else

85144

-#endif

85145

- avalue[i] = pst;

85146

- pst += (arg_types[i]->size + 7) / 8;

85147

- break;

85148

-

85149

- case FFI_TYPE_FLOAT:

85150

- /* unfortunately float values are stored as doubles

85151

- * in the ffi_closure_LINUX64 code (since we don't check

85152

- * the type in that routine).

85153

- */

85154

-

85155

- /* there are 13 64bit floating point registers */

85156

-

85157

- if (pfr < end_pfr)

85158

- {

85159

- double temp = pfr->d;

85160

- pfr->f = (float) temp;

85161

- avalue[i] = pfr;

85162

- pfr++;

85163

- }

85164

- else

85165

- avalue[i] = pst;

85166

- pst++;

85167

- break;

85168

-

85169

- case FFI_TYPE_DOUBLE:

85170

- /* On the outgoing stack all values are aligned to 8 */

85171

- /* there are 13 64bit floating point registers */

85172

-

85173

- if (pfr < end_pfr)

85174

- {

85175

- avalue[i] = pfr;

85176

- pfr++;

85177

- }

85178

- else

85179

- avalue[i] = pst;

85180

- pst++;

85181

- break;

85182

-

85183

-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

85184

- case FFI_TYPE_LONGDOUBLE:

85185

- if (pfr + 1 < end_pfr)

85186

- {

85187

- avalue[i] = pfr;

85188

- pfr += 2;

85189

- }

85190

- else

85191

- {

85192

- if (pfr < end_pfr)

85193

- {

85194

- /* Passed partly in f13 and partly on the stack.

85195

- Move it all to the stack. */

85196

- *pst = *(unsigned long *) pfr;

85197

- pfr++;

85198

- }

85199

- avalue[i] = pst;

85200

- }

85201

- pst += 2;

85202

- break;

85203

-#endif

85204

-

85205

- default:

85206

- FFI_ASSERT (0);

85207

- }

85208

-

85209

- i++;

85210

- }

85211

-

85212

-

85213

- (closure->fun) (cif, rvalue, avalue, closure->user_data);

85214

-

85215

- /* Tell ffi_closure_LINUX64 how to perform return type promotions. */

85216

- return cif->rtype->type;

85217

-}

85218

Index: libffi/src/powerpc/sysv.S

85219

===================================================================

85220

--- a/src/libffi/src/powerpc/sysv.S (.../tags/gcc_4_8_2_release)

85221

+++ b/src/libffi/src/powerpc/sysv.S (.../branches/gcc-4_8-branch)

85222

@@ -30,7 +30,7 @@

85223

#include <ffi.h>

85224

#include <powerpc/asm.h>

85225

85226

-#ifndef __powerpc64__

85227

+#ifndef POWERPC64

85228

.globl ffi_prep_args_SYSV

85229

ENTRY(ffi_call_SYSV)

85230

.LFB1:

85231

@@ -213,8 +213,8 @@

85232

.uleb128 0x1c

85233

.align 2

85234

.LEFDE1:

85235

-#endif

85236

85237

#if defined __ELF__ && defined __linux__

85238

.section .note.GNU-stack,"",@progbits

85239

#endif

85240

+#endif

85241

Index: libffi/src/powerpc/linux64_closure.S

85242

===================================================================

85243

--- a/src/libffi/src/powerpc/linux64_closure.S (.../tags/gcc_4_8_2_release)

85244

+++ b/src/libffi/src/powerpc/linux64_closure.S (.../branches/gcc-4_8-branch)

85245

@@ -30,18 +30,25 @@

85246

85247

.file "linux64_closure.S"

85248

85249

-#ifdef __powerpc64__

85250

+#ifdef POWERPC64

85251

FFI_HIDDEN (ffi_closure_LINUX64)

85252

.globl ffi_closure_LINUX64

85253

+# if _CALL_ELF == 2

85254

+ .text

85255

+ffi_closure_LINUX64:

85256

+ addis %r2, %r12, .TOC.-ffi_closure_LINUX64@ha

85257

+ addi %r2, %r2, .TOC.-ffi_closure_LINUX64@l

85258

+ .localentry ffi_closure_LINUX64, . - ffi_closure_LINUX64

85259

+# else

85260

.section ".opd","aw"

85261

.align 3

85262

ffi_closure_LINUX64:

85263

-#ifdef _CALL_LINUX

85264

+# ifdef _CALL_LINUX

85265

.quad .L.ffi_closure_LINUX64,.TOC.@tocbase,0

85266

.type ffi_closure_LINUX64,@function

85267

.text

85268

.L.ffi_closure_LINUX64:

85269

-#else

85270

+# else

85271

FFI_HIDDEN (.ffi_closure_LINUX64)

85272

.globl .ffi_closure_LINUX64

85273

.quad .ffi_closure_LINUX64,.TOC.@tocbase,0

85274

@@ -49,61 +56,101 @@

85275

.type .ffi_closure_LINUX64,@function

85276

.text

85277

.ffi_closure_LINUX64:

85278

-#endif

85279

+# endif

85280

+# endif

85281

+

85282

+# if _CALL_ELF == 2

85283

+# 32 byte special reg save area + 64 byte parm save area

85284

+# + 64 byte retval area + 13*8 fpr save area + round to 16

85285

+# define STACKFRAME 272

85286

+# define PARMSAVE 32

85287

+# define RETVAL PARMSAVE+64

85288

+# else

85289

+# 48 bytes special reg save area + 64 bytes parm save area

85290

+# + 16 bytes retval area + 13*8 bytes fpr save area + round to 16

85291

+# define STACKFRAME 240

85292

+# define PARMSAVE 48

85293

+# define RETVAL PARMSAVE+64

85294

+# endif

85295

+

85296

.LFB1:

85297

- # save general regs into parm save area

85298

- std %r3, 48(%r1)

85299

- std %r4, 56(%r1)

85300

- std %r5, 64(%r1)

85301

- std %r6, 72(%r1)

85302

+# if _CALL_ELF == 2

85303

+ ld %r12, FFI_TRAMPOLINE_SIZE(%r11) # closure->cif

85304

mflr %r0

85305

+ lwz %r12, 28(%r12) # cif->flags

85306

+ mtcrf 0x40, %r12

85307

+ addi %r12, %r1, PARMSAVE

85308

+ bt 7, .Lparmsave

85309

+ # Our caller has not allocated a parameter save area.

85310

+ # We need to allocate one here and use it to pass gprs to

85311

+ # ffi_closure_helper_LINUX64.

85312

+ addi %r12, %r1, -STACKFRAME+PARMSAVE

85313

+.Lparmsave:

85314

+ std %r0, 16(%r1)

85315

+ # Save general regs into parm save area

85316

+ std %r3, 0(%r12)

85317

+ std %r4, 8(%r12)

85318

+ std %r5, 16(%r12)

85319

+ std %r6, 24(%r12)

85320

+ std %r7, 32(%r12)

85321

+ std %r8, 40(%r12)

85322

+ std %r9, 48(%r12)

85323

+ std %r10, 56(%r12)

85324

85325

- std %r7, 80(%r1)

85326

- std %r8, 88(%r1)

85327

- std %r9, 96(%r1)

85328

- std %r10, 104(%r1)

85329

+ # load up the pointer to the parm save area

85330

+ mr %r5, %r12

85331

+# else

85332

+ mflr %r0

85333

+ # Save general regs into parm save area

85334

+ # This is the parameter save area set up by our caller.

85335

+ std %r3, PARMSAVE+0(%r1)

85336

+ std %r4, PARMSAVE+8(%r1)

85337

+ std %r5, PARMSAVE+16(%r1)

85338

+ std %r6, PARMSAVE+24(%r1)

85339

+ std %r7, PARMSAVE+32(%r1)

85340

+ std %r8, PARMSAVE+40(%r1)

85341

+ std %r9, PARMSAVE+48(%r1)

85342

+ std %r10, PARMSAVE+56(%r1)

85343

+

85344

std %r0, 16(%r1)

85345

85346

- # mandatory 48 bytes special reg save area + 64 bytes parm save area

85347

- # + 16 bytes retval area + 13*8 bytes fpr save area + round to 16

85348

- stdu %r1, -240(%r1)

85349

-.LCFI0:

85350

+ # load up the pointer to the parm save area

85351

+ addi %r5, %r1, PARMSAVE

85352

+# endif

85353

85354

# next save fpr 1 to fpr 13

85355

- stfd %f1, 128+(0*8)(%r1)

85356

- stfd %f2, 128+(1*8)(%r1)

85357

- stfd %f3, 128+(2*8)(%r1)

85358

- stfd %f4, 128+(3*8)(%r1)

85359

- stfd %f5, 128+(4*8)(%r1)

85360

- stfd %f6, 128+(5*8)(%r1)

85361

- stfd %f7, 128+(6*8)(%r1)

85362

- stfd %f8, 128+(7*8)(%r1)

85363

- stfd %f9, 128+(8*8)(%r1)

85364

- stfd %f10, 128+(9*8)(%r1)

85365

- stfd %f11, 128+(10*8)(%r1)

85366

- stfd %f12, 128+(11*8)(%r1)

85367

- stfd %f13, 128+(12*8)(%r1)

85368

+ stfd %f1, -104+(0*8)(%r1)

85369

+ stfd %f2, -104+(1*8)(%r1)

85370

+ stfd %f3, -104+(2*8)(%r1)

85371

+ stfd %f4, -104+(3*8)(%r1)

85372

+ stfd %f5, -104+(4*8)(%r1)

85373

+ stfd %f6, -104+(5*8)(%r1)

85374

+ stfd %f7, -104+(6*8)(%r1)

85375

+ stfd %f8, -104+(7*8)(%r1)

85376

+ stfd %f9, -104+(8*8)(%r1)

85377

+ stfd %f10, -104+(9*8)(%r1)

85378

+ stfd %f11, -104+(10*8)(%r1)

85379

+ stfd %f12, -104+(11*8)(%r1)

85380

+ stfd %f13, -104+(12*8)(%r1)

85381

85382

- # set up registers for the routine that actually does the work

85383

- # get the context pointer from the trampoline

85384

- mr %r3, %r11

85385

+ # load up the pointer to the saved fpr registers */

85386

+ addi %r6, %r1, -104

85387

85388

- # now load up the pointer to the result storage

85389

- addi %r4, %r1, 112

85390

+ # load up the pointer to the result storage

85391

+ addi %r4, %r1, -STACKFRAME+RETVAL

85392

85393

- # now load up the pointer to the parameter save area

85394

- # in the previous frame

85395

- addi %r5, %r1, 240 + 48

85396

+ stdu %r1, -STACKFRAME(%r1)

85397

+.LCFI0:

85398

85399

- # now load up the pointer to the saved fpr registers */

85400

- addi %r6, %r1, 128

85401

+ # get the context pointer from the trampoline

85402

+ mr %r3, %r11

85403

85404

# make the call

85405

-#ifdef _CALL_LINUX

85406

+# if defined _CALL_LINUX || _CALL_ELF == 2

85407

bl ffi_closure_helper_LINUX64

85408

-#else

85409

+# else

85410

bl .ffi_closure_helper_LINUX64

85411

-#endif

85412

+# endif

85413

.Lret:

85414

85415

# now r3 contains the return type

85416

@@ -112,10 +159,12 @@

85417

85418

# look up the proper starting point in table

85419

# by using return type as offset

85420

+ ld %r0, STACKFRAME+16(%r1)

85421

+ cmpldi %r3, FFI_V2_TYPE_SMALL_STRUCT

85422

+ bge .Lsmall

85423

mflr %r4 # move address of .Lret to r4

85424

sldi %r3, %r3, 4 # now multiply return type by 16

85425

addi %r4, %r4, .Lret_type0 - .Lret

85426

- ld %r0, 240+16(%r1)

85427

add %r3, %r3, %r4 # add contents of table to table address

85428

mtctr %r3

85429

bctr # jump to it

85430

@@ -128,117 +177,175 @@

85431

.Lret_type0:

85432

# case FFI_TYPE_VOID

85433

mtlr %r0

85434

- addi %r1, %r1, 240

85435

+ addi %r1, %r1, STACKFRAME

85436

blr

85437

nop

85438

# case FFI_TYPE_INT

85439

-#ifdef __LITTLE_ENDIAN__

85440

- lwa %r3, 112+0(%r1)

85441

-#else

85442

- lwa %r3, 112+4(%r1)

85443

-#endif

85444

+# ifdef __LITTLE_ENDIAN__

85445

+ lwa %r3, RETVAL+0(%r1)

85446

+# else

85447

+ lwa %r3, RETVAL+4(%r1)

85448

+# endif

85449

mtlr %r0

85450

- addi %r1, %r1, 240

85451

+ addi %r1, %r1, STACKFRAME

85452

blr

85453

# case FFI_TYPE_FLOAT

85454

- lfs %f1, 112+0(%r1)

85455

+ lfs %f1, RETVAL+0(%r1)

85456

mtlr %r0

85457

- addi %r1, %r1, 240

85458

+ addi %r1, %r1, STACKFRAME

85459

blr

85460

# case FFI_TYPE_DOUBLE

85461

- lfd %f1, 112+0(%r1)

85462

+ lfd %f1, RETVAL+0(%r1)

85463

mtlr %r0

85464

- addi %r1, %r1, 240

85465

+ addi %r1, %r1, STACKFRAME

85466

blr

85467

# case FFI_TYPE_LONGDOUBLE

85468

- lfd %f1, 112+0(%r1)

85469

+ lfd %f1, RETVAL+0(%r1)

85470

mtlr %r0

85471

- lfd %f2, 112+8(%r1)

85472

+ lfd %f2, RETVAL+8(%r1)

85473

b .Lfinish

85474

# case FFI_TYPE_UINT8

85475

-#ifdef __LITTLE_ENDIAN__

85476

- lbz %r3, 112+0(%r1)

85477

-#else

85478

- lbz %r3, 112+7(%r1)

85479

-#endif

85480

+# ifdef __LITTLE_ENDIAN__

85481

+ lbz %r3, RETVAL+0(%r1)

85482

+# else

85483

+ lbz %r3, RETVAL+7(%r1)

85484

+# endif

85485

mtlr %r0

85486

- addi %r1, %r1, 240

85487

+ addi %r1, %r1, STACKFRAME

85488

blr

85489

# case FFI_TYPE_SINT8

85490

-#ifdef __LITTLE_ENDIAN__

85491

- lbz %r3, 112+0(%r1)

85492

-#else

85493

- lbz %r3, 112+7(%r1)

85494

-#endif

85495

+# ifdef __LITTLE_ENDIAN__

85496

+ lbz %r3, RETVAL+0(%r1)

85497

+# else

85498

+ lbz %r3, RETVAL+7(%r1)

85499

+# endif

85500

extsb %r3,%r3

85501

mtlr %r0

85502

b .Lfinish

85503

# case FFI_TYPE_UINT16

85504

-#ifdef __LITTLE_ENDIAN__

85505

- lhz %r3, 112+0(%r1)

85506

-#else

85507

- lhz %r3, 112+6(%r1)

85508

-#endif

85509

+# ifdef __LITTLE_ENDIAN__

85510

+ lhz %r3, RETVAL+0(%r1)

85511

+# else

85512

+ lhz %r3, RETVAL+6(%r1)

85513

+# endif

85514

mtlr %r0

85515

.Lfinish:

85516

- addi %r1, %r1, 240

85517

+ addi %r1, %r1, STACKFRAME

85518

blr

85519

# case FFI_TYPE_SINT16

85520

-#ifdef __LITTLE_ENDIAN__

85521

- lha %r3, 112+0(%r1)

85522

-#else

85523

- lha %r3, 112+6(%r1)

85524

-#endif

85525

+# ifdef __LITTLE_ENDIAN__

85526

+ lha %r3, RETVAL+0(%r1)

85527

+# else

85528

+ lha %r3, RETVAL+6(%r1)

85529

+# endif

85530

mtlr %r0

85531

- addi %r1, %r1, 240

85532

+ addi %r1, %r1, STACKFRAME

85533

blr

85534

# case FFI_TYPE_UINT32

85535

-#ifdef __LITTLE_ENDIAN__

85536

- lwz %r3, 112+0(%r1)

85537

-#else

85538

- lwz %r3, 112+4(%r1)

85539

-#endif

85540

+# ifdef __LITTLE_ENDIAN__

85541

+ lwz %r3, RETVAL+0(%r1)

85542

+# else

85543

+ lwz %r3, RETVAL+4(%r1)

85544

+# endif

85545

mtlr %r0

85546

- addi %r1, %r1, 240

85547

+ addi %r1, %r1, STACKFRAME

85548

blr

85549

# case FFI_TYPE_SINT32

85550

-#ifdef __LITTLE_ENDIAN__

85551

- lwa %r3, 112+0(%r1)

85552

-#else

85553

- lwa %r3, 112+4(%r1)

85554

-#endif

85555

+# ifdef __LITTLE_ENDIAN__

85556

+ lwa %r3, RETVAL+0(%r1)

85557

+# else

85558

+ lwa %r3, RETVAL+4(%r1)

85559

+# endif

85560

mtlr %r0

85561

- addi %r1, %r1, 240

85562

+ addi %r1, %r1, STACKFRAME

85563

blr

85564

# case FFI_TYPE_UINT64

85565

- ld %r3, 112+0(%r1)

85566

+ ld %r3, RETVAL+0(%r1)

85567

mtlr %r0

85568

- addi %r1, %r1, 240

85569

+ addi %r1, %r1, STACKFRAME

85570

blr

85571

# case FFI_TYPE_SINT64

85572

- ld %r3, 112+0(%r1)

85573

+ ld %r3, RETVAL+0(%r1)

85574

mtlr %r0

85575

- addi %r1, %r1, 240

85576

+ addi %r1, %r1, STACKFRAME

85577

blr

85578

# case FFI_TYPE_STRUCT

85579

mtlr %r0

85580

- addi %r1, %r1, 240

85581

+ addi %r1, %r1, STACKFRAME

85582

blr

85583

nop

85584

# case FFI_TYPE_POINTER

85585

- ld %r3, 112+0(%r1)

85586

+ ld %r3, RETVAL+0(%r1)

85587

mtlr %r0

85588

- addi %r1, %r1, 240

85589

+ addi %r1, %r1, STACKFRAME

85590

blr

85591

-# esac

85592

+# case FFI_V2_TYPE_FLOAT_HOMOG

85593

+ lfs %f1, RETVAL+0(%r1)

85594

+ lfs %f2, RETVAL+4(%r1)

85595

+ lfs %f3, RETVAL+8(%r1)

85596

+ b .Lmorefloat

85597

+# case FFI_V2_TYPE_DOUBLE_HOMOG

85598

+ lfd %f1, RETVAL+0(%r1)

85599

+ lfd %f2, RETVAL+8(%r1)

85600

+ lfd %f3, RETVAL+16(%r1)

85601

+ lfd %f4, RETVAL+24(%r1)

85602

+ mtlr %r0

85603

+ lfd %f5, RETVAL+32(%r1)

85604

+ lfd %f6, RETVAL+40(%r1)

85605

+ lfd %f7, RETVAL+48(%r1)

85606

+ lfd %f8, RETVAL+56(%r1)

85607

+ addi %r1, %r1, STACKFRAME

85608

+ blr

85609

+.Lmorefloat:

85610

+ lfs %f4, RETVAL+12(%r1)

85611

+ mtlr %r0

85612

+ lfs %f5, RETVAL+16(%r1)

85613

+ lfs %f6, RETVAL+20(%r1)

85614

+ lfs %f7, RETVAL+24(%r1)

85615

+ lfs %f8, RETVAL+28(%r1)

85616

+ addi %r1, %r1, STACKFRAME

85617

+ blr

85618

+.Lsmall:

85619

+# ifdef __LITTLE_ENDIAN__

85620

+ ld %r3,RETVAL+0(%r1)

85621

+ mtlr %r0

85622

+ ld %r4,RETVAL+8(%r1)

85623

+ addi %r1, %r1, STACKFRAME

85624

+ blr

85625

+# else

85626

+ # A struct smaller than a dword is returned in the low bits of r3

85627

+ # ie. right justified. Larger structs are passed left justified

85628

+ # in r3 and r4. The return value area on the stack will have

85629

+ # the structs as they are usually stored in memory.

85630

+ cmpldi %r3, FFI_V2_TYPE_SMALL_STRUCT + 7 # size 8 bytes?

85631

+ neg %r5, %r3

85632

+ ld %r3,RETVAL+0(%r1)

85633

+ blt .Lsmalldown

85634

+ mtlr %r0

85635

+ ld %r4,RETVAL+8(%r1)

85636

+ addi %r1, %r1, STACKFRAME

85637

+ blr

85638

+.Lsmalldown:

85639

+ addi %r5, %r5, FFI_V2_TYPE_SMALL_STRUCT + 7

85640

+ mtlr %r0

85641

+ sldi %r5, %r5, 3

85642

+ addi %r1, %r1, STACKFRAME

85643

+ srd %r3, %r3, %r5

85644

+ blr

85645

+# endif

85646

+

85647

.LFE1:

85648

.long 0

85649

.byte 0,12,0,1,128,0,0,0

85650

-#ifdef _CALL_LINUX

85651

+# if _CALL_ELF == 2

85652

+ .size ffi_closure_LINUX64,.-ffi_closure_LINUX64

85653

+# else

85654

+# ifdef _CALL_LINUX

85655

.size ffi_closure_LINUX64,.-.L.ffi_closure_LINUX64

85656

-#else

85657

+# else

85658

.size .ffi_closure_LINUX64,.-.ffi_closure_LINUX64

85659

-#endif

85660

+# endif

85661

+# endif

85662

85663

.section .eh_frame,EH_FRAME_FLAGS,@progbits

85664

.Lframe1:

85665

@@ -267,14 +374,14 @@

85666

.byte 0x2 # DW_CFA_advance_loc1

85667

.byte .LCFI0-.LFB1

85668

.byte 0xe # DW_CFA_def_cfa_offset

85669

- .uleb128 240

85670

+ .uleb128 STACKFRAME

85671

.byte 0x11 # DW_CFA_offset_extended_sf

85672

.uleb128 0x41

85673

.sleb128 -2

85674

.align 3

85675

.LEFDE1:

85676

-#endif

85677

85678

-#if defined __ELF__ && defined __linux__

85679

+# if defined __ELF__ && defined __linux__

85680

.section .note.GNU-stack,"",@progbits

85681

+# endif

85682

#endif

85683

Index: libffi/src/powerpc/ffi_powerpc.h

85684

===================================================================

85685

--- a/src/libffi/src/powerpc/ffi_powerpc.h (.../tags/gcc_4_8_2_release)

85686

+++ b/src/libffi/src/powerpc/ffi_powerpc.h (.../branches/gcc-4_8-branch)

85687

@@ -0,0 +1,77 @@

85688

+/* -----------------------------------------------------------------------

85689

85690

85691

85692

85693

85694

85695

+

85696

+ PowerPC Foreign Function Interface

85697

+

85698

+ Permission is hereby granted, free of charge, to any person obtaining

85699

+ a copy of this software and associated documentation files (the

85700

+ ``Software''), to deal in the Software without restriction, including

85701

+ without limitation the rights to use, copy, modify, merge, publish,

85702

+ distribute, sublicense, and/or sell copies of the Software, and to

85703

+ permit persons to whom the Software is furnished to do so, subject to

85704

+ the following conditions:

85705

+

85706

+ The above copyright notice and this permission notice shall be included

85707

+ in all copies or substantial portions of the Software.

85708

+

85709

+ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS

85710

+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

85711

+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.

85712

+ IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR

85713

+ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

85714

+ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

85715

+ OTHER DEALINGS IN THE SOFTWARE.

85716

+ ----------------------------------------------------------------------- */

85717

+

85718

+enum {

85719

+ /* The assembly depends on these exact flags. */

85720

+ /* These go in cr7 */

85721

+ FLAG_RETURNS_SMST = 1 << (31-31), /* Used for FFI_SYSV small structs. */

85722

+ FLAG_RETURNS_NOTHING = 1 << (31-30),

85723

+ FLAG_RETURNS_FP = 1 << (31-29),

85724

+ FLAG_RETURNS_64BITS = 1 << (31-28),

85725

+

85726

+ /* This goes in cr6 */

85727

+ FLAG_RETURNS_128BITS = 1 << (31-27),

85728

+

85729

+ FLAG_COMPAT = 1 << (31- 8), /* Not used by assembly */

85730

+

85731

+ /* These go in cr1 */

85732

+ FLAG_ARG_NEEDS_COPY = 1 << (31- 7), /* Used by sysv code */

85733

+ FLAG_ARG_NEEDS_PSAVE = FLAG_ARG_NEEDS_COPY, /* Used by linux64 code */

85734

+ FLAG_FP_ARGUMENTS = 1 << (31- 6), /* cr1.eq; specified by ABI */

85735

+ FLAG_4_GPR_ARGUMENTS = 1 << (31- 5),

85736

+ FLAG_RETVAL_REFERENCE = 1 << (31- 4)

85737

+};

85738

+

85739

+typedef union

85740

+{

85741

+ float f;

85742

+ double d;

85743

+} ffi_dblfl;

85744

+

85745

+void FFI_HIDDEN ffi_closure_SYSV (void);

85746

+void FFI_HIDDEN ffi_call_SYSV(extended_cif *, unsigned, unsigned, unsigned *,

85747

+ void (*)(void));

85748

+

85749

+void FFI_HIDDEN ffi_prep_types_sysv (ffi_abi);

85750

+ffi_status FFI_HIDDEN ffi_prep_cif_sysv (ffi_cif *);

85751

+int FFI_HIDDEN ffi_closure_helper_SYSV (ffi_closure *, void *, unsigned long *,

85752

+ ffi_dblfl *, unsigned long *);

85753

+

85754

+void FFI_HIDDEN ffi_call_LINUX64(extended_cif *, unsigned long, unsigned long,

85755

+ unsigned long *, void (*)(void));

85756

+void FFI_HIDDEN ffi_closure_LINUX64 (void);

85757

+

85758

+void FFI_HIDDEN ffi_prep_types_linux64 (ffi_abi);

85759

+ffi_status FFI_HIDDEN ffi_prep_cif_linux64 (ffi_cif *);

85760

+ffi_status FFI_HIDDEN ffi_prep_cif_linux64_var (ffi_cif *, unsigned int,

85761

+ unsigned int);

85762

+void FFI_HIDDEN ffi_prep_args64 (extended_cif *, unsigned long *const);

85763

+int FFI_HIDDEN ffi_closure_helper_LINUX64 (ffi_closure *, void *,

85764

+ unsigned long *, ffi_dblfl *);

85765

Index: libffi/src/powerpc/ffi_sysv.c

85766

===================================================================

85767

--- a/src/libffi/src/powerpc/ffi_sysv.c (.../tags/gcc_4_8_2_release)

85768

+++ b/src/libffi/src/powerpc/ffi_sysv.c (.../branches/gcc-4_8-branch)

85769

@@ -0,0 +1,931 @@

85770

+/* -----------------------------------------------------------------------

85771

85772

85773

85774

85775

85776

85777

+

85778

+ PowerPC Foreign Function Interface

85779

+

85780

+ Permission is hereby granted, free of charge, to any person obtaining

85781

+ a copy of this software and associated documentation files (the

85782

+ ``Software''), to deal in the Software without restriction, including

85783

+ without limitation the rights to use, copy, modify, merge, publish,

85784

+ distribute, sublicense, and/or sell copies of the Software, and to

85785

+ permit persons to whom the Software is furnished to do so, subject to

85786

+ the following conditions:

85787

+

85788

+ The above copyright notice and this permission notice shall be included

85789

+ in all copies or substantial portions of the Software.

85790

+

85791

+ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS

85792

+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

85793

+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.

85794

+ IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR

85795

+ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

85796

+ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

85797

+ OTHER DEALINGS IN THE SOFTWARE.

85798

+ ----------------------------------------------------------------------- */

85799

+

85800

+#include "ffi.h"

85801

+

85802

+#ifndef POWERPC64

85803

+#include "ffi_common.h"

85804

+#include "ffi_powerpc.h"

85805

+

85806

+

85807

+/* About the SYSV ABI. */

85808

+#define ASM_NEEDS_REGISTERS 4

85809

+#define NUM_GPR_ARG_REGISTERS 8

85810

+#define NUM_FPR_ARG_REGISTERS 8

85811

+

85812

+

85813

+#if HAVE_LONG_DOUBLE_VARIANT && FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

85814

+/* Adjust size of ffi_type_longdouble. */

85815

+void FFI_HIDDEN

85816

+ffi_prep_types_sysv (ffi_abi abi)

85817

+{

85818

+ if ((abi & (FFI_SYSV | FFI_SYSV_LONG_DOUBLE_128)) == FFI_SYSV)

85819

+ {

85820

+ ffi_type_longdouble.size = 8;

85821

+ ffi_type_longdouble.alignment = 8;

85822

+ }

85823

+ else

85824

+ {

85825

+ ffi_type_longdouble.size = 16;

85826

+ ffi_type_longdouble.alignment = 16;

85827

+ }

85828

+}

85829

+#endif

85830

+

85831

+/* Transform long double, double and float to other types as per abi. */

85832

+static int

85833

+translate_float (int abi, int type)

85834

+{

85835

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

85836

+ if (type == FFI_TYPE_LONGDOUBLE

85837

+ && (abi & FFI_SYSV_LONG_DOUBLE_128) == 0)

85838

+ type = FFI_TYPE_DOUBLE;

85839

+#endif

85840

+ if ((abi & FFI_SYSV_SOFT_FLOAT) != 0)

85841

+ {

85842

+ if (type == FFI_TYPE_FLOAT)

85843

+ type = FFI_TYPE_UINT32;

85844

+ else if (type == FFI_TYPE_DOUBLE)

85845

+ type = FFI_TYPE_UINT64;

85846

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

85847

+ else if (type == FFI_TYPE_LONGDOUBLE)

85848

+ type = FFI_TYPE_UINT128;

85849

+ }

85850

+ else if ((abi & FFI_SYSV_IBM_LONG_DOUBLE) == 0)

85851

+ {

85852

+ if (type == FFI_TYPE_LONGDOUBLE)

85853

+ type = FFI_TYPE_STRUCT;

85854

+#endif

85855

+ }

85856

+ return type;

85857

+}

85858

+

85859

+/* Perform machine dependent cif processing */

85860

+static ffi_status

85861

+ffi_prep_cif_sysv_core (ffi_cif *cif)

85862

+{

85863

+ ffi_type **ptr;

85864

+ unsigned bytes;

85865

+ unsigned i, fparg_count = 0, intarg_count = 0;

85866

+ unsigned flags = cif->flags;

85867

+ unsigned struct_copy_size = 0;

85868

+ unsigned type = cif->rtype->type;

85869

+ unsigned size = cif->rtype->size;

85870

+

85871

+ /* The machine-independent calculation of cif->bytes doesn't work

85872

+ for us. Redo the calculation. */

85873

+

85874

+ /* Space for the frame pointer, callee's LR, and the asm's temp regs. */

85875

+ bytes = (2 + ASM_NEEDS_REGISTERS) * sizeof (int);

85876

+

85877

+ /* Space for the GPR registers. */

85878

+ bytes += NUM_GPR_ARG_REGISTERS * sizeof (int);

85879

+

85880

+ /* Return value handling. The rules for SYSV are as follows:

85881

+ - 32-bit (or less) integer values are returned in gpr3;

85882

+ - Structures of size <= 4 bytes also returned in gpr3;

85883

+ - 64-bit integer values and structures between 5 and 8 bytes are returned

85884

+ in gpr3 and gpr4;

85885

+ - Larger structures are allocated space and a pointer is passed as

85886

+ the first argument.

85887

+ - Single/double FP values are returned in fpr1;

85888

+ - long doubles (if not equivalent to double) are returned in

85889

+ fpr1,fpr2 for Linux and as for large structs for SysV. */

85890

+

85891

+ type = translate_float (cif->abi, type);

85892

+

85893

+ switch (type)

85894

+ {

85895

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

85896

+ case FFI_TYPE_LONGDOUBLE:

85897

+ flags |= FLAG_RETURNS_128BITS;

85898

+ /* Fall through. */

85899

+#endif

85900

+ case FFI_TYPE_DOUBLE:

85901

+ flags |= FLAG_RETURNS_64BITS;

85902

+ /* Fall through. */

85903

+ case FFI_TYPE_FLOAT:

85904

+ flags |= FLAG_RETURNS_FP;

85905

+#ifdef __NO_FPRS__

85906

+ return FFI_BAD_ABI;

85907

+#endif

85908

+ break;

85909

+

85910

+ case FFI_TYPE_UINT128:

85911

+ flags |= FLAG_RETURNS_128BITS;

85912

+ /* Fall through. */

85913

+ case FFI_TYPE_UINT64:

85914

+ case FFI_TYPE_SINT64:

85915

+ flags |= FLAG_RETURNS_64BITS;

85916

+ break;

85917

+

85918

+ case FFI_TYPE_STRUCT:

85919

+ /* The final SYSV ABI says that structures smaller or equal 8 bytes

85920

+ are returned in r3/r4. A draft ABI used by linux instead

85921

+ returns them in memory. */

85922

+ if ((cif->abi & FFI_SYSV_STRUCT_RET) != 0 && size <= 8)

85923

+ {

85924

+ flags |= FLAG_RETURNS_SMST;

85925

+ break;

85926

+ }

85927

+ intarg_count++;

85928

+ flags |= FLAG_RETVAL_REFERENCE;

85929

+ /* Fall through. */

85930

+ case FFI_TYPE_VOID:

85931

+ flags |= FLAG_RETURNS_NOTHING;

85932

+ break;

85933

+

85934

+ default:

85935

+ /* Returns 32-bit integer, or similar. Nothing to do here. */

85936

+ break;

85937

+ }

85938

+

85939

+ /* The first NUM_GPR_ARG_REGISTERS words of integer arguments, and the

85940

+ first NUM_FPR_ARG_REGISTERS fp arguments, go in registers; the rest

85941

+ goes on the stack. Structures and long doubles (if not equivalent

85942

+ to double) are passed as a pointer to a copy of the structure.

85943

+ Stuff on the stack needs to keep proper alignment. */

85944

+ for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

85945

+ {

85946

+ unsigned short typenum = (*ptr)->type;

85947

+

85948

+ typenum = translate_float (cif->abi, typenum);

85949

+

85950

+ switch (typenum)

85951

+ {

85952

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

85953

+ case FFI_TYPE_LONGDOUBLE:

85954

+ fparg_count++;

85955

+ /* Fall thru */

85956

+#endif

85957

+ case FFI_TYPE_DOUBLE:

85958

+ fparg_count++;

85959

+ /* If this FP arg is going on the stack, it must be

85960

+ 8-byte-aligned. */

85961

+ if (fparg_count > NUM_FPR_ARG_REGISTERS

85962

+ && intarg_count >= NUM_GPR_ARG_REGISTERS

85963

+ && intarg_count % 2 != 0)

85964

+ intarg_count++;

85965

+#ifdef __NO_FPRS__

85966

+ return FFI_BAD_ABI;

85967

+#endif

85968

+ break;

85969

+

85970

+ case FFI_TYPE_FLOAT:

85971

+ fparg_count++;

85972

+#ifdef __NO_FPRS__

85973

+ return FFI_BAD_ABI;

85974

+#endif

85975

+ break;

85976

+

85977

+ case FFI_TYPE_UINT128:

85978

+ /* A long double in FFI_LINUX_SOFT_FLOAT can use only a set

85979

+ of four consecutive gprs. If we do not have enough, we

85980

+ have to adjust the intarg_count value. */

85981

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3

85982

+ && intarg_count < NUM_GPR_ARG_REGISTERS)

85983

+ intarg_count = NUM_GPR_ARG_REGISTERS;

85984

+ intarg_count += 4;

85985

+ break;

85986

+

85987

+ case FFI_TYPE_UINT64:

85988

+ case FFI_TYPE_SINT64:

85989

+ /* 'long long' arguments are passed as two words, but

85990

+ either both words must fit in registers or both go

85991

+ on the stack. If they go on the stack, they must

85992

+ be 8-byte-aligned.

85993

+

85994

+ Also, only certain register pairs can be used for

85995

+ passing long long int -- specifically (r3,r4), (r5,r6),

85996

+ (r7,r8), (r9,r10). */

85997

+ if (intarg_count == NUM_GPR_ARG_REGISTERS-1

85998

+ || intarg_count % 2 != 0)

85999

+ intarg_count++;

86000

+ intarg_count += 2;

86001

+ break;

86002

+

86003

+ case FFI_TYPE_STRUCT:

86004

+ /* We must allocate space for a copy of these to enforce

86005

+ pass-by-value. Pad the space up to a multiple of 16

86006

+ bytes (the maximum alignment required for anything under

86007

+ the SYSV ABI). */

86008

+ struct_copy_size += ((*ptr)->size + 15) & ~0xF;

86009

+ /* Fall through (allocate space for the pointer). */

86010

+

86011

+ case FFI_TYPE_POINTER:

86012

+ case FFI_TYPE_INT:

86013

+ case FFI_TYPE_UINT32:

86014

+ case FFI_TYPE_SINT32:

86015

+ case FFI_TYPE_UINT16:

86016

+ case FFI_TYPE_SINT16:

86017

+ case FFI_TYPE_UINT8:

86018

+ case FFI_TYPE_SINT8:

86019

+ /* Everything else is passed as a 4-byte word in a GPR, either

86020

+ the object itself or a pointer to it. */

86021

+ intarg_count++;

86022

+ break;

86023

+

86024

+ default:

86025

+ FFI_ASSERT (0);

86026

+ }

86027

+ }

86028

+

86029

+ if (fparg_count != 0)

86030

+ flags |= FLAG_FP_ARGUMENTS;

86031

+ if (intarg_count > 4)

86032

+ flags |= FLAG_4_GPR_ARGUMENTS;

86033

+ if (struct_copy_size != 0)

86034

+ flags |= FLAG_ARG_NEEDS_COPY;

86035

+

86036

+ /* Space for the FPR registers, if needed. */

86037

+ if (fparg_count != 0)

86038

+ bytes += NUM_FPR_ARG_REGISTERS * sizeof (double);

86039

+

86040

+ /* Stack space. */

86041

+ if (intarg_count > NUM_GPR_ARG_REGISTERS)

86042

+ bytes += (intarg_count - NUM_GPR_ARG_REGISTERS) * sizeof (int);

86043

+ if (fparg_count > NUM_FPR_ARG_REGISTERS)

86044

+ bytes += (fparg_count - NUM_FPR_ARG_REGISTERS) * sizeof (double);

86045

+

86046

+ /* The stack space allocated needs to be a multiple of 16 bytes. */

86047

+ bytes = (bytes + 15) & ~0xF;

86048

+

86049

+ /* Add in the space for the copied structures. */

86050

+ bytes += struct_copy_size;

86051

+

86052

+ cif->flags = flags;

86053

+ cif->bytes = bytes;

86054

+

86055

+ return FFI_OK;

86056

+}

86057

+

86058

+ffi_status FFI_HIDDEN

86059

+ffi_prep_cif_sysv (ffi_cif *cif)

86060

+{

86061

+ if ((cif->abi & FFI_SYSV) == 0)

86062

+ {

86063

+ /* This call is from old code. Translate to new ABI values. */

86064

+ cif->flags |= FLAG_COMPAT;

86065

+ switch (cif->abi)

86066

+ {

86067

+ default:

86068

+ return FFI_BAD_ABI;

86069

+

86070

+ case FFI_COMPAT_SYSV:

86071

+ cif->abi = FFI_SYSV | FFI_SYSV_STRUCT_RET | FFI_SYSV_LONG_DOUBLE_128;

86072

+ break;

86073

+

86074

+ case FFI_COMPAT_GCC_SYSV:

86075

+ cif->abi = FFI_SYSV | FFI_SYSV_LONG_DOUBLE_128;

86076

+ break;

86077

+

86078

+ case FFI_COMPAT_LINUX:

86079

+ cif->abi = (FFI_SYSV | FFI_SYSV_IBM_LONG_DOUBLE

86080

+ | FFI_SYSV_LONG_DOUBLE_128);

86081

+ break;

86082

+

86083

+ case FFI_COMPAT_LINUX_SOFT_FLOAT:

86084

+ cif->abi = (FFI_SYSV | FFI_SYSV_SOFT_FLOAT | FFI_SYSV_IBM_LONG_DOUBLE

86085

+ | FFI_SYSV_LONG_DOUBLE_128);

86086

+ break;

86087

+ }

86088

+ }

86089

+ return ffi_prep_cif_sysv_core (cif);

86090

+}

86091

+

86092

+/* ffi_prep_args_SYSV is called by the assembly routine once stack space

86093

+ has been allocated for the function's arguments.

86094

+

86095

+ The stack layout we want looks like this:

86096

+

86097

+ | Return address from ffi_call_SYSV 4bytes | higher addresses

86098

+ |--------------------------------------------|

86099

+ | Previous backchain pointer 4 | stack pointer here

86100

+ |--------------------------------------------|<+ <<< on entry to

86101

+ | Saved r28-r31 4*4 | | ffi_call_SYSV

86102

+ |--------------------------------------------| |

86103

+ | GPR registers r3-r10 8*4 | | ffi_call_SYSV

86104

+ |--------------------------------------------| |

86105

+ | FPR registers f1-f8 (optional) 8*8 | |

86106

+ |--------------------------------------------| | stack |

86107

+ | Space for copied structures | | grows |

86108

+ |--------------------------------------------| | down V

86109

+ | Parameters that didn't fit in registers | |

86110

+ |--------------------------------------------| | lower addresses

86111

+ | Space for callee's LR 4 | |

86112

+ |--------------------------------------------| | stack pointer here

86113

+ | Current backchain pointer 4 |-/ during

86114

+ |--------------------------------------------| <<< ffi_call_SYSV

86115

+

86116

+*/

86117

+

86118

+void FFI_HIDDEN

86119

+ffi_prep_args_SYSV (extended_cif *ecif, unsigned *const stack)

86120

+{

86121

+ const unsigned bytes = ecif->cif->bytes;

86122

+ const unsigned flags = ecif->cif->flags;

86123

+

86124

+ typedef union

86125

+ {

86126

+ char *c;

86127

+ unsigned *u;

86128

+ long long *ll;

86129

+ float *f;

86130

+ double *d;

86131

+ } valp;

86132

+

86133

+ /* 'stacktop' points at the previous backchain pointer. */

86134

+ valp stacktop;

86135

+

86136

+ /* 'gpr_base' points at the space for gpr3, and grows upwards as

86137

+ we use GPR registers. */

86138

+ valp gpr_base;

86139

+ int intarg_count;

86140

+

86141

+#ifndef __NO_FPRS__

86142

+ /* 'fpr_base' points at the space for fpr1, and grows upwards as

86143

+ we use FPR registers. */

86144

+ valp fpr_base;

86145

+ int fparg_count;

86146

+#endif

86147

+

86148

+ /* 'copy_space' grows down as we put structures in it. It should

86149

+ stay 16-byte aligned. */

86150

+ valp copy_space;

86151

+

86152

+ /* 'next_arg' grows up as we put parameters in it. */

86153

+ valp next_arg;

86154

+

86155

+ int i;

86156

+ ffi_type **ptr;

86157

+#ifndef __NO_FPRS__

86158

+ double double_tmp;

86159

+#endif

86160

+ union

86161

+ {

86162

+ void **v;

86163

+ char **c;

86164

+ signed char **sc;

86165

+ unsigned char **uc;

86166

+ signed short **ss;

86167

+ unsigned short **us;

86168

+ unsigned int **ui;

86169

+ long long **ll;

86170

+ float **f;

86171

+ double **d;

86172

+ } p_argv;

86173

+ size_t struct_copy_size;

86174

+ unsigned gprvalue;

86175

+

86176

+ stacktop.c = (char *) stack + bytes;

86177

+ gpr_base.u = stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS;

86178

+ intarg_count = 0;

86179

+#ifndef __NO_FPRS__

86180

+ fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS;

86181

+ fparg_count = 0;

86182

+ copy_space.c = ((flags & FLAG_FP_ARGUMENTS) ? fpr_base.c : gpr_base.c);

86183

+#else

86184

+ copy_space.c = gpr_base.c;

86185

+#endif

86186

+ next_arg.u = stack + 2;

86187

+

86188

+ /* Check that everything starts aligned properly. */

86189

+ FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

86190

+ FFI_ASSERT (((unsigned long) copy_space.c & 0xF) == 0);

86191

+ FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

86192

+ FFI_ASSERT ((bytes & 0xF) == 0);

86193

+ FFI_ASSERT (copy_space.c >= next_arg.c);

86194

+

86195

+ /* Deal with return values that are actually pass-by-reference. */

86196

+ if (flags & FLAG_RETVAL_REFERENCE)

86197

+ {

86198

+ *gpr_base.u++ = (unsigned long) (char *) ecif->rvalue;

86199

+ intarg_count++;

86200

+ }

86201

+

86202

+ /* Now for the arguments. */

86203

+ p_argv.v = ecif->avalue;

86204

+ for (ptr = ecif->cif->arg_types, i = ecif->cif->nargs;

86205

+ i > 0;

86206

+ i--, ptr++, p_argv.v++)

86207

+ {

86208

+ unsigned int typenum = (*ptr)->type;

86209

+

86210

+ typenum = translate_float (ecif->cif->abi, typenum);

86211

+

86212

+ /* Now test the translated value */

86213

+ switch (typenum)

86214

+ {

86215

+#ifndef __NO_FPRS__

86216

+# if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

86217

+ case FFI_TYPE_LONGDOUBLE:

86218

+ double_tmp = (*p_argv.d)[0];

86219

+

86220

+ if (fparg_count >= NUM_FPR_ARG_REGISTERS - 1)

86221

+ {

86222

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS

86223

+ && intarg_count % 2 != 0)

86224

+ {

86225

+ intarg_count++;

86226

+ next_arg.u++;

86227

+ }

86228

+ *next_arg.d = double_tmp;

86229

+ next_arg.u += 2;

86230

+ double_tmp = (*p_argv.d)[1];

86231

+ *next_arg.d = double_tmp;

86232

+ next_arg.u += 2;

86233

+ }

86234

+ else

86235

+ {

86236

+ *fpr_base.d++ = double_tmp;

86237

+ double_tmp = (*p_argv.d)[1];

86238

+ *fpr_base.d++ = double_tmp;

86239

+ }

86240

+

86241

+ fparg_count += 2;

86242

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

86243

+ break;

86244

+# endif

86245

+ case FFI_TYPE_DOUBLE:

86246

+ double_tmp = **p_argv.d;

86247

+

86248

+ if (fparg_count >= NUM_FPR_ARG_REGISTERS)

86249

+ {

86250

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS

86251

+ && intarg_count % 2 != 0)

86252

+ {

86253

+ intarg_count++;

86254

+ next_arg.u++;

86255

+ }

86256

+ *next_arg.d = double_tmp;

86257

+ next_arg.u += 2;

86258

+ }

86259

+ else

86260

+ *fpr_base.d++ = double_tmp;

86261

+ fparg_count++;

86262

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

86263

+ break;

86264

+

86265

+ case FFI_TYPE_FLOAT:

86266

+ double_tmp = **p_argv.f;

86267

+ if (fparg_count >= NUM_FPR_ARG_REGISTERS)

86268

+ {

86269

+ *next_arg.f = (float) double_tmp;

86270

+ next_arg.u += 1;

86271

+ intarg_count++;

86272

+ }

86273

+ else

86274

+ *fpr_base.d++ = double_tmp;

86275

+ fparg_count++;

86276

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

86277

+ break;

86278

+#endif /* have FPRs */

86279

+

86280

+ case FFI_TYPE_UINT128:

86281

+ /* The soft float ABI for long doubles works like this, a long double

86282

+ is passed in four consecutive GPRs if available. A maximum of 2

86283

+ long doubles can be passed in gprs. If we do not have 4 GPRs

86284

+ left, the long double is passed on the stack, 4-byte aligned. */

86285

+ {

86286

+ unsigned int int_tmp;

86287

+ unsigned int ii;

86288

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3)

86289

+ {

86290

+ if (intarg_count < NUM_GPR_ARG_REGISTERS)

86291

+ intarg_count = NUM_GPR_ARG_REGISTERS;

86292

+ for (ii = 0; ii < 4; ii++)

86293

+ {

86294

+ int_tmp = (*p_argv.ui)[ii];

86295

+ *next_arg.u++ = int_tmp;

86296

+ }

86297

+ }

86298

+ else

86299

+ {

86300

+ for (ii = 0; ii < 4; ii++)

86301

+ {

86302

+ int_tmp = (*p_argv.ui)[ii];

86303

+ *gpr_base.u++ = int_tmp;

86304

+ }

86305

+ }

86306

+ intarg_count += 4;

86307

+ break;

86308

+ }

86309

+

86310

+ case FFI_TYPE_UINT64:

86311

+ case FFI_TYPE_SINT64:

86312

+ if (intarg_count == NUM_GPR_ARG_REGISTERS-1)

86313

+ intarg_count++;

86314

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS)

86315

+ {

86316

+ if (intarg_count % 2 != 0)

86317

+ {

86318

+ intarg_count++;

86319

+ next_arg.u++;

86320

+ }

86321

+ *next_arg.ll = **p_argv.ll;

86322

+ next_arg.u += 2;

86323

+ }

86324

+ else

86325

+ {

86326

+ /* The abi states only certain register pairs can be

86327

+ used for passing long long int specifically (r3,r4),

86328

+ (r5,r6), (r7,r8), (r9,r10). If next arg is long long

86329

+ but not correct starting register of pair then skip

86330

+ until the proper starting register. */

86331

+ if (intarg_count % 2 != 0)

86332

+ {

86333

+ intarg_count ++;

86334

+ gpr_base.u++;

86335

+ }

86336

+ *gpr_base.ll++ = **p_argv.ll;

86337

+ }

86338

+ intarg_count += 2;

86339

+ break;

86340

+

86341

+ case FFI_TYPE_STRUCT:

86342

+ struct_copy_size = ((*ptr)->size + 15) & ~0xF;

86343

+ copy_space.c -= struct_copy_size;

86344

+ memcpy (copy_space.c, *p_argv.c, (*ptr)->size);

86345

+

86346

+ gprvalue = (unsigned long) copy_space.c;

86347

+

86348

+ FFI_ASSERT (copy_space.c > next_arg.c);

86349

+ FFI_ASSERT (flags & FLAG_ARG_NEEDS_COPY);

86350

+ goto putgpr;

86351

+

86352

+ case FFI_TYPE_UINT8:

86353

+ gprvalue = **p_argv.uc;

86354

+ goto putgpr;

86355

+ case FFI_TYPE_SINT8:

86356

+ gprvalue = **p_argv.sc;

86357

+ goto putgpr;

86358

+ case FFI_TYPE_UINT16:

86359

+ gprvalue = **p_argv.us;

86360

+ goto putgpr;

86361

+ case FFI_TYPE_SINT16:

86362

+ gprvalue = **p_argv.ss;

86363

+ goto putgpr;

86364

+

86365

+ case FFI_TYPE_INT:

86366

+ case FFI_TYPE_UINT32:

86367

+ case FFI_TYPE_SINT32:

86368

+ case FFI_TYPE_POINTER:

86369

+

86370

+ gprvalue = **p_argv.ui;

86371

+

86372

+ putgpr:

86373

+ if (intarg_count >= NUM_GPR_ARG_REGISTERS)

86374

+ *next_arg.u++ = gprvalue;

86375

+ else

86376

+ *gpr_base.u++ = gprvalue;

86377

+ intarg_count++;

86378

+ break;

86379

+ }

86380

+ }

86381

+

86382

+ /* Check that we didn't overrun the stack... */

86383

+ FFI_ASSERT (copy_space.c >= next_arg.c);

86384

+ FFI_ASSERT (gpr_base.u <= stacktop.u - ASM_NEEDS_REGISTERS);

86385

+ /* The assert below is testing that the number of integer arguments agrees

86386

+ with the number found in ffi_prep_cif_machdep(). However, intarg_count

86387

+ is incremented whenever we place an FP arg on the stack, so account for

86388

+ that before our assert test. */

86389

+#ifndef __NO_FPRS__

86390

+ if (fparg_count > NUM_FPR_ARG_REGISTERS)

86391

+ intarg_count -= fparg_count - NUM_FPR_ARG_REGISTERS;

86392

+ FFI_ASSERT (fpr_base.u

86393

+ <= stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS);

86394

+#endif

86395

+ FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS || intarg_count <= 4);

86396

+}

86397

+

86398

+#define MIN_CACHE_LINE_SIZE 8

86399

+

86400

+static void

86401

+flush_icache (char *wraddr, char *xaddr, int size)

86402

+{

86403

+ int i;

86404

+ for (i = 0; i < size; i += MIN_CACHE_LINE_SIZE)

86405

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;"

86406

+ : : "r" (xaddr + i), "r" (wraddr + i) : "memory");

86407

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;" "sync;" "isync;"

86408

+ : : "r"(xaddr + size - 1), "r"(wraddr + size - 1)

86409

+ : "memory");

86410

+}

86411

+

86412

+ffi_status FFI_HIDDEN

86413

+ffi_prep_closure_loc_sysv (ffi_closure *closure,

86414

+ ffi_cif *cif,

86415

+ void (*fun) (ffi_cif *, void *, void **, void *),

86416

+ void *user_data,

86417

+ void *codeloc)

86418

+{

86419

+ unsigned int *tramp;

86420

+

86421

+ if (cif->abi < FFI_SYSV || cif->abi >= FFI_LAST_ABI)

86422

+ return FFI_BAD_ABI;

86423

+

86424

+ tramp = (unsigned int *) &closure->tramp[0];

86425

+ tramp[0] = 0x7c0802a6; /* mflr r0 */

86426

+ tramp[1] = 0x4800000d; /* bl 10 <trampoline_initial+0x10> */

86427

+ tramp[4] = 0x7d6802a6; /* mflr r11 */

86428

+ tramp[5] = 0x7c0803a6; /* mtlr r0 */

86429

+ tramp[6] = 0x800b0000; /* lwz r0,0(r11) */

86430

+ tramp[7] = 0x816b0004; /* lwz r11,4(r11) */

86431

+ tramp[8] = 0x7c0903a6; /* mtctr r0 */

86432

+ tramp[9] = 0x4e800420; /* bctr */

86433

+ *(void **) &tramp[2] = (void *) ffi_closure_SYSV; /* function */

86434

+ *(void **) &tramp[3] = codeloc; /* context */

86435

+

86436

+ /* Flush the icache. */

86437

+ flush_icache ((char *)tramp, (char *)codeloc, FFI_TRAMPOLINE_SIZE);

86438

+

86439

+ closure->cif = cif;

86440

+ closure->fun = fun;

86441

+ closure->user_data = user_data;

86442

+

86443

+ return FFI_OK;

86444

+}

86445

+

86446

+/* Basically the trampoline invokes ffi_closure_SYSV, and on

86447

+ entry, r11 holds the address of the closure.

86448

+ After storing the registers that could possibly contain

86449

+ parameters to be passed into the stack frame and setting

86450

+ up space for a return value, ffi_closure_SYSV invokes the

86451

+ following helper function to do most of the work. */

86452

+

86453

+int

86454

+ffi_closure_helper_SYSV (ffi_closure *closure, void *rvalue,

86455

+ unsigned long *pgr, ffi_dblfl *pfr,

86456

+ unsigned long *pst)

86457

+{

86458

+ /* rvalue is the pointer to space for return value in closure assembly */

86459

+ /* pgr is the pointer to where r3-r10 are stored in ffi_closure_SYSV */

86460

+ /* pfr is the pointer to where f1-f8 are stored in ffi_closure_SYSV */

86461

+ /* pst is the pointer to outgoing parameter stack in original caller */

86462

+

86463

+ void ** avalue;

86464

+ ffi_type ** arg_types;

86465

+ long i, avn;

86466

+#ifndef __NO_FPRS__

86467

+ long nf = 0; /* number of floating registers already used */

86468

+#endif

86469

+ long ng = 0; /* number of general registers already used */

86470

+

86471

+ ffi_cif *cif = closure->cif;

86472

+ unsigned size = cif->rtype->size;

86473

+ unsigned short rtypenum = cif->rtype->type;

86474

+

86475

+ avalue = alloca (cif->nargs * sizeof (void *));

86476

+

86477

+ /* First translate for softfloat/nonlinux */

86478

+ rtypenum = translate_float (cif->abi, rtypenum);

86479

+

86480

+ /* Copy the caller's structure return value address so that the closure

86481

+ returns the data directly to the caller.

86482

+ For FFI_SYSV the result is passed in r3/r4 if the struct size is less

86483

+ or equal 8 bytes. */

86484

+ if (rtypenum == FFI_TYPE_STRUCT

86485

+ && !((cif->abi & FFI_SYSV_STRUCT_RET) != 0 && size <= 8))

86486

+ {

86487

+ rvalue = (void *) *pgr;

86488

+ ng++;

86489

+ pgr++;

86490

+ }

86491

+

86492

+ i = 0;

86493

+ avn = cif->nargs;

86494

+ arg_types = cif->arg_types;

86495

+

86496

+ /* Grab the addresses of the arguments from the stack frame. */

86497

+ while (i < avn) {

86498

+ unsigned short typenum = arg_types[i]->type;

86499

+

86500

+ /* We may need to handle some values depending on ABI. */

86501

+ typenum = translate_float (cif->abi, typenum);

86502

+

86503

+ switch (typenum)

86504

+ {

86505

+#ifndef __NO_FPRS__

86506

+ case FFI_TYPE_FLOAT:

86507

+ /* Unfortunately float values are stored as doubles

86508

+ in the ffi_closure_SYSV code (since we don't check

86509

+ the type in that routine). */

86510

+ if (nf < NUM_FPR_ARG_REGISTERS)

86511

+ {

86512

+ /* FIXME? here we are really changing the values

86513

+ stored in the original calling routines outgoing

86514

+ parameter stack. This is probably a really

86515

+ naughty thing to do but... */

86516

+ double temp = pfr->d;

86517

+ pfr->f = (float) temp;

86518

+ avalue[i] = pfr;

86519

+ nf++;

86520

+ pfr++;

86521

+ }

86522

+ else

86523

+ {

86524

+ avalue[i] = pst;

86525

+ pst += 1;

86526

+ }

86527

+ break;

86528

+

86529

+ case FFI_TYPE_DOUBLE:

86530

+ if (nf < NUM_FPR_ARG_REGISTERS)

86531

+ {

86532

+ avalue[i] = pfr;

86533

+ nf++;

86534

+ pfr++;

86535

+ }

86536

+ else

86537

+ {

86538

+ if (((long) pst) & 4)

86539

+ pst++;

86540

+ avalue[i] = pst;

86541

+ pst += 2;

86542

+ }

86543

+ break;

86544

+

86545

+# if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

86546

+ case FFI_TYPE_LONGDOUBLE:

86547

+ if (nf < NUM_FPR_ARG_REGISTERS - 1)

86548

+ {

86549

+ avalue[i] = pfr;

86550

+ pfr += 2;

86551

+ nf += 2;

86552

+ }

86553

+ else

86554

+ {

86555

+ if (((long) pst) & 4)

86556

+ pst++;

86557

+ avalue[i] = pst;

86558

+ pst += 4;

86559

+ nf = 8;

86560

+ }

86561

+ break;

86562

+# endif

86563

+#endif

86564

+

86565

+ case FFI_TYPE_UINT128:

86566

+ /* Test if for the whole long double, 4 gprs are available.

86567

+ otherwise the stuff ends up on the stack. */

86568

+ if (ng < NUM_GPR_ARG_REGISTERS - 3)

86569

+ {

86570

+ avalue[i] = pgr;

86571

+ pgr += 4;

86572

+ ng += 4;

86573

+ }

86574

+ else

86575

+ {

86576

+ avalue[i] = pst;

86577

+ pst += 4;

86578

+ ng = 8+4;

86579

+ }

86580

+ break;

86581

+

86582

+ case FFI_TYPE_SINT8:

86583

+ case FFI_TYPE_UINT8:

86584

+#ifndef __LITTLE_ENDIAN__

86585

+ if (ng < NUM_GPR_ARG_REGISTERS)

86586

+ {

86587

+ avalue[i] = (char *) pgr + 3;

86588

+ ng++;

86589

+ pgr++;

86590

+ }

86591

+ else

86592

+ {

86593

+ avalue[i] = (char *) pst + 3;

86594

+ pst++;

86595

+ }

86596

+ break;

86597

+#endif

86598

+

86599

+ case FFI_TYPE_SINT16:

86600

+ case FFI_TYPE_UINT16:

86601

+#ifndef __LITTLE_ENDIAN__

86602

+ if (ng < NUM_GPR_ARG_REGISTERS)

86603

+ {

86604

+ avalue[i] = (char *) pgr + 2;

86605

+ ng++;

86606

+ pgr++;

86607

+ }

86608

+ else

86609

+ {

86610

+ avalue[i] = (char *) pst + 2;

86611

+ pst++;

86612

+ }

86613

+ break;

86614

+#endif

86615

+

86616

+ case FFI_TYPE_SINT32:

86617

+ case FFI_TYPE_UINT32:

86618

+ case FFI_TYPE_POINTER:

86619

+ if (ng < NUM_GPR_ARG_REGISTERS)

86620

+ {

86621

+ avalue[i] = pgr;

86622

+ ng++;

86623

+ pgr++;

86624

+ }

86625

+ else

86626

+ {

86627

+ avalue[i] = pst;

86628

+ pst++;

86629

+ }

86630

+ break;

86631

+

86632

+ case FFI_TYPE_STRUCT:

86633

+ /* Structs are passed by reference. The address will appear in a

86634

+ gpr if it is one of the first 8 arguments. */

86635

+ if (ng < NUM_GPR_ARG_REGISTERS)

86636

+ {

86637

+ avalue[i] = (void *) *pgr;

86638

+ ng++;

86639

+ pgr++;

86640

+ }

86641

+ else

86642

+ {

86643

+ avalue[i] = (void *) *pst;

86644

+ pst++;

86645

+ }

86646

+ break;

86647

+

86648

+ case FFI_TYPE_SINT64:

86649

+ case FFI_TYPE_UINT64:

86650

+ /* Passing long long ints are complex, they must

86651

+ be passed in suitable register pairs such as

86652

+ (r3,r4) or (r5,r6) or (r6,r7), or (r7,r8) or (r9,r10)

86653

+ and if the entire pair aren't available then the outgoing

86654

+ parameter stack is used for both but an alignment of 8

86655

+ must will be kept. So we must either look in pgr

86656

+ or pst to find the correct address for this type

86657

+ of parameter. */

86658

+ if (ng < NUM_GPR_ARG_REGISTERS - 1)

86659

+ {

86660

+ if (ng & 1)

86661

+ {

86662

+ /* skip r4, r6, r8 as starting points */

86663

+ ng++;

86664

+ pgr++;

86665

+ }

86666

+ avalue[i] = pgr;

86667

+ ng += 2;

86668

+ pgr += 2;

86669

+ }

86670

+ else

86671

+ {

86672

+ if (((long) pst) & 4)

86673

+ pst++;

86674

+ avalue[i] = pst;

86675

+ pst += 2;

86676

+ ng = NUM_GPR_ARG_REGISTERS;

86677

+ }

86678

+ break;

86679

+

86680

+ default:

86681

+ FFI_ASSERT (0);

86682

+ }

86683

+

86684

+ i++;

86685

+ }

86686

+

86687

+ (closure->fun) (cif, rvalue, avalue, closure->user_data);

86688

+

86689

+ /* Tell ffi_closure_SYSV how to perform return type promotions.

86690

+ Because the FFI_SYSV ABI returns the structures <= 8 bytes in

86691

+ r3/r4 we have to tell ffi_closure_SYSV how to treat them. We

86692

+ combine the base type FFI_SYSV_TYPE_SMALL_STRUCT with the size of

86693

+ the struct less one. We never have a struct with size zero.

86694

+ See the comment in ffitarget.h about ordering. */

86695

+ if (rtypenum == FFI_TYPE_STRUCT

86696

+ && (cif->abi & FFI_SYSV_STRUCT_RET) != 0 && size <= 8)

86697

+ return FFI_SYSV_TYPE_SMALL_STRUCT - 1 + size;

86698

+ return rtypenum;

86699

+}

86700

+#endif

86701

Index: libffi/src/powerpc/linux64.S

86702

===================================================================

86703

--- a/src/libffi/src/powerpc/linux64.S (.../tags/gcc_4_8_2_release)

86704

+++ b/src/libffi/src/powerpc/linux64.S (.../branches/gcc-4_8-branch)

86705

@@ -29,18 +29,25 @@

86706

#include <fficonfig.h>

86707

#include <ffi.h>

86708

86709

-#ifdef __powerpc64__

86710

+#ifdef POWERPC64

86711

.hidden ffi_call_LINUX64

86712

.globl ffi_call_LINUX64

86713

+# if _CALL_ELF == 2

86714

+ .text

86715

+ffi_call_LINUX64:

86716

+ addis %r2, %r12, .TOC.-ffi_call_LINUX64@ha

86717

+ addi %r2, %r2, .TOC.-ffi_call_LINUX64@l

86718

+ .localentry ffi_call_LINUX64, . - ffi_call_LINUX64

86719

+# else

86720

.section ".opd","aw"

86721

.align 3

86722

ffi_call_LINUX64:

86723

-#ifdef _CALL_LINUX

86724

+# ifdef _CALL_LINUX

86725

.quad .L.ffi_call_LINUX64,.TOC.@tocbase,0

86726

.type ffi_call_LINUX64,@function

86727

.text

86728

.L.ffi_call_LINUX64:

86729

-#else

86730

+# else

86731

.hidden .ffi_call_LINUX64

86732

.globl .ffi_call_LINUX64

86733

.quad .ffi_call_LINUX64,.TOC.@tocbase,0

86734

@@ -48,7 +55,8 @@

86735

.type .ffi_call_LINUX64,@function

86736

.text

86737

.ffi_call_LINUX64:

86738

-#endif

86739

+# endif

86740

+# endif

86741

.LFB1:

86742

mflr %r0

86743

std %r28, -32(%r1)

86744

@@ -63,26 +71,35 @@

86745

mr %r31, %r5 /* flags, */

86746

mr %r30, %r6 /* rvalue, */

86747

mr %r29, %r7 /* function address. */

86748

+/* Save toc pointer, not for the ffi_prep_args64 call, but for the later

86749

+ bctrl function call. */

86750

+# if _CALL_ELF == 2

86751

+ std %r2, 24(%r1)

86752

+# else

86753

std %r2, 40(%r1)

86754

+# endif

86755

86756

/* Call ffi_prep_args64. */

86757

mr %r4, %r1

86758

-#ifdef _CALL_LINUX

86759

+# if defined _CALL_LINUX || _CALL_ELF == 2

86760

bl ffi_prep_args64

86761

-#else

86762

+# else

86763

bl .ffi_prep_args64

86764

-#endif

86765

+# endif

86766

86767

- ld %r0, 0(%r29)

86768

+# if _CALL_ELF == 2

86769

+ mr %r12, %r29

86770

+# else

86771

+ ld %r12, 0(%r29)

86772

ld %r2, 8(%r29)

86773

ld %r11, 16(%r29)

86774

-

86775

+# endif

86776

/* Now do the call. */

86777

/* Set up cr1 with bits 4-7 of the flags. */

86778

mtcrf 0x40, %r31

86779

86780

/* Get the address to call into CTR. */

86781

- mtctr %r0

86782

+ mtctr %r12

86783

/* Load all those argument registers. */

86784

ld %r3, -32-(8*8)(%r28)

86785

ld %r4, -32-(7*8)(%r28)

86786

@@ -117,12 +134,17 @@

86787

86788

/* This must follow the call immediately, the unwinder

86789

uses this to find out if r2 has been saved or not. */

86790

+# if _CALL_ELF == 2

86791

+ ld %r2, 24(%r1)

86792

+# else

86793

ld %r2, 40(%r1)

86794

+# endif

86795

86796

/* Now, deal with the return value. */

86797

mtcrf 0x01, %r31

86798

- bt- 30, .Ldone_return_value

86799

- bt- 29, .Lfp_return_value

86800

+ bt 31, .Lstruct_return_value

86801

+ bt 30, .Ldone_return_value

86802

+ bt 29, .Lfp_return_value

86803

std %r3, 0(%r30)

86804

/* Fall through... */

86805

86806

@@ -130,7 +152,7 @@

86807

/* Restore the registers we used and return. */

86808

mr %r1, %r28

86809

ld %r0, 16(%r28)

86810

- ld %r28, -32(%r1)

86811

+ ld %r28, -32(%r28)

86812

mtlr %r0

86813

ld %r29, -24(%r1)

86814

ld %r30, -16(%r1)

86815

@@ -147,14 +169,48 @@

86816

.Lfloat_return_value:

86817

stfs %f1, 0(%r30)

86818

b .Ldone_return_value

86819

+

86820

+.Lstruct_return_value:

86821

+ bf 29, .Lsmall_struct

86822

+ bf 28, .Lfloat_homog_return_value

86823

+ stfd %f1, 0(%r30)

86824

+ stfd %f2, 8(%r30)

86825

+ stfd %f3, 16(%r30)

86826

+ stfd %f4, 24(%r30)

86827

+ stfd %f5, 32(%r30)

86828

+ stfd %f6, 40(%r30)

86829

+ stfd %f7, 48(%r30)

86830

+ stfd %f8, 56(%r30)

86831

+ b .Ldone_return_value

86832

+

86833

+.Lfloat_homog_return_value:

86834

+ stfs %f1, 0(%r30)

86835

+ stfs %f2, 4(%r30)

86836

+ stfs %f3, 8(%r30)

86837

+ stfs %f4, 12(%r30)

86838

+ stfs %f5, 16(%r30)

86839

+ stfs %f6, 20(%r30)

86840

+ stfs %f7, 24(%r30)

86841

+ stfs %f8, 28(%r30)

86842

+ b .Ldone_return_value

86843

+

86844

+.Lsmall_struct:

86845

+ std %r3, 0(%r30)

86846

+ std %r4, 8(%r30)

86847

+ b .Ldone_return_value

86848

+

86849

.LFE1:

86850

.long 0

86851

.byte 0,12,0,1,128,4,0,0

86852

-#ifdef _CALL_LINUX

86853

+# if _CALL_ELF == 2

86854

+ .size ffi_call_LINUX64,.-ffi_call_LINUX64

86855

+# else

86856

+# ifdef _CALL_LINUX

86857

.size ffi_call_LINUX64,.-.L.ffi_call_LINUX64

86858

-#else

86859

+# else

86860

.size .ffi_call_LINUX64,.-.ffi_call_LINUX64

86861

-#endif

86862

+# endif

86863

+# endif

86864

86865

.section .eh_frame,EH_FRAME_FLAGS,@progbits

86866

.Lframe1:

86867

@@ -197,8 +253,8 @@

86868

.uleb128 0x4

86869

.align 3

86870

.LEFDE1:

86871

-#endif

86872

86873

-#if defined __ELF__ && defined __linux__

86874

+# if (defined __ELF__ && defined __linux__) || _CALL_ELF == 2

86875

.section .note.GNU-stack,"",@progbits

86876

+# endif

86877

#endif

86878

Index: libffi/src/powerpc/ffi_linux64.c

86879

===================================================================

86880

--- a/src/libffi/src/powerpc/ffi_linux64.c (.../tags/gcc_4_8_2_release)

86881

+++ b/src/libffi/src/powerpc/ffi_linux64.c (.../branches/gcc-4_8-branch)

86882

@@ -0,0 +1,942 @@

86883

+/* -----------------------------------------------------------------------

86884

86885

86886

86887

86888

86889

86890

+

86891

+ PowerPC Foreign Function Interface

86892

+

86893

+ Permission is hereby granted, free of charge, to any person obtaining

86894

+ a copy of this software and associated documentation files (the

86895

+ ``Software''), to deal in the Software without restriction, including

86896

+ without limitation the rights to use, copy, modify, merge, publish,

86897

+ distribute, sublicense, and/or sell copies of the Software, and to

86898

+ permit persons to whom the Software is furnished to do so, subject to

86899

+ the following conditions:

86900

+

86901

+ The above copyright notice and this permission notice shall be included

86902

+ in all copies or substantial portions of the Software.

86903

+

86904

+ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS

86905

+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

86906

+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.

86907

+ IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR

86908

+ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

86909

+ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

86910

+ OTHER DEALINGS IN THE SOFTWARE.

86911

+ ----------------------------------------------------------------------- */

86912

+

86913

+#include "ffi.h"

86914

+

86915

+#ifdef POWERPC64

86916

+#include "ffi_common.h"

86917

+#include "ffi_powerpc.h"

86918

+

86919

+

86920

+/* About the LINUX64 ABI. */

86921

+enum {

86922

+ NUM_GPR_ARG_REGISTERS64 = 8,

86923

+ NUM_FPR_ARG_REGISTERS64 = 13

86924

+};

86925

+enum { ASM_NEEDS_REGISTERS64 = 4 };

86926

+

86927

+

86928

+#if HAVE_LONG_DOUBLE_VARIANT && FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

86929

+/* Adjust size of ffi_type_longdouble. */

86930

+void FFI_HIDDEN

86931

+ffi_prep_types_linux64 (ffi_abi abi)

86932

+{

86933

+ if ((abi & (FFI_LINUX | FFI_LINUX_LONG_DOUBLE_128)) == FFI_LINUX)

86934

+ {

86935

+ ffi_type_longdouble.size = 8;

86936

+ ffi_type_longdouble.alignment = 8;

86937

+ }

86938

+ else

86939

+ {

86940

+ ffi_type_longdouble.size = 16;

86941

+ ffi_type_longdouble.alignment = 16;

86942

+ }

86943

+}

86944

+#endif

86945

+

86946

+

86947

+#if _CALL_ELF == 2

86948

+static unsigned int

86949

+discover_homogeneous_aggregate (const ffi_type *t, unsigned int *elnum)

86950

+{

86951

+ switch (t->type)

86952

+ {

86953

+ case FFI_TYPE_FLOAT:

86954

+ case FFI_TYPE_DOUBLE:

86955

+ *elnum = 1;

86956

+ return (int) t->type;

86957

+

86958

+ case FFI_TYPE_STRUCT:;

86959

+ {

86960

+ unsigned int base_elt = 0, total_elnum = 0;

86961

+ ffi_type **el = t->elements;

86962

+ while (*el)

86963

+ {

86964

+ unsigned int el_elt, el_elnum = 0;

86965

+ el_elt = discover_homogeneous_aggregate (*el, &el_elnum);

86966

+ if (el_elt == 0

86967

+ || (base_elt && base_elt != el_elt))

86968

+ return 0;

86969

+ base_elt = el_elt;

86970

+ total_elnum += el_elnum;

86971

+ if (total_elnum > 8)

86972

+ return 0;

86973

+ el++;

86974

+ }

86975

+ *elnum = total_elnum;

86976

+ return base_elt;

86977

+ }

86978

+

86979

+ default:

86980

+ return 0;

86981

+ }

86982

+}

86983

+#endif

86984

+

86985

+

86986

+/* Perform machine dependent cif processing */

86987

+static ffi_status

86988

+ffi_prep_cif_linux64_core (ffi_cif *cif)

86989

+{

86990

+ ffi_type **ptr;

86991

+ unsigned bytes;

86992

+ unsigned i, fparg_count = 0, intarg_count = 0;

86993

+ unsigned flags = cif->flags;

86994

+#if _CALL_ELF == 2

86995

+ unsigned int elt, elnum;

86996

+#endif

86997

+

86998

+#if FFI_TYPE_LONGDOUBLE == FFI_TYPE_DOUBLE

86999

+ /* If compiled without long double support.. */

87000

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

87001

+ return FFI_BAD_ABI;

87002

+#endif

87003

+

87004

+ /* The machine-independent calculation of cif->bytes doesn't work

87005

+ for us. Redo the calculation. */

87006

+#if _CALL_ELF == 2

87007

+ /* Space for backchain, CR, LR, TOC and the asm's temp regs. */

87008

+ bytes = (4 + ASM_NEEDS_REGISTERS64) * sizeof (long);

87009

+

87010

+ /* Space for the general registers. */

87011

+ bytes += NUM_GPR_ARG_REGISTERS64 * sizeof (long);

87012

+#else

87013

+ /* Space for backchain, CR, LR, cc/ld doubleword, TOC and the asm's temp

87014

+ regs. */

87015

+ bytes = (6 + ASM_NEEDS_REGISTERS64) * sizeof (long);

87016

+

87017

+ /* Space for the mandatory parm save area and general registers. */

87018

+ bytes += 2 * NUM_GPR_ARG_REGISTERS64 * sizeof (long);

87019

+#endif

87020

+

87021

+ /* Return value handling. */

87022

+ switch (cif->rtype->type)

87023

+ {

87024

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

87025

+ case FFI_TYPE_LONGDOUBLE:

87026

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

87027

+ flags |= FLAG_RETURNS_128BITS;

87028

+ /* Fall through. */

87029

+#endif

87030

+ case FFI_TYPE_DOUBLE:

87031

+ flags |= FLAG_RETURNS_64BITS;

87032

+ /* Fall through. */

87033

+ case FFI_TYPE_FLOAT:

87034

+ flags |= FLAG_RETURNS_FP;

87035

+ break;

87036

+

87037

+ case FFI_TYPE_UINT128:

87038

+ flags |= FLAG_RETURNS_128BITS;

87039

+ /* Fall through. */

87040

+ case FFI_TYPE_UINT64:

87041

+ case FFI_TYPE_SINT64:

87042

+ flags |= FLAG_RETURNS_64BITS;

87043

+ break;

87044

+

87045

+ case FFI_TYPE_STRUCT:

87046

+#if _CALL_ELF == 2

87047

+ elt = discover_homogeneous_aggregate (cif->rtype, &elnum);

87048

+ if (elt)

87049

+ {

87050

+ if (elt == FFI_TYPE_DOUBLE)

87051

+ flags |= FLAG_RETURNS_64BITS;

87052

+ flags |= FLAG_RETURNS_FP | FLAG_RETURNS_SMST;

87053

+ break;

87054

+ }

87055

+ if (cif->rtype->size <= 16)

87056

+ {

87057

+ flags |= FLAG_RETURNS_SMST;

87058

+ break;

87059

+ }

87060

+#endif

87061

+ intarg_count++;

87062

+ flags |= FLAG_RETVAL_REFERENCE;

87063

+ /* Fall through. */

87064

+ case FFI_TYPE_VOID:

87065

+ flags |= FLAG_RETURNS_NOTHING;

87066

+ break;

87067

+

87068

+ default:

87069

+ /* Returns 32-bit integer, or similar. Nothing to do here. */

87070

+ break;

87071

+ }

87072

+

87073

+ for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++)

87074

+ {

87075

+ unsigned int align;

87076

+

87077

+ switch ((*ptr)->type)

87078

+ {

87079

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

87080

+ case FFI_TYPE_LONGDOUBLE:

87081

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

87082

+ {

87083

+ fparg_count++;

87084

+ intarg_count++;

87085

+ }

87086

+ /* Fall through. */

87087

+#endif

87088

+ case FFI_TYPE_DOUBLE:

87089

+ case FFI_TYPE_FLOAT:

87090

+ fparg_count++;

87091

+ intarg_count++;

87092

+ if (fparg_count > NUM_FPR_ARG_REGISTERS64)

87093

+ flags |= FLAG_ARG_NEEDS_PSAVE;

87094

+ break;

87095

+

87096

+ case FFI_TYPE_STRUCT:

87097

+ if ((cif->abi & FFI_LINUX_STRUCT_ALIGN) != 0)

87098

+ {

87099

+ align = (*ptr)->alignment;

87100

+ if (align > 16)

87101

+ align = 16;

87102

+ align = align / 8;

87103

+ if (align > 1)

87104

+ intarg_count = ALIGN (intarg_count, align);

87105

+ }

87106

+ intarg_count += ((*ptr)->size + 7) / 8;

87107

+#if _CALL_ELF == 2

87108

+ elt = discover_homogeneous_aggregate (*ptr, &elnum);

87109

+ if (elt)

87110

+ {

87111

+ fparg_count += elnum;

87112

+ if (fparg_count > NUM_FPR_ARG_REGISTERS64)

87113

+ flags |= FLAG_ARG_NEEDS_PSAVE;

87114

+ }

87115

+ else

87116

+#endif

87117

+ {

87118

+ if (intarg_count > NUM_GPR_ARG_REGISTERS64)

87119

+ flags |= FLAG_ARG_NEEDS_PSAVE;

87120

+ }

87121

+ break;

87122

+

87123

+ case FFI_TYPE_POINTER:

87124

+ case FFI_TYPE_UINT64:

87125

+ case FFI_TYPE_SINT64:

87126

+ case FFI_TYPE_INT:

87127

+ case FFI_TYPE_UINT32:

87128

+ case FFI_TYPE_SINT32:

87129

+ case FFI_TYPE_UINT16:

87130

+ case FFI_TYPE_SINT16:

87131

+ case FFI_TYPE_UINT8:

87132

+ case FFI_TYPE_SINT8:

87133

+ /* Everything else is passed as a 8-byte word in a GPR, either

87134

+ the object itself or a pointer to it. */

87135

+ intarg_count++;

87136

+ if (intarg_count > NUM_GPR_ARG_REGISTERS64)

87137

+ flags |= FLAG_ARG_NEEDS_PSAVE;

87138

+ break;

87139

+ default:

87140

+ FFI_ASSERT (0);

87141

+ }

87142

+ }

87143

+

87144

+ if (fparg_count != 0)

87145

+ flags |= FLAG_FP_ARGUMENTS;

87146

+ if (intarg_count > 4)

87147

+ flags |= FLAG_4_GPR_ARGUMENTS;

87148

+

87149

+ /* Space for the FPR registers, if needed. */

87150

+ if (fparg_count != 0)

87151

+ bytes += NUM_FPR_ARG_REGISTERS64 * sizeof (double);

87152

+

87153

+ /* Stack space. */

87154

+#if _CALL_ELF == 2

87155

+ if ((flags & FLAG_ARG_NEEDS_PSAVE) != 0)

87156

+ bytes += intarg_count * sizeof (long);

87157

+#else

87158

+ if (intarg_count > NUM_GPR_ARG_REGISTERS64)

87159

+ bytes += (intarg_count - NUM_GPR_ARG_REGISTERS64) * sizeof (long);

87160

+#endif

87161

+

87162

+ /* The stack space allocated needs to be a multiple of 16 bytes. */

87163

+ bytes = (bytes + 15) & ~0xF;

87164

+

87165

+ cif->flags = flags;

87166

+ cif->bytes = bytes;

87167

+

87168

+ return FFI_OK;

87169

+}

87170

+

87171

+ffi_status FFI_HIDDEN

87172

+ffi_prep_cif_linux64 (ffi_cif *cif)

87173

+{

87174

+ if ((cif->abi & FFI_LINUX) != 0)

87175

+ cif->nfixedargs = cif->nargs;

87176

+#if _CALL_ELF != 2

87177

+ else if (cif->abi == FFI_COMPAT_LINUX64)

87178

+ {

87179

+ /* This call is from old code. Don't touch cif->nfixedargs

87180

+ since old code will be using a smaller cif. */

87181

+ cif->flags |= FLAG_COMPAT;

87182

+ /* Translate to new abi value. */

87183

+ cif->abi = FFI_LINUX | FFI_LINUX_LONG_DOUBLE_128;

87184

+ }

87185

+#endif

87186

+ else

87187

+ return FFI_BAD_ABI;

87188

+ return ffi_prep_cif_linux64_core (cif);

87189

+}

87190

+

87191

+ffi_status FFI_HIDDEN

87192

+ffi_prep_cif_linux64_var (ffi_cif *cif,

87193

+ unsigned int nfixedargs,

87194

+ unsigned int ntotalargs MAYBE_UNUSED)

87195

+{

87196

+ if ((cif->abi & FFI_LINUX) != 0)

87197

+ cif->nfixedargs = nfixedargs;

87198

+#if _CALL_ELF != 2

87199

+ else if (cif->abi == FFI_COMPAT_LINUX64)

87200

+ {

87201

+ /* This call is from old code. Don't touch cif->nfixedargs

87202

+ since old code will be using a smaller cif. */

87203

+ cif->flags |= FLAG_COMPAT;

87204

+ /* Translate to new abi value. */

87205

+ cif->abi = FFI_LINUX | FFI_LINUX_LONG_DOUBLE_128;

87206

+ }

87207

+#endif

87208

+ else

87209

+ return FFI_BAD_ABI;

87210

+#if _CALL_ELF == 2

87211

+ cif->flags |= FLAG_ARG_NEEDS_PSAVE;

87212

+#endif

87213

+ return ffi_prep_cif_linux64_core (cif);

87214

+}

87215

+

87216

+

87217

+/* ffi_prep_args64 is called by the assembly routine once stack space

87218

+ has been allocated for the function's arguments.

87219

+

87220

+ The stack layout we want looks like this:

87221

+

87222

+ | Ret addr from ffi_call_LINUX64 8bytes | higher addresses

87223

+ |--------------------------------------------|

87224

+ | CR save area 8bytes |

87225

+ |--------------------------------------------|

87226

+ | Previous backchain pointer 8 | stack pointer here

87227

+ |--------------------------------------------|<+ <<< on entry to

87228

+ | Saved r28-r31 4*8 | | ffi_call_LINUX64

87229

+ |--------------------------------------------| |

87230

+ | GPR registers r3-r10 8*8 | |

87231

+ |--------------------------------------------| |

87232

+ | FPR registers f1-f13 (optional) 13*8 | |

87233

+ |--------------------------------------------| |

87234

+ | Parameter save area | |

87235

+ |--------------------------------------------| |

87236

+ | TOC save area 8 | |

87237

+ |--------------------------------------------| | stack |

87238

+ | Linker doubleword 8 | | grows |

87239

+ |--------------------------------------------| | down V

87240

+ | Compiler doubleword 8 | |

87241

+ |--------------------------------------------| | lower addresses

87242

+ | Space for callee's LR 8 | |

87243

+ |--------------------------------------------| |

87244

+ | CR save area 8 | |

87245

+ |--------------------------------------------| | stack pointer here

87246

+ | Current backchain pointer 8 |-/ during

87247

+ |--------------------------------------------| <<< ffi_call_LINUX64

87248

+

87249

+*/

87250

+

87251

+void FFI_HIDDEN

87252

+ffi_prep_args64 (extended_cif *ecif, unsigned long *const stack)

87253

+{

87254

+ const unsigned long bytes = ecif->cif->bytes;

87255

+ const unsigned long flags = ecif->cif->flags;

87256

+

87257

+ typedef union

87258

+ {

87259

+ char *c;

87260

+ unsigned long *ul;

87261

+ float *f;

87262

+ double *d;

87263

+ size_t p;

87264

+ } valp;

87265

+

87266

+ /* 'stacktop' points at the previous backchain pointer. */

87267

+ valp stacktop;

87268

+

87269

+ /* 'next_arg' points at the space for gpr3, and grows upwards as

87270

+ we use GPR registers, then continues at rest. */

87271

+ valp gpr_base;

87272

+ valp gpr_end;

87273

+ valp rest;

87274

+ valp next_arg;

87275

+

87276

+ /* 'fpr_base' points at the space for fpr3, and grows upwards as

87277

+ we use FPR registers. */

87278

+ valp fpr_base;

87279

+ unsigned int fparg_count;

87280

+

87281

+ unsigned int i, words, nargs, nfixedargs;

87282

+ ffi_type **ptr;

87283

+ double double_tmp;

87284

+ union

87285

+ {

87286

+ void **v;

87287

+ char **c;

87288

+ signed char **sc;

87289

+ unsigned char **uc;

87290

+ signed short **ss;

87291

+ unsigned short **us;

87292

+ signed int **si;

87293

+ unsigned int **ui;

87294

+ unsigned long **ul;

87295

+ float **f;

87296

+ double **d;

87297

+ } p_argv;

87298

+ unsigned long gprvalue;

87299

+ unsigned long align;

87300

+

87301

+ stacktop.c = (char *) stack + bytes;

87302

+ gpr_base.ul = stacktop.ul - ASM_NEEDS_REGISTERS64 - NUM_GPR_ARG_REGISTERS64;

87303

+ gpr_end.ul = gpr_base.ul + NUM_GPR_ARG_REGISTERS64;

87304

+#if _CALL_ELF == 2

87305

+ rest.ul = stack + 4 + NUM_GPR_ARG_REGISTERS64;

87306

+#else

87307

+ rest.ul = stack + 6 + NUM_GPR_ARG_REGISTERS64;

87308

+#endif

87309

+ fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS64;

87310

+ fparg_count = 0;

87311

+ next_arg.ul = gpr_base.ul;

87312

+

87313

+ /* Check that everything starts aligned properly. */

87314

+ FFI_ASSERT (((unsigned long) (char *) stack & 0xF) == 0);

87315

+ FFI_ASSERT (((unsigned long) stacktop.c & 0xF) == 0);

87316

+ FFI_ASSERT ((bytes & 0xF) == 0);

87317

+

87318

+ /* Deal with return values that are actually pass-by-reference. */

87319

+ if (flags & FLAG_RETVAL_REFERENCE)

87320

+ *next_arg.ul++ = (unsigned long) (char *) ecif->rvalue;

87321

+

87322

+ /* Now for the arguments. */

87323

+ p_argv.v = ecif->avalue;

87324

+ nargs = ecif->cif->nargs;

87325

+#if _CALL_ELF != 2

87326

+ nfixedargs = (unsigned) -1;

87327

+ if ((flags & FLAG_COMPAT) == 0)

87328

+#endif

87329

+ nfixedargs = ecif->cif->nfixedargs;

87330

+ for (ptr = ecif->cif->arg_types, i = 0;

87331

+ i < nargs;

87332

+ i++, ptr++, p_argv.v++)

87333

+ {

87334

+#if _CALL_ELF == 2

87335

+ unsigned int elt, elnum;

87336

+#endif

87337

+

87338

+ switch ((*ptr)->type)

87339

+ {

87340

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

87341

+ case FFI_TYPE_LONGDOUBLE:

87342

+ if ((ecif->cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

87343

+ {

87344

+ double_tmp = (*p_argv.d)[0];

87345

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

87346

+ {

87347

+ *fpr_base.d++ = double_tmp;

87348

+# if _CALL_ELF != 2

87349

+ if ((flags & FLAG_COMPAT) != 0)

87350

+ *next_arg.d = double_tmp;

87351

+# endif

87352

+ }

87353

+ else

87354

+ *next_arg.d = double_tmp;

87355

+ if (++next_arg.ul == gpr_end.ul)

87356

+ next_arg.ul = rest.ul;

87357

+ fparg_count++;

87358

+ double_tmp = (*p_argv.d)[1];

87359

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

87360

+ {

87361

+ *fpr_base.d++ = double_tmp;

87362

+# if _CALL_ELF != 2

87363

+ if ((flags & FLAG_COMPAT) != 0)

87364

+ *next_arg.d = double_tmp;

87365

+# endif

87366

+ }

87367

+ else

87368

+ *next_arg.d = double_tmp;

87369

+ if (++next_arg.ul == gpr_end.ul)

87370

+ next_arg.ul = rest.ul;

87371

+ fparg_count++;

87372

+ FFI_ASSERT (__LDBL_MANT_DIG__ == 106);

87373

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

87374

+ break;

87375

+ }

87376

+ /* Fall through. */

87377

+#endif

87378

+ case FFI_TYPE_DOUBLE:

87379

+ double_tmp = **p_argv.d;

87380

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

87381

+ {

87382

+ *fpr_base.d++ = double_tmp;

87383

+#if _CALL_ELF != 2

87384

+ if ((flags & FLAG_COMPAT) != 0)

87385

+ *next_arg.d = double_tmp;

87386

+#endif

87387

+ }

87388

+ else

87389

+ *next_arg.d = double_tmp;

87390

+ if (++next_arg.ul == gpr_end.ul)

87391

+ next_arg.ul = rest.ul;

87392

+ fparg_count++;

87393

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

87394

+ break;

87395

+

87396

+ case FFI_TYPE_FLOAT:

87397

+ double_tmp = **p_argv.f;

87398

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

87399

+ {

87400

+ *fpr_base.d++ = double_tmp;

87401

+#if _CALL_ELF != 2

87402

+ if ((flags & FLAG_COMPAT) != 0)

87403

+ *next_arg.f = (float) double_tmp;

87404

+#endif

87405

+ }

87406

+ else

87407

+ *next_arg.f = (float) double_tmp;

87408

+ if (++next_arg.ul == gpr_end.ul)

87409

+ next_arg.ul = rest.ul;

87410

+ fparg_count++;

87411

+ FFI_ASSERT (flags & FLAG_FP_ARGUMENTS);

87412

+ break;

87413

+

87414

+ case FFI_TYPE_STRUCT:

87415

+ if ((ecif->cif->abi & FFI_LINUX_STRUCT_ALIGN) != 0)

87416

+ {

87417

+ align = (*ptr)->alignment;

87418

+ if (align > 16)

87419

+ align = 16;

87420

+ if (align > 1)

87421

+ next_arg.p = ALIGN (next_arg.p, align);

87422

+ }

87423

+#if _CALL_ELF == 2

87424

+ elt = discover_homogeneous_aggregate (*ptr, &elnum);

87425

+ if (elt)

87426

+ {

87427

+ union {

87428

+ void *v;

87429

+ float *f;

87430

+ double *d;

87431

+ } arg;

87432

+

87433

+ arg.v = *p_argv.v;

87434

+ if (elt == FFI_TYPE_FLOAT)

87435

+ {

87436

+ do

87437

+ {

87438

+ double_tmp = *arg.f++;

87439

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64

87440

+ && i < nfixedargs)

87441

+ *fpr_base.d++ = double_tmp;

87442

+ else

87443

+ *next_arg.f = (float) double_tmp;

87444

+ if (++next_arg.f == gpr_end.f)

87445

+ next_arg.f = rest.f;

87446

+ fparg_count++;

87447

+ }

87448

+ while (--elnum != 0);

87449

+ if ((next_arg.p & 3) != 0)

87450

+ {

87451

+ if (++next_arg.f == gpr_end.f)

87452

+ next_arg.f = rest.f;

87453

+ }

87454

+ }

87455

+ else

87456

+ do

87457

+ {

87458

+ double_tmp = *arg.d++;

87459

+ if (fparg_count < NUM_FPR_ARG_REGISTERS64 && i < nfixedargs)

87460

+ *fpr_base.d++ = double_tmp;

87461

+ else

87462

+ *next_arg.d = double_tmp;

87463

+ if (++next_arg.d == gpr_end.d)

87464

+ next_arg.d = rest.d;

87465

+ fparg_count++;

87466

+ }

87467

+ while (--elnum != 0);

87468

+ }

87469

+ else

87470

+#endif

87471

+ {

87472

+ words = ((*ptr)->size + 7) / 8;

87473

+ if (next_arg.ul >= gpr_base.ul && next_arg.ul + words > gpr_end.ul)

87474

+ {

87475

+ size_t first = gpr_end.c - next_arg.c;

87476

+ memcpy (next_arg.c, *p_argv.c, first);

87477

+ memcpy (rest.c, *p_argv.c + first, (*ptr)->size - first);

87478

+ next_arg.c = rest.c + words * 8 - first;

87479

+ }

87480

+ else

87481

+ {

87482

+ char *where = next_arg.c;

87483

+

87484

+#ifndef __LITTLE_ENDIAN__

87485

+ /* Structures with size less than eight bytes are passed

87486

+ left-padded. */

87487

+ if ((*ptr)->size < 8)

87488

+ where += 8 - (*ptr)->size;

87489

+#endif

87490

+ memcpy (where, *p_argv.c, (*ptr)->size);

87491

+ next_arg.ul += words;

87492

+ if (next_arg.ul == gpr_end.ul)

87493

+ next_arg.ul = rest.ul;

87494

+ }

87495

+ }

87496

+ break;

87497

+

87498

+ case FFI_TYPE_UINT8:

87499

+ gprvalue = **p_argv.uc;

87500

+ goto putgpr;

87501

+ case FFI_TYPE_SINT8:

87502

+ gprvalue = **p_argv.sc;

87503

+ goto putgpr;

87504

+ case FFI_TYPE_UINT16:

87505

+ gprvalue = **p_argv.us;

87506

+ goto putgpr;

87507

+ case FFI_TYPE_SINT16:

87508

+ gprvalue = **p_argv.ss;

87509

+ goto putgpr;

87510

+ case FFI_TYPE_UINT32:

87511

+ gprvalue = **p_argv.ui;

87512

+ goto putgpr;

87513

+ case FFI_TYPE_INT:

87514

+ case FFI_TYPE_SINT32:

87515

+ gprvalue = **p_argv.si;

87516

+ goto putgpr;

87517

+

87518

+ case FFI_TYPE_UINT64:

87519

+ case FFI_TYPE_SINT64:

87520

+ case FFI_TYPE_POINTER:

87521

+ gprvalue = **p_argv.ul;

87522

+ putgpr:

87523

+ *next_arg.ul++ = gprvalue;

87524

+ if (next_arg.ul == gpr_end.ul)

87525

+ next_arg.ul = rest.ul;

87526

+ break;

87527

+ }

87528

+ }

87529

+

87530

+ FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS

87531

+ || (next_arg.ul >= gpr_base.ul

87532

+ && next_arg.ul <= gpr_base.ul + 4));

87533

+}

87534

+

87535

+

87536

+#if _CALL_ELF == 2

87537

+#define MIN_CACHE_LINE_SIZE 8

87538

+

87539

+static void

87540

+flush_icache (char *wraddr, char *xaddr, int size)

87541

+{

87542

+ int i;

87543

+ for (i = 0; i < size; i += MIN_CACHE_LINE_SIZE)

87544

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;"

87545

+ : : "r" (xaddr + i), "r" (wraddr + i) : "memory");

87546

+ __asm__ volatile ("icbi 0,%0;" "dcbf 0,%1;" "sync;" "isync;"

87547

+ : : "r"(xaddr + size - 1), "r"(wraddr + size - 1)

87548

+ : "memory");

87549

+}

87550

+#endif

87551

+

87552

+ffi_status

87553

+ffi_prep_closure_loc_linux64 (ffi_closure *closure,

87554

+ ffi_cif *cif,

87555

+ void (*fun) (ffi_cif *, void *, void **, void *),

87556

+ void *user_data,

87557

+ void *codeloc)

87558

+{

87559

+#if _CALL_ELF == 2

87560

+ unsigned int *tramp = (unsigned int *) &closure->tramp[0];

87561

+

87562

+ if (cif->abi < FFI_LINUX || cif->abi >= FFI_LAST_ABI)

87563

+ return FFI_BAD_ABI;

87564

+

87565

+ tramp[0] = 0xe96c0018; /* 0: ld 11,2f-0b(12) */

87566

+ tramp[1] = 0xe98c0010; /* ld 12,1f-0b(12) */

87567

+ tramp[2] = 0x7d8903a6; /* mtctr 12 */

87568

+ tramp[3] = 0x4e800420; /* bctr */

87569

+ /* 1: .quad function_addr */

87570

+ /* 2: .quad context */

87571

+ *(void **) &tramp[4] = (void *) ffi_closure_LINUX64;

87572

+ *(void **) &tramp[6] = codeloc;

87573

+ flush_icache ((char *)tramp, (char *)codeloc, FFI_TRAMPOLINE_SIZE);

87574

+#else

87575

+ void **tramp = (void **) &closure->tramp[0];

87576

+

87577

+ if (cif->abi < FFI_LINUX || cif->abi >= FFI_LAST_ABI)

87578

+ return FFI_BAD_ABI;

87579

+

87580

+ /* Copy function address and TOC from ffi_closure_LINUX64. */

87581

+ memcpy (tramp, (char *) ffi_closure_LINUX64, 16);

87582

+ tramp[2] = codeloc;

87583

+#endif

87584

+

87585

+ closure->cif = cif;

87586

+ closure->fun = fun;

87587

+ closure->user_data = user_data;

87588

+

87589

+ return FFI_OK;

87590

+}

87591

+

87592

+

87593

+int FFI_HIDDEN

87594

+ffi_closure_helper_LINUX64 (ffi_closure *closure, void *rvalue,

87595

+ unsigned long *pst, ffi_dblfl *pfr)

87596

+{

87597

+ /* rvalue is the pointer to space for return value in closure assembly */

87598

+ /* pst is the pointer to parameter save area

87599

+ (r3-r10 are stored into its first 8 slots by ffi_closure_LINUX64) */

87600

+ /* pfr is the pointer to where f1-f13 are stored in ffi_closure_LINUX64 */

87601

+

87602

+ void **avalue;

87603

+ ffi_type **arg_types;

87604

+ unsigned long i, avn, nfixedargs;

87605

+ ffi_cif *cif;

87606

+ ffi_dblfl *end_pfr = pfr + NUM_FPR_ARG_REGISTERS64;

87607

+ unsigned long align;

87608

+

87609

+ cif = closure->cif;

87610

+ avalue = alloca (cif->nargs * sizeof (void *));

87611

+

87612

+ /* Copy the caller's structure return value address so that the

87613

+ closure returns the data directly to the caller. */

87614

+ if (cif->rtype->type == FFI_TYPE_STRUCT

87615

+ && (cif->flags & FLAG_RETURNS_SMST) == 0)

87616

+ {

87617

+ rvalue = (void *) *pst;

87618

+ pst++;

87619

+ }

87620

+

87621

+ i = 0;

87622

+ avn = cif->nargs;

87623

+#if _CALL_ELF != 2

87624

+ nfixedargs = (unsigned) -1;

87625

+ if ((cif->flags & FLAG_COMPAT) == 0)

87626

+#endif

87627

+ nfixedargs = cif->nfixedargs;

87628

+ arg_types = cif->arg_types;

87629

+

87630

+ /* Grab the addresses of the arguments from the stack frame. */

87631

+ while (i < avn)

87632

+ {

87633

+ unsigned int elt, elnum;

87634

+

87635

+ switch (arg_types[i]->type)

87636

+ {

87637

+ case FFI_TYPE_SINT8:

87638

+ case FFI_TYPE_UINT8:

87639

+#ifndef __LITTLE_ENDIAN__

87640

+ avalue[i] = (char *) pst + 7;

87641

+ pst++;

87642

+ break;

87643

+#endif

87644

+

87645

+ case FFI_TYPE_SINT16:

87646

+ case FFI_TYPE_UINT16:

87647

+#ifndef __LITTLE_ENDIAN__

87648

+ avalue[i] = (char *) pst + 6;

87649

+ pst++;

87650

+ break;

87651

+#endif

87652

+

87653

+ case FFI_TYPE_SINT32:

87654

+ case FFI_TYPE_UINT32:

87655

+#ifndef __LITTLE_ENDIAN__

87656

+ avalue[i] = (char *) pst + 4;

87657

+ pst++;

87658

+ break;

87659

+#endif

87660

+

87661

+ case FFI_TYPE_SINT64:

87662

+ case FFI_TYPE_UINT64:

87663

+ case FFI_TYPE_POINTER:

87664

+ avalue[i] = pst;

87665

+ pst++;

87666

+ break;

87667

+

87668

+ case FFI_TYPE_STRUCT:

87669

+ if ((cif->abi & FFI_LINUX_STRUCT_ALIGN) != 0)

87670

+ {

87671

+ align = arg_types[i]->alignment;

87672

+ if (align > 16)

87673

+ align = 16;

87674

+ if (align > 1)

87675

+ pst = (unsigned long *) ALIGN ((size_t) pst, align);

87676

+ }

87677

+ elt = 0;

87678

+#if _CALL_ELF == 2

87679

+ elt = discover_homogeneous_aggregate (arg_types[i], &elnum);

87680

+#endif

87681

+ if (elt)

87682

+ {

87683

+ union {

87684

+ void *v;

87685

+ unsigned long *ul;

87686

+ float *f;

87687

+ double *d;

87688

+ size_t p;

87689

+ } to, from;

87690

+

87691

+ /* Repackage the aggregate from its parts. The

87692

+ aggregate size is not greater than the space taken by

87693

+ the registers so store back to the register/parameter

87694

+ save arrays. */

87695

+ if (pfr + elnum <= end_pfr)

87696

+ to.v = pfr;

87697

+ else

87698

+ to.v = pst;

87699

+

87700

+ avalue[i] = to.v;

87701

+ from.ul = pst;

87702

+ if (elt == FFI_TYPE_FLOAT)

87703

+ {

87704

+ do

87705

+ {

87706

+ if (pfr < end_pfr && i < nfixedargs)

87707

+ {

87708

+ *to.f = (float) pfr->d;

87709

+ pfr++;

87710

+ }

87711

+ else

87712

+ *to.f = *from.f;

87713

+ to.f++;

87714

+ from.f++;

87715

+ }

87716

+ while (--elnum != 0);

87717

+ }

87718

+ else

87719

+ {

87720

+ do

87721

+ {

87722

+ if (pfr < end_pfr && i < nfixedargs)

87723

+ {

87724

+ *to.d = pfr->d;

87725

+ pfr++;

87726

+ }

87727

+ else

87728

+ *to.d = *from.d;

87729

+ to.d++;

87730

+ from.d++;

87731

+ }

87732

+ while (--elnum != 0);

87733

+ }

87734

+ }

87735

+ else

87736

+ {

87737

+#ifndef __LITTLE_ENDIAN__

87738

+ /* Structures with size less than eight bytes are passed

87739

+ left-padded. */

87740

+ if (arg_types[i]->size < 8)

87741

+ avalue[i] = (char *) pst + 8 - arg_types[i]->size;

87742

+ else

87743

+#endif

87744

+ avalue[i] = pst;

87745

+ }

87746

+ pst += (arg_types[i]->size + 7) / 8;

87747

+ break;

87748

+

87749

+#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

87750

+ case FFI_TYPE_LONGDOUBLE:

87751

+ if ((cif->abi & FFI_LINUX_LONG_DOUBLE_128) != 0)

87752

+ {

87753

+ if (pfr + 1 < end_pfr && i + 1 < nfixedargs)

87754

+ {

87755

+ avalue[i] = pfr;

87756

+ pfr += 2;

87757

+ }

87758

+ else

87759

+ {

87760

+ if (pfr < end_pfr && i < nfixedargs)

87761

+ {

87762

+ /* Passed partly in f13 and partly on the stack.

87763

+ Move it all to the stack. */

87764

+ *pst = *(unsigned long *) pfr;

87765

+ pfr++;

87766

+ }

87767

+ avalue[i] = pst;

87768

+ }

87769

+ pst += 2;

87770

+ break;

87771

+ }

87772

+ /* Fall through. */

87773

+#endif

87774

+ case FFI_TYPE_DOUBLE:

87775

+ /* On the outgoing stack all values are aligned to 8 */

87776

+ /* there are 13 64bit floating point registers */

87777

+

87778

+ if (pfr < end_pfr && i < nfixedargs)

87779

+ {

87780

+ avalue[i] = pfr;

87781

+ pfr++;

87782

+ }

87783

+ else

87784

+ avalue[i] = pst;

87785

+ pst++;

87786

+ break;

87787

+

87788

+ case FFI_TYPE_FLOAT:

87789

+ if (pfr < end_pfr && i < nfixedargs)

87790

+ {

87791

+ /* Float values are stored as doubles in the

87792

+ ffi_closure_LINUX64 code. Fix them here. */

87793

+ pfr->f = (float) pfr->d;

87794

+ avalue[i] = pfr;

87795

+ pfr++;

87796

+ }

87797

+ else

87798

+ avalue[i] = pst;

87799

+ pst++;

87800

+ break;

87801

+

87802

+ default:

87803

+ FFI_ASSERT (0);

87804

+ }

87805

+

87806

+ i++;

87807

+ }

87808

+

87809

+

87810

+ (closure->fun) (cif, rvalue, avalue, closure->user_data);

87811

+

87812

+ /* Tell ffi_closure_LINUX64 how to perform return type promotions. */

87813

+ if ((cif->flags & FLAG_RETURNS_SMST) != 0)

87814

+ {

87815

+ if ((cif->flags & FLAG_RETURNS_FP) == 0)

87816

+ return FFI_V2_TYPE_SMALL_STRUCT + cif->rtype->size - 1;

87817

+ else if ((cif->flags & FLAG_RETURNS_64BITS) != 0)

87818

+ return FFI_V2_TYPE_DOUBLE_HOMOG;

87819

+ else

87820

+ return FFI_V2_TYPE_FLOAT_HOMOG;

87821

+ }

87822

+ return cif->rtype->type;

87823

+}

87824

+#endif

87825

Index: libffi/src/types.c

87826

===================================================================

87827

--- a/src/libffi/src/types.c (.../tags/gcc_4_8_2_release)

87828

+++ b/src/libffi/src/types.c (.../branches/gcc-4_8-branch)

87829

@@ -44,6 +44,17 @@

87830

id, NULL \

87831

}

87832

87833

+#define FFI_NONCONST_TYPEDEF(name, type, id) \

87834

+struct struct_align_##name { \

87835

+ char c; \

87836

+ type x; \

87837

+}; \

87838

+ffi_type ffi_type_##name = { \

87839

+ sizeof(type), \

87840

+ offsetof(struct struct_align_##name, x), \

87841

+ id, NULL \

87842

+}

87843

+

87844

/* Size and alignment are fake here. They must not be 0. */

87845

const ffi_type ffi_type_void = {

87846

1, 1, FFI_TYPE_VOID, NULL

87847

@@ -73,5 +84,9 @@

87848

# endif

87849

const ffi_type ffi_type_longdouble = { 16, 16, 4, NULL };

87850

#elif FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE

87851

+# if HAVE_LONG_DOUBLE_VARIANT

87852

+FFI_NONCONST_TYPEDEF(longdouble, long double, FFI_TYPE_LONGDOUBLE);

87853

+# else

87854

FFI_TYPEDEF(longdouble, long double, FFI_TYPE_LONGDOUBLE);

87855

+# endif

87856

#endif

87857

Index: libffi/src/prep_cif.c

87858

===================================================================

87859

--- a/src/libffi/src/prep_cif.c (.../tags/gcc_4_8_2_release)

87860

+++ b/src/libffi/src/prep_cif.c (.../branches/gcc-4_8-branch)

87861

@@ -126,6 +126,10 @@

87862

87863

cif->flags = 0;

87864

87865

+#if HAVE_LONG_DOUBLE_VARIANT

87866

+ ffi_prep_types (abi);

87867

+#endif

87868

+

87869

/* Initialize the return type if necessary */

87870

if ((cif->rtype->size == 0) && (initialize_aggregate(cif->rtype) != FFI_OK))

87871

return FFI_BAD_TYPEDEF;

87872

Index: libffi/ChangeLog

87873

===================================================================

87874

--- a/src/libffi/ChangeLog (.../tags/gcc_4_8_2_release)

87875

+++ b/src/libffi/ChangeLog (.../branches/gcc-4_8-branch)

87876

@@ -1,3 +1,39 @@

87877

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

87878

+

87879

+ Backport mainline r205844.

87880

+ 2013-11-18 Alan Modra <amodra@gmail.com>

87881

+ * src/powerpc/ffitarget.h: Import from upstream.

87882

+ * src/powerpc/ffi_powerpc.h: Likewise.

87883

+ * src/powerpc/ffi.c: Likewise.

87884

+ * src/powerpc/ffi_sysv.c: Likewise.

87885

+ * src/powerpc/ffi_linux64.c: Likewise.

87886

+ * src/powerpc/sysv.S: Likewise.

87887

+ * src/powerpc/ppc_closure.S: Likewise.

87888

+ * src/powerpc/linux64.S: Likewise.

87889

+ * src/powerpc/linux64_closure.S: Likewise.

87890

+ * src/types.c: Likewise.

87891

+ * Makefile.am (EXTRA_DIST): Add new src/powerpc files.

87892

+ (nodist_libffi_la_SOURCES <POWERPC, POWERPC_FREEBSD>): Likewise.

87893

+ * configure.ac (HAVE_LONG_DOUBLE_VARIANT): Define for powerpc.

87894

+ * include/ffi.h.in (ffi_prep_types): Declare.

87895

+ * src/prep_cif.c (ffi_prep_cif_core): Call ffi_prep_types.

87896

+ * configure: Regenerate.

87897

+ * fficonfig.h.in: Regenerate.

87898

+ * Makefile.in: Regenerate.

87899

+ * man/Makefile.in: Regenerate.

87900

+ * include/Makefile.in: Regenerate.

87901

+ * testsuite/Makefile.in: Regenerate.

87902

+

87903

+ * src/powerpc/ppc_closure.S: Don't bl .Luint128.

87904

+

87905

+ * src/powerpc/ffitarget.h: Import from upstream.

87906

+ * src/powerpc/ffi.c: Likewise.

87907

+ * src/powerpc/linux64.S: Likewise.

87908

+ * src/powerpc/linux64_closure.S: Likewise.

87909

+ * doc/libffi.texi: Likewise.

87910

+ * testsuite/libffi.call/cls_double_va.c: Likewise.

87911

+ * testsuite/libffi.call/cls_longdouble_va.c: Likewise.

87912

+

87913

2013-10-16 Release Manager

87914

87915

* GCC 4.8.2 released.

87916

Index: libffi/testsuite/Makefile.in

87917

===================================================================

87918

--- a/src/libffi/testsuite/Makefile.in (.../tags/gcc_4_8_2_release)

87919

+++ b/src/libffi/testsuite/Makefile.in (.../branches/gcc-4_8-branch)

87920

@@ -88,6 +88,7 @@

87921

FGREP = @FGREP@

87922

GREP = @GREP@

87923

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

87924

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

87925

INSTALL = @INSTALL@

87926

INSTALL_DATA = @INSTALL_DATA@

87927

INSTALL_PROGRAM = @INSTALL_PROGRAM@

87928

Index: libffi/testsuite/libffi.call/cls_double_va.c

87929

===================================================================

87930

--- a/src/libffi/testsuite/libffi.call/cls_double_va.c (.../tags/gcc_4_8_2_release)

87931

+++ b/src/libffi/testsuite/libffi.call/cls_double_va.c (.../branches/gcc-4_8-branch)

87932

@@ -38,7 +38,7 @@

87933

87934

/* This printf call is variadic */

87935

CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, &ffi_type_sint,

87936

- arg_types) == FFI_OK);

87937

+ arg_types) == FFI_OK);

87938

87939

args[0] = &format;

87940

args[1] = &doubleArg;

87941

@@ -45,19 +45,17 @@

87942

args[2] = NULL;

87943

87944

ffi_call(&cif, FFI_FN(printf), &res, args);

87945

- // { dg-output "7.0" }

87946

+ /* { dg-output "7.0" } */

87947

printf("res: %d\n", (int) res);

87948

- // { dg-output "\nres: 4" }

87949

+ /* { dg-output "\nres: 4" } */

87950

87951

- /* The call to cls_double_va_fn is static, so have to use a normal prep_cif */

87952

- CHECK(ffi_prep_cif(&cif, FFI_DEFAULT_ABI, 2, &ffi_type_sint, arg_types) == FFI_OK);

87953

+ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_double_va_fn, NULL,

87954

+ code) == FFI_OK);

87955

87956

- CHECK(ffi_prep_closure_loc(pcl, &cif, cls_double_va_fn, NULL, code) == FFI_OK);

87957

-

87958

- res = ((int(*)(char*, double))(code))(format, doubleArg);

87959

- // { dg-output "\n7.0" }

87960

+ res = ((int(*)(char*, ...))(code))(format, doubleArg);

87961

+ /* { dg-output "\n7.0" } */

87962

printf("res: %d\n", (int) res);

87963

- // { dg-output "\nres: 4" }

87964

+ /* { dg-output "\nres: 4" } */

87965

87966

exit(0);

87967

}

87968

Index: libffi/testsuite/libffi.call/cls_longdouble_va.c

87969

===================================================================

87970

--- a/src/libffi/testsuite/libffi.call/cls_longdouble_va.c (.../tags/gcc_4_8_2_release)

87971

+++ b/src/libffi/testsuite/libffi.call/cls_longdouble_va.c (.../branches/gcc-4_8-branch)

87972

@@ -38,7 +38,7 @@

87973

87974

/* This printf call is variadic */

87975

CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, &ffi_type_sint,

87976

- arg_types) == FFI_OK);

87977

+ arg_types) == FFI_OK);

87978

87979

args[0] = &format;

87980

args[1] = &ldArg;

87981

@@ -45,20 +45,17 @@

87982

args[2] = NULL;

87983

87984

ffi_call(&cif, FFI_FN(printf), &res, args);

87985

- // { dg-output "7.0" }

87986

+ /* { dg-output "7.0" } */

87987

printf("res: %d\n", (int) res);

87988

- // { dg-output "\nres: 4" }

87989

+ /* { dg-output "\nres: 4" } */

87990

87991

- /* The call to cls_longdouble_va_fn is static, so have to use a normal prep_cif */

87992

- CHECK(ffi_prep_cif(&cif, FFI_DEFAULT_ABI, 2, &ffi_type_sint,

87993

- arg_types) == FFI_OK);

87994

+ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_longdouble_va_fn, NULL,

87995

+ code) == FFI_OK);

87996

87997

- CHECK(ffi_prep_closure_loc(pcl, &cif, cls_longdouble_va_fn, NULL, code) == FFI_OK);

87998

-

87999

- res = ((int(*)(char*, long double))(code))(format, ldArg);

88000

- // { dg-output "\n7.0" }

88001

+ res = ((int(*)(char*, ...))(code))(format, ldArg);

88002

+ /* { dg-output "\n7.0" } */

88003

printf("res: %d\n", (int) res);

88004

- // { dg-output "\nres: 4" }

88005

+ /* { dg-output "\nres: 4" } */

88006

88007

exit(0);

88008

}

88009

Index: libffi/configure.ac

88010

===================================================================

88011

--- a/src/libffi/configure.ac (.../tags/gcc_4_8_2_release)

88012

+++ b/src/libffi/configure.ac (.../branches/gcc-4_8-branch)

88013

@@ -65,6 +65,7 @@

88014

AM_CONDITIONAL(TESTSUBDIR, test -d $srcdir/testsuite)

88015

88016

TARGETDIR="unknown"

88017

+HAVE_LONG_DOUBLE_VARIANT=0

88018

case "$host" in

88019

aarch64*-*-*)

88020

TARGET=AARCH64; TARGETDIR=aarch64

88021

@@ -162,6 +163,7 @@

88022

88023

powerpc*-*-linux* | powerpc-*-sysv*)

88024

TARGET=POWERPC; TARGETDIR=powerpc

88025

+ HAVE_LONG_DOUBLE_VARIANT=1

88026

;;

88027

powerpc-*-amigaos*)

88028

TARGET=POWERPC; TARGETDIR=powerpc

88029

@@ -177,6 +179,7 @@

88030

;;

88031

powerpc-*-freebsd* | powerpc-*-openbsd*)

88032

TARGET=POWERPC_FREEBSD; TARGETDIR=powerpc

88033

+ HAVE_LONG_DOUBLE_VARIANT=1

88034

;;

88035

powerpc64-*-freebsd*)

88036

TARGET=POWERPC; TARGETDIR=powerpc

88037

@@ -273,14 +276,20 @@

88038

# Also AC_SUBST this variable for ffi.h.

88039

if test -z "$HAVE_LONG_DOUBLE"; then

88040

HAVE_LONG_DOUBLE=0

88041

- if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

88042

- if test $ac_cv_sizeof_long_double != 0; then

88043

+ if test $ac_cv_sizeof_long_double != 0; then

88044

+ if test $HAVE_LONG_DOUBLE_VARIANT != 0; then

88045

+ AC_DEFINE(HAVE_LONG_DOUBLE_VARIANT, 1, [Define if you support more than one size of the long double type])

88046

HAVE_LONG_DOUBLE=1

88047

- AC_DEFINE(HAVE_LONG_DOUBLE, 1, [Define if you have the long double type and it is bigger than a double])

88048

+ else

88049

+ if test $ac_cv_sizeof_double != $ac_cv_sizeof_long_double; then

88050

+ HAVE_LONG_DOUBLE=1

88051

+ AC_DEFINE(HAVE_LONG_DOUBLE, 1, [Define if you have the long double type and it is bigger than a double])

88052

+ fi

88053

fi

88054

fi

88055

fi

88056

AC_SUBST(HAVE_LONG_DOUBLE)

88057

+AC_SUBST(HAVE_LONG_DOUBLE_VARIANT)

88058

88059

AC_C_BIGENDIAN

88060

88061

Index: libffi/Makefile.am

88062

===================================================================

88063

--- a/src/libffi/Makefile.am (.../tags/gcc_4_8_2_release)

88064

+++ b/src/libffi/Makefile.am (.../branches/gcc-4_8-branch)

88065

@@ -15,10 +15,12 @@

88066

src/ia64/unix.S src/mips/ffi.c src/mips/n32.S src/mips/o32.S \

88067

src/mips/ffitarget.h src/m32r/ffi.c src/m32r/sysv.S \

88068

src/m32r/ffitarget.h src/m68k/ffi.c src/m68k/sysv.S \

88069

- src/m68k/ffitarget.h src/powerpc/ffi.c src/powerpc/sysv.S \

88070

- src/powerpc/linux64.S src/powerpc/linux64_closure.S \

88071

- src/powerpc/ppc_closure.S src/powerpc/asm.h \

88072

- src/powerpc/aix.S src/powerpc/darwin.S \

88073

+ src/m68k/ffitarget.h \

88074

+ src/powerpc/ffi.c src/powerpc/ffi_powerpc.h \

88075

+ src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c \

88076

+ src/powerpc/sysv.S src/powerpc/linux64.S \

88077

+ src/powerpc/linux64_closure.S src/powerpc/ppc_closure.S \

88078

+ src/powerpc/asm.h src/powerpc/aix.S src/powerpc/darwin.S \

88079

src/powerpc/aix_closure.S src/powerpc/darwin_closure.S \

88080

src/powerpc/ffi_darwin.c src/powerpc/ffitarget.h \

88081

src/s390/ffi.c src/s390/sysv.S src/s390/ffitarget.h \

88082

@@ -179,7 +181,7 @@

88083

nodist_libffi_la_SOURCES += src/m68k/ffi.c src/m68k/sysv.S

88084

endif

88085

if POWERPC

88086

-nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

88087

+nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/ffi_linux64.c src/powerpc/sysv.S src/powerpc/ppc_closure.S src/powerpc/linux64.S src/powerpc/linux64_closure.S

88088

endif

88089

if POWERPC_AIX

88090

nodist_libffi_la_SOURCES += src/powerpc/ffi_darwin.c src/powerpc/aix.S src/powerpc/aix_closure.S

88091

@@ -188,7 +190,7 @@

88092

nodist_libffi_la_SOURCES += src/powerpc/ffi_darwin.c src/powerpc/darwin.S src/powerpc/darwin_closure.S

88093

endif

88094

if POWERPC_FREEBSD

88095

-nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

88096

+nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/ffi_sysv.c src/powerpc/sysv.S src/powerpc/ppc_closure.S

88097

endif

88098

if AARCH64

88099

nodist_libffi_la_SOURCES += src/aarch64/sysv.S src/aarch64/ffi.c

88100

Index: libffi/man/Makefile.in

88101

===================================================================

88102

--- a/src/libffi/man/Makefile.in (.../tags/gcc_4_8_2_release)

88103

+++ b/src/libffi/man/Makefile.in (.../branches/gcc-4_8-branch)

88104

@@ -111,6 +111,7 @@

88105

FGREP = @FGREP@

88106

GREP = @GREP@

88107

HAVE_LONG_DOUBLE = @HAVE_LONG_DOUBLE@

88108

+HAVE_LONG_DOUBLE_VARIANT = @HAVE_LONG_DOUBLE_VARIANT@

88109

INSTALL = @INSTALL@

88110

INSTALL_DATA = @INSTALL_DATA@

88111

INSTALL_PROGRAM = @INSTALL_PROGRAM@

88112

Index: libssp/configure

88113

===================================================================

88114

--- a/src/libssp/configure (.../tags/gcc_4_8_2_release)

88115

+++ b/src/libssp/configure (.../branches/gcc-4_8-branch)

88116

@@ -6385,7 +6385,7 @@

88117

rm -rf conftest*

88118

;;

88119

88120

-x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \

88121

+x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \

88122

s390*-*linux*|s390*-*tpf*|sparc*-*linux*)

88123

# Find out which ABI we are using.

88124

echo 'int i;' > conftest.$ac_ext

88125

@@ -6410,7 +6410,10 @@

88126

;;

88127

esac

88128

;;

88129

- ppc64-*linux*|powerpc64-*linux*)

88130

+ powerpc64le-*linux*)

88131

+ LD="${LD-ld} -m elf32lppclinux"

88132

+ ;;

88133

+ powerpc64-*linux*)

88134

LD="${LD-ld} -m elf32ppclinux"

88135

;;

88136

s390x-*linux*)

88137

@@ -6429,7 +6432,10 @@

88138

x86_64-*linux*)

88139

LD="${LD-ld} -m elf_x86_64"

88140

;;

88141

- ppc*-*linux*|powerpc*-*linux*)

88142

+ powerpcle-*linux*)

88143

+ LD="${LD-ld} -m elf64lppc"

88144

+ ;;

88145

+ powerpc-*linux*)

88146

LD="${LD-ld} -m elf64ppc"

88147

;;

88148

s390*-*linux*|s390*-*tpf*)

88149

@@ -10658,7 +10664,7 @@

88150

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

88151

lt_status=$lt_dlunknown

88152

cat > conftest.$ac_ext <<_LT_EOF

88153

-#line 10661 "configure"

88154

+#line 10667 "configure"

88155

#include "confdefs.h"

88156

88157

#if HAVE_DLFCN_H

88158

@@ -10764,7 +10770,7 @@

88159

lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2

88160

lt_status=$lt_dlunknown

88161

cat > conftest.$ac_ext <<_LT_EOF

88162

-#line 10767 "configure"

88163

+#line 10773 "configure"

88164

#include "confdefs.h"

88165

88166

#if HAVE_DLFCN_H

88167

Index: libssp/ChangeLog

88168

===================================================================

88169

--- a/src/libssp/ChangeLog (.../tags/gcc_4_8_2_release)

88170

+++ b/src/libssp/ChangeLog (.../branches/gcc-4_8-branch)

88171

@@ -1,3 +1,10 @@

88172

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

88173

+

88174

+ Backport from mainline

88175

+ 2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>

88176

+

88177

+ * configure: Regenerate.

88178

+

88179

2013-10-16 Release Manager

88180

88181

* GCC 4.8.2 released.

88182

Index: libcpp/macro.c

88183

===================================================================

88184

--- a/src/libcpp/macro.c (.../tags/gcc_4_8_2_release)

88185

+++ b/src/libcpp/macro.c (.../branches/gcc-4_8-branch)

88186

@@ -1108,21 +1108,22 @@

88187

88188

if (macro->paramc == 0)

88189

{

88190

+ unsigned tokens_count = macro_real_token_count (macro);

88191

if (CPP_OPTION (pfile, track_macro_expansion))

88192

{

88193

- unsigned int i, count = macro->count;

88194

+ unsigned int i;

88195

const cpp_token *src = macro->exp.tokens;

88196

const struct line_map *map;

88197

source_location *virt_locs = NULL;

88198

- _cpp_buff *macro_tokens =

88199

- tokens_buff_new (pfile, count, &virt_locs);

88200

+ _cpp_buff *macro_tokens

88201

+ = tokens_buff_new (pfile, tokens_count, &virt_locs);

88202

88203

/* Create a macro map to record the locations of the

88204

tokens that are involved in the expansion. LOCATION

88205

is the location of the macro expansion point. */

88206

- map = linemap_enter_macro (pfile->line_table,

88207

- node, location, count);

88208

- for (i = 0; i < count; ++i)

88209

+ map = linemap_enter_macro (pfile->line_table,

88210

+ node, location, tokens_count);

88211

+ for (i = 0; i < tokens_count; ++i)

88212

{

88213

tokens_buff_add_token (macro_tokens, virt_locs,

88214

src, src->src_loc,

88215

@@ -1134,16 +1135,12 @@

88216

virt_locs,

88217

(const cpp_token **)

88218

macro_tokens->base,

88219

- count);

88220

- num_macro_tokens_counter += count;

88221

+ tokens_count);

88222

}

88223

else

88224

- {

88225

- unsigned tokens_count = macro_real_token_count (macro);

88226

- _cpp_push_token_context (pfile, node, macro->exp.tokens,

88227

- tokens_count);

88228

- num_macro_tokens_counter += tokens_count;

88229

- }

88230

+ _cpp_push_token_context (pfile, node, macro->exp.tokens,

88231

+ tokens_count);

88232

+ num_macro_tokens_counter += tokens_count;

88233

}

88234

88235

if (pragma_buff)

88236

Index: libcpp/line-map.c

88237

===================================================================

88238

--- a/src/libcpp/line-map.c (.../tags/gcc_4_8_2_release)

88239

+++ b/src/libcpp/line-map.c (.../branches/gcc-4_8-branch)

88240

@@ -1024,6 +1024,11 @@

88241

bool pre_virtual_p, post_virtual_p;

88242

source_location l0 = pre, l1 = post;

88243

88244

+ if (IS_ADHOC_LOC (l0))

88245

+ l0 = set->location_adhoc_data_map.data[l0 & MAX_SOURCE_LOCATION].locus;

88246

+ if (IS_ADHOC_LOC (l1))

88247

+ l1 = set->location_adhoc_data_map.data[l1 & MAX_SOURCE_LOCATION].locus;

88248

+

88249

if (l0 == l1)

88250

return 0;

88251

88252

Index: libcpp/files.c

88253

===================================================================

88254

--- a/src/libcpp/files.c (.../tags/gcc_4_8_2_release)

88255

+++ b/src/libcpp/files.c (.../branches/gcc-4_8-branch)

88256

@@ -983,6 +983,7 @@

88257

{

88258

struct cpp_dir *dir;

88259

_cpp_file *file;

88260

+ bool stacked;

88261

88262

dir = search_path_head (pfile, fname, angle_brackets, type);

88263

if (!dir)

88264

@@ -993,19 +994,26 @@

88265

if (type == IT_DEFAULT && file == NULL)

88266

return false;

88267

88268

- /* Compensate for the increment in linemap_add that occurs in

88269

- _cpp_stack_file. In the case of a normal #include, we're

88270

- currently at the start of the line *following* the #include. A

88271

- separate source_location for this location makes no sense (until

88272

- we do the LC_LEAVE), and complicates LAST_SOURCE_LINE_LOCATION.

88273

- This does not apply if we found a PCH file (in which case

88274

- linemap_add is not called) or we were included from the

88275

- command-line. */

88276

+ /* Compensate for the increment in linemap_add that occurs if

88277

+ _cpp_stack_file actually stacks the file. In the case of a

88278

+ normal #include, we're currently at the start of the line

88279

+ *following* the #include. A separate source_location for this

88280

+ location makes no sense (until we do the LC_LEAVE), and

88281

+ complicates LAST_SOURCE_LINE_LOCATION. This does not apply if we

88282

+ found a PCH file (in which case linemap_add is not called) or we

88283

+ were included from the command-line. */

88284

if (file->pchname == NULL && file->err_no == 0

88285

&& type != IT_CMDLINE && type != IT_DEFAULT)

88286

pfile->line_table->highest_location--;

88287

88288

- return _cpp_stack_file (pfile, file, type == IT_IMPORT);

88289

+ stacked = _cpp_stack_file (pfile, file, type == IT_IMPORT);

88290

+

88291

+ if (!stacked)

88292

+ /* _cpp_stack_file didn't stack the file, so let's rollback the

88293

+ compensation dance we performed above. */

88294

+ pfile->line_table->highest_location++;

88295

+

88296

+ return stacked;

88297

}

88298

88299

/* Could not open FILE. The complication is dependency output. */

88300

Index: libcpp/ChangeLog

88301

===================================================================

88302

--- a/src/libcpp/ChangeLog (.../tags/gcc_4_8_2_release)

88303

+++ b/src/libcpp/ChangeLog (.../branches/gcc-4_8-branch)

88304

@@ -1,3 +1,36 @@

88305

+2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

88306

+

88307

+ Backport from mainline

88308

+ 2013-11-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>

88309

+

88310

+ * lex.c (search_line_fast): Correct for little endian.

88311

+

88312

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

88313

+

88314

+ Backport from mainline

88315

+ 2014-02-19 Jakub Jelinek <jakub@redhat.com>

88316

+

88317

+ PR preprocessor/58844

88318

+ * macro.c (enter_macro_context): Only push

88319

+ macro_real_token_count (macro) tokens rather than

88320

+ macro->count tokens, regardless of

88321

+ CPP_OPTION (pfile, track-macro-expansion).

88322

+

88323

+ 2014-02-07 Jakub Jelinek <jakub@redhat.com>

88324

+

88325

+ PR preprocessor/56824

88326

+ * line-map.c (linemap_compare_locations): Look through adhoc locations

88327

+ for both l0 and l1.

88328

+

88329

+2014-03-06 Jakub Jelinek <jakub@redhat.com>

88330

+

88331

+ PR preprocessor/60400

88332

+ Backport from mainline

88333

+ 2013-06-24 Dehao Chen <dehao@google.com>

88334

+

88335

+ * files.c (_cpp_stack_include): Fix the highest_location when header

88336

+ file is guarded by #ifndef and is included twice.

88337

+

88338

2013-10-16 Release Manager

88339

88340

* GCC 4.8.2 released.

88341

Index: libcpp/lex.c

88342

===================================================================

88343

--- a/src/libcpp/lex.c (.../tags/gcc_4_8_2_release)

88344

+++ b/src/libcpp/lex.c (.../branches/gcc-4_8-branch)

88345

@@ -559,8 +559,13 @@

88346

beginning with all ones and shifting in zeros according to the

88347

mis-alignment. The LVSR instruction pulls the exact shift we

88348

want from the address. */

88349

+#ifdef __BIG_ENDIAN__

88350

mask = __builtin_vec_lvsr(0, s);

88351

mask = __builtin_vec_perm(zero, ones, mask);

88352

+#else

88353

+ mask = __builtin_vec_lvsl(0, s);

88354

+ mask = __builtin_vec_perm(ones, zero, mask);

88355

+#endif

88356

data &= mask;

88357

88358

/* While altivec loads mask addresses, we still need to align S so

88359

@@ -624,7 +629,11 @@

88360

/* L now contains 0xff in bytes for which we matched one of the

88361

relevant characters. We can find the byte index by finding

88362

its bit index and dividing by 8. */

88363

+#ifdef __BIG_ENDIAN__

88364

l = __builtin_clzl(l) >> 3;

88365

+#else

88366

+ l = __builtin_ctzl(l) >> 3;

88367

+#endif

88368

return s + l;

88369

88370

#undef N

88371

Index: libcpp/po/pt_BR.po

88372

===================================================================

88373

--- a/src/libcpp/po/pt_BR.po (.../tags/gcc_4_8_2_release)

88374

+++ b/src/libcpp/po/pt_BR.po (.../branches/gcc-4_8-branch)

88375

@@ -0,0 +1,908 @@

88376

+# Brazilian Portuguese translation for cpplib

88377

88378

+# This file is distributed under the same license as the gcc package.

88379

+# Rafael Ferreira <rafael.f.f1@gmail.com>, 2013.

88380

+#

88381

+msgid ""

88382

+msgstr ""

88383

+"Project-Id-Version: cpplib 4.8.0\n"

88384

+"Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n"

88385

+"POT-Creation-Date: 2013-03-15 17:42+0000\n"

88386

+"PO-Revision-Date: 2013-12-18 03:12-0300\n"

88387

+"Last-Translator: Rafael Ferreira <rafael.f.f1@gmail.com>\n"

88388

+"Language-Team: Brazilian Portuguese <ldpbr-translation@lists.sourceforge.net>\n"

88389

+"Language: pt_BR\n"

88390

+"MIME-Version: 1.0\n"

88391

+"Content-Type: text/plain; charset=UTF-8\n"

88392

+"Content-Transfer-Encoding: 8bit\n"

88393

+"X-Generator: Poedit 1.5.7\n"

88394

+"Plural-Forms: nplurals=2; plural=(n > 1);\n"

88395

+

88396

+#: charset.c:673

88397

+#, c-format

88398

+msgid "conversion from %s to %s not supported by iconv"

88399

+msgstr "sem suporte a conversão de %s para %s por iconv"

88400

+

88401

+#: charset.c:676

88402

+msgid "iconv_open"

88403

+msgstr "iconv_open"

88404

+

88405

+#: charset.c:684

88406

+#, c-format

88407

+msgid "no iconv implementation, cannot convert from %s to %s"

88408

+msgstr "nenhuma implementação iconv, não foi possível converter de %s para %s"

88409

+

88410

+#: charset.c:780

88411

+#, c-format

88412

+msgid "character 0x%lx is not in the basic source character set\n"

88413

+msgstr "caractere 0x%lx não está no conjunto de caracteres fonte básico\n"

88414

+

88415

+#: charset.c:797 charset.c:1443

88416

+msgid "converting to execution character set"

88417

+msgstr "convertendo para conjunto de caracteres da execução"

88418

+

88419

+#: charset.c:803

88420

+#, c-format

88421

+msgid "character 0x%lx is not unibyte in execution character set"

88422

+msgstr "caractere 0x%lx não é unibyte no conjunto de caracteres de execução"

88423

+

88424

+#: charset.c:927

88425

+#, c-format

88426

+msgid "Character %x might not be NFKC"

88427

+msgstr "Caractere %x pode não ser NFKC"

88428

+

88429

+#: charset.c:993

88430

+msgid "universal character names are only valid in C++ and C99"

88431

+msgstr "nomes de caractere universais são válidos apenas em C++ e C99"

88432

+

88433

+#: charset.c:996

88434

+#, c-format

88435

+msgid "the meaning of '\\%c' is different in traditional C"

88436

+msgstr "o significado de \"\\%c\" é diferente em C tradicional"

88437

+

88438

+#: charset.c:1005

88439

+msgid "In _cpp_valid_ucn but not a UCN"

88440

+msgstr "Em _cpp_valid_ucn, mas não é um UCN"

88441

+

88442

+#: charset.c:1030

88443

+#, c-format

88444

+msgid "incomplete universal character name %.*s"

88445

+msgstr "nome de caractere universal incompleto %.*s"

88446

+

88447

+#: charset.c:1045

88448

+#, c-format

88449

+msgid "%.*s is not a valid universal character"

88450

+msgstr "%.*s não é um caractere universal válido"

88451

+

88452

+#: charset.c:1055 lex.c:1117

88453

+msgid "'$' in identifier or number"

88454

+msgstr "\"$\" em identificador ou número"

88455

+

88456

+#: charset.c:1065

88457

+#, c-format

88458

+msgid "universal character %.*s is not valid in an identifier"

88459

+msgstr "caractere universal %.*s não é válido em um identificador"

88460

+

88461

+#: charset.c:1069

88462

+#, c-format

88463

+msgid "universal character %.*s is not valid at the start of an identifier"

88464

+msgstr "caractere universal %.*s não é válido no começo de um identificador"

88465

+

88466

+#: charset.c:1101 charset.c:1673

88467

+msgid "converting UCN to source character set"

88468

+msgstr "convertendo UCN para conjunto de caracteres fonte"

88469

+

88470

+#: charset.c:1105

88471

+msgid "converting UCN to execution character set"

88472

+msgstr "convertendo UCN para conjunto de caracteres de execução"

88473

+

88474

+#: charset.c:1177

88475

+msgid "the meaning of '\\x' is different in traditional C"

88476

+msgstr "o significado de \"\\x\" é diferente em C tradicional"

88477

+

88478

+#: charset.c:1194

88479

+msgid "\\x used with no following hex digits"

88480

+msgstr "\\x usado com nenhum dígito hexa"

88481

+

88482

+#: charset.c:1201

88483

+msgid "hex escape sequence out of range"

88484

+msgstr "sequência de escape hexa fora de alcance"

88485

+

88486

+#: charset.c:1239

88487

+msgid "octal escape sequence out of range"

88488

+msgstr "sequência de escape octal fora de alcance"

88489

+

88490

+#: charset.c:1305

88491

+msgid "the meaning of '\\a' is different in traditional C"

88492

+msgstr "o significado de \"\\a\" é diferente em C tradicional"

88493

+

88494

+#: charset.c:1312

88495

+#, c-format

88496

+msgid "non-ISO-standard escape sequence, '\\%c'"

88497

+msgstr "sequência de escape não padrão ISO, \"\\%c\""

88498

+

88499

+#: charset.c:1320

88500

+#, c-format

88501

+msgid "unknown escape sequence: '\\%c'"

88502

+msgstr "sequência de escape desconhecida: \"\\%c\""

88503

+

88504

+#: charset.c:1328

88505

+#, c-format

88506

+msgid "unknown escape sequence: '\\%s'"

88507

+msgstr "sequência de escape desconhecida: \"\\%s\""

88508

+

88509

+#: charset.c:1335

88510

+msgid "converting escape sequence to execution character set"

88511

+msgstr "convertendo sequência de escape para conjunto de caracteres de execução"

88512

+

88513

+#: charset.c:1508 charset.c:1572

88514

+msgid "character constant too long for its type"

88515

+msgstr "constante caractere muito longa para seu tipo"

88516

+

88517

+#: charset.c:1511

88518

+msgid "multi-character character constant"

88519

+msgstr "constante de caractere multi-caractere"

88520

+

88521

+#: charset.c:1611

88522

+msgid "empty character constant"

88523

+msgstr "constante caractere vazia"

88524

+

88525

+#: charset.c:1720

88526

+#, c-format

88527

+msgid "failure to convert %s to %s"

88528

+msgstr "falha ao converter %s para %s"

88529

+

88530

+#: directives.c:224 directives.c:250

88531

+#, c-format

88532

+msgid "extra tokens at end of #%s directive"

88533

+msgstr "tokens extras ao final da diretiva %#s"

88534

+

88535

+#: directives.c:357

88536

+#, c-format

88537

+msgid "#%s is a GCC extension"

88538

+msgstr "#%s é uma extensão GCC"

88539

+

88540

+#: directives.c:362

88541

+#, c-format

88542

+msgid "#%s is a deprecated GCC extension"

88543

+msgstr "#%s é uma extensão GCC obsoleta"

88544

+

88545

+#: directives.c:375

88546

+msgid "suggest not using #elif in traditional C"

88547

+msgstr "sugere-se não usar #elif em C tradicional"

88548

+

88549

+#: directives.c:378

88550

+#, c-format

88551

+msgid "traditional C ignores #%s with the # indented"

88552

+msgstr "C tradicional ignora #%s com o # com recuo"

88553

+

88554

+#: directives.c:382

88555

+#, c-format

88556

+msgid "suggest hiding #%s from traditional C with an indented #"

88557

+msgstr "sugere-se ocultar #%s do C tradicional com um # com recuo"

88558

+

88559

+#: directives.c:408

88560

+msgid "embedding a directive within macro arguments is not portable"

88561

+msgstr "embutir uma diretiva dentro de argumentos macro não é portátil"

88562

+

88563

+#: directives.c:428

88564

+msgid "style of line directive is a GCC extension"

88565

+msgstr "estilo de diretiva de linha é uma extensão GCC"

88566

+

88567

+#: directives.c:483

88568

+#, c-format

88569

+msgid "invalid preprocessing directive #%s"

88570

+msgstr "diretiva de preprocessamento inválida #%s"

88571

+

88572

+#: directives.c:551

88573

+msgid "\"defined\" cannot be used as a macro name"

88574

+msgstr "\"defined\" não pode ser usado como um nome de macro"

88575

+

88576

+#: directives.c:557

88577

+#, c-format

88578

+msgid "\"%s\" cannot be used as a macro name as it is an operator in C++"

88579

+msgstr "\"%s\" não pode ser usado como um nome de macro, pois é um operador em C++"

88580

+

88581

+#: directives.c:560

88582

+#, c-format

88583

+msgid "no macro name given in #%s directive"

88584

+msgstr "nenhum nome de macro fornecido na diretiva #%s"

88585

+

88586

+#: directives.c:563

88587

+msgid "macro names must be identifiers"

88588

+msgstr "nomes de macro devem ser identificadores"

88589

+

88590

+#: directives.c:612

88591

+#, c-format

88592

+msgid "undefining \"%s\""

88593

+msgstr "removendo definição de \"%s\""

88594

+

88595

+#: directives.c:667

88596

+msgid "missing terminating > character"

88597

+msgstr "faltando caractere terminador >"

88598

+

88599

+#: directives.c:726

88600

+#, c-format

88601

+msgid "#%s expects \"FILENAME\" or <FILENAME>"

88602

+msgstr "#%s espera \"NOME DE ARQUIVO\" OU <NOME DE ARQUIVO>"

88603

+

88604

+#: directives.c:772

88605

+#, c-format

88606

+msgid "empty filename in #%s"

88607

+msgstr "nome de arquivo vazio em #%s"

88608

+

88609

+#: directives.c:782

88610

+msgid "#include nested too deeply"

88611

+msgstr "#include aninhado profundo demais"

88612

+

88613

+#: directives.c:823

88614

+msgid "#include_next in primary source file"

88615

+msgstr "#include_next no arquivo fonte primário"

88616

+

88617

+#: directives.c:849

88618

+#, c-format

88619

+msgid "invalid flag \"%s\" in line directive"

88620

+msgstr "opção inválida \"%s\" na diretiva line"

88621

+

88622

+#: directives.c:909

88623

+msgid "unexpected end of file after #line"

88624

+msgstr "fim de arquivo inesperado após #line"

88625

+

88626

+#: directives.c:912

88627

+#, c-format

88628

+msgid "\"%s\" after #line is not a positive integer"

88629

+msgstr "\"%s\" após #line não é um inteiro positivo"

88630

+

88631

+#: directives.c:918 directives.c:920

88632

+msgid "line number out of range"

88633

+msgstr "número da linha fora de alcance"

88634

+

88635

+#: directives.c:933 directives.c:1013

88636

+#, c-format

88637

+msgid "\"%s\" is not a valid filename"

88638

+msgstr "\"%s\" não é um nome de arquivo válido"

88639

+

88640

+#: directives.c:973

88641

+#, c-format

88642

+msgid "\"%s\" after # is not a positive integer"

88643

+msgstr "\"%s\" após # não é um inteiro positivo"

88644

+

88645

+#: directives.c:1068 directives.c:1070 directives.c:1072 directives.c:1658

88646

+#, c-format

88647

+msgid "%s"

88648

+msgstr "%s"

88649

+

88650

+#: directives.c:1096

88651

+#, c-format

88652

+msgid "invalid #%s directive"

88653

+msgstr "diretiva inválida #%s"

88654

+

88655

+#: directives.c:1159

88656

+#, c-format

88657

+msgid "registering pragmas in namespace \"%s\" with mismatched name expansion"

88658

+msgstr "registrando pragmas em espaço de nomes \"%s\" com expansão de nome incompatível"

88659

+

88660

+#: directives.c:1168

88661

+#, c-format

88662

+msgid "registering pragma \"%s\" with name expansion and no namespace"

88663

+msgstr "registrando pragma \"%s\" com expansão de nome e nenhum espaço de nomes"

88664

+

88665

+#: directives.c:1186

88666

+#, c-format

88667

+msgid "registering \"%s\" as both a pragma and a pragma namespace"

88668

+msgstr "registrando \"%s\" como tanto um pragma e um espaço de nomes de pragma"

88669

+

88670

+#: directives.c:1189

88671

+#, c-format

88672

+msgid "#pragma %s %s is already registered"

88673

+msgstr "#pragma %s %s já está registrado"

88674

+

88675

+#: directives.c:1192

88676

+#, c-format

88677

+msgid "#pragma %s is already registered"

88678

+msgstr "#pragma %s já está registrado"

88679

+

88680

+#: directives.c:1222

88681

+msgid "registering pragma with NULL handler"

88682

+msgstr "registrando pragma com manipulador NULO"

88683

+

88684

+#: directives.c:1439

88685

+msgid "#pragma once in main file"

88686

+msgstr "#pragma ocorre uma vez no arquivo principal"

88687

+

88688

+#: directives.c:1462

88689

+msgid "invalid #pragma push_macro directive"

88690

+msgstr "diretiva inválida #pragma push_macro"

88691

+

88692

+#: directives.c:1517

88693

+msgid "invalid #pragma pop_macro directive"

88694

+msgstr "diretiva inválida #pragma pop_macro"

88695

+

88696

+#: directives.c:1572

88697

+msgid "invalid #pragma GCC poison directive"

88698

+msgstr "diretiva inválida #pragma GCC poison"

88699

+

88700

+#: directives.c:1581

88701

+#, c-format

88702

+msgid "poisoning existing macro \"%s\""

88703

+msgstr "envenenando macro existente \"%s\""

88704

+

88705

+#: directives.c:1600

88706

+msgid "#pragma system_header ignored outside include file"

88707

+msgstr "#pragma system_header ignorado fora do arquivo include"

88708

+

88709

+#: directives.c:1625

88710

+#, c-format

88711

+msgid "cannot find source file %s"

88712

+msgstr "não foi possível localizar o arquivo fonte %s"

88713

+

88714

+#: directives.c:1629

88715

+#, c-format

88716

+msgid "current file is older than %s"

88717

+msgstr "arquivo atual é mais velho do que %s"

88718

+

88719

+#: directives.c:1653

88720

+#, c-format

88721

+msgid "invalid \"#pragma GCC %s\" directive"

88722

+msgstr "diretiva inválida \"#pragma GCC %s\""

88723

+

88724

+#: directives.c:1847

88725

+msgid "_Pragma takes a parenthesized string literal"

88726

+msgstr "_Pragma leva uma literal de string entre parenteses"

88727

+

88728

+#: directives.c:1968

88729

+msgid "#else without #if"

88730

+msgstr "#else sem #if"

88731

+

88732

+#: directives.c:1973

88733

+msgid "#else after #else"

88734

+msgstr "#else após #else"

88735

+

88736

+#: directives.c:1975 directives.c:2008

88737

+msgid "the conditional began here"

88738

+msgstr "a condicional começou aqui"

88739

+

88740

+#: directives.c:2001

88741

+msgid "#elif without #if"

88742

+msgstr "#elif sem #if"

88743

+

88744

+#: directives.c:2006

88745

+msgid "#elif after #else"

88746

+msgstr "#elif após #else"

88747

+

88748

+#: directives.c:2044

88749

+msgid "#endif without #if"

88750

+msgstr "#endif sem #if"

88751

+

88752

+#: directives.c:2124

88753

+msgid "missing '(' after predicate"

88754

+msgstr "faltando \"(\" após predicado"

88755

+

88756

+#: directives.c:2139

88757

+msgid "missing ')' to complete answer"

88758

+msgstr "faltando \")\" para uma resposta completa"

88759

+

88760

+#: directives.c:2159

88761

+msgid "predicate's answer is empty"

88762

+msgstr "resposta do predicado está vazia"

88763

+

88764

+#: directives.c:2186

88765

+msgid "assertion without predicate"

88766

+msgstr "asserção sem predicado"

88767

+

88768

+#: directives.c:2189

88769

+msgid "predicate must be an identifier"

88770

+msgstr "predicado deve ser um identificador"

88771

+

88772

+#: directives.c:2275

88773

+#, c-format

88774

+msgid "\"%s\" re-asserted"

88775

+msgstr "\"%s\" re-assertado"

88776

+

88777

+#: directives.c:2567

88778

+#, c-format

88779

+msgid "unterminated #%s"

88780

+msgstr "#%s não terminado"

88781

+

88782

+#: directives-only.c:221 lex.c:2234 traditional.c:162

88783

+msgid "unterminated comment"

88784

+msgstr "comentário não terminado"

88785

+

88786

+#: errors.c:234

88787

+msgid "stdout"

88788

+msgstr "saída padrão"

88789

+

88790

+#: errors.c:236

88791

+#, c-format

88792

+msgid "%s: %s"

88793

+msgstr "%s: %s"

88794

+

88795

+#: expr.c:479 expr.c:577

88796

+msgid "fixed-point constants are a GCC extension"

88797

+msgstr "constantes de ponto fixo (fixed-point constants) é uma extensão GCC"

88798

+

88799

+#: expr.c:504

88800

+msgid "invalid prefix \"0b\" for floating constant"

88801

+msgstr "prefixo inválido \"0b\" para constante flutuante"

88802

+

88803

+#: expr.c:514

88804

+msgid "use of C99 hexadecimal floating constant"

88805

+msgstr "uso de constante flutuante hexadecimal de C99"

88806

+

88807

+#: expr.c:545

88808

+#, c-format

88809

+msgid "invalid suffix \"%.*s\" on floating constant"

88810

+msgstr "sufixo inválido \"%.*s\" na constante flutuante"

88811

+

88812

+#: expr.c:556 expr.c:616

88813

+#, c-format

88814

+msgid "traditional C rejects the \"%.*s\" suffix"

88815

+msgstr "C tradicional rejeita o sufixo \"%.*s\""

88816

+

88817

+#: expr.c:564

88818

+msgid "suffix for double constant is a GCC extension"

88819

+msgstr "sufixo para constante dupla (suffix for double constant) é uma extensão GCC"

88820

+

88821

+#: expr.c:570

88822

+#, c-format

88823

+msgid "invalid suffix \"%.*s\" with hexadecimal floating constant"

88824

+msgstr "sufixo inválido \"%.*s\" com constante flutuante hexadecimal"

88825

+

88826

+#: expr.c:581

88827

+msgid "decimal float constants are a GCC extension"

88828

+msgstr "constantes flutuante decimais (decimal float constants) é uma extensão GCC"

88829

+

88830

+#: expr.c:599

88831

+#, c-format

88832

+msgid "invalid suffix \"%.*s\" on integer constant"

88833

+msgstr "sufixo inválido \"%.*s\" em constante inteiro"

88834

+

88835

+#: expr.c:624

88836

+msgid "use of C++0x long long integer constant"

88837

+msgstr "uso de constante longo longo inteiro de C++0x"

88838

+

88839

+#: expr.c:625

88840

+msgid "use of C99 long long integer constant"

88841

+msgstr "uso de constante longo longo inteiro de C99"

88842

+

88843

+#: expr.c:641

88844

+msgid "imaginary constants are a GCC extension"

88845

+msgstr "constantes imaginárias (imaginary constants) é uma extensão GCC"

88846

+

88847

+#: expr.c:644

88848

+msgid "binary constants are a GCC extension"

88849

+msgstr "constantes binárias (binary constants) é uma extensão GCC"

88850

+

88851

+#: expr.c:737

88852

+msgid "integer constant is too large for its type"

88853

+msgstr "constante inteira é muito grande para seu tipo"

88854

+

88855

+#: expr.c:768

88856

+msgid "integer constant is so large that it is unsigned"

88857

+msgstr "constante inteira é tão grande que não está assinada"

88858

+

88859

+#: expr.c:863

88860

+msgid "missing ')' after \"defined\""

88861

+msgstr "faltando \")\" após \"defined\""

88862

+

88863

+#: expr.c:870

88864

+msgid "operator \"defined\" requires an identifier"

88865

+msgstr "operador \"defined\" requer um identificador"

88866

+

88867

+#: expr.c:878

88868

+#, c-format

88869

+msgid "(\"%s\" is an alternative token for \"%s\" in C++)"

88870

+msgstr "(\"%s\" é um token alternativo para \"%s\" em C++)"

88871

+

88872

+#: expr.c:888

88873

+msgid "this use of \"defined\" may not be portable"

88874

+msgstr "esse uso de \"defined\" pode não ser portátil"

88875

+

88876

+#: expr.c:948

88877

+msgid "user-defined literal in preprocessor expression"

88878

+msgstr "literal definida pelo usuário em expressão do preprocessador"

88879

+

88880

+#: expr.c:953

88881

+msgid "floating constant in preprocessor expression"

88882

+msgstr "constante flutuante em expressão do preprocessador"

88883

+

88884

+#: expr.c:959

88885

+msgid "imaginary number in preprocessor expression"

88886

+msgstr "número imaginário em expressão do preprocessador"

88887

+

88888

+#: expr.c:1007

88889

+#, c-format

88890

+msgid "\"%s\" is not defined"

88891

+msgstr "\"%s\" não está definido"

88892

+

88893

+#: expr.c:1020

88894

+msgid "assertions are a GCC extension"

88895

+msgstr "asserções (assertions) é uma extensão GCC"

88896

+

88897

+#: expr.c:1023

88898

+msgid "assertions are a deprecated extension"

88899

+msgstr "asserções (assertions) é uma extensão obsoleta"

88900

+

88901

+#: expr.c:1268

88902

+#, c-format

88903

+msgid "unbalanced stack in %s"

88904

+msgstr "pilha não balanceada em %s"

88905

+

88906

+#: expr.c:1288

88907

+#, c-format

88908

+msgid "impossible operator '%u'"

88909

+msgstr "operador impossível \"%u\""

88910

+

88911

+#: expr.c:1389

88912

+msgid "missing ')' in expression"

88913

+msgstr "faltando \")\" na expressão"

88914

+

88915

+#: expr.c:1418

88916

+msgid "'?' without following ':'"

88917

+msgstr "\"?\" sem estar seguido por \":\""

88918

+

88919

+#: expr.c:1428

88920

+msgid "integer overflow in preprocessor expression"

88921

+msgstr "estouro de inteiro em expressão do preprocessador"

88922

+

88923

+#: expr.c:1433

88924

+msgid "missing '(' in expression"

88925

+msgstr "faltando \"(\" na expressão"

88926

+

88927

+#: expr.c:1465

88928

+#, c-format

88929

+msgid "the left operand of \"%s\" changes sign when promoted"

88930

+msgstr "o operador à esquerda de \"%s\" altera o sinal quando promovido"

88931

+

88932

+#: expr.c:1470

88933

+#, c-format

88934

+msgid "the right operand of \"%s\" changes sign when promoted"

88935

+msgstr "o operador à direita de \"%s\" altera o sinal quando promovido"

88936

+

88937

+#: expr.c:1729

88938

+msgid "traditional C rejects the unary plus operator"

88939

+msgstr "C tradicional rejeita o operador unário mais"

88940

+

88941

+#: expr.c:1812

88942

+msgid "comma operator in operand of #if"

88943

+msgstr "operador vírgula em operando de #if"

88944

+

88945

+#: expr.c:1948

88946

+msgid "division by zero in #if"

88947

+msgstr "divisão por zero em #if"

88948

+

88949

+#: files.c:505

88950

+msgid "NULL directory in find_file"

88951

+msgstr "diretório NULO em find_file"

88952

+

88953

+#: files.c:553

88954

+msgid "one or more PCH files were found, but they were invalid"

88955

+msgstr "um ou mais arquivos PCH foram encontrados, mas são inválidos"

88956

+

88957

+#: files.c:556

88958

+msgid "use -Winvalid-pch for more information"

88959

+msgstr "use -Winvalid-pch para mais informações"

88960

+

88961

+#: files.c:660

88962

+#, c-format

88963

+msgid "%s is a block device"

88964

+msgstr "%s é um dispositivo de bloco"

88965

+

88966

+#: files.c:677

88967

+#, c-format

88968

+msgid "%s is too large"

88969

+msgstr "%s é muito grande"

88970

+

88971

+#: files.c:717

88972

+#, c-format

88973

+msgid "%s is shorter than expected"

88974

+msgstr "%s é muito menor do que esperado"

88975

+

88976

+#: files.c:953

88977

+#, c-format

88978

+msgid "no include path in which to search for %s"

88979

+msgstr "não foi incluído nenhum caminho no qual se possa procurar por %s"

88980

+

88981

+#: files.c:1381

88982

+msgid "Multiple include guards may be useful for:\n"

88983

+msgstr "Múltiplos include guards podem ser úteis para:\n"

88984

+

88985

+#: init.c:524

88986

+msgid "cppchar_t must be an unsigned type"

88987

+msgstr "cppchar_t deve ser um tipo não assinado"

88988

+

88989

+#: init.c:528

88990

+#, c-format

88991

+msgid "preprocessor arithmetic has maximum precision of %lu bits; target requires %lu bits"

88992

+msgstr "aritmética do preprocessador possui uma precisão máxima de %lu bits; o alvo requer %lu bits"

88993

+

88994

+#: init.c:535

88995

+msgid "CPP arithmetic must be at least as precise as a target int"

88996

+msgstr "aritmética do CPP deve ser pelo menos tão precisa quanto um int alvo"

88997

+

88998

+#: init.c:538

88999

+msgid "target char is less than 8 bits wide"

89000

+msgstr "char alvo é menor do que 8 bits"

89001

+

89002

+#: init.c:542

89003

+msgid "target wchar_t is narrower than target char"

89004

+msgstr "wchar_t alvo é mais estreito do que o char alvo"

89005

+

89006

+#: init.c:546

89007

+msgid "target int is narrower than target char"

89008

+msgstr "int alvo é mais estreito do que o char alvo"

89009

+

89010

+#: init.c:551

89011

+msgid "CPP half-integer narrower than CPP character"

89012

+msgstr "meio-inteiro do CPP é mais estreito do que o caractere do CPP"

89013

+

89014

+#: init.c:555

89015

+#, c-format

89016

+msgid "CPP on this host cannot handle wide character constants over %lu bits, but the target requires %lu bits"

89017

+msgstr "CPP nesta máquina não consegue manipular constantes de wide character acima de %lu bits, mas o alvo requer %lu bits"

89018

+

89019

+#: lex.c:910

89020

+msgid "backslash and newline separated by space"

89021

+msgstr "barra invertida e nova linha separadas por espaço"

89022

+

89023

+#: lex.c:915

89024

+msgid "backslash-newline at end of file"

89025

+msgstr "barra invertida e nova linha no final do arquivo"

89026

+

89027

+#: lex.c:931

89028

+#, c-format

89029

+msgid "trigraph ??%c converted to %c"

89030

+msgstr "trígrafo ??%c convertido para %c"

89031

+

89032

+#: lex.c:939

89033

+#, c-format

89034

+msgid "trigraph ??%c ignored, use -trigraphs to enable"

89035

+msgstr "trígrafo ??%c ignorado, use -trigraphs para habilitá-lo"

89036

+

89037

+#: lex.c:988

89038

+msgid "\"/*\" within comment"

89039

+msgstr "\"/*\" dentro de comentário"

89040

+

89041

+#: lex.c:1046

89042

+#, c-format

89043

+msgid "%s in preprocessing directive"

89044

+msgstr "%s em diretiva de preprocessamento"

89045

+

89046

+#: lex.c:1055

89047

+msgid "null character(s) ignored"

89048

+msgstr "um ou mais caracteres nulos ignorados"

89049

+

89050

+#: lex.c:1092

89051

+#, c-format

89052

+msgid "`%.*s' is not in NFKC"

89053

+msgstr "\"%.*s\" não está em NFKC"

89054

+

89055

+#: lex.c:1095

89056

+#, c-format

89057

+msgid "`%.*s' is not in NFC"

89058

+msgstr "\"%.*s\" não está em NFC"

89059

+

89060

+#: lex.c:1164 lex.c:1241

89061

+#, c-format

89062

+msgid "attempt to use poisoned \"%s\""

89063

+msgstr "tentativa de usar \"%s\" envenenado"

89064

+

89065

+#: lex.c:1172 lex.c:1249

89066

+msgid "__VA_ARGS__ can only appear in the expansion of a C99 variadic macro"

89067

+msgstr "__VA_ARGS__ pode aparecer apenas na expansão de uma macro variádica C99"

89068

+

89069

+#: lex.c:1178 lex.c:1255

89070

+#, c-format

89071

+msgid "identifier \"%s\" is a special operator name in C++"

89072

+msgstr "identificador \"%s\" é o nome de um operador especial em C++"

89073

+

89074

+#: lex.c:1399

89075

+msgid "raw string delimiter longer than 16 characters"

89076

+msgstr "delimitador de string não tratada (raw) maior do que 16 caracteres"

89077

+

89078

+#: lex.c:1402

89079

+#, c-format

89080

+msgid "invalid character '%c' in raw string delimiter"

89081

+msgstr "caractere inválido \"%c\" em delimitador de string não tratada (raw)"

89082

+

89083

+#: lex.c:1525 lex.c:1547

89084

+msgid "unterminated raw string"

89085

+msgstr "string não tratada (raw) não terminada"

89086

+

89087

+#: lex.c:1573 lex.c:1706

89088

+msgid "invalid suffix on literal; C++11 requires a space between literal and identifier"

89089

+msgstr "sufixo inválido em literal; C++11 requer um espaço entre literal e identificador"

89090

+

89091

+#: lex.c:1684

89092

+msgid "null character(s) preserved in literal"

89093

+msgstr "um ou mais caracteres nulos preservados em literal"

89094

+

89095

+#: lex.c:1687

89096

+#, c-format

89097

+msgid "missing terminating %c character"

89098

+msgstr "faltando o caractere de terminação %c"

89099

+

89100

+#: lex.c:2245

89101

+msgid "C++ style comments are not allowed in ISO C90"

89102

+msgstr "comentários no estilo C++ não são permitidos em ISO C90"

89103

+

89104

+#: lex.c:2247

89105

+msgid "(this will be reported only once per input file)"

89106

+msgstr "(isso será relatado apenas uma vez por arquivo de entrada)"

89107

+

89108

+#: lex.c:2252

89109

+msgid "multi-line comment"

89110

+msgstr "comentário multilinha"

89111

+

89112

+#: lex.c:2583

89113

+#, c-format

89114

+msgid "unspellable token %s"

89115

+msgstr "token %s impronunciável"

89116

+

89117

+#: macro.c:191

89118

+#, c-format

89119

+msgid "macro \"%s\" is not used"

89120

+msgstr "macro \"%s\" não é usada"

89121

+

89122

+#: macro.c:229 macro.c:426

89123

+#, c-format

89124

+msgid "invalid built-in macro \"%s\""

89125

+msgstr "macro interna inválida \"%s\""

89126

+

89127

+#: macro.c:263

89128

+msgid "could not determine file timestamp"

89129

+msgstr "não foi possível determinar o arquivo de marca de tempo"

89130

+

89131

+#: macro.c:361

89132

+msgid "could not determine date and time"

89133

+msgstr "não foi possível determinar a data e a hora"

89134

+

89135

+#: macro.c:377

89136

+msgid "__COUNTER__ expanded inside directive with -fdirectives-only"

89137

+msgstr "__COUNTER__ expandido dentro diretiva com -fdirectives-only"

89138

+

89139

+#: macro.c:535

89140

+msgid "invalid string literal, ignoring final '\\'"

89141

+msgstr "literal de string inválida, ignorando final \"\\\""

89142

+

89143

+#: macro.c:597

89144

+#, c-format

89145

+msgid "pasting \"%s\" and \"%s\" does not give a valid preprocessing token"

89146

+msgstr "colar \"%s\" em \"%s\" não resulta em nenhum token de preprocessamento válido"

89147

+

89148

+#: macro.c:719

89149

+msgid "ISO C99 requires rest arguments to be used"

89150

+msgstr "ISO C99 requer que argumentos restantes sejam usados"

89151

+

89152

+#: macro.c:724

89153

+#, c-format

89154

+msgid "macro \"%s\" requires %u arguments, but only %u given"

89155

+msgstr "macro \"%s\" requer %u argumentos, mas apenas %u foram fornecidos"

89156

+

89157

+#: macro.c:729

89158

+#, c-format

89159

+msgid "macro \"%s\" passed %u arguments, but takes just %u"

89160

+msgstr "macro \"%s\" passou %u argumentos, mas usa apenas %u"

89161

+

89162

+#: macro.c:923 traditional.c:680

89163

+#, c-format

89164

+msgid "unterminated argument list invoking macro \"%s\""

89165

+msgstr "lista de argumentos interminável chamando macro \"%s\""

89166

+

89167

+#: macro.c:1074

89168

+#, c-format

89169

+msgid "function-like macro \"%s\" must be used with arguments in traditional C"

89170

+msgstr "macro \"%s\" do tipo função deve ser usada com argumento em C tradicional"

89171

+

89172

+# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33305

89173

+#: macro.c:1746

89174

+#, c-format

89175

+msgid "invoking macro %s argument %d: empty macro arguments are undefined in ISO C90 and ISO C++98"

89176

+msgstr "chamando macro %s argumento %d: argumentos de macro vazios estão indefinidos em ISO C90 e ISO C++98"

89177

+

89178

+#: macro.c:2708

89179

+#, c-format

89180

+msgid "duplicate macro parameter \"%s\""

89181

+msgstr "parâmetro de macro \"%s\" duplicado"

89182

+

89183

+#: macro.c:2754

89184

+#, c-format

89185

+msgid "\"%s\" may not appear in macro parameter list"

89186

+msgstr "\"%s\" não pode aparecer na lista de parâmetros de macro"

89187

+

89188

+#: macro.c:2762

89189

+msgid "macro parameters must be comma-separated"

89190

+msgstr "parâmetros de macro devem ser separados por vírgula"

89191

+

89192

+#: macro.c:2779

89193

+msgid "parameter name missing"

89194

+msgstr "faltando nome de parâmetro"

89195

+

89196

+#: macro.c:2797

89197

+msgid "anonymous variadic macros were introduced in C99"

89198

+msgstr "macros variádicas anônimas foram introduzidas em C99"

89199

+

89200

+#: macro.c:2802

89201

+msgid "ISO C does not permit named variadic macros"

89202

+msgstr "ISO C não permite macros variádicas nomeadas"

89203

+

89204

+#: macro.c:2811

89205

+msgid "missing ')' in macro parameter list"

89206

+msgstr "faltando \")\" na lista de parâmetros de macro"

89207

+

89208

+#: macro.c:2860

89209

+msgid "'##' cannot appear at either end of a macro expansion"

89210

+msgstr "\"##\" não pode aparecer no final da expansão de macro"

89211

+

89212

+#: macro.c:2895

89213

+msgid "ISO C99 requires whitespace after the macro name"

89214

+msgstr "ISO C99 requer espaço em branco após o nome de macro"

89215

+

89216

+#: macro.c:2919

89217

+msgid "missing whitespace after the macro name"

89218

+msgstr "faltando espaço em branco após o nome de macro"

89219

+

89220

+#: macro.c:2953

89221

+msgid "'#' is not followed by a macro parameter"

89222

+msgstr "\"#\" não está seguido por um parâmetro de macro"

89223

+

89224

+#: macro.c:3111

89225

+#, c-format

89226

+msgid "\"%s\" redefined"

89227

+msgstr "\"%s\" re-definido"

89228

+

89229

+#: macro.c:3117

89230

+msgid "this is the location of the previous definition"

89231

+msgstr "essa é a localização da definição anterior"

89232

+

89233

+#: macro.c:3178

89234

+#, c-format

89235

+msgid "macro argument \"%s\" would be stringified in traditional C"

89236

+msgstr "argumento de macro \"%s\" estaria em uma string no C tradicional"

89237

+

89238

+#: macro.c:3205

89239

+#, c-format

89240

+msgid "invalid hash type %d in cpp_macro_definition"

89241

+msgstr "tipo de hash inválido %d em cpp_macro_definition"

89242

+

89243

+#: pch.c:87 pch.c:345 pch.c:359 pch.c:377 pch.c:383 pch.c:392 pch.c:399

89244

+msgid "while writing precompiled header"

89245

+msgstr "enquanto realizava escrita de header pré-compilado"

89246

+

89247

+#: pch.c:619

89248

+#, c-format

89249

+msgid "%s: not used because `%.*s' is poisoned"

89250

+msgstr "%s: não usado porque \"%.*s\" está envenenado"

89251

+

89252

+#: pch.c:641

89253

+#, c-format

89254

+msgid "%s: not used because `%.*s' not defined"

89255

+msgstr "%s: não usado porque \"%.*s\" não está definido"

89256

+

89257

+#: pch.c:653

89258

+#, c-format

89259

+msgid "%s: not used because `%.*s' defined as `%s' not `%.*s'"

89260

+msgstr "%s: não usado porque \"%.*s\" está definido como \"%s\", e não \"%.*s\""

89261

+

89262

+#: pch.c:694

89263

+#, c-format

89264

+msgid "%s: not used because `%s' is defined"

89265

+msgstr "%s: não usado porque \"%s\" está definido"

89266

+

89267

+#: pch.c:714

89268

+#, c-format

89269

+msgid "%s: not used because `__COUNTER__' is invalid"

89270

+msgstr "%s: não usado porque \"__COUNTER__\" é inválido"

89271

+

89272

+#: pch.c:723 pch.c:898

89273

+msgid "while reading precompiled header"

89274

+msgstr "enquanto realizava leitura de header pré-compilado"

89275

+

89276

+#: traditional.c:750

89277

+#, c-format

89278

+msgid "detected recursion whilst expanding macro \"%s\""

89279

+msgstr "detectada recursão enquanto expandia macro \"%s\""

89280

+

89281

+#: traditional.c:968

89282

+msgid "syntax error in macro parameter list"

89283

+msgstr "erro de sintaxe na lista de parâmetros de macro"

89284

Index: libcpp/po/ChangeLog

89285

===================================================================

89286

--- a/src/libcpp/po/ChangeLog (.../tags/gcc_4_8_2_release)

89287

+++ b/src/libcpp/po/ChangeLog (.../branches/gcc-4_8-branch)

89288

@@ -1,3 +1,11 @@

89289

+2013-12-18 Joseph Myers <joseph@codesourcery.com>

89290

+

89291

+ * pt_BR.po: New.

89292

+

89293

+2013-11-01 Joseph Myers <joseph@codesourcery.com>

89294

+

89295

+ * tr.po: Update.

89296

+

89297

2013-10-16 Release Manager

89298

89299

* GCC 4.8.2 released.

89300

Index: libcpp/po/tr.po

89301

===================================================================

89302

--- a/src/libcpp/po/tr.po (.../tags/gcc_4_8_2_release)

89303

+++ b/src/libcpp/po/tr.po (.../branches/gcc-4_8-branch)

89304

@@ -1,20 +1,22 @@

89305

# Turkish translations for cpplib messages.

89306

89307

+# This file is distributed under the same license as the gcc package.

89308

#

89309

# Nilgün Belma Bugüner <nilgun@buguner.name.tr>, 2001, ..., 2007.

89310

+# Volkan Gezer <vlkngzr@gmail.com>, 2013.

89311

msgid ""

89312

msgstr ""

89313

-"Project-Id-Version: cpplib 4.2.0\n"

89314

+"Project-Id-Version: cpplib 4.8.0\n"

89315

"Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n"

89316

-"POT-Creation-Date: 2013-02-24 01:05+0000\n"

89317

-"PO-Revision-Date: 2007-05-23 01:17+0300\n"

89318

-"Last-Translator: Nilgün Belma Bugüner <nilgun@buguner.name.tr>\n"

89319

+"POT-Creation-Date: 2013-03-15 17:42+0000\n"

89320

+"PO-Revision-Date: 2013-11-01 22:29+0100\n"

89321

+"Last-Translator: Volkan Gezer <vlkngzr@gmail.com>\n"

89322

"Language-Team: Turkish <gnu-tr-u12a@lists.sourceforge.net>\n"

89323

"Language: tr\n"

89324

"MIME-Version: 1.0\n"

89325

"Content-Type: text/plain; charset=UTF-8\n"

89326

"Content-Transfer-Encoding: 8bit\n"

89327

-"X-Generator: KBabel 1.11.4\n"

89328

+"X-Generator: Lokalize 1.5\n"

89329

"Plural-Forms: nplurals=2; plural=(n != 1);\n"

89330

89331

#: charset.c:673

89332

@@ -121,10 +123,9 @@

89333

msgstr "ISO standardı olmayan önceleme dizgesi, '\\%c'"

89334

89335

#: charset.c:1320

89336

-#, fuzzy, c-format

89337

-#| msgid "unknown escape sequence '\\%c'"

89338

+#, c-format

89339

msgid "unknown escape sequence: '\\%c'"

89340

-msgstr "bilinmeyen önceleme dizgesi '\\%c'"

89341

+msgstr "bilinmeyen kaçış dizgesi: '\\%c'"

89342

89343

#: charset.c:1328

89344

#, c-format

89345

@@ -163,10 +164,9 @@

89346

msgstr "#%s bir GCC uzantısıdır"

89347

89348

#: directives.c:362

89349

-#, fuzzy, c-format

89350

-#| msgid "#%s is a GCC extension"

89351

+#, c-format

89352

msgid "#%s is a deprecated GCC extension"

89353

-msgstr "#%s bir GCC uzantısıdır"

89354

+msgstr "#%s eskimiş bir GCC uzantısıdır"

89355

89356

#: directives.c:375

89357

msgid "suggest not using #elif in traditional C"

89358

@@ -247,7 +247,7 @@

89359

89360

#: directives.c:909

89361

msgid "unexpected end of file after #line"

89362

-msgstr ""

89363

+msgstr "#line satırından sonra beklenmeyen dosya sonu"

89364

89365

#: directives.c:912

89366

#, c-format

89367

@@ -271,7 +271,7 @@

89368

#: directives.c:1068 directives.c:1070 directives.c:1072 directives.c:1658

89369

#, c-format

89370

msgid "%s"

89371

-msgstr ""

89372

+msgstr "%s"

89373

89374

#: directives.c:1096

89375

#, c-format

89376

@@ -312,16 +312,12 @@

89377

msgstr "main dosyasında '#pragma once'"

89378

89379

#: directives.c:1462

89380

-#, fuzzy

89381

-#| msgid "invalid #pragma GCC poison directive"

89382

msgid "invalid #pragma push_macro directive"

89383

-msgstr "geçersiz #pragma GCC poison yönergesi"

89384

+msgstr "geçersiz #pragma güdümlü_makro yönergesi"

89385

89386

#: directives.c:1517

89387

-#, fuzzy

89388

-#| msgid "invalid #pragma GCC poison directive"

89389

msgid "invalid #pragma pop_macro directive"

89390

-msgstr "geçersiz #pragma GCC poison yönergesi"

89391

+msgstr "geçersiz #pragma güdümlü_makro yönergesi"

89392

89393

#: directives.c:1572

89394

msgid "invalid #pragma GCC poison directive"

89395

@@ -347,10 +343,9 @@

89396

msgstr "mevcut dosya %s den daha eski"

89397

89398

#: directives.c:1653

89399

-#, fuzzy, c-format

89400

-#| msgid "invalid #pragma GCC poison directive"

89401

+#, c-format

89402

msgid "invalid \"#pragma GCC %s\" directive"

89403

-msgstr "geçersiz #pragma GCC poison yönergesi"

89404

+msgstr "geçersiz \"#pragma GCC %s\" yönergesi"

89405

89406

#: directives.c:1847

89407

msgid "_Pragma takes a parenthesized string literal"

89408

@@ -405,7 +400,7 @@

89409

msgid "\"%s\" re-asserted"

89410

msgstr "\"%s\" tekrar olumlanmış"

89411

89412

-#: directives.c:2566

89413

+#: directives.c:2567

89414

#, c-format

89415

msgid "unterminated #%s"

89416

msgstr "sonlandırılmamış #%s"

89417

@@ -424,16 +419,12 @@

89418

msgstr "%s: %s"

89419

89420

#: expr.c:479 expr.c:577

89421

-#, fuzzy

89422

-#| msgid "imaginary constants are a GCC extension"

89423

msgid "fixed-point constants are a GCC extension"

89424

-msgstr "sanal sabitler bir GCC genişletmesidir"

89425

+msgstr "sabit noktalı sabitler bir GCC uzantısıdır"

89426

89427

#: expr.c:504

89428

-#, fuzzy

89429

-#| msgid "invalid suffix \"%.*s\" on floating constant"

89430

msgid "invalid prefix \"0b\" for floating constant"

89431

-msgstr "gerçel sabitin \"%.*s\" soneki geçersiz"

89432

+msgstr "kayan nokta için geçerisz \"0b\" öntakısı"

89433

89434

#: expr.c:514

89435

msgid "use of C99 hexadecimal floating constant"

89436

@@ -450,10 +441,8 @@

89437

msgstr "geleneksel C \"%.*s\" sonekini kullanmaz"

89438

89439

#: expr.c:564

89440

-#, fuzzy

89441

-#| msgid "imaginary constants are a GCC extension"

89442

msgid "suffix for double constant is a GCC extension"

89443

-msgstr "sanal sabitler bir GCC genişletmesidir"

89444

+msgstr "çift sabit için öntakı bir GCC uzantısıdır"

89445

89446

#: expr.c:570

89447

#, c-format

89448

@@ -461,10 +450,8 @@

89449

msgstr "onaltılık kayan sabitli \"%.*s\" soneki geçersiz"

89450

89451

#: expr.c:581

89452

-#, fuzzy

89453

-#| msgid "imaginary constants are a GCC extension"

89454

msgid "decimal float constants are a GCC extension"

89455

-msgstr "sanal sabitler bir GCC genişletmesidir"

89456

+msgstr "onluk kayan sabitler bir GCC uzantısıdır"

89457

89458

#: expr.c:599

89459

#, c-format

89460

@@ -472,10 +459,8 @@

89461

msgstr "tamsayı sabitte sonek \"%.*s\" soneki geçersiz"

89462

89463

#: expr.c:624

89464

-#, fuzzy

89465

-#| msgid "use of C99 long long integer constant"

89466

msgid "use of C++0x long long integer constant"

89467

-msgstr "ISO C99 long long tamsayı sabitleri yasaklar"

89468

+msgstr "ISO C++0x long long tamsayı sabitlerinin kullanımı"

89469

89470

#: expr.c:625

89471

msgid "use of C99 long long integer constant"

89472

@@ -486,10 +471,8 @@

89473

msgstr "sanal sabitler bir GCC genişletmesidir"

89474

89475

#: expr.c:644

89476

-#, fuzzy

89477

-#| msgid "imaginary constants are a GCC extension"

89478

msgid "binary constants are a GCC extension"

89479

-msgstr "sanal sabitler bir GCC genişletmesidir"

89480

+msgstr "ikili sabitler bir GCC uzantısıdır"

89481

89482

#: expr.c:737

89483

msgid "integer constant is too large for its type"

89484

@@ -517,10 +500,8 @@

89485

msgstr "\"defined\" bu kullanımıyla uyarlanabilir olmayabilir"

89486

89487

#: expr.c:948

89488

-#, fuzzy

89489

-#| msgid "integer overflow in preprocessor expression"

89490

msgid "user-defined literal in preprocessor expression"

89491

-msgstr "önişlemci ifadesinde tamsayı taşması"

89492

+msgstr "önişleyici ifadesinde kullanıcı tanımlı bağımlı"

89493

89494

#: expr.c:953

89495

msgid "floating constant in preprocessor expression"

89496

@@ -536,20 +517,17 @@

89497

msgstr "\"%s\" tanımlı değil"

89498

89499

#: expr.c:1020

89500

-#, fuzzy

89501

-#| msgid "#%s is a GCC extension"

89502

msgid "assertions are a GCC extension"

89503

-msgstr "#%s bir GCC uzantısıdır"

89504

+msgstr "belirteçler bir GCC uzantısıdır"

89505

89506

#: expr.c:1023

89507

msgid "assertions are a deprecated extension"

89508

-msgstr ""

89509

+msgstr "belirteçler artık kullanılmayan bir ifadedir"

89510

89511

#: expr.c:1268

89512

-#, fuzzy, c-format

89513

-#| msgid "unbalanced stack in #if"

89514

+#, c-format

89515

msgid "unbalanced stack in %s"

89516

-msgstr "#if ifadesinde karşılıksız yığın"

89517

+msgstr "%s içinde dengelenmemiş yığın"

89518

89519

#: expr.c:1288

89520

#, c-format

89521

@@ -594,39 +572,39 @@

89522

msgid "division by zero in #if"

89523

msgstr "#if içinde sıfırla bölme"

89524

89525

-#: files.c:504

89526

+#: files.c:505

89527

msgid "NULL directory in find_file"

89528

msgstr "find_file içinde boş dizin"

89529

89530

-#: files.c:542

89531

+#: files.c:553

89532

msgid "one or more PCH files were found, but they were invalid"

89533

msgstr "bir veya daha fazla PCH dosyası bulundu ama bunlar geçersiz"

89534

89535

-#: files.c:545

89536

+#: files.c:556

89537

msgid "use -Winvalid-pch for more information"

89538

msgstr "daha fazla bilgi almak için -Winvalid-pch kullanın"

89539

89540

-#: files.c:643

89541

+#: files.c:660

89542

#, c-format

89543

msgid "%s is a block device"

89544

msgstr "%s bir blok aygıtıdır"

89545

89546

-#: files.c:660

89547

+#: files.c:677

89548

#, c-format

89549

msgid "%s is too large"

89550

msgstr "%s çok büyük"

89551

89552

-#: files.c:700

89553

+#: files.c:717

89554

#, c-format

89555

msgid "%s is shorter than expected"

89556

msgstr "%s beklenenden daha kısa"

89557

89558

-#: files.c:935

89559

+#: files.c:953

89560

#, c-format

89561

msgid "no include path in which to search for %s"

89562

msgstr "%s için aranacaklar içinde başlık dosyaları yolu yok"

89563

89564

-#: files.c:1363

89565

+#: files.c:1381

89566

msgid "Multiple include guards may be useful for:\n"

89567

msgstr "Çoklu include önlemleri aşağıdakiler için kullanışlı olabilir:\n"

89568

89569

@@ -717,27 +695,24 @@

89570

#: lex.c:1178 lex.c:1255

89571

#, c-format

89572

msgid "identifier \"%s\" is a special operator name in C++"

89573

-msgstr ""

89574

+msgstr "\"%s\" belirteci, C++'da özel bir işleç adıdır"

89575

89576

#: lex.c:1399

89577

msgid "raw string delimiter longer than 16 characters"

89578

-msgstr ""

89579

+msgstr "ham dizge ayracı 16 karakterden uzun"

89580

89581

#: lex.c:1402

89582

-#, fuzzy, c-format

89583

-#| msgid "universal character %.*s is not valid in an identifier"

89584

+#, c-format

89585

msgid "invalid character '%c' in raw string delimiter"

89586

-msgstr "evrensel karakter %.*s bir belirteç içinde geçerli değil"

89587

+msgstr "ham dizge ayracında geçersiz karakter '%c'"

89588

89589

#: lex.c:1525 lex.c:1547

89590

-#, fuzzy

89591

-#| msgid "unterminated #%s"

89592

msgid "unterminated raw string"

89593

-msgstr "sonlandırılmamış #%s"

89594

+msgstr "bitirilmemiş ham dizge"

89595

89596

#: lex.c:1573 lex.c:1706

89597

msgid "invalid suffix on literal; C++11 requires a space between literal and identifier"

89598

-msgstr ""

89599

+msgstr "geçersiz ifade soneki; C++11 ifade ve tanımlayıcı arasında bir boşluk gerektirir"

89600

89601

#: lex.c:1684

89602

msgid "null character(s) preserved in literal"

89603

@@ -785,7 +760,7 @@

89604

89605

#: macro.c:377

89606

msgid "__COUNTER__ expanded inside directive with -fdirectives-only"

89607

-msgstr ""

89608

+msgstr "__COUNTER__ -fdirectives-only ile talimat içerisinde genişletildi"

89609

89610

#: macro.c:535

89611

msgid "invalid string literal, ignoring final '\\'"

89612

@@ -823,7 +798,7 @@

89613

#: macro.c:1746

89614

#, c-format

89615

msgid "invoking macro %s argument %d: empty macro arguments are undefined in ISO C90 and ISO C++98"

89616

-msgstr ""

89617

+msgstr "%s makrosu %d argümanı uygulanıyor: ISO C90 ve ISO C++98 içerisinde boş makro argümanları tanımsızdır"

89618

89619

#: macro.c:2708

89620

#, c-format

89621

@@ -890,38 +865,36 @@

89622

msgid "invalid hash type %d in cpp_macro_definition"

89623

msgstr "cpp_macro_definition içindeki isimli yapı türü %d geçersiz"

89624

89625

-#: pch.c:87 pch.c:335 pch.c:347 pch.c:365 pch.c:371 pch.c:380 pch.c:387

89626

+#: pch.c:87 pch.c:345 pch.c:359 pch.c:377 pch.c:383 pch.c:392 pch.c:399

89627

msgid "while writing precompiled header"

89628

msgstr "önderlemeli başlık yazılırken"

89629

89630

-#: pch.c:607

89631

-#, fuzzy, c-format

89632

-#| msgid "%s: not used because `%s' is defined"

89633

+#: pch.c:619

89634

+#, c-format

89635

msgid "%s: not used because `%.*s' is poisoned"

89636

-msgstr "%s: `%s' tanımlı olduğundan kullanılmadı"

89637

+msgstr "%s: `%.*s' zehirli olduğu için kullanılmadı"

89638

89639

-#: pch.c:629

89640

+#: pch.c:641

89641

#, c-format

89642

msgid "%s: not used because `%.*s' not defined"

89643

msgstr "%s: `%.*s' tanımlı olmadığından kullanılmadı"

89644

89645

-#: pch.c:641

89646

+#: pch.c:653

89647

#, c-format

89648

msgid "%s: not used because `%.*s' defined as `%s' not `%.*s'"

89649

msgstr "%s: `%.*s' kullanılmadı çünkü `%s' olarak tanımlı, `%.*s' değil"

89650

89651

-#: pch.c:682

89652

+#: pch.c:694

89653

#, c-format

89654

msgid "%s: not used because `%s' is defined"

89655

msgstr "%s: `%s' tanımlı olduğundan kullanılmadı"

89656

89657

-#: pch.c:702

89658

-#, fuzzy, c-format

89659

-#| msgid "%s: not used because `%s' is defined"

89660

+#: pch.c:714

89661

+#, c-format

89662

msgid "%s: not used because `__COUNTER__' is invalid"

89663

-msgstr "%s: `%s' tanımlı olduğundan kullanılmadı"

89664

+msgstr "%s: `__COUNTER__' geçersiz olduğundan kullanılmadı"

89665

89666

-#: pch.c:711 pch.c:886

89667

+#: pch.c:723 pch.c:898

89668

msgid "while reading precompiled header"

89669

msgstr "önderlemeli başlık okunurken"

89670

89671

Index: .

89672

===================================================================

89673

--- a/src/. (.../tags/gcc_4_8_2_release)

89674

+++ b/src/. (.../branches/gcc-4_8-branch)

89675

89676

Property changes on: .

89677

___________________________________________________________________

89678

Modified: svn:mergeinfo

89679

Merged /trunk:r202766,204547,206123-206126,206395,206628,207387