75
75
m_is_thunderh = m_config.m_is_thunderh;
77
m_ram = auto_alloc_array(&m_machine, UINT32, 0x2000);
77
m_ram = auto_alloc_array(m_machine, UINT32, 0x2000);
79
state_save_register_device_item_pointer(this, 0, m_ram, 0x2000);
79
save_pointer(NAME(m_ram), 0x2000);
129
cpu_set_input_line(m_cpu, INPUT_LINE_IRQ2, ASSERT_LINE);
129
device_set_input_line(m_cpu, INPUT_LINE_IRQ2, ASSERT_LINE);
131
timer_set(&m_machine, ATTOTIME_IN_USEC(10), (void*)this, 0, network_irq_clear_callback);
131
m_machine.scheduler().timer_set(attotime::from_usec(10), FUNC(network_irq_clear_callback), 0, (void*)this);
135
// cpu_set_input_line(k056230->cpu, INPUT_LINE_IRQ2, CLEAR_LINE);
135
// device_set_input_line(k056230->cpu, INPUT_LINE_IRQ2, CLEAR_LINE);
138
138
case 2: // Sub ID register
143
// mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, cpu_get_pc(space->cpu));
143
// mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, cpu_get_pc(&space->device()));
146
146
READ32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_r)
148
//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(space->cpu));
148
//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space->device()));
149
149
return m_ram[offset & 0x7ff];
152
152
WRITE32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_w)
154
//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(space->cpu));
154
//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space->device()));
155
155
COMBINE_DATA(m_ram + (offset & 0x7ff));