48
48
*************************************/
50
static void update_interrupts(running_machine *machine)
50
static void update_interrupts(running_machine &machine)
52
atarigt_state *state = machine->driver_data<atarigt_state>();
53
cputag_set_input_line(machine, "maincpu", 3, state->sound_int_state ? ASSERT_LINE : CLEAR_LINE);
54
cputag_set_input_line(machine, "maincpu", 4, state->video_int_state ? ASSERT_LINE : CLEAR_LINE);
55
cputag_set_input_line(machine, "maincpu", 6, state->scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
52
atarigt_state *state = machine.driver_data<atarigt_state>();
53
cputag_set_input_line(machine, "maincpu", 3, state->m_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
54
cputag_set_input_line(machine, "maincpu", 4, state->m_video_int_state ? ASSERT_LINE : CLEAR_LINE);
55
cputag_set_input_line(machine, "maincpu", 6, state->m_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
65
65
static MACHINE_RESET( atarigt )
67
atarigt_state *state = machine->driver_data<atarigt_state>();
67
atarigt_state *state = machine.driver_data<atarigt_state>();
69
69
atarigen_eeprom_reset(state);
70
70
atarigen_interrupt_reset(state, update_interrupts);
71
atarigen_scanline_timer_reset(*machine->primary_screen, atarigt_scanline_update, 8);
71
atarigen_scanline_timer_reset(*machine.primary_screen, atarigt_scanline_update, 8);
80
80
*************************************/
82
static void cage_irq_callback(running_machine *machine, int reason)
82
static void cage_irq_callback(running_machine &machine, int reason)
84
address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
84
address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
87
atarigen_sound_int_gen(machine->device("maincpu"));
87
atarigen_sound_int_gen(machine.device("maincpu"));
89
89
atarigen_sound_int_ack_w(space,0,0,0xffff);
109
109
static READ32_HANDLER( special_port3_r )
111
atarigt_state *state = space->machine->driver_data<atarigt_state>();
112
int temp = input_port_read(space->machine, "COIN");
113
if (state->video_int_state) temp ^= 0x0001;
114
if (state->scanline_int_state) temp ^= 0x0002;
111
atarigt_state *state = space->machine().driver_data<atarigt_state>();
112
int temp = input_port_read(space->machine(), "COIN");
113
if (state->m_video_int_state) temp ^= 0x0001;
114
if (state->m_scanline_int_state) temp ^= 0x0002;
115
115
return (temp << 16) | temp;
197
197
if (ACCESSING_BITS_24_31)
199
atarigt_state *state = space->machine().driver_data<atarigt_state>();
199
201
/* bits 13-11 are the MO control bits */
200
atarirle_control_w(space->machine, 0, (data >> 27) & 7);
202
atarirle_control_w(state->m_rle, (data >> 27) & 7);
203
205
if (ACCESSING_BITS_16_23)
205
207
// cage_reset_w(data & 0x00100000);
206
coin_counter_w(space->machine, 0, data & 0x00080000);
207
coin_counter_w(space->machine, 1, data & 0x00010000);
208
coin_counter_w(space->machine(), 0, data & 0x00080000);
209
coin_counter_w(space->machine(), 1, data & 0x00010000);
212
214
static WRITE32_HANDLER( mo_command_w )
214
atarigt_state *state = space->machine->driver_data<atarigt_state>();
215
COMBINE_DATA(state->mo_command);
216
atarigt_state *state = space->machine().driver_data<atarigt_state>();
217
COMBINE_DATA(state->m_mo_command);
216
218
if (ACCESSING_BITS_0_15)
217
atarirle_command_w(0, ((data & 0xffff) == 2) ? ATARIRLE_COMMAND_CHECKSUM : ATARIRLE_COMMAND_DRAW);
219
atarirle_command_w(state->m_rle, ((data & 0xffff) == 2) ? ATARIRLE_COMMAND_CHECKSUM : ATARIRLE_COMMAND_DRAW);
260
262
*************************************/
262
#define ADDRSEQ_COUNT 4
264
static offs_t protaddr[ADDRSEQ_COUNT];
265
static UINT8 protmode;
266
static UINT16 protresult;
267
static UINT8 protdata[0x800];
269
static UINT8 ignore_writes = 0;
271
static void tmek_update_mode(offs_t offset)
266
static void tmek_update_mode(atarigt_state *state, offs_t offset)
275
270
/* pop us into the readseq */
276
271
for (i = 0; i < ADDRSEQ_COUNT - 1; i++)
277
protaddr[i] = protaddr[i + 1];
278
protaddr[ADDRSEQ_COUNT - 1] = offset;
272
state->m_protaddr[i] = state->m_protaddr[i + 1];
273
state->m_protaddr[ADDRSEQ_COUNT - 1] = offset;
283
278
static void tmek_protection_w(address_space *space, offs_t offset, UINT16 data)
280
atarigt_state *state = space->machine().driver_data<atarigt_state>();
293
if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", cpu_get_previouspc(space->cpu), offset, data);
289
if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", cpu_get_previouspc(&space->device()), offset, data);
295
291
/* track accesses */
296
tmek_update_mode(offset);
292
tmek_update_mode(state, offset);
301
ignore_writes = (data == 0x18);
297
state->m_ignore_writes = (data == 0x18);
306
302
static void tmek_protection_r(address_space *space, offs_t offset, UINT16 *data)
308
if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", cpu_get_previouspc(space->cpu), offset);
304
atarigt_state *state = space->machine().driver_data<atarigt_state>();
305
if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", cpu_get_previouspc(&space->device()), offset);
310
307
/* track accesses */
311
tmek_update_mode(offset);
308
tmek_update_mode(state, offset);
313
310
/* handle specific reads */
333
330
*************************************/
335
static void primage_update_mode(offs_t offset)
332
static void primage_update_mode(atarigt_state *state, offs_t offset)
339
336
/* pop us into the readseq */
340
337
for (i = 0; i < ADDRSEQ_COUNT - 1; i++)
341
protaddr[i] = protaddr[i + 1];
342
protaddr[ADDRSEQ_COUNT - 1] = offset;
338
state->m_protaddr[i] = state->m_protaddr[i + 1];
339
state->m_protaddr[ADDRSEQ_COUNT - 1] = offset;
344
341
/* check for particular sequences */
342
if (!state->m_protmode)
347
344
/* this is from the code at $20f90 */
348
if (protaddr[1] == 0xdcc7c4 && protaddr[2] == 0xdcc7c4 && protaddr[3] == 0xdc4010)
345
if (state->m_protaddr[1] == 0xdcc7c4 && state->m_protaddr[2] == 0xdcc7c4 && state->m_protaddr[3] == 0xdc4010)
350
347
if (LOG_PROTECTION) logerror("prot:Entering mode 1\n");
348
state->m_protmode = 1;
354
351
/* this is from the code at $27592 */
355
if (protaddr[0] == 0xdcc7ca && protaddr[1] == 0xdcc7ca && protaddr[2] == 0xdcc7c6 && protaddr[3] == 0xdc4022)
352
if (state->m_protaddr[0] == 0xdcc7ca && state->m_protaddr[1] == 0xdcc7ca && state->m_protaddr[2] == 0xdcc7c6 && state->m_protaddr[3] == 0xdc4022)
357
354
if (LOG_PROTECTION) logerror("prot:Entering mode 2\n");
355
state->m_protmode = 2;
361
358
/* this is from the code at $3d8dc */
362
if (protaddr[0] == 0xdcc7c0 && protaddr[1] == 0xdcc7c0 && protaddr[2] == 0xdc80f2 && protaddr[3] == 0xdc7af2)
359
if (state->m_protaddr[0] == 0xdcc7c0 && state->m_protaddr[1] == 0xdcc7c0 && state->m_protaddr[2] == 0xdc80f2 && state->m_protaddr[3] == 0xdc7af2)
364
361
if (LOG_PROTECTION) logerror("prot:Entering mode 3\n");
362
state->m_protmode = 3;
414
412
/* mask = 0x78fff */
416
414
/* track accesses */
417
primage_update_mode(offset);
415
primage_update_mode(state, offset);
419
417
/* check for certain read sequences */
420
if (protmode == 1 && offset >= 0xdc7800 && offset < 0xdc7800 + sizeof(protdata) * 2)
421
protdata[(offset - 0xdc7800) / 2] = data;
418
if (state->m_protmode == 1 && offset >= 0xdc7800 && offset < 0xdc7800 + sizeof(state->m_protdata) * 2)
419
state->m_protdata[(offset - 0xdc7800) / 2] = data;
421
if (state->m_protmode == 2)
425
423
int temp = (offset - 0xdc7800) / 2;
426
424
if (LOG_PROTECTION) logerror("prot:mode 2 param = %04X\n", temp);
427
protresult = temp * 0x6915 + 0x6915;
425
state->m_protresult = temp * 0x6915 + 0x6915;
428
if (state->m_protmode == 3)
432
430
if (offset == 0xdc4700)
434
432
if (LOG_PROTECTION) logerror("prot:Clearing mode 3\n");
433
state->m_protmode = 0;
563
562
if (ACCESSING_BITS_16_31)
565
564
result = atarigt_colorram_r(state, address);
566
(*state->protection_r)(space, address, &result);
565
(*state->m_protection_r)(space, address, &result);
567
566
result32 |= result << 16;
569
568
if (ACCESSING_BITS_0_15)
571
570
result = atarigt_colorram_r(state, address + 2);
572
(*state->protection_r)(space, address + 2, &result);
571
(*state->m_protection_r)(space, address + 2, &result);
573
572
result32 |= result;
580
579
static WRITE32_HANDLER( colorram_protection_w )
582
atarigt_state *state = space->machine->driver_data<atarigt_state>();
581
atarigt_state *state = space->machine().driver_data<atarigt_state>();
583
582
offs_t address = 0xd80000 + offset * 4;
585
584
if (ACCESSING_BITS_16_31)
586
if (!state->m_ignore_writes)
588
587
atarigt_colorram_w(state, address, data >> 16, mem_mask >> 16);
589
(*state->protection_w)(space, address, data >> 16);
588
(*state->m_protection_w)(space, address, data >> 16);
591
590
if (ACCESSING_BITS_0_15)
592
if (!state->m_ignore_writes)
594
593
atarigt_colorram_w(state, address + 2, data, mem_mask);
595
(*state->protection_w)(space, address + 2, data);
594
(*state->m_protection_w)(space, address + 2, data);
605
604
*************************************/
607
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
606
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32 )
608
607
AM_RANGE(0x000000, 0x1fffff) AM_ROM
609
608
AM_RANGE(0xc00000, 0xc00003) AM_READWRITE(sound_data_r, sound_data_w)
610
609
AM_RANGE(0xd00014, 0xd00017) AM_READ(analog_port0_r)
611
610
AM_RANGE(0xd0001c, 0xd0001f) AM_READ(analog_port1_r)
612
611
AM_RANGE(0xd20000, 0xd20fff) AM_READWRITE(atarigen_eeprom_upper32_r, atarigen_eeprom32_w) AM_SHARE("eeprom")
613
612
AM_RANGE(0xd40000, 0xd4ffff) AM_WRITE(atarigen_eeprom_enable32_w)
614
AM_RANGE(0xd72000, 0xd75fff) AM_WRITE(atarigen_playfield32_w) AM_BASE_MEMBER(atarigt_state, playfield32)
615
AM_RANGE(0xd76000, 0xd76fff) AM_WRITE(atarigen_alpha32_w) AM_BASE_MEMBER(atarigt_state, alpha32)
616
AM_RANGE(0xd78000, 0xd78fff) AM_WRITE(atarirle_0_spriteram32_w) AM_BASE(&atarirle_0_spriteram32)
617
AM_RANGE(0xd7a200, 0xd7a203) AM_WRITE(mo_command_w) AM_BASE_MEMBER(atarigt_state, mo_command)
613
AM_RANGE(0xd72000, 0xd75fff) AM_WRITE(atarigen_playfield32_w) AM_BASE_MEMBER(atarigt_state, m_playfield32)
614
AM_RANGE(0xd76000, 0xd76fff) AM_WRITE(atarigen_alpha32_w) AM_BASE_MEMBER(atarigt_state, m_alpha32)
615
AM_RANGE(0xd78000, 0xd78fff) AM_DEVREADWRITE("rle", atarirle_spriteram32_r, atarirle_spriteram32_w)
616
AM_RANGE(0xd7a200, 0xd7a203) AM_WRITE(mo_command_w) AM_BASE_MEMBER(atarigt_state, m_mo_command)
618
617
AM_RANGE(0xd70000, 0xd7ffff) AM_RAM
619
AM_RANGE(0xd80000, 0xdfffff) AM_READWRITE(colorram_protection_r, colorram_protection_w) AM_BASE_MEMBER(atarigt_state, colorram)
618
AM_RANGE(0xd80000, 0xdfffff) AM_READWRITE(colorram_protection_r, colorram_protection_w) AM_BASE_MEMBER(atarigt_state, m_colorram)
620
619
AM_RANGE(0xe04000, 0xe04003) AM_WRITE(led_w)
621
620
AM_RANGE(0xe08000, 0xe08003) AM_WRITE(latch_w)
622
621
AM_RANGE(0xe0a000, 0xe0a003) AM_WRITE(atarigen_scanline_int_ack32_w)
785
static const atarirle_desc modesc =
787
"gfx3", /* region where the GFX data lives */
788
256, /* number of entries in sprite RAM */
789
0, /* left clip coordinate */
790
0, /* right clip coordinate */
792
0x0000, /* base palette entry */
793
0x1000, /* maximum number of colors */
795
{{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
796
{{ 0,0x0ff0,0,0,0,0,0,0 }}, /* mask for the color */
797
{{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
798
{{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
799
{{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
800
{{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
801
{{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
802
{{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
803
{{ 0,0x8000,0,0,0,0,0,0 }} /* mask for the VRAM target */
787
808
/*************************************
812
833
/* note: these parameters are from published specs, not derived */
813
834
/* the board uses a pair of GALs to determine H and V parameters */
814
835
MCFG_SCREEN_RAW_PARAMS(ATARI_CLOCK_14MHz/2, 456, 0, 336, 262, 0, 240)
836
MCFG_SCREEN_UPDATE(atarigt)
837
MCFG_SCREEN_EOF(atarigt)
816
839
MCFG_VIDEO_START(atarigt)
817
MCFG_VIDEO_EOF(atarirle)
818
MCFG_VIDEO_UPDATE(atarigt)
841
MCFG_ATARIRLE_ADD("rle", modesc)
820
843
/* sound hardware */
821
844
MCFG_FRAGMENT_ADD(cage)
1057
1080
ROM_LOAD32_BYTE( "pgm3", 0x00003, 0x20000, CRC(28b0e210) SHA1(7567671beecc7d30e9d4b61cf7d3448bb1dbb072) )
1059
1082
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
1060
ROM_LOAD32_BYTE( "0078", 0x000000, 0x080000, NO_DUMP CRC(314d736f) SHA1(b23946fde6ea47d6a6e3430a9df4b06d453a94c8) )
1083
ROM_LOAD32_BYTE( "0078", 0x000000, 0x080000, BAD_DUMP CRC(314d736f) SHA1(b23946fde6ea47d6a6e3430a9df4b06d453a94c8) ) // not dumped from this pcb, rom taken from another set instead
1062
1085
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
1063
1086
ROM_LOAD32_WORD( "0077", 0x400000, 0x200000, CRC(8f650f8b) SHA1(e3b48ff4e2093d709134b6bf62cecd101ab5cef4) )
1228
1251
static WRITE32_HANDLER( tmek_pf_w )
1230
offs_t pc = cpu_get_pc(space->cpu);
1253
offs_t pc = cpu_get_pc(&space->device());
1232
1255
/* protected version */
1233
1256
if (pc == 0x2EB3C || pc == 0x2EB48)
1235
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(space->cpu), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(space->cpu, M68K_A4) - 2);
1258
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(&space->device()), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space->device(), M68K_A4) - 2);
1236
1259
/* skip these writes to make more stuff visible */
1240
1263
/* unprotected version */
1241
1264
if (pc == 0x25834 || pc == 0x25860)
1242
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(space->cpu), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(space->cpu, M68K_A3) - 2);
1265
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(&space->device()), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space->device(), M68K_A3) - 2);
1244
1267
atarigen_playfield32_w(space, offset, data, mem_mask);
1247
1270
static DRIVER_INIT( tmek )
1249
atarigt_state *state = machine->driver_data<atarigt_state>();
1272
atarigt_state *state = machine.driver_data<atarigt_state>();
1251
state->eeprom_default = NULL;
1252
state->is_primrage = 0;
1274
state->m_eeprom_default = NULL;
1275
state->m_is_primrage = 0;
1254
1277
cage_init(machine, 0x4fad);
1255
1278
cage_set_irq_handler(cage_irq_callback);
1257
1280
/* setup protection */
1258
state->protection_r = tmek_protection_r;
1259
state->protection_w = tmek_protection_w;
1281
state->m_protection_r = tmek_protection_r;
1282
state->m_protection_w = tmek_protection_w;
1261
1284
/* temp hack */
1262
memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd72000, 0xd75fff, 0, 0, tmek_pf_w);
1285
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xd72000, 0xd75fff, FUNC(tmek_pf_w));
1266
static void primrage_init_common(running_machine *machine, offs_t cage_speedup)
1289
static void primrage_init_common(running_machine &machine, offs_t cage_speedup)
1268
atarigt_state *state = machine->driver_data<atarigt_state>();
1291
atarigt_state *state = machine.driver_data<atarigt_state>();
1270
state->eeprom_default = NULL;
1271
state->is_primrage = 1;
1293
state->m_eeprom_default = NULL;
1294
state->m_is_primrage = 1;
1273
1296
cage_init(machine, cage_speedup);
1274
1297
cage_set_irq_handler(cage_irq_callback);
1276
1299
/* install protection */
1277
state->protection_r = primrage_protection_r;
1278
state->protection_w = primrage_protection_w;
1300
state->m_protection_r = primrage_protection_r;
1301
state->m_protection_w = primrage_protection_w;
1281
1304
static DRIVER_INIT( primrage ) { primrage_init_common(machine, 0x42f2); }