38
38
TIMER_DEVICE_CALLBACK( balsente_interrupt_timer )
40
balsente_state *state = timer.machine->driver_data<balsente_state>();
40
balsente_state *state = timer.machine().driver_data<balsente_state>();
42
42
/* next interrupt after scanline 256 is scanline 64 */
44
state->scanline_timer->adjust(timer.machine->primary_screen->time_until_pos(64), 64);
44
state->m_scanline_timer->adjust(timer.machine().primary_screen->time_until_pos(64), 64);
46
state->scanline_timer->adjust(timer.machine->primary_screen->time_until_pos(param + 64), param + 64);
46
state->m_scanline_timer->adjust(timer.machine().primary_screen->time_until_pos(param + 64), param + 64);
48
48
/* IRQ starts on scanline 0, 64, 128, etc. */
49
cputag_set_input_line(timer.machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
49
cputag_set_input_line(timer.machine(), "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
51
51
/* it will turn off on the next HBLANK */
52
timer_set(timer.machine, timer.machine->primary_screen->time_until_pos(param, BALSENTE_HBSTART), NULL, 0, irq_off);
52
timer.machine().scheduler().timer_set(timer.machine().primary_screen->time_until_pos(param, BALSENTE_HBSTART), FUNC(irq_off));
54
54
/* if this is Grudge Match, update the steering */
55
if (state->grudge_steering_result & 0x80)
56
update_grudge_steering(timer.machine);
55
if (state->m_grudge_steering_result & 0x80)
56
update_grudge_steering(timer.machine());
58
58
/* if we're a shooter, we do a little more work */
61
61
UINT8 tempx, tempy;
63
63
/* we latch the beam values on the first interrupt after VBLANK */
66
state->shooter_x = input_port_read(timer.machine, "FAKEX");
67
state->shooter_y = input_port_read(timer.machine, "FAKEY");
66
state->m_shooter_x = input_port_read(timer.machine(), "FAKEX");
67
state->m_shooter_y = input_port_read(timer.machine(), "FAKEY");
70
70
/* which bits get returned depends on which scanline we're at */
71
tempx = state->shooter_x << ((param - 64) / 64);
72
tempy = state->shooter_y << ((param - 64) / 64);
73
state->nstocker_bits = ((tempx >> 4) & 0x08) | ((tempx >> 1) & 0x04) |
71
tempx = state->m_shooter_x << ((param - 64) / 64);
72
tempy = state->m_shooter_y << ((param - 64) / 64);
73
state->m_nstocker_bits = ((tempx >> 4) & 0x08) | ((tempx >> 1) & 0x04) |
74
74
((tempy >> 6) & 0x02) | ((tempy >> 3) & 0x01);
94
94
/* register for saving */
95
95
for (i = 0; i < 3; i++)
97
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].timer_active);
98
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].initial);
99
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].count);
100
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].gate);
101
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].out);
102
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].mode);
103
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].readbyte);
104
state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].writebyte);
97
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].timer_active);
98
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].initial);
99
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].count);
100
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].gate);
101
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].out);
102
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].mode);
103
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].readbyte);
104
state_save_register_item(machine, "8253counter", NULL, i, state->m_counter[i].writebyte);
107
state_save_register_global(machine, state->counter_control);
108
state_save_register_global(machine, state->counter_0_ff);
109
state_save_register_global(machine, state->counter_0_timer_active);
111
state_save_register_global_array(machine, state->analog_input_data);
112
state_save_register_global(machine, state->adc_value);
114
state_save_register_global(machine, state->dac_value);
115
state_save_register_global(machine, state->dac_register);
116
state_save_register_global(machine, state->chip_select);
118
state_save_register_global(machine, state->m6850_status);
119
state_save_register_global(machine, state->m6850_control);
120
state_save_register_global(machine, state->m6850_input);
121
state_save_register_global(machine, state->m6850_output);
122
state_save_register_global(machine, state->m6850_data_ready);
124
state_save_register_global(machine, state->m6850_sound_status);
125
state_save_register_global(machine, state->m6850_sound_control);
126
state_save_register_global(machine, state->m6850_sound_input);
127
state_save_register_global(machine, state->m6850_sound_output);
129
state_save_register_global_array(machine, state->noise_position);
131
state_save_register_global(machine, state->nstocker_bits);
132
state_save_register_global(machine, state->spiker_expand_color);
133
state_save_register_global(machine, state->spiker_expand_bgcolor);
134
state_save_register_global(machine, state->spiker_expand_bits);
135
state_save_register_global(machine, state->grudge_steering_result);
136
state_save_register_global_array(machine, state->grudge_last_steering);
107
state->save_item(NAME(state->m_counter_control));
108
state->save_item(NAME(state->m_counter_0_ff));
109
state->save_item(NAME(state->m_counter_0_timer_active));
111
state->save_item(NAME(state->m_analog_input_data));
112
state->save_item(NAME(state->m_adc_value));
114
state->save_item(NAME(state->m_dac_value));
115
state->save_item(NAME(state->m_dac_register));
116
state->save_item(NAME(state->m_chip_select));
118
state->save_item(NAME(state->m_m6850_status));
119
state->save_item(NAME(state->m_m6850_control));
120
state->save_item(NAME(state->m_m6850_input));
121
state->save_item(NAME(state->m_m6850_output));
122
state->save_item(NAME(state->m_m6850_data_ready));
124
state->save_item(NAME(state->m_m6850_sound_status));
125
state->save_item(NAME(state->m_m6850_sound_control));
126
state->save_item(NAME(state->m_m6850_sound_input));
127
state->save_item(NAME(state->m_m6850_sound_output));
129
state->save_item(NAME(state->m_noise_position));
131
state->save_item(NAME(state->m_nstocker_bits));
132
state->save_item(NAME(state->m_spiker_expand_color));
133
state->save_item(NAME(state->m_spiker_expand_bgcolor));
134
state->save_item(NAME(state->m_spiker_expand_bits));
135
state->save_item(NAME(state->m_grudge_steering_result));
136
state->save_item(NAME(state->m_grudge_last_steering));
140
140
MACHINE_RESET( balsente )
142
address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
143
balsente_state *state = machine->driver_data<balsente_state>();
142
address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
143
balsente_state *state = machine.driver_data<balsente_state>();
146
146
/* reset counters; counter 2's gate is tied high */
147
memset(state->counter, 0, sizeof(state->counter));
148
state->counter[1].timer = machine->device<timer_device>("8253_1_timer");
149
state->counter[2].timer = machine->device<timer_device>("8253_2_timer");
150
state->counter[2].gate = 1;
147
memset(state->m_counter, 0, sizeof(state->m_counter));
148
state->m_counter[1].timer = machine.device<timer_device>("8253_1_timer");
149
state->m_counter[2].timer = machine.device<timer_device>("8253_2_timer");
150
state->m_counter[2].gate = 1;
152
152
/* reset the manual counter 0 clock */
153
state->counter_control = 0x00;
154
state->counter_0_ff = 0;
155
state->counter_0_timer_active = 0;
153
state->m_counter_control = 0x00;
154
state->m_counter_0_ff = 0;
155
state->m_counter_0_timer_active = 0;
157
157
/* reset the ADC states */
158
state->adc_value = 0;
158
state->m_adc_value = 0;
160
160
/* reset the CEM3394 I/O states */
161
state->dac_value = 0;
162
state->dac_register = 0;
163
state->chip_select = 0x3f;
161
state->m_dac_value = 0;
162
state->m_dac_register = 0;
163
state->m_chip_select = 0x3f;
165
165
/* reset game-specific states */
166
state->grudge_steering_result = 0;
166
state->m_grudge_steering_result = 0;
168
168
/* reset the 6850 chips */
169
169
balsente_m6850_w(space, 0, 3);
170
170
balsente_m6850_sound_w(space, 0, 3);
172
172
/* reset the noise generator */
173
memset(state->noise_position, 0, sizeof(state->noise_position));
173
memset(state->m_noise_position, 0, sizeof(state->m_noise_position));
175
175
/* point the banks to bank 0 */
176
numbanks = (machine->region("maincpu")->bytes() > 0x40000) ? 16 : 8;
177
memory_configure_bank(machine, "bank1", 0, numbanks, &machine->region("maincpu")->base()[0x10000], 0x6000);
178
memory_configure_bank(machine, "bank2", 0, numbanks, &machine->region("maincpu")->base()[0x12000], 0x6000);
179
memory_set_bank(space->machine, "bank1", 0);
180
memory_set_bank(space->machine, "bank2", 0);
181
machine->device("maincpu")->reset();
176
numbanks = (machine.region("maincpu")->bytes() > 0x40000) ? 16 : 8;
177
memory_configure_bank(machine, "bank1", 0, numbanks, &machine.region("maincpu")->base()[0x10000], 0x6000);
178
memory_configure_bank(machine, "bank2", 0, numbanks, &machine.region("maincpu")->base()[0x12000], 0x6000);
179
memory_set_bank(space->machine(), "bank1", 0);
180
memory_set_bank(space->machine(), "bank2", 0);
181
machine.device("maincpu")->reset();
183
183
/* start a timer to generate interrupts */
184
state->scanline_timer->adjust(machine->primary_screen->time_until_pos(0));
184
state->m_scanline_timer->adjust(machine.primary_screen->time_until_pos(0));
344
344
*************************************/
346
static void m6850_update_io(running_machine *machine)
346
static void m6850_update_io(running_machine &machine)
348
balsente_state *state = machine->driver_data<balsente_state>();
348
balsente_state *state = machine.driver_data<balsente_state>();
351
351
/* sound -> main CPU communications */
352
if (!(state->m6850_sound_status & 0x02))
352
if (!(state->m_m6850_sound_status & 0x02))
354
354
/* set the overrun bit if the data in the destination hasn't been read yet */
355
if (state->m6850_status & 0x01)
356
state->m6850_status |= 0x20;
355
if (state->m_m6850_status & 0x01)
356
state->m_m6850_status |= 0x20;
358
358
/* copy the sound's output to our input */
359
state->m6850_input = state->m6850_sound_output;
359
state->m_m6850_input = state->m_m6850_sound_output;
361
361
/* set the receive register full bit */
362
state->m6850_status |= 0x01;
362
state->m_m6850_status |= 0x01;
364
364
/* set the sound's trasmitter register empty bit */
365
state->m6850_sound_status |= 0x02;
365
state->m_m6850_sound_status |= 0x02;
368
368
/* main -> sound CPU communications */
369
if (state->m6850_data_ready)
369
if (state->m_m6850_data_ready)
371
371
/* set the overrun bit if the data in the destination hasn't been read yet */
372
if (state->m6850_sound_status & 0x01)
373
state->m6850_sound_status |= 0x20;
372
if (state->m_m6850_sound_status & 0x01)
373
state->m_m6850_sound_status |= 0x20;
375
375
/* copy the main CPU's output to our input */
376
state->m6850_sound_input = state->m6850_output;
376
state->m_m6850_sound_input = state->m_m6850_output;
378
378
/* set the receive register full bit */
379
state->m6850_sound_status |= 0x01;
379
state->m_m6850_sound_status |= 0x01;
381
381
/* set the main CPU's trasmitter register empty bit */
382
state->m6850_status |= 0x02;
383
state->m6850_data_ready = 0;
382
state->m_m6850_status |= 0x02;
383
state->m_m6850_data_ready = 0;
386
386
/* check for reset states */
387
if ((state->m6850_control & 3) == 3)
387
if ((state->m_m6850_control & 3) == 3)
389
state->m6850_status = 0x02;
390
state->m6850_data_ready = 0;
389
state->m_m6850_status = 0x02;
390
state->m_m6850_data_ready = 0;
392
if ((state->m6850_sound_control & 3) == 3)
393
state->m6850_sound_status = 0x02;
392
if ((state->m_m6850_sound_control & 3) == 3)
393
state->m_m6850_sound_status = 0x02;
395
395
/* check for transmit/receive IRQs on the main CPU */
397
if ((state->m6850_control & 0x80) && (state->m6850_status & 0x21)) new_state = 1;
398
if ((state->m6850_control & 0x60) == 0x20 && (state->m6850_status & 0x02)) new_state = 1;
397
if ((state->m_m6850_control & 0x80) && (state->m_m6850_status & 0x21)) new_state = 1;
398
if ((state->m_m6850_control & 0x60) == 0x20 && (state->m_m6850_status & 0x02)) new_state = 1;
400
400
/* apply the change */
401
if (new_state && !(state->m6850_status & 0x80))
401
if (new_state && !(state->m_m6850_status & 0x80))
403
403
cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
404
state->m6850_status |= 0x80;
404
state->m_m6850_status |= 0x80;
406
else if (!new_state && (state->m6850_status & 0x80))
406
else if (!new_state && (state->m_m6850_status & 0x80))
408
408
cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
409
state->m6850_status &= ~0x80;
409
state->m_m6850_status &= ~0x80;
412
412
/* check for transmit/receive IRQs on the sound CPU */
414
if ((state->m6850_sound_control & 0x80) && (state->m6850_sound_status & 0x21)) new_state = 1;
415
if ((state->m6850_sound_control & 0x60) == 0x20 && (state->m6850_sound_status & 0x02)) new_state = 1;
416
if (!(state->counter_control & 0x20)) new_state = 0;
414
if ((state->m_m6850_sound_control & 0x80) && (state->m_m6850_sound_status & 0x21)) new_state = 1;
415
if ((state->m_m6850_sound_control & 0x60) == 0x20 && (state->m_m6850_sound_status & 0x02)) new_state = 1;
416
if (!(state->m_counter_control & 0x20)) new_state = 0;
418
418
/* apply the change */
419
if (new_state && !(state->m6850_sound_status & 0x80))
419
if (new_state && !(state->m_m6850_sound_status & 0x80))
421
421
cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
422
state->m6850_sound_status |= 0x80;
422
state->m_m6850_sound_status |= 0x80;
424
else if (!new_state && (state->m6850_sound_status & 0x80))
424
else if (!new_state && (state->m_m6850_sound_status & 0x80))
426
426
cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
427
state->m6850_sound_status &= ~0x80;
427
state->m_m6850_sound_status &= ~0x80;
464
464
static TIMER_CALLBACK( m6850_data_ready_callback )
466
balsente_state *state = machine->driver_data<balsente_state>();
466
balsente_state *state = machine.driver_data<balsente_state>();
468
468
/* set the output data byte and indicate that we're ready to go */
469
state->m6850_output = param;
470
state->m6850_data_ready = 1;
469
state->m_m6850_output = param;
470
state->m_m6850_data_ready = 1;
471
471
m6850_update_io(machine);
475
475
static TIMER_CALLBACK( m6850_w_callback )
477
balsente_state *state = machine->driver_data<balsente_state>();
477
balsente_state *state = machine.driver_data<balsente_state>();
479
479
/* indicate that the transmit buffer is no longer empty and update the I/O state */
480
state->m6850_status &= ~0x02;
480
state->m_m6850_status &= ~0x02;
481
481
m6850_update_io(machine);
483
483
/* set a timer for 500usec later to actually transmit the data */
484
484
/* (this is very important for several games, esp Snacks'n Jaxson) */
485
timer_set(machine, ATTOTIME_IN_USEC(500), NULL, param, m6850_data_ready_callback);
485
machine.scheduler().timer_set(attotime::from_usec(500), FUNC(m6850_data_ready_callback), param);
489
489
WRITE8_HANDLER( balsente_m6850_w )
491
balsente_state *state = space->machine->driver_data<balsente_state>();
491
balsente_state *state = space->machine().driver_data<balsente_state>();
493
493
/* control register is at offset 0 */
496
state->m6850_control = data;
496
state->m_m6850_control = data;
498
498
/* re-update since interrupt enables could have been modified */
499
m6850_update_io(space->machine);
499
m6850_update_io(space->machine());
502
502
/* output register is at offset 1; set a timer to synchronize the CPUs */
504
timer_call_after_resynch(space->machine, NULL, data, m6850_w_callback);
504
space->machine().scheduler().synchronize(FUNC(m6850_w_callback), data);
812
812
which = offset & 3;
814
814
/* if the counter is in mode 0, a write here will reset the OUT state */
815
if (state->counter[which].mode == 0)
816
counter_set_out(space->machine, which, 0);
815
if (state->m_counter[which].mode == 0)
816
counter_set_out(space->machine(), which, 0);
818
818
/* write the LSB */
819
if (state->counter[which].writebyte == 0)
819
if (state->m_counter[which].writebyte == 0)
821
state->counter[which].count = (state->counter[which].count & 0xff00) | (data & 0x00ff);
822
state->counter[which].initial = (state->counter[which].initial & 0xff00) | (data & 0x00ff);
823
state->counter[which].writebyte = 1;
821
state->m_counter[which].count = (state->m_counter[which].count & 0xff00) | (data & 0x00ff);
822
state->m_counter[which].initial = (state->m_counter[which].initial & 0xff00) | (data & 0x00ff);
823
state->m_counter[which].writebyte = 1;
826
826
/* write the MSB and reset the counter */
829
state->counter[which].count = (state->counter[which].count & 0x00ff) | ((data << 8) & 0xff00);
830
state->counter[which].initial = (state->counter[which].initial & 0x00ff) | ((data << 8) & 0xff00);
831
state->counter[which].writebyte = 0;
829
state->m_counter[which].count = (state->m_counter[which].count & 0x00ff) | ((data << 8) & 0xff00);
830
state->m_counter[which].initial = (state->m_counter[which].initial & 0x00ff) | ((data << 8) & 0xff00);
831
state->m_counter[which].writebyte = 0;
833
833
/* treat 0 as $10000 */
834
if (state->counter[which].count == 0) state->counter[which].count = state->counter[which].initial = 0x10000;
834
if (state->m_counter[which].count == 0) state->m_counter[which].count = state->m_counter[which].initial = 0x10000;
836
836
/* remove any old timer and set a new one */
837
837
counter_stop(state, which);
839
839
/* note that in mode 1, we have to wait for a rising edge of a gate */
840
if (state->counter[which].mode == 0)
840
if (state->m_counter[which].mode == 0)
841
841
counter_start(state, which);
843
843
/* if the counter is in mode 1, a write here will set the OUT state */
844
if (state->counter[which].mode == 1)
845
counter_set_out(space->machine, which, 1);
844
if (state->m_counter[which].mode == 1)
845
counter_set_out(space->machine(), which, 1);
964
964
WRITE8_HANDLER( balsente_counter_control_w )
966
balsente_state *state = space->machine->driver_data<balsente_state>();
967
UINT8 diff_counter_control = state->counter_control ^ data;
966
balsente_state *state = space->machine().driver_data<balsente_state>();
967
UINT8 diff_counter_control = state->m_counter_control ^ data;
969
969
/* set the new global value */
970
state->counter_control = data;
970
state->m_counter_control = data;
972
972
/* bit D0 enables/disables audio */
973
973
if (diff_counter_control & 0x01)
976
976
for (ch = 0; ch < 6; ch++)
977
sound_set_output_gain(state->cem_device[ch], 0, (data & 0x01) ? 1.0 : 0);
977
state->m_cem_device[ch]->set_output_gain(0, (data & 0x01) ? 1.0 : 0);
980
980
/* bit D1 is hooked to counter 0's gate */
981
981
/* if we gate on, start a pulsing timer to clock it */
982
if (!state->counter[0].gate && (data & 0x02) && !state->counter_0_timer_active)
982
if (!state->m_counter[0].gate && (data & 0x02) && !state->m_counter_0_timer_active)
984
984
update_counter_0_timer(state);
987
987
/* if we gate off, remove the timer */
988
else if (state->counter[0].gate && !(data & 0x02) && state->counter_0_timer_active)
988
else if (state->m_counter[0].gate && !(data & 0x02) && state->m_counter_0_timer_active)
990
state->counter_0_timer->reset();
991
state->counter_0_timer_active = 0;
990
state->m_counter_0_timer->reset();
991
state->m_counter_0_timer_active = 0;
994
994
/* set the actual gate afterwards, since we need to know the old value above */
995
counter_set_gate(space->machine, 0, (data >> 1) & 1);
995
counter_set_gate(space->machine(), 0, (data >> 1) & 1);
997
997
/* bits D2 and D4 control the clear/reset flags on the flip-flop that feeds counter 0 */
998
if (!(data & 0x04)) set_counter_0_ff(*state->counter_0_timer, 1);
999
if (!(data & 0x10)) set_counter_0_ff(*state->counter_0_timer, 0);
998
if (!(data & 0x04)) set_counter_0_ff(*state->m_counter_0_timer, 1);
999
if (!(data & 0x10)) set_counter_0_ff(*state->m_counter_0_timer, 0);
1001
1001
/* bit 5 clears the NMI interrupt; recompute the I/O state now */
1002
m6850_update_io(space->machine);
1002
m6850_update_io(space->machine());
1111
1111
CUSTOM_INPUT( nstocker_bits_r )
1113
balsente_state *state = field->port->machine->driver_data<balsente_state>();
1114
return state->nstocker_bits;
1113
balsente_state *state = field->port->machine().driver_data<balsente_state>();
1114
return state->m_nstocker_bits;
1118
1118
WRITE8_HANDLER( spiker_expand_w )
1120
balsente_state *state = space->machine->driver_data<balsente_state>();
1120
balsente_state *state = space->machine().driver_data<balsente_state>();
1122
1122
/* offset 0 is the bit pattern */
1123
1123
if (offset == 0)
1124
state->spiker_expand_bits = data;
1124
state->m_spiker_expand_bits = data;
1126
1126
/* offset 1 is the background color (cleared on each read) */
1127
1127
else if (offset == 1)
1128
state->spiker_expand_bgcolor = data;
1128
state->m_spiker_expand_bgcolor = data;
1130
1130
/* offset 2 is the color */
1131
1131
else if (offset == 2)
1132
state->spiker_expand_color = data;
1132
state->m_spiker_expand_color = data;
1136
1136
READ8_HANDLER( spiker_expand_r )
1138
balsente_state *state = space->machine->driver_data<balsente_state>();
1138
balsente_state *state = space->machine().driver_data<balsente_state>();
1139
1139
UINT8 left, right;
1141
1141
/* first rotate each nibble */
1142
state->spiker_expand_bits = ((state->spiker_expand_bits << 1) & 0xee) | ((state->spiker_expand_bits >> 3) & 0x11);
1142
state->m_spiker_expand_bits = ((state->m_spiker_expand_bits << 1) & 0xee) | ((state->m_spiker_expand_bits >> 3) & 0x11);
1144
1144
/* compute left and right pixels */
1145
left = (state->spiker_expand_bits & 0x10) ? state->spiker_expand_color : state->spiker_expand_bgcolor;
1146
right = (state->spiker_expand_bits & 0x01) ? state->spiker_expand_color : state->spiker_expand_bgcolor;
1145
left = (state->m_spiker_expand_bits & 0x10) ? state->m_spiker_expand_color : state->m_spiker_expand_bgcolor;
1146
right = (state->m_spiker_expand_bits & 0x01) ? state->m_spiker_expand_color : state->m_spiker_expand_bgcolor;
1148
1148
/* reset the background color */
1149
state->spiker_expand_bgcolor = 0;
1149
state->m_spiker_expand_bgcolor = 0;
1151
1151
/* return the combined result */
1152
1152
return (left & 0xf0) | (right & 0x0f);
1156
static void update_grudge_steering(running_machine *machine)
1156
static void update_grudge_steering(running_machine &machine)
1158
balsente_state *state = machine->driver_data<balsente_state>();
1158
balsente_state *state = machine.driver_data<balsente_state>();
1159
1159
UINT8 wheel[3];