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Viewing changes to src/mame/drivers/bfcobra.c

  • Committer: Bazaar Package Importer
  • Author(s): Jordi Mallach, Emmanuel Kasper, Félix Arreola Rodríguez, Jordi Mallach
  • Date: 2011-05-11 21:06:50 UTC
  • mfrom: (1.1.1 upstream)
  • Revision ID: james.westby@ubuntu.com-20110511210650-jizvh8a6x117y9hr
Tags: 0.142-1
[ Emmanuel Kasper ]
* New upstream release
* Set NOWERROR=1 to allow compiling with gcc-4.6
* Remove fix_powerpc_build.patch, as upstream has taken it in this release
* Add gnome-video-arcade front end as a suggested package

[ Félix Arreola Rodríguez ]
* Add kfreebsd-build.patch to quilt series, to fix build on kfreebsd

[ Jordi Mallach ]
* Remove unneeded and bogus addition of --with-quilt to the dh invocation.
* Add Cesare Falco (long time Ubuntu maintainer) to Uploaders, and wrap
  them into multiple lines.

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src/mame/drivers/bfcobra.c
81
81
#include "sound/ay8910.h"
82
82
#include "machine/nvram.h"
83
83
 
 
84
 
84
85
/*
85
86
    Defines
86
87
*/
89
90
 
90
91
 
91
92
/*
92
 
    Globals
93
 
*/
94
 
static UINT8 bank_data[4];
95
 
static UINT8 *work_ram;
96
 
static UINT8 *video_ram;
97
 
static UINT8 h_scroll;
98
 
static UINT8 v_scroll;
99
 
static UINT8 flip_8;
100
 
static UINT8 flip_22;
101
 
static UINT8 videomode;
102
 
 
103
 
/* UART source/sinks */
104
 
static UINT8 z80_m6809_line;
105
 
static UINT8 m6809_z80_line;
106
 
static UINT8 data_r;
107
 
static UINT8 data_t;
108
 
 
109
 
static int irq_state;
110
 
static int acia_irq;
111
 
static int vblank_irq;
112
 
static int blitter_irq;
113
 
 
114
 
static UINT8 z80_int;
115
 
static UINT8 z80_inten;
116
 
 
117
 
/* EM and lamps stuff */
118
 
static UINT32 meter_latch;
119
 
static UINT32 mux_input;
120
 
static UINT32 mux_outputlatch;
121
 
 
122
 
/*
123
93
    Function prototypes
124
94
*/
125
 
INLINE void z80_bank(running_machine *machine, int num, int data);
126
 
 
127
 
 
128
 
static void update_irqs(running_machine *machine)
129
 
{
130
 
        int newstate = blitter_irq || vblank_irq || acia_irq;
131
 
 
132
 
        if (newstate != irq_state)
133
 
        {
134
 
                irq_state = newstate;
135
 
                cputag_set_input_line(machine, "maincpu", 0, irq_state ? ASSERT_LINE : CLEAR_LINE);
136
 
        }
137
 
}
 
95
INLINE void z80_bank(running_machine &machine, int num, int data);
 
96
 
138
97
 
139
98
/***************************************************************************
140
99
 
190
149
/*
191
150
    Blitter state
192
151
*/
193
 
static struct
 
152
struct blitter_t
194
153
{
195
154
        ADDR_REG        program;
196
155
 
207
166
        UINT8           innercnt;
208
167
        UINT8           step;
209
168
        UINT8           pattern;
210
 
} blitter;
 
169
};
211
170
 
212
171
#define LOOPTYPE ( ( blitter.command&0x60 ) >> 5 )
213
172
 
214
173
/*
215
174
    MUSIC Semiconductor TR9C1710 RAMDAC or equivalent
216
175
*/
217
 
static struct
 
176
struct ramdac_t
218
177
{
219
178
        UINT8   addr_w;
220
179
        UINT8   addr_r;
228
187
        /* Access counts */
229
188
        UINT8   count_r;
230
189
        UINT8   count_w;
231
 
} ramdac;
 
190
};
 
191
 
 
192
 
 
193
struct fdc_t
 
194
{
 
195
        UINT8   MSR;
 
196
 
 
197
        int             side;
 
198
        int             track;
 
199
        int             sector;
 
200
        int             number;
 
201
        int             stop_track;
 
202
        int             setup_read;
 
203
 
 
204
        int             byte_pos;
 
205
        int             offset;
 
206
 
 
207
        int             phase;
 
208
        int             next_phase;
 
209
        int             cmd_len;
 
210
        int             cmd_cnt;
 
211
        int             res_len;
 
212
        int             res_cnt;
 
213
        UINT8   cmd[10];
 
214
        UINT8   results[8];
 
215
};
232
216
 
233
217
 
234
218
#define BLUE_0 0
252
236
#define RED_6 ( 6 << 5 )
253
237
#define RED_7 ( 7 << 5 )
254
238
 
 
239
class bfcobra_state : public driver_device
 
240
{
 
241
public:
 
242
        bfcobra_state(running_machine &machine, const driver_device_config_base &config)
 
243
                : driver_device(machine, config) { }
 
244
 
 
245
        UINT8 m_bank_data[4];
 
246
        UINT8 *m_work_ram;
 
247
        UINT8 *m_video_ram;
 
248
        UINT8 m_h_scroll;
 
249
        UINT8 m_v_scroll;
 
250
        UINT8 m_flip_8;
 
251
        UINT8 m_flip_22;
 
252
        UINT8 m_videomode;
 
253
        UINT8 m_z80_m6809_line;
 
254
        UINT8 m_m6809_z80_line;
 
255
        UINT8 m_data_r;
 
256
        UINT8 m_data_t;
 
257
        int m_irq_state;
 
258
        int m_acia_irq;
 
259
        int m_vblank_irq;
 
260
        int m_blitter_irq;
 
261
        UINT8 m_z80_int;
 
262
        UINT8 m_z80_inten;
 
263
        UINT32 m_meter_latch;
 
264
        UINT32 m_mux_input;
 
265
        UINT32 m_mux_outputlatch;
 
266
        UINT8 m_col4bit[16];
 
267
        UINT8 m_col3bit[16];
 
268
        UINT8 m_col8bit[256];
 
269
        UINT8 m_col7bit[256];
 
270
        UINT8 m_col6bit[256];
 
271
        struct blitter_t m_blitter;
 
272
        struct ramdac_t m_ramdac;
 
273
        struct fdc_t m_fdc;
 
274
};
 
275
 
 
276
 
255
277
static const UINT8 col4bit_default[16]=
256
278
{
257
279
        BLUE_0 | GREEN_0 | RED_0,
292
314
        RED_7 | GREEN_7 | BLUE_3
293
315
};
294
316
 
295
 
static UINT8 col4bit[16];
296
 
static UINT8 col3bit[16];
297
 
static UINT8 col8bit[256];
298
 
static UINT8 col7bit[256];
299
 
static UINT8 col6bit[256];
300
317
static const UINT8 col76index[] = {0, 2, 4, 7};
301
318
 
302
319
 
303
320
static VIDEO_START( bfcobra )
304
321
{
 
322
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
305
323
        int i;
306
324
 
307
 
        memcpy(col4bit, col4bit_default, sizeof(col4bit));
308
 
        memcpy(col3bit, col3bit_default, sizeof(col3bit));
 
325
        memcpy(state->m_col4bit, col4bit_default, sizeof(state->m_col4bit));
 
326
        memcpy(state->m_col3bit, col3bit_default, sizeof(state->m_col3bit));
309
327
        for (i = 0; i < 256; ++i)
310
328
        {
311
329
                UINT8 col;
312
330
 
313
 
                col8bit[i] = i;
 
331
                state->m_col8bit[i] = i;
314
332
                col = i & 0x7f;
315
333
                col = (col & 0x1f) | (col76index[ ( (col & 0x60) >> 5 ) & 3] << 5);
316
 
                col7bit[i] = col;
 
334
                state->m_col7bit[i] = col;
317
335
 
318
336
                col = (col & 3) | (col76index[( (col & 0x0c) >> 2) & 3] << 2 ) |
319
337
                          (col76index[( (col & 0x30) >> 4) & 3] << 5 );
320
 
                col6bit[i] = col;
 
338
                state->m_col6bit[i] = col;
321
339
        }
322
340
}
323
341
 
324
 
static VIDEO_UPDATE( bfcobra )
 
342
static SCREEN_UPDATE( bfcobra )
325
343
{
 
344
        bfcobra_state *state = screen->machine().driver_data<bfcobra_state>();
326
345
        int x, y;
327
346
        UINT8  *src;
328
347
        UINT32 *dest;
332
351
 
333
352
        /* Select screen has to be programmed into two registers */
334
353
        /* No idea what happens if the registers are different */
335
 
        if (flip_8 & 0x40 && flip_22 & 0x40)
 
354
        if (state->m_flip_8 & 0x40 && state->m_flip_22 & 0x40)
336
355
                offset = 0x10000;
337
356
        else
338
357
                offset = 0;
339
358
 
340
 
        if(videomode & 0x20)
 
359
        if(state->m_videomode & 0x20)
341
360
        {
342
 
                hirescol = col3bit;
343
 
                lorescol = col7bit;
 
361
                hirescol = state->m_col3bit;
 
362
                lorescol = state->m_col7bit;
344
363
        }
345
 
        else if(videomode & 0x40)
 
364
        else if(state->m_videomode & 0x40)
346
365
        {
347
 
                hirescol = col4bit;
348
 
                lorescol = col6bit;
 
366
                hirescol = state->m_col4bit;
 
367
                lorescol = state->m_col6bit;
349
368
        }
350
369
        else
351
370
        {
352
 
                hirescol = col4bit;
353
 
                lorescol = col8bit;
 
371
                hirescol = state->m_col4bit;
 
372
                lorescol = state->m_col8bit;
354
373
        }
355
374
 
356
375
        for (y = cliprect->min_y; y <= cliprect->max_y; ++y)
357
376
        {
358
 
                UINT16 y_offset = (y + v_scroll) * 256;
359
 
                src = &video_ram[offset + y_offset];
 
377
                UINT16 y_offset = (y + state->m_v_scroll) * 256;
 
378
                src = &state->m_video_ram[offset + y_offset];
360
379
                dest = BITMAP_ADDR32(bitmap, y, 0);
361
380
 
362
381
                for (x = cliprect->min_x; x <= cliprect->max_x / 2; ++x)
363
382
                {
364
 
                        UINT8 x_offset = x + h_scroll;
 
383
                        UINT8 x_offset = x + state->m_h_scroll;
365
384
                        UINT8 pen = *(src + x_offset);
366
385
 
367
 
                        if ( ( videomode & 0x81 ) == 1 || (videomode & 0x80 && pen & 0x80) )
 
386
                        if ( ( state->m_videomode & 0x81 ) == 1 || (state->m_videomode & 0x80 && pen & 0x80) )
368
387
                        {
369
 
                                *dest++ = screen->machine->pens[hirescol[pen & 0x0f]];
370
 
                                *dest++ = screen->machine->pens[hirescol[(pen >> 4) & 0x0f]];
 
388
                                *dest++ = screen->machine().pens[hirescol[pen & 0x0f]];
 
389
                                *dest++ = screen->machine().pens[hirescol[(pen >> 4) & 0x0f]];
371
390
                        }
372
391
                        else
373
392
                        {
374
 
                                *dest++ = screen->machine->pens[lorescol[pen]];
375
 
                                *dest++ = screen->machine->pens[lorescol[pen]];
 
393
                                *dest++ = screen->machine().pens[lorescol[pen]];
 
394
                                *dest++ = screen->machine().pens[lorescol[pen]];
376
395
                        }
377
396
                }
378
397
        }
380
399
        return 0;
381
400
}
382
401
 
383
 
INLINE UINT8* blitter_get_addr(running_machine *machine, UINT32 addr)
 
402
INLINE UINT8* blitter_get_addr(running_machine &machine, UINT32 addr)
384
403
{
 
404
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
385
405
        if (addr < 0x10000)
386
406
        {
387
407
                /* Is this region fixed? */
388
 
                return (UINT8*)(machine->region("user1")->base() + addr);
 
408
                return (UINT8*)(machine.region("user1")->base() + addr);
389
409
        }
390
410
        else if(addr < 0x20000)
391
411
        {
392
412
                addr &= 0xffff;
393
 
                addr += (bank_data[0] & 1) ? 0x10000 : 0;
 
413
                addr += (state->m_bank_data[0] & 1) ? 0x10000 : 0;
394
414
 
395
 
                return (UINT8*)(machine->region("user1")->base() + addr + ((bank_data[0] >> 1) * 0x20000));
 
415
                return (UINT8*)(machine.region("user1")->base() + addr + ((state->m_bank_data[0] >> 1) * 0x20000));
396
416
        }
397
417
        else if (addr >= 0x20000 && addr < 0x40000)
398
418
        {
399
 
                return (UINT8*)&video_ram[addr - 0x20000];
 
419
                return (UINT8*)&state->m_video_ram[addr - 0x20000];
400
420
        }
401
421
        else
402
422
        {
403
 
                return (UINT8*)&work_ram[addr - 0x40000];
 
423
                return (UINT8*)&state->m_work_ram[addr - 0x40000];
404
424
        }
405
425
}
406
426
 
412
432
*/
413
433
static void RunBlit(address_space *space)
414
434
{
415
 
#define BLITPRG_READ(x)         blitter.x = *(blitter_get_addr(space->machine, blitter.program.addr++))
 
435
#define BLITPRG_READ(x)         blitter.x = *(blitter_get_addr(space->machine(), blitter.program.addr++))
416
436
 
 
437
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
438
        struct blitter_t &blitter = state->m_blitter;
417
439
        int cycles_used = 0;
418
440
 
419
441
 
440
462
                /* This debug is now wrong ! */
441
463
                if (DEBUG_BLITTER)
442
464
                {
443
 
                        mame_printf_debug("\n%s:Blitter: Running command from 0x%.5x\n\n", cpuexec_describe_context(device->machine), blitter.program.addr - 12);
 
465
                        mame_printf_debug("\n%s:Blitter: Running command from 0x%.5x\n\n", device->machine().describe_context(), blitter.program.addr - 12);
444
466
                        mame_printf_debug("Command Reg         %.2x",   blitter.command);
445
467
                        mame_printf_debug("             %s %s %s %s %s %s %s\n",
446
468
                                blitter.command & CMD_RUN ? "RUN" : "     ",
522
544
                                                blitter.source.addr0 -=blitter.step;
523
545
                                        }
524
546
 
525
 
                                        *blitter_get_addr(space->machine, blitter.dest.addr) = blitter.pattern;
 
547
                                        *blitter_get_addr(space->machine(), blitter.dest.addr) = blitter.pattern;
526
548
                                        cycles_used++;
527
549
 
528
550
                                } while (--innercnt);
536
558
 
537
559
                                if (LOOPTYPE == 3 && innercnt == blitter.innercnt)
538
560
                                {
539
 
                                        srcdata = *(blitter_get_addr(space->machine, blitter.source.addr & 0xfffff));
 
561
                                        srcdata = *(blitter_get_addr(space->machine(), blitter.source.addr & 0xfffff));
540
562
                                        blitter.source.loword++;
541
563
                                        cycles_used++;
542
564
                                }
546
568
                                {
547
569
                                        if (LOOPTYPE == 0 || LOOPTYPE == 1)
548
570
                                        {
549
 
                                                srcdata = *(blitter_get_addr(space->machine, blitter.source.addr & 0xfffff));
 
571
                                                srcdata = *(blitter_get_addr(space->machine(), blitter.source.addr & 0xfffff));
550
572
                                                cycles_used++;
551
573
 
552
574
                                                if (blitter.modectl & MODE_SSIGN)
561
583
                                /* Read destination pixel? */
562
584
                                if (LOOPTYPE == 0)
563
585
                                {
564
 
                                        dstdata = *blitter_get_addr(space->machine, blitter.dest.addr & 0xfffff);
 
586
                                        dstdata = *blitter_get_addr(space->machine(), blitter.dest.addr & 0xfffff);
565
587
                                        cycles_used++;
566
588
                                }
567
589
 
630
652
                            The existing destination pixel is used as a lookup
631
653
                            into the table and the colours is replaced.
632
654
                        */
633
 
                                                UINT8 dest = *blitter_get_addr(space->machine, blitter.dest.addr);
634
 
                                                UINT8 newcol = *(blitter_get_addr(space->machine, (blitter.source.addr + dest) & 0xfffff));
 
655
                                                UINT8 dest = *blitter_get_addr(space->machine(), blitter.dest.addr);
 
656
                                                UINT8 newcol = *(blitter_get_addr(space->machine(), (blitter.source.addr + dest) & 0xfffff));
635
657
 
636
 
                                                *blitter_get_addr(space->machine, blitter.dest.addr) = newcol;
 
658
                                                *blitter_get_addr(space->machine(), blitter.dest.addr) = newcol;
637
659
                                                cycles_used += 3;
638
660
                                        }
639
661
                                        else
652
674
                                                if (blitter.compfunc & CMPFUNC_LOG0)
653
675
                                                        final_result |= ~result & ~dstdata;
654
676
 
655
 
                                                *blitter_get_addr(space->machine, blitter.dest.addr) = final_result;
 
677
                                                *blitter_get_addr(space->machine(), blitter.dest.addr) = final_result;
656
678
                                                cycles_used++;
657
679
                                        }
658
680
                                }
692
714
        } while (blitter.command  & CMD_RUN);
693
715
 
694
716
        /* Burn Z80 cycles while blitter is in operation */
695
 
        cpu_spinuntil_time(space->cpu,  ATTOTIME_IN_NSEC( (1000000000 / Z80_XTAL)*cycles_used * 2 ) );
 
717
        device_spin_until_time(&space->device(),  attotime::from_nsec( (1000000000 / Z80_XTAL)*cycles_used * 2 ) );
696
718
}
697
719
 
698
720
 
699
721
static READ8_HANDLER( ramdac_r )
700
722
{
 
723
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
724
        struct ramdac_t &ramdac = state->m_ramdac;
701
725
        UINT8 val = 0xff;
702
726
 
703
727
        switch (offset & 3)
709
733
                        if (*count == 0)
710
734
                        {
711
735
                                rgb_t color;
712
 
                                color = palette_get_color(space->machine, ramdac.addr_r);
 
736
                                color = palette_get_color(space->machine(), ramdac.addr_r);
713
737
 
714
738
                                ramdac.color_r[0] = RGB_RED(color);
715
739
                                ramdac.color_r[1] = RGB_GREEN(color);
730
754
                }
731
755
                default:
732
756
                {
733
 
                        mame_printf_debug("Unhandled RAMDAC read (PC:%.4x)\n", cpu_get_previouspc(space->cpu));
 
757
                        mame_printf_debug("Unhandled RAMDAC read (PC:%.4x)\n", cpu_get_previouspc(&space->device()));
734
758
                }
735
759
        }
736
760
 
739
763
 
740
764
static WRITE8_HANDLER( ramdac_w )
741
765
{
 
766
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
767
        struct ramdac_t &ramdac = state->m_ramdac;
742
768
 
743
769
        switch (offset & 3)
744
770
        {
753
779
                        ramdac.color_w[ramdac.count_w] = pal6bit(data);
754
780
                        if (++ramdac.count_w == 3)
755
781
                        {
756
 
                                palette_set_color_rgb(space->machine, ramdac.addr_w, ramdac.color_w[0], ramdac.color_w[1], ramdac.color_w[2]);
 
782
                                palette_set_color_rgb(space->machine(), ramdac.addr_w, ramdac.color_w[0], ramdac.color_w[1], ramdac.color_w[2]);
757
783
                                ramdac.count_w = 0;
758
784
                                ramdac.addr_w++;
759
785
                        }
821
847
 
822
848
***************************************************************************/
823
849
 
 
850
static void update_irqs(running_machine &machine)
 
851
{
 
852
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
 
853
        int newstate = state->m_blitter_irq || state->m_vblank_irq || state->m_acia_irq;
 
854
 
 
855
        if (newstate != state->m_irq_state)
 
856
        {
 
857
                state->m_irq_state = newstate;
 
858
                cputag_set_input_line(machine, "maincpu", 0, state->m_irq_state ? ASSERT_LINE : CLEAR_LINE);
 
859
        }
 
860
}
 
861
 
824
862
static READ8_HANDLER( chipset_r )
825
863
{
 
864
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
826
865
        UINT8 val = 0xff;
827
866
 
828
867
        switch(offset)
831
870
                case 2:
832
871
                case 3:
833
872
                {
834
 
                        val = bank_data[offset];
 
873
                        val = state->m_bank_data[offset];
835
874
                        break;
836
875
                }
837
876
                case 6:
838
877
                {
839
878
                        /* TODO */
840
 
                        val = vblank_irq << 4;
 
879
                        val = state->m_vblank_irq << 4;
841
880
                        break;
842
881
                }
843
882
                case 7:
844
883
                {
845
 
                        vblank_irq = 0;
 
884
                        state->m_vblank_irq = 0;
846
885
                        val = 0x1;
847
886
 
848
887
                        /* TODO */
849
 
                        update_irqs(space->machine);
 
888
                        update_irqs(space->machine());
850
889
                        break;
851
890
                }
852
891
                case 0x1C:
858
897
                case 0x20:
859
898
                {
860
899
                        /* Seems correct - used during RLE pic decoding */
861
 
                        val = blitter.dest.addr0;
 
900
                        val = state->m_blitter.dest.addr0;
862
901
                        break;
863
902
                }
864
903
                case 0x22:
865
904
                {
866
 
                        val = 0x40 | input_port_read(space->machine, "JOYSTICK");
 
905
                        val = 0x40 | input_port_read(space->machine(), "JOYSTICK");
867
906
                        break;
868
907
                }
869
908
                default:
870
909
                {
871
 
                        mame_printf_debug("Flare One unknown read: 0x%.2x (PC:0x%.4x)\n", offset, cpu_get_previouspc(space->cpu));
 
910
                        mame_printf_debug("Flare One unknown read: 0x%.2x (PC:0x%.4x)\n", offset, cpu_get_previouspc(&space->device()));
872
911
                }
873
912
        }
874
913
 
877
916
 
878
917
static WRITE8_HANDLER( chipset_w )
879
918
{
 
919
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
880
920
        switch (offset)
881
921
        {
882
922
                case 0x01:
884
924
                case 0x03:
885
925
                {
886
926
                        if (data > 0x3f)
887
 
                                popmessage("%x: Unusual bank access (%x)\n", cpu_get_previouspc(space->cpu), data);
 
927
                                popmessage("%x: Unusual bank access (%x)\n", cpu_get_previouspc(&space->device()), data);
888
928
 
889
929
                        data &= 0x3f;
890
 
                        bank_data[offset] = data;
891
 
                        z80_bank(space->machine, offset, data);
 
930
                        state->m_bank_data[offset] = data;
 
931
                        z80_bank(space->machine(), offset, data);
892
932
                        break;
893
933
                }
894
934
 
895
935
                case 0x08:
896
936
                {
897
 
                        flip_8 = data;
 
937
                        state->m_flip_8 = data;
898
938
                        break;
899
939
                }
900
940
                case 9:
901
 
                        videomode = data;
 
941
                        state->m_videomode = data;
902
942
                        break;
903
943
 
904
944
                case 0x0B:
905
945
                {
906
 
                        h_scroll = data;
 
946
                        state->m_h_scroll = data;
907
947
                        break;
908
948
                }
909
949
                case 0x0C:
910
950
                {
911
 
                        v_scroll = data;
 
951
                        state->m_v_scroll = data;
912
952
                        break;
913
953
                }
914
954
                case 0x0E:
915
955
                {
916
 
                        col4bit[5] = data;
917
 
                        col3bit[5] = data;
918
 
                        col3bit[5 + 8] = data;
 
956
                        state->m_col4bit[5] = data;
 
957
                        state->m_col3bit[5] = data;
 
958
                        state->m_col3bit[5 + 8] = data;
919
959
                        break;
920
960
                }
921
961
                case 0x0f:
922
962
                {
923
 
                        col4bit[6] = data;
924
 
                        col3bit[6] = data;
925
 
                        col3bit[6 + 8] = data;
 
963
                        state->m_col4bit[6] = data;
 
964
                        state->m_col3bit[6] = data;
 
965
                        state->m_col3bit[6 + 8] = data;
926
966
                        break;
927
967
                }
928
968
                case 0x18:
929
969
                {
930
 
                        blitter.program.addr0 = data;
 
970
                        state->m_blitter.program.addr0 = data;
931
971
                        break;
932
972
                }
933
973
                case 0x19:
934
974
                {
935
 
                        blitter.program.addr1 = data;
 
975
                        state->m_blitter.program.addr1 = data;
936
976
                        break;
937
977
                }
938
978
                case 0x1A:
939
979
                {
940
 
                        blitter.program.addr2 = data;
 
980
                        state->m_blitter.program.addr2 = data;
941
981
                        break;
942
982
                }
943
983
                case 0x20:
944
984
                {
945
 
                        blitter.command = data;
 
985
                        state->m_blitter.command = data;
946
986
 
947
987
                        if (data & CMD_RUN)
948
988
                                RunBlit(space);
953
993
                }
954
994
                case 0x22:
955
995
                {
956
 
                        flip_22 = data;
 
996
                        state->m_flip_22 = data;
957
997
                        break;
958
998
                }
959
999
                default:
960
1000
                {
961
 
                        mame_printf_debug("Flare One unknown write: 0x%.2x with 0x%.2x (PC:0x%.4x)\n", offset, data, cpu_get_previouspc(space->cpu));
 
1001
                        mame_printf_debug("Flare One unknown write: 0x%.2x with 0x%.2x (PC:0x%.4x)\n", offset, data, cpu_get_previouspc(&space->device()));
962
1002
                }
963
1003
        }
964
1004
}
965
1005
 
966
 
INLINE void z80_bank(running_machine *machine, int num, int data)
 
1006
INLINE void z80_bank(running_machine &machine, int num, int data)
967
1007
{
 
1008
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
968
1009
        static const char * const bank_names[] = { "bank1", "bank2", "bank3" };
969
1010
 
970
1011
        if (data < 0x08)
971
1012
        {
972
 
                UINT32 offset = ((bank_data[0] >> 1) * 0x20000) + ((0x4000 * data) ^ ((bank_data[0] & 1) ? 0 : 0x10000));
 
1013
                UINT32 offset = ((state->m_bank_data[0] >> 1) * 0x20000) + ((0x4000 * data) ^ ((state->m_bank_data[0] & 1) ? 0 : 0x10000));
973
1014
 
974
 
                memory_set_bankptr(machine, bank_names[num - 1], machine->region("user1")->base() + offset);
 
1015
                memory_set_bankptr(machine, bank_names[num - 1], machine.region("user1")->base() + offset);
975
1016
        }
976
1017
        else if (data < 0x10)
977
1018
        {
978
 
                memory_set_bankptr(machine, bank_names[num - 1], &video_ram[(data - 0x08) * 0x4000]);
 
1019
                memory_set_bankptr(machine, bank_names[num - 1], &state->m_video_ram[(data - 0x08) * 0x4000]);
979
1020
        }
980
1021
        else
981
1022
        {
982
 
                memory_set_bankptr(machine, bank_names[num - 1], &work_ram[(data - 0x10) * 0x4000]);
 
1023
                memory_set_bankptr(machine, bank_names[num - 1], &state->m_work_ram[(data - 0x10) * 0x4000]);
983
1024
        }
984
1025
}
985
1026
 
986
1027
static WRITE8_HANDLER( rombank_w )
987
1028
{
988
 
        bank_data[0] = data;
989
 
        z80_bank(space->machine, 1, bank_data[1]);
990
 
        z80_bank(space->machine, 2, bank_data[2]);
991
 
        z80_bank(space->machine, 3, bank_data[3]);
 
1029
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
1030
        state->m_bank_data[0] = data;
 
1031
        z80_bank(space->machine(), 1, state->m_bank_data[1]);
 
1032
        z80_bank(space->machine(), 2, state->m_bank_data[2]);
 
1033
        z80_bank(space->machine(), 3, state->m_bank_data[3]);
992
1034
}
993
1035
 
994
1036
 
1002
1044
 
1003
1045
***************************************************************************/
1004
1046
 
1005
 
static void command_phase(UINT8 data);
 
1047
static void command_phase(struct fdc_t &fdc, UINT8 data);
1006
1048
static void exec_w_phase(UINT8 data);
1007
1049
//UINT8 exec_r_phase(void);
1008
1050
 
1037
1079
        SCAN_HIGH_OR_EQUAL = 29
1038
1080
};
1039
1081
 
1040
 
static struct
1041
 
{
1042
 
        UINT8   MSR;
1043
 
 
1044
 
        int             side;
1045
 
        int             track;
1046
 
        int             sector;
1047
 
        int             number;
1048
 
        int             stop_track;
1049
 
        int             setup_read;
1050
 
 
1051
 
        int             byte_pos;
1052
 
        int             offset;
1053
 
 
1054
 
        int             phase;
1055
 
        int             next_phase;
1056
 
        int             cmd_len;
1057
 
        int             cmd_cnt;
1058
 
        int             res_len;
1059
 
        int             res_cnt;
1060
 
        UINT8   cmd[10];
1061
 
        UINT8   results[8];
1062
 
} fdc;
1063
 
 
1064
 
 
1065
 
static void reset_fdc(void)
1066
 
{
1067
 
        memset(&fdc, 0, sizeof(fdc));
1068
 
 
1069
 
        fdc.MSR = 0x80;
1070
 
        fdc.phase = COMMAND;
 
1082
static void reset_fdc(running_machine &machine)
 
1083
{
 
1084
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
 
1085
        memset(&state->m_fdc, 0, sizeof(state->m_fdc));
 
1086
 
 
1087
        state->m_fdc.MSR = 0x80;
 
1088
        state->m_fdc.phase = COMMAND;
1071
1089
}
1072
1090
 
1073
1091
static READ8_HANDLER( fdctrl_r )
1074
1092
{
 
1093
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
1075
1094
        UINT8 val = 0;
1076
1095
 
1077
 
        val = fdc.MSR;
 
1096
        val = state->m_fdc.MSR;
1078
1097
 
1079
1098
        return val;
1080
1099
}
1081
1100
 
1082
1101
static READ8_HANDLER( fddata_r )
1083
1102
{
 
1103
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
1104
        struct fdc_t &fdc = state->m_fdc;
1084
1105
        #define BPS             1024
1085
1106
        #define SPT             10
1086
1107
        #define BPT             1024*10
1109
1130
                                }
1110
1131
 
1111
1132
                                fdc.offset = (BPT * fdc.track*2) + (fdc.side ? BPT : 0) + (BPS * (fdc.sector-1)) + fdc.byte_pos++;
1112
 
                                val = *(space->machine->region("user2")->base() + fdc.offset);
 
1133
                                val = *(space->machine().region("user2")->base() + fdc.offset);
1113
1134
 
1114
1135
                                /* Move on to next sector? */
1115
1136
                                if (fdc.byte_pos == 1024)
1153
1174
 
1154
1175
static WRITE8_HANDLER( fdctrl_w )
1155
1176
{
 
1177
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
1178
        struct fdc_t &fdc = state->m_fdc;
1156
1179
        switch (fdc.phase)
1157
1180
        {
1158
1181
                case COMMAND:
1159
1182
                {
1160
 
                        command_phase(data);
 
1183
                        command_phase(fdc, data);
1161
1184
                        break;
1162
1185
                }
1163
1186
                case EXECUTION_W:
1172
1195
        }
1173
1196
}
1174
1197
 
1175
 
static void command_phase(UINT8 data)
 
1198
static void command_phase(struct fdc_t &fdc, UINT8 data)
1176
1199
{
1177
1200
        if (fdc.cmd_cnt == 0)
1178
1201
        {
1281
1304
 
1282
1305
static MACHINE_RESET( bfcobra )
1283
1306
{
 
1307
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
1284
1308
        unsigned int pal;
1285
1309
 
1286
1310
        for (pal = 0; pal < 256; ++pal)
1288
1312
                palette_set_color_rgb(machine, pal, pal3bit((pal>>5)&7), pal3bit((pal>>2)&7), pal2bit(pal&3));
1289
1313
        }
1290
1314
 
1291
 
        bank_data[0] = 1;
1292
 
        memset(&ramdac, 0, sizeof(ramdac));
1293
 
        reset_fdc();
 
1315
        state->m_bank_data[0] = 1;
 
1316
        memset(&state->m_ramdac, 0, sizeof(state->m_ramdac));
 
1317
        reset_fdc(machine);
1294
1318
 
1295
 
        irq_state = blitter_irq = vblank_irq = acia_irq = 0;
 
1319
        state->m_irq_state = state->m_blitter_irq = state->m_vblank_irq = state->m_acia_irq = 0;
1296
1320
}
1297
1321
 
1298
1322
/***************************************************************************
1301
1325
 
1302
1326
***************************************************************************/
1303
1327
 
1304
 
static ADDRESS_MAP_START( z80_prog_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1328
static ADDRESS_MAP_START( z80_prog_map, AS_PROGRAM, 8 )
1305
1329
        AM_RANGE(0x0000, 0x3fff) AM_ROMBANK("bank4")
1306
1330
        AM_RANGE(0x4000, 0x7fff) AM_RAMBANK("bank1")
1307
1331
        AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("bank2")
1308
1332
        AM_RANGE(0xc000, 0xffff) AM_RAMBANK("bank3")
1309
1333
ADDRESS_MAP_END
1310
1334
 
1311
 
static ADDRESS_MAP_START( z80_io_map, ADDRESS_SPACE_IO, 8 )
 
1335
static ADDRESS_MAP_START( z80_io_map, AS_IO, 8 )
1312
1336
ADDRESS_MAP_GLOBAL_MASK(0xff)
1313
1337
        AM_RANGE(0x00, 0x23) AM_READWRITE(chipset_r, chipset_w)
1314
1338
        AM_RANGE(0x24, 0x24) AM_DEVWRITE("acia6850_0", acia6850_ctrl_w)
1352
1376
/* TODO */
1353
1377
static READ8_HANDLER( meter_r )
1354
1378
{
1355
 
        return meter_latch;
 
1379
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
1380
        return state->m_meter_latch;
1356
1381
}
1357
1382
 
1358
1383
/* TODO: This is borrowed from Scorpion 1 */
1359
1384
static WRITE8_HANDLER( meter_w )
1360
1385
{
 
1386
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
1361
1387
        int i;
1362
 
        int  changed = meter_latch ^ data;
1363
 
        UINT64 cycles = downcast<cpu_device *>(space->cpu)->total_cycles();
 
1388
        int  changed = state->m_meter_latch ^ data;
1364
1389
 
1365
 
        meter_latch = data;
 
1390
        state->m_meter_latch = data;
1366
1391
 
1367
1392
        /*
1368
1393
        When a meter is triggered, the current drawn is sensed. If a meter
1372
1397
        {
1373
1398
                if (changed & (1 << i))
1374
1399
                {
1375
 
                        Mechmtr_update(i, cycles, data & (1 << i) );
1376
 
                        generic_pulse_irq_line(space->cpu, M6809_FIRQ_LINE);
 
1400
                        MechMtr_update(i, data & (1 << i) );
 
1401
                        generic_pulse_irq_line(&space->device(), M6809_FIRQ_LINE);
1377
1402
                }
1378
1403
        }
1379
1404
}
1381
1406
/* TODO */
1382
1407
static READ8_HANDLER( latch_r )
1383
1408
{
1384
 
        return mux_input;
 
1409
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
 
1410
        return state->m_mux_input;
1385
1411
}
1386
1412
 
1387
1413
static WRITE8_HANDLER( latch_w )
1388
1414
{
 
1415
        bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
1389
1416
        /* TODO: This is borrowed from Scorpion 1 */
1390
1417
        switch(offset)
1391
1418
        {
1392
1419
                case 0:
1393
1420
                {
1394
 
                        int changed = mux_outputlatch ^ data;
 
1421
                        int changed = state->m_mux_outputlatch ^ data;
1395
1422
                        static const char *const port[] = { "STROBE0", "STROBE1", "STROBE2", "STROBE3", "STROBE4", "STROBE5", "STROBE6", "STROBE7" };
1396
1423
 
1397
 
                        mux_outputlatch = data;
 
1424
                        state->m_mux_outputlatch = data;
1398
1425
 
1399
1426
                        /* Clock has changed */
1400
1427
                        if (changed & 0x08)
1403
1430
 
1404
1431
                                /* Clock is low */
1405
1432
                                if (!(data & 0x08))
1406
 
                                        mux_input = input_port_read(space->machine, port[input_strobe]);
 
1433
                                        state->m_mux_input = input_port_read(space->machine(), port[input_strobe]);
1407
1434
                        }
1408
1435
                        break;
1409
1436
                }
1432
1459
        upd7759_start_w(device, data & 0x40 ? 0 : 1);
1433
1460
}
1434
1461
 
1435
 
static ADDRESS_MAP_START( m6809_prog_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1462
static ADDRESS_MAP_START( m6809_prog_map, AS_PROGRAM, 8 )
1436
1463
        AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE("nvram")
1437
1464
        AM_RANGE(0x2000, 0x2000) AM_RAM         // W 'B', 6F
1438
1465
        AM_RANGE(0x2200, 0x2200) AM_RAM         // W 'F'
1560
1587
/*
1561
1588
    Allocate work RAM and video RAM shared by the Z80 and chipset.
1562
1589
*/
1563
 
static void init_ram(running_machine *machine)
 
1590
static void init_ram(running_machine &machine)
1564
1591
{
 
1592
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
1565
1593
        /* 768kB work RAM */
1566
 
        work_ram = auto_alloc_array_clear(machine, UINT8, 0xC0000);
 
1594
        state->m_work_ram = auto_alloc_array_clear(machine, UINT8, 0xC0000);
1567
1595
 
1568
1596
        /* 128kB video RAM */
1569
 
        video_ram = auto_alloc_array_clear(machine, UINT8, 0x20000);
 
1597
        state->m_video_ram = auto_alloc_array_clear(machine, UINT8, 0x20000);
1570
1598
}
1571
1599
 
1572
1600
/*
1575
1603
 
1576
1604
static READ_LINE_DEVICE_HANDLER( z80_acia_rx_r )
1577
1605
{
1578
 
        return m6809_z80_line;
 
1606
        bfcobra_state *state = device->machine().driver_data<bfcobra_state>();
 
1607
        return state->m_m6809_z80_line;
1579
1608
}
1580
1609
 
1581
1610
static WRITE_LINE_DEVICE_HANDLER( z80_acia_tx_w )
1582
1611
{
1583
 
        z80_m6809_line = state;
 
1612
        bfcobra_state *drvstate = device->machine().driver_data<bfcobra_state>();
 
1613
        drvstate->m_z80_m6809_line = state;
1584
1614
}
1585
1615
 
1586
1616
static WRITE_LINE_DEVICE_HANDLER( z80_acia_irq )
1587
1617
{
1588
 
        acia_irq = state ? CLEAR_LINE : ASSERT_LINE;
1589
 
        update_irqs(device->machine);
 
1618
        bfcobra_state *drvstate = device->machine().driver_data<bfcobra_state>();
 
1619
        drvstate->m_acia_irq = state ? CLEAR_LINE : ASSERT_LINE;
 
1620
        update_irqs(device->machine());
1590
1621
}
1591
1622
 
1592
1623
static ACIA6850_INTERFACE( z80_acia_if )
1603
1634
 
1604
1635
static READ_LINE_DEVICE_HANDLER( m6809_acia_rx_r )
1605
1636
{
1606
 
        return z80_m6809_line;
 
1637
        bfcobra_state *state = device->machine().driver_data<bfcobra_state>();
 
1638
        return state->m_z80_m6809_line;
1607
1639
}
1608
1640
 
1609
1641
static WRITE_LINE_DEVICE_HANDLER( m6809_acia_tx_w )
1610
1642
{
1611
 
        m6809_z80_line = state;
 
1643
        bfcobra_state *drvstate = device->machine().driver_data<bfcobra_state>();
 
1644
        drvstate->m_m6809_z80_line = state;
1612
1645
}
1613
1646
 
1614
1647
static WRITE_LINE_DEVICE_HANDLER( m6809_data_irq )
1615
1648
{
1616
 
        cputag_set_input_line(device->machine, "audiocpu", M6809_IRQ_LINE, state ? CLEAR_LINE : ASSERT_LINE);
 
1649
        cputag_set_input_line(device->machine(), "audiocpu", M6809_IRQ_LINE, state ? CLEAR_LINE : ASSERT_LINE);
1617
1650
}
1618
1651
 
1619
1652
static ACIA6850_INTERFACE( m6809_acia_if )
1630
1663
 
1631
1664
static READ_LINE_DEVICE_HANDLER( data_acia_rx_r )
1632
1665
{
1633
 
        return data_r;
 
1666
        bfcobra_state *state = device->machine().driver_data<bfcobra_state>();
 
1667
        return state->m_data_r;
1634
1668
}
1635
1669
 
1636
1670
static WRITE_LINE_DEVICE_HANDLER( data_acia_tx_w )
1637
1671
{
1638
 
         data_t = state;
 
1672
        bfcobra_state *drvstate = device->machine().driver_data<bfcobra_state>();
 
1673
         drvstate->m_data_t = state;
1639
1674
}
1640
1675
 
1641
1676
 
1655
1690
/* TODO: Driver vs Machine Init */
1656
1691
static DRIVER_INIT( bfcobra )
1657
1692
{
 
1693
        bfcobra_state *state = machine.driver_data<bfcobra_state>();
1658
1694
        /*
1659
1695
        6809 ROM address and data lines are scrambled.
1660
1696
        This is the same scrambling as Scorpion 2.
1667
1703
        UINT8 *tmp;
1668
1704
 
1669
1705
        tmp = auto_alloc_array(machine, UINT8, 0x8000);
1670
 
        rom = machine->region("audiocpu")->base() + 0x8000;
 
1706
        rom = machine.region("audiocpu")->base() + 0x8000;
1671
1707
        memcpy(tmp, rom, 0x8000);
1672
1708
 
1673
1709
        for (i = 0; i < 0x8000; i++)
1690
1726
 
1691
1727
        init_ram(machine);
1692
1728
 
1693
 
        bank_data[0] = 1;
1694
 
        bank_data[1] = 0;
1695
 
        bank_data[2] = 0;
1696
 
        bank_data[3] = 0;
 
1729
        state->m_bank_data[0] = 1;
 
1730
        state->m_bank_data[1] = 0;
 
1731
        state->m_bank_data[2] = 0;
 
1732
        state->m_bank_data[3] = 0;
1697
1733
 
1698
1734
        /* Fixed 16kB ROM region */
1699
 
        memory_set_bankptr(machine, "bank4", machine->region("user1")->base());
 
1735
        memory_set_bankptr(machine, "bank4", machine.region("user1")->base());
1700
1736
 
1701
1737
        /* TODO: Properly sort out the data ACIA */
1702
 
        data_r = 1;
 
1738
        state->m_data_r = 1;
1703
1739
 
1704
1740
        /* Finish this */
1705
 
        state_save_register_global(machine, z80_m6809_line);
1706
 
        state_save_register_global(machine, m6809_z80_line);
1707
 
        state_save_register_global(machine, data_r);
1708
 
        state_save_register_global(machine, data_t);
1709
 
        state_save_register_global(machine, h_scroll);
1710
 
        state_save_register_global(machine, v_scroll);
1711
 
        state_save_register_global(machine, flip_8);
1712
 
        state_save_register_global(machine, flip_22);
1713
 
        state_save_register_global(machine, z80_int);
1714
 
        state_save_register_global(machine, z80_inten);
1715
 
        state_save_register_global_array(machine, bank_data);
1716
 
        state_save_register_global_pointer(machine, work_ram, 0xc0000);
1717
 
        state_save_register_global_pointer(machine, video_ram, 0x20000);
 
1741
        state_save_register_global(machine, state->m_z80_m6809_line);
 
1742
        state_save_register_global(machine, state->m_m6809_z80_line);
 
1743
        state_save_register_global(machine, state->m_data_r);
 
1744
        state_save_register_global(machine, state->m_data_t);
 
1745
        state_save_register_global(machine, state->m_h_scroll);
 
1746
        state_save_register_global(machine, state->m_v_scroll);
 
1747
        state_save_register_global(machine, state->m_flip_8);
 
1748
        state_save_register_global(machine, state->m_flip_22);
 
1749
        state_save_register_global(machine, state->m_z80_int);
 
1750
        state_save_register_global(machine, state->m_z80_inten);
 
1751
        state_save_register_global_array(machine, state->m_bank_data);
 
1752
        state_save_register_global_pointer(machine, state->m_work_ram, 0xc0000);
 
1753
        state_save_register_global_pointer(machine, state->m_video_ram, 0x20000);
1718
1754
}
1719
1755
 
1720
1756
/* TODO */
1726
1762
/* TODO */
1727
1763
static INTERRUPT_GEN( vblank_gen )
1728
1764
{
1729
 
        vblank_irq = 1;
1730
 
        update_irqs(device->machine);
 
1765
        bfcobra_state *state = device->machine().driver_data<bfcobra_state>();
 
1766
        state->m_vblank_irq = 1;
 
1767
        update_irqs(device->machine());
1731
1768
}
1732
1769
 
1733
 
static MACHINE_CONFIG_START( bfcobra, driver_device )
 
1770
static MACHINE_CONFIG_START( bfcobra, bfcobra_state )
1734
1771
        MCFG_CPU_ADD("maincpu", Z80, Z80_XTAL)
1735
1772
        MCFG_CPU_PROGRAM_MAP(z80_prog_map)
1736
1773
        MCFG_CPU_IO_MAP(z80_io_map)
1751
1788
        MCFG_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
1752
1789
        MCFG_SCREEN_SIZE(512, 256)
1753
1790
        MCFG_SCREEN_VISIBLE_AREA(0, 512 - 1, 0, 256 - 1)
 
1791
        MCFG_SCREEN_UPDATE(bfcobra)
 
1792
 
1754
1793
        MCFG_PALETTE_LENGTH(256)
1755
1794
 
1756
1795
        MCFG_SPEAKER_STANDARD_MONO("mono")
1762
1801
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
1763
1802
 
1764
1803
        MCFG_VIDEO_START(bfcobra)
1765
 
        MCFG_VIDEO_UPDATE(bfcobra)
1766
1804
 
1767
1805
        /* ACIAs */
1768
1806
        MCFG_ACIA6850_ADD("acia6850_0", z80_acia_if)