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/* $Id: EMInternal.h $ */
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* EM - Internal header file.
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* Copyright (C) 2006-2007 Oracle Corporation
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* This file is part of VirtualBox Open Source Edition (OSE), as
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* available from http://www.virtualbox.org. This file is free software;
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* you can redistribute it and/or modify it under the terms of the GNU
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* General Public License (GPL) as published by the Free Software
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* Foundation, in version 2 as it comes in the "COPYING" file of the
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* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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#ifndef ___EMInternal_h
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#define ___EMInternal_h
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#include <VBox/cdefs.h>
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#include <VBox/types.h>
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#include <VBox/stam.h>
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#include <VBox/patm.h>
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#include <VBox/pdmcritsect.h>
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/** @defgroup grp_em_int Internal
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/** The saved state version. */
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#define EM_SAVED_STATE_VERSION 4
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#define EM_SAVED_STATE_VERSION_PRE_MWAIT 3
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#define EM_SAVED_STATE_VERSION_PRE_SMP 2
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/* MWait activated. */
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#define EMMWAIT_FLAG_ACTIVE RT_BIT(0)
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/* MWait will continue when an interrupt is pending even when IF=0. */
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#define EMMWAIT_FLAG_BREAKIRQIF0 RT_BIT(1)
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/* Monitor instruction was executed previously. */
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#define EMMWAIT_FLAG_MONITOR_ACTIVE RT_BIT(2)
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typedef struct CLISTAT
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/** The key is the cli address. */
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AVLGCPTRNODECORE Core;
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#if HC_ARCH_BITS == 32 && !defined(RT_OS_WINDOWS)
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AssertCompileMemberAlignment(CLISTAT, Counter, 8);
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* Excessive EM statistics.
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typedef struct EMSTATS
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/** GC: Profiling of EMInterpretInstruction(). */
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STAMPROFILE StatRZEmulate;
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/** HC: Profiling of EMInterpretInstruction(). */
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STAMPROFILE StatR3Emulate;
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/** @name Interpreter Instruction statistics.
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STAMCOUNTER StatRZInterpretSucceeded;
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STAMCOUNTER StatR3InterpretSucceeded;
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STAMCOUNTER StatRZAnd;
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STAMCOUNTER StatR3And;
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STAMCOUNTER StatRZCpuId;
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STAMCOUNTER StatR3CpuId;
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STAMCOUNTER StatRZDec;
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STAMCOUNTER StatR3Dec;
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STAMCOUNTER StatRZHlt;
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STAMCOUNTER StatR3Hlt;
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STAMCOUNTER StatRZInc;
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STAMCOUNTER StatR3Inc;
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STAMCOUNTER StatRZInvlPg;
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STAMCOUNTER StatR3InvlPg;
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STAMCOUNTER StatRZIret;
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STAMCOUNTER StatR3Iret;
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STAMCOUNTER StatRZLLdt;
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STAMCOUNTER StatR3LLdt;
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STAMCOUNTER StatRZLIdt;
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STAMCOUNTER StatR3LIdt;
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STAMCOUNTER StatRZLGdt;
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STAMCOUNTER StatR3LGdt;
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STAMCOUNTER StatRZMov;
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STAMCOUNTER StatR3Mov;
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STAMCOUNTER StatRZMovCRx;
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STAMCOUNTER StatR3MovCRx;
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STAMCOUNTER StatRZMovDRx;
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STAMCOUNTER StatR3MovDRx;
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STAMCOUNTER StatRZOr;
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STAMCOUNTER StatR3Or;
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STAMCOUNTER StatRZPop;
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STAMCOUNTER StatR3Pop;
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STAMCOUNTER StatRZSti;
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STAMCOUNTER StatR3Sti;
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STAMCOUNTER StatRZXchg;
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STAMCOUNTER StatR3Xchg;
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STAMCOUNTER StatRZXor;
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STAMCOUNTER StatR3Xor;
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STAMCOUNTER StatRZMonitor;
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STAMCOUNTER StatR3Monitor;
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STAMCOUNTER StatRZMWait;
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STAMCOUNTER StatR3MWait;
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STAMCOUNTER StatRZAdd;
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STAMCOUNTER StatR3Add;
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STAMCOUNTER StatRZSub;
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STAMCOUNTER StatR3Sub;
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STAMCOUNTER StatRZAdc;
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STAMCOUNTER StatR3Adc;
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STAMCOUNTER StatRZRdtsc;
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STAMCOUNTER StatR3Rdtsc;
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STAMCOUNTER StatRZRdpmc;
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STAMCOUNTER StatR3Rdpmc;
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STAMCOUNTER StatRZBtr;
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STAMCOUNTER StatR3Btr;
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STAMCOUNTER StatRZBts;
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STAMCOUNTER StatR3Bts;
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STAMCOUNTER StatRZBtc;
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STAMCOUNTER StatR3Btc;
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STAMCOUNTER StatRZCmpXchg;
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STAMCOUNTER StatR3CmpXchg;
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STAMCOUNTER StatRZCmpXchg8b;
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STAMCOUNTER StatR3CmpXchg8b;
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STAMCOUNTER StatRZXAdd;
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STAMCOUNTER StatR3XAdd;
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STAMCOUNTER StatRZClts;
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STAMCOUNTER StatR3Clts;
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STAMCOUNTER StatRZStosWD;
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STAMCOUNTER StatR3StosWD;
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STAMCOUNTER StatR3Rdmsr;
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STAMCOUNTER StatR3Wrmsr;
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STAMCOUNTER StatRZRdmsr;
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STAMCOUNTER StatRZWrmsr;
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STAMCOUNTER StatRZWbInvd;
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STAMCOUNTER StatR3WbInvd;
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STAMCOUNTER StatRZLmsw;
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STAMCOUNTER StatR3Lmsw;
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STAMCOUNTER StatRZSmsw;
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STAMCOUNTER StatR3Smsw;
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STAMCOUNTER StatRZInterpretFailed;
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STAMCOUNTER StatR3InterpretFailed;
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STAMCOUNTER StatRZFailedAnd;
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STAMCOUNTER StatR3FailedAnd;
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STAMCOUNTER StatRZFailedCpuId;
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STAMCOUNTER StatR3FailedCpuId;
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STAMCOUNTER StatRZFailedDec;
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STAMCOUNTER StatR3FailedDec;
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STAMCOUNTER StatRZFailedHlt;
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STAMCOUNTER StatR3FailedHlt;
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STAMCOUNTER StatRZFailedInc;
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STAMCOUNTER StatR3FailedInc;
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STAMCOUNTER StatRZFailedInvlPg;
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STAMCOUNTER StatR3FailedInvlPg;
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STAMCOUNTER StatRZFailedIret;
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STAMCOUNTER StatR3FailedIret;
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STAMCOUNTER StatRZFailedLLdt;
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STAMCOUNTER StatR3FailedLLdt;
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STAMCOUNTER StatRZFailedLGdt;
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STAMCOUNTER StatR3FailedLGdt;
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STAMCOUNTER StatRZFailedLIdt;
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STAMCOUNTER StatR3FailedLIdt;
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STAMCOUNTER StatRZFailedMisc;
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STAMCOUNTER StatR3FailedMisc;
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STAMCOUNTER StatRZFailedMov;
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STAMCOUNTER StatR3FailedMov;
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STAMCOUNTER StatRZFailedMovCRx;
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STAMCOUNTER StatR3FailedMovCRx;
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STAMCOUNTER StatRZFailedMovDRx;
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STAMCOUNTER StatR3FailedMovDRx;
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STAMCOUNTER StatRZFailedOr;
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STAMCOUNTER StatR3FailedOr;
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STAMCOUNTER StatRZFailedPop;
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STAMCOUNTER StatR3FailedPop;
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STAMCOUNTER StatRZFailedSti;
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STAMCOUNTER StatR3FailedSti;
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STAMCOUNTER StatRZFailedXchg;
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STAMCOUNTER StatR3FailedXchg;
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STAMCOUNTER StatRZFailedXor;
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STAMCOUNTER StatR3FailedXor;
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STAMCOUNTER StatRZFailedMonitor;
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STAMCOUNTER StatR3FailedMonitor;
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STAMCOUNTER StatRZFailedMWait;
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STAMCOUNTER StatR3FailedMWait;
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STAMCOUNTER StatR3FailedRdmsr;
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STAMCOUNTER StatR3FailedWrmsr;
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STAMCOUNTER StatRZFailedRdmsr;
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STAMCOUNTER StatRZFailedWrmsr;
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STAMCOUNTER StatRZFailedLmsw;
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STAMCOUNTER StatR3FailedLmsw;
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STAMCOUNTER StatRZFailedSmsw;
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STAMCOUNTER StatR3FailedSmsw;
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STAMCOUNTER StatRZFailedAdd;
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STAMCOUNTER StatR3FailedAdd;
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STAMCOUNTER StatRZFailedAdc;
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STAMCOUNTER StatR3FailedAdc;
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STAMCOUNTER StatRZFailedBtr;
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STAMCOUNTER StatR3FailedBtr;
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STAMCOUNTER StatRZFailedBts;
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STAMCOUNTER StatR3FailedBts;
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STAMCOUNTER StatRZFailedBtc;
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STAMCOUNTER StatR3FailedBtc;
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STAMCOUNTER StatRZFailedCli;
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STAMCOUNTER StatR3FailedCli;
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STAMCOUNTER StatRZFailedCmpXchg;
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STAMCOUNTER StatR3FailedCmpXchg;
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STAMCOUNTER StatRZFailedCmpXchg8b;
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STAMCOUNTER StatR3FailedCmpXchg8b;
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STAMCOUNTER StatRZFailedXAdd;
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STAMCOUNTER StatR3FailedXAdd;
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STAMCOUNTER StatR3FailedMovNTPS;
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STAMCOUNTER StatRZFailedMovNTPS;
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STAMCOUNTER StatRZFailedStosWD;
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STAMCOUNTER StatR3FailedStosWD;
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STAMCOUNTER StatRZFailedSub;
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STAMCOUNTER StatR3FailedSub;
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STAMCOUNTER StatRZFailedWbInvd;
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STAMCOUNTER StatR3FailedWbInvd;
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STAMCOUNTER StatRZFailedRdtsc;
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STAMCOUNTER StatR3FailedRdtsc;
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STAMCOUNTER StatRZFailedRdpmc;
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STAMCOUNTER StatR3FailedRdpmc;
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STAMCOUNTER StatRZFailedClts;
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STAMCOUNTER StatR3FailedClts;
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STAMCOUNTER StatRZFailedUserMode;
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STAMCOUNTER StatR3FailedUserMode;
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STAMCOUNTER StatRZFailedPrefix;
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STAMCOUNTER StatR3FailedPrefix;
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/** @name Privileged Instructions Ending Up In HC.
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STAMCOUNTER StatIoRestarted;
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STAMCOUNTER StatInvlpg;
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STAMCOUNTER StatMovReadCR[USE_REG_CR4 + 1];
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STAMCOUNTER StatMovWriteCR[USE_REG_CR4 + 1];
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STAMCOUNTER StatMovDRx;
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STAMCOUNTER StatIret;
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STAMCOUNTER StatMovLgdt;
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STAMCOUNTER StatMovLldt;
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STAMCOUNTER StatMovLidt;
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STAMCOUNTER StatMisc;
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STAMCOUNTER StatSysEnter;
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STAMCOUNTER StatSysExit;
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STAMCOUNTER StatSysCall;
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STAMCOUNTER StatSysRet;
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/** Pointer to the excessive EM statistics. */
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typedef EMSTATS *PEMSTATS;
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* Converts a EM pointer into a VM pointer.
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* @returns Pointer to the VM structure the EM is part of.
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* @param pEM Pointer to EM instance data.
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#define EM2VM(pEM) ( (PVM)((char*)pEM - pEM->offVM) )
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* EM VM Instance data.
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* Changes to this must checked against the padding of the cfgm union in VM!
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/** Offset to the VM structure.
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/** Id of the VCPU that last executed code in the recompiler. */
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VMCPUID idLastRemCpu;
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/** REM critical section.
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* This protects recompiler usage
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PDMCRITSECT CritSectREM;
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/** Pointer to EM VM instance data. */
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* EM VMCPU Instance data.
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/** Offset to the VM structure.
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/** Execution Manager State. */
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EMSTATE volatile enmState;
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/** Previous Execution Manager State. */
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EMSTATE enmPrevState;
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/** Force raw-mode execution.
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* This is used to prevent REM from trying to execute patch code.
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* The flag is cleared upon entering emR3RawExecute() and updated in certain return paths. */
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uint8_t u8Padding[3];
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/** Inhibit interrupts for this instruction. Valid only when VM_FF_INHIBIT_INTERRUPTS is set. */
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RTGCUINTPTR GCPtrInhibitInterrupts;
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/** Pointer to the PATM status structure. (R3 Ptr) */
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R3PTRTYPE(PPATMGCSTATE) pPatmGCState;
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/** Pointer to the guest CPUM state. (R3 Ptr) */
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R3PTRTYPE(PCPUMCTX) pCtx;
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#if GC_ARCH_BITS == 64
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/* MWait halt state. */
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uint32_t fWait; /* type of mwait; see EMMWAIT_FLAG_* */
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uint32_t a32Padding[1];
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RTGCPTR uMWaitEAX; /* mwait hints */
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RTGCPTR uMWaitECX; /* mwait extensions */
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RTGCPTR uMonitorEAX; /* monitored address. */
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RTGCPTR uMonitorECX; /* monitor extension. */
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RTGCPTR uMonitorEDX; /* monitor hint. */
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/** Padding used in the other rings.
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* This must be larger than jmp_buf on any supported platform. */
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char achPaddingFatalLongJump[HC_ARCH_BITS == 32 ? 176 : 256];
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/** Long buffer jump for fatal VM errors.
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* It will jump to before the outer EM loop is entered. */
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jmp_buf FatalLongJump;
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/** For saving stack space, the disassembler state is allocated here instead of
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* @note The DISCPUSTATE structure is not R3/R0/RZ clean! */
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/** The disassembler scratch space. */
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DISCPUSTATE DisState;
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uint8_t abDisStatePadding[DISCPUSTATE_PADDING_SIZE];
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/** @name Execution profiling.
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STAMPROFILE StatForcedActions;
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STAMPROFILE StatHalted;
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STAMPROFILEADV StatHwAccEntry;
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STAMPROFILE StatHwAccExec;
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STAMPROFILE StatREMEmu;
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STAMPROFILE StatREMExec;
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STAMPROFILE StatREMSync;
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STAMPROFILEADV StatREMTotal;
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STAMPROFILE StatRAWExec;
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STAMPROFILEADV StatRAWEntry;
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STAMPROFILEADV StatRAWTail;
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STAMPROFILEADV StatRAWTotal;
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STAMPROFILEADV StatTotal;
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/** R3: Profiling of emR3RawExecuteIOInstruction. */
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STAMPROFILE StatIOEmu;
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/** R3: Profiling of emR3RawPrivileged. */
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STAMPROFILE StatPrivEmu;
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/** R3: Number of time emR3HwAccExecute is called. */
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STAMCOUNTER StatHwAccExecuteEntry;
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/** More statistics (R3). */
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R3PTRTYPE(PEMSTATS) pStatsR3;
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/** More statistics (R0). */
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R0PTRTYPE(PEMSTATS) pStatsR0;
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/** More statistics (RC). */
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RCPTRTYPE(PEMSTATS) pStatsRC;
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#if HC_ARCH_BITS == 64
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/** Tree for keeping track of cli occurances (debug only). */
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R3PTRTYPE(PAVLGCPTRNODECORE) pCliStatTree;
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STAMCOUNTER StatTotalClis;
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/** 64-bit Visual C++ rounds the struct size up to 16 byte. */
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/** Pointer to EM VM instance data. */
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typedef EMCPU *PEMCPU;
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int emR3HwAccExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
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int emR3RawExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
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int emR3RawHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
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int emR3HwaccmHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
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EMSTATE emR3Reschedule(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
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int emR3ForcedActions(PVM pVM, PVMCPU pVCpu, int rc);
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int emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, int rc);
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int emR3RawUpdateForceFlag(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
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int emR3RawResumeHyper(PVM pVM, PVMCPU pVCpu);
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int emR3RawStep(PVM pVM, PVMCPU pVCpu);
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int emR3SingleStepExecRem(PVM pVM, PVMCPU pVCpu, uint32_t cIterations);