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* Copyright (C) 2007-2010 Texas Instruments, Inc.
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* Copyright (C) 2007-2010, 2012 Texas Instruments, Inc.
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* Copyright (C) 2007-2011 Nokia Corporation
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* Written by Paul Walmsley
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.name = "hdq_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_12m_fck,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP3430_EN_HDQ_SHIFT,
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.recalc = &followparent_recalc,
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CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1),
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CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1),
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CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1),
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CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2PLUS | CK_3517 | CK_36XX),
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CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2PLUS | CK_3517 | CK_36XX),
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CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
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CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
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CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1),
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CLK(NULL, "modem_fck", &modem_fck, CK_34XX | CK_36XX),
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CLK(NULL, "sad2d_ick", &sad2d_ick, CK_34XX | CK_36XX),
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CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
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CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
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CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX),
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CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_3505 | CK_3517),
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CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_AM35XX),
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CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX),
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CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX),
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CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX),
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struct omap_clk *c;
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u32 cpu_clkflg = 0;
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* 3505 must be tested before 3517, since 3517 returns true
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* for both AM3517 chips and AM3517 family chips, which
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* includes 3505. Unfortunately there's no obvious family
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* test for 3517/3505 :-(
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if (cpu_is_omap3505()) {
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cpu_mask = RATE_IN_34XX;
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cpu_clkflg = CK_3505;
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} else if (cpu_is_omap3517()) {
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cpu_mask = RATE_IN_34XX;
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cpu_clkflg = CK_3517;
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} else if (cpu_is_omap3505()) {
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cpu_mask = RATE_IN_34XX;
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cpu_clkflg = CK_3505;
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if (soc_is_am35xx()) {
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cpu_mask = RATE_IN_34XX;
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cpu_clkflg = CK_AM35XX;
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} else if (cpu_is_omap3630()) {
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cpu_mask = (RATE_IN_34XX | RATE_IN_36XX);
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cpu_clkflg = CK_36XX;