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Viewing changes to arch/m68k/platform/520x/gpio.c

  • Committer: Package Import Robot
  • Author(s): Paolo Pisati, Paolo Pisati, Stefan Bader, Upstream Kernel Changes
  • Date: 2012-08-15 17:17:43 UTC
  • Revision ID: package-import@ubuntu.com-20120815171743-h5wnuf51xe7pvdid
Tags: 3.5.0-207.13
[ Paolo Pisati ]

* Start new release

[ Stefan Bader ]

* (config) Enable getabis to use local package copies

[ Upstream Kernel Changes ]

* fixup: gargabe collect iva_seq[0|1] init
* [Config] enable all SND_OMAP_SOC_*s
* fixup: cm2xxx_3xxx.o is needed for omap2_cm_read|write_reg
* fixup: add some snd_soc_dai* helper functions
* fixup: s/snd_soc_dpcm_params/snd_soc_dpcm/g
* fixup: typo, no_host_mode and useless SDP4430 init
* fixup: enable again aess hwmod

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arch/m68k/platform/520x/gpio.c
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/*
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 * Coldfire generic GPIO support
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 *
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 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
8
 
 * the Free Software Foundation; version 2 of the License.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
 
 * GNU General Public License for more details.
14
 
*/
15
 
 
16
 
#include <linux/kernel.h>
17
 
#include <linux/init.h>
18
 
 
19
 
#include <asm/coldfire.h>
20
 
#include <asm/mcfsim.h>
21
 
#include <asm/mcfgpio.h>
22
 
 
23
 
static struct mcf_gpio_chip mcf_gpio_chips[] = {
24
 
        {
25
 
                .gpio_chip                      = {
26
 
                        .label                  = "PIRQ",
27
 
                        .request                = mcf_gpio_request,
28
 
                        .free                   = mcf_gpio_free,
29
 
                        .direction_input        = mcf_gpio_direction_input,
30
 
                        .direction_output       = mcf_gpio_direction_output,
31
 
                        .get                    = mcf_gpio_get_value,
32
 
                        .set                    = mcf_gpio_set_value,
33
 
                        .ngpio                  = 8,
34
 
                },
35
 
                .pddr                           = (void __iomem *) MCFEPORT_EPDDR,
36
 
                .podr                           = (void __iomem *) MCFEPORT_EPDR,
37
 
                .ppdr                           = (void __iomem *) MCFEPORT_EPPDR,
38
 
        },
39
 
        {
40
 
                .gpio_chip                      = {
41
 
                        .label                  = "CS",
42
 
                        .request                = mcf_gpio_request,
43
 
                        .free                   = mcf_gpio_free,
44
 
                        .direction_input        = mcf_gpio_direction_input,
45
 
                        .direction_output       = mcf_gpio_direction_output,
46
 
                        .get                    = mcf_gpio_get_value,
47
 
                        .set                    = mcf_gpio_set_value_fast,
48
 
                        .base                   = 9,
49
 
                        .ngpio                  = 3,
50
 
                },
51
 
                .pddr                           = (void __iomem *) MCFGPIO_PDDR_CS,
52
 
                .podr                           = (void __iomem *) MCFGPIO_PODR_CS,
53
 
                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
54
 
                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
55
 
                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_CS,
56
 
        },
57
 
        {
58
 
                .gpio_chip                      = {
59
 
                        .label                  = "FECI2C",
60
 
                        .request                = mcf_gpio_request,
61
 
                        .free                   = mcf_gpio_free,
62
 
                        .direction_input        = mcf_gpio_direction_input,
63
 
                        .direction_output       = mcf_gpio_direction_output,
64
 
                        .get                    = mcf_gpio_get_value,
65
 
                        .set                    = mcf_gpio_set_value_fast,
66
 
                        .base                   = 16,
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                        .ngpio                  = 4,
68
 
                },
69
 
                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECI2C,
70
 
                .podr                           = (void __iomem *) MCFGPIO_PODR_FECI2C,
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                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
72
 
                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
73
 
                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
74
 
        },
75
 
        {
76
 
                .gpio_chip                      = {
77
 
                        .label                  = "QSPI",
78
 
                        .request                = mcf_gpio_request,
79
 
                        .free                   = mcf_gpio_free,
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                        .direction_input        = mcf_gpio_direction_input,
81
 
                        .direction_output       = mcf_gpio_direction_output,
82
 
                        .get                    = mcf_gpio_get_value,
83
 
                        .set                    = mcf_gpio_set_value_fast,
84
 
                        .base                   = 24,
85
 
                        .ngpio                  = 4,
86
 
                },
87
 
                .pddr                           = (void __iomem *) MCFGPIO_PDDR_QSPI,
88
 
                .podr                           = (void __iomem *) MCFGPIO_PODR_QSPI,
89
 
                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
90
 
                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
91
 
                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_QSPI,
92
 
        },
93
 
        {
94
 
                .gpio_chip                      = {
95
 
                        .label                  = "TIMER",
96
 
                        .request                = mcf_gpio_request,
97
 
                        .free                   = mcf_gpio_free,
98
 
                        .direction_input        = mcf_gpio_direction_input,
99
 
                        .direction_output       = mcf_gpio_direction_output,
100
 
                        .get                    = mcf_gpio_get_value,
101
 
                        .set                    = mcf_gpio_set_value_fast,
102
 
                        .base                   = 32,
103
 
                        .ngpio                  = 4,
104
 
                },
105
 
                .pddr                           = (void __iomem *) MCFGPIO_PDDR_TIMER,
106
 
                .podr                           = (void __iomem *) MCFGPIO_PODR_TIMER,
107
 
                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
108
 
                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
109
 
                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_TIMER,
110
 
        },
111
 
        {
112
 
                .gpio_chip                      = {
113
 
                        .label                  = "UART",
114
 
                        .request                = mcf_gpio_request,
115
 
                        .free                   = mcf_gpio_free,
116
 
                        .direction_input        = mcf_gpio_direction_input,
117
 
                        .direction_output       = mcf_gpio_direction_output,
118
 
                        .get                    = mcf_gpio_get_value,
119
 
                        .set                    = mcf_gpio_set_value_fast,
120
 
                        .base                   = 40,
121
 
                        .ngpio                  = 8,
122
 
                },
123
 
                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UART,
124
 
                .podr                           = (void __iomem *) MCFGPIO_PODR_UART,
125
 
                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UART,
126
 
                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UART,
127
 
                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UART,
128
 
        },
129
 
        {
130
 
                .gpio_chip                      = {
131
 
                        .label                  = "FECH",
132
 
                        .request                = mcf_gpio_request,
133
 
                        .free                   = mcf_gpio_free,
134
 
                        .direction_input        = mcf_gpio_direction_input,
135
 
                        .direction_output       = mcf_gpio_direction_output,
136
 
                        .get                    = mcf_gpio_get_value,
137
 
                        .set                    = mcf_gpio_set_value_fast,
138
 
                        .base                   = 48,
139
 
                        .ngpio                  = 8,
140
 
                },
141
 
                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECH,
142
 
                .podr                           = (void __iomem *) MCFGPIO_PODR_FECH,
143
 
                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECH,
144
 
                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECH,
145
 
                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECH,
146
 
        },
147
 
        {
148
 
                .gpio_chip                      = {
149
 
                        .label                  = "FECL",
150
 
                        .request                = mcf_gpio_request,
151
 
                        .free                   = mcf_gpio_free,
152
 
                        .direction_input        = mcf_gpio_direction_input,
153
 
                        .direction_output       = mcf_gpio_direction_output,
154
 
                        .get                    = mcf_gpio_get_value,
155
 
                        .set                    = mcf_gpio_set_value_fast,
156
 
                        .base                   = 56,
157
 
                        .ngpio                  = 8,
158
 
                },
159
 
                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECL,
160
 
                .podr                           = (void __iomem *) MCFGPIO_PODR_FECL,
161
 
                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECL,
162
 
                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECL,
163
 
                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECL,
164
 
        },
165
 
};
166
 
 
167
 
static int __init mcf_gpio_init(void)
168
 
{
169
 
        unsigned i = 0;
170
 
        while (i < ARRAY_SIZE(mcf_gpio_chips))
171
 
                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
172
 
        return 0;
173
 
}
174
 
 
175
 
core_initcall(mcf_gpio_init);