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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* Author: Kyungmin Park <kyungmin.park@samsung.com>
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* Author: Joonyoung Shim <jy0922.shim@samsung.com>
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* Author: Marek Szyprowski <m.szyprowski@samsung.com>
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <plat/gpio-core.h>
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#include <plat/gpio-cfg.h>
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#include <asm/mach/irq.h>
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#define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u)
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#define CON_OFFSET 0x700
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#define MASK_OFFSET 0x900
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#define PEND_OFFSET 0xA00
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#define REG_OFFSET(x) ((x) << 2)
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struct s5p_gpioint_bank {
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struct list_head list;
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struct samsung_gpio_chip **chips;
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void (*handler)(unsigned int, struct irq_desc *);
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static LIST_HEAD(banks);
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static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type)
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = gc->chip_types;
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unsigned int shift = (d->irq - gc->irq_base) << 2;
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case IRQ_TYPE_EDGE_RISING:
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type = S5P_IRQ_TYPE_EDGE_RISING;
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case IRQ_TYPE_EDGE_FALLING:
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type = S5P_IRQ_TYPE_EDGE_FALLING;
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case IRQ_TYPE_EDGE_BOTH:
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type = S5P_IRQ_TYPE_EDGE_BOTH;
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case IRQ_TYPE_LEVEL_HIGH:
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type = S5P_IRQ_TYPE_LEVEL_HIGH;
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case IRQ_TYPE_LEVEL_LOW:
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type = S5P_IRQ_TYPE_LEVEL_LOW;
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printk(KERN_WARNING "No irq type\n");
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gc->type_cache &= ~(0x7 << shift);
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gc->type_cache |= type << shift;
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writel(gc->type_cache, gc->reg_base + ct->regs.type);
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static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
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struct s5p_gpioint_bank *bank = irq_get_handler_data(irq);
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int group, pend_offset, mask_offset;
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unsigned int pend, mask;
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struct irq_chip *chip = irq_get_chip(irq);
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chained_irq_enter(chip, desc);
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for (group = 0; group < bank->nr_groups; group++) {
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struct samsung_gpio_chip *chip = bank->chips[group];
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pend_offset = REG_OFFSET(group);
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pend = __raw_readl(GPIO_BASE(chip) + PEND_OFFSET + pend_offset);
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mask_offset = REG_OFFSET(group);
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mask = __raw_readl(GPIO_BASE(chip) + MASK_OFFSET + mask_offset);
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int offset = fls(pend) - 1;
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int real_irq = chip->irq_base + offset;
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generic_handle_irq(real_irq);
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pend &= ~BIT(offset);
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chained_irq_exit(chip, desc);
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static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip)
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static int used_gpioint_groups = 0;
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int group = chip->group;
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struct s5p_gpioint_bank *b, *bank = NULL;
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struct irq_chip_generic *gc;
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struct irq_chip_type *ct;
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if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT)
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list_for_each_entry(b, &banks, list) {
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if (group >= b->start && group < b->start + b->nr_groups) {
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if (!bank->handler) {
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bank->chips = kzalloc(sizeof(struct samsung_gpio_chip *) *
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bank->nr_groups, GFP_KERNEL);
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irq_set_chained_handler(bank->irq, s5p_gpioint_handler);
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irq_set_handler_data(bank->irq, bank);
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bank->handler = s5p_gpioint_handler;
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printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n",
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* chained GPIO irq has been successfully registered, allocate new gpio
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* int group and assign irq nubmers
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chip->irq_base = S5P_GPIOINT_BASE +
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used_gpioint_groups * S5P_GPIOINT_GROUP_SIZE;
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used_gpioint_groups++;
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bank->chips[group - bank->start] = chip;
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gc = irq_alloc_generic_chip("s5p_gpioint", 1, chip->irq_base,
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(void __iomem *)GPIO_BASE(chip),
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ct->chip.irq_ack = irq_gc_ack_set_bit;
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ct->chip.irq_mask = irq_gc_mask_set_bit;
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ct->chip.irq_unmask = irq_gc_mask_clr_bit;
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ct->chip.irq_set_type = s5p_gpioint_set_type,
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ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start);
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ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start);
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ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start);
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irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio),
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IRQ_GC_INIT_MASK_CACHE,
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IRQ_NOREQUEST | IRQ_NOPROBE, 0);
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int __init s5p_register_gpio_interrupt(int pin)
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struct samsung_gpio_chip *my_chip = samsung_gpiolib_getchip(pin);
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offset = pin - my_chip->chip.base;
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group = my_chip->group;
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/* check if the group has been already registered */
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if (my_chip->irq_base)
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return my_chip->irq_base + offset;
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/* register gpio group */
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ret = s5p_gpioint_add(my_chip);
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my_chip->chip.to_irq = samsung_gpiolib_to_irq;
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printk(KERN_INFO "Registered interrupt support for gpio group %d.\n",
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return my_chip->irq_base + offset;
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int __init s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups)
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struct s5p_gpioint_bank *bank;
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bank = kzalloc(sizeof(*bank), GFP_KERNEL);
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bank->nr_groups = nr_groups;
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bank->irq = chain_irq;
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list_add_tail(&bank->list, &banks);