2
* Copyright 2010 Matt Turner.
3
* Copyright 2012 Red Hat
5
* This file is subject to the terms and conditions of the GNU General
6
* Public License version 2. See the file COPYING in the main
7
* directory of this archive for more details.
9
* Authors: Matthew Garrett
13
#ifndef __MGAG200_DRV_H__
14
#define __MGAG200_DRV_H__
16
#include <video/vga.h>
18
#include "drm/drm_fb_helper.h"
19
#include "ttm/ttm_bo_api.h"
20
#include "ttm/ttm_bo_driver.h"
21
#include "ttm/ttm_placement.h"
22
#include "ttm/ttm_memory.h"
23
#include "ttm/ttm_module.h"
25
#include <linux/i2c.h>
26
#include <linux/i2c-algo-bit.h>
28
#include "mgag200_reg.h"
30
#define DRIVER_AUTHOR "Matthew Garrett"
32
#define DRIVER_NAME "mgag200"
33
#define DRIVER_DESC "MGA G200 SE"
34
#define DRIVER_DATE "20110418"
36
#define DRIVER_MAJOR 1
37
#define DRIVER_MINOR 0
38
#define DRIVER_PATCHLEVEL 0
40
#define MGAG200FB_CONN_LIMIT 1
42
#define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg))
43
#define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg))
44
#define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg))
45
#define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg))
47
#define ATTR_INDEX 0x1fc0
48
#define ATTR_DATA 0x1fc1
50
#define WREG_ATTR(reg, v) \
53
WREG8(ATTR_INDEX, reg); \
54
WREG8(ATTR_DATA, v); \
57
#define WREG_SEQ(reg, v) \
59
WREG8(MGAREG_SEQ_INDEX, reg); \
60
WREG8(MGAREG_SEQ_DATA, v); \
63
#define WREG_CRT(reg, v) \
65
WREG8(MGAREG_CRTC_INDEX, reg); \
66
WREG8(MGAREG_CRTC_DATA, v); \
70
#define WREG_ECRT(reg, v) \
72
WREG8(MGAREG_CRTCEXT_INDEX, reg); \
73
WREG8(MGAREG_CRTCEXT_DATA, v); \
76
#define GFX_INDEX 0x1fce
77
#define GFX_DATA 0x1fcf
79
#define WREG_GFX(reg, v) \
81
WREG8(GFX_INDEX, reg); \
85
#define DAC_INDEX 0x3c00
86
#define DAC_DATA 0x3c0a
88
#define WREG_DAC(reg, v) \
90
WREG8(DAC_INDEX, reg); \
94
#define MGA_MISC_OUT 0x1fc2
95
#define MGA_MISC_IN 0x1fcc
97
#define MGAG200_MAX_FB_HEIGHT 4096
98
#define MGAG200_MAX_FB_WIDTH 4096
100
#define MATROX_DPMS_CLEARED (-1)
102
#define to_mga_crtc(x) container_of(x, struct mga_crtc, base)
103
#define to_mga_encoder(x) container_of(x, struct mga_encoder, base)
104
#define to_mga_connector(x) container_of(x, struct mga_connector, base)
105
#define to_mga_framebuffer(x) container_of(x, struct mga_framebuffer, base)
107
struct mga_framebuffer {
108
struct drm_framebuffer base;
109
struct drm_gem_object *obj;
113
struct drm_fb_helper helper;
114
struct mga_framebuffer mfb;
115
struct list_head fbdev_list;
118
struct ttm_bo_kmap_obj mapping;
122
struct drm_crtc base;
123
u8 lut_r[256], lut_g[256], lut_b[256];
128
struct mga_mode_info {
129
bool mode_config_initialized;
130
struct mga_crtc *crtc;
134
struct drm_encoder base;
139
struct mga_i2c_chan {
140
struct i2c_adapter adapter;
141
struct drm_device *dev;
142
struct i2c_algo_bit_data bit;
146
struct mga_connector {
147
struct drm_connector base;
148
struct mga_i2c_chan *i2c;
153
resource_size_t vram_size;
154
resource_size_t vram_base;
155
resource_size_t vram_window;
167
#define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
170
struct drm_device *dev;
173
resource_size_t rmmio_base;
174
resource_size_t rmmio_size;
177
drm_local_map_t *framebuffer;
180
struct mga_mode_info mode_info;
182
struct mga_fbdev *mfbdev;
188
struct drm_display_mode mode;
195
struct drm_global_reference mem_global_ref;
196
struct ttm_bo_global_ref bo_global_ref;
197
struct ttm_bo_device bdev;
198
atomic_t validate_sequence;
201
u32 reg_1e24; /* SE model number */
206
struct ttm_buffer_object bo;
207
struct ttm_placement placement;
208
struct ttm_bo_kmap_obj kmap;
209
struct drm_gem_object gem;
213
#define gem_to_mga_bo(gobj) container_of((gobj), struct mgag200_bo, gem)
215
static inline struct mgag200_bo *
216
mgag200_bo(struct ttm_buffer_object *bo)
218
return container_of(bo, struct mgag200_bo, bo);
221
void mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
222
u16 blue, int regno);
223
void mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
224
u16 *blue, int regno);
227
int mgag200_modeset_init(struct mga_device *mdev);
228
void mgag200_modeset_fini(struct mga_device *mdev);
231
int mgag200_fbdev_init(struct mga_device *mdev);
232
void mgag200_fbdev_fini(struct mga_device *mdev);
235
int mgag200_framebuffer_init(struct drm_device *dev,
236
struct mga_framebuffer *mfb,
237
struct drm_mode_fb_cmd2 *mode_cmd,
238
struct drm_gem_object *obj);
241
int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
242
int mgag200_driver_unload(struct drm_device *dev);
243
int mgag200_gem_create(struct drm_device *dev,
244
u32 size, bool iskernel,
245
struct drm_gem_object **obj);
246
int mgag200_gem_init_object(struct drm_gem_object *obj);
247
int mgag200_dumb_create(struct drm_file *file,
248
struct drm_device *dev,
249
struct drm_mode_create_dumb *args);
250
int mgag200_dumb_destroy(struct drm_file *file,
251
struct drm_device *dev,
253
void mgag200_gem_free_object(struct drm_gem_object *obj);
255
mgag200_dumb_mmap_offset(struct drm_file *file,
256
struct drm_device *dev,
260
struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);
261
void mgag200_i2c_destroy(struct mga_i2c_chan *i2c);
263
#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
264
void mgag200_ttm_placement(struct mgag200_bo *bo, int domain);
266
int mgag200_bo_reserve(struct mgag200_bo *bo, bool no_wait);
267
void mgag200_bo_unreserve(struct mgag200_bo *bo);
268
int mgag200_bo_create(struct drm_device *dev, int size, int align,
269
uint32_t flags, struct mgag200_bo **pastbo);
270
int mgag200_mm_init(struct mga_device *mdev);
271
void mgag200_mm_fini(struct mga_device *mdev);
272
int mgag200_mmap(struct file *filp, struct vm_area_struct *vma);
273
int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr);
274
int mgag200_bo_unpin(struct mgag200_bo *bo);
275
int mgag200_bo_push_sysram(struct mgag200_bo *bo);
276
#endif /* __MGAG200_DRV_H__ */