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@setfilename qemu-tech.info
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@settitle QEMU Internals
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* QEMU Internals: (qemu-tech). The QEMU Emulator Internals.
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@center @titlefont{QEMU Internals}
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* intro_features:: Features
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* intro_x86_emulation:: x86 and x86-64 emulation
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* intro_arm_emulation:: ARM emulation
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* intro_mips_emulation:: MIPS emulation
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* intro_ppc_emulation:: PowerPC emulation
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* intro_sparc_emulation:: Sparc32 and Sparc64 emulation
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* intro_xtensa_emulation:: Xtensa emulation
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* intro_other_emulation:: Other CPU emulation
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QEMU is a FAST! processor emulator using a portable dynamic
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QEMU has two operating modes:
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Full system emulation. In this mode (full platform virtualization),
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QEMU emulates a full system (usually a PC), including a processor and
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various peripherals. It can be used to launch several different
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Operating Systems at once without rebooting the host machine or to
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User mode emulation. In this mode (application level virtualization),
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QEMU can launch processes compiled for one CPU on another CPU, however
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the Operating Systems must match. This can be used for example to ease
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cross-compilation and cross-debugging.
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As QEMU requires no host kernel driver to run, it is very safe and
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QEMU generic features:
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@item User space only or full system emulation.
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@item Using dynamic translation to native code for reasonable speed.
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Working on x86, x86_64 and PowerPC32/64 hosts. Being tested on ARM,
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HPPA, Sparc32 and Sparc64. Previous versions had some support for
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Alpha and S390 hosts, but TCG (see below) doesn't support those yet.
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@item Self-modifying code support.
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@item Precise exceptions support.
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@item The virtual CPU is a library (@code{libqemu}) which can be used
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in other projects (look at @file{qemu/tests/qruncom.c} to have an
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example of user mode @code{libqemu} usage).
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Floating point library supporting both full software emulation and
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native host FPU instructions.
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QEMU user mode emulation features:
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@item Generic Linux system call converter, including most ioctls.
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@item clone() emulation using native CPU clone() to use Linux scheduler for threads.
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@item Accurate signal handling by remapping host signals to target signals.
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Linux user emulator (Linux host only) can be used to launch the Wine
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Windows API emulator (@url{http://www.winehq.org}). A Darwin user
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emulator (Darwin hosts only) exists and a BSD user emulator for BSD
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hosts is under development. It would also be possible to develop a
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similar user emulator for Solaris.
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QEMU full system emulation features:
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QEMU uses a full software MMU for maximum portability.
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QEMU can optionally use an in-kernel accelerator, like kvm. The accelerators
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execute some of the guest code natively, while
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continuing to emulate the rest of the machine.
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Various hardware devices can be emulated and in some cases, host
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devices (e.g. serial and parallel ports, USB, drives) can be used
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transparently by the guest Operating System. Host device passthrough
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can be used for talking to external physical peripherals (e.g. a
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webcam, modem or tape drive).
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Symmetric multiprocessing (SMP) even on a host with a single CPU. On a
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SMP host system, QEMU can use only one CPU fully due to difficulty in
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implementing atomic memory accesses efficiently.
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@node intro_x86_emulation
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@section x86 and x86-64 emulation
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QEMU x86 target features:
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@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
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LDT/GDT and IDT are emulated. VM86 mode is also supported to run
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DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3,
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and SSE4 as well as x86-64 SVM.
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@item Support of host page sizes bigger than 4KB in user mode emulation.
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@item QEMU can emulate itself on x86.
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@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
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It can be used to test other x86 virtual CPUs.
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Current QEMU limitations:
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@item Limited x86-64 support.
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@item IPC syscalls are missing.
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@item The x86 segment limits and access rights are not tested at every
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memory access (yet). Hopefully, very few OSes seem to rely on that for
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@node intro_arm_emulation
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@section ARM emulation
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@item Full ARM 7 user emulation.
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@item NWFPE FPU support included in user Linux emulation.
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@item Can run most ARM Linux binaries.
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@node intro_mips_emulation
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@section MIPS emulation
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@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation,
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including privileged instructions, FPU and MMU, in both little and big
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@item The Linux userland emulation can run many 32 bit MIPS Linux binaries.
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Current QEMU limitations:
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@item Self-modifying code is not always handled correctly.
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@item 64 bit userland emulation is not implemented.
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@item The system emulation is not complete enough to run real firmware.
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@item The watchpoint debug facility is not implemented.
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@node intro_ppc_emulation
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@section PowerPC emulation
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@item Full PowerPC 32 bit emulation, including privileged instructions,
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@item Can run most PowerPC Linux binaries.
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@node intro_sparc_emulation
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@section Sparc32 and Sparc64 emulation
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@item Full SPARC V8 emulation, including privileged
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instructions, FPU and MMU. SPARC V9 emulation includes most privileged
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and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
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@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
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some 64-bit SPARC Linux binaries.
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Current QEMU limitations:
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@item IPC syscalls are missing.
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@item Floating point exception support is buggy.
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@item Atomic instructions are not correctly implemented.
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@item There are still some problems with Sparc64 emulators.
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@node intro_xtensa_emulation
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@section Xtensa emulation
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@item Core Xtensa ISA emulation, including most options: code density,
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loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
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MAC16, miscellaneous operations, boolean, multiprocessor synchronization,
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conditional store, exceptions, relocatable vectors, unaligned exception,
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interrupts (including high priority and timer), hardware alignment,
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region protection, region translation, MMU, windowed registers, thread
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pointer, processor ID.
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@item Not implemented options: FP coprocessor, coprocessor context,
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data/instruction cache (including cache prefetch and locking), XLMI,
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processor interface, debug. Also options not covered by the core ISA
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(e.g. FLIX, wide branches) are not implemented.
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@item Can run most Xtensa Linux binaries.
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@item New core configuration that requires no additional instructions
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may be created from overlay with minimal amount of hand-written code.
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@node intro_other_emulation
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@section Other CPU emulation
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In addition to the above, QEMU supports emulation of other CPUs with
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varying levels of success. These are:
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@chapter QEMU Internals
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* QEMU compared to other emulators::
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* Portable dynamic translation::
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* Condition code optimisations::
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* CPU state optimisations::
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* Translation cache::
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* Direct block chaining::
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* Self-modifying code and translated code invalidation::
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* Exception support::
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* Hardware interrupts::
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* User emulation specific details::
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@node QEMU compared to other emulators
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@section QEMU compared to other emulators
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Like bochs [3], QEMU emulates an x86 CPU. But QEMU is much faster than
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bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC
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emulation while QEMU can emulate several processors.
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Like Valgrind [2], QEMU does user space emulation and dynamic
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translation. Valgrind is mainly a memory debugger while QEMU has no
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support for it (QEMU could be used to detect out of bound memory
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accesses as Valgrind, but it has no support to track uninitialised data
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as Valgrind does). The Valgrind dynamic translator generates better code
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than QEMU (in particular it does register allocation) but it is closely
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tied to an x86 host and target and has no support for precise exceptions
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and system emulation.
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EM86 [4] is the closest project to user space QEMU (and QEMU still uses
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some of its code, in particular the ELF file loader). EM86 was limited
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to an alpha host and used a proprietary and slow interpreter (the
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interpreter part of the FX!32 Digital Win32 code translator [5]).
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TWIN [6] is a Windows API emulator like Wine. It is less accurate than
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Wine but includes a protected mode x86 interpreter to launch x86 Windows
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executables. Such an approach has greater potential because most of the
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Windows API is executed natively but it is far more difficult to develop
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because all the data structures and function parameters exchanged
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between the API and the x86 code must be converted.
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User mode Linux [7] was the only solution before QEMU to launch a
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Linux kernel as a process while not needing any host kernel
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patches. However, user mode Linux requires heavy kernel patches while
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QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is
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The Plex86 [8] PC virtualizer is done in the same spirit as the now
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obsolete qemu-fast system emulator. It requires a patched Linux kernel
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to work (you cannot launch the same kernel on your PC), but the
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patches are really small. As it is a PC virtualizer (no emulation is
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done except for some privileged instructions), it has the potential of
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being faster than QEMU. The downside is that a complicated (and
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potentially unsafe) host kernel patch is needed.
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The commercial PC Virtualizers (VMWare [9], VirtualPC [10], TwoOStwo
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[11]) are faster than QEMU, but they all need specific, proprietary
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and potentially unsafe host drivers. Moreover, they are unable to
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provide cycle exact simulation as an emulator can.
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VirtualBox [12], Xen [13] and KVM [14] are based on QEMU. QEMU-SystemC
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[15] uses QEMU to simulate a system where some hardware devices are
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developed in SystemC.
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@node Portable dynamic translation
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@section Portable dynamic translation
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QEMU is a dynamic translator. When it first encounters a piece of code,
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it converts it to the host instruction set. Usually dynamic translators
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are very complicated and highly CPU dependent. QEMU uses some tricks
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which make it relatively easily portable and simple while achieving good
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After the release of version 0.9.1, QEMU switched to a new method of
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generating code, Tiny Code Generator or TCG. TCG relaxes the
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dependency on the exact version of the compiler used. The basic idea
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is to split every target instruction into a couple of RISC-like TCG
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ops (see @code{target-i386/translate.c}). Some optimizations can be
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performed at this stage, including liveness analysis and trivial
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constant expression evaluation. TCG ops are then implemented in the
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host CPU back end, also known as TCG target (see
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@code{tcg/i386/tcg-target.c}). For more information, please take a
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look at @code{tcg/README}.
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@node Condition code optimisations
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@section Condition code optimisations
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Lazy evaluation of CPU condition codes (@code{EFLAGS} register on x86)
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is important for CPUs where every instruction sets the condition
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codes. It tends to be less important on conventional RISC systems
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where condition codes are only updated when explicitly requested. On
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Sparc64, costly update of both 32 and 64 bit condition codes can be
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avoided with lazy evaluation.
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Instead of computing the condition codes after each x86 instruction,
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QEMU just stores one operand (called @code{CC_SRC}), the result
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(called @code{CC_DST}) and the type of operation (called
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@code{CC_OP}). When the condition codes are needed, the condition
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codes can be calculated using this information. In addition, an
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optimized calculation can be performed for some instruction types like
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conditional branches.
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@code{CC_OP} is almost never explicitly set in the generated code
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because it is known at translation time.
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The lazy condition code evaluation is used on x86, m68k, cris and
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Sparc. ARM uses a simplified variant for the N and Z flags.
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@node CPU state optimisations
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@section CPU state optimisations
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The target CPUs have many internal states which change the way it
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evaluates instructions. In order to achieve a good speed, the
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translation phase considers that some state information of the virtual
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CPU cannot change in it. The state is recorded in the Translation
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Block (TB). If the state changes (e.g. privilege level), a new TB will
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be generated and the previous TB won't be used anymore until the state
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matches the state recorded in the previous TB. For example, if the SS,
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DS and ES segments have a zero base, then the translator does not even
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generate an addition for the segment base.
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[The FPU stack pointer register is not handled that way yet].
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@node Translation cache
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@section Translation cache
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A 32 MByte cache holds the most recently used translations. For
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simplicity, it is completely flushed when it is full. A translation unit
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contains just a single basic block (a block of x86 instructions
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terminated by a jump or by a virtual CPU state change which the
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translator cannot deduce statically).
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@node Direct block chaining
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@section Direct block chaining
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After each translated basic block is executed, QEMU uses the simulated
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Program Counter (PC) and other cpu state informations (such as the CS
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segment base value) to find the next basic block.
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In order to accelerate the most common cases where the new simulated PC
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is known, QEMU can patch a basic block so that it jumps directly to the
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The most portable code uses an indirect jump. An indirect jump makes
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it easier to make the jump target modification atomic. On some host
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architectures (such as x86 or PowerPC), the @code{JUMP} opcode is
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directly patched so that the block chaining has no overhead.
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@node Self-modifying code and translated code invalidation
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@section Self-modifying code and translated code invalidation
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Self-modifying code is a special challenge in x86 emulation because no
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instruction cache invalidation is signaled by the application when code
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When translated code is generated for a basic block, the corresponding
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host page is write protected if it is not already read-only. Then, if
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a write access is done to the page, Linux raises a SEGV signal. QEMU
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then invalidates all the translated code in the page and enables write
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accesses to the page.
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Correct translated code invalidation is done efficiently by maintaining
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a linked list of every translated block contained in a given page. Other
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linked lists are also maintained to undo direct block chaining.
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On RISC targets, correctly written software uses memory barriers and
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cache flushes, so some of the protection above would not be
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necessary. However, QEMU still requires that the generated code always
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matches the target instructions in memory in order to handle
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exceptions correctly.
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@node Exception support
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@section Exception support
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longjmp() is used when an exception such as division by zero is
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The host SIGSEGV and SIGBUS signal handlers are used to get invalid
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memory accesses. The simulated program counter is found by
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retranslating the corresponding basic block and by looking where the
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host program counter was at the exception point.
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The virtual CPU cannot retrieve the exact @code{EFLAGS} register because
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in some cases it is not computed because of condition code
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optimisations. It is not a big concern because the emulated code can
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still be restarted in any cases.
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@section MMU emulation
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For system emulation QEMU supports a soft MMU. In that mode, the MMU
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virtual to physical address translation is done at every memory
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access. QEMU uses an address translation cache to speed up the
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In order to avoid flushing the translated code each time the MMU
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mappings change, QEMU uses a physically indexed translation cache. It
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means that each basic block is indexed with its physical address.
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When MMU mappings change, only the chaining of the basic blocks is
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reset (i.e. a basic block can no longer jump directly to another one).
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@node Device emulation
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@section Device emulation
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Systems emulated by QEMU are organized by boards. At initialization
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phase, each board instantiates a number of CPUs, devices, RAM and
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ROM. Each device in turn can assign I/O ports or memory areas (for
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MMIO) to its handlers. When the emulation starts, an access to the
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ports or MMIO memory areas assigned to the device causes the
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corresponding handler to be called.
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RAM and ROM are handled more optimally, only the offset to the host
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memory needs to be added to the guest address.
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The video RAM of VGA and other display cards is special: it can be
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read or written directly like RAM, but write accesses cause the memory
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to be marked with VGA_DIRTY flag as well.
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QEMU supports some device classes like serial and parallel ports, USB,
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drives and network devices, by providing APIs for easier connection to
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the generic, higher level implementations. The API hides the
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implementation details from the devices, like native device use or
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advanced block device formats like QCOW.
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Usually the devices implement a reset method and register support for
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saving and loading of the device state. The devices can also use
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timers, especially together with the use of bottom halves (BHs).
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@node Hardware interrupts
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@section Hardware interrupts
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In order to be faster, QEMU does not check at every basic block if an
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hardware interrupt is pending. Instead, the user must asynchronously
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call a specific function to tell that an interrupt is pending. This
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function resets the chaining of the currently executing basic
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block. It ensures that the execution will return soon in the main loop
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of the CPU emulator. Then the main loop can test if the interrupt is
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pending and handle it.
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@node User emulation specific details
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@section User emulation specific details
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@subsection Linux system call translation
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QEMU includes a generic system call translator for Linux. It means that
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the parameters of the system calls can be converted to fix the
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endianness and 32/64 bit issues. The IOCTLs are converted with a generic
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type description system (see @file{ioctls.h} and @file{thunk.c}).
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QEMU supports host CPUs which have pages bigger than 4KB. It records all
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the mappings the process does and try to emulated the @code{mmap()}
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system calls in cases where the host @code{mmap()} call would fail
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because of bad page alignment.
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@subsection Linux signals
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Normal and real-time signals are queued along with their information
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(@code{siginfo_t}) as it is done in the Linux kernel. Then an interrupt
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request is done to the virtual CPU. When it is interrupted, one queued
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signal is handled by generating a stack frame in the virtual CPU as the
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Linux kernel does. The @code{sigreturn()} system call is emulated to return
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from the virtual signal handler.
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Some signals (such as SIGALRM) directly come from the host. Other
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signals are synthesized from the virtual CPU exceptions such as SIGFPE
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when a division by zero is done (see @code{main.c:cpu_loop()}).
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The blocked signal mask is still handled by the host Linux kernel so
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that most signal system calls can be redirected directly to the host
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Linux kernel. Only the @code{sigaction()} and @code{sigreturn()} system
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calls need to be fully emulated (see @file{signal.c}).
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@subsection clone() system call and threads
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The Linux clone() system call is usually used to create a thread. QEMU
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uses the host clone() system call so that real host threads are created
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for each emulated thread. One virtual CPU instance is created for each
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The virtual x86 CPU atomic operations are emulated with a global lock so
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that their semantic is preserved.
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Note that currently there are still some locking issues in QEMU. In
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particular, the translated cache flush is not protected yet against
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@subsection Self-virtualization
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QEMU was conceived so that ultimately it can emulate itself. Although
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it is not very useful, it is an important test to show the power of the
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Achieving self-virtualization is not easy because there may be address
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space conflicts. QEMU user emulators solve this problem by being an
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executable ELF shared object as the ld-linux.so ELF interpreter. That
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way, it can be relocated at load time.
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@section Bibliography
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@url{http://citeseer.nj.nec.com/piumarta98optimizing.html}, Optimizing
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direct threaded code by selective inlining (1998) by Ian Piumarta, Fabio
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@url{http://developer.kde.org/~sewardj/}, Valgrind, an open-source
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memory debugger for x86-GNU/Linux, by Julian Seward.
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@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project,
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by Kevin Lawton et al.
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@url{http://www.cs.rose-hulman.edu/~donaldlf/em86/index.html}, the EM86
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x86 emulator on Alpha-Linux.
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@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf},
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DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton
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Chernoff and Ray Hookway.
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@url{http://www.willows.com/}, Windows API library emulation from
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@url{http://user-mode-linux.sourceforge.net/},
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The User-mode Linux Kernel.
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@url{http://www.plex86.org/},
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The new Plex86 project.
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@url{http://www.vmware.com/},
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The VMWare PC virtualizer.
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@url{http://www.microsoft.com/windowsxp/virtualpc/},
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The VirtualPC PC virtualizer.
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@url{http://www.twoostwo.org/},
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The TwoOStwo PC virtualizer.
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@url{http://virtualbox.org/},
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The VirtualBox PC virtualizer.
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@url{http://www.xen.org/},
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@url{http://kvm.qumranet.com/kvmwiki/Front_Page},
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Kernel Based Virtual Machine (KVM).
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@url{http://www.greensocs.com/projects/QEMUSystemC},
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QEMU-SystemC, a hardware co-simulator.
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@node Regression Tests
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@chapter Regression Tests
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In the directory @file{tests/}, various interesting testing programs
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are available. They are used for regression testing.
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@section @file{test-i386}
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This program executes most of the 16 bit and 32 bit x86 instructions and
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generates a text output. It can be compared with the output obtained with
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a real CPU or another emulator. The target @code{make test} runs this
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program and a @code{diff} on the generated output.
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The Linux system call @code{modify_ldt()} is used to create x86 selectors
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to test some 16 bit addressing and 32 bit with segmentation cases.
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The Linux system call @code{vm86()} is used to test vm86 emulation.
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Various exceptions are raised to test most of the x86 user space
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@section @file{linux-test}
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This program tests various Linux system calls. It is used to verify
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that the system call parameters are correctly converted between target
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@section @file{qruncom.c}
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Example of usage of @code{libqemu} to emulate a user mode i386 CPU.
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qemu-tech.texi
