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Viewing changes to Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp

  • Committer: Sérgio Benjamim
  • Date: 2015-02-13 05:54:40 UTC
  • Revision ID: sergio_br2@yahoo.com.br-20150213055440-ey2rt3sjpy27km78
Dolphin Triforce branch from code.google, commit b957980 (4.0-315).

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Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp
 
1
// Copyright 2013 Dolphin Emulator Project
 
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// Licensed under GPLv2
 
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// Refer to the license.txt file included.
 
4
 
 
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#include "Common.h"
 
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#include "JitILBase.h"
 
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#include "../../HW/SystemTimers.h"
 
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void JitILBase::mtspr(UGeckoInstruction inst)
 
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{
 
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        INSTRUCTION_START
 
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                JITDISABLE(bJITSystemRegistersOff)
 
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                u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F);
 
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        switch(iIndex) {
 
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                case SPR_TL:
 
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                case SPR_TU:
 
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                        Default(inst);
 
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                        return;
 
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                case SPR_LR:
 
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                        ibuild.EmitStoreLink(ibuild.EmitLoadGReg(inst.RD));
 
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                        return;
 
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                case SPR_CTR:
 
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                        ibuild.EmitStoreCTR(ibuild.EmitLoadGReg(inst.RD));
 
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                        return;
 
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                case SPR_GQR0:
 
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                case SPR_GQR0 + 1:
 
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                case SPR_GQR0 + 2:
 
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                case SPR_GQR0 + 3:
 
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                case SPR_GQR0 + 4:
 
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                case SPR_GQR0 + 5:
 
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                case SPR_GQR0 + 6:
 
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                case SPR_GQR0 + 7:
 
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                        ibuild.EmitStoreGQR(ibuild.EmitLoadGReg(inst.RD), iIndex - SPR_GQR0);
 
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                        return;
 
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                case SPR_SRR0:
 
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                case SPR_SRR1:
 
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                        ibuild.EmitStoreSRR(ibuild.EmitLoadGReg(inst.RD), iIndex - SPR_SRR0);
 
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                        return;
 
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                default:
 
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                        Default(inst);
 
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                        return;
 
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        }
 
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}
 
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void JitILBase::mfspr(UGeckoInstruction inst)
 
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{
 
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        INSTRUCTION_START
 
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                JITDISABLE(bJITSystemRegistersOff)
 
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                u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F);
 
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        switch (iIndex)
 
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        {
 
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        case SPR_TL:
 
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        case SPR_TU:
 
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                Default(inst);
 
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                return;
 
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        case SPR_LR:
 
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                ibuild.EmitStoreGReg(ibuild.EmitLoadLink(), inst.RD);
 
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                return;
 
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        case SPR_CTR:
 
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                ibuild.EmitStoreGReg(ibuild.EmitLoadCTR(), inst.RD);
 
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                return;
 
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        case SPR_GQR0:
 
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        case SPR_GQR0 + 1:
 
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        case SPR_GQR0 + 2:
 
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        case SPR_GQR0 + 3:
 
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        case SPR_GQR0 + 4:
 
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        case SPR_GQR0 + 5:
 
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        case SPR_GQR0 + 6:
 
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        case SPR_GQR0 + 7:
 
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                ibuild.EmitStoreGReg(ibuild.EmitLoadGQR(iIndex - SPR_GQR0), inst.RD);
 
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                return;
 
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        default:
 
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                Default(inst);
 
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                return;
 
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        }
 
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}
 
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80
 
 
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// =======================================================================================
 
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// Don't interpret this, if we do we get thrown out
 
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// --------------
 
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void JitILBase::mtmsr(UGeckoInstruction inst)
 
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{
 
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        ibuild.EmitStoreMSR(ibuild.EmitLoadGReg(inst.RS), ibuild.EmitIntConst(js.compilerPC));
 
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        ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
 
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}
 
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// ==============
 
90
 
 
91
 
 
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void JitILBase::mfmsr(UGeckoInstruction inst)
 
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{
 
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        INSTRUCTION_START
 
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                JITDISABLE(bJITSystemRegistersOff)
 
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                ibuild.EmitStoreGReg(ibuild.EmitLoadMSR(), inst.RD);
 
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}
 
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void JitILBase::mftb(UGeckoInstruction inst)
 
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{
 
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        INSTRUCTION_START;
 
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        JITDISABLE(bJITSystemRegistersOff)
 
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                mfspr(inst);
 
104
}
 
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void JitILBase::mfcr(UGeckoInstruction inst)
 
107
{
 
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        INSTRUCTION_START;
 
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        JITDISABLE(bJITSystemRegistersOff)
 
110
 
 
111
        IREmitter::InstLoc d = ibuild.EmitIntConst(0);
 
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        for (int i = 0; i < 8; ++i)
 
113
        {
 
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                d = ibuild.EmitShl(d, ibuild.EmitIntConst(4));
 
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                d = ibuild.EmitOr(d, ibuild.EmitLoadCR(i));
 
116
        }
 
117
        ibuild.EmitStoreGReg(d, inst.RD);
 
118
}
 
119
 
 
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void JitILBase::mtcrf(UGeckoInstruction inst)
 
121
{
 
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        INSTRUCTION_START;
 
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        JITDISABLE(bJITSystemRegistersOff)
 
124
 
 
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        IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS);
 
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        for (int i = 0; i < 8; ++i)
 
127
        {
 
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                if (inst.CRM & (0x80 >> i))
 
129
                {
 
130
                        IREmitter::InstLoc value;
 
131
                        value = ibuild.EmitShrl(s, ibuild.EmitIntConst(28 - i * 4));
 
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                        value = ibuild.EmitAnd(value, ibuild.EmitIntConst(0xF));
 
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                        ibuild.EmitStoreCR(value, i);
 
134
                }
 
135
        }
 
136
}
 
137
 
 
138
void JitILBase::mcrf(UGeckoInstruction inst)
 
139
{
 
140
        INSTRUCTION_START
 
141
        JITDISABLE(bJITSystemRegistersOff)
 
142
 
 
143
        if (inst.CRFS != inst.CRFD)
 
144
        {
 
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                ibuild.EmitStoreCR(ibuild.EmitLoadCR(inst.CRFS), inst.CRFD);
 
146
        }
 
147
}
 
148
 
 
149
void JitILBase::crXX(UGeckoInstruction inst)
 
150
{
 
151
        // Ported from Jit_SystemRegister.cpp
 
152
 
 
153
        // Get bit CRBA in EAX aligned with bit CRBD
 
154
        const int shiftA = (inst.CRBD & 3) - (inst.CRBA & 3);
 
155
        IREmitter::InstLoc eax = ibuild.EmitLoadCR(inst.CRBA >> 2);
 
156
        if (shiftA < 0)
 
157
                eax = ibuild.EmitShl(eax, ibuild.EmitIntConst(-shiftA));
 
158
        else if (shiftA > 0)
 
159
                eax = ibuild.EmitShrl(eax, ibuild.EmitIntConst(shiftA));
 
160
 
 
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        // Get bit CRBB in ECX aligned with bit CRBD
 
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        const int shiftB = (inst.CRBD & 3) - (inst.CRBB & 3);
 
163
        IREmitter::InstLoc ecx = ibuild.EmitLoadCR(inst.CRBB >> 2);
 
164
        if (shiftB < 0)
 
165
                ecx = ibuild.EmitShl(ecx, ibuild.EmitIntConst(-shiftB));
 
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        else if (shiftB > 0)
 
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                ecx = ibuild.EmitShrl(ecx, ibuild.EmitIntConst(shiftB));
 
168
 
 
169
        // Compute combined bit
 
170
        const unsigned subop = inst.SUBOP10;
 
171
        switch (subop) {
 
172
                case 257:
 
173
                        // crand
 
174
                        eax = ibuild.EmitAnd(eax, ecx); 
 
175
                        break;
 
176
                case 129:
 
177
                        // crandc
 
178
                        ecx = ibuild.EmitNot(ecx);
 
179
                        eax = ibuild.EmitAnd(eax, ecx); 
 
180
                        break;
 
181
                case 289:
 
182
                        // creqv
 
183
                        eax = ibuild.EmitXor(eax, ecx);
 
184
                        eax = ibuild.EmitNot(eax);
 
185
                        break;
 
186
                case 225:
 
187
                        // crnand
 
188
                        eax = ibuild.EmitAnd(eax, ecx);
 
189
                        eax = ibuild.EmitNot(eax);
 
190
                        break;
 
191
                case 33:
 
192
                        // crnor
 
193
                        eax = ibuild.EmitOr(eax, ecx);
 
194
                        eax = ibuild.EmitNot(eax);
 
195
                        break;
 
196
                case 449:
 
197
                        // cror
 
198
                        eax = ibuild.EmitOr(eax, ecx);
 
199
                        break;
 
200
                case 417:
 
201
                        // crorc
 
202
                        ecx = ibuild.EmitNot(ecx);
 
203
                        eax = ibuild.EmitOr(eax, ecx);
 
204
                        break;
 
205
                case 193:
 
206
                        // crxor
 
207
                        eax = ibuild.EmitXor(eax, ecx);
 
208
                        break;
 
209
                default:
 
210
                        PanicAlert("crXX: invalid instruction");
 
211
                        break;
 
212
        }
 
213
 
 
214
        // Store result bit in CRBD
 
215
        eax = ibuild.EmitAnd(eax, ibuild.EmitIntConst(0x8 >> (inst.CRBD & 3)));
 
216
        IREmitter::InstLoc bd = ibuild.EmitLoadCR(inst.CRBD >> 2);
 
217
        bd = ibuild.EmitAnd(bd, ibuild.EmitIntConst(~(0x8 >> (inst.CRBD & 3))));
 
218
        bd = ibuild.EmitOr(bd, eax);
 
219
        ibuild.EmitStoreCR(bd, inst.CRBD >> 2);
 
220
}