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/**************************************************************************
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Copyright 2001 VA Linux Systems Inc., Fremont, California.
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Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas.
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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on the rights to use, copy, modify, merge, publish, distribute, sub
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license, and/or sell copies of the Software, and to permit persons to whom
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the Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice (including the next
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paragraph) shall be included in all copies or substantial portions of the
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h,v 1.1 2002/09/11 00:29:32 dawes Exp $ */
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#ifndef _I830_COMMON_H_
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#define _I830_COMMON_H_
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#define I830_NR_TEX_REGIONS 255 /* maximum due to use of chars for next/prev */
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#define I830_LOG_MIN_TEX_REGION_SIZE 14
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/* Driver specific DRM command indices
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* NOTE: these are not OS specific, but they are driver specific
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#define DRM_I830_INIT 0x00
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#define DRM_I830_FLUSH 0x01
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#define DRM_I830_FLIP 0x02
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#define DRM_I830_BATCHBUFFER 0x03
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#define DRM_I830_IRQ_EMIT 0x04
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#define DRM_I830_IRQ_WAIT 0x05
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#define DRM_I830_GETPARAM 0x06
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#define DRM_I830_SETPARAM 0x07
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#define DRM_I830_ALLOC 0x08
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#define DRM_I830_FREE 0x09
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#define DRM_I830_INIT_HEAP 0x0a
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#define DRM_I830_CMDBUFFER 0x0b
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#define DRM_I830_DESTROY_HEAP 0x0c
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#define DRM_I830_SET_VBLANK_PIPE 0x0d
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#define DRM_I830_GET_VBLANK_PIPE 0x0e
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I830_CLEANUP_DMA = 0x02,
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I830_RESUME_DMA = 0x03
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unsigned int mmio_offset;
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int sarea_priv_offset;
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unsigned int ring_start;
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unsigned int ring_end;
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unsigned int ring_size;
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unsigned int front_offset;
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unsigned int back_offset;
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unsigned int depth_offset;
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unsigned int pitch_bits;
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unsigned int back_pitch;
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unsigned int depth_pitch;
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drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
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int last_upload; /* last time texture was uploaded */
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int last_enqueue; /* last time a buffer was enqueued */
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int last_dispatch; /* age of the most recently dispatched buffer */
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int ctxOwner; /* last context to upload state */
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int pf_enabled; /* is pageflipping allowed? */
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int pf_current_page; /* which buffer is being displayed? */
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int perf_boxes; /* performance boxes to be displayed */
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int width, height; /* screen size in pixels */
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drm_handle_t front_handle;
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drm_handle_t back_handle;
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drm_handle_t depth_handle;
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drm_handle_t tex_handle;
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int log_tex_granularity;
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int rotation; /* 0, 90, 180 or 270 */
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int virtualX, virtualY;
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unsigned int front_tiled;
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unsigned int back_tiled;
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unsigned int depth_tiled;
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unsigned int rotated_tiled;
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unsigned int rotated2_tiled;
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/* Flags for perf_boxes
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#define I830_BOX_RING_EMPTY 0x1 /* populated by kernel */
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#define I830_BOX_FLIP 0x2 /* populated by kernel */
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#define I830_BOX_WAIT 0x4 /* populated by kernel & client */
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#define I830_BOX_TEXTURE_LOAD 0x8 /* populated by kernel */
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#define I830_BOX_LOST_CONTEXT 0x10 /* populated by client */
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int start; /* agp offset */
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int used; /* nr bytes in use */
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int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
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int DR4; /* window origin for GFX_OP_DRAWRECT_INFO*/
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int num_cliprects; /* mulitpass with multiple cliprects? */
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drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
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} drmI830BatchBuffer;
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char *buf; /* agp offset */
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int sz; /* nr bytes in use */
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int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
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int DR4; /* window origin for GFX_OP_DRAWRECT_INFO*/
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int num_cliprects; /* mulitpass with multiple cliprects? */
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drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
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#define I830_PARAM_IRQ_ACTIVE 1
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#define I830_PARAM_ALLOW_BATCHBUFFER 2
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#define I830_SETPARAM_USE_MI_BATCHBUFFER_START 1
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#define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY 2
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#define I830_SETPARAM_ALLOW_BATCHBUFFER 3
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/* A memory manager for regions of shared memory:
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#define I830_MEM_REGION_AGP 1
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int *region_offset; /* offset from start of fb or agp */
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} drmI830MemInitHeap;
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} drmI830MemDestroyHeap;
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#define DRM_I830_VBLANK_PIPE_A 1
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#define DRM_I830_VBLANK_PIPE_B 2
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#endif /* _I830_DRM_H_ */
added
removed
src/mesa/drivers/dri/i915tex/server/i830_common.h
