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* Copyright (c) 2001-2004 Jakub Jermar
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* - The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include <arch/cpuid.h>
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#include <arch/types.h>
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#include <fpu_context.h>
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#include <arch/smp/apic.h>
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#include <arch/syscall.h>
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* Identification of CPUs.
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* Contains only non-MP-Specification specific SMP code.
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#define AMD_CPUID_EBX 0x68747541
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#define AMD_CPUID_ECX 0x444d4163
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#define AMD_CPUID_EDX 0x69746e65
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#define INTEL_CPUID_EBX 0x756e6547
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#define INTEL_CPUID_ECX 0x6c65746e
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#define INTEL_CPUID_EDX 0x49656e69
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static char *vendor_str[] = {
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void fpu_disable(void)
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"and $0xffFFffF7, %%eax\n"
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void cpu_arch_init(void)
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cpuid_feature_info fi;
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cpuid_extended_feature_info efi;
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CPU->arch.tss = tss_p;
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CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
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CPU->fpu_owner = NULL;
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fi.word = info.cpuid_edx;
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efi.word = info.cpuid_ecx;
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"mov %%cr4, %[help]\n"
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"or %[mask], %[help]\n"
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"mov %[help], %%cr4\n"
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: [mask] "i" (CR4_OSFXSR_MASK | (1 << 10))
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/* Setup fast SYSENTER/SYSEXIT syscalls */
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void cpu_identify(void)
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CPU->arch.vendor = VendorUnknown;
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* Check for AMD processor.
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if ((info.cpuid_ebx == AMD_CPUID_EBX)
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&& (info.cpuid_ecx == AMD_CPUID_ECX)
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&& (info.cpuid_edx == AMD_CPUID_EDX))
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CPU->arch.vendor = VendorAMD;
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* Check for Intel processor.
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if ((info.cpuid_ebx == INTEL_CPUID_EBX)
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&& (info.cpuid_ecx == INTEL_CPUID_ECX)
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&& (info.cpuid_edx == INTEL_CPUID_EDX))
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CPU->arch.vendor = VendorIntel;
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CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
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CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;
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CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0f;
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void cpu_print_report(cpu_t* cpu)
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printf("cpu%u: (%s family=%u model=%u stepping=%u) %" PRIu16 " MHz\n",
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cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family,
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cpu->arch.model, cpu->arch.stepping, cpu->frequency_mhz);