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Viewing changes to arch/x86/include/asm/desc.h

  • Committer: Package Import Robot
  • Author(s): John Rigby, John Rigby
  • Date: 2011-09-26 10:44:23 UTC
  • Revision ID: package-import@ubuntu.com-20110926104423-57i0gl3v99b3lkfg
Tags: 3.0.0-1007.9
https://launchpad.net/bugs/826021
[ John Rigby ]

Enable crypto modules and remove crypto-modules from
exclude-module files
LP: #826021

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arch/x86/include/asm/desc.h
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#include <asm/desc_defs.h>
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#include <asm/ldt.h>
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#include <asm/mmu.h>
 
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#include <linux/smp.h>
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#include <linux/mm_types.h>
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static inline void fill_ldt(struct desc_struct *desc,
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                            const struct user_desc *info)
 
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static inline void fill_ldt(struct desc_struct *desc, const struct user_desc *info)
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{
13
 
        desc->limit0 = info->limit & 0x0ffff;
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        desc->base0 = info->base_addr & 0x0000ffff;
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        desc->base1 = (info->base_addr & 0x00ff0000) >> 16;
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        desc->type = (info->read_exec_only ^ 1) << 1;
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        desc->type |= info->contents << 2;
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        desc->s = 1;
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        desc->dpl = 0x3;
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        desc->p = info->seg_not_present ^ 1;
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        desc->limit = (info->limit & 0xf0000) >> 16;
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        desc->avl = info->useable;
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        desc->d = info->seg_32bit;
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        desc->g = info->limit_in_pages;
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        desc->base2 = (info->base_addr & 0xff000000) >> 24;
 
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        desc->limit0            = info->limit & 0x0ffff;
 
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        desc->base0             = (info->base_addr & 0x0000ffff);
 
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        desc->base1             = (info->base_addr & 0x00ff0000) >> 16;
 
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        desc->type              = (info->read_exec_only ^ 1) << 1;
 
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        desc->type             |= info->contents << 2;
 
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        desc->s                 = 1;
 
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        desc->dpl               = 0x3;
 
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        desc->p                 = info->seg_not_present ^ 1;
 
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        desc->limit             = (info->limit & 0xf0000) >> 16;
 
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        desc->avl               = info->useable;
 
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        desc->d                 = info->seg_32bit;
 
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        desc->g                 = info->limit_in_pages;
 
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        desc->base2             = (info->base_addr & 0xff000000) >> 24;
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        /*
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         * Don't allow setting of the lm bit. It is useless anyway
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         * because 64bit system calls require __USER_CS:
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         */
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        desc->l = 0;
 
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        desc->l                 = 0;
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}
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extern struct desc_ptr idt_descr;
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struct gdt_page {
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        struct desc_struct gdt[GDT_ENTRIES];
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} __attribute__((aligned(PAGE_SIZE)));
 
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DECLARE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page);
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static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
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static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func,
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                             unsigned dpl, unsigned ist, unsigned seg)
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{
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        gate->offset_low = PTR_LOW(func);
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        gate->segment = __KERNEL_CS;
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        gate->ist = ist;
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        gate->p = 1;
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        gate->dpl = dpl;
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        gate->zero0 = 0;
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        gate->zero1 = 0;
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        gate->type = type;
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        gate->offset_middle = PTR_MIDDLE(func);
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        gate->offset_high = PTR_HIGH(func);
 
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        gate->offset_low        = PTR_LOW(func);
 
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        gate->segment           = __KERNEL_CS;
 
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        gate->ist               = ist;
 
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        gate->p                 = 1;
 
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        gate->dpl               = dpl;
 
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        gate->zero0             = 0;
 
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        gate->zero1             = 0;
 
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        gate->type              = type;
 
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        gate->offset_middle     = PTR_MIDDLE(func);
 
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        gate->offset_high       = PTR_HIGH(func);
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}
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#else
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                             unsigned short seg)
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{
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        gate->a = (seg << 16) | (base & 0xffff);
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        gate->b = (base & 0xffff0000) |
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                  (((0x80 | type | (dpl << 5)) & 0xff) << 8);
 
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        gate->b = (base & 0xffff0000) | (((0x80 | type | (dpl << 5)) & 0xff) << 8);
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}
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#endif
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static inline int desc_empty(const void *ptr)
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{
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        const u32 *desc = ptr;
 
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        return !(desc[0] | desc[1]);
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}
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#ifdef CONFIG_PARAVIRT
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#include <asm/paravirt.h>
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#else
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#define load_TR_desc() native_load_tr_desc()
86
 
#define load_gdt(dtr) native_load_gdt(dtr)
87
 
#define load_idt(dtr) native_load_idt(dtr)
88
 
#define load_tr(tr) asm volatile("ltr %0"::"m" (tr))
89
 
#define load_ldt(ldt) asm volatile("lldt %0"::"m" (ldt))
90
 
 
91
 
#define store_gdt(dtr) native_store_gdt(dtr)
92
 
#define store_idt(dtr) native_store_idt(dtr)
93
 
#define store_tr(tr) (tr = native_store_tr())
94
 
 
95
 
#define load_TLS(t, cpu) native_load_tls(t, cpu)
96
 
#define set_ldt native_set_ldt
 
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#define load_TR_desc()                          native_load_tr_desc()
 
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#define load_gdt(dtr)                           native_load_gdt(dtr)
 
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#define load_idt(dtr)                           native_load_idt(dtr)
 
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#define load_tr(tr)                             asm volatile("ltr %0"::"m" (tr))
 
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#define load_ldt(ldt)                           asm volatile("lldt %0"::"m" (ldt))
 
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#define store_gdt(dtr)                          native_store_gdt(dtr)
 
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#define store_idt(dtr)                          native_store_idt(dtr)
 
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#define store_tr(tr)                            (tr = native_store_tr())
 
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#define load_TLS(t, cpu)                        native_load_tls(t, cpu)
 
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#define set_ldt                                 native_set_ldt
 
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#ifdef CONFIG_X86_32
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#define load_user_cs_desc native_load_user_cs_desc
 
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#define load_user_cs_desc                       native_load_user_cs_desc
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#endif /*CONFIG_X86_32*/
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#define write_ldt_entry(dt, entry, desc)        \
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        native_write_ldt_entry(dt, entry, desc)
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#define write_gdt_entry(dt, entry, desc, type)          \
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        native_write_gdt_entry(dt, entry, desc, type)
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#define write_idt_entry(dt, entry, g)           \
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        native_write_idt_entry(dt, entry, g)
 
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#define write_ldt_entry(dt, entry, desc)        native_write_ldt_entry(dt, entry, desc)
 
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#define write_gdt_entry(dt, entry, desc, type)  native_write_gdt_entry(dt, entry, desc, type)
 
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#define write_idt_entry(dt, entry, g)           native_write_idt_entry(dt, entry, g)
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static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
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{
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#define store_ldt(ldt) asm("sldt %0" : "=m"(ldt))
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static inline void native_write_idt_entry(gate_desc *idt, int entry,
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                                          const gate_desc *gate)
 
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static inline void native_write_idt_entry(gate_desc *idt, int entry, const gate_desc *gate)
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{
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        memcpy(&idt[entry], gate, sizeof(*gate));
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}
124
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125
 
static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry,
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                                          const void *desc)
 
126
static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry, const void *desc)
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{
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        memcpy(&ldt[entry], desc, 8);
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}
130
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131
 
static inline void native_write_gdt_entry(struct desc_struct *gdt, int entry,
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                                          const void *desc, int type)
 
131
static inline void
 
132
native_write_gdt_entry(struct desc_struct *gdt, int entry, const void *desc, int type)
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{
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        unsigned int size;
 
135
 
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        switch (type) {
136
 
        case DESC_TSS:
137
 
                size = sizeof(tss_desc);
138
 
                break;
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        case DESC_LDT:
140
 
                size = sizeof(ldt_desc);
141
 
                break;
142
 
        default:
143
 
                size = sizeof(struct desc_struct);
144
 
                break;
 
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        case DESC_TSS:  size = sizeof(tss_desc);        break;
 
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        case DESC_LDT:  size = sizeof(ldt_desc);        break;
 
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        default:        size = sizeof(*gdt);            break;
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        }
 
141
 
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        memcpy(&gdt[entry], desc, size);
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}
148
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}
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static inline void set_tssldt_descriptor(void *d, unsigned long addr,
162
 
                                         unsigned type, unsigned size)
 
157
static inline void set_tssldt_descriptor(void *d, unsigned long addr, unsigned type, unsigned size)
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{
164
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#ifdef CONFIG_X86_64
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        struct ldttss_desc64 *desc = d;
 
161
 
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        memset(desc, 0, sizeof(*desc));
167
 
        desc->limit0 = size & 0xFFFF;
168
 
        desc->base0 = PTR_LOW(addr);
169
 
        desc->base1 = PTR_MIDDLE(addr) & 0xFF;
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        desc->type = type;
171
 
        desc->p = 1;
172
 
        desc->limit1 = (size >> 16) & 0xF;
173
 
        desc->base2 = (PTR_MIDDLE(addr) >> 8) & 0xFF;
174
 
        desc->base3 = PTR_HIGH(addr);
 
163
 
 
164
        desc->limit0            = size & 0xFFFF;
 
165
        desc->base0             = PTR_LOW(addr);
 
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        desc->base1             = PTR_MIDDLE(addr) & 0xFF;
 
167
        desc->type              = type;
 
168
        desc->p                 = 1;
 
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        desc->limit1            = (size >> 16) & 0xF;
 
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        desc->base2             = (PTR_MIDDLE(addr) >> 8) & 0xFF;
 
171
        desc->base3             = PTR_HIGH(addr);
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#else
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        pack_descriptor((struct desc_struct *)d, addr, size, 0x80 | type, 0);
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#endif
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static inline unsigned long native_store_tr(void)
242
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{
243
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        unsigned long tr;
 
241
 
244
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        asm volatile("str %0":"=r" (tr));
 
243
 
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        return tr;
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}
247
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248
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static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
249
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{
 
249
        struct desc_struct *gdt = get_cpu_gdt_table(cpu);
250
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        unsigned int i;
251
 
        struct desc_struct *gdt = get_cpu_gdt_table(cpu);
252
251
 
253
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        for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
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                gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
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                             unsigned dpl, unsigned ist, unsigned seg)
318
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{
319
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        gate_desc s;
 
319
 
320
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        pack_gate(&s, type, (unsigned long)addr, dpl, ist, seg);
321
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        /*
322
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         * does not need to be atomic because it is only done once at
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                set_bit(vector, used_vectors);
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                if (first_system_vector > vector)
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                        first_system_vector = vector;
350
 
        } else
 
350
        } else {
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                BUG();
 
352
        }
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}
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static inline void alloc_intr_gate(unsigned int n, void *addr)