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  • Committer: Package Import Robot
  • Author(s): John Rigby, John Rigby
  • Date: 2011-09-26 10:44:23 UTC
  • Revision ID: package-import@ubuntu.com-20110926104423-57i0gl3v99b3lkfg
Tags: 3.0.0-1007.9
[ John Rigby ]

Enable crypto modules and remove crypto-modules from
exclude-module files
LP: #826021

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Lines of Context:
29
29
{
30
30
        if (uhci->is_stopped)
31
31
                mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
32
 
        uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
 
32
        uhci->term_td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
33
33
}
34
34
 
35
35
static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
36
36
{
37
 
        uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
 
37
        uhci->term_td->status &= ~cpu_to_hc32(uhci, TD_CTRL_IOC);
38
38
}
39
39
 
40
40
 
53
53
        uhci->fsbr_is_on = 1;
54
54
        lqh = list_entry(uhci->skel_async_qh->node.prev,
55
55
                        struct uhci_qh, node);
56
 
        lqh->link = LINK_TO_QH(uhci->skel_term_qh);
 
56
        lqh->link = LINK_TO_QH(uhci, uhci->skel_term_qh);
57
57
}
58
58
 
59
59
static void uhci_fsbr_off(struct uhci_hcd *uhci)
65
65
        uhci->fsbr_is_on = 0;
66
66
        lqh = list_entry(uhci->skel_async_qh->node.prev,
67
67
                        struct uhci_qh, node);
68
 
        lqh->link = UHCI_PTR_TERM;
 
68
        lqh->link = UHCI_PTR_TERM(uhci);
69
69
}
70
70
 
71
71
static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
131
131
        dma_pool_free(uhci->td_pool, td, td->dma_handle);
132
132
}
133
133
 
134
 
static inline void uhci_fill_td(struct uhci_td *td, u32 status,
135
 
                u32 token, u32 buffer)
 
134
static inline void uhci_fill_td(struct uhci_hcd *uhci, struct uhci_td *td,
 
135
                u32 status, u32 token, u32 buffer)
136
136
{
137
 
        td->status = cpu_to_le32(status);
138
 
        td->token = cpu_to_le32(token);
139
 
        td->buffer = cpu_to_le32(buffer);
 
137
        td->status = cpu_to_hc32(uhci, status);
 
138
        td->token = cpu_to_hc32(uhci, token);
 
139
        td->buffer = cpu_to_hc32(uhci, buffer);
140
140
}
141
141
 
142
142
static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
170
170
 
171
171
                td->link = ltd->link;
172
172
                wmb();
173
 
                ltd->link = LINK_TO_TD(td);
 
173
                ltd->link = LINK_TO_TD(uhci, td);
174
174
        } else {
175
175
                td->link = uhci->frame[framenum];
176
176
                wmb();
177
 
                uhci->frame[framenum] = LINK_TO_TD(td);
 
177
                uhci->frame[framenum] = LINK_TO_TD(uhci, td);
178
178
                uhci->frame_cpu[framenum] = td;
179
179
        }
180
180
}
198
198
                        ntd = list_entry(td->fl_list.next,
199
199
                                         struct uhci_td,
200
200
                                         fl_list);
201
 
                        uhci->frame[td->frame] = LINK_TO_TD(ntd);
 
201
                        uhci->frame[td->frame] = LINK_TO_TD(uhci, ntd);
202
202
                        uhci->frame_cpu[td->frame] = ntd;
203
203
                }
204
204
        } else {
255
255
        memset(qh, 0, sizeof(*qh));
256
256
        qh->dma_handle = dma_handle;
257
257
 
258
 
        qh->element = UHCI_PTR_TERM;
259
 
        qh->link = UHCI_PTR_TERM;
 
258
        qh->element = UHCI_PTR_TERM(uhci);
 
259
        qh->link = UHCI_PTR_TERM(uhci);
260
260
 
261
261
        INIT_LIST_HEAD(&qh->queue);
262
262
        INIT_LIST_HEAD(&qh->node);
348
348
 
349
349
        /* If the QH element pointer is UHCI_PTR_TERM then then currently
350
350
         * executing URB has already been unlinked, so this one isn't it. */
351
 
        if (qh_element(qh) == UHCI_PTR_TERM)
 
351
        if (qh_element(qh) == UHCI_PTR_TERM(uhci))
352
352
                goto done;
353
 
        qh->element = UHCI_PTR_TERM;
 
353
        qh->element = UHCI_PTR_TERM(uhci);
354
354
 
355
355
        /* Control pipes don't have to worry about toggles */
356
356
        if (qh->type == USB_ENDPOINT_XFER_CONTROL)
360
360
        WARN_ON(list_empty(&urbp->td_list));
361
361
        td = list_entry(urbp->td_list.next, struct uhci_td, list);
362
362
        qh->needs_fixup = 1;
363
 
        qh->initial_toggle = uhci_toggle(td_token(td));
 
363
        qh->initial_toggle = uhci_toggle(td_token(uhci, td));
364
364
 
365
365
done:
366
366
        return ret;
370
370
 * Fix up the data toggles for URBs in a queue, when one of them
371
371
 * terminates early (short transfer, error, or dequeued).
372
372
 */
373
 
static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first)
 
373
static void uhci_fixup_toggles(struct uhci_hcd *uhci, struct uhci_qh *qh,
 
374
                        int skip_first)
374
375
{
375
376
        struct urb_priv *urbp = NULL;
376
377
        struct uhci_td *td;
384
385
 
385
386
        /* When starting with the first URB, if the QH element pointer is
386
387
         * still valid then we know the URB's toggles are okay. */
387
 
        else if (qh_element(qh) != UHCI_PTR_TERM)
 
388
        else if (qh_element(qh) != UHCI_PTR_TERM(uhci))
388
389
                toggle = 2;
389
390
 
390
391
        /* Fix up the toggle for the URBs in the queue.  Normally this
396
397
                /* If the first TD has the right toggle value, we don't
397
398
                 * need to change any toggles in this URB */
398
399
                td = list_entry(urbp->td_list.next, struct uhci_td, list);
399
 
                if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) {
 
400
                if (toggle > 1 || uhci_toggle(td_token(uhci, td)) == toggle) {
400
401
                        td = list_entry(urbp->td_list.prev, struct uhci_td,
401
402
                                        list);
402
 
                        toggle = uhci_toggle(td_token(td)) ^ 1;
 
403
                        toggle = uhci_toggle(td_token(uhci, td)) ^ 1;
403
404
 
404
405
                /* Otherwise all the toggles in the URB have to be switched */
405
406
                } else {
406
407
                        list_for_each_entry(td, &urbp->td_list, list) {
407
 
                                td->token ^= cpu_to_le32(
 
408
                                td->token ^= cpu_to_hc32(uhci,
408
409
                                                        TD_TOKEN_TOGGLE);
409
410
                                toggle ^= 1;
410
411
                        }
441
442
        pqh = list_entry(qh->node.prev, struct uhci_qh, node);
442
443
        qh->link = pqh->link;
443
444
        wmb();
444
 
        pqh->link = LINK_TO_QH(qh);
 
445
        pqh->link = LINK_TO_QH(uhci, qh);
445
446
}
446
447
 
447
448
/*
451
452
static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
452
453
{
453
454
        struct uhci_qh *pqh;
454
 
        __le32 link_to_new_qh;
 
455
        __hc32 link_to_new_qh;
455
456
 
456
457
        /* Find the predecessor QH for our new one and insert it in the list.
457
458
         * The list of QHs is expected to be short, so linear search won't
465
466
        /* Link it into the schedule */
466
467
        qh->link = pqh->link;
467
468
        wmb();
468
 
        link_to_new_qh = LINK_TO_QH(qh);
 
469
        link_to_new_qh = LINK_TO_QH(uhci, qh);
469
470
        pqh->link = link_to_new_qh;
470
471
 
471
472
        /* If this is now the first FSBR QH, link the terminating skeleton
483
484
 
484
485
        /* Set the element pointer if it isn't set already.
485
486
         * This isn't needed for Isochronous queues, but it doesn't hurt. */
486
 
        if (qh_element(qh) == UHCI_PTR_TERM) {
 
487
        if (qh_element(qh) == UHCI_PTR_TERM(uhci)) {
487
488
                struct urb_priv *urbp = list_entry(qh->queue.next,
488
489
                                struct urb_priv, node);
489
490
                struct uhci_td *td = list_entry(urbp->td_list.next,
490
491
                                struct uhci_td, list);
491
492
 
492
 
                qh->element = LINK_TO_TD(td);
 
493
                qh->element = LINK_TO_TD(uhci, td);
493
494
        }
494
495
 
495
496
        /* Treat the queue as if it has just advanced */
533
534
static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
534
535
{
535
536
        struct uhci_qh *pqh;
536
 
        __le32 link_to_next_qh = qh->link;
 
537
        __hc32 link_to_next_qh = qh->link;
537
538
 
538
539
        pqh = list_entry(qh->node.prev, struct uhci_qh, node);
539
540
        pqh->link = link_to_next_qh;
757
758
/*
758
759
 * Map status to standard result codes
759
760
 *
760
 
 * <status> is (td_status(td) & 0xF60000), a.k.a.
761
 
 * uhci_status_bits(td_status(td)).
 
761
 * <status> is (td_status(uhci, td) & 0xF60000), a.k.a.
 
762
 * uhci_status_bits(td_status(uhci, td)).
762
763
 * Note: <status> does not include the TD_CTRL_NAK bit.
763
764
 * <dir_out> is True for output TDs and False for input TDs.
764
765
 */
794
795
        int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
795
796
        int len = urb->transfer_buffer_length;
796
797
        dma_addr_t data = urb->transfer_dma;
797
 
        __le32 *plink;
 
798
        __hc32 *plink;
798
799
        struct urb_priv *urbp = urb->hcpriv;
799
800
        int skel;
800
801
 
811
812
         */
812
813
        td = qh->dummy_td;
813
814
        uhci_add_td_to_urbp(td, urbp);
814
 
        uhci_fill_td(td, status, destination | uhci_explen(8),
 
815
        uhci_fill_td(uhci, td, status, destination | uhci_explen(8),
815
816
                        urb->setup_dma);
816
817
        plink = &td->link;
817
818
        status |= TD_CTRL_ACTIVE;
844
845
                td = uhci_alloc_td(uhci);
845
846
                if (!td)
846
847
                        goto nomem;
847
 
                *plink = LINK_TO_TD(td);
 
848
                *plink = LINK_TO_TD(uhci, td);
848
849
 
849
850
                /* Alternate Data0/1 (start with Data1) */
850
851
                destination ^= TD_TOKEN_TOGGLE;
851
852
 
852
853
                uhci_add_td_to_urbp(td, urbp);
853
 
                uhci_fill_td(td, status, destination | uhci_explen(pktsze),
854
 
                                data);
 
854
                uhci_fill_td(uhci, td, status,
 
855
                        destination | uhci_explen(pktsze), data);
855
856
                plink = &td->link;
856
857
 
857
858
                data += pktsze;
864
865
        td = uhci_alloc_td(uhci);
865
866
        if (!td)
866
867
                goto nomem;
867
 
        *plink = LINK_TO_TD(td);
 
868
        *plink = LINK_TO_TD(uhci, td);
868
869
 
869
870
        /* Change direction for the status transaction */
870
871
        destination ^= (USB_PID_IN ^ USB_PID_OUT);
871
872
        destination |= TD_TOKEN_TOGGLE;         /* End in Data1 */
872
873
 
873
874
        uhci_add_td_to_urbp(td, urbp);
874
 
        uhci_fill_td(td, status | TD_CTRL_IOC,
 
875
        uhci_fill_td(uhci, td, status | TD_CTRL_IOC,
875
876
                        destination | uhci_explen(0), 0);
876
877
        plink = &td->link;
877
878
 
881
882
        td = uhci_alloc_td(uhci);
882
883
        if (!td)
883
884
                goto nomem;
884
 
        *plink = LINK_TO_TD(td);
 
885
        *plink = LINK_TO_TD(uhci, td);
885
886
 
886
 
        uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
 
887
        uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
887
888
        wmb();
888
 
        qh->dummy_td->status |= cpu_to_le32(TD_CTRL_ACTIVE);
 
889
        qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
889
890
        qh->dummy_td = td;
890
891
 
891
892
        /* Low-speed transfers get a different queue, and won't hog the bus.
921
922
        int len = urb->transfer_buffer_length;
922
923
        int this_sg_len;
923
924
        dma_addr_t data;
924
 
        __le32 *plink;
 
925
        __hc32 *plink;
925
926
        struct urb_priv *urbp = urb->hcpriv;
926
927
        unsigned int toggle;
927
928
        struct scatterlist  *sg;
974
975
                        td = uhci_alloc_td(uhci);
975
976
                        if (!td)
976
977
                                goto nomem;
977
 
                        *plink = LINK_TO_TD(td);
 
978
                        *plink = LINK_TO_TD(uhci, td);
978
979
                }
979
980
                uhci_add_td_to_urbp(td, urbp);
980
 
                uhci_fill_td(td, status,
 
981
                uhci_fill_td(uhci, td, status,
981
982
                                destination | uhci_explen(pktsze) |
982
983
                                        (toggle << TD_TOKEN_TOGGLE_SHIFT),
983
984
                                data);
1010
1011
                td = uhci_alloc_td(uhci);
1011
1012
                if (!td)
1012
1013
                        goto nomem;
1013
 
                *plink = LINK_TO_TD(td);
 
1014
                *plink = LINK_TO_TD(uhci, td);
1014
1015
 
1015
1016
                uhci_add_td_to_urbp(td, urbp);
1016
 
                uhci_fill_td(td, status,
 
1017
                uhci_fill_td(uhci, td, status,
1017
1018
                                destination | uhci_explen(0) |
1018
1019
                                        (toggle << TD_TOKEN_TOGGLE_SHIFT),
1019
1020
                                data);
1028
1029
         * fast side but not enough to justify delaying an interrupt
1029
1030
         * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
1030
1031
         * flag setting. */
1031
 
        td->status |= cpu_to_le32(TD_CTRL_IOC);
 
1032
        td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1032
1033
 
1033
1034
        /*
1034
1035
         * Build the new dummy TD and activate the old one
1036
1037
        td = uhci_alloc_td(uhci);
1037
1038
        if (!td)
1038
1039
                goto nomem;
1039
 
        *plink = LINK_TO_TD(td);
 
1040
        *plink = LINK_TO_TD(uhci, td);
1040
1041
 
1041
 
        uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
 
1042
        uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
1042
1043
        wmb();
1043
 
        qh->dummy_td->status |= cpu_to_le32(TD_CTRL_ACTIVE);
 
1044
        qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
1044
1045
        qh->dummy_td = td;
1045
1046
 
1046
1047
        usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1133
1134
                 * the queue at the status stage transaction, which is
1134
1135
                 * the last TD. */
1135
1136
                WARN_ON(list_empty(&urbp->td_list));
1136
 
                qh->element = LINK_TO_TD(td);
 
1137
                qh->element = LINK_TO_TD(uhci, td);
1137
1138
                tmp = td->list.prev;
1138
1139
                ret = -EINPROGRESS;
1139
1140
 
1142
1143
                /* When a bulk/interrupt transfer is short, we have to
1143
1144
                 * fix up the toggles of the following URBs on the queue
1144
1145
                 * before restarting the queue at the next URB. */
1145
 
                qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1;
1146
 
                uhci_fixup_toggles(qh, 1);
 
1146
                qh->initial_toggle =
 
1147
                        uhci_toggle(td_token(uhci, qh->post_td)) ^ 1;
 
1148
                uhci_fixup_toggles(uhci, qh, 1);
1147
1149
 
1148
1150
                if (list_empty(&urbp->td_list))
1149
1151
                        td = qh->post_td;
1178
1180
                unsigned int ctrlstat;
1179
1181
                int len;
1180
1182
 
1181
 
                ctrlstat = td_status(td);
 
1183
                ctrlstat = td_status(uhci, td);
1182
1184
                status = uhci_status_bits(ctrlstat);
1183
1185
                if (status & TD_CTRL_ACTIVE)
1184
1186
                        return -EINPROGRESS;
1188
1190
 
1189
1191
                if (status) {
1190
1192
                        ret = uhci_map_status(status,
1191
 
                                        uhci_packetout(td_token(td)));
 
1193
                                        uhci_packetout(td_token(uhci, td)));
1192
1194
                        if ((debug == 1 && ret != -EPIPE) || debug > 1) {
1193
1195
                                /* Some debugging code */
1194
1196
                                dev_dbg(&urb->dev->dev,
1204
1206
                        }
1205
1207
 
1206
1208
                /* Did we receive a short packet? */
1207
 
                } else if (len < uhci_expected_length(td_token(td))) {
 
1209
                } else if (len < uhci_expected_length(td_token(uhci, td))) {
1208
1210
 
1209
1211
                        /* For control transfers, go to the status TD if
1210
1212
                         * this isn't already the last data TD */
1236
1238
        if (ret < 0) {
1237
1239
                /* Note that the queue has stopped and save
1238
1240
                 * the next toggle value */
1239
 
                qh->element = UHCI_PTR_TERM;
 
1241
                qh->element = UHCI_PTR_TERM(uhci);
1240
1242
                qh->is_stopped = 1;
1241
1243
                qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
1242
 
                qh->initial_toggle = uhci_toggle(td_token(td)) ^
 
1244
                qh->initial_toggle = uhci_toggle(td_token(uhci, td)) ^
1243
1245
                                (ret == -EREMOTEIO);
1244
1246
 
1245
1247
        } else          /* Short packet received */
1335
1337
                        return -ENOMEM;
1336
1338
 
1337
1339
                uhci_add_td_to_urbp(td, urbp);
1338
 
                uhci_fill_td(td, status, destination |
 
1340
                uhci_fill_td(uhci, td, status, destination |
1339
1341
                                uhci_explen(urb->iso_frame_desc[i].length),
1340
1342
                                urb->transfer_dma +
1341
1343
                                        urb->iso_frame_desc[i].offset);
1342
1344
        }
1343
1345
 
1344
1346
        /* Set the interrupt-on-completion flag on the last packet. */
1345
 
        td->status |= cpu_to_le32(TD_CTRL_IOC);
 
1347
        td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1346
1348
 
1347
1349
        /* Add the TDs to the frame list */
1348
1350
        frame = urb->start_frame;
1378
1380
 
1379
1381
                uhci_remove_tds_from_frame(uhci, qh->iso_frame);
1380
1382
 
1381
 
                ctrlstat = td_status(td);
 
1383
                ctrlstat = td_status(uhci, td);
1382
1384
                if (ctrlstat & TD_CTRL_ACTIVE) {
1383
1385
                        status = -EXDEV;        /* TD was added too late? */
1384
1386
                } else {
1629
1631
         * queue, the QH can now be re-activated. */
1630
1632
        if (!list_empty(&qh->queue)) {
1631
1633
                if (qh->needs_fixup)
1632
 
                        uhci_fixup_toggles(qh, 0);
 
1634
                        uhci_fixup_toggles(uhci, qh, 0);
1633
1635
 
1634
1636
                /* If the first URB on the queue wants FSBR but its time
1635
1637
                 * limit has expired, set the next TD to interrupt on
1639
1641
                        struct uhci_td *td = list_entry(urbp->td_list.next,
1640
1642
                                        struct uhci_td, list);
1641
1643
 
1642
 
                        td->status |= __cpu_to_le32(TD_CTRL_IOC);
 
1644
                        td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1643
1645
                }
1644
1646
 
1645
1647
                uhci_activate_qh(uhci, qh);
1686
1688
        } else {
1687
1689
                urbp = list_entry(qh->queue.next, struct urb_priv, node);
1688
1690
                td = list_entry(urbp->td_list.next, struct uhci_td, list);
1689
 
                status = td_status(td);
 
1691
                status = td_status(uhci, td);
1690
1692
                if (!(status & TD_CTRL_ACTIVE)) {
1691
1693
 
1692
1694
                        /* We're okay, the queue has advanced */
1704
1706
        if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
1705
1707
 
1706
1708
                /* Detect the Intel bug and work around it */
1707
 
                if (qh->post_td && qh_element(qh) == LINK_TO_TD(qh->post_td)) {
 
1709
                if (qh->post_td && qh_element(qh) ==
 
1710
                        LINK_TO_TD(uhci, qh->post_td)) {
1708
1711
                        qh->element = qh->post_td->link;
1709
1712
                        qh->advance_jiffies = jiffies;
1710
1713
                        ret = 1;