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Viewing changes to drivers/scsi/qla2xxx/qla_nx.c

  • Committer: Package Import Robot
  • Author(s): John Rigby, John Rigby
  • Date: 2011-09-26 10:44:23 UTC
  • Revision ID: package-import@ubuntu.com-20110926104423-57i0gl3v99b3lkfg
Tags: 3.0.0-1007.9
https://launchpad.net/bugs/826021
[ John Rigby ]

Enable crypto modules and remove crypto-modules from
exclude-module files
LP: #826021

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drivers/scsi/qla2xxx/qla_nx.c
1
1
/*
2
2
 * QLogic Fibre Channel HBA Driver
3
 
 * Copyright (c)  2003-2010 QLogic Corporation
 
3
 * Copyright (c)  2003-2011 QLogic Corporation
4
4
 *
5
5
 * See LICENSE.qla2xxx for copyright and licensing details.
6
6
 */
844
844
        return 0;
845
845
}
846
846
 
 
847
static void
 
848
qla82xx_rom_unlock(struct qla_hw_data *ha)
 
849
{
 
850
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
851
}
 
852
 
847
853
static int
848
854
qla82xx_wait_rom_busy(struct qla_hw_data *ha)
849
855
{
924
930
                return -1;
925
931
        }
926
932
        ret = qla82xx_do_rom_fast_read(ha, addr, valp);
927
 
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
933
        qla82xx_rom_unlock(ha);
928
934
        return ret;
929
935
}
930
936
 
1056
1062
        ret = qla82xx_flash_wait_write_finish(ha);
1057
1063
 
1058
1064
done_write:
1059
 
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
1065
        qla82xx_rom_unlock(ha);
1060
1066
        return ret;
1061
1067
}
1062
1068
 
1081
1087
        /* Halt all the indiviual PEGs and other blocks of the ISP */
1082
1088
        qla82xx_rom_lock(ha);
1083
1089
 
1084
 
        /* mask all niu interrupts */
 
1090
        /* disable all I2Q */
 
1091
        qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0);
 
1092
        qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0);
 
1093
        qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0);
 
1094
        qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0);
 
1095
        qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0);
 
1096
        qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0);
 
1097
 
 
1098
        /* disable all niu interrupts */
1085
1099
        qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff);
1086
1100
        /* disable xge rx/tx */
1087
1101
        qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00);
1088
1102
        /* disable xg1 rx/tx */
1089
1103
        qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00);
 
1104
        /* disable sideband mac */
 
1105
        qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00);
 
1106
        /* disable ap0 mac */
 
1107
        qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00);
 
1108
        /* disable ap1 mac */
 
1109
        qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00);
1090
1110
 
1091
1111
        /* halt sre */
1092
1112
        val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000);
1101
1121
        qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0);
1102
1122
        qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0);
1103
1123
        qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0);
 
1124
        qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0);
1104
1125
 
1105
1126
        /* halt pegs */
1106
1127
        qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1);
1108
1129
        qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1);
1109
1130
        qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1);
1110
1131
        qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1);
 
1132
        msleep(20);
1111
1133
 
1112
1134
        /* big hammer */
1113
 
        msleep(1000);
1114
1135
        if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
1115
1136
                /* don't reset CAM block on reset */
1116
1137
                qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff);
1129
1150
        qla82xx_wr_32(ha, QLA82XX_CRB_QDR_NET + 0xe4, val);
1130
1151
        msleep(20);
1131
1152
 
1132
 
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
1153
        qla82xx_rom_unlock(ha);
1133
1154
 
1134
1155
        /* Read the signature value from the flash.
1135
1156
         * Offset 0: Contain signature (0xcafecafe)
2395
2416
 
2396
2417
        if (qla82xx_fw_load_from_flash(ha) == QLA_SUCCESS) {
2397
2418
                qla_printk(KERN_ERR, ha,
2398
 
                        "Firmware loaded successfully from flash\n");
 
2419
                    "Firmware loaded successfully from flash\n");
2399
2420
                return QLA_SUCCESS;
 
2421
        } else {
 
2422
                qla_printk(KERN_ERR, ha,
 
2423
                    "Firmware load from flash failed\n");
2400
2424
        }
 
2425
 
2401
2426
try_blob_fw:
2402
2427
        qla_printk(KERN_INFO, ha,
2403
2428
            "Attempting to load firmware from blob\n");
2991
3016
                qla_printk(KERN_WARNING, ha, "Write disable failed\n");
2992
3017
 
2993
3018
done_unprotect:
2994
 
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
3019
        qla82xx_rom_unlock(ha);
2995
3020
        return ret;
2996
3021
}
2997
3022
 
3020
3045
        if (qla82xx_write_disable_flash(ha) != 0)
3021
3046
                qla_printk(KERN_WARNING, ha, "Write disable failed\n");
3022
3047
done_protect:
3023
 
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
3048
        qla82xx_rom_unlock(ha);
3024
3049
        return ret;
3025
3050
}
3026
3051
 
3048
3073
        }
3049
3074
        ret = qla82xx_flash_wait_write_finish(ha);
3050
3075
done:
3051
 
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
3076
        qla82xx_rom_unlock(ha);
3052
3077
        return ret;
3053
3078
}
3054
3079
 
3228
3253
         * else died while holding it.
3229
3254
         * In either case, unlock.
3230
3255
         */
3231
 
        qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK));
 
3256
        qla82xx_rom_unlock(ha);
3232
3257
}
3233
3258
 
3234
3259
/*
3528
3553
qla82xx_device_state_handler(scsi_qla_host_t *vha)
3529
3554
{
3530
3555
        uint32_t dev_state;
 
3556
        uint32_t old_dev_state;
3531
3557
        int rval = QLA_SUCCESS;
3532
3558
        unsigned long dev_init_timeout;
3533
3559
        struct qla_hw_data *ha = vha->hw;
 
3560
        int loopcount = 0;
3534
3561
 
3535
3562
        qla82xx_idc_lock(ha);
3536
3563
        if (!vha->flags.init_done)
3537
3564
                qla82xx_set_drv_active(vha);
3538
3565
 
3539
3566
        dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
 
3567
        old_dev_state = dev_state;
3540
3568
        qla_printk(KERN_INFO, ha, "1:Device state is 0x%x = %s\n", dev_state,
3541
3569
                dev_state < MAX_STATES ? qdev_state[dev_state] : "Unknown");
3542
3570
 
3553
3581
                        break;
3554
3582
                }
3555
3583
                dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
3556
 
                qla_printk(KERN_INFO, ha,
3557
 
                        "2:Device state is 0x%x = %s\n", dev_state,
3558
 
                        dev_state < MAX_STATES ?
3559
 
                        qdev_state[dev_state] : "Unknown");
 
3584
                if (old_dev_state != dev_state) {
 
3585
                        loopcount = 0;
 
3586
                        old_dev_state = dev_state;
 
3587
                }
 
3588
                if (loopcount < 5) {
 
3589
                        qla_printk(KERN_INFO, ha,
 
3590
                            "2:Device state is 0x%x = %s\n", dev_state,
 
3591
                            dev_state < MAX_STATES ?
 
3592
                            qdev_state[dev_state] : "Unknown");
 
3593
                }
3560
3594
 
3561
3595
                switch (dev_state) {
3562
3596
                case QLA82XX_DEV_READY:
3570
3604
                        qla82xx_idc_lock(ha);
3571
3605
                        break;
3572
3606
                case QLA82XX_DEV_NEED_RESET:
 
3607
                    if (!ql2xdontresethba)
3573
3608
                        qla82xx_need_reset_handler(vha);
3574
3609
                        dev_init_timeout = jiffies +
3575
3610
                                (ha->nx_dev_init_timeout * HZ);
3604
3639
                        msleep(1000);
3605
3640
                        qla82xx_idc_lock(ha);
3606
3641
                }
 
3642
                loopcount++;
3607
3643
        }
3608
3644
exit:
3609
3645
        qla82xx_idc_unlock(ha);
3621
3657
                if (dev_state == QLA82XX_DEV_NEED_RESET &&
3622
3658
                    !test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) {
3623
3659
                        qla_printk(KERN_WARNING, ha,
3624
 
                            "%s(): Adapter reset needed!\n", __func__);
 
3660
                            "scsi(%ld) %s: Adapter reset needed!\n",
 
3661
                                vha->host_no, __func__);
3625
3662
                        set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3626
3663
                        qla2xxx_wake_dpc(vha);
3627
3664
                } else if (dev_state == QLA82XX_DEV_NEED_QUIESCENT &&
3632
3669
                        set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
3633
3670
                        qla2xxx_wake_dpc(vha);
3634
3671
                } else {
3635
 
                        qla82xx_check_fw_alive(vha);
3636
3672
                        if (qla82xx_check_fw_alive(vha)) {
3637
3673
                                halt_status = qla82xx_rd_32(ha,
3638
3674
                                    QLA82XX_PEG_HALT_STATUS1);
 
3675
                                qla_printk(KERN_INFO, ha,
 
3676
                                    "scsi(%ld): %s, Dumping hw/fw registers:\n "
 
3677
                                    " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,\n "
 
3678
                                    " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,\n "
 
3679
                                    " PEG_NET_2_PC: 0x%x, PEG_NET_3_PC: 0x%x,\n "
 
3680
                                    " PEG_NET_4_PC: 0x%x\n",
 
3681
                                    vha->host_no, __func__, halt_status,
 
3682
                                    qla82xx_rd_32(ha, QLA82XX_PEG_HALT_STATUS2),
 
3683
                                    qla82xx_rd_32(ha,
 
3684
                                            QLA82XX_CRB_PEG_NET_0 + 0x3c),
 
3685
                                    qla82xx_rd_32(ha,
 
3686
                                            QLA82XX_CRB_PEG_NET_1 + 0x3c),
 
3687
                                    qla82xx_rd_32(ha,
 
3688
                                            QLA82XX_CRB_PEG_NET_2 + 0x3c),
 
3689
                                    qla82xx_rd_32(ha,
 
3690
                                            QLA82XX_CRB_PEG_NET_3 + 0x3c),
 
3691
                                    qla82xx_rd_32(ha,
 
3692
                                            QLA82XX_CRB_PEG_NET_4 + 0x3c));
3639
3693
                                if (halt_status & HALT_STATUS_UNRECOVERABLE) {
3640
3694
                                        set_bit(ISP_UNRECOVERABLE,
3641
3695
                                            &vha->dpc_flags);
3651
3705
                                if (ha->flags.mbox_busy) {
3652
3706
                                        ha->flags.mbox_int = 1;
3653
3707
                                        DEBUG2(qla_printk(KERN_ERR, ha,
3654
 
                                            "Due to fw hung, doing premature "
3655
 
                                            "completion of mbx command\n"));
 
3708
                                            "scsi(%ld) Due to fw hung, doing "
 
3709
                                            "premature completion of mbx "
 
3710
                                            "command\n", vha->host_no));
3656
3711
                                        if (test_bit(MBX_INTR_WAIT,
3657
3712
                                            &ha->mbx_cmd_flags))
3658
3713
                                                complete(&ha->mbx_intr_comp);