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Viewing changes to drivers/net/ixgbe/ixgbe_82599.c

  • Committer: Package Import Robot
  • Author(s): John Rigby, John Rigby
  • Date: 2011-09-26 10:44:23 UTC
  • Revision ID: package-import@ubuntu.com-20110926104423-57i0gl3v99b3lkfg
Tags: 3.0.0-1007.9
https://launchpad.net/bugs/826021
[ John Rigby ]

Enable crypto modules and remove crypto-modules from
exclude-module files
LP: #826021

Show diffs side-by-side

added added

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Lines of Context:
drivers/net/ixgbe/ixgbe_82599.c
38
38
#define IXGBE_82599_RAR_ENTRIES   128
39
39
#define IXGBE_82599_MC_TBL_SIZE   128
40
40
#define IXGBE_82599_VFT_TBL_SIZE  128
 
41
#define IXGBE_82599_RX_PB_SIZE    512
41
42
 
42
43
static void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
43
44
static void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
61
62
                                         bool autoneg,
62
63
                                         bool autoneg_wait_to_complete);
63
64
static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw);
 
65
static bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);
64
66
 
65
67
static void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw)
66
68
{
86
88
                if ((mac->ops.get_media_type(hw) ==
87
89
                     ixgbe_media_type_backplane) &&
88
90
                    (hw->phy.smart_speed == ixgbe_smart_speed_auto ||
89
 
                     hw->phy.smart_speed == ixgbe_smart_speed_on))
 
91
                     hw->phy.smart_speed == ixgbe_smart_speed_on) &&
 
92
                     !ixgbe_verify_lesm_fw_enabled_82599(hw))
90
93
                        mac->ops.setup_link = &ixgbe_setup_mac_link_smartspeed;
91
94
                else
92
95
                        mac->ops.setup_link = &ixgbe_setup_mac_link_82599;
107
110
 
108
111
                ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,
109
112
                                                              &data_offset);
110
 
 
111
113
                if (ret_val != 0)
112
114
                        goto setup_sfp_out;
113
115
 
127
129
                }
128
130
 
129
131
                /* Release the semaphore */
130
 
                ixgbe_release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);
131
 
                /* Delay obtaining semaphore again to allow FW access */
132
 
                msleep(hw->eeprom.semaphore_delay);
 
132
                hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);
 
133
                /*
 
134
                 * Delay obtaining semaphore again to allow FW access,
 
135
                 * semaphore_delay is in ms usleep_range needs us.
 
136
                 */
 
137
                usleep_range(hw->eeprom.semaphore_delay * 1000,
 
138
                             hw->eeprom.semaphore_delay * 2000);
133
139
 
134
140
                /* Now restart DSP by setting Restart_AN and clearing LMS */
135
141
                IXGBE_WRITE_REG(hw, IXGBE_AUTOC, ((IXGBE_READ_REG(hw,
138
144
 
139
145
                /* Wait for AN to leave state 0 */
140
146
                for (i = 0; i < 10; i++) {
141
 
                        msleep(4);
 
147
                        usleep_range(4000, 8000);
142
148
                        reg_anlp1 = IXGBE_READ_REG(hw, IXGBE_ANLP1);
143
149
                        if (reg_anlp1 & IXGBE_ANLP1_AN_STATE_MASK)
144
150
                                break;
353
359
        case IXGBE_DEV_ID_82599_SFP:
354
360
        case IXGBE_DEV_ID_82599_SFP_FCOE:
355
361
        case IXGBE_DEV_ID_82599_SFP_EM:
 
362
        case IXGBE_DEV_ID_82599_SFP_SF2:
356
363
                media_type = ixgbe_media_type_fiber;
357
364
                break;
358
365
        case IXGBE_DEV_ID_82599_CX4:
361
368
        case IXGBE_DEV_ID_82599_T3_LOM:
362
369
                media_type = ixgbe_media_type_copper;
363
370
                break;
 
371
        case IXGBE_DEV_ID_82599_LS:
 
372
                media_type = ixgbe_media_type_fiber_lco;
 
373
                break;
364
374
        default:
365
375
                media_type = ixgbe_media_type_unknown;
366
376
                break;
486
496
 *
487
497
 *  Set the link speed in the AUTOC register and restarts link.
488
498
 **/
489
 
s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
 
499
static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
490
500
                                          ixgbe_link_speed speed,
491
501
                                          bool autoneg,
492
502
                                          bool autoneg_wait_to_complete)
1176
1186
                if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) &
1177
1187
                                   IXGBE_FDIRCTRL_INIT_DONE)
1178
1188
                        break;
1179
 
                msleep(1);
 
1189
                usleep_range(1000, 2000);
1180
1190
        }
1181
1191
        if (i >= IXGBE_FDIR_INIT_DONE_POLL)
1182
1192
                hw_dbg(hw, "Flow Director Signature poll time exceeded!\n");
1271
1281
                if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) &
1272
1282
                                   IXGBE_FDIRCTRL_INIT_DONE)
1273
1283
                        break;
1274
 
                msleep(1);
 
1284
                usleep_range(1000, 2000);
1275
1285
        }
1276
1286
        if (i >= IXGBE_FDIR_INIT_DONE_POLL)
1277
1287
                hw_dbg(hw, "Flow Director Perfect poll time exceeded!\n");
1740
1750
 *  ixgbe_start_hw_82599 - Prepare hardware for Tx/Rx
1741
1751
 *  @hw: pointer to hardware structure
1742
1752
 *
1743
 
 *  Starts the hardware using the generic start_hw function.
1744
 
 *  Then performs device-specific:
1745
 
 *  Clears the rate limiter registers.
 
1753
 *  Starts the hardware using the generic start_hw function
 
1754
 *  and the generation start_hw function.
 
1755
 *  Then performs revision-specific operations, if any.
1746
1756
 **/
1747
1757
static s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw)
1748
1758
{
1749
 
        u32 q_num;
1750
 
        s32 ret_val;
 
1759
        s32 ret_val = 0;
1751
1760
 
1752
1761
        ret_val = ixgbe_start_hw_generic(hw);
 
1762
        if (ret_val != 0)
 
1763
                goto out;
1753
1764
 
1754
 
        /* Clear the rate limiters */
1755
 
        for (q_num = 0; q_num < hw->mac.max_tx_queues; q_num++) {
1756
 
                IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, q_num);
1757
 
                IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, 0);
1758
 
        }
1759
 
        IXGBE_WRITE_FLUSH(hw);
 
1765
        ret_val = ixgbe_start_hw_gen2(hw);
 
1766
        if (ret_val != 0)
 
1767
                goto out;
1760
1768
 
1761
1769
        /* We need to run link autotry after the driver loads */
1762
1770
        hw->mac.autotry_restart = true;
 
1771
        hw->mac.rx_pb_size = IXGBE_82599_RX_PB_SIZE;
1763
1772
 
1764
1773
        if (ret_val == 0)
1765
1774
                ret_val = ixgbe_verify_fw_version_82599(hw);
1766
 
 
 
1775
out:
1767
1776
        return ret_val;
1768
1777
}
1769
1778
 
1775
1784
 *  If PHY already detected, maintains current PHY type in hw struct,
1776
1785
 *  otherwise executes the PHY detection routine.
1777
1786
 **/
1778
 
s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)
 
1787
static s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)
1779
1788
{
1780
1789
        s32 status = IXGBE_ERR_PHY_ADDR_INVALID;
1781
1790
 
1968
1977
}
1969
1978
 
1970
1979
/**
1971
 
 *  ixgbe_get_device_caps_82599 - Get additional device capabilities
1972
 
 *  @hw: pointer to hardware structure
1973
 
 *  @device_caps: the EEPROM word with the extra device capabilities
1974
 
 *
1975
 
 *  This function will read the EEPROM location for the device capabilities,
1976
 
 *  and return the word through device_caps.
1977
 
 **/
1978
 
static s32 ixgbe_get_device_caps_82599(struct ixgbe_hw *hw, u16 *device_caps)
1979
 
{
1980
 
        hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps);
1981
 
 
1982
 
        return 0;
1983
 
}
1984
 
 
1985
 
/**
1986
1980
 *  ixgbe_verify_fw_version_82599 - verify fw version for 82599
1987
1981
 *  @hw: pointer to hardware structure
1988
1982
 *
2030
2024
        return status;
2031
2025
}
2032
2026
 
 
2027
/**
 
2028
 *  ixgbe_verify_lesm_fw_enabled_82599 - Checks LESM FW module state.
 
2029
 *  @hw: pointer to hardware structure
 
2030
 *
 
2031
 *  Returns true if the LESM FW module is present and enabled. Otherwise
 
2032
 *  returns false. Smart Speed must be disabled if LESM FW module is enabled.
 
2033
 **/
 
2034
static bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw)
 
2035
{
 
2036
        bool lesm_enabled = false;
 
2037
        u16 fw_offset, fw_lesm_param_offset, fw_lesm_state;
 
2038
        s32 status;
 
2039
 
 
2040
        /* get the offset to the Firmware Module block */
 
2041
        status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset);
 
2042
 
 
2043
        if ((status != 0) ||
 
2044
            (fw_offset == 0) || (fw_offset == 0xFFFF))
 
2045
                goto out;
 
2046
 
 
2047
        /* get the offset to the LESM Parameters block */
 
2048
        status = hw->eeprom.ops.read(hw, (fw_offset +
 
2049
                                     IXGBE_FW_LESM_PARAMETERS_PTR),
 
2050
                                     &fw_lesm_param_offset);
 
2051
 
 
2052
        if ((status != 0) ||
 
2053
            (fw_lesm_param_offset == 0) || (fw_lesm_param_offset == 0xFFFF))
 
2054
                goto out;
 
2055
 
 
2056
        /* get the lesm state word */
 
2057
        status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset +
 
2058
                                     IXGBE_FW_LESM_STATE_1),
 
2059
                                     &fw_lesm_state);
 
2060
 
 
2061
        if ((status == 0) &&
 
2062
            (fw_lesm_state & IXGBE_FW_LESM_STATE_ENABLED))
 
2063
                lesm_enabled = true;
 
2064
 
 
2065
out:
 
2066
        return lesm_enabled;
 
2067
}
 
2068
 
 
2069
/**
 
2070
 *  ixgbe_read_eeprom_buffer_82599 - Read EEPROM word(s) using
 
2071
 *  fastest available method
 
2072
 *
 
2073
 *  @hw: pointer to hardware structure
 
2074
 *  @offset: offset of  word in EEPROM to read
 
2075
 *  @words: number of words
 
2076
 *  @data: word(s) read from the EEPROM
 
2077
 *
 
2078
 *  Retrieves 16 bit word(s) read from EEPROM
 
2079
 **/
 
2080
static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,
 
2081
                                          u16 words, u16 *data)
 
2082
{
 
2083
        struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
 
2084
        s32 ret_val = IXGBE_ERR_CONFIG;
 
2085
 
 
2086
        /*
 
2087
         * If EEPROM is detected and can be addressed using 14 bits,
 
2088
         * use EERD otherwise use bit bang
 
2089
         */
 
2090
        if ((eeprom->type == ixgbe_eeprom_spi) &&
 
2091
            (offset + (words - 1) <= IXGBE_EERD_MAX_ADDR))
 
2092
                ret_val = ixgbe_read_eerd_buffer_generic(hw, offset, words,
 
2093
                                                         data);
 
2094
        else
 
2095
                ret_val = ixgbe_read_eeprom_buffer_bit_bang_generic(hw, offset,
 
2096
                                                                    words,
 
2097
                                                                    data);
 
2098
 
 
2099
        return ret_val;
 
2100
}
 
2101
 
 
2102
/**
 
2103
 *  ixgbe_read_eeprom_82599 - Read EEPROM word using
 
2104
 *  fastest available method
 
2105
 *
 
2106
 *  @hw: pointer to hardware structure
 
2107
 *  @offset: offset of  word in the EEPROM to read
 
2108
 *  @data: word read from the EEPROM
 
2109
 *
 
2110
 *  Reads a 16 bit word from the EEPROM
 
2111
 **/
 
2112
static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,
 
2113
                                   u16 offset, u16 *data)
 
2114
{
 
2115
        struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
 
2116
        s32 ret_val = IXGBE_ERR_CONFIG;
 
2117
 
 
2118
        /*
 
2119
         * If EEPROM is detected and can be addressed using 14 bits,
 
2120
         * use EERD otherwise use bit bang
 
2121
         */
 
2122
        if ((eeprom->type == ixgbe_eeprom_spi) &&
 
2123
            (offset <= IXGBE_EERD_MAX_ADDR))
 
2124
                ret_val = ixgbe_read_eerd_generic(hw, offset, data);
 
2125
        else
 
2126
                ret_val = ixgbe_read_eeprom_bit_bang_generic(hw, offset, data);
 
2127
 
 
2128
        return ret_val;
 
2129
}
 
2130
 
2033
2131
static struct ixgbe_mac_operations mac_ops_82599 = {
2034
2132
        .init_hw                = &ixgbe_init_hw_generic,
2035
2133
        .reset_hw               = &ixgbe_reset_hw_82599,
2040
2138
        .enable_rx_dma          = &ixgbe_enable_rx_dma_82599,
2041
2139
        .get_mac_addr           = &ixgbe_get_mac_addr_generic,
2042
2140
        .get_san_mac_addr       = &ixgbe_get_san_mac_addr_generic,
2043
 
        .get_device_caps        = &ixgbe_get_device_caps_82599,
 
2141
        .get_device_caps        = &ixgbe_get_device_caps_generic,
2044
2142
        .get_wwn_prefix         = &ixgbe_get_wwn_prefix_generic,
2045
2143
        .stop_adapter           = &ixgbe_stop_adapter_generic,
2046
2144
        .get_bus_info           = &ixgbe_get_bus_info_generic,
2076
2174
 
2077
2175
static struct ixgbe_eeprom_operations eeprom_ops_82599 = {
2078
2176
        .init_params            = &ixgbe_init_eeprom_params_generic,
2079
 
        .read                   = &ixgbe_read_eerd_generic,
 
2177
        .read                   = &ixgbe_read_eeprom_82599,
 
2178
        .read_buffer            = &ixgbe_read_eeprom_buffer_82599,
2080
2179
        .write                  = &ixgbe_write_eeprom_generic,
 
2180
        .write_buffer           = &ixgbe_write_eeprom_buffer_bit_bang_generic,
2081
2181
        .calc_checksum          = &ixgbe_calc_eeprom_checksum_generic,
2082
2182
        .validate_checksum      = &ixgbe_validate_eeprom_checksum_generic,
2083
2183
        .update_checksum        = &ixgbe_update_eeprom_checksum_generic,