2
* PXA270-based Clamshell PDA platforms.
4
* Copyright (c) 2006 Openedhand Ltd.
5
* Written by Andrzej Zaborowski <balrog@zabor.org>
7
* This code is licensed under the GNU GPL v2.
18
#include "qemu-timer.h"
23
#include "audio/audio.h"
29
#define REG_FMT "0x%02lx"
32
#define FLASH_BASE 0x0c000000
33
#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
34
#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
35
#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
36
#define FLASH_ECCCNTR 0x0c /* ECC byte counter */
37
#define FLASH_ECCCLRR 0x10 /* Clear ECC */
38
#define FLASH_FLASHIO 0x14 /* Flash I/O */
39
#define FLASH_FLASHCTL 0x18 /* Flash Control */
41
#define FLASHCTL_CE0 (1 << 0)
42
#define FLASHCTL_CLE (1 << 1)
43
#define FLASHCTL_ALE (1 << 2)
44
#define FLASHCTL_WP (1 << 3)
45
#define FLASHCTL_CE1 (1 << 4)
46
#define FLASHCTL_RYBY (1 << 5)
47
#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
58
static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
60
SLNANDState *s = (SLNANDState *) opaque;
64
#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
66
return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
67
BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
69
#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
71
return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
72
BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
78
return s->ecc.count & 0xff;
81
nand_getpins(s->nand, &ryby);
83
return s->ctl | FLASHCTL_RYBY;
88
return ecc_digest(&s->ecc, nand_getio(s->nand));
91
zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
96
static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
98
SLNANDState *s = (SLNANDState *) opaque;
100
if (addr == FLASH_FLASHIO)
101
return ecc_digest(&s->ecc, nand_getio(s->nand)) |
102
(ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
104
return sl_readb(opaque, addr);
107
static void sl_writeb(void *opaque, target_phys_addr_t addr,
110
SLNANDState *s = (SLNANDState *) opaque;
114
/* Value is ignored. */
119
s->ctl = value & 0xff & ~FLASHCTL_RYBY;
120
nand_setpins(s->nand,
121
s->ctl & FLASHCTL_CLE,
122
s->ctl & FLASHCTL_ALE,
123
s->ctl & FLASHCTL_NCE,
124
s->ctl & FLASHCTL_WP,
129
nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
133
zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
142
static CPUReadMemoryFunc * const sl_readfn[] = {
147
static CPUWriteMemoryFunc * const sl_writefn[] = {
153
static void sl_flash_register(PXA2xxState *cpu, int size)
157
dev = qdev_create(NULL, "sl-nand");
159
qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
160
if (size == FLASH_128M)
161
qdev_prop_set_uint8(dev, "chip_id", 0x73);
162
else if (size == FLASH_1024M)
163
qdev_prop_set_uint8(dev, "chip_id", 0xf1);
165
qdev_init_nofail(dev);
166
sysbus_mmio_map(sysbus_from_qdev(dev), 0, FLASH_BASE);
169
static int sl_nand_init(SysBusDevice *dev) {
173
s = FROM_SYSBUS(SLNANDState, dev);
176
s->nand = nand_init(s->manf_id, s->chip_id);
178
iomemtype = cpu_register_io_memory(sl_readfn,
179
sl_writefn, s, DEVICE_NATIVE_ENDIAN);
181
sysbus_init_mmio(dev, 0x40, iomemtype);
188
#define SPITZ_KEY_STROBE_NUM 11
189
#define SPITZ_KEY_SENSE_NUM 7
191
static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
192
12, 17, 91, 34, 36, 38, 39
195
static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
196
88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
199
/* Eighth additional row maps the special keys */
200
static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
201
{ 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
202
{ -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
203
{ 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
204
{ 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
205
{ 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
206
{ 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
207
{ 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
208
{ 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
211
#define SPITZ_GPIO_AK_INT 13 /* Remote control */
212
#define SPITZ_GPIO_SYNC 16 /* Sync button */
213
#define SPITZ_GPIO_ON_KEY 95 /* Power button */
214
#define SPITZ_GPIO_SWA 97 /* Lid */
215
#define SPITZ_GPIO_SWB 96 /* Tablet mode */
217
/* The special buttons are mapped to unused keys */
218
static const int spitz_gpiomap[5] = {
219
SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
220
SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
225
qemu_irq sense[SPITZ_KEY_SENSE_NUM];
228
uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
229
uint16_t strobe_state;
230
uint16_t sense_state;
232
uint16_t pre_map[0x100];
236
int fifopos, fifolen;
238
} SpitzKeyboardState;
240
static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
243
uint16_t strobe, sense = 0;
244
for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
245
strobe = s->keyrow[i] & s->strobe_state;
248
if (!(s->sense_state & (1 << i)))
249
qemu_irq_raise(s->sense[i]);
250
} else if (s->sense_state & (1 << i))
251
qemu_irq_lower(s->sense[i]);
254
s->sense_state = sense;
257
static void spitz_keyboard_strobe(void *opaque, int line, int level)
259
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
262
s->strobe_state |= 1 << line;
264
s->strobe_state &= ~(1 << line);
265
spitz_keyboard_sense_update(s);
268
static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
270
int spitz_keycode = s->keymap[keycode & 0x7f];
271
if (spitz_keycode == -1)
274
/* Handle the additional keys */
275
if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
276
qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
281
s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
283
s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
285
spitz_keyboard_sense_update(s);
288
#define SHIFT (1 << 7)
289
#define CTRL (1 << 8)
292
#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
294
static void spitz_keyboard_handler(void *opaque, int keycode)
296
SpitzKeyboardState *s = opaque;
300
case 0x2a: /* Left Shift */
306
case 0x36: /* Right Shift */
312
case 0x1d: /* Control */
326
code = s->pre_map[mapcode = ((s->modifiers & 3) ?
328
(keycode & ~SHIFT))];
330
if (code != mapcode) {
332
if ((code & SHIFT) && !(s->modifiers & 1))
333
QUEUE_KEY(0x2a | (keycode & 0x80));
334
if ((code & CTRL ) && !(s->modifiers & 4))
335
QUEUE_KEY(0x1d | (keycode & 0x80));
336
if ((code & FN ) && !(s->modifiers & 8))
337
QUEUE_KEY(0x38 | (keycode & 0x80));
338
if ((code & FN ) && (s->modifiers & 1))
339
QUEUE_KEY(0x2a | (~keycode & 0x80));
340
if ((code & FN ) && (s->modifiers & 2))
341
QUEUE_KEY(0x36 | (~keycode & 0x80));
343
if (keycode & 0x80) {
344
if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
345
QUEUE_KEY(0x2a | 0x80);
346
if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
347
QUEUE_KEY(0x1d | 0x80);
348
if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
349
QUEUE_KEY(0x38 | 0x80);
350
if ((s->imodifiers & 0x10) && (s->modifiers & 1))
352
if ((s->imodifiers & 0x20) && (s->modifiers & 2))
356
if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
360
if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
364
if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) {
368
if ((code & FN ) && (s->modifiers & 1) &&
369
!(s->imodifiers & 0x10)) {
370
QUEUE_KEY(0x2a | 0x80);
371
s->imodifiers |= 0x10;
373
if ((code & FN ) && (s->modifiers & 2) &&
374
!(s->imodifiers & 0x20)) {
375
QUEUE_KEY(0x36 | 0x80);
376
s->imodifiers |= 0x20;
382
QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
385
static void spitz_keyboard_tick(void *opaque)
387
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
390
spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
392
if (s->fifopos >= 16)
396
qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock) +
397
get_ticks_per_sec() / 32);
400
static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
403
for (i = 0; i < 0x100; i ++)
405
s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */
406
s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */
407
s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */
408
s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */
409
s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */
410
s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */
411
s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */
412
s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */
413
s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */
414
s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */
415
s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */
416
s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */
417
s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */
418
s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */
419
s->pre_map[0x0d ] = 0x12 | FN; /* equal */
420
s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */
421
s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */
422
s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */
423
s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */
424
s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */
425
s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */
426
s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */
427
s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */
428
s->pre_map[0x2b ] = 0x25 | FN; /* backslash */
429
s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */
430
s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */
431
s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */
432
s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */
433
s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */
434
s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */
435
s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */
436
s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */
448
static int spitz_keyboard_post_load(void *opaque, int version_id)
450
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
452
/* Release all pressed keys */
453
memset(s->keyrow, 0, sizeof(s->keyrow));
454
spitz_keyboard_sense_update(s);
463
static void spitz_keyboard_register(PXA2xxState *cpu)
467
SpitzKeyboardState *s;
469
dev = sysbus_create_simple("spitz-keyboard", -1, NULL);
470
s = FROM_SYSBUS(SpitzKeyboardState, sysbus_from_qdev(dev));
472
for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
473
qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
475
for (i = 0; i < 5; i ++)
476
s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
479
s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
481
for (i = 0; i < 5; i++)
482
qemu_set_irq(s->gpiomap[i], 0);
484
for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
485
qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
486
qdev_get_gpio_in(dev, i));
488
qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock));
490
qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
493
static int spitz_keyboard_init(SysBusDevice *dev)
495
SpitzKeyboardState *s;
498
s = FROM_SYSBUS(SpitzKeyboardState, dev);
500
for (i = 0; i < 0x80; i ++)
502
for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
503
for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
504
if (spitz_keymap[i][j] != -1)
505
s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
507
spitz_keyboard_pre_map(s);
509
s->kbdtimer = qemu_new_timer_ns(vm_clock, spitz_keyboard_tick, s);
510
qdev_init_gpio_in(&dev->qdev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
511
qdev_init_gpio_out(&dev->qdev, s->sense, SPITZ_KEY_SENSE_NUM);
516
/* LCD backlight controller */
518
#define LCDTG_RESCTL 0x00
519
#define LCDTG_PHACTRL 0x01
520
#define LCDTG_DUTYCTRL 0x02
521
#define LCDTG_POWERREG0 0x03
522
#define LCDTG_POWERREG1 0x04
523
#define LCDTG_GPOR3 0x05
524
#define LCDTG_PICTRL 0x06
525
#define LCDTG_POLCTRL 0x07
529
uint32_t bl_intensity;
533
static void spitz_bl_update(SpitzLCDTG *s)
535
if (s->bl_power && s->bl_intensity)
536
zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
538
zaurus_printf("LCD Backlight now off\n");
541
/* FIXME: Implement GPIO properly and remove this hack. */
542
static SpitzLCDTG *spitz_lcdtg;
544
static inline void spitz_bl_bit5(void *opaque, int line, int level)
546
SpitzLCDTG *s = spitz_lcdtg;
547
int prev = s->bl_intensity;
550
s->bl_intensity &= ~0x20;
552
s->bl_intensity |= 0x20;
554
if (s->bl_power && prev != s->bl_intensity)
558
static inline void spitz_bl_power(void *opaque, int line, int level)
560
SpitzLCDTG *s = spitz_lcdtg;
561
s->bl_power = !!level;
565
static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
567
SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
575
zaurus_printf("LCD in QVGA mode\n");
577
zaurus_printf("LCD in VGA mode\n");
581
s->bl_intensity &= ~0x1f;
582
s->bl_intensity |= value;
587
case LCDTG_POWERREG0:
588
/* Set common voltage to M62332FP */
594
static int spitz_lcdtg_init(SSISlave *dev)
596
SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
600
s->bl_intensity = 0x20;
607
#define CORGI_SSP_PORT 2
609
#define SPITZ_GPIO_LCDCON_CS 53
610
#define SPITZ_GPIO_ADS7846_CS 14
611
#define SPITZ_GPIO_MAX1111_CS 20
612
#define SPITZ_GPIO_TP_INT 11
614
static DeviceState *max1111;
616
/* "Demux" the signal based on current chipselect */
623
static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
625
CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
628
for (i = 0; i < 3; i++) {
630
return ssi_transfer(s->bus[i], value);
636
static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
638
CorgiSSPState *s = (CorgiSSPState *)opaque;
639
assert(line >= 0 && line < 3);
640
s->enable[line] = !level;
643
#define MAX1111_BATT_VOLT 1
644
#define MAX1111_BATT_TEMP 2
645
#define MAX1111_ACIN_VOLT 3
647
#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
648
#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
649
#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
651
static void spitz_adc_temp_on(void *opaque, int line, int level)
657
max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
659
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
662
static int corgi_ssp_init(SSISlave *dev)
664
CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
666
qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
667
s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0");
668
s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
669
s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
674
static void spitz_ssp_attach(PXA2xxState *cpu)
680
mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
682
bus = qdev_get_child_bus(mux, "ssi0");
683
ssi_create_slave(bus, "spitz-lcdtg");
685
bus = qdev_get_child_bus(mux, "ssi1");
686
dev = ssi_create_slave(bus, "ads7846");
687
qdev_connect_gpio_out(dev, 0,
688
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
690
bus = qdev_get_child_bus(mux, "ssi2");
691
max1111 = ssi_create_slave(bus, "max1111");
692
max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
693
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
694
max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
696
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
697
qdev_get_gpio_in(mux, 0));
698
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
699
qdev_get_gpio_in(mux, 1));
700
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
701
qdev_get_gpio_in(mux, 2));
706
static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
709
BlockDriverState *bs;
712
dinfo = drive_get(IF_IDE, 0, 0);
716
if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
717
md = dscm1xxxx_init(dinfo);
718
pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
722
/* Wm8750 and Max7310 on I2C */
724
#define AKITA_MAX_ADDR 0x18
725
#define SPITZ_WM_ADDRL 0x1b
726
#define SPITZ_WM_ADDRH 0x1a
728
#define SPITZ_GPIO_WM 5
730
static void spitz_wm8750_addr(void *opaque, int line, int level)
732
i2c_slave *wm = (i2c_slave *) opaque;
734
i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
736
i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
739
static void spitz_i2c_setup(PXA2xxState *cpu)
741
/* Attach the CPU on one end of our I2C bus. */
742
i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
746
/* Attach a WM8750 to the bus */
747
wm = i2c_create_slave(bus, "wm8750", 0);
749
spitz_wm8750_addr(wm, 0, 0);
750
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
751
qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
752
/* .. and to the sound interface. */
753
cpu->i2s->opaque = wm;
754
cpu->i2s->codec_out = wm8750_dac_dat;
755
cpu->i2s->codec_in = wm8750_adc_dat;
756
wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
759
static void spitz_akita_i2c_setup(PXA2xxState *cpu)
761
/* Attach a Max7310 to Akita I2C bus. */
762
i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
766
/* Other peripherals */
768
static void spitz_out_switch(void *opaque, int line, int level)
772
zaurus_printf("Charging %s.\n", level ? "off" : "on");
775
zaurus_printf("Discharging %s.\n", level ? "on" : "off");
778
zaurus_printf("Green LED %s.\n", level ? "on" : "off");
781
zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
784
spitz_bl_bit5(opaque, line, level);
787
spitz_bl_power(opaque, line, level);
790
spitz_adc_temp_on(opaque, line, level);
795
#define SPITZ_SCP_LED_GREEN 1
796
#define SPITZ_SCP_JK_B 2
797
#define SPITZ_SCP_CHRG_ON 3
798
#define SPITZ_SCP_MUTE_L 4
799
#define SPITZ_SCP_MUTE_R 5
800
#define SPITZ_SCP_CF_POWER 6
801
#define SPITZ_SCP_LED_ORANGE 7
802
#define SPITZ_SCP_JK_A 8
803
#define SPITZ_SCP_ADC_TEMP_ON 9
804
#define SPITZ_SCP2_IR_ON 1
805
#define SPITZ_SCP2_AKIN_PULLUP 2
806
#define SPITZ_SCP2_BACKLIGHT_CONT 7
807
#define SPITZ_SCP2_BACKLIGHT_ON 8
808
#define SPITZ_SCP2_MIC_BIAS 9
810
static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
811
DeviceState *scp0, DeviceState *scp1)
813
qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
815
qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
816
qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
817
qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
818
qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
821
qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
822
qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
825
qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
828
#define SPITZ_GPIO_HSYNC 22
829
#define SPITZ_GPIO_SD_DETECT 9
830
#define SPITZ_GPIO_SD_WP 81
831
#define SPITZ_GPIO_ON_RESET 89
832
#define SPITZ_GPIO_BAT_COVER 90
833
#define SPITZ_GPIO_CF1_IRQ 105
834
#define SPITZ_GPIO_CF1_CD 94
835
#define SPITZ_GPIO_CF2_IRQ 106
836
#define SPITZ_GPIO_CF2_CD 93
838
static int spitz_hsync;
840
static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
842
PXA2xxState *cpu = (PXA2xxState *) opaque;
843
qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
847
static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
851
* Bad hack: We toggle the LCD hsync GPIO on every GPIO status
852
* read to satisfy broken guests that poll-wait for hsync.
853
* Simulating a real hsync event would be less practical and
854
* wouldn't guarantee that a guest ever exits the loop.
857
lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
858
pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
859
pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
862
pxa2xx_mmci_handlers(cpu->mmc,
863
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
864
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
866
/* Battery lock always closed */
867
qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
870
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
872
/* PCMCIA signals: card's IRQ and Card-Detect */
874
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
875
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
876
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
878
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
879
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
880
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
884
enum spitz_model_e { spitz, akita, borzoi, terrier };
886
#define SPITZ_RAM 0x04000000
887
#define SPITZ_ROM 0x00800000
889
static struct arm_boot_info spitz_binfo = {
890
.loader_start = PXA2XX_SDRAM_BASE,
891
.ram_size = 0x04000000,
894
static void spitz_common_init(ram_addr_t ram_size,
895
const char *kernel_filename,
896
const char *kernel_cmdline, const char *initrd_filename,
897
const char *cpu_model, enum spitz_model_e model, int arm_id)
900
DeviceState *scp0, *scp1 = NULL;
903
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
905
/* Setup CPU & memory */
906
cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
908
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
910
cpu_register_physical_memory(0, SPITZ_ROM,
911
qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
913
/* Setup peripherals */
914
spitz_keyboard_register(cpu);
916
spitz_ssp_attach(cpu);
918
scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
919
if (model != akita) {
920
scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
923
spitz_scoop_gpio_setup(cpu, scp0, scp1);
925
spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
927
spitz_i2c_setup(cpu);
930
spitz_akita_i2c_setup(cpu);
932
if (model == terrier)
933
/* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
934
spitz_microdrive_attach(cpu, 1);
935
else if (model != akita)
936
/* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
937
spitz_microdrive_attach(cpu, 0);
939
spitz_binfo.kernel_filename = kernel_filename;
940
spitz_binfo.kernel_cmdline = kernel_cmdline;
941
spitz_binfo.initrd_filename = initrd_filename;
942
spitz_binfo.board_id = arm_id;
943
arm_load_kernel(cpu->env, &spitz_binfo);
944
sl_bootparam_write(SL_PXA_PARAM_BASE);
947
static void spitz_init(ram_addr_t ram_size,
948
const char *boot_device,
949
const char *kernel_filename, const char *kernel_cmdline,
950
const char *initrd_filename, const char *cpu_model)
952
spitz_common_init(ram_size, kernel_filename,
953
kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
956
static void borzoi_init(ram_addr_t ram_size,
957
const char *boot_device,
958
const char *kernel_filename, const char *kernel_cmdline,
959
const char *initrd_filename, const char *cpu_model)
961
spitz_common_init(ram_size, kernel_filename,
962
kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
965
static void akita_init(ram_addr_t ram_size,
966
const char *boot_device,
967
const char *kernel_filename, const char *kernel_cmdline,
968
const char *initrd_filename, const char *cpu_model)
970
spitz_common_init(ram_size, kernel_filename,
971
kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
974
static void terrier_init(ram_addr_t ram_size,
975
const char *boot_device,
976
const char *kernel_filename, const char *kernel_cmdline,
977
const char *initrd_filename, const char *cpu_model)
979
spitz_common_init(ram_size, kernel_filename,
980
kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
983
static QEMUMachine akitapda_machine = {
985
.desc = "Akita PDA (PXA270)",
989
static QEMUMachine spitzpda_machine = {
991
.desc = "Spitz PDA (PXA270)",
995
static QEMUMachine borzoipda_machine = {
997
.desc = "Borzoi PDA (PXA270)",
1001
static QEMUMachine terrierpda_machine = {
1003
.desc = "Terrier PDA (PXA270)",
1004
.init = terrier_init,
1007
static void spitz_machine_init(void)
1009
qemu_register_machine(&akitapda_machine);
1010
qemu_register_machine(&spitzpda_machine);
1011
qemu_register_machine(&borzoipda_machine);
1012
qemu_register_machine(&terrierpda_machine);
1015
machine_init(spitz_machine_init);
1017
static bool is_version_0(void *opaque, int version_id)
1019
return version_id == 0;
1022
static VMStateDescription vmstate_sl_nand_info = {
1025
.minimum_version_id = 0,
1026
.minimum_version_id_old = 0,
1027
.fields = (VMStateField []) {
1028
VMSTATE_UINT8(ctl, SLNANDState),
1029
VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1030
VMSTATE_END_OF_LIST(),
1034
static SysBusDeviceInfo sl_nand_info = {
1035
.init = sl_nand_init,
1036
.qdev.name = "sl-nand",
1037
.qdev.size = sizeof(SLNANDState),
1038
.qdev.vmsd = &vmstate_sl_nand_info,
1039
.qdev.props = (Property []) {
1040
DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1041
DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1042
DEFINE_PROP_END_OF_LIST(),
1046
static VMStateDescription vmstate_spitz_kbd = {
1047
.name = "spitz-keyboard",
1049
.minimum_version_id = 0,
1050
.minimum_version_id_old = 0,
1051
.post_load = spitz_keyboard_post_load,
1052
.fields = (VMStateField []) {
1053
VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1054
VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1055
VMSTATE_UNUSED_TEST(is_version_0, 5),
1056
VMSTATE_END_OF_LIST(),
1060
static SysBusDeviceInfo spitz_keyboard_info = {
1061
.init = spitz_keyboard_init,
1062
.qdev.name = "spitz-keyboard",
1063
.qdev.size = sizeof(SpitzKeyboardState),
1064
.qdev.vmsd = &vmstate_spitz_kbd,
1065
.qdev.props = (Property []) {
1066
DEFINE_PROP_END_OF_LIST(),
1070
static const VMStateDescription vmstate_corgi_ssp_regs = {
1071
.name = "corgi-ssp",
1073
.minimum_version_id = 1,
1074
.minimum_version_id_old = 1,
1075
.fields = (VMStateField []) {
1076
VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1077
VMSTATE_END_OF_LIST(),
1081
static SSISlaveInfo corgi_ssp_info = {
1082
.qdev.name = "corgi-ssp",
1083
.qdev.size = sizeof(CorgiSSPState),
1084
.qdev.vmsd = &vmstate_corgi_ssp_regs,
1085
.init = corgi_ssp_init,
1086
.transfer = corgi_ssp_transfer
1089
static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1090
.name = "spitz-lcdtg",
1092
.minimum_version_id = 1,
1093
.minimum_version_id_old = 1,
1094
.fields = (VMStateField []) {
1095
VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1096
VMSTATE_UINT32(bl_power, SpitzLCDTG),
1097
VMSTATE_END_OF_LIST(),
1101
static SSISlaveInfo spitz_lcdtg_info = {
1102
.qdev.name = "spitz-lcdtg",
1103
.qdev.size = sizeof(SpitzLCDTG),
1104
.qdev.vmsd = &vmstate_spitz_lcdtg_regs,
1105
.init = spitz_lcdtg_init,
1106
.transfer = spitz_lcdtg_transfer
1109
static void spitz_register_devices(void)
1111
ssi_register_slave(&corgi_ssp_info);
1112
ssi_register_slave(&spitz_lcdtg_info);
1113
sysbus_register_withprop(&spitz_keyboard_info);
1114
sysbus_register_withprop(&sl_nand_info);
1117
device_init(spitz_register_devices)