3
MSR_IA32_VMX_BASIC = 0x480
4
MSR_IA32_VMX_PINBASED_CTLS = 0x481
5
MSR_IA32_VMX_PROCBASED_CTLS = 0x482
6
MSR_IA32_VMX_EXIT_CTLS = 0x483
7
MSR_IA32_VMX_ENTRY_CTLS = 0x484
8
MSR_IA32_VMX_MISC_CTLS = 0x485
9
MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
10
MSR_IA32_VMX_EPT_VPID_CAP = 0x48C
11
MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
12
MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
13
MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
14
MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
19
self.f = file('/dev/cpu/0/msr')
21
self.f = file('/dev/msr0')
22
def read(self, index, default = None):
26
return struct.unpack('Q', self.f.read(8))[0]
30
class Control(object):
31
def __init__(self, name, bits, cap_msr, true_cap_msr = None):
34
self.cap_msr = cap_msr
35
self.true_cap_msr = true_cap_msr
39
return (val & 0xffffffff, val >> 32)
42
mbz, mb1 = self.read2(self.cap_msr)
45
tmbz, tmb1 = self.read2(self.true_cap_msr)
46
for bit in sorted(self.bits.keys()):
47
zero = not (mbz & (1 << bit))
48
one = mb1 & (1 << bit)
49
true_zero = not (tmbz & (1 << bit))
50
true_one = tmb1 & (1 << bit)
52
if (self.true_cap_msr and true_zero and true_one
53
and one and not zero):
55
elif zero and not one:
57
elif one and not zero:
61
print ' %-40s %s' % (self.bits[bit], s)
64
def __init__(self, name, bits, msr):
70
value = msr().read(self.msr, 0)
72
if type(key) is tuple:
76
for bits in sorted(self.bits.keys(), key = first_bit):
77
if type(bits) is tuple:
83
return { True: 'yes', False: 'no' }[x]
84
v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
85
print ' %-40s %s' % (self.bits[bits], fmt(v))
89
name = 'pin-based controls',
91
0: 'External interrupt exiting',
94
6: 'Activate VMX-preemption timer',
96
cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
97
true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
101
name = 'primary processor-based controls',
103
2: 'Interrupt window exiting',
104
3: 'Use TSC offsetting',
110
15: 'CR3-load exiting',
111
16: 'CR3-store exiting',
112
19: 'CR8-load exiting',
113
20: 'CR8-store exiting',
114
21: 'Use TPR shadow',
115
22: 'NMI-window exiting',
116
23: 'MOV-DR exiting',
117
24: 'Unconditional I/O exiting',
118
25: 'Use I/O bitmaps',
119
27: 'Monitor trap flag',
120
28: 'Use MSR bitmaps',
121
29: 'MONITOR exiting',
123
31: 'Activate secondary control',
125
cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
126
true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
130
name = 'secondary processor-based controls',
132
0: 'Virtualize APIC accesses',
134
2: 'Descriptor-table exiting',
135
4: 'Virtualize x2APIC mode',
138
7: 'Unrestricted guest',
139
10: 'PAUSE-loop exiting',
141
cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
145
name = 'VM-Exit controls',
147
2: 'Save debug controls',
148
9: 'Host address-space size',
149
12: 'Load IA32_PERF_GLOBAL_CTRL',
150
15: 'Acknowledge interrupt on exit',
153
20: 'Save IA32_EFER',
154
21: 'Load IA32_EFER',
155
22: 'Save VMX-preemption timer value',
157
cap_msr = MSR_IA32_VMX_EXIT_CTLS,
158
true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
162
name = 'VM-Entry controls',
164
2: 'Load debug controls',
165
9: 'IA-64 mode guest',
167
11: 'Deactivate dual-monitor treatment',
168
13: 'Load IA32_PERF_GLOBAL_CTRL',
170
15: 'Load IA32_EFER',
172
cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
173
true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
177
name = 'Miscellaneous data',
179
(0,4): 'VMX-preemption timer scale (log2)',
180
5: 'Store EFER.LMA into IA-32e mode guest control',
181
6: 'HLT activity state',
182
7: 'Shutdown activity state',
183
8: 'Wait-for-SIPI activity state',
184
(16,24): 'Number of CR3-target values',
185
(25,27): 'MSR-load/store count recommenation',
186
(32,62): 'MSEG revision identifier',
188
msr = MSR_IA32_VMX_MISC_CTLS,
192
name = 'VPID and EPT capabilities',
194
0: 'Execute-only EPT translations',
195
6: 'Page-walk length 4',
196
8: 'Paging-structure memory type UC',
197
14: 'Paging-structure memory type WB',
200
20: 'INVEPT supported',
201
25: 'Single-context INVEPT',
202
26: 'All-context INVEPT',
203
32: 'INVVPID supported',
204
40: 'Individual-address INVVPID',
205
41: 'Single-context INVVPID',
206
42: 'All-context INVVPID',
207
43: 'Single-context-retaining-globals INVVPID',
209
msr = MSR_IA32_VMX_EPT_VPID_CAP,