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#ifndef __ASM_DOMAIN_H__
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#define __ASM_DOMAIN_H__
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#include <linux/thread_info.h>
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#include <asm/vmx_vpd.h>
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#include <asm/regionreg.h>
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#include <public/xen.h>
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#include <asm/vmx_platform.h>
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#include <xen/cpumask.h>
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#include <asm/fpswa.h>
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#include <xen/rangeset.h>
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#ifdef CONFIG_XEN_IA64_TLB_TRACK
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extern unsigned long volatile jiffies;
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extern void relinquish_vcpu_resources(struct vcpu *v);
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extern int vcpu_late_initialise(struct vcpu *v);
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/* given a current domain metaphysical address, return the physical address */
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extern unsigned long translate_domain_mpaddr(unsigned long mpaddr,
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struct p2m_entry* entry);
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/* Set shared_info virtual address. */
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extern unsigned long domain_set_shared_info_va (unsigned long va);
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/* Flush cache of domain d.
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If sync_only is true, only synchronize I&D caches,
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if false, flush and invalidate caches. */
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extern void domain_cache_flush (struct domain *d, int sync_only);
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/* Control the shadow mode. */
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extern int shadow_mode_control(struct domain *d, xen_domctl_shadow_op_t *sc);
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/* Cleanly crash the current domain with a message. */
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extern void panic_domain(struct pt_regs *, const char *, ...)
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__attribute__ ((noreturn, format (printf, 2, 3)));
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#define has_arch_pdevs(d) (!list_empty(&(d)->arch.pdev_list))
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// atomic_t mm_users; /* How many users with user space? */
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* sorted list with entry->gpfn.
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* It is expected that only small number of foreign domain p2m
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* mapping happens at the same time.
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struct list_head head;
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#define INVALID_VCPU_ID INT_MAX
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#ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
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u32 tlbflush_timestamp;
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} ____cacheline_aligned_in_smp;
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/* These are data in domain memory for SAL emulator. */
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/* OS boot rendez vous. */
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unsigned long boot_rdv_ip;
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unsigned long boot_rdv_r1;
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/* There are these for EFI_SET_VIRTUAL_ADDRESS_MAP emulation. */
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int efi_virt_mode; /* phys : 0 , virt : 1 */
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* Optimization features are used by the hypervisor to do some optimizations
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* for guests. By default the optimizations are switched off and the guest
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* may activate the feature. The guest may do this via the hypercall
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* __HYPERVISOR_opt_feature. Domain builder code can also enable these
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* via XEN_DOMCTL_set_opt_feature.
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* Helper struct for the different identity mapping optimizations.
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* The hypervisor does the insertion of address translations in the tlb
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* for identity mapped areas without reflecting the page fault
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struct identity_mapping {
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unsigned long pgprot; /* The page protection bit mask of the pte.*/
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unsigned long key; /* A protection key. */
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/* opt_feature mask */
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* If this feature is switched on, the hypervisor inserts the
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* tlb entries without calling the guests traphandler.
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* This is useful in guests using region 7 for identity mapping
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* like the linux kernel does.
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#define XEN_IA64_OPTF_IDENT_MAP_REG7_FLG_BIT 0
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#define XEN_IA64_OPTF_IDENT_MAP_REG7_FLG \
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(1UL << XEN_IA64_OPTF_IDENT_MAP_REG7_FLG_BIT)
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/* Identity mapping of region 4 addresses in HVM. */
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#define XEN_IA64_OPTF_IDENT_MAP_REG4_FLG_BIT \
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(XEN_IA64_OPTF_IDENT_MAP_REG7_FLG_BIT + 1)
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#define XEN_IA64_OPTF_IDENT_MAP_REG4_FLG \
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(1UL << XEN_IA64_OPTF_IDENT_MAP_REG4_FLG_BIT)
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/* Identity mapping of region 5 addresses in HVM. */
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#define XEN_IA64_OPTF_IDENT_MAP_REG5_FLG_BIT \
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(XEN_IA64_OPTF_IDENT_MAP_REG7_FLG_BIT + 2)
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#define XEN_IA64_OPTF_IDENT_MAP_REG5_FLG \
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(1UL << XEN_IA64_OPTF_IDENT_MAP_REG5_FLG_BIT)
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/* Central structure for optimzation features used by the hypervisor. */
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unsigned long mask; /* For every feature one bit. */
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struct identity_mapping im_reg4; /* Region 4 identity mapping */
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struct identity_mapping im_reg5; /* Region 5 identity mapping */
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struct identity_mapping im_reg7; /* Region 7 identity mapping */
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/* Set an optimization feature in the struct arch_domain. */
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extern int domain_opt_feature(struct domain *, struct xen_ia64_opt_feature*);
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unsigned int is_sioemu : 1;
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#ifdef CONFIG_XEN_IA64_PERVCPU_VHPT
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unsigned int has_pervcpu_vhpt : 1;
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unsigned int vhpt_size_log2 : 6;
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/* maximum metaphysical address of conventional memory */
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/* Allowed accesses to io ports. */
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struct rangeset *ioport_caps;
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/* There are two ranges of RID for a domain:
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one big range, used to virtualize domain RID,
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one small range for internal Xen use (metaphysical). */
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unsigned int starting_rid; /* first RID assigned to domain */
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unsigned int ending_rid; /* one beyond highest RID assigned to domain */
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/* Metaphysical range. */
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unsigned int starting_mp_rid;
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unsigned int ending_mp_rid;
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/* RID for metaphysical mode. */
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unsigned int metaphysical_rid_dt; /* dt=it=0 */
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unsigned int metaphysical_rid_d; /* dt=0, it=1 */
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unsigned char rid_bits; /* number of virtual rid bits (default: 18) */
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int breakimm; /* The imm value for hypercalls. */
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struct list_head pdev_list;
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struct virtual_platform_def vmx_platform;
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#define hvm_domain vmx_platform /* platform defs are not vmx specific */
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/* Address of SAL emulator data */
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struct xen_sal_data *sal_data;
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/* Shared page for notifying that explicit PIRQ EOI is required. */
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unsigned long *pirq_eoi_map;
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unsigned long pirq_eoi_map_mfn;
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/* Address of efi_runtime_services_t (placed in domain memory) */
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/* Address of fpswa_interface_t (placed in domain memory) */
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/* Bitmap of shadow dirty bits.
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Set iff shadow mode is enabled. */
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/* Length (in bits!) of shadow bitmap. */
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unsigned long shadow_bitmap_size;
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/* Number of bits set in bitmap. */
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atomic64_t shadow_dirty_count;
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/* Number of faults. */
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atomic64_t shadow_fault_count;
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/* for foreign domain p2m table mapping */
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struct foreign_p2m foreign_p2m;
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struct last_vcpu last_vcpu[NR_CPUS];
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struct opt_feature opt_feature;
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/* Debugging flags. See arch-ia64.h for bits definition. */
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unsigned int debug_flags;
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/* Reason of debugging break. */
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unsigned int debug_event;
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#ifdef CONFIG_XEN_IA64_TLB_TRACK
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struct tlb_track* tlb_track;
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/* for domctl_destroy_domain continuation */
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/* Continuable mm_teardown() */
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unsigned long mm_teardown_offset;
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/* Continuable domain_relinquish_resources() */
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struct page_list_head relmem_list;
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#define INT_ENABLE_OFFSET(v) \
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(sizeof(vcpu_info_t) * (v)->vcpu_id + \
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offsetof(vcpu_info_t, evtchn_upcall_mask))
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#ifdef CONFIG_XEN_IA64_PERVCPU_VHPT
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#define HAS_PERVCPU_VHPT(d) ((d)->arch.has_pervcpu_vhpt)
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#define HAS_PERVCPU_VHPT(d) (0)
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/* Save the state of vcpu.
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This is the first entry to speed up accesses. */
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mapped_regs_t *privregs;
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TR_ENTRY itrs[NITRS];
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TR_ENTRY dtrs[NDTRS];
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/* Bit is set if there is a tr/tc for the region. */
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unsigned char itr_regions;
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unsigned char dtr_regions;
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unsigned char tc_regions;
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unsigned long irr[4]; /* Interrupt request register. */
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unsigned long insvc[4]; /* Interrupt in service. */
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unsigned long domain_itm;
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unsigned long domain_itm_last;
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unsigned long event_callback_ip; // event callback handler
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unsigned long failsafe_callback_ip; // Do we need it?
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/* These fields are copied from arch_domain to make access easier/faster
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unsigned long metaphysical_rid_dt; // from arch_domain (so is pinned)
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unsigned long metaphysical_rid_d; // from arch_domain (so is pinned)
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unsigned long metaphysical_saved_rr0; // from arch_domain (so is pinned)
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unsigned long metaphysical_saved_rr4; // from arch_domain (so is pinned)
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unsigned long fp_psr; // used for lazy float register
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u64 *shadow_bitmap; // from arch_domain (so is pinned)
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int breakimm; // from arch_domain (so is pinned)
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int starting_rid; /* first RID assigned to domain */
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int ending_rid; /* one beyond highest RID assigned to domain */
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unsigned char rid_bits; // from arch_domain (so is pinned)
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/* Bitset for debug register use. */
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unsigned int dbg_used;
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u64 dbr[IA64_NUM_DBG_REGS];
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u64 ibr[IA64_NUM_DBG_REGS];
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struct thread_struct _thread; // this must be last
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char irq_new_pending;
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char irq_new_condition; // vpsr.i/vtpr change, check for pending VHPI
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char hypercall_continuation;
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fpswa_ret_t fpswa_ret; /* save return values of FPSWA emulation */
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struct timer hlt_timer;
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struct arch_vmx_struct arch_vmx; /* Virtual Machine Extensions */
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/* This vector hosts the protection keys for pkr emulation of PV domains.
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* Currently only 15 registers are usable by domU's. pkr[15] is
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* reserved for the hypervisor. */
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unsigned long pkrs[XEN_IA64_NPKRS+1]; /* protection key registers */
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#define XEN_IA64_PKR_IN_USE 0x1 /* If psr.pk = 1 was set. */
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unsigned char pkr_flags;
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unsigned char vhpt_pg_shift; /* PAGE_SHIFT or less */
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#ifdef CONFIG_XEN_IA64_PERVCPU_VHPT
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unsigned long vhpt_maddr;
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struct page_info* vhpt_page;
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unsigned long vhpt_entries;
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#define INVALID_PROCESSOR INT_MAX
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cpumask_t cache_coherent_map;
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#include <asm/uaccess.h> /* for KERNEL_DS */
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#include <asm/pgtable.h>
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do_perfmon_op(unsigned long cmd,
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XEN_GUEST_HANDLE(void) arg1, unsigned long arg2);
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ia64_fault(unsigned long vector, unsigned long isr, unsigned long ifa,
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unsigned long iim, unsigned long itir, unsigned long arg5,
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unsigned long arg6, unsigned long arg7, unsigned long stack);
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ia64_lazy_load_fpu(struct vcpu *vcpu);
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unsigned long image_start, unsigned long image_len,
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unsigned long initrd_start, unsigned long initrd_len,
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#endif /* __ASM_DOMAIN_H__ */
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* indent-tabs-mode: nil