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Copyright (C) 2001 Paul Davis
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Code derived from various headers from the Linux kernel
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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#ifndef __ardour_cycles_h__
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#define __ardour_cycles_h__
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#if defined(__i386__) || defined(__x86_64__)
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* Standard way to access the cycle counter on i586+ CPUs.
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* Currently only used on SMP.
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* If you really have a SMP machine with i486 chips or older,
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* compile for that, and this will just always return zero.
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* That's ok, it just means that the nicer scheduling heuristics
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* We only use the low 32 bits, and we'd simply better make sure
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* that we reschedule before that wraps. Scheduling at least every
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* four billion cycles just basically sounds like a good idea,
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* regardless of how fast the machine is.
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typedef uint64_t cycles_t;
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extern cycles_t cacheflush_time;
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#if defined(__x86_64__)
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#define rdtscll(lo, hi) \
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__asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi))
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static inline cycles_t get_cycles (void)
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#define rdtscll(val) \
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__asm__ __volatile__("rdtsc" : "=A" (val))
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static inline cycles_t get_cycles (void)
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return ret & 0xffffffff;
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#elif defined(__powerpc__)
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#define CPU_FTR_601 0x00000100
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typedef uint32_t cycles_t;
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* For the "cycle" counter we use the timebase lower half.
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* Currently only used on SMP.
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extern cycles_t cacheflush_time;
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static inline cycles_t get_cycles(void)
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".section __ftr_fixup,\"a\"\n"
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: "=r" (ret) : "i" (CPU_FTR_601));
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#elif defined(__ia64__)
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typedef uint32_t cycles_t;
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static inline cycles_t
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__asm__ __volatile__ ("mov %0=ar.itc" : "=r"(ret));
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#elif defined(__alpha__)
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* Standard way to access the cycle counter.
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* Currently only used on SMP for scheduling.
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* Only the low 32 bits are available as a continuously counting entity.
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* But this only means we'll force a reschedule every 8 seconds or so,
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* which isn't an evil thing.
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typedef uint32_t cycles_t;
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static inline cycles_t get_cycles (void)
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__asm__ __volatile__ ("rpcc %0" : "=r"(ret));
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#elif defined(__s390__)
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typedef uint32_t long cycles_t;
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static inline cycles_t get_cycles(void)
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__asm__("stck 0(%0)" : : "a" (&(cycles)) : "memory", "cc");
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#elif defined(__hppa__)
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#define mfctl(reg) ({ \
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__asm__ __volatile__( \
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"mfctl " #reg ",%0" : \
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typedef uint32_t cycles_t;
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static inline cycles_t get_cycles (void)
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#elif defined(__mips__)
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* Standard way to access the cycle counter.
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* Currently only used on SMP for scheduling.
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* Only the low 32 bits are available as a continuously counting entity.
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* But this only means we'll force a reschedule every 8 seconds or so,
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* which isn't an evil thing.
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* We know that all SMP capable CPUs have cycle counters.
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#define __read_32bit_c0_register(source, sel) \
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__asm__ __volatile__( \
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"mfc0\t%0, " #source "\n\t" \
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__asm__ __volatile__( \
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"mfc0\t%0, " #source ", " #sel "\n\t" \
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/* #define CP0_COUNT $9 */
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#define read_c0_count() __read_32bit_c0_register($9, 0)
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typedef uint32_t cycles_t;
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static inline cycles_t get_cycles (void)
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return read_c0_count();
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#elif defined(__APPLE__)
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#include <CoreAudio/HostTime.h>
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typedef UInt64 cycles_t;
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static inline cycles_t get_cycles (void)
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UInt64 time = AudioGetCurrentHostTime();
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return AudioConvertHostTimeToNanos(time);
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/* debian: sparc, arm, m68k */
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#warning You are compiling libardour on a platform for which ardour/cycles.h needs work
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#include <sys/time.h>
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typedef long cycles_t;
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extern cycles_t cacheflush_time;
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static inline cycles_t get_cycles(void)
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gettimeofday (&tv, NULL);
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#endif /* __ardour_cycles_h__ */