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  • Committer: Bazaar Package Importer
  • Author(s): Kees Cook
  • Date: 2007-02-20 10:33:44 UTC
  • mto: This revision was merged to the branch mainline in revision 16.
  • Revision ID: james.westby@ubuntu.com-20070220103344-zgcu2psnx9d98fpa
Tags: upstream-0.90
Import upstream version 0.90

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libclamav/c++/llvm/include/llvm/IntrinsicsCellSPU.td
1
 
//==- IntrinsicsCellSPU.td - Cell SDK intrinsics           -*- tablegen -*-==//
2
 
// 
3
 
//                     The LLVM Compiler Infrastructure
4
 
//
5
 
// This file is distributed under the University of Illinois Open Source
6
 
// Department at The Aerospace Corporation and is distributed under the
7
 
// License. See LICENSE.TXT for details.
8
 
// 
9
 
//===----------------------------------------------------------------------===//
10
 
// Cell SPU Instructions:
11
 
//===----------------------------------------------------------------------===//
12
 
// TODO Items (not urgent today, but would be nice, low priority)
13
 
//
14
 
// ANDBI, ORBI: SPU constructs a 4-byte constant for these instructions by
15
 
// concatenating the byte argument b as "bbbb". Could recognize this bit pattern
16
 
// in 16-bit and 32-bit constants and reduce instruction count.
17
 
//===----------------------------------------------------------------------===//
18
 
 
19
 
// 7-bit integer type, used as an immediate:
20
 
def cell_i7_ty: LLVMType<i8>;
21
 
def cell_i8_ty: LLVMType<i8>;
22
 
 
23
 
// Keep this here until it's actually supported:
24
 
def llvm_i128_ty : LLVMType<i128>;
25
 
 
26
 
class v16i8_u7imm<string builtin_suffix> :
27
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
28
 
  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, cell_i7_ty],
29
 
            [IntrNoMem]>;
30
 
 
31
 
class v16i8_u8imm<string builtin_suffix> :
32
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
33
 
  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i8_ty],
34
 
            [IntrNoMem]>;
35
 
 
36
 
class v16i8_s10imm<string builtin_suffix> :
37
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
38
 
  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i16_ty],
39
 
            [IntrNoMem]>;
40
 
 
41
 
class v16i8_u16imm<string builtin_suffix> :
42
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
43
 
  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i16_ty],
44
 
            [IntrNoMem]>;
45
 
 
46
 
class v16i8_rr<string builtin_suffix> :
47
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
48
 
  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
49
 
            [IntrNoMem]>;
50
 
 
51
 
class v8i16_s10imm<string builtin_suffix> :
52
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
53
 
  Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i16_ty],
54
 
            [IntrNoMem]>;
55
 
 
56
 
class v8i16_u16imm<string builtin_suffix> :
57
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
58
 
  Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i16_ty],
59
 
            [IntrNoMem]>;
60
 
 
61
 
class v8i16_rr<string builtin_suffix> :
62
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
63
 
  Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
64
 
            [IntrNoMem]>;
65
 
 
66
 
class v4i32_rr<string builtin_suffix> :
67
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
68
 
  Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
69
 
            [IntrNoMem]>;
70
 
 
71
 
class v4i32_u7imm<string builtin_suffix> :
72
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
73
 
  Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, cell_i7_ty],
74
 
            [IntrNoMem]>;
75
 
 
76
 
class v4i32_s10imm<string builtin_suffix> :
77
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
78
 
  Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_i16_ty],
79
 
            [IntrNoMem]>;
80
 
 
81
 
class v4i32_u16imm<string builtin_suffix> :
82
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
83
 
  Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_i16_ty],
84
 
            [IntrNoMem]>;
85
 
 
86
 
class v4f32_rr<string builtin_suffix> :
87
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
88
 
  Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
89
 
            [IntrNoMem]>;
90
 
 
91
 
class v4f32_rrr<string builtin_suffix> :
92
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
93
 
  Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
94
 
            [IntrNoMem]>;
95
 
 
96
 
class v2f64_rr<string builtin_suffix> :
97
 
  GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
98
 
  Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty],
99
 
            [IntrNoMem]>;
100
 
 
101
 
// All Cell SPU intrinsics start with "llvm.spu.".
102
 
let TargetPrefix = "spu" in {
103
 
  def int_spu_si_fsmbi  : v8i16_u16imm<"fsmbi">;
104
 
  def int_spu_si_ah     : v8i16_rr<"ah">;
105
 
  def int_spu_si_ahi    : v8i16_s10imm<"ahi">;
106
 
  def int_spu_si_a      : v4i32_rr<"a">;
107
 
  def int_spu_si_ai     : v4i32_s10imm<"ai">;
108
 
  def int_spu_si_sfh    : v8i16_rr<"sfh">;
109
 
  def int_spu_si_sfhi   : v8i16_s10imm<"sfhi">;
110
 
  def int_spu_si_sf     : v4i32_rr<"sf">;
111
 
  def int_spu_si_sfi    : v4i32_s10imm<"sfi">;
112
 
  def int_spu_si_addx   : v4i32_rr<"addx">;
113
 
  def int_spu_si_cg     : v4i32_rr<"cg">;
114
 
  def int_spu_si_cgx    : v4i32_rr<"cgx">;
115
 
  def int_spu_si_sfx    : v4i32_rr<"sfx">;
116
 
  def int_spu_si_bg     : v4i32_rr<"bg">;
117
 
  def int_spu_si_bgx    : v4i32_rr<"bgx">;
118
 
  def int_spu_si_mpy    : // This is special:
119
 
    GCCBuiltin<"__builtin_si_mpy">,
120
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
121
 
              [IntrNoMem]>;
122
 
  def int_spu_si_mpyu   : // This is special:
123
 
    GCCBuiltin<"__builtin_si_mpyu">,
124
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
125
 
              [IntrNoMem]>;
126
 
  def int_spu_si_mpyi   : // This is special:
127
 
    GCCBuiltin<"__builtin_si_mpyi">,
128
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_i16_ty],
129
 
              [IntrNoMem]>;
130
 
  def int_spu_si_mpyui  : // This is special:
131
 
    GCCBuiltin<"__builtin_si_mpyui">,
132
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_i16_ty],
133
 
              [IntrNoMem]>;
134
 
  def int_spu_si_mpya   : // This is special:
135
 
    GCCBuiltin<"__builtin_si_mpya">,
136
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
137
 
              [IntrNoMem]>;
138
 
  def int_spu_si_mpyh   : // This is special:
139
 
    GCCBuiltin<"__builtin_si_mpyh">,
140
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v8i16_ty],
141
 
              [IntrNoMem]>;
142
 
  def int_spu_si_mpys   : // This is special:
143
 
    GCCBuiltin<"__builtin_si_mpys">,
144
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
145
 
              [IntrNoMem]>;
146
 
  def int_spu_si_mpyhh  : // This is special:
147
 
    GCCBuiltin<"__builtin_si_mpyhh">,
148
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
149
 
              [IntrNoMem]>;
150
 
  def int_spu_si_mpyhha : // This is special:
151
 
    GCCBuiltin<"__builtin_si_mpyhha">,
152
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
153
 
              [IntrNoMem]>;
154
 
  def int_spu_si_mpyhhu : // This is special:
155
 
    GCCBuiltin<"__builtin_si_mpyhhu">,
156
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
157
 
              [IntrNoMem]>;
158
 
  def int_spu_si_mpyhhau : // This is special:
159
 
    GCCBuiltin<"__builtin_si_mpyhhau">,
160
 
    Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
161
 
              [IntrNoMem]>;
162
 
 
163
 
  def int_spu_si_shli:          v4i32_u7imm<"shli">;
164
 
 
165
 
  def int_spu_si_shlqbi:
166
 
    GCCBuiltin<!strconcat("__builtin_si_", "shlqbi")>,
167
 
    Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i32_ty],
168
 
              [IntrNoMem]>;
169
 
 
170
 
  def int_spu_si_shlqbii:       v16i8_u7imm<"shlqbii">;
171
 
  def int_spu_si_shlqby:
172
 
    GCCBuiltin<!strconcat("__builtin_si_", "shlqby")>,
173
 
    Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i32_ty],
174
 
              [IntrNoMem]>;
175
 
  def int_spu_si_shlqbyi:       v16i8_u7imm<"shlqbyi">;
176
 
  
177
 
  def int_spu_si_ceq:           v4i32_rr<"ceq">;
178
 
  def int_spu_si_ceqi:          v4i32_s10imm<"ceqi">;
179
 
  def int_spu_si_ceqb:          v16i8_rr<"ceqb">;
180
 
  def int_spu_si_ceqbi:         v16i8_u8imm<"ceqbi">;
181
 
  def int_spu_si_ceqh:          v8i16_rr<"ceqh">;
182
 
  def int_spu_si_ceqhi:         v8i16_s10imm<"ceqhi">;
183
 
  def int_spu_si_cgt:           v4i32_rr<"cgt">;
184
 
  def int_spu_si_cgti:          v4i32_s10imm<"cgti">;
185
 
  def int_spu_si_cgtb:          v16i8_rr<"cgtb">;
186
 
  def int_spu_si_cgtbi:         v16i8_u8imm<"cgtbi">;
187
 
  def int_spu_si_cgth:          v8i16_rr<"cgth">;
188
 
  def int_spu_si_cgthi:         v8i16_s10imm<"cgthi">;
189
 
  def int_spu_si_clgtb:         v16i8_rr<"clgtb">;
190
 
  def int_spu_si_clgtbi:        v16i8_u8imm<"clgtbi">;
191
 
  def int_spu_si_clgth:         v8i16_rr<"clgth">;
192
 
  def int_spu_si_clgthi:        v8i16_s10imm<"clgthi">;
193
 
  def int_spu_si_clgt:          v4i32_rr<"clgt">;
194
 
  def int_spu_si_clgti:         v4i32_s10imm<"clgti">;
195
 
  
196
 
  def int_spu_si_and:           v4i32_rr<"and">;
197
 
  def int_spu_si_andbi:         v16i8_u8imm<"andbi">;
198
 
  def int_spu_si_andc:          v4i32_rr<"andc">;
199
 
  def int_spu_si_andhi:         v8i16_s10imm<"andhi">;
200
 
  def int_spu_si_andi:          v4i32_s10imm<"andi">;
201
 
  
202
 
  def int_spu_si_or:            v4i32_rr<"or">;
203
 
  def int_spu_si_orbi:          v16i8_u8imm<"orbi">;
204
 
  def int_spu_si_orc:           v4i32_rr<"orc">;
205
 
  def int_spu_si_orhi:          v8i16_s10imm<"orhi">;
206
 
  def int_spu_si_ori:           v4i32_s10imm<"ori">;
207
 
  
208
 
  def int_spu_si_xor:           v4i32_rr<"xor">;
209
 
  def int_spu_si_xorbi:         v16i8_u8imm<"xorbi">;
210
 
  def int_spu_si_xorhi:         v8i16_s10imm<"xorhi">;
211
 
  def int_spu_si_xori:          v4i32_s10imm<"xori">;
212
 
 
213
 
  def int_spu_si_nor:           v4i32_rr<"nor">;
214
 
  def int_spu_si_nand:          v4i32_rr<"nand">;
215
 
  
216
 
  def int_spu_si_fa:            v4f32_rr<"fa">;
217
 
  def int_spu_si_fs:            v4f32_rr<"fs">;
218
 
  def int_spu_si_fm:            v4f32_rr<"fm">;
219
 
  
220
 
  def int_spu_si_fceq:          v4f32_rr<"fceq">;
221
 
  def int_spu_si_fcmeq:         v4f32_rr<"fcmeq">;
222
 
  def int_spu_si_fcgt:          v4f32_rr<"fcgt">;
223
 
  def int_spu_si_fcmgt:         v4f32_rr<"fcmgt">;
224
 
  
225
 
  def int_spu_si_fma:           v4f32_rrr<"fma">;
226
 
  def int_spu_si_fnms:          v4f32_rrr<"fnms">;
227
 
  def int_spu_si_fms:           v4f32_rrr<"fms">;
228
 
 
229
 
  def int_spu_si_dfa:           v2f64_rr<"dfa">;
230
 
  def int_spu_si_dfs:           v2f64_rr<"dfs">;
231
 
  def int_spu_si_dfm:           v2f64_rr<"dfm">;
232
 
  
233
 
//def int_spu_si_dfceq:         v2f64_rr<"dfceq">;
234
 
//def int_spu_si_dfcmeq:        v2f64_rr<"dfcmeq">;
235
 
//def int_spu_si_dfcgt:         v2f64_rr<"dfcgt">;
236
 
//def int_spu_si_dfcmgt:        v2f64_rr<"dfcmgt">;
237
 
  
238
 
  def int_spu_si_dfnma:         v2f64_rr<"dfnma">;
239
 
  def int_spu_si_dfma:          v2f64_rr<"dfma">;
240
 
  def int_spu_si_dfnms:         v2f64_rr<"dfnms">;
241
 
  def int_spu_si_dfms:          v2f64_rr<"dfms">;
242
 
}