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Viewing changes to hw/i8259.c

Tags: upstream-0.9.0+20070816
Import upstream version 0.9.0+20070816

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hw/i8259.c
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    uint8_t rotate_on_auto_eoi;
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    uint8_t special_fully_nested_mode;
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    uint8_t init4; /* true if 4 byte init */
 
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    uint8_t single_mode; /* true if slave pic is not initialized */
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    uint8_t elcr; /* PIIX edge/trigger selection*/
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    uint8_t elcr_mask;
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    PicState2 *pics_state;
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    /* 0 is master pic, 1 is slave pic */
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    /* XXX: better separation between the two pics */
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    PicState pics[2];
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    IRQRequestFunc *irq_request;
 
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    qemu_irq parent_irq;
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    void *irq_request_opaque;
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    /* IOAPIC callback support */
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    SetIRQFunc *alt_irq_func;
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        }
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        printf("pic: cpu_interrupt\n");
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#endif
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        s->irq_request(s->irq_request_opaque, 1);
 
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        qemu_irq_raise(s->parent_irq);
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    }
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/* all targets should do this rather than acking the IRQ in the cpu */
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#if defined(TARGET_MIPS)
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    else {
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        s->irq_request(s->irq_request_opaque, 0);
 
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        qemu_irq_lower(s->parent_irq);
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    }
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#endif
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}
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int64_t irq_time[16];
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#endif
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void pic_set_irq_new(void *opaque, int irq, int level)
 
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void i8259_set_irq(void *opaque, int irq, int level)
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{
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    PicState2 *s = opaque;
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#if defined(DEBUG_PIC) || defined(DEBUG_IRQ_COUNT)
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    if (level != irq_level[irq]) {
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#if defined(DEBUG_PIC)
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        printf("pic_set_irq: irq=%d level=%d\n", irq, level);
 
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        printf("i8259_set_irq: irq=%d level=%d\n", irq, level);
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#endif
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        irq_level[irq] = level;
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#ifdef DEBUG_IRQ_COUNT
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    pic_update_irq(s);
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}
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/* obsolete function */
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void pic_set_irq(int irq, int level)
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{
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    pic_set_irq_new(isa_pic, irq, level);
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}
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/* acknowledge interrupt 'irq' */
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static inline void pic_intack(PicState *s, int irq)
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{
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    s->rotate_on_auto_eoi = 0;
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    s->special_fully_nested_mode = 0;
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    s->init4 = 0;
 
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    s->single_mode = 0;
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    /* Note: ELCR is not reset */
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}
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            /* init */
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            pic_reset(s);
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            /* deassert a pending interrupt */
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            s->pics_state->irq_request(s->pics_state->irq_request_opaque, 0);
 
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            qemu_irq_lower(s->pics_state->parent_irq);
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            s->init_state = 1;
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            s->init4 = val & 1;
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            if (val & 0x02)
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                hw_error("single mode not supported");
 
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            s->single_mode = val & 2;
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            if (val & 0x08)
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                hw_error("level sensitive irq not supported");
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        } else if (val & 0x08) {
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            break;
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        case 1:
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            s->irq_base = val & 0xf8;
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            s->init_state = 2;
 
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            s->init_state = s->single_mode ? (s->init4 ? 3 : 0) : 2;
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            break;
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        case 2:
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            if (s->init4) {
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    qemu_put_8s(f, &s->rotate_on_auto_eoi);
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    qemu_put_8s(f, &s->special_fully_nested_mode);
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    qemu_put_8s(f, &s->init4);
 
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    qemu_put_8s(f, &s->single_mode);
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    qemu_put_8s(f, &s->elcr);
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}
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    qemu_get_8s(f, &s->rotate_on_auto_eoi);
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    qemu_get_8s(f, &s->special_fully_nested_mode);
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    qemu_get_8s(f, &s->init4);
 
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    qemu_get_8s(f, &s->single_mode);
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    qemu_get_8s(f, &s->elcr);
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    return 0;
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}
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#endif
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}
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PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque)
 
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qemu_irq *i8259_init(qemu_irq parent_irq)
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{
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    PicState2 *s;
 
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    s = qemu_mallocz(sizeof(PicState2));
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    if (!s)
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        return NULL;
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    pic_init1(0xa0, 0x4d1, &s->pics[1]);
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    s->pics[0].elcr_mask = 0xf8;
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    s->pics[1].elcr_mask = 0xde;
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    s->irq_request = irq_request;
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    s->irq_request_opaque = irq_request_opaque;
 
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    s->parent_irq = parent_irq;
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    s->pics[0].pics_state = s;
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    s->pics[1].pics_state = s;
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    return s;
 
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    isa_pic = s;
 
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    return qemu_allocate_irqs(i8259_set_irq, s, 16);
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}
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void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,