319
/* Load/store ops. */
322
uint32_t addr = get_op(PARAM2);
323
set_op(PARAM1, ldub(addr));
329
uint32_t addr = get_op(PARAM2);
330
set_op(PARAM1, ldsb(addr));
336
uint32_t addr = get_op(PARAM2);
337
set_op(PARAM1, lduw(addr));
343
uint32_t addr = get_op(PARAM2);
344
set_op(PARAM1, ldsw(addr));
350
uint32_t addr = get_op(PARAM2);
351
set_op(PARAM1, ldl(addr));
357
uint32_t addr = get_op(PARAM1);
358
stb(addr, get_op(PARAM2));
364
uint32_t addr = get_op(PARAM1);
365
stw(addr, get_op(PARAM2));
371
uint32_t addr = get_op(PARAM1);
372
stl(addr, get_op(PARAM2));
378
uint32_t addr = get_op(PARAM2);
379
set_opf64(PARAM1, ldfq(addr));
385
uint32_t addr = get_op(PARAM1);
386
stfq(addr, get_opf64(PARAM2));
393
if (cc_op == CC_OP_DYNAMIC)
395
cpu_m68k_flush_flags(env, cc_op);
341
cpu_m68k_flush_flags(env, env->cc_op);
679
647
set_op(PARAM1, float64_compare_quiet(op0, op1, &CPU_FP_STATUS));
653
int op1 = get_op(PARAM1);
654
uint32_t op2 = get_op(PARAM2);
655
helper_movec(env, op1, op2);
660
#define MEMSUFFIX _raw
663
#if !defined(CONFIG_USER_ONLY)
664
#define MEMSUFFIX _user
666
#define MEMSUFFIX _kernel
671
/* TODO: The MAC instructions use 64-bit arithmetic fairly extensively.
672
This results in fairly large ops (and sometimes other issues) on 32-bit
673
hosts. Maybe move most of them into helpers. */
676
uint32_t op1 = get_op(PARAM1);
677
uint32_t op2 = get_op(PARAM2);
681
product = (uint64_t)op1 * op2;
682
res = (product << 24) >> 24;
683
if (res != product) {
684
env->macsr |= MACSR_V;
685
if (env->macsr & MACSR_OMC) {
686
/* Make sure the accumulate operation overflows. */
699
uint32_t op1 = get_op(PARAM1);
700
uint32_t op2 = get_op(PARAM2);
703
product = (uint64_t)op1 * op2;
704
if (product & (0xffffffull << 40)) {
705
env->macsr |= MACSR_V;
706
if (env->macsr & MACSR_OMC) {
707
/* Make sure the accumulate operation overflows. */
710
product &= ((1ull << 40) - 1);
713
env->mactmp = product;
719
int32_t op1 = get_op(PARAM1);
720
int32_t op2 = get_op(PARAM2);
724
product = (uint64_t)op1 * op2;
725
if (env->macsr & MACSR_RT) {
726
remainder = product & 0xffffff;
728
if (remainder > 0x800000)
730
else if (remainder == 0x800000)
731
product += (product & 1);
735
env->mactmp = product;
752
env->macc[acc] += env->mactmp;
759
env->macc[acc] -= env->mactmp;
769
sum = env->macc[acc];
770
result = (sum << 16) >> 16;
772
env->macsr |= MACSR_V;
774
if (env->macsr & MACSR_V) {
775
env->macsr |= MACSR_PAV0 << acc;
776
if (env->macsr & MACSR_OMC) {
777
/* The result is saturated to 32 bits, despite overflow occuring
778
at 48 bits. Seems weird, but that's what the hardware docs
780
result = (result >> 63) ^ 0x7fffffff;
783
env->macc[acc] = result;
792
sum = env->macc[acc];
793
if (sum & (0xffffull << 48)) {
794
env->macsr |= MACSR_V;
796
if (env->macsr & MACSR_V) {
797
env->macsr |= MACSR_PAV0 << acc;
798
if (env->macsr & MACSR_OMC) {
799
if (sum > (1ull << 53))
802
sum = (1ull << 48) - 1;
804
sum &= ((1ull << 48) - 1);
816
sum = env->macc[acc];
817
result = (sum << 16) >> 16;
819
env->macsr |= MACSR_V;
821
if (env->macsr & MACSR_V) {
822
env->macsr |= MACSR_PAV0 << acc;
823
if (env->macsr & MACSR_OMC) {
824
result = (result >> 63) ^ 0x7fffffffffffll;
827
env->macc[acc] = result;
833
env->macsr &= ~(MACSR_V | MACSR_Z | MACSR_N | MACSR_EV);
840
val = env->macc[acc];
842
env->macsr |= MACSR_Z;
843
else if (val & (1ull << 47));
844
env->macsr |= MACSR_N;
845
if (env->macsr & (MACSR_PAV0 << acc)) {
846
env->macsr |= MACSR_V;
848
if (env->macsr & MACSR_FI) {
849
val = ((int64_t)val) >> 40;
850
if (val != 0 && val != -1)
851
env->macsr |= MACSR_EV;
852
} else if (env->macsr & MACSR_SU) {
853
val = ((int64_t)val) >> 32;
854
if (val != 0 && val != -1)
855
env->macsr |= MACSR_EV;
857
if ((val >> 32) != 0)
858
env->macsr |= MACSR_EV;
870
val = env->macc[acc];
871
if (env->macsr & MACSR_SU) {
872
/* 16-bit rounding. */
873
rem = val & 0xffffff;
874
val = (val >> 24) & 0xffffu;
877
else if (rem == 0x800000)
879
} else if (env->macsr & MACSR_RT) {
880
/* 32-bit rounding. */
885
else if (rem == 0x80)
891
if (env->macsr & MACSR_OMC) {
893
if (env->macsr & MACSR_SU) {
894
if (val != (uint16_t) val) {
895
result = ((val >> 63) ^ 0x7fff) & 0xffff;
897
result = val & 0xffff;
900
if (val != (uint32_t)val) {
901
result = ((uint32_t)(val >> 63) & 0x7fffffff);
903
result = (uint32_t)val;
908
if (env->macsr & MACSR_SU) {
909
result = val & 0xffff;
911
result = (uint32_t)val;
914
set_op(PARAM1, result);
921
set_op(PARAM1, (uint32_t)env->macc[acc]);
928
int64_t val = env->macc[acc];
930
if (val == (int32_t)val) {
931
result = (int32_t)val;
933
result = (val >> 61) ^ 0x7fffffff;
935
set_op(PARAM1, result);
942
uint64_t val = env->macc[acc];
944
if ((val >> 32) == 0) {
945
result = (uint32_t)val;
947
result = 0xffffffffu;
949
set_op(PARAM1, result);
958
env->macsr &= ~(MACSR_PAV0 << acc);
967
env->macc[dest] = env->macc[src];
968
mask = MACSR_PAV0 << dest;
969
if (env->macsr & (MACSR_PAV0 << src))
980
val = env->macc[acc] & 0x00ff;
981
val = (env->macc[acc] >> 32) & 0xff00;
982
val |= (env->macc[acc + 1] << 16) & 0x00ff0000;
983
val |= (env->macc[acc + 1] >> 16) & 0xff000000;
992
val = (env->macc[acc] >> 32) & 0xffff;
993
val |= (env->macc[acc + 1] >> 16) & 0xffff0000;
1001
int32_t val = get_op(PARAM1);
1002
env->macc[acc] = ((int64_t)val) << 8;
1003
env->macsr &= ~(MACSR_PAV0 << acc);
1010
int32_t val = get_op(PARAM1);
1011
env->macc[acc] = val;
1012
env->macsr &= ~(MACSR_PAV0 << acc);
1019
uint32_t val = get_op(PARAM1);
1020
env->macc[acc] = val;
1021
env->macsr &= ~(MACSR_PAV0 << acc);
1028
int32_t val = get_op(PARAM1);
1031
res = env->macc[acc] & 0xffffffff00ull;
1032
tmp = (int16_t)(val & 0xff00);
1033
res |= ((int64_t)tmp) << 32;
1035
env->macc[acc] = res;
1036
res = env->macc[acc + 1] & 0xffffffff00ull;
1037
tmp = (val & 0xff000000);
1038
res |= ((int64_t)tmp) << 16;
1039
res |= (val >> 16) & 0xff;
1040
env->macc[acc + 1] = res;
1046
int32_t val = get_op(PARAM1);
1049
res = (uint32_t)env->macc[acc];
1051
res |= ((int64_t)tmp) << 32;
1052
env->macc[acc] = res;
1053
res = (uint32_t)env->macc[acc + 1];
1054
tmp = val & 0xffff0000;
1055
res |= (int64_t)tmp << 16;
1056
env->macc[acc + 1] = res;
1062
int32_t val = get_op(PARAM1);
1064
res = (uint32_t)env->macc[acc];
1065
res |= ((uint64_t)(val & 0xffff)) << 32;
1066
env->macc[acc] = res;
1067
res = (uint32_t)env->macc[acc + 1];
1068
res |= (uint64_t)(val & 0xffff0000) << 16;
1069
env->macc[acc + 1] = res;
1074
m68k_set_macsr(env, get_op(PARAM1));