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Tags: upstream-0.9.0+20070816
Import upstream version 0.9.0+20070816

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hw/vga.c
23
23
 */
24
24
#include "vl.h"
25
25
#include "vga_int.h"
 
26
#include "pixel_ops.h"
26
27
 
27
28
//#define DEBUG_VGA
28
29
//#define DEBUG_VGA_MEM
346
347
        case 0x09:
347
348
        case 0x0c:
348
349
        case 0x0d:
349
 
        case 0x12: /* veritcal display end */
 
350
        case 0x12: /* vertical display end */
350
351
            s->cr[s->cr_index] = val;
351
352
            break;
352
353
        default:
812
813
typedef void vga_draw_line_func(VGAState *s1, uint8_t *d, 
813
814
                                const uint8_t *s, int width);
814
815
 
815
 
static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b)
816
 
{
817
 
    return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6);
818
 
}
819
 
 
820
 
static inline unsigned int rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b)
821
 
{
822
 
    return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3);
823
 
}
824
 
 
825
 
static inline unsigned int rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b)
826
 
{
827
 
    return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
828
 
}
829
 
 
830
 
static inline unsigned int rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
831
 
{
832
 
    return (r << 16) | (g << 8) | b;
833
 
}
834
 
 
835
 
static inline unsigned int rgb_to_pixel32bgr(unsigned int r, unsigned int g, unsigned b)
836
 
{
837
 
    return (b << 16) | (g << 8) | r;
838
 
}
839
 
 
840
816
#define DEPTH 8
841
817
#include "vga_template.h"
842
818
 
843
819
#define DEPTH 15
844
820
#include "vga_template.h"
845
821
 
 
822
#define BGR_FORMAT
 
823
#define DEPTH 15
 
824
#include "vga_template.h"
 
825
 
 
826
#define DEPTH 16
 
827
#include "vga_template.h"
 
828
 
 
829
#define BGR_FORMAT
846
830
#define DEPTH 16
847
831
#include "vga_template.h"
848
832
 
870
854
    return col;
871
855
}
872
856
 
 
857
static unsigned int rgb_to_pixel15bgr_dup(unsigned int r, unsigned int g,
 
858
                                          unsigned int b)
 
859
{
 
860
    unsigned int col;
 
861
    col = rgb_to_pixel15bgr(r, g, b);
 
862
    col |= col << 16;
 
863
    return col;
 
864
}
 
865
 
873
866
static unsigned int rgb_to_pixel16_dup(unsigned int r, unsigned int g, unsigned b)
874
867
{
875
868
    unsigned int col;
878
871
    return col;
879
872
}
880
873
 
 
874
static unsigned int rgb_to_pixel16bgr_dup(unsigned int r, unsigned int g,
 
875
                                          unsigned int b)
 
876
{
 
877
    unsigned int col;
 
878
    col = rgb_to_pixel16bgr(r, g, b);
 
879
    col |= col << 16;
 
880
    return col;
 
881
}
 
882
 
881
883
static unsigned int rgb_to_pixel32_dup(unsigned int r, unsigned int g, unsigned b)
882
884
{
883
885
    unsigned int col;
998
1000
    return full_update;
999
1001
}
1000
1002
 
1001
 
#define NB_DEPTHS 5
 
1003
#define NB_DEPTHS 7
1002
1004
 
1003
1005
static inline int get_depth_index(DisplayState *s)
1004
1006
{
1007
1009
    case 8:
1008
1010
        return 0;
1009
1011
    case 15:
1010
 
        return 1;
 
1012
        if (s->bgr)
 
1013
            return 5;
 
1014
        else
 
1015
            return 1;
1011
1016
    case 16:
1012
 
        return 2;
 
1017
        if (s->bgr)
 
1018
            return 6;
 
1019
        else
 
1020
            return 2;
1013
1021
    case 32:
1014
1022
        if (s->bgr)
1015
1023
            return 4;
1024
1032
    vga_draw_glyph8_16,
1025
1033
    vga_draw_glyph8_32,
1026
1034
    vga_draw_glyph8_32,
 
1035
    vga_draw_glyph8_16,
 
1036
    vga_draw_glyph8_16,
1027
1037
};
1028
1038
 
1029
1039
static vga_draw_glyph8_func *vga_draw_glyph16_table[NB_DEPTHS] = {
1032
1042
    vga_draw_glyph16_16,
1033
1043
    vga_draw_glyph16_32,
1034
1044
    vga_draw_glyph16_32,
 
1045
    vga_draw_glyph16_16,
 
1046
    vga_draw_glyph16_16,
1035
1047
};
1036
1048
 
1037
1049
static vga_draw_glyph9_func *vga_draw_glyph9_table[NB_DEPTHS] = {
1040
1052
    vga_draw_glyph9_16,
1041
1053
    vga_draw_glyph9_32,
1042
1054
    vga_draw_glyph9_32,
 
1055
    vga_draw_glyph9_16,
 
1056
    vga_draw_glyph9_16,
1043
1057
};
1044
1058
    
1045
1059
static const uint8_t cursor_glyph[32 * 4] = {
1260
1274
    vga_draw_line2_16,
1261
1275
    vga_draw_line2_32,
1262
1276
    vga_draw_line2_32,
 
1277
    vga_draw_line2_16,
 
1278
    vga_draw_line2_16,
1263
1279
 
1264
1280
    vga_draw_line2d2_8,
1265
1281
    vga_draw_line2d2_16,
1266
1282
    vga_draw_line2d2_16,
1267
1283
    vga_draw_line2d2_32,
1268
1284
    vga_draw_line2d2_32,
 
1285
    vga_draw_line2d2_16,
 
1286
    vga_draw_line2d2_16,
1269
1287
 
1270
1288
    vga_draw_line4_8,
1271
1289
    vga_draw_line4_16,
1272
1290
    vga_draw_line4_16,
1273
1291
    vga_draw_line4_32,
1274
1292
    vga_draw_line4_32,
 
1293
    vga_draw_line4_16,
 
1294
    vga_draw_line4_16,
1275
1295
 
1276
1296
    vga_draw_line4d2_8,
1277
1297
    vga_draw_line4d2_16,
1278
1298
    vga_draw_line4d2_16,
1279
1299
    vga_draw_line4d2_32,
1280
1300
    vga_draw_line4d2_32,
 
1301
    vga_draw_line4d2_16,
 
1302
    vga_draw_line4d2_16,
1281
1303
 
1282
1304
    vga_draw_line8d2_8,
1283
1305
    vga_draw_line8d2_16,
1284
1306
    vga_draw_line8d2_16,
1285
1307
    vga_draw_line8d2_32,
1286
1308
    vga_draw_line8d2_32,
 
1309
    vga_draw_line8d2_16,
 
1310
    vga_draw_line8d2_16,
1287
1311
 
1288
1312
    vga_draw_line8_8,
1289
1313
    vga_draw_line8_16,
1290
1314
    vga_draw_line8_16,
1291
1315
    vga_draw_line8_32,
1292
1316
    vga_draw_line8_32,
 
1317
    vga_draw_line8_16,
 
1318
    vga_draw_line8_16,
1293
1319
 
1294
1320
    vga_draw_line15_8,
1295
1321
    vga_draw_line15_15,
1296
1322
    vga_draw_line15_16,
1297
1323
    vga_draw_line15_32,
1298
1324
    vga_draw_line15_32bgr,
 
1325
    vga_draw_line15_15bgr,
 
1326
    vga_draw_line15_16bgr,
1299
1327
 
1300
1328
    vga_draw_line16_8,
1301
1329
    vga_draw_line16_15,
1302
1330
    vga_draw_line16_16,
1303
1331
    vga_draw_line16_32,
1304
1332
    vga_draw_line16_32bgr,
 
1333
    vga_draw_line16_15bgr,
 
1334
    vga_draw_line16_16bgr,
1305
1335
 
1306
1336
    vga_draw_line24_8,
1307
1337
    vga_draw_line24_15,
1308
1338
    vga_draw_line24_16,
1309
1339
    vga_draw_line24_32,
1310
1340
    vga_draw_line24_32bgr,
 
1341
    vga_draw_line24_15bgr,
 
1342
    vga_draw_line24_16bgr,
1311
1343
 
1312
1344
    vga_draw_line32_8,
1313
1345
    vga_draw_line32_15,
1314
1346
    vga_draw_line32_16,
1315
1347
    vga_draw_line32_32,
1316
1348
    vga_draw_line32_32bgr,
 
1349
    vga_draw_line32_15bgr,
 
1350
    vga_draw_line32_16bgr,
1317
1351
};
1318
1352
 
1319
1353
typedef unsigned int rgb_to_pixel_dup_func(unsigned int r, unsigned int g, unsigned b);
1324
1358
    rgb_to_pixel16_dup,
1325
1359
    rgb_to_pixel32_dup,
1326
1360
    rgb_to_pixel32bgr_dup,
 
1361
    rgb_to_pixel15bgr_dup,
 
1362
    rgb_to_pixel16bgr_dup,
1327
1363
};
1328
1364
 
1329
1365
static int vga_get_bpp(VGAState *s)
1788
1824
    s->get_bpp = vga_get_bpp;
1789
1825
    s->get_offsets = vga_get_offsets;
1790
1826
    s->get_resolution = vga_get_resolution;
1791
 
    graphic_console_init(s->ds, vga_update_display, vga_invalidate_display,
1792
 
                         vga_screen_dump, s);
 
1827
    s->update = vga_update_display;
 
1828
    s->invalidate = vga_invalidate_display;
 
1829
    s->screen_dump = vga_screen_dump;
1793
1830
}
1794
1831
 
1795
1832
/* used by both ISA and PCI */
1796
 
static void vga_init(VGAState *s)
 
1833
void vga_init(VGAState *s)
1797
1834
{
1798
1835
    int vga_io_memory;
1799
1836
 
1844
1881
                                 vga_io_memory);
1845
1882
}
1846
1883
 
 
1884
/* Memory mapped interface */
 
1885
static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr)
 
1886
{
 
1887
    VGAState *s = opaque;
 
1888
 
 
1889
    return vga_ioport_read(s, (addr - s->base_ctrl) >> s->it_shift) & 0xff;
 
1890
}
 
1891
 
 
1892
static void vga_mm_writeb (void *opaque,
 
1893
                           target_phys_addr_t addr, uint32_t value)
 
1894
{
 
1895
    VGAState *s = opaque;
 
1896
 
 
1897
    vga_ioport_write(s, (addr - s->base_ctrl) >> s->it_shift, value & 0xff);
 
1898
}
 
1899
 
 
1900
static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr)
 
1901
{
 
1902
    VGAState *s = opaque;
 
1903
 
 
1904
    return vga_ioport_read(s, (addr - s->base_ctrl) >> s->it_shift) & 0xffff;
 
1905
}
 
1906
 
 
1907
static void vga_mm_writew (void *opaque,
 
1908
                           target_phys_addr_t addr, uint32_t value)
 
1909
{
 
1910
    VGAState *s = opaque;
 
1911
 
 
1912
    vga_ioport_write(s, (addr - s->base_ctrl) >> s->it_shift, value & 0xffff);
 
1913
}
 
1914
 
 
1915
static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr)
 
1916
{
 
1917
    VGAState *s = opaque;
 
1918
 
 
1919
    return vga_ioport_read(s, (addr - s->base_ctrl) >> s->it_shift);
 
1920
}
 
1921
 
 
1922
static void vga_mm_writel (void *opaque,
 
1923
                           target_phys_addr_t addr, uint32_t value)
 
1924
{
 
1925
    VGAState *s = opaque;
 
1926
 
 
1927
    vga_ioport_write(s, (addr - s->base_ctrl) >> s->it_shift, value);
 
1928
}
 
1929
 
 
1930
static CPUReadMemoryFunc *vga_mm_read_ctrl[] = {
 
1931
    &vga_mm_readb,
 
1932
    &vga_mm_readw,
 
1933
    &vga_mm_readl,
 
1934
};
 
1935
 
 
1936
static CPUWriteMemoryFunc *vga_mm_write_ctrl[] = {
 
1937
    &vga_mm_writeb,
 
1938
    &vga_mm_writew,
 
1939
    &vga_mm_writel,
 
1940
};
 
1941
 
 
1942
static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base,
 
1943
                        target_phys_addr_t ctrl_base, int it_shift)
 
1944
{
 
1945
    int s_ioport_ctrl, vga_io_memory;
 
1946
 
 
1947
    s->base_ctrl = ctrl_base;
 
1948
    s->it_shift = it_shift;
 
1949
    s_ioport_ctrl = cpu_register_io_memory(0, vga_mm_read_ctrl, vga_mm_write_ctrl, s);
 
1950
    vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write, s);
 
1951
 
 
1952
    register_savevm("vga", 0, 2, vga_save, vga_load, s);
 
1953
 
 
1954
    cpu_register_physical_memory(ctrl_base, 0x100000, s_ioport_ctrl);
 
1955
    s->bank_offset = 0;
 
1956
    cpu_register_physical_memory(vram_base + 0x000a0000, 0x20000, vga_io_memory);
 
1957
}
 
1958
 
1847
1959
int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 
1848
1960
                 unsigned long vga_ram_offset, int vga_ram_size)
1849
1961
{
1856
1968
    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
1857
1969
    vga_init(s);
1858
1970
 
 
1971
    graphic_console_init(s->ds, s->update, s->invalidate, s->screen_dump, s);
 
1972
 
1859
1973
#ifdef CONFIG_BOCHS_VBE
1860
1974
    /* XXX: use optimized standard vga accesses */
1861
1975
    cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, 
1864
1978
    return 0;
1865
1979
}
1866
1980
 
 
1981
int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
 
1982
                    unsigned long vga_ram_offset, int vga_ram_size,
 
1983
                    target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
 
1984
                    int it_shift)
 
1985
{
 
1986
    VGAState *s;
 
1987
 
 
1988
    s = qemu_mallocz(sizeof(VGAState));
 
1989
    if (!s)
 
1990
        return -1;
 
1991
 
 
1992
    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
 
1993
    vga_mm_init(s, vram_base, ctrl_base, it_shift);
 
1994
 
 
1995
    graphic_console_init(s->ds, s->update, s->invalidate, s->screen_dump, s);
 
1996
 
 
1997
#ifdef CONFIG_BOCHS_VBE
 
1998
    /* XXX: use optimized standard vga accesses */
 
1999
    cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
 
2000
                                 vga_ram_size, vga_ram_offset);
 
2001
#endif
 
2002
    return 0;
 
2003
}
 
2004
 
1867
2005
int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 
1868
2006
                 unsigned long vga_ram_offset, int vga_ram_size,
1869
2007
                 unsigned long vga_bios_offset, int vga_bios_size)
1881
2019
    
1882
2020
    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
1883
2021
    vga_init(s);
 
2022
 
 
2023
    graphic_console_init(s->ds, s->update, s->invalidate, s->screen_dump, s);
 
2024
 
1884
2025
    s->pci_dev = &d->dev;
1885
2026
    
1886
2027
    pci_conf = d->dev.config;
1931
2072
{
1932
2073
}
1933
2074
 
1934
 
static int ppm_save(const char *filename, uint8_t *data, 
1935
 
                    int w, int h, int linesize)
 
2075
int ppm_save(const char *filename, uint8_t *data, 
 
2076
             int w, int h, int linesize)
1936
2077
{
1937
2078
    FILE *f;
1938
2079
    uint8_t *d, *d1;