1
/*****************************************************************************
4
* Portable MCS-51 Family Emulator
7
* 8051 Product Line (8031,8051,8751)
8
* 8052 Product Line (8032,8052,8752)
9
* 8054 Product Line (8054)
10
* 8058 Product Line (8058)
12
* Copyright Steve Ellenoff, all rights reserved.
14
* - This source code is released as freeware for non-commercial purposes.
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* - You are free to use and redistribute this code in modified or
16
* unmodified form, provided you list me in the credits.
17
* - If you modify this source code, you must add a notice to each modified
18
* source file that it has been changed. If you're a nice person, you
19
* will clearly mark each change too. :)
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* - If you wish to use this for commercial purposes, please contact me at
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* sellenoff@hotmail.com
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* - The author of this copywritten work reserves the right to change the
23
* terms of its usage and license at any time, including retroactively
24
* - This entire notice must remain in the source code.
26
* This work is based on:
27
* #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
28
* #2) 8051 simulator by Travis Marlatte
29
* #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
31
*****************************************************************************
32
* Symbol Memory Name Tables borrowed from:
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* D52 8052 Disassembler - Copyright Jeffery L. Post
34
*****************************************************************************/
45
FEATURE_I80C52 = 0x04,
46
FEATURE_DS5002FP = 0x08,
47
FEATURE_I83C751 = 0x08,
51
#define SHOW_MEMORY_NAMES 1
53
#ifdef SHOW_MEMORY_NAMES
55
/*Display the memory address names for data & bit address access*/
63
} mem_name_feature[] =
65
{ FEATURE_NONE, 0x00, "rb0r0" },
66
{ FEATURE_NONE, 0x01, "rb0r1" },
67
{ FEATURE_NONE, 0x02, "rb0r2" },
68
{ FEATURE_NONE, 0x03, "rb0r3" },
69
{ FEATURE_NONE, 0x04, "rb0r4" },
70
{ FEATURE_NONE, 0x05, "rb0r5" },
71
{ FEATURE_NONE, 0x06, "rb0r6" },
72
{ FEATURE_NONE, 0x07, "rb0r7" },
73
{ FEATURE_NONE, 0x08, "rb1r0" },
74
{ FEATURE_NONE, 0x09, "rb1r1" },
75
{ FEATURE_NONE, 0x0a, "rb1r2" },
76
{ FEATURE_NONE, 0x0b, "rb1r3" },
77
{ FEATURE_NONE, 0x0c, "rb1r4" },
78
{ FEATURE_NONE, 0x0d, "rb1r5" },
79
{ FEATURE_NONE, 0x0e, "rb1r6" },
80
{ FEATURE_NONE, 0x0f, "rb1r7" },
81
{ FEATURE_NONE, 0x10, "rb2r0" },
82
{ FEATURE_NONE, 0x11, "rb2r1" },
83
{ FEATURE_NONE, 0x12, "rb2r2" },
84
{ FEATURE_NONE, 0x13, "rb2r3" },
85
{ FEATURE_NONE, 0x14, "rb2r4" },
86
{ FEATURE_NONE, 0x15, "rb2r5" },
87
{ FEATURE_NONE, 0x16, "rb2r6" },
88
{ FEATURE_NONE, 0x17, "rb2r7" },
89
{ FEATURE_NONE, 0x18, "rb3r0" },
90
{ FEATURE_NONE, 0x19, "rb3r1" },
91
{ FEATURE_NONE, 0x1a, "rb3r2" },
92
{ FEATURE_NONE, 0x1b, "rb3r3" },
93
{ FEATURE_NONE, 0x1c, "rb3r4" },
94
{ FEATURE_NONE, 0x1d, "rb3r5" },
95
{ FEATURE_NONE, 0x1e, "rb3r6" },
96
{ FEATURE_NONE, 0x1f, "rb3r7" },
98
{ FEATURE_NONE, 0x80, "p0" },
99
{ FEATURE_NONE, 0x81, "sp" },
100
{ FEATURE_NONE, 0x82, "dpl" },
101
{ FEATURE_NONE, 0x83, "dph" },
102
{ FEATURE_NONE, 0x87, "pcon" },
103
{ FEATURE_NONE, 0x88, "tcon" },
104
{ FEATURE_NONE, 0x89, "tmod" },
105
{ FEATURE_NONE, 0x8a, "tl0" },
106
{ FEATURE_NONE, 0x8b, "tl1" },
107
{ FEATURE_NONE, 0x8c, "th0" },
108
{ FEATURE_NONE, 0x8d, "th1" },
109
{ FEATURE_NONE, 0x90, "p1" },
110
{ FEATURE_NONE, 0x98, "scon" },
111
{ FEATURE_NONE, 0x99, "sbuf" },
112
{ FEATURE_NONE, 0xa0, "p2" },
113
{ FEATURE_NONE, 0xa8, "ie" },
114
{ FEATURE_NONE, 0xb0, "p3" },
115
{ FEATURE_NONE, 0xb8, "ip" },
116
{ FEATURE_NONE, 0xd0, "psw" },
117
{ FEATURE_NONE, 0xe0, "acc" },
118
{ FEATURE_NONE, 0xf0, "b" },
120
{ FEATURE_I8052, 0xc8, "t2con" },
121
{ FEATURE_I8052, 0xca, "rcap2l" },
122
{ FEATURE_I8052, 0xcb, "rcap2h" },
123
{ FEATURE_I8052, 0xcc, "tl2" },
124
{ FEATURE_I8052, 0xcd, "th2" },
126
{ FEATURE_I80C52, 0xb7, "iph" },
127
{ FEATURE_I80C52, 0xa9, "saddr" },
128
{ FEATURE_I80C52, 0xb9, "saden" },
130
{ FEATURE_DS5002FP, 0x8e, "pwcm" },
131
{ FEATURE_DS5002FP, 0x8f, "pwmp" },
132
{ FEATURE_DS5002FP, 0xc1, "crcr" },
133
{ FEATURE_DS5002FP, 0xc2, "crcl" },
134
{ FEATURE_DS5002FP, 0xc3, "crch" },
135
{ FEATURE_DS5002FP, 0xc6, "mcon" },
136
{ FEATURE_DS5002FP, 0xc7, "ta" },
137
{ FEATURE_DS5002FP, 0xcf, "rnr" },
138
{ FEATURE_DS5002FP, 0xd8, "rpctl" },
139
{ FEATURE_DS5002FP, 0xd9, "rps" },
141
{ FEATURE_I83C751, 0x98, "i2con" },
142
{ FEATURE_I83C751, 0x99, "i2dat" },
143
{ FEATURE_I83C751, 0xd8, "i2cfg" },
144
{ FEATURE_I83C751, 0xf8, "i2sta" }, /* read only */
148
{ FEATURE_NONE, 0x188, "it0" },
149
{ FEATURE_NONE, 0x189, "ie0" },
150
{ FEATURE_NONE, 0x18a, "it1" },
151
{ FEATURE_NONE, 0x18b, "ie1" },
152
{ FEATURE_NONE, 0x18c, "tr0" },
153
{ FEATURE_NONE, 0x18d, "tf0" },
154
{ FEATURE_NONE, 0x18e, "tr1" },
155
{ FEATURE_NONE, 0x18f, "tf1" },
157
{ FEATURE_NONE, 0x198, "ri" },
158
{ FEATURE_NONE, 0x199, "ti" },
159
{ FEATURE_NONE, 0x19a, "rb8" },
160
{ FEATURE_NONE, 0x19b, "tb8" },
161
{ FEATURE_NONE, 0x19c, "ren" },
162
{ FEATURE_NONE, 0x19d, "sm2" },
163
{ FEATURE_NONE, 0x19e, "sm1" },
164
{ FEATURE_NONE, 0x19f, "sm0" },
166
{ FEATURE_I83C751, 0x198, "xstp" }, /* read: no function */
167
{ FEATURE_I83C751, 0x199, "xstr" }, /* read: MASTER */
168
{ FEATURE_I83C751, 0x19a, "cstp" }, /* read: STP */
169
{ FEATURE_I83C751, 0x19b, "cstr" }, /* read: STR */
170
{ FEATURE_I83C751, 0x19c, "carl" }, /* read: ARL */
171
{ FEATURE_I83C751, 0x19d, "cdr" }, /* read: DRDY */
172
{ FEATURE_I83C751, 0x19e, "idle" }, /* read: ATN */
173
{ FEATURE_I83C751, 0x19f, "cxa" }, /* read: RDAT */
175
{ FEATURE_NONE, 0x1a8, "ex0" },
176
{ FEATURE_NONE, 0x1a9, "et0" },
177
{ FEATURE_NONE, 0x1aa, "ex1" },
178
{ FEATURE_NONE, 0x1ab, "et1" },
179
{ FEATURE_NONE, 0x1ac, "es" },
180
{ FEATURE_NONE, 0x1ad, "ie.5" },
181
{ FEATURE_NONE, 0x1ae, "ie.6" },
182
{ FEATURE_NONE, 0x1af, "ea" },
184
{ FEATURE_I83C751, 0x1ac, "ei2" },
185
{ FEATURE_I8052, 0x1ad, "et2" },
187
/* FIXME: port 3 - depends on external circuits and not really
188
* implemented in the core. TBD */
189
{ FEATURE_NONE, 0x1b0, "rxd" },
190
{ FEATURE_NONE, 0x1b1, "txd" },
191
{ FEATURE_NONE, 0x1b2, "int0" },
192
{ FEATURE_NONE, 0x1b3, "int1" },
193
{ FEATURE_NONE, 0x1b4, "t0" },
194
{ FEATURE_NONE, 0x1b5, "t1" },
195
{ FEATURE_NONE, 0x1b6, "wr" },
196
{ FEATURE_NONE, 0x1b7, "rd" },
198
{ FEATURE_NONE, 0x1b8, "px0" },
199
{ FEATURE_NONE, 0x1b9, "pt0" },
200
{ FEATURE_NONE, 0x1ba, "px1" },
201
{ FEATURE_NONE, 0x1bb, "pt1" },
202
{ FEATURE_NONE, 0x1bc, "ps" },
203
{ FEATURE_NONE, 0x1bd, "ip.5" },
204
{ FEATURE_NONE, 0x1be, "ip.6" },
205
{ FEATURE_NONE, 0x1bf, "ip.7" },
207
{ FEATURE_I8052, 0x1bd, "pt2" },
208
{ FEATURE_I83C751, 0x1bc, "pi2" },
210
{ FEATURE_I8052, 0x1c8, "cprl2" },
211
{ FEATURE_I8052, 0x1c9, "ct2" },
212
{ FEATURE_I8052, 0x1ca, "tr2" },
213
{ FEATURE_I8052, 0x1cb, "exen2" },
214
{ FEATURE_I8052, 0x1cc, "tclk" },
215
{ FEATURE_I8052, 0x1cd, "rclk" },
216
{ FEATURE_I8052, 0x1ce, "exf2" },
217
{ FEATURE_I8052, 0x1cf, "tf2" },
219
{ FEATURE_NONE, 0x1d0, "p" },
220
{ FEATURE_NONE, 0x1d1, "psw.1" },
221
{ FEATURE_NONE, 0x1d2, "ov" },
222
{ FEATURE_NONE, 0x1d3, "rs0" },
223
{ FEATURE_NONE, 0x1d4, "rs1" },
224
{ FEATURE_NONE, 0x1d5, "f0" },
225
{ FEATURE_NONE, 0x1d6, "ac" },
226
{ FEATURE_NONE, 0x1d7, "cy" },
228
{ FEATURE_DS5002FP, 0x1d8, "rg0" },
229
{ FEATURE_DS5002FP, 0x1d9, "rpc" },
230
{ FEATURE_DS5002FP, 0x1da, "dma" },
231
{ FEATURE_DS5002FP, 0x1db, "ibi" },
232
{ FEATURE_DS5002FP, 0x1dc, "ae" },
233
{ FEATURE_DS5002FP, 0x1dd, "exbs" },
234
{ FEATURE_DS5002FP, 0x1de, "d8.6" },
235
{ FEATURE_DS5002FP, 0x1df, "rnr" },
237
{ FEATURE_I83C751, 0x1d8, "ct0" },
238
{ FEATURE_I83C751, 0x1d9, "ct1" },
239
{ FEATURE_I83C751, 0x1da, "i2cfg.2" },
240
{ FEATURE_I83C751, 0x1db, "i2cfg.3" },
241
{ FEATURE_I83C751, 0x1dc, "tirun" },
242
{ FEATURE_I83C751, 0x1dd, "clrti" },
243
{ FEATURE_I83C751, 0x1de, "masterq" },
244
{ FEATURE_I83C751, 0x1df, "slaven" },
246
{ FEATURE_I83C751, 0x1f8, "xstp" },
247
{ FEATURE_I83C751, 0x1f9, "xstr" },
248
{ FEATURE_I83C751, 0x1fa, "makstp" },
249
{ FEATURE_I83C751, 0x1fb, "makstr" },
250
{ FEATURE_I83C751, 0x1fc, "xactv" },
251
{ FEATURE_I83C751, 0x1fd, "xdata" },
252
{ FEATURE_I83C751, 0x1fe, "idle" },
253
{ FEATURE_I83C751, 0x1ff, "i2sta.7" },
256
* "ibf", "obf", "idsm", "obfc", e8 - eb
257
* "ma0", "ma1", "mb0", "mb1", ec - ef
263
static void init_mem_names(int feature_set, const char **mem_names)
268
/* Set defaults / i8051 */
269
for (i = 0; feature = mem_name_feature[i].feature, feature >= 0; i++)
271
if ( feature == FEATURE_NONE )
272
mem_names[mem_name_feature[i].addr] = mem_name_feature[i].name;
275
/* Set specific memory names */
276
for (i = 0; feature = mem_name_feature[i].feature, feature >= 0; i++)
278
if (feature & feature_set)
279
mem_names[mem_name_feature[i].addr] = mem_name_feature[i].name;
284
static const char *get_data_address( const char **mem_names, UINT8 arg )
286
static char buffer_array[4][32];
288
char *buffer = &buffer_array[++whichbuf % 4][0];
290
if (mem_names[arg] == NULL)
291
sprintf(buffer,"$%02X",arg);
293
sprintf(buffer,"%s", mem_names[arg]);
297
static const char *get_bit_address( const char **mem_names, UINT8 arg )
299
static char buffer[32];
303
//Bit address 0-7F can be referred to as 20.0, 20.1, to 20.7 for address 0, and 2f.0,2f.1 to 2f.7 for address 7f
305
sprintf(buffer,"$%02X.%d",(arg >> 3) | 0x20, arg & 0x07);
307
sprintf(buffer,"$%02X",arg);
311
if (mem_names[arg | 0x100] == NULL)
313
if (mem_names[arg & 0xf8] == NULL)
314
sprintf(buffer,"$%02X.%d", arg & 0xf8, arg & 0x07);
316
sprintf(buffer,"%s.%d", mem_names[arg & 0xf8], arg & 0x07);
319
sprintf(buffer,"%s", mem_names[arg | 0x100]);
326
/*Just display the actual memory address for data & bit address access*/
328
static const char *get_data_address( UINT8 arg )
330
static char buffer[32];
331
sprintf(buffer,"$%02X",arg);
335
static const char *get_bit_address( UINT8 arg )
337
static char buffer[32];
338
sprintf(buffer,"$%02X",arg);
344
static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
348
const char *sym, *sym2;
353
op = oprom[PC++ - pc];
357
case 0x00: /* 1: 0000 0000 */
361
//AJMP code addr /* 1: aaa0 0001 */
370
addr = opram[PC++ - pc];
371
addr|= (PC & 0xf800) | ((op & 0xe0) << 3);
372
sprintf(dst, "ajmp $%04X", addr);
376
case 0x02: /* 1: 0000 0010 */
377
addr = (opram[PC++ - pc]<<8) & 0xff00;
378
addr|= opram[PC++ - pc];
379
sprintf(dst, "ljmp $%04X", addr);
383
case 0x03: /* 1: 0000 0011 */
384
sprintf(dst, "rr a");
388
case 0x04: /* 1: 0000 0100 */
389
sprintf(dst, "inc a");
393
case 0x05: /* 1: 0000 0101 */
394
sym = get_data_address(mem_names, opram[PC++ - pc]);
395
sprintf(dst, "inc %s", sym);
398
//INC @R0/@R1 /* 1: 0000 011i */
401
sprintf(dst, "inc @r%d", op&1);
404
//INC R0 to R7 /* 1: 0000 1rrr */
413
sprintf(dst, "inc r%d", op&7);
416
//JBC bit addr, code addr
417
case 0x10: /* 1: 0001 0000 */
418
sym = get_bit_address(mem_names, opram[PC++ - pc]);
419
rel = opram[PC++ - pc];
420
sprintf(dst, "jbc %s,$%04X", sym, PC + rel);
423
//ACALL code addr /* 1: aaa1 0001 */
432
sprintf(dst, "acall $%04X", (PC & 0xf800) | ((op & 0xe0) << 3) | opram[PC - pc]);
434
flags = DASMFLAG_STEP_OVER;
438
case 0x12: /* 1: 0001 0010 */
439
addr = (opram[PC++ - pc]<<8) & 0xff00;
440
addr|= opram[PC++ - pc];
441
sprintf(dst, "lcall $%04X", addr);
442
flags = DASMFLAG_STEP_OVER;
446
case 0x13: /* 1: 0001 0011 */
447
sprintf(dst, "rrc a");
451
case 0x14: /* 1: 0001 0100 */
452
sprintf(dst, "dec a");
456
case 0x15: /* 1: 0001 0101 */
457
sym = get_data_address(mem_names, opram[PC++ - pc]);
458
sprintf(dst, "dec %s", sym);
462
//DEC @R0/@R1 /* 1: 0001 011i */
465
sprintf(dst, "dec @r%d", op&1);
468
//DEC R0 to R7 /* 1: 0001 1rrr */
477
sprintf(dst, "dec r%d", op&7);
480
//JB bit addr, code addr
481
case 0x20: /* 1: 0010 0000 */
482
sym = get_bit_address(mem_names, opram[PC++ - pc]);
483
rel = opram[PC++ - pc];
484
sprintf(dst, "jb %s,$%04X", sym, (PC + rel));
488
case 0x22: /* 1: 0010 0010 */
490
flags = DASMFLAG_STEP_OUT;
494
case 0x23: /* 1: 0010 0011 */
495
sprintf(dst, "rl a");
499
case 0x24: /* 1: 0010 0100 */
500
sprintf(dst, "add a,#$%02X", opram[PC++ - pc]);
504
case 0x25: /* 1: 0010 0101 */
505
sym = get_data_address(mem_names, opram[PC++ - pc]);
506
sprintf(dst, "add a,%s", sym);
510
//ADD A, @R0/@R1 /* 1: 0010 011i */
513
sprintf(dst, "add a,@r%d", op&1);
516
//ADD A, R0 to R7 /* 1: 0010 1rrr */
525
sprintf(dst, "add a,r%d", op&7);
528
//JNB bit addr, code addr
529
case 0x30: /* 1: 0011 0000 */
530
sym = get_bit_address(mem_names, opram[PC++ - pc]);
531
rel = opram[PC++ - pc];
532
sprintf(dst, "jnb %s,$%04X", sym, (PC + rel));
536
case 0x32: /* 1: 0011 0010 */
537
sprintf(dst, "reti");
538
flags = DASMFLAG_STEP_OUT;
542
case 0x33: /* 1: 0011 0011 */
543
sprintf(dst, "rlc a");
547
case 0x34: /* 1: 0011 0100 */
548
sprintf(dst, "addc a,#$%02X", opram[PC++ - pc]);
552
case 0x35: /* 1: 0011 0101 */
553
sym = get_data_address(mem_names, opram[PC++ - pc]);
554
sprintf(dst, "addc a,%s", sym);
557
//ADDC A, @R0/@R1 /* 1: 0011 011i */
560
sprintf(dst, "addc a,@r%d", op&1);
563
//ADDC A, R0 to R7 /* 1: 0011 1rrr */
572
sprintf(dst, "addc a,r%d", op&7);
576
case 0x40: /* 1: 0100 0000 */
577
rel = opram[PC++ - pc];
578
sprintf(dst, "jc $%04X", PC + rel);
582
case 0x42: /* 1: 0100 0010 */
583
sym = get_data_address(mem_names, opram[PC++ - pc]);
584
sprintf(dst, "orl %s,a", sym);
587
//ORL data addr, #data
588
case 0x43: /* 1: 0100 0011 */
589
sym = get_data_address(mem_names, opram[PC++ - pc]);
590
sprintf(dst, "orl %s,#$%02X", sym, opram[PC++ - pc]);
595
case 0x44: /* 1: 0100 0100 */
596
sprintf(dst, "orl a,#$%02X", opram[PC++ - pc]);
600
case 0x45: /* 1: 0100 0101 */
601
sym = get_data_address(mem_names, opram[PC++ - pc]);
602
sprintf(dst, "orl a,%s", sym);
605
//ORL A, @RO/@R1 /* 1: 0100 011i */
608
sprintf(dst, "orl a,@r%d", op&1);
611
//ORL A, RO to R7 /* 1: 0100 1rrr */
620
sprintf(dst, "orl a,r%d", op&7);
624
case 0x50: /* 1: 0101 0000 */
625
rel = opram[PC++ - pc];
626
sprintf(dst, "jnc $%04X", PC + rel);
631
case 0x52: /* 1: 0101 0010 */
632
sym = get_data_address(mem_names, opram[PC++ - pc]);
633
sprintf(dst, "anl %s,a", sym);
637
//ANL data addr, #data
638
case 0x53: /* 1: 0101 0011 */
639
sym = get_data_address(mem_names, opram[PC++ - pc]);
640
sprintf(dst, "anl %s,#$%02X", sym, opram[PC++ - pc]);
644
case 0x54: /* 1: 0101 0100 */
645
sprintf(dst, "anl a,#$%02X", opram[PC++ - pc]);
649
case 0x55: /* 1: 0101 0101 */
650
sym = get_data_address(mem_names, opram[PC++ - pc]);
651
sprintf(dst, "anl a,%s", sym);
655
//ANL A, @RO/@R1 /* 1: 0101 011i */
658
sprintf(dst, "anl a,@r%d", op&1);
661
//ANL A, RO to R7 /* 1: 0101 1rrr */
670
sprintf(dst, "anl a,r%d", op&7);
674
case 0x60: /* 1: 0110 0000 */
675
rel = opram[PC++ - pc];
676
sprintf(dst, "jz $%04X", PC + rel);
681
case 0x62: /* 1: 0110 0010 */
682
sym = get_data_address(mem_names, opram[PC++ - pc]);
683
sprintf(dst, "xrl %s,a", sym);
686
//XRL data addr, #data
687
case 0x63: /* 1: 0110 0011 */
688
sym = get_data_address(mem_names, opram[PC++ - pc]);
689
sprintf(dst, "xrl %s,#$%02X", sym, opram[PC++ - pc]);
693
case 0x64: /* 1: 0110 0100 */
694
sprintf(dst, "xrl a,#$%02X", opram[PC++ - pc]);
698
case 0x65: /* 1: 0110 0101 */
699
sym = get_data_address(mem_names, opram[PC++ - pc]);
700
sprintf(dst, "xrl a,%s", sym);
704
//XRL A, @R0/@R1 /* 1: 0110 011i */
707
sprintf(dst, "xrl a,@r%d", op&1);
710
//XRL A, R0 to R7 /* 1: 0110 1rrr */
719
sprintf(dst, "xrl a,r%d", op&7);
723
case 0x70: /* 1: 0111 0000 */
724
rel = opram[PC++ - pc];
725
sprintf(dst, "jnz $%04X", PC + rel);
730
case 0x72: /* 1: 0111 0010 */
731
sym = get_bit_address(mem_names, opram[PC++ - pc]);
732
sprintf(dst, "orl c,%s", sym);
737
case 0x73: /* 1: 0111 0011 */
738
sprintf(dst, "jmp @a+dptr");
742
case 0x74: /* 1: 0111 0100 */
743
sprintf(dst, "mov a,#$%02X", opram[PC++ - pc]);
746
//MOV data addr, #data
747
case 0x75: /* 1: 0111 0101 */
748
sym = get_data_address(mem_names, opram[PC++ - pc]);
749
sprintf(dst, "mov %s,#$%02X", sym, opram[PC++ - pc]);
753
//MOV @R0/@R1, #data /* 1: 0111 011i */
756
sprintf(dst, "mov @r%d,#$%02X", op&1, opram[PC++ - pc]);
759
//MOV R0 to R7, #data /* 1: 0111 1rrr */
768
sprintf(dst, "mov r%d,#$%02X", (op & 7), opram[PC++ - pc]);
772
case 0x80: /* 1: 1000 0000 */
773
rel = opram[PC++ - pc];
774
sprintf(dst, "sjmp $%04X", PC + rel);
778
case 0x82: /* 1: 1000 0010 */
779
sym = get_bit_address(mem_names, opram[PC++ - pc]);
780
sprintf(dst, "anl c,%s", sym);
784
case 0x83: /* 1: 1000 0011 */
785
sprintf(dst, "movc a,@a+pc");
789
case 0x84: /* 1: 1000 0100 */
790
sprintf(dst, "div ab");
793
//MOV data addr, data addr (Note: 1st address is src, 2nd is dst, but the mov command works as mov dst,src)
794
case 0x85: /* 1: 1000 0101 */
795
sym = get_data_address(mem_names, opram[PC++ - pc]);
796
sym2 = get_data_address(mem_names, opram[PC++ - pc]);
797
sprintf(dst, "mov %s,%s", sym2, sym);
801
//MOV data addr, @R0/@R1/* 1: 1000 011i */
804
sym = get_data_address(mem_names, opram[PC++ - pc]);
805
sprintf(dst, "mov %s,@r%d", sym, op&1);
808
//MOV data addr,R0 to R7/* 1: 1000 1rrr */
817
sym = get_data_address(mem_names, opram[PC++ - pc]);
818
sprintf(dst, "mov %s,r%d", sym, op&7);
822
case 0x90: /* 1: 1001 0000 */
823
addr = (opram[PC++ - pc]<<8) & 0xff00;
824
addr|= opram[PC++ - pc];
825
sprintf(dst, "mov dptr,#$%04X", addr);
829
case 0x92: /* 1: 1001 0010 */
830
sym = get_bit_address(mem_names, opram[PC++ - pc]);
831
sprintf(dst, "mov %s,c", sym);
835
case 0x93: /* 1: 1001 0011 */
836
sprintf(dst, "movc a,@a+dptr");
840
case 0x94: /* 1: 1001 0100 */
841
sprintf(dst, "subb a,#$%02X", opram[PC++ - pc]);
845
case 0x95: /* 1: 1001 0101 */
846
sym = get_data_address(mem_names, opram[PC++ - pc]);
847
sprintf(dst, "subb a,%s", sym);
851
//SUBB A, @R0/@R1 /* 1: 1001 011i */
854
sprintf(dst, "subb a,@r%d", op&1);
857
//SUBB A, R0 to R7 /* 1: 1001 1rrr */
866
sprintf(dst, "subb a,r%d", op&7);
871
case 0xa0: /* 1: 1010 0000 */
872
sym = get_bit_address(mem_names, opram[PC++ - pc]);
873
sprintf(dst, "orl c,/%s", sym);
877
case 0xa2: /* 1: 1010 0010 */
878
sym = get_bit_address(mem_names, opram[PC++ - pc]);
879
sprintf(dst, "mov c,%s", sym);
883
case 0xa3: /* 1: 1010 0011 */
884
sprintf(dst, "inc dptr");
888
case 0xa4: /* 1: 1010 0100 */
889
sprintf(dst, "mul ab");
893
case 0xa5: /* 1: 1010 0101 */
894
sprintf(dst, "ill/rsv");
898
//MOV @R0/@R1, data addr /* 1: 1010 011i */
901
sym = get_data_address(mem_names, opram[PC++ - pc]);
902
sprintf(dst, "mov @r%d,%s", op&1, sym);
905
//MOV R0 to R7, data addr /* 1: 1010 1rrr */
914
sym = get_data_address(mem_names, opram[PC++ - pc]);
915
sprintf(dst, "mov r%d,%s", op&7, sym);
919
case 0xb0: /* 1: 1011 0000 */
920
sym = get_bit_address(mem_names, opram[PC++ - pc]);
921
sprintf(dst, "anl c,/%s", sym);
925
case 0xb2: /* 1: 1011 0010 */
926
sym = get_bit_address(mem_names, opram[PC++ - pc]);
927
sprintf(dst, "cpl %s", sym);
932
case 0xb3: /* 1: 1011 0011 */
933
sprintf(dst, "cpl c");
936
//CJNE A, #data, code addr
937
case 0xb4: /* 1: 1011 0100 */
938
data = opram[PC++ - pc];
939
rel = opram[PC++ - pc];
940
sprintf(dst, "cjne a,#$%02X,$%04X", data, PC + rel);
943
//CJNE A, data addr, code addr
944
case 0xb5: /* 1: 1011 0101 */
945
sym = get_data_address(mem_names, opram[PC++ - pc]);
946
rel = opram[PC++ - pc];
947
sprintf(dst, "cjne a,%s,$%04X", sym, PC + rel);
951
//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
954
data = opram[PC++ - pc];
955
rel = opram[PC++ - pc];
956
sprintf(dst, "cjne @r%d,#$%02X,$%04X", op&1, data, PC + rel);
959
//CJNE R0 to R7, #data, code addr/* 1: 1011 1rrr */
968
data = opram[PC++ - pc];
969
rel = opram[PC++ - pc];
970
sprintf(dst, "cjne r%d,#$%02X,$%04X", op&7, data, PC + rel);
974
case 0xc0: /* 1: 1100 0000 */
975
sym = get_data_address(mem_names, opram[PC++ - pc]);
976
sprintf(dst, "push %s", sym);
980
case 0xc2: /* 1: 1100 0010 */
981
sym = get_bit_address(mem_names, opram[PC++ - pc]);
982
sprintf(dst, "clr %s", sym);
986
case 0xc3: /* 1: 1100 0011 */
987
sprintf(dst, "clr c");
991
case 0xc4: /* 1: 1100 0100 */
992
sprintf(dst, "swap a");
996
case 0xc5: /* 1: 1100 0101 */
997
sym = get_data_address(mem_names, opram[PC++ - pc]);
998
sprintf(dst, "xch a,%s", sym);
1001
//XCH A, @RO/@R1 /* 1: 1100 011i */
1004
sprintf(dst, "xch a,@r%d", op&1);
1007
//XCH A, RO to R7 /* 1: 1100 1rrr */
1016
sprintf(dst, "xch a,r%d", op&7);
1020
case 0xd0: /* 1: 1101 0000 */
1021
sym = get_data_address(mem_names, opram[PC++ - pc]);
1022
sprintf(dst, "pop %s", sym);
1026
case 0xd2: /* 1: 1101 0010 */
1027
sym = get_bit_address(mem_names, opram[PC++ - pc]);
1028
sprintf(dst, "setb %s", sym);
1032
case 0xd3: /* 1: 1101 0011 */
1033
sprintf(dst, "setb c");
1038
case 0xd4: /* 1: 1101 0100 */
1039
sprintf(dst, "da a");
1042
//DJNZ data addr, code addr
1043
case 0xd5: /* 1: 1101 0101 */
1044
sym = get_data_address(mem_names, opram[PC++ - pc]);
1045
rel = opram[PC++ - pc];
1046
sprintf(dst, "djnz %s,$%04X", sym, PC + rel);
1047
flags = DASMFLAG_STEP_OVER;
1050
//XCHD A, @R0/@R1 /* 1: 1101 011i */
1053
sprintf(dst, "xchd a,@r%d", op&1);
1056
//DJNZ R0 to R7,code addr /* 1: 1101 1rrr */
1065
rel = opram[PC++ - pc];
1066
sprintf(dst, "djnz r%d,$%04X", op&7, (PC + rel));
1067
flags = DASMFLAG_STEP_OVER;
1071
case 0xe0: /* 1: 1110 0000 */
1072
sprintf(dst, "movx a,@dptr");
1076
//MOVX A, @R0/@R1 /* 1: 1110 001i */
1079
sprintf(dst, "movx a,@r%d", op&1);
1083
case 0xe4: /* 1: 1110 0100 */
1084
sprintf(dst, "clr a");
1088
case 0xe5: /* 1: 1110 0101 */
1089
sym = get_data_address(mem_names, opram[PC++ - pc]);
1090
sprintf(dst, "mov a,%s", sym);
1094
//MOV A,@RO/@R1 /* 1: 1110 011i */
1097
sprintf(dst, "mov a,@r%d", op&1);
1100
//MOV A,R0 to R7 /* 1: 1110 1rrr */
1109
sprintf(dst, "mov a,r%d", op&7);
1113
case 0xf0: /* 1: 1111 0000 */
1114
sprintf(dst, "movx @dptr,a");
1118
//MOVX @R0/@R1,A /* 1: 1111 001i */
1121
sprintf(dst, "movx @r%d,a", op&1);
1125
case 0xf4: /* 1: 1111 0100 */
1126
sprintf(dst, "cpl a");
1130
case 0xf5: /* 1: 1111 0101 */
1131
sym = get_data_address(mem_names, opram[PC++ - pc]);
1132
sprintf(dst, "mov %s,a", sym);
1135
//MOV @R0/@R1, A /* 1: 1111 011i */
1138
sprintf(dst, "mov @r%d,a", op&1);
1141
//MOV R0 to R7, A /* 1: 1111 1rrr */
1150
sprintf(dst, "mov r%d,a", op&7);
1154
sprintf(dst, "illegal");
1156
return (PC - pc) | flags | DASMFLAG_SUPPORTED;
1160
CPU_DISASSEMBLE( i8051 )
1162
static const char *mem_names[0x200];
1163
static int mem_names_initialized = 0;
1165
if (!mem_names_initialized)
1167
init_mem_names( FEATURE_NONE, mem_names);
1168
mem_names_initialized = 1;
1170
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1173
CPU_DISASSEMBLE( i8052 )
1175
static const char *mem_names[0x200];
1176
static int mem_names_initialized = 0;
1178
if (!mem_names_initialized)
1180
init_mem_names( FEATURE_I8052, mem_names);
1181
mem_names_initialized = 1;
1183
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1186
CPU_DISASSEMBLE( i80c51 )
1188
static const char *mem_names[0x200];
1189
static int mem_names_initialized = 0;
1191
if (!mem_names_initialized)
1193
init_mem_names( FEATURE_CMOS, mem_names);
1194
mem_names_initialized = 1;
1196
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1199
CPU_DISASSEMBLE( i80c52 )
1201
static const char *mem_names[0x200];
1202
static int mem_names_initialized = 0;
1204
if (!mem_names_initialized)
1206
init_mem_names( FEATURE_I8052 | FEATURE_CMOS | FEATURE_I80C52, mem_names);
1207
mem_names_initialized = 1;
1209
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1212
CPU_DISASSEMBLE( ds5002fp )
1214
static const char *mem_names[0x200];
1215
static int mem_names_initialized = 0;
1217
if (!mem_names_initialized)
1219
init_mem_names( FEATURE_DS5002FP | FEATURE_CMOS, mem_names);
1220
mem_names_initialized = 1;
1222
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);