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  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Jordi Mallach, Emmanuel Kasper
  • Date: 2011-12-19 22:56:27 UTC
  • mfrom: (0.1.2)
  • Revision ID: package-import@ubuntu.com-20111219225627-ub5oga1oys4ogqzm
Tags: 0.144-1
[ Jordi Mallach ]
* Fix syntax errors in DEP5 copyright file (lintian).
* Use a versioned copyright Format specification field.
* Update Vcs-* URLs.
* Move transitional packages to the new metapackages section, and make
  them priority extra.
* Remove references to GNU/Linux and MESS sources from copyright.
* Add build variables for s390x.
* Use .xz tarballs as it cuts 4MB for the upstream sources.
* Add nplayers.ini as a patch. Update copyright file to add CC-BY-SA-3.0.

[ Emmanuel Kasper ]
* New upstream release. Closes: #651538.
* Add Free Desktop compliant png icons of various sizes taken from
  the hydroxygen iconset
* Mess is now built from a new source package, to avoid possible source
  incompatibilities between mame and the mess overlay.
* Mame-tools are not built from the mame source package anymore, but
  from the mess source package

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Lines of Context:
1
 
/*****************************************************************************
2
 
 *
3
 
 *   i8051dasm.c
4
 
 *   Portable MCS-51 Family Emulator
5
 
 *
6
 
 *   Chips in the family:
7
 
 *   8051 Product Line (8031,8051,8751)
8
 
 *   8052 Product Line (8032,8052,8752)
9
 
 *   8054 Product Line (8054)
10
 
 *   8058 Product Line (8058)
11
 
 *
12
 
 *   Copyright Steve Ellenoff, all rights reserved.
13
 
 *
14
 
 *   - This source code is released as freeware for non-commercial purposes.
15
 
 *   - You are free to use and redistribute this code in modified or
16
 
 *     unmodified form, provided you list me in the credits.
17
 
 *   - If you modify this source code, you must add a notice to each modified
18
 
 *     source file that it has been changed.  If you're a nice person, you
19
 
 *     will clearly mark each change too.  :)
20
 
 *   - If you wish to use this for commercial purposes, please contact me at
21
 
 *     sellenoff@hotmail.com
22
 
 *   - The author of this copywritten work reserves the right to change the
23
 
 *     terms of its usage and license at any time, including retroactively
24
 
 *   - This entire notice must remain in the source code.
25
 
 *
26
 
 *  This work is based on:
27
 
 *  #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
28
 
 *  #2) 8051 simulator by Travis Marlatte
29
 
 *  #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
30
 
 *
31
 
 *****************************************************************************
32
 
 * Symbol Memory Name Tables borrowed from:
33
 
 * D52 8052 Disassembler - Copyright Jeffery L. Post
34
 
 *****************************************************************************/
35
 
 
36
 
#include "emu.h"
37
 
#include "debugger.h"
38
 
#include "mcs51.h"
39
 
 
40
 
enum
41
 
{
42
 
        FEATURE_NONE                    = 0x00,
43
 
        FEATURE_I8052                   = 0x01,
44
 
        FEATURE_CMOS                    = 0x02,
45
 
        FEATURE_I80C52                  = 0x04,
46
 
        FEATURE_DS5002FP                = 0x08,
47
 
        FEATURE_I83C751                 = 0x08,
48
 
};
49
 
 
50
 
 
51
 
#define SHOW_MEMORY_NAMES       1
52
 
 
53
 
#ifdef SHOW_MEMORY_NAMES
54
 
 
55
 
/*Display the memory address names for data & bit address access*/
56
 
 
57
 
//SFR Names
58
 
 
59
 
static const struct {
60
 
        int feature;
61
 
        int addr;
62
 
        const char *name;
63
 
} mem_name_feature[] =
64
 
{
65
 
        { FEATURE_NONE, 0x00, "rb0r0" },
66
 
        { FEATURE_NONE, 0x01, "rb0r1" },
67
 
        { FEATURE_NONE, 0x02, "rb0r2" },
68
 
        { FEATURE_NONE, 0x03, "rb0r3" },
69
 
        { FEATURE_NONE, 0x04, "rb0r4" },
70
 
        { FEATURE_NONE, 0x05, "rb0r5" },
71
 
        { FEATURE_NONE, 0x06, "rb0r6" },
72
 
        { FEATURE_NONE, 0x07, "rb0r7" },
73
 
        { FEATURE_NONE, 0x08, "rb1r0" },
74
 
        { FEATURE_NONE, 0x09, "rb1r1" },
75
 
        { FEATURE_NONE, 0x0a, "rb1r2" },
76
 
        { FEATURE_NONE, 0x0b, "rb1r3" },
77
 
        { FEATURE_NONE, 0x0c, "rb1r4" },
78
 
        { FEATURE_NONE, 0x0d, "rb1r5" },
79
 
        { FEATURE_NONE, 0x0e, "rb1r6" },
80
 
        { FEATURE_NONE, 0x0f, "rb1r7" },
81
 
        { FEATURE_NONE, 0x10, "rb2r0" },
82
 
        { FEATURE_NONE, 0x11, "rb2r1" },
83
 
        { FEATURE_NONE, 0x12, "rb2r2" },
84
 
        { FEATURE_NONE, 0x13, "rb2r3" },
85
 
        { FEATURE_NONE, 0x14, "rb2r4" },
86
 
        { FEATURE_NONE, 0x15, "rb2r5" },
87
 
        { FEATURE_NONE, 0x16, "rb2r6" },
88
 
        { FEATURE_NONE, 0x17, "rb2r7" },
89
 
        { FEATURE_NONE, 0x18, "rb3r0" },
90
 
        { FEATURE_NONE, 0x19, "rb3r1" },
91
 
        { FEATURE_NONE, 0x1a, "rb3r2" },
92
 
        { FEATURE_NONE, 0x1b, "rb3r3" },
93
 
        { FEATURE_NONE, 0x1c, "rb3r4" },
94
 
        { FEATURE_NONE, 0x1d, "rb3r5" },
95
 
        { FEATURE_NONE, 0x1e, "rb3r6" },
96
 
        { FEATURE_NONE, 0x1f, "rb3r7" },
97
 
 
98
 
        { FEATURE_NONE, 0x80, "p0"              },
99
 
        { FEATURE_NONE, 0x81, "sp"              },
100
 
        { FEATURE_NONE, 0x82, "dpl"             },
101
 
        { FEATURE_NONE, 0x83, "dph"             },
102
 
        { FEATURE_NONE, 0x87, "pcon"    },
103
 
        { FEATURE_NONE, 0x88, "tcon"    },
104
 
        { FEATURE_NONE, 0x89, "tmod"    },
105
 
        { FEATURE_NONE, 0x8a, "tl0"             },
106
 
        { FEATURE_NONE, 0x8b, "tl1"             },
107
 
        { FEATURE_NONE, 0x8c, "th0"             },
108
 
        { FEATURE_NONE, 0x8d, "th1"             },
109
 
        { FEATURE_NONE, 0x90, "p1"              },
110
 
        { FEATURE_NONE, 0x98, "scon"    },
111
 
        { FEATURE_NONE, 0x99, "sbuf"    },
112
 
        { FEATURE_NONE, 0xa0, "p2"              },
113
 
        { FEATURE_NONE, 0xa8, "ie"              },
114
 
        { FEATURE_NONE, 0xb0, "p3"              },
115
 
        { FEATURE_NONE, 0xb8, "ip"              },
116
 
        { FEATURE_NONE, 0xd0, "psw"             },
117
 
        { FEATURE_NONE, 0xe0, "acc"             },
118
 
        { FEATURE_NONE, 0xf0, "b"               },
119
 
 
120
 
        { FEATURE_I8052, 0xc8, "t2con"  },
121
 
        { FEATURE_I8052, 0xca, "rcap2l" },
122
 
        { FEATURE_I8052, 0xcb, "rcap2h" },
123
 
        { FEATURE_I8052, 0xcc, "tl2"    },
124
 
        { FEATURE_I8052, 0xcd, "th2"    },
125
 
 
126
 
        { FEATURE_I80C52, 0xb7, "iph"   },
127
 
        { FEATURE_I80C52, 0xa9, "saddr" },
128
 
        { FEATURE_I80C52, 0xb9, "saden" },
129
 
 
130
 
        { FEATURE_DS5002FP, 0x8e, "pwcm"        },
131
 
        { FEATURE_DS5002FP, 0x8f, "pwmp"        },
132
 
        { FEATURE_DS5002FP, 0xc1, "crcr"        },
133
 
        { FEATURE_DS5002FP, 0xc2, "crcl"        },
134
 
        { FEATURE_DS5002FP, 0xc3, "crch"        },
135
 
        { FEATURE_DS5002FP, 0xc6, "mcon"        },
136
 
        { FEATURE_DS5002FP, 0xc7, "ta"          },
137
 
        { FEATURE_DS5002FP, 0xcf, "rnr"         },
138
 
        { FEATURE_DS5002FP, 0xd8, "rpctl"       },
139
 
        { FEATURE_DS5002FP, 0xd9, "rps"         },
140
 
 
141
 
        { FEATURE_I83C751,      0x98, "i2con"   },
142
 
        { FEATURE_I83C751,      0x99, "i2dat"   },
143
 
        { FEATURE_I83C751,      0xd8, "i2cfg"   },
144
 
        { FEATURE_I83C751,      0xf8, "i2sta"   },      /* read only */
145
 
 
146
 
        /* bit addresses */
147
 
 
148
 
        { FEATURE_NONE, 0x188, "it0"            },
149
 
        { FEATURE_NONE, 0x189, "ie0"            },
150
 
        { FEATURE_NONE, 0x18a, "it1"            },
151
 
        { FEATURE_NONE, 0x18b, "ie1"            },
152
 
        { FEATURE_NONE, 0x18c, "tr0"            },
153
 
        { FEATURE_NONE, 0x18d, "tf0"            },
154
 
        { FEATURE_NONE, 0x18e, "tr1"            },
155
 
        { FEATURE_NONE, 0x18f, "tf1"            },
156
 
 
157
 
        { FEATURE_NONE, 0x198, "ri"                     },
158
 
        { FEATURE_NONE, 0x199, "ti"                     },
159
 
        { FEATURE_NONE, 0x19a, "rb8"            },
160
 
        { FEATURE_NONE, 0x19b, "tb8"            },
161
 
        { FEATURE_NONE, 0x19c, "ren"            },
162
 
        { FEATURE_NONE, 0x19d, "sm2"            },
163
 
        { FEATURE_NONE, 0x19e, "sm1"            },
164
 
        { FEATURE_NONE, 0x19f, "sm0"            },
165
 
 
166
 
        { FEATURE_I83C751, 0x198, "xstp"                }, /* read: no function */
167
 
        { FEATURE_I83C751, 0x199, "xstr"                }, /* read: MASTER */
168
 
        { FEATURE_I83C751, 0x19a, "cstp"                }, /* read: STP */
169
 
        { FEATURE_I83C751, 0x19b, "cstr"                }, /* read: STR */
170
 
        { FEATURE_I83C751, 0x19c, "carl"                }, /* read: ARL */
171
 
        { FEATURE_I83C751, 0x19d, "cdr"         }, /* read: DRDY */
172
 
        { FEATURE_I83C751, 0x19e, "idle"                }, /* read: ATN */
173
 
        { FEATURE_I83C751, 0x19f, "cxa"         }, /* read: RDAT */
174
 
 
175
 
        { FEATURE_NONE, 0x1a8, "ex0"            },
176
 
        { FEATURE_NONE, 0x1a9, "et0"            },
177
 
        { FEATURE_NONE, 0x1aa, "ex1"            },
178
 
        { FEATURE_NONE, 0x1ab, "et1"            },
179
 
        { FEATURE_NONE, 0x1ac, "es"                     },
180
 
        { FEATURE_NONE, 0x1ad, "ie.5"           },
181
 
        { FEATURE_NONE, 0x1ae, "ie.6"           },
182
 
        { FEATURE_NONE, 0x1af, "ea"                     },
183
 
 
184
 
        { FEATURE_I83C751, 0x1ac, "ei2"         },
185
 
        { FEATURE_I8052, 0x1ad, "et2"           },
186
 
 
187
 
        /* FIXME: port 3 - depends on external circuits and not really
188
 
     * implemented in the core. TBD */
189
 
        { FEATURE_NONE, 0x1b0, "rxd"            },
190
 
        { FEATURE_NONE, 0x1b1, "txd"            },
191
 
        { FEATURE_NONE, 0x1b2, "int0"           },
192
 
        { FEATURE_NONE, 0x1b3, "int1"           },
193
 
        { FEATURE_NONE, 0x1b4, "t0"                     },
194
 
        { FEATURE_NONE, 0x1b5, "t1"                     },
195
 
        { FEATURE_NONE, 0x1b6, "wr"                     },
196
 
        { FEATURE_NONE, 0x1b7, "rd"                     },
197
 
 
198
 
        { FEATURE_NONE, 0x1b8, "px0"            },
199
 
        { FEATURE_NONE, 0x1b9, "pt0"            },
200
 
        { FEATURE_NONE, 0x1ba, "px1"            },
201
 
        { FEATURE_NONE, 0x1bb, "pt1"            },
202
 
        { FEATURE_NONE, 0x1bc, "ps"                     },
203
 
        { FEATURE_NONE, 0x1bd, "ip.5"           },
204
 
        { FEATURE_NONE, 0x1be, "ip.6"           },
205
 
        { FEATURE_NONE, 0x1bf, "ip.7"           },
206
 
 
207
 
        { FEATURE_I8052, 0x1bd, "pt2"           },
208
 
        { FEATURE_I83C751, 0x1bc, "pi2"         },
209
 
 
210
 
        { FEATURE_I8052, 0x1c8, "cprl2"         },
211
 
        { FEATURE_I8052, 0x1c9, "ct2"           },
212
 
        { FEATURE_I8052, 0x1ca, "tr2"           },
213
 
        { FEATURE_I8052, 0x1cb, "exen2"         },
214
 
        { FEATURE_I8052, 0x1cc, "tclk"          },
215
 
        { FEATURE_I8052, 0x1cd, "rclk"          },
216
 
        { FEATURE_I8052, 0x1ce, "exf2"          },
217
 
        { FEATURE_I8052, 0x1cf, "tf2"           },
218
 
 
219
 
        { FEATURE_NONE, 0x1d0, "p"                      },
220
 
        { FEATURE_NONE, 0x1d1, "psw.1"          },
221
 
        { FEATURE_NONE, 0x1d2, "ov"                     },
222
 
        { FEATURE_NONE, 0x1d3, "rs0"            },
223
 
        { FEATURE_NONE, 0x1d4, "rs1"            },
224
 
        { FEATURE_NONE, 0x1d5, "f0"                     },
225
 
        { FEATURE_NONE, 0x1d6, "ac"                     },
226
 
        { FEATURE_NONE, 0x1d7, "cy"                     },
227
 
 
228
 
        { FEATURE_DS5002FP, 0x1d8, "rg0"        },
229
 
        { FEATURE_DS5002FP, 0x1d9, "rpc"        },
230
 
        { FEATURE_DS5002FP, 0x1da, "dma"        },
231
 
        { FEATURE_DS5002FP, 0x1db, "ibi"        },
232
 
        { FEATURE_DS5002FP, 0x1dc, "ae"         },
233
 
        { FEATURE_DS5002FP, 0x1dd, "exbs"       },
234
 
        { FEATURE_DS5002FP, 0x1de, "d8.6"       },
235
 
        { FEATURE_DS5002FP, 0x1df, "rnr"        },
236
 
 
237
 
        { FEATURE_I83C751, 0x1d8, "ct0"         },
238
 
        { FEATURE_I83C751, 0x1d9, "ct1"         },
239
 
        { FEATURE_I83C751, 0x1da, "i2cfg.2"     },
240
 
        { FEATURE_I83C751, 0x1db, "i2cfg.3"     },
241
 
        { FEATURE_I83C751, 0x1dc, "tirun"       },
242
 
        { FEATURE_I83C751, 0x1dd, "clrti"       },
243
 
        { FEATURE_I83C751, 0x1de, "masterq"     },
244
 
        { FEATURE_I83C751, 0x1df, "slaven"      },
245
 
 
246
 
        { FEATURE_I83C751, 0x1f8, "xstp"        },
247
 
        { FEATURE_I83C751, 0x1f9, "xstr"        },
248
 
        { FEATURE_I83C751, 0x1fa, "makstp"      },
249
 
        { FEATURE_I83C751, 0x1fb, "makstr"      },
250
 
        { FEATURE_I83C751, 0x1fc, "xactv"       },
251
 
        { FEATURE_I83C751, 0x1fd, "xdata"       },
252
 
        { FEATURE_I83C751, 0x1fe, "idle"        },
253
 
        { FEATURE_I83C751, 0x1ff, "i2sta.7"     },
254
 
 
255
 
        /* unknown
256
 
     * "ibf",    "obf",    "idsm",   "obfc",    e8 - eb
257
 
     * "ma0",    "ma1",    "mb0",    "mb1",     ec - ef
258
 
     */
259
 
 
260
 
        { -1 }
261
 
};
262
 
 
263
 
static void init_mem_names(int feature_set, const char **mem_names)
264
 
{
265
 
        int i;
266
 
        int feature;
267
 
 
268
 
        /* Set defaults / i8051 */
269
 
        for (i = 0; feature = mem_name_feature[i].feature, feature >= 0; i++)
270
 
        {
271
 
                if ( feature == FEATURE_NONE )
272
 
                        mem_names[mem_name_feature[i].addr] = mem_name_feature[i].name;
273
 
        }
274
 
 
275
 
        /* Set specific memory names */
276
 
        for (i = 0; feature = mem_name_feature[i].feature, feature >= 0; i++)
277
 
        {
278
 
                if (feature & feature_set)
279
 
                        mem_names[mem_name_feature[i].addr] = mem_name_feature[i].name;
280
 
        }
281
 
 
282
 
}
283
 
 
284
 
static const char *get_data_address( const char **mem_names, UINT8 arg )
285
 
{
286
 
        static char buffer_array[4][32];
287
 
        static int whichbuf;
288
 
        char *buffer = &buffer_array[++whichbuf % 4][0];
289
 
 
290
 
        if (mem_names[arg] == NULL)
291
 
                sprintf(buffer,"$%02X",arg);
292
 
        else
293
 
                sprintf(buffer,"%s", mem_names[arg]);
294
 
        return buffer;
295
 
}
296
 
 
297
 
static const char *get_bit_address( const char **mem_names, UINT8 arg )
298
 
{
299
 
        static char buffer[32];
300
 
 
301
 
        if(arg < 0x80)
302
 
        {
303
 
                //Bit address 0-7F can be referred to as 20.0, 20.1, to 20.7 for address 0, and 2f.0,2f.1 to 2f.7 for address 7f
304
 
                if(arg < 0x7f)
305
 
                        sprintf(buffer,"$%02X.%d",(arg >> 3) | 0x20, arg & 0x07);
306
 
                else
307
 
                        sprintf(buffer,"$%02X",arg);
308
 
        }
309
 
        else
310
 
        {
311
 
                if (mem_names[arg | 0x100] == NULL)
312
 
                {
313
 
                        if (mem_names[arg & 0xf8] == NULL)
314
 
                                sprintf(buffer,"$%02X.%d", arg & 0xf8, arg & 0x07);
315
 
                        else
316
 
                                sprintf(buffer,"%s.%d", mem_names[arg & 0xf8], arg & 0x07);
317
 
                }
318
 
                else
319
 
                        sprintf(buffer,"%s", mem_names[arg | 0x100]);
320
 
        }
321
 
        return buffer;
322
 
}
323
 
 
324
 
#else
325
 
 
326
 
/*Just display the actual memory address for data & bit address access*/
327
 
 
328
 
static const char *get_data_address( UINT8 arg )
329
 
{
330
 
        static char buffer[32];
331
 
        sprintf(buffer,"$%02X",arg);
332
 
        return buffer;
333
 
}
334
 
 
335
 
static const char *get_bit_address( UINT8 arg )
336
 
{
337
 
        static char buffer[32];
338
 
        sprintf(buffer,"$%02X",arg);
339
 
        return buffer;
340
 
}
341
 
 
342
 
#endif
343
 
 
344
 
static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
345
 
{
346
 
        UINT32 flags = 0;
347
 
        unsigned PC = pc;
348
 
        const char *sym, *sym2;
349
 
    UINT8 op, data;
350
 
        UINT16 addr;
351
 
        INT8 rel;
352
 
 
353
 
        op = oprom[PC++ - pc];
354
 
        switch( op )
355
 
        {
356
 
                //NOP
357
 
                case 0x00:                              /* 1: 0000 0000 */
358
 
                        sprintf(dst, "nop");
359
 
                        break;
360
 
 
361
 
                //AJMP code addr        /* 1: aaa0 0001 */
362
 
                case 0x01:
363
 
                case 0x21:
364
 
                case 0x41:
365
 
                case 0x61:
366
 
                case 0x81:
367
 
                case 0xa1:
368
 
                case 0xc1:
369
 
                case 0xe1:
370
 
                        addr = opram[PC++ - pc];
371
 
                        addr|= (PC & 0xf800) | ((op & 0xe0) << 3);
372
 
                        sprintf(dst, "ajmp  $%04X", addr);
373
 
                        break;
374
 
 
375
 
                //LJMP code addr
376
 
                case 0x02:                              /* 1: 0000 0010 */
377
 
                        addr = (opram[PC++ - pc]<<8) & 0xff00;
378
 
                        addr|= opram[PC++ - pc];
379
 
                        sprintf(dst, "ljmp  $%04X", addr);
380
 
                        break;
381
 
 
382
 
                //RR A
383
 
                case 0x03:                              /* 1: 0000 0011 */
384
 
                        sprintf(dst, "rr    a");
385
 
                        break;
386
 
 
387
 
                //INC A
388
 
                case 0x04:                              /* 1: 0000 0100 */
389
 
                        sprintf(dst, "inc   a");
390
 
                        break;
391
 
 
392
 
                //INC data addr
393
 
                case 0x05:                              /* 1: 0000 0101 */
394
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
395
 
                        sprintf(dst, "inc   %s", sym);
396
 
                        break;
397
 
 
398
 
                //INC @R0/@R1           /* 1: 0000 011i */
399
 
                case 0x06:
400
 
                case 0x07:
401
 
                        sprintf(dst, "inc   @r%d", op&1);
402
 
                        break;
403
 
 
404
 
                //INC R0 to R7          /* 1: 0000 1rrr */
405
 
                case 0x08:
406
 
                case 0x09:
407
 
                case 0x0a:
408
 
                case 0x0b:
409
 
                case 0x0c:
410
 
                case 0x0d:
411
 
                case 0x0e:
412
 
                case 0x0f:
413
 
                        sprintf(dst, "inc   r%d", op&7);
414
 
                        break;
415
 
 
416
 
                //JBC bit addr, code addr
417
 
                case 0x10:                              /* 1: 0001 0000 */
418
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
419
 
                        rel  = opram[PC++ - pc];
420
 
                        sprintf(dst, "jbc   %s,$%04X", sym, PC + rel);
421
 
                        break;
422
 
 
423
 
                //ACALL code addr       /* 1: aaa1 0001 */
424
 
                case 0x11:
425
 
                case 0x31:
426
 
                case 0x51:
427
 
                case 0x71:
428
 
                case 0x91:
429
 
                case 0xb1:
430
 
                case 0xd1:
431
 
                case 0xf1:
432
 
                        sprintf(dst, "acall $%04X", (PC & 0xf800) | ((op & 0xe0) << 3) | opram[PC - pc]);
433
 
                        PC++;
434
 
                        flags = DASMFLAG_STEP_OVER;
435
 
                        break;
436
 
 
437
 
                //LCALL code addr
438
 
                case 0x12:                              /* 1: 0001 0010 */
439
 
                        addr = (opram[PC++ - pc]<<8) & 0xff00;
440
 
                        addr|= opram[PC++ - pc];
441
 
                        sprintf(dst, "lcall $%04X", addr);
442
 
                        flags = DASMFLAG_STEP_OVER;
443
 
                        break;
444
 
 
445
 
                //RRC A
446
 
                case 0x13:                              /* 1: 0001 0011 */
447
 
                        sprintf(dst, "rrc   a");
448
 
                        break;
449
 
 
450
 
                //DEC A
451
 
                case 0x14:                              /* 1: 0001 0100 */
452
 
                        sprintf(dst, "dec   a");
453
 
                        break;
454
 
 
455
 
                //DEC data addr
456
 
                case 0x15:                              /* 1: 0001 0101 */
457
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
458
 
                        sprintf(dst, "dec   %s", sym);
459
 
                        break;
460
 
 
461
 
                //Unable to test
462
 
                //DEC @R0/@R1           /* 1: 0001 011i */
463
 
                case 0x16:
464
 
                case 0x17:
465
 
                        sprintf(dst, "dec   @r%d", op&1);
466
 
                        break;
467
 
 
468
 
                //DEC R0 to R7          /* 1: 0001 1rrr */
469
 
                case 0x18:
470
 
                case 0x19:
471
 
                case 0x1a:
472
 
                case 0x1b:
473
 
                case 0x1c:
474
 
                case 0x1d:
475
 
                case 0x1e:
476
 
                case 0x1f:
477
 
                        sprintf(dst, "dec   r%d", op&7);
478
 
                        break;
479
 
 
480
 
                //JB  bit addr, code addr
481
 
                case 0x20:                              /* 1: 0010 0000 */
482
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
483
 
                        rel  = opram[PC++ - pc];
484
 
                        sprintf(dst, "jb    %s,$%04X", sym, (PC + rel));
485
 
                        break;
486
 
 
487
 
                //RET
488
 
                case 0x22:                              /* 1: 0010 0010 */
489
 
                        sprintf(dst, "ret");
490
 
                        flags = DASMFLAG_STEP_OUT;
491
 
                        break;
492
 
 
493
 
                //RL A
494
 
                case 0x23:                              /* 1: 0010 0011 */
495
 
                        sprintf(dst, "rl    a");
496
 
                        break;
497
 
 
498
 
                //ADD A, #data
499
 
                case 0x24:                              /* 1: 0010 0100 */
500
 
                        sprintf(dst, "add   a,#$%02X", opram[PC++ - pc]);
501
 
                        break;
502
 
 
503
 
                //ADD A, data addr
504
 
                case 0x25:                              /* 1: 0010 0101 */
505
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
506
 
                        sprintf(dst, "add   a,%s", sym);
507
 
                        break;
508
 
 
509
 
                //Unable to Test
510
 
                //ADD A, @R0/@R1        /* 1: 0010 011i */
511
 
                case 0x26:
512
 
                case 0x27:
513
 
                        sprintf(dst, "add   a,@r%d", op&1);
514
 
                        break;
515
 
 
516
 
                //ADD A, R0 to R7       /* 1: 0010 1rrr */
517
 
                case 0x28:
518
 
                case 0x29:
519
 
                case 0x2a:
520
 
                case 0x2b:
521
 
                case 0x2c:
522
 
                case 0x2d:
523
 
                case 0x2e:
524
 
                case 0x2f:
525
 
                        sprintf(dst, "add   a,r%d", op&7);
526
 
                        break;
527
 
 
528
 
                //JNB bit addr, code addr
529
 
                case 0x30:                              /* 1: 0011 0000 */
530
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
531
 
                        rel  = opram[PC++ - pc];
532
 
                        sprintf(dst, "jnb   %s,$%04X", sym, (PC + rel));
533
 
                        break;
534
 
 
535
 
                //RETI
536
 
                case 0x32:                              /* 1: 0011 0010 */
537
 
                        sprintf(dst, "reti");
538
 
                        flags = DASMFLAG_STEP_OUT;
539
 
                        break;
540
 
 
541
 
                //RLC A
542
 
                case 0x33:                              /* 1: 0011 0011 */
543
 
                        sprintf(dst, "rlc   a");
544
 
                        break;
545
 
 
546
 
                //ADDC A, #data
547
 
                case 0x34:                              /* 1: 0011 0100 */
548
 
                        sprintf(dst, "addc  a,#$%02X", opram[PC++ - pc]);
549
 
                        break;
550
 
 
551
 
                //ADDC A, data addr
552
 
                case 0x35:                              /* 1: 0011 0101 */
553
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
554
 
                        sprintf(dst, "addc  a,%s", sym);
555
 
                        break;
556
 
 
557
 
                //ADDC A, @R0/@R1       /* 1: 0011 011i */
558
 
                case 0x36:
559
 
                case 0x37:
560
 
                        sprintf(dst, "addc  a,@r%d", op&1);
561
 
                        break;
562
 
 
563
 
                //ADDC A, R0 to R7      /* 1: 0011 1rrr */
564
 
                case 0x38:
565
 
                case 0x39:
566
 
                case 0x3a:
567
 
                case 0x3b:
568
 
                case 0x3c:
569
 
                case 0x3d:
570
 
                case 0x3e:
571
 
                case 0x3f:
572
 
                        sprintf(dst, "addc  a,r%d", op&7);
573
 
                        break;
574
 
 
575
 
                //JC code addr
576
 
                case 0x40:                              /* 1: 0100 0000 */
577
 
                        rel = opram[PC++ - pc];
578
 
                        sprintf(dst, "jc    $%04X", PC + rel);
579
 
                        break;
580
 
 
581
 
                //ORL data addr, A
582
 
                case 0x42:                              /* 1: 0100 0010 */
583
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
584
 
                        sprintf(dst, "orl   %s,a", sym);
585
 
                        break;
586
 
 
587
 
                //ORL data addr, #data
588
 
                case 0x43:                              /* 1: 0100 0011 */
589
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
590
 
                        sprintf(dst, "orl   %s,#$%02X", sym, opram[PC++ - pc]);
591
 
                        break;
592
 
 
593
 
                //Unable to Test
594
 
                //ORL A, #data
595
 
                case 0x44:                              /* 1: 0100 0100 */
596
 
                        sprintf(dst, "orl   a,#$%02X", opram[PC++ - pc]);
597
 
                        break;
598
 
 
599
 
                //ORL A, data addr
600
 
                case 0x45:                              /* 1: 0100 0101 */
601
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
602
 
                        sprintf(dst, "orl   a,%s", sym);
603
 
                        break;
604
 
 
605
 
                //ORL A, @RO/@R1        /* 1: 0100 011i */
606
 
                case 0x46:
607
 
                case 0x47:
608
 
                        sprintf(dst, "orl   a,@r%d", op&1);
609
 
                        break;
610
 
 
611
 
                //ORL A, RO to R7       /* 1: 0100 1rrr */
612
 
                case 0x48:
613
 
                case 0x49:
614
 
                case 0x4a:
615
 
                case 0x4b:
616
 
                case 0x4c:
617
 
                case 0x4d:
618
 
                case 0x4e:
619
 
                case 0x4f:
620
 
                        sprintf(dst, "orl   a,r%d", op&7);
621
 
                        break;
622
 
 
623
 
                //JNC code addr
624
 
                case 0x50:                              /* 1: 0101 0000 */
625
 
                        rel = opram[PC++ - pc];
626
 
                        sprintf(dst, "jnc   $%04X", PC + rel);
627
 
                        break;
628
 
 
629
 
                //Unable to test
630
 
                //ANL data addr, A
631
 
                case 0x52:                              /* 1: 0101 0010 */
632
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
633
 
                        sprintf(dst, "anl   %s,a", sym);
634
 
                        break;
635
 
 
636
 
                //Unable to test
637
 
                //ANL data addr, #data
638
 
                case 0x53:                              /* 1: 0101 0011 */
639
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
640
 
                        sprintf(dst, "anl   %s,#$%02X", sym, opram[PC++ - pc]);
641
 
                        break;
642
 
 
643
 
                //ANL A, #data
644
 
                case 0x54:                              /* 1: 0101 0100 */
645
 
                        sprintf(dst, "anl   a,#$%02X", opram[PC++ - pc]);
646
 
                        break;
647
 
 
648
 
                //ANL A, data addr
649
 
                case 0x55:                              /* 1: 0101 0101 */
650
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
651
 
                        sprintf(dst, "anl   a,%s", sym);
652
 
                        break;
653
 
 
654
 
                //Unable to test
655
 
                //ANL A, @RO/@R1        /* 1: 0101 011i */
656
 
                case 0x56:
657
 
                case 0x57:
658
 
                        sprintf(dst, "anl   a,@r%d", op&1);
659
 
                        break;
660
 
 
661
 
                //ANL A, RO to R7       /* 1: 0101 1rrr */
662
 
                case 0x58:
663
 
                case 0x59:
664
 
                case 0x5a:
665
 
                case 0x5b:
666
 
                case 0x5c:
667
 
                case 0x5d:
668
 
                case 0x5e:
669
 
                case 0x5f:
670
 
                        sprintf(dst, "anl   a,r%d", op&7);
671
 
                        break;
672
 
 
673
 
                //JZ code addr
674
 
                case 0x60:                              /* 1: 0110 0000 */
675
 
                        rel = opram[PC++ - pc];
676
 
                        sprintf(dst, "jz    $%04X", PC + rel);
677
 
                        break;
678
 
 
679
 
                //Unable to test
680
 
                //XRL data addr, A
681
 
                case 0x62:                              /* 1: 0110 0010 */
682
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
683
 
                        sprintf(dst, "xrl   %s,a", sym);
684
 
                        break;
685
 
 
686
 
                //XRL data addr, #data
687
 
                case 0x63:                              /* 1: 0110 0011 */
688
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
689
 
                        sprintf(dst, "xrl   %s,#$%02X", sym, opram[PC++ - pc]);
690
 
                        break;
691
 
 
692
 
                //XRL A, #data
693
 
                case 0x64:                              /* 1: 0110 0100 */
694
 
                        sprintf(dst, "xrl   a,#$%02X", opram[PC++ - pc]);
695
 
                        break;
696
 
 
697
 
                //XRL A, data addr
698
 
                case 0x65:                              /* 1: 0110 0101 */
699
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
700
 
                        sprintf(dst, "xrl   a,%s", sym);
701
 
                        break;
702
 
 
703
 
                //Unable to test
704
 
                //XRL A, @R0/@R1        /* 1: 0110 011i */
705
 
                case 0x66:
706
 
                case 0x67:
707
 
                        sprintf(dst, "xrl   a,@r%d", op&1);
708
 
                        break;
709
 
 
710
 
                //XRL A, R0 to R7       /* 1: 0110 1rrr */
711
 
                case 0x68:
712
 
                case 0x69:
713
 
                case 0x6a:
714
 
                case 0x6b:
715
 
                case 0x6c:
716
 
                case 0x6d:
717
 
                case 0x6e:
718
 
                case 0x6f:
719
 
                        sprintf(dst, "xrl   a,r%d", op&7);
720
 
                        break;
721
 
 
722
 
                //JNZ code addr
723
 
                case 0x70:                              /* 1: 0111 0000 */
724
 
                        rel = opram[PC++ - pc];
725
 
                        sprintf(dst, "jnz   $%04X", PC + rel);
726
 
                        break;
727
 
 
728
 
                //Unable to test
729
 
                //ORL C, bit addr
730
 
                case 0x72:                              /* 1: 0111 0010 */
731
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
732
 
                        sprintf(dst, "orl   c,%s", sym);
733
 
                        break;
734
 
 
735
 
                //Unable to test
736
 
                //JMP @A+DPTR
737
 
                case 0x73:                              /* 1: 0111 0011 */
738
 
                        sprintf(dst, "jmp   @a+dptr");
739
 
                        break;
740
 
 
741
 
                //MOV A, #data
742
 
                case 0x74:                              /* 1: 0111 0100 */
743
 
                        sprintf(dst, "mov   a,#$%02X", opram[PC++ - pc]);
744
 
                        break;
745
 
 
746
 
                //MOV data addr, #data
747
 
                case 0x75:                              /* 1: 0111 0101 */
748
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
749
 
                        sprintf(dst, "mov   %s,#$%02X", sym, opram[PC++ - pc]);
750
 
                        break;
751
 
 
752
 
                //Unable to test
753
 
                //MOV @R0/@R1, #data    /* 1: 0111 011i */
754
 
                case 0x76:
755
 
                case 0x77:
756
 
                        sprintf(dst, "mov   @r%d,#$%02X", op&1, opram[PC++ - pc]);
757
 
                        break;
758
 
 
759
 
                //MOV R0 to R7, #data   /* 1: 0111 1rrr */
760
 
                case 0x78:
761
 
                case 0x79:
762
 
                case 0x7a:
763
 
                case 0x7b:
764
 
                case 0x7c:
765
 
                case 0x7d:
766
 
                case 0x7e:
767
 
                case 0x7f:
768
 
                        sprintf(dst, "mov   r%d,#$%02X", (op & 7), opram[PC++ - pc]);
769
 
                        break;
770
 
 
771
 
                //SJMP code addr
772
 
                case 0x80:                              /* 1: 1000 0000 */
773
 
                        rel = opram[PC++ - pc];
774
 
                        sprintf(dst, "sjmp  $%04X", PC + rel);
775
 
                        break;
776
 
 
777
 
                //ANL C, bit addr
778
 
                case 0x82:                              /* 1: 1000 0010 */
779
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
780
 
                        sprintf(dst, "anl   c,%s", sym);
781
 
                        break;
782
 
 
783
 
                //MOVC A, @A + PC
784
 
                case 0x83:                              /* 1: 1000 0011 */
785
 
                        sprintf(dst, "movc  a,@a+pc");
786
 
                        break;
787
 
 
788
 
                //DIV AB
789
 
                case 0x84:                              /* 1: 1000 0100 */
790
 
                        sprintf(dst, "div   ab");
791
 
                        break;
792
 
 
793
 
                //MOV data addr, data addr  (Note: 1st address is src, 2nd is dst, but the mov command works as mov dst,src)
794
 
                case 0x85:                              /* 1: 1000 0101 */
795
 
                        sym  = get_data_address(mem_names, opram[PC++ - pc]);
796
 
                        sym2 = get_data_address(mem_names, opram[PC++ - pc]);
797
 
                        sprintf(dst, "mov   %s,%s", sym2, sym);
798
 
                        break;
799
 
 
800
 
                //Unable to test
801
 
                //MOV data addr, @R0/@R1/* 1: 1000 011i */
802
 
                case 0x86:
803
 
                case 0x87:
804
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
805
 
                        sprintf(dst, "mov   %s,@r%d", sym, op&1);
806
 
                        break;
807
 
 
808
 
                //MOV data addr,R0 to R7/* 1: 1000 1rrr */
809
 
                case 0x88:
810
 
                case 0x89:
811
 
                case 0x8a:
812
 
                case 0x8b:
813
 
                case 0x8c:
814
 
                case 0x8d:
815
 
                case 0x8e:
816
 
                case 0x8f:
817
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
818
 
                        sprintf(dst, "mov   %s,r%d", sym, op&7);
819
 
                        break;
820
 
 
821
 
                //MOV DPTR, #data16
822
 
                case 0x90:                              /* 1: 1001 0000 */
823
 
                        addr = (opram[PC++ - pc]<<8) & 0xff00;
824
 
                        addr|= opram[PC++ - pc];
825
 
                        sprintf(dst, "mov   dptr,#$%04X", addr);
826
 
                        break;
827
 
 
828
 
                //MOV bit addr, C
829
 
                case 0x92:                              /* 1: 1001 0010 */
830
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
831
 
                        sprintf(dst, "mov   %s,c", sym);
832
 
                        break;
833
 
 
834
 
                //MOVC A, @A + DPTR
835
 
                case 0x93:                              /* 1: 1001 0011 */
836
 
                        sprintf(dst, "movc  a,@a+dptr");
837
 
                        break;
838
 
 
839
 
                //SUBB A, #data
840
 
                case 0x94:                              /* 1: 1001 0100 */
841
 
                        sprintf(dst, "subb  a,#$%02X", opram[PC++ - pc]);
842
 
                        break;
843
 
 
844
 
                //SUBB A, data addr
845
 
                case 0x95:                              /* 1: 1001 0101 */
846
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
847
 
                        sprintf(dst, "subb  a,%s", sym);
848
 
                        break;
849
 
 
850
 
                //Unable to test
851
 
                //SUBB A, @R0/@R1       /* 1: 1001 011i */
852
 
                case 0x96:
853
 
                case 0x97:
854
 
                        sprintf(dst, "subb  a,@r%d", op&1);
855
 
                        break;
856
 
 
857
 
                //SUBB A, R0 to R7      /* 1: 1001 1rrr */
858
 
                case 0x98:
859
 
                case 0x99:
860
 
                case 0x9a:
861
 
                case 0x9b:
862
 
                case 0x9c:
863
 
                case 0x9d:
864
 
                case 0x9e:
865
 
                case 0x9f:
866
 
                        sprintf(dst, "subb  a,r%d", op&7);
867
 
                        break;
868
 
 
869
 
                //Unable to test
870
 
                //ORL C, /bit addr
871
 
                case 0xa0:                                /* 1: 1010 0000 */
872
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
873
 
                        sprintf(dst, "orl   c,/%s", sym);
874
 
                        break;
875
 
 
876
 
                //MOV C, bit addr
877
 
                case 0xa2:                                /* 1: 1010 0010 */
878
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
879
 
                        sprintf(dst, "mov   c,%s", sym);
880
 
                        break;
881
 
 
882
 
                //INC DPTR
883
 
                case 0xa3:                                /* 1: 1010 0011 */
884
 
                        sprintf(dst, "inc   dptr");
885
 
                        break;
886
 
 
887
 
                //MUL AB
888
 
                case 0xa4:                                /* 1: 1010 0100 */
889
 
                        sprintf(dst, "mul   ab");
890
 
                        break;
891
 
 
892
 
                //reserved
893
 
                case 0xa5:                                /* 1: 1010 0101 */
894
 
                        sprintf(dst, "ill/rsv");
895
 
                        break;
896
 
 
897
 
                //Unable to test
898
 
                //MOV @R0/@R1, data addr  /* 1: 1010 011i */
899
 
                case 0xa6:
900
 
                case 0xa7:
901
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
902
 
                        sprintf(dst, "mov   @r%d,%s", op&1, sym);
903
 
                        break;
904
 
 
905
 
                //MOV R0 to R7, data addr /* 1: 1010 1rrr */
906
 
                case 0xa8:
907
 
                case 0xa9:
908
 
                case 0xaa:
909
 
                case 0xab:
910
 
                case 0xac:
911
 
                case 0xad:
912
 
                case 0xae:
913
 
                case 0xaf:
914
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
915
 
                        sprintf(dst, "mov   r%d,%s", op&7, sym);
916
 
                        break;
917
 
 
918
 
                //ANL C,/bit addr
919
 
                case 0xb0:                                               /* 1: 1011 0000 */
920
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
921
 
                        sprintf(dst, "anl   c,/%s", sym);
922
 
                        break;
923
 
 
924
 
                //CPL bit addr
925
 
                case 0xb2:                                               /* 1: 1011 0010 */
926
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
927
 
                        sprintf(dst, "cpl   %s", sym);
928
 
                        break;
929
 
 
930
 
                //Unable to test
931
 
                //CPL C
932
 
                case 0xb3:                                               /* 1: 1011 0011 */
933
 
                        sprintf(dst, "cpl   c");
934
 
                        break;
935
 
 
936
 
                //CJNE A, #data, code addr
937
 
                case 0xb4:                                               /* 1: 1011 0100 */
938
 
                        data = opram[PC++ - pc];
939
 
                        rel  = opram[PC++ - pc];
940
 
                        sprintf(dst, "cjne  a,#$%02X,$%04X", data, PC + rel);
941
 
                        break;
942
 
 
943
 
                //CJNE A, data addr, code addr
944
 
                case 0xb5:                                               /* 1: 1011 0101 */
945
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
946
 
                        rel  = opram[PC++ - pc];
947
 
                        sprintf(dst, "cjne  a,%s,$%04X", sym, PC + rel);
948
 
                        break;
949
 
 
950
 
                //Unable to test
951
 
                //CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
952
 
                case 0xb6:
953
 
                case 0xb7:
954
 
                        data = opram[PC++ - pc];
955
 
                        rel  = opram[PC++ - pc];
956
 
                        sprintf(dst, "cjne  @r%d,#$%02X,$%04X", op&1, data, PC + rel);
957
 
                        break;
958
 
 
959
 
                //CJNE R0 to R7, #data, code addr/* 1: 1011 1rrr */
960
 
                case 0xb8:
961
 
                case 0xb9:
962
 
                case 0xba:
963
 
                case 0xbb:
964
 
                case 0xbc:
965
 
                case 0xbd:
966
 
                case 0xbe:
967
 
                case 0xbf:
968
 
                        data = opram[PC++ - pc];
969
 
                        rel  = opram[PC++ - pc];
970
 
                        sprintf(dst, "cjne  r%d,#$%02X,$%04X", op&7, data, PC + rel);
971
 
                        break;
972
 
 
973
 
                //PUSH data addr
974
 
                case 0xc0:                                              /* 1: 1100 0000 */
975
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
976
 
                        sprintf(dst, "push  %s", sym);
977
 
                        break;
978
 
 
979
 
                //CLR bit addr
980
 
                case 0xc2:                                              /* 1: 1100 0010 */
981
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
982
 
                        sprintf(dst, "clr   %s", sym);
983
 
                        break;
984
 
 
985
 
                //CLR C
986
 
                case 0xc3:                                              /* 1: 1100 0011 */
987
 
                        sprintf(dst, "clr   c");
988
 
                        break;
989
 
 
990
 
                //SWAP A
991
 
                case 0xc4:                                              /* 1: 1100 0100 */
992
 
                        sprintf(dst, "swap  a");
993
 
                        break;
994
 
 
995
 
                //XCH A, data addr
996
 
                case 0xc5:                                              /* 1: 1100 0101 */
997
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
998
 
                        sprintf(dst, "xch   a,%s", sym);
999
 
                        break;
1000
 
 
1001
 
                //XCH A, @RO/@R1                /* 1: 1100 011i */
1002
 
                case 0xc6:
1003
 
                case 0xc7:
1004
 
                        sprintf(dst, "xch   a,@r%d", op&1);
1005
 
                        break;
1006
 
 
1007
 
                //XCH A, RO to R7               /* 1: 1100 1rrr */
1008
 
                case 0xc8:
1009
 
                case 0xc9:
1010
 
                case 0xca:
1011
 
                case 0xcb:
1012
 
                case 0xcc:
1013
 
                case 0xcd:
1014
 
                case 0xce:
1015
 
                case 0xcf:
1016
 
                        sprintf(dst, "xch   a,r%d", op&7);
1017
 
                        break;
1018
 
 
1019
 
                //POP data addr
1020
 
                case 0xd0:                                              /* 1: 1101 0000 */
1021
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
1022
 
                        sprintf(dst, "pop   %s", sym);
1023
 
                        break;
1024
 
 
1025
 
                //SETB bit addr
1026
 
                case 0xd2:                                              /* 1: 1101 0010 */
1027
 
                        sym = get_bit_address(mem_names, opram[PC++ - pc]);
1028
 
                        sprintf(dst, "setb  %s", sym);
1029
 
                        break;
1030
 
 
1031
 
                //SETB C
1032
 
                case 0xd3:                                              /* 1: 1101 0011 */
1033
 
                        sprintf(dst, "setb  c");
1034
 
                        break;
1035
 
 
1036
 
                //Unable to test
1037
 
                //DA A
1038
 
                case 0xd4:                                              /* 1: 1101 0100 */
1039
 
                        sprintf(dst, "da   a");
1040
 
                        break;
1041
 
 
1042
 
                //DJNZ data addr, code addr
1043
 
                case 0xd5:                                              /* 1: 1101 0101 */
1044
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
1045
 
                        rel  = opram[PC++ - pc];
1046
 
                        sprintf(dst, "djnz  %s,$%04X", sym, PC + rel);
1047
 
                        flags = DASMFLAG_STEP_OVER;
1048
 
                        break;
1049
 
 
1050
 
                //XCHD A, @R0/@R1               /* 1: 1101 011i */
1051
 
                case 0xd6:
1052
 
                case 0xd7:
1053
 
                        sprintf(dst, "xchd  a,@r%d", op&1);
1054
 
                        break;
1055
 
 
1056
 
                //DJNZ R0 to R7,code addr       /* 1: 1101 1rrr */
1057
 
                case 0xd8:
1058
 
                case 0xd9:
1059
 
                case 0xda:
1060
 
                case 0xdb:
1061
 
                case 0xdc:
1062
 
                case 0xdd:
1063
 
                case 0xde:
1064
 
                case 0xdf:
1065
 
                        rel = opram[PC++ - pc];
1066
 
                        sprintf(dst, "djnz  r%d,$%04X", op&7, (PC + rel));
1067
 
                        flags = DASMFLAG_STEP_OVER;
1068
 
                        break;
1069
 
 
1070
 
                //MOVX A,@DPTR
1071
 
                case 0xe0:                                              /* 1: 1110 0000 */
1072
 
                        sprintf(dst, "movx  a,@dptr");
1073
 
                        break;
1074
 
 
1075
 
                //Unable to test
1076
 
                //MOVX A, @R0/@R1               /* 1: 1110 001i */
1077
 
                case 0xe2:
1078
 
                case 0xe3:
1079
 
                        sprintf(dst, "movx  a,@r%d", op&1);
1080
 
                        break;
1081
 
 
1082
 
                //CLR A
1083
 
                case 0xe4:                                              /* 1: 1110 0100 */
1084
 
                        sprintf(dst, "clr   a");
1085
 
                        break;
1086
 
 
1087
 
                //MOV A, data addr
1088
 
                case 0xe5:                                              /* 1: 1110 0101 */
1089
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
1090
 
                        sprintf(dst, "mov   a,%s", sym);
1091
 
                        break;
1092
 
 
1093
 
                //Unable to test
1094
 
                //MOV A,@RO/@R1                 /* 1: 1110 011i */
1095
 
                case 0xe6:
1096
 
                case 0xe7:
1097
 
                        sprintf(dst, "mov   a,@r%d", op&1);
1098
 
                        break;
1099
 
 
1100
 
                //MOV A,R0 to R7                /* 1: 1110 1rrr */
1101
 
                case 0xe8:
1102
 
                case 0xe9:
1103
 
                case 0xea:
1104
 
                case 0xeb:
1105
 
                case 0xec:
1106
 
                case 0xed:
1107
 
                case 0xee:
1108
 
                case 0xef:
1109
 
                        sprintf(dst, "mov   a,r%d", op&7);
1110
 
                        break;
1111
 
 
1112
 
                //MOVX @DPTR,A
1113
 
                case 0xf0:                                              /* 1: 1111 0000 */
1114
 
                        sprintf(dst, "movx  @dptr,a");
1115
 
                        break;
1116
 
 
1117
 
                //Unable to test
1118
 
                //MOVX @R0/@R1,A                /* 1: 1111 001i */
1119
 
                case 0xf2:
1120
 
                case 0xf3:
1121
 
                        sprintf(dst, "movx  @r%d,a", op&1);
1122
 
                        break;
1123
 
 
1124
 
                //CPL A
1125
 
                case 0xf4:                                              /* 1: 1111 0100 */
1126
 
                        sprintf(dst, "cpl   a");
1127
 
                        break;
1128
 
 
1129
 
                //MOV data addr, A
1130
 
                case 0xf5:                                              /* 1: 1111 0101 */
1131
 
                        sym = get_data_address(mem_names, opram[PC++ - pc]);
1132
 
                        sprintf(dst, "mov   %s,a", sym);
1133
 
                        break;
1134
 
 
1135
 
                //MOV @R0/@R1, A                /* 1: 1111 011i */
1136
 
                case 0xf6:
1137
 
                case 0xf7:
1138
 
                        sprintf(dst, "mov   @r%d,a", op&1);
1139
 
                        break;
1140
 
 
1141
 
                //MOV R0 to R7, A               /* 1: 1111 1rrr */
1142
 
                case 0xf8:
1143
 
                case 0xf9:
1144
 
                case 0xfa:
1145
 
                case 0xfb:
1146
 
                case 0xfc:
1147
 
                case 0xfd:
1148
 
                case 0xfe:
1149
 
                case 0xff:
1150
 
                        sprintf(dst, "mov   r%d,a", op&7);
1151
 
                        break;
1152
 
 
1153
 
                default:
1154
 
                        sprintf(dst, "illegal");
1155
 
    }
1156
 
        return (PC - pc) | flags | DASMFLAG_SUPPORTED;
1157
 
 
1158
 
}
1159
 
 
1160
 
CPU_DISASSEMBLE( i8051 )
1161
 
{
1162
 
        static const char *mem_names[0x200];
1163
 
        static int mem_names_initialized = 0;
1164
 
 
1165
 
        if (!mem_names_initialized)
1166
 
        {
1167
 
        init_mem_names( FEATURE_NONE, mem_names);
1168
 
        mem_names_initialized = 1;
1169
 
        }
1170
 
        return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1171
 
}
1172
 
 
1173
 
CPU_DISASSEMBLE( i8052 )
1174
 
{
1175
 
        static const char *mem_names[0x200];
1176
 
        static int mem_names_initialized = 0;
1177
 
 
1178
 
        if (!mem_names_initialized)
1179
 
        {
1180
 
        init_mem_names( FEATURE_I8052, mem_names);
1181
 
        mem_names_initialized = 1;
1182
 
        }
1183
 
        return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1184
 
}
1185
 
 
1186
 
CPU_DISASSEMBLE( i80c51 )
1187
 
{
1188
 
        static const char *mem_names[0x200];
1189
 
        static int mem_names_initialized = 0;
1190
 
 
1191
 
        if (!mem_names_initialized)
1192
 
        {
1193
 
        init_mem_names( FEATURE_CMOS, mem_names);
1194
 
        mem_names_initialized = 1;
1195
 
        }
1196
 
        return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1197
 
}
1198
 
 
1199
 
CPU_DISASSEMBLE( i80c52 )
1200
 
{
1201
 
        static const char *mem_names[0x200];
1202
 
        static int mem_names_initialized = 0;
1203
 
 
1204
 
        if (!mem_names_initialized)
1205
 
        {
1206
 
        init_mem_names( FEATURE_I8052 | FEATURE_CMOS | FEATURE_I80C52, mem_names);
1207
 
        mem_names_initialized = 1;
1208
 
        }
1209
 
        return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1210
 
}
1211
 
 
1212
 
CPU_DISASSEMBLE( ds5002fp )
1213
 
{
1214
 
        static const char *mem_names[0x200];
1215
 
        static int mem_names_initialized = 0;
1216
 
 
1217
 
        if (!mem_names_initialized)
1218
 
        {
1219
 
        init_mem_names( FEATURE_DS5002FP | FEATURE_CMOS, mem_names);
1220
 
        mem_names_initialized = 1;
1221
 
        }
1222
 
        return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
1223
 
}