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#include "video/stic.h"
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#include "includes/intv.h"
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READ16_HANDLER( intv_stic_r )
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intv_state *state = space->machine().driver_data<intv_state>();
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//logerror("%x = stic_r(%x)\n",0,offset);
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case STIC_MXR + STIC_MOB0:
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case STIC_MXR + STIC_MOB1:
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case STIC_MXR + STIC_MOB2:
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case STIC_MXR + STIC_MOB3:
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case STIC_MXR + STIC_MOB4:
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case STIC_MXR + STIC_MOB5:
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case STIC_MXR + STIC_MOB6:
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case STIC_MXR + STIC_MOB7:
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return 0x3800 | (state->m_stic_registers[offset] & 0x07FF);
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case STIC_MYR + STIC_MOB0:
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case STIC_MYR + STIC_MOB1:
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case STIC_MYR + STIC_MOB2:
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case STIC_MYR + STIC_MOB3:
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case STIC_MYR + STIC_MOB4:
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case STIC_MYR + STIC_MOB5:
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case STIC_MYR + STIC_MOB6:
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case STIC_MYR + STIC_MOB7:
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return 0x3000 | (state->m_stic_registers[offset] & 0x0FFF);
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case STIC_MAR + STIC_MOB0:
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case STIC_MAR + STIC_MOB1:
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case STIC_MAR + STIC_MOB2:
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case STIC_MAR + STIC_MOB3:
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case STIC_MAR + STIC_MOB4:
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case STIC_MAR + STIC_MOB5:
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case STIC_MAR + STIC_MOB6:
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case STIC_MAR + STIC_MOB7:
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return state->m_stic_registers[offset] & 0x3FFF;
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case STIC_MCR + STIC_MOB0:
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case STIC_MCR + STIC_MOB1:
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case STIC_MCR + STIC_MOB2:
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case STIC_MCR + STIC_MOB3:
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case STIC_MCR + STIC_MOB4:
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case STIC_MCR + STIC_MOB5:
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case STIC_MCR + STIC_MOB6:
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case STIC_MCR + STIC_MOB7:
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return 0x3C00 | (state->m_stic_registers[offset] & 0x03FF);
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state->m_color_stack_mode = 1;
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//logerror("Setting color stack mode\n");
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/*** fall through ***/
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case STIC_CSR + STIC_CSR0:
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case STIC_CSR + STIC_CSR1:
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case STIC_CSR + STIC_CSR2:
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case STIC_CSR + STIC_CSR3:
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return 0x3FF0 | (state->m_stic_registers[offset] & 0x000F);
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return 0x3FF8 | (state->m_stic_registers[offset] & 0x0007);
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return 0x3FFC | (state->m_stic_registers[offset] & 0x0003);
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//logerror("unmapped read from STIC register %02X\n", offset);
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WRITE16_HANDLER( intv_stic_w )
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intv_state *state = space->machine().driver_data<intv_state>();
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//logerror("stic_w(%x) = %x\n",offset,data);
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case STIC_MXR + STIC_MOB0:
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case STIC_MXR + STIC_MOB1:
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case STIC_MXR + STIC_MOB2:
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case STIC_MXR + STIC_MOB3:
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case STIC_MXR + STIC_MOB4:
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case STIC_MXR + STIC_MOB5:
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case STIC_MXR + STIC_MOB6:
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case STIC_MXR + STIC_MOB7:
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s = &state->m_sprite[offset & (STIC_MOBS - 1)];
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s->doublex = !!(data & STIC_MXR_XSIZE);
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s->visible = !!(data & STIC_MXR_VIS);
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s->coll = !!(data & STIC_MXR_COL);
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s->xpos = (data & STIC_MXR_X);
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case STIC_MYR + STIC_MOB0:
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case STIC_MYR + STIC_MOB1:
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case STIC_MYR + STIC_MOB2:
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case STIC_MYR + STIC_MOB3:
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case STIC_MYR + STIC_MOB4:
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case STIC_MYR + STIC_MOB5:
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case STIC_MYR + STIC_MOB6:
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case STIC_MYR + STIC_MOB7:
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s = &state->m_sprite[offset & (STIC_MOBS - 1)];
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s->yflip = !!(data & STIC_MYR_YFLIP);
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s->xflip = !!(data & STIC_MYR_XFLIP);
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s->quady = !!(data & STIC_MYR_YSIZE);
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s->doubley = !!(data & STIC_MYR_YFULL);
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s->doubleyres = !!(data & STIC_MYR_YRES);
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s->ypos = (data & STIC_MYR_Y);
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case STIC_MAR + STIC_MOB0:
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case STIC_MAR + STIC_MOB1:
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case STIC_MAR + STIC_MOB2:
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case STIC_MAR + STIC_MOB3:
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case STIC_MAR + STIC_MOB4:
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case STIC_MAR + STIC_MOB5:
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case STIC_MAR + STIC_MOB6:
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case STIC_MAR + STIC_MOB7:
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s = &state->m_sprite[offset & (STIC_MOBS - 1)];
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s->behind_foreground = !!(data & STIC_MAR_PRI);
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s->grom = !(data & STIC_MAR_SEL);
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s->card = ((data & STIC_MAR_C) >> 3);
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s->color = ((data & STIC_MAR_FG3) >> 9) | (data & STIC_MAR_FG20);
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/* Collision Detection - TBD */
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case STIC_MCR + STIC_MOB0:
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case STIC_MCR + STIC_MOB1:
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case STIC_MCR + STIC_MOB2:
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case STIC_MCR + STIC_MOB3:
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case STIC_MCR + STIC_MOB4:
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case STIC_MCR + STIC_MOB5:
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case STIC_MCR + STIC_MOB6:
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case STIC_MCR + STIC_MOB7:
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// a MOB's own collision bit is *always* zero, even if a
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// one is poked into it
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data &= ~(1 << (offset & (STIC_MOBS - 1)));
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//logerror("***Writing a %x to the STIC handshake\n",data);
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state->m_stic_handshake = 1;
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state->m_color_stack_mode = 0;
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case STIC_CSR + STIC_CSR0:
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case STIC_CSR + STIC_CSR1:
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case STIC_CSR + STIC_CSR2:
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case STIC_CSR + STIC_CSR3:
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logerror("Setting color_stack[%x] = %x (%x)\n", offset & (STIC_CSRS - 1),data & STIC_CSR_BG, cpu_get_pc(&space->device()));
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//logerror("***Writing a %x to the border color\n",data);
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state->m_border_color = data & STIC_BCR_BC;
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state->m_col_delay = data & STIC_HDR_DEL;
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state->m_row_delay = data & STIC_VDR_DEL;
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state->m_left_edge_inhibit = (data & STIC_CBR_COL);
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state->m_top_edge_inhibit = (data & STIC_CBR_ROW) >> 1;
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//logerror("unmapped write to STIC register %02X: %04X\n", offset, data);
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if (offset < sizeof(state->m_stic_registers) / sizeof(state->m_stic_registers[0]))
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state->m_stic_registers[offset] = data;