3
Lucky Girl (newer 1991 version on different hardware?)
4
-- there is an early 'Lucky Girl' which appears to be running on Nichibutsu like hardware.
6
The program rom extracted from the Z180 also refers to this as Lucky 74..
9
- inputs / port mapping
10
- sound (what's the sound chip?)
11
- reel scroll / reel enable / reel colours
12
- are the colours correct even on the text layer? they look odd in places, and there are unused bits
13
- dunno where / how is the service mode bit is connected (I've accessed it once, but dunno how I've did it)
21
"DREW'S UNDER WARRANTY IF REMOVED N3357"
22
"No.A 120307 LICENSE WING SEAL"
27
1C - EAGLE 1 27C010 equiv. mask ROM
28
1E - EAGLE 2 27C010 equiv. mask ROM
29
1H - EAGLE 3 27C010 equiv. mask ROM
30
1L - FALCON 4 27C010 equiv. mask ROM
31
1N - FALCON 5 27C010 equiv. mask ROM
32
1P - FALCON 6 27C010 equiv. mask ROM
33
1T - FALCON 13 27C010 EPROM
35
* ROMs 1-6 may need redumping, they could be half size.
39
2x LH5186D-01L 28-pin PDIP Video RAM and work RAM (battery backed)
40
2x CY7C128A-25PC 24-pin PDIP Probably color RAM
44
2x 06B53P 28-pin PDIP Unknown
45
1x 06B30P 40-pin PDIP Unknown
46
1x 101810P 64-pin SDIP Unknown
47
1x HG62E11B10P 64-pin SDIP Hitachi gate array (custom)
48
1x CPU module 90-pin SDIP
52
1x HD6845SP 40-pin PDIP CRTC
53
1x MB3771 8-pin PDIP Reset generator
54
1x Oki M62X428 18-pin PDIP Real-time clock
67
Looks like Hitachi part markings to me.
71
Has some optocouplers, high voltage drivers, and what looks like additional
74
Reset switch cuts power supply going to Video/Work RAM.
81
#include "cpu/z180/z180.h"
82
#include "video/mc6845.h"
83
#include "luckgrln.lh"
86
class luckgrln_state : public driver_device
89
luckgrln_state(const machine_config &mconfig, device_type type, const char *tag)
90
: driver_device(mconfig, type, tag) { }
96
tilemap_t *m_reel1_tilemap;
97
tilemap_t *m_reel2_tilemap;
98
tilemap_t *m_reel3_tilemap;
99
tilemap_t *m_reel4_tilemap;
104
UINT8* m_reel1_scroll;
105
UINT8* m_reel2_scroll;
106
UINT8* m_reel3_scroll;
107
UINT8* m_reel4_scroll;
113
UINT8 m_palette_ram[0x10000];
117
static WRITE8_HANDLER( luckgrln_reel1_ram_w )
119
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
120
state->m_reel1_ram[offset] = data;
121
tilemap_mark_tile_dirty(state->m_reel1_tilemap,offset);
124
static WRITE8_HANDLER( luckgrln_reel1_attr_w )
126
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
127
state->m_reel1_attr[offset] = data;
128
tilemap_mark_tile_dirty(state->m_reel1_tilemap,offset);
133
static TILE_GET_INFO( get_luckgrln_reel1_tile_info )
135
luckgrln_state *state = machine.driver_data<luckgrln_state>();
136
int code = state->m_reel1_ram[tile_index];
137
int attr = state->m_reel1_attr[tile_index];
138
int col = (attr & 0x1f);
140
code |= (attr & 0xe0)<<3;
151
static WRITE8_HANDLER( luckgrln_reel2_ram_w )
153
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
154
state->m_reel2_ram[offset] = data;
155
tilemap_mark_tile_dirty(state->m_reel2_tilemap,offset);
158
static WRITE8_HANDLER( luckgrln_reel2_attr_w )
160
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
161
state->m_reel2_attr[offset] = data;
162
tilemap_mark_tile_dirty(state->m_reel2_tilemap,offset);
166
static TILE_GET_INFO( get_luckgrln_reel2_tile_info )
168
luckgrln_state *state = machine.driver_data<luckgrln_state>();
169
int code = state->m_reel2_ram[tile_index];
170
int attr = state->m_reel2_attr[tile_index];
171
int col = (attr & 0x1f);
173
code |= (attr & 0xe0)<<3;
183
static WRITE8_HANDLER( luckgrln_reel3_ram_w )
185
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
186
state->m_reel3_ram[offset] = data;
187
tilemap_mark_tile_dirty(state->m_reel3_tilemap,offset);
190
static WRITE8_HANDLER( luckgrln_reel3_attr_w )
192
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
193
state->m_reel3_attr[offset] = data;
194
tilemap_mark_tile_dirty(state->m_reel3_tilemap,offset);
198
static TILE_GET_INFO( get_luckgrln_reel3_tile_info )
200
luckgrln_state *state = machine.driver_data<luckgrln_state>();
201
int code = state->m_reel3_ram[tile_index];
202
int attr = state->m_reel3_attr[tile_index];
203
int col = (attr & 0x1f);
205
code |= (attr & 0xe0)<<3;
214
static WRITE8_HANDLER( luckgrln_reel4_ram_w )
216
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
217
state->m_reel4_ram[offset] = data;
218
tilemap_mark_tile_dirty(state->m_reel4_tilemap,offset);
221
static WRITE8_HANDLER( luckgrln_reel4_attr_w )
223
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
224
state->m_reel4_attr[offset] = data;
225
tilemap_mark_tile_dirty(state->m_reel4_tilemap,offset);
229
static TILE_GET_INFO( get_luckgrln_reel4_tile_info )
231
luckgrln_state *state = machine.driver_data<luckgrln_state>();
232
int code = state->m_reel4_ram[tile_index];
233
int attr = state->m_reel4_attr[tile_index];
234
int col = (attr & 0x1f);
236
code |= (attr & 0xe0)<<3;
245
static VIDEO_START(luckgrln)
247
luckgrln_state *state = machine.driver_data<luckgrln_state>();
248
state->m_reel1_tilemap = tilemap_create(machine,get_luckgrln_reel1_tile_info,tilemap_scan_rows, 8, 32, 64, 8);
249
state->m_reel2_tilemap = tilemap_create(machine,get_luckgrln_reel2_tile_info,tilemap_scan_rows, 8, 32, 64, 8);
250
state->m_reel3_tilemap = tilemap_create(machine,get_luckgrln_reel3_tile_info,tilemap_scan_rows, 8, 32, 64, 8);
251
state->m_reel4_tilemap = tilemap_create(machine,get_luckgrln_reel4_tile_info,tilemap_scan_rows, 8, 32, 64, 8);
253
tilemap_set_scroll_cols(state->m_reel1_tilemap, 64);
254
tilemap_set_scroll_cols(state->m_reel2_tilemap, 64);
255
tilemap_set_scroll_cols(state->m_reel3_tilemap, 64);
256
tilemap_set_scroll_cols(state->m_reel4_tilemap, 64);
258
tilemap_set_transparent_pen( state->m_reel1_tilemap, 0 );
259
tilemap_set_transparent_pen( state->m_reel2_tilemap, 0 );
260
tilemap_set_transparent_pen( state->m_reel3_tilemap, 0 );
261
tilemap_set_transparent_pen( state->m_reel4_tilemap, 0 );
264
static SCREEN_UPDATE(luckgrln)
266
luckgrln_state *state = screen->machine().driver_data<luckgrln_state>();
269
const rectangle &visarea = screen->visible_area();
274
clip.min_x = visarea.min_x;
275
clip.max_x = visarea.max_x;
276
clip.min_y = visarea.min_y;
277
clip.max_y = visarea.max_y;
279
bitmap_fill(bitmap, cliprect, 0);
281
for (i= 0;i < 64;i++)
283
tilemap_set_scrolly(state->m_reel1_tilemap, i, state->m_reel1_scroll[i]);
284
tilemap_set_scrolly(state->m_reel2_tilemap, i, state->m_reel2_scroll[i]);
285
tilemap_set_scrolly(state->m_reel3_tilemap, i, state->m_reel3_scroll[i]);
286
tilemap_set_scrolly(state->m_reel4_tilemap, i, state->m_reel4_scroll[i]);
295
if (clip.min_y<visarea.min_y) clip.min_y = visarea.min_y;
296
if (clip.max_y>visarea.max_y) clip.max_y = visarea.max_y;
300
UINT16 tile = (state->m_luck_vram1[count] & 0xff);
301
UINT16 tile_high = (state->m_luck_vram2[count]);
302
UINT16 tileattr = (state->m_luck_vram3[count]);
310
if (clip.min_x<visarea.min_x) clip.min_x = visarea.min_x;
311
if (clip.max_x>visarea.max_x) clip.max_x = visarea.max_x;
314
state->m_luck_vram1 tttt tttt (t = low tile bits)
315
state->m_luck_vram2 tttt ppp? (t = high tile bits) (p = pal select)?
320
tile |= (tile_high & 0xf0) << 4;
321
if (tileattr & 0x02) tile |= 0x1000;
323
// ?? low bit is used too
326
// --ss fbt- state->m_luck_vram3
328
// s = reel layer select for this 8x8 region
329
// f = fg enabled for this 8x8 region (or priority?)
330
// b = reel enabled for this 8x8 region (not set on startup screens)
333
bgenable = (tileattr &0x30)>>4;
335
#if 0 // treat bit as fg enable
338
if (bgenable==0) tilemap_draw(bitmap, &clip, state->m_reel1_tilemap, 0, 0);
339
if (bgenable==1) tilemap_draw(bitmap, &clip, state->m_reel2_tilemap, 0, 0);
340
if (bgenable==2) tilemap_draw(bitmap, &clip, state->m_reel3_tilemap, 0, 0);
341
if (bgenable==3) tilemap_draw(bitmap, &clip, state->m_reel4_tilemap, 0, 0);
344
if (tileattr&0x08) drawgfx_transpen(bitmap,clip,screen->machine().gfx[region],tile,col,0,0,x*8,y*8, 0);
346
#else // treat it as priority flag instead (looks better in non-adult title screen - needs verifying)
347
if (!(tileattr&0x08)) drawgfx_transpen(bitmap,&clip,screen->machine().gfx[region],tile,col,0,0,x*8,y*8, 0);
351
if (bgenable==0) tilemap_draw(bitmap, &clip, state->m_reel1_tilemap, 0, 0);
352
if (bgenable==1) tilemap_draw(bitmap, &clip, state->m_reel2_tilemap, 0, 0);
353
if (bgenable==2) tilemap_draw(bitmap, &clip, state->m_reel3_tilemap, 0, 0);
354
if (bgenable==3) tilemap_draw(bitmap, &clip, state->m_reel4_tilemap, 0, 0);
357
if ((tileattr&0x08)) drawgfx_transpen(bitmap,&clip,screen->machine().gfx[region],tile,col,0,0,x*8,y*8, 0);
366
static ADDRESS_MAP_START( mainmap, AS_PROGRAM, 8 )
367
AM_RANGE(0x00000, 0x03fff) AM_ROM
368
AM_RANGE(0x10000, 0x1ffff) AM_ROM AM_REGION("rom_data",0x10000)
369
AM_RANGE(0x20000, 0x2ffff) AM_ROM AM_REGION("rom_data",0x00000)
371
AM_RANGE(0x0c000, 0x0c1ff) AM_RAM_WRITE(luckgrln_reel1_ram_w) AM_BASE_MEMBER(luckgrln_state, m_reel1_ram) // only written to half way
372
AM_RANGE(0x0c800, 0x0c9ff) AM_RAM_WRITE(luckgrln_reel1_attr_w) AM_BASE_MEMBER(luckgrln_state, m_reel1_attr)
373
AM_RANGE(0x0d000, 0x0d03f) AM_RAM AM_BASE_MEMBER(luckgrln_state, m_reel1_scroll) AM_MIRROR(0x000c0)
375
AM_RANGE(0x0c200, 0x0c3ff) AM_RAM_WRITE(luckgrln_reel2_ram_w) AM_BASE_MEMBER(luckgrln_state, m_reel2_ram)
376
AM_RANGE(0x0ca00, 0x0cbff) AM_RAM_WRITE(luckgrln_reel2_attr_w) AM_BASE_MEMBER(luckgrln_state, m_reel2_attr)
377
AM_RANGE(0x0d200, 0x0d23f) AM_RAM AM_BASE_MEMBER(luckgrln_state, m_reel2_scroll) AM_MIRROR(0x000c0)
379
AM_RANGE(0x0c400, 0x0c5ff) AM_RAM_WRITE(luckgrln_reel3_ram_w ) AM_BASE_MEMBER(luckgrln_state, m_reel3_ram)
380
AM_RANGE(0x0cc00, 0x0cdff) AM_RAM_WRITE(luckgrln_reel3_attr_w) AM_BASE_MEMBER(luckgrln_state, m_reel3_attr)
381
AM_RANGE(0x0d400, 0x0d43f) AM_RAM AM_BASE_MEMBER(luckgrln_state, m_reel3_scroll) AM_MIRROR(0x000c0)
383
AM_RANGE(0x0c600, 0x0c7ff) AM_RAM_WRITE(luckgrln_reel4_ram_w ) AM_BASE_MEMBER(luckgrln_state, m_reel4_ram)
384
AM_RANGE(0x0ce00, 0x0cfff) AM_RAM_WRITE(luckgrln_reel4_attr_w) AM_BASE_MEMBER(luckgrln_state, m_reel4_attr)
385
AM_RANGE(0x0d600, 0x0d63f) AM_RAM AM_BASE_MEMBER(luckgrln_state, m_reel4_scroll)
387
// AM_RANGE(0x0d200, 0x0d2ff) AM_RAM
390
AM_RANGE(0x0d800, 0x0dfff) AM_RAM // nvram
392
AM_RANGE(0x0e000, 0x0e7ff) AM_RAM AM_BASE_MEMBER(luckgrln_state, m_luck_vram1)
393
AM_RANGE(0x0e800, 0x0efff) AM_RAM AM_BASE_MEMBER(luckgrln_state, m_luck_vram2)
394
AM_RANGE(0x0f000, 0x0f7ff) AM_RAM AM_BASE_MEMBER(luckgrln_state, m_luck_vram3)
397
AM_RANGE(0x0f800, 0x0ffff) AM_RAM
398
AM_RANGE(0xf0000, 0xfffff) AM_RAM
402
static WRITE8_HANDLER( output_w )
404
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
407
state->m_nmi_enable = 0;
409
state->m_nmi_enable = 1;
411
printf("output_w unk data %02x\n",data);
416
static WRITE8_HANDLER( palette_offset_low_w )
418
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
419
state->m_palette_count = data<<1;
421
static WRITE8_HANDLER( palette_offset_high_w )
423
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
424
state->m_palette_count = state->m_palette_count | data<<9;
428
static WRITE8_HANDLER( palette_w )
430
luckgrln_state *state = space->machine().driver_data<luckgrln_state>();
431
state->m_palette_ram[state->m_palette_count] = data;
438
offs = state->m_palette_count&~0x1;
439
dat = state->m_palette_ram[offs] | state->m_palette_ram[offs+1]<<8;
441
r = (dat >> 0) & 0x1f;
442
g = (dat >> 5) & 0x1f;
443
b = (dat >> 10) & 0x1f;
445
palette_set_color_rgb(space->machine(), offs/2, pal5bit(r), pal5bit(g), pal5bit(b));
449
state->m_palette_count++;
453
// Oki M62X428 is a 4-bit RTC, doesn't seem to be millennium bug proof ...
454
static READ8_HANDLER( rtc_r )
457
space->machine().base_datetime(systime);
461
case 0x00: return (systime.local_time.second % 10);
462
case 0x01: return (systime.local_time.second / 10);
463
case 0x02: return (systime.local_time.minute % 10);
464
case 0x03: return (systime.local_time.minute / 10);
465
case 0x04: return (systime.local_time.hour % 10);
466
case 0x05: return (systime.local_time.hour / 10);
467
case 0x06: return (systime.local_time.mday % 10);
468
case 0x07: return (systime.local_time.mday / 10);
469
case 0x08: return ((systime.local_time.month+1) % 10);
470
case 0x09: return ((systime.local_time.month+1) / 10);
471
case 0x0a: return (systime.local_time.year%10);
472
case 0x0b: return ((systime.local_time.year%100)/10);
474
case 0x0d: return 0xff; // bit 1: reset switch for the RTC?
480
/* Analizing the lamps, the game should has a 12-buttons control layout */
481
static WRITE8_HANDLER(lamps_a_w)
496
output_set_lamp_value(0, (data >> 0) & 1); /* HOLD1 */
497
output_set_lamp_value(1, (data >> 1) & 1); /* HOLD2 */
498
output_set_lamp_value(2, (data >> 2) & 1); /* HOLD3 */
499
output_set_lamp_value(3, (data >> 3) & 1); /* HOLD4 */
500
output_set_lamp_value(4, (data >> 4) & 1); /* HOLD5 */
501
output_set_lamp_value(5, (data >> 5) & 1); /* START */
502
output_set_lamp_value(6, (data >> 6) & 1); /* BET */
503
output_set_lamp_value(7, (data >> 7) & 1); /* TAKE */
506
static WRITE8_HANDLER(lamps_b_w)
515
--xx ---- unknown (mostly on)
519
output_set_lamp_value(8, (data >> 0) & 1); /* D-UP */
520
output_set_lamp_value(9, (data >> 1) & 1); /* HIGH */
521
output_set_lamp_value(10, (data >> 2) & 1); /* LOW */
522
output_set_lamp_value(11, (data >> 3) & 1); /* CANCEL */
525
static WRITE8_HANDLER(counters_w)
537
coin_counter_w(space->machine(), 0, data & 0x01); /* COIN 1 */
538
coin_counter_w(space->machine(), 1, data & 0x04); /* COIN 2 */
539
coin_counter_w(space->machine(), 2, data & 0x08); /* COIN 3 */
540
coin_counter_w(space->machine(), 3, data & 0x02); /* KEY IN */
544
/* are some of these reads / writes mirrored? there seem to be far too many */
545
static ADDRESS_MAP_START( portmap, AS_IO, 8 )
546
ADDRESS_MAP_GLOBAL_MASK(0xff) // i think
547
AM_RANGE(0x0000, 0x003f) AM_RAM // Z180 internal regs
548
AM_RANGE(0x0060, 0x0060) AM_WRITE(output_w)
550
AM_RANGE(0x0090, 0x009f) AM_READ(rtc_r) //AM_WRITENOP
552
AM_RANGE(0x00a0, 0x00a0) AM_WRITE(palette_offset_low_w)
553
AM_RANGE(0x00a1, 0x00a1) AM_WRITE(palette_offset_high_w)
554
AM_RANGE(0x00a2, 0x00a2) AM_WRITE(palette_w)
556
AM_RANGE(0x00b0, 0x00b0) AM_DEVWRITE_MODERN("crtc", mc6845_device, address_w)
557
AM_RANGE(0x00b1, 0x00b1) AM_DEVWRITE_MODERN("crtc", mc6845_device, register_w)
559
AM_RANGE(0x00b8, 0x00b8) AM_READ_PORT("IN0")
560
AM_RANGE(0x00b9, 0x00b9) AM_READ_PORT("IN1") AM_WRITE(counters_w)
561
AM_RANGE(0x00ba, 0x00ba) AM_READ_PORT("IN2") AM_WRITE(lamps_a_w)
562
AM_RANGE(0x00bb, 0x00bb) AM_READ_PORT("IN3") AM_WRITE(lamps_b_w)
563
AM_RANGE(0x00bc, 0x00bc) AM_READ_PORT("DSW1")
565
AM_RANGE(0x00c0, 0x00c3) AM_WRITENOP
566
AM_RANGE(0x00c4, 0x00c7) AM_WRITENOP
567
AM_RANGE(0x00c8, 0x00cb) AM_WRITENOP
568
AM_RANGE(0x00cc, 0x00cf) AM_WRITENOP
570
AM_RANGE(0x00d0, 0x00d3) AM_WRITENOP
571
AM_RANGE(0x00d4, 0x00d7) AM_WRITENOP
572
AM_RANGE(0x00d8, 0x00db) AM_WRITENOP
573
AM_RANGE(0x00dc, 0x00df) AM_WRITENOP
575
AM_RANGE(0x00e4, 0x00e7) AM_WRITENOP
577
AM_RANGE(0x00f3, 0x00f3) AM_WRITENOP
578
AM_RANGE(0x00f7, 0x00f7) AM_WRITENOP
580
AM_RANGE(0x00f8, 0x00f8) AM_READ_PORT("DSW2")
581
AM_RANGE(0x00f9, 0x00f9) AM_READ_PORT("DSW3")
582
AM_RANGE(0x00fa, 0x00fa) AM_READ_PORT("DSW4")
583
AM_RANGE(0x00fb, 0x00fb) AM_READ_PORT("DSW5") //AM_WRITENOP
584
AM_RANGE(0x00fc, 0x00fc) AM_WRITENOP
585
AM_RANGE(0x00fd, 0x00fd) AM_WRITENOP
586
AM_RANGE(0x00fe, 0x00fe) AM_WRITENOP
587
AM_RANGE(0x00ff, 0x00ff) AM_WRITENOP
591
C0-C3 seems to be a 4-bytes port device (maybe sound), where is written --> data, control (or channel), unknown, volume.
592
If in fact it's a sound device, the last parameter (volume) is decreasing once the sound event was triggered.
593
Seems to be more than one, and these devices seems mirrored along the rest of memory.
600
static INPUT_PORTS_START( luckgrln )
602
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_CODE(KEYCODE_1) PORT_NAME("Start")
603
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_CODE(KEYCODE_N)
604
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Play")
605
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE )
606
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
607
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH )
608
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW )
609
PORT_DIPNAME( 0x80, 0x80, "IN0" )
610
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
611
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
614
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
615
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
616
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
617
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
618
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
619
PORT_DIPNAME( 0x20, 0x20, "IN1" )
620
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
621
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
622
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
623
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
624
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
625
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
626
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
627
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
630
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
631
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
632
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
633
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(1)
634
PORT_DIPNAME( 0x10, 0x10, "IN2" )
635
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
636
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
637
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
638
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
639
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
640
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
641
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
642
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
643
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
644
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
645
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
648
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset")
649
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_9) PORT_NAME("Service In")
650
PORT_DIPNAME( 0x04, 0x04, "IN3" )
651
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
652
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
653
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
654
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
655
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
656
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_W) PORT_NAME("Credit Clear")
657
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
658
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
659
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
660
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
661
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
662
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
663
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Books SW")
665
PORT_START("DSW1") //DIP SW 1
666
PORT_DIPNAME( 0x01, 0x01, "Auto Hold" )
667
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
668
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
669
PORT_DIPNAME( 0x02, 0x02, "Game Type" )
670
PORT_DIPSETTING( 0x02, "Hold Game" )
671
PORT_DIPSETTING( 0x00, "Discard Game" )
672
PORT_DIPNAME( 0x04, 0x04, "Adult Content" )
673
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
674
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
675
PORT_DIPNAME( 0x08, 0x08, "DSW1-08" )
676
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
677
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
678
PORT_DIPNAME( 0x10, 0x10, "Minimal Winning Hand" )
679
PORT_DIPSETTING( 0x10, "Jacks or Better" )
680
PORT_DIPSETTING( 0x00, "2 Pairs" )
681
PORT_DIPNAME( 0x20, 0x20, "Minimum Bet" )
682
PORT_DIPSETTING( 0x20, "1" )
683
PORT_DIPSETTING( 0x00, "5" )
684
PORT_DIPNAME( 0x40, 0x40, "DSW1-40 (Do Not Use)" )
685
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
686
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
687
PORT_DIPNAME( 0x80, 0x80, "DSW1-80 (Do Not Use)" )
688
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
689
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
691
PORT_START("DSW2") //DIP SW 2
692
PORT_DIPNAME( 0x01, 0x01, "DSW2-01 (Do Not Use)" )
693
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
694
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
695
PORT_DIPNAME( 0x02, 0x02, "DSW2-02 (Do Not Use)" )
696
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
697
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
698
PORT_DIPNAME( 0x04, 0x04, "DSW2-04 (Do Not Use)" )
699
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
700
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
701
PORT_DIPNAME( 0x08, 0x08, "DSW2-08 (Do Not Use)" )
702
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
703
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
704
PORT_DIPNAME( 0x10, 0x10, "DSW2-10" )
705
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
706
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
707
PORT_DIPNAME( 0x20, 0x20, "DSW2-20" )
708
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
709
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
710
PORT_DIPNAME( 0x40, 0x40, "DSW2-40" )
711
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
712
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
713
PORT_DIPNAME( 0x80, 0x80, "DSW2-80" )
714
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
715
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
718
PORT_DIPNAME( 0x07, 0x04, "Key In" )
719
PORT_DIPSETTING( 0x07, "1 Pulse / 5 Credits" )
720
PORT_DIPSETTING( 0x06, "1 Pulse / 10 Credits" )
721
PORT_DIPSETTING( 0x05, "1 Pulse / 50 Credits" )
722
PORT_DIPSETTING( 0x04, "1 Pulse / 100 Credits" )
723
PORT_DIPSETTING( 0x03, "1 Pulse / 200 Credits" )
724
PORT_DIPSETTING( 0x02, "1 Pulse / 300 Credits" )
725
PORT_DIPSETTING( 0x01, "1 Pulse / 500 Credits" )
726
PORT_DIPSETTING( 0x00, "1 Pulse / 1000 Credits" )
727
PORT_DIPNAME( 0x38, 0x10, DEF_STR( Coin_A ) )
728
PORT_DIPSETTING( 0x38, DEF_STR( 1C_1C ) )
729
PORT_DIPSETTING( 0x30, DEF_STR( 1C_2C ) )
730
PORT_DIPSETTING( 0x28, DEF_STR( 1C_4C ) )
731
PORT_DIPSETTING( 0x20, DEF_STR( 1C_5C ) )
732
PORT_DIPSETTING( 0x18, DEF_STR( 1C_6C ) )
733
PORT_DIPSETTING( 0x10, "1 Coin / 10 Credits" )
734
PORT_DIPSETTING( 0x08, "1 Coin / 25 Credits" )
735
PORT_DIPSETTING( 0x00, "1 Coin / 50 Credits" )
736
PORT_DIPNAME( 0x40, 0x40, "DSW3-40" )
737
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
738
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
739
PORT_DIPNAME( 0x80, 0x80, "DSW3-80" )
740
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
741
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
744
PORT_DIPNAME( 0x0f, 0x04, "Coin C" )
745
PORT_DIPSETTING( 0x0f, "10 Coins / 1 Credit" )
746
PORT_DIPSETTING( 0x0e, DEF_STR( 5C_1C ) )
747
PORT_DIPSETTING( 0x0d, "5 Coins / 2 Credits" )
748
PORT_DIPSETTING( 0x0c, DEF_STR( 4C_1C ) )
749
PORT_DIPSETTING( 0x0b, DEF_STR( 3C_1C ) )
750
PORT_DIPSETTING( 0x0a, DEF_STR( 2C_1C ) )
751
PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
752
PORT_DIPSETTING( 0x09, DEF_STR( 2C_3C ) )
753
PORT_DIPSETTING( 0x07, DEF_STR( 1C_2C ) )
754
PORT_DIPSETTING( 0x06, DEF_STR( 1C_3C ) )
755
PORT_DIPSETTING( 0x05, DEF_STR( 1C_5C ) )
756
PORT_DIPSETTING( 0x04, "1 Coin / 10 Credits" )
757
PORT_DIPSETTING( 0x03, "1 Coin / 20 Credits" )
758
PORT_DIPSETTING( 0x02, "1 Coin / 25 Credits" )
759
PORT_DIPSETTING( 0x01, "1 Coin / 50 Credits" )
760
PORT_DIPSETTING( 0x00, "1 Coin / 100 Credits" )
761
PORT_DIPNAME( 0x70, 0x10, DEF_STR( Coin_B ) )
762
PORT_DIPSETTING( 0x70, "10 Coins / 1 Credit" )
763
PORT_DIPSETTING( 0x60, DEF_STR( 9C_1C ) )
764
PORT_DIPSETTING( 0x50, DEF_STR( 6C_1C ) )
765
PORT_DIPSETTING( 0x40, DEF_STR( 5C_1C ) )
766
PORT_DIPSETTING( 0x30, DEF_STR( 3C_1C ) )
767
PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
768
PORT_DIPSETTING( 0x10, DEF_STR( 1C_1C ) )
769
PORT_DIPSETTING( 0x00, "1 Coin / 200 Credits" )
770
PORT_DIPNAME( 0x80, 0x80, "DSW4-80" )
771
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
772
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
774
PORT_START("DSW5") //DIP SW 5
775
PORT_DIPNAME( 0x01, 0x01, "DSW5-01 (Do Not Use)" )
776
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
777
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
778
PORT_DIPNAME( 0x02, 0x02, "DSW5-02 (Do Not Use)" )
779
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
780
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
781
PORT_DIPNAME( 0x04, 0x04, "DSW5-04" )
782
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
783
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
784
PORT_DIPNAME( 0x18, 0x18, "Double-Up" )
785
PORT_DIPSETTING( 0x18, "Double-Up (Normal)" )
786
PORT_DIPSETTING( 0x08, "Double-Up Poker" )
787
PORT_DIPSETTING( 0x10, "Double-Up Bingo" )
788
PORT_DIPSETTING( 0x00, "No Double-Up" )
789
PORT_DIPNAME( 0x20, 0x20, "DSW5-20" )
790
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
791
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
792
PORT_DIPNAME( 0x40, 0x40, "DSW5-40" )
793
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
794
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
795
PORT_DIPNAME( 0x80, 0x80, "DSW5-80" )
796
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
797
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
801
static const gfx_layout tiles8x8_layout =
806
{ RGN_FRAC(1,6),RGN_FRAC(3,6),RGN_FRAC(2,6),RGN_FRAC(5,6),RGN_FRAC(4,6) }, /* RGN_FRAC(0,6) isn't used (empty) */
808
{ 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8},
812
static const gfx_layout tiles8x32_layout =
817
{ RGN_FRAC(1,6),RGN_FRAC(3,6),RGN_FRAC(2,6),RGN_FRAC(5,6),RGN_FRAC(4,6) },
819
{ 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8, 8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8,16*8,17*8,18*8,19*8,20*8,21*8,22*8,23*8,24*8,25*8,26*8,27*8,28*8,29*8,30*8,31*8},
823
static GFXDECODE_START( luckgrln )
824
GFXDECODE_ENTRY( "gfx2", 0, tiles8x8_layout, 0x400, 64 )
825
GFXDECODE_ENTRY( "reels", 0, tiles8x32_layout, 0, 64 )
828
static const mc6845_interface mc6845_intf =
830
"screen", /* screen we are acting on */
831
8, /* number of pixels per video memory address */
832
NULL, /* before pixel update callback */
833
NULL, /* row update callback */
834
NULL, /* after pixel update callback */
835
DEVCB_NULL, /* callback for display state changes */
836
DEVCB_NULL, /* callback for cursor state changes */
837
DEVCB_NULL, /* HSYNC callback */
838
DEVCB_NULL, /* VSYNC callback */
839
NULL /* update address callback */
842
static INTERRUPT_GEN( luckgrln_irq )
844
luckgrln_state *state = device->machine().driver_data<luckgrln_state>();
845
if(state->m_nmi_enable)
846
cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_NMI, PULSE_LINE);
849
static MACHINE_CONFIG_START( luckgrln, luckgrln_state )
850
MCFG_CPU_ADD("maincpu", Z180,8000000)
851
MCFG_CPU_PROGRAM_MAP(mainmap)
852
MCFG_CPU_IO_MAP(portmap)
853
MCFG_CPU_VBLANK_INT("screen", luckgrln_irq)
855
MCFG_MC6845_ADD("crtc", H46505, 6000000/4, mc6845_intf) /* unknown clock, hand tuned to get ~60 fps */
857
MCFG_SCREEN_ADD("screen", RASTER)
858
MCFG_SCREEN_REFRESH_RATE(60)
859
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
860
MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
861
MCFG_SCREEN_SIZE(512, 256)
862
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
863
MCFG_SCREEN_UPDATE(luckgrln)
865
MCFG_GFXDECODE(luckgrln)
866
MCFG_PALETTE_LENGTH(0x8000)
868
MCFG_VIDEO_START(luckgrln)
870
MCFG_SPEAKER_STANDARD_MONO("mono")
874
static DRIVER_INIT( luckgrln )
878
UINT8* rom = machine.region("rom_data")->base();
880
for (i=0;i<0x20000;i++)
883
v = 0xfe + (i & 0xf)*0x3b + ((i >> 4) & 0xf)*0x9c + ((i >> 8) & 0xf)*0xe1 + ((i >> 12) & 0x7)*0x10;
884
v += ((((i >> 4) & 0xf) + ((i >> 2) & 3)) >> 2) * 0x50;
886
x = (x << (i & 7)) | (x >> (8-(i & 7)));
894
sprintf(filename,"decrypted_%s", machine.system().name);
895
fp=fopen(filename, "w+b");
898
fwrite(rom, 0x20000, 1, fp);
905
// memory_set_bankptr(machine, "bank1",&rom[0x010000]);
909
ROM_START( luckgrln )
910
ROM_REGION( 0x4000, "maincpu", 0 ) // internal Z180 rom
911
ROM_LOAD( "lucky74.bin", 0x00000, 0x4000, CRC(fa128e05) SHA1(97a9534b8414f984159271db48b153b0724d22f9) )
913
ROM_REGION( 0x20000, "rom_data", 0 ) // external data / cpu rom
914
ROM_LOAD( "falcon.13", 0x00000, 0x20000, CRC(f7a717fd) SHA1(49a39b84620876ee2faf73aaa405a1e17cab2da2) )
916
ROM_REGION( 0x60000, "reels", 0 )
917
ROM_LOAD( "eagle.1", 0x00000, 0x20000, CRC(37209082) SHA1(ffb30da5920886f37c6b97e03f5a8ec3b6265e68) ) // half unused, 5bpp
918
ROM_LOAD( "eagle.2", 0x20000, 0x20000, CRC(bdb2d694) SHA1(3e58fe3f6b447181e3a85f0fc2a0c996231bc8e8) )
919
ROM_LOAD( "eagle.3", 0x40000, 0x20000, CRC(2c765389) SHA1(d5697c73cc939aa46f36c2dd87e90bba2536e347) )
921
ROM_REGION( 0x60000, "gfx2", 0 )
922
ROM_LOAD( "falcon.4", 0x00000, 0x20000, CRC(369eaddf) SHA1(52387ea63e5c8fb0c27b796026152a06b68467af) ) // half unused, 5bpp
923
ROM_LOAD( "falcon.5", 0x20000, 0x20000, CRC(c9ac1fe7) SHA1(fc027002754b90cc49ca74fac5240a99a194c0b3) )
924
ROM_LOAD( "falcon.6", 0x40000, 0x20000, CRC(bfb02c87) SHA1(1b5ca562ed76eb3f1b4a52d379a6af07e79b6ee5) )
928
/*********************************************
930
**********************************************
932
YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY FULLNAME FLAGS LAYOUT */
933
GAMEL( 1991, luckgrln, 0, luckgrln, luckgrln, luckgrln, ROT0, "Wing Co., Ltd.", "Lucky Girl (newer Z180 based hardware)", GAME_NO_SOUND, layout_luckgrln )