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Viewing changes to mess/src/mame/drivers/hyprduel.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Jordi Mallach, Emmanuel Kasper
  • Date: 2011-12-19 22:56:27 UTC
  • mfrom: (0.1.2)
  • Revision ID: package-import@ubuntu.com-20111219225627-ub5oga1oys4ogqzm
Tags: 0.144-1
http://bugs.debian.org/651538
[ Jordi Mallach ]
* Fix syntax errors in DEP5 copyright file (lintian).
* Use a versioned copyright Format specification field.
* Update Vcs-* URLs.
* Move transitional packages to the new metapackages section, and make
  them priority extra.
* Remove references to GNU/Linux and MESS sources from copyright.
* Add build variables for s390x.
* Use .xz tarballs as it cuts 4MB for the upstream sources.
* Add nplayers.ini as a patch. Update copyright file to add CC-BY-SA-3.0.

[ Emmanuel Kasper ]
* New upstream release. Closes: #651538.
* Add Free Desktop compliant png icons of various sizes taken from
  the hydroxygen iconset
* Mess is now built from a new source package, to avoid possible source
  incompatibilities between mame and the mess overlay.
* Mame-tools are not built from the mame source package anymore, but
  from the mess source package

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mess/src/mame/drivers/hyprduel.c
1
 
/***************************************************************************
2
 
 
3
 
Hyper Duel
4
 
(c)1993 Technosoft
5
 
TEC442-A(Japan)
6
 
 
7
 
TMP68000N-10 x2
8
 
YM2151,YM3012
9
 
OKI M6295
10
 
OSC:  4.0000MHz, 20.0000MHz, 26.6660MHz
11
 
Imagetek Inc 14220 071
12
 
 
13
 
 
14
 
Magical Error wo Sagase
15
 
(c)1994 Technosoft / Jaleco
16
 
TEC5000(Japan)
17
 
 
18
 
TMP68000N-10 x2
19
 
YM2413
20
 
OKI M6295
21
 
OSC:  3.579545MHz, 4.0000MHz, 20.0000MHz, 26.6660MHz
22
 
Imagetek Inc 14220 071
23
 
 
24
 
--
25
 
Written by Hau
26
 
03/29/2009
27
 
based on driver from drivers/metro.c by Luca Elia
28
 
spthx to kikur,Cha,teioh,kokkyu,teruchu,aya,sgo
29
 
---
30
 
 
31
 
Magical Error
32
 
different sized sound / shared region (or the mem map needs more alterations?)
33
 
fix comms so it boots, it's a bit of a hack for hyperduel at the moment ;-)
34
 
 
35
 
***************************************************************************/
36
 
 
37
 
#include "emu.h"
38
 
#include "cpu/m68000/m68000.h"
39
 
#include "deprecat.h"
40
 
#include "sound/2151intf.h"
41
 
#include "sound/okim6295.h"
42
 
#include "sound/2413intf.h"
43
 
#include "includes/hyprduel.h"
44
 
 
45
 
/***************************************************************************
46
 
                                Interrupts
47
 
***************************************************************************/
48
 
 
49
 
static void update_irq_state( running_machine &machine )
50
 
{
51
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
52
 
        int irq = state->m_requested_int & ~*state->m_irq_enable;
53
 
 
54
 
        device_set_input_line(state->m_maincpu, 3, (irq & state->m_int_num) ? ASSERT_LINE : CLEAR_LINE);
55
 
}
56
 
 
57
 
static TIMER_CALLBACK( vblank_end_callback )
58
 
{
59
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
60
 
        state->m_requested_int &= ~param;
61
 
}
62
 
 
63
 
static INTERRUPT_GEN( hyprduel_interrupt )
64
 
{
65
 
        hyprduel_state *state = device->machine().driver_data<hyprduel_state>();
66
 
        int line = RASTER_LINES - cpu_getiloops(device);
67
 
 
68
 
        if (line == RASTER_LINES)
69
 
        {
70
 
                state->m_requested_int |= 0x01;         /* vblank */
71
 
                state->m_requested_int |= 0x20;
72
 
                device_set_input_line(device, 2, HOLD_LINE);
73
 
                /* the duration is a guess */
74
 
                device->machine().scheduler().timer_set(attotime::from_usec(2500), FUNC(vblank_end_callback), 0x20);
75
 
        }
76
 
        else
77
 
                state->m_requested_int |= 0x12;         /* hsync */
78
 
 
79
 
        update_irq_state(device->machine());
80
 
}
81
 
 
82
 
static READ16_HANDLER( hyprduel_irq_cause_r )
83
 
{
84
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
85
 
        return state->m_requested_int;
86
 
}
87
 
 
88
 
static WRITE16_HANDLER( hyprduel_irq_cause_w )
89
 
{
90
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
91
 
        if (ACCESSING_BITS_0_7)
92
 
        {
93
 
                if (data == state->m_int_num)
94
 
                        state->m_requested_int &= ~(state->m_int_num & ~*state->m_irq_enable);
95
 
                else
96
 
                        state->m_requested_int &= ~(data & *state->m_irq_enable);
97
 
 
98
 
                update_irq_state(space->machine());
99
 
        }
100
 
}
101
 
 
102
 
 
103
 
static WRITE16_HANDLER( hyprduel_subcpu_control_w )
104
 
{
105
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
106
 
 
107
 
        switch (data)
108
 
        {
109
 
                case 0x0d:
110
 
                case 0x0f:
111
 
                case 0x01:
112
 
                        if (!state->m_subcpu_resetline)
113
 
                        {
114
 
                                device_set_input_line(state->m_subcpu, INPUT_LINE_RESET, ASSERT_LINE);
115
 
                                state->m_subcpu_resetline = 1;
116
 
                        }
117
 
                        break;
118
 
 
119
 
                case 0x00:
120
 
                        if (state->m_subcpu_resetline)
121
 
                        {
122
 
                                device_set_input_line(state->m_subcpu, INPUT_LINE_RESET, CLEAR_LINE);
123
 
                                state->m_subcpu_resetline = 0;
124
 
                        }
125
 
                        device_spin_until_interrupt(&space->device());
126
 
                        break;
127
 
 
128
 
                case 0x0c:
129
 
                case 0x80:
130
 
                        device_set_input_line(state->m_subcpu, 2, HOLD_LINE);
131
 
                        break;
132
 
        }
133
 
}
134
 
 
135
 
 
136
 
static READ16_HANDLER( hyprduel_cpusync_trigger1_r )
137
 
{
138
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
139
 
        if (state->m_cpu_trigger == 1001)
140
 
        {
141
 
                space->machine().scheduler().trigger(1001);
142
 
                state->m_cpu_trigger = 0;
143
 
        }
144
 
 
145
 
        return state->m_sharedram1[0x000408 / 2 + offset];
146
 
}
147
 
 
148
 
static WRITE16_HANDLER( hyprduel_cpusync_trigger1_w )
149
 
{
150
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
151
 
        COMBINE_DATA(&state->m_sharedram1[0x00040e / 2 + offset]);
152
 
 
153
 
        if (((state->m_sharedram1[0x00040e / 2] << 16) + state->m_sharedram1[0x000410 / 2]) != 0x00)
154
 
        {
155
 
                if (!state->m_cpu_trigger && !state->m_subcpu_resetline)
156
 
                {
157
 
                        device_spin_until_trigger(&space->device(), 1001);
158
 
                        state->m_cpu_trigger = 1001;
159
 
                }
160
 
        }
161
 
}
162
 
 
163
 
 
164
 
static READ16_HANDLER( hyprduel_cpusync_trigger2_r )
165
 
{
166
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
167
 
        if (state->m_cpu_trigger == 1002)
168
 
        {
169
 
                space->machine().scheduler().trigger(1002);
170
 
                state->m_cpu_trigger = 0;
171
 
        }
172
 
 
173
 
        return state->m_sharedram3[(0xfff34c - 0xfe4000) / 2 + offset];
174
 
}
175
 
 
176
 
static WRITE16_HANDLER( hyprduel_cpusync_trigger2_w )
177
 
{
178
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
179
 
        COMBINE_DATA(&state->m_sharedram1[0x000408 / 2 + offset]);
180
 
 
181
 
        if (ACCESSING_BITS_8_15)
182
 
        {
183
 
                if (!state->m_cpu_trigger && !state->m_subcpu_resetline)
184
 
                {
185
 
                        device_spin_until_trigger(&space->device(), 1002);
186
 
                        state->m_cpu_trigger = 1002;
187
 
                }
188
 
        }
189
 
}
190
 
 
191
 
 
192
 
static TIMER_CALLBACK( magerror_irq_callback )
193
 
{
194
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
195
 
        device_set_input_line(state->m_subcpu, 1, HOLD_LINE);
196
 
}
197
 
 
198
 
/***************************************************************************
199
 
                                Banked ROM access
200
 
***************************************************************************/
201
 
 
202
 
/*
203
 
    The main CPU has access to the ROMs that hold the graphics through
204
 
    a banked window of 64k. Those ROMs also usually store the tables for
205
 
    the virtual tiles set. The tile codes to be written to the tilemap
206
 
    memory to render the backgrounds are also stored here, in a format
207
 
    that the blitter can readily use (which is a form of compression)
208
 
*/
209
 
 
210
 
static READ16_HANDLER( hyprduel_bankedrom_r )
211
 
{
212
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
213
 
        UINT8 *ROM = space->machine().region("gfx1")->base();
214
 
        size_t  len = space->machine().region("gfx1")->bytes();
215
 
 
216
 
        offset = offset * 2 + 0x10000 * (*state->m_rombank);
217
 
 
218
 
        if (offset < len)
219
 
                return ((ROM[offset + 0] << 8) + ROM[offset + 1]);
220
 
        else
221
 
                return 0xffff;
222
 
}
223
 
 
224
 
/***************************************************************************
225
 
 
226
 
                                    Blitter
227
 
 
228
 
    [ Registers ]
229
 
 
230
 
        Offset:     Value:
231
 
 
232
 
        0.l         Destination Tilemap      (1,2,3)
233
 
        4.l         Blitter Data Address     (byte offset into the gfx ROMs)
234
 
        8.l         Destination Address << 7 (byte offset into the tilemap)
235
 
 
236
 
        The Blitter reads a byte and looks at the most significative
237
 
        bits for the opcode, while the remaining bits define a value
238
 
        (usually how many bytes to write). The opcode byte may be
239
 
        followed by a number of other bytes:
240
 
 
241
 
            76------            Opcode
242
 
            --543210            N
243
 
            (at most N+1 bytes follow)
244
 
 
245
 
 
246
 
        The blitter is designed to write every other byte (e.g. it
247
 
        writes a byte and skips the next). Hence 2 blits are needed
248
 
        to fill a tilemap (first even, then odd addresses)
249
 
 
250
 
    [ Opcodes ]
251
 
 
252
 
            0       Copy the following N+1 bytes. If the whole byte
253
 
                    is $00: stop and generate an IRQ
254
 
 
255
 
            1       Fill N+1 bytes with a sequence, starting with
256
 
                    the  value in the following byte
257
 
 
258
 
            2       Fill N+1 bytes with the value in the following
259
 
                    byte
260
 
 
261
 
            3       Skip N+1 bytes. If the whole byte is $C0:
262
 
                    skip to the next row of the tilemap (+0x200 bytes)
263
 
                    but preserve the column passed at the start of the
264
 
                    blit (destination address % 0x200)
265
 
 
266
 
***************************************************************************/
267
 
 
268
 
static TIMER_CALLBACK( hyprduel_blit_done )
269
 
{
270
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
271
 
        state->m_requested_int |= 1 << state->m_blitter_bit;
272
 
        update_irq_state(machine);
273
 
}
274
 
 
275
 
INLINE int blt_read( const UINT8 *ROM, const int offs )
276
 
{
277
 
        return ROM[offs];
278
 
}
279
 
 
280
 
INLINE void blt_write( address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
281
 
{
282
 
        switch( tmap )
283
 
        {
284
 
                case 1: hyprduel_vram_0_w(space,offs,data,mask);        break;
285
 
                case 2: hyprduel_vram_1_w(space, offs, data, mask);     break;
286
 
                case 3: hyprduel_vram_2_w(space, offs, data, mask);     break;
287
 
        }
288
 
//  logerror("%s : Blitter %X] %04X <- %04X & %04X\n", space->machine().describe_context(), tmap, offs, data, mask);
289
 
}
290
 
 
291
 
 
292
 
static WRITE16_HANDLER( hyprduel_blitter_w )
293
 
{
294
 
        hyprduel_state *state = space->machine().driver_data<hyprduel_state>();
295
 
        COMBINE_DATA(&state->m_blitter_regs[offset]);
296
 
 
297
 
        if (offset == 0xc / 2)
298
 
        {
299
 
                UINT8 *src = space->machine().region("gfx1")->base();
300
 
                size_t  src_len = space->machine().region("gfx1")->bytes();
301
 
 
302
 
                UINT32 tmap = (state->m_blitter_regs[0x00 / 2] << 16) + state->m_blitter_regs[0x02 / 2];
303
 
                UINT32 src_offs = (state->m_blitter_regs[0x04 / 2] << 16) + state->m_blitter_regs[0x06 / 2];
304
 
                UINT32 dst_offs = (state->m_blitter_regs[0x08 / 2] << 16) + state->m_blitter_regs[0x0a / 2];
305
 
 
306
 
                int shift = (dst_offs & 0x80) ? 0 : 8;
307
 
                UINT16 mask = (dst_offs & 0x80) ? 0x00ff : 0xff00;
308
 
 
309
 
//      logerror("CPU #0 PC %06X : Blitter regs %08X, %08X, %08X\n", cpu_get_pc(&space->device()), tmap, src_offs, dst_offs);
310
 
 
311
 
                dst_offs >>= 7 + 1;
312
 
                switch (tmap)
313
 
                {
314
 
                        case 1:
315
 
                        case 2:
316
 
                        case 3:
317
 
                                break;
318
 
                        default:
319
 
                                logerror("CPU #0 PC %06X : Blitter unknown destination: %08X\n", cpu_get_pc(&space->device()), tmap);
320
 
                                return;
321
 
                }
322
 
 
323
 
                while (1)
324
 
                {
325
 
                        UINT16 b1, b2, count;
326
 
 
327
 
                        src_offs %= src_len;
328
 
                        b1 = blt_read(src, src_offs);
329
 
//          logerror("CPU #0 PC %06X : Blitter opcode %02X at %06X\n", cpu_get_pc(&space->device()), b1, src_offs);
330
 
                        src_offs++;
331
 
 
332
 
                        count = ((~b1) & 0x3f) + 1;
333
 
 
334
 
                        switch ((b1 & 0xc0) >> 6)
335
 
                        {
336
 
                                case 0:
337
 
 
338
 
                                        /* Stop and Generate an IRQ. We can't generate it now
339
 
                       both because it's unlikely that the blitter is so
340
 
                       fast and because some games (e.g. lastfort) need to
341
 
                       complete the blitter irq service routine before doing
342
 
                       another blit. */
343
 
                                        if (b1 == 0)
344
 
                                        {
345
 
                                                space->machine().scheduler().timer_set(attotime::from_usec(500), FUNC(hyprduel_blit_done));
346
 
                                                return;
347
 
                                        }
348
 
 
349
 
                                        /* Copy */
350
 
                                        while (count--)
351
 
                                        {
352
 
                                                src_offs %= src_len;
353
 
                                                b2 = blt_read(src, src_offs) << shift;
354
 
                                                src_offs++;
355
 
 
356
 
                                                dst_offs &= 0xffff;
357
 
                                                blt_write(space, tmap, dst_offs, b2, mask);
358
 
                                                dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
359
 
                                        }
360
 
                                        break;
361
 
 
362
 
 
363
 
                                case 1:
364
 
 
365
 
                                        /* Fill with an increasing value */
366
 
                                        src_offs %= src_len;
367
 
                                        b2 = blt_read(src, src_offs);
368
 
                                        src_offs++;
369
 
 
370
 
                                        while (count--)
371
 
                                        {
372
 
                                                dst_offs &= 0xffff;
373
 
                                                blt_write(space, tmap, dst_offs, b2 << shift, mask);
374
 
                                                dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
375
 
                                                b2++;
376
 
                                        }
377
 
                                        break;
378
 
 
379
 
 
380
 
                                case 2:
381
 
 
382
 
                                        /* Fill with a fixed value */
383
 
                                        src_offs %= src_len;
384
 
                                        b2 = blt_read(src, src_offs) << shift;
385
 
                                        src_offs++;
386
 
 
387
 
                                        while (count--)
388
 
                                        {
389
 
                                                dst_offs &= 0xffff;
390
 
                                                blt_write(space, tmap, dst_offs, b2, mask);
391
 
                                                dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
392
 
                                        }
393
 
                                        break;
394
 
 
395
 
 
396
 
                                case 3:
397
 
 
398
 
                                        /* Skip to the next line ?? */
399
 
                                        if (b1 == 0xC0)
400
 
                                        {
401
 
                                                dst_offs += 0x100;
402
 
                                                dst_offs &= ~(0x100 - 1);
403
 
                                                dst_offs |= (0x100 - 1) & (state->m_blitter_regs[0x0a / 2] >> (7 + 1));
404
 
                                        }
405
 
                                        else
406
 
                                        {
407
 
                                                dst_offs += count;
408
 
                                        }
409
 
                                        break;
410
 
 
411
 
 
412
 
                                default:
413
 
                                        logerror("CPU #0 PC %06X : Blitter unknown opcode %02X at %06X\n", cpu_get_pc(&space->device()), b1, src_offs - 1);
414
 
                                        return;
415
 
                        }
416
 
 
417
 
                }
418
 
        }
419
 
 
420
 
}
421
 
 
422
 
/***************************************************************************
423
 
                                Memory Maps
424
 
***************************************************************************/
425
 
 
426
 
static ADDRESS_MAP_START( hyprduel_map, AS_PROGRAM, 16 )
427
 
        AM_RANGE(0x000000, 0x07ffff) AM_ROM
428
 
        AM_RANGE(0x400000, 0x41ffff) AM_RAM_WRITE(hyprduel_vram_0_w) AM_BASE_MEMBER(hyprduel_state, m_vram_0)           /* Layer 0 */
429
 
        AM_RANGE(0x420000, 0x43ffff) AM_RAM_WRITE(hyprduel_vram_1_w) AM_BASE_MEMBER(hyprduel_state, m_vram_1)           /* Layer 1 */
430
 
        AM_RANGE(0x440000, 0x45ffff) AM_RAM_WRITE(hyprduel_vram_2_w) AM_BASE_MEMBER(hyprduel_state, m_vram_2)           /* Layer 2 */
431
 
        AM_RANGE(0x460000, 0x46ffff) AM_READ(hyprduel_bankedrom_r)              /* Banked ROM */
432
 
        AM_RANGE(0x470000, 0x473fff) AM_RAM_WRITE(hyprduel_paletteram_w) AM_BASE_MEMBER(hyprduel_state, m_paletteram)   /* Palette */
433
 
        AM_RANGE(0x474000, 0x474fff) AM_RAM AM_BASE_SIZE_MEMBER(hyprduel_state, m_spriteram, m_spriteram_size)                  /* Sprites */
434
 
        AM_RANGE(0x475000, 0x477fff) AM_RAM                     /* only used memory test */
435
 
        AM_RANGE(0x478000, 0x4787ff) AM_RAM AM_BASE_SIZE_MEMBER(hyprduel_state, m_tiletable, m_tiletable_size)  /* Tiles Set */
436
 
        AM_RANGE(0x478840, 0x47884d) AM_WRITE(hyprduel_blitter_w) AM_BASE_MEMBER(hyprduel_state, m_blitter_regs)        /* Tiles Blitter */
437
 
        AM_RANGE(0x478860, 0x47886b) AM_WRITE(hyprduel_window_w) AM_BASE_MEMBER(hyprduel_state, m_window)                       /* Tilemap Window */
438
 
        AM_RANGE(0x478870, 0x47887b) AM_RAM_WRITE(hyprduel_scrollreg_w) AM_BASE_MEMBER(hyprduel_state, m_scroll)                /* Scroll Regs */
439
 
        AM_RANGE(0x47887c, 0x47887d) AM_WRITE(hyprduel_scrollreg_init_w)
440
 
        AM_RANGE(0x478880, 0x478881) AM_WRITENOP
441
 
        AM_RANGE(0x478890, 0x478891) AM_WRITENOP
442
 
        AM_RANGE(0x4788a0, 0x4788a1) AM_WRITENOP
443
 
        AM_RANGE(0x4788a2, 0x4788a3) AM_READWRITE(hyprduel_irq_cause_r, hyprduel_irq_cause_w)   /* IRQ Cause,Acknowledge */
444
 
        AM_RANGE(0x4788a4, 0x4788a5) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_irq_enable)                /* IRQ Enable */
445
 
        AM_RANGE(0x4788aa, 0x4788ab) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_rombank)           /* Rom Bank */
446
 
        AM_RANGE(0x4788ac, 0x4788ad) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_screenctrl)        /* Screen Control */
447
 
        AM_RANGE(0x479700, 0x479713) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_videoregs) /* Video Registers */
448
 
        AM_RANGE(0x800000, 0x800001) AM_WRITE(hyprduel_subcpu_control_w)
449
 
        AM_RANGE(0xc00000, 0xc07fff) AM_RAM AM_SHARE("share1") AM_BASE_MEMBER(hyprduel_state, m_sharedram1)
450
 
        AM_RANGE(0xe00000, 0xe00001) AM_READ_PORT("SERVICE") AM_WRITENOP
451
 
        AM_RANGE(0xe00002, 0xe00003) AM_READ_PORT("DSW")
452
 
        AM_RANGE(0xe00004, 0xe00005) AM_READ_PORT("P1_P2")
453
 
        AM_RANGE(0xe00006, 0xe00007) AM_READ_PORT("SYSTEM")
454
 
        AM_RANGE(0xfe0000, 0xfe3fff) AM_RAM AM_SHARE("share2")
455
 
        AM_RANGE(0xfe4000, 0xffffff) AM_RAM AM_SHARE("share3") AM_BASE_MEMBER(hyprduel_state, m_sharedram3)
456
 
ADDRESS_MAP_END
457
 
 
458
 
static ADDRESS_MAP_START( hyprduel_map2, AS_PROGRAM, 16 )
459
 
        AM_RANGE(0x000000, 0x003fff) AM_RAM AM_SHARE("share1")                                          /* shadow ($c00000 - $c03fff : vector) */
460
 
        AM_RANGE(0x004000, 0x007fff) AM_READONLY AM_WRITENOP AM_SHARE("share3")                 /* shadow ($fe4000 - $fe7fff : read only) */
461
 
        AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("ymsnd", ym2151_r, ym2151_w, 0x00ff )
462
 
        AM_RANGE(0x400004, 0x400005) AM_DEVREADWRITE8_MODERN("oki", okim6295_device, read, write, 0x00ff)
463
 
        AM_RANGE(0x800000, 0x800001) AM_NOP
464
 
        AM_RANGE(0xc00000, 0xc07fff) AM_RAM AM_SHARE("share1")
465
 
        AM_RANGE(0xfe0000, 0xfe3fff) AM_RAM AM_SHARE("share2")
466
 
        AM_RANGE(0xfe4000, 0xffffff) AM_RAM AM_SHARE("share3")
467
 
ADDRESS_MAP_END
468
 
 
469
 
 
470
 
/* Magical Error - video is at 8x now */
471
 
 
472
 
static ADDRESS_MAP_START( magerror_map, AS_PROGRAM, 16 )
473
 
        AM_RANGE(0x000000, 0x07ffff) AM_ROM
474
 
        AM_RANGE(0x400000, 0x400001) AM_WRITE(hyprduel_subcpu_control_w)
475
 
        AM_RANGE(0x800000, 0x81ffff) AM_RAM_WRITE(hyprduel_vram_0_w) AM_BASE_MEMBER(hyprduel_state, m_vram_0)           /* Layer 0 */
476
 
        AM_RANGE(0x820000, 0x83ffff) AM_RAM_WRITE(hyprduel_vram_1_w) AM_BASE_MEMBER(hyprduel_state, m_vram_1)           /* Layer 1 */
477
 
        AM_RANGE(0x840000, 0x85ffff) AM_RAM_WRITE(hyprduel_vram_2_w) AM_BASE_MEMBER(hyprduel_state, m_vram_2)           /* Layer 2 */
478
 
        AM_RANGE(0x860000, 0x86ffff) AM_READ(hyprduel_bankedrom_r)              /* Banked ROM */
479
 
        AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(hyprduel_paletteram_w) AM_BASE_MEMBER(hyprduel_state, m_paletteram)   /* Palette */
480
 
        AM_RANGE(0x874000, 0x874fff) AM_RAM AM_BASE_SIZE_MEMBER(hyprduel_state, m_spriteram, m_spriteram_size)          /* Sprites */
481
 
        AM_RANGE(0x875000, 0x877fff) AM_RAM                     /* only used memory test */
482
 
        AM_RANGE(0x878000, 0x8787ff) AM_RAM AM_BASE_SIZE_MEMBER(hyprduel_state, m_tiletable, m_tiletable_size)  /* Tiles Set */
483
 
        AM_RANGE(0x878840, 0x87884d) AM_WRITE(hyprduel_blitter_w) AM_BASE_MEMBER(hyprduel_state, m_blitter_regs)        /* Tiles Blitter */
484
 
        AM_RANGE(0x878860, 0x87886b) AM_WRITE(hyprduel_window_w) AM_BASE_MEMBER(hyprduel_state, m_window)                       /* Tilemap Window */
485
 
        AM_RANGE(0x878870, 0x87887b) AM_RAM_WRITE(hyprduel_scrollreg_w) AM_BASE_MEMBER(hyprduel_state, m_scroll)                /* Scroll Regs */
486
 
        AM_RANGE(0x87887c, 0x87887d) AM_WRITE(hyprduel_scrollreg_init_w)
487
 
        AM_RANGE(0x878880, 0x878881) AM_WRITENOP
488
 
        AM_RANGE(0x878890, 0x878891) AM_WRITENOP
489
 
        AM_RANGE(0x8788a0, 0x8788a1) AM_WRITENOP
490
 
        AM_RANGE(0x8788a2, 0x8788a3) AM_READWRITE(hyprduel_irq_cause_r, hyprduel_irq_cause_w)   /* IRQ Cause, Acknowledge */
491
 
        AM_RANGE(0x8788a4, 0x8788a5) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_irq_enable)                /* IRQ Enable */
492
 
        AM_RANGE(0x8788aa, 0x8788ab) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_rombank)           /* Rom Bank */
493
 
        AM_RANGE(0x8788ac, 0x8788ad) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_screenctrl)        /* Screen Control */
494
 
        AM_RANGE(0x879700, 0x879713) AM_RAM AM_BASE_MEMBER(hyprduel_state, m_videoregs) /* Video Registers */
495
 
        AM_RANGE(0xc00000, 0xc1ffff) AM_RAM AM_SHARE("share1") AM_BASE_MEMBER(hyprduel_state, m_sharedram1)
496
 
        AM_RANGE(0xe00000, 0xe00001) AM_READ_PORT("SERVICE") AM_WRITENOP
497
 
        AM_RANGE(0xe00002, 0xe00003) AM_READ_PORT("DSW")
498
 
        AM_RANGE(0xe00004, 0xe00005) AM_READ_PORT("P1_P2")
499
 
        AM_RANGE(0xe00006, 0xe00007) AM_READ_PORT("SYSTEM")
500
 
        AM_RANGE(0xfe0000, 0xfe3fff) AM_RAM AM_SHARE("share2")
501
 
        AM_RANGE(0xfe4000, 0xffffff) AM_RAM AM_SHARE("share3") AM_BASE_MEMBER(hyprduel_state, m_sharedram3)
502
 
ADDRESS_MAP_END
503
 
 
504
 
static ADDRESS_MAP_START( magerror_map2, AS_PROGRAM, 16 )
505
 
        AM_RANGE(0x000000, 0x003fff) AM_RAM AM_SHARE("share1")                                          /* shadow ($c00000 - $c03fff : vector) */
506
 
        AM_RANGE(0x004000, 0x007fff) AM_READONLY AM_WRITENOP AM_SHARE("share3")                 /* shadow ($fe4000 - $fe7fff : read only) */
507
 
        AM_RANGE(0x400000, 0x400003) AM_NOP
508
 
        AM_RANGE(0x800000, 0x800003) AM_READNOP AM_DEVWRITE8("ymsnd", ym2413_w, 0x00ff)
509
 
        AM_RANGE(0x800004, 0x800005) AM_DEVREADWRITE8_MODERN("oki", okim6295_device, read, write, 0x00ff)
510
 
        AM_RANGE(0xc00000, 0xc1ffff) AM_RAM AM_SHARE("share1")
511
 
        AM_RANGE(0xfe0000, 0xfe3fff) AM_RAM AM_SHARE("share2")
512
 
        AM_RANGE(0xfe4000, 0xffffff) AM_RAM AM_SHARE("share3")
513
 
ADDRESS_MAP_END
514
 
 
515
 
/***************************************************************************
516
 
                                Input Ports
517
 
***************************************************************************/
518
 
 
519
 
static INPUT_PORTS_START( hyprduel )
520
 
        PORT_START("SERVICE")
521
 
        PORT_SERVICE_NO_TOGGLE( 0x8000, IP_ACTIVE_LOW )
522
 
        PORT_DIPNAME( 0x4000, 0x0000, "Show Warning" )
523
 
        PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
524
 
        PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
525
 
        PORT_BIT( 0x3fff, IP_ACTIVE_LOW, IPT_UNKNOWN )
526
 
 
527
 
        PORT_START("DSW")
528
 
        PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) )
529
 
        PORT_DIPSETTING(      0x0001, DEF_STR( 4C_1C ) )
530
 
        PORT_DIPSETTING(      0x0002, DEF_STR( 3C_1C ) )
531
 
        PORT_DIPSETTING(      0x0003, DEF_STR( 2C_1C ) )
532
 
        PORT_DIPSETTING(      0x0007, DEF_STR( 1C_1C ) )
533
 
        PORT_DIPSETTING(      0x0006, DEF_STR( 1C_2C ) )
534
 
        PORT_DIPSETTING(      0x0005, DEF_STR( 1C_3C ) )
535
 
        PORT_DIPSETTING(      0x0004, DEF_STR( 1C_4C ) )
536
 
        PORT_DIPSETTING(      0x0000, DEF_STR( Free_Play ) )
537
 
        PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) )
538
 
        PORT_DIPSETTING(      0x0008, DEF_STR( 4C_1C ) )
539
 
        PORT_DIPSETTING(      0x0010, DEF_STR( 3C_1C ) )
540
 
        PORT_DIPSETTING(      0x0018, DEF_STR( 2C_1C ) )
541
 
        PORT_DIPSETTING(      0x0038, DEF_STR( 1C_1C ) )
542
 
        PORT_DIPSETTING(      0x0030, DEF_STR( 1C_2C ) )
543
 
        PORT_DIPSETTING(      0x0028, DEF_STR( 1C_3C ) )
544
 
        PORT_DIPSETTING(      0x0020, DEF_STR( 1C_4C ) )
545
 
        PORT_DIPSETTING(      0x0000, DEF_STR( Free_Play ) )
546
 
        PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) )
547
 
        PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
548
 
        PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
549
 
        PORT_DIPNAME( 0x0080, 0x0080, "Start Up Mode" )
550
 
        PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
551
 
        PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
552
 
        PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Flip_Screen ) )
553
 
        PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
554
 
        PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
555
 
        PORT_BIT(     0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
556
 
        PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) )
557
 
        PORT_DIPSETTING(      0x0800, DEF_STR( Easy ) )
558
 
        PORT_DIPSETTING(      0x0c00, DEF_STR( Normal ) )
559
 
        PORT_DIPSETTING(      0x0400, DEF_STR( Hard ) )
560
 
        PORT_DIPSETTING(      0x0000, DEF_STR( Very_Hard ) )
561
 
        PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Lives ) )
562
 
        PORT_DIPSETTING(      0x2000, "2" )
563
 
        PORT_DIPSETTING(      0x3000, "3" )
564
 
        PORT_DIPSETTING(      0x1000, "4" )
565
 
        PORT_DIPSETTING(      0x0000, "5" )
566
 
        PORT_BIT(     0xc000, IP_ACTIVE_LOW, IPT_UNKNOWN )
567
 
 
568
 
        PORT_START("P1_P2")
569
 
        PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
570
 
        PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
571
 
        PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
572
 
        PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
573
 
        PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
574
 
        PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
575
 
        PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
576
 
        PORT_BIT(  0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_PLAYER(1)
577
 
        PORT_BIT(  0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
578
 
        PORT_BIT(  0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
579
 
        PORT_BIT(  0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
580
 
        PORT_BIT(  0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
581
 
        PORT_BIT(  0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
582
 
        PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
583
 
        PORT_BIT(  0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
584
 
        PORT_BIT(  0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_PLAYER(2)
585
 
 
586
 
        PORT_START("SYSTEM")
587
 
        PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)
588
 
        PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2)
589
 
        PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
590
 
        PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_SERVICE2 )
591
 
        PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_START1 )
592
 
        PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_START2 )
593
 
        PORT_BIT(  0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
594
 
INPUT_PORTS_END
595
 
 
596
 
static INPUT_PORTS_START( magerror )
597
 
        PORT_INCLUDE( hyprduel )
598
 
 
599
 
        PORT_MODIFY("DSW")
600
 
        PORT_DIPNAME( 0x0080, 0x0080, "Start Up Mode" )
601
 
        PORT_DIPSETTING(      0x0080, "Game Mode" )
602
 
        PORT_DIPSETTING(      0x0000, "Test Mode" )
603
 
INPUT_PORTS_END
604
 
 
605
 
/***************************************************************************
606
 
                            Graphics Layouts
607
 
***************************************************************************/
608
 
 
609
 
/* 8x8x4 tiles */
610
 
static GFXLAYOUT_RAW( layout_8x8x4, 4, 8, 8, 4*8, 32*8 )
611
 
 
612
 
/* 8x8x8 tiles for later games */
613
 
static GFXLAYOUT_RAW( layout_8x8x8h, 8, 8, 8, 8*8, 32*8 )
614
 
 
615
 
static GFXDECODE_START( 14220 )
616
 
        GFXDECODE_ENTRY( "gfx1", 0, layout_8x8x4,    0x0, 0x200 ) // [0] 4 Bit Tiles
617
 
        GFXDECODE_ENTRY( "gfx1", 0, layout_8x8x8h,   0x0,  0x20 ) // [1] 8 Bit Tiles
618
 
GFXDECODE_END
619
 
 
620
 
/***************************************************************************
621
 
                            Sound Communication
622
 
***************************************************************************/
623
 
 
624
 
static void sound_irq( device_t *device, int state )
625
 
{
626
 
        hyprduel_state *hyprduel = device->machine().driver_data<hyprduel_state>();
627
 
        device_set_input_line(hyprduel->m_subcpu, 1, HOLD_LINE);
628
 
}
629
 
 
630
 
static const ym2151_interface ym2151_config =
631
 
{
632
 
        sound_irq
633
 
};
634
 
 
635
 
/***************************************************************************
636
 
                                Machine Drivers
637
 
***************************************************************************/
638
 
 
639
 
static MACHINE_RESET( hyprduel )
640
 
{
641
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
642
 
 
643
 
        /* start with cpu2 halted */
644
 
        cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
645
 
        state->m_subcpu_resetline = 1;
646
 
        state->m_cpu_trigger = 0;
647
 
 
648
 
        state->m_requested_int = 0x00;
649
 
        state->m_blitter_bit = 2;
650
 
        *state->m_irq_enable = 0xff;
651
 
}
652
 
 
653
 
static MACHINE_START( hyprduel )
654
 
{
655
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
656
 
 
657
 
        state->m_maincpu = machine.device("maincpu");
658
 
        state->m_subcpu = machine.device("sub");
659
 
 
660
 
        state->save_item(NAME(state->m_blitter_bit));
661
 
        state->save_item(NAME(state->m_requested_int));
662
 
        state->save_item(NAME(state->m_subcpu_resetline));
663
 
        state->save_item(NAME(state->m_cpu_trigger));
664
 
}
665
 
 
666
 
static MACHINE_START( magerror )
667
 
{
668
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
669
 
 
670
 
        MACHINE_START_CALL(hyprduel);
671
 
        state->m_magerror_irq_timer->adjust(attotime::zero, 0, attotime::from_hz(968));         /* tempo? */
672
 
}
673
 
 
674
 
static MACHINE_CONFIG_START( hyprduel, hyprduel_state )
675
 
 
676
 
        /* basic machine hardware */
677
 
        MCFG_CPU_ADD("maincpu", M68000,20000000/2)              /* 10MHz */
678
 
        MCFG_CPU_PROGRAM_MAP(hyprduel_map)
679
 
        MCFG_CPU_VBLANK_INT_HACK(hyprduel_interrupt,RASTER_LINES)
680
 
 
681
 
        MCFG_CPU_ADD("sub", M68000,20000000/2)          /* 10MHz */
682
 
        MCFG_CPU_PROGRAM_MAP(hyprduel_map2)
683
 
 
684
 
        MCFG_MACHINE_START(hyprduel)
685
 
        MCFG_MACHINE_RESET(hyprduel)
686
 
 
687
 
        /* video hardware */
688
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_SCANLINE)
689
 
 
690
 
        MCFG_SCREEN_ADD("screen", RASTER)
691
 
        MCFG_SCREEN_REFRESH_RATE(60)
692
 
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
693
 
        MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
694
 
        MCFG_SCREEN_SIZE(320, 224)
695
 
        MCFG_SCREEN_VISIBLE_AREA(0, 320-1, FIRST_VISIBLE_LINE, LAST_VISIBLE_LINE)
696
 
        MCFG_SCREEN_UPDATE(hyprduel)
697
 
 
698
 
        MCFG_GFXDECODE(14220)
699
 
        MCFG_PALETTE_LENGTH(8192)
700
 
 
701
 
        MCFG_VIDEO_START(hyprduel_14220)
702
 
 
703
 
        /* sound hardware */
704
 
        MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
705
 
 
706
 
        MCFG_SOUND_ADD("ymsnd", YM2151, 4000000)
707
 
        MCFG_SOUND_CONFIG(ym2151_config)
708
 
        MCFG_SOUND_ROUTE(0, "lspeaker", 0.80)
709
 
        MCFG_SOUND_ROUTE(1, "rspeaker", 0.80)
710
 
 
711
 
        MCFG_OKIM6295_ADD("oki", 4000000/16/16*132, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
712
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.57)
713
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.57)
714
 
MACHINE_CONFIG_END
715
 
 
716
 
 
717
 
static MACHINE_CONFIG_START( magerror, hyprduel_state )
718
 
 
719
 
        /* basic machine hardware */
720
 
        MCFG_CPU_ADD("maincpu", M68000,20000000/2)              /* 10MHz */
721
 
        MCFG_CPU_PROGRAM_MAP(magerror_map)
722
 
        MCFG_CPU_VBLANK_INT_HACK(hyprduel_interrupt,RASTER_LINES)
723
 
 
724
 
        MCFG_CPU_ADD("sub", M68000,20000000/2)          /* 10MHz */
725
 
        MCFG_CPU_PROGRAM_MAP(magerror_map2)
726
 
 
727
 
        MCFG_MACHINE_START(magerror)
728
 
        MCFG_MACHINE_RESET(hyprduel)
729
 
 
730
 
        /* video hardware */
731
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_SCANLINE)
732
 
 
733
 
        MCFG_SCREEN_ADD("screen", RASTER)
734
 
        MCFG_SCREEN_REFRESH_RATE(60)
735
 
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
736
 
        MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
737
 
        MCFG_SCREEN_SIZE(320, 224)
738
 
        MCFG_SCREEN_VISIBLE_AREA(0, 320-1, FIRST_VISIBLE_LINE, LAST_VISIBLE_LINE)
739
 
        MCFG_SCREEN_UPDATE(hyprduel)
740
 
 
741
 
        MCFG_GFXDECODE(14220)
742
 
        MCFG_PALETTE_LENGTH(8192)
743
 
 
744
 
        MCFG_VIDEO_START(magerror_14220)
745
 
 
746
 
        /* sound hardware */
747
 
        MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
748
 
 
749
 
        MCFG_SOUND_ADD("ymsnd", YM2413, 3579545)
750
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.00)
751
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.00)
752
 
 
753
 
        MCFG_OKIM6295_ADD("oki", 4000000/16/16*132, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
754
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.57)
755
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.57)
756
 
MACHINE_CONFIG_END
757
 
 
758
 
/***************************************************************************
759
 
                                ROMs Loading
760
 
***************************************************************************/
761
 
 
762
 
ROM_START( hyprduel )
763
 
        ROM_REGION( 0x80000, "maincpu", 0 )
764
 
        ROM_LOAD16_BYTE( "24.u24", 0x000000, 0x40000, CRC(c7402722) SHA1(e385676cdcee65a3ddf07791d82a1fe83ba1b3e2) ) /* Also silk screened as position 10 */
765
 
        ROM_LOAD16_BYTE( "23.u23", 0x000001, 0x40000, CRC(d8297c2b) SHA1(2e23c5b1784d0a465c0c0dc3ca28505689a8b16c) ) /* Also silk screened as position  9 */
766
 
 
767
 
        ROM_REGION( 0x400000, "gfx1", 0 )       /* Gfx + Prg + Data (Addressable by CPU & Blitter) */
768
 
        ROMX_LOAD( "ts_hyper-1.u74", 0x000000, 0x100000, CRC(4b3b2d3c) SHA1(5e9e8ec853f71aeff3910b93dadbaeae2b61717b) , ROM_GROUPWORD | ROM_SKIP(6) )
769
 
        ROMX_LOAD( "ts_hyper-2.u75", 0x000002, 0x100000, CRC(dc230116) SHA1(a3c447657d8499764f52c81382961f425c56037b) , ROM_GROUPWORD | ROM_SKIP(6) )
770
 
        ROMX_LOAD( "ts_hyper-3.u76", 0x000004, 0x100000, CRC(2d770dd0) SHA1(27f9e7f67e96210d3710ab4f940c5d7ae13f8bbf) , ROM_GROUPWORD | ROM_SKIP(6) )
771
 
        ROMX_LOAD( "ts_hyper-4.u77", 0x000006, 0x100000, CRC(f88c6d33) SHA1(277b56df40a17d7dd9f1071b0d498635a5b783cd) , ROM_GROUPWORD | ROM_SKIP(6) )
772
 
 
773
 
        ROM_REGION( 0x40000, "oki", 0 ) /* Samples */
774
 
        ROM_LOAD( "97.u97", 0x00000, 0x40000, CRC(bf3f8574) SHA1(9e743f05e53256c886d43e1f0c43d7417134b9b3) ) /* Also silk screened as position 11 */
775
 
ROM_END
776
 
 
777
 
ROM_START( hyprduel2 )
778
 
        ROM_REGION( 0x80000, "maincpu", 0 )
779
 
        ROM_LOAD16_BYTE( "24a.u24", 0x000000, 0x40000, CRC(2458f91d) SHA1(c75c7bccc84738e29b35667793491a1213aea1da) ) /* Also silk screened as position 10 */
780
 
        ROM_LOAD16_BYTE( "23a.u23", 0x000001, 0x40000, CRC(98aedfca) SHA1(42028e57ac79473cde683be2100b953ff3b2b345) ) /* Also silk screened as position  9 */
781
 
 
782
 
        ROM_REGION( 0x400000, "gfx1", 0 )       /* Gfx + Prg + Data (Addressable by CPU & Blitter) */
783
 
        ROMX_LOAD( "ts_hyper-1.u74", 0x000000, 0x100000, CRC(4b3b2d3c) SHA1(5e9e8ec853f71aeff3910b93dadbaeae2b61717b) , ROM_GROUPWORD | ROM_SKIP(6) )
784
 
        ROMX_LOAD( "ts_hyper-2.u75", 0x000002, 0x100000, CRC(dc230116) SHA1(a3c447657d8499764f52c81382961f425c56037b) , ROM_GROUPWORD | ROM_SKIP(6) )
785
 
        ROMX_LOAD( "ts_hyper-3.u76", 0x000004, 0x100000, CRC(2d770dd0) SHA1(27f9e7f67e96210d3710ab4f940c5d7ae13f8bbf) , ROM_GROUPWORD | ROM_SKIP(6) )
786
 
        ROMX_LOAD( "ts_hyper-4.u77", 0x000006, 0x100000, CRC(f88c6d33) SHA1(277b56df40a17d7dd9f1071b0d498635a5b783cd) , ROM_GROUPWORD | ROM_SKIP(6) )
787
 
 
788
 
        ROM_REGION( 0x40000, "oki", 0 ) /* Samples */
789
 
        ROM_LOAD( "97.u97", 0x00000, 0x40000, CRC(bf3f8574) SHA1(9e743f05e53256c886d43e1f0c43d7417134b9b3) ) /* Also silk screened as position 11 */
790
 
ROM_END
791
 
 
792
 
ROM_START( magerror )
793
 
        ROM_REGION( 0x80000, "maincpu", 0 )
794
 
        ROM_LOAD16_BYTE( "24.u24", 0x000000, 0x40000, CRC(5e78027f) SHA1(053374942bc545a92cc6f6ab6784c4626e4ec9e1) ) /* Also silk screened as position 10 */
795
 
        ROM_LOAD16_BYTE( "23.u23", 0x000001, 0x40000, CRC(7271ec70) SHA1(bd7666390b70821f90ba976a3afe3194fb119478) ) /* Also silk screened as position  9 */
796
 
 
797
 
        ROM_REGION( 0x400000, "gfx1", 0 )       /* Gfx + Prg + Data (Addressable by CPU & Blitter) */
798
 
        ROMX_LOAD( "mr93046-02.u74", 0x000000, 0x100000, CRC(f7ba06fb) SHA1(e1407b0d03863f434b68183c01e8547612e5c5fd) , ROM_GROUPWORD | ROM_SKIP(6) )
799
 
        ROMX_LOAD( "mr93046-04.u75", 0x000002, 0x100000, CRC(8c114d15) SHA1(4eb1f82e7992deb126633287cb4fd2a6d215346c) , ROM_GROUPWORD | ROM_SKIP(6) )
800
 
        ROMX_LOAD( "mr93046-01.u76", 0x000004, 0x100000, CRC(6cc3b928) SHA1(f19d0add314867bfb7dcefe8e7a2d50a84530df7) , ROM_GROUPWORD | ROM_SKIP(6) )
801
 
        ROMX_LOAD( "mr93046-03.u77", 0x000006, 0x100000, CRC(6b1eb0ea) SHA1(6167a61562ef28147a7917c692f181f3fc2d5be6) , ROM_GROUPWORD | ROM_SKIP(6) )
802
 
 
803
 
        ROM_REGION( 0x40000, "oki", 0 ) /* Samples */
804
 
        ROM_LOAD( "97.u97", 0x00000, 0x40000, CRC(2e62bca8) SHA1(191fff11186dbbc1d9d9f3ba1b6e17c38a7d2d1d) ) /* Also silk screened as position 11 */
805
 
ROM_END
806
 
 
807
 
 
808
 
static DRIVER_INIT( hyprduel )
809
 
{
810
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
811
 
 
812
 
        state->m_int_num = 0x02;
813
 
 
814
 
        /* cpu synchronization (severe timings) */
815
 
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xc0040e, 0xc00411, FUNC(hyprduel_cpusync_trigger1_w));
816
 
        machine.device("sub")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0xc00408, 0xc00409, FUNC(hyprduel_cpusync_trigger1_r));
817
 
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xc00408, 0xc00409, FUNC(hyprduel_cpusync_trigger2_w));
818
 
        machine.device("sub")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0xfff34c, 0xfff34d, FUNC(hyprduel_cpusync_trigger2_r));
819
 
}
820
 
 
821
 
static DRIVER_INIT( magerror )
822
 
{
823
 
        hyprduel_state *state = machine.driver_data<hyprduel_state>();
824
 
 
825
 
        state->m_int_num = 0x01;
826
 
        state->m_magerror_irq_timer = machine.scheduler().timer_alloc(FUNC(magerror_irq_callback));
827
 
}
828
 
 
829
 
 
830
 
GAME( 1993, hyprduel, 0,        hyprduel, hyprduel, hyprduel, ROT0, "Technosoft", "Hyper Duel (Japan set 1)", GAME_SUPPORTS_SAVE )
831
 
GAME( 1993, hyprduel2,hyprduel, hyprduel, hyprduel, hyprduel, ROT0, "Technosoft", "Hyper Duel (Japan set 2)", GAME_SUPPORTS_SAVE )
832
 
GAME( 1994, magerror, 0,        magerror, magerror, magerror, ROT0, "Technosoft / Jaleco", "Magical Error wo Sagase", GAME_SUPPORTS_SAVE )