← Back to branch summary

~ubuntu-branches/debian/sid/mame/sid

« back to all changes in this revision

Viewing changes to mess/src/mame/machine/pgmprot.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Jordi Mallach, Emmanuel Kasper
  • Date: 2011-12-19 22:56:27 UTC
  • mfrom: (0.1.2)
  • Revision ID: package-import@ubuntu.com-20111219225627-ub5oga1oys4ogqzm
Tags: 0.144-1
http://bugs.debian.org/651538
[ Jordi Mallach ]
* Fix syntax errors in DEP5 copyright file (lintian).
* Use a versioned copyright Format specification field.
* Update Vcs-* URLs.
* Move transitional packages to the new metapackages section, and make
  them priority extra.
* Remove references to GNU/Linux and MESS sources from copyright.
* Add build variables for s390x.
* Use .xz tarballs as it cuts 4MB for the upstream sources.
* Add nplayers.ini as a patch. Update copyright file to add CC-BY-SA-3.0.

[ Emmanuel Kasper ]
* New upstream release. Closes: #651538.
* Add Free Desktop compliant png icons of various sizes taken from
  the hydroxygen iconset
* Mess is now built from a new source package, to avoid possible source
  incompatibilities between mame and the mess overlay.
* Mame-tools are not built from the mame source package anymore, but
  from the mess source package

Show diffs side-by-side

added added

removed removed

Lines of Context:
mess/src/mame/machine/pgmprot.c
1
 
#include "emu.h"
2
 
#include "includes/pgm.h"
3
 
 
4
 
 
5
 
 
6
 
/*** ASIC27a (Puzzle Star) -- ARM but with no external rom? behaves a bit like KOV ***/
7
 
 
8
 
 
9
 
/*** (pstarS) ***/
10
 
 
11
 
static const int pstar_ba[0x1E]={
12
 
        0x02,0x00,0x00,0x01,0x00,0x03,0x00,0x00, //0
13
 
        0x02,0x00,0x06,0x00,0x22,0x04,0x00,0x03, //8
14
 
        0x00,0x00,0x06,0x00,0x20,0x07,0x00,0x03, //10
15
 
        0x00,0x21,0x01,0x00,0x00,0x63
16
 
};
17
 
 
18
 
static const int pstar_b0[0x10]={
19
 
        0x09,0x0A,0x0B,0x00,0x01,0x02,0x03,0x04,
20
 
        0x05,0x06,0x07,0x08,0x00,0x00,0x00,0x00
21
 
};
22
 
 
23
 
static const int pstar_ae[0x10]={
24
 
        0x5D,0x86,0x8C ,0x8B,0xE0,0x8B,0x62,0xAF,
25
 
        0xB6,0xAF,0x10A,0xAF,0x00,0x00,0x00,0x00
26
 
};
27
 
 
28
 
static const int pstar_a0[0x10]={
29
 
        0x02,0x03,0x04,0x05,0x06,0x01,0x0A,0x0B,
30
 
        0x0C,0x0D,0x0E,0x09,0x00,0x00,0x00,0x00,
31
 
};
32
 
 
33
 
static const int pstar_9d[0x10]={
34
 
        0x05,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
35
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
36
 
};
37
 
 
38
 
static const int pstar_90[0x10]={
39
 
        0x0C,0x10,0x0E,0x0C,0x00,0x00,0x00,0x00,
40
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
41
 
};
42
 
static const int pstar_8c[0x23]={
43
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
44
 
        0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,
45
 
        0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,
46
 
        0x02,0x02,0x03,0x03,0x03,0x04,0x04,0x04,
47
 
        0x03,0x03,0x03
48
 
};
49
 
 
50
 
static const int pstar_80[0x1a3]={
51
 
        0x03,0x03,0x04,0x04,0x04,0x04,0x05,0x05,
52
 
        0x05,0x05,0x06,0x06,0x03,0x03,0x04,0x04,
53
 
        0x05,0x05,0x05,0x05,0x06,0x06,0x07,0x07,
54
 
        0x03,0x03,0x04,0x04,0x05,0x05,0x05,0x05,
55
 
        0x06,0x06,0x07,0x07,0x06,0x06,0x06,0x06,
56
 
        0x06,0x06,0x06,0x07,0x07,0x07,0x07,0x07,
57
 
        0x06,0x06,0x06,0x06,0x06,0x06,0x07,0x07,
58
 
        0x07,0x07,0x08,0x08,0x05,0x05,0x05,0x05,
59
 
        0x05,0x05,0x05,0x06,0x06,0x06,0x07,0x07,
60
 
        0x06,0x06,0x06,0x07,0x07,0x07,0x08,0x08,
61
 
        0x09,0x09,0x09,0x09,0x07,0x07,0x07,0x07,
62
 
        0x07,0x08,0x08,0x08,0x08,0x09,0x09,0x09,
63
 
        0x06,0x06,0x07,0x07,0x07,0x08,0x08,0x08,
64
 
        0x08,0x08,0x09,0x09,0x05,0x05,0x06,0x06,
65
 
        0x06,0x07,0x07,0x08,0x08,0x08,0x08,0x09,
66
 
        0x07,0x07,0x07,0x07,0x07,0x08,0x08,0x08,
67
 
        0x08,0x09,0x09,0x09,0x06,0x06,0x07,0x03,
68
 
        0x07,0x06,0x07,0x07,0x08,0x07,0x05,0x04,
69
 
        0x03,0x03,0x04,0x04,0x05,0x05,0x06,0x06,
70
 
        0x06,0x06,0x06,0x06,0x03,0x04,0x04,0x04,
71
 
        0x04,0x05,0x05,0x06,0x06,0x06,0x06,0x07,
72
 
        0x04,0x04,0x05,0x05,0x06,0x06,0x06,0x06,
73
 
        0x06,0x07,0x07,0x08,0x05,0x05,0x06,0x07,
74
 
        0x07,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
75
 
        0x05,0x05,0x05,0x07,0x07,0x07,0x07,0x07,
76
 
        0x07,0x08,0x08,0x08,0x08,0x08,0x09,0x09,
77
 
        0x09,0x09,0x03,0x04,0x04,0x05,0x05,0x05,
78
 
        0x06,0x06,0x07,0x07,0x07,0x07,0x08,0x08,
79
 
        0x08,0x09,0x09,0x09,0x03,0x04,0x05,0x05,
80
 
        0x04,0x03,0x04,0x04,0x04,0x05,0x05,0x04,
81
 
        0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,
82
 
        0x03,0x03,0x03,0x04,0x04,0x04,0x04,0x04,
83
 
        0x04,0x04,0x04,0x04,0x04,0x03,0x03,0x03,
84
 
        0x03,0x03,0x03,0x00,0x00,0x00,0x00,0x00,
85
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
86
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
87
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
88
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
89
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
90
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
91
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
92
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
93
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
94
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
95
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
96
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
97
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
98
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
99
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
100
 
        0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,
101
 
        0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,
102
 
        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
103
 
        0x00,0x00,0x00
104
 
};
105
 
 
106
 
 
107
 
 
108
 
 
109
 
READ16_HANDLER( pstars_protram_r )
110
 
{
111
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
112
 
 
113
 
        if (offset == 4)                //region
114
 
                return input_port_read(space->machine(), "Region");
115
 
        else if (offset >= 0x10)  //timer
116
 
        {
117
 
                logerror("PSTARS ACCESS COUNTER %6X\n", state->m_pstar_ram[offset - 0x10]);
118
 
                return state->m_pstar_ram[offset - 0x10]--;
119
 
        }
120
 
        return 0x0000;
121
 
}
122
 
 
123
 
READ16_HANDLER( pstars_r )
124
 
{
125
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
126
 
 
127
 
        if (offset == 0)
128
 
        {
129
 
                UINT16 d = state->m_pstars_val & 0xffff;
130
 
                UINT16 realkey = state->m_pstars_key >> 8;
131
 
                realkey |= state->m_pstars_key;
132
 
                d ^= realkey;
133
 
//      logerror("PSTARS A27 R  %6X\n", state->m_pstars_val);
134
 
                return d;
135
 
        }
136
 
        else if (offset == 1)
137
 
        {
138
 
                UINT16 d = state->m_pstars_val >> 16;
139
 
                UINT16 realkey = state->m_pstars_key >> 8;
140
 
                realkey |= state->m_pstars_key;
141
 
                d ^= realkey;
142
 
                return d;
143
 
 
144
 
        }
145
 
        return 0xff;
146
 
}
147
 
 
148
 
WRITE16_HANDLER( pstars_w )
149
 
{
150
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
151
 
 
152
 
        if (offset == 0)
153
 
        {
154
 
                state->m_pstars_int[0] = data;
155
 
                return;
156
 
        }
157
 
 
158
 
        if (offset == 1)
159
 
        {
160
 
                UINT16 realkey;
161
 
                if ((data >> 8) == 0xff)
162
 
                        state->m_pstars_key = 0xff00;
163
 
                realkey = state->m_pstars_key >> 8;
164
 
                realkey |= state->m_pstars_key;
165
 
                {
166
 
                        state->m_pstars_key += 0x100;
167
 
                        state->m_pstars_key &= 0xff00;
168
 
                        if (state->m_pstars_key == 0xff00)
169
 
                                state->m_pstars_key = 0x100;
170
 
                }
171
 
                data ^= realkey;
172
 
                state->m_pstars_int[1] = data;
173
 
                state->m_pstars_int[0] ^= realkey;
174
 
 
175
 
                switch (state->m_pstars_int[1] & 0xff)
176
 
                {
177
 
                case 0x99:
178
 
                        state->m_pstars_key = 0x100;
179
 
                        state->m_pstars_val = 0x880000;
180
 
                        break;
181
 
 
182
 
                case 0xe0:
183
 
                        state->m_pstars_val = 0xa00000 + (state->m_pstars_int[0] << 6);
184
 
                        break;
185
 
 
186
 
                case 0xdc:
187
 
                        state->m_pstars_val = 0xa00800 + (state->m_pstars_int[0] << 6);
188
 
                        break;
189
 
 
190
 
                case 0xd0:
191
 
                        state->m_pstars_val = 0xa01000 + (state->m_pstars_int[0] << 5);
192
 
                        break;
193
 
 
194
 
                case 0xb1:
195
 
                        state->m_pstar_b1 = state->m_pstars_int[0];
196
 
                        state->m_pstars_val = 0x890000;
197
 
                        break;
198
 
 
199
 
                case 0xbf:
200
 
                        state->m_pstars_val = state->m_pstar_b1 * state->m_pstars_int[0];
201
 
                        break;
202
 
 
203
 
                case 0xc1: //TODO:TIMER  0,1,2,FIX TO 0 should be OK?
204
 
                        state->m_pstars_val = 0;
205
 
                        break;
206
 
 
207
 
                case 0xce: //TODO:TIMER  0,1,2
208
 
                        state->m_pstar_ce = state->m_pstars_int[0];
209
 
                        state->m_pstars_val=0x890000;
210
 
                        break;
211
 
 
212
 
                case 0xcf: //TODO:TIMER  0,1,2
213
 
                        state->m_pstar_ram[state->m_pstar_ce] = state->m_pstars_int[0];
214
 
                        state->m_pstars_val = 0x890000;
215
 
                        break;
216
 
 
217
 
                case 0xe7:
218
 
                        state->m_pstar_e7 = (state->m_pstars_int[0] >> 12) & 0xf;
219
 
                        state->m_pstars_regs[state->m_pstar_e7] &= 0xffff;
220
 
                        state->m_pstars_regs[state->m_pstar_e7] |= (state->m_pstars_int[0] & 0xff) << 16;
221
 
                        state->m_pstars_val = 0x890000;
222
 
                        break;
223
 
 
224
 
                case 0xe5:
225
 
                        state->m_pstars_regs[state->m_pstar_e7] &= 0xff0000;
226
 
                        state->m_pstars_regs[state->m_pstar_e7] |= state->m_pstars_int[0];
227
 
                        state->m_pstars_val = 0x890000;
228
 
                        break;
229
 
 
230
 
                case 0xf8: //@73C
231
 
                        state->m_pstars_val = state->m_pstars_regs[state->m_pstars_int[0] & 0xf] & 0xffffff;
232
 
                        break;
233
 
 
234
 
                case 0xba:
235
 
                        state->m_pstars_val = pstar_ba[state->m_pstars_int[0]];
236
 
                        break;
237
 
 
238
 
                case 0xb0:
239
 
                        state->m_pstars_val = pstar_b0[state->m_pstars_int[0]];
240
 
                        break;
241
 
 
242
 
                case 0xae:
243
 
                        state->m_pstars_val = pstar_ae[state->m_pstars_int[0]];
244
 
                        break;
245
 
 
246
 
                case 0xa0:
247
 
                        state->m_pstars_val = pstar_a0[state->m_pstars_int[0]];
248
 
                        break;
249
 
 
250
 
                case 0x9d:
251
 
                        state->m_pstars_val = pstar_9d[state->m_pstars_int[0]];
252
 
                        break;
253
 
 
254
 
                case 0x90:
255
 
                        state->m_pstars_val = pstar_90[state->m_pstars_int[0]];
256
 
                        break;
257
 
 
258
 
                case 0x8c:
259
 
                        state->m_pstars_val = pstar_8c[state->m_pstars_int[0]];
260
 
                        break;
261
 
 
262
 
                case 0x80:
263
 
                        state->m_pstars_val = pstar_80[state->m_pstars_int[0]];
264
 
                        break;
265
 
 
266
 
                default:
267
 
                        state->m_pstars_val = 0x890000;
268
 
                        logerror("PSTARS PC(%06x) UNKNOWN %4X %4X\n", cpu_get_pc(&space->device()), state->m_pstars_int[1], state->m_pstars_int[0]);
269
 
 
270
 
                }
271
 
 
272
 
        }
273
 
}
274
 
 
275
 
/*** ASIC 3 (oriental legends protection) ****************************************/
276
 
 
277
 
static void asic3_compute_hold(running_machine &machine)
278
 
{
279
 
        pgm_state *state = machine.driver_data<pgm_state>();
280
 
 
281
 
        // The mode is dependent on the region
282
 
        static const int modes[4] = { 1, 1, 3, 2 };
283
 
        int mode = modes[input_port_read(machine, "Region") & 3];
284
 
 
285
 
        switch (mode)
286
 
        {
287
 
        case 1:
288
 
                state->m_asic3_hold =
289
 
                        (state->m_asic3_hold << 1)
290
 
                         ^ 0x2bad
291
 
                         ^ BIT(state->m_asic3_hold, 15) ^ BIT(state->m_asic3_hold, 10) ^ BIT(state->m_asic3_hold, 8) ^ BIT(state->m_asic3_hold, 5)
292
 
                         ^ BIT(state->m_asic3_z, state->m_asic3_y)
293
 
                         ^ (BIT(state->m_asic3_x, 0) << 1) ^ (BIT(state->m_asic3_x, 1) << 6) ^ (BIT(state->m_asic3_x, 2) << 10) ^ (BIT(state->m_asic3_x, 3) << 14);
294
 
                break;
295
 
        case 2:
296
 
                state->m_asic3_hold =
297
 
                        (state->m_asic3_hold << 1)
298
 
                         ^ 0x2bad
299
 
                         ^ BIT(state->m_asic3_hold, 15) ^ BIT(state->m_asic3_hold, 7) ^ BIT(state->m_asic3_hold, 6) ^ BIT(state->m_asic3_hold, 5)
300
 
                         ^ BIT(state->m_asic3_z, state->m_asic3_y)
301
 
                         ^ (BIT(state->m_asic3_x, 0) << 4) ^ (BIT(state->m_asic3_x, 1) << 6) ^ (BIT(state->m_asic3_x, 2) << 10) ^ (BIT(state->m_asic3_x, 3) << 12);
302
 
                break;
303
 
        case 3:
304
 
                state->m_asic3_hold =
305
 
                        (state->m_asic3_hold << 1)
306
 
                         ^ 0x2bad
307
 
                         ^ BIT(state->m_asic3_hold, 15) ^ BIT(state->m_asic3_hold, 10) ^ BIT(state->m_asic3_hold, 8) ^ BIT(state->m_asic3_hold, 5)
308
 
                         ^ BIT(state->m_asic3_z, state->m_asic3_y)
309
 
                         ^ (BIT(state->m_asic3_x, 0) << 4) ^ (BIT(state->m_asic3_x, 1) << 6) ^ (BIT(state->m_asic3_x, 2) << 10) ^ (BIT(state->m_asic3_x, 3) << 12);
310
 
                break;
311
 
        }
312
 
}
313
 
 
314
 
READ16_HANDLER( pgm_asic3_r )
315
 
{
316
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
317
 
        UINT8 res = 0;
318
 
        /* region is supplied by the protection device */
319
 
 
320
 
        switch (state->m_asic3_reg)
321
 
        {
322
 
        case 0x00: res = (state->m_asic3_latch[0] & 0xf7) | ((input_port_read(space->machine(), "Region") << 3) & 0x08); break;
323
 
        case 0x01: res = state->m_asic3_latch[1]; break;
324
 
        case 0x02: res = (state->m_asic3_latch[2] & 0x7f) | ((input_port_read(space->machine(), "Region") << 6) & 0x80); break;
325
 
        case 0x03:
326
 
                res = (BIT(state->m_asic3_hold, 15) << 0)
327
 
                        | (BIT(state->m_asic3_hold, 12) << 1)
328
 
                        | (BIT(state->m_asic3_hold, 13) << 2)
329
 
                        | (BIT(state->m_asic3_hold, 10) << 3)
330
 
                        | (BIT(state->m_asic3_hold, 7) << 4)
331
 
                        | (BIT(state->m_asic3_hold, 9) << 5)
332
 
                        | (BIT(state->m_asic3_hold, 2) << 6)
333
 
                        | (BIT(state->m_asic3_hold, 5) << 7);
334
 
                break;
335
 
        case 0x20: res = 0x49; break;
336
 
        case 0x21: res = 0x47; break;
337
 
        case 0x22: res = 0x53; break;
338
 
        case 0x24: res = 0x41; break;
339
 
        case 0x25: res = 0x41; break;
340
 
        case 0x26: res = 0x7f; break;
341
 
        case 0x27: res = 0x41; break;
342
 
        case 0x28: res = 0x41; break;
343
 
        case 0x2a: res = 0x3e; break;
344
 
        case 0x2b: res = 0x41; break;
345
 
        case 0x2c: res = 0x49; break;
346
 
        case 0x2d: res = 0xf9; break;
347
 
        case 0x2e: res = 0x0a; break;
348
 
        case 0x30: res = 0x26; break;
349
 
        case 0x31: res = 0x49; break;
350
 
        case 0x32: res = 0x49; break;
351
 
        case 0x33: res = 0x49; break;
352
 
        case 0x34: res = 0x32; break;
353
 
        }
354
 
 
355
 
        return res;
356
 
}
357
 
 
358
 
WRITE16_HANDLER( pgm_asic3_w )
359
 
{
360
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
361
 
 
362
 
        if(ACCESSING_BITS_0_7)
363
 
        {
364
 
                if (state->m_asic3_reg < 3)
365
 
                        state->m_asic3_latch[state->m_asic3_reg] = data << 1;
366
 
                else if (state->m_asic3_reg == 0xa0)
367
 
                        state->m_asic3_hold = 0;
368
 
                else if (state->m_asic3_reg == 0x40)
369
 
                {
370
 
                        state->m_asic3_h2 = state->m_asic3_h1;
371
 
                        state->m_asic3_h1 = data;
372
 
                }
373
 
                else if (state->m_asic3_reg == 0x48)
374
 
                {
375
 
                        state->m_asic3_x = 0;
376
 
                        if (!(state->m_asic3_h2 & 0x0a))
377
 
                                state->m_asic3_x |= 8;
378
 
                        if (!(state->m_asic3_h2 & 0x90))
379
 
                                state->m_asic3_x |= 4;
380
 
                        if (!(state->m_asic3_h1 & 0x06))
381
 
                                state->m_asic3_x |= 2;
382
 
                        if (!(state->m_asic3_h1 & 0x90))
383
 
                                state->m_asic3_x |= 1;
384
 
                }
385
 
                else if(state->m_asic3_reg >= 0x80 && state->m_asic3_reg <= 0x87)
386
 
                {
387
 
                        state->m_asic3_y = state->m_asic3_reg & 7;
388
 
                        state->m_asic3_z = data;
389
 
                        asic3_compute_hold(space->machine());
390
 
                }
391
 
        }
392
 
}
393
 
 
394
 
WRITE16_HANDLER( pgm_asic3_reg_w )
395
 
{
396
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
397
 
 
398
 
        if(ACCESSING_BITS_0_7)
399
 
                state->m_asic3_reg = data & 0xff;
400
 
}
401
 
 
402
 
/*** Knights of Valour / Sango / PhotoY2k Protection (from ElSemi) (ASIC28) ***/
403
 
 
404
 
static const UINT32 B0TABLE[16] = {2, 0, 1, 4, 3}; //maps char portraits to tables
405
 
 
406
 
// photo2yk bonus stage
407
 
static const UINT32 AETABLE[16]={0x00,0x0a,0x14,
408
 
                0x01,0x0b,0x15,
409
 
                0x02,0x0c,0x16
410
 
};
411
 
 
412
 
//Not sure if BATABLE is complete
413
 
static const UINT32 BATABLE[0x40]= {
414
 
     0x00,0x29,0x2c,0x35,0x3a,0x41,0x4a,0x4e,  //0x00
415
 
     0x57,0x5e,0x77,0x79,0x7a,0x7b,0x7c,0x7d, //0x08
416
 
     0x7e,0x7f,0x80,0x81,0x82,0x85,0x86,0x87, //0x10
417
 
     0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x90,  //0x18
418
 
     0x95,0x96,0x97,0x98,0x99,0x9a,0x9b,0x9c,
419
 
     0x9e,0xa3,0xd4,0xa9,0xaf,0xb5,0xbb,0xc1
420
 
};
421
 
 
422
 
 
423
 
 
424
 
READ16_HANDLER( sango_protram_r )
425
 
{
426
 
        // at offset == 4 is region (supplied by device)
427
 
        // 0 = china
428
 
        // 1 = taiwan
429
 
        // 2 = japan
430
 
        // 3 = korea
431
 
        // 4 = hong kong
432
 
        // 5 = world
433
 
 
434
 
        if (offset == 4)
435
 
                return input_port_read(space->machine(), "Region");
436
 
 
437
 
        // otherwise it doesn't seem to use the ram for anything important, we return 0 to avoid test mode corruption
438
 
        // kovplus reads from offset 000e a lot ... why?
439
 
#ifdef MAME_DEBUG
440
 
        popmessage ("protection ram r %04x",offset);
441
 
#endif
442
 
        return 0x0000;
443
 
}
444
 
 
445
 
#define BITSWAP10(val,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \
446
 
                ((BIT(val, B9) <<  9) | \
447
 
                 (BIT(val, B8) <<  8) | \
448
 
                 (BIT(val, B7) <<  7) | \
449
 
                 (BIT(val, B6) <<  6) | \
450
 
                 (BIT(val, B5) <<  5) | \
451
 
                 (BIT(val, B4) <<  4) | \
452
 
                 (BIT(val, B3) <<  3) | \
453
 
                 (BIT(val, B2) <<  2) | \
454
 
                 (BIT(val, B1) <<  1) | \
455
 
                 (BIT(val, B0) <<  0))
456
 
 
457
 
 
458
 
READ16_HANDLER( asic28_r )
459
 
{
460
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
461
 
        UINT32 val = (state->m_asic28_regs[1] << 16) | (state->m_asic28_regs[0]);
462
 
 
463
 
        //logerror("Asic28 Read PC = %06x Command = %02x ??\n", cpu_get_pc(&space->device()), state->m_asic28_regs[1]);
464
 
 
465
 
        switch (state->m_asic28_regs[1] & 0xff)
466
 
        {
467
 
                case 0x99:
468
 
                        val = 0x880000;
469
 
                        break;
470
 
 
471
 
                case 0x9d:      // spr palette
472
 
                        val = 0xa00000 + ((state->m_asic28_regs[0] & 0x1f) << 6);
473
 
                        break;
474
 
 
475
 
                case 0xb0:
476
 
                        val = B0TABLE[state->m_asic28_regs[0] & 0xf];
477
 
                        break;
478
 
 
479
 
                case 0xb4:
480
 
                        {
481
 
                                //UINT16 tmp = state->m_eoregs[v2];
482
 
                                int v2 = state->m_asic28_regs[0] & 0x0f;
483
 
                                int v1 = (state->m_asic28_regs[0] & 0x0f00) >> 8;
484
 
                                //state->m_eoregs[v2] = state->m_eoregs[v1];
485
 
                                //state->m_eoregs[v1] = tmp;
486
 
                                if (state->m_asic28_regs[0] == 0x102)
487
 
                                        state->m_eoregs[1] = state->m_eoregs[0];
488
 
                                else
489
 
                                        state->m_eoregs[v1] = state->m_eoregs[v2];
490
 
 
491
 
                                val = 0x880000;
492
 
                        }
493
 
                        break;
494
 
 
495
 
                case 0xba:
496
 
                        val = BATABLE[state->m_asic28_regs[0] & 0x3f];
497
 
                        if (state->m_asic28_regs[0] > 0x2f)
498
 
                                popmessage("Unmapped BA com %02x, contact ElSemi / MameDev", state->m_asic28_regs[0]);
499
 
                        break;
500
 
 
501
 
                case 0xc0:
502
 
                        val = 0x880000;
503
 
                        break;
504
 
 
505
 
                case 0xc3:      //TXT tile position Uses C0 to select column
506
 
                        val = 0x904000 + (state->m_asic_params[0xc0] + state->m_asic_params[0xc3] * 64) * 4;
507
 
                        break;
508
 
 
509
 
                case 0xcb:
510
 
                        val = 0x880000;
511
 
                        break;
512
 
 
513
 
                case 0xcc: //BG
514
 
                        {
515
 
                        int y = state->m_asic_params[0xcc];
516
 
                        if (y & 0x400)    //y is signed (probably x too and it also applies to TXT, but I've never seen it used)
517
 
                                y =- (0x400 - (y & 0x3ff));
518
 
                        val = 0x900000 + (((state->m_asic_params[0xcb] + (y) * 64) * 4) /*&0x1fff*/);
519
 
                        }
520
 
                        break;
521
 
 
522
 
                case 0xd0:      //txt palette
523
 
                        val = 0xa01000 + (state->m_asic28_regs[0] << 5);
524
 
                        break;
525
 
 
526
 
                case 0xd6:      //???? check it
527
 
                        {
528
 
                                int v2 = state->m_asic28_regs[0] & 0xf;
529
 
                                //int v1 = (state->m_asic28_regs[0] & 0xf0) >> 4;
530
 
                                state->m_eoregs[0] = state->m_eoregs[v2];
531
 
                                //state->m_eoregs[v2] = 0;
532
 
                                val = 0x880000;
533
 
                        }
534
 
                        break;
535
 
 
536
 
                case 0xdc:      //bg palette
537
 
                        val = 0xa00800 + (state->m_asic28_regs[0] << 6);
538
 
                        break;
539
 
 
540
 
                case 0xe0:      //spr palette
541
 
                        val = 0xa00000 + ((state->m_asic28_regs[0] & 0x1f) << 6);
542
 
                        break;
543
 
 
544
 
                case 0xe5:
545
 
                        val = 0x880000;
546
 
                        break;
547
 
 
548
 
                case 0xe7:
549
 
                        val = 0x880000;
550
 
                        break;
551
 
 
552
 
                case 0xf0:
553
 
                        val = 0x00C000;
554
 
                        break;
555
 
 
556
 
                case 0xf8:
557
 
                        val = state->m_eoregs[state->m_asic28_regs[0] & 0xf] & 0xffffff;
558
 
                        break;
559
 
 
560
 
                case 0xfc:      //Adjust damage level to char experience level
561
 
                        {
562
 
                        val = (state->m_asic_params[0xfc] * state->m_asic_params[0xfe]) >> 6;
563
 
                        break;
564
 
                        }
565
 
 
566
 
                case 0xfe:      //todo
567
 
                        val = 0x880000;
568
 
                        break;
569
 
 
570
 
 
571
 
                default:
572
 
                        val = 0x880000;
573
 
        }
574
 
 
575
 
        if(offset == 0)
576
 
        {
577
 
                UINT16 d = val & 0xffff;
578
 
                UINT16 realkey = state->m_asic28_key >> 8;
579
 
                realkey |= state->m_asic28_key;
580
 
                d ^= realkey;
581
 
                return d;
582
 
        }
583
 
        else if (offset == 1)
584
 
        {
585
 
                UINT16 d = val >> 16;
586
 
                UINT16 realkey = state->m_asic28_key >> 8;
587
 
                realkey |= state->m_asic28_key;
588
 
                d ^= realkey;
589
 
                state->m_asic28_rcnt++;
590
 
                if (!(state->m_asic28_rcnt & 0xf))
591
 
                {
592
 
                        state->m_asic28_key += 0x100;
593
 
                        state->m_asic28_key &= 0xff00;
594
 
                }
595
 
                return d;
596
 
        }
597
 
        return 0xff;
598
 
}
599
 
 
600
 
WRITE16_HANDLER( asic28_w )
601
 
{
602
 
        pgm_state *state = space->machine().driver_data<pgm_state>();
603
 
 
604
 
        if (offset == 0)
605
 
        {
606
 
                UINT16 realkey =state->m_asic28_key >> 8;
607
 
                realkey |= state->m_asic28_key;
608
 
                data ^= realkey;
609
 
                state->m_asic28_regs[0] = data;
610
 
                return;
611
 
        }
612
 
        if (offset == 1)
613
 
        {
614
 
                UINT16 realkey;
615
 
 
616
 
                state->m_asic28_key = data & 0xff00;
617
 
 
618
 
                realkey = state->m_asic28_key >> 8;
619
 
                realkey |= state->m_asic28_key;
620
 
                data ^= realkey;
621
 
                state->m_asic28_regs[1] = data;
622
 
                logerror("ASIC28 CMD %04x  PARAM %04x\n", state->m_asic28_regs[1], state->m_asic28_regs[0]);
623
 
 
624
 
                state->m_asic_params[state->m_asic28_regs[1] & 0xff] = state->m_asic28_regs[0];
625
 
                if (state->m_asic28_regs[1] == 0xE7)
626
 
                {
627
 
                        UINT32 E0R = (state->m_asic_params[0xe7] >> 12) & 0xf;
628
 
                        state->m_eoregs[E0R] &= 0xffff;
629
 
                        state->m_eoregs[E0R] |= state->m_asic28_regs[0] << 16;
630
 
                }
631
 
                if (state->m_asic28_regs[1]==0xE5)
632
 
                {
633
 
                        UINT32 E0R = (state->m_asic_params[0xe7] >> 12) & 0xf;
634
 
                        state->m_eoregs[E0R] &= 0xff0000;
635
 
                        state->m_eoregs[E0R] |= state->m_asic28_regs[0];
636
 
                }
637
 
                state->m_asic28_rcnt = 0;
638
 
        }
639
 
}
640
 
 
641
 
/* Dragon World 2 */
642
 
 
643
 
#define DW2BITSWAP(s,d,bs,bd)  d=((d&(~(1<<bd)))|(((s>>bs)&1)<<bd))
644
 
//Use this handler for reading from 0xd80000-0xd80002
645
 
READ16_HANDLER( dw2_d80000_r )
646
 
{
647
 
// addr&=0xff;
648
 
// if(dw2reg<0x20) //NOT SURE!!
649
 
        {
650
 
                //The value at 0x80EECE is computed in the routine at 0x107c18
651
 
                UINT16 d = pgm_mainram[0xEECE/2];
652
 
                UINT16 d2 = 0;
653
 
                d = (d >> 8) | (d << 8);
654
 
                DW2BITSWAP(d, d2, 7,  0);
655
 
                DW2BITSWAP(d, d2, 4,  1);
656
 
                DW2BITSWAP(d, d2, 5,  2);
657
 
                DW2BITSWAP(d, d2, 2,  3);
658
 
                DW2BITSWAP(d, d2, 15, 4);
659
 
                DW2BITSWAP(d, d2, 1,  5);
660
 
                DW2BITSWAP(d, d2, 10, 6);
661
 
                DW2BITSWAP(d, d2, 13, 7);
662
 
                // ... missing bitswaps here (8-15) there is not enough data to know them
663
 
                // the code only checks the lowest 8 bytes
664
 
                return d2;
665
 
        }
666
 
}
667
 
 
668
 
/* Dragon World 3
669
 
 
670
 
Dragon World 3 has 2 protection chips
671
 
ASIC022 and ASIC025
672
 
one of them also has an external data rom (encrypted?)
673
 
 
674
 
code below is ElSemi's preliminary code, it doesn't work properly and isn't used, much of the protection isn't understood */
675
 
 
676
 
#if 0
677
 
AddWriteArea(0xda0000,0xdaffff,0,dw3_w8,dw3_w16,dw3_w32);
678
 
AddReadArea (0xda0000,0xdaffff,0,dw3_r8,dw3_r16,dw3_r32);
679
 
 
680
 
#define DW3BITSWAP(s,d,bs,bd)  d=((d&(~(1<<bd)))|(((s>>bs)&1)<<bd))
681
 
 
682
 
UINT16 dw3_Rw[8];
683
 
UINT8 *dw3_R=(UINT8 *) dw3_Rw;
684
 
 
685
 
UINT8 dw3_r8(UINT32 addr)
686
 
{
687
 
        if(addr>=0xDA5610 && addr<=0xDA5613)
688
 
                return *((UINT8 *) (dw3_R+((addr-0xDA5610)^1)));
689
 
        return 0;
690
 
}
691
 
 
692
 
UINT16 dw3_r16(UINT32 addr)
693
 
{
694
 
        if(addr>=0xDA5610 && addr<=0xDA5613)
695
 
                return *((UINT16 *) (dw3_R+(addr-0xDA5610)));
696
 
        return 0;
697
 
}
698
 
 
699
 
UINT32 dw3_r32(UINT32 addr)
700
 
{
701
 
        return 0;
702
 
}
703
 
 
704
 
void dw3_w8(UINT32 addr,UINT8 val)
705
 
{
706
 
        if(addr==0xDA5610)
707
 
                dw3_R[1]=val;
708
 
        if(addr==0xDA5611)
709
 
                dw3_R[0]=val;
710
 
        if(addr==0xDA5612)
711
 
                dw3_R[3]=val;
712
 
        if(addr==0xDA5613)
713
 
                dw3_R[2]=val;
714
 
}
715
 
 
716
 
void dw3_w16(UINT32 addr,UINT16 val)
717
 
{
718
 
        if(addr>=0xDA5610 && addr<=0xDA5613)
719
 
        {
720
 
                UINT16 *s=((UINT16 *) (dw3_R+(addr-0xDA5610)));
721
 
                *s=val;
722
 
                if(addr==0xDA5610)
723
 
                {
724
 
                        if(val==1)
725
 
                        {
726
 
                                UINT16 v1=dw3_Rw[1];
727
 
                                UINT16 v2=0;
728
 
                                DW3BITSWAP(v1,v2,0,0);
729
 
                                DW3BITSWAP(v1,v2,1,1);
730
 
                                DW3BITSWAP(v1,v2,7,2);
731
 
                                DW3BITSWAP(v1,v2,6,3);
732
 
                                DW3BITSWAP(v1,v2,5,4);
733
 
                                DW3BITSWAP(v1,v2,4,5);
734
 
                                DW3BITSWAP(v1,v2,3,6);
735
 
                                DW3BITSWAP(v1,v2,2,7);
736
 
 
737
 
                                dw3_Rw[1]=v2;
738
 
                        }
739
 
                }
740
 
        }
741
 
 
742
 
}
743
 
 
744
 
 
745
 
void dw3_w32(UINT32 addr,UINT32 val)
746
 
{
747
 
 
748
 
}
749
 
#endif