3
Raiden 2 / DX V33 Version
5
Temporary split from raiden2.c, it'll be re-merged at some point.
8
Please don't do any state machine refactoring of this.
11
1) appears to control where the first enemies turns, if clockwise or anticlockwise
14
Raiden 2 / DX checks if there's the string "RAIDEN" at start-up inside the eeprom, otherwise it dies.
15
Then it puts settings at 0x9e08 and 0x9e0a (bp 91acb)
20
#include "cpu/nec/nec.h"
21
#include "cpu/z80/z80.h"
22
#include "audio/seibu.h"
23
#include "machine/eeprom.h"
24
#include "sound/okim6295.h"
25
#include "includes/raiden2.h"
28
class r2dx_v33_state : public driver_device
31
r2dx_v33_state(const machine_config &mconfig, device_type type, const char *tag)
32
: driver_device(mconfig, type, tag) { }
38
static UINT16 *seibu_crtc_regs;
39
static UINT16 *bg_vram,*md_vram,*fg_vram,*tx_vram;
40
static tilemap_t *bg_tilemap,*md_tilemap,*fg_tilemap,*tx_tilemap;
42
static TILE_GET_INFO( get_bg_tile_info )
44
int tile = bg_vram[tile_index];
45
int color = (tile>>12)&0xf;
49
SET_TILE_INFO(1,tile + 0x0000,color,0);
52
static TILE_GET_INFO( get_md_tile_info )
54
int tile = md_vram[tile_index];
55
int color = (tile>>12)&0xf;
59
SET_TILE_INFO(2,tile + 0x2000,color,0);
62
static TILE_GET_INFO( get_fg_tile_info )
64
int tile = fg_vram[tile_index];
65
int color = (tile>>12)&0xf;
69
SET_TILE_INFO(3,tile + 0x1000,color,0);
72
static TILE_GET_INFO( get_tx_tile_info )
74
int tile = tx_vram[tile_index];
75
int color = (tile>>12)&0xf;
79
SET_TILE_INFO(4,tile,color,0);
82
/* copied from Legionnaire */
83
static void draw_sprites(running_machine &machine, bitmap_t *bitmap,const rectangle *cliprect,int pri)
85
r2dx_v33_state *state = machine.driver_data<r2dx_v33_state>();
86
UINT16 *spriteram16 = state->m_spriteram;
87
int offs,fx,fy,x,y,color,sprite;
91
for (offs = 0x400-4;offs >= 0;offs -= 4)
93
UINT16 data = spriteram16[offs];
94
//if (!(data &0x8000)) continue;
96
//cur_pri = (spriteram16[offs+1] & 0xc000) >> 14;
97
//if (cur_pri!=pri) continue;
99
sprite = spriteram16[offs+1];
102
//if(data & 0x8000) sprite |= 0x4000;
103
//if(spriteram16[offs+3] & 0x8000) sprite |= 0x8000;//tile banking?,used in Denjin Makai
105
y = spriteram16[offs+3];
106
x = spriteram16[offs+2];
111
if (x&0x8000) x-=0x10000;
112
if (y&0x8000) y-=0x10000;
114
color = (data &0x3f);
115
fx = (data &0x8000) >> 15;
116
fy = (data &0x0800) >> 11;
117
dx = ((data &0x0700) >> 8) + 1;
118
dy = ((data &0x7000) >> 12) + 1;
124
for (ax=0; ax<dx; ax++)
125
for (ay=0; ay<dy; ay++)
127
drawgfx_transpen(bitmap,cliprect,machine.gfx[0],
129
color,fx,fy,x+ax*16,y+ay*16,15);
134
for (ax=0; ax<dx; ax++)
135
for (ay=0; ay<dy; ay++)
137
drawgfx_transpen(bitmap,cliprect,machine.gfx[0],
139
color,fx,fy,x+ax*16,y+(dy-ay-1)*16,15);
147
for (ax=0; ax<dx; ax++)
148
for (ay=0; ay<dy; ay++)
150
drawgfx_transpen(bitmap,cliprect,machine.gfx[0],
152
color,fx,fy,x+(dx-ax-1)*16,y+ay*16,15);
157
for (ax=0; ax<dx; ax++)
158
for (ay=0; ay<dy; ay++)
160
drawgfx_transpen(bitmap,cliprect,machine.gfx[0],
162
color,fx,fy,x+(dx-ax-1)*16,y+(dy-ay-1)*16,15);
169
static VIDEO_START( rdx_v33 )
171
bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,16,16,32,32);
172
md_tilemap = tilemap_create(machine, get_md_tile_info, tilemap_scan_rows,16,16,32,32);
173
fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows,16,16,32,32);
174
tx_tilemap = tilemap_create(machine, get_tx_tile_info, tilemap_scan_rows,8, 8, 64,32);
176
tilemap_set_transparent_pen(bg_tilemap, 15);
177
tilemap_set_transparent_pen(md_tilemap, 15);
178
tilemap_set_transparent_pen(fg_tilemap, 15);
179
tilemap_set_transparent_pen(tx_tilemap, 15);
182
static SCREEN_UPDATE( rdx_v33 )
184
bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine()));
186
tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
187
tilemap_draw(bitmap, cliprect, md_tilemap, 0, 0);
188
tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
190
draw_sprites(screen->machine(),bitmap,cliprect,0);
192
tilemap_draw(bitmap, cliprect, tx_tilemap, 0, 0);
194
/* debug DMA processing */
197
static UINT32 src_addr = 0x100000;
199
address_space *space = screen->machine().device("maincpu")->memory().space(AS_PROGRAM);
201
//if(screen->machine().input().code_pressed_once(KEYCODE_A))
204
//if(screen->machine().input().code_pressed_once(KEYCODE_S))
209
popmessage("%08x 0",src_addr);
211
//if(screen->machine().input().code_pressed_once(KEYCODE_Z))
215
static UINT8 *rom = space->machine().region("mainprg")->base();
217
for(i=0;i<0x800;i+=2)
219
data = rom[src_addr+i+0];
220
space->write_byte(i+0xd000+0, data);
221
data = rom[src_addr+i+1];
222
space->write_byte(i+0xd000+1, data);
225
popmessage("%08x 1",src_addr);
226
tilemap_mark_all_tiles_dirty(bg_tilemap);
234
WRITE16_DEVICE_HANDLER( rdx_v33_eeprom_w )
236
if (ACCESSING_BITS_0_7)
238
eeprom_device *eeprom = downcast<eeprom_device *>(device);
239
eeprom->set_clock_line((data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
240
eeprom->write_bit(data & 0x20);
241
eeprom->set_cs_line((data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
243
if (data&0xc7) logerror("eeprom_w extra bits used %04x\n",data);
247
logerror("eeprom_w MSB used %04x",data);
251
/* new zero team uses the copd3 protection... and uploads a 0x400 byte table, probably the mcu code, encrypted */
254
static UINT16 mcu_prog[0x800];
255
static int mcu_prog_offs = 0;
257
WRITE16_HANDLER( mcu_prog_w )
259
mcu_prog[mcu_prog_offs*2] = data;
262
WRITE16_HANDLER( mcu_prog_w2 )
264
mcu_prog[mcu_prog_offs*2+1] = data;
266
// both new zero team and raiden2/dx v33 version upload the same table..
271
sprintf(tmp,"cop3_%s.data", space->machine().system().name);
273
fp=fopen(tmp, "w+b");
276
fwrite(mcu_prog, 0x400, 2, fp);
283
WRITE16_HANDLER( mcu_prog_offs_w )
285
mcu_prog_offs = data;
288
static WRITE16_HANDLER( rdx_bg_vram_w )
290
COMBINE_DATA(&bg_vram[offset]);
291
tilemap_mark_tile_dirty(bg_tilemap, offset);
294
static WRITE16_HANDLER( rdx_md_vram_w )
296
COMBINE_DATA(&md_vram[offset]);
297
tilemap_mark_tile_dirty(md_tilemap, offset);
300
static WRITE16_HANDLER( rdx_fg_vram_w )
302
COMBINE_DATA(&fg_vram[offset]);
303
tilemap_mark_tile_dirty(fg_tilemap, offset);
306
static WRITE16_HANDLER( rdx_tx_vram_w )
308
COMBINE_DATA(&tx_vram[offset]);
309
tilemap_mark_tile_dirty(tx_tilemap, offset);
312
static READ16_HANDLER( rdx_v33_unknown_r )
314
return space->machine().rand();
318
static UINT16 mcu_xval,mcu_yval;
320
/* something sent to the MCU for X/Y global screen calculating ... */
321
static WRITE16_HANDLER( mcu_xval_w )
324
//popmessage("%04x %04x",mcu_xval,mcu_yval);
327
static WRITE16_HANDLER( mcu_yval_w )
330
//popmessage("%04x %04x",mcu_xval,mcu_yval);
333
static UINT16 mcu_data[9];
335
/* 0x400-0x407 seems some DMA hook-up, 0x420-0x427 looks like some x/y sprite calculation routine */
336
static WRITE16_HANDLER( mcu_table_w )
338
mcu_data[offset] = data;
340
//popmessage("%04x %04x %04x %04x | %04x %04x %04x %04x",mcu_data[0/2],mcu_data[2/2],mcu_data[4/2],mcu_data[6/2],mcu_data[8/2],mcu_data[0xa/2],mcu_data[0xc/2],mcu_data[0xe/2]);
343
static WRITE16_HANDLER( mcu_table2_w )
345
mcu_data[offset+4] = data;
347
//popmessage("%04x %04x %04x %04x | %04x %04x %04x %04x",mcu_data[0/2],mcu_data[2/2],mcu_data[4/2],mcu_data[6/2],mcu_data[8/2],mcu_data[0xa/2],mcu_data[0xc/2],mcu_data[0xe/2]);
351
static ADDRESS_MAP_START( rdx_v33_map, AS_PROGRAM, 16 )
352
AM_RANGE(0x00000, 0x003ff) AM_RAM // vectors copied here
354
AM_RANGE(0x00400, 0x00407) AM_WRITE(mcu_table_w)
355
AM_RANGE(0x00420, 0x00429) AM_WRITE(mcu_table2_w)
357
/* results from cop? */
358
AM_RANGE(0x00430, 0x00431) AM_READ(rdx_v33_unknown_r)
359
AM_RANGE(0x00432, 0x00433) AM_READ(rdx_v33_unknown_r)
360
AM_RANGE(0x00434, 0x00435) AM_READ(rdx_v33_unknown_r)
361
AM_RANGE(0x00436, 0x00437) AM_READ(rdx_v33_unknown_r)
363
AM_RANGE(0x00600, 0x0064f) AM_RAM AM_BASE(&seibu_crtc_regs)
364
AM_RANGE(0x00650, 0x0068f) AM_RAM //???
366
AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
367
AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
368
AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
369
// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
370
// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
371
AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
372
AM_RANGE(0x006be, 0x006bf) AM_WRITENOP // MCU program related
373
AM_RANGE(0x006d8, 0x006d9) AM_WRITE(mcu_xval_w)
374
AM_RANGE(0x006da, 0x006db) AM_WRITE(mcu_yval_w)
375
// AM_RANGE(0x006dc, 0x006dd) AM_READ(rdx_v33_unknown2_r)
376
// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
378
AM_RANGE(0x00700, 0x00701) AM_DEVWRITE("eeprom", rdx_v33_eeprom_w)
379
// AM_RANGE(0x00740, 0x00741) AM_READ(rdx_v33_unknown2_r)
380
AM_RANGE(0x00744, 0x00745) AM_READ_PORT("INPUT")
381
AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
382
AM_RANGE(0x00762, 0x00763) AM_READNOP
384
AM_RANGE(0x00780, 0x00781) AM_DEVREADWRITE8_MODERN("oki", okim6295_device, read, write, 0x00ff) // single OKI chip on this version
386
AM_RANGE(0x00800, 0x00fff) AM_RAM // copies eeprom here?
387
AM_RANGE(0x01000, 0x0bfff) AM_RAM
389
AM_RANGE(0x0c000, 0x0c7ff) AM_RAM AM_BASE_MEMBER(r2dx_v33_state, m_spriteram)
390
AM_RANGE(0x0c800, 0x0cfff) AM_RAM
391
AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(rdx_bg_vram_w) AM_BASE(&bg_vram)
392
AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(rdx_md_vram_w) AM_BASE(&md_vram)
393
AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(rdx_fg_vram_w) AM_BASE(&fg_vram)
394
AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(rdx_tx_vram_w) AM_BASE(&tx_vram)
395
AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
396
AM_RANGE(0x10000, 0x1efff) AM_RAM
397
AM_RANGE(0x1f000, 0x1ffff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
399
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("bank1")
400
AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000 )
403
static READ16_HANDLER( nzerotea_sound_comms_r )
407
case (0x788/2): return seibu_main_word_r(space,2,0xffff);
408
case (0x78c/2): return seibu_main_word_r(space,3,0xffff);
409
case (0x794/2): return seibu_main_word_r(space,5,0xffff);
416
static WRITE16_HANDLER( nzerotea_sound_comms_w )
420
case (0x780/2): { seibu_main_word_w(space,0,data,0x00ff); break; }
421
case (0x784/2): { seibu_main_word_w(space,1,data,0x00ff); break; }
422
//case (0x790/2): { seibu_main_word_w(space,4,data,0x00ff); break; }
423
case (0x794/2): { seibu_main_word_w(space,4,data,0x00ff); break; }
424
case (0x798/2): { seibu_main_word_w(space,6,data,0x00ff); break; }
428
static ADDRESS_MAP_START( nzerotea_map, AS_PROGRAM, 16 )
429
AM_RANGE(0x00000, 0x003ff) AM_RAM //stack area
431
/* results from cop? */
432
AM_RANGE(0x00430, 0x00431) AM_READ(rdx_v33_unknown_r)
433
AM_RANGE(0x00432, 0x00433) AM_READ(rdx_v33_unknown_r)
434
AM_RANGE(0x00434, 0x00435) AM_READ(rdx_v33_unknown_r)
435
AM_RANGE(0x00436, 0x00437) AM_READ(rdx_v33_unknown_r)
437
AM_RANGE(0x00400, 0x00407) AM_WRITE(mcu_table_w)
438
AM_RANGE(0x00420, 0x00427) AM_WRITE(mcu_table2_w)
440
AM_RANGE(0x00600, 0x0064f) AM_RAM AM_BASE(&seibu_crtc_regs)
442
AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
443
AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
444
AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
445
// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
446
// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
447
AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
448
// AM_RANGE(0x006d8, 0x006d9) AM_WRITE(bbbbll_w) // scroll?
449
// AM_RANGE(0x006dc, 0x006dd) AM_READ(nzerotea_unknown_r)
450
// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
451
//AM_RANGE(0x00700, 0x00701) AM_DEVWRITE("eeprom", rdx_v33_eeprom_w)
452
AM_RANGE(0x00740, 0x00741) AM_READ_PORT("DSW")
453
AM_RANGE(0x00744, 0x00745) AM_READ_PORT("INPUT")
454
AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
455
// AM_RANGE(0x00762, 0x00763) AM_READ(nzerotea_unknown_r)
457
AM_RANGE(0x00780, 0x0079f) AM_READWRITE(nzerotea_sound_comms_r,nzerotea_sound_comms_w)
459
AM_RANGE(0x00800, 0x00fff) AM_RAM
460
AM_RANGE(0x01000, 0x0bfff) AM_RAM
462
AM_RANGE(0x0c000, 0x0c7ff) AM_RAM AM_BASE_MEMBER(r2dx_v33_state, m_spriteram)
463
AM_RANGE(0x0c800, 0x0cfff) AM_RAM
464
AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(rdx_bg_vram_w) AM_BASE(&bg_vram)
465
AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(rdx_md_vram_w) AM_BASE(&md_vram)
466
AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(rdx_fg_vram_w) AM_BASE(&fg_vram)
467
AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(rdx_tx_vram_w) AM_BASE(&tx_vram)
468
AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
469
AM_RANGE(0x10000, 0x1efff) AM_RAM
470
AM_RANGE(0x1f000, 0x1ffff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
472
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("bank1")
473
AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000 )
476
static INTERRUPT_GEN( rdx_v33_interrupt )
478
device_set_input_line_and_vector(device, 0, HOLD_LINE, 0xc0/4); /* VBL */
481
static const gfx_layout rdx_v33_charlayout =
487
{ 3,2,1,0,19,18,17,16 },
493
static const gfx_layout rdx_v33_tilelayout =
502
3+64*8, 2+64*8, 1+64*8, 0+64*8,
503
19+64*8,18+64*8,17+64*8,16+64*8,
509
static const gfx_layout rdx_v33_spritelayout =
515
{ 4, 0, 12, 8, 20, 16, 28, 24, 36, 32, 44, 40, 52, 48, 60, 56 },
520
static GFXDECODE_START( rdx_v33 )
521
GFXDECODE_ENTRY( "gfx3", 0x00000, rdx_v33_spritelayout, 0x000, 0x40 )
522
GFXDECODE_ENTRY( "gfx2", 0x00000, rdx_v33_tilelayout, 0x400, 0x10 )
523
GFXDECODE_ENTRY( "gfx2", 0x00000, rdx_v33_tilelayout, 0x500, 0x10 )
524
GFXDECODE_ENTRY( "gfx2", 0x00000, rdx_v33_tilelayout, 0x600, 0x10 )
525
GFXDECODE_ENTRY( "gfx1", 0x00000, rdx_v33_charlayout, 0x700, 0x10 )
526
GFXDECODE_ENTRY( "gfx1", 0x00000, rdx_v33_tilelayout, 0x700, 0x10 ) // debugging, to be removed
529
static INPUT_PORTS_START( rdx_v33 )
531
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
532
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
533
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
534
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
535
PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
536
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
537
PORT_DIPNAME( 0x0040, 0x0040, "Test Mode" )
538
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
539
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
540
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
541
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
542
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
543
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
546
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
547
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
548
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
549
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
550
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
551
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
552
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
553
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN1 )
554
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
555
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
556
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
557
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
558
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
559
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
560
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
561
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN2 )
565
static INPUT_PORTS_START( nzerotea )
567
SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
570
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
571
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
572
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
573
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
574
//PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
575
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
576
PORT_DIPNAME( 0x0040, 0x0040, "Test Mode" )
577
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
578
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
579
PORT_BIT( 0xff80, IP_ACTIVE_LOW, IPT_UNUSED )
582
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
583
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
584
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
585
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
586
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
587
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
588
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
589
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
590
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
591
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
592
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
593
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
594
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
595
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
596
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
597
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
598
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
599
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
600
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
601
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
604
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
605
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
606
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
607
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
608
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
609
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
610
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
611
PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
612
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
613
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
614
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
615
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
616
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
617
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
618
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
619
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
620
PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
621
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
622
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
623
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
624
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
625
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Service_Mode ) )
626
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
627
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
628
PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
629
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
630
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
631
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
632
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
633
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
634
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
635
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
636
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
637
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
638
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
639
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
640
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
641
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
642
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
643
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
644
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
645
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
646
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
647
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
648
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
649
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
650
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
651
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
655
static MACHINE_CONFIG_START( rdx_v33, r2dx_v33_state )
657
/* basic machine hardware */
658
MCFG_CPU_ADD("maincpu", V33, 32000000/2 ) // ?
659
MCFG_CPU_PROGRAM_MAP(rdx_v33_map)
660
MCFG_CPU_VBLANK_INT("screen", rdx_v33_interrupt)
662
//MCFG_MACHINE_RESET(rdx_v33)
664
MCFG_EEPROM_93C46_ADD("eeprom")
667
MCFG_SCREEN_ADD("screen", RASTER)
668
MCFG_SCREEN_REFRESH_RATE(60)
669
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
670
MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
671
MCFG_SCREEN_SIZE(64*8, 64*8)
672
MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1)
673
MCFG_SCREEN_UPDATE(rdx_v33)
675
MCFG_GFXDECODE(rdx_v33)
676
MCFG_PALETTE_LENGTH(2048)
678
MCFG_VIDEO_START(rdx_v33)
681
MCFG_SPEAKER_STANDARD_MONO("mono")
683
MCFG_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
684
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
687
static MACHINE_CONFIG_START( nzerotea, r2dx_v33_state )
689
/* basic machine hardware */
690
MCFG_CPU_ADD("maincpu", V33,XTAL_32MHz/2) /* verified on pcb */
691
MCFG_CPU_PROGRAM_MAP(nzerotea_map)
692
MCFG_CPU_VBLANK_INT("screen", rdx_v33_interrupt)
694
MCFG_MACHINE_RESET(seibu_sound)
696
// SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(14318180/4)
697
SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(14318180/4)
700
MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
702
MCFG_SCREEN_ADD("screen", RASTER)
703
MCFG_SCREEN_REFRESH_RATE(55.47) /* verified on pcb */
704
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate *//2)
705
MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
706
MCFG_SCREEN_SIZE(64*8, 64*8)
707
MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0, 32*8-1)
708
MCFG_SCREEN_UPDATE(rdx_v33)
709
MCFG_GFXDECODE(rdx_v33)
710
MCFG_PALETTE_LENGTH(2048)
712
MCFG_VIDEO_START(rdx_v33)
715
// SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(28636360/8,28636360/28,1,2)
716
SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
721
static DRIVER_INIT(rdx_v33)
723
memory_configure_bank(machine, "bank1", 0, 0x20, machine.region("mainprg")->base(), 0x20000);
725
raiden2_decrypt_sprites(machine);
727
memory_set_bank(machine, "bank1", 1);
730
static DRIVER_INIT(nzerotea)
732
memory_configure_bank(machine, "bank1", 0, 2, machine.region("mainprg")->base(), 0x20000);
734
raiden2_decrypt_sprites(machine);
736
memory_set_bank(machine, "bank1", 1);
743
Seibu Kaihatsu, 1993/1996
745
Note! PCB seems like an updated version. It uses _entirely_ SMD technology and
746
is smaller than the previous hardware. I guess the game is still popular, so
747
Seibu re-manufactured it using newer technology to meet demand.
748
Previous version hardware is similar to Heated Barrel/Legionairre/Seibu Cup Soccer etc.
749
It's possible that the BG and OBJ ROMs from this set can be used to complete the
750
previous (incomplete) dump that runs on the V30 hardware, since most GFX chips are the same.
752
PCB ID: (C) 1996 JJ4-China-Ver2.0 SEIBU KAIHATSU INC., MADE IN JAPAN
753
CPU : NEC 70136AL-16 (V33)
756
RAM : CY7C199-15 (28 Pin SOIC, x11)
757
Breakdown of RAM locations...
763
DIPs : 8 position (x1)
765
7 OFF = Normal Mode , ON = Test/Setting Mode
766
8 OFF = Normal Screen, ON = FLIP Screen
768
OTHER : Controls are 8-way + 3 Buttons
769
Amtel 93C46 EEPROM (SOIC8)
770
PALCE16V8 (x1, near BG ROM, SOIC20)
771
SEIBU SEI360 SB06-1937 (160 pin PQFP)
772
SEIBI SIE150 (100 pin PQFP, Note SIE, not a typo)
773
SEIBU SEI252 (208 pin PQFP)
774
SEIBU SEI333 (208 pin PQFP)
775
SEIBU SEI0200 TC110G21AF (100 pin PQFP)
777
Note: Most of the custom SEIBU chips are the same as the ones used on the
778
previous version hardware.
780
ROMs : (filename is PCB label, extension is PCB 'u' location)
782
ROM ROM Probably Byte
783
Filename Label Type Used... Note C'sum
784
---------------------------------------------------------------------------------
785
PCM.099 RAIDEN-X SOUND LH538100 (SOP32) Oki Samples 0 8539h
786
FIX.613 RAIDEN-X FIX LH532048 (SOP40) ? (BG?) 1 182Dh
787
COPX_D3.357 RAIDEN-X 333 LH530800A (SOP32) Protection? 2 CEE4h
788
PRG.223 RAIDEN-X CHR-4A1 MX23C3210 (SOP44) V33 program 3 F276h
789
OBJ1.724 RAIDEN-X CHR1 MX23C3210 (SOP44) Motion Objects 4 4148h
790
OBJ2.725 RAIDEN-X CHR2 MX23C3210 (SOP44) Motion Objects 4 00C3h
791
BG.612 RAIDEN-X CHR3 MX23C3210 (SOP44) Backgrounds 5 3280h
795
0. Located near Oki M6295
796
1. Located near SEI0200 and BG ROM
797
2. Located near SEI333
798
3. Located near V33 and SEI333
799
4. Located near V33 and SEI252
800
5. Located near FIX ROM and SEI0200
805
ROM_START( r2dx_v33 )
806
ROM_REGION( 0x400000, "mainprg", 0 ) /* v33 main cpu */
807
ROM_LOAD("prg.223", 0x000000, 0x400000, CRC(b3dbcf98) SHA1(30d6ec2090531c8c579dff74c4898889902d7d87) )
809
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
811
// ROM_REGION( 0x20000, "cpu1", ROMREGION_ERASE00 ) /* 64k code for sound Z80 */
814
ROM_REGION( 0x040000, "gfx1", 0 ) /* chars */
815
ROM_LOAD( "fix.613", 0x000000, 0x040000, CRC(3da27e39) SHA1(3d446990bf36dd0a3f8fadb68b15bed54904c8b5) )
817
ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
818
ROM_LOAD( "bg.612", 0x000000, 0x400000, CRC(162c61e9) SHA1(bd0a6a29804b84196ba6bf3402e9f30a25da9269) )
820
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
821
ROM_LOAD32_WORD( "obj1.724", 0x000000, 0x400000, CRC(7d218985) SHA1(777241a533defcbea3d7e735f309478d260bad52) )
822
ROM_LOAD32_WORD( "obj2.725", 0x000002, 0x400000, CRC(b09434d9) SHA1(da75252b7693ab791fece4c10b8a4910edb76c88) )
824
ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
825
ROM_LOAD( "pcm.099", 0x00000, 0x100000, CRC(97ca2907) SHA1(bfe8189300cf72089d0beaeab8b1a0a1a4f0a5b6) )
827
ROM_REGION( 0x40000, "user2", 0 ) /* COPX */
828
ROM_LOAD( "copx_d3.357", 0x00000, 0x20000, CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) )
830
ROM_REGION16_BE( 0x80, "eeprom", 0 )
831
ROM_LOAD16_WORD( "eeprom-r2dx_v33.bin", 0x0000, 0x0080, CRC(ba454777) SHA1(101c5364e8664d17bfb1e759515d135a2673d67e) )
834
/* Different hardware, uses COPX-D3 for protection */
835
ROM_START( nzerotea )
836
ROM_REGION( 0x100000, "mainprg", 0 ) /* v30 main cpu */
837
ROM_LOAD16_BYTE("prg1", 0x000000, 0x80000, CRC(3c7d9410) SHA1(25f2121b6c2be73f11263934266901ed5d64d2ee) )
838
ROM_LOAD16_BYTE("prg2", 0x000001, 0x80000, CRC(6cba032d) SHA1(bf5d488cd578fff09e62e3650efdee7658033e3f) )
840
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
842
ROM_REGION( 0x40000, "user2", 0 ) /* COPX */
843
/* not from this set, assumed to be the same */
844
ROM_LOAD( "copx-d3.bin", 0x00000, 0x20000, BAD_DUMP CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) )
846
ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
847
ROM_LOAD( "sound", 0x000000, 0x08000, CRC(7ec1fbc3) SHA1(48299d6530f641b18764cc49e283c347d0918a47) )
848
ROM_CONTINUE( 0x010000, 0x08000 ) /* banked stuff */
849
ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
851
ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
852
ROM_LOAD16_BYTE( "fix1", 0x000000, 0x010000, CRC(0c4895b0) SHA1(f595dbe5a19edb8a06ea60105ee26b95db4a2619) )
853
ROM_LOAD16_BYTE( "fix2", 0x000001, 0x010000, CRC(07d8e387) SHA1(52f54a6a4830592784cdf643a5f255aa3db53e50) )
855
ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
856
ROM_LOAD( "back-1", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
857
ROM_LOAD( "back-2", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
859
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
860
ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
861
ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
863
ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
864
ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) )
867
// newer PCB, with V33 CPU and COPD3 protection, but weak sound hardware. - was marked as Raiden DX New in the rom dump, but boots as Raiden 2 New version, is it switchable?
868
GAME( 1996, r2dx_v33, 0, rdx_v33, rdx_v33, rdx_v33, ROT270, "Seibu Kaihatsu", "Raiden II / DX (newer V33 PCB)", GAME_NOT_WORKING|GAME_NO_SOUND)
870
// 'V33 system type_b' - uses V33 CPU, COPX-D3 external protection rom, but still has the proper sound system
871
GAME( 1997, nzerotea, zeroteam, nzerotea, nzerotea, nzerotea, ROT0, "Seibu Kaihatsu", "New Zero Team", GAME_NOT_WORKING|GAME_NO_SOUND) // this uses a v33 and COPD3