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  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Jordi Mallach, Emmanuel Kasper
  • Date: 2011-12-19 22:56:27 UTC
  • mfrom: (0.1.2)
  • Revision ID: package-import@ubuntu.com-20111219225627-ub5oga1oys4ogqzm
Tags: 0.144-1
[ Jordi Mallach ]
* Fix syntax errors in DEP5 copyright file (lintian).
* Use a versioned copyright Format specification field.
* Update Vcs-* URLs.
* Move transitional packages to the new metapackages section, and make
  them priority extra.
* Remove references to GNU/Linux and MESS sources from copyright.
* Add build variables for s390x.
* Use .xz tarballs as it cuts 4MB for the upstream sources.
* Add nplayers.ini as a patch. Update copyright file to add CC-BY-SA-3.0.

[ Emmanuel Kasper ]
* New upstream release. Closes: #651538.
* Add Free Desktop compliant png icons of various sizes taken from
  the hydroxygen iconset
* Mess is now built from a new source package, to avoid possible source
  incompatibilities between mame and the mess overlay.
* Mame-tools are not built from the mame source package anymore, but
  from the mess source package

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Lines of Context:
1
 
/*  Taito Wolf System
2
 
 
3
 
    Driver by Ville Linde
4
 
*/
5
 
 
6
 
#include "emu.h"
7
 
#include "cpu/i386/i386.h"
8
 
#include "memconv.h"
9
 
#include "devconv.h"
10
 
#include "machine/8237dma.h"
11
 
#include "machine/pic8259.h"
12
 
#include "machine/pit8253.h"
13
 
#include "machine/mc146818.h"
14
 
#include "machine/pcshare.h"
15
 
#include "machine/pci.h"
16
 
#include "machine/8042kbdc.h"
17
 
#include "machine/pckeybrd.h"
18
 
#include "machine/idectrl.h"
19
 
 
20
 
 
21
 
class taitowlf_state : public driver_device
22
 
{
23
 
public:
24
 
        taitowlf_state(const machine_config &mconfig, device_type type, const char *tag)
25
 
                : driver_device(mconfig, type, tag) { }
26
 
 
27
 
        UINT32 *m_cga_ram;
28
 
        UINT32 *m_bios_ram;
29
 
        UINT8 m_mxtc_config_reg[256];
30
 
        UINT8 m_piix4_config_reg[4][256];
31
 
        int m_dma_channel;
32
 
        UINT8 m_dma_offset[2][4];
33
 
        UINT8 m_at_pages[0x10];
34
 
 
35
 
        device_t        *m_pit8254;
36
 
        device_t        *m_pic8259_1;
37
 
        device_t        *m_pic8259_2;
38
 
        device_t        *m_dma8237_1;
39
 
        device_t        *m_dma8237_2;
40
 
};
41
 
 
42
 
 
43
 
static void ide_interrupt(device_t *device, int state);
44
 
 
45
 
 
46
 
static const rgb_t cga_palette[16] =
47
 
{
48
 
        MAKE_RGB( 0x00, 0x00, 0x00 ), MAKE_RGB( 0x00, 0x00, 0xaa ), MAKE_RGB( 0x00, 0xaa, 0x00 ), MAKE_RGB( 0x00, 0xaa, 0xaa ),
49
 
        MAKE_RGB( 0xaa, 0x00, 0x00 ), MAKE_RGB( 0xaa, 0x00, 0xaa ), MAKE_RGB( 0xaa, 0x55, 0x00 ), MAKE_RGB( 0xaa, 0xaa, 0xaa ),
50
 
        MAKE_RGB( 0x55, 0x55, 0x55 ), MAKE_RGB( 0x55, 0x55, 0xff ), MAKE_RGB( 0x55, 0xff, 0x55 ), MAKE_RGB( 0x55, 0xff, 0xff ),
51
 
        MAKE_RGB( 0xff, 0x55, 0x55 ), MAKE_RGB( 0xff, 0x55, 0xff ), MAKE_RGB( 0xff, 0xff, 0x55 ), MAKE_RGB( 0xff, 0xff, 0xff ),
52
 
};
53
 
 
54
 
static VIDEO_START(taitowlf)
55
 
{
56
 
        int i;
57
 
        for (i=0; i < 16; i++)
58
 
        {
59
 
                palette_set_color(machine, i, cga_palette[i]);
60
 
        }
61
 
}
62
 
 
63
 
static void draw_char(bitmap_t *bitmap, const rectangle *cliprect, const gfx_element *gfx, int ch, int att, int x, int y)
64
 
{
65
 
        int i,j;
66
 
        const UINT8 *dp;
67
 
        int index = 0;
68
 
        dp = gfx_element_get_data(gfx, ch);
69
 
 
70
 
        for (j=y; j < y+8; j++)
71
 
        {
72
 
                UINT16 *p = BITMAP_ADDR16(bitmap, j, 0);
73
 
                for (i=x; i < x+8; i++)
74
 
                {
75
 
                        UINT8 pen = dp[index++];
76
 
                        if (pen)
77
 
                                p[i] = gfx->color_base + (att & 0xf);
78
 
                        else
79
 
                                p[i] = gfx->color_base  + ((att >> 4) & 0x7);
80
 
                }
81
 
        }
82
 
}
83
 
 
84
 
static SCREEN_UPDATE(taitowlf)
85
 
{
86
 
        taitowlf_state *state = screen->machine().driver_data<taitowlf_state>();
87
 
        int i, j;
88
 
        const gfx_element *gfx = screen->machine().gfx[0];
89
 
        UINT32 *cga = state->m_cga_ram;
90
 
        int index = 0;
91
 
 
92
 
        bitmap_fill(bitmap, cliprect, 0);
93
 
 
94
 
        for (j=0; j < 25; j++)
95
 
        {
96
 
                for (i=0; i < 80; i+=2)
97
 
                {
98
 
                        int att0 = (cga[index] >> 8) & 0xff;
99
 
                        int ch0 = (cga[index] >> 0) & 0xff;
100
 
                        int att1 = (cga[index] >> 24) & 0xff;
101
 
                        int ch1 = (cga[index] >> 16) & 0xff;
102
 
 
103
 
                        draw_char(bitmap, cliprect, gfx, ch0, att0, i*8, j*8);
104
 
                        draw_char(bitmap, cliprect, gfx, ch1, att1, (i*8)+8, j*8);
105
 
                        index++;
106
 
                }
107
 
        }
108
 
        return 0;
109
 
}
110
 
 
111
 
static READ8_DEVICE_HANDLER(at_dma8237_2_r)
112
 
{
113
 
        return i8237_r(device, offset / 2);
114
 
}
115
 
 
116
 
static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
117
 
{
118
 
        i8237_w(device, offset / 2, data);
119
 
}
120
 
 
121
 
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
122
 
{
123
 
        return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
124
 
}
125
 
 
126
 
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
127
 
{
128
 
        write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
129
 
}
130
 
 
131
 
 
132
 
 
133
 
// Intel 82439TX System Controller (MXTC)
134
 
 
135
 
static UINT8 mxtc_config_r(device_t *busdevice, device_t *device, int function, int reg)
136
 
{
137
 
        taitowlf_state *state = busdevice->machine().driver_data<taitowlf_state>();
138
 
//  mame_printf_debug("MXTC: read %d, %02X\n", function, reg);
139
 
 
140
 
        return state->m_mxtc_config_reg[reg];
141
 
}
142
 
 
143
 
static void mxtc_config_w(device_t *busdevice, device_t *device, int function, int reg, UINT8 data)
144
 
{
145
 
        taitowlf_state *state = busdevice->machine().driver_data<taitowlf_state>();
146
 
//  mame_printf_debug("%s:MXTC: write %d, %02X, %02X\n", machine.describe_context(), function, reg, data);
147
 
 
148
 
        switch(reg)
149
 
        {
150
 
                case 0x59:              // PAM0
151
 
                {
152
 
                        if (data & 0x10)                // enable RAM access to region 0xf0000 - 0xfffff
153
 
                        {
154
 
                                memory_set_bankptr(busdevice->machine(), "bank1", state->m_bios_ram);
155
 
                        }
156
 
                        else                                    // disable RAM access (reads go to BIOS ROM)
157
 
                        {
158
 
                                memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("user1")->base() + 0x30000);
159
 
                        }
160
 
                        break;
161
 
                }
162
 
        }
163
 
 
164
 
        state->m_mxtc_config_reg[reg] = data;
165
 
}
166
 
 
167
 
static void intel82439tx_init(running_machine &machine)
168
 
{
169
 
        taitowlf_state *state = machine.driver_data<taitowlf_state>();
170
 
        state->m_mxtc_config_reg[0x60] = 0x02;
171
 
        state->m_mxtc_config_reg[0x61] = 0x02;
172
 
        state->m_mxtc_config_reg[0x62] = 0x02;
173
 
        state->m_mxtc_config_reg[0x63] = 0x02;
174
 
        state->m_mxtc_config_reg[0x64] = 0x02;
175
 
        state->m_mxtc_config_reg[0x65] = 0x02;
176
 
}
177
 
 
178
 
static UINT32 intel82439tx_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
179
 
{
180
 
        UINT32 r = 0;
181
 
        if (ACCESSING_BITS_24_31)
182
 
        {
183
 
                r |= mxtc_config_r(busdevice, device, function, reg + 3) << 24;
184
 
        }
185
 
        if (ACCESSING_BITS_16_23)
186
 
        {
187
 
                r |= mxtc_config_r(busdevice, device, function, reg + 2) << 16;
188
 
        }
189
 
        if (ACCESSING_BITS_8_15)
190
 
        {
191
 
                r |= mxtc_config_r(busdevice, device, function, reg + 1) << 8;
192
 
        }
193
 
        if (ACCESSING_BITS_0_7)
194
 
        {
195
 
                r |= mxtc_config_r(busdevice, device, function, reg + 0) << 0;
196
 
        }
197
 
        return r;
198
 
}
199
 
 
200
 
static void intel82439tx_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
201
 
{
202
 
        if (ACCESSING_BITS_24_31)
203
 
        {
204
 
                mxtc_config_w(busdevice, device, function, reg + 3, (data >> 24) & 0xff);
205
 
        }
206
 
        if (ACCESSING_BITS_16_23)
207
 
        {
208
 
                mxtc_config_w(busdevice, device, function, reg + 2, (data >> 16) & 0xff);
209
 
        }
210
 
        if (ACCESSING_BITS_8_15)
211
 
        {
212
 
                mxtc_config_w(busdevice, device, function, reg + 1, (data >> 8) & 0xff);
213
 
        }
214
 
        if (ACCESSING_BITS_0_7)
215
 
        {
216
 
                mxtc_config_w(busdevice, device, function, reg + 0, (data >> 0) & 0xff);
217
 
        }
218
 
}
219
 
 
220
 
// Intel 82371AB PCI-to-ISA / IDE bridge (PIIX4)
221
 
 
222
 
static UINT8 piix4_config_r(device_t *busdevice, device_t *device, int function, int reg)
223
 
{
224
 
        taitowlf_state *state = busdevice->machine().driver_data<taitowlf_state>();
225
 
//  mame_printf_debug("PIIX4: read %d, %02X\n", function, reg);
226
 
        return state->m_piix4_config_reg[function][reg];
227
 
}
228
 
 
229
 
static void piix4_config_w(device_t *busdevice, device_t *device, int function, int reg, UINT8 data)
230
 
{
231
 
        taitowlf_state *state = busdevice->machine().driver_data<taitowlf_state>();
232
 
//  mame_printf_debug("%s:PIIX4: write %d, %02X, %02X\n", machine.describe_context(), function, reg, data);
233
 
        state->m_piix4_config_reg[function][reg] = data;
234
 
}
235
 
 
236
 
static UINT32 intel82371ab_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
237
 
{
238
 
        UINT32 r = 0;
239
 
        if (ACCESSING_BITS_24_31)
240
 
        {
241
 
                r |= piix4_config_r(busdevice, device, function, reg + 3) << 24;
242
 
        }
243
 
        if (ACCESSING_BITS_16_23)
244
 
        {
245
 
                r |= piix4_config_r(busdevice, device, function, reg + 2) << 16;
246
 
        }
247
 
        if (ACCESSING_BITS_8_15)
248
 
        {
249
 
                r |= piix4_config_r(busdevice, device, function, reg + 1) << 8;
250
 
        }
251
 
        if (ACCESSING_BITS_0_7)
252
 
        {
253
 
                r |= piix4_config_r(busdevice, device, function, reg + 0) << 0;
254
 
        }
255
 
        return r;
256
 
}
257
 
 
258
 
static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
259
 
{
260
 
        if (ACCESSING_BITS_24_31)
261
 
        {
262
 
                piix4_config_w(busdevice, device, function, reg + 3, (data >> 24) & 0xff);
263
 
        }
264
 
        if (ACCESSING_BITS_16_23)
265
 
        {
266
 
                piix4_config_w(busdevice, device, function, reg + 2, (data >> 16) & 0xff);
267
 
        }
268
 
        if (ACCESSING_BITS_8_15)
269
 
        {
270
 
                piix4_config_w(busdevice, device, function, reg + 1, (data >> 8) & 0xff);
271
 
        }
272
 
        if (ACCESSING_BITS_0_7)
273
 
        {
274
 
                piix4_config_w(busdevice, device, function, reg + 0, (data >> 0) & 0xff);
275
 
        }
276
 
}
277
 
 
278
 
// ISA Plug-n-Play
279
 
static WRITE32_HANDLER( pnp_config_w )
280
 
{
281
 
        if (ACCESSING_BITS_8_15)
282
 
        {
283
 
//      mame_printf_debug("PNP Config: %02X\n", (data >> 8) & 0xff);
284
 
        }
285
 
}
286
 
 
287
 
static WRITE32_HANDLER( pnp_data_w )
288
 
{
289
 
        if (ACCESSING_BITS_8_15)
290
 
        {
291
 
//      mame_printf_debug("PNP Data: %02X\n", (data >> 8) & 0xff);
292
 
        }
293
 
}
294
 
 
295
 
 
296
 
 
297
 
static READ32_DEVICE_HANDLER( ide_r )
298
 
{
299
 
        return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
300
 
}
301
 
 
302
 
static WRITE32_DEVICE_HANDLER( ide_w )
303
 
{
304
 
        ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
305
 
}
306
 
 
307
 
static READ32_DEVICE_HANDLER( fdc_r )
308
 
{
309
 
        return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
310
 
}
311
 
 
312
 
static WRITE32_DEVICE_HANDLER( fdc_w )
313
 
{
314
 
        //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
315
 
        ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
316
 
}
317
 
 
318
 
 
319
 
 
320
 
static WRITE32_HANDLER(bios_ram_w)
321
 
{
322
 
        taitowlf_state *state = space->machine().driver_data<taitowlf_state>();
323
 
        if (state->m_mxtc_config_reg[0x59] & 0x20)              // write to RAM if this region is write-enabled
324
 
        {
325
 
                COMBINE_DATA(state->m_bios_ram + offset);
326
 
        }
327
 
}
328
 
 
329
 
 
330
 
/*************************************************************************
331
 
 *
332
 
 *      PC DMA stuff
333
 
 *
334
 
 *************************************************************************/
335
 
 
336
 
 
337
 
 
338
 
static READ8_HANDLER(at_page8_r)
339
 
{
340
 
        taitowlf_state *state = space->machine().driver_data<taitowlf_state>();
341
 
        UINT8 data = state->m_at_pages[offset % 0x10];
342
 
 
343
 
        switch(offset % 8)
344
 
        {
345
 
        case 1:
346
 
                data = state->m_dma_offset[(offset / 8) & 1][2];
347
 
                break;
348
 
        case 2:
349
 
                data = state->m_dma_offset[(offset / 8) & 1][3];
350
 
                break;
351
 
        case 3:
352
 
                data = state->m_dma_offset[(offset / 8) & 1][1];
353
 
                break;
354
 
        case 7:
355
 
                data = state->m_dma_offset[(offset / 8) & 1][0];
356
 
                break;
357
 
        }
358
 
        return data;
359
 
}
360
 
 
361
 
 
362
 
static WRITE8_HANDLER(at_page8_w)
363
 
{
364
 
        taitowlf_state *state = space->machine().driver_data<taitowlf_state>();
365
 
        state->m_at_pages[offset % 0x10] = data;
366
 
 
367
 
        switch(offset % 8)
368
 
        {
369
 
        case 1:
370
 
                state->m_dma_offset[(offset / 8) & 1][2] = data;
371
 
                break;
372
 
        case 2:
373
 
                state->m_dma_offset[(offset / 8) & 1][3] = data;
374
 
                break;
375
 
        case 3:
376
 
                state->m_dma_offset[(offset / 8) & 1][1] = data;
377
 
                break;
378
 
        case 7:
379
 
                state->m_dma_offset[(offset / 8) & 1][0] = data;
380
 
                break;
381
 
        }
382
 
}
383
 
 
384
 
 
385
 
static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
386
 
{
387
 
        cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
388
 
 
389
 
        /* Assert HLDA */
390
 
        i8237_hlda_w( device, state );
391
 
}
392
 
 
393
 
 
394
 
static READ8_HANDLER( pc_dma_read_byte )
395
 
{
396
 
        taitowlf_state *state = space->machine().driver_data<taitowlf_state>();
397
 
        offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16)
398
 
                & 0xFF0000;
399
 
 
400
 
        return space->read_byte(page_offset + offset);
401
 
}
402
 
 
403
 
 
404
 
static WRITE8_HANDLER( pc_dma_write_byte )
405
 
{
406
 
        taitowlf_state *state = space->machine().driver_data<taitowlf_state>();
407
 
        offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16)
408
 
                & 0xFF0000;
409
 
 
410
 
        space->write_byte(page_offset + offset, data);
411
 
}
412
 
 
413
 
 
414
 
static WRITE_LINE_DEVICE_HANDLER( pc_dack0_w )
415
 
{
416
 
        taitowlf_state *drvstate = device->machine().driver_data<taitowlf_state>();
417
 
        if (state) drvstate->m_dma_channel = 0;
418
 
}
419
 
 
420
 
static WRITE_LINE_DEVICE_HANDLER( pc_dack1_w )
421
 
{
422
 
        taitowlf_state *drvstate = device->machine().driver_data<taitowlf_state>();
423
 
        if (state) drvstate->m_dma_channel = 1;
424
 
}
425
 
 
426
 
static WRITE_LINE_DEVICE_HANDLER( pc_dack2_w )
427
 
{
428
 
        taitowlf_state *drvstate = device->machine().driver_data<taitowlf_state>();
429
 
        if (state) drvstate->m_dma_channel = 2;
430
 
}
431
 
 
432
 
static WRITE_LINE_DEVICE_HANDLER( pc_dack3_w )
433
 
{
434
 
        taitowlf_state *drvstate = device->machine().driver_data<taitowlf_state>();
435
 
        if (state) drvstate->m_dma_channel = 3;
436
 
}
437
 
 
438
 
static I8237_INTERFACE( dma8237_1_config )
439
 
{
440
 
        DEVCB_LINE(pc_dma_hrq_changed),
441
 
        DEVCB_NULL,
442
 
        DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte),
443
 
        DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte),
444
 
        { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
445
 
        { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
446
 
        { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) }
447
 
};
448
 
 
449
 
static I8237_INTERFACE( dma8237_2_config )
450
 
{
451
 
        DEVCB_NULL,
452
 
        DEVCB_NULL,
453
 
        DEVCB_NULL,
454
 
        DEVCB_NULL,
455
 
        { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
456
 
        { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
457
 
        { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
458
 
};
459
 
 
460
 
static READ32_HANDLER(at_page32_r)
461
 
{
462
 
        return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask);
463
 
}
464
 
 
465
 
 
466
 
static WRITE32_HANDLER(at_page32_w)
467
 
{
468
 
        write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask);
469
 
}
470
 
 
471
 
 
472
 
/*****************************************************************************/
473
 
 
474
 
static ADDRESS_MAP_START( taitowlf_map, AS_PROGRAM, 32 )
475
 
        AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
476
 
        AM_RANGE(0x000a0000, 0x000affff) AM_RAM
477
 
        AM_RANGE(0x000b0000, 0x000b7fff) AM_RAM AM_BASE_MEMBER(taitowlf_state, m_cga_ram)
478
 
        AM_RANGE(0x000e0000, 0x000effff) AM_RAM
479
 
        AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bank1")
480
 
        AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w)
481
 
        AM_RANGE(0x00100000, 0x01ffffff) AM_RAM
482
 
        AM_RANGE(0xfffc0000, 0xffffffff) AM_ROM AM_REGION("user1", 0)   /* System BIOS */
483
 
ADDRESS_MAP_END
484
 
 
485
 
static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32)
486
 
        AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_r, i8237_w, 0xffffffff)
487
 
        AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_r, pic8259_w, 0xffffffff)
488
 
        AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8253_r, pit8253_w, 0xffffffff)
489
 
        AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r,                  kbdc8042_32le_w)
490
 
        AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8_MODERN("rtc", mc146818_device, read, write, 0xffffffff)
491
 
        AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r,                              at_page32_w)
492
 
        AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
493
 
        AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
494
 
        AM_RANGE(0x00e8, 0x00eb) AM_NOP
495
 
        AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE("ide", ide_r, ide_w)
496
 
        AM_RANGE(0x0300, 0x03af) AM_NOP
497
 
        AM_RANGE(0x03b0, 0x03df) AM_NOP
498
 
        AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
499
 
        AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE("ide", fdc_r, fdc_w)
500
 
        AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
501
 
        AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_32le_r,  pci_32le_w)
502
 
ADDRESS_MAP_END
503
 
 
504
 
/*****************************************************************************/
505
 
 
506
 
static const gfx_layout CGA_charlayout =
507
 
{
508
 
        8,8,                                    /* 8 x 16 characters */
509
 
    256,                    /* 256 characters */
510
 
    1,                      /* 1 bits per pixel */
511
 
    { 0 },                  /* no bitplanes; 1 bit per pixel */
512
 
    /* x offsets */
513
 
    { 0,1,2,3,4,5,6,7 },
514
 
    /* y offsets */
515
 
        { 0*8,1*8,2*8,3*8,
516
 
          4*8,5*8,6*8,7*8 },
517
 
    8*8                     /* every char takes 8 bytes */
518
 
};
519
 
 
520
 
static GFXDECODE_START( CGA )
521
 
/* Support up to four CGA fonts */
522
 
        GFXDECODE_ENTRY( "gfx1", 0x0000, CGA_charlayout,              0, 256 )   /* Font 0 */
523
 
        GFXDECODE_ENTRY( "gfx1", 0x0800, CGA_charlayout,              0, 256 )   /* Font 1 */
524
 
        GFXDECODE_ENTRY( "gfx1", 0x1000, CGA_charlayout,              0, 256 )   /* Font 2 */
525
 
        GFXDECODE_ENTRY( "gfx1", 0x1800, CGA_charlayout,              0, 256 )   /* Font 3*/
526
 
GFXDECODE_END
527
 
 
528
 
#define AT_KEYB_HELPER(bit, text, key1) \
529
 
        PORT_BIT( bit, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME(text) PORT_CODE(key1)
530
 
 
531
 
static INPUT_PORTS_START(taitowlf)
532
 
        PORT_START("pc_keyboard_0")
533
 
        PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED )         /* unused scancode 0 */
534
 
        AT_KEYB_HELPER( 0x0002, "Esc",          KEYCODE_Q           ) /* Esc                         01  81 */
535
 
 
536
 
        PORT_START("pc_keyboard_1")
537
 
        AT_KEYB_HELPER( 0x0020, "Y",            KEYCODE_Y           ) /* Y                           15  95 */
538
 
        AT_KEYB_HELPER( 0x1000, "Enter",        KEYCODE_ENTER       ) /* Enter                       1C  9C */
539
 
 
540
 
        PORT_START("pc_keyboard_2")
541
 
 
542
 
        PORT_START("pc_keyboard_3")
543
 
        AT_KEYB_HELPER( 0x0002, "N",            KEYCODE_N           ) /* N                           31  B1 */
544
 
        AT_KEYB_HELPER( 0x0800, "F1",           KEYCODE_S           ) /* F1                          3B  BB */
545
 
 
546
 
        PORT_START("pc_keyboard_4")
547
 
 
548
 
        PORT_START("pc_keyboard_5")
549
 
 
550
 
        PORT_START("pc_keyboard_6")
551
 
        AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up",               KEYCODE_UP          ) /* Up                          67  e7 */
552
 
        AT_KEYB_HELPER( 0x0080, "(MF2)Page Up",                 KEYCODE_PGUP        ) /* Page Up                     68  e8 */
553
 
        AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left",             KEYCODE_LEFT        ) /* Left                        69  e9 */
554
 
        AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right",    KEYCODE_RIGHT       ) /* Right                       6a  ea */
555
 
        AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down",             KEYCODE_DOWN        ) /* Down                        6c  ec */
556
 
        AT_KEYB_HELPER( 0x1000, "(MF2)Page Down",               KEYCODE_PGDN        ) /* Page Down                   6d  ed */
557
 
        AT_KEYB_HELPER( 0x4000, "Del",                      KEYCODE_A           ) /* Delete                      6f  ef */
558
 
 
559
 
        PORT_START("pc_keyboard_7")
560
 
INPUT_PORTS_END
561
 
 
562
 
static IRQ_CALLBACK(irq_callback)
563
 
{
564
 
        taitowlf_state *state = device->machine().driver_data<taitowlf_state>();
565
 
        return pic8259_acknowledge( state->m_pic8259_1);
566
 
}
567
 
 
568
 
static MACHINE_START(taitowlf)
569
 
{
570
 
        taitowlf_state *state = machine.driver_data<taitowlf_state>();
571
 
        device_set_irq_callback(machine.device("maincpu"), irq_callback);
572
 
 
573
 
        state->m_pit8254 = machine.device( "pit8254" );
574
 
        state->m_pic8259_1 = machine.device( "pic8259_1" );
575
 
        state->m_pic8259_2 = machine.device( "pic8259_2" );
576
 
        state->m_dma8237_1 = machine.device( "dma8237_1" );
577
 
        state->m_dma8237_2 = machine.device( "dma8237_2" );
578
 
}
579
 
 
580
 
static MACHINE_RESET(taitowlf)
581
 
{
582
 
        memory_set_bankptr(machine, "bank1", machine.region("user1")->base() + 0x30000);
583
 
}
584
 
 
585
 
 
586
 
/*************************************************************
587
 
 *
588
 
 * pic8259 configuration
589
 
 *
590
 
 *************************************************************/
591
 
 
592
 
static WRITE_LINE_DEVICE_HANDLER( taitowlf_pic8259_1_set_int_line )
593
 
{
594
 
        cputag_set_input_line(device->machine(), "maincpu", 0, state ? HOLD_LINE : CLEAR_LINE);
595
 
}
596
 
 
597
 
static READ8_DEVICE_HANDLER( get_slave_ack )
598
 
{
599
 
        taitowlf_state *state = device->machine().driver_data<taitowlf_state>();
600
 
        if (offset==2) { // IRQ = 2
601
 
                return pic8259_acknowledge(state->m_pic8259_2);
602
 
        }
603
 
        return 0x00;
604
 
}
605
 
 
606
 
static const struct pic8259_interface taitowlf_pic8259_1_config =
607
 
{
608
 
        DEVCB_LINE(taitowlf_pic8259_1_set_int_line),
609
 
        DEVCB_LINE_VCC,
610
 
        DEVCB_HANDLER(get_slave_ack)
611
 
};
612
 
 
613
 
static const struct pic8259_interface taitowlf_pic8259_2_config =
614
 
{
615
 
        DEVCB_DEVICE_LINE("pic8259_1", pic8259_ir2_w),
616
 
        DEVCB_LINE_GND,
617
 
        DEVCB_NULL
618
 
};
619
 
 
620
 
 
621
 
/*************************************************************
622
 
 *
623
 
 * pit8254 configuration
624
 
 *
625
 
 *************************************************************/
626
 
 
627
 
static const struct pit8253_config taitowlf_pit8254_config =
628
 
{
629
 
        {
630
 
                {
631
 
                        4772720/4,                              /* heartbeat IRQ */
632
 
                        DEVCB_NULL,
633
 
                        DEVCB_DEVICE_LINE("pic8259_1", pic8259_ir0_w)
634
 
                }, {
635
 
                        4772720/4,                              /* dram refresh */
636
 
                        DEVCB_NULL,
637
 
                        DEVCB_NULL
638
 
                }, {
639
 
                        4772720/4,                              /* pio port c pin 4, and speaker polling enough */
640
 
                        DEVCB_NULL,
641
 
                        DEVCB_NULL
642
 
                }
643
 
        }
644
 
};
645
 
 
646
 
static MACHINE_CONFIG_START( taitowlf, taitowlf_state )
647
 
 
648
 
        /* basic machine hardware */
649
 
        MCFG_CPU_ADD("maincpu", PENTIUM, 200000000)
650
 
        MCFG_CPU_PROGRAM_MAP(taitowlf_map)
651
 
        MCFG_CPU_IO_MAP(taitowlf_io)
652
 
 
653
 
        MCFG_MACHINE_START(taitowlf)
654
 
        MCFG_MACHINE_RESET(taitowlf)
655
 
 
656
 
        MCFG_PCI_BUS_ADD("pcibus", 0)
657
 
        MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
658
 
        MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
659
 
 
660
 
        MCFG_PIT8254_ADD( "pit8254", taitowlf_pit8254_config )
661
 
        MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
662
 
        MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
663
 
        MCFG_PIC8259_ADD( "pic8259_1", taitowlf_pic8259_1_config )
664
 
        MCFG_PIC8259_ADD( "pic8259_2", taitowlf_pic8259_2_config )
665
 
        MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt)
666
 
        MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
667
 
 
668
 
        /* video hardware */
669
 
        MCFG_SCREEN_ADD("screen", RASTER)
670
 
        MCFG_SCREEN_REFRESH_RATE(60)
671
 
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
672
 
        MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
673
 
        MCFG_SCREEN_SIZE(640, 480)
674
 
        MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 199)
675
 
        MCFG_SCREEN_UPDATE(taitowlf)
676
 
 
677
 
        MCFG_GFXDECODE(CGA)
678
 
        MCFG_PALETTE_LENGTH(16)
679
 
 
680
 
        MCFG_VIDEO_START(taitowlf)
681
 
MACHINE_CONFIG_END
682
 
 
683
 
static void set_gate_a20(running_machine &machine, int a20)
684
 
{
685
 
        cputag_set_input_line(machine, "maincpu", INPUT_LINE_A20, a20);
686
 
}
687
 
 
688
 
static void keyboard_interrupt(running_machine &machine, int state)
689
 
{
690
 
        taitowlf_state *drvstate = machine.driver_data<taitowlf_state>();
691
 
        pic8259_ir1_w(drvstate->m_pic8259_1, state);
692
 
}
693
 
 
694
 
static void ide_interrupt(device_t *device, int state)
695
 
{
696
 
        taitowlf_state *drvstate = device->machine().driver_data<taitowlf_state>();
697
 
        pic8259_ir6_w(drvstate->m_pic8259_2, state);
698
 
}
699
 
 
700
 
static int taitowlf_get_out2(running_machine &machine)
701
 
{
702
 
        taitowlf_state *state = machine.driver_data<taitowlf_state>();
703
 
        return pit8253_get_output(state->m_pit8254, 2 );
704
 
}
705
 
 
706
 
static const struct kbdc8042_interface at8042 =
707
 
{
708
 
        KBDC8042_AT386, set_gate_a20, keyboard_interrupt, taitowlf_get_out2
709
 
};
710
 
 
711
 
static void taitowlf_set_keyb_int(running_machine &machine, int state)
712
 
{
713
 
        taitowlf_state *drvstate = machine.driver_data<taitowlf_state>();
714
 
        pic8259_ir1_w(drvstate->m_pic8259_1, state);
715
 
}
716
 
 
717
 
static DRIVER_INIT( taitowlf )
718
 
{
719
 
        taitowlf_state *state = machine.driver_data<taitowlf_state>();
720
 
        state->m_bios_ram = auto_alloc_array(machine, UINT32, 0x10000/4);
721
 
 
722
 
        init_pc_common(machine, PCCOMMON_KEYBOARD_AT, taitowlf_set_keyb_int);
723
 
 
724
 
        intel82439tx_init(machine);
725
 
 
726
 
        kbdc8042_init(machine, &at8042);
727
 
}
728
 
 
729
 
/*****************************************************************************/
730
 
 
731
 
ROM_START(pf2012)
732
 
        ROM_REGION32_LE(0x40000, "user1", 0)
733
 
        ROM_LOAD("p5tx-la.bin", 0x00000, 0x40000, CRC(072e6d51) SHA1(70414349b37e478fc28ecbaba47ad1033ae583b7))
734
 
 
735
 
        ROM_REGION(0x08100, "gfx1", 0)
736
 
    ROM_LOAD("cga.chr",     0x00000, 0x01000, CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd))
737
 
 
738
 
        ROM_REGION32_LE(0x400000, "user3", 0)           // Program ROM disk
739
 
        ROM_LOAD("u1.bin", 0x000000, 0x200000, CRC(8f4c09cb) SHA1(0969a92fec819868881683c580f9e01cbedf4ad2))
740
 
        ROM_LOAD("u2.bin", 0x200000, 0x200000, CRC(59881781) SHA1(85ff074ab2a922eac37cf96f0bf153a2dac55aa4))
741
 
 
742
 
        ROM_REGION32_LE(0x4000000, "user4", 0)          // Data ROM disk
743
 
        ROM_LOAD("e59-01.u20", 0x0000000, 0x800000, CRC(701d3a9a) SHA1(34c9f34f4da34bb8eed85a4efd1d9eea47a21d77) )
744
 
        ROM_LOAD("e59-02.u23", 0x0800000, 0x800000, CRC(626df682) SHA1(35bb4f91201734ce7ccdc640a75030aaca3d1151) )
745
 
        ROM_LOAD("e59-03.u26", 0x1000000, 0x800000, CRC(74e4efde) SHA1(630235c2e4a11f615b5f3b8c93e1e645da09eefe) )
746
 
        ROM_LOAD("e59-04.u21", 0x1800000, 0x800000, CRC(c900e8df) SHA1(93c06b8f5082e33f0dcc41f1be6a79283de16c40) )
747
 
        ROM_LOAD("e59-05.u24", 0x2000000, 0x800000, CRC(85b0954c) SHA1(1b533d5888d56d1510c79f790e4fa708f77e836f) )
748
 
        ROM_LOAD("e59-06.u27", 0x2800000, 0x800000, CRC(0573a113) SHA1(ee76a71dfd31289a9a5428653a36d01d914fc5d9) )
749
 
        ROM_LOAD("e59-07.u22", 0x3000000, 0x800000, CRC(1f0ddcdc) SHA1(72ffe08f5effab093bdfe9863f8a11f80e914272) )
750
 
        ROM_LOAD("e59-08.u25", 0x3800000, 0x800000, CRC(8db38ffd) SHA1(4b71ea86fb774ba6a8ac45abf4191af64af007e7) )
751
 
 
752
 
        ROM_REGION(0x1400000, "samples", 0)                     // ZOOM sample data
753
 
        ROM_LOAD("e59-09.u29", 0x0000000, 0x800000, CRC(d0da5c50) SHA1(56fb3c38f35244720d32a44fed28e6b58c7851f7) )
754
 
        ROM_LOAD("e59-10.u32", 0x0800000, 0x800000, CRC(4c0e0a5c) SHA1(6454befa3a1dd532eb2a760129dcd7e611508730) )
755
 
        ROM_LOAD("e59-11.u33", 0x1000000, 0x400000, CRC(c90a896d) SHA1(2b62992f20e4ca9634e7953fe2c553906de44f04) )
756
 
 
757
 
        ROM_REGION(0x180000, "cpu1", 0)                 // MN10200 program
758
 
        ROM_LOAD("e59-12.u13", 0x000000, 0x80000, CRC(9a473a7e) SHA1(b0ec7b0ae2b33a32da98899aa79d44e8e318ceb7) )
759
 
        ROM_LOAD("e59-13.u15", 0x080000, 0x80000, CRC(77719880) SHA1(8382dd2dfb0dae60a3831ed6d3ff08539e2d94eb) )
760
 
        ROM_LOAD("e59-14.u14", 0x100000, 0x40000, CRC(d440887c) SHA1(d965871860d757bc9111e9adb2303a633c662d6b) )
761
 
        ROM_LOAD("e59-15.u16", 0x140000, 0x40000, CRC(eae8e523) SHA1(8a054d3ded7248a7906c4f0bec755ddce53e2023) )
762
 
 
763
 
        ROM_REGION(0x20000, "user5", 0)                 // bootscreen
764
 
        ROM_LOAD("e58-04.u71", 0x000000, 0x20000, CRC(500e6113) SHA1(93226706517c02e336f96bdf9443785158e7becf) )
765
 
ROM_END
766
 
 
767
 
/*****************************************************************************/
768
 
 
769
 
GAME(1997, pf2012, 0,   taitowlf, taitowlf, taitowlf,   ROT0,   "Taito",  "Psychic Force 2012", GAME_NOT_WORKING | GAME_NO_SOUND)