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Viewing changes to debian/patches/ubuntu/arm64/0068-target-arm-A64-add-support-for-conditional-compare-i.patch

  • Committer: Package Import Robot
  • Author(s): Serge Hallyn
  • Date: 2014-02-25 22:31:43 UTC
  • mfrom: (1.8.5)
  • Revision ID: package-import@ubuntu.com-20140225223143-odhqxfc60wxrjl15
Tags: 2.0.0~rc1+dfsg-0ubuntu1
https://launchpad.net/bugs/1294823
https://launchpad.net/bugs/1295072
* Merge 2.0.0-rc1
* debian/rules: consolidate ppc filter entries.
* Move qemu-system-arch64 into qemu-system-arm
* debian/patches/define-trusty-machine-type.patch: define a trusty machine
  type, currently the same as pc-i440fx-2.0, to put is in a better position
  to enable live migrations from trusty onward.  (LP: #1294823)
* debian/control: build-dep on libfdt >= 1.4.0  (LP: #1295072)
* Merge latest upstream git to commit dc9528f
* Debian/rules:
  - remove -enable-uname-release=2.6.32
  - don't make the aarch64 target Ubuntu-specific.
* Remove patches which are now upstream:
  - fix-smb-security-share.patch
  - slirp-smb-redirect-port-445-too.patch 
  - linux-user-Implement-sendmmsg-syscall.patch (better version is upstream)
  - signal-added-a-wrapper-for-sigprocmask-function.patch
  - ubuntu/signal-sigsegv-protection-on-do_sigprocmask.patch
  - ubuntu/Don-t-block-SIGSEGV-at-more-places.patch
  - ubuntu/ppc-force-cpu-threads-count-to-be-power-of-2.patch
* add link for /usr/share/qemu/bios-256k.bin
* Remove all linaro patches.
* Remove all arm64/ patches.  Many but not all are upstream.
* Remove CVE-2013-4377.patch which is upstream.
* debian/control-in: don't make qemu-system-aarch64 ubuntu-specific

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debian/patches/ubuntu/arm64/0068-target-arm-A64-add-support-for-conditional-compare-i.patch
1
 
From afb761a664ef46fac23a1631c6ffd236ea860aae Mon Sep 17 00:00:00 2001
2
 
From: Claudio Fontana <claudio.fontana@linaro.org>
3
 
Date: Sat, 4 Jan 2014 22:15:46 +0000
4
 
Subject: [PATCH 068/158] target-arm: A64: add support for conditional compare
5
 
 insns
6
 
 
7
 
this patch adds support for C3.5.4 - C3.5.5
8
 
Conditional compare (both immediate and register)
9
 
 
10
 
Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
11
 
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
 
Reviewed-by: Richard Henderson <rth@twiddle.net>
13
 
---
14
 
 target-arm/translate-a64.c | 73 +++++++++++++++++++++++++++++++++++++---------
15
 
 1 file changed, 60 insertions(+), 13 deletions(-)
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17
 
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
18
 
index 9f508b9..538d69e 100644
19
 
--- a/target-arm/translate-a64.c
20
 
+++ b/target-arm/translate-a64.c
21
 
@@ -2483,16 +2483,67 @@ static void disas_adc_sbc(DisasContext *s, uint32_t insn)
22
 
     }
23
 
 }
24
 
 
25
 
-/* Conditional compare (immediate) */
26
 
-static void disas_cc_imm(DisasContext *s, uint32_t insn)
27
 
+/* C3.5.4 - C3.5.5 Conditional compare (immediate / register)
28
 
+ *  31 30 29 28 27 26 25 24 23 22 21  20    16 15  12  11  10  9   5  4 3   0
29
 
+ * +--+--+--+------------------------+--------+------+----+--+------+--+-----+
30
 
+ * |sf|op| S| 1  1  0  1  0  0  1  0 |imm5/rm | cond |i/r |o2|  Rn  |o3|nzcv |
31
 
+ * +--+--+--+------------------------+--------+------+----+--+------+--+-----+
32
 
+ *        [1]                             y                [0]       [0]
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+ */
34
 
+static void disas_cc(DisasContext *s, uint32_t insn)
35
 
 {
36
 
-    unsupported_encoding(s, insn);
37
 
-}
38
 
+    unsigned int sf, op, y, cond, rn, nzcv, is_imm;
39
 
+    int label_continue = -1;
40
 
+    TCGv_i64 tcg_tmp, tcg_y, tcg_rn;
41
 
 
42
 
-/* Conditional compare (register) */
43
 
-static void disas_cc_reg(DisasContext *s, uint32_t insn)
44
 
-{
45
 
-    unsupported_encoding(s, insn);
46
 
+    if (!extract32(insn, 29, 1)) {
47
 
+        unallocated_encoding(s);
48
 
+        return;
49
 
+    }
50
 
+    if (insn & (1 << 10 | 1 << 4)) {
51
 
+        unallocated_encoding(s);
52
 
+        return;
53
 
+    }
54
 
+    sf = extract32(insn, 31, 1);
55
 
+    op = extract32(insn, 30, 1);
56
 
+    is_imm = extract32(insn, 11, 1);
57
 
+    y = extract32(insn, 16, 5); /* y = rm (reg) or imm5 (imm) */
58
 
+    cond = extract32(insn, 12, 4);
59
 
+    rn = extract32(insn, 5, 5);
60
 
+    nzcv = extract32(insn, 0, 4);
61
 
+
62
 
+    if (cond < 0x0e) { /* not always */
63
 
+        int label_match = gen_new_label();
64
 
+        label_continue = gen_new_label();
65
 
+        arm_gen_test_cc(cond, label_match);
66
 
+        /* nomatch: */
67
 
+        tcg_tmp = tcg_temp_new_i64();
68
 
+        tcg_gen_movi_i64(tcg_tmp, nzcv << 28);
69
 
+        gen_set_nzcv(tcg_tmp);
70
 
+        tcg_temp_free_i64(tcg_tmp);
71
 
+        tcg_gen_br(label_continue);
72
 
+        gen_set_label(label_match);
73
 
+    }
74
 
+    /* match, or condition is always */
75
 
+    if (is_imm) {
76
 
+        tcg_y = new_tmp_a64(s);
77
 
+        tcg_gen_movi_i64(tcg_y, y);
78
 
+    } else {
79
 
+        tcg_y = cpu_reg(s, y);
80
 
+    }
81
 
+    tcg_rn = cpu_reg(s, rn);
82
 
+
83
 
+    tcg_tmp = tcg_temp_new_i64();
84
 
+    if (op) {
85
 
+        gen_sub_CC(sf, tcg_tmp, tcg_rn, tcg_y);
86
 
+    } else {
87
 
+        gen_add_CC(sf, tcg_tmp, tcg_rn, tcg_y);
88
 
+    }
89
 
+    tcg_temp_free_i64(tcg_tmp);
90
 
+
91
 
+    if (cond < 0x0e) { /* continue */
92
 
+        gen_set_label(label_continue);
93
 
+    }
94
 
 }
95
 
 
96
 
 /* C3.5.6 Conditional select
97
 
@@ -2846,11 +2897,7 @@ static void disas_data_proc_reg(DisasContext *s, uint32_t insn)
98
 
             disas_adc_sbc(s, insn);
99
 
             break;
100
 
         case 0x2: /* Conditional compare */
101
 
-            if (insn & (1 << 11)) { /* (immediate) */
102
 
-                disas_cc_imm(s, insn);
103
 
-            } else {            /* (register) */
104
 
-                disas_cc_reg(s, insn);
105
 
-            }
106
 
+            disas_cc(s, insn); /* both imm and reg forms */
107
 
             break;
108
 
         case 0x4: /* Conditional select */
109
 
             disas_cond_select(s, insn);
110
 
1.9.rc1
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