284
294
* of MODE_SENSE_POWER_PAGE */
285
295
#define GPMODE_CDROM_PAGE 0x0d
298
* Based on values from <linux/cdrom.h> but extending CD_MINS
299
* to the maximum common size allowed by the Orange's Book ATIP
301
* 90 and 99 min CDs are also available but using them as the
302
* upper limit reduces the effectiveness of the heuristic to
303
* detect DVDs burned to less than 25% of their maximum capacity
306
/* Some generally useful CD-ROM information */
307
#define CD_MINS 80 /* max. minutes per CD */
308
#define CD_SECS 60 /* seconds per minute */
309
#define CD_FRAMES 75 /* frames per second */
310
#define CD_FRAMESIZE 2048 /* bytes per frame, "cooked" mode */
311
#define CD_MAX_BYTES (CD_MINS * CD_SECS * CD_FRAMES * CD_FRAMESIZE)
312
#define CD_MAX_SECTORS (CD_MAX_BYTES / 512)
315
* The MMC values are not IDE specific and might need to be moved
316
* to a common header if they are also needed for the SCSI emulation
319
/* Profile list from MMC-6 revision 1 table 91 */
320
#define MMC_PROFILE_NONE 0x0000
321
#define MMC_PROFILE_CD_ROM 0x0008
322
#define MMC_PROFILE_CD_R 0x0009
323
#define MMC_PROFILE_CD_RW 0x000A
324
#define MMC_PROFILE_DVD_ROM 0x0010
325
#define MMC_PROFILE_DVD_R_SR 0x0011
326
#define MMC_PROFILE_DVD_RAM 0x0012
327
#define MMC_PROFILE_DVD_RW_RO 0x0013
328
#define MMC_PROFILE_DVD_RW_SR 0x0014
329
#define MMC_PROFILE_DVD_R_DL_SR 0x0015
330
#define MMC_PROFILE_DVD_R_DL_JR 0x0016
331
#define MMC_PROFILE_DVD_RW_DL 0x0017
332
#define MMC_PROFILE_DVD_DDR 0x0018
333
#define MMC_PROFILE_DVD_PLUS_RW 0x001A
334
#define MMC_PROFILE_DVD_PLUS_R 0x001B
335
#define MMC_PROFILE_DVD_PLUS_RW_DL 0x002A
336
#define MMC_PROFILE_DVD_PLUS_R_DL 0x002B
337
#define MMC_PROFILE_BD_ROM 0x0040
338
#define MMC_PROFILE_BD_R_SRM 0x0041
339
#define MMC_PROFILE_BD_R_RRM 0x0042
340
#define MMC_PROFILE_BD_RE 0x0043
341
#define MMC_PROFILE_HDDVD_ROM 0x0050
342
#define MMC_PROFILE_HDDVD_R 0x0051
343
#define MMC_PROFILE_HDDVD_RAM 0x0052
344
#define MMC_PROFILE_HDDVD_RW 0x0053
345
#define MMC_PROFILE_HDDVD_R_DL 0x0058
346
#define MMC_PROFILE_HDDVD_RW_DL 0x005A
347
#define MMC_PROFILE_INVALID 0xFFFF
287
349
#define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */
288
350
#define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */
289
351
#define ATAPI_INT_REASON_REL 0x04
469
557
put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
470
558
put_le16(p + 5, 512); /* XXX: retired, remove ? */
471
559
put_le16(p + 6, s->sectors);
472
snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
473
padstr((char *)(p + 10), buf, 20); /* serial number */
560
padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
474
561
put_le16(p + 20, 3); /* XXX: retired, remove ? */
475
562
put_le16(p + 21, 512); /* cache size in sectors */
476
563
put_le16(p + 22, 4); /* ecc bytes */
534
621
p = (uint16_t *)s->io_buffer;
535
622
/* Removable CDROM, 50us response, 12 byte packets */
536
623
put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
537
snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
538
padstr((char *)(p + 10), buf, 20); /* serial number */
624
padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
539
625
put_le16(p + 20, 3); /* buffer type */
540
626
put_le16(p + 21, 512); /* cache size in sectors */
541
627
put_le16(p + 22, 4); /* ecc bytes */
542
628
padstr((char *)(p + 23), QEMU_VERSION, 8); /* firmware version */
543
padstr((char *)(p + 27), "QEMU CD-ROM", 40); /* model */
629
padstr((char *)(p + 27), "QEMU DVD-ROM", 40); /* model */
544
630
put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
545
631
#ifdef USE_DMA_CDROM
546
632
put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
547
633
put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
634
put_le16(p + 62, 7); /* single word dma0-2 supported */
548
635
put_le16(p + 63, 7); /* mdma0-2 supported */
549
636
put_le16(p + 64, 0x3f); /* PIO modes supported */
589
675
put_le16(p + 6, s->sectors); /* Default sectors per track */
590
676
put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */
591
677
put_le16(p + 8, s->nb_sectors); /* Sectors per card */
592
snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
593
padstr((char *)(p + 10), buf, 20); /* Serial number in ASCII */
678
padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
594
679
put_le16(p + 22, 0x0004); /* ECC bytes */
595
680
padstr((char *) (p + 23), QEMU_VERSION, 8); /* Firmware Revision */
596
681
padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */
872
/* return 0 if buffer completed */
873
static int dma_buf_prepare(BMDMAState *bm, int is_write)
875
IDEState *s = bm->ide_if;
882
qemu_sglist_init(&s->sg, s->nsector / (TARGET_PAGE_SIZE/512) + 1);
883
s->io_buffer_size = 0;
885
if (bm->cur_prd_len == 0) {
886
/* end of table (with a fail safe of one page) */
887
if (bm->cur_prd_last ||
888
(bm->cur_addr - bm->addr) >= 4096)
889
return s->io_buffer_size != 0;
890
cpu_physical_memory_read(bm->cur_addr, (uint8_t *)&prd, 8);
892
prd.addr = le32_to_cpu(prd.addr);
893
prd.size = le32_to_cpu(prd.size);
894
len = prd.size & 0xfffe;
897
bm->cur_prd_len = len;
898
bm->cur_prd_addr = prd.addr;
899
bm->cur_prd_last = (prd.size & 0x80000000);
903
qemu_sglist_add(&s->sg, bm->cur_prd_addr, l);
904
bm->cur_prd_addr += l;
905
bm->cur_prd_len -= l;
906
s->io_buffer_size += l;
912
static void dma_buf_commit(IDEState *s, int is_write)
914
qemu_sglist_destroy(&s->sg);
917
static void ide_dma_error(IDEState *s)
919
ide_transfer_stop(s);
921
s->status = READY_STAT | ERR_STAT;
925
static int ide_handle_write_error(IDEState *s, int error, int op)
927
BlockInterfaceErrorAction action = drive_get_onerror(s->bs);
929
if (action == BLOCK_ERR_IGNORE)
932
if ((error == ENOSPC && action == BLOCK_ERR_STOP_ENOSPC)
933
|| action == BLOCK_ERR_STOP_ANY) {
934
s->bmdma->ide_if = s;
935
s->bmdma->status |= op;
938
if (op == BM_STATUS_DMA_RETRY) {
939
dma_buf_commit(s, 0);
769
949
/* return 0 if buffer completed */
770
950
static int dma_buf_rw(BMDMAState *bm, int is_write)
848
1032
/* launch next transfer */
850
if (n > MAX_MULT_SECTORS)
851
n = MAX_MULT_SECTORS;
852
1034
s->io_buffer_index = 0;
853
1035
s->io_buffer_size = n * 512;
1036
if (dma_buf_prepare(bm, 1) == 0)
854
1038
#ifdef DEBUG_AIO
855
printf("aio_read: sector_num=%lld n=%d\n", sector_num, n);
1039
printf("aio_read: sector_num=%" PRId64 " n=%d\n", sector_num, n);
857
bm->aiocb = bdrv_aio_read(s->bs, sector_num, s->io_buffer, n,
858
ide_read_dma_cb, bm);
1041
bm->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num, ide_read_dma_cb, bm);
1042
ide_dma_submit_check(s, ide_read_dma_cb, bm);
861
1045
static void ide_sector_read_dma(IDEState *s)
947
/* launch next transfer */
949
if (n > MAX_MULT_SECTORS)
950
n = MAX_MULT_SECTORS;
951
s->io_buffer_index = 0;
952
1158
s->io_buffer_size = n * 512;
954
if (dma_buf_rw(bm, 0) == 0)
1159
/* launch next transfer */
1160
if (dma_buf_prepare(bm, 0) == 0)
956
1162
#ifdef DEBUG_AIO
957
printf("aio_write: sector_num=%lld n=%d\n", sector_num, n);
1163
printf("aio_write: sector_num=%" PRId64 " n=%d\n", sector_num, n);
959
bm->aiocb = bdrv_aio_write(s->bs, sector_num, s->io_buffer, n,
960
ide_write_dma_cb, bm);
1165
bm->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num, ide_write_dma_cb, bm);
1166
ide_dma_submit_check(s, ide_write_dma_cb, bm);
963
1169
static void ide_sector_write_dma(IDEState *s)
1511
static inline uint8_t ide_atapi_set_profile(uint8_t *buf, uint8_t *index,
1514
uint8_t *buf_profile = buf + 12; /* start of profiles */
1516
buf_profile += ((*index) * 4); /* start of indexed profile */
1517
cpu_to_ube16 (buf_profile, profile);
1518
buf_profile[2] = ((buf_profile[0] == buf[6]) && (buf_profile[1] == buf[7]));
1520
/* each profile adds 4 bytes to the response */
1522
buf[11] += 4; /* Additional Length */
1527
static int ide_dvd_read_structure(IDEState *s, int format,
1528
const uint8_t *packet, uint8_t *buf)
1531
case 0x0: /* Physical format information */
1533
int layer = packet[6];
1534
uint64_t total_sectors;
1537
return -ASC_INV_FIELD_IN_CMD_PACKET;
1539
bdrv_get_geometry(s->bs, &total_sectors);
1540
total_sectors >>= 2;
1541
if (total_sectors == 0)
1542
return -ASC_MEDIUM_NOT_PRESENT;
1544
buf[4] = 1; /* DVD-ROM, part version 1 */
1545
buf[5] = 0xf; /* 120mm disc, minimum rate unspecified */
1546
buf[6] = 1; /* one layer, read-only (per MMC-2 spec) */
1547
buf[7] = 0; /* default densities */
1549
/* FIXME: 0x30000 per spec? */
1550
cpu_to_ube32(buf + 8, 0); /* start sector */
1551
cpu_to_ube32(buf + 12, total_sectors - 1); /* end sector */
1552
cpu_to_ube32(buf + 16, total_sectors - 1); /* l0 end sector */
1554
/* Size of buffer, not including 2 byte size field */
1555
cpu_to_be16wu((uint16_t *)buf, 2048 + 2);
1557
/* 2k data + 4 byte header */
1561
case 0x01: /* DVD copyright information */
1562
buf[4] = 0; /* no copyright data */
1563
buf[5] = 0; /* no region restrictions */
1565
/* Size of buffer, not including 2 byte size field */
1566
cpu_to_be16wu((uint16_t *)buf, 4 + 2);
1568
/* 4 byte header + 4 byte data */
1571
case 0x03: /* BCA information - invalid field for no BCA info */
1572
return -ASC_INV_FIELD_IN_CMD_PACKET;
1574
case 0x04: /* DVD disc manufacturing information */
1575
/* Size of buffer, not including 2 byte size field */
1576
cpu_to_be16wu((uint16_t *)buf, 2048 + 2);
1578
/* 2k data + 4 byte header */
1583
* This lists all the command capabilities above. Add new ones
1584
* in order and update the length and buffer return values.
1587
buf[4] = 0x00; /* Physical format */
1588
buf[5] = 0x40; /* Not writable, is readable */
1589
cpu_to_be16wu((uint16_t *)(buf + 6), 2048 + 4);
1591
buf[8] = 0x01; /* Copyright info */
1592
buf[9] = 0x40; /* Not writable, is readable */
1593
cpu_to_be16wu((uint16_t *)(buf + 10), 4 + 4);
1595
buf[12] = 0x03; /* BCA info */
1596
buf[13] = 0x40; /* Not writable, is readable */
1597
cpu_to_be16wu((uint16_t *)(buf + 14), 188 + 4);
1599
buf[16] = 0x04; /* Manufacturing info */
1600
buf[17] = 0x40; /* Not writable, is readable */
1601
cpu_to_be16wu((uint16_t *)(buf + 18), 2048 + 4);
1603
/* Size of buffer, not including 2 byte size field */
1604
cpu_to_be16wu((uint16_t *)buf, 16 + 2);
1606
/* data written + 4 byte header */
1609
default: /* TODO: formats beyond DVD-ROM requires */
1610
return -ASC_INV_FIELD_IN_CMD_PACKET;
1293
1614
static void ide_atapi_cmd(IDEState *s)
1295
1616
const uint8_t *packet;
1577
1910
case GPCMD_READ_DVD_STRUCTURE:
1579
1912
int media = packet[1];
1580
int layer = packet[6];
1581
int format = packet[2];
1582
uint64_t total_sectors;
1584
if (media != 0 || layer != 0)
1586
ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1587
ASC_INV_FIELD_IN_CMD_PACKET);
1913
int format = packet[7];
1916
max_len = ube16_to_cpu(packet + 8);
1918
if (format < 0xff) {
1919
if (media_is_cd(s)) {
1920
ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1921
ASC_INCOMPATIBLE_FORMAT);
1923
} else if (!media_present(s)) {
1924
ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1925
ASC_INV_FIELD_IN_CMD_PACKET);
1930
memset(buf, 0, max_len > IDE_DMA_BUF_SECTORS * 512 + 4 ?
1931
IDE_DMA_BUF_SECTORS * 512 + 4 : max_len);
1590
1933
switch (format) {
1592
bdrv_get_geometry(s->bs, &total_sectors);
1593
total_sectors >>= 2;
1594
if (total_sectors == 0) {
1595
ide_atapi_cmd_error(s, SENSE_NOT_READY,
1596
ASC_MEDIUM_NOT_PRESENT);
1937
ret = ide_dvd_read_structure(s, format, packet, buf);
1940
ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, -ret);
1942
ide_atapi_cmd_reply(s, ret, max_len);
1600
memset(buf, 0, 2052);
1602
buf[4] = 1; // DVD-ROM, part version 1
1603
buf[5] = 0xf; // 120mm disc, maximum rate unspecified
1604
buf[6] = 0; // one layer, embossed data
1607
cpu_to_ube32(buf + 8, 0);
1608
cpu_to_ube32(buf + 12, total_sectors - 1);
1609
cpu_to_ube32(buf + 16, total_sectors - 1);
1611
cpu_to_be16wu((uint16_t *)buf, 2048 + 4);
1613
ide_atapi_cmd_reply(s, 2048 + 3, 2048 + 4);
1946
/* TODO: BD support, fall through for now */
1948
/* Generic disk structures */
1949
case 0x80: /* TODO: AACS volume identifier */
1950
case 0x81: /* TODO: AACS media serial number */
1951
case 0x82: /* TODO: AACS media identifier */
1952
case 0x83: /* TODO: AACS media key block */
1953
case 0x90: /* TODO: List of recognized format layers */
1954
case 0xc0: /* TODO: Write protection status */
1617
1956
ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1618
1957
ASC_INV_FIELD_IN_CMD_PACKET);
1648
1988
ASC_INV_FIELD_IN_CMD_PACKET);
1652
bdrv_get_geometry(s->bs, &total_sectors);
1654
buf[7] = total_sectors <= 1433600 ? 0x08 : 0x10; /* current profile */
1655
buf[10] = 0x10 | 0x1;
1656
buf[11] = 0x08; /* size of profile list */
1657
buf[13] = 0x10; /* DVD-ROM profile */
1658
buf[14] = buf[7] == 0x10; /* (in)active */
1659
buf[17] = 0x08; /* CD-ROM profile */
1660
buf[18] = buf[7] == 0x08; /* (in)active */
1661
ide_atapi_cmd_reply(s, 32, 32);
1992
/* XXX: could result in alignment problems in some architectures */
1993
max_len = ube16_to_cpu(packet + 7);
1996
* XXX: avoid overflow for io_buffer if max_len is bigger than
1997
* the size of that buffer (dimensioned to max number of
1998
* sectors to transfer at once)
2000
* Only a problem if the feature/profiles grow.
2002
if (max_len > 512) /* XXX: assume 1 sector */
2005
memset(buf, 0, max_len);
2007
* the number of sectors from the media tells us which profile
2008
* to use as current. 0 means there is no media
2010
if (media_is_dvd(s))
2011
cpu_to_ube16(buf + 6, MMC_PROFILE_DVD_ROM);
2012
else if (media_is_cd(s))
2013
cpu_to_ube16(buf + 6, MMC_PROFILE_CD_ROM);
2015
buf[10] = 0x02 | 0x01; /* persistent and current */
2016
len = 12; /* headers: 8 + 4 */
2017
len += ide_atapi_set_profile(buf, &index, MMC_PROFILE_DVD_ROM);
2018
len += ide_atapi_set_profile(buf, &index, MMC_PROFILE_CD_ROM);
2019
cpu_to_ube32(buf, len - 4); /* data length */
2021
ide_atapi_cmd_reply(s, len, max_len);
1989
2362
switch (s->nsector >> 3) {
1990
2363
case 0x00: /* pio default */
1991
2364
case 0x01: /* pio mode */
2365
put_le16(s->identify_data + 62,0x07);
2366
put_le16(s->identify_data + 63,0x07);
2367
put_le16(s->identify_data + 88,0x3f);
2369
case 0x02: /* sigle word dma mode*/
2370
put_le16(s->identify_data + 62,0x07 | (1 << (val + 8)));
1992
2371
put_le16(s->identify_data + 63,0x07);
1993
2372
put_le16(s->identify_data + 88,0x3f);
1995
2374
case 0x04: /* mdma mode */
2375
put_le16(s->identify_data + 62,0x07);
1996
2376
put_le16(s->identify_data + 63,0x07 | (1 << (val + 8)));
1997
2377
put_le16(s->identify_data + 88,0x3f);
1999
2379
case 0x08: /* udma mode */
2380
put_le16(s->identify_data + 62,0x07);
2000
2381
put_le16(s->identify_data + 63,0x07);
2001
2382
put_le16(s->identify_data + 88,0x3f | (1 << (val + 8)));
2360
2773
s->media_changed = 0;
2364
uint8_t boot_ind; /* 0x80 - active */
2365
uint8_t head; /* starting head */
2366
uint8_t sector; /* starting sector */
2367
uint8_t cyl; /* starting cylinder */
2368
uint8_t sys_ind; /* What partition type */
2369
uint8_t end_head; /* end head */
2370
uint8_t end_sector; /* end sector */
2371
uint8_t end_cyl; /* end cylinder */
2372
uint32_t start_sect; /* starting sector counting from 0 */
2373
uint32_t nr_sects; /* nr of sectors in partition */
2374
} __attribute__((packed));
2376
/* try to guess the disk logical geometry from the MSDOS partition table. Return 0 if OK, -1 if could not guess */
2377
static int guess_disk_lchs(IDEState *s,
2378
int *pcylinders, int *pheads, int *psectors)
2381
int ret, i, heads, sectors, cylinders;
2382
struct partition *p;
2385
buf = qemu_memalign(512, 512);
2388
ret = bdrv_read(s->bs, 0, buf, 1);
2393
/* test msdos magic */
2394
if (buf[510] != 0x55 || buf[511] != 0xaa) {
2398
for(i = 0; i < 4; i++) {
2399
p = ((struct partition *)(buf + 0x1be)) + i;
2400
nr_sects = le32_to_cpu(p->nr_sects);
2401
if (nr_sects && p->end_head) {
2402
/* We make the assumption that the partition terminates on
2403
a cylinder boundary */
2404
heads = p->end_head + 1;
2405
sectors = p->end_sector & 63;
2408
cylinders = s->nb_sectors / (heads * sectors);
2409
if (cylinders < 1 || cylinders > 16383)
2412
*psectors = sectors;
2413
*pcylinders = cylinders;
2415
printf("guessed geometry: LCHS=%d %d %d\n",
2416
cylinders, heads, sectors);
2426
2776
static void ide_init2(IDEState *ide_state,
2427
2777
BlockDriverState *hd0, BlockDriverState *hd1,
2431
2781
static int drive_serial = 1;
2432
int i, cylinders, heads, secs, translation, lba_detected = 0;
2782
int i, cylinders, heads, secs;
2433
2783
uint64_t nb_sectors;
2435
2785
for(i = 0; i < 2; i++) {
2436
2786
s = ide_state + i;
2437
s->io_buffer = qemu_memalign(512, MAX_MULT_SECTORS*512 + 4);
2787
s->io_buffer = qemu_memalign(512, IDE_DMA_BUF_SECTORS*512 + 4);
2443
2793
bdrv_get_geometry(s->bs, &nb_sectors);
2794
bdrv_guess_geometry(s->bs, &cylinders, &heads, &secs);
2795
s->cylinders = cylinders;
2444
2798
s->nb_sectors = nb_sectors;
2445
/* if a geometry hint is available, use it */
2446
bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs);
2447
translation = bdrv_get_translation_hint(s->bs);
2448
if (cylinders != 0) {
2449
s->cylinders = cylinders;
2453
if (guess_disk_lchs(s, &cylinders, &heads, &secs) == 0) {
2455
/* if heads > 16, it means that a BIOS LBA
2456
translation was active, so the default
2457
hardware geometry is OK */
2459
goto default_geometry;
2461
s->cylinders = cylinders;
2464
/* disable any translation to be in sync with
2465
the logical geometry */
2466
if (translation == BIOS_ATA_TRANSLATION_AUTO) {
2467
bdrv_set_translation_hint(s->bs,
2468
BIOS_ATA_TRANSLATION_NONE);
2473
/* if no geometry, use a standard physical disk geometry */
2474
cylinders = nb_sectors / (16 * 63);
2475
if (cylinders > 16383)
2477
else if (cylinders < 2)
2479
s->cylinders = cylinders;
2482
if ((lba_detected == 1) && (translation == BIOS_ATA_TRANSLATION_AUTO)) {
2483
if ((s->cylinders * s->heads) <= 131072) {
2484
bdrv_set_translation_hint(s->bs,
2485
BIOS_ATA_TRANSLATION_LARGE);
2487
bdrv_set_translation_hint(s->bs,
2488
BIOS_ATA_TRANSLATION_LBA);
2492
bdrv_set_geometry_hint(s->bs, s->cylinders, s->heads, s->sectors);
2494
2800
if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
2495
2801
s->is_cdrom = 1;
2496
2802
bdrv_set_change_cb(s->bs, cdrom_change_cb, s);
2499
2805
s->drive_serial = drive_serial++;
2806
strncpy(s->drive_serial_str, drive_get_serial(s->bs),
2807
sizeof(s->drive_serial_str));
2808
if (strlen(s->drive_serial_str) == 0)
2809
snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
2810
"QM%05d", s->drive_serial);
2501
2812
s->sector_write_timer = qemu_new_timer(vm_clock,
2502
2813
ide_sector_write_timer_cb, s);
3073
static uint32_t bmdma_addr_readb(void *opaque, uint32_t addr)
3075
BMDMAState *bm = opaque;
3077
val = (bm->addr >> ((addr & 3) * 8)) & 0xff;
3079
printf("%s: 0x%08x\n", __func__, val);
3084
static void bmdma_addr_writeb(void *opaque, uint32_t addr, uint32_t val)
3086
BMDMAState *bm = opaque;
3087
int shift = (addr & 3) * 8;
3089
printf("%s: 0x%08x\n", __func__, val);
3091
bm->addr &= ~(0xFF << shift);
3092
bm->addr |= ((val & 0xFF) << shift) & ~3;
3093
bm->cur_addr = bm->addr;
3096
static uint32_t bmdma_addr_readw(void *opaque, uint32_t addr)
3098
BMDMAState *bm = opaque;
3100
val = (bm->addr >> ((addr & 3) * 8)) & 0xffff;
3102
printf("%s: 0x%08x\n", __func__, val);
3107
static void bmdma_addr_writew(void *opaque, uint32_t addr, uint32_t val)
3109
BMDMAState *bm = opaque;
3110
int shift = (addr & 3) * 8;
3112
printf("%s: 0x%08x\n", __func__, val);
3114
bm->addr &= ~(0xFFFF << shift);
3115
bm->addr |= ((val & 0xFFFF) << shift) & ~3;
3116
bm->cur_addr = bm->addr;
2745
3119
static uint32_t bmdma_addr_readl(void *opaque, uint32_t addr)
2747
3121
BMDMAState *bm = opaque;
2774
3148
d->ide_if[2 * i].bmdma = bm;
2775
3149
d->ide_if[2 * i + 1].bmdma = bm;
2776
3150
bm->pci_dev = (PCIIDEState *)pci_dev;
3151
qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
2778
3153
register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
2780
3155
register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm);
2781
3156
register_ioport_read(addr, 4, 1, bmdma_readb, bm);
3158
register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm);
3159
register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm);
3160
register_ioport_write(addr + 4, 4, 2, bmdma_addr_writew, bm);
3161
register_ioport_read(addr + 4, 4, 2, bmdma_addr_readw, bm);
2783
3162
register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
2784
3163
register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
3168
static void pci_ide_save(QEMUFile* f, void *opaque)
3170
PCIIDEState *d = opaque;
3173
pci_device_save(&d->dev, f);
3175
for(i = 0; i < 2; i++) {
3176
BMDMAState *bm = &d->bmdma[i];
3178
qemu_put_8s(f, &bm->cmd);
3179
qemu_put_8s(f, &bm->status);
3180
qemu_put_be32s(f, &bm->addr);
3181
qemu_put_sbe64s(f, &bm->sector_num);
3182
qemu_put_be32s(f, &bm->nsector);
3183
ifidx = bm->ide_if ? bm->ide_if - d->ide_if : 0;
3184
qemu_put_8s(f, &ifidx);
3185
/* XXX: if a transfer is pending, we do not save it yet */
3188
/* per IDE interface data */
3189
for(i = 0; i < 2; i++) {
3190
IDEState *s = &d->ide_if[i * 2];
3191
uint8_t drive1_selected;
3192
qemu_put_8s(f, &s->cmd);
3193
drive1_selected = (s->cur_drive != s);
3194
qemu_put_8s(f, &drive1_selected);
3197
/* per IDE drive data */
3198
for(i = 0; i < 4; i++) {
3199
ide_save(f, &d->ide_if[i]);
3203
static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
3205
PCIIDEState *d = opaque;
3208
if (version_id != 2)
3210
ret = pci_device_load(&d->dev, f);
3214
for(i = 0; i < 2; i++) {
3215
BMDMAState *bm = &d->bmdma[i];
3217
qemu_get_8s(f, &bm->cmd);
3218
qemu_get_8s(f, &bm->status);
3219
qemu_get_be32s(f, &bm->addr);
3220
qemu_get_sbe64s(f, &bm->sector_num);
3221
qemu_get_be32s(f, &bm->nsector);
3222
qemu_get_8s(f, &ifidx);
3223
bm->ide_if = &d->ide_if[ifidx];
3224
/* XXX: if a transfer is pending, we do not save it yet */
3227
/* per IDE interface data */
3228
for(i = 0; i < 2; i++) {
3229
IDEState *s = &d->ide_if[i * 2];
3230
uint8_t drive1_selected;
3231
qemu_get_8s(f, &s->cmd);
3232
qemu_get_8s(f, &drive1_selected);
3233
s->cur_drive = &d->ide_if[i * 2 + (drive1_selected != 0)];
3236
/* per IDE drive data */
3237
for(i = 0; i < 4; i++) {
3238
ide_load(f, &d->ide_if[i]);
2789
3243
/* XXX: call it also when the MRDMODE is changed from the PCI config
2791
3245
static void cmd646_update_irq(PCIIDEState *d)
2828
3291
d->type = IDE_TYPE_CMD646;
2829
3292
pci_conf = d->dev.config;
2830
pci_conf[0x00] = 0x95; // CMD646
2831
pci_conf[0x01] = 0x10;
2832
pci_conf[0x02] = 0x46;
2833
pci_conf[0x03] = 0x06;
3293
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CMD);
3294
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_CMD_646);
2835
3296
pci_conf[0x08] = 0x07; // IDE controller revision
2836
3297
pci_conf[0x09] = 0x8f;
2838
pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
2839
pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
3299
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
2840
3300
pci_conf[0x0e] = 0x00; // header_type
3302
pci_conf[0x51] = 0x04; // enable IDE0
2842
3303
if (secondary_ide_enabled) {
2843
3304
/* XXX: if not enabled, really disable the seconday IDE controller */
2844
pci_conf[0x51] = 0x80; /* enable IDE1 */
3305
pci_conf[0x51] |= 0x08; /* enable IDE1 */
2847
3308
pci_register_io_region((PCIDevice *)d, 0, 0x8,
2863
3324
irq = qemu_allocate_irqs(cmd646_set_irq, d, 2);
2864
3325
ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], irq[0]);
2865
3326
ide_init2(&d->ide_if[2], hd_table[2], hd_table[3], irq[1]);
2868
static void pci_ide_save(QEMUFile* f, void *opaque)
2870
PCIIDEState *d = opaque;
2873
pci_device_save(&d->dev, f);
2875
for(i = 0; i < 2; i++) {
2876
BMDMAState *bm = &d->bmdma[i];
2877
qemu_put_8s(f, &bm->cmd);
2878
qemu_put_8s(f, &bm->status);
2879
qemu_put_be32s(f, &bm->addr);
2880
/* XXX: if a transfer is pending, we do not save it yet */
2883
/* per IDE interface data */
2884
for(i = 0; i < 2; i++) {
2885
IDEState *s = &d->ide_if[i * 2];
2886
uint8_t drive1_selected;
2887
qemu_put_8s(f, &s->cmd);
2888
drive1_selected = (s->cur_drive != s);
2889
qemu_put_8s(f, &drive1_selected);
2892
/* per IDE drive data */
2893
for(i = 0; i < 4; i++) {
2894
ide_save(f, &d->ide_if[i]);
2898
static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
2900
PCIIDEState *d = opaque;
2903
if (version_id != 1)
2905
ret = pci_device_load(&d->dev, f);
2909
for(i = 0; i < 2; i++) {
2910
BMDMAState *bm = &d->bmdma[i];
2911
qemu_get_8s(f, &bm->cmd);
2912
qemu_get_8s(f, &bm->status);
2913
qemu_get_be32s(f, &bm->addr);
2914
/* XXX: if a transfer is pending, we do not save it yet */
2917
/* per IDE interface data */
2918
for(i = 0; i < 2; i++) {
2919
IDEState *s = &d->ide_if[i * 2];
2920
uint8_t drive1_selected;
2921
qemu_get_8s(f, &s->cmd);
2922
qemu_get_8s(f, &drive1_selected);
2923
s->cur_drive = &d->ide_if[i * 2 + (drive1_selected != 0)];
2926
/* per IDE drive data */
2927
for(i = 0; i < 4; i++) {
2928
ide_load(f, &d->ide_if[i]);
2933
static void piix3_reset(PCIIDEState *d)
3328
register_savevm("ide", 0, 2, pci_ide_save, pci_ide_load, d);
3329
qemu_register_reset(cmd646_reset, d);
3333
static void piix3_reset(void *opaque)
3335
PCIIDEState *d = opaque;
2935
3336
uint8_t *pci_conf = d->dev.config;
3339
for (i = 0; i < 2; i++)
3340
ide_dma_cancel(&d->bmdma[i]);
2937
3342
pci_conf[0x04] = 0x00;
2938
3343
pci_conf[0x05] = 0x00;
3014
3420
ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
3015
3421
ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
3017
register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d);
3423
register_savevm("ide", 0, 2, pci_ide_save, pci_ide_load, d);
3426
#if defined(TARGET_PPC)
3020
3427
/***********************************************************/
3021
3428
/* MacIO based PowerPC IDE */
3430
typedef struct MACIOIDEState {
3432
BlockDriverAIOCB *aiocb;
3435
static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
3437
DBDMA_io *io = opaque;
3438
MACIOIDEState *m = io->opaque;
3439
IDEState *s = m->ide_if->cur_drive;
3443
qemu_sglist_destroy(&s->sg);
3444
ide_atapi_io_error(s, ret);
3445
io->dma_end(opaque);
3449
if (s->io_buffer_size > 0) {
3451
qemu_sglist_destroy(&s->sg);
3453
s->packet_transfer_size -= s->io_buffer_size;
3455
s->io_buffer_index += s->io_buffer_size;
3456
s->lba += s->io_buffer_index >> 11;
3457
s->io_buffer_index &= 0x7ff;
3460
if (s->packet_transfer_size <= 0)
3461
ide_atapi_cmd_ok(s);
3464
io->dma_end(opaque);
3468
/* launch next transfer */
3470
s->io_buffer_size = io->len;
3472
qemu_sglist_init(&s->sg, io->len / TARGET_PAGE_SIZE + 1);
3473
qemu_sglist_add(&s->sg, io->addr, io->len);
3474
io->addr += io->len;
3477
m->aiocb = dma_bdrv_read(s->bs, &s->sg,
3478
(int64_t)(s->lba << 2) + (s->io_buffer_index >> 9),
3479
pmac_ide_atapi_transfer_cb, io);
3481
qemu_sglist_destroy(&s->sg);
3482
/* Note: media not present is the most likely case */
3483
ide_atapi_cmd_error(s, SENSE_NOT_READY,
3484
ASC_MEDIUM_NOT_PRESENT);
3485
io->dma_end(opaque);
3490
static void pmac_ide_transfer_cb(void *opaque, int ret)
3492
DBDMA_io *io = opaque;
3493
MACIOIDEState *m = io->opaque;
3494
IDEState *s = m->ide_if->cur_drive;
3500
qemu_sglist_destroy(&s->sg);
3506
sector_num = ide_get_sector(s);
3507
if (s->io_buffer_size > 0) {
3509
qemu_sglist_destroy(&s->sg);
3510
n = (s->io_buffer_size + 0x1ff) >> 9;
3512
ide_set_sector(s, sector_num);
3516
/* end of transfer ? */
3517
if (s->nsector == 0) {
3518
s->status = READY_STAT | SEEK_STAT;
3529
/* launch next transfer */
3531
s->io_buffer_index = 0;
3532
s->io_buffer_size = io->len;
3534
qemu_sglist_init(&s->sg, io->len / TARGET_PAGE_SIZE + 1);
3535
qemu_sglist_add(&s->sg, io->addr, io->len);
3536
io->addr += io->len;
3540
m->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num,
3541
pmac_ide_transfer_cb, io);
3543
m->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num,
3544
pmac_ide_transfer_cb, io);
3546
pmac_ide_transfer_cb(io, -1);
3549
static void pmac_ide_transfer(DBDMA_io *io)
3551
MACIOIDEState *m = io->opaque;
3552
IDEState *s = m->ide_if->cur_drive;
3554
s->io_buffer_size = 0;
3556
pmac_ide_atapi_transfer_cb(io, 0);
3560
pmac_ide_transfer_cb(io, 0);
3563
static void pmac_ide_flush(DBDMA_io *io)
3565
MACIOIDEState *m = io->opaque;
3023
3571
/* PowerMac IDE memory IO */
3024
3572
static void pmac_ide_writeb (void *opaque,
3025
3573
target_phys_addr_t addr, uint32_t val)
3575
MACIOIDEState *d = opaque;
3027
3577
addr = (addr & 0xFFF) >> 4;
3028
3578
switch (addr) {
3030
ide_ioport_write(opaque, addr, val);
3580
ide_ioport_write(d->ide_if, addr, val);
3034
ide_cmd_write(opaque, 0, val);
3584
ide_cmd_write(d->ide_if, 0, val);
3126
3683
pmac_ide_readl,
3686
static void pmac_ide_save(QEMUFile *f, void *opaque)
3688
MACIOIDEState *d = opaque;
3689
IDEState *s = d->ide_if;
3690
uint8_t drive1_selected;
3693
/* per IDE interface data */
3694
qemu_put_8s(f, &s->cmd);
3695
drive1_selected = (s->cur_drive != s);
3696
qemu_put_8s(f, &drive1_selected);
3698
/* per IDE drive data */
3699
for(i = 0; i < 2; i++) {
3704
static int pmac_ide_load(QEMUFile *f, void *opaque, int version_id)
3706
MACIOIDEState *d = opaque;
3707
IDEState *s = d->ide_if;
3708
uint8_t drive1_selected;
3711
if (version_id != 1)
3714
/* per IDE interface data */
3715
qemu_get_8s(f, &s->cmd);
3716
qemu_get_8s(f, &drive1_selected);
3717
s->cur_drive = &s[(drive1_selected != 0)];
3719
/* per IDE drive data */
3720
for(i = 0; i < 2; i++) {
3726
static void pmac_ide_reset(void *opaque)
3728
MACIOIDEState *d = opaque;
3729
IDEState *s = d->ide_if;
3129
3735
/* hd_table must contain 4 block drivers */
3130
3736
/* PowerMac uses memory mapped registers, not I/O. Return the memory
3131
3737
I/O index to access the ide. */
3132
int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq)
3738
int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq,
3739
void *dbdma, int channel, qemu_irq dma_irq)
3135
3742
int pmac_ide_memory;
3137
ide_if = qemu_mallocz(sizeof(IDEState) * 2);
3138
ide_init2(&ide_if[0], hd_table[0], hd_table[1], irq);
3744
d = qemu_mallocz(sizeof(MACIOIDEState));
3745
ide_init2(d->ide_if, hd_table[0], hd_table[1], irq);
3748
DBDMA_register_channel(dbdma, channel, dma_irq, pmac_ide_transfer, pmac_ide_flush, d);
3140
3750
pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
3141
pmac_ide_write, &ide_if[0]);
3752
register_savevm("ide", 0, 1, pmac_ide_save, pmac_ide_load, d);
3753
qemu_register_reset(pmac_ide_reset, d);
3142
3756
return pmac_ide_memory;
3758
#endif /* TARGET_PPC */
3760
/***********************************************************/
3761
/* MMIO based ide port
3762
* This emulates IDE device connected directly to the CPU bus without
3763
* dedicated ide controller, which is often seen on embedded boards.
3771
static uint32_t mmio_ide_read (void *opaque, target_phys_addr_t addr)
3773
MMIOState *s = (MMIOState*)opaque;
3774
IDEState *ide = (IDEState*)s->dev;
3777
return ide_ioport_read(ide, addr);
3779
return ide_data_readw(ide, 0);
3782
static void mmio_ide_write (void *opaque, target_phys_addr_t addr,
3785
MMIOState *s = (MMIOState*)opaque;
3786
IDEState *ide = (IDEState*)s->dev;
3789
ide_ioport_write(ide, addr, val);
3791
ide_data_writew(ide, 0, val);
3794
static CPUReadMemoryFunc *mmio_ide_reads[] = {
3800
static CPUWriteMemoryFunc *mmio_ide_writes[] = {
3806
static uint32_t mmio_ide_status_read (void *opaque, target_phys_addr_t addr)
3808
MMIOState *s= (MMIOState*)opaque;
3809
IDEState *ide = (IDEState*)s->dev;
3810
return ide_status_read(ide, 0);
3813
static void mmio_ide_cmd_write (void *opaque, target_phys_addr_t addr,
3816
MMIOState *s = (MMIOState*)opaque;
3817
IDEState *ide = (IDEState*)s->dev;
3818
ide_cmd_write(ide, 0, val);
3821
static CPUReadMemoryFunc *mmio_ide_status[] = {
3822
mmio_ide_status_read,
3823
mmio_ide_status_read,
3824
mmio_ide_status_read,
3827
static CPUWriteMemoryFunc *mmio_ide_cmd[] = {
3833
void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2,
3834
qemu_irq irq, int shift,
3835
BlockDriverState *hd0, BlockDriverState *hd1)
3837
MMIOState *s = qemu_mallocz(sizeof(MMIOState));
3838
IDEState *ide = qemu_mallocz(sizeof(IDEState) * 2);
3841
ide_init2(ide, hd0, hd1, irq);
3846
mem1 = cpu_register_io_memory(0, mmio_ide_reads, mmio_ide_writes, s);
3847
mem2 = cpu_register_io_memory(0, mmio_ide_status, mmio_ide_cmd, s);
3848
cpu_register_physical_memory(membase, 16 << shift, mem1);
3849
cpu_register_physical_memory(membase2, 2 << shift, mem2);
3145
3852
/***********************************************************/
3146
3853
/* CF-ATA Microdrive */
added
removed
hw/ide.c
