28
28
#if defined (TARGET_PPC64)
29
29
/* PowerPC 64 definitions */
30
typedef uint64_t ppc_gpr_t;
31
30
#define TARGET_LONG_BITS 64
32
31
#define TARGET_PAGE_BITS 12
34
33
#else /* defined (TARGET_PPC64) */
35
34
/* PowerPC 32 definitions */
36
#if (HOST_LONG_BITS >= 64)
37
/* When using 64 bits temporary registers,
38
* we can use 64 bits GPR with no extra cost
39
* It's even an optimization as this will prevent
40
* the compiler to do unuseful masking in the micro-ops.
42
typedef uint64_t ppc_gpr_t;
43
#else /* (HOST_LONG_BITS >= 64) */
44
typedef uint32_t ppc_gpr_t;
45
#endif /* (HOST_LONG_BITS >= 64) */
47
35
#define TARGET_LONG_BITS 32
49
37
#if defined(TARGET_PPCEMB)
308
297
/* SPR access micro-ops generations callbacks */
309
298
struct ppc_spr_t {
310
void (*uea_read)(void *opaque, int spr_num);
311
void (*uea_write)(void *opaque, int spr_num);
299
void (*uea_read)(void *opaque, int gpr_num, int spr_num);
300
void (*uea_write)(void *opaque, int spr_num, int gpr_num);
312
301
#if !defined(CONFIG_USER_ONLY)
313
void (*oea_read)(void *opaque, int spr_num);
314
void (*oea_write)(void *opaque, int spr_num);
315
void (*hea_read)(void *opaque, int spr_num);
316
void (*hea_write)(void *opaque, int spr_num);
302
void (*oea_read)(void *opaque, int gpr_num, int spr_num);
303
void (*oea_write)(void *opaque, int spr_num, int gpr_num);
304
void (*hea_read)(void *opaque, int gpr_num, int spr_num);
305
void (*hea_write)(void *opaque, int spr_num, int gpr_num);
318
const unsigned char *name;
321
310
/* Altivec registers (128 bits) */
322
311
union ppc_avr_t {
708
692
is returned if the signal was handled by the virtual CPU. */
709
693
int cpu_ppc_signal_handler (int host_signum, void *pinfo,
695
int cpu_ppc_handle_mmu_fault (CPUPPCState *env, target_ulong address, int rw,
696
int mmu_idx, int is_softmmu);
697
int get_physical_address (CPUPPCState *env, mmu_ctx_t *ctx, target_ulong vaddr,
698
int rw, int access_type);
712
699
void do_interrupt (CPUPPCState *env);
713
700
void ppc_hw_interrupt (CPUPPCState *env);
714
void cpu_loop_exit (void);
716
void dump_stack (CPUPPCState *env);
702
void cpu_dump_rfi (target_ulong RA, target_ulong msr);
718
704
#if !defined(CONFIG_USER_ONLY)
719
target_ulong do_load_ibatu (CPUPPCState *env, int nr);
720
target_ulong do_load_ibatl (CPUPPCState *env, int nr);
721
void do_store_ibatu (CPUPPCState *env, int nr, target_ulong value);
722
void do_store_ibatl (CPUPPCState *env, int nr, target_ulong value);
723
target_ulong do_load_dbatu (CPUPPCState *env, int nr);
724
target_ulong do_load_dbatl (CPUPPCState *env, int nr);
725
void do_store_dbatu (CPUPPCState *env, int nr, target_ulong value);
726
void do_store_dbatl (CPUPPCState *env, int nr, target_ulong value);
727
void do_store_ibatu_601 (CPUPPCState *env, int nr, target_ulong value);
728
void do_store_ibatl_601 (CPUPPCState *env, int nr, target_ulong value);
729
target_ulong do_load_sdr1 (CPUPPCState *env);
730
void do_store_sdr1 (CPUPPCState *env, target_ulong value);
705
void ppc6xx_tlb_store (CPUPPCState *env, target_ulong EPN, int way, int is_code,
706
target_ulong pte0, target_ulong pte1);
707
void ppc_store_ibatu (CPUPPCState *env, int nr, target_ulong value);
708
void ppc_store_ibatl (CPUPPCState *env, int nr, target_ulong value);
709
void ppc_store_dbatu (CPUPPCState *env, int nr, target_ulong value);
710
void ppc_store_dbatl (CPUPPCState *env, int nr, target_ulong value);
711
void ppc_store_ibatu_601 (CPUPPCState *env, int nr, target_ulong value);
712
void ppc_store_ibatl_601 (CPUPPCState *env, int nr, target_ulong value);
713
void ppc_store_sdr1 (CPUPPCState *env, target_ulong value);
731
714
#if defined(TARGET_PPC64)
732
target_ulong ppc_load_asr (CPUPPCState *env);
733
715
void ppc_store_asr (CPUPPCState *env, target_ulong value);
734
716
target_ulong ppc_load_slb (CPUPPCState *env, int slb_nr);
735
717
void ppc_store_slb (CPUPPCState *env, int slb_nr, target_ulong rs);
736
718
#endif /* defined(TARGET_PPC64) */
738
target_ulong do_load_sr (CPUPPCState *env, int srnum);
740
void do_store_sr (CPUPPCState *env, int srnum, target_ulong value);
719
void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value);
741
720
#endif /* !defined(CONFIG_USER_ONLY) */
742
target_ulong ppc_load_xer (CPUPPCState *env);
743
void ppc_store_xer (CPUPPCState *env, target_ulong value);
744
721
void ppc_store_msr (CPUPPCState *env, target_ulong value);
746
723
void cpu_ppc_reset (void *opaque);
748
725
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
750
const ppc_def_t *cpu_ppc_find_by_name (const unsigned char *name);
727
const ppc_def_t *cpu_ppc_find_by_name (const char *name);
751
728
int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def);
753
730
/* Time-base and decrementer management */
826
805
return env->mmu_idx;
808
#if defined(CONFIG_USER_ONLY)
809
static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
814
for (i = 7; i < 32; i++)
829
819
#include "cpu-all.h"
820
#include "exec-all.h"
831
822
/*****************************************************************************/
832
/* Registers definitions */
838
#define xer_so env->xer[4]
839
#define xer_ov env->xer[6]
840
#define xer_ca env->xer[2]
841
#define xer_cmp env->xer[1]
842
#define xer_bc env->xer[0]
823
/* CRF definitions */
828
#define CRF_CH (1 << 4)
829
#define CRF_CL (1 << 3)
830
#define CRF_CH_OR_CL (1 << 2)
831
#define CRF_CH_AND_CL (1 << 1)
833
/* XER definitions */
839
#define xer_so ((env->xer >> XER_SO) & 1)
840
#define xer_ov ((env->xer >> XER_OV) & 1)
841
#define xer_ca ((env->xer >> XER_CA) & 1)
842
#define xer_cmp ((env->xer >> XER_CMP) & 0xFF)
843
#define xer_bc ((env->xer >> XER_BC) & 0x7F)
844
845
/* SPR definitions */
845
846
#define SPR_MQ (0x000)