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  • Committer: Bazaar Package Importer
  • Author(s): Aurelien Jarno, Aurelien Jarno
  • Date: 2009-03-22 10:13:17 UTC
  • mfrom: (1.2.1 upstream) (6.1.1 sid)
  • Revision ID: james.westby@ubuntu.com-20090322101317-iigjtnu5qil35dtb
Tags: 0.10.1-1
[ Aurelien Jarno ]
* New upstream stable release:
  - patches/80_stable-branch.patch: remove.
* debian/control: 
  - Remove depends on proll.
  - Move depends on device-tree-compiler to build-depends.
  - Bump Standards-Version to 3.8.1 (no changes).
* patches/82_qemu-img_decimal.patch: new patch from upstream to make
  qemu-img accept sizes with decimal values (closes: bug#501400).

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/* Mainstone FPGA for extern irqs */
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#define FPGA_GPIO_PIN   0
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#define MST_NUM_IRQS    16
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#define MST_BASE                MST_FPGA_PHYS
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#define MST_LEDDAT1             0x10
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#define MST_LEDDAT2             0x14
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#define MST_LEDCTRL             0x40
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#define MST_PCMCIA1             0xe4
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typedef struct mst_irq_state{
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        target_phys_addr_t target_base;
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        qemu_irq *parent;
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        qemu_irq *pins;
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mst_fpga_readb(void *opaque, target_phys_addr_t addr)
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{
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        mst_irq_state *s = (mst_irq_state *) opaque;
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        addr -= s->target_base;
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        switch (addr) {
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        case MST_LEDDAT1:
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mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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        mst_irq_state *s = (mst_irq_state *) opaque;
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        addr -= s->target_base;
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        value &= 0xffffffff;
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        switch (addr) {
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        }
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}
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CPUReadMemoryFunc *mst_fpga_readfn[] = {
 
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static CPUReadMemoryFunc *mst_fpga_readfn[] = {
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        mst_fpga_readb,
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        mst_fpga_readb,
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        mst_fpga_readb,
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};
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CPUWriteMemoryFunc *mst_fpga_writefn[] = {
 
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static CPUWriteMemoryFunc *mst_fpga_writefn[] = {
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        mst_fpga_writeb,
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        mst_fpga_writeb,
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        mst_fpga_writeb,
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        s = (mst_irq_state  *)
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                qemu_mallocz(sizeof(mst_irq_state));
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        if (!s)
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                return NULL;
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        s->target_base = base;
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        s->parent = &cpu->pic[irq];
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        /* alloc the external 16 irqs */
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        iomemtype = cpu_register_io_memory(0, mst_fpga_readfn,
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                mst_fpga_writefn, s);
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        cpu_register_physical_memory(MST_BASE, 0x00100000, iomemtype);
 
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        cpu_register_physical_memory(base, 0x00100000, iomemtype);
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        register_savevm("mainstone_fpga", 0, 0, mst_fpga_save, mst_fpga_load, s);
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        return qi;
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}