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* National Semiconductor LM8322/8323 GPIO keyboard & PWM chips.
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* Copyright (C) 2008 Nokia Corporation
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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#include "qemu-timer.h"
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#define INT_KEYPAD (1 << 0)
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#define INT_ERROR (1 << 3)
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#define INT_NOINIT (1 << 4)
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#define INT_PWMEND(n) (1 << (5 + n))
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#define ERR_BADPAR (1 << 0)
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#define ERR_CMDUNK (1 << 1)
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#define ERR_KEYOVR (1 << 2)
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#define ERR_FIFOOVR (1 << 6)
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static void lm_kbd_irq_update(struct lm_kbd_s *s)
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qemu_set_irq(s->nirq, !s->status);
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static void lm_kbd_gpio_update(struct lm_kbd_s *s)
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static void lm_kbd_reset(struct lm_kbd_s *s)
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s->status = INT_NOINIT;
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lm_kbd_gpio_update(s);
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static void lm_kbd_error(struct lm_kbd_s *s, int err)
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s->status |= INT_ERROR;
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lm_kbd_irq_update(s);
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static void lm_kbd_pwm_tick(struct lm_kbd_s *s, int line)
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static void lm_kbd_pwm_start(struct lm_kbd_s *s, int line)
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lm_kbd_pwm_tick(s, line);
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static void lm_kbd_pwm0_tick(void *opaque)
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lm_kbd_pwm_tick(opaque, 0);
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static void lm_kbd_pwm1_tick(void *opaque)
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lm_kbd_pwm_tick(opaque, 1);
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static void lm_kbd_pwm2_tick(void *opaque)
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lm_kbd_pwm_tick(opaque, 2);
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LM832x_CMD_READ_ID = 0x80, /* Read chip ID. */
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LM832x_CMD_WRITE_CFG = 0x81, /* Set configuration item. */
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LM832x_CMD_READ_INT = 0x82, /* Get interrupt status. */
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LM832x_CMD_RESET = 0x83, /* Reset, same as external one */
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LM823x_CMD_WRITE_PULL_DOWN = 0x84, /* Select GPIO pull-up/down. */
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LM832x_CMD_WRITE_PORT_SEL = 0x85, /* Select GPIO in/out. */
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LM832x_CMD_WRITE_PORT_STATE = 0x86, /* Set GPIO pull-up/down. */
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LM832x_CMD_READ_PORT_SEL = 0x87, /* Get GPIO in/out. */
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LM832x_CMD_READ_PORT_STATE = 0x88, /* Get GPIO pull-up/down. */
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LM832x_CMD_READ_FIFO = 0x89, /* Read byte from FIFO. */
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LM832x_CMD_RPT_READ_FIFO = 0x8a, /* Read FIFO (no increment). */
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LM832x_CMD_SET_ACTIVE = 0x8b, /* Set active time. */
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LM832x_CMD_READ_ERROR = 0x8c, /* Get error status. */
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LM832x_CMD_READ_ROTATOR = 0x8e, /* Read rotator status. */
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LM832x_CMD_SET_DEBOUNCE = 0x8f, /* Set debouncing time. */
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LM832x_CMD_SET_KEY_SIZE = 0x90, /* Set keypad size. */
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LM832x_CMD_READ_KEY_SIZE = 0x91, /* Get keypad size. */
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LM832x_CMD_READ_CFG = 0x92, /* Get configuration item. */
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LM832x_CMD_WRITE_CLOCK = 0x93, /* Set clock config. */
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LM832x_CMD_READ_CLOCK = 0x94, /* Get clock config. */
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LM832x_CMD_PWM_WRITE = 0x95, /* Write PWM script. */
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LM832x_CMD_PWM_START = 0x96, /* Start PWM engine. */
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LM832x_CMD_PWM_STOP = 0x97, /* Stop PWM engine. */
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#define LM832x_MAX_KPX 8
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#define LM832x_MAX_KPY 12
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static uint8_t lm_kbd_read(struct lm_kbd_s *s, int reg, int byte)
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case LM832x_CMD_READ_ID:
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case LM832x_CMD_READ_INT:
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if (!(s->status & INT_NOINIT)) {
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lm_kbd_irq_update(s);
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case LM832x_CMD_READ_PORT_SEL:
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case LM832x_CMD_READ_PORT_STATE:
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case LM832x_CMD_READ_FIFO:
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/* Example response from the two commands after a INT_KEYPAD
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* interrupt caused by the key 0x3c being pressed:
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* RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
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* READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
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* RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
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* 55 is the code of the key release event serviced in the previous
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* interrupt handling.
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* TODO: find out whether the FIFO is advanced a single character
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* before reading every byte or the whole size of the FIFO at the
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* last LM832x_CMD_READ_FIFO. This affects LM832x_CMD_RPT_READ_FIFO
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* output in cases where there are more than one event in the FIFO.
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* Assume 0xbc and 0x3c events are in the FIFO:
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* RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9
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* READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9
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* Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c?
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s->kbd.start &= sizeof(s->kbd.fifo) - 1;
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return s->kbd.fifo[s->kbd.start];
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case LM832x_CMD_RPT_READ_FIFO:
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if (byte >= s->kbd.len)
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return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)];
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case LM832x_CMD_READ_ERROR:
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case LM832x_CMD_READ_ROTATOR:
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case LM832x_CMD_READ_KEY_SIZE:
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case LM832x_CMD_READ_CFG:
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return s->config & 0xf;
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case LM832x_CMD_READ_CLOCK:
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return (s->clock & 0xfc) | 2;
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lm_kbd_error(s, ERR_CMDUNK);
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fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
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return ret >> (byte << 3);
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static void lm_kbd_write(struct lm_kbd_s *s, int reg, int byte, uint8_t value)
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case LM832x_CMD_WRITE_CFG:
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/* This must be done whenever s->mux.in is updated (never). */
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if ((s->config >> 1) & 1) /* MUX1EN */
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qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]);
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if ((s->config >> 3) & 1) /* MUX2EN */
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qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]);
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/* TODO: check that this is issued only following the chip reset
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* and not in the middle of operation and that it is followed by
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* the GPIO ports re-resablishing through WRITE_PORT_SEL and
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* WRITE_PORT_STATE (using a timer perhaps) and otherwise output
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lm_kbd_irq_update(s);
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case LM832x_CMD_RESET:
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lm_kbd_error(s, ERR_BADPAR);
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case LM823x_CMD_WRITE_PULL_DOWN:
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s->gpio.pull = value;
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s->gpio.pull |= value << 8;
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lm_kbd_gpio_update(s);
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case LM832x_CMD_WRITE_PORT_SEL:
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s->gpio.dir |= value << 8;
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lm_kbd_gpio_update(s);
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case LM832x_CMD_WRITE_PORT_STATE:
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s->gpio.mask = value;
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s->gpio.mask |= value << 8;
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lm_kbd_gpio_update(s);
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case LM832x_CMD_SET_ACTIVE:
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case LM832x_CMD_SET_DEBOUNCE:
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s->kbd.dbnctime = value;
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lm_kbd_error(s, ERR_BADPAR);
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case LM832x_CMD_SET_KEY_SIZE:
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(value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY ||
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(value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX)
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lm_kbd_error(s, ERR_BADPAR);
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case LM832x_CMD_WRITE_CLOCK:
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if ((value & 3) && (value & 3) != 3) {
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lm_kbd_error(s, ERR_BADPAR);
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fprintf(stderr, "%s: invalid clock setting in RCPWM\n",
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/* TODO: Validate that the command is only issued once */
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case LM832x_CMD_PWM_WRITE:
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if (!(value & 3) || (value >> 2) > 59) {
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lm_kbd_error(s, ERR_BADPAR);
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s->pwm.faddr = value;
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s->pwm.file[s->pwm.faddr] = 0;
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} else if (byte == 1) {
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s->pwm.file[s->pwm.faddr] |= value << 8;
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} else if (byte == 2) {
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s->pwm.file[s->pwm.faddr] |= value << 0;
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case LM832x_CMD_PWM_START:
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if (!(value & 3) || (value >> 2) > 59) {
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lm_kbd_error(s, ERR_BADPAR);
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s->pwm.addr[(value & 3) - 1] = value >> 2;
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lm_kbd_pwm_start(s, (value & 3) - 1);
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case LM832x_CMD_PWM_STOP:
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lm_kbd_error(s, ERR_BADPAR);
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qemu_del_timer(s->pwm.tm[(value & 3) - 1]);
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lm_kbd_error(s, ERR_BADPAR);
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lm_kbd_error(s, ERR_CMDUNK);
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fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
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static void lm_i2c_event(i2c_slave *i2c, enum i2c_event event)
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struct lm_kbd_s *s = (struct lm_kbd_s *) i2c;
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s->i2c_dir = (event == I2C_START_SEND);
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static int lm_i2c_rx(i2c_slave *i2c)
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struct lm_kbd_s *s = (struct lm_kbd_s *) i2c;
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return lm_kbd_read(s, s->reg, s->i2c_cycle ++);
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static int lm_i2c_tx(i2c_slave *i2c, uint8_t data)
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struct lm_kbd_s *s = (struct lm_kbd_s *) i2c;
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lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data);
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static void lm_kbd_save(QEMUFile *f, void *opaque)
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struct lm_kbd_s *s = (struct lm_kbd_s *) opaque;
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i2c_slave_save(f, &s->i2c);
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qemu_put_byte(f, s->i2c_dir);
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qemu_put_byte(f, s->i2c_cycle);
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qemu_put_byte(f, (uint8_t) s->reg);
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qemu_put_8s(f, &s->config);
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qemu_put_8s(f, &s->status);
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qemu_put_8s(f, &s->acttime);
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qemu_put_8s(f, &s->error);
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qemu_put_8s(f, &s->clock);
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qemu_put_be16s(f, &s->gpio.pull);
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qemu_put_be16s(f, &s->gpio.mask);
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qemu_put_be16s(f, &s->gpio.dir);
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qemu_put_be16s(f, &s->gpio.level);
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qemu_put_byte(f, s->kbd.dbnctime);
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qemu_put_byte(f, s->kbd.size);
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qemu_put_byte(f, s->kbd.start);
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qemu_put_byte(f, s->kbd.len);
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qemu_put_buffer(f, s->kbd.fifo, sizeof(s->kbd.fifo));
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for (i = 0; i < sizeof(s->pwm.file); i ++)
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qemu_put_be16s(f, &s->pwm.file[i]);
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qemu_put_8s(f, &s->pwm.faddr);
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qemu_put_buffer(f, s->pwm.addr, sizeof(s->pwm.addr));
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qemu_put_timer(f, s->pwm.tm[0]);
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qemu_put_timer(f, s->pwm.tm[1]);
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qemu_put_timer(f, s->pwm.tm[2]);
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static int lm_kbd_load(QEMUFile *f, void *opaque, int version_id)
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struct lm_kbd_s *s = (struct lm_kbd_s *) opaque;
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i2c_slave_load(f, &s->i2c);
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s->i2c_dir = qemu_get_byte(f);
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s->i2c_cycle = qemu_get_byte(f);
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s->reg = (int8_t) qemu_get_byte(f);
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qemu_get_8s(f, &s->config);
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qemu_get_8s(f, &s->status);
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qemu_get_8s(f, &s->acttime);
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qemu_get_8s(f, &s->error);
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qemu_get_8s(f, &s->clock);
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qemu_get_be16s(f, &s->gpio.pull);
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qemu_get_be16s(f, &s->gpio.mask);
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qemu_get_be16s(f, &s->gpio.dir);
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qemu_get_be16s(f, &s->gpio.level);
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s->kbd.dbnctime = qemu_get_byte(f);
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s->kbd.size = qemu_get_byte(f);
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s->kbd.start = qemu_get_byte(f);
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s->kbd.len = qemu_get_byte(f);
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qemu_get_buffer(f, s->kbd.fifo, sizeof(s->kbd.fifo));
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for (i = 0; i < sizeof(s->pwm.file); i ++)
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qemu_get_be16s(f, &s->pwm.file[i]);
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qemu_get_8s(f, &s->pwm.faddr);
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qemu_get_buffer(f, s->pwm.addr, sizeof(s->pwm.addr));
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qemu_get_timer(f, s->pwm.tm[0]);
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qemu_get_timer(f, s->pwm.tm[1]);
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qemu_get_timer(f, s->pwm.tm[2]);
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lm_kbd_irq_update(s);
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lm_kbd_gpio_update(s);
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struct i2c_slave *lm8323_init(i2c_bus *bus, qemu_irq nirq)
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s = (struct lm_kbd_s *) i2c_slave_init(bus, 0, sizeof(struct lm_kbd_s));
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s->pwm.tm[0] = qemu_new_timer(vm_clock, lm_kbd_pwm0_tick, s);
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s->pwm.tm[1] = qemu_new_timer(vm_clock, lm_kbd_pwm1_tick, s);
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s->pwm.tm[2] = qemu_new_timer(vm_clock, lm_kbd_pwm2_tick, s);
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s->i2c.event = lm_i2c_event;
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s->i2c.recv = lm_i2c_rx;
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s->i2c.send = lm_i2c_tx;
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qemu_register_reset((void *) lm_kbd_reset, s);
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register_savevm("LM8323", -1, 0, lm_kbd_save, lm_kbd_load, s);
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void lm832x_key_event(struct i2c_slave *i2c, int key, int state)
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struct lm_kbd_s *s = (struct lm_kbd_s *) i2c;
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if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR))
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if (s->kbd.len >= sizeof(s->kbd.fifo))
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return lm_kbd_error(s, ERR_FIFOOVR);
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s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] =
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/* We never set ERR_KEYOVR because we support multiple keys fine. */
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s->status |= INT_KEYPAD;
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lm_kbd_irq_update(s);