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.macro do_thumb_abort, fsr, pc, psr, tmp
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ldrh r3, [r2] @ Read aborted Thumb instruction
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and r3, r3, # 0xfe00 @ Mask opcode field
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cmp r3, # 0x5600 @ Is it ldrsb?
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orreq r3, r3, #1 << 11 @ Set L-bit if yes
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tst r3, #1 << 11 @ L = 0 -> write
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orreq r1, r1, #1 << 11 @ yes.
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ldrh \tmp, [\pc] @ Read aborted Thumb instruction
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and \tmp, \tmp, # 0xfe00 @ Mask opcode field
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cmp \tmp, # 0x5600 @ Is it ldrsb?
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orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes
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tst \tmp, #1 << 11 @ L = 0 -> write
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orreq \psr, \psr, #1 << 11 @ yes.
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* We check for the following insturction encoding for LDRD.
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* We check for the following instruction encoding for LDRD.
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tst r3, #0x0e000000 @ [27:25] == 0
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and r2, r3, #0x000000f0 @ [7:4] == 1101
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tst r3, #1 << 20 @ [20] == 0
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.macro do_ldrd_abort, tmp, insn
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tst \insn, #0x0e100000 @ [27:25,20] == 0
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and \tmp, \insn, #0x000000f0 @ [7:4] == 1101