505
505
* DDC_VGA = RADEON_GPIO_VGA_DDC
506
506
* DDC_LCD = RADEON_GPIOPAD_MASK
507
507
* DDC_GPIO = RADEON_MDGPIO_MASK
509
509
* DDC_MONID = RADEON_GPIO_MONID
510
510
* DDC_CRT2 = RADEON_GPIO_CRT2_DDC
512
* DDC_MONID = RADEON_GPIO_MONID
513
* DDC_CRT2 = RADEON_GPIO_DVI_DDC
512
* DDC_MONID = RADEON_GPIO_MONID
513
* DDC_CRT2 = RADEON_GPIO_DVI_DDC
515
* DDC_MONID = RADEON_GPIO_DVI_DDC
516
* DDC_CRT2 = RADEON_GPIO_DVI_DDC
518
* DDC_MONID = RADEON_GPIO_MONID
519
* DDC_CRT2 = RADEON_GPIO_MONID
515
521
* DDC_MONID = RADEON_GPIOPAD_MASK
516
522
* DDC_CRT2 = RADEON_GPIO_MONID
537
543
rdev->family == CHIP_RS400 ||
538
544
rdev->family == CHIP_RS480)
539
545
ddc_line = RADEON_GPIOPAD_MASK;
546
else if (rdev->family == CHIP_R300 ||
547
rdev->family == CHIP_R350) {
548
ddc_line = RADEON_GPIO_DVI_DDC;
541
551
ddc_line = RADEON_GPIO_MONID;
544
if (rdev->family == CHIP_RS300 ||
545
rdev->family == CHIP_RS400 ||
546
rdev->family == CHIP_RS480)
547
ddc_line = RADEON_GPIO_MONID;
548
else if (rdev->family >= CHIP_R300) {
554
if (rdev->family == CHIP_R200 ||
555
rdev->family == CHIP_R300 ||
556
rdev->family == CHIP_R350) {
549
557
ddc_line = RADEON_GPIO_DVI_DDC;
559
} else if (rdev->family == CHIP_RS300 ||
560
rdev->family == CHIP_RS400 ||
561
rdev->family == CHIP_RS480)
562
ddc_line = RADEON_GPIO_MONID;
563
else if (rdev->family >= CHIP_RV350) {
564
ddc_line = RADEON_GPIO_MONID;
552
567
ddc_line = RADEON_GPIO_CRT2_DDC;
709
724
struct drm_device *dev = rdev->ddev;
710
725
struct radeon_i2c_bus_rec i2c;
729
* 0x60, 0x64, 0x68, 0x6c, gpiopads, mm
731
* 0x60, 0x64, 0x68, mm
735
* 0x60, 0x64, 0x68, gpiopads, mm
713
739
i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
714
740
rdev->i2c_bus[0] = radeon_i2c_create(dev, &i2c, "DVI_DDC");
716
742
i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
717
743
rdev->i2c_bus[1] = radeon_i2c_create(dev, &i2c, "VGA_DDC");
719
746
i2c.valid = true;
720
747
i2c.hw_capable = true;
721
748
i2c.mm_i2c = true;
722
749
i2c.i2c_id = 0xa0;
723
750
rdev->i2c_bus[2] = radeon_i2c_create(dev, &i2c, "MM_I2C");
725
if (rdev->family == CHIP_RS300 ||
726
rdev->family == CHIP_RS400 ||
727
rdev->family == CHIP_RS480) {
752
if (rdev->family == CHIP_R300 ||
753
rdev->family == CHIP_R350) {
754
/* only 2 sw i2c pads */
755
} else if (rdev->family == CHIP_RS300 ||
756
rdev->family == CHIP_RS400 ||
757
rdev->family == CHIP_RS480) {
729
759
u8 id, blocks, clk, data;
732
763
i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
733
764
rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
741
772
clk = RBIOS8(offset + 3 + (i * 5) + 3);
742
773
data = RBIOS8(offset + 3 + (i * 5) + 4);
743
775
i2c = combios_setup_i2c_bus(rdev, DDC_MONID,
744
776
(1 << clk), (1 << data));
745
777
rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "GPIOPAD_MASK");
751
} else if (rdev->family >= CHIP_R300) {
782
} else if ((rdev->family == CHIP_R200) ||
783
(rdev->family >= CHIP_R300)) {
752
785
i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
753
786
rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
755
789
i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
756
790
rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
758
792
i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
759
793
rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "CRT2_DDC");
833
867
rdev->clock.default_sclk = sclk;
834
868
rdev->clock.default_mclk = mclk;
870
if (RBIOS32(pll_info + 0x16))
871
rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16);
873
rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */
1515
1554
(rdev->pdev->subsystem_device == 0x4a48)) {
1517
1556
rdev->mode_info.connector_table = CT_MAC_X800;
1518
} else if ((rdev->pdev->device == 0x4150) &&
1557
} else if ((of_machine_is_compatible("PowerMac7,2") ||
1558
of_machine_is_compatible("PowerMac7,3")) &&
1559
(rdev->pdev->device == 0x4150) &&
1519
1560
(rdev->pdev->subsystem_vendor == 0x1002) &&
1520
1561
(rdev->pdev->subsystem_device == 0x4150)) {
1562
/* Mac G5 tower 9600 */
1522
1563
rdev->mode_info.connector_table = CT_MAC_G5_9600;
1524
1565
#endif /* CONFIG_PPC_PMAC */
2574
/* check for a thermal chip */
2575
offset = combios_get_table_offset(dev, COMBIOS_OVERDRIVE_INFO_TABLE);
2577
u8 thermal_controller = 0, gpio = 0, i2c_addr = 0, clk_bit = 0, data_bit = 0;
2578
struct radeon_i2c_bus_rec i2c_bus;
2580
rev = RBIOS8(offset);
2583
thermal_controller = RBIOS8(offset + 3);
2584
gpio = RBIOS8(offset + 4) & 0x3f;
2585
i2c_addr = RBIOS8(offset + 5);
2586
} else if (rev == 1) {
2587
thermal_controller = RBIOS8(offset + 4);
2588
gpio = RBIOS8(offset + 5) & 0x3f;
2589
i2c_addr = RBIOS8(offset + 6);
2590
} else if (rev == 2) {
2591
thermal_controller = RBIOS8(offset + 4);
2592
gpio = RBIOS8(offset + 5) & 0x3f;
2593
i2c_addr = RBIOS8(offset + 6);
2594
clk_bit = RBIOS8(offset + 0xa);
2595
data_bit = RBIOS8(offset + 0xb);
2597
if ((thermal_controller > 0) && (thermal_controller < 3)) {
2598
DRM_INFO("Possible %s thermal controller at 0x%02x\n",
2599
thermal_controller_names[thermal_controller],
2601
if (gpio == DDC_LCD) {
2603
i2c_bus.valid = true;
2604
i2c_bus.hw_capable = true;
2605
i2c_bus.mm_i2c = true;
2606
i2c_bus.i2c_id = 0xa0;
2607
} else if (gpio == DDC_GPIO)
2608
i2c_bus = combios_setup_i2c_bus(rdev, gpio, 1 << clk_bit, 1 << data_bit);
2610
i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0);
2611
rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
2612
if (rdev->pm.i2c_bus) {
2613
struct i2c_board_info info = { };
2614
const char *name = thermal_controller_names[thermal_controller];
2615
info.addr = i2c_addr >> 1;
2616
strlcpy(info.type, name, sizeof(info.type));
2617
i2c_new_device(&rdev->pm.i2c_bus->adapter, &info);
2527
2622
if (rdev->flags & RADEON_IS_MOBILITY) {
2528
2623
offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE);