153
static ssize_t adis16201_read_12bit_unsigned(struct device *dev,
154
struct device_attribute *attr,
159
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
161
ret = adis16201_spi_read_reg_16(dev, this_attr->address, &val);
165
if (val & ADIS16201_ERROR_ACTIVE) {
166
ret = adis16201_check_status(dev);
171
return sprintf(buf, "%u\n", val & 0x0FFF);
174
static ssize_t adis16201_read_temp(struct device *dev,
175
struct device_attribute *attr,
178
struct iio_dev *indio_dev = dev_get_drvdata(dev);
182
/* Take the iio_dev status lock */
183
mutex_lock(&indio_dev->mlock);
185
ret = adis16201_spi_read_reg_16(dev, ADIS16201_TEMP_OUT, (u16 *)&val);
189
if (val & ADIS16201_ERROR_ACTIVE) {
190
ret = adis16201_check_status(dev);
196
ret = sprintf(buf, "%d\n", val);
199
mutex_unlock(&indio_dev->mlock);
203
static ssize_t adis16201_read_9bit_signed(struct device *dev,
204
struct device_attribute *attr,
207
struct iio_dev *indio_dev = dev_get_drvdata(dev);
208
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
212
mutex_lock(&indio_dev->mlock);
214
ret = adis16201_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
216
if (val & ADIS16201_ERROR_ACTIVE) {
217
ret = adis16201_check_status(dev);
221
val = ((s16)(val << 7) >> 7);
222
ret = sprintf(buf, "%d\n", val);
226
mutex_unlock(&indio_dev->mlock);
231
static ssize_t adis16201_read_12bit_signed(struct device *dev,
232
struct device_attribute *attr,
235
struct iio_dev *indio_dev = dev_get_drvdata(dev);
236
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
240
mutex_lock(&indio_dev->mlock);
242
ret = adis16201_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
244
if (val & ADIS16201_ERROR_ACTIVE) {
245
ret = adis16201_check_status(dev);
250
val = ((s16)(val << 4) >> 4);
251
ret = sprintf(buf, "%d\n", val);
255
mutex_unlock(&indio_dev->mlock);
260
static ssize_t adis16201_read_14bit_signed(struct device *dev,
261
struct device_attribute *attr,
264
struct iio_dev *indio_dev = dev_get_drvdata(dev);
265
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
269
mutex_lock(&indio_dev->mlock);
271
ret = adis16201_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
273
if (val & ADIS16201_ERROR_ACTIVE) {
274
ret = adis16201_check_status(dev);
279
val = ((s16)(val << 2) >> 2);
280
ret = sprintf(buf, "%d\n", val);
284
mutex_unlock(&indio_dev->mlock);
289
static ssize_t adis16201_write_16bit(struct device *dev,
290
struct device_attribute *attr,
294
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
298
ret = strict_strtol(buf, 10, &val);
301
ret = adis16201_spi_write_reg_16(dev, this_attr->address, val);
304
return ret ? ret : len;
307
154
static int adis16201_reset(struct device *dev)
439
static IIO_DEV_ATTR_IN_NAMED_RAW(0, supply, adis16201_read_12bit_unsigned,
440
ADIS16201_SUPPLY_OUT);
441
static IIO_CONST_ATTR(in0_supply_scale, "0.00122");
442
static IIO_DEV_ATTR_IN_RAW(1, adis16201_read_12bit_unsigned,
444
static IIO_CONST_ATTR(in1_scale, "0.00061");
446
static IIO_DEV_ATTR_ACCEL_X(adis16201_read_14bit_signed,
447
ADIS16201_XACCL_OUT);
448
static IIO_DEV_ATTR_ACCEL_Y(adis16201_read_14bit_signed,
449
ADIS16201_YACCL_OUT);
450
static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO,
451
adis16201_read_12bit_signed,
452
adis16201_write_16bit,
453
ADIS16201_XACCL_OFFS);
454
static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO,
455
adis16201_read_12bit_signed,
456
adis16201_write_16bit,
457
ADIS16201_YACCL_OFFS);
458
static IIO_CONST_ATTR(accel_scale, "0.4625");
460
static IIO_DEV_ATTR_INCLI_X(adis16201_read_14bit_signed,
461
ADIS16201_XINCL_OUT);
462
static IIO_DEV_ATTR_INCLI_Y(adis16201_read_14bit_signed,
463
ADIS16201_YINCL_OUT);
464
static IIO_DEV_ATTR_INCLI_X_OFFSET(S_IWUSR | S_IRUGO,
465
adis16201_read_9bit_signed,
466
adis16201_write_16bit,
467
ADIS16201_XACCL_OFFS);
468
static IIO_DEV_ATTR_INCLI_Y_OFFSET(S_IWUSR | S_IRUGO,
469
adis16201_read_9bit_signed,
470
adis16201_write_16bit,
471
ADIS16201_YACCL_OFFS);
472
static IIO_CONST_ATTR(incli_scale, "0.1");
474
static IIO_DEV_ATTR_TEMP_RAW(adis16201_read_temp);
475
static IIO_CONST_ATTR(temp_offset, "25");
476
static IIO_CONST_ATTR(temp_scale, "-0.47");
287
static u8 adis16201_addresses[7][2] = {
288
[in_supply] = { ADIS16201_SUPPLY_OUT, },
289
[temp] = { ADIS16201_TEMP_OUT },
290
[accel_x] = { ADIS16201_XACCL_OUT, ADIS16201_XACCL_OFFS },
291
[accel_y] = { ADIS16201_YACCL_OUT, ADIS16201_YACCL_OFFS },
292
[in_aux] = { ADIS16201_AUX_ADC },
293
[incli_x] = { ADIS16201_XINCL_OUT },
294
[incli_y] = { ADIS16201_YINCL_OUT },
297
static int adis16201_read_raw(struct iio_dev *indio_dev,
298
struct iio_chan_spec const *chan,
309
mutex_lock(&indio_dev->mlock);
310
addr = adis16201_addresses[chan->address][0];
311
ret = adis16201_spi_read_reg_16(indio_dev, addr, &val16);
315
if (val16 & ADIS16201_ERROR_ACTIVE) {
316
ret = adis16201_check_status(indio_dev);
320
val16 = val16 & ((1 << chan->scan_type.realbits) - 1);
321
if (chan->scan_type.sign == 's')
322
val16 = (s16)(val16 <<
323
(16 - chan->scan_type.realbits)) >>
324
(16 - chan->scan_type.realbits);
326
mutex_unlock(&indio_dev->mlock);
328
case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
329
case (1 << IIO_CHAN_INFO_SCALE_SHARED):
330
switch (chan->type) {
333
if (chan->channel == 0)
337
return IIO_VAL_INT_PLUS_MICRO;
341
return IIO_VAL_INT_PLUS_MICRO;
345
return IIO_VAL_INT_PLUS_MICRO;
349
return IIO_VAL_INT_PLUS_MICRO;
354
case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE):
357
case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE):
358
switch (chan->type) {
368
mutex_lock(&indio_dev->mlock);
369
addr = adis16201_addresses[chan->address][1];
370
ret = adis16201_spi_read_reg_16(indio_dev, addr, &val16);
372
mutex_unlock(&indio_dev->mlock);
375
val16 &= (1 << bits) - 1;
376
val16 = (s16)(val16 << (16 - bits)) >> (16 - bits);
378
mutex_unlock(&indio_dev->mlock);
384
static int adis16201_write_raw(struct iio_dev *indio_dev,
385
struct iio_chan_spec const *chan,
394
case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE):
395
switch (chan->type) {
405
val16 = val & ((1 << bits) - 1);
406
addr = adis16201_addresses[chan->address][1];
407
return adis16201_spi_write_reg_16(indio_dev, addr, val16);
412
static struct iio_chan_spec adis16201_channels[] = {
413
IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 0, 0,
414
(1 << IIO_CHAN_INFO_SCALE_SEPARATE),
415
in_supply, ADIS16201_SCAN_SUPPLY,
416
IIO_ST('u', 12, 16, 0), 0),
417
IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
418
(1 << IIO_CHAN_INFO_SCALE_SEPARATE) |
419
(1 << IIO_CHAN_INFO_OFFSET_SEPARATE),
420
temp, ADIS16201_SCAN_TEMP,
421
IIO_ST('u', 12, 16, 0), 0),
422
IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X,
423
(1 << IIO_CHAN_INFO_SCALE_SHARED) |
424
(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE),
425
accel_x, ADIS16201_SCAN_ACC_X,
426
IIO_ST('s', 14, 16, 0), 0),
427
IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y,
428
(1 << IIO_CHAN_INFO_SCALE_SHARED) |
429
(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE),
430
accel_y, ADIS16201_SCAN_ACC_Y,
431
IIO_ST('s', 14, 16, 0), 0),
432
IIO_CHAN(IIO_IN, 0, 1, 0, NULL, 1, 0,
433
(1 << IIO_CHAN_INFO_SCALE_SEPARATE),
434
in_aux, ADIS16201_SCAN_AUX_ADC,
435
IIO_ST('u', 12, 16, 0), 0),
436
IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_X,
437
(1 << IIO_CHAN_INFO_SCALE_SHARED) |
438
(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE),
439
incli_x, ADIS16201_SCAN_INCLI_X,
440
IIO_ST('s', 14, 16, 0), 0),
441
IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_Y,
442
(1 << IIO_CHAN_INFO_SCALE_SHARED) |
443
(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE),
444
incli_y, ADIS16201_SCAN_INCLI_Y,
445
IIO_ST('s', 14, 16, 0), 0),
446
IIO_CHAN_SOFT_TIMESTAMP(7)
478
449
static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16201_write_reset, 0);
480
static IIO_CONST_ATTR(name, "adis16201");
482
static struct attribute *adis16201_event_attributes[] = {
486
static struct attribute_group adis16201_event_attribute_group = {
487
.attrs = adis16201_event_attributes,
490
451
static struct attribute *adis16201_attributes[] = {
491
&iio_dev_attr_in0_supply_raw.dev_attr.attr,
492
&iio_const_attr_in0_supply_scale.dev_attr.attr,
493
&iio_dev_attr_temp_raw.dev_attr.attr,
494
&iio_const_attr_temp_offset.dev_attr.attr,
495
&iio_const_attr_temp_scale.dev_attr.attr,
496
452
&iio_dev_attr_reset.dev_attr.attr,
497
&iio_const_attr_name.dev_attr.attr,
498
&iio_dev_attr_in1_raw.dev_attr.attr,
499
&iio_const_attr_in1_scale.dev_attr.attr,
500
&iio_dev_attr_accel_x_raw.dev_attr.attr,
501
&iio_dev_attr_accel_y_raw.dev_attr.attr,
502
&iio_dev_attr_accel_x_offset.dev_attr.attr,
503
&iio_dev_attr_accel_y_offset.dev_attr.attr,
504
&iio_const_attr_accel_scale.dev_attr.attr,
505
&iio_dev_attr_incli_x_raw.dev_attr.attr,
506
&iio_dev_attr_incli_y_raw.dev_attr.attr,
507
&iio_dev_attr_incli_x_offset.dev_attr.attr,
508
&iio_dev_attr_incli_y_offset.dev_attr.attr,
509
&iio_const_attr_incli_scale.dev_attr.attr,